Datasets:
MBZUAI
/
cass

Dataset card Data Studio Files Community
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beddb873f435589b120a426272576ee7200e15ab
#include <cstdlib> #include <cstdio> #include <cmath> #include <cassert> #define SIZE 32 __global__ void matrix_add(float** d_A, float** d_B, float** d_C, size_t size) { size_t i = threadIdx.x + blockDim.x*blockIdx.x; size_t j = threadIdx.y + blockDim.y*blockIdx.y; printf("i: %d, j: %d, d_A[i][j]: %f\n", i, j, d_A[i][j]); /* if(i < size && j < size) */ /* d_C[i][j] = d_A[i][j] + d_B[i][j]; */ } void print_err_msg(cudaError_t err) { if(err != cudaSuccess) { printf("%s in %s at line %d\n", cudaGetErrorString(err), __FILE__, __LINE__); exit(EXIT_FAILURE); } } int main() { float** h_A; float** h_B; float** h_C; float** d_A; float** d_B; float** d_C; float** s_A; float** s_B; float** s_C; h_A = new float*[SIZE]; h_B = new float*[SIZE]; h_C = new float*[SIZE]; s_A = (float **)malloc(SIZE*sizeof(float*)); s_B = (float **)malloc(SIZE*sizeof(float*)); s_C = (float **)malloc(SIZE*sizeof(float*)); cudaError_t err; err = cudaMalloc((void**) &d_A, SIZE*sizeof(float*)); print_err_msg(err); err = cudaMalloc((void**) &d_B, SIZE*sizeof(float*)); print_err_msg(err); err = cudaMalloc((void**) &d_C, SIZE*sizeof(float*)); print_err_msg(err); err = cudaMemcpy(s_A, d_A, SIZE*sizeof(float*), cudaMemcpyDeviceToHost); err = cudaMemcpy(s_B, d_B, SIZE*sizeof(float*), cudaMemcpyDeviceToHost); err = cudaMemcpy(s_C, d_C, SIZE*sizeof(float*), cudaMemcpyDeviceToHost); for(size_t i = 0; i < SIZE; ++i) { h_A[i] = new float[SIZE]; h_B[i] = new float[SIZE]; h_C[i] = new float[SIZE]; err = cudaMalloc((void **) &s_A[i], SIZE*sizeof(float)); print_err_msg(err); err = cudaMalloc((void **) &s_B[i], SIZE*sizeof(float)); print_err_msg(err); err = cudaMalloc((void **) &s_C[i], SIZE*sizeof(float)); print_err_msg(err); } for(size_t i = 0; i < SIZE; ++i) { for(size_t j = 0; j < SIZE; ++j) { h_A[i][j] = 1.0f; h_B[i][j] = 2.0f; } } for(size_t i = 0; i < SIZE; ++i) { cudaMemcpy(s_A[i], h_A[i], SIZE*sizeof(float), cudaMemcpyHostToDevice); cudaMemcpy(s_B[i], h_B[i], SIZE*sizeof(float), cudaMemcpyHostToDevice); } int threads = 32; dim3 nthreads(threads, threads); int blocks = ceil(SIZE/threads); dim3 nblocks(blocks, blocks); matrix_add<<<nblocks, nthreads>>>(d_A, d_B, d_C, SIZE); for(size_t i = 0; i < SIZE; ++i) { cudaMemcpy(h_C[i], s_C[i], SIZE*sizeof(float), cudaMemcpyDeviceToHost); } /* for(size_t i = 0; i < SIZE; ++i) { */ /* for(size_t j = 0; j < SIZE; ++j) { */ /* /1* assert(h_C[i][j] == 3.0f); *1/ */ /* printf("%f\t", h_C[i][j]); */ /* } */ /* printf("\n"); */ /* } */ for(size_t i = 0; i < SIZE; ++i) { delete[] h_A[i]; delete[] h_B[i]; delete[] h_C[i]; err = cudaFree(s_A[i]); print_err_msg(err); err = cudaFree(s_B[i]); print_err_msg(err); err = cudaFree(s_C[i]); print_err_msg(err); } delete[] h_A; delete[] h_B; delete[] h_C; err = cudaFree(d_A); print_err_msg(err); err = cudaFree(d_B); print_err_msg(err); err = cudaFree(d_C); print_err_msg(err); return 0; }
.file "tmpxft_0029759f_00000000-6_matrix_add.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "/home/ubuntu/Datasets/stackv2/train-structured/palPrabhakar/tutorials/master/cuda/kirk_hwu/ch3/matrix_add.cu" .LC1: .string "%s in %s at line %d\n" .text .globl _Z13print_err_msg9cudaError .type _Z13print_err_msg9cudaError, @function _Z13print_err_msg9cudaError: .LFB2027: .cfi_startproc endbr64 testl %edi, %edi je .L2 pushq %rax .cfi_def_cfa_offset 16 call cudaGetErrorString@PLT movl $2, %edi movl $18, %r8d leaq .LC0(%rip), %rcx movq %rax, %rdx leaq .LC1(%rip), %rsi xorl %eax, %eax call __printf_chk@PLT movl $1, %edi call exit@PLT .L2: .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _Z13print_err_msg9cudaError, .-_Z13print_err_msg9cudaError .globl _Z38__device_stub__Z10matrix_addPPfS0_S0_mPPfS0_S0_m .type _Z38__device_stub__Z10matrix_addPPfS0_S0_mPPfS0_S0_m, @function _Z38__device_stub__Z10matrix_addPPfS0_S0_mPPfS0_S0_m: .LFB2053: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movq %rcx, (%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L8 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z10matrix_addPPfS0_S0_m(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L8: movq 136(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z38__device_stub__Z10matrix_addPPfS0_S0_mPPfS0_S0_m, .-_Z38__device_stub__Z10matrix_addPPfS0_S0_mPPfS0_S0_m .globl _Z10matrix_addPPfS0_S0_m .type _Z10matrix_addPPfS0_S0_m, @function _Z10matrix_addPPfS0_S0_m: .LFB2054: .cfi_startproc endbr64 jmp _Z38__device_stub__Z10matrix_addPPfS0_S0_mPPfS0_S0_m .cfi_endproc .LFE2054: .size _Z10matrix_addPPfS0_S0_m, .-_Z10matrix_addPPfS0_S0_m .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl $256, %edi pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 xorl %ebx, %ebx subq $88, %rsp .cfi_def_cfa_offset 144 movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax call _Znam@PLT movl $256, %edi movq %rax, %r12 call _Znam@PLT movl $256, %edi movq %rax, %rbp call _Znam@PLT movl $256, %edi movq %rax, 8(%rsp) call malloc@PLT movl $256, %edi movq %rax, %r15 call malloc@PLT movl $256, %edi movq %rax, %r14 call malloc@PLT movl $256, %esi leaq 24(%rsp), %rdi movq %rax, %r13 call cudaMalloc@PLT movl %eax, %edi call _Z13print_err_msg9cudaError movl $256, %esi leaq 32(%rsp), %rdi call cudaMalloc@PLT movl %eax, %edi call _Z13print_err_msg9cudaError movl $256, %esi leaq 40(%rsp), %rdi call cudaMalloc@PLT movl %eax, %edi call _Z13print_err_msg9cudaError movq 24(%rsp), %rsi movl $2, %ecx movq %r15, %rdi movl $256, %edx call cudaMemcpy@PLT movq 32(%rsp), %rsi movl $2, %ecx movq %r14, %rdi movl $256, %edx call cudaMemcpy@PLT movq 40(%rsp), %rsi movl $2, %ecx movq %r13, %rdi movl $256, %edx call cudaMemcpy@PLT .L14: movl $128, %edi call _Znam@PLT movl $128, %edi movq %rax, (%r12,%rbx) call _Znam@PLT movl $128, %edi movq %rax, 0(%rbp,%rbx) call _Znam@PLT movq 8(%rsp), %rcx leaq (%r15,%rbx), %rdi movl $128, %esi movq %rax, (%rcx,%rbx) call cudaMalloc@PLT movl %eax, %edi call _Z13print_err_msg9cudaError leaq (%r14,%rbx), %rdi movl $128, %esi call cudaMalloc@PLT movl %eax, %edi call _Z13print_err_msg9cudaError leaq 0(%r13,%rbx), %rdi movl $128, %esi addq $8, %rbx call cudaMalloc@PLT movl %eax, %edi call _Z13print_err_msg9cudaError cmpq $256, %rbx jne .L14 movss .LC2(%rip), %xmm0 movss .LC3(%rip), %xmm1 xorl %edx, %edx .L15: movq (%r12,%rdx,8), %rsi movq 0(%rbp,%rdx,8), %rcx xorl %eax, %eax .L16: movss %xmm0, (%rsi,%rax,4) movss %xmm1, (%rcx,%rax,4) incq %rax cmpq $32, %rax jne .L16 incq %rdx cmpq $32, %rdx jne .L15 xorl %ebx, %ebx .L17: movq (%r12,%rbx,8), %rsi movq (%r15,%rbx,8), %rdi movl $1, %ecx movl $128, %edx call cudaMemcpy@PLT movq 0(%rbp,%rbx,8), %rsi movq (%r14,%rbx,8), %rdi movl $1, %ecx movl $128, %edx incq %rbx call cudaMemcpy@PLT cmpq $32, %rbx jne .L17 xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movl $1, %esi movabsq $137438953504, %rdx movabsq $4294967297, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L18 movq 40(%rsp), %rdx movq 32(%rsp), %rsi movl $32, %ecx movq 24(%rsp), %rdi call _Z38__device_stub__Z10matrix_addPPfS0_S0_mPPfS0_S0_m .L18: xorl %ebx, %ebx .L19: movq 8(%rsp), %rax movq 0(%r13,%rbx,8), %rsi movl $2, %ecx movl $128, %edx movq (%rax,%rbx,8), %rdi incq %rbx call cudaMemcpy@PLT cmpq $32, %rbx jne .L19 xorl %ebx, %ebx .L23: movq (%r12,%rbx,8), %rdi testq %rdi, %rdi je .L20 call _ZdaPv@PLT .L20: movq 0(%rbp,%rbx,8), %rdi testq %rdi, %rdi je .L21 call _ZdaPv@PLT .L21: movq 8(%rsp), %rax movq (%rax,%rbx,8), %rdi testq %rdi, %rdi je .L22 call _ZdaPv@PLT .L22: movq (%r15,%rbx,8), %rdi call cudaFree@PLT movl %eax, %edi call _Z13print_err_msg9cudaError movq (%r14,%rbx,8), %rdi call cudaFree@PLT movl %eax, %edi call _Z13print_err_msg9cudaError movq 0(%r13,%rbx,8), %rdi incq %rbx call cudaFree@PLT movl %eax, %edi call _Z13print_err_msg9cudaError cmpq $32, %rbx jne .L23 movq %r12, %rdi call _ZdaPv@PLT movq %rbp, %rdi call _ZdaPv@PLT movq 8(%rsp), %rdi call _ZdaPv@PLT movq 24(%rsp), %rdi call cudaFree@PLT movl %eax, %edi call _Z13print_err_msg9cudaError movq 32(%rsp), %rdi call cudaFree@PLT movl %eax, %edi call _Z13print_err_msg9cudaError movq 40(%rsp), %rdi call cudaFree@PLT movl %eax, %edi call _Z13print_err_msg9cudaError movq 72(%rsp), %rax subq %fs:40, %rax je .L24 call __stack_chk_fail@PLT .L24: addq $88, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .section .rodata.str1.1 .LC4: .string "_Z10matrix_addPPfS0_S0_m" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2056: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi leaq _Z10matrix_addPPfS0_S0_m(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2056: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC2: .long 1065353216 .align 4 .LC3: .long 1073741824 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10matrix_addPPfS0_S0_m .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */ /* 0x000e220000002100 */ /*0020*/ IMAD.MOV.U32 R5, RZ, RZ, 0x8 ; /* 0x00000008ff057424 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0040*/ IADD3 R1, R1, -0x18, RZ ; /* 0xffffffe801017810 */ /* 0x000fe20007ffe0ff */ /*0050*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0060*/ IMAD R2, R3, c[0x0][0x0], R2 ; /* 0x0000000003027a24 */ /* 0x001fc800078e0202 */ /*0070*/ IMAD.WIDE.U32 R4, R2, R5, c[0x0][0x160] ; /* 0x0000580002047625 */ /* 0x000fcc00078e0005 */ /*0080*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1b00 */ /*0090*/ S2R R8, SR_TID.Y ; /* 0x0000000000087919 */ /* 0x000e280000002200 */ /*00a0*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */ /* 0x000e240000002600 */ /*00b0*/ IMAD R8, R9, c[0x0][0x4], R8 ; /* 0x0000010009087a24 */ /* 0x001fc800078e0208 */ /*00c0*/ IMAD.WIDE.U32 R10, R8, 0x4, R4 ; /* 0x00000004080a7825 */ /* 0x004fcc00078e0004 */ /*00d0*/ LD.E R10, [R10.64] ; /* 0x000000040a0a7980 */ /* 0x000ea2000c101900 */ /*00e0*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */ /* 0x000fe200078e00ff */ /*00f0*/ MOV R9, RZ ; /* 0x000000ff00097202 */ /* 0x000fe20000000f00 */ /*0100*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*0110*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe20000000f00 */ /*0120*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x000fe200078e00ff */ /*0130*/ STL.64 [R1], R2 ; /* 0x0000000201007387 */ /* 0x0001e20000100a00 */ /*0140*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fe20007f1e0ff */ /*0150*/ LDC.64 R14, c[0x4][R0] ; /* 0x01000000000e7b82 */ /* 0x0000640000000a00 */ /*0160*/ STL.64 [R1+0x8], R8 ; /* 0x0000080801007387 */ /* 0x0001e20000100a00 */ /*0170*/ IADD3.X R7, RZ, c[0x0][0x24], RZ, P0, !PT ; /* 0x00000900ff077a10 */ /* 0x000fe200007fe4ff */ /*0180*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */ /* 0x004ea40000201800 */ /*0190*/ STL.64 [R1+0x10], R12 ; /* 0x0000100c01007387 */ /* 0x0041ec0000100a00 */ /*01a0*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x003fe40000000000 */ /*01b0*/ MOV R9, 0x220 ; /* 0x0000022000097802 */ /* 0x000fe40000000f00 */ /*01c0*/ MOV R20, 0x1a0 ; /* 0x000001a000147802 */ /* 0x000fc40000000f00 */ /*01d0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*01e0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*01f0*/ IADD3 R20, P0, P1, -R20, R9, R2 ; /* 0x0000000914147210 */ /* 0x000fc8000791e102 */ /*0200*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*0210*/ CALL.ABS.NOINC R14 ; /* 0x000000000e007343 */ /* 0x000fea0003c00000 */ /*0220*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0230*/ BRA 0x230; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <cstdlib> #include <cstdio> #include <cmath> #include <cassert> #define SIZE 32 __global__ void matrix_add(float** d_A, float** d_B, float** d_C, size_t size) { size_t i = threadIdx.x + blockDim.x*blockIdx.x; size_t j = threadIdx.y + blockDim.y*blockIdx.y; printf("i: %d, j: %d, d_A[i][j]: %f\n", i, j, d_A[i][j]); /* if(i < size && j < size) */ /* d_C[i][j] = d_A[i][j] + d_B[i][j]; */ } void print_err_msg(hipError_t err) { if(err != hipSuccess) { printf("%s in %s at line %d\n", hipGetErrorString(err), __FILE__, __LINE__); exit(EXIT_FAILURE); } } int main() { float** h_A; float** h_B; float** h_C; float** d_A; float** d_B; float** d_C; float** s_A; float** s_B; float** s_C; h_A = new float*[SIZE]; h_B = new float*[SIZE]; h_C = new float*[SIZE]; s_A = (float **)malloc(SIZE*sizeof(float*)); s_B = (float **)malloc(SIZE*sizeof(float*)); s_C = (float **)malloc(SIZE*sizeof(float*)); hipError_t err; err = hipMalloc((void**) &d_A, SIZE*sizeof(float*)); print_err_msg(err); err = hipMalloc((void**) &d_B, SIZE*sizeof(float*)); print_err_msg(err); err = hipMalloc((void**) &d_C, SIZE*sizeof(float*)); print_err_msg(err); err = hipMemcpy(s_A, d_A, SIZE*sizeof(float*), hipMemcpyDeviceToHost); err = hipMemcpy(s_B, d_B, SIZE*sizeof(float*), hipMemcpyDeviceToHost); err = hipMemcpy(s_C, d_C, SIZE*sizeof(float*), hipMemcpyDeviceToHost); for(size_t i = 0; i < SIZE; ++i) { h_A[i] = new float[SIZE]; h_B[i] = new float[SIZE]; h_C[i] = new float[SIZE]; err = hipMalloc((void **) &s_A[i], SIZE*sizeof(float)); print_err_msg(err); err = hipMalloc((void **) &s_B[i], SIZE*sizeof(float)); print_err_msg(err); err = hipMalloc((void **) &s_C[i], SIZE*sizeof(float)); print_err_msg(err); } for(size_t i = 0; i < SIZE; ++i) { for(size_t j = 0; j < SIZE; ++j) { h_A[i][j] = 1.0f; h_B[i][j] = 2.0f; } } for(size_t i = 0; i < SIZE; ++i) { hipMemcpy(s_A[i], h_A[i], SIZE*sizeof(float), hipMemcpyHostToDevice); hipMemcpy(s_B[i], h_B[i], SIZE*sizeof(float), hipMemcpyHostToDevice); } int threads = 32; dim3 nthreads(threads, threads); int blocks = ceil(SIZE/threads); dim3 nblocks(blocks, blocks); matrix_add<<<nblocks, nthreads>>>(d_A, d_B, d_C, SIZE); for(size_t i = 0; i < SIZE; ++i) { hipMemcpy(h_C[i], s_C[i], SIZE*sizeof(float), hipMemcpyDeviceToHost); } /* for(size_t i = 0; i < SIZE; ++i) { */ /* for(size_t j = 0; j < SIZE; ++j) { */ /* /1* assert(h_C[i][j] == 3.0f); *1/ */ /* printf("%f\t", h_C[i][j]); */ /* } */ /* printf("\n"); */ /* } */ for(size_t i = 0; i < SIZE; ++i) { delete[] h_A[i]; delete[] h_B[i]; delete[] h_C[i]; err = hipFree(s_A[i]); print_err_msg(err); err = hipFree(s_B[i]); print_err_msg(err); err = hipFree(s_C[i]); print_err_msg(err); } delete[] h_A; delete[] h_B; delete[] h_C; err = hipFree(d_A); print_err_msg(err); err = hipFree(d_B); print_err_msg(err); err = hipFree(d_C); print_err_msg(err); return 0; }
.text .file "matrix_add.hip" .globl _Z25__device_stub__matrix_addPPfS0_S0_m # -- Begin function _Z25__device_stub__matrix_addPPfS0_S0_m .type _Z25__device_stub__matrix_addPPfS0_S0_m,@function _Z25__device_stub__matrix_addPPfS0_S0_m: # @_Z25__device_stub__matrix_addPPfS0_S0_m .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 16(%rsp), %rdx movq %rcx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10matrix_addPPfS0_S0_m, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z25__device_stub__matrix_addPPfS0_S0_m, .Lfunc_end0-_Z25__device_stub__matrix_addPPfS0_S0_m .cfi_endproc # -- End function .globl _Z13print_err_msg10hipError_t # -- Begin function _Z13print_err_msg10hipError_t .type _Z13print_err_msg10hipError_t,@function _Z13print_err_msg10hipError_t: # @_Z13print_err_msg10hipError_t .cfi_startproc # %bb.0: testl %edi, %edi jne .LBB1_2 # %bb.1: retq .LBB1_2: pushq %rax .cfi_def_cfa_offset 16 callq hipGetErrorString movl $.L.str, %edi movl $.L.str.1, %edx movq %rax, %rsi movl $20, %ecx xorl %eax, %eax callq printf movl $1, %edi callq exit .Lfunc_end1: .size _Z13print_err_msg10hipError_t, .Lfunc_end1-_Z13print_err_msg10hipError_t .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $40, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $256, %edi # imm = 0x100 callq _Znam movq %rax, %rbx movl $256, %edi # imm = 0x100 callq _Znam movq %rax, %r14 movl $256, %edi # imm = 0x100 callq _Znam movq %rax, (%rsp) # 8-byte Spill movl $256, %edi # imm = 0x100 callq malloc movq %rax, %r12 movl $256, %edi # imm = 0x100 callq malloc movq %rax, %r13 movl $256, %edi # imm = 0x100 callq malloc movq %rax, %rbp leaq 24(%rsp), %r15 movl $256, %esi # imm = 0x100 movq %r15, %rdi callq hipMalloc movl %eax, %edi callq _Z13print_err_msg10hipError_t leaq 16(%rsp), %rdi movl $256, %esi # imm = 0x100 callq hipMalloc movl %eax, %edi callq _Z13print_err_msg10hipError_t leaq 8(%rsp), %rdi movl $256, %esi # imm = 0x100 callq hipMalloc movl %eax, %edi callq _Z13print_err_msg10hipError_t movq (%r15), %rsi movl $256, %edx # imm = 0x100 movq %r12, %rdi movl $2, %ecx callq hipMemcpy leaq 16(%rsp), %rax movq (%rax), %rsi movl $256, %edx # imm = 0x100 movq %r13, %rdi movl $2, %ecx callq hipMemcpy leaq 8(%rsp), %rax movq (%rax), %rsi movl $256, %edx # imm = 0x100 movq %rbp, %rdi movl $2, %ecx callq hipMemcpy xorl %r15d, %r15d .LBB2_1: # =>This Inner Loop Header: Depth=1 movl $128, %edi callq _Znam movq %rax, (%rbx,%r15) movl $128, %edi callq _Znam movq %rax, (%r14,%r15) movl $128, %edi callq _Znam movq (%rsp), %rcx # 8-byte Reload movq %rax, (%rcx,%r15) leaq (%r12,%r15), %rdi movl $128, %esi callq hipMalloc movl %eax, %edi callq _Z13print_err_msg10hipError_t leaq (%r15,%r13), %rdi movl $128, %esi callq hipMalloc movl %eax, %edi callq _Z13print_err_msg10hipError_t leaq (%r15,%rbp), %rdi movl $128, %esi callq hipMalloc movl %eax, %edi callq _Z13print_err_msg10hipError_t addq $8, %r15 cmpq $256, %r15 # imm = 0x100 jne .LBB2_1 # %bb.2: # %.preheader94.preheader xorl %eax, %eax .LBB2_3: # %.preheader94 # =>This Loop Header: Depth=1 # Child Loop BB2_4 Depth 2 movq (%rbx,%rax,8), %rcx movq (%r14,%rax,8), %rdx xorl %esi, %esi .LBB2_4: # Parent Loop BB2_3 Depth=1 # => This Inner Loop Header: Depth=2 movl $1065353216, (%rcx,%rsi,4) # imm = 0x3F800000 movl $1073741824, (%rdx,%rsi,4) # imm = 0x40000000 incq %rsi cmpq $32, %rsi jne .LBB2_4 # %bb.5: # in Loop: Header=BB2_3 Depth=1 incq %rax cmpq $32, %rax jne .LBB2_3 # %bb.6: # %.preheader93.preheader xorl %r15d, %r15d .LBB2_7: # %.preheader93 # =>This Inner Loop Header: Depth=1 movq (%r12,%r15,8), %rdi movq (%rbx,%r15,8), %rsi movl $128, %edx movl $1, %ecx callq hipMemcpy movq (%r13,%r15,8), %rdi movq (%r14,%r15,8), %rsi movl $128, %edx movl $1, %ecx callq hipMemcpy incq %r15 cmpq $32, %r15 jne .LBB2_7 # %bb.8: movq %r12, 32(%rsp) # 8-byte Spill movabsq $4294967297, %rdi # imm = 0x100000001 movabsq $137438953504, %rdx # imm = 0x2000000020 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_10 # %bb.9: movq 24(%rsp), %rdi movq 16(%rsp), %rsi movq 8(%rsp), %rdx movl $32, %ecx callq _Z25__device_stub__matrix_addPPfS0_S0_m .LBB2_10: # %.preheader107 xorl %r15d, %r15d movq (%rsp), %r12 # 8-byte Reload .LBB2_11: # =>This Inner Loop Header: Depth=1 movq (%r12,%r15,8), %rdi movq (%rbp,%r15,8), %rsi movl $128, %edx movl $2, %ecx callq hipMemcpy incq %r15 cmpq $32, %r15 jne .LBB2_11 # %bb.12: # %.preheader.preheader xorl %r15d, %r15d movq 32(%rsp), %r12 # 8-byte Reload .LBB2_13: # %.preheader # =>This Inner Loop Header: Depth=1 movq (%rbx,%r15), %rdi testq %rdi, %rdi je .LBB2_15 # %bb.14: # in Loop: Header=BB2_13 Depth=1 callq _ZdaPv .LBB2_15: # in Loop: Header=BB2_13 Depth=1 movq (%r14,%r15), %rdi testq %rdi, %rdi je .LBB2_17 # %bb.16: # in Loop: Header=BB2_13 Depth=1 callq _ZdaPv .LBB2_17: # in Loop: Header=BB2_13 Depth=1 movq (%rsp), %rax # 8-byte Reload movq (%rax,%r15), %rdi testq %rdi, %rdi je .LBB2_19 # %bb.18: # in Loop: Header=BB2_13 Depth=1 callq _ZdaPv .LBB2_19: # in Loop: Header=BB2_13 Depth=1 movq (%r12,%r15), %rdi callq hipFree movl %eax, %edi callq _Z13print_err_msg10hipError_t movq (%r13,%r15), %rdi callq hipFree movl %eax, %edi callq _Z13print_err_msg10hipError_t movq (%rbp,%r15), %rdi callq hipFree movl %eax, %edi callq _Z13print_err_msg10hipError_t addq $8, %r15 cmpq $256, %r15 # imm = 0x100 jne .LBB2_13 # %bb.20: movq %rbx, %rdi callq _ZdaPv movq %r14, %rdi callq _ZdaPv movq (%rsp), %rdi # 8-byte Reload callq _ZdaPv movq 24(%rsp), %rdi callq hipFree movl %eax, %edi callq _Z13print_err_msg10hipError_t movq 16(%rsp), %rdi callq hipFree movl %eax, %edi callq _Z13print_err_msg10hipError_t movq 8(%rsp), %rdi callq hipFree movl %eax, %edi callq _Z13print_err_msg10hipError_t xorl %eax, %eax addq $40, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10matrix_addPPfS0_S0_m, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z10matrix_addPPfS0_S0_m,@object # @_Z10matrix_addPPfS0_S0_m .section .rodata,"a",@progbits .globl _Z10matrix_addPPfS0_S0_m .p2align 3, 0x0 _Z10matrix_addPPfS0_S0_m: .quad _Z25__device_stub__matrix_addPPfS0_S0_m .size _Z10matrix_addPPfS0_S0_m, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%s in %s at line %d\n" .size .L.str, 21 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/palPrabhakar/tutorials/master/cuda/kirk_hwu/ch3/matrix_add.hip" .size .L.str.1, 125 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z10matrix_addPPfS0_S0_m" .size .L__unnamed_1, 25 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__matrix_addPPfS0_S0_m .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z10matrix_addPPfS0_S0_m .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10matrix_addPPfS0_S0_m ; -- Begin function _Z10matrix_addPPfS0_S0_m .globl _Z10matrix_addPPfS0_S0_m .p2align 8 .type _Z10matrix_addPPfS0_S0_m,@function _Z10matrix_addPPfS0_S0_m: ; @_Z10matrix_addPPfS0_S0_m ; %bb.0: s_clause 0x1 s_load_b32 s6, s[0:1], 0x2c s_load_b64 s[4:5], s[0:1], 0x0 v_and_b32_e32 v1, 0x3ff, v0 s_load_b64 s[2:3], s[0:1], 0x70 v_bfe_u32 v0, v0, 10, 10 v_mbcnt_lo_u32_b32 v32, -1, 0 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 s_waitcnt lgkmcnt(0) s_and_b32 s0, s6, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mad_u64_u32 v[33:34], null, s14, s0, v[1:2] v_mov_b32_e32 v34, 0 s_lshr_b32 s0, s6, 16 v_lshlrev_b64 v[1:2], 3, v[33:34] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, s4, v1 v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo global_load_b64 v[4:5], v[1:2], off v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1] v_mov_b32_e32 v3, v34 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v4, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo global_load_b32 v35, v[0:1], off v_mov_b32_e32 v0, v32 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_6 ; %bb.1: global_load_b64 v[6:7], v34, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v34, s[2:3] offset:40 global_load_b64 v[8:9], v34, s[2:3] s_mov_b32 s4, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v1, v5, v7 v_and_b32_e32 v4, v4, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v5, v4, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v5, v1 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v1, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v34, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_5 ; %bb.2: ; %.preheader3.i.i.i.preheader s_mov_b32 s5, 0 .LBB0_3: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v34, s[2:3] offset:40 global_load_b64 v[10:11], v34, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v1, v4, v6 s_waitcnt vmcnt(0) v_mad_u64_u32 v[8:9], null, v1, 24, v[10:11] v_and_b32_e32 v10, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mov_b32_e32 v1, v9 v_mad_u64_u32 v[4:5], null, v10, 24, v[1:2] s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v9, v4 global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v34, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_3 ; %bb.4: ; %Flow423 s_or_b32 exec_lo, exec_lo, s5 .LBB0_5: ; %Flow425 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_6: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[10:11], v34, s[2:3] offset:40 global_load_b128 v[4:7], v34, s[2:3] v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_8 ; %bb.7: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, 0 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_8: s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v1, v34 s_lshl_b64 s[6:7], s[6:7], 12 s_mov_b32 s12, 0 s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v6, s6 v_lshlrev_b64 v[0:1], 6, v[0:1] v_add_co_ci_u32_e32 v8, vcc_lo, s7, v7, vcc_lo s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v10, s12 v_add_co_u32 v0, vcc_lo, v6, v0 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v6, 33 s_delay_alu instid0(VALU_DEP_4) v_dual_mov_b32 v8, v7 :: v_dual_mov_b32 v11, s13 v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v12, s14 v_mov_b32_e32 v13, s15 s_clause 0x3 global_store_b128 v[0:1], v[6:9], off global_store_b128 v[0:1], v[10:13], off offset:16 global_store_b128 v[0:1], v[10:13], off offset:32 global_store_b128 v[0:1], v[10:13], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_16 ; %bb.9: s_clause 0x1 global_load_b64 v[16:17], v7, s[2:3] offset:32 glc global_load_b64 v[8:9], v7, s[2:3] offset:40 v_mov_b32_e32 v14, s4 s_mov_b32 s7, exec_lo s_waitcnt vmcnt(0) v_dual_mov_b32 v15, s5 :: v_dual_and_b32 v6, s5, v9 v_and_b32_e32 v8, s4, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v6, v6, 24 v_mul_hi_u32 v9, v8, 24 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v6, v9, v6 v_add_co_u32 v12, vcc_lo, v4, v8 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v13, vcc_lo, v5, v6, vcc_lo global_store_b64 v[12:13], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v7, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[10:11], v[16:17] s_cbranch_execz .LBB0_12 ; %bb.10: ; %.preheader1.i.i.i.preheader s_mov_b32 s10, 0 .LBB0_11: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5 s_sleep 1 global_store_b64 v[12:13], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v7, v[8:11], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11] v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_11 .LBB0_12: ; %Flow421 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v9, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v8, s10, 0 global_load_b64 v[6:7], v9, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v8 s_cbranch_execz .LBB0_14 ; %bb.13: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v8, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[6:7], v[8:9], off offset:8 .LBB0_14: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[8:9], v[6:7], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] s_cbranch_vccnz .LBB0_16 ; %bb.15: global_load_b32 v6, v[6:7], off offset:24 v_mov_b32_e32 v7, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v6 s_waitcnt_vscnt null, 0x0 global_store_b64 v[8:9], v[6:7], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_16: ; %Flow422 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v4, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v5, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v4, 20 v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo .LBB0_17: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_19 ; %bb.18: ; in Loop: Header=BB0_17 Depth=1 global_load_b32 v6, v[4:5], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB0_19: ; in Loop: Header=BB0_17 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v6 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_21 ; %bb.20: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_22 .LBB0_21: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, -1 .LBB0_22: ; %Flow416 ; in Loop: Header=BB0_17 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_17 ; %bb.23: global_load_b64 v[4:5], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_27 ; %bb.24: v_mov_b32_e32 v10, 0 s_clause 0x2 global_load_b64 v[0:1], v10, s[2:3] offset:40 global_load_b64 v[11:12], v10, s[2:3] offset:24 glc global_load_b64 v[8:9], v10, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v13, s4 v_add_co_ci_u32_e32 v7, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] v_dual_cndmask_b32 v7, v7, v14 :: v_dual_cndmask_b32 v6, v6, v13 v_and_b32_e32 v1, v7, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v6, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v13, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v8, v0 v_mov_b32_e32 v8, v11 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v9, v12 global_store_b64 v[0:1], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v10, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_27 ; %bb.25: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_26: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v10, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9] v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_26 .LBB0_27: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[4:5] s_add_u32 s4, s4, .str@rel32@lo+4 s_addc_u32 s5, s5, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[4:5], 0 s_cbranch_scc0 .LBB0_113 ; %bb.28: s_waitcnt vmcnt(0) v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v36, 2, v4 v_dual_mov_b32 v7, v5 :: v_dual_and_b32 v6, -3, v4 v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 s_mov_b64 s[6:7], 29 .LBB0_29: ; =>This Loop Header: Depth=1 ; Child Loop BB0_32 Depth 2 ; Child Loop BB0_39 Depth 2 ; Child Loop BB0_47 Depth 2 ; Child Loop BB0_55 Depth 2 ; Child Loop BB0_63 Depth 2 ; Child Loop BB0_71 Depth 2 ; Child Loop BB0_79 Depth 2 ; Child Loop BB0_87 Depth 2 ; Child Loop BB0_95 Depth 2 ; Child Loop BB0_101 Depth 2 ; Child Loop BB0_110 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[6:7], 56 ; implicit-def: $vgpr14_vgpr15 ; implicit-def: $sgpr15 s_and_b32 s0, s0, exec_lo s_cselect_b32 s8, s6, 56 s_cselect_b32 s9, s7, 0 s_cmp_gt_u32 s8, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_34 ; %bb.30: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v14, 0 v_mov_b32_e32 v15, 0 s_cmp_eq_u32 s8, 0 s_cbranch_scc1 .LBB0_33 ; %bb.31: ; %.preheader31.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_lshl_b64 s[0:1], s[8:9], 3 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[4:5] .LBB0_32: ; %.preheader31.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v0, v1, s[12:13] s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[8:9], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s0, s10 v_or_b32_e32 v14, v8, v14 v_or_b32_e32 v15, v9, v15 s_cbranch_scc1 .LBB0_32 .LBB0_33: ; %Flow392 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s15, 0 .LBB0_34: ; %Flow394 ; in Loop: Header=BB0_29 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[4:5] s_cbranch_vccnz .LBB0_36 ; %bb.35: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[14:15], v1, s[4:5] s_add_i32 s15, s8, -8 s_add_u32 s0, s4, 8 s_addc_u32 s1, s5, 0 .LBB0_36: ; %.loopexit32.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_41 ; %bb.37: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_40 ; %bb.38: ; %.preheader29.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_39: ; %.preheader29.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v16, v8, v16 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v17, v9, v17 s_cbranch_scc1 .LBB0_39 .LBB0_40: ; %Flow387 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_42 .LBB0_41: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr14 .LBB0_42: ; %Flow389 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_44 ; %bb.43: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[16:17], v1, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_44: ; %.loopexit30.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_49 ; %bb.45: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_48 ; %bb.46: ; %.preheader27.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_47: ; %.preheader27.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v18, v8, v18 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v19, v9, v19 s_cbranch_scc1 .LBB0_47 .LBB0_48: ; %Flow382 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_50 .LBB0_49: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_50: ; %Flow384 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_52 ; %bb.51: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[18:19], v1, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_52: ; %.loopexit28.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_57 ; %bb.53: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_56 ; %bb.54: ; %.preheader25.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_55: ; %.preheader25.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v20, v8, v20 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v21, v9, v21 s_cbranch_scc1 .LBB0_55 .LBB0_56: ; %Flow377 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_58 .LBB0_57: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr20_vgpr21 ; implicit-def: $sgpr14 .LBB0_58: ; %Flow379 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_60 ; %bb.59: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[20:21], v1, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_60: ; %.loopexit26.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_65 ; %bb.61: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_64 ; %bb.62: ; %.preheader23.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_63: ; %.preheader23.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v22, v8, v22 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v23, v9, v23 s_cbranch_scc1 .LBB0_63 .LBB0_64: ; %Flow372 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_66 .LBB0_65: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_66: ; %Flow374 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_68 ; %bb.67: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[22:23], v1, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_68: ; %.loopexit24.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_73 ; %bb.69: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v24, 0 v_mov_b32_e32 v25, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_72 ; %bb.70: ; %.preheader21.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_71: ; %.preheader21.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v24, v8, v24 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v25, v9, v25 s_cbranch_scc1 .LBB0_71 .LBB0_72: ; %Flow367 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_74 .LBB0_73: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr24_vgpr25 ; implicit-def: $sgpr14 .LBB0_74: ; %Flow369 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_76 ; %bb.75: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[24:25], v1, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_76: ; %.loopexit22.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_81 ; %bb.77: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v26, 0 v_mov_b32_e32 v27, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_80 ; %bb.78: ; %.preheader.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[0:1] .LBB0_79: ; %.preheader.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v0, v1, s[12:13] s_add_i32 s14, s14, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[8:9], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 0 v_or_b32_e32 v26, v8, v26 v_or_b32_e32 v27, v9, v27 s_cbranch_scc1 .LBB0_79 .LBB0_80: ; %Flow362 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_branch .LBB0_82 .LBB0_81: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 .LBB0_82: ; %Flow364 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_84 ; %bb.83: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[26:27], v1, s[0:1] .LBB0_84: ; %.loopexit.i ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v0, v32 s_waitcnt vmcnt(0) v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_90 ; %bb.85: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[30:31], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b64 v[12:13], v1, s[2:3] s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v9, v9, v31 v_and_b32_e32 v8, v8, v30 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v9, v9, 24 v_mul_hi_u32 v28, v8, 24 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v9, v28, v9 s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v12, v8 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v13, v9, vcc_lo global_load_b64 v[28:29], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v1, v[28:31], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[30:31] s_cbranch_execz .LBB0_89 ; %bb.86: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s11, 0 .LBB0_87: ; %.preheader3.i.i19.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[12:13], v1, s[2:3] offset:40 global_load_b64 v[28:29], v1, s[2:3] v_dual_mov_b32 v31, v9 :: v_dual_mov_b32 v30, v8 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v12, v12, v30 s_waitcnt vmcnt(0) v_mad_u64_u32 v[8:9], null, v12, 24, v[28:29] v_and_b32_e32 v28, v13, v31 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[12:13], null, v28, 24, v[9:10] v_mov_b32_e32 v9, v12 global_load_b64 v[28:29], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v1, v[28:31], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[30:31] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_87 ; %bb.88: ; %Flow357 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_89: ; %Flow359 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 .LBB0_90: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[12:13], v1, s[2:3] offset:40 global_load_b128 v[28:31], v1, s[2:3] v_readfirstlane_b32 s10, v8 v_readfirstlane_b32 s11, v9 s_mov_b32 s16, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s12, v12 v_readfirstlane_b32 s13, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[10:11], s[12:13] s_mul_i32 s1, s13, 24 s_mul_hi_u32 s14, s12, 24 s_mul_i32 s15, s12, 24 s_and_saveexec_b32 s17, s0 s_cbranch_execz .LBB0_92 ; %bb.91: ; in Loop: Header=BB0_29 Depth=1 v_dual_mov_b32 v8, s16 :: v_dual_mov_b32 v9, v1 s_add_i32 s16, s14, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v28, s15 v_add_co_ci_u32_e32 v13, vcc_lo, s16, v29, vcc_lo global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_92: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s17 v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56 v_or_b32_e32 v8, 0, v7 v_or_b32_e32 v9, v6, v36 s_lshl_b64 s[12:13], s[12:13], 12 s_lshl_b32 s16, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s16, s16, 28 v_dual_cndmask_b32 v13, v8, v7 :: v_dual_cndmask_b32 v8, v9, v6 v_lshlrev_b64 v[6:7], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v30, s12 v_add_co_ci_u32_e32 v9, vcc_lo, s13, v31, vcc_lo s_and_b32 s16, s16, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v30, vcc_lo, v0, v6 v_and_or_b32 v12, 0xffffff1f, v8, s16 v_add_co_ci_u32_e32 v31, vcc_lo, v9, v7, vcc_lo s_clause 0x3 global_store_b128 v[30:31], v[12:15], off global_store_b128 v[30:31], v[16:19], off offset:16 global_store_b128 v[30:31], v[20:23], off offset:32 global_store_b128 v[30:31], v[24:27], off offset:48 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_100 ; %bb.93: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x1 global_load_b64 v[16:17], v1, s[2:3] offset:32 glc global_load_b64 v[6:7], v1, s[2:3] offset:40 v_dual_mov_b32 v14, s10 :: v_dual_mov_b32 v15, s11 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v6 v_readfirstlane_b32 s17, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[10:11] s_mul_i32 s13, s17, 24 s_mul_hi_u32 s17, s16, 24 s_mul_i32 s16, s16, 24 s_add_i32 s17, s17, s13 v_add_co_u32 v12, vcc_lo, v28, s16 v_add_co_ci_u32_e32 v13, vcc_lo, s17, v29, vcc_lo s_mov_b32 s13, exec_lo global_store_b64 v[12:13], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v1, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[8:9], v[16:17] s_cbranch_execz .LBB0_96 ; %bb.94: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s16, 0 .LBB0_95: ; %.preheader1.i.i17.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, s11 s_sleep 1 global_store_b64 v[12:13], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v1, v[6:9], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_or_b32 s16, vcc_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s16 s_cbranch_execnz .LBB0_95 .LBB0_96: ; %Flow355 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s13 global_load_b64 v[6:7], v1, s[2:3] offset:16 s_mov_b32 s16, exec_lo s_mov_b32 s13, exec_lo v_mbcnt_lo_u32_b32 v0, s16, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB0_98 ; %bb.97: ; in Loop: Header=BB0_29 Depth=1 s_bcnt1_i32_b32 s16, s16 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v0, s16 s_waitcnt vmcnt(0) global_atomic_add_u64 v[6:7], v[0:1], off offset:8 .LBB0_98: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_waitcnt vmcnt(0) global_load_b64 v[8:9], v[6:7], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] s_cbranch_vccnz .LBB0_100 ; %bb.99: ; in Loop: Header=BB0_29 Depth=1 global_load_b32 v0, v[6:7], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s13, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[8:9], v[0:1], off s_and_b32 m0, s13, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_100: ; %Flow356 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_add_i32 s14, s14, s1 v_add_co_u32 v0, vcc_lo, v28, s15 v_add_co_ci_u32_e32 v7, vcc_lo, s14, v29, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo .LBB0_101: ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v0, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_101 Depth=2 global_load_b32 v0, v[6:7], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v0, 1, v0 .LBB0_103: ; in Loop: Header=BB0_101 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v0 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_105 ; %bb.104: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_106 .LBB0_105: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, -1 .LBB0_106: ; %Flow350 ; in Loop: Header=BB0_101 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_101 ; %bb.107: ; in Loop: Header=BB0_29 Depth=1 global_load_b128 v[6:9], v[30:31], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_111 ; %bb.108: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x2 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b64 v[16:17], v1, s[2:3] offset:24 glc global_load_b64 v[14:15], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v0, vcc_lo, v8, 1 v_add_co_ci_u32_e32 v18, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v12, vcc_lo, v0, s10 v_add_co_ci_u32_e32 v13, vcc_lo, s11, v18, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[12:13] v_dual_cndmask_b32 v13, v13, v18 :: v_dual_cndmask_b32 v12, v12, v0 v_and_b32_e32 v0, v13, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v8, v12, v8 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v8, 24 v_mul_lo_u32 v8, v8, 24 v_add_nc_u32_e32 v0, v9, v0 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, v14, v8 v_mov_b32_e32 v14, v16 v_add_co_ci_u32_e32 v9, vcc_lo, v15, v0, vcc_lo v_mov_b32_e32 v15, v17 global_store_b64 v[8:9], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[14:15], v1, v[12:15], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[14:15], v[16:17] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_111 ; %bb.109: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 .LBB0_110: ; %.preheader.i.i16.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[8:9], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[16:17], v1, v[12:15], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[16:17], v[14:15] v_dual_mov_b32 v14, v16 :: v_dual_mov_b32 v15, v17 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_110 .LBB0_111: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s6, s6, s8 s_subb_u32 s7, s7, s9 s_add_u32 s4, s4, s8 s_addc_u32 s5, s5, s9 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc1 .LBB0_29 ; %bb.112: ; %Flow395 s_mov_b32 s0, 0 s_branch .LBB0_114 .LBB0_113: s_mov_b32 s0, -1 ; implicit-def: $vgpr6_vgpr7 .LBB0_114: ; %Flow410 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_143 ; %bb.115: s_waitcnt vmcnt(0) v_mov_b32_e32 v6, v32 v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v6 v_cmp_eq_u32_e64 s0, s0, v6 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_121 ; %bb.116: v_mov_b32_e32 v7, 0 s_mov_b32 s4, exec_lo global_load_b64 v[10:11], v7, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v7, s[2:3] offset:40 global_load_b64 v[8:9], v7, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v0, v0, v10 v_and_b32_e32 v1, v1, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v1, v1, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v8, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo global_load_b64 v[8:9], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v7, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[10:11] s_cbranch_execz .LBB0_120 ; %bb.117: ; %.preheader3.i.i.i13.preheader s_mov_b32 s5, 0 .LBB0_118: ; %.preheader3.i.i.i13 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v7, s[2:3] offset:40 global_load_b64 v[12:13], v7, s[2:3] v_dual_mov_b32 v11, v1 :: v_dual_mov_b32 v10, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v10 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v8, 24, v[12:13] v_and_b32_e32 v12, v9, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v12, 24, v[1:2] v_mov_b32_e32 v1, v8 global_load_b64 v[8:9], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v7, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[10:11] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_118 ; %bb.119: ; %Flow407 s_or_b32 exec_lo, exec_lo, s5 .LBB0_120: ; %Flow409 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_121: ; %.loopexit4.i.i.i8 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v7, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[12:13], v7, s[2:3] offset:40 global_load_b128 v[8:11], v7, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v12 v_readfirstlane_b32 s7, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_123 ; %bb.122: v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v13, v7 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v8, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v9, vcc_lo v_dual_mov_b32 v14, 2 :: v_dual_mov_b32 v15, 1 global_store_b128 v[0:1], v[12:15], off offset:8 .LBB0_123: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[6:7] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v10, s6 v_add_co_ci_u32_e32 v10, vcc_lo, s7, v11, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v6, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v4, 0xffffff1f, v4, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v10, v1, vcc_lo v_mov_b32_e32 v6, v7 v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15 v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14 s_clause 0x3 global_store_b128 v[0:1], v[4:7], off global_store_b128 v[0:1], v[10:13], off offset:16 global_store_b128 v[0:1], v[10:13], off offset:32 global_store_b128 v[0:1], v[10:13], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_131 ; %bb.124: v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, s4 v_mov_b32_e32 v14, s5 s_clause 0x1 global_load_b64 v[15:16], v12, s[2:3] offset:32 glc global_load_b64 v[4:5], v12, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v4 v_readfirstlane_b32 s11, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v10, vcc_lo, v8, s10 v_add_co_ci_u32_e32 v11, vcc_lo, s11, v9, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[10:11], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v12, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[6:7], v[15:16] s_cbranch_execz .LBB0_127 ; %bb.125: ; %.preheader1.i.i.i11.preheader s_mov_b32 s10, 0 .LBB0_126: ; %.preheader1.i.i.i11 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5 s_sleep 1 global_store_b64 v[10:11], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v12, v[4:7], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7] v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_126 .LBB0_127: ; %Flow405 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v7, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v6, s10, 0 global_load_b64 v[4:5], v7, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB0_129 ; %bb.128: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v6, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[4:5], v[6:7], off offset:8 .LBB0_129: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[6:7], v[4:5], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] s_cbranch_vccnz .LBB0_131 ; %bb.130: global_load_b32 v4, v[4:5], off offset:24 v_mov_b32_e32 v5, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[6:7], v[4:5], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_131: ; %Flow406 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v4, vcc_lo, v8, s9 v_add_co_ci_u32_e32 v5, vcc_lo, s8, v9, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v4, 20 v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo .LBB0_132: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_134 ; %bb.133: ; in Loop: Header=BB0_132 Depth=1 global_load_b32 v6, v[4:5], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB0_134: ; in Loop: Header=BB0_132 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v6 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_136 ; %bb.135: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_137 .LBB0_136: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, -1 .LBB0_137: ; %Flow400 ; in Loop: Header=BB0_132 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_132 ; %bb.138: global_load_b128 v[6:9], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_142 ; %bb.139: v_mov_b32_e32 v4, 0 s_clause 0x2 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[12:13], v4, s[2:3] offset:24 glc global_load_b64 v[10:11], v4, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v5, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v5, s4 v_add_co_ci_u32_e32 v9, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v9, v9, v14 :: v_dual_cndmask_b32 v8, v8, v5 v_and_b32_e32 v1, v9, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v0, v8, v0 v_mul_hi_u32 v5, v0, 24 v_mul_lo_u32 v0, v0, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v0, vcc_lo, v10, v0 v_mov_b32_e32 v10, v12 v_mul_lo_u32 v1, v1, 24 v_add_nc_u32_e32 v1, v5, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[0:1], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v4, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_142 ; %bb.140: ; %.preheader.i.i.i10.preheader s_mov_b32 s0, 0 .LBB0_141: ; %.preheader.i.i.i10 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v4, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_141 .LBB0_142: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_143: ; %__ockl_printf_append_string_n.exit v_mov_b32_e32 v0, v32 s_waitcnt vmcnt(0) v_mov_b32_e32 v4, 0 v_mov_b32_e32 v5, 0 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_149 ; %bb.144: v_mov_b32_e32 v1, 0 s_mov_b32 s4, exec_lo global_load_b64 v[10:11], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v1, s[2:3] offset:40 global_load_b64 v[8:9], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v10 v_and_b32_e32 v5, v5, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v12, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[8:9], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[4:5], v[10:11] s_cbranch_execz .LBB0_148 ; %bb.145: ; %.preheader3.i.i.i20.preheader s_mov_b32 s5, 0 .LBB0_146: ; %.preheader3.i.i.i20 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b64 v[12:13], v1, s[2:3] v_dual_mov_b32 v11, v5 :: v_dual_mov_b32 v10, v4 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v10 s_waitcnt vmcnt(0) v_mad_u64_u32 v[4:5], null, v8, 24, v[12:13] v_and_b32_e32 v12, v9, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v12, 24, v[5:6] v_mov_b32_e32 v5, v8 global_load_b64 v[8:9], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[10:11] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_146 ; %bb.147: ; %Flow343 s_or_b32 exec_lo, exec_lo, s5 .LBB0_148: ; %Flow345 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_149: ; %.loopexit4.i.i.i14 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v1, 0 v_readfirstlane_b32 s4, v4 v_readfirstlane_b32 s5, v5 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b128 v[10:13], v1, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_151 ; %bb.150: v_dual_mov_b32 v14, s10 :: v_dual_mov_b32 v15, v1 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v5, vcc_lo, s10, v11, vcc_lo v_dual_mov_b32 v16, 2 :: v_dual_mov_b32 v17, 1 global_store_b128 v[4:5], v[14:17], off offset:8 .LBB0_151: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v12, s6 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v13, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v4, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v6, 0xffffff1f, v6, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo v_dual_mov_b32 v8, v33 :: v_dual_mov_b32 v9, v34 v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13 v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15 s_clause 0x3 global_store_b128 v[0:1], v[6:9], off global_store_b128 v[0:1], v[12:15], off offset:16 global_store_b128 v[0:1], v[12:15], off offset:32 global_store_b128 v[0:1], v[12:15], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_159 ; %bb.152: v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, s4 v_mov_b32_e32 v14, s5 s_clause 0x1 global_load_b64 v[15:16], v12, s[2:3] offset:32 glc global_load_b64 v[4:5], v12, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v4 v_readfirstlane_b32 s11, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v8, vcc_lo, v10, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v11, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[8:9], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v12, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[6:7], v[15:16] s_cbranch_execz .LBB0_155 ; %bb.153: ; %.preheader1.i.i.i18.preheader s_mov_b32 s10, 0 .LBB0_154: ; %.preheader1.i.i.i18 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5 s_sleep 1 global_store_b64 v[8:9], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v12, v[4:7], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7] v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_154 .LBB0_155: ; %Flow341 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v7, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v6, s10, 0 global_load_b64 v[4:5], v7, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB0_157 ; %bb.156: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v6, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[4:5], v[6:7], off offset:8 .LBB0_157: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[6:7], v[4:5], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] s_cbranch_vccnz .LBB0_159 ; %bb.158: global_load_b32 v4, v[4:5], off offset:24 v_mov_b32_e32 v5, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[6:7], v[4:5], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_159: ; %Flow342 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v4, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v5, vcc_lo, s8, v11, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v4, 20 v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo .LBB0_160: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_162 ; %bb.161: ; in Loop: Header=BB0_160 Depth=1 global_load_b32 v6, v[4:5], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB0_162: ; in Loop: Header=BB0_160 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v6 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_164 ; %bb.163: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_165 .LBB0_164: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, -1 .LBB0_165: ; %Flow336 ; in Loop: Header=BB0_160 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_160 ; %bb.166: global_load_b64 v[0:1], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_170 ; %bb.167: v_mov_b32_e32 v10, 0 s_clause 0x2 global_load_b64 v[6:7], v10, s[2:3] offset:40 global_load_b64 v[11:12], v10, s[2:3] offset:24 glc global_load_b64 v[8:9], v10, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v6, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v13, s4 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] v_dual_cndmask_b32 v5, v5, v14 :: v_dual_cndmask_b32 v4, v4, v13 v_and_b32_e32 v7, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v6, v4, v6 v_mul_lo_u32 v7, v7, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v6, 24 v_mul_lo_u32 v6, v6, 24 v_add_nc_u32_e32 v7, v13, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, v8, v6 v_mov_b32_e32 v6, v11 v_add_co_ci_u32_e32 v9, vcc_lo, v9, v7, vcc_lo v_mov_b32_e32 v7, v12 global_store_b64 v[8:9], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v10, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_170 ; %bb.168: ; %.preheader.i.i.i17.preheader s_mov_b32 s0, 0 .LBB0_169: ; %.preheader.i.i.i17 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[8:9], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v10, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[6:7] v_dual_mov_b32 v6, v11 :: v_dual_mov_b32 v7, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_169 .LBB0_170: ; %__ockl_printf_append_args.exit s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v8, v32 v_mov_b32_e32 v10, 0 v_mov_b32_e32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v8 v_cmp_eq_u32_e64 s0, s0, v8 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_176 ; %bb.171: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[12:13], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v5, v5, v12 v_and_b32_e32 v6, v6, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v7, v5, 24 v_mul_lo_u32 v6, v6, 24 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v6, v7, v6 s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, v5 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v6, vcc_lo, v10, v6, vcc_lo global_load_b64 v[10:11], v[5:6], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[10:11], v4, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[10:11], v[12:13] s_cbranch_execz .LBB0_175 ; %bb.172: ; %.preheader3.i.i.i27.preheader s_mov_b32 s5, 0 .LBB0_173: ; %.preheader3.i.i.i27 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[14:15], v4, s[2:3] v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v5, v12 v_and_b32_e32 v11, v6, v13 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[14:15] v_mov_b32_e32 v5, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v11, 24, v[5:6] v_mov_b32_e32 v10, v6 global_load_b64 v[10:11], v[9:10], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[10:11], v4, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[12:13] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_173 ; %bb.174: ; %Flow329 s_or_b32 exec_lo, exec_lo, s5 .LBB0_175: ; %Flow331 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_176: ; %.loopexit4.i.i.i21 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v9, 0 v_readfirstlane_b32 s4, v10 v_readfirstlane_b32 s5, v11 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[12:13], v9, s[2:3] offset:40 global_load_b128 v[4:7], v9, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v12 v_readfirstlane_b32 s7, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_178 ; %bb.177: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, v9 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v14, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v15, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 global_store_b128 v[14:15], v[10:13], off offset:8 .LBB0_178: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 s_mov_b32 s12, 0 s_waitcnt vmcnt(0) v_add_co_u32 v10, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v11, vcc_lo, s7, v7, vcc_lo v_lshlrev_b64 v[6:7], 6, v[8:9] s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1f, v0, 32 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v10, v6 v_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13 v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_186 ; %bb.179: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s4 v_mov_b32_e32 v12, s5 s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v8, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_182 ; %bb.180: ; %.preheader1.i.i.i25.preheader s_mov_b32 s10, 0 .LBB0_181: ; %.preheader1.i.i.i25 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_181 .LBB0_182: ; %Flow327 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_184 ; %bb.183: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_184: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_186 ; %bb.185: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_186: ; %Flow328 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_187: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_189 ; %bb.188: ; in Loop: Header=BB0_187 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_189: ; in Loop: Header=BB0_187 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_191 ; %bb.190: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_192 .LBB0_191: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, -1 .LBB0_192: ; %Flow322 ; in Loop: Header=BB0_187 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_187 ; %bb.193: global_load_b64 v[0:1], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_197 ; %bb.194: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_197 ; %bb.195: ; %.preheader.i.i.i24.preheader s_mov_b32 s0, 0 .LBB0_196: ; %.preheader.i.i.i24 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_196 .LBB0_197: ; %__ockl_printf_append_args.exit28 s_or_b32 exec_lo, exec_lo, s1 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v32 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v32 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_203 ; %bb.198: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[7:8], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v4, s[2:3] offset:40 global_load_b64 v[5:6], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v3, v3, v8 v_and_b32_e32 v2, v2, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v5, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v6, v3, vcc_lo global_load_b64 v[5:6], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[2:3], v[7:8] s_cbranch_execz .LBB0_202 ; %bb.199: ; %.preheader3.i.i.i35.preheader s_mov_b32 s5, 0 .LBB0_200: ; %.preheader3.i.i.i35 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) v_mad_u64_u32 v[2:3], null, v5, 24, v[9:10] v_and_b32_e32 v9, v6, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v9, 24, v[3:4] v_mov_b32_e32 v3, v5 global_load_b64 v[5:6], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[7:8] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_200 ; %bb.201: ; %Flow315 s_or_b32 exec_lo, exec_lo, s5 .LBB0_202: ; %Flow317 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_203: ; %.loopexit4.i.i.i29 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v33, 0 v_readfirstlane_b32 s4, v2 v_readfirstlane_b32 s5, v3 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[8:9], v33, s[2:3] offset:40 global_load_b128 v[4:7], v33, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_205 ; %bb.204: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v33 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[2:3], v[8:11], off offset:8 .LBB0_205: s_or_b32 exec_lo, exec_lo, s11 v_cvt_f64_f32_e32 v[2:3], v35 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[32:33] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v6, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1d, v0, 34 v_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v7, s13 v_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v9, s15 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_213 ; %bb.206: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v6, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_209 ; %bb.207: ; %.preheader1.i.i.i33.preheader s_mov_b32 s10, 0 .LBB0_208: ; %.preheader1.i.i.i33 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_208 .LBB0_209: ; %Flow313 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_211 ; %bb.210: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_211: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_213 ; %bb.212: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_213: ; %Flow314 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_214: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_216 ; %bb.215: ; in Loop: Header=BB0_214 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_216: ; in Loop: Header=BB0_214 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_218 ; %bb.217: ; in Loop: Header=BB0_214 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_219 .LBB0_218: ; in Loop: Header=BB0_214 Depth=1 s_mov_b32 s1, -1 .LBB0_219: ; %Flow308 ; in Loop: Header=BB0_214 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_214 ; %bb.220: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_224 ; %bb.221: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_224 ; %bb.222: ; %.preheader.i.i.i32.preheader s_mov_b32 s0, 0 .LBB0_223: ; %.preheader.i.i.i32 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_223 .LBB0_224: ; %__ockl_printf_append_args.exit36 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10matrix_addPPfS0_S0_m .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 37 .amdhsa_next_free_sgpr 18 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10matrix_addPPfS0_S0_m, .Lfunc_end0-_Z10matrix_addPPfS0_S0_m ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 9512 ; NumSgprs: 20 ; NumVgprs: 37 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 20 ; NumVGPRsForWavesPerEU: 37 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "i: %d, j: %d, d_A[i][j]: %f\n" .size .str, 29 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 8 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims - .offset: 112 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10matrix_addPPfS0_S0_m .private_segment_fixed_size: 0 .sgpr_count: 20 .sgpr_spill_count: 0 .symbol: _Z10matrix_addPPfS0_S0_m.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 37 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
afe606a93ff42c8111d23f10e2fda47d86509c3c
#ifndef MATRIXMULTIPLICATIONKERNEL_CU #define MATRIXMULTIPLICATIONKERNEL_CU #include <curand.h> __global__ void matrixMul(float * g_C, float * g_A, float *g_B,int wa, int wb){ int x = blockIdx.x * blockDim.y + threadIdx.x; int y = blockIdx.y*blockDim.x + threadIdx.y; float result = 0; int i = 0; for(i = 0; i < wa; ++i){ float tempA = g_A[y*wa+i]; float tempB = g_B[i*wb+x]; result += tempA*tempB; } g_C[y*wa+x] = result; } __global__ void matrixMul2(float * g_C, float * g_A, float *g_B,int wa, int wb){ int TILE_SIZE = 16; int x = blockIdx.x*TILE_SIZE + threadIdx.x; int y = blockIdx.y*TILE_SIZE + threadIdx.y; float result = 0; int i = 0; for(i = 0; i < wa; ++i){ float tempA = g_A[y*wa+i]; float tempB = g_B[i*wb+x]; result += tempA*tempB; } g_C[y*wa+x] = result; } __global__ void matrixMul3(float * g_C, float * g_A, float *g_B,int wa, int wb){ const int TILE_WIDTH = 16; int tx = threadIdx.x; int ty = threadIdx.y; int bx = blockIdx.x; int by = blockIdx.y; __shared__ float s_a[TILE_WIDTH][TILE_WIDTH]; __shared__ float s_b[TILE_WIDTH][TILE_WIDTH]; int row = bx*blockDim.y + tx; int col = by*blockDim.x + ty; float result = 0; int i = 0; for(i = 0; i < wa/TILE_WIDTH; ++i){ s_a[tx][ty] = g_A[i*TILE_WIDTH + row*wa +ty]; s_b[tx][ty] = g_B[(i*TILE_WIDTH*wa)+tx*wa+ col]; __syncthreads(); int k =0; for(k=0;k<TILE_WIDTH;++k){ result += s_a[tx][k] * s_b[k][ty]; } __syncthreads(); } g_C[row*wa+col] = result; } #endif
.file "tmpxft_00326d39_00000000-6_matrixMultiplicationKernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z34__device_stub__Z9matrixMulPfS_S_iiPfS_S_ii .type _Z34__device_stub__Z9matrixMulPfS_S_iiPfS_S_ii, @function _Z34__device_stub__Z9matrixMulPfS_S_iiPfS_S_ii: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movl %ecx, 4(%rsp) leaq 40(%rsp), %rcx movl %r8d, (%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) leaq 4(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 168 leaq _Z9matrixMulPfS_S_ii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 176 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z34__device_stub__Z9matrixMulPfS_S_iiPfS_S_ii, .-_Z34__device_stub__Z9matrixMulPfS_S_iiPfS_S_ii .globl _Z9matrixMulPfS_S_ii .type _Z9matrixMulPfS_S_ii, @function _Z9matrixMulPfS_S_ii: .LFB2033: .cfi_startproc endbr64 jmp _Z34__device_stub__Z9matrixMulPfS_S_iiPfS_S_ii .cfi_endproc .LFE2033: .size _Z9matrixMulPfS_S_ii, .-_Z9matrixMulPfS_S_ii .globl _Z36__device_stub__Z10matrixMul2PfS_S_iiPfS_S_ii .type _Z36__device_stub__Z10matrixMul2PfS_S_iiPfS_S_ii, @function _Z36__device_stub__Z10matrixMul2PfS_S_iiPfS_S_ii: .LFB2034: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movl %ecx, 4(%rsp) leaq 40(%rsp), %rcx movl %r8d, (%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) leaq 4(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L8 pushq 40(%rsp) .cfi_def_cfa_offset 168 leaq _Z10matrixMul2PfS_S_ii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 176 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L8: movq 136(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2034: .size _Z36__device_stub__Z10matrixMul2PfS_S_iiPfS_S_ii, .-_Z36__device_stub__Z10matrixMul2PfS_S_iiPfS_S_ii .globl _Z10matrixMul2PfS_S_ii .type _Z10matrixMul2PfS_S_ii, @function _Z10matrixMul2PfS_S_ii: .LFB2035: .cfi_startproc endbr64 jmp _Z36__device_stub__Z10matrixMul2PfS_S_iiPfS_S_ii .cfi_endproc .LFE2035: .size _Z10matrixMul2PfS_S_ii, .-_Z10matrixMul2PfS_S_ii .globl _Z36__device_stub__Z10matrixMul3PfS_S_iiPfS_S_ii .type _Z36__device_stub__Z10matrixMul3PfS_S_iiPfS_S_ii, @function _Z36__device_stub__Z10matrixMul3PfS_S_iiPfS_S_ii: .LFB2036: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movl %ecx, 4(%rsp) leaq 40(%rsp), %rcx movl %r8d, (%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) leaq 4(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L13 pushq 40(%rsp) .cfi_def_cfa_offset 168 leaq _Z10matrixMul3PfS_S_ii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 176 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L13: movq 136(%rsp), %rax subq %fs:40, %rax je .L15 call __stack_chk_fail@PLT .L15: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2036: .size _Z36__device_stub__Z10matrixMul3PfS_S_iiPfS_S_ii, .-_Z36__device_stub__Z10matrixMul3PfS_S_iiPfS_S_ii .globl _Z10matrixMul3PfS_S_ii .type _Z10matrixMul3PfS_S_ii, @function _Z10matrixMul3PfS_S_ii: .LFB2037: .cfi_startproc endbr64 jmp _Z36__device_stub__Z10matrixMul3PfS_S_iiPfS_S_ii .cfi_endproc .LFE2037: .size _Z10matrixMul3PfS_S_ii, .-_Z10matrixMul3PfS_S_ii .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z10matrixMul3PfS_S_ii" .LC1: .string "_Z10matrixMul2PfS_S_ii" .LC2: .string "_Z9matrixMulPfS_S_ii" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2039: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z10matrixMul3PfS_S_ii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC1(%rip), %rdx orl $-1, %r8d leaq _Z10matrixMul2PfS_S_ii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC2(%rip), %rdx orl $-1, %r8d leaq _Z9matrixMulPfS_S_ii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2039: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10matrixMul3PfS_S_ii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */ /* 0x000e220000002500 */ /*0020*/ MOV R16, c[0x0][0x178] ; /* 0x00005e0000107a02 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R21, SR_TID.X ; /* 0x0000000000157919 */ /* 0x000e220000002100 */ /*0050*/ ISETP.GT.AND P0, PT, R16, 0xf, PT ; /* 0x0000000f1000780c */ /* 0x000fc60003f04270 */ /*0060*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */ /* 0x000e680000002600 */ /*0070*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */ /* 0x000e6c0000002200 */ /*0080*/ @!P0 MOV R9, RZ ; /* 0x000000ff00098202 */ /* 0x000fe20000000f00 */ /*0090*/ IMAD R5, R5, c[0x0][0x4], R21 ; /* 0x0000010005057a24 */ /* 0x001fc400078e0215 */ /*00a0*/ IMAD R6, R3, c[0x0][0x0], R0 ; /* 0x0000000003067a24 */ /* 0x002fe200078e0200 */ /*00b0*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x000fc60000000f00 */ /*00c0*/ IMAD R2, R5, c[0x0][0x178], R6 ; /* 0x00005e0005027a24 */ /* 0x000fc800078e0206 */ /*00d0*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fe200078e0203 */ /*00e0*/ @!P0 BRA 0x4f0 ; /* 0x0000040000008947 */ /* 0x000fea0003800000 */ /*00f0*/ MOV R18, 0x4 ; /* 0x0000000400127802 */ /* 0x000fe20000000f00 */ /*0100*/ IMAD R5, R5, c[0x0][0x178], R0 ; /* 0x00005e0005057a24 */ /* 0x000fe200078e0200 */ /*0110*/ SHF.R.S32.HI R7, RZ, 0x1f, R16 ; /* 0x0000001fff077819 */ /* 0x000fe20000011410 */ /*0120*/ IMAD R17, R21.reuse, c[0x0][0x178], R6 ; /* 0x00005e0015117a24 */ /* 0x040fe200078e0206 */ /*0130*/ SHF.L.U32 R21, R21, 0x6, RZ ; /* 0x0000000615157819 */ /* 0x000fe200000006ff */ /*0140*/ IMAD.WIDE R4, R5, R18, c[0x0][0x168] ; /* 0x00005a0005047625 */ /* 0x000fe200078e0212 */ /*0150*/ LEA.HI R7, R7, c[0x0][0x178], RZ, 0x4 ; /* 0x00005e0007077a11 */ /* 0x000fe200078f20ff */ /*0160*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*0170*/ MOV R9, RZ ; /* 0x000000ff00097202 */ /* 0x000fe40000000f00 */ /*0180*/ MOV R20, R4 ; /* 0x0000000400147202 */ /* 0x000fc40000000f00 */ /*0190*/ MOV R19, R5 ; /* 0x0000000500137202 */ /* 0x000fe40000000f00 */ /*01a0*/ LEA R23, R0, R21, 0x2 ; /* 0x0000001500177211 */ /* 0x000fe400078e10ff */ /*01b0*/ SHF.R.S32.HI R22, RZ, 0x4, R7 ; /* 0x00000004ff167819 */ /* 0x000fe40000011407 */ /*01c0*/ IMAD.WIDE R10, R17, R18, c[0x0][0x170] ; /* 0x00005c00110a7625 */ /* 0x000fe200078e0212 */ /*01d0*/ MOV R4, R20 ; /* 0x0000001400047202 */ /* 0x000fe40000000f00 */ /*01e0*/ MOV R5, R19 ; /* 0x0000001300057202 */ /* 0x000fc60000000f00 */ /*01f0*/ LDG.E R10, [R10.64] ; /* 0x000000060a0a7981 */ /* 0x000ea8000c1e1900 */ /*0200*/ LDG.E R8, [R4.64] ; /* 0x0000000604087981 */ /* 0x000ee2000c1e1900 */ /*0210*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fcc000fffe03f */ /*0220*/ ISETP.LE.AND P0, PT, R22, UR4, PT ; /* 0x0000000416007c0c */ /* 0x000fe4000bf03270 */ /*0230*/ IADD3 R20, P1, R20, 0x40, RZ ; /* 0x0000004014147810 */ /* 0x000fe40007f3e0ff */ /*0240*/ LEA R17, R16, R17, 0x4 ; /* 0x0000001110117211 */ /* 0x000fe400078e20ff */ /*0250*/ IADD3.X R19, RZ, R19, RZ, P1, !PT ; /* 0x00000013ff137210 */ /* 0x000fe20000ffe4ff */ /*0260*/ STS [R23+0x400], R10 ; /* 0x0004000a17007388 */ /* 0x004fe80000000800 */ /*0270*/ STS [R23], R8 ; /* 0x0000000817007388 */ /* 0x008fe80000000800 */ /*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0290*/ LDS R28, [R0.X4+0x400] ; /* 0x00040000001c7984 */ /* 0x000fe80000004800 */ /*02a0*/ LDS.128 R12, [R21] ; /* 0x00000000150c7984 */ /* 0x000e280000000c00 */ /*02b0*/ LDS R29, [R0.X4+0x440] ; /* 0x00044000001d7984 */ /* 0x000e680000004800 */ /*02c0*/ LDS R32, [R0.X4+0x480] ; /* 0x0004800000207984 */ /* 0x000ea80000004800 */ /*02d0*/ LDS R30, [R0.X4+0x4c0] ; /* 0x0004c000001e7984 */ /* 0x000ee80000004800 */ /*02e0*/ LDS R31, [R0.X4+0x500] ; /* 0x00050000001f7984 */ /* 0x000fe80000004800 */ /*02f0*/ LDS.128 R4, [R21+0x10] ; /* 0x0000100015047984 */ /* 0x000f280000000c00 */ /*0300*/ LDS R26, [R0.X4+0x540] ; /* 0x00054000001a7984 */ /* 0x000f680000004800 */ /*0310*/ LDS R25, [R0.X4+0x580] ; /* 0x0005800000197984 */ /* 0x000f680000004800 */ /*0320*/ LDS R24, [R0.X4+0x5c0] ; /* 0x0005c00000187984 */ /* 0x000f680000004800 */ /*0330*/ LDS R27, [R0.X4+0x600] ; /* 0x00060000001b7984 */ /* 0x000fe20000004800 */ /*0340*/ FFMA R12, R28, R12, R9 ; /* 0x0000000c1c0c7223 */ /* 0x001fc60000000009 */ /*0350*/ LDS R33, [R0.X4+0x700] ; /* 0x0007000000217984 */ /* 0x000fe80000004800 */ /*0360*/ LDS.128 R8, [R21+0x20] ; /* 0x0000200015087984 */ /* 0x000e220000000c00 */ /*0370*/ FFMA R13, R29, R13, R12 ; /* 0x0000000d1d0d7223 */ /* 0x002fc6000000000c */ /*0380*/ LDS R28, [R0.X4+0x640] ; /* 0x00064000001c7984 */ /* 0x000e620000004800 */ /*0390*/ FFMA R13, R32, R14, R13 ; /* 0x0000000e200d7223 */ /* 0x004fc6000000000d */ /*03a0*/ LDS R29, [R0.X4+0x680] ; /* 0x00068000001d7984 */ /* 0x000ea20000004800 */ /*03b0*/ FFMA R30, R30, R15, R13 ; /* 0x0000000f1e1e7223 */ /* 0x008fc6000000000d */ /*03c0*/ LDS R32, [R0.X4+0x6c0] ; /* 0x0006c00000207984 */ /* 0x000ee80000004800 */ /*03d0*/ LDS.128 R12, [R21+0x30] ; /* 0x00003000150c7984 */ /* 0x000ee20000000c00 */ /*03e0*/ FFMA R35, R31, R4, R30 ; /* 0x000000041f237223 */ /* 0x010fc6000000001e */ /*03f0*/ LDS R4, [R0.X4+0x740] ; /* 0x0007400000047984 */ /* 0x000f220000004800 */ /*0400*/ FFMA R30, R26, R5, R35 ; /* 0x000000051a1e7223 */ /* 0x020fc60000000023 */ /*0410*/ LDS R31, [R0.X4+0x780] ; /* 0x00078000001f7984 */ /* 0x000f680000004800 */ /*0420*/ LDS R26, [R0.X4+0x7c0] ; /* 0x0007c000001a7984 */ /* 0x000f620000004800 */ /*0430*/ FFMA R25, R25, R6, R30 ; /* 0x0000000619197223 */ /* 0x000fc8000000001e */ /*0440*/ FFMA R24, R24, R7, R25 ; /* 0x0000000718187223 */ /* 0x000fc80000000019 */ /*0450*/ FFMA R27, R27, R8, R24 ; /* 0x000000081b1b7223 */ /* 0x001fc80000000018 */ /*0460*/ FFMA R28, R28, R9, R27 ; /* 0x000000091c1c7223 */ /* 0x002fc8000000001b */ /*0470*/ FFMA R29, R29, R10, R28 ; /* 0x0000000a1d1d7223 */ /* 0x004fc8000000001c */ /*0480*/ FFMA R32, R32, R11, R29 ; /* 0x0000000b20207223 */ /* 0x008fc8000000001d */ /*0490*/ FFMA R33, R33, R12, R32 ; /* 0x0000000c21217223 */ /* 0x000fc80000000020 */ /*04a0*/ FFMA R4, R4, R13, R33 ; /* 0x0000000d04047223 */ /* 0x010fc80000000021 */ /*04b0*/ FFMA R31, R31, R14, R4 ; /* 0x0000000e1f1f7223 */ /* 0x020fc80000000004 */ /*04c0*/ FFMA R9, R26, R15, R31 ; /* 0x0000000f1a097223 */ /* 0x000fe2000000001f */ /*04d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*04e0*/ @!P0 BRA 0x1c0 ; /* 0xfffffcd000008947 */ /* 0x000fea000383ffff */ /*04f0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x000fe2000c101906 */ /*0500*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0510*/ BRA 0x510; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0580*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0590*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z10matrixMul2PfS_S_ii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R19, SR_CTAID.Y ; /* 0x0000000000137919 */ /* 0x000e220000002600 */ /*0020*/ MOV R20, c[0x0][0x178] ; /* 0x00005e0000147a02 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0040*/ MOV R36, RZ ; /* 0x000000ff00247202 */ /* 0x000fe20000000f00 */ /*0050*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */ /* 0x000e220000002200 */ /*0060*/ ISETP.GE.AND P0, PT, R20, 0x1, PT ; /* 0x000000011400780c */ /* 0x000fc60003f06270 */ /*0070*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e680000002500 */ /*0080*/ S2R R17, SR_TID.X ; /* 0x0000000000117919 */ /* 0x000e620000002100 */ /*0090*/ LEA R19, R19, R2, 0x4 ; /* 0x0000000213137211 */ /* 0x001fca00078e20ff */ /*00a0*/ IMAD R19, R19, c[0x0][0x178], RZ ; /* 0x00005e0013137a24 */ /* 0x000fe200078e02ff */ /*00b0*/ LEA R18, R0, R17, 0x4 ; /* 0x0000001100127211 */ /* 0x002fe200078e20ff */ /*00c0*/ @!P0 BRA 0xc40 ; /* 0x00000b7000008947 */ /* 0x000fea0003800000 */ /*00d0*/ IADD3 R2, R20.reuse, -0x1, RZ ; /* 0xffffffff14027810 */ /* 0x040fe40007ffe0ff */ /*00e0*/ LOP3.LUT R20, R20, 0x3, RZ, 0xc0, !PT ; /* 0x0000000314147812 */ /* 0x000fe400078ec0ff */ /*00f0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */ /* 0x000fe40003f06070 */ /*0100*/ MOV R36, RZ ; /* 0x000000ff00247202 */ /* 0x000fe40000000f00 */ /*0110*/ MOV R16, RZ ; /* 0x000000ff00107202 */ /* 0x000fd20000000f00 */ /*0120*/ @!P0 BRA 0xb00 ; /* 0x000009d000008947 */ /* 0x000fea0003800000 */ /*0130*/ IADD3 R21, -R20, c[0x0][0x178], RZ ; /* 0x00005e0014157a10 */ /* 0x000fe20007ffe1ff */ /*0140*/ ULDC.64 UR6, c[0x0][0x168] ; /* 0x00005a0000067ab9 */ /* 0x000fe20000000a00 */ /*0150*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */ /* 0x000fe40000000f00 */ /*0160*/ ISETP.GT.AND P0, PT, R21, RZ, PT ; /* 0x000000ff1500720c */ /* 0x000fe40003f04270 */ /*0170*/ MOV R36, RZ ; /* 0x000000ff00247202 */ /* 0x000fe20000000f00 */ /*0180*/ IMAD.WIDE R12, R18, R13, c[0x0][0x170] ; /* 0x00005c00120c7625 */ /* 0x000fe200078e020d */ /*0190*/ MOV R16, RZ ; /* 0x000000ff00107202 */ /* 0x000fd20000000f00 */ /*01a0*/ @!P0 BRA 0x960 ; /* 0x000007b000008947 */ /* 0x000fea0003800000 */ /*01b0*/ ISETP.GT.AND P1, PT, R21, 0xc, PT ; /* 0x0000000c1500780c */ /* 0x000fe40003f24270 */ /*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*01d0*/ @!P1 BRA 0x690 ; /* 0x000004b000009947 */ /* 0x000fea0003800000 */ /*01e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*01f0*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe20008000f00 */ /*0200*/ LDG.E R34, [R12.64] ; /* 0x000000040c227981 */ /* 0x0000a2000c1e1900 */ /*0210*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fe40008000f00 */ /*0220*/ MOV R23, c[0x0][0x17c] ; /* 0x00005f0000177a02 */ /* 0x000fc60000000f00 */ /*0230*/ IMAD.WIDE R2, R19, 0x4, R2 ; /* 0x0000000413027825 */ /* 0x000fc800078e0202 */ /*0240*/ IMAD.WIDE R4, R23.reuse, 0x4, R12 ; /* 0x0000000417047825 */ /* 0x040fe200078e020c */ /*0250*/ LDG.E R37, [R2.64] ; /* 0x0000000402257981 */ /* 0x000ea8000c1e1900 */ /*0260*/ LDG.E R26, [R4.64] ; /* 0x00000004041a7981 */ /* 0x0002e2000c1e1900 */ /*0270*/ IMAD.WIDE R6, R23, 0x4, R4 ; /* 0x0000000417067825 */ /* 0x000fc600078e0204 */ /*0280*/ LDG.E R29, [R2.64+0x4] ; /* 0x00000404021d7981 */ /* 0x000ee8000c1e1900 */ /*0290*/ LDG.E R25, [R6.64] ; /* 0x0000000406197981 */ /* 0x000962000c1e1900 */ /*02a0*/ IMAD.WIDE R32, R23, 0x4, R6 ; /* 0x0000000417207825 */ /* 0x000fc600078e0206 */ /*02b0*/ LDG.E R24, [R2.64+0x8] ; /* 0x0000080402187981 */ /* 0x000f68000c1e1900 */ /*02c0*/ LDG.E R22, [R2.64+0xc] ; /* 0x00000c0402167981 */ /* 0x000f68000c1e1900 */ /*02d0*/ LDG.E R27, [R32.64] ; /* 0x00000004201b7981 */ /* 0x000362000c1e1900 */ /*02e0*/ IMAD.WIDE R12, R23, 0x4, R32 ; /* 0x00000004170c7825 */ /* 0x001fc600078e0220 */ /*02f0*/ LDG.E R28, [R2.64+0x10] ; /* 0x00001004021c7981 */ /* 0x000f68000c1e1900 */ /*0300*/ LDG.E R31, [R12.64] ; /* 0x000000040c1f7981 */ /* 0x000162000c1e1900 */ /*0310*/ IMAD.WIDE R14, R23, 0x4, R12 ; /* 0x00000004170e7825 */ /* 0x000fc600078e020c */ /*0320*/ LDG.E R35, [R2.64+0x14] ; /* 0x0000140402237981 */ /* 0x000f66000c1e1900 */ /*0330*/ IMAD.WIDE R10, R23.reuse, 0x4, R14 ; /* 0x00000004170a7825 */ /* 0x040fe200078e020e */ /*0340*/ LDG.E R30, [R14.64] ; /* 0x000000040e1e7981 */ /* 0x000168000c1e1900 */ /*0350*/ LDG.E R32, [R10.64] ; /* 0x000000040a207981 */ /* 0x002362000c1e1900 */ /*0360*/ IMAD.WIDE R4, R23, 0x4, R10 ; /* 0x0000000417047825 */ /* 0x000fc600078e020a */ /*0370*/ LDG.E R33, [R2.64+0x18] ; /* 0x0000180402217981 */ /* 0x000f66000c1e1900 */ /*0380*/ IMAD.WIDE R6, R23, 0x4, R4 ; /* 0x0000000417067825 */ /* 0x010fcc00078e0204 */ /*0390*/ IMAD.WIDE R8, R23.reuse, 0x4, R6 ; /* 0x0000000417087825 */ /* 0x040fe400078e0206 */ /*03a0*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000968000c1e1900 */ /*03b0*/ IMAD.WIDE R12, R23, 0x4, R8 ; /* 0x00000004170c7825 */ /* 0x001fcc00078e0208 */ /*03c0*/ IMAD.WIDE R14, R23.reuse, 0x4, R12 ; /* 0x00000004170e7825 */ /* 0x040fe200078e020c */ /*03d0*/ LDG.E R7, [R2.64+0x2c] ; /* 0x00002c0402077981 */ /* 0x010f2a000c1e1900 */ /*03e0*/ IMAD.WIDE R10, R23, 0x4, R14 ; /* 0x00000004170a7825 */ /* 0x002fe400078e020e */ /*03f0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000122000c1e1900 */ /*0400*/ FFMA R36, R34, R37, R36 ; /* 0x0000002522247223 */ /* 0x004fc60000000024 */ /*0410*/ LDG.E R34, [R4.64] ; /* 0x0000000404227981 */ /* 0x000aa8000c1e1900 */ /*0420*/ LDG.E R37, [R2.64+0x1c] ; /* 0x00001c0402257981 */ /* 0x000ea2000c1e1900 */ /*0430*/ FFMA R36, R26, R29, R36 ; /* 0x0000001d1a247223 */ /* 0x008fc60000000024 */ /*0440*/ LDG.E R29, [R2.64+0x20] ; /* 0x00002004021d7981 */ /* 0x000ee8000c1e1900 */ /*0450*/ LDG.E R26, [R8.64] ; /* 0x00000004081a7981 */ /* 0x000322000c1e1900 */ /*0460*/ FFMA R4, R25, R24, R36 ; /* 0x0000001819047223 */ /* 0x020fc60000000024 */ /*0470*/ LDG.E R25, [R2.64+0x24] ; /* 0x0000240402197981 */ /* 0x000f28000c1e1900 */ /*0480*/ LDG.E R24, [R12.64] ; /* 0x000000040c187981 */ /* 0x000b22000c1e1900 */ /*0490*/ FFMA R22, R27, R22, R4 ; /* 0x000000161b167223 */ /* 0x000fc60000000004 */ /*04a0*/ LDG.E R36, [R2.64+0x28] ; /* 0x0000280402247981 */ /* 0x000f22000c1e1900 */ /*04b0*/ IMAD.WIDE R4, R23, 0x4, R10 ; /* 0x0000000417047825 */ /* 0x000fc600078e020a */ /*04c0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000f26000c1e1900 */ /*04d0*/ IMAD.WIDE R8, R23, 0x4, R4 ; /* 0x0000000417087825 */ /* 0x002fe200078e0204 */ /*04e0*/ LDG.E R27, [R2.64+0x30] ; /* 0x00003004021b7981 */ /* 0x000f22000c1e1900 */ /*04f0*/ FFMA R31, R31, R28, R22 ; /* 0x0000001c1f1f7223 */ /* 0x000fc60000000016 */ /*0500*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000322000c1e1900 */ /*0510*/ IMAD.WIDE R12, R23, 0x4, R8 ; /* 0x00000004170c7825 */ /* 0x020fc600078e0208 */ /*0520*/ LDG.E R28, [R2.64+0x34] ; /* 0x00003404021c7981 */ /* 0x000f68000c1e1900 */ /*0530*/ LDG.E R22, [R8.64] ; /* 0x0000000408167981 */ /* 0x000168000c1e1900 */ /*0540*/ LDG.E R5, [R2.64+0x38] ; /* 0x0000380402057981 */ /* 0x002f68000c1e1900 */ /*0550*/ LDG.E R15, [R12.64] ; /* 0x000000040c0f7981 */ /* 0x001168000c1e1900 */ /*0560*/ LDG.E R8, [R2.64+0x3c] ; /* 0x00003c0402087981 */ /* 0x000f62000c1e1900 */ /*0570*/ FFMA R31, R30, R35, R31 ; /* 0x000000231e1f7223 */ /* 0x000fc8000000001f */ /*0580*/ FFMA R31, R32, R33, R31 ; /* 0x00000021201f7223 */ /* 0x000fe2000000001f */ /*0590*/ IADD3 R21, R21, -0x10, RZ ; /* 0xfffffff015157810 */ /* 0x000fc80007ffe0ff */ /*05a0*/ ISETP.GT.AND P1, PT, R21, 0xc, PT ; /* 0x0000000c1500780c */ /* 0x000fe20003f24270 */ /*05b0*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */ /* 0x000fe2000ff1e03f */ /*05c0*/ IMAD.WIDE R12, R23, 0x4, R12 ; /* 0x00000004170c7825 */ /* 0x001fc600078e020c */ /*05d0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*05e0*/ IADD3 R16, R16, 0x10, RZ ; /* 0x0000001010107810 */ /* 0x000fe20007ffe0ff */ /*05f0*/ FFMA R31, R34, R37, R31 ; /* 0x00000025221f7223 */ /* 0x004fc8000000001f */ /*0600*/ FFMA R29, R6, R29, R31 ; /* 0x0000001d061d7223 */ /* 0x008fc8000000001f */ /*0610*/ FFMA R25, R26, R25, R29 ; /* 0x000000191a197223 */ /* 0x010fc8000000001d */ /*0620*/ FFMA R25, R24, R36, R25 ; /* 0x0000002418197223 */ /* 0x000fc80000000019 */ /*0630*/ FFMA R7, R14, R7, R25 ; /* 0x000000070e077223 */ /* 0x000fc80000000019 */ /*0640*/ FFMA R7, R10, R27, R7 ; /* 0x0000001b0a077223 */ /* 0x000fc80000000007 */ /*0650*/ FFMA R7, R4, R28, R7 ; /* 0x0000001c04077223 */ /* 0x020fc80000000007 */ /*0660*/ FFMA R22, R22, R5, R7 ; /* 0x0000000516167223 */ /* 0x000fc80000000007 */ /*0670*/ FFMA R36, R15, R8, R22 ; /* 0x000000080f247223 */ /* 0x000fe20000000016 */ /*0680*/ @P1 BRA 0x1f0 ; /* 0xfffffb6000001947 */ /* 0x000fea000383ffff */ /*0690*/ ISETP.GT.AND P1, PT, R21, 0x4, PT ; /* 0x000000041500780c */ /* 0x000fda0003f24270 */ /*06a0*/ @!P1 BRA 0x940 ; /* 0x0000029000009947 */ /* 0x000fea0003800000 */ /*06b0*/ MOV R23, c[0x0][0x17c] ; /* 0x00005f0000177a02 */ /* 0x000fe20000000f00 */ /*06c0*/ LDG.E R27, [R12.64] ; /* 0x000000040c1b7981 */ /* 0x0000a2000c1e1900 */ /*06d0*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe40008000f00 */ /*06e0*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fe20008000f00 */ /*06f0*/ IMAD.WIDE R34, R23, 0x4, R12 ; /* 0x0000000417227825 */ /* 0x000fc800078e020c */ /*0700*/ IMAD.WIDE R2, R19, 0x4, R2 ; /* 0x0000000413027825 */ /* 0x000fe200078e0202 */ /*0710*/ LDG.E R22, [R34.64] ; /* 0x0000000422167981 */ /* 0x000ee6000c1e1900 */ /*0720*/ IMAD.WIDE R14, R23.reuse, 0x4, R34 ; /* 0x00000004170e7825 */ /* 0x040fe200078e0222 */ /*0730*/ LDG.E R25, [R2.64] ; /* 0x0000000402197981 */ /* 0x000ea8000c1e1900 */ /*0740*/ LDG.E R29, [R2.64+0x4] ; /* 0x00000404021d7981 */ /* 0x000ee2000c1e1900 */ /*0750*/ IMAD.WIDE R6, R23, 0x4, R14 ; /* 0x0000000417067825 */ /* 0x000fc600078e020e */ /*0760*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000f26000c1e1900 */ /*0770*/ IMAD.WIDE R4, R23.reuse, 0x4, R6 ; /* 0x0000000417047825 */ /* 0x040fe200078e0206 */ /*0780*/ LDG.E R31, [R2.64+0x8] ; /* 0x00000804021f7981 */ /* 0x000f28000c1e1900 */ /*0790*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000362000c1e1900 */ /*07a0*/ IMAD.WIDE R8, R23, 0x4, R4 ; /* 0x0000000417087825 */ /* 0x000fc600078e0204 */ /*07b0*/ LDG.E R33, [R2.64+0xc] ; /* 0x00000c0402217981 */ /* 0x000f66000c1e1900 */ /*07c0*/ IMAD.WIDE R10, R23.reuse, 0x4, R8 ; /* 0x00000004170a7825 */ /* 0x040fe200078e0208 */ /*07d0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000f68000c1e1900 */ /*07e0*/ LDG.E R24, [R2.64+0x10] ; /* 0x0000100402187981 */ /* 0x000f62000c1e1900 */ /*07f0*/ IMAD.WIDE R12, R23, 0x4, R10 ; /* 0x00000004170c7825 */ /* 0x001fc600078e020a */ /*0800*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000f68000c1e1900 */ /*0810*/ LDG.E R26, [R2.64+0x14] ; /* 0x00001404021a7981 */ /* 0x000f68000c1e1900 */ /*0820*/ LDG.E R30, [R2.64+0x18] ; /* 0x00001804021e7981 */ /* 0x000f68000c1e1900 */ /*0830*/ LDG.E R28, [R10.64] ; /* 0x000000040a1c7981 */ /* 0x000f68000c1e1900 */ /*0840*/ LDG.E R7, [R2.64+0x1c] ; /* 0x00001c0402077981 */ /* 0x002f68000c1e1900 */ /*0850*/ LDG.E R32, [R12.64] ; /* 0x000000040c207981 */ /* 0x000162000c1e1900 */ /*0860*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */ /* 0x000fe2000ff1e03f */ /*0870*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*0880*/ IADD3 R16, R16, 0x8, RZ ; /* 0x0000000810107810 */ /* 0x000fe40007ffe0ff */ /*0890*/ IADD3 R21, R21, -0x8, RZ ; /* 0xfffffff815157810 */ /* 0x000fe20007ffe0ff */ /*08a0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*08b0*/ IMAD.WIDE R12, R23, 0x4, R12 ; /* 0x00000004170c7825 */ /* 0x001fe200078e020c */ /*08c0*/ FFMA R25, R27, R25, R36 ; /* 0x000000191b197223 */ /* 0x004fc80000000024 */ /*08d0*/ FFMA R25, R22, R29, R25 ; /* 0x0000001d16197223 */ /* 0x008fc80000000019 */ /*08e0*/ FFMA R25, R14, R31, R25 ; /* 0x0000001f0e197223 */ /* 0x010fc80000000019 */ /*08f0*/ FFMA R6, R6, R33, R25 ; /* 0x0000002106067223 */ /* 0x020fc80000000019 */ /*0900*/ FFMA R5, R5, R24, R6 ; /* 0x0000001805057223 */ /* 0x000fc80000000006 */ /*0910*/ FFMA R5, R8, R26, R5 ; /* 0x0000001a08057223 */ /* 0x000fc80000000005 */ /*0920*/ FFMA R5, R28, R30, R5 ; /* 0x0000001e1c057223 */ /* 0x000fc80000000005 */ /*0930*/ FFMA R36, R32, R7, R5 ; /* 0x0000000720247223 */ /* 0x000fe20000000005 */ /*0940*/ ISETP.NE.OR P0, PT, R21, RZ, P0 ; /* 0x000000ff1500720c */ /* 0x000fda0000705670 */ /*0950*/ @!P0 BRA 0xb00 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*0960*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe40008000f00 */ /*0970*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fe40008000f00 */ /*0980*/ MOV R25, c[0x0][0x17c] ; /* 0x00005f0000197a02 */ /* 0x000fc60000000f00 */ /*0990*/ IMAD.WIDE R2, R19, 0x4, R2 ; /* 0x0000000413027825 */ /* 0x000fc800078e0202 */ /*09a0*/ IMAD.WIDE R6, R25.reuse, 0x4, R12 ; /* 0x0000000419067825 */ /* 0x040fe200078e020c */ /*09b0*/ LDG.E R10, [R2.64] ; /* 0x00000004020a7981 */ /* 0x000ea8000c1e1900 */ /*09c0*/ LDG.E R13, [R12.64] ; /* 0x000000040c0d7981 */ /* 0x000ea2000c1e1900 */ /*09d0*/ IMAD.WIDE R8, R25, 0x4, R6 ; /* 0x0000000419087825 */ /* 0x000fc600078e0206 */ /*09e0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x000ee8000c1e1900 */ /*09f0*/ LDG.E R11, [R2.64+0x4] ; /* 0x00000404020b7981 */ /* 0x000ee2000c1e1900 */ /*0a00*/ IMAD.WIDE R4, R25, 0x4, R8 ; /* 0x0000000419047825 */ /* 0x000fc600078e0208 */ /*0a10*/ LDG.E R15, [R8.64] ; /* 0x00000004080f7981 */ /* 0x000f28000c1e1900 */ /*0a20*/ LDG.E R14, [R2.64+0x8] ; /* 0x00000804020e7981 */ /* 0x000f28000c1e1900 */ /*0a30*/ LDG.E R22, [R2.64+0xc] ; /* 0x00000c0402167981 */ /* 0x000f68000c1e1900 */ /*0a40*/ LDG.E R23, [R4.64] ; /* 0x0000000404177981 */ /* 0x000f62000c1e1900 */ /*0a50*/ IADD3 R21, R21, -0x4, RZ ; /* 0xfffffffc15157810 */ /* 0x000fc80007ffe0ff */ /*0a60*/ ISETP.NE.AND P0, PT, R21, RZ, PT ; /* 0x000000ff1500720c */ /* 0x000fe20003f05270 */ /*0a70*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */ /* 0x000fe2000ff1e03f */ /*0a80*/ IADD3 R16, R16, 0x4, RZ ; /* 0x0000000410107810 */ /* 0x000fc60007ffe0ff */ /*0a90*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*0aa0*/ FFMA R10, R13, R10, R36 ; /* 0x0000000a0d0a7223 */ /* 0x004fc80000000024 */ /*0ab0*/ FFMA R10, R7, R11, R10 ; /* 0x0000000b070a7223 */ /* 0x008fe2000000000a */ /*0ac0*/ IMAD.WIDE R12, R25, 0x4, R4 ; /* 0x00000004190c7825 */ /* 0x000fc600078e0204 */ /*0ad0*/ FFMA R10, R15, R14, R10 ; /* 0x0000000e0f0a7223 */ /* 0x010fc8000000000a */ /*0ae0*/ FFMA R36, R23, R22, R10 ; /* 0x0000001617247223 */ /* 0x020fe2000000000a */ /*0af0*/ @P0 BRA 0x960 ; /* 0xfffffe6000000947 */ /* 0x000fea000383ffff */ /*0b00*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fda0003f05270 */ /*0b10*/ @!P0 BRA 0xc40 ; /* 0x0000012000008947 */ /* 0x000fea0003800000 */ /*0b20*/ IADD3 R2, R19, R16, RZ ; /* 0x0000001013027210 */ /* 0x000fe20007ffe0ff */ /*0b30*/ IMAD R17, R16, c[0x0][0x17c], R17 ; /* 0x00005f0010117a24 */ /* 0x000fe200078e0211 */ /*0b40*/ MOV R6, 0x4 ; /* 0x0000000400067802 */ /* 0x000fc80000000f00 */ /*0b50*/ LEA R17, R0, R17, 0x4 ; /* 0x0000001100117211 */ /* 0x000fe200078e20ff */ /*0b60*/ IMAD.WIDE R2, R2, R6, c[0x0][0x168] ; /* 0x00005a0002027625 */ /* 0x000fca00078e0206 */ /*0b70*/ MOV R4, R2 ; /* 0x0000000200047202 */ /* 0x000fe40000000f00 */ /*0b80*/ MOV R5, R3 ; /* 0x0000000300057202 */ /* 0x000fe20000000f00 */ /*0b90*/ IMAD.WIDE R2, R17, R6, c[0x0][0x170] ; /* 0x00005c0011027625 */ /* 0x000fca00078e0206 */ /*0ba0*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */ /* 0x0000a8000c1e1900 */ /*0bb0*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */ /* 0x0002a2000c1e1900 */ /*0bc0*/ IADD3 R20, R20, -0x1, RZ ; /* 0xffffffff14147810 */ /* 0x000fe40007ffe0ff */ /*0bd0*/ MOV R9, c[0x0][0x17c] ; /* 0x00005f0000097a02 */ /* 0x000fc40000000f00 */ /*0be0*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fc60003f05270 */ /*0bf0*/ IMAD.WIDE R2, R9, 0x4, R2 ; /* 0x0000000409027825 */ /* 0x001fe200078e0202 */ /*0c00*/ IADD3 R4, P1, R4, 0x4, RZ ; /* 0x0000000404047810 */ /* 0x002fc80007f3e0ff */ /*0c10*/ IADD3.X R5, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff057210 */ /* 0x000fe20000ffe4ff */ /*0c20*/ FFMA R36, R7, R0, R36 ; /* 0x0000000007247223 */ /* 0x004fc80000000024 */ /*0c30*/ @P0 BRA 0xba0 ; /* 0xffffff6000000947 */ /* 0x000fea000383ffff */ /*0c40*/ IADD3 R2, R18, R19, RZ ; /* 0x0000001312027210 */ /* 0x000fe40007ffe0ff */ /*0c50*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x000fca0000000f00 */ /*0c60*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fca00078e0203 */ /*0c70*/ STG.E [R2.64], R36 ; /* 0x0000002402007986 */ /* 0x000fe2000c101904 */ /*0c80*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0c90*/ BRA 0xc90; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0ca0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ce0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z9matrixMulPfS_S_ii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R18, SR_CTAID.Y ; /* 0x0000000000127919 */ /* 0x000e220000002600 */ /*0020*/ MOV R20, c[0x0][0x178] ; /* 0x00005e0000147a02 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0040*/ MOV R32, RZ ; /* 0x000000ff00207202 */ /* 0x000fe20000000f00 */ /*0050*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e220000002200 */ /*0060*/ ISETP.GE.AND P0, PT, R20, 0x1, PT ; /* 0x000000011400780c */ /* 0x000fc60003f06270 */ /*0070*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e680000002500 */ /*0080*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e620000002100 */ /*0090*/ IMAD R18, R18, c[0x0][0x0], R5 ; /* 0x0000000012127a24 */ /* 0x001fc800078e0205 */ /*00a0*/ IMAD R18, R18, c[0x0][0x178], RZ ; /* 0x00005e0012127a24 */ /* 0x000fe400078e02ff */ /*00b0*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x002fe200078e0203 */ /*00c0*/ @!P0 BRA 0xc30 ; /* 0x00000b6000008947 */ /* 0x000fea0003800000 */ /*00d0*/ IADD3 R2, R20.reuse, -0x1, RZ ; /* 0xffffffff14027810 */ /* 0x040fe40007ffe0ff */ /*00e0*/ LOP3.LUT R20, R20, 0x3, RZ, 0xc0, !PT ; /* 0x0000000314147812 */ /* 0x000fe400078ec0ff */ /*00f0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */ /* 0x000fe40003f06070 */ /*0100*/ MOV R32, RZ ; /* 0x000000ff00207202 */ /* 0x000fe40000000f00 */ /*0110*/ MOV R19, RZ ; /* 0x000000ff00137202 */ /* 0x000fd20000000f00 */ /*0120*/ @!P0 BRA 0xb00 ; /* 0x000009d000008947 */ /* 0x000fea0003800000 */ /*0130*/ IADD3 R21, -R20, c[0x0][0x178], RZ ; /* 0x00005e0014157a10 */ /* 0x000fe20007ffe1ff */ /*0140*/ ULDC.64 UR6, c[0x0][0x168] ; /* 0x00005a0000067ab9 */ /* 0x000fe20000000a00 */ /*0150*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */ /* 0x000fe40000000f00 */ /*0160*/ ISETP.GT.AND P0, PT, R21, RZ, PT ; /* 0x000000ff1500720c */ /* 0x000fe40003f04270 */ /*0170*/ MOV R32, RZ ; /* 0x000000ff00207202 */ /* 0x000fe20000000f00 */ /*0180*/ IMAD.WIDE R12, R0, R13, c[0x0][0x170] ; /* 0x00005c00000c7625 */ /* 0x000fe200078e020d */ /*0190*/ MOV R19, RZ ; /* 0x000000ff00137202 */ /* 0x000fd20000000f00 */ /*01a0*/ @!P0 BRA 0x960 ; /* 0x000007b000008947 */ /* 0x000fea0003800000 */ /*01b0*/ ISETP.GT.AND P1, PT, R21, 0xc, PT ; /* 0x0000000c1500780c */ /* 0x000fe40003f24270 */ /*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*01d0*/ @!P1 BRA 0x690 ; /* 0x000004b000009947 */ /* 0x000fea0003800000 */ /*01e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*01f0*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe20008000f00 */ /*0200*/ LDG.E R37, [R12.64] ; /* 0x000000040c257981 */ /* 0x0000a2000c1e1900 */ /*0210*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fe40008000f00 */ /*0220*/ MOV R23, c[0x0][0x17c] ; /* 0x00005f0000177a02 */ /* 0x000fc60000000f00 */ /*0230*/ IMAD.WIDE R2, R18, 0x4, R2 ; /* 0x0000000412027825 */ /* 0x000fc800078e0202 */ /*0240*/ IMAD.WIDE R4, R23.reuse, 0x4, R12 ; /* 0x0000000417047825 */ /* 0x040fe200078e020c */ /*0250*/ LDG.E R34, [R2.64] ; /* 0x0000000402227981 */ /* 0x000ea8000c1e1900 */ /*0260*/ LDG.E R26, [R4.64] ; /* 0x00000004041a7981 */ /* 0x0002e2000c1e1900 */ /*0270*/ IMAD.WIDE R10, R23, 0x4, R4 ; /* 0x00000004170a7825 */ /* 0x000fc600078e0204 */ /*0280*/ LDG.E R29, [R2.64+0x4] ; /* 0x00000404021d7981 */ /* 0x000ee8000c1e1900 */ /*0290*/ LDG.E R27, [R10.64] ; /* 0x000000040a1b7981 */ /* 0x000968000c1e1900 */ /*02a0*/ LDG.E R24, [R2.64+0x8] ; /* 0x0000080402187981 */ /* 0x000f62000c1e1900 */ /*02b0*/ IMAD.WIDE R16, R23, 0x4, R10 ; /* 0x0000000417107825 */ /* 0x000fc600078e020a */ /*02c0*/ LDG.E R22, [R2.64+0xc] ; /* 0x00000c0402167981 */ /* 0x000f68000c1e1900 */ /*02d0*/ LDG.E R25, [R16.64] ; /* 0x0000000410197981 */ /* 0x000168000c1e1900 */ /*02e0*/ LDG.E R31, [R2.64+0x10] ; /* 0x00001004021f7981 */ /* 0x000f68000c1e1900 */ /*02f0*/ LDG.E R33, [R2.64+0x14] ; /* 0x0000140402217981 */ /* 0x000f62000c1e1900 */ /*0300*/ IMAD.WIDE R16, R23, 0x4, R16 ; /* 0x0000000417107825 */ /* 0x001fc600078e0210 */ /*0310*/ LDG.E R35, [R2.64+0x18] ; /* 0x0000180402237981 */ /* 0x000f66000c1e1900 */ /*0320*/ IMAD.WIDE R14, R23.reuse, 0x4, R16 ; /* 0x00000004170e7825 */ /* 0x040fe200078e0210 */ /*0330*/ LDG.E R28, [R16.64] ; /* 0x00000004101c7981 */ /* 0x000168000c1e1900 */ /*0340*/ LDG.E R36, [R2.64+0x1c] ; /* 0x00001c0402247981 */ /* 0x000f62000c1e1900 */ /*0350*/ IMAD.WIDE R8, R23, 0x4, R14 ; /* 0x0000000417087825 */ /* 0x000fc600078e020e */ /*0360*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000166000c1e1900 */ /*0370*/ IMAD.WIDE R4, R23.reuse, 0x4, R8 ; /* 0x0000000417047825 */ /* 0x042fe200078e0208 */ /*0380*/ LDG.E R30, [R8.64] ; /* 0x00000004081e7981 */ /* 0x00036a000c1e1900 */ /*0390*/ IMAD.WIDE R6, R23.reuse, 0x4, R4 ; /* 0x0000000417067825 */ /* 0x040fe200078e0204 */ /*03a0*/ LDG.E R15, [R4.64] ; /* 0x00000004040f7981 */ /* 0x00176a000c1e1900 */ /*03b0*/ IMAD.WIDE R10, R23, 0x4, R6 ; /* 0x00000004170a7825 */ /* 0x010fc400078e0206 */ /*03c0*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000128000c1e1900 */ /*03d0*/ IMAD.WIDE R12, R23, 0x4, R10 ; /* 0x00000004170c7825 */ /* 0x000fcc00078e020a */ /*03e0*/ IMAD.WIDE R16, R23.reuse, 0x4, R12 ; /* 0x0000000417107825 */ /* 0x040fe200078e020c */ /*03f0*/ LDG.E R7, [R2.64+0x2c] ; /* 0x00002c0402077981 */ /* 0x001f2a000c1e1900 */ /*0400*/ IMAD.WIDE R8, R23, 0x4, R16 ; /* 0x0000000417087825 */ /* 0x002fe400078e0210 */ /*0410*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */ /* 0x000122000c1e1900 */ /*0420*/ FFMA R34, R37, R34, R32 ; /* 0x0000002225227223 */ /* 0x004fc60000000020 */ /*0430*/ LDG.E R37, [R2.64+0x20] ; /* 0x0000200402257981 */ /* 0x000f28000c1e1900 */ /*0440*/ LDG.E R32, [R10.64] ; /* 0x000000040a207981 */ /* 0x0002a2000c1e1900 */ /*0450*/ FFMA R4, R26, R29, R34 ; /* 0x0000001d1a047223 */ /* 0x008fc60000000022 */ /*0460*/ LDG.E R29, [R2.64+0x24] ; /* 0x00002404021d7981 */ /* 0x000ea8000c1e1900 */ /*0470*/ LDG.E R26, [R12.64] ; /* 0x000000040c1a7981 */ /* 0x0006a2000c1e1900 */ /*0480*/ FFMA R24, R27, R24, R4 ; /* 0x000000181b187223 */ /* 0x020fc60000000004 */ /*0490*/ LDG.E R34, [R2.64+0x28] ; /* 0x0000280402227981 */ /* 0x000f62000c1e1900 */ /*04a0*/ IMAD.WIDE R4, R23, 0x4, R8 ; /* 0x0000000417047825 */ /* 0x000fc600078e0208 */ /*04b0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000f66000c1e1900 */ /*04c0*/ IMAD.WIDE R10, R23, 0x4, R4 ; /* 0x00000004170a7825 */ /* 0x002fe200078e0204 */ /*04d0*/ LDG.E R27, [R2.64+0x30] ; /* 0x00003004021b7981 */ /* 0x000f62000c1e1900 */ /*04e0*/ FFMA R25, R25, R22, R24 ; /* 0x0000001619197223 */ /* 0x000fc60000000018 */ /*04f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000362000c1e1900 */ /*0500*/ IMAD.WIDE R12, R23, 0x4, R10 ; /* 0x00000004170c7825 */ /* 0x008fc600078e020a */ /*0510*/ LDG.E R24, [R2.64+0x34] ; /* 0x0000340402187981 */ /* 0x000ee8000c1e1900 */ /*0520*/ LDG.E R22, [R10.64] ; /* 0x000000040a167981 */ /* 0x0000e8000c1e1900 */ /*0530*/ LDG.E R5, [R2.64+0x38] ; /* 0x0000380402057981 */ /* 0x002ee8000c1e1900 */ /*0540*/ LDG.E R17, [R12.64] ; /* 0x000000040c117981 */ /* 0x0010e8000c1e1900 */ /*0550*/ LDG.E R10, [R2.64+0x3c] ; /* 0x00003c04020a7981 */ /* 0x000ee2000c1e1900 */ /*0560*/ FFMA R25, R28, R31, R25 ; /* 0x0000001f1c197223 */ /* 0x000fc80000000019 */ /*0570*/ FFMA R25, R14, R33, R25 ; /* 0x000000210e197223 */ /* 0x000fc80000000019 */ /*0580*/ FFMA R30, R30, R35, R25 ; /* 0x000000231e1e7223 */ /* 0x000fc80000000019 */ /*0590*/ FFMA R15, R15, R36, R30 ; /* 0x000000240f0f7223 */ /* 0x000fe2000000001e */ /*05a0*/ IADD3 R21, R21, -0x10, RZ ; /* 0xfffffff015157810 */ /* 0x000fc80007ffe0ff */ /*05b0*/ ISETP.GT.AND P1, PT, R21, 0xc, PT ; /* 0x0000000c1500780c */ /* 0x000fe20003f24270 */ /*05c0*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */ /* 0x000fe2000ff1e03f */ /*05d0*/ IMAD.WIDE R12, R23, 0x4, R12 ; /* 0x00000004170c7825 */ /* 0x001fc600078e020c */ /*05e0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*05f0*/ IADD3 R19, R19, 0x10, RZ ; /* 0x0000001013137810 */ /* 0x000fe20007ffe0ff */ /*0600*/ FFMA R15, R6, R37, R15 ; /* 0x00000025060f7223 */ /* 0x010fc8000000000f */ /*0610*/ FFMA R15, R32, R29, R15 ; /* 0x0000001d200f7223 */ /* 0x004fc8000000000f */ /*0620*/ FFMA R15, R26, R34, R15 ; /* 0x000000221a0f7223 */ /* 0x020fc8000000000f */ /*0630*/ FFMA R7, R16, R7, R15 ; /* 0x0000000710077223 */ /* 0x000fc8000000000f */ /*0640*/ FFMA R7, R8, R27, R7 ; /* 0x0000001b08077223 */ /* 0x000fc80000000007 */ /*0650*/ FFMA R7, R4, R24, R7 ; /* 0x0000001804077223 */ /* 0x008fc80000000007 */ /*0660*/ FFMA R22, R22, R5, R7 ; /* 0x0000000516167223 */ /* 0x000fc80000000007 */ /*0670*/ FFMA R32, R17, R10, R22 ; /* 0x0000000a11207223 */ /* 0x000fe20000000016 */ /*0680*/ @P1 BRA 0x1f0 ; /* 0xfffffb6000001947 */ /* 0x000fea000383ffff */ /*0690*/ ISETP.GT.AND P1, PT, R21, 0x4, PT ; /* 0x000000041500780c */ /* 0x000fda0003f24270 */ /*06a0*/ @!P1 BRA 0x940 ; /* 0x0000029000009947 */ /* 0x000fea0003800000 */ /*06b0*/ MOV R7, c[0x0][0x17c] ; /* 0x00005f0000077a02 */ /* 0x000fe20000000f00 */ /*06c0*/ LDG.E R15, [R12.64] ; /* 0x000000040c0f7981 */ /* 0x0000a2000c1e1900 */ /*06d0*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe40008000f00 */ /*06e0*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fe20008000f00 */ /*06f0*/ IMAD.WIDE R22, R7, 0x4, R12 ; /* 0x0000000407167825 */ /* 0x000fc800078e020c */ /*0700*/ IMAD.WIDE R2, R18, 0x4, R2 ; /* 0x0000000412027825 */ /* 0x000fe200078e0202 */ /*0710*/ LDG.E R14, [R22.64] ; /* 0x00000004160e7981 */ /* 0x0002e6000c1e1900 */ /*0720*/ IMAD.WIDE R24, R7.reuse, 0x4, R22 ; /* 0x0000000407187825 */ /* 0x040fe200078e0216 */ /*0730*/ LDG.E R6, [R2.64] ; /* 0x0000000402067981 */ /* 0x000ea8000c1e1900 */ /*0740*/ LDG.E R17, [R2.64+0x4] ; /* 0x0000040402117981 */ /* 0x000ee2000c1e1900 */ /*0750*/ IMAD.WIDE R26, R7, 0x4, R24 ; /* 0x00000004071a7825 */ /* 0x000fc600078e0218 */ /*0760*/ LDG.E R25, [R24.64] ; /* 0x0000000418197981 */ /* 0x000966000c1e1900 */ /*0770*/ IMAD.WIDE R4, R7.reuse, 0x4, R26 ; /* 0x0000000407047825 */ /* 0x040fe200078e021a */ /*0780*/ LDG.E R16, [R2.64+0x8] ; /* 0x0000080402107981 */ /* 0x000f68000c1e1900 */ /*0790*/ LDG.E R27, [R26.64] ; /* 0x000000041a1b7981 */ /* 0x000162000c1e1900 */ /*07a0*/ IMAD.WIDE R8, R7, 0x4, R4 ; /* 0x0000000407087825 */ /* 0x000fc600078e0204 */ /*07b0*/ LDG.E R28, [R2.64+0xc] ; /* 0x00000c04021c7981 */ /* 0x000f66000c1e1900 */ /*07c0*/ IMAD.WIDE R10, R7.reuse, 0x4, R8 ; /* 0x00000004070a7825 */ /* 0x040fe200078e0208 */ /*07d0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000f68000c1e1900 */ /*07e0*/ LDG.E R29, [R2.64+0x10] ; /* 0x00001004021d7981 */ /* 0x000f62000c1e1900 */ /*07f0*/ IMAD.WIDE R12, R7, 0x4, R10 ; /* 0x00000004070c7825 */ /* 0x001fc600078e020a */ /*0800*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000f68000c1e1900 */ /*0810*/ LDG.E R22, [R2.64+0x14] ; /* 0x0000140402167981 */ /* 0x002f68000c1e1900 */ /*0820*/ LDG.E R23, [R2.64+0x18] ; /* 0x0000180402177981 */ /* 0x000f68000c1e1900 */ /*0830*/ LDG.E R24, [R10.64] ; /* 0x000000040a187981 */ /* 0x010f28000c1e1900 */ /*0840*/ LDG.E R30, [R2.64+0x1c] ; /* 0x00001c04021e7981 */ /* 0x000f28000c1e1900 */ /*0850*/ LDG.E R26, [R12.64] ; /* 0x000000040c1a7981 */ /* 0x000122000c1e1900 */ /*0860*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */ /* 0x000fe2000ff1e03f */ /*0870*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*0880*/ IADD3 R19, R19, 0x8, RZ ; /* 0x0000000813137810 */ /* 0x000fe40007ffe0ff */ /*0890*/ IADD3 R21, R21, -0x8, RZ ; /* 0xfffffff815157810 */ /* 0x000fe20007ffe0ff */ /*08a0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*08b0*/ IMAD.WIDE R12, R7, 0x4, R12 ; /* 0x00000004070c7825 */ /* 0x001fe200078e020c */ /*08c0*/ FFMA R15, R15, R6, R32 ; /* 0x000000060f0f7223 */ /* 0x004fc80000000020 */ /*08d0*/ FFMA R14, R14, R17, R15 ; /* 0x000000110e0e7223 */ /* 0x008fc8000000000f */ /*08e0*/ FFMA R14, R25, R16, R14 ; /* 0x00000010190e7223 */ /* 0x020fc8000000000e */ /*08f0*/ FFMA R14, R27, R28, R14 ; /* 0x0000001c1b0e7223 */ /* 0x000fc8000000000e */ /*0900*/ FFMA R5, R5, R29, R14 ; /* 0x0000001d05057223 */ /* 0x000fc8000000000e */ /*0910*/ FFMA R5, R8, R22, R5 ; /* 0x0000001608057223 */ /* 0x000fc80000000005 */ /*0920*/ FFMA R5, R24, R23, R5 ; /* 0x0000001718057223 */ /* 0x010fc80000000005 */ /*0930*/ FFMA R32, R26, R30, R5 ; /* 0x0000001e1a207223 */ /* 0x000fe20000000005 */ /*0940*/ ISETP.NE.OR P0, PT, R21, RZ, P0 ; /* 0x000000ff1500720c */ /* 0x000fda0000705670 */ /*0950*/ @!P0 BRA 0xb00 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*0960*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe40008000f00 */ /*0970*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fe40008000f00 */ /*0980*/ MOV R23, c[0x0][0x17c] ; /* 0x00005f0000177a02 */ /* 0x000fc60000000f00 */ /*0990*/ IMAD.WIDE R4, R18, 0x4, R2 ; /* 0x0000000412047825 */ /* 0x000fc800078e0202 */ /*09a0*/ IMAD.WIDE R6, R23.reuse, 0x4, R12 ; /* 0x0000000417067825 */ /* 0x040fe200078e020c */ /*09b0*/ LDG.E R10, [R4.64] ; /* 0x00000004040a7981 */ /* 0x000ea8000c1e1900 */ /*09c0*/ LDG.E R13, [R12.64] ; /* 0x000000040c0d7981 */ /* 0x000ea2000c1e1900 */ /*09d0*/ IMAD.WIDE R8, R23, 0x4, R6 ; /* 0x0000000417087825 */ /* 0x000fc600078e0206 */ /*09e0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x000ee8000c1e1900 */ /*09f0*/ LDG.E R11, [R4.64+0x4] ; /* 0x00000404040b7981 */ /* 0x000ee2000c1e1900 */ /*0a00*/ IMAD.WIDE R2, R23, 0x4, R8 ; /* 0x0000000417027825 */ /* 0x000fc600078e0208 */ /*0a10*/ LDG.E R15, [R8.64] ; /* 0x00000004080f7981 */ /* 0x000f28000c1e1900 */ /*0a20*/ LDG.E R14, [R4.64+0x8] ; /* 0x00000804040e7981 */ /* 0x000f28000c1e1900 */ /*0a30*/ LDG.E R16, [R4.64+0xc] ; /* 0x00000c0404107981 */ /* 0x000f68000c1e1900 */ /*0a40*/ LDG.E R17, [R2.64] ; /* 0x0000000402117981 */ /* 0x000f62000c1e1900 */ /*0a50*/ IADD3 R21, R21, -0x4, RZ ; /* 0xfffffffc15157810 */ /* 0x000fc80007ffe0ff */ /*0a60*/ ISETP.NE.AND P0, PT, R21, RZ, PT ; /* 0x000000ff1500720c */ /* 0x000fe20003f05270 */ /*0a70*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */ /* 0x000fe2000ff1e03f */ /*0a80*/ IADD3 R19, R19, 0x4, RZ ; /* 0x0000000413137810 */ /* 0x000fc60007ffe0ff */ /*0a90*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*0aa0*/ FFMA R10, R13, R10, R32 ; /* 0x0000000a0d0a7223 */ /* 0x004fc80000000020 */ /*0ab0*/ FFMA R10, R7, R11, R10 ; /* 0x0000000b070a7223 */ /* 0x008fe2000000000a */ /*0ac0*/ IMAD.WIDE R12, R23, 0x4, R2 ; /* 0x00000004170c7825 */ /* 0x000fc600078e0202 */ /*0ad0*/ FFMA R10, R15, R14, R10 ; /* 0x0000000e0f0a7223 */ /* 0x010fc8000000000a */ /*0ae0*/ FFMA R32, R17, R16, R10 ; /* 0x0000001011207223 */ /* 0x020fe2000000000a */ /*0af0*/ @P0 BRA 0x960 ; /* 0xfffffe6000000947 */ /* 0x000fea000383ffff */ /*0b00*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fda0003f05270 */ /*0b10*/ @!P0 BRA 0xc30 ; /* 0x0000011000008947 */ /* 0x000fea0003800000 */ /*0b20*/ IADD3 R2, R18, R19, RZ ; /* 0x0000001312027210 */ /* 0x000fe20007ffe0ff */ /*0b30*/ IMAD R4, R19, c[0x0][0x17c], R0 ; /* 0x00005f0013047a24 */ /* 0x000fe200078e0200 */ /*0b40*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fca0000000f00 */ /*0b50*/ IMAD.WIDE R2, R2, R5, c[0x0][0x168] ; /* 0x00005a0002027625 */ /* 0x000fc800078e0205 */ /*0b60*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x000fe200078e0205 */ /*0b70*/ MOV R6, R2 ; /* 0x0000000200067202 */ /* 0x000fc80000000f00 */ /*0b80*/ MOV R2, R6 ; /* 0x0000000600027202 */ /* 0x000fe20000000f00 */ /*0b90*/ LDG.E R7, [R4.64] ; /* 0x0000000404077981 */ /* 0x0000aa000c1e1900 */ /*0ba0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x0002a2000c1e1900 */ /*0bb0*/ IADD3 R20, R20, -0x1, RZ ; /* 0xffffffff14147810 */ /* 0x000fe40007ffe0ff */ /*0bc0*/ MOV R9, c[0x0][0x17c] ; /* 0x00005f0000097a02 */ /* 0x000fc40000000f00 */ /*0bd0*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fe40003f05270 */ /*0be0*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */ /* 0x000fe20007f3e0ff */ /*0bf0*/ IMAD.WIDE R4, R9, 0x4, R4 ; /* 0x0000000409047825 */ /* 0x001fc600078e0204 */ /*0c00*/ IADD3.X R3, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff037210 */ /* 0x002fe20000ffe4ff */ /*0c10*/ FFMA R32, R7, R2, R32 ; /* 0x0000000207207223 */ /* 0x004fcc0000000020 */ /*0c20*/ @P0 BRA 0xb80 ; /* 0xffffff5000000947 */ /* 0x000fea000383ffff */ /*0c30*/ IADD3 R2, R0, R18, RZ ; /* 0x0000001200027210 */ /* 0x000fe40007ffe0ff */ /*0c40*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x000fca0000000f00 */ /*0c50*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fca00078e0203 */ /*0c60*/ STG.E [R2.64], R32 ; /* 0x0000002002007986 */ /* 0x000fe2000c101904 */ /*0c70*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0c80*/ BRA 0xc80; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0c90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ca0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ce0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0d70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#ifndef MATRIXMULTIPLICATIONKERNEL_CU #define MATRIXMULTIPLICATIONKERNEL_CU #include <hiprand/hiprand.h> __global__ void matrixMul(float * g_C, float * g_A, float *g_B,int wa, int wb){ int x = blockIdx.x * blockDim.y + threadIdx.x; int y = blockIdx.y*blockDim.x + threadIdx.y; float result = 0; int i = 0; for(i = 0; i < wa; ++i){ float tempA = g_A[y*wa+i]; float tempB = g_B[i*wb+x]; result += tempA*tempB; } g_C[y*wa+x] = result; } __global__ void matrixMul2(float * g_C, float * g_A, float *g_B,int wa, int wb){ int TILE_SIZE = 16; int x = blockIdx.x*TILE_SIZE + threadIdx.x; int y = blockIdx.y*TILE_SIZE + threadIdx.y; float result = 0; int i = 0; for(i = 0; i < wa; ++i){ float tempA = g_A[y*wa+i]; float tempB = g_B[i*wb+x]; result += tempA*tempB; } g_C[y*wa+x] = result; } __global__ void matrixMul3(float * g_C, float * g_A, float *g_B,int wa, int wb){ const int TILE_WIDTH = 16; int tx = threadIdx.x; int ty = threadIdx.y; int bx = blockIdx.x; int by = blockIdx.y; __shared__ float s_a[TILE_WIDTH][TILE_WIDTH]; __shared__ float s_b[TILE_WIDTH][TILE_WIDTH]; int row = bx*blockDim.y + tx; int col = by*blockDim.x + ty; float result = 0; int i = 0; for(i = 0; i < wa/TILE_WIDTH; ++i){ s_a[tx][ty] = g_A[i*TILE_WIDTH + row*wa +ty]; s_b[tx][ty] = g_B[(i*TILE_WIDTH*wa)+tx*wa+ col]; __syncthreads(); int k =0; for(k=0;k<TILE_WIDTH;++k){ result += s_a[tx][k] * s_b[k][ty]; } __syncthreads(); } g_C[row*wa+col] = result; } #endif
.text .file "matrixMultiplicationKernel.hip" .globl _Z24__device_stub__matrixMulPfS_S_ii # -- Begin function _Z24__device_stub__matrixMulPfS_S_ii .type _Z24__device_stub__matrixMulPfS_S_ii,@function _Z24__device_stub__matrixMulPfS_S_ii: # @_Z24__device_stub__matrixMulPfS_S_ii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) movq %rsp, %rcx movl %r8d, (%rcx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9matrixMulPfS_S_ii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z24__device_stub__matrixMulPfS_S_ii, .Lfunc_end0-_Z24__device_stub__matrixMulPfS_S_ii .cfi_endproc # -- End function .globl _Z25__device_stub__matrixMul2PfS_S_ii # -- Begin function _Z25__device_stub__matrixMul2PfS_S_ii .type _Z25__device_stub__matrixMul2PfS_S_ii,@function _Z25__device_stub__matrixMul2PfS_S_ii: # @_Z25__device_stub__matrixMul2PfS_S_ii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) movq %rsp, %rcx movl %r8d, (%rcx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10matrixMul2PfS_S_ii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z25__device_stub__matrixMul2PfS_S_ii, .Lfunc_end1-_Z25__device_stub__matrixMul2PfS_S_ii .cfi_endproc # -- End function .globl _Z25__device_stub__matrixMul3PfS_S_ii # -- Begin function _Z25__device_stub__matrixMul3PfS_S_ii .type _Z25__device_stub__matrixMul3PfS_S_ii,@function _Z25__device_stub__matrixMul3PfS_S_ii: # @_Z25__device_stub__matrixMul3PfS_S_ii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) movq %rsp, %rcx movl %r8d, (%rcx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10matrixMul3PfS_S_ii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z25__device_stub__matrixMul3PfS_S_ii, .Lfunc_end2-_Z25__device_stub__matrixMul3PfS_S_ii .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9matrixMulPfS_S_ii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10matrixMul2PfS_S_ii, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10matrixMul3PfS_S_ii, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z9matrixMulPfS_S_ii,@object # @_Z9matrixMulPfS_S_ii .section .rodata,"a",@progbits .globl _Z9matrixMulPfS_S_ii .p2align 3, 0x0 _Z9matrixMulPfS_S_ii: .quad _Z24__device_stub__matrixMulPfS_S_ii .size _Z9matrixMulPfS_S_ii, 8 .type _Z10matrixMul2PfS_S_ii,@object # @_Z10matrixMul2PfS_S_ii .globl _Z10matrixMul2PfS_S_ii .p2align 3, 0x0 _Z10matrixMul2PfS_S_ii: .quad _Z25__device_stub__matrixMul2PfS_S_ii .size _Z10matrixMul2PfS_S_ii, 8 .type _Z10matrixMul3PfS_S_ii,@object # @_Z10matrixMul3PfS_S_ii .globl _Z10matrixMul3PfS_S_ii .p2align 3, 0x0 _Z10matrixMul3PfS_S_ii: .quad _Z25__device_stub__matrixMul3PfS_S_ii .size _Z10matrixMul3PfS_S_ii, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z9matrixMulPfS_S_ii" .size .L__unnamed_1, 21 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z10matrixMul2PfS_S_ii" .size .L__unnamed_2, 23 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "_Z10matrixMul3PfS_S_ii" .size .L__unnamed_3, 23 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z24__device_stub__matrixMulPfS_S_ii .addrsig_sym _Z25__device_stub__matrixMul2PfS_S_ii .addrsig_sym _Z25__device_stub__matrixMul3PfS_S_ii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z9matrixMulPfS_S_ii .addrsig_sym _Z10matrixMul2PfS_S_ii .addrsig_sym _Z10matrixMul3PfS_S_ii .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z9matrixMulPfS_S_ii ; -- Begin function _Z9matrixMulPfS_S_ii .globl _Z9matrixMulPfS_S_ii .p2align 8 .type _Z9matrixMulPfS_S_ii,@function _Z9matrixMulPfS_S_ii: ; @_Z9matrixMulPfS_S_ii ; %bb.0: s_clause 0x1 s_load_b32 s8, s[0:1], 0x2c s_load_b256 s[0:7], s[0:1], 0x0 v_bfe_u32 v1, v0, 10, 10 s_waitcnt lgkmcnt(0) s_and_b32 s9, s8, 0xffff s_lshr_b32 s8, s8, 16 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, s15, s9, v[1:2] v_and_b32_e32 v3, 0x3ff, v0 s_cmp_lt_i32 s6, 1 v_mad_u64_u32 v[0:1], null, s14, s8, v[3:4] s_delay_alu instid0(VALU_DEP_3) v_mul_lo_u32 v1, v2, s6 s_cbranch_scc1 .LBB0_3 ; %bb.1: ; %.lr.ph.preheader s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_ashrrev_i32_e32 v2, 31, v1 v_mov_b32_e32 v6, 0 v_mov_b32_e32 v4, v0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[1:2] v_add_co_u32 v2, vcc_lo, s2, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo .LBB0_2: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_ashrrev_i32_e32 v5, 31, v4 s_add_i32 s6, s6, -1 s_cmp_lg_u32 s6, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[7:8], 2, v[4:5] v_add_nc_u32_e32 v4, s7, v4 v_add_co_u32 v7, vcc_lo, s4, v7 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo global_load_b32 v5, v[2:3], off global_load_b32 v7, v[7:8], off v_add_co_u32 v2, vcc_lo, v2, 4 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo s_waitcnt vmcnt(0) v_fmac_f32_e32 v6, v5, v7 s_cbranch_scc1 .LBB0_2 s_branch .LBB0_4 .LBB0_3: v_mov_b32_e32 v6, 0 .LBB0_4: ; %._crit_edge s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v0, v1, v0 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b32 v[0:1], v6, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9matrixMulPfS_S_ii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z9matrixMulPfS_S_ii, .Lfunc_end0-_Z9matrixMulPfS_S_ii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 292 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z10matrixMul2PfS_S_ii ; -- Begin function _Z10matrixMul2PfS_S_ii .globl _Z10matrixMul2PfS_S_ii .p2align 8 .type _Z10matrixMul2PfS_S_ii,@function _Z10matrixMul2PfS_S_ii: ; @_Z10matrixMul2PfS_S_ii ; %bb.0: s_load_b256 s[0:7], s[0:1], 0x0 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v2, 0x3ff, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshl_add_u32 v1, s15, 4, v1 v_lshl_add_u32 v5, s14, 4, v2 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_2) v_mul_lo_u32 v0, v1, s6 s_cmp_lt_i32 s6, 1 s_cbranch_scc1 .LBB1_3 ; %bb.1: ; %.lr.ph.preheader s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v1, 31, v0 v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v3, v5 v_lshlrev_b64 v[1:2], 2, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, s2, v1 v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo .LBB1_2: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_ashrrev_i32_e32 v4, 31, v3 s_add_i32 s6, s6, -1 s_cmp_lg_u32 s6, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[7:8], 2, v[3:4] v_add_nc_u32_e32 v3, s7, v3 v_add_co_u32 v7, vcc_lo, s4, v7 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo global_load_b32 v4, v[1:2], off global_load_b32 v7, v[7:8], off v_add_co_u32 v1, vcc_lo, v1, 4 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo s_waitcnt vmcnt(0) v_fmac_f32_e32 v6, v4, v7 s_cbranch_scc1 .LBB1_2 s_branch .LBB1_4 .LBB1_3: v_mov_b32_e32 v6, 0 .LBB1_4: ; %._crit_edge s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v0, v0, v5 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b32 v[0:1], v6, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10matrixMul2PfS_S_ii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 32 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z10matrixMul2PfS_S_ii, .Lfunc_end1-_Z10matrixMul2PfS_S_ii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 264 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z10matrixMul3PfS_S_ii ; -- Begin function _Z10matrixMul3PfS_S_ii .globl _Z10matrixMul3PfS_S_ii .p2align 8 .type _Z10matrixMul3PfS_S_ii,@function _Z10matrixMul3PfS_S_ii: ; @_Z10matrixMul3PfS_S_ii ; %bb.0: s_clause 0x1 s_load_b32 s3, s[0:1], 0x2c s_load_b32 s2, s[0:1], 0x18 v_and_b32_e32 v1, 0x3ff, v0 s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 v_bfe_u32 v0, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s8, s3, 16 s_and_b32 s3, s3, 0xffff v_mad_u64_u32 v[4:5], null, s14, s8, v[1:2] v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1] s_cmp_lt_i32 s2, 16 s_delay_alu instid0(VALU_DEP_2) v_mul_lo_u32 v3, v4, s2 v_mov_b32_e32 v4, 0 s_cbranch_scc1 .LBB2_5 ; %bb.1: ; %.lr.ph v_lshlrev_b32_e32 v4, 2, v0 v_lshlrev_b32_e32 v5, 6, v1 s_ashr_i32 s3, s2, 31 s_delay_alu instid0(VALU_DEP_4) v_add_nc_u32_e32 v0, v3, v0 s_lshr_b32 s3, s3, 28 v_add_nc_u32_e32 v6, 0x400, v4 v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v7, v5, v4 s_add_i32 s3, s2, s3 s_mov_b32 s8, 0 s_delay_alu instid0(VALU_DEP_2) v_add_nc_u32_e32 v8, v6, v5 s_ashr_i32 s3, s3, 4 .LBB2_2: ; =>This Loop Header: Depth=1 ; Child Loop BB2_3 Depth 2 s_lshl_b32 s9, s8, 4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v10, s9, v1 v_add_nc_u32_e32 v9, s9, v0 s_mov_b32 s9, 0 v_mad_u64_u32 v[11:12], null, v10, s2, v[2:3] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v10, 31, v9 v_lshlrev_b64 v[9:10], 2, v[9:10] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v12, 31, v11 v_add_co_u32 v9, vcc_lo, s6, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[11:12], 2, v[11:12] v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v11, vcc_lo, s0, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo global_load_b32 v10, v[9:10], off global_load_b32 v11, v[11:12], off v_mov_b32_e32 v9, v6 s_waitcnt vmcnt(1) ds_store_b32 v7, v10 s_waitcnt vmcnt(0) ds_store_b32 v8, v11 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv .LBB2_3: ; Parent Loop BB2_2 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e32 v10, s9, v5 s_add_i32 s9, s9, 4 ds_load_b32 v11, v9 ds_load_b32 v10, v10 v_add_nc_u32_e32 v9, 64, v9 s_cmp_lg_u32 s9, 64 s_waitcnt lgkmcnt(0) v_fmac_f32_e32 v4, v10, v11 s_cbranch_scc1 .LBB2_3 ; %bb.4: ; in Loop: Header=BB2_2 Depth=1 s_add_i32 s8, s8, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s8, s3 s_barrier buffer_gl0_inv s_cbranch_scc1 .LBB2_2 .LBB2_5: ; %._crit_edge s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v0, v3, v2 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v0, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo global_store_b32 v[0:1], v4, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10matrixMul3PfS_S_ii .amdhsa_group_segment_fixed_size 2048 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 13 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end2: .size _Z10matrixMul3PfS_S_ii, .Lfunc_end2-_Z10matrixMul3PfS_S_ii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 456 ; NumSgprs: 18 ; NumVgprs: 13 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 2048 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 13 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9matrixMulPfS_S_ii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z9matrixMulPfS_S_ii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 9 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 32 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10matrixMul2PfS_S_ii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z10matrixMul2PfS_S_ii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 9 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 2048 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10matrixMul3PfS_S_ii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z10matrixMul3PfS_S_ii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 13 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
0e58dac09025512296a5d2e295e238684e3c866b
#include <stdio.h> __global__ void VecAdd(float * A, float * B, float * C) { int i = blockIdx.x * blockDim.x + threadIdx.x; C[i] = A[i] + B[i]; } void VecPrint(float * V, int len) { int to_print = 10; if (to_print > len) to_print = len; for (int i=0; i<to_print; i++) { printf("%4.2f", V[i]); if (i<to_print-1) printf(", "); } if (to_print < len) printf("..."); printf("\n"); } int main() { int N = 1024; size_t size = N * sizeof(float); // Allocate input vectors h_A, h_B and h_C in host memory float* h_A = (float*)malloc(size); float* h_B = (float*)malloc(size); float* h_C = (float*)malloc(size); // Initialize input vectors for (int i=0; i<N; i++) { h_A[i] = 2*i+1; h_B[i] = 4*i+1; h_C[i] = 0; } // Print initialised vectors VecPrint(h_A, N); VecPrint(h_B, N); VecPrint(h_C, N); // Allocate vectors in device memory float* d_A; cudaMalloc(&d_A, size); float* d_B; cudaMalloc(&d_B, size); float* d_C; cudaMalloc(&d_C, size); // Copy vectors from host memory to device memory cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice); cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice); // Run the add kernel int blocks = 3; int threads_per_block = N/blocks; VecAdd<<<blocks, threads_per_block>>>(d_A, d_B, d_C); // Print result cudaMemcpy(h_C, d_C, size, cudaMemcpyDeviceToHost); VecPrint(h_C, N); // Free device memory cudaFree(d_A); cudaFree(d_B); cudaFree(d_C); // Free host memory delete[] h_A; delete[] h_B; return 0; }
.file "tmpxft_0025de99_00000000-6_vecadd.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "%4.2f" .LC1: .string ", " .LC2: .string "..." .LC3: .string "\n" .text .globl _Z8VecPrintPfi .type _Z8VecPrintPfi, @function _Z8VecPrintPfi: .LFB2027: .cfi_startproc endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 leaq .LC0(%rip), %r14 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 movq %rdi, %r13 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 movl %esi, %r12d pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movl $10, %ebx cmpl %ebx, %esi cmovle %esi, %ebx xorl %ebp, %ebp .L3: cmpl %ebp, %ebx jle .L9 movq %r14, %rsi movl $2, %edi movb $1, %al cvtss2sd 0(%r13,%rbp,4), %xmm0 call __printf_chk@PLT leal -1(%rbx), %eax cmpl %ebp, %eax jle .L4 leaq .LC1(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L4: incq %rbp jmp .L3 .L9: cmpl %r12d, %ebx jge .L6 leaq .LC2(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L6: popq %rbx .cfi_def_cfa_offset 40 leaq .LC3(%rip), %rsi popq %rbp .cfi_def_cfa_offset 32 movl $2, %edi popq %r12 .cfi_def_cfa_offset 24 xorl %eax, %eax popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp __printf_chk@PLT .cfi_endproc .LFE2027: .size _Z8VecPrintPfi, .-_Z8VecPrintPfi .globl _Z29__device_stub__Z6VecAddPfS_S_PfS_S_ .type _Z29__device_stub__Z6VecAddPfS_S_PfS_S_, @function _Z29__device_stub__Z6VecAddPfS_S_PfS_S_: .LFB2053: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L10 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z6VecAddPfS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L10: movq 120(%rsp), %rax subq %fs:40, %rax je .L12 call __stack_chk_fail@PLT .L12: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z29__device_stub__Z6VecAddPfS_S_PfS_S_, .-_Z29__device_stub__Z6VecAddPfS_S_PfS_S_ .globl _Z6VecAddPfS_S_ .type _Z6VecAddPfS_S_, @function _Z6VecAddPfS_S_: .LFB2054: .cfi_startproc endbr64 jmp _Z29__device_stub__Z6VecAddPfS_S_PfS_S_ .cfi_endproc .LFE2054: .size _Z6VecAddPfS_S_, .-_Z6VecAddPfS_S_ .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movl $4096, %edi pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $64, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax call malloc@PLT movl $4096, %edi movq %rax, %r12 call malloc@PLT movl $4096, %edi movq %rax, %rbp call malloc@PLT movl $1, %edx movq %rax, %rbx xorl %eax, %eax .L16: cvtsi2ssl %edx, %xmm0 leal 1(%rax), %ecx addl $2, %edx movss %xmm0, (%r12,%rax) cvtsi2ssl %ecx, %xmm0 movss %xmm0, 0(%rbp,%rax) addq $4, %rax cmpl $2049, %edx jne .L16 xorl %eax, %eax movl $1024, %ecx movq %rbx, %rdi movl $1024, %esi rep stosl movq %r12, %rdi call _Z8VecPrintPfi movl $1024, %esi movq %rbp, %rdi call _Z8VecPrintPfi movl $1024, %esi movq %rbx, %rdi call _Z8VecPrintPfi leaq 8(%rsp), %rdi movl $4096, %esi call cudaMalloc@PLT leaq 16(%rsp), %rdi movl $4096, %esi call cudaMalloc@PLT leaq 24(%rsp), %rdi movl $4096, %esi call cudaMalloc@PLT movq 8(%rsp), %rdi movl $1, %ecx movq %r12, %rsi movl $4096, %edx call cudaMemcpy@PLT movq 16(%rsp), %rdi movl $1, %ecx movq %rbp, %rsi movl $4096, %edx call cudaMemcpy@PLT xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $4294967637, %rdx movl $1, %esi movabsq $4294967299, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L17 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movq 8(%rsp), %rdi call _Z29__device_stub__Z6VecAddPfS_S_PfS_S_ .L17: movq 24(%rsp), %rsi movl $2, %ecx movl $4096, %edx movq %rbx, %rdi call cudaMemcpy@PLT movl $1024, %esi movq %rbx, %rdi call _Z8VecPrintPfi movq 8(%rsp), %rdi call cudaFree@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call cudaFree@PLT movq %r12, %rdi call _ZdaPv@PLT movq %rbp, %rdi call _ZdaPv@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L18 call __stack_chk_fail@PLT .L18: addq $64, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .section .rodata.str1.1 .LC4: .string "_Z6VecAddPfS_S_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2056: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi leaq _Z6VecAddPfS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2056: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6VecAddPfS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e220000002500 */ /*0020*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0050*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fc800078e0203 */ /*0060*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x000fc800078e0207 */ /*0070*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x0c0fe400078e0207 */ /*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*0090*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea2000c1e1900 */ /*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00b0*/ FADD R9, R2, R5 ; /* 0x0000000502097221 */ /* 0x004fca0000000000 */ /*00c0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> __global__ void VecAdd(float * A, float * B, float * C) { int i = blockIdx.x * blockDim.x + threadIdx.x; C[i] = A[i] + B[i]; } void VecPrint(float * V, int len) { int to_print = 10; if (to_print > len) to_print = len; for (int i=0; i<to_print; i++) { printf("%4.2f", V[i]); if (i<to_print-1) printf(", "); } if (to_print < len) printf("..."); printf("\n"); } int main() { int N = 1024; size_t size = N * sizeof(float); // Allocate input vectors h_A, h_B and h_C in host memory float* h_A = (float*)malloc(size); float* h_B = (float*)malloc(size); float* h_C = (float*)malloc(size); // Initialize input vectors for (int i=0; i<N; i++) { h_A[i] = 2*i+1; h_B[i] = 4*i+1; h_C[i] = 0; } // Print initialised vectors VecPrint(h_A, N); VecPrint(h_B, N); VecPrint(h_C, N); // Allocate vectors in device memory float* d_A; hipMalloc(&d_A, size); float* d_B; hipMalloc(&d_B, size); float* d_C; hipMalloc(&d_C, size); // Copy vectors from host memory to device memory hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice); hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice); // Run the add kernel int blocks = 3; int threads_per_block = N/blocks; VecAdd<<<blocks, threads_per_block>>>(d_A, d_B, d_C); // Print result hipMemcpy(h_C, d_C, size, hipMemcpyDeviceToHost); VecPrint(h_C, N); // Free device memory hipFree(d_A); hipFree(d_B); hipFree(d_C); // Free host memory delete[] h_A; delete[] h_B; return 0; }
.text .file "vecadd.hip" .globl _Z21__device_stub__VecAddPfS_S_ # -- Begin function _Z21__device_stub__VecAddPfS_S_ .type _Z21__device_stub__VecAddPfS_S_,@function _Z21__device_stub__VecAddPfS_S_: # @_Z21__device_stub__VecAddPfS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6VecAddPfS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__VecAddPfS_S_, .Lfunc_end0-_Z21__device_stub__VecAddPfS_S_ .cfi_endproc # -- End function .globl _Z8VecPrintPfi # -- Begin function _Z8VecPrintPfi .type _Z8VecPrintPfi,@function _Z8VecPrintPfi: # @_Z8VecPrintPfi .cfi_startproc # %bb.0: testl %esi, %esi jle .LBB1_8 # %bb.1: # %.lr.ph pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl %esi, %ebx movq %rdi, %r14 cmpl $10, %esi movl $10, %r15d cmovll %esi, %r15d leal -1(%r15), %r12d xorl %r13d, %r13d .LBB1_2: # =>This Inner Loop Header: Depth=1 xorps %xmm0, %xmm0 cvtss2sd (%r14,%r13,4), %xmm0 movl $.L.str, %edi movb $1, %al callq printf cmpq %r12, %r13 jae .LBB1_4 # %bb.3: # in Loop: Header=BB1_2 Depth=1 movl $.L.str.1, %edi xorl %eax, %eax callq printf .LBB1_4: # in Loop: Header=BB1_2 Depth=1 incq %r13 cmpq %r13, %r15 jne .LBB1_2 # %bb.5: # %._crit_edge cmpl $10, %ebx jle .LBB1_7 # %bb.6: movl $.L.str.2, %edi xorl %eax, %eax callq printf .LBB1_7: popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 .cfi_restore %rbx .cfi_restore %r12 .cfi_restore %r13 .cfi_restore %r14 .cfi_restore %r15 .LBB1_8: # %._crit_edge.thread movl $10, %edi jmp putchar@PLT # TAILCALL .Lfunc_end1: .size _Z8VecPrintPfi, .Lfunc_end1-_Z8VecPrintPfi .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $32, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl $4096, %edi # imm = 0x1000 callq malloc movq %rax, %rbx movl $4096, %edi # imm = 0x1000 callq malloc movq %rax, %r14 movl $1, %edi movl $4096, %esi # imm = 0x1000 callq calloc@PLT movq %rax, %r15 movl $1, %eax xorl %ecx, %ecx .LBB2_1: # =>This Inner Loop Header: Depth=1 leal 1(%rcx), %edx xorps %xmm0, %xmm0 cvtsi2ss %edx, %xmm0 movss %xmm0, (%rbx,%rcx,2) xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 movss %xmm0, (%r14,%rcx,2) addl $4, %eax addq $2, %rcx cmpq $2048, %rcx # imm = 0x800 jne .LBB2_1 # %bb.2: movq %rbx, %rdi movl $1024, %esi # imm = 0x400 callq _Z8VecPrintPfi movq %r14, %rdi movl $1024, %esi # imm = 0x400 callq _Z8VecPrintPfi movq %r15, %rdi movl $1024, %esi # imm = 0x400 callq _Z8VecPrintPfi leaq 24(%rsp), %r12 movl $4096, %esi # imm = 0x1000 movq %r12, %rdi callq hipMalloc leaq 16(%rsp), %r13 movl $4096, %esi # imm = 0x1000 movq %r13, %rdi callq hipMalloc leaq 8(%rsp), %rdi movl $4096, %esi # imm = 0x1000 callq hipMalloc movq (%r12), %rdi movl $4096, %edx # imm = 0x1000 movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movq (%r13), %rdi movl $4096, %edx # imm = 0x1000 movq %r14, %rsi movl $1, %ecx callq hipMemcpy movabsq $4294967299, %rdi # imm = 0x100000003 leaq 338(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_4 # %bb.3: movq 24(%rsp), %rdi movq 16(%rsp), %rsi movq 8(%rsp), %rdx callq _Z21__device_stub__VecAddPfS_S_ .LBB2_4: movq 8(%rsp), %rsi movl $4096, %edx # imm = 0x1000 movq %r15, %rdi movl $2, %ecx callq hipMemcpy movq %r15, %rdi movl $1024, %esi # imm = 0x400 callq _Z8VecPrintPfi movq 24(%rsp), %rdi callq hipFree movq 16(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree movq %rbx, %rdi callq _ZdaPv movq %r14, %rdi callq _ZdaPv xorl %eax, %eax addq $32, %rsp .cfi_def_cfa_offset 48 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6VecAddPfS_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z6VecAddPfS_S_,@object # @_Z6VecAddPfS_S_ .section .rodata,"a",@progbits .globl _Z6VecAddPfS_S_ .p2align 3, 0x0 _Z6VecAddPfS_S_: .quad _Z21__device_stub__VecAddPfS_S_ .size _Z6VecAddPfS_S_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%4.2f" .size .L.str, 6 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz ", " .size .L.str.1, 3 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "..." .size .L.str.2, 4 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6VecAddPfS_S_" .size .L__unnamed_1, 16 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__VecAddPfS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6VecAddPfS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6VecAddPfS_S_ ; -- Begin function _Z6VecAddPfS_S_ .globl _Z6VecAddPfS_S_ .p2align 8 .type _Z6VecAddPfS_S_,@function _Z6VecAddPfS_S_: ; @_Z6VecAddPfS_S_ ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x24 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6VecAddPfS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6VecAddPfS_S_, .Lfunc_end0-_Z6VecAddPfS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 152 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6VecAddPfS_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z6VecAddPfS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
1c81ba0c26547f558ad7a0c6097e23b988f8426e
__global__ void vecAdd(float *in1, float *in2, float *out, int len) { int i = blockIdx.x * blockDim.x + threadIdx.x; if( i<len ) { out[i] = in1[i]+in2[i]; } }
.file "tmpxft_0026e41f_00000000-6_1_16180_103399.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .type _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i, @function _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z6vecAddPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .globl _Z6vecAddPfS_S_i .type _Z6vecAddPfS_S_i, @function _Z6vecAddPfS_S_i: .LFB2033: .cfi_startproc endbr64 jmp _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .cfi_endproc .LFE2033: .size _Z6vecAddPfS_S_i, .-_Z6vecAddPfS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z6vecAddPfS_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z6vecAddPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6vecAddPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */ /* 0x004fca0000000000 */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> __global__ void vecAdd(float *in1, float *in2, float *out, int len) { int i = blockIdx.x * blockDim.x + threadIdx.x; if( i<len ) { out[i] = in1[i]+in2[i]; } }
.text .file "1_16180_103399.hip" .globl _Z21__device_stub__vecAddPfS_S_i # -- Begin function _Z21__device_stub__vecAddPfS_S_i .type _Z21__device_stub__vecAddPfS_S_i,@function _Z21__device_stub__vecAddPfS_S_i: # @_Z21__device_stub__vecAddPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6vecAddPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__vecAddPfS_S_i, .Lfunc_end0-_Z21__device_stub__vecAddPfS_S_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6vecAddPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z6vecAddPfS_S_i,@object # @_Z6vecAddPfS_S_i .section .rodata,"a",@progbits .globl _Z6vecAddPfS_S_i .p2align 3, 0x0 _Z6vecAddPfS_S_i: .quad _Z21__device_stub__vecAddPfS_S_i .size _Z6vecAddPfS_S_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z6vecAddPfS_S_i" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__vecAddPfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6vecAddPfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6vecAddPfS_S_i ; -- Begin function _Z6vecAddPfS_S_i .globl _Z6vecAddPfS_S_i .p2align 8 .type _Z6vecAddPfS_S_i,@function _Z6vecAddPfS_S_i: ; @_Z6vecAddPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6vecAddPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6vecAddPfS_S_i, .Lfunc_end0-_Z6vecAddPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 180 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6vecAddPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z6vecAddPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
a348e0fde8bcb7d511487f99a29cd6743a9c6d8e
#include <cuda_runtime.h> #include <stdio.h> __global__ void kernel() { int tid = threadIdx.x; if (tid < 8) { printf("inside the kernel\n"); } else { printf("outside the kernel\n"); } } int cuda(int a, int b) { kernel<<<1, 10>>>(); cudaDeviceSynchronize(); return 0; }
.file "tmpxft_002b55c3_00000000-6_cuda_test.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z24__device_stub__Z6kernelvv .type _Z24__device_stub__Z6kernelvv, @function _Z24__device_stub__Z6kernelvv: .LFB2052: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 72(%rsp) movabsq $4294967297, %rax leaq 8(%rsp), %rcx movq %rsp, %rdx leaq 28(%rsp), %rsi leaq 16(%rsp), %rdi movl $1, 24(%rsp) movl $1, 36(%rsp) movq %rax, 16(%rsp) movq %rax, 28(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 8(%rsp) .cfi_def_cfa_offset 104 leaq _Z6kernelv(%rip), %rdi pushq 8(%rsp) .cfi_def_cfa_offset 112 movq 44(%rsp), %rcx movl 52(%rsp), %r8d movq 32(%rsp), %rsi movl 40(%rsp), %edx leaq 80(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L2: movq 72(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z24__device_stub__Z6kernelvv, .-_Z24__device_stub__Z6kernelvv .globl _Z6kernelv .type _Z6kernelv, @function _Z6kernelv: .LFB2053: .cfi_startproc endbr64 jmp _Z24__device_stub__Z6kernelvv .cfi_endproc .LFE2053: .size _Z6kernelv, .-_Z6kernelv .globl _Z4cudaii .type _Z4cudaii, @function _Z4cudaii: .LFB2027: .cfi_startproc endbr64 movl $2147483653, %edx subq $40, %rsp .cfi_def_cfa_offset 48 xorl %r9d, %r9d xorl %r8d, %r8d addq %rdx, %rdx movl $1, %ecx movl $1, %esi movabsq $4294967297, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 call _Z24__device_stub__Z6kernelvv .L9: call cudaDeviceSynchronize@PLT xorl %eax, %eax addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _Z4cudaii, .-_Z4cudaii .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z6kernelv" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z6kernelv(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6kernelv .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e240000002100 */ /*0020*/ ISETP.GE.AND P0, PT, R0, 0x8, PT ; /* 0x000000080000780c */ /* 0x001fda0003f06270 */ /*0030*/ @!P0 BRA 0x120 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*0040*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe20000000f00 */ /*0050*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x10] ; /* 0x01000400ff047624 */ /* 0x000fe200078e00ff */ /*0060*/ CS2R R6, SRZ ; /* 0x0000000000067805 */ /* 0x000fe2000001ff00 */ /*0070*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x14] ; /* 0x01000500ff057624 */ /* 0x000fe200078e00ff */ /*0080*/ LDC.64 R2, c[0x4][R0] ; /* 0x0100000000027b82 */ /* 0x00006c0000000a00 */ /*0090*/ LEPC R8 ; /* 0x000000000008734e */ /* 0x000fe40000000000 */ /*00a0*/ MOV R11, 0x110 ; /* 0x00000110000b7802 */ /* 0x000fe40000000f00 */ /*00b0*/ MOV R20, 0x90 ; /* 0x0000009000147802 */ /* 0x000fe40000000f00 */ /*00c0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*00d0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x001fc40000000f00 */ /*00e0*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e108 */ /*00f0*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2509 */ /*0100*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */ /* 0x002fea0003c00000 */ /*0110*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0120*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe20000000f00 */ /*0130*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*0140*/ CS2R R6, SRZ ; /* 0x0000000000067805 */ /* 0x000fe2000001ff00 */ /*0150*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x000fe200078e00ff */ /*0160*/ LDC.64 R2, c[0x4][R0] ; /* 0x0100000000027b82 */ /* 0x00006c0000000a00 */ /*0170*/ LEPC R8 ; /* 0x000000000008734e */ /* 0x000fe40000000000 */ /*0180*/ MOV R11, 0x1f0 ; /* 0x000001f0000b7802 */ /* 0x000fe40000000f00 */ /*0190*/ MOV R20, 0x170 ; /* 0x0000017000147802 */ /* 0x000fe40000000f00 */ /*01a0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*01b0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x001fc40000000f00 */ /*01c0*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e108 */ /*01d0*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2509 */ /*01e0*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */ /* 0x002fea0003c00000 */ /*01f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0200*/ BRA 0x200; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> __global__ void kernel() { int tid = threadIdx.x; if (tid < 8) { printf("inside the kernel\n"); } else { printf("outside the kernel\n"); } } int cuda(int a, int b) { kernel<<<1, 10>>>(); hipDeviceSynchronize(); return 0; }
.text .file "cuda_test.hip" .globl _Z21__device_stub__kernelv # -- Begin function _Z21__device_stub__kernelv .type _Z21__device_stub__kernelv,@function _Z21__device_stub__kernelv: # @_Z21__device_stub__kernelv .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $56, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rbx leaq 24(%rsp), %r14 leaq 16(%rsp), %r15 leaq 8(%rsp), %r12 movq %rbx, %rdi movq %r14, %rsi movq %r15, %rdx movq %r12, %rcx callq __hipPopCallConfiguration movq (%rbx), %rsi movl 8(%rbx), %edx movq (%r14), %rcx movl 8(%r14), %r8d movq %rsp, %r9 movl $_Z6kernelv, %edi pushq (%r12) .cfi_adjust_cfa_offset 8 pushq (%r15) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $72, %rsp .cfi_adjust_cfa_offset -72 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__kernelv, .Lfunc_end0-_Z21__device_stub__kernelv .cfi_endproc # -- End function .globl _Z4cudaii # -- Begin function _Z4cudaii .type _Z4cudaii,@function _Z4cudaii: # @_Z4cudaii .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movabsq $4294967297, %rdi # imm = 0x100000001 leaq 9(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: callq _Z21__device_stub__kernelv .LBB1_2: callq hipDeviceSynchronize xorl %eax, %eax popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z4cudaii, .Lfunc_end1-_Z4cudaii .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6kernelv, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z6kernelv,@object # @_Z6kernelv .section .rodata,"a",@progbits .globl _Z6kernelv .p2align 3, 0x0 _Z6kernelv: .quad _Z21__device_stub__kernelv .size _Z6kernelv, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z6kernelv" .size .L__unnamed_1, 11 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__kernelv .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6kernelv .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .p2align 2 ; -- Begin function __ockl_printf_append_string_n .type __ockl_printf_append_string_n,@function __ockl_printf_append_string_n: ; @__ockl_printf_append_string_n ; %bb.0: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) s_load_b64 s[2:3], s[8:9], 0x50 v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2 v_mbcnt_lo_u32_b32 v2, -1, 0 s_mov_b32 s9, 0 s_mov_b32 s0, exec_lo s_delay_alu instid0(VALU_DEP_2) v_cmpx_ne_u64_e32 0, v[6:7] s_xor_b32 s8, exec_lo, s0 s_cbranch_execz .LBB0_87 ; %bb.1: v_dual_mov_b32 v33, 0 :: v_dual_and_b32 v0, -3, v0 v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 s_delay_alu instid0(VALU_DEP_2) v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v12, v0 s_mov_b32 s10, 0 .LBB0_2: ; =>This Loop Header: Depth=1 ; Child Loop BB0_5 Depth 2 ; Child Loop BB0_13 Depth 2 ; Child Loop BB0_21 Depth 2 ; Child Loop BB0_29 Depth 2 ; Child Loop BB0_37 Depth 2 ; Child Loop BB0_45 Depth 2 ; Child Loop BB0_53 Depth 2 ; Child Loop BB0_61 Depth 2 ; Child Loop BB0_69 Depth 2 ; Child Loop BB0_75 Depth 2 ; Child Loop BB0_84 Depth 2 v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5] ; implicit-def: $sgpr4 s_mov_b32 s0, exec_lo v_dual_cndmask_b32 v1, 0, v5 :: v_dual_cndmask_b32 v0, 56, v4 s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_u32_e32 8, v0 s_xor_b32 s1, exec_lo, s0 s_cbranch_execz .LBB0_8 ; %bb.3: ; in Loop: Header=BB0_2 Depth=1 s_waitcnt vmcnt(0) v_mov_b32_e32 v14, 0 v_mov_b32_e32 v15, 0 s_mov_b32 s6, exec_lo v_cmpx_ne_u32_e32 0, v0 s_cbranch_execz .LBB0_7 ; %bb.4: ; %.preheader31.preheader ; in Loop: Header=BB0_2 Depth=1 v_lshlrev_b64 v[8:9], 3, v[0:1] v_dual_mov_b32 v14, 0 :: v_dual_mov_b32 v17, v7 v_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v16, v6 s_mov_b64 s[4:5], 0 s_mov_b32 s7, 0 .LBB0_5: ; %.preheader31 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 flat_load_u8 v3, v[16:17] v_mov_b32_e32 v19, s9 v_add_co_u32 v16, vcc_lo, v16, 1 v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo s_waitcnt vmcnt(0) lgkmcnt(0) v_and_b32_e32 v18, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_lshlrev_b64 v[18:19], s4, v[18:19] s_add_u32 s4, s4, 8 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e64 s0, s4, v8 v_or_b32_e32 v15, v19, v15 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_or_b32_e32 v14, v18, v14 s_or_b32 s7, s0, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB0_5 ; %bb.6: ; %Flow163 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s7 .LBB0_7: ; %Flow165 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 s_mov_b32 s4, 0 .LBB0_8: ; %Flow167 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s1 v_mov_b32_e32 v9, v7 v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v8, v6 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_10 ; %bb.9: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x2 flat_load_u8 v3, v[6:7] flat_load_u8 v8, v[6:7] offset:1 flat_load_u8 v9, v[6:7] offset:2 s_waitcnt vmcnt(3) s_clause 0x2 flat_load_u8 v14, v[6:7] offset:3 flat_load_u8 v15, v[6:7] offset:5 flat_load_u8 v16, v[6:7] offset:4 v_mov_b32_e32 v17, v33 s_waitcnt vmcnt(5) lgkmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v8, 8, v8 s_clause 0x1 flat_load_u8 v18, v[6:7] offset:7 flat_load_d16_hi_u8 v17, v[6:7] offset:6 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v9, 16, v9 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v14, 24, v14 v_or_b32_e32 v3, v8, v3 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v8, 8, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_or3_b32 v3, v3, v9, v14 s_waitcnt vmcnt(2) v_or3_b32 v8, 0, v16, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_or3_b32 v14, v3, 0, 0 v_add_nc_u32_e32 v3, -8, v0 v_or3_b32 v14, v14, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v9, 24, v18 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v15, v8, v17, v9 v_add_co_u32 v8, vcc_lo, v6, 8 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo .LBB0_10: ; %.loopexit32 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v3 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_16 ; %bb.11: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v3 s_cbranch_execz .LBB0_15 ; %bb.12: ; %.preheader29.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s11, 0 s_mov_b64 s[4:5], 0 .LBB0_13: ; %.preheader29 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v18, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v19, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v3 flat_load_u8 v18, v[18:19] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v19, s9 :: v_dual_and_b32 v18, 0xffff, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[18:19], s0, v[18:19] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s11, vcc_lo, s11 v_or_b32_e32 v17, v19, v17 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v16, v18, v16 s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_13 ; %bb.14: ; %Flow158 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_15: ; %Flow160 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr3 .LBB0_16: ; %Flow162 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v20, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_18 ; %bb.17: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v16, v[8:9] flat_load_u8 v17, v[8:9] offset:1 flat_load_u8 v18, v[8:9] offset:2 flat_load_u8 v19, v[8:9] offset:3 flat_load_u8 v20, v[8:9] offset:5 flat_load_u8 v21, v[8:9] offset:4 v_mov_b32_e32 v22, v33 s_waitcnt vmcnt(5) lgkmcnt(0) v_and_b32_e32 v16, 0xffff, v16 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v17, 8, v17 s_clause 0x1 flat_load_u8 v23, v[8:9] offset:7 flat_load_d16_hi_u8 v22, v[8:9] offset:6 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v18, 16, v18 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v19, 24, v19 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v16, v17, v16 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v17, 8, v20 v_add_nc_u32_e32 v20, -8, v3 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo v_or3_b32 v16, v16, v18, v19 s_waitcnt vmcnt(2) v_or3_b32 v17, 0, v21, v17 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v16, v16, 0, 0 v_or3_b32 v16, v16, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v18, 24, v23 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v17, v17, v22, v18 .LBB0_18: ; %.loopexit30 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v20 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_24 ; %bb.19: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v20 s_cbranch_execz .LBB0_23 ; %bb.20: ; %.preheader27.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s11, 0 s_mov_b64 s[4:5], 0 .LBB0_21: ; %.preheader27 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v21, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v22, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v20 flat_load_u8 v3, v[21:22] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v22, s9 :: v_dual_and_b32 v21, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[21:22], s0, v[21:22] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s11, vcc_lo, s11 v_or_b32_e32 v19, v22, v19 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v18, v21, v18 s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_21 ; %bb.22: ; %Flow153 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_23: ; %Flow155 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr20 .LBB0_24: ; %Flow157 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v3, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_26 ; %bb.25: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v3, v[8:9] flat_load_u8 v18, v[8:9] offset:1 flat_load_u8 v19, v[8:9] offset:2 flat_load_u8 v21, v[8:9] offset:3 flat_load_u8 v22, v[8:9] offset:5 flat_load_u8 v23, v[8:9] offset:4 s_waitcnt vmcnt(5) lgkmcnt(0) v_dual_mov_b32 v24, v33 :: v_dual_and_b32 v3, 0xffff, v3 s_clause 0x1 flat_load_u8 v25, v[8:9] offset:7 flat_load_d16_hi_u8 v24, v[8:9] offset:6 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v18, 8, v18 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v19, 16, v19 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v21, 24, v21 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v3, v18, v3 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v18, 8, v22 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_or3_b32 v3, v3, v19, v21 s_waitcnt vmcnt(2) v_or3_b32 v18, 0, v23, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_or3_b32 v21, v3, 0, 0 v_add_nc_u32_e32 v3, -8, v20 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v19, 24, v25 s_waitcnt vmcnt(0) lgkmcnt(0) v_or3_b32 v19, v18, v24, v19 v_or3_b32 v18, v21, 0, 0 .LBB0_26: ; %.loopexit28 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $vgpr20_vgpr21 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v3 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_32 ; %bb.27: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v3 s_cbranch_execz .LBB0_31 ; %bb.28: ; %.preheader25.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s11, 0 s_mov_b64 s[4:5], 0 .LBB0_29: ; %.preheader25 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v22, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v23, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v3 flat_load_u8 v22, v[22:23] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v23, s9 :: v_dual_and_b32 v22, 0xffff, v22 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[22:23], s0, v[22:23] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s11, vcc_lo, s11 v_or_b32_e32 v21, v23, v21 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v20, v22, v20 s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_29 ; %bb.30: ; %Flow148 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_31: ; %Flow150 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr3 .LBB0_32: ; %Flow152 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v24, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_34 ; %bb.33: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v20, v[8:9] flat_load_u8 v21, v[8:9] offset:1 flat_load_u8 v22, v[8:9] offset:2 flat_load_u8 v23, v[8:9] offset:3 flat_load_u8 v24, v[8:9] offset:5 flat_load_u8 v25, v[8:9] offset:4 v_mov_b32_e32 v26, v33 s_waitcnt vmcnt(5) lgkmcnt(0) v_and_b32_e32 v20, 0xffff, v20 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v21, 8, v21 s_clause 0x1 flat_load_u8 v27, v[8:9] offset:7 flat_load_d16_hi_u8 v26, v[8:9] offset:6 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v22, 16, v22 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v23, 24, v23 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v20, v21, v20 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v21, 8, v24 v_add_nc_u32_e32 v24, -8, v3 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo v_or3_b32 v20, v20, v22, v23 s_waitcnt vmcnt(2) v_or3_b32 v21, 0, v25, v21 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v20, v20, 0, 0 v_or3_b32 v20, v20, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v22, 24, v27 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v21, v21, v26, v22 .LBB0_34: ; %.loopexit26 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v24 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_40 ; %bb.35: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v24 s_cbranch_execz .LBB0_39 ; %bb.36: ; %.preheader23.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s11, 0 s_mov_b64 s[4:5], 0 .LBB0_37: ; %.preheader23 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v25, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v26, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v24 flat_load_u8 v3, v[25:26] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v26, s9 :: v_dual_and_b32 v25, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[25:26], s0, v[25:26] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s11, vcc_lo, s11 v_or_b32_e32 v23, v26, v23 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v22, v25, v22 s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_37 ; %bb.38: ; %Flow143 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_39: ; %Flow145 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr24 .LBB0_40: ; %Flow147 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v3, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_42 ; %bb.41: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v3, v[8:9] flat_load_u8 v22, v[8:9] offset:1 flat_load_u8 v23, v[8:9] offset:2 flat_load_u8 v25, v[8:9] offset:3 flat_load_u8 v26, v[8:9] offset:5 flat_load_u8 v27, v[8:9] offset:4 s_waitcnt vmcnt(5) lgkmcnt(0) v_dual_mov_b32 v28, v33 :: v_dual_and_b32 v3, 0xffff, v3 s_clause 0x1 flat_load_u8 v29, v[8:9] offset:7 flat_load_d16_hi_u8 v28, v[8:9] offset:6 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v22, 8, v22 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v23, 16, v23 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v25, 24, v25 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v3, v22, v3 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v22, 8, v26 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_or3_b32 v3, v3, v23, v25 s_waitcnt vmcnt(2) v_or3_b32 v22, 0, v27, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_or3_b32 v25, v3, 0, 0 v_add_nc_u32_e32 v3, -8, v24 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v23, 24, v29 s_waitcnt vmcnt(0) lgkmcnt(0) v_or3_b32 v23, v22, v28, v23 v_or3_b32 v22, v25, 0, 0 .LBB0_42: ; %.loopexit24 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $vgpr24_vgpr25 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v3 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_48 ; %bb.43: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v24, 0 v_mov_b32_e32 v25, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v3 s_cbranch_execz .LBB0_47 ; %bb.44: ; %.preheader21.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v24, 0 v_mov_b32_e32 v25, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s11, 0 s_mov_b64 s[4:5], 0 .LBB0_45: ; %.preheader21 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v26, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v27, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v3 flat_load_u8 v26, v[26:27] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v27, s9 :: v_dual_and_b32 v26, 0xffff, v26 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[26:27], s0, v[26:27] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s11, vcc_lo, s11 v_or_b32_e32 v25, v27, v25 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v24, v26, v24 s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_45 ; %bb.46: ; %Flow138 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_47: ; %Flow140 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr3 .LBB0_48: ; %Flow142 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v28, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_50 ; %bb.49: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v24, v[8:9] flat_load_u8 v25, v[8:9] offset:1 flat_load_u8 v26, v[8:9] offset:2 flat_load_u8 v27, v[8:9] offset:3 flat_load_u8 v28, v[8:9] offset:5 flat_load_u8 v29, v[8:9] offset:4 v_mov_b32_e32 v30, v33 s_waitcnt vmcnt(5) lgkmcnt(0) v_and_b32_e32 v24, 0xffff, v24 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v25, 8, v25 s_clause 0x1 flat_load_u8 v31, v[8:9] offset:7 flat_load_d16_hi_u8 v30, v[8:9] offset:6 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v26, 16, v26 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v27, 24, v27 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v24, v25, v24 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v25, 8, v28 v_add_nc_u32_e32 v28, -8, v3 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo v_or3_b32 v24, v24, v26, v27 s_waitcnt vmcnt(2) v_or3_b32 v25, 0, v29, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v24, v24, 0, 0 v_or3_b32 v24, v24, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v26, 24, v31 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v25, v25, v30, v26 .LBB0_50: ; %.loopexit22 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v28 s_xor_b32 s4, exec_lo, s0 s_cbranch_execz .LBB0_56 ; %bb.51: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v26, 0 v_mov_b32_e32 v27, 0 s_mov_b32 s5, exec_lo v_cmpx_ne_u32_e32 0, v28 s_cbranch_execz .LBB0_55 ; %bb.52: ; %.preheader.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v26, 0 v_mov_b32_e32 v27, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s6, 0 .LBB0_53: ; %.preheader ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 flat_load_u8 v3, v[8:9] v_mov_b32_e32 v30, s9 v_add_nc_u32_e32 v28, -1, v28 v_add_co_u32 v8, vcc_lo, v8, 1 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cmp_eq_u32_e32 vcc_lo, 0, v28 s_waitcnt vmcnt(0) lgkmcnt(0) v_and_b32_e32 v29, 0xffff, v3 v_lshlrev_b64 v[29:30], s0, v[29:30] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_or_b32_e32 v27, v30, v27 v_or_b32_e32 v26, v29, v26 s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_53 ; %bb.54: ; %Flow133 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s6 .LBB0_55: ; %Flow135 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 ; implicit-def: $vgpr8_vgpr9 .LBB0_56: ; %Flow137 ; in Loop: Header=BB0_2 Depth=1 s_and_not1_saveexec_b32 s0, s4 s_cbranch_execz .LBB0_58 ; %bb.57: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v3, v[8:9] flat_load_u8 v26, v[8:9] offset:1 flat_load_u8 v27, v[8:9] offset:2 flat_load_u8 v28, v[8:9] offset:3 flat_load_u8 v29, v[8:9] offset:5 flat_load_u8 v30, v[8:9] offset:4 v_mov_b32_e32 v31, v33 s_clause 0x1 flat_load_u8 v32, v[8:9] offset:7 flat_load_d16_hi_u8 v31, v[8:9] offset:6 s_waitcnt vmcnt(7) lgkmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v8, 8, v26 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v9, 16, v27 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v26, 8, v29 v_or_b32_e32 v3, v8, v3 v_lshlrev_b32_e32 v8, 24, v28 s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v3, v3, v9, v8 s_waitcnt vmcnt(2) v_or3_b32 v8, 0, v30, v26 s_waitcnt vmcnt(1) v_lshlrev_b32_e32 v9, 24, v32 v_or3_b32 v3, v3, 0, 0 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_or3_b32 v27, v8, v31, v9 v_or3_b32 v26, v3, 0, 0 .LBB0_58: ; %.loopexit ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 v_mov_b32_e32 v32, v2 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v32 v_cmp_eq_u32_e64 s0, s0, v32 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_64 ; %bb.59: ; in Loop: Header=BB0_2 Depth=1 s_waitcnt lgkmcnt(0) global_load_b64 v[30:31], v33, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[8:9], v33, s[2:3] offset:40 global_load_b64 v[28:29], v33, s[2:3] s_mov_b32 s4, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v9, v31 v_and_b32_e32 v8, v8, v30 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v9, v8, 24 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v28, v8 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v29, v3, vcc_lo global_load_b64 v[28:29], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v33, v[28:31], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[30:31] s_cbranch_execz .LBB0_63 ; %bb.60: ; %.preheader3.i.i19.preheader ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s5, 0 .LBB0_61: ; %.preheader3.i.i19 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[28:29], v33, s[2:3] offset:40 global_load_b64 v[34:35], v33, s[2:3] v_dual_mov_b32 v31, v9 :: v_dual_mov_b32 v30, v8 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v3, v28, v30 s_waitcnt vmcnt(0) v_mad_u64_u32 v[8:9], null, v3, 24, v[34:35] v_and_b32_e32 v34, v29, v31 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mov_b32_e32 v3, v9 v_mad_u64_u32 v[28:29], null, v34, 24, v[3:4] s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v9, v28 global_load_b64 v[28:29], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v33, v[28:31], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[30:31] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_61 ; %bb.62: ; %Flow130 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s5 .LBB0_63: ; %Flow132 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_64: ; %.loopexit4.i.i14 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[34:35], v33, s[2:3] offset:40 global_load_b128 v[28:31], v33, s[2:3] v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s13, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v34 v_readfirstlane_b32 s7, v35 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s11, s6, 24 s_mul_i32 s12, s6, 24 s_and_saveexec_b32 s14, s0 s_cbranch_execz .LBB0_66 ; %bb.65: ; in Loop: Header=BB0_2 Depth=1 s_add_i32 s15, s11, s1 s_waitcnt vmcnt(0) v_add_co_u32 v34, vcc_lo, v28, s12 v_add_co_ci_u32_e32 v35, vcc_lo, s15, v29, vcc_lo v_dual_mov_b32 v8, s13 :: v_dual_mov_b32 v9, v33 global_store_b128 v[34:35], v[8:11], off offset:8 .LBB0_66: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s14 v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5] v_or_b32_e32 v3, 2, v12 v_lshl_add_u32 v8, v0, 2, 28 s_lshl_b64 s[6:7], s[6:7], 12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v3, v3, v12, vcc_lo v_and_b32_e32 v12, 0x1e0, v8 v_lshlrev_b64 v[8:9], 6, v[32:33] s_waitcnt vmcnt(0) v_add_co_u32 v30, vcc_lo, v30, s6 v_add_co_ci_u32_e32 v31, vcc_lo, s7, v31, vcc_lo v_and_or_b32 v12, 0xffffff1f, v3, v12 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, v30, v8 v_add_co_ci_u32_e32 v9, vcc_lo, v31, v9, vcc_lo s_clause 0x3 global_store_b128 v[8:9], v[12:15], off global_store_b128 v[8:9], v[16:19], off offset:16 global_store_b128 v[8:9], v[20:23], off offset:32 global_store_b128 v[8:9], v[24:27], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_74 ; %bb.67: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x1 global_load_b64 v[20:21], v33, s[2:3] offset:32 glc global_load_b64 v[12:13], v33, s[2:3] offset:40 v_dual_mov_b32 v18, s4 :: v_dual_mov_b32 v19, s5 s_waitcnt vmcnt(0) v_readfirstlane_b32 s14, v12 v_readfirstlane_b32 s15, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[14:15], s[14:15], s[4:5] s_mul_i32 s7, s15, 24 s_mul_hi_u32 s13, s14, 24 s_mul_i32 s14, s14, 24 s_add_i32 s13, s13, s7 v_add_co_u32 v16, vcc_lo, v28, s14 v_add_co_ci_u32_e32 v17, vcc_lo, s13, v29, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[16:17], v[20:21], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[14:15], v33, v[18:21], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[14:15], v[20:21] s_cbranch_execz .LBB0_70 ; %bb.68: ; %.preheader1.i.i17.preheader ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s13, 0 .LBB0_69: ; %.preheader1.i.i17 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v12, s4 :: v_dual_mov_b32 v13, s5 s_sleep 1 global_store_b64 v[16:17], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v33, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[14:15] v_dual_mov_b32 v15, v13 :: v_dual_mov_b32 v14, v12 s_or_b32 s13, vcc_lo, s13 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_69 .LBB0_70: ; %Flow128 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s7 global_load_b64 v[12:13], v33, s[2:3] offset:16 s_mov_b32 s13, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v3, s13, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB0_72 ; %bb.71: ; in Loop: Header=BB0_2 Depth=1 s_bcnt1_i32_b32 s13, s13 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v32, s13 s_waitcnt vmcnt(0) global_atomic_add_u64 v[12:13], v[32:33], off offset:8 .LBB0_72: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[14:15], v[12:13], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15] s_cbranch_vccnz .LBB0_74 ; %bb.73: ; in Loop: Header=BB0_2 Depth=1 global_load_b32 v32, v[12:13], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v32 s_waitcnt_vscnt null, 0x0 global_store_b64 v[14:15], v[32:33], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_74: ; %Flow129 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s11, s11, s1 v_add_co_u32 v3, vcc_lo, v28, s12 v_add_co_ci_u32_e32 v13, vcc_lo, s11, v29, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v12, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo .LBB0_75: ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v3, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_77 ; %bb.76: ; in Loop: Header=BB0_75 Depth=2 global_load_b32 v3, v[12:13], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v3, 1, v3 .LBB0_77: ; in Loop: Header=BB0_75 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v3 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_79 ; %bb.78: ; in Loop: Header=BB0_75 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_80 .LBB0_79: ; in Loop: Header=BB0_75 Depth=2 s_mov_b32 s1, -1 .LBB0_80: ; %Flow123 ; in Loop: Header=BB0_75 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_75 ; %bb.81: ; in Loop: Header=BB0_2 Depth=1 global_load_b128 v[12:15], v[8:9], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_85 ; %bb.82: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x2 global_load_b64 v[8:9], v33, s[2:3] offset:40 global_load_b64 v[18:19], v33, s[2:3] offset:24 glc global_load_b64 v[16:17], v33, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v3, vcc_lo, v8, 1 v_add_co_ci_u32_e32 v20, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v14, vcc_lo, v3, s4 v_add_co_ci_u32_e32 v15, vcc_lo, s5, v20, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15] v_dual_cndmask_b32 v15, v15, v20 :: v_dual_cndmask_b32 v14, v14, v3 v_and_b32_e32 v3, v15, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v14, v8 v_mul_hi_u32 v9, v8, 24 v_mul_lo_u32 v8, v8, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v8, vcc_lo, v16, v8 v_mov_b32_e32 v16, v18 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v3, v9, v3 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v9, vcc_lo, v17, v3, vcc_lo v_mov_b32_e32 v17, v19 global_store_b64 v[8:9], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[16:17], v33, v[14:17], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[16:17], v[18:19] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_85 ; %bb.83: ; %.preheader.i.i16.preheader ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s0, 0 .LBB0_84: ; %.preheader.i.i16 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[8:9], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v33, v[14:17], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[16:17] v_dual_mov_b32 v16, v18 :: v_dual_mov_b32 v17, v19 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_84 .LBB0_85: ; %__ockl_hostcall_preview.exit20 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s1 v_sub_co_u32 v4, vcc_lo, v4, v0 v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v1, vcc_lo v_add_co_u32 v6, s0, v6, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e64 v7, s0, v7, v1, s0 v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_2 ; %bb.86: ; %Flow168 s_or_b32 exec_lo, exec_lo, s10 ; implicit-def: $vgpr0 ; implicit-def: $vgpr1 .LBB0_87: ; %Flow185 s_and_not1_saveexec_b32 s1, s8 s_cbranch_execz .LBB0_116 ; %bb.88: ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v2 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v2 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB0_94 ; %bb.89: v_mov_b32_e32 v3, 0 s_mov_b32 s5, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_93 ; %bb.90: ; %.preheader3.i.i.preheader s_mov_b32 s6, 0 .LBB0_91: ; %.preheader3.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_91 ; %bb.92: ; %Flow181 s_or_b32 exec_lo, exec_lo, s6 .LBB0_93: ; %Flow183 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_94: ; %.loopexit4.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s11, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s8, s7, 24 s_mul_hi_u32 s9, s6, 24 s_mul_i32 s10, s6, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_96 ; %bb.95: s_add_i32 s13, s9, s8 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v13, vcc_lo, s13, v5, vcc_lo v_dual_mov_b32 v8, s11 :: v_dual_mov_b32 v9, v3 v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_96: s_or_b32 exec_lo, exec_lo, s12 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v2, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1d, v0, 34 v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo v_mov_b32_e32 v2, v3 v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v9, s15 v_dual_mov_b32 v7, s13 :: v_dual_mov_b32 v8, s14 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_104 ; %bb.97: v_mov_b32_e32 v8, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 v_dual_mov_b32 v9, s4 :: v_dual_mov_b32 v10, s5 s_waitcnt vmcnt(0) v_and_b32_e32 v1, s5, v1 v_and_b32_e32 v0, s4, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v2, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v2, v1 v_add_co_u32 v6, vcc_lo, v4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v5, v1, vcc_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_100 ; %bb.98: ; %.preheader1.i.i.preheader s_mov_b32 s11, 0 .LBB0_99: ; %.preheader1.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_99 .LBB0_100: ; %Flow179 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s11, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s11, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_102 ; %bb.101: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_102: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_104 ; %bb.103: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_104: ; %Flow180 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s9, s9, s8 v_add_co_u32 v0, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_105: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_107 ; %bb.106: ; in Loop: Header=BB0_105 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_107: ; in Loop: Header=BB0_105 Depth=1 s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s6, v2 s_cmp_eq_u32 s6, 0 s_cbranch_scc1 .LBB0_109 ; %bb.108: ; in Loop: Header=BB0_105 Depth=1 s_mov_b32 s6, 0 s_sleep 1 s_branch .LBB0_110 .LBB0_109: ; in Loop: Header=BB0_105 Depth=1 s_mov_b32 s6, -1 .LBB0_110: ; %Flow174 ; in Loop: Header=BB0_105 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB0_105 ; %bb.111: s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_115 ; %bb.112: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_115 ; %bb.113: ; %.preheader.i.i.preheader s_mov_b32 s0, 0 .LBB0_114: ; %.preheader.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_114 .LBB0_115: ; %Flow172 s_or_b32 exec_lo, exec_lo, s6 .LBB0_116: ; %Flow186 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_waitcnt vmcnt(0) lgkmcnt(0) s_setpc_b64 s[30:31] .Lfunc_end0: .size __ockl_printf_append_string_n, .Lfunc_end0-__ockl_printf_append_string_n ; -- End function .section .AMDGPU.csdata,"",@progbits ; Function info: ; codeLenInByte = 5644 ; NumSgprs: 34 ; NumVgprs: 36 ; ScratchSize: 0 ; MemoryBound: 0 .text .protected _Z6kernelv ; -- Begin function _Z6kernelv .globl _Z6kernelv .p2align 8 .type _Z6kernelv,@function _Z6kernelv: ; @_Z6kernelv ; %bb.0: s_load_b64 s[18:19], s[0:1], 0x50 v_cmp_lt_u32_e32 vcc_lo, 7, v0 v_mbcnt_lo_u32_b32 v0, -1, 0 s_mov_b64 s[16:17], s[0:1] s_mov_b32 s32, 0 s_and_saveexec_b32 s0, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s20, exec_lo, s0 s_cbranch_execz .LBB1_28 ; %bb.1: ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v0 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_7 ; %bb.2: v_mov_b32_e32 v1, 0 s_mov_b32 s2, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[4:5], v1, s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v1, s[18:19] offset:40 global_load_b64 v[6:7], v1, s[18:19] s_waitcnt vmcnt(1) v_and_b32_e32 v2, v2, v4 v_and_b32_e32 v3, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v8, v2, 24 v_mul_lo_u32 v3, v3, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v8, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo global_load_b64 v[2:3], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v1, v[2:5], s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[2:3], v[4:5] s_cbranch_execz .LBB1_6 ; %bb.3: ; %.preheader3.i.i.i6.preheader s_mov_b32 s3, 0 .LBB1_4: ; %.preheader3.i.i.i6 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v1, s[18:19] offset:40 global_load_b64 v[8:9], v1, s[18:19] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v6, v6, v4 s_waitcnt vmcnt(0) v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9] v_and_b32_e32 v8, v7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4] v_mov_b32_e32 v3, v6 global_load_b64 v[2:3], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v1, v[2:5], s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] s_or_b32 s3, vcc_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB1_4 ; %bb.5: ; %Flow57 s_or_b32 exec_lo, exec_lo, s3 .LBB1_6: ; %Flow59 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s2 .LBB1_7: ; %.loopexit4.i.i.i1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v1, 0 v_readfirstlane_b32 s2, v2 v_readfirstlane_b32 s3, v3 s_mov_b32 s8, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[8:9], v1, s[18:19] offset:40 global_load_b128 v[4:7], v1, s[18:19] s_waitcnt vmcnt(1) v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[4:5], s[2:3], s[4:5] s_mul_i32 s1, s5, 24 s_mul_hi_u32 s6, s4, 24 s_mul_i32 s7, s4, 24 s_and_saveexec_b32 s9, s0 s_cbranch_execz .LBB1_9 ; %bb.8: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v1 s_add_i32 s8, s6, s1 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v4, s7 v_add_co_ci_u32_e32 v3, vcc_lo, s8, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[2:3], v[8:11], off offset:8 .LBB1_9: s_or_b32 exec_lo, exec_lo, s9 s_lshl_b64 s[4:5], s[4:5], 12 v_lshlrev_b64 v[2:3], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s4 v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo s_mov_b32 s8, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v0, v2 s_mov_b32 s9, s8 s_mov_b32 s10, s8 s_mov_b32 s11, s8 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo v_dual_mov_b32 v0, 33 :: v_dual_mov_b32 v3, v1 v_mov_b32_e32 v2, v1 v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11 v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB1_16 ; %bb.10: v_mov_b32_e32 v10, 0 s_mov_b32 s5, exec_lo s_clause 0x1 global_load_b64 v[13:14], v10, s[18:19] offset:32 glc global_load_b64 v[0:1], v10, s[18:19] offset:40 v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3 s_waitcnt vmcnt(0) v_and_b32_e32 v1, s3, v1 v_and_b32_e32 v0, s2, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v2, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v2, v1 v_add_co_u32 v8, vcc_lo, v4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[18:19] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB1_12 .LBB1_11: ; %.preheader1.i.i.i4 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[18:19] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s8, vcc_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB1_11 .LBB1_12: ; %Flow55 s_or_b32 exec_lo, exec_lo, s5 v_mov_b32_e32 v3, 0 s_mov_b32 s8, exec_lo s_mov_b32 s5, exec_lo v_mbcnt_lo_u32_b32 v2, s8, 0 global_load_b64 v[0:1], v3, s[18:19] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB1_14 ; %bb.13: s_bcnt1_i32_b32 s8, s8 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s8 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB1_14: s_or_b32 exec_lo, exec_lo, s5 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB1_16 ; %bb.15: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s5, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s5, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB1_16: ; %Flow56 s_or_b32 exec_lo, exec_lo, s4 s_add_i32 s6, s6, s1 v_add_co_u32 v0, vcc_lo, v4, s7 v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB1_17: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_19 ; %bb.18: ; in Loop: Header=BB1_17 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB1_19: ; in Loop: Header=BB1_17 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB1_21 ; %bb.20: ; in Loop: Header=BB1_17 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB1_22 .LBB1_21: ; in Loop: Header=BB1_17 Depth=1 s_mov_b32 s1, -1 .LBB1_22: ; %Flow50 ; in Loop: Header=BB1_17 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB1_17 ; %bb.23: global_load_b64 v[0:1], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_27 ; %bb.24: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[18:19] offset:40 global_load_b64 v[9:10], v8, s[18:19] offset:24 glc global_load_b64 v[6:7], v8, s[18:19] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s2 v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[18:19] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB1_27 ; %bb.25: ; %.preheader.i.i.i3.preheader s_mov_b32 s0, 0 .LBB1_26: ; %.preheader.i.i.i3 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[18:19] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB1_26 .LBB1_27: ; %__ockl_printf_begin.exit7 s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, .str.1@rel32@lo+4 s_addc_u32 s1, s1, .str.1@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1 s_cmp_lg_u64 s[0:1], 0 s_mov_b64 s[8:9], s[16:17] s_cselect_b32 s4, 20, 0 v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4 s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_swappc_b64 s[30:31], s[2:3] ; implicit-def: $vgpr0 .LBB1_28: ; %Flow75 s_and_not1_saveexec_b32 s0, s20 s_cbranch_execz .LBB1_56 ; %bb.29: ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v0 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_35 ; %bb.30: v_mov_b32_e32 v1, 0 s_mov_b32 s2, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[4:5], v1, s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v1, s[18:19] offset:40 global_load_b64 v[6:7], v1, s[18:19] s_waitcnt vmcnt(1) v_and_b32_e32 v2, v2, v4 v_and_b32_e32 v3, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v8, v2, 24 v_mul_lo_u32 v3, v3, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v8, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo global_load_b64 v[2:3], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v1, v[2:5], s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[2:3], v[4:5] s_cbranch_execz .LBB1_34 ; %bb.31: ; %.preheader3.i.i.i.preheader s_mov_b32 s3, 0 .LBB1_32: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v1, s[18:19] offset:40 global_load_b64 v[8:9], v1, s[18:19] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v6, v6, v4 s_waitcnt vmcnt(0) v_mad_u64_u32 v[2:3], null, v6, 24, v[8:9] v_and_b32_e32 v8, v7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v8, 24, v[3:4] v_mov_b32_e32 v3, v6 global_load_b64 v[2:3], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v1, v[2:5], s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] s_or_b32 s3, vcc_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB1_32 ; %bb.33: ; %Flow71 s_or_b32 exec_lo, exec_lo, s3 .LBB1_34: ; %Flow73 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s2 .LBB1_35: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v1, 0 v_readfirstlane_b32 s2, v2 v_readfirstlane_b32 s3, v3 s_mov_b32 s8, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[8:9], v1, s[18:19] offset:40 global_load_b128 v[4:7], v1, s[18:19] s_waitcnt vmcnt(1) v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[4:5], s[2:3], s[4:5] s_mul_i32 s1, s5, 24 s_mul_hi_u32 s6, s4, 24 s_mul_i32 s7, s4, 24 s_and_saveexec_b32 s9, s0 s_cbranch_execz .LBB1_37 ; %bb.36: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v1 s_add_i32 s8, s6, s1 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v4, s7 v_add_co_ci_u32_e32 v3, vcc_lo, s8, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[2:3], v[8:11], off offset:8 .LBB1_37: s_or_b32 exec_lo, exec_lo, s9 s_lshl_b64 s[4:5], s[4:5], 12 v_lshlrev_b64 v[2:3], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s4 v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo s_mov_b32 s8, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v0, v2 s_mov_b32 s9, s8 s_mov_b32 s10, s8 s_mov_b32 s11, s8 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo v_dual_mov_b32 v0, 33 :: v_dual_mov_b32 v3, v1 v_mov_b32_e32 v2, v1 v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11 v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB1_44 ; %bb.38: v_mov_b32_e32 v10, 0 s_mov_b32 s5, exec_lo s_clause 0x1 global_load_b64 v[13:14], v10, s[18:19] offset:32 glc global_load_b64 v[0:1], v10, s[18:19] offset:40 v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3 s_waitcnt vmcnt(0) v_and_b32_e32 v1, s3, v1 v_and_b32_e32 v0, s2, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v2, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v2, v1 v_add_co_u32 v8, vcc_lo, v4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[18:19] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB1_40 .LBB1_39: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[18:19] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s8, vcc_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB1_39 .LBB1_40: ; %Flow69 s_or_b32 exec_lo, exec_lo, s5 v_mov_b32_e32 v3, 0 s_mov_b32 s8, exec_lo s_mov_b32 s5, exec_lo v_mbcnt_lo_u32_b32 v2, s8, 0 global_load_b64 v[0:1], v3, s[18:19] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB1_42 ; %bb.41: s_bcnt1_i32_b32 s8, s8 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s8 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB1_42: s_or_b32 exec_lo, exec_lo, s5 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB1_44 ; %bb.43: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s5, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s5, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB1_44: ; %Flow70 s_or_b32 exec_lo, exec_lo, s4 s_add_i32 s6, s6, s1 v_add_co_u32 v0, vcc_lo, v4, s7 v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB1_45: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_47 ; %bb.46: ; in Loop: Header=BB1_45 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB1_47: ; in Loop: Header=BB1_45 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB1_49 ; %bb.48: ; in Loop: Header=BB1_45 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB1_50 .LBB1_49: ; in Loop: Header=BB1_45 Depth=1 s_mov_b32 s1, -1 .LBB1_50: ; %Flow64 ; in Loop: Header=BB1_45 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB1_45 ; %bb.51: global_load_b64 v[0:1], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_55 ; %bb.52: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[18:19] offset:40 global_load_b64 v[9:10], v8, s[18:19] offset:24 glc global_load_b64 v[6:7], v8, s[18:19] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s2 v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[18:19] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB1_55 ; %bb.53: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB1_54: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[18:19] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB1_54 .LBB1_55: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, .str@rel32@lo+4 s_addc_u32 s1, s1, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1 s_cmp_lg_u64 s[0:1], 0 s_mov_b64 s[8:9], s[16:17] s_cselect_b32 s4, 19, 0 v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4 s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_swappc_b64 s[30:31], s[2:3] .LBB1_56: s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6kernelv .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 256 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 36 .amdhsa_next_free_sgpr 33 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z6kernelv, .Lfunc_end1-_Z6kernelv ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 2944 ; NumSgprs: 35 ; NumVgprs: 36 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 35 ; NumVGPRsForWavesPerEU: 36 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "inside the kernel\n" .size .str, 19 .type .str.1,@object ; @.str.1 .str.1: .asciz "outside the kernel\n" .size .str.1, 20 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: hidden_block_count_x - .offset: 4 .size: 4 .value_kind: hidden_block_count_y - .offset: 8 .size: 4 .value_kind: hidden_block_count_z - .offset: 12 .size: 2 .value_kind: hidden_group_size_x - .offset: 14 .size: 2 .value_kind: hidden_group_size_y - .offset: 16 .size: 2 .value_kind: hidden_group_size_z - .offset: 18 .size: 2 .value_kind: hidden_remainder_x - .offset: 20 .size: 2 .value_kind: hidden_remainder_y - .offset: 22 .size: 2 .value_kind: hidden_remainder_z - .offset: 40 .size: 8 .value_kind: hidden_global_offset_x - .offset: 48 .size: 8 .value_kind: hidden_global_offset_y - .offset: 56 .size: 8 .value_kind: hidden_global_offset_z - .offset: 64 .size: 2 .value_kind: hidden_grid_dims - .offset: 80 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 256 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6kernelv .private_segment_fixed_size: 0 .sgpr_count: 35 .sgpr_spill_count: 0 .symbol: _Z6kernelv.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 36 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
04d2187cde3e6ab057eef1ab494673766d5f8c79
__device__ volatile float BigData[1024*1024];
.file "tmpxft_002fda1d_00000000-6_delay.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "BigData" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2033: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 movl $4194304, %r9d xorl %r8d, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _ZL7BigData(%rip), %rsi movq %rdx, %rcx movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterVar@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %rdx .cfi_def_cfa_offset 24 popq %rcx .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rsi .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2033: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .local _ZL7BigData .comm _ZL7BigData,4194304,32 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> __device__ volatile float BigData[1024*1024];
.text .file "delay.hip" .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB0_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB0_2: movl $BigData, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $4194304, %r9d # imm = 0x400000 xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $0 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $__hip_module_dtor, %edi popq %rax .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end0: .size __hip_module_ctor, .Lfunc_end0-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB1_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB1_2: retq .Lfunc_end1: .size __hip_module_dtor, .Lfunc_end1-__hip_module_dtor .cfi_endproc # -- End function .type BigData,@object # @BigData .local BigData .comm BigData,4194304,16 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "BigData" .size .L__unnamed_1, 8 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym BigData .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .protected BigData ; @BigData .type BigData,@object .section .bss,"aw",@nobits .globl BigData .p2align 4, 0x0 BigData: .zero 4194304 .size BigData, 4194304 .type __hip_cuid_,@object ; @__hip_cuid_ .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
135829e8120c4c605c4c3ee378ca71ab1e9c8498
/* This is a automatically generated test. Do not modify */ #include <stdio.h> #include <stdlib.h> #include <math.h> __global__ void compute(float comp, int var_1,float var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11,float var_12,float var_13,float var_14,float var_15,float var_16,float var_17,float var_18,float var_19,float var_20) { comp += var_2 - (var_3 + +1.4889E-43f); if (comp <= (+1.5026E25f + atanf(var_4 * expf(var_5 / var_6 / -1.8817E35f)))) { float tmp_1 = +1.8395E9f; float tmp_2 = -0.0f; comp += tmp_2 * tmp_1 * var_7 + (var_8 / asinf(var_9 / fabsf(-1.3023E-42f))); comp = (var_10 - sqrtf(-1.1907E35f)); } if (comp < +1.3739E-41f - var_11) { comp = (var_12 * (+1.6612E34f / -1.7853E8f / +1.4702E-43f)); comp += var_13 / var_14; comp += var_15 * -0.0f * (var_16 * var_17 / asinf(floorf((var_18 - +1.4509E-36f - -1.6745E2f)))); } for (int i=0; i < var_1; ++i) { comp += (+1.2415E20f - asinf(+0.0f / (var_19 - var_20 * -1.2148E-35f))); } printf("%.17g\n", comp); } float* initPointer(float v) { float *ret = (float*) malloc(sizeof(float)*10); for(int i=0; i < 10; ++i) ret[i] = v; return ret; } int main(int argc, char** argv) { /* Program variables */ float tmp_1 = atof(argv[1]); int tmp_2 = atoi(argv[2]); float tmp_3 = atof(argv[3]); float tmp_4 = atof(argv[4]); float tmp_5 = atof(argv[5]); float tmp_6 = atof(argv[6]); float tmp_7 = atof(argv[7]); float tmp_8 = atof(argv[8]); float tmp_9 = atof(argv[9]); float tmp_10 = atof(argv[10]); float tmp_11 = atof(argv[11]); float tmp_12 = atof(argv[12]); float tmp_13 = atof(argv[13]); float tmp_14 = atof(argv[14]); float tmp_15 = atof(argv[15]); float tmp_16 = atof(argv[16]); float tmp_17 = atof(argv[17]); float tmp_18 = atof(argv[18]); float tmp_19 = atof(argv[19]); float tmp_20 = atof(argv[20]); float tmp_21 = atof(argv[21]); compute<<<1,1>>>(tmp_1,tmp_2,tmp_3,tmp_4,tmp_5,tmp_6,tmp_7,tmp_8,tmp_9,tmp_10,tmp_11,tmp_12,tmp_13,tmp_14,tmp_15,tmp_16,tmp_17,tmp_18,tmp_19,tmp_20,tmp_21); cudaDeviceSynchronize(); return 0; }
.file "tmpxft_0025376d_00000000-6_test.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z11initPointerf .type _Z11initPointerf, @function _Z11initPointerf: .LFB2027: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl $40, %edi movss %xmm0, 12(%rsp) call malloc@PLT movss 12(%rsp), %xmm0 xorl %edx, %edx .L3: movss %xmm0, (%rax,%rdx,4) incq %rdx cmpq $10, %rdx jne .L3 addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _Z11initPointerf, .-_Z11initPointerf .globl _Z45__device_stub__Z7computefiffffffffffffffffffffifffffffffffffffffff .type _Z45__device_stub__Z7computefiffffffffffffffffffffifffffffffffffffffff, @function _Z45__device_stub__Z7computefiffffffffffffffffffffifffffffffffffffffff: .LFB2053: .cfi_startproc endbr64 subq $296, %rsp .cfi_def_cfa_offset 304 movl %edi, 40(%rsp) leaq 56(%rsp), %rcx leaq 48(%rsp), %rdx movss %xmm0, 44(%rsp) leaq 76(%rsp), %rsi leaq 64(%rsp), %rdi movss %xmm1, 36(%rsp) movss %xmm2, 32(%rsp) movss %xmm3, 28(%rsp) movss %xmm4, 24(%rsp) movss %xmm5, 20(%rsp) movss %xmm6, 16(%rsp) movss %xmm7, 12(%rsp) movq %fs:40, %rax movq %rax, 280(%rsp) xorl %eax, %eax leaq 44(%rsp), %rax movq %rax, 112(%rsp) leaq 40(%rsp), %rax movq %rax, 120(%rsp) leaq 36(%rsp), %rax movq %rax, 128(%rsp) leaq 32(%rsp), %rax movq %rax, 136(%rsp) leaq 28(%rsp), %rax movq %rax, 144(%rsp) leaq 24(%rsp), %rax movq %rax, 152(%rsp) leaq 20(%rsp), %rax movq %rax, 160(%rsp) leaq 16(%rsp), %rax movq %rax, 168(%rsp) leaq 12(%rsp), %rax movq %rax, 176(%rsp) leaq 304(%rsp), %rax movq %rax, 184(%rsp) leaq 312(%rsp), %rax movq %rax, 192(%rsp) leaq 320(%rsp), %rax movq %rax, 200(%rsp) leaq 328(%rsp), %rax movq %rax, 208(%rsp) leaq 336(%rsp), %rax movq %rax, 216(%rsp) leaq 344(%rsp), %rax movq %rax, 224(%rsp) leaq 352(%rsp), %rax movq %rax, 232(%rsp) leaq 360(%rsp), %rax movq %rax, 240(%rsp) leaq 368(%rsp), %rax movq %rax, 248(%rsp) leaq 376(%rsp), %rax movq %rax, 256(%rsp) leaq 384(%rsp), %rax movq %rax, 264(%rsp) leaq 392(%rsp), %rax movq %rax, 272(%rsp) movabsq $4294967297, %rax movq %rax, 64(%rsp) movl $1, 72(%rsp) movq %rax, 76(%rsp) movl $1, 84(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L7 pushq 56(%rsp) .cfi_def_cfa_offset 312 leaq _Z7computefifffffffffffffffffff(%rip), %rdi pushq 56(%rsp) .cfi_def_cfa_offset 320 movq 92(%rsp), %rcx movl 100(%rsp), %r8d movq 80(%rsp), %rsi movl 88(%rsp), %edx leaq 128(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 312 popq %rdx .cfi_def_cfa_offset 304 .L7: movq 280(%rsp), %rax subq %fs:40, %rax je .L9 call __stack_chk_fail@PLT .L9: addq $296, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z45__device_stub__Z7computefiffffffffffffffffffffifffffffffffffffffff, .-_Z45__device_stub__Z7computefiffffffffffffffffffffifffffffffffffffffff .globl _Z7computefifffffffffffffffffff .type _Z7computefifffffffffffffffffff, @function _Z7computefifffffffffffffffffff: .LFB2054: .cfi_startproc endbr64 jmp _Z45__device_stub__Z7computefiffffffffffffffffffffifffffffffffffffffff .cfi_endproc .LFE2054: .size _Z7computefifffffffffffffffffff, .-_Z7computefifffffffffffffffffff .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movq %rsi, %rbx subq $168, %rsp .cfi_def_cfa_offset 224 movq 8(%rsi), %rdi call atof@PLT movq 16(%rbx), %rdi movsd %xmm0, 120(%rsp) call atoi@PLT movq 24(%rbx), %rdi movl %eax, %ebp call atof@PLT movq 32(%rbx), %rdi movsd %xmm0, 112(%rsp) call atof@PLT movq 40(%rbx), %rdi movsd %xmm0, 104(%rsp) call atof@PLT movq 48(%rbx), %rdi movsd %xmm0, 96(%rsp) call atof@PLT movq 56(%rbx), %rdi movsd %xmm0, 88(%rsp) call atof@PLT movq 64(%rbx), %rdi movsd %xmm0, 80(%rsp) call atof@PLT movq 72(%rbx), %rdi movsd %xmm0, 72(%rsp) call atof@PLT movq 80(%rbx), %rdi movsd %xmm0, 64(%rsp) call atof@PLT movq 88(%rbx), %rdi movq %xmm0, %r14 call atof@PLT movq 96(%rbx), %rdi movq %xmm0, %r15 call atof@PLT movq 104(%rbx), %rdi movq %xmm0, %r12 call atof@PLT movq 112(%rbx), %rdi movsd %xmm0, 56(%rsp) call atof@PLT movq 120(%rbx), %rdi movsd %xmm0, 48(%rsp) call atof@PLT movq 128(%rbx), %rdi movsd %xmm0, 40(%rsp) call atof@PLT movq 136(%rbx), %rdi movsd %xmm0, 32(%rsp) call atof@PLT movq 144(%rbx), %rdi movsd %xmm0, 24(%rsp) call atof@PLT movq 152(%rbx), %rdi movsd %xmm0, 16(%rsp) call atof@PLT movq 160(%rbx), %rdi movsd %xmm0, 8(%rsp) call atof@PLT movq 168(%rbx), %rdi movq %xmm0, %r13 call atof@PLT xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $4294967297, %rdi movl $1, %esi movsd %xmm0, (%rsp) movq %rdi, %rdx call __cudaPushCallConfiguration@PLT movsd (%rsp), %xmm0 movsd 8(%rsp), %xmm15 testl %eax, %eax movsd 16(%rsp), %xmm14 movsd 24(%rsp), %xmm13 movsd 32(%rsp), %xmm12 movsd 40(%rsp), %xmm11 movsd 48(%rsp), %xmm10 movsd 56(%rsp), %xmm9 movsd 64(%rsp), %xmm7 movsd 72(%rsp), %xmm6 movsd 80(%rsp), %xmm5 movsd 88(%rsp), %xmm4 movsd 96(%rsp), %xmm3 movsd 104(%rsp), %xmm2 movsd 112(%rsp), %xmm1 movsd 120(%rsp), %xmm8 jne .L13 subq $96, %rsp .cfi_def_cfa_offset 320 cvtsd2ss %xmm0, %xmm0 cvtsd2ss %xmm8, %xmm8 movl %ebp, %edi movss %xmm0, 88(%rsp) movq %r13, %xmm0 cvtsd2ss %xmm15, %xmm15 cvtsd2ss %xmm14, %xmm14 cvtsd2ss %xmm0, %xmm0 movss %xmm0, 80(%rsp) movq %r12, %xmm0 cvtsd2ss %xmm13, %xmm13 cvtsd2ss %xmm0, %xmm0 movss %xmm0, 16(%rsp) cvtsd2ss %xmm7, %xmm7 movq %r15, %xmm0 cvtsd2ss %xmm0, %xmm0 movss %xmm0, 8(%rsp) movq %r14, %xmm0 cvtsd2ss %xmm12, %xmm12 cvtsd2ss %xmm0, %xmm0 movss %xmm0, (%rsp) movaps %xmm8, %xmm0 cvtsd2ss %xmm11, %xmm11 movss %xmm15, 72(%rsp) cvtsd2ss %xmm10, %xmm10 cvtsd2ss %xmm9, %xmm9 cvtsd2ss %xmm6, %xmm6 movss %xmm14, 64(%rsp) cvtsd2ss %xmm5, %xmm5 cvtsd2ss %xmm4, %xmm4 cvtsd2ss %xmm3, %xmm3 movss %xmm13, 56(%rsp) cvtsd2ss %xmm2, %xmm2 cvtsd2ss %xmm1, %xmm1 movss %xmm12, 48(%rsp) movss %xmm11, 40(%rsp) movss %xmm10, 32(%rsp) movss %xmm9, 24(%rsp) call _Z45__device_stub__Z7computefiffffffffffffffffffffifffffffffffffffffff addq $96, %rsp .cfi_def_cfa_offset 224 .L13: call cudaDeviceSynchronize@PLT addq $168, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z7computefifffffffffffffffffff" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2056: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z7computefifffffffffffffffffff(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2056: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7computefifffffffffffffffffff .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ MUFU.RCP R2, c[0x0][0x178] ; /* 0x00005e0000027b08 */ /* 0x000e220000001000 */ /*0020*/ ULDC UR4, c[0x0][0x174] ; /* 0x00005d0000047ab9 */ /* 0x000fe20000000800 */ /*0030*/ MOV R4, c[0x0][0x178] ; /* 0x00005e0000047a02 */ /* 0x000fe20000000f00 */ /*0040*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff007624 */ /* 0x000fe200078e00ff */ /*0050*/ MOV R5, UR4 ; /* 0x0000000400057c02 */ /* 0x000fe40008000f00 */ /*0060*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */ /* 0x000fe20007ffe0ff */ /*0070*/ FADD R0, R0, 1.4853763721843060952e-43 ; /* 0x0000006a00007421 */ /* 0x000fe20000000000 */ /*0080*/ FCHK P0, R5, c[0x0][0x178] ; /* 0x00005e0005007b02 */ /* 0x000e660000000000 */ /*0090*/ FADD R0, -R0, c[0x0][0x168] ; /* 0x00005a0000007621 */ /* 0x000fc80000000100 */ /*00a0*/ FADD R0, R0, c[0x0][0x160] ; /* 0x0000580000007621 */ /* 0x000fe20000000000 */ /*00b0*/ FFMA R3, R2, -R4, 1 ; /* 0x3f80000002037423 */ /* 0x001fc80000000804 */ /*00c0*/ FFMA R2, R2, R3, R2 ; /* 0x0000000302027223 */ /* 0x000fc80000000002 */ /*00d0*/ FFMA R3, R2, c[0x0][0x174], RZ ; /* 0x00005d0002037a23 */ /* 0x000fc800000000ff */ /*00e0*/ FFMA R4, R3, -R4, c[0x0][0x174] ; /* 0x00005d0003047623 */ /* 0x000fc80000000804 */ /*00f0*/ FFMA R3, R2, R4, R3 ; /* 0x0000000402037223 */ /* 0x000fe20000000003 */ /*0100*/ @!P0 BRA 0x150 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*0110*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff027624 */ /* 0x000fe200078e00ff */ /*0120*/ MOV R3, c[0x0][0x178] ; /* 0x00005e0000037a02 */ /* 0x000fe40000000f00 */ /*0130*/ MOV R8, 0x150 ; /* 0x0000015000087802 */ /* 0x000fe40000000f00 */ /*0140*/ CALL.REL.NOINC 0x1040 ; /* 0x00000ef000007944 */ /* 0x000fea0003c00000 */ /*0150*/ MOV R5, 0x4e20c14 ; /* 0x04e20c1400057802 */ /* 0x000fe20000000f00 */ /*0160*/ IMAD.MOV.U32 R2, RZ, RZ, 0x7a10f5fd ; /* 0x7a10f5fdff027424 */ /* 0x000fe200078e00ff */ /*0170*/ FCHK P0, R3, -1.88169995676756486660e+35 ; /* 0xfa10f5fd03007902 */ /* 0x000e260000000000 */ /*0180*/ FFMA R2, -R5, R2, 1 ; /* 0x3f80000005027423 */ /* 0x000fc80000000102 */ /*0190*/ FFMA R2, R2, -R5, -5.3143436663187727736e-36 ; /* 0x84e20c1402027423 */ /* 0x000fc80000000805 */ /*01a0*/ FFMA R4, R2, R3, RZ ; /* 0x0000000302047223 */ /* 0x000fc800000000ff */ /*01b0*/ FFMA R5, R4, 1.88169995676756486660e+35, R3 ; /* 0x7a10f5fd04057823 */ /* 0x000fc80000000003 */ /*01c0*/ FFMA R2, R2, R5, R4 ; /* 0x0000000502027223 */ /* 0x000fe20000000004 */ /*01d0*/ @!P0 BRA 0x230 ; /* 0x0000005000008947 */ /* 0x001fea0003800000 */ /*01e0*/ MOV R2, R3 ; /* 0x0000000300027202 */ /* 0x000fe40000000f00 */ /*01f0*/ MOV R3, 0xfa10f5fd ; /* 0xfa10f5fd00037802 */ /* 0x000fe40000000f00 */ /*0200*/ MOV R8, 0x220 ; /* 0x0000022000087802 */ /* 0x000fe40000000f00 */ /*0210*/ CALL.REL.NOINC 0x1040 ; /* 0x00000e2000007944 */ /* 0x000fea0003c00000 */ /*0220*/ IMAD.MOV.U32 R2, RZ, RZ, R3 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0003 */ /*0230*/ MOV R3, 0x3bbb989d ; /* 0x3bbb989d00037802 */ /* 0x000fe40000000f00 */ /*0240*/ MOV R4, 0x437c0000 ; /* 0x437c000000047802 */ /* 0x000fc60000000f00 */ /*0250*/ FFMA.SAT R3, R2, R3, 0.5 ; /* 0x3f00000002037423 */ /* 0x000fc80000002003 */ /*0260*/ FFMA.RM R3, R3, R4, 12582913 ; /* 0x4b40000103037423 */ /* 0x000fe20000004004 */ /*0270*/ MOV R4, 0x3b2090aa ; /* 0x3b2090aa00047802 */ /* 0x000fc60000000f00 */ /*0280*/ FADD R5, R3.reuse, -12583039 ; /* 0xcb40007f03057421 */ /* 0x040fe20000000000 */ /*0290*/ IMAD.SHL.U32 R3, R3, 0x800000, RZ ; /* 0x0080000003037824 */ /* 0x000fc600078e00ff */ /*02a0*/ FFMA R5, R2, 1.4426950216293334961, -R5 ; /* 0x3fb8aa3b02057823 */ /* 0x000fc80000000805 */ /*02b0*/ FFMA R5, R2, 1.925963033500011079e-08, R5 ; /* 0x32a5706002057823 */ /* 0x000fc80000000005 */ /*02c0*/ MUFU.EX2 R2, R5 ; /* 0x0000000500027308 */ /* 0x000e240000000800 */ /*02d0*/ FMUL R2, R3, R2 ; /* 0x0000000203027220 */ /* 0x001fc80000400000 */ /*02e0*/ FMUL R7, R2, c[0x0][0x170] ; /* 0x00005c0002077a20 */ /* 0x000fc80000400000 */ /*02f0*/ MUFU.RCP R2, |R7| ; /* 0x4000000700027308 */ /* 0x000e220000001000 */ /*0300*/ FSETP.GT.AND P0, PT, |R7|.reuse, 1, PT ; /* 0x3f8000000700780b */ /* 0x040fe40003f04200 */ /*0310*/ FSETP.GTU.AND P1, PT, |R7|, +INF , PT ; /* 0x7f8000000700780b */ /* 0x000fe40003f2c200 */ /*0320*/ FSEL R2, R2, |R7|, P0 ; /* 0x4000000702027208 */ /* 0x001fca0000000000 */ /*0330*/ FMUL R3, R2, R2 ; /* 0x0000000202037220 */ /* 0x000fc80000400000 */ /*0340*/ FFMA R4, R3, R4, -0.014396979473531246185 ; /* 0xbc6be14f03047423 */ /* 0x000fc80000000004 */ /*0350*/ FFMA R4, R3, R4, 0.039849750697612762451 ; /* 0x3d23397e03047423 */ /* 0x000fc80000000004 */ /*0360*/ FFMA R4, R3, R4, -0.072529748082160949707 ; /* 0xbd948a7a03047423 */ /* 0x000fc80000000004 */ /*0370*/ FFMA R4, R3, R4, 0.10518480092287063599 ; /* 0x3dd76b2103047423 */ /* 0x000fc80000000004 */ /*0380*/ FFMA R4, R3, R4, -0.14171802997589111328 ; /* 0xbe111e8803047423 */ /* 0x000fc80000000004 */ /*0390*/ FFMA R4, R3, R4, 0.19988775253295898438 ; /* 0x3e4caf6003047423 */ /* 0x000fc80000000004 */ /*03a0*/ FFMA R4, R3, R4, -0.33332940936088562012 ; /* 0xbeaaaa2703047423 */ /* 0x000fc80000000004 */ /*03b0*/ FMUL R3, R3, R4 ; /* 0x0000000403037220 */ /* 0x000fe20000400000 */ /*03c0*/ @P0 MOV R4, 0x3f6ee581 ; /* 0x3f6ee58100040802 */ /* 0x000fc60000000f00 */ /*03d0*/ FFMA R3, R2, R3, R2 ; /* 0x0000000302037223 */ /* 0x000fe20000000002 */ /*03e0*/ LOP3.LUT R2, R7, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000007027812 */ /* 0x000fc600078ec0ff */ /*03f0*/ @P0 FFMA R3, R4, 1.6832555532455444336, -R3 ; /* 0x3fd774eb04030823 */ /* 0x000fca0000000803 */ /*0400*/ @!P1 LOP3.LUT R3, R2, R3, RZ, 0xfc, !PT ; /* 0x0000000302039212 */ /* 0x000fca00078efcff */ /*0410*/ FADD R3, R3, 1.50259994523464306807e+25 ; /* 0x6946de1103037421 */ /* 0x000fca0000000000 */ /*0420*/ FSETP.GTU.AND P0, PT, R0, R3, PT ; /* 0x000000030000720b */ /* 0x000fda0003f0c000 */ /*0430*/ @P0 BRA 0x470 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*0440*/ MOV R2, 0x460 ; /* 0x0000046000027802 */ /* 0x000fe40000000f00 */ /*0450*/ CALL.REL.NOINC 0x1010 ; /* 0x00000bb000007944 */ /* 0x000fea0003c00000 */ /*0460*/ FADD R0, -R0, c[0x0][0x188] ; /* 0x0000620000007621 */ /* 0x000fe20000000100 */ /*0470*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x18c] ; /* 0x00006300ff037624 */ /* 0x000fc800078e00ff */ /*0480*/ FADD R3, -R3, 1.3738330144240506563e-41 ; /* 0x0000264c03037421 */ /* 0x000fca0000000100 */ /*0490*/ FSETP.GEU.AND P0, PT, R0, R3, PT ; /* 0x000000030000720b */ /* 0x000fda0003f0e000 */ /*04a0*/ @P0 BRA 0x8a0 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*04b0*/ MUFU.RCP R0, c[0x0][0x198] ; /* 0x0000660000007b08 */ /* 0x000e220000001000 */ /*04c0*/ ULDC UR4, c[0x0][0x194] ; /* 0x0000650000047ab9 */ /* 0x000fe20000000800 */ /*04d0*/ MOV R2, c[0x0][0x198] ; /* 0x0000660000027a02 */ /* 0x000fe40000000f00 */ /*04e0*/ MOV R5, UR4 ; /* 0x0000000400057c02 */ /* 0x000fc80008000f00 */ /*04f0*/ FCHK P0, R5, c[0x0][0x198] ; /* 0x0000660005007b02 */ /* 0x000e620000000000 */ /*0500*/ FFMA R3, R0, -R2, 1 ; /* 0x3f80000000037423 */ /* 0x001fc80000000802 */ /*0510*/ FFMA R0, R0, R3, R0 ; /* 0x0000000300007223 */ /* 0x000fc80000000000 */ /*0520*/ FFMA R3, R0, c[0x0][0x194], RZ ; /* 0x0000650000037a23 */ /* 0x000fc800000000ff */ /*0530*/ FFMA R2, R3, -R2, c[0x0][0x194] ; /* 0x0000650003027623 */ /* 0x000fc80000000802 */ /*0540*/ FFMA R4, R0, R2, R3 ; /* 0x0000000200047223 */ /* 0x000fe20000000003 */ /*0550*/ @!P0 BRA 0x5b0 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*0560*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x194] ; /* 0x00006500ff027624 */ /* 0x000fe200078e00ff */ /*0570*/ MOV R3, c[0x0][0x198] ; /* 0x0000660000037a02 */ /* 0x000fe40000000f00 */ /*0580*/ MOV R8, 0x5a0 ; /* 0x000005a000087802 */ /* 0x000fe40000000f00 */ /*0590*/ CALL.REL.NOINC 0x1040 ; /* 0x00000aa000007944 */ /* 0x000fea0003c00000 */ /*05a0*/ MOV R4, R3 ; /* 0x0000000300047202 */ /* 0x000fe40000000f00 */ /*05b0*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x1a8] ; /* 0x00006a00ff007624 */ /* 0x000fe200078e00ff */ /*05c0*/ MOV R3, 0x3f000000 ; /* 0x3f00000000037802 */ /* 0x000fe40000000f00 */ /*05d0*/ MOV R7, c[0x0][0x190] ; /* 0x0000640000077a02 */ /* 0x000fe20000000f00 */ /*05e0*/ FADD R0, R0, -1.4509000354899314726e-36 ; /* 0x83f6db9c00007421 */ /* 0x000fc80000000000 */ /*05f0*/ FADD R0, R0, 167.4499969482421875 ; /* 0x4327733300007421 */ /* 0x000fe20000000000 */ /*0600*/ FFMA R4, R7, -INF , R4 ; /* 0xff80000007047823 */ /* 0x000fca0000000004 */ /*0610*/ FRND.FLOOR R0, R0 ; /* 0x0000000000007307 */ /* 0x000e240000205000 */ /*0620*/ FFMA R2, -|R0|.reuse, R3, 0.5 ; /* 0x3f00000000027423 */ /* 0x041fe20000000303 */ /*0630*/ FSETP.NEU.AND P1, PT, |R0|.reuse, 1, PT ; /* 0x3f8000000000780b */ /* 0x040fe40003f2d200 */ /*0640*/ FSETP.GT.AND P0, PT, |R0|, 0.56000000238418579102, PT ; /* 0x3f0f5c290000780b */ /* 0x000fc60003f04200 */ /*0650*/ MUFU.RSQ R3, R2 ; /* 0x0000000200037308 */ /* 0x000e240000001400 */ /*0660*/ FMUL R5, R2, R3 ; /* 0x0000000302057220 */ /* 0x001fe20000400000 */ /*0670*/ FMUL R6, R3, 0.5 ; /* 0x3f00000003067820 */ /* 0x000fc80000400000 */ /*0680*/ FFMA R6, -R5, R6, 0.5 ; /* 0x3f00000005067423 */ /* 0x000fc80000000106 */ /*0690*/ FFMA R6, R5, R6, R5 ; /* 0x0000000605067223 */ /* 0x000fca0000000005 */ /*06a0*/ FSEL R3, R6, RZ, P1 ; /* 0x000000ff06037208 */ /* 0x000fe40000800000 */ /*06b0*/ MOV R6, 0x3d4dd2f7 ; /* 0x3d4dd2f700067802 */ /* 0x000fe40000000f00 */ /*06c0*/ FSEL R3, R3, |R0|, P0 ; /* 0x4000000003037208 */ /* 0x000fe40000000000 */ /*06d0*/ LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000000007812 */ /* 0x000fc600078ec0ff */ /*06e0*/ FMUL R5, R3, R3 ; /* 0x0000000303057220 */ /* 0x000fc80000400000 */ /*06f0*/ FFMA R2, R5, R6, 0.018773360177874565125 ; /* 0x3c99ca9705027423 */ /* 0x000fc80000000006 */ /*0700*/ FFMA R2, R5, R2, 0.046769052743911743164 ; /* 0x3d3f90e805027423 */ /* 0x000fc80000000002 */ /*0710*/ FFMA R2, R5, R2, 0.074823014438152313232 ; /* 0x3d993ccf05027423 */ /* 0x000fc80000000002 */ /*0720*/ FFMA R2, R5, R2, 0.16667181253433227539 ; /* 0x3e2aac0405027423 */ /* 0x000fc80000000002 */ /*0730*/ FMUL R2, R5, R2 ; /* 0x0000000205027220 */ /* 0x000fe20000400000 */ /*0740*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3fd774eb ; /* 0x3fd774ebff057424 */ /* 0x000fc600078e00ff */ /*0750*/ FFMA R3, R3, R2, R3 ; /* 0x0000000203037223 */ /* 0x000fc80000000003 */ /*0760*/ FMUL R2, R3, -2 ; /* 0xc000000003027820 */ /* 0x000fc80000400000 */ /*0770*/ @P0 FFMA R3, R5, 0.93318945169448852539, R2 ; /* 0x3f6ee58105030823 */ /* 0x000fca0000000002 */ /*0780*/ FSETP.GTU.AND P0, PT, R3, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fda0003f0c000 */ /*0790*/ @!P0 LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ; /* 0x0000000300038212 */ /* 0x000fe400078efcff */ /*07a0*/ MOV R0, c[0x0][0x1a0] ; /* 0x0000680000007a02 */ /* 0x000fe40000000f00 */ /*07b0*/ MUFU.RCP R2, R3 ; /* 0x0000000300027308 */ /* 0x000e260000001000 */ /*07c0*/ FMUL R0, R0, c[0x0][0x1a4] ; /* 0x0000690000007a20 */ /* 0x000fca0000400000 */ /*07d0*/ FCHK P0, R0, R3 ; /* 0x0000000300007302 */ /* 0x000e620000000000 */ /*07e0*/ FFMA R5, -R3, R2, 1 ; /* 0x3f80000003057423 */ /* 0x001fc80000000102 */ /*07f0*/ FFMA R5, R2, R5, R2 ; /* 0x0000000502057223 */ /* 0x000fc80000000002 */ /*0800*/ FFMA R2, R0, R5, RZ ; /* 0x0000000500027223 */ /* 0x000fc800000000ff */ /*0810*/ FFMA R6, -R3, R2, R0 ; /* 0x0000000203067223 */ /* 0x000fc80000000100 */ /*0820*/ FFMA R5, R5, R6, R2 ; /* 0x0000000605057223 */ /* 0x000fe20000000002 */ /*0830*/ @!P0 BRA 0x880 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*0840*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0000 */ /*0850*/ MOV R8, 0x870 ; /* 0x0000087000087802 */ /* 0x000fe40000000f00 */ /*0860*/ CALL.REL.NOINC 0x1040 ; /* 0x000007d000007944 */ /* 0x000fea0003c00000 */ /*0870*/ MOV R5, R3 ; /* 0x0000000300057202 */ /* 0x000fe40000000f00 */ /*0880*/ FMUL R3, RZ, -c[0x0][0x19c] ; /* 0x80006700ff037a20 */ /* 0x000fc80000400000 */ /*0890*/ FFMA R0, R3, R5, R4 ; /* 0x0000000503007223 */ /* 0x000fe20000000004 */ /*08a0*/ MOV R2, c[0x0][0x164] ; /* 0x0000590000027a02 */ /* 0x000fe40000000f00 */ /*08b0*/ IADD3 R6, P1, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fe40007f3e0ff */ /*08c0*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */ /* 0x000fc60003f06270 */ /*08d0*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P1 ; /* 0x00000900ff077624 */ /* 0x000fd400008e06ff */ /*08e0*/ @!P0 BRA 0xf20 ; /* 0x0000063000008947 */ /* 0x000fea0003800000 */ /*08f0*/ MOV R2, c[0x0][0x1b0] ; /* 0x00006c0000027a02 */ /* 0x000fe40000000f00 */ /*0900*/ MOV R3, 0x5812e00 ; /* 0x05812e0000037802 */ /* 0x000fca0000000f00 */ /*0910*/ FFMA R2, R2, R3, c[0x0][0x1ac] ; /* 0x00006b0002027623 */ /* 0x000fc80000000003 */ /*0920*/ MUFU.RCP R3, R2 ; /* 0x0000000200037308 */ /* 0x000e300000001000 */ /*0930*/ FCHK P0, RZ, R2 ; /* 0x00000002ff007302 */ /* 0x000e620000000000 */ /*0940*/ FFMA R4, -R2, R3, 1 ; /* 0x3f80000002047423 */ /* 0x001fc80000000103 */ /*0950*/ FFMA R4, R3, R4, R3 ; /* 0x0000000403047223 */ /* 0x000fc80000000003 */ /*0960*/ FFMA R3, RZ, R4, RZ ; /* 0x00000004ff037223 */ /* 0x000fc800000000ff */ /*0970*/ FFMA R5, -R2, R3, RZ ; /* 0x0000000302057223 */ /* 0x000fc800000001ff */ /*0980*/ FFMA R3, R4, R5, R3 ; /* 0x0000000504037223 */ /* 0x000fe20000000003 */ /*0990*/ @!P0 BRA 0x9e0 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*09a0*/ IMAD.MOV.U32 R3, RZ, RZ, R2 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0002 */ /*09b0*/ MOV R2, RZ ; /* 0x000000ff00027202 */ /* 0x000fe40000000f00 */ /*09c0*/ MOV R8, 0x9e0 ; /* 0x000009e000087802 */ /* 0x000fe40000000f00 */ /*09d0*/ CALL.REL.NOINC 0x1040 ; /* 0x0000066000007944 */ /* 0x000fea0003c00000 */ /*09e0*/ MOV R2, 0x3f000000 ; /* 0x3f00000000027802 */ /* 0x000fe20000000f00 */ /*09f0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x3d4dd2f7 ; /* 0x3d4dd2f7ff087424 */ /* 0x000fe200078e00ff */ /*0a00*/ FSETP.NEU.AND P1, PT, |R3|.reuse, 1, PT ; /* 0x3f8000000300780b */ /* 0x040fe40003f2d200 */ /*0a10*/ FSETP.GT.AND P0, PT, |R3|.reuse, 0.56000000238418579102, PT ; /* 0x3f0f5c290300780b */ /* 0x040fe20003f04200 */ /*0a20*/ FFMA R2, -|R3|, R2, 0.5 ; /* 0x3f00000003027423 */ /* 0x000fc80000000302 */ /*0a30*/ MUFU.RSQ R5, R2 ; /* 0x0000000200057308 */ /* 0x000e240000001400 */ /*0a40*/ FMUL R4, R2, R5 ; /* 0x0000000502047220 */ /* 0x001fe20000400000 */ /*0a50*/ FMUL R5, R5, 0.5 ; /* 0x3f00000005057820 */ /* 0x000fc80000400000 */ /*0a60*/ FFMA R5, -R4, R5, 0.5 ; /* 0x3f00000004057423 */ /* 0x000fc80000000105 */ /*0a70*/ FFMA R5, R4, R5, R4 ; /* 0x0000000504057223 */ /* 0x000fca0000000004 */ /*0a80*/ FSEL R4, R5, RZ, P1 ; /* 0x000000ff05047208 */ /* 0x000fc80000800000 */ /*0a90*/ FSEL R4, R4, |R3|, P0 ; /* 0x4000000304047208 */ /* 0x000fe40000000000 */ /*0aa0*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fc600078ec0ff */ /*0ab0*/ FMUL R5, R4, R4 ; /* 0x0000000404057220 */ /* 0x000fc80000400000 */ /*0ac0*/ FFMA R2, R5, R8, 0.018773360177874565125 ; /* 0x3c99ca9705027423 */ /* 0x000fc80000000008 */ /*0ad0*/ FFMA R2, R5, R2, 0.046769052743911743164 ; /* 0x3d3f90e805027423 */ /* 0x000fc80000000002 */ /*0ae0*/ FFMA R2, R5, R2, 0.074823014438152313232 ; /* 0x3d993ccf05027423 */ /* 0x000fc80000000002 */ /*0af0*/ FFMA R2, R5, R2, 0.16667181253433227539 ; /* 0x3e2aac0405027423 */ /* 0x000fc80000000002 */ /*0b00*/ FMUL R5, R5, R2 ; /* 0x0000000205057220 */ /* 0x000fc80000400000 */ /*0b10*/ FFMA R4, R4, R5, R4 ; /* 0x0000000504047223 */ /* 0x000fe20000000004 */ /*0b20*/ MOV R5, 0x3fd774eb ; /* 0x3fd774eb00057802 */ /* 0x000fc60000000f00 */ /*0b30*/ FMUL R2, R4, -2 ; /* 0xc000000004027820 */ /* 0x000fc80000400000 */ /*0b40*/ @P0 FFMA R4, R5, 0.93318945169448852539, R2 ; /* 0x3f6ee58105040823 */ /* 0x000fe20000000002 */ /*0b50*/ MOV R2, c[0x0][0x164] ; /* 0x0000590000027a02 */ /* 0x000fc80000000f00 */ /*0b60*/ IADD3 R5, R2, -0x1, RZ ; /* 0xffffffff02057810 */ /* 0x000fe40007ffe0ff */ /*0b70*/ FSETP.GTU.AND P0, PT, R4, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fe40003f0c000 */ /*0b80*/ ISETP.GE.U32.AND P1, PT, R5, 0x3, PT ; /* 0x000000030500780c */ /* 0x000fe40003f26070 */ /*0b90*/ LOP3.LUT R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */ /* 0x000fd200078ec0ff */ /*0ba0*/ @!P0 LOP3.LUT R4, R3, R4, RZ, 0xfc, !PT ; /* 0x0000000403048212 */ /* 0x000fca00078efcff */ /*0bb0*/ FADD R3, -R4, 1.24150000852001619968e+20 ; /* 0x60d75dad04037421 */ /* 0x000fe20000000100 */ /*0bc0*/ @!P1 BRA 0xec0 ; /* 0x000002f000009947 */ /* 0x000fea0003800000 */ /*0bd0*/ IADD3 R4, -R2, c[0x0][0x164], RZ ; /* 0x0000590002047a10 */ /* 0x000fc80007ffe1ff */ /*0be0*/ ISETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fda0003f04270 */ /*0bf0*/ @!P0 BRA 0xe50 ; /* 0x0000025000008947 */ /* 0x000fea0003800000 */ /*0c00*/ ISETP.GT.AND P1, PT, R4, 0xc, PT ; /* 0x0000000c0400780c */ /* 0x000fe40003f24270 */ /*0c10*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*0c20*/ @!P1 BRA 0xd70 ; /* 0x0000014000009947 */ /* 0x000fea0003800000 */ /*0c30*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0c40*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fe20000000000 */ /*0c50*/ IADD3 R4, R4, -0x10, RZ ; /* 0xfffffff004047810 */ /* 0x000fc60007ffe0ff */ /*0c60*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fe20000000000 */ /*0c70*/ ISETP.GT.AND P1, PT, R4, 0xc, PT ; /* 0x0000000c0400780c */ /* 0x000fc60003f24270 */ /*0c80*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0c90*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0ca0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0cb0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0cc0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0cd0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0ce0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0cf0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0d00*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0d10*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0d20*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0d30*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0d40*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0d50*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fe20000000000 */ /*0d60*/ @P1 BRA 0xc40 ; /* 0xfffffed000001947 */ /* 0x000fea000383ffff */ /*0d70*/ ISETP.GT.AND P1, PT, R4, 0x4, PT ; /* 0x000000040400780c */ /* 0x000fda0003f24270 */ /*0d80*/ @!P1 BRA 0xe30 ; /* 0x000000a000009947 */ /* 0x000fea0003800000 */ /*0d90*/ FADD R0, R0, R3 ; /* 0x0000000300007221 */ /* 0x000fe20000000000 */ /*0da0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0db0*/ IADD3 R4, R4, -0x8, RZ ; /* 0xfffffff804047810 */ /* 0x000fe20007ffe0ff */ /*0dc0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0dd0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0de0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0df0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0e00*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0e10*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0e20*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fe20000000000 */ /*0e30*/ ISETP.NE.OR P0, PT, R4, RZ, P0 ; /* 0x000000ff0400720c */ /* 0x000fda0000705670 */ /*0e40*/ @!P0 BRA 0xec0 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*0e50*/ IADD3 R4, R4, -0x4, RZ ; /* 0xfffffffc04047810 */ /* 0x000fe20007ffe0ff */ /*0e60*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc60000000000 */ /*0e70*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe20003f05270 */ /*0e80*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0e90*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0ea0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc80000000000 */ /*0eb0*/ @P0 BRA 0xe50 ; /* 0xffffff9000000947 */ /* 0x000fea000383ffff */ /*0ec0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fda0003f05270 */ /*0ed0*/ @!P0 BRA 0xf20 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*0ee0*/ IADD3 R2, R2, -0x1, RZ ; /* 0xffffffff02027810 */ /* 0x000fe20007ffe0ff */ /*0ef0*/ FADD R0, R3, R0 ; /* 0x0000000003007221 */ /* 0x000fc60000000000 */ /*0f00*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fda0003f05270 */ /*0f10*/ @P0 BRA 0xee0 ; /* 0xffffffc000000947 */ /* 0x000fea000383ffff */ /*0f20*/ F2F.F64.F32 R2, R0 ; /* 0x0000000000027310 */ /* 0x000e220000201800 */ /*0f30*/ MOV R8, 0x0 ; /* 0x0000000000087802 */ /* 0x000fe20000000f00 */ /*0f40*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*0f50*/ MOV R5, c[0x4][0xc] ; /* 0x0100030000057a02 */ /* 0x000fc80000000f00 */ /*0f60*/ LDC.64 R8, c[0x4][R8] ; /* 0x0100000008087b82 */ /* 0x000e620000000a00 */ /*0f70*/ STL.64 [R1], R2 ; /* 0x0000000201007387 */ /* 0x0011e40000100a00 */ /*0f80*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x001fe20000000000 */ /*0f90*/ MOV R11, 0x1000 ; /* 0x00001000000b7802 */ /* 0x000fe40000000f00 */ /*0fa0*/ MOV R20, 0xf80 ; /* 0x00000f8000147802 */ /* 0x000fe40000000f00 */ /*0fb0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*0fc0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*0fd0*/ IADD3 R20, P0, P1, -R20, R11, R2 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e102 */ /*0fe0*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*0ff0*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */ /* 0x002fea0003c00000 */ /*1000*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1010*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fe200078e00ff */ /*1020*/ MOV R0, 0x7fffffff ; /* 0x7fffffff00007802 */ /* 0x000fc60000000f00 */ /*1030*/ RET.REL.NODEC R2 0x0 ; /* 0xffffefc002007950 */ /* 0x000fea0003c3ffff */ /*1040*/ SHF.R.U32.HI R9, RZ, 0x17, R3 ; /* 0x00000017ff097819 */ /* 0x000fe40000011603 */ /*1050*/ SHF.R.U32.HI R5, RZ, 0x17, R2 ; /* 0x00000017ff057819 */ /* 0x000fe40000011602 */ /*1060*/ LOP3.LUT R14, R9, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff090e7812 */ /* 0x000fe400078ec0ff */ /*1070*/ LOP3.LUT R12, R5, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff050c7812 */ /* 0x000fe400078ec0ff */ /*1080*/ IADD3 R10, R14, -0x1, RZ ; /* 0xffffffff0e0a7810 */ /* 0x000fe40007ffe0ff */ /*1090*/ IADD3 R9, R12, -0x1, RZ ; /* 0xffffffff0c097810 */ /* 0x000fc40007ffe0ff */ /*10a0*/ ISETP.GT.U32.AND P0, PT, R10, 0xfd, PT ; /* 0x000000fd0a00780c */ /* 0x000fc80003f04070 */ /*10b0*/ ISETP.GT.U32.OR P0, PT, R9, 0xfd, P0 ; /* 0x000000fd0900780c */ /* 0x000fda0000704470 */ /*10c0*/ @!P0 MOV R5, RZ ; /* 0x000000ff00058202 */ /* 0x000fe20000000f00 */ /*10d0*/ @!P0 BRA 0x1250 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*10e0*/ FSETP.GTU.FTZ.AND P0, PT, |R2|, +INF , PT ; /* 0x7f8000000200780b */ /* 0x000fe40003f1c200 */ /*10f0*/ FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fc80003f3c200 */ /*1100*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*1110*/ @P0 BRA 0x1630 ; /* 0x0000051000000947 */ /* 0x000fea0003800000 */ /*1120*/ LOP3.LUT P0, RZ, R3, 0x7fffffff, R2, 0xc8, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fda000780c802 */ /*1130*/ @!P0 BRA 0x1610 ; /* 0x000004d000008947 */ /* 0x000fea0003800000 */ /*1140*/ FSETP.NEU.FTZ.AND P2, PT, |R2|.reuse, +INF , PT ; /* 0x7f8000000200780b */ /* 0x040fe40003f5d200 */ /*1150*/ FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f3d200 */ /*1160*/ FSETP.NEU.FTZ.AND P0, PT, |R2|, +INF , PT ; /* 0x7f8000000200780b */ /* 0x000fd60003f1d200 */ /*1170*/ @!P1 BRA !P2, 0x1610 ; /* 0x0000049000009947 */ /* 0x000fea0005000000 */ /*1180*/ LOP3.LUT P2, RZ, R2, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff02ff7812 */ /* 0x000fc8000784c0ff */ /*1190*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*11a0*/ @P1 BRA 0x15f0 ; /* 0x0000044000001947 */ /* 0x000fea0003800000 */ /*11b0*/ LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fc8000782c0ff */ /*11c0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*11d0*/ @P0 BRA 0x15c0 ; /* 0x000003e000000947 */ /* 0x000fea0003800000 */ /*11e0*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe40003f06270 */ /*11f0*/ ISETP.GE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fd60003f26270 */ /*1200*/ @P0 MOV R5, RZ ; /* 0x000000ff00050202 */ /* 0x000fe20000000f00 */ /*1210*/ @!P0 IMAD.MOV.U32 R5, RZ, RZ, -0x40 ; /* 0xffffffc0ff058424 */ /* 0x000fe200078e00ff */ /*1220*/ @!P0 FFMA R2, R2, 1.84467440737095516160e+19, RZ ; /* 0x5f80000002028823 */ /* 0x000fe200000000ff */ /*1230*/ @!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003039823 */ /* 0x000fc600000000ff */ /*1240*/ @!P1 IADD3 R5, R5, 0x40, RZ ; /* 0x0000004005059810 */ /* 0x000fe40007ffe0ff */ /*1250*/ LEA R10, R14, 0xc0800000, 0x17 ; /* 0xc08000000e0a7811 */ /* 0x000fc800078eb8ff */ /*1260*/ IADD3 R10, -R10, R3, RZ ; /* 0x000000030a0a7210 */ /* 0x000fe40007ffe1ff */ /*1270*/ IADD3 R3, R12, -0x7f, RZ ; /* 0xffffff810c037810 */ /* 0x000fe40007ffe0ff */ /*1280*/ MUFU.RCP R9, R10 ; /* 0x0000000a00097308 */ /* 0x0000620000001000 */ /*1290*/ FADD.FTZ R11, -R10, -RZ ; /* 0x800000ff0a0b7221 */ /* 0x000fe40000010100 */ /*12a0*/ IMAD R2, R3.reuse, -0x800000, R2 ; /* 0xff80000003027824 */ /* 0x040fe200078e0202 */ /*12b0*/ IADD3 R10, R3, 0x7f, -R14 ; /* 0x0000007f030a7810 */ /* 0x001fc80007ffe80e */ /*12c0*/ IADD3 R10, R10, R5, RZ ; /* 0x000000050a0a7210 */ /* 0x000fe20007ffe0ff */ /*12d0*/ FFMA R12, R9, R11, 1 ; /* 0x3f800000090c7423 */ /* 0x002fc8000000000b */ /*12e0*/ FFMA R16, R9, R12, R9 ; /* 0x0000000c09107223 */ /* 0x000fc80000000009 */ /*12f0*/ FFMA R9, R2, R16, RZ ; /* 0x0000001002097223 */ /* 0x000fc800000000ff */ /*1300*/ FFMA R12, R11, R9, R2 ; /* 0x000000090b0c7223 */ /* 0x000fc80000000002 */ /*1310*/ FFMA R13, R16, R12, R9 ; /* 0x0000000c100d7223 */ /* 0x000fc80000000009 */ /*1320*/ FFMA R12, R11, R13, R2 ; /* 0x0000000d0b0c7223 */ /* 0x000fc80000000002 */ /*1330*/ FFMA R9, R16, R12, R13 ; /* 0x0000000c10097223 */ /* 0x000fca000000000d */ /*1340*/ SHF.R.U32.HI R2, RZ, 0x17, R9 ; /* 0x00000017ff027819 */ /* 0x000fc80000011609 */ /*1350*/ LOP3.LUT R2, R2, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff02027812 */ /* 0x000fca00078ec0ff */ /*1360*/ IMAD.IADD R11, R2, 0x1, R10 ; /* 0x00000001020b7824 */ /* 0x000fca00078e020a */ /*1370*/ IADD3 R2, R11, -0x1, RZ ; /* 0xffffffff0b027810 */ /* 0x000fc80007ffe0ff */ /*1380*/ ISETP.GE.U32.AND P0, PT, R2, 0xfe, PT ; /* 0x000000fe0200780c */ /* 0x000fda0003f06070 */ /*1390*/ @!P0 BRA 0x15a0 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*13a0*/ ISETP.GT.AND P0, PT, R11, 0xfe, PT ; /* 0x000000fe0b00780c */ /* 0x000fda0003f04270 */ /*13b0*/ @P0 BRA 0x1570 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*13c0*/ ISETP.GE.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fda0003f06270 */ /*13d0*/ @P0 BRA 0x1640 ; /* 0x0000026000000947 */ /* 0x000fea0003800000 */ /*13e0*/ ISETP.GE.AND P0, PT, R11, -0x18, PT ; /* 0xffffffe80b00780c */ /* 0x000fe40003f06270 */ /*13f0*/ LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000009097812 */ /* 0x000fd600078ec0ff */ /*1400*/ @!P0 BRA 0x1640 ; /* 0x0000023000008947 */ /* 0x000fea0003800000 */ /*1410*/ FFMA.RZ R2, R16.reuse, R12.reuse, R13.reuse ; /* 0x0000000c10027223 */ /* 0x1c0fe2000000c00d */ /*1420*/ IADD3 R10, R11.reuse, 0x20, RZ ; /* 0x000000200b0a7810 */ /* 0x040fe20007ffe0ff */ /*1430*/ FFMA.RM R3, R16, R12.reuse, R13.reuse ; /* 0x0000000c10037223 */ /* 0x180fe2000000400d */ /*1440*/ ISETP.NE.AND P2, PT, R11.reuse, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x040fe40003f45270 */ /*1450*/ LOP3.LUT R5, R2, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff02057812 */ /* 0x000fe200078ec0ff */ /*1460*/ FFMA.RP R2, R16, R12, R13 ; /* 0x0000000c10027223 */ /* 0x000fe2000000800d */ /*1470*/ ISETP.NE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe40003f25270 */ /*1480*/ LOP3.LUT R5, R5, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000005057812 */ /* 0x000fe400078efcff */ /*1490*/ IADD3 R11, -R11, RZ, RZ ; /* 0x000000ff0b0b7210 */ /* 0x000fc40007ffe1ff */ /*14a0*/ SHF.L.U32 R10, R5, R10, RZ ; /* 0x0000000a050a7219 */ /* 0x000fe400000006ff */ /*14b0*/ FSETP.NEU.FTZ.AND P0, PT, R2, R3, PT ; /* 0x000000030200720b */ /* 0x000fe40003f1d000 */ /*14c0*/ SEL R2, R11, RZ, P2 ; /* 0x000000ff0b027207 */ /* 0x000fe40001000000 */ /*14d0*/ ISETP.NE.AND P1, PT, R10, RZ, P1 ; /* 0x000000ff0a00720c */ /* 0x000fe40000f25270 */ /*14e0*/ SHF.R.U32.HI R2, RZ, R2, R5 ; /* 0x00000002ff027219 */ /* 0x000fe40000011605 */ /*14f0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40000703570 */ /*1500*/ SHF.R.U32.HI R10, RZ, 0x1, R2 ; /* 0x00000001ff0a7819 */ /* 0x000fe40000011602 */ /*1510*/ SEL R3, RZ, 0x1, !P0 ; /* 0x00000001ff037807 */ /* 0x000fc80004000000 */ /*1520*/ LOP3.LUT R3, R3, 0x1, R10, 0xf8, !PT ; /* 0x0000000103037812 */ /* 0x000fc800078ef80a */ /*1530*/ LOP3.LUT R3, R3, R2, RZ, 0xc0, !PT ; /* 0x0000000203037212 */ /* 0x000fc800078ec0ff */ /*1540*/ IADD3 R10, R10, R3, RZ ; /* 0x000000030a0a7210 */ /* 0x000fc80007ffe0ff */ /*1550*/ LOP3.LUT R9, R10, R9, RZ, 0xfc, !PT ; /* 0x000000090a097212 */ /* 0x000fe200078efcff */ /*1560*/ BRA 0x1640 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*1570*/ LOP3.LUT R9, R9, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000009097812 */ /* 0x000fc800078ec0ff */ /*1580*/ LOP3.LUT R9, R9, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000009097812 */ /* 0x000fe200078efcff */ /*1590*/ BRA 0x1640 ; /* 0x000000a000007947 */ /* 0x000fea0003800000 */ /*15a0*/ IMAD R9, R10, 0x800000, R9 ; /* 0x008000000a097824 */ /* 0x000fe200078e0209 */ /*15b0*/ BRA 0x1640 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*15c0*/ LOP3.LUT R2, R3, 0x80000000, R2, 0x48, !PT ; /* 0x8000000003027812 */ /* 0x000fc800078e4802 */ /*15d0*/ LOP3.LUT R9, R2, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000002097812 */ /* 0x000fe200078efcff */ /*15e0*/ BRA 0x1640 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*15f0*/ LOP3.LUT R9, R3, 0x80000000, R2, 0x48, !PT ; /* 0x8000000003097812 */ /* 0x000fe200078e4802 */ /*1600*/ BRA 0x1640 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*1610*/ MUFU.RSQ R9, -QNAN ; /* 0xffc0000000097908 */ /* 0x000e220000001400 */ /*1620*/ BRA 0x1640 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1630*/ FADD.FTZ R9, R2, R3 ; /* 0x0000000302097221 */ /* 0x000fca0000010000 */ /*1640*/ MOV R3, R9 ; /* 0x0000000900037202 */ /* 0x001fe40000000f00 */ /*1650*/ MOV R9, 0x0 ; /* 0x0000000000097802 */ /* 0x000fc80000000f00 */ /*1660*/ RET.REL.NODEC R8 0x0 ; /* 0xffffe99008007950 */ /* 0x000fea0003c3ffff */ /*1670*/ BRA 0x1670; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1680*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1690*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*16a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*16b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*16c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*16d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*16e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*16f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
/* This is a automatically generated test. Do not modify */ #include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #include <math.h> __global__ void compute(float comp, int var_1,float var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11,float var_12,float var_13,float var_14,float var_15,float var_16,float var_17,float var_18,float var_19,float var_20) { comp += var_2 - (var_3 + +1.4889E-43f); if (comp <= (+1.5026E25f + atanf(var_4 * expf(var_5 / var_6 / -1.8817E35f)))) { float tmp_1 = +1.8395E9f; float tmp_2 = -0.0f; comp += tmp_2 * tmp_1 * var_7 + (var_8 / asinf(var_9 / fabsf(-1.3023E-42f))); comp = (var_10 - sqrtf(-1.1907E35f)); } if (comp < +1.3739E-41f - var_11) { comp = (var_12 * (+1.6612E34f / -1.7853E8f / +1.4702E-43f)); comp += var_13 / var_14; comp += var_15 * -0.0f * (var_16 * var_17 / asinf(floorf((var_18 - +1.4509E-36f - -1.6745E2f)))); } for (int i=0; i < var_1; ++i) { comp += (+1.2415E20f - asinf(+0.0f / (var_19 - var_20 * -1.2148E-35f))); } printf("%.17g\n", comp); } float* initPointer(float v) { float *ret = (float*) malloc(sizeof(float)*10); for(int i=0; i < 10; ++i) ret[i] = v; return ret; } int main(int argc, char** argv) { /* Program variables */ float tmp_1 = atof(argv[1]); int tmp_2 = atoi(argv[2]); float tmp_3 = atof(argv[3]); float tmp_4 = atof(argv[4]); float tmp_5 = atof(argv[5]); float tmp_6 = atof(argv[6]); float tmp_7 = atof(argv[7]); float tmp_8 = atof(argv[8]); float tmp_9 = atof(argv[9]); float tmp_10 = atof(argv[10]); float tmp_11 = atof(argv[11]); float tmp_12 = atof(argv[12]); float tmp_13 = atof(argv[13]); float tmp_14 = atof(argv[14]); float tmp_15 = atof(argv[15]); float tmp_16 = atof(argv[16]); float tmp_17 = atof(argv[17]); float tmp_18 = atof(argv[18]); float tmp_19 = atof(argv[19]); float tmp_20 = atof(argv[20]); float tmp_21 = atof(argv[21]); compute<<<1,1>>>(tmp_1,tmp_2,tmp_3,tmp_4,tmp_5,tmp_6,tmp_7,tmp_8,tmp_9,tmp_10,tmp_11,tmp_12,tmp_13,tmp_14,tmp_15,tmp_16,tmp_17,tmp_18,tmp_19,tmp_20,tmp_21); hipDeviceSynchronize(); return 0; }
.text .file "test.hip" .globl _Z22__device_stub__computefifffffffffffffffffff # -- Begin function _Z22__device_stub__computefifffffffffffffffffff .type _Z22__device_stub__computefifffffffffffffffffff,@function _Z22__device_stub__computefifffffffffffffffffff: # @_Z22__device_stub__computefifffffffffffffffffff .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $272, %rsp # imm = 0x110 .cfi_def_cfa_offset 320 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 44(%rsp), %rax movss %xmm0, (%rax) leaq 40(%rsp), %rcx movl %edi, (%rcx) leaq 36(%rsp), %rdx movss %xmm1, (%rdx) leaq 32(%rsp), %rsi movss %xmm2, (%rsi) leaq 28(%rsp), %rdi movss %xmm3, (%rdi) leaq 24(%rsp), %r8 movss %xmm4, (%r8) leaq 20(%rsp), %r9 movss %xmm5, (%r9) leaq 16(%rsp), %r10 movss %xmm6, (%r10) leaq 12(%rsp), %r11 movss %xmm7, (%r11) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rdx, 16(%rbx) movq %rsi, 24(%rbx) movq %rdi, 32(%rbx) movq %r8, 40(%rbx) movq %r9, 48(%rbx) movq %r10, 56(%rbx) movq %r11, 64(%rbx) leaq 320(%rsp), %rax movq %rax, 72(%rbx) leaq 328(%rsp), %rax movq %rax, 80(%rbx) leaq 336(%rsp), %rax movq %rax, 88(%rbx) leaq 344(%rsp), %rax movq %rax, 96(%rbx) leaq 352(%rsp), %rax movq %rax, 104(%rbx) leaq 360(%rsp), %rax movq %rax, 112(%rbx) leaq 368(%rsp), %rax movq %rax, 120(%rbx) leaq 376(%rsp), %rax movq %rax, 128(%rbx) leaq 384(%rsp), %rax movq %rax, 136(%rbx) leaq 392(%rsp), %rax movq %rax, 144(%rbx) leaq 400(%rsp), %rax movq %rax, 152(%rbx) leaq 408(%rsp), %rax movq %rax, 160(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 56(%rsp), %r12 leaq 48(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7computefifffffffffffffffffff, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $288, %rsp # imm = 0x120 .cfi_adjust_cfa_offset -288 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z22__device_stub__computefifffffffffffffffffff, .Lfunc_end0-_Z22__device_stub__computefifffffffffffffffffff .cfi_endproc # -- End function .globl _Z11initPointerf # -- Begin function _Z11initPointerf .type _Z11initPointerf,@function _Z11initPointerf: # @_Z11initPointerf .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movss %xmm0, 4(%rsp) # 4-byte Spill movl $40, %edi callq malloc movss 4(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero xorl %ecx, %ecx .LBB1_1: # =>This Inner Loop Header: Depth=1 movss %xmm0, (%rax,%rcx,4) incq %rcx cmpq $10, %rcx jne .LBB1_1 # %bb.2: popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z11initPointerf, .Lfunc_end1-_Z11initPointerf .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 subq $264, %rsp # imm = 0x108 .cfi_def_cfa_offset 288 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rsi, %r14 movq 8(%rsi), %rdi callq atof movsd %xmm0, 256(%rsp) # 8-byte Spill movq 16(%r14), %rdi callq atoi movl %eax, %ebx movq 24(%r14), %rdi callq atof movsd %xmm0, 248(%rsp) # 8-byte Spill movq 32(%r14), %rdi callq atof movsd %xmm0, 240(%rsp) # 8-byte Spill movq 40(%r14), %rdi callq atof movsd %xmm0, 232(%rsp) # 8-byte Spill movq 48(%r14), %rdi callq atof movsd %xmm0, 128(%rsp) # 8-byte Spill movq 56(%r14), %rdi callq atof movsd %xmm0, 120(%rsp) # 8-byte Spill movq 64(%r14), %rdi callq atof movsd %xmm0, 112(%rsp) # 8-byte Spill movq 72(%r14), %rdi callq atof movsd %xmm0, 104(%rsp) # 8-byte Spill movq 80(%r14), %rdi callq atof movsd %xmm0, 224(%rsp) # 8-byte Spill movq 88(%r14), %rdi callq atof movsd %xmm0, 216(%rsp) # 8-byte Spill movq 96(%r14), %rdi callq atof movsd %xmm0, 208(%rsp) # 8-byte Spill movq 104(%r14), %rdi callq atof movsd %xmm0, 200(%rsp) # 8-byte Spill movq 112(%r14), %rdi callq atof movsd %xmm0, 192(%rsp) # 8-byte Spill movq 120(%r14), %rdi callq atof movsd %xmm0, 184(%rsp) # 8-byte Spill movq 128(%r14), %rdi callq atof movsd %xmm0, 176(%rsp) # 8-byte Spill movq 136(%r14), %rdi callq atof movsd %xmm0, 168(%rsp) # 8-byte Spill movq 144(%r14), %rdi callq atof movsd %xmm0, 160(%rsp) # 8-byte Spill movq 152(%r14), %rdi callq atof movsd %xmm0, 152(%rsp) # 8-byte Spill movq 160(%r14), %rdi callq atof movsd %xmm0, 144(%rsp) # 8-byte Spill movq 168(%r14), %rdi callq atof movsd %xmm0, 136(%rsp) # 8-byte Spill movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_2 # %bb.1: cvtsd2ss 136(%rsp), %xmm8 # 8-byte Folded Reload cvtsd2ss 144(%rsp), %xmm9 # 8-byte Folded Reload cvtsd2ss 152(%rsp), %xmm10 # 8-byte Folded Reload cvtsd2ss 160(%rsp), %xmm11 # 8-byte Folded Reload cvtsd2ss 168(%rsp), %xmm12 # 8-byte Folded Reload cvtsd2ss 176(%rsp), %xmm13 # 8-byte Folded Reload cvtsd2ss 184(%rsp), %xmm14 # 8-byte Folded Reload cvtsd2ss 192(%rsp), %xmm15 # 8-byte Folded Reload cvtsd2ss 200(%rsp), %xmm4 # 8-byte Folded Reload cvtsd2ss 208(%rsp), %xmm5 # 8-byte Folded Reload cvtsd2ss 216(%rsp), %xmm6 # 8-byte Folded Reload cvtsd2ss 224(%rsp), %xmm7 # 8-byte Folded Reload xorps %xmm0, %xmm0 cvtsd2ss 104(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 104(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 112(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 112(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 120(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 120(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 128(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 128(%rsp) # 4-byte Spill cvtsd2ss 232(%rsp), %xmm3 # 8-byte Folded Reload cvtsd2ss 240(%rsp), %xmm2 # 8-byte Folded Reload cvtsd2ss 248(%rsp), %xmm1 # 8-byte Folded Reload xorps %xmm0, %xmm0 cvtsd2ss 256(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm8, 88(%rsp) movss %xmm9, 80(%rsp) movss %xmm10, 72(%rsp) movss %xmm11, 64(%rsp) movss %xmm12, 56(%rsp) movss %xmm13, 48(%rsp) movss %xmm14, 40(%rsp) movss %xmm15, 32(%rsp) movss %xmm4, 24(%rsp) movss %xmm5, 16(%rsp) movss %xmm6, 8(%rsp) movss %xmm7, (%rsp) movl %ebx, %edi movss 128(%rsp), %xmm4 # 4-byte Reload # xmm4 = mem[0],zero,zero,zero movss 120(%rsp), %xmm5 # 4-byte Reload # xmm5 = mem[0],zero,zero,zero movss 112(%rsp), %xmm6 # 4-byte Reload # xmm6 = mem[0],zero,zero,zero movss 104(%rsp), %xmm7 # 4-byte Reload # xmm7 = mem[0],zero,zero,zero callq _Z22__device_stub__computefifffffffffffffffffff .LBB2_2: callq hipDeviceSynchronize xorl %eax, %eax addq $264, %rsp # imm = 0x108 .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7computefifffffffffffffffffff, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z7computefifffffffffffffffffff,@object # @_Z7computefifffffffffffffffffff .section .rodata,"a",@progbits .globl _Z7computefifffffffffffffffffff .p2align 3, 0x0 _Z7computefifffffffffffffffffff: .quad _Z22__device_stub__computefifffffffffffffffffff .size _Z7computefifffffffffffffffffff, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z7computefifffffffffffffffffff" .size .L__unnamed_1, 32 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__computefifffffffffffffffffff .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7computefifffffffffffffffffff .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7computefifffffffffffffffffff ; -- Begin function _Z7computefifffffffffffffffffff .globl _Z7computefifffffffffffffffffff .p2align 8 .type _Z7computefifffffffffffffffffff,@function _Z7computefifffffffffffffffffff: ; @_Z7computefifffffffffffffffffff ; %bb.0: s_load_b256 s[4:11], s[0:1], 0x0 s_mov_b32 s2, 0x3b2d2a58 s_load_b128 s[16:19], s[0:1], 0x48 s_waitcnt lgkmcnt(0) v_div_scale_f32 v0, null, s10, s10, s9 v_div_scale_f32 v3, vcc_lo, s9, s10, s9 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v1, v0 s_waitcnt_depctr 0xfff v_fma_f32 v2, -v0, v1, 1.0 v_fmac_f32_e32 v1, v2, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v2, v3, v1 v_fma_f32 v4, -v0, v2, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v2, v4, v1 v_fma_f32 v0, -v0, v2, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v0, v0, v1, v2 v_div_fixup_f32 v0, v0, s10, s9 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f32 v1, null, 0xfa10f5fd, 0xfa10f5fd, v0 v_div_scale_f32 v4, vcc_lo, v0, 0xfa10f5fd, v0 v_rcp_f32_e32 v2, v1 s_waitcnt_depctr 0xfff v_fma_f32 v3, -v1, v2, 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v2, v3, v2 v_mul_f32_e32 v3, v4, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v5, -v1, v3, v4 v_fmac_f32_e32 v3, v5, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f32 v1, -v1, v3, v4 v_sqrt_f32_e32 v4, 0xff800000 v_div_fmas_f32 v1, v1, v2, v3 s_delay_alu instid0(VALU_DEP_1) v_div_fixup_f32 v0, v1, 0xfa10f5fd, v0 s_waitcnt_depctr 0xfff v_add_nc_u32_e32 v6, 1, v4 v_add_nc_u32_e32 v5, -1, v4 v_mul_f32_e32 v1, 0x3fb8aa3b, v0 v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v7, -v6, v4, 0xff800000 v_fma_f32 v2, 0x3fb8aa3b, v0, -v1 v_rndne_f32_e32 v3, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_fmamk_f32 v2, v0, 0x32a5705f, v2 :: v_dual_sub_f32 v1, v1, v3 v_add_f32_e32 v1, v1, v2 v_cvt_i32_f32_e32 v2, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_exp_f32_e32 v1, v1 s_waitcnt_depctr 0xfff v_ldexp_f32 v1, v1, v2 v_cndmask_b32_e32 v1, 0, v1, vcc_lo v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v0, 0x7f800000, v1, vcc_lo v_mul_f32_e32 v0, s8, v0 s_load_b256 s[8:15], s[0:1], 0x28 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_rcp_f32_e64 v1, |v0| v_cmp_gt_f32_e64 vcc_lo, |v0|, 1.0 s_waitcnt_depctr 0xfff v_cndmask_b32_e64 v1, |v0|, v1, vcc_lo v_mul_f32_e32 v2, v1, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v3, s2, v2, 0xbc7a590c v_fmaak_f32 v3, v2, v3, 0x3d29fb3f s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v3, v2, v3, 0xbd97d4d7 v_fmaak_f32 v3, v2, v3, 0x3dd931b2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v3, v2, v3, 0xbe1160e6 v_fmaak_f32 v3, v2, v3, 0x3e4cb8bf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v3, v2, v3, 0xbeaaaa62 v_mul_f32_e32 v2, v2, v3 v_fma_f32 v3, -v5, v4, 0xff800000 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v1, v1, v2 v_cmp_ge_f32_e64 s2, 0, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v3, 0x3fc90fdb, v1 v_cndmask_b32_e64 v2, v4, v5, s2 v_cmp_lt_f32_e64 s2, 0, v7 v_add_f32_e64 v4, 0x6a, s7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v2, v2, v6, s2 v_cndmask_b32_e32 v1, v1, v3, vcc_lo v_dual_mov_b32 v3, 0x260 :: v_dual_sub_f32 v4, s6, v4 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f32_e32 v2, 0x37800000, v2 v_bfi_b32 v0, 0x7fffffff, v1, v0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_class_f32_e32 vcc_lo, 0xff800000, v3 v_add_f32_e32 v0, 0x6946de11, v0 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v1, v2, 0xff800000, vcc_lo s_waitcnt lgkmcnt(0) v_dual_add_f32 v2, s4, v4 :: v_dual_sub_f32 v1, s8, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cmp_nle_f32_e32 vcc_lo, v2, v0 v_sub_f32_e64 v0, 0x264c, s9 v_cndmask_b32_e32 v31, v1, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_cmp_nlt_f32_e32 vcc_lo, v31, v0 s_cbranch_vccnz .LBB0_2 ; %bb.1: v_add_f32_e64 v0, 0x83f6db9c, s16 s_mov_b32 s2, 0x3d1c21a7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v0, 0x43277333, v0 v_floor_f32_e32 v0, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f32 v1, |v0|, -0.5, 0.5 v_mul_f32_e32 v2, v0, v0 v_cmp_ge_f32_e64 vcc_lo, |v0|, 0.5 v_cndmask_b32_e32 v1, v2, v1, vcc_lo v_cmp_lt_f32_e64 vcc_lo, |v0|, 0.5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fmaak_f32 v2, s2, v1, 0x3c5fc5da v_sqrt_f32_e32 v3, v1 v_fmaak_f32 v2, v1, v2, 0x3d034c3c s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v2, v1, v2, 0x3d3641b1 v_fmaak_f32 v2, v1, v2, 0x3d999bc8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v2, v1, v2, 0x3e2aaaac v_mul_f32_e32 v1, v1, v2 s_waitcnt_depctr 0xfff v_fmac_f32_e32 v3, v3, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add_f32_e32 v2, v3, v3 v_fma_f32 v1, |v0|, v1, |v0| v_mul_f32_e64 v3, s14, s15 v_sub_f32_e32 v2, 0x3fc90fdb, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v1, v2, v1, vcc_lo v_div_scale_f32 v2, null, s12, s12, s11 v_div_scale_f32 v7, vcc_lo, s11, s12, s11 v_bfi_b32 v0, 0x7fffffff, v1, v0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_rcp_f32_e32 v1, v2 v_div_scale_f32 v4, null, v0, v0, v3 v_div_scale_f32 v9, s2, v3, v0, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v5, v4 s_waitcnt_depctr 0xfff v_fma_f32 v6, -v2, v1, 1.0 v_fmac_f32_e32 v1, v6, v1 v_fma_f32 v6, -v4, v5, 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v8, v7, v1 v_fmac_f32_e32 v5, v6, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v6, -v2, v8, v7 v_mul_f32_e32 v10, v9, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v8, v6, v1 v_fma_f32 v6, -v4, v10, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v2, -v2, v8, v7 v_fmac_f32_e32 v10, v6, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f32 v1, v2, v1, v8 s_mov_b32 vcc_lo, s2 v_fma_f32 v2, -v4, v10, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f32 v31, v1, s12, s11 v_div_fmas_f32 v1, v2, v5, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fmac_f32_e64 v31, 0xff800000, s10 v_mul_f32_e64 v2, 0x80000000, s13 v_div_fixup_f32 v0, v1, v0, v3 s_delay_alu instid0(VALU_DEP_1) v_fmac_f32_e32 v31, v2, v0 .LBB0_2: s_cmp_lt_i32 s5, 1 s_cbranch_scc1 .LBB0_5 ; %bb.3: ; %.lr.ph v_mov_b32_e32 v0, s17 s_mov_b32 s2, 0x3d1c21a7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmamk_f32 v0, s18, 0x5812e00, v0 v_div_scale_f32 v1, null, v0, v0, 0 v_div_scale_f32 v4, vcc_lo, 0, v0, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v2, v1 s_waitcnt_depctr 0xfff v_fma_f32 v3, -v1, v2, 1.0 v_fmac_f32_e32 v2, v3, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v3, v4, v2 v_fma_f32 v5, -v1, v3, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v3, v5, v2 v_fma_f32 v1, -v1, v3, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v1, v1, v2, v3 v_div_fixup_f32 v0, v1, v0, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f32 v1, |v0|, -0.5, 0.5 v_mul_f32_e32 v2, v0, v0 v_cmp_ge_f32_e64 vcc_lo, |v0|, 0.5 v_cndmask_b32_e32 v1, v2, v1, vcc_lo v_cmp_lt_f32_e64 vcc_lo, |v0|, 0.5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fmaak_f32 v2, s2, v1, 0x3c5fc5da v_sqrt_f32_e32 v3, v1 v_fmaak_f32 v2, v1, v2, 0x3d034c3c s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v2, v1, v2, 0x3d3641b1 v_fmaak_f32 v2, v1, v2, 0x3d999bc8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v2, v1, v2, 0x3e2aaaac v_mul_f32_e32 v1, v1, v2 s_waitcnt_depctr 0xfff v_fmac_f32_e32 v3, v3, v1 v_fma_f32 v1, |v0|, v1, |v0| s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v2, v3, v3 v_sub_f32_e32 v2, 0x3fc90fdb, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v1, v2, v1, vcc_lo v_bfi_b32 v0, 0x7fffffff, v1, v0 s_delay_alu instid0(VALU_DEP_1) v_sub_f32_e32 v0, 0x60d75dad, v0 .LBB0_4: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_f32_e32 v31, v0, v31 s_add_i32 s5, s5, -1 s_cmp_eq_u32 s5, 0 s_cbranch_scc0 .LBB0_4 .LBB0_5: ; %._crit_edge s_load_b64 s[2:3], s[0:1], 0xa8 v_mbcnt_lo_u32_b32 v28, -1, 0 v_mov_b32_e32 v6, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v28 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v4 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_11 ; %bb.6: v_mov_b32_e32 v0, 0 s_mov_b32 s4, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[8:9], v0, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[1:2], v0, s[2:3] offset:40 global_load_b64 v[5:6], v0, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v2, v2, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v3, v1, 24 v_mul_lo_u32 v2, v2, 24 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v2, v3, v2 s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v5, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo global_load_b64 v[6:7], v[1:2], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[6:7], v[8:9] s_cbranch_execz .LBB0_10 ; %bb.7: ; %.preheader3.i.i.i.preheader s_mov_b32 s5, 0 .LBB0_8: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[1:2], v0, s[2:3] offset:40 global_load_b64 v[10:11], v0, s[2:3] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v7, v2, v9 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11] v_mov_b32_e32 v1, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2] v_mov_b32_e32 v6, v2 global_load_b64 v[6:7], v[5:6], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_8 ; %bb.9: ; %Flow410 s_or_b32 exec_lo, exec_lo, s5 .LBB0_10: ; %Flow412 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_11: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v5, 0 v_readfirstlane_b32 s4, v6 v_readfirstlane_b32 s5, v7 s_mov_b32 s10, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[8:9], v5, s[2:3] offset:40 global_load_b128 v[0:3], v5, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_13 ; %bb.12: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v10, vcc_lo, v0, s9 v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1 global_store_b128 v[10:11], v[6:9], off offset:8 .LBB0_13: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[6:7], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v2, s6 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v2, v6 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5 v_mov_b32_e32 v6, v5 v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15 v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14 s_clause 0x3 global_store_b128 v[8:9], v[4:7], off global_store_b128 v[8:9], v[10:13], off offset:16 global_store_b128 v[8:9], v[10:13], off offset:32 global_store_b128 v[8:9], v[10:13], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_21 ; %bb.14: v_mov_b32_e32 v10, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[2:3], v10, s[2:3] offset:40 v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5 s_waitcnt vmcnt(0) v_and_b32_e32 v3, s5, v3 v_and_b32_e32 v2, s4, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v4, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v4, v3 v_add_co_u32 v6, vcc_lo, v0, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo global_store_b64 v[6:7], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[4:5], v[13:14] s_cbranch_execz .LBB0_17 ; %bb.15: ; %.preheader1.i.i.i.preheader s_mov_b32 s10, 0 .LBB0_16: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_16 .LBB0_17: ; %Flow408 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v5, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v4, s10, 0 global_load_b64 v[2:3], v5, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_19 ; %bb.18: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[2:3], v[4:5], off offset:8 .LBB0_19: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[4:5], v[2:3], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_cbranch_vccnz .LBB0_21 ; %bb.20: global_load_b32 v2, v[2:3], off offset:24 v_mov_b32_e32 v3, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v2 s_waitcnt_vscnt null, 0x0 global_store_b64 v[4:5], v[2:3], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_21: ; %Flow409 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v0, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_22: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_24 ; %bb.23: ; in Loop: Header=BB0_22 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_24: ; in Loop: Header=BB0_22 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_26 ; %bb.25: ; in Loop: Header=BB0_22 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_27 .LBB0_26: ; in Loop: Header=BB0_22 Depth=1 s_mov_b32 s1, -1 .LBB0_27: ; %Flow403 ; in Loop: Header=BB0_22 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_22 ; %bb.28: global_load_b64 v[0:1], v[8:9], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_32 ; %bb.29: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_32 ; %bb.30: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_31: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_31 .LBB0_32: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[4:5] s_add_u32 s4, s4, .str@rel32@lo+4 s_addc_u32 s5, s5, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[4:5], 0 s_cbranch_scc0 .LBB0_118 ; %bb.33: s_waitcnt vmcnt(0) v_dual_mov_b32 v3, v1 :: v_dual_and_b32 v32, 2, v0 v_dual_mov_b32 v30, 0 :: v_dual_mov_b32 v7, 1 v_and_b32_e32 v2, -3, v0 v_mov_b32_e32 v6, 2 s_mov_b64 s[6:7], 7 .LBB0_34: ; =>This Loop Header: Depth=1 ; Child Loop BB0_37 Depth 2 ; Child Loop BB0_44 Depth 2 ; Child Loop BB0_52 Depth 2 ; Child Loop BB0_60 Depth 2 ; Child Loop BB0_68 Depth 2 ; Child Loop BB0_76 Depth 2 ; Child Loop BB0_84 Depth 2 ; Child Loop BB0_92 Depth 2 ; Child Loop BB0_100 Depth 2 ; Child Loop BB0_106 Depth 2 ; Child Loop BB0_115 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[6:7], 56 ; implicit-def: $vgpr10_vgpr11 ; implicit-def: $sgpr15 s_and_b32 s0, s0, exec_lo s_cselect_b32 s8, s6, 56 s_cselect_b32 s9, s7, 0 s_cmp_gt_u32 s8, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_39 ; %bb.35: ; in Loop: Header=BB0_34 Depth=1 v_mov_b32_e32 v10, 0 v_mov_b32_e32 v11, 0 s_cmp_eq_u32 s8, 0 s_cbranch_scc1 .LBB0_38 ; %bb.36: ; %.preheader31.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_lshl_b64 s[0:1], s[8:9], 3 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[4:5] .LBB0_37: ; %.preheader31.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v4, v30, s[12:13] s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s0, s10 v_or_b32_e32 v10, v4, v10 v_or_b32_e32 v11, v5, v11 s_cbranch_scc1 .LBB0_37 .LBB0_38: ; %Flow379 ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s15, 0 .LBB0_39: ; %Flow381 ; in Loop: Header=BB0_34 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[4:5] s_cbranch_vccnz .LBB0_41 ; %bb.40: ; in Loop: Header=BB0_34 Depth=1 global_load_b64 v[10:11], v30, s[4:5] s_add_i32 s15, s8, -8 s_add_u32 s0, s4, 8 s_addc_u32 s1, s5, 0 .LBB0_41: ; %.loopexit32.i ; in Loop: Header=BB0_34 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_46 ; %bb.42: ; in Loop: Header=BB0_34 Depth=1 v_mov_b32_e32 v12, 0 v_mov_b32_e32 v13, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_45 ; %bb.43: ; %.preheader29.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_44: ; %.preheader29.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v12, v4, v12 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v13, v5, v13 s_cbranch_scc1 .LBB0_44 .LBB0_45: ; %Flow374 ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_47 .LBB0_46: ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $sgpr14 .LBB0_47: ; %Flow376 ; in Loop: Header=BB0_34 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_49 ; %bb.48: ; in Loop: Header=BB0_34 Depth=1 global_load_b64 v[12:13], v30, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_49: ; %.loopexit30.i ; in Loop: Header=BB0_34 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_54 ; %bb.50: ; in Loop: Header=BB0_34 Depth=1 v_mov_b32_e32 v14, 0 v_mov_b32_e32 v15, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_53 ; %bb.51: ; %.preheader27.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_52: ; %.preheader27.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v14, v4, v14 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v15, v5, v15 s_cbranch_scc1 .LBB0_52 .LBB0_53: ; %Flow369 ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_55 .LBB0_54: ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_55: ; %Flow371 ; in Loop: Header=BB0_34 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_57 ; %bb.56: ; in Loop: Header=BB0_34 Depth=1 global_load_b64 v[14:15], v30, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_57: ; %.loopexit28.i ; in Loop: Header=BB0_34 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_62 ; %bb.58: ; in Loop: Header=BB0_34 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_61 ; %bb.59: ; %.preheader25.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_60: ; %.preheader25.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v16, v4, v16 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v17, v5, v17 s_cbranch_scc1 .LBB0_60 .LBB0_61: ; %Flow364 ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_63 .LBB0_62: ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr14 .LBB0_63: ; %Flow366 ; in Loop: Header=BB0_34 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_65 ; %bb.64: ; in Loop: Header=BB0_34 Depth=1 global_load_b64 v[16:17], v30, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_65: ; %.loopexit26.i ; in Loop: Header=BB0_34 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_70 ; %bb.66: ; in Loop: Header=BB0_34 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_69 ; %bb.67: ; %.preheader23.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_68: ; %.preheader23.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v18, v4, v18 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v19, v5, v19 s_cbranch_scc1 .LBB0_68 .LBB0_69: ; %Flow359 ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_71 .LBB0_70: ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_71: ; %Flow361 ; in Loop: Header=BB0_34 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_73 ; %bb.72: ; in Loop: Header=BB0_34 Depth=1 global_load_b64 v[18:19], v30, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_73: ; %.loopexit24.i ; in Loop: Header=BB0_34 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_78 ; %bb.74: ; in Loop: Header=BB0_34 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_77 ; %bb.75: ; %.preheader21.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_76: ; %.preheader21.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v20, v4, v20 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v21, v5, v21 s_cbranch_scc1 .LBB0_76 .LBB0_77: ; %Flow354 ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_79 .LBB0_78: ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr20_vgpr21 ; implicit-def: $sgpr14 .LBB0_79: ; %Flow356 ; in Loop: Header=BB0_34 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_81 ; %bb.80: ; in Loop: Header=BB0_34 Depth=1 global_load_b64 v[20:21], v30, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_81: ; %.loopexit22.i ; in Loop: Header=BB0_34 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_86 ; %bb.82: ; in Loop: Header=BB0_34 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_85 ; %bb.83: ; %.preheader.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[0:1] .LBB0_84: ; %.preheader.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v4, v30, s[12:13] s_add_i32 s14, s14, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 0 v_or_b32_e32 v22, v4, v22 v_or_b32_e32 v23, v5, v23 s_cbranch_scc1 .LBB0_84 .LBB0_85: ; %Flow349 ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, 0 s_branch .LBB0_87 .LBB0_86: ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s10, -1 .LBB0_87: ; %Flow351 ; in Loop: Header=BB0_34 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_89 ; %bb.88: ; in Loop: Header=BB0_34 Depth=1 global_load_b64 v[22:23], v30, s[0:1] .LBB0_89: ; %.loopexit.i ; in Loop: Header=BB0_34 Depth=1 s_waitcnt vmcnt(0) v_dual_mov_b32 v29, v28 :: v_dual_mov_b32 v4, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v29 v_mov_b32_e32 v5, 0 v_cmp_eq_u32_e64 s0, s0, v29 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_95 ; %bb.90: ; in Loop: Header=BB0_34 Depth=1 global_load_b64 v[26:27], v30, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v30, s[2:3] offset:40 global_load_b64 v[8:9], v30, s[2:3] s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v5, v5, v27 v_and_b32_e32 v4, v4, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v5, v5, 24 v_mul_hi_u32 v24, v4, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v24, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[24:25], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v30, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[4:5], v[26:27] s_cbranch_execz .LBB0_94 ; %bb.91: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s11, 0 .LBB0_92: ; %.preheader3.i.i19.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v30, s[2:3] offset:40 global_load_b64 v[24:25], v30, s[2:3] v_dual_mov_b32 v27, v5 :: v_dual_mov_b32 v26, v4 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v26 s_waitcnt vmcnt(0) v_mad_u64_u32 v[4:5], null, v8, 24, v[24:25] v_and_b32_e32 v24, v9, v27 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v24, 24, v[5:6] v_mov_b32_e32 v5, v8 global_load_b64 v[24:25], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v30, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[26:27] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_92 ; %bb.93: ; %Flow344 ; in Loop: Header=BB0_34 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_94: ; %Flow346 ; in Loop: Header=BB0_34 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 .LBB0_95: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_34 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[8:9], v30, s[2:3] offset:40 global_load_b128 v[24:27], v30, s[2:3] v_readfirstlane_b32 s10, v4 v_readfirstlane_b32 s11, v5 s_mov_b32 s16, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s12, v8 v_readfirstlane_b32 s13, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[10:11], s[12:13] s_mul_i32 s1, s13, 24 s_mul_hi_u32 s14, s12, 24 s_mul_i32 s15, s12, 24 s_and_saveexec_b32 s17, s0 s_cbranch_execz .LBB0_97 ; %bb.96: ; in Loop: Header=BB0_34 Depth=1 v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, v30 s_add_i32 s16, s14, s1 s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v24, s15 v_add_co_ci_u32_e32 v9, vcc_lo, s16, v25, vcc_lo global_store_b128 v[8:9], v[4:7], off offset:8 .LBB0_97: ; in Loop: Header=BB0_34 Depth=1 s_or_b32 exec_lo, exec_lo, s17 v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56 v_or_b32_e32 v4, 0, v3 v_or_b32_e32 v5, v2, v32 s_lshl_b64 s[12:13], s[12:13], 12 s_lshl_b32 s16, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s16, s16, 28 v_dual_cndmask_b32 v9, v4, v3 :: v_dual_cndmask_b32 v4, v5, v2 v_lshlrev_b64 v[2:3], 6, v[29:30] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v26, s12 v_add_co_ci_u32_e32 v27, vcc_lo, s13, v27, vcc_lo s_and_b32 s16, s16, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v26, vcc_lo, v5, v2 v_and_or_b32 v8, 0xffffff1f, v4, s16 v_add_co_ci_u32_e32 v27, vcc_lo, v27, v3, vcc_lo s_clause 0x3 global_store_b128 v[26:27], v[8:11], off global_store_b128 v[26:27], v[12:15], off offset:16 global_store_b128 v[26:27], v[16:19], off offset:32 global_store_b128 v[26:27], v[20:23], off offset:48 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_105 ; %bb.98: ; in Loop: Header=BB0_34 Depth=1 s_clause 0x1 global_load_b64 v[12:13], v30, s[2:3] offset:32 glc global_load_b64 v[2:3], v30, s[2:3] offset:40 v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v2 v_readfirstlane_b32 s17, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[10:11] s_mul_i32 s13, s17, 24 s_mul_hi_u32 s17, s16, 24 s_mul_i32 s16, s16, 24 s_add_i32 s17, s17, s13 v_add_co_u32 v8, vcc_lo, v24, s16 v_add_co_ci_u32_e32 v9, vcc_lo, s17, v25, vcc_lo s_mov_b32 s13, exec_lo global_store_b64 v[8:9], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v30, v[10:13], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[4:5], v[12:13] s_cbranch_execz .LBB0_101 ; %bb.99: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s16, 0 .LBB0_100: ; %.preheader1.i.i17.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11 s_sleep 1 global_store_b64 v[8:9], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v30, v[2:5], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_or_b32 s16, vcc_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s16 s_cbranch_execnz .LBB0_100 .LBB0_101: ; %Flow342 ; in Loop: Header=BB0_34 Depth=1 s_or_b32 exec_lo, exec_lo, s13 global_load_b64 v[2:3], v30, s[2:3] offset:16 s_mov_b32 s16, exec_lo s_mov_b32 s13, exec_lo v_mbcnt_lo_u32_b32 v4, s16, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_34 Depth=1 s_bcnt1_i32_b32 s16, s16 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v29, s16 s_waitcnt vmcnt(0) global_atomic_add_u64 v[2:3], v[29:30], off offset:8 .LBB0_103: ; in Loop: Header=BB0_34 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_waitcnt vmcnt(0) global_load_b64 v[4:5], v[2:3], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_cbranch_vccnz .LBB0_105 ; %bb.104: ; in Loop: Header=BB0_34 Depth=1 global_load_b32 v29, v[2:3], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s13, v29 s_waitcnt_vscnt null, 0x0 global_store_b64 v[4:5], v[29:30], off s_and_b32 m0, s13, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_105: ; %Flow343 ; in Loop: Header=BB0_34 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_add_i32 s14, s14, s1 v_add_co_u32 v2, vcc_lo, v24, s15 v_add_co_ci_u32_e32 v3, vcc_lo, s14, v25, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v2, 20 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo .LBB0_106: ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v4, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_108 ; %bb.107: ; in Loop: Header=BB0_106 Depth=2 global_load_b32 v4, v[2:3], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v4, 1, v4 .LBB0_108: ; in Loop: Header=BB0_106 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v4 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_110 ; %bb.109: ; in Loop: Header=BB0_106 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_111 .LBB0_110: ; in Loop: Header=BB0_106 Depth=2 s_mov_b32 s1, -1 .LBB0_111: ; %Flow337 ; in Loop: Header=BB0_106 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_106 ; %bb.112: ; in Loop: Header=BB0_34 Depth=1 global_load_b128 v[2:5], v[26:27], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_116 ; %bb.113: ; in Loop: Header=BB0_34 Depth=1 s_clause 0x2 global_load_b64 v[4:5], v30, s[2:3] offset:40 global_load_b64 v[12:13], v30, s[2:3] offset:24 glc global_load_b64 v[10:11], v30, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v14, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v9, v9, v15 :: v_dual_cndmask_b32 v8, v8, v14 v_and_b32_e32 v5, v9, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v4, v8, v4 v_mul_hi_u32 v14, v4, 24 v_mul_lo_u32 v4, v4, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v4, vcc_lo, v10, v4 v_mov_b32_e32 v10, v12 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v5, v14, v5 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[4:5], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v30, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_116 ; %bb.114: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_34 Depth=1 s_mov_b32 s0, 0 .LBB0_115: ; %.preheader.i.i16.i ; Parent Loop BB0_34 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[4:5], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v30, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_115 .LBB0_116: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_34 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s6, s6, s8 s_subb_u32 s7, s7, s9 s_add_u32 s4, s4, s8 s_addc_u32 s5, s5, s9 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc1 .LBB0_34 ; %bb.117: ; %Flow382 s_mov_b32 s0, 0 s_branch .LBB0_119 .LBB0_118: s_mov_b32 s0, -1 ; implicit-def: $vgpr2_vgpr3 .LBB0_119: ; %Flow397 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_148 ; %bb.120: s_waitcnt vmcnt(0) v_mov_b32_e32 v2, v28 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v2 v_cmp_eq_u32_e64 s0, s0, v2 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_126 ; %bb.121: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_125 ; %bb.122: ; %.preheader3.i.i.i38.preheader s_mov_b32 s5, 0 .LBB0_123: ; %.preheader3.i.i.i38 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_123 ; %bb.124: ; %Flow394 s_or_b32 exec_lo, exec_lo, s5 .LBB0_125: ; %Flow396 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_126: ; %.loopexit4.i.i.i33 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_128 ; %bb.127: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v3 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_128: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v2, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1f, v0, 32 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo v_mov_b32_e32 v2, v3 v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15 v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_136 ; %bb.129: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s4 v_mov_b32_e32 v12, s5 s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v8, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_132 ; %bb.130: ; %.preheader1.i.i.i36.preheader s_mov_b32 s10, 0 .LBB0_131: ; %.preheader1.i.i.i36 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_131 .LBB0_132: ; %Flow392 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_134 ; %bb.133: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_134: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_136 ; %bb.135: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_136: ; %Flow393 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_137: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_139 ; %bb.138: ; in Loop: Header=BB0_137 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_139: ; in Loop: Header=BB0_137 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_141 ; %bb.140: ; in Loop: Header=BB0_137 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_142 .LBB0_141: ; in Loop: Header=BB0_137 Depth=1 s_mov_b32 s1, -1 .LBB0_142: ; %Flow387 ; in Loop: Header=BB0_137 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_137 ; %bb.143: global_load_b128 v[2:5], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_147 ; %bb.144: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[0:1], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] v_dual_cndmask_b32 v5, v5, v12 :: v_dual_cndmask_b32 v4, v4, v11 v_and_b32_e32 v1, v5, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v4, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v6, v0 v_mov_b32_e32 v6, v9 v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo v_mov_b32_e32 v7, v10 global_store_b64 v[0:1], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v8, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_147 ; %bb.145: ; %.preheader.i.i.i35.preheader s_mov_b32 s0, 0 .LBB0_146: ; %.preheader.i.i.i35 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[6:7] v_dual_mov_b32 v6, v9 :: v_dual_mov_b32 v7, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_146 .LBB0_147: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_148: ; %__ockl_printf_append_string_n.exit ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v28 s_waitcnt vmcnt(0) v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v28 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_154 ; %bb.149: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[7:8], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[5:6], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v0, v0, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v9, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v9, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v5, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo global_load_b64 v[5:6], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[7:8] s_cbranch_execz .LBB0_153 ; %bb.150: ; %.preheader3.i.i.i45.preheader s_mov_b32 s5, 0 .LBB0_151: ; %.preheader3.i.i.i45 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v7, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v5, 24, v[9:10] v_and_b32_e32 v9, v6, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v9, 24, v[1:2] v_mov_b32_e32 v1, v5 global_load_b64 v[5:6], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[7:8] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_151 ; %bb.152: ; %Flow330 s_or_b32 exec_lo, exec_lo, s5 .LBB0_153: ; %Flow332 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_154: ; %.loopexit4.i.i.i39 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v29, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[4:5], v29, s[2:3] offset:40 global_load_b128 v[6:9], v29, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v4 v_readfirstlane_b32 s7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_156 ; %bb.155: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, v29 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v7, vcc_lo v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 global_store_b128 v[0:1], v[10:13], off offset:8 .LBB0_156: s_or_b32 exec_lo, exec_lo, s11 v_cvt_f64_f32_e32 v[4:5], v31 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[28:29] s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v8, s6 v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v8, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v2, 0xffffff1d, v2, 34 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13 v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15 s_clause 0x3 global_store_b128 v[0:1], v[2:5], off global_store_b128 v[0:1], v[8:11], off offset:16 global_store_b128 v[0:1], v[8:11], off offset:32 global_store_b128 v[0:1], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_164 ; %bb.157: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v4, vcc_lo, v6, s10 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v7, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[4:5], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_160 ; %bb.158: ; %.preheader1.i.i.i43.preheader s_mov_b32 s10, 0 .LBB0_159: ; %.preheader1.i.i.i43 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_159 .LBB0_160: ; %Flow328 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_162 ; %bb.161: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_162: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_164 ; %bb.163: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_164: ; %Flow329 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_165: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_167 ; %bb.166: ; in Loop: Header=BB0_165 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_167: ; in Loop: Header=BB0_165 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_169 ; %bb.168: ; in Loop: Header=BB0_165 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_170 .LBB0_169: ; in Loop: Header=BB0_165 Depth=1 s_mov_b32 s1, -1 .LBB0_170: ; %Flow323 ; in Loop: Header=BB0_165 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_165 ; %bb.171: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_175 ; %bb.172: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_175 ; %bb.173: ; %.preheader.i.i.i42.preheader s_mov_b32 s0, 0 .LBB0_174: ; %.preheader.i.i.i42 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_174 .LBB0_175: ; %__ockl_printf_append_args.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7computefifffffffffffffffffff .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 344 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 33 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7computefifffffffffffffffffff, .Lfunc_end0-_Z7computefifffffffffffffffffff ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 8076 ; NumSgprs: 22 ; NumVgprs: 33 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 33 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "%.17g\n" .size .str, 7 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 4 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: by_value - .offset: 20 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: by_value - .offset: 36 .size: 4 .value_kind: by_value - .offset: 40 .size: 4 .value_kind: by_value - .offset: 44 .size: 4 .value_kind: by_value - .offset: 48 .size: 4 .value_kind: by_value - .offset: 52 .size: 4 .value_kind: by_value - .offset: 56 .size: 4 .value_kind: by_value - .offset: 60 .size: 4 .value_kind: by_value - .offset: 64 .size: 4 .value_kind: by_value - .offset: 68 .size: 4 .value_kind: by_value - .offset: 72 .size: 4 .value_kind: by_value - .offset: 76 .size: 4 .value_kind: by_value - .offset: 80 .size: 4 .value_kind: by_value - .offset: 88 .size: 4 .value_kind: hidden_block_count_x - .offset: 92 .size: 4 .value_kind: hidden_block_count_y - .offset: 96 .size: 4 .value_kind: hidden_block_count_z - .offset: 100 .size: 2 .value_kind: hidden_group_size_x - .offset: 102 .size: 2 .value_kind: hidden_group_size_y - .offset: 104 .size: 2 .value_kind: hidden_group_size_z - .offset: 106 .size: 2 .value_kind: hidden_remainder_x - .offset: 108 .size: 2 .value_kind: hidden_remainder_y - .offset: 110 .size: 2 .value_kind: hidden_remainder_z - .offset: 128 .size: 8 .value_kind: hidden_global_offset_x - .offset: 136 .size: 8 .value_kind: hidden_global_offset_y - .offset: 144 .size: 8 .value_kind: hidden_global_offset_z - .offset: 152 .size: 2 .value_kind: hidden_grid_dims - .offset: 168 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 344 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7computefifffffffffffffffffff .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z7computefifffffffffffffffffff.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 33 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
91a68d108f0484a83b0fe6d9f493021b9ba492d3
#include "includes.h" __global__ void vecAdd(float* a, float* b, float* c, const int N) { const int i = blockIdx.x*blockDim.x + threadIdx.x; if(i<N) c[i] = a[i] + b[i]; }
.file "tmpxft_002abe4a_00000000-6_vecAdd.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .type _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i, @function _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z6vecAddPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .globl _Z6vecAddPfS_S_i .type _Z6vecAddPfS_S_i, @function _Z6vecAddPfS_S_i: .LFB2033: .cfi_startproc endbr64 jmp _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .cfi_endproc .LFE2033: .size _Z6vecAddPfS_S_i, .-_Z6vecAddPfS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z6vecAddPfS_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z6vecAddPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6vecAddPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */ /* 0x004fca0000000000 */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void vecAdd(float* a, float* b, float* c, const int N) { const int i = blockIdx.x*blockDim.x + threadIdx.x; if(i<N) c[i] = a[i] + b[i]; }
.text .file "vecAdd.hip" .globl _Z21__device_stub__vecAddPfS_S_i # -- Begin function _Z21__device_stub__vecAddPfS_S_i .type _Z21__device_stub__vecAddPfS_S_i,@function _Z21__device_stub__vecAddPfS_S_i: # @_Z21__device_stub__vecAddPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6vecAddPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__vecAddPfS_S_i, .Lfunc_end0-_Z21__device_stub__vecAddPfS_S_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6vecAddPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z6vecAddPfS_S_i,@object # @_Z6vecAddPfS_S_i .section .rodata,"a",@progbits .globl _Z6vecAddPfS_S_i .p2align 3, 0x0 _Z6vecAddPfS_S_i: .quad _Z21__device_stub__vecAddPfS_S_i .size _Z6vecAddPfS_S_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z6vecAddPfS_S_i" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__vecAddPfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6vecAddPfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6vecAddPfS_S_i ; -- Begin function _Z6vecAddPfS_S_i .globl _Z6vecAddPfS_S_i .p2align 8 .type _Z6vecAddPfS_S_i,@function _Z6vecAddPfS_S_i: ; @_Z6vecAddPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6vecAddPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6vecAddPfS_S_i, .Lfunc_end0-_Z6vecAddPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 180 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6vecAddPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z6vecAddPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
af9f5d6d569855837f5ccf13c8905183010653bf
#include "includes.h" __global__ void vector_add(float *out, float *a, float *b, int n) { int tid = blockIdx.x * blockDim.x + threadIdx.x; // Handling arbitrary vector size if (tid < n){ out[tid] = a[tid] + b[tid]; } }
.file "tmpxft_003106cc_00000000-6_vector_add.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z35__device_stub__Z10vector_addPfS_S_iPfS_S_i .type _Z35__device_stub__Z10vector_addPfS_S_iPfS_S_i, @function _Z35__device_stub__Z10vector_addPfS_S_iPfS_S_i: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z10vector_addPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z35__device_stub__Z10vector_addPfS_S_iPfS_S_i, .-_Z35__device_stub__Z10vector_addPfS_S_iPfS_S_i .globl _Z10vector_addPfS_S_i .type _Z10vector_addPfS_S_i, @function _Z10vector_addPfS_S_i: .LFB2033: .cfi_startproc endbr64 jmp _Z35__device_stub__Z10vector_addPfS_S_iPfS_S_i .cfi_endproc .LFE2033: .size _Z10vector_addPfS_S_i, .-_Z10vector_addPfS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z10vector_addPfS_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z10vector_addPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10vector_addPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x170] ; /* 0x00005c0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */ /* 0x004fca0000000000 */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void vector_add(float *out, float *a, float *b, int n) { int tid = blockIdx.x * blockDim.x + threadIdx.x; // Handling arbitrary vector size if (tid < n){ out[tid] = a[tid] + b[tid]; } }
.text .file "vector_add.hip" .globl _Z25__device_stub__vector_addPfS_S_i # -- Begin function _Z25__device_stub__vector_addPfS_S_i .type _Z25__device_stub__vector_addPfS_S_i,@function _Z25__device_stub__vector_addPfS_S_i: # @_Z25__device_stub__vector_addPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10vector_addPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z25__device_stub__vector_addPfS_S_i, .Lfunc_end0-_Z25__device_stub__vector_addPfS_S_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10vector_addPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z10vector_addPfS_S_i,@object # @_Z10vector_addPfS_S_i .section .rodata,"a",@progbits .globl _Z10vector_addPfS_S_i .p2align 3, 0x0 _Z10vector_addPfS_S_i: .quad _Z25__device_stub__vector_addPfS_S_i .size _Z10vector_addPfS_S_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z10vector_addPfS_S_i" .size .L__unnamed_1, 22 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__vector_addPfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z10vector_addPfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10vector_addPfS_S_i ; -- Begin function _Z10vector_addPfS_S_i .globl _Z10vector_addPfS_S_i .p2align 8 .type _Z10vector_addPfS_S_i,@function _Z10vector_addPfS_S_i: ; @_Z10vector_addPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s4, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10vector_addPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10vector_addPfS_S_i, .Lfunc_end0-_Z10vector_addPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 184 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10vector_addPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z10vector_addPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
03fe77fb17e960c5b96cf89e2d0603c4bd37188a
#include <stdlib.h> #include <stdio.h> int main(void){ int num_elements = 16; int num_bytes = num_elements*sizeof(int); int *device_array = 0; int *host_array = 0; host_array = (int *)malloc(num_bytes); cudaMalloc((void**)&device_array, num_bytes); cudaMemset(device_array, 0, num_bytes); cudaMemcpy(host_array, device_array, num_bytes, cudaMemcpyDeviceToHost); int i; for(i = 0; i<num_elements; i++) printf("%d\n", host_array[i]); free(host_array); cudaFree(device_array); return 0; }
.file "tmpxft_00200bb2_00000000-6_memory_model.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "%d\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 xorl %edi, %edi leaq .LC0(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 xorl %ebp, %ebp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $16, %rsp .cfi_def_cfa_offset 48 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax movq %rdi, (%rsp) movl $64, %edi call malloc@PLT movq %rsp, %rdi movl $64, %esi movq %rax, %rbx call cudaMalloc@PLT movq (%rsp), %rdi movl $64, %edx xorl %esi, %esi call cudaMemset@PLT movq (%rsp), %rsi movl $2, %ecx movq %rbx, %rdi movl $64, %edx call cudaMemcpy@PLT .L3: movl (%rbx,%rbp,4), %edx movq %r12, %rsi movl $2, %edi xorl %eax, %eax incq %rbp call __printf_chk@PLT cmpq $16, %rbp jne .L3 movq %rbx, %rdi call free@PLT movq (%rsp), %rdi call cudaFree@PLT movq 8(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $16, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2053: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2053: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> #include <stdlib.h> #include <stdio.h> int main(void){ int num_elements = 16; int num_bytes = num_elements*sizeof(int); int *device_array = 0; int *host_array = 0; host_array = (int *)malloc(num_bytes); hipMalloc((void**)&device_array, num_bytes); hipMemset(device_array, 0, num_bytes); hipMemcpy(host_array, device_array, num_bytes, hipMemcpyDeviceToHost); int i; for(i = 0; i<num_elements; i++) printf("%d\n", host_array[i]); free(host_array); hipFree(device_array); return 0; }
.text .file "memory_model.hip" .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rsp, %r14 movq $0, (%r14) movl $64, %edi callq malloc movq %rax, %rbx movl $64, %esi movq %r14, %rdi callq hipMalloc movq (%r14), %rdi movl $64, %edx xorl %esi, %esi callq hipMemset movq (%r14), %rsi movl $64, %edx movq %rbx, %rdi movl $2, %ecx callq hipMemcpy xorl %r14d, %r14d .LBB0_1: # =>This Inner Loop Header: Depth=1 movl (%rbx,%r14,4), %esi movl $.L.str, %edi xorl %eax, %eax callq printf incq %r14 cmpq $16, %r14 jne .LBB0_1 # %bb.2: movq %rbx, %rdi callq free movq (%rsp), %rdi callq hipFree xorl %eax, %eax addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size main, .Lfunc_end0-main .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%d\n" .size .L.str, 4 .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
b907bef3ebb3955df5586b6f2a7266be85331bc9
#include <stdio.h> #include <cuda_runtime.h> #include <cuda.h> #include <stdlib.h> #include "device_launch_parameters.h" #include <thrust/scan.h> #include <thrust/device_vector.h> #include <thrust/count.h> const int BASE1 = 10000 + 7; const int BASE2 = 100000 + 3; const int MOD1 = 1000000 + 3; const int MOD2 = 1000000 + 37; __global__ void findhash(int *d_qvert,int *d_qverc,int *d_qvid,int *d_qelist,bool *d_over,bool *d_qtree,int *d_hash1,int *d_hash2) { int i; int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=d_qverc[0]) return ; if(d_qvid[ver]!=0) return; int l=d_qvert[ver+1]; int hash1=1,hash2=1; int flag=0; for(i=d_qvert[ver];i<l;i++) { int m=d_qelist[i]; bool treeedge=d_qtree[i]; if(treeedge){ int tt=d_qvid[m]; if(tt==0) return; flag=1; hash1=(hash1*1L*BASE1)*tt % MOD1; hash2=(hash2*1L*BASE2)*tt % MOD2; } } if(flag==0) return; if(flag==1){ *d_over=false; d_hash1[hash1]=1; d_hash2[hash2]=1; } } __global__ void setdeg1(int *d_qvert,int *d_qverc,int *d_qvid,bool *d_qtree) { int i; int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=d_qverc[0]) return ; if(d_qvid[ver]!=0) return; int l=d_qvert[ver+1]; bool treeedge; for(i=d_qvert[ver];i<l;i++) { treeedge=d_qtree[i]; if(treeedge) return; } //printf("%d %d\n",ver,i); d_qvid[ver]=1; } /*__global__ void alignhash(bool *d_hash1,bool *d_hash2) { int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=1000038) return ; if(d_hash1[ver] || d_hash2[ver]){ d_hash1=true; } }*/ __global__ void puttoid(int *d_qvert,int *d_qverc,int *d_qvid,int *d_qelist,bool *d_qtree,int *d_loc,int * d_qidtov) { int i; int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=d_qverc[0]) return ; if(d_qvid[ver]!=0) return; int l=d_qvert[ver+1]; int hash1=1,hash2=1; int flag=0; for(i=d_qvert[ver];i<l;i++) { int m=d_qelist[i]; bool treeedge=d_qtree[i]; if(treeedge){ int tt=d_qvid[m]; if(tt==0) return; flag=1; hash1=(hash1*1L*BASE1)*tt % MOD1; hash2=(hash2*1L*BASE2)*tt % MOD2; } } //printf("%d %d %d \n",ver,flag,d_loc[hash1]); if(flag==0) return; int id=d_loc[hash1]; d_qvid[ver]=id; d_qidtov[id]=ver; } __device__ bool chechall(int ver,bool *check,int i,int dfrom,int dto,int *d_delist,int *d_qelist,int *d_qvid,int qfrom,int qto,int ** d_dcvslist){ //int ql=qfrom-qto; int ql=qto-qfrom; int j,k,l; //d_dcvslist[2][ql]=true; if(i==ql){ k=d_qelist[i+qfrom-1]; k=d_qvid[k]; if(k>=d_qvid[ver]) return true; for(j=dfrom;j<dto;j++){ l=d_delist[j]; if(check[l]) continue; if(!d_dcvslist[k][l]) continue; return true; } } else{ int res=false; k=d_qelist[i+qfrom-1]; k=d_qvid[k]; if(k>=d_qvid[ver]) return chechall(ver,check,i+1,dfrom,dto,d_delist,d_qelist,d_qvid,qfrom,qto,d_dcvslist); for(j=dfrom;j<dto;j++){ l=d_delist[j]; if(check[l]) continue; if(!d_dcvslist[k][l]) continue; check[l]=true; res|=chechall(ver,check,i+1,dfrom,dto,d_delist,d_qelist,d_qvid,qfrom,qto,d_dcvslist); if(res==true) return true; check[l]=false; } } return false; } __global__ void findcvs(int ver,int *d_dvert,int *d_dverc,int *d_delist,int *d_qvert,int *d_qelist,int *d_qvid,int ** d_dcvslist ) { //int i; int dver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(dver>=d_dverc[0]) return ; int ql=d_qvert[ver+1]-d_qvert[ver]; int dl=d_dvert[dver+1]-d_dvert[dver]; if(ql>dl) return; bool *checked=(bool*)malloc(sizeof(bool)*d_dverc[0]); //bool *checked=new bool[d_dverc[0]]; memset(checked,false,sizeof(bool)*d_dverc[0]); //chechall(bool *check,int i,int dfrom,int dto,int *d_delist,int *d_qelist,int *d_qvid,int qfrom,int qto,bool ** d_dcvslist) if(chechall(ver,checked,1,d_dvert[dver],d_dvert[dver+1],d_delist,d_qelist,d_qvid,d_qvert[ver],d_qvert[ver+1],d_dcvslist)) d_dcvslist[d_qvid[ver]][dver]=true; free(checked); } __global__ void puttolist(int *d_dverc,int *d_loc,int * d_dcvslist ) { int dver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(dver>=d_dverc[0]) return ; if(d_loc[dver]!=d_loc[dver+1]) d_dcvslist[d_loc[dver]]=dver; } __global__ void checkperm(bool *found,int * qdmap,int * d_qverc,int * d_qelist,int * d_qvert,int * d_dvert,int *d_delist){ int i; //found[0]=false; int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=d_qverc[0]) return ; int n,p,j,k,flag=0; //for(ver=0;ver<d_qverc[0];ver++){ int l=d_qvert[ver+1]; int dver=qdmap[ver]; n=d_dvert[dver+1]; for(i=d_qvert[ver];i<l;i++) { flag=0; j=d_qelist[i]; p=d_dvert[dver]; k=qdmap[j]; for(;p<n;p++){ if(k==d_delist[p]){ flag=1; break; } } if(!flag){ *found=false; return; } } //} } __global__ void findall(int *d_mapans,int *d_cans,int *d_qvid,int * d_qverc,int * d_qelist,int * d_qvert,int * d_dvert,int *d_delist,int ** d_cvsverlist,int * d_size_cvs) { bool found[1]={true}; long long int blockId = blockIdx.x + blockIdx.y * gridDim.x + gridDim.x * gridDim.y * blockIdx.z; long long int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z) + (threadIdx.z * (blockDim.x * blockDim.y)) + (threadIdx.y * blockDim.x) + threadIdx.x; int i=0; long long int indexperm=threadId; for(i=0;i<d_qverc[0];i++){ int j=d_qvid[i]; indexperm/=d_size_cvs[j]; } if(indexperm) return; indexperm=threadId; int *d_qdmap=&d_mapans[d_qverc[0]*threadId];//new int[d_qverc[0]]; for(i=0;i<d_qverc[0];i++){ int j=d_qvid[i]; d_qdmap[i]=d_cvsverlist[j][indexperm%d_size_cvs[j]]; indexperm/=d_size_cvs[j]; } //dim3 blocks((max/16 )+ 1,(max/16)+1); //dim3 threads(16,16); //found[0]=true; //checkperm<<<blocks,threads>>> (found,d_qdmap,d_qverc,d_qelist,d_qvert,d_dvert,d_delist); int n,p,j,k,flag=0,ver; for(ver=0;ver<d_qverc[0];ver++){ int l=d_qvert[ver+1]; int dver=d_qdmap[ver]; n=d_dvert[dver+1]; for(i=d_qvert[ver];i<l;i++) { flag=0; j=d_qelist[i]; p=d_dvert[dver]; k=d_qdmap[j]; for(;p<n;p++){ if(k==d_delist[p]){ flag=1; break; } } if(!flag){ *found=false; return; } } } if(found[0]){ d_cans[threadId]=1; //printf("%d ", threadId); } //delete d_qdmap; } int * qdmap; int *d_qverc,*d_dverc; int *d_qvid,*d_qidtov,*h_qidtov,*h_qvid; int *d_qvert,*d_qelist,*d_dvert,*d_delist;//,*d_dvelist,*d_qvelist; bool *d_qtree,*d_over; int *d_qdmap; bool h_over; /*void callforallperm(bool * check,int ** cvslist,int i,int max,int dmax){ int j,k,l; l=h_qvid[i-1]; //printf("i%d %di",i,l); if(i==max){ for(j=0;j<dmax;j++) if(cvslist[l][j] && !check[j]){ qdmap[i-1]=j; dim3 blocks((max/16 )+ 1,(max/16)+1); dim3 threads(16,16); h_over=true; //for(k=0;k<max;k++) // printf("%d ",qdmap[k]); cudaMemcpy(d_over, &h_over, sizeof(bool), cudaMemcpyHostToDevice) ; cudaMemcpy(d_qdmap, qdmap, sizeof(int)*(max+1), cudaMemcpyHostToDevice); checkperm<<<blocks,threads>>> (d_over,d_qdmap,d_qverc,d_qelist,d_qvert,d_dvert,d_delist); //checkperm(bool *found,int * qdmap,int * d_qverc,int * d_qelist,int * d_qvert,int * d_dvert,int *d_delist) cudaError_t err = cudaGetLastError(); if(err!=cudaSuccess) { printf("Error: %s\n", cudaGetErrorString(err)); printf("Not Ok"); } cudaMemcpy(&h_over, d_over, sizeof(bool), cudaMemcpyDeviceToHost) ; if(h_over){ for(k=0;k<max;k++) printf("%d ",qdmap[k]); //printf("\n"); printf("OK\n"); } //printf("\n"); } } else{ for(j=0;j<dmax;j++){ //printf("%d %d %d\n",j,check[j],cvslist[l][j]); if(cvslist[l][j] && !check[j]){ check[j]=true; qdmap[i-1]=j; callforallperm(check,cvslist,i+1,max,dmax); check[j]=false; } } } }*/ int main(int argc, char **argv) { int deviceId = 4; cudaSetDevice(deviceId); int h_qverc,h_dverc; int *h_qvert,*h_qelist,*h_dvert,*h_delist;//,*h_dvelist,*h_qvelist; bool *h_qtree; int *d_hash1,*d_hash2; int i,j; int **h_cvslist,**d_cvslist,**h_tem; scanf("%d",&h_qverc); h_qvert=(int *)malloc(sizeof(int)*(h_qverc+1)); h_qvid=(int *)malloc(sizeof(int)*(h_qverc+1)); h_qidtov=(int *)malloc(sizeof(int)*(h_qverc+1)); h_tem=(int **)malloc(sizeof(int*)*(h_qverc+1)); h_cvslist=(int **)malloc(sizeof(int*)*(h_qverc+1)); for(i=0;i<=h_qverc;i++){ scanf("%d",&h_qvert[i]); } h_qelist=(int *)malloc(sizeof(int)*h_qvert[h_qverc]); for(i=0;i<h_qvert[h_qverc];i++) scanf("%d",&h_qelist[i]); h_qtree=(bool *)malloc(sizeof(bool)*h_qvert[h_qverc]); for(i=0;i<h_qvert[h_qverc];i++){ scanf("%d",&j); if(j==1) h_qtree[i]=true; else h_qtree[i]=false; } scanf("%d",&h_dverc); h_dvert=(int *)malloc(sizeof(int)*(h_dverc+1)); for(i=0;i<=h_dverc;i++){ scanf("%d",&h_dvert[i]); } for(i=0;i<=h_qverc;i++) h_cvslist[i]=(int *)malloc(sizeof(int)*(h_dverc+1)); h_delist=(int *)malloc(sizeof(int)*h_dvert[h_dverc]); for(i=0;i<h_dvert[h_dverc];i++) scanf("%d",&h_delist[i]); cudaMalloc(&d_qverc,sizeof(int)); cudaMalloc(&d_over,sizeof(bool)); cudaMalloc(&d_qvert,sizeof(int)*(h_qverc+1)); cudaMalloc(&d_qidtov,sizeof(int)*(h_qverc+1)); //cudaMalloc(&d_loc,sizeof(int)*(h_qverc+1)); cudaMalloc(&d_qelist,sizeof(int)*h_qvert[h_qverc]); cudaMalloc(&d_qtree,sizeof(bool)*h_qvert[h_qverc]); cudaMalloc(&d_hash1,sizeof(int)*1000038); cudaMalloc(&d_hash2,sizeof(int)*1000038); cudaMalloc(&d_qvid,sizeof(int)*(h_qverc+1)); cudaMemcpy(d_qverc,&h_qverc,sizeof(int),cudaMemcpyHostToDevice); cudaMemcpy(d_qvert,h_qvert,sizeof(int)*(h_qverc+1),cudaMemcpyHostToDevice); cudaMemcpy(d_qelist,h_qelist,sizeof(int)*h_qvert[h_qverc],cudaMemcpyHostToDevice); cudaMemcpy(d_qtree,h_qtree,sizeof(bool)*h_qvert[h_qverc],cudaMemcpyHostToDevice); cudaMemset(d_hash1,0,sizeof(int)*1000038); cudaMemset(d_hash2,0,sizeof(int)*1000038); //cudaMemset(d_loc,0,sizeof(int)*(h_qverc+1)); cudaMemset(d_qidtov,-1,sizeof(int)*(h_qverc+1)); cudaMemset(d_qvid,0,sizeof(int)*(h_qverc+1)); int *h_hash1=(int *)malloc(sizeof(int)*1000038); int *h_hash2=(int *)malloc(sizeof(int)*1000038); dim3 blocks((sqrt(h_qverc)/16 )+ 1,(sqrt(h_qverc)/16)+1); dim3 threads(16,16); //int *d_qvert,int *d_dverc,int *d_qvid,int *d_qelist,bool *d_over,bool *d_hash1,bool *d_hash2) h_over=true; //h_qvid[1]=1; //h_qvid[3]=1; //cudaMemcpy(d_qvid,h_qvid,sizeof(int)*(h_qverc+1),cudaMemcpyHostToDevice); //printf("qt%d %dqt\n",h_qtree[0],h_qtree[1]); setdeg1<<<blocks,threads>>>(d_qvert,d_qverc,d_qvid,d_qtree); h_over=false; int maxval=2; while(!h_over) { h_over=true; cudaMemcpy(d_over, &h_over, sizeof(bool), cudaMemcpyHostToDevice) ; cudaMemset(d_hash1,0,sizeof(int)*1000038); findhash <<<blocks,threads>>> (d_qvert,d_qverc,d_qvid,d_qelist,d_over,d_qtree,d_hash1,d_hash2); //(int *d_qvert,int *d_dverc,int *d_qvid,int *d_qelist,bool *d_over,bool *d_hash1,bool *d_qtree,bool *d_hash2) cudaError_t err = cudaGetLastError(); if(err!=cudaSuccess) { printf("Error: %s\n", cudaGetErrorString(err)); printf("Not Ok"); } cudaMemcpy(h_hash1,d_hash1,sizeof(int)*1000038,cudaMemcpyDeviceToHost); h_hash1[0]+=maxval; thrust::exclusive_scan(h_hash1,h_hash1+1000038,h_hash1); maxval=h_hash1[1000037]; cudaMemcpy(d_hash1,h_hash1,sizeof(int)*1000038,cudaMemcpyHostToDevice); puttoid<<<blocks,threads>>>(d_qvert,d_qverc,d_qvid,d_qelist,d_qtree,d_hash1,d_qidtov); /// cudaMemcpy(h_hash2,d_hash2,sizeof(bool)*1000038,cudaMemcpyDeviceToHost); cudaMemcpy(&h_over, d_over, sizeof(bool), cudaMemcpyDeviceToHost) ; //printf("over flag:%d ",h_over); /*for(i=0;i<h_qverc;i++){ //if() printf("%d ",h_qvid[i]); // if(h_hash2[i]) // printf("h2 %d ",i); // if(h_hash1[i] || h_hash2[i]) // printf("\n"); } printf("\n");*/ } cudaMemcpy(h_qvid,d_qvid,sizeof(int)*h_qverc,cudaMemcpyDeviceToHost); cudaMemcpy(h_qidtov,d_qidtov,sizeof(int)*(h_qverc+1),cudaMemcpyDeviceToHost); for(i=0;i<=h_qverc;i++){ printf("%d ",h_qidtov[i]); } printf("\n"); for(i=0;i<=h_qverc;i++){ printf("%d ",h_qvid[i]); } printf("\n"); cudaFree(d_qtree); cudaFree(d_hash1); cudaFree(d_hash2); free(h_hash1); free(h_hash2); free(h_qtree); cudaMalloc(&d_cvslist,sizeof(int*)*(h_qverc+1)); for(i=0;i<=h_qverc;i++){ cudaMalloc(&h_tem[i],sizeof(int)*(h_dverc+1)); cudaMemset(h_tem[i],0,sizeof(int)*(h_dverc+1)); } cudaMemset(h_tem[1],1,sizeof(int)*(h_dverc+1)); cudaMemcpy(d_cvslist,h_tem,sizeof(int*)*(h_qverc+1),cudaMemcpyHostToDevice); cudaMalloc(&d_dvert,sizeof(int)*(h_dverc+1)); cudaMalloc(&d_dverc,sizeof(int)); cudaMalloc(&d_delist,sizeof(int)*h_dvert[h_dverc]); cudaMemcpy(d_dverc,&h_dverc,sizeof(int),cudaMemcpyHostToDevice); cudaMemcpy(d_dvert,h_dvert,sizeof(int)*(h_dverc+1),cudaMemcpyHostToDevice); cudaMemcpy(d_delist,h_delist,sizeof(int)*h_dvert[h_dverc],cudaMemcpyHostToDevice); dim3 dblocks((sqrt(h_dverc)/16 )+ 1,(sqrt(h_dverc)/16)+1); dim3 dthreads(16,16); int **d_cvsverlist,**d_temverlist; int *d_size_cvs,*h_size_cvs; memset(h_cvslist[1],1,sizeof(int)*(h_dverc+1)); h_size_cvs=(int *)malloc(sizeof(int)*(h_qverc+1)); memset(h_size_cvs,0,sizeof(int)*(h_qverc+1)); cudaMalloc(&d_size_cvs,sizeof(int)*(h_qverc+1)); cudaMemset(d_size_cvs,0,sizeof(int)*(h_qverc+1)); cudaMalloc(&d_cvsverlist,sizeof(int*)*(h_qverc+1)); d_temverlist=(int **)malloc(sizeof(int*)*(h_qverc+1)); for(i=0;i<=h_qverc;i++){ cudaMalloc(&d_temverlist[i],sizeof(int)*(h_dverc+1)); cudaMemset(d_temverlist[i],0,sizeof(int)*(h_dverc+1)); } cudaMemcpy(d_cvsverlist,d_temverlist,sizeof(int*)*(h_qverc+1),cudaMemcpyHostToDevice); long long int totalthreads=1; for(i=0;i<h_dverc;i++) h_cvslist[1][i]=i; cudaMemcpy(d_temverlist[1],h_cvslist[1],sizeof(int)*(h_dverc+1),cudaMemcpyHostToDevice); h_size_cvs[1]=h_dverc; for(i=0;i<=h_qverc;i++) { if(h_qidtov[i]!=-1) { //findcvs(int ver,int *d_dvert,int *d_dverc,int *d_delist,int *d_qvert,int *d_qelist,int *d_qvid,bool ** d_dcvslist ) findcvs<<<dblocks,dthreads>>>(h_qidtov[i],d_dvert,d_dverc,d_delist,d_qvert,d_qelist,d_qvid,d_cvslist); cudaError_t err = cudaGetLastError(); cudaMemcpy(h_cvslist[i],h_tem[i],sizeof(int)*(h_dverc+1),cudaMemcpyDeviceToHost); for(j=0;j<=h_dverc;j++) if(h_cvslist[i][j]) printf("%d ",j); printf("\n"); //printf("%d ",h_qidtov[i]); thrust::exclusive_scan(h_cvslist[i],h_cvslist[i]+h_dverc+1,h_cvslist[i]); h_size_cvs[i]=h_cvslist[i][h_dverc]; cudaMemcpy(h_tem[i],h_cvslist[i],sizeof(int)*(h_dverc+1),cudaMemcpyHostToDevice); puttolist<<<dblocks,dthreads>>>(d_dverc,h_tem[i],d_temverlist[i]); // cudaMemcpy(h_cvslist[i],d_temverlist[i],sizeof(int)*(h_dverc+1),cudaMemcpyDeviceToHost); // for(j=0;j<=h_dverc;j++) // printf("%d ",h_cvslist[i][j]); } } // cudaMemcpy(h_delist,d_delist,sizeof(int)*(h_dvert[h_dverc]),cudaMemcpyDeviceToHost); // for(j=0;j<h_dvert[h_dverc];j++) // printf("%d ",h_delist[j]); for(i=0;i<h_qverc;i++) if(h_size_cvs[h_qvid[i]]) totalthreads*=h_size_cvs[h_qvid[i]]; printf("Start %lld\n",totalthreads); cudaMemcpy(d_size_cvs,h_size_cvs,sizeof(int)*(h_qverc+1),cudaMemcpyHostToDevice); //totalthreads=1000; dim3 dpblocks(((int)(sqrt(totalthreads)/16 )+ 1),((int)(sqrt(totalthreads)/16)+1)); dim3 dpthreads(16,16); int *d_mapans,*d_countans,*h_countans; cudaMalloc(&d_mapans,sizeof( int)*totalthreads*(h_qverc+1)); cudaMalloc(&d_countans,sizeof( int)*(totalthreads+1)); cudaMemset(d_countans,0,sizeof( int)*(totalthreads+1)); //h_countans=(int *)malloc(sizeof(int)*(totalthreads+1)); //h_countans=0; //cudaMemcpy(d_countans, &h_countans, sizeof( int), cudaMemcpyHostToDevice) ; //cudaMemcpy(&h_countans, d_qverc, sizeof(int), cudaMemcpyDeviceToHost) ; //printf("%d\n",h_countans); findall<<<dpblocks,dpthreads>>> (d_mapans,d_countans,d_qvid,d_qverc,d_qelist,d_qvert,d_dvert,d_delist,d_cvsverlist,d_size_cvs); thrust::device_ptr<int> cptr=thrust::device_pointer_cast(d_countans); //int sum=thrust::count(cptr,cptr+totalthreads,1); //cudaMemcpy(h_countans, d_countans, sizeof(int)*totalthreads, cudaMemcpyDeviceToHost) ; //thrust::exclusive_scan(h_countans,h_countans+totalthreads+1,h_countans); //printf("%d\n",h_countans[totalthreads-1] ); //printf("%d\n",h_countans); //printf("%d\n",sum); /*j=0; for(i=0;i<totalthreads;i++) if(h_countans[i]) j++; printf("%d\n",j); *///bool * check=(bool *)malloc(sizeof(bool)*(h_dverc+1)); //memset(check,false,sizeof(bool)*(h_dverc+1)); //qdmap=(int *)malloc(sizeof(int)*(h_qverc+1)); //cudaMalloc(&d_qdmap,sizeof(int)*(h_qverc+1)); //callforallperm(check,h_cvslist,1,h_qverc,h_dverc); cudaFree(d_over); cudaFree(d_qverc); cudaFree(d_qvert); cudaFree(d_qelist); cudaFree(d_qvid); cudaFree(d_qidtov); cudaFree(d_dvert); cudaFree(d_delist); cudaFree(d_dverc); cudaFree(d_cvslist); cudaFree(d_cvsverlist); cudaFree(d_size_cvs); /*free(h_qvid); free(h_qvert); //free(h_qelist); free(h_qidtov); free(h_cvslist); free(h_dvert); free(h_delist);*/ }
.file "tmpxft_0025a6ec_00000000-6_isokernel.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .section .text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .weak nvtxEtiGetModuleFunctionTable_v3 .hidden nvtxEtiGetModuleFunctionTable_v3 .type nvtxEtiGetModuleFunctionTable_v3, @function nvtxEtiGetModuleFunctionTable_v3: .LFB6203: .cfi_startproc endbr64 decl %edi xorl %eax, %eax cmpl $5, %edi ja .L1 leaq .L4(%rip), %rcx movslq (%rcx,%rdi,4), %rax addq %rcx, %rax notrack jmp *%rax .section .rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .align 4 .align 4 .L4: .long .L9-.L4 .long .L14-.L4 .long .L7-.L4 .long .L6-.L4 .long .L5-.L4 .long .L3-.L4 .section .text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .L9: leaq 560+nvtxGlobals_v3(%rip), %rcx jmp .L18 .L7: leaq 776+nvtxGlobals_v3(%rip), %rcx movl $128, %eax jmp .L8 .L6: leaq 904+nvtxGlobals_v3(%rip), %rcx jmp .L19 .L5: leaq 968+nvtxGlobals_v3(%rip), %rcx .L18: movl $136, %eax jmp .L8 .L3: leaq 1104+nvtxGlobals_v3(%rip), %rcx .L19: movl $64, %eax jmp .L8 .L14: leaq 696+nvtxGlobals_v3(%rip), %rcx movl $80, %eax .L8: testq %rdx, %rdx je .L10 shrl $3, %eax decl %eax movl %eax, (%rdx) .L10: testq %rsi, %rsi jne .L11 .L12: movl $1, %eax ret .L11: movq %rcx, (%rsi) jmp .L12 .L1: ret .cfi_endproc .LFE6203: .size nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3 .section .text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat .weak nvtxGetExportTable_v3 .hidden nvtxGetExportTable_v3 .type nvtxGetExportTable_v3, @function nvtxGetExportTable_v3: .LFB6204: .cfi_startproc endbr64 leaq 8+nvtxGlobals_v3(%rip), %rax cmpl $1, %edi je .L21 cmpl $3, %edi leaq 16(%rax), %rax movl $0, %edx cmovne %rdx, %rax .L21: ret .cfi_endproc .LFE6204: .size nvtxGetExportTable_v3, .-nvtxGetExportTable_v3 .section .text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat .weak nvtxEtiSetInjectionNvtxVersion_v3 .hidden nvtxEtiSetInjectionNvtxVersion_v3 .type nvtxEtiSetInjectionNvtxVersion_v3, @function nvtxEtiSetInjectionNvtxVersion_v3: .LFB6205: .cfi_startproc endbr64 ret .cfi_endproc .LFE6205: .size nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3 .text .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB11189: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE11189: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .type _ZN6thrust20THRUST_200700_890_NS14exclusive_scanIPiS2_EET0_T_S4_S3_.isra.0, @function _ZN6thrust20THRUST_200700_890_NS14exclusive_scanIPiS2_EET0_T_S4_S3_.isra.0: .LFB12112: .cfi_startproc cmpq %rsi, %rdi je .L28 xorl %eax, %eax movl (%rdi), %ecx subq %rdi, %rsi movl %eax, (%rdx) xorl %eax, %eax .L30: addq $4, %rax cmpq %rsi, %rax je .L28 movl (%rdi,%rax), %r8d movl %ecx, (%rdx,%rax) addl %r8d, %ecx jmp .L30 .L28: ret .cfi_endproc .LFE12112: .size _ZN6thrust20THRUST_200700_890_NS14exclusive_scanIPiS2_EET0_T_S4_S3_.isra.0, .-_ZN6thrust20THRUST_200700_890_NS14exclusive_scanIPiS2_EET0_T_S4_S3_.isra.0 .type _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, @function _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0: .LFB12116: .cfi_startproc jmp cudaMalloc@PLT .cfi_endproc .LFE12116: .size _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 .section .text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat .weak _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .hidden _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .type _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv: .LFB11614: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 72(%rsp) movabsq $4294967297, %rax leaq 8(%rsp), %rcx movq %rsp, %rdx leaq 28(%rsp), %rsi leaq 16(%rsp), %rdi movl $1, 24(%rsp) movl $1, 36(%rsp) movq %rax, 16(%rsp) movq %rax, 28(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L34 pushq 8(%rsp) .cfi_def_cfa_offset 104 leaq _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi pushq 8(%rsp) .cfi_def_cfa_offset 112 movq 44(%rsp), %rcx movl 52(%rsp), %r8d movq 32(%rsp), %rsi movl 40(%rsp), %edx leaq 80(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L34: movq 72(%rsp), %rax subq %fs:40, %rax je .L36 call __stack_chk_fail@PLT .L36: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11614: .size _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .section .text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat .weak nvtxSetInitFunctionsToNoops_v3 .hidden nvtxSetInitFunctionsToNoops_v3 .type nvtxSetInitFunctionsToNoops_v3, @function nvtxSetInitFunctionsToNoops_v3: .LFB6270: .cfi_startproc endbr64 testl %edi, %edi leaq nvtxMarkEx_impl_init_v3(%rip), %rdx setne %al cmpq %rdx, 48+nvtxGlobals_v3(%rip) je .L167 testb %al, %al je .L39 .L167: xorl %r10d, %r10d movq %r10, 48+nvtxGlobals_v3(%rip) .L39: leaq nvtxMarkA_impl_init_v3(%rip), %rdx cmpq %rdx, 56+nvtxGlobals_v3(%rip) je .L168 testb %al, %al je .L41 .L168: xorl %r9d, %r9d movq %r9, 56+nvtxGlobals_v3(%rip) .L41: leaq nvtxMarkW_impl_init_v3(%rip), %rdx cmpq %rdx, 64+nvtxGlobals_v3(%rip) je .L169 testb %al, %al je .L43 .L169: xorl %r8d, %r8d movq %r8, 64+nvtxGlobals_v3(%rip) .L43: leaq nvtxRangeStartEx_impl_init_v3(%rip), %rdx cmpq %rdx, 72+nvtxGlobals_v3(%rip) je .L170 testb %al, %al je .L45 .L170: xorl %edi, %edi movq %rdi, 72+nvtxGlobals_v3(%rip) .L45: leaq nvtxRangeStartA_impl_init_v3(%rip), %rdx cmpq %rdx, 80+nvtxGlobals_v3(%rip) je .L171 testb %al, %al je .L47 .L171: xorl %esi, %esi movq %rsi, 80+nvtxGlobals_v3(%rip) .L47: leaq nvtxRangeStartW_impl_init_v3(%rip), %rdx cmpq %rdx, 88+nvtxGlobals_v3(%rip) je .L172 testb %al, %al je .L49 .L172: xorl %ecx, %ecx movq %rcx, 88+nvtxGlobals_v3(%rip) .L49: leaq nvtxRangeEnd_impl_init_v3(%rip), %rdx cmpq %rdx, 96+nvtxGlobals_v3(%rip) je .L173 testb %al, %al je .L51 .L173: xorl %edx, %edx movq %rdx, 96+nvtxGlobals_v3(%rip) .L51: leaq nvtxRangePushEx_impl_init_v3(%rip), %rdx cmpq %rdx, 104+nvtxGlobals_v3(%rip) je .L174 testb %al, %al je .L53 .L174: xorl %r11d, %r11d movq %r11, 104+nvtxGlobals_v3(%rip) .L53: leaq nvtxRangePushA_impl_init_v3(%rip), %rdx cmpq %rdx, 112+nvtxGlobals_v3(%rip) je .L175 testb %al, %al je .L55 .L175: xorl %r10d, %r10d movq %r10, 112+nvtxGlobals_v3(%rip) .L55: leaq nvtxRangePushW_impl_init_v3(%rip), %rdx cmpq %rdx, 120+nvtxGlobals_v3(%rip) je .L176 testb %al, %al je .L57 .L176: xorl %r9d, %r9d movq %r9, 120+nvtxGlobals_v3(%rip) .L57: leaq nvtxRangePop_impl_init_v3(%rip), %rdx cmpq %rdx, 128+nvtxGlobals_v3(%rip) je .L177 testb %al, %al je .L59 .L177: xorl %r8d, %r8d movq %r8, 128+nvtxGlobals_v3(%rip) .L59: leaq nvtxNameCategoryA_impl_init_v3(%rip), %rdx cmpq %rdx, 136+nvtxGlobals_v3(%rip) je .L178 testb %al, %al je .L61 .L178: xorl %edi, %edi movq %rdi, 136+nvtxGlobals_v3(%rip) .L61: leaq nvtxNameCategoryW_impl_init_v3(%rip), %rdx cmpq %rdx, 144+nvtxGlobals_v3(%rip) je .L179 testb %al, %al je .L63 .L179: xorl %esi, %esi movq %rsi, 144+nvtxGlobals_v3(%rip) .L63: leaq nvtxNameOsThreadA_impl_init_v3(%rip), %rdx cmpq %rdx, 152+nvtxGlobals_v3(%rip) je .L180 testb %al, %al je .L65 .L180: xorl %ecx, %ecx movq %rcx, 152+nvtxGlobals_v3(%rip) .L65: leaq nvtxNameOsThreadW_impl_init_v3(%rip), %rdx cmpq %rdx, 160+nvtxGlobals_v3(%rip) je .L181 testb %al, %al je .L67 .L181: xorl %edx, %edx movq %rdx, 160+nvtxGlobals_v3(%rip) .L67: leaq nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 168+nvtxGlobals_v3(%rip) je .L182 testb %al, %al je .L69 .L182: xorl %r11d, %r11d movq %r11, 168+nvtxGlobals_v3(%rip) .L69: leaq nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 176+nvtxGlobals_v3(%rip) je .L183 testb %al, %al je .L71 .L183: xorl %r10d, %r10d movq %r10, 176+nvtxGlobals_v3(%rip) .L71: leaq nvtxNameCuContextA_impl_init_v3(%rip), %rdx cmpq %rdx, 184+nvtxGlobals_v3(%rip) je .L184 testb %al, %al je .L73 .L184: xorl %r9d, %r9d movq %r9, 184+nvtxGlobals_v3(%rip) .L73: leaq nvtxNameCuContextW_impl_init_v3(%rip), %rdx cmpq %rdx, 192+nvtxGlobals_v3(%rip) je .L185 testb %al, %al je .L75 .L185: xorl %r8d, %r8d movq %r8, 192+nvtxGlobals_v3(%rip) .L75: leaq nvtxNameCuStreamA_impl_init_v3(%rip), %rdx cmpq %rdx, 200+nvtxGlobals_v3(%rip) je .L186 testb %al, %al je .L77 .L186: xorl %edi, %edi movq %rdi, 200+nvtxGlobals_v3(%rip) .L77: leaq nvtxNameCuStreamW_impl_init_v3(%rip), %rdx cmpq %rdx, 208+nvtxGlobals_v3(%rip) je .L187 testb %al, %al je .L79 .L187: xorl %esi, %esi movq %rsi, 208+nvtxGlobals_v3(%rip) .L79: leaq nvtxNameCuEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 216+nvtxGlobals_v3(%rip) je .L188 testb %al, %al je .L81 .L188: xorl %ecx, %ecx movq %rcx, 216+nvtxGlobals_v3(%rip) .L81: leaq nvtxNameCuEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 224+nvtxGlobals_v3(%rip) je .L189 testb %al, %al je .L83 .L189: xorl %edx, %edx movq %rdx, 224+nvtxGlobals_v3(%rip) .L83: leaq nvtxNameClDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 232+nvtxGlobals_v3(%rip) je .L190 testb %al, %al je .L85 .L190: xorl %r11d, %r11d movq %r11, 232+nvtxGlobals_v3(%rip) .L85: leaq nvtxNameClDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 240+nvtxGlobals_v3(%rip) je .L191 testb %al, %al je .L87 .L191: xorl %r10d, %r10d movq %r10, 240+nvtxGlobals_v3(%rip) .L87: leaq nvtxNameClContextA_impl_init_v3(%rip), %rdx cmpq %rdx, 248+nvtxGlobals_v3(%rip) je .L192 testb %al, %al je .L89 .L192: xorl %r9d, %r9d movq %r9, 248+nvtxGlobals_v3(%rip) .L89: leaq nvtxNameClContextW_impl_init_v3(%rip), %rdx cmpq %rdx, 256+nvtxGlobals_v3(%rip) je .L193 testb %al, %al je .L91 .L193: xorl %r8d, %r8d movq %r8, 256+nvtxGlobals_v3(%rip) .L91: leaq nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx cmpq %rdx, 264+nvtxGlobals_v3(%rip) je .L194 testb %al, %al je .L93 .L194: xorl %edi, %edi movq %rdi, 264+nvtxGlobals_v3(%rip) .L93: leaq nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx cmpq %rdx, 272+nvtxGlobals_v3(%rip) je .L195 testb %al, %al je .L95 .L195: xorl %esi, %esi movq %rsi, 272+nvtxGlobals_v3(%rip) .L95: leaq nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx cmpq %rdx, 280+nvtxGlobals_v3(%rip) je .L196 testb %al, %al je .L97 .L196: xorl %ecx, %ecx movq %rcx, 280+nvtxGlobals_v3(%rip) .L97: leaq nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx cmpq %rdx, 288+nvtxGlobals_v3(%rip) je .L197 testb %al, %al je .L99 .L197: xorl %edx, %edx movq %rdx, 288+nvtxGlobals_v3(%rip) .L99: leaq nvtxNameClSamplerA_impl_init_v3(%rip), %rdx cmpq %rdx, 296+nvtxGlobals_v3(%rip) je .L198 testb %al, %al je .L101 .L198: xorl %r11d, %r11d movq %r11, 296+nvtxGlobals_v3(%rip) .L101: leaq nvtxNameClSamplerW_impl_init_v3(%rip), %rdx cmpq %rdx, 304+nvtxGlobals_v3(%rip) je .L199 testb %al, %al je .L103 .L199: xorl %r10d, %r10d movq %r10, 304+nvtxGlobals_v3(%rip) .L103: leaq nvtxNameClProgramA_impl_init_v3(%rip), %rdx cmpq %rdx, 312+nvtxGlobals_v3(%rip) je .L200 testb %al, %al je .L105 .L200: xorl %r9d, %r9d movq %r9, 312+nvtxGlobals_v3(%rip) .L105: leaq nvtxNameClProgramW_impl_init_v3(%rip), %rdx cmpq %rdx, 320+nvtxGlobals_v3(%rip) je .L201 testb %al, %al je .L107 .L201: xorl %r8d, %r8d movq %r8, 320+nvtxGlobals_v3(%rip) .L107: leaq nvtxNameClEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 328+nvtxGlobals_v3(%rip) je .L202 testb %al, %al je .L109 .L202: xorl %edi, %edi movq %rdi, 328+nvtxGlobals_v3(%rip) .L109: leaq nvtxNameClEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 336+nvtxGlobals_v3(%rip) je .L203 testb %al, %al je .L111 .L203: xorl %esi, %esi movq %rsi, 336+nvtxGlobals_v3(%rip) .L111: leaq nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 344+nvtxGlobals_v3(%rip) je .L204 testb %al, %al je .L113 .L204: xorl %ecx, %ecx movq %rcx, 344+nvtxGlobals_v3(%rip) .L113: leaq nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 352+nvtxGlobals_v3(%rip) je .L205 testb %al, %al je .L115 .L205: xorl %edx, %edx movq %rdx, 352+nvtxGlobals_v3(%rip) .L115: leaq nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx cmpq %rdx, 360+nvtxGlobals_v3(%rip) je .L206 testb %al, %al je .L117 .L206: xorl %r11d, %r11d movq %r11, 360+nvtxGlobals_v3(%rip) .L117: leaq nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx cmpq %rdx, 368+nvtxGlobals_v3(%rip) je .L207 testb %al, %al je .L119 .L207: xorl %r10d, %r10d movq %r10, 368+nvtxGlobals_v3(%rip) .L119: leaq nvtxNameCudaEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 376+nvtxGlobals_v3(%rip) je .L208 testb %al, %al je .L121 .L208: xorl %r9d, %r9d movq %r9, 376+nvtxGlobals_v3(%rip) .L121: leaq nvtxNameCudaEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 384+nvtxGlobals_v3(%rip) je .L209 testb %al, %al je .L123 .L209: xorl %r8d, %r8d movq %r8, 384+nvtxGlobals_v3(%rip) .L123: leaq nvtxDomainMarkEx_impl_init_v3(%rip), %rdx cmpq %rdx, 392+nvtxGlobals_v3(%rip) je .L210 testb %al, %al je .L125 .L210: xorl %edi, %edi movq %rdi, 392+nvtxGlobals_v3(%rip) .L125: leaq nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx cmpq %rdx, 400+nvtxGlobals_v3(%rip) je .L211 testb %al, %al je .L127 .L211: xorl %esi, %esi movq %rsi, 400+nvtxGlobals_v3(%rip) .L127: leaq nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx cmpq %rdx, 408+nvtxGlobals_v3(%rip) je .L212 testb %al, %al je .L129 .L212: xorl %ecx, %ecx movq %rcx, 408+nvtxGlobals_v3(%rip) .L129: leaq nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx cmpq %rdx, 416+nvtxGlobals_v3(%rip) je .L213 testb %al, %al je .L131 .L213: xorl %edx, %edx movq %rdx, 416+nvtxGlobals_v3(%rip) .L131: leaq nvtxDomainRangePop_impl_init_v3(%rip), %rdx cmpq %rdx, 424+nvtxGlobals_v3(%rip) je .L214 testb %al, %al je .L133 .L214: xorl %r11d, %r11d movq %r11, 424+nvtxGlobals_v3(%rip) .L133: leaq nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx cmpq %rdx, 432+nvtxGlobals_v3(%rip) je .L215 testb %al, %al je .L135 .L215: xorl %r10d, %r10d movq %r10, 432+nvtxGlobals_v3(%rip) .L135: leaq nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 440+nvtxGlobals_v3(%rip) je .L216 testb %al, %al je .L137 .L216: xorl %r9d, %r9d movq %r9, 440+nvtxGlobals_v3(%rip) .L137: leaq nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx cmpq %rdx, 448+nvtxGlobals_v3(%rip) je .L217 testb %al, %al je .L139 .L217: xorl %r8d, %r8d movq %r8, 448+nvtxGlobals_v3(%rip) .L139: leaq nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx cmpq %rdx, 456+nvtxGlobals_v3(%rip) je .L218 testb %al, %al je .L141 .L218: xorl %edi, %edi movq %rdi, 456+nvtxGlobals_v3(%rip) .L141: leaq nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx cmpq %rdx, 464+nvtxGlobals_v3(%rip) je .L219 testb %al, %al je .L143 .L219: xorl %esi, %esi movq %rsi, 464+nvtxGlobals_v3(%rip) .L143: leaq nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx cmpq %rdx, 472+nvtxGlobals_v3(%rip) je .L220 testb %al, %al je .L145 .L220: xorl %ecx, %ecx movq %rcx, 472+nvtxGlobals_v3(%rip) .L145: leaq nvtxDomainCreateA_impl_init_v3(%rip), %rdx cmpq %rdx, 480+nvtxGlobals_v3(%rip) je .L221 testb %al, %al je .L147 .L221: xorl %edx, %edx movq %rdx, 480+nvtxGlobals_v3(%rip) .L147: leaq nvtxDomainCreateW_impl_init_v3(%rip), %rdx cmpq %rdx, 488+nvtxGlobals_v3(%rip) je .L222 testb %al, %al je .L149 .L222: xorl %r11d, %r11d movq %r11, 488+nvtxGlobals_v3(%rip) .L149: leaq nvtxDomainDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 496+nvtxGlobals_v3(%rip) je .L223 testb %al, %al je .L151 .L223: xorl %r10d, %r10d movq %r10, 496+nvtxGlobals_v3(%rip) .L151: leaq nvtxInitialize_impl_init_v3(%rip), %rdx cmpq %rdx, 504+nvtxGlobals_v3(%rip) je .L224 testb %al, %al je .L153 .L224: xorl %r9d, %r9d movq %r9, 504+nvtxGlobals_v3(%rip) .L153: leaq nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx cmpq %rdx, 512+nvtxGlobals_v3(%rip) je .L225 testb %al, %al je .L155 .L225: xorl %r8d, %r8d movq %r8, 512+nvtxGlobals_v3(%rip) .L155: leaq nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 520+nvtxGlobals_v3(%rip) je .L226 testb %al, %al je .L157 .L226: xorl %edi, %edi movq %rdi, 520+nvtxGlobals_v3(%rip) .L157: leaq nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx cmpq %rdx, 528+nvtxGlobals_v3(%rip) je .L227 testb %al, %al je .L159 .L227: xorl %esi, %esi movq %rsi, 528+nvtxGlobals_v3(%rip) .L159: leaq nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx cmpq %rdx, 536+nvtxGlobals_v3(%rip) je .L228 testb %al, %al je .L161 .L228: xorl %ecx, %ecx movq %rcx, 536+nvtxGlobals_v3(%rip) .L161: leaq nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx cmpq %rdx, 544+nvtxGlobals_v3(%rip) je .L229 testb %al, %al je .L163 .L229: xorl %edx, %edx movq %rdx, 544+nvtxGlobals_v3(%rip) .L163: leaq nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx cmpq %rdx, 552+nvtxGlobals_v3(%rip) je .L230 testb %al, %al je .L38 .L230: xorl %eax, %eax movq %rax, 552+nvtxGlobals_v3(%rip) .L38: ret .cfi_endproc .LFE6270: .size nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3 .section .rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1 .LC0: .string "NVTX_INJECTION64_PATH" .LC1: .string "InitializeInjectionNvtx2" .section .text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat .weak nvtxInitializeInjectionLibrary_v3 .hidden nvtxInitializeInjectionLibrary_v3 .type nvtxInitializeInjectionLibrary_v3, @function nvtxInitializeInjectionLibrary_v3: .LFB6271: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq .LC0(%rip), %rdi call getenv@PLT movq %rax, %rbx testq %rax, %rax je .L424 movl $1, %esi movq %rax, %rdi call dlopen@PLT movl $4, %edx movq %rax, %rbx testq %rax, %rax je .L423 leaq .LC1(%rip), %rsi movq %rax, %rdi call dlsym@PLT testq %rax, %rax jne .L426 movq %rbx, %rdi call dlclose@PLT movl $5, %edx jmp .L423 .L424: movq InitializeInjectionNvtx2_fnptr(%rip), %rax movl $7, %edx testq %rax, %rax je .L423 .L426: leaq nvtxGetExportTable_v3(%rip), %rdi call *%rax xorl %edx, %edx testl %eax, %eax jne .L423 testq %rbx, %rbx je .L427 movq %rbx, %rdi call dlclose@PLT .L427: movl $6, %edx .L423: movl %edx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6271: .size nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3 .section .text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat .weak nvtxInitOnce_v3 .hidden nvtxInitOnce_v3 .type nvtxInitOnce_v3, @function nvtxInitOnce_v3: .LFB6272: .cfi_startproc endbr64 movl nvtxGlobals_v3(%rip), %eax cmpl $2, %eax je .L443 pushq %rdx .cfi_def_cfa_offset 16 movl $1, %eax xorl %edx, %edx mfence lock cmpxchgl %edx, nvtxGlobals_v3(%rip) testl %eax, %eax jne .L446 call nvtxInitializeInjectionLibrary_v3 xorl %edi, %edi testl %eax, %eax setne %dil call nvtxSetInitFunctionsToNoops_v3 movl $2, %eax mfence xchgl nvtxGlobals_v3(%rip), %eax jmp .L435 .L446: mfence movl nvtxGlobals_v3(%rip), %eax cmpl $2, %eax je .L435 call sched_yield@PLT jmp .L446 .L435: popq %rax .cfi_def_cfa_offset 8 ret .L443: ret .cfi_endproc .LFE6272: .size nvtxInitOnce_v3, .-nvtxInitOnce_v3 .section .text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat .weak nvtxDomainSyncUserReleasing_impl_init_v3 .hidden nvtxDomainSyncUserReleasing_impl_init_v3 .type nvtxDomainSyncUserReleasing_impl_init_v3, @function nvtxDomainSyncUserReleasing_impl_init_v3: .LFB6269: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 552+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L447 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L447: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6269: .size nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .hidden nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .type nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function nvtxDomainSyncUserAcquireSuccess_impl_init_v3: .LFB6268: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 544+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L450 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L450: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6268: .size nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireFailed_impl_init_v3 .hidden nvtxDomainSyncUserAcquireFailed_impl_init_v3 .type nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function nvtxDomainSyncUserAcquireFailed_impl_init_v3: .LFB6267: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 536+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L453 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L453: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6267: .size nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireStart_impl_init_v3 .hidden nvtxDomainSyncUserAcquireStart_impl_init_v3 .type nvtxDomainSyncUserAcquireStart_impl_init_v3, @function nvtxDomainSyncUserAcquireStart_impl_init_v3: .LFB6266: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 528+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L456 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L456: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6266: .size nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3 .section .text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat .weak nvtxDomainSyncUserDestroy_impl_init_v3 .hidden nvtxDomainSyncUserDestroy_impl_init_v3 .type nvtxDomainSyncUserDestroy_impl_init_v3, @function nvtxDomainSyncUserDestroy_impl_init_v3: .LFB6265: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 520+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L459 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L459: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6265: .size nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3 .section .text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat .weak nvtxDomainSyncUserCreate_impl_init_v3 .hidden nvtxDomainSyncUserCreate_impl_init_v3 .type nvtxDomainSyncUserCreate_impl_init_v3, @function nvtxDomainSyncUserCreate_impl_init_v3: .LFB6264: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 512+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L463 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L463: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6264: .size nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3 .section .text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat .weak nvtxInitialize_impl_init_v3 .hidden nvtxInitialize_impl_init_v3 .type nvtxInitialize_impl_init_v3, @function nvtxInitialize_impl_init_v3: .LFB6235: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 504+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L465 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L465: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6235: .size nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3 .section .text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat .weak nvtxDomainDestroy_impl_init_v3 .hidden nvtxDomainDestroy_impl_init_v3 .type nvtxDomainDestroy_impl_init_v3, @function nvtxDomainDestroy_impl_init_v3: .LFB6234: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 496+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L468 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L468: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6234: .size nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3 .section .text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat .weak nvtxDomainCreateW_impl_init_v3 .hidden nvtxDomainCreateW_impl_init_v3 .type nvtxDomainCreateW_impl_init_v3, @function nvtxDomainCreateW_impl_init_v3: .LFB6233: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 488+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L472 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L472: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6233: .size nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3 .section .text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat .weak nvtxDomainCreateA_impl_init_v3 .hidden nvtxDomainCreateA_impl_init_v3 .type nvtxDomainCreateA_impl_init_v3, @function nvtxDomainCreateA_impl_init_v3: .LFB6232: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 480+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L475 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L475: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6232: .size nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3 .section .text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat .weak nvtxDomainRegisterStringW_impl_init_v3 .hidden nvtxDomainRegisterStringW_impl_init_v3 .type nvtxDomainRegisterStringW_impl_init_v3, @function nvtxDomainRegisterStringW_impl_init_v3: .LFB6231: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 472+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L478 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L478: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6231: .size nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3 .section .text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat .weak nvtxDomainRegisterStringA_impl_init_v3 .hidden nvtxDomainRegisterStringA_impl_init_v3 .type nvtxDomainRegisterStringA_impl_init_v3, @function nvtxDomainRegisterStringA_impl_init_v3: .LFB6230: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 464+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L481 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L481: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6230: .size nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3 .section .text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat .weak nvtxDomainNameCategoryW_impl_init_v3 .hidden nvtxDomainNameCategoryW_impl_init_v3 .type nvtxDomainNameCategoryW_impl_init_v3, @function nvtxDomainNameCategoryW_impl_init_v3: .LFB6229: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 movq %rdi, 24(%rsp) movl %esi, 20(%rsp) movq %rdx, 8(%rsp) call nvtxInitOnce_v3 movq 456+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L483 movq 8(%rsp), %rdx movl 20(%rsp), %esi movq 24(%rsp), %rdi addq $40, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L483: .cfi_restore_state addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6229: .size nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3 .section .text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat .weak nvtxDomainNameCategoryA_impl_init_v3 .hidden nvtxDomainNameCategoryA_impl_init_v3 .type nvtxDomainNameCategoryA_impl_init_v3, @function nvtxDomainNameCategoryA_impl_init_v3: .LFB6228: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 movq %rdi, 24(%rsp) movl %esi, 20(%rsp) movq %rdx, 8(%rsp) call nvtxInitOnce_v3 movq 448+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L486 movq 8(%rsp), %rdx movl 20(%rsp), %esi movq 24(%rsp), %rdi addq $40, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L486: .cfi_restore_state addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6228: .size nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3 .section .text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat .weak nvtxDomainResourceDestroy_impl_init_v3 .hidden nvtxDomainResourceDestroy_impl_init_v3 .type nvtxDomainResourceDestroy_impl_init_v3, @function nvtxDomainResourceDestroy_impl_init_v3: .LFB6227: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 440+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L489 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L489: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6227: .size nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3 .section .text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat .weak nvtxDomainResourceCreate_impl_init_v3 .hidden nvtxDomainResourceCreate_impl_init_v3 .type nvtxDomainResourceCreate_impl_init_v3, @function nvtxDomainResourceCreate_impl_init_v3: .LFB6226: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 432+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L493 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L493: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6226: .size nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3 .section .text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat .weak nvtxDomainRangePop_impl_init_v3 .hidden nvtxDomainRangePop_impl_init_v3 .type nvtxDomainRangePop_impl_init_v3, @function nvtxDomainRangePop_impl_init_v3: .LFB6225: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 424+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L496 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L496: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6225: .size nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3 .section .text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat .weak nvtxDomainRangePushEx_impl_init_v3 .hidden nvtxDomainRangePushEx_impl_init_v3 .type nvtxDomainRangePushEx_impl_init_v3, @function nvtxDomainRangePushEx_impl_init_v3: .LFB6224: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 416+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L499 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L499: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6224: .size nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3 .section .text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat .weak nvtxDomainRangeEnd_impl_init_v3 .hidden nvtxDomainRangeEnd_impl_init_v3 .type nvtxDomainRangeEnd_impl_init_v3, @function nvtxDomainRangeEnd_impl_init_v3: .LFB6223: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 408+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L501 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L501: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6223: .size nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3 .section .text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat .weak nvtxDomainRangeStartEx_impl_init_v3 .hidden nvtxDomainRangeStartEx_impl_init_v3 .type nvtxDomainRangeStartEx_impl_init_v3, @function nvtxDomainRangeStartEx_impl_init_v3: .LFB6222: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 400+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L505 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L505: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6222: .size nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3 .section .text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat .weak nvtxDomainMarkEx_impl_init_v3 .hidden nvtxDomainMarkEx_impl_init_v3 .type nvtxDomainMarkEx_impl_init_v3, @function nvtxDomainMarkEx_impl_init_v3: .LFB6221: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 392+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L507 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L507: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6221: .size nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3 .section .text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat .weak nvtxNameCudaEventW_impl_init_v3 .hidden nvtxNameCudaEventW_impl_init_v3 .type nvtxNameCudaEventW_impl_init_v3, @function nvtxNameCudaEventW_impl_init_v3: .LFB6249: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 384+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L510 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L510: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6249: .size nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3 .section .text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat .weak nvtxNameCudaEventA_impl_init_v3 .hidden nvtxNameCudaEventA_impl_init_v3 .type nvtxNameCudaEventA_impl_init_v3, @function nvtxNameCudaEventA_impl_init_v3: .LFB6248: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 376+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L513 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L513: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6248: .size nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3 .section .text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat .weak nvtxNameCudaStreamW_impl_init_v3 .hidden nvtxNameCudaStreamW_impl_init_v3 .type nvtxNameCudaStreamW_impl_init_v3, @function nvtxNameCudaStreamW_impl_init_v3: .LFB6247: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 368+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L516 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L516: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6247: .size nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3 .section .text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat .weak nvtxNameCudaStreamA_impl_init_v3 .hidden nvtxNameCudaStreamA_impl_init_v3 .type nvtxNameCudaStreamA_impl_init_v3, @function nvtxNameCudaStreamA_impl_init_v3: .LFB6246: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 360+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L519 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L519: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6246: .size nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3 .section .text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat .weak nvtxNameCudaDeviceW_impl_init_v3 .hidden nvtxNameCudaDeviceW_impl_init_v3 .type nvtxNameCudaDeviceW_impl_init_v3, @function nvtxNameCudaDeviceW_impl_init_v3: .LFB6245: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 352+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L522 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L522: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6245: .size nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3 .section .text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat .weak nvtxNameCudaDeviceA_impl_init_v3 .hidden nvtxNameCudaDeviceA_impl_init_v3 .type nvtxNameCudaDeviceA_impl_init_v3, @function nvtxNameCudaDeviceA_impl_init_v3: .LFB6244: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 344+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L525 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L525: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6244: .size nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3 .section .text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat .weak nvtxNameClEventW_impl_init_v3 .hidden nvtxNameClEventW_impl_init_v3 .type nvtxNameClEventW_impl_init_v3, @function nvtxNameClEventW_impl_init_v3: .LFB6263: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 336+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L528 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L528: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6263: .size nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3 .section .text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat .weak nvtxNameClEventA_impl_init_v3 .hidden nvtxNameClEventA_impl_init_v3 .type nvtxNameClEventA_impl_init_v3, @function nvtxNameClEventA_impl_init_v3: .LFB6262: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 328+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L531 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L531: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6262: .size nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3 .section .text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat .weak nvtxNameClProgramW_impl_init_v3 .hidden nvtxNameClProgramW_impl_init_v3 .type nvtxNameClProgramW_impl_init_v3, @function nvtxNameClProgramW_impl_init_v3: .LFB6261: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 320+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L534 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L534: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6261: .size nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3 .section .text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat .weak nvtxNameClProgramA_impl_init_v3 .hidden nvtxNameClProgramA_impl_init_v3 .type nvtxNameClProgramA_impl_init_v3, @function nvtxNameClProgramA_impl_init_v3: .LFB6260: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 312+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L537 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L537: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6260: .size nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3 .section .text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat .weak nvtxNameClSamplerW_impl_init_v3 .hidden nvtxNameClSamplerW_impl_init_v3 .type nvtxNameClSamplerW_impl_init_v3, @function nvtxNameClSamplerW_impl_init_v3: .LFB6259: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 304+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L540 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L540: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6259: .size nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3 .section .text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat .weak nvtxNameClSamplerA_impl_init_v3 .hidden nvtxNameClSamplerA_impl_init_v3 .type nvtxNameClSamplerA_impl_init_v3, @function nvtxNameClSamplerA_impl_init_v3: .LFB6258: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 296+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L543 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L543: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6258: .size nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3 .section .text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat .weak nvtxNameClMemObjectW_impl_init_v3 .hidden nvtxNameClMemObjectW_impl_init_v3 .type nvtxNameClMemObjectW_impl_init_v3, @function nvtxNameClMemObjectW_impl_init_v3: .LFB6257: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 288+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L546 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L546: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6257: .size nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3 .section .text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat .weak nvtxNameClMemObjectA_impl_init_v3 .hidden nvtxNameClMemObjectA_impl_init_v3 .type nvtxNameClMemObjectA_impl_init_v3, @function nvtxNameClMemObjectA_impl_init_v3: .LFB6256: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 280+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L549 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L549: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6256: .size nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3 .section .text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat .weak nvtxNameClCommandQueueW_impl_init_v3 .hidden nvtxNameClCommandQueueW_impl_init_v3 .type nvtxNameClCommandQueueW_impl_init_v3, @function nvtxNameClCommandQueueW_impl_init_v3: .LFB6255: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 272+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L552 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L552: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6255: .size nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3 .section .text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat .weak nvtxNameClCommandQueueA_impl_init_v3 .hidden nvtxNameClCommandQueueA_impl_init_v3 .type nvtxNameClCommandQueueA_impl_init_v3, @function nvtxNameClCommandQueueA_impl_init_v3: .LFB6254: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 264+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L555 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L555: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6254: .size nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3 .section .text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat .weak nvtxNameClContextW_impl_init_v3 .hidden nvtxNameClContextW_impl_init_v3 .type nvtxNameClContextW_impl_init_v3, @function nvtxNameClContextW_impl_init_v3: .LFB6253: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 256+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L558 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L558: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6253: .size nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3 .section .text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat .weak nvtxNameClContextA_impl_init_v3 .hidden nvtxNameClContextA_impl_init_v3 .type nvtxNameClContextA_impl_init_v3, @function nvtxNameClContextA_impl_init_v3: .LFB6252: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 248+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L561 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L561: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6252: .size nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3 .section .text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat .weak nvtxNameClDeviceW_impl_init_v3 .hidden nvtxNameClDeviceW_impl_init_v3 .type nvtxNameClDeviceW_impl_init_v3, @function nvtxNameClDeviceW_impl_init_v3: .LFB6251: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 240+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L564 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L564: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6251: .size nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3 .section .text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat .weak nvtxNameClDeviceA_impl_init_v3 .hidden nvtxNameClDeviceA_impl_init_v3 .type nvtxNameClDeviceA_impl_init_v3, @function nvtxNameClDeviceA_impl_init_v3: .LFB6250: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 232+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L567 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L567: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6250: .size nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3 .section .text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat .weak nvtxNameCuEventW_impl_init_v3 .hidden nvtxNameCuEventW_impl_init_v3 .type nvtxNameCuEventW_impl_init_v3, @function nvtxNameCuEventW_impl_init_v3: .LFB6243: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 224+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L570 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L570: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6243: .size nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3 .section .text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat .weak nvtxNameCuEventA_impl_init_v3 .hidden nvtxNameCuEventA_impl_init_v3 .type nvtxNameCuEventA_impl_init_v3, @function nvtxNameCuEventA_impl_init_v3: .LFB6242: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 216+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L573 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L573: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6242: .size nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3 .section .text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat .weak nvtxNameCuStreamW_impl_init_v3 .hidden nvtxNameCuStreamW_impl_init_v3 .type nvtxNameCuStreamW_impl_init_v3, @function nvtxNameCuStreamW_impl_init_v3: .LFB6241: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 208+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L576 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L576: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6241: .size nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3 .section .text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat .weak nvtxNameCuStreamA_impl_init_v3 .hidden nvtxNameCuStreamA_impl_init_v3 .type nvtxNameCuStreamA_impl_init_v3, @function nvtxNameCuStreamA_impl_init_v3: .LFB6240: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 200+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L579 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L579: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6240: .size nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3 .section .text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat .weak nvtxNameCuContextW_impl_init_v3 .hidden nvtxNameCuContextW_impl_init_v3 .type nvtxNameCuContextW_impl_init_v3, @function nvtxNameCuContextW_impl_init_v3: .LFB6239: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 192+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L582 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L582: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6239: .size nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3 .section .text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat .weak nvtxNameCuContextA_impl_init_v3 .hidden nvtxNameCuContextA_impl_init_v3 .type nvtxNameCuContextA_impl_init_v3, @function nvtxNameCuContextA_impl_init_v3: .LFB6238: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 184+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L585 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L585: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6238: .size nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3 .section .text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat .weak nvtxNameCuDeviceW_impl_init_v3 .hidden nvtxNameCuDeviceW_impl_init_v3 .type nvtxNameCuDeviceW_impl_init_v3, @function nvtxNameCuDeviceW_impl_init_v3: .LFB6237: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 176+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L588 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L588: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6237: .size nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3 .section .text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat .weak nvtxNameCuDeviceA_impl_init_v3 .hidden nvtxNameCuDeviceA_impl_init_v3 .type nvtxNameCuDeviceA_impl_init_v3, @function nvtxNameCuDeviceA_impl_init_v3: .LFB6236: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 168+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L591 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L591: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6236: .size nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3 .section .text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat .weak nvtxNameOsThreadW_impl_init_v3 .hidden nvtxNameOsThreadW_impl_init_v3 .type nvtxNameOsThreadW_impl_init_v3, @function nvtxNameOsThreadW_impl_init_v3: .LFB6220: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 160+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L594 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L594: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6220: .size nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3 .section .text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat .weak nvtxNameOsThreadA_impl_init_v3 .hidden nvtxNameOsThreadA_impl_init_v3 .type nvtxNameOsThreadA_impl_init_v3, @function nvtxNameOsThreadA_impl_init_v3: .LFB6219: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 152+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L597 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L597: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6219: .size nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3 .section .text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat .weak nvtxNameCategoryW_impl_init_v3 .hidden nvtxNameCategoryW_impl_init_v3 .type nvtxNameCategoryW_impl_init_v3, @function nvtxNameCategoryW_impl_init_v3: .LFB6218: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 144+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L600 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L600: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6218: .size nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3 .section .text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat .weak nvtxNameCategoryA_impl_init_v3 .hidden nvtxNameCategoryA_impl_init_v3 .type nvtxNameCategoryA_impl_init_v3, @function nvtxNameCategoryA_impl_init_v3: .LFB6217: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 136+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L603 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L603: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6217: .size nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3 .section .text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat .weak nvtxRangePop_impl_init_v3 .hidden nvtxRangePop_impl_init_v3 .type nvtxRangePop_impl_init_v3, @function nvtxRangePop_impl_init_v3: .LFB6216: .cfi_startproc endbr64 pushq %rsi .cfi_def_cfa_offset 16 call nvtxInitOnce_v3 movq 128+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L607 popq %rcx .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L607: .cfi_restore_state movl $-2, %eax popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6216: .size nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3 .section .text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat .weak nvtxRangePushW_impl_init_v3 .hidden nvtxRangePushW_impl_init_v3 .type nvtxRangePushW_impl_init_v3, @function nvtxRangePushW_impl_init_v3: .LFB6215: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 120+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L610 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L610: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6215: .size nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3 .section .text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat .weak nvtxRangePushA_impl_init_v3 .hidden nvtxRangePushA_impl_init_v3 .type nvtxRangePushA_impl_init_v3, @function nvtxRangePushA_impl_init_v3: .LFB6214: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 112+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L613 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L613: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6214: .size nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3 .section .text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat .weak nvtxRangePushEx_impl_init_v3 .hidden nvtxRangePushEx_impl_init_v3 .type nvtxRangePushEx_impl_init_v3, @function nvtxRangePushEx_impl_init_v3: .LFB6213: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 104+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L616 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L616: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6213: .size nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3 .section .text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat .weak nvtxRangeEnd_impl_init_v3 .hidden nvtxRangeEnd_impl_init_v3 .type nvtxRangeEnd_impl_init_v3, @function nvtxRangeEnd_impl_init_v3: .LFB6212: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 96+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L618 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L618: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6212: .size nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3 .section .text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat .weak nvtxRangeStartW_impl_init_v3 .hidden nvtxRangeStartW_impl_init_v3 .type nvtxRangeStartW_impl_init_v3, @function nvtxRangeStartW_impl_init_v3: .LFB6211: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 88+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L622 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L622: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6211: .size nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3 .section .text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat .weak nvtxRangeStartA_impl_init_v3 .hidden nvtxRangeStartA_impl_init_v3 .type nvtxRangeStartA_impl_init_v3, @function nvtxRangeStartA_impl_init_v3: .LFB6210: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 80+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L625 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L625: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6210: .size nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3 .section .text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat .weak nvtxRangeStartEx_impl_init_v3 .hidden nvtxRangeStartEx_impl_init_v3 .type nvtxRangeStartEx_impl_init_v3, @function nvtxRangeStartEx_impl_init_v3: .LFB6209: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 72+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L628 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L628: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6209: .size nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3 .section .text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat .weak nvtxMarkW_impl_init_v3 .hidden nvtxMarkW_impl_init_v3 .type nvtxMarkW_impl_init_v3, @function nvtxMarkW_impl_init_v3: .LFB6208: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 64+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L630 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L630: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6208: .size nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3 .section .text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat .weak nvtxMarkA_impl_init_v3 .hidden nvtxMarkA_impl_init_v3 .type nvtxMarkA_impl_init_v3, @function nvtxMarkA_impl_init_v3: .LFB6207: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 56+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L633 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L633: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6207: .size nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3 .section .text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat .weak nvtxMarkEx_impl_init_v3 .hidden nvtxMarkEx_impl_init_v3 .type nvtxMarkEx_impl_init_v3, @function nvtxMarkEx_impl_init_v3: .LFB6206: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 48+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L636 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L636: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6206: .size nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3 .text .globl _Z8chechalliPbiiiPiS0_S0_iiPS0_ .type _Z8chechalliPbiiiPiS0_S0_iiPS0_, @function _Z8chechalliPbiiiPiS0_S0_iiPS0_: .LFB11185: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE11185: .size _Z8chechalliPbiiiPiS0_S0_iiPS0_, .-_Z8chechalliPbiiiPiS0_S0_iiPS0_ .globl _Z42__device_stub__Z8findhashPiS_S_S_PbS0_S_S_PiS_S_S_PbS0_S_S_ .type _Z42__device_stub__Z8findhashPiS_S_S_PbS0_S_S_PiS_S_S_PbS0_S_S_, @function _Z42__device_stub__Z8findhashPiS_S_S_PbS0_S_S_PiS_S_S_PbS0_S_S_: .LFB11211: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq 224(%rsp), %rax movq %rdi, 56(%rsp) leaq 88(%rsp), %rdi movq %rsi, 48(%rsp) leaq 100(%rsp), %rsi movq %rax, 8(%rsp) movq 232(%rsp), %rax movq %rdx, 40(%rsp) leaq 72(%rsp), %rdx movq %rcx, 32(%rsp) leaq 80(%rsp), %rcx movq %r8, 24(%rsp) movq %r9, 16(%rsp) movq %rax, (%rsp) movq %fs:40, %rax movq %rax, 200(%rsp) xorl %eax, %eax leaq 56(%rsp), %rax movl $1, 96(%rsp) movq %rax, 136(%rsp) leaq 48(%rsp), %rax movq %rax, 144(%rsp) leaq 40(%rsp), %rax movq %rax, 152(%rsp) leaq 32(%rsp), %rax movq %rax, 160(%rsp) leaq 24(%rsp), %rax movq %rax, 168(%rsp) leaq 16(%rsp), %rax movq %rax, 176(%rsp) leaq 8(%rsp), %rax movq %rax, 184(%rsp) movq %rsp, %rax movq %rax, 192(%rsp) movabsq $4294967297, %rax movq %rax, 88(%rsp) movq %rax, 100(%rsp) movl $1, 108(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L641 pushq 80(%rsp) .cfi_def_cfa_offset 232 leaq _Z8findhashPiS_S_S_PbS0_S_S_(%rip), %rdi pushq 80(%rsp) .cfi_def_cfa_offset 240 movq 116(%rsp), %rcx movl 124(%rsp), %r8d movq 104(%rsp), %rsi movl 112(%rsp), %edx leaq 152(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 232 popq %rdx .cfi_def_cfa_offset 224 .L641: movq 200(%rsp), %rax subq %fs:40, %rax je .L643 call __stack_chk_fail@PLT .L643: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11211: .size _Z42__device_stub__Z8findhashPiS_S_S_PbS0_S_S_PiS_S_S_PbS0_S_S_, .-_Z42__device_stub__Z8findhashPiS_S_S_PbS0_S_S_PiS_S_S_PbS0_S_S_ .globl _Z8findhashPiS_S_S_PbS0_S_S_ .type _Z8findhashPiS_S_S_PbS0_S_S_, @function _Z8findhashPiS_S_S_PbS0_S_S_: .LFB11212: .cfi_startproc endbr64 jmp _Z42__device_stub__Z8findhashPiS_S_S_PbS0_S_S_PiS_S_S_PbS0_S_S_ .cfi_endproc .LFE11212: .size _Z8findhashPiS_S_S_PbS0_S_S_, .-_Z8findhashPiS_S_S_PbS0_S_S_ .globl _Z32__device_stub__Z7setdeg1PiS_S_PbPiS_S_Pb .type _Z32__device_stub__Z7setdeg1PiS_S_PbPiS_S_Pb, @function _Z32__device_stub__Z7setdeg1PiS_S_PbPiS_S_Pb: .LFB11213: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movq %rcx, (%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L646 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z7setdeg1PiS_S_Pb(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L646: movq 136(%rsp), %rax subq %fs:40, %rax je .L648 call __stack_chk_fail@PLT .L648: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11213: .size _Z32__device_stub__Z7setdeg1PiS_S_PbPiS_S_Pb, .-_Z32__device_stub__Z7setdeg1PiS_S_PbPiS_S_Pb .globl _Z7setdeg1PiS_S_Pb .type _Z7setdeg1PiS_S_Pb, @function _Z7setdeg1PiS_S_Pb: .LFB11214: .cfi_startproc endbr64 jmp _Z32__device_stub__Z7setdeg1PiS_S_PbPiS_S_Pb .cfi_endproc .LFE11214: .size _Z7setdeg1PiS_S_Pb, .-_Z7setdeg1PiS_S_Pb .globl _Z38__device_stub__Z7puttoidPiS_S_S_PbS_S_PiS_S_S_PbS_S_ .type _Z38__device_stub__Z7puttoidPiS_S_S_PbS_S_PiS_S_S_PbS_S_, @function _Z38__device_stub__Z7puttoidPiS_S_S_PbS_S_PiS_S_S_PbS_S_: .LFB11215: .cfi_startproc endbr64 subq $200, %rsp .cfi_def_cfa_offset 208 movq 208(%rsp), %rax movq %rdi, 56(%rsp) leaq 80(%rsp), %rdi movq %rsi, 48(%rsp) leaq 92(%rsp), %rsi movq %rdx, 40(%rsp) leaq 64(%rsp), %rdx movq %rcx, 32(%rsp) leaq 72(%rsp), %rcx movq %r8, 24(%rsp) movq %r9, 16(%rsp) movq %rax, 8(%rsp) movq %fs:40, %rax movq %rax, 184(%rsp) xorl %eax, %eax leaq 56(%rsp), %rax movl $1, 88(%rsp) movq %rax, 128(%rsp) leaq 48(%rsp), %rax movq %rax, 136(%rsp) leaq 40(%rsp), %rax movq %rax, 144(%rsp) leaq 32(%rsp), %rax movq %rax, 152(%rsp) leaq 24(%rsp), %rax movq %rax, 160(%rsp) leaq 16(%rsp), %rax movq %rax, 168(%rsp) leaq 8(%rsp), %rax movq %rax, 176(%rsp) movabsq $4294967297, %rax movq %rax, 80(%rsp) movq %rax, 92(%rsp) movl $1, 100(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L651 pushq 72(%rsp) .cfi_def_cfa_offset 216 leaq _Z7puttoidPiS_S_S_PbS_S_(%rip), %rdi pushq 72(%rsp) .cfi_def_cfa_offset 224 movq 108(%rsp), %rcx movl 116(%rsp), %r8d movq 96(%rsp), %rsi movl 104(%rsp), %edx leaq 144(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 216 popq %rdx .cfi_def_cfa_offset 208 .L651: movq 184(%rsp), %rax subq %fs:40, %rax je .L653 call __stack_chk_fail@PLT .L653: addq $200, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11215: .size _Z38__device_stub__Z7puttoidPiS_S_S_PbS_S_PiS_S_S_PbS_S_, .-_Z38__device_stub__Z7puttoidPiS_S_S_PbS_S_PiS_S_S_PbS_S_ .globl _Z7puttoidPiS_S_S_PbS_S_ .type _Z7puttoidPiS_S_S_PbS_S_, @function _Z7puttoidPiS_S_S_PbS_S_: .LFB11216: .cfi_startproc endbr64 jmp _Z38__device_stub__Z7puttoidPiS_S_S_PbS_S_PiS_S_S_PbS_S_ .cfi_endproc .LFE11216: .size _Z7puttoidPiS_S_S_PbS_S_, .-_Z7puttoidPiS_S_S_PbS_S_ .globl _Z40__device_stub__Z7findcvsiPiS_S_S_S_S_PS_iPiS_S_S_S_S_PS_ .type _Z40__device_stub__Z7findcvsiPiS_S_S_S_S_PS_iPiS_S_S_S_S_PS_, @function _Z40__device_stub__Z7findcvsiPiS_S_S_S_S_PS_iPiS_S_S_S_S_PS_: .LFB11217: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq 224(%rsp), %rax movl %edi, 60(%rsp) leaq 88(%rsp), %rdi movq %rsi, 48(%rsp) leaq 100(%rsp), %rsi movq %rax, 8(%rsp) movq 232(%rsp), %rax movq %rdx, 40(%rsp) leaq 72(%rsp), %rdx movq %rcx, 32(%rsp) leaq 80(%rsp), %rcx movq %r8, 24(%rsp) movq %r9, 16(%rsp) movq %rax, (%rsp) movq %fs:40, %rax movq %rax, 200(%rsp) xorl %eax, %eax leaq 60(%rsp), %rax movl $1, 96(%rsp) movq %rax, 136(%rsp) leaq 48(%rsp), %rax movq %rax, 144(%rsp) leaq 40(%rsp), %rax movq %rax, 152(%rsp) leaq 32(%rsp), %rax movq %rax, 160(%rsp) leaq 24(%rsp), %rax movq %rax, 168(%rsp) leaq 16(%rsp), %rax movq %rax, 176(%rsp) leaq 8(%rsp), %rax movq %rax, 184(%rsp) movq %rsp, %rax movq %rax, 192(%rsp) movabsq $4294967297, %rax movq %rax, 88(%rsp) movq %rax, 100(%rsp) movl $1, 108(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L656 pushq 80(%rsp) .cfi_def_cfa_offset 232 leaq _Z7findcvsiPiS_S_S_S_S_PS_(%rip), %rdi pushq 80(%rsp) .cfi_def_cfa_offset 240 movq 116(%rsp), %rcx movl 124(%rsp), %r8d movq 104(%rsp), %rsi movl 112(%rsp), %edx leaq 152(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 232 popq %rdx .cfi_def_cfa_offset 224 .L656: movq 200(%rsp), %rax subq %fs:40, %rax je .L658 call __stack_chk_fail@PLT .L658: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11217: .size _Z40__device_stub__Z7findcvsiPiS_S_S_S_S_PS_iPiS_S_S_S_S_PS_, .-_Z40__device_stub__Z7findcvsiPiS_S_S_S_S_PS_iPiS_S_S_S_S_PS_ .globl _Z7findcvsiPiS_S_S_S_S_PS_ .type _Z7findcvsiPiS_S_S_S_S_PS_, @function _Z7findcvsiPiS_S_S_S_S_PS_: .LFB11218: .cfi_startproc endbr64 jmp _Z40__device_stub__Z7findcvsiPiS_S_S_S_S_PS_iPiS_S_S_S_S_PS_ .cfi_endproc .LFE11218: .size _Z7findcvsiPiS_S_S_S_S_PS_, .-_Z7findcvsiPiS_S_S_S_S_PS_ .globl _Z32__device_stub__Z9puttolistPiS_S_PiS_S_ .type _Z32__device_stub__Z9puttolistPiS_S_PiS_S_, @function _Z32__device_stub__Z9puttolistPiS_S_PiS_S_: .LFB11219: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L661 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z9puttolistPiS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L661: movq 120(%rsp), %rax subq %fs:40, %rax je .L663 call __stack_chk_fail@PLT .L663: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11219: .size _Z32__device_stub__Z9puttolistPiS_S_PiS_S_, .-_Z32__device_stub__Z9puttolistPiS_S_PiS_S_ .globl _Z9puttolistPiS_S_ .type _Z9puttolistPiS_S_, @function _Z9puttolistPiS_S_: .LFB11220: .cfi_startproc endbr64 jmp _Z32__device_stub__Z9puttolistPiS_S_PiS_S_ .cfi_endproc .LFE11220: .size _Z9puttolistPiS_S_, .-_Z9puttolistPiS_S_ .globl _Z45__device_stub__Z9checkpermPbPiS0_S0_S0_S0_S0_PbPiS0_S0_S0_S0_S0_ .type _Z45__device_stub__Z9checkpermPbPiS0_S0_S0_S0_S0_PbPiS0_S0_S0_S0_S0_, @function _Z45__device_stub__Z9checkpermPbPiS0_S0_S0_S0_S0_PbPiS0_S0_S0_S0_S0_: .LFB11221: .cfi_startproc endbr64 subq $200, %rsp .cfi_def_cfa_offset 208 movq 208(%rsp), %rax movq %rdi, 56(%rsp) leaq 80(%rsp), %rdi movq %rsi, 48(%rsp) leaq 92(%rsp), %rsi movq %rdx, 40(%rsp) leaq 64(%rsp), %rdx movq %rcx, 32(%rsp) leaq 72(%rsp), %rcx movq %r8, 24(%rsp) movq %r9, 16(%rsp) movq %rax, 8(%rsp) movq %fs:40, %rax movq %rax, 184(%rsp) xorl %eax, %eax leaq 56(%rsp), %rax movl $1, 88(%rsp) movq %rax, 128(%rsp) leaq 48(%rsp), %rax movq %rax, 136(%rsp) leaq 40(%rsp), %rax movq %rax, 144(%rsp) leaq 32(%rsp), %rax movq %rax, 152(%rsp) leaq 24(%rsp), %rax movq %rax, 160(%rsp) leaq 16(%rsp), %rax movq %rax, 168(%rsp) leaq 8(%rsp), %rax movq %rax, 176(%rsp) movabsq $4294967297, %rax movq %rax, 80(%rsp) movq %rax, 92(%rsp) movl $1, 100(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L666 pushq 72(%rsp) .cfi_def_cfa_offset 216 leaq _Z9checkpermPbPiS0_S0_S0_S0_S0_(%rip), %rdi pushq 72(%rsp) .cfi_def_cfa_offset 224 movq 108(%rsp), %rcx movl 116(%rsp), %r8d movq 96(%rsp), %rsi movl 104(%rsp), %edx leaq 144(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 216 popq %rdx .cfi_def_cfa_offset 208 .L666: movq 184(%rsp), %rax subq %fs:40, %rax je .L668 call __stack_chk_fail@PLT .L668: addq $200, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11221: .size _Z45__device_stub__Z9checkpermPbPiS0_S0_S0_S0_S0_PbPiS0_S0_S0_S0_S0_, .-_Z45__device_stub__Z9checkpermPbPiS0_S0_S0_S0_S0_PbPiS0_S0_S0_S0_S0_ .globl _Z9checkpermPbPiS0_S0_S0_S0_S0_ .type _Z9checkpermPbPiS0_S0_S0_S0_S0_, @function _Z9checkpermPbPiS0_S0_S0_S0_S0_: .LFB11222: .cfi_startproc endbr64 jmp _Z45__device_stub__Z9checkpermPbPiS0_S0_S0_S0_S0_PbPiS0_S0_S0_S0_S0_ .cfi_endproc .LFE11222: .size _Z9checkpermPbPiS0_S0_S0_S0_S0_, .-_Z9checkpermPbPiS0_S0_S0_S0_S0_ .globl _Z45__device_stub__Z7findallPiS_S_S_S_S_S_S_PS_S_PiS_S_S_S_S_S_S_PS_S_ .type _Z45__device_stub__Z7findallPiS_S_S_S_S_S_S_PS_S_PiS_S_S_S_S_S_S_PS_S_, @function _Z45__device_stub__Z7findallPiS_S_S_S_S_S_S_PS_S_PiS_S_S_S_S_S_S_PS_S_: .LFB11223: .cfi_startproc endbr64 subq $248, %rsp .cfi_def_cfa_offset 256 movq 256(%rsp), %rax movq %rdi, 72(%rsp) leaq 104(%rsp), %rdi movq %rsi, 64(%rsp) leaq 116(%rsp), %rsi movq %rax, 24(%rsp) movq 264(%rsp), %rax movq %rdx, 56(%rsp) leaq 88(%rsp), %rdx movq %rax, 16(%rsp) movq 272(%rsp), %rax movq %rcx, 48(%rsp) leaq 96(%rsp), %rcx movq %rax, 8(%rsp) movq 280(%rsp), %rax movq %r8, 40(%rsp) movq %r9, 32(%rsp) movq %rax, (%rsp) movq %fs:40, %rax movq %rax, 232(%rsp) xorl %eax, %eax leaq 72(%rsp), %rax movl $1, 112(%rsp) movq %rax, 152(%rsp) leaq 64(%rsp), %rax movq %rax, 160(%rsp) leaq 56(%rsp), %rax movq %rax, 168(%rsp) leaq 48(%rsp), %rax movq %rax, 176(%rsp) leaq 40(%rsp), %rax movq %rax, 184(%rsp) leaq 32(%rsp), %rax movq %rax, 192(%rsp) leaq 24(%rsp), %rax movq %rax, 200(%rsp) leaq 16(%rsp), %rax movq %rax, 208(%rsp) leaq 8(%rsp), %rax movq %rax, 216(%rsp) movq %rsp, %rax movq %rax, 224(%rsp) movabsq $4294967297, %rax movq %rax, 104(%rsp) movq %rax, 116(%rsp) movl $1, 124(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L671 pushq 96(%rsp) .cfi_def_cfa_offset 264 leaq _Z7findallPiS_S_S_S_S_S_S_PS_S_(%rip), %rdi pushq 96(%rsp) .cfi_def_cfa_offset 272 movq 132(%rsp), %rcx movl 140(%rsp), %r8d movq 120(%rsp), %rsi movl 128(%rsp), %edx leaq 168(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 264 popq %rdx .cfi_def_cfa_offset 256 .L671: movq 232(%rsp), %rax subq %fs:40, %rax je .L673 call __stack_chk_fail@PLT .L673: addq $248, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11223: .size _Z45__device_stub__Z7findallPiS_S_S_S_S_S_S_PS_S_PiS_S_S_S_S_S_S_PS_S_, .-_Z45__device_stub__Z7findallPiS_S_S_S_S_S_S_PS_S_PiS_S_S_S_S_S_S_PS_S_ .globl _Z7findallPiS_S_S_S_S_S_S_PS_S_ .type _Z7findallPiS_S_S_S_S_S_S_PS_S_, @function _Z7findallPiS_S_S_S_S_S_S_PS_S_: .LFB11224: .cfi_startproc endbr64 jmp _Z45__device_stub__Z7findallPiS_S_S_S_S_S_S_PS_S_PiS_S_S_S_S_S_S_PS_S_ .cfi_endproc .LFE11224: .size _Z7findallPiS_S_S_S_S_S_S_PS_S_, .-_Z7findallPiS_S_S_S_S_S_S_PS_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC2: .string "%d" .LC5: .string "Error: %s\n" .LC6: .string "Not Ok" .LC7: .string "%d " .LC8: .string "\n" .LC9: .string "Start %lld\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB11186: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl $4, %edi pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 xorl %r13d, %r13d pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $216, %rsp .cfi_def_cfa_offset 272 movq %fs:40, %rax movq %rax, 200(%rsp) xorl %eax, %eax call cudaSetDevice@PLT leaq 60(%rsp), %rax leaq .LC2(%rip), %rdi movq %rax, %rsi movq %rax, 24(%rsp) xorl %eax, %eax call __isoc23_scanf@PLT movl 60(%rsp), %eax leal 1(%rax), %r12d movslq %r12d, %r12 leaq 0(,%r12,4), %rbp salq $3, %r12 movq %rbp, %rdi call malloc@PLT movq %rbp, %rdi movq %rax, %rbx call malloc@PLT movq %rbp, %rdi movq %rbx, %r14 movq %rax, h_qvid(%rip) call malloc@PLT movq %r12, %rdi movq %rax, h_qidtov(%rip) call malloc@PLT movq %r12, %rdi movq %rax, %rbp call malloc@PLT movq %rax, %r12 .L677: movslq 60(%rsp), %rax cmpl %r13d, %eax jl .L726 movq %r14, %rsi leaq .LC2(%rip), %rdi xorl %eax, %eax incl %r13d call __isoc23_scanf@PLT addq $4, %r14 jmp .L677 .L726: movslq (%rbx,%rax,4), %rdi xorl %r13d, %r13d salq $2, %rdi call malloc@PLT movq %rax, 8(%rsp) movq %rax, %r14 .L679: movslq 60(%rsp), %rax movslq (%rbx,%rax,4), %rdi cmpl %r13d, %edi jle .L727 movq %r14, %rsi leaq .LC2(%rip), %rdi xorl %eax, %eax incl %r13d call __isoc23_scanf@PLT addq $4, %r14 jmp .L679 .L727: call malloc@PLT xorl %r15d, %r15d leaq 68(%rsp), %r13 movq %rax, %r14 .L681: movslq 60(%rsp), %rax cmpl %r15d, (%rbx,%rax,4) jle .L728 xorl %eax, %eax movq %r13, %rsi leaq .LC2(%rip), %rdi call __isoc23_scanf@PLT cmpl $1, 68(%rsp) sete (%r14,%r15) incq %r15 jmp .L681 .L728: leaq 64(%rsp), %rax leaq .LC2(%rip), %rdi movq %rax, %rsi movq %rax, 32(%rsp) xorl %eax, %eax call __isoc23_scanf@PLT movl 64(%rsp), %eax leal 1(%rax), %edi movslq %edi, %rdi salq $2, %rdi call malloc@PLT xorl %ecx, %ecx movq %rax, %r13 movq %rax, %rsi .L683: movl 64(%rsp), %r15d cmpl %ecx, %r15d jl .L729 leaq .LC2(%rip), %rdi xorl %eax, %eax movl %ecx, 40(%rsp) movq %rsi, 16(%rsp) call __isoc23_scanf@PLT movl 40(%rsp), %ecx movq 16(%rsp), %rsi incl %ecx addq $4, %rsi jmp .L683 .L729: leal 1(%r15), %eax xorl %ecx, %ecx cltq salq $2, %rax movq %rax, 16(%rsp) .L685: cmpl %ecx, 60(%rsp) jl .L730 movq 16(%rsp), %rdi movq %rcx, 40(%rsp) call malloc@PLT movq 40(%rsp), %rcx movq %rax, (%r12,%rcx,8) incq %rcx jmp .L685 .L730: movslq %r15d, %rdx xorl %r15d, %r15d movslq 0(%r13,%rdx,4), %rdi salq $2, %rdi call malloc@PLT movq %rax, 16(%rsp) movq %rax, %rcx .L687: movslq 64(%rsp), %rax cmpl %r15d, 0(%r13,%rax,4) jle .L731 movq %rcx, %rsi leaq .LC2(%rip), %rdi xorl %eax, %eax incl %r15d movq %rcx, 40(%rsp) call __isoc23_scanf@PLT movq 40(%rsp), %rcx addq $4, %rcx jmp .L687 .L731: movl $4, %esi leaq d_qverc(%rip), %rdi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl $1, %esi leaq d_over(%rip), %rdi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl 60(%rsp), %eax leaq d_qvert(%rip), %rdi leal 1(%rax), %esi movslq %esi, %rsi salq $2, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl 60(%rsp), %eax leaq d_qidtov(%rip), %rdi leal 1(%rax), %esi movslq %esi, %rsi salq $2, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movslq 60(%rsp), %rax leaq d_qelist(%rip), %rdi movslq (%rbx,%rax,4), %rsi salq $2, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movslq 60(%rsp), %rax leaq d_qtree(%rip), %rdi movslq (%rbx,%rax,4), %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 leaq 72(%rsp), %rdi movl $4000152, %esi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 leaq 80(%rsp), %rdi movl $4000152, %esi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl 60(%rsp), %eax leaq d_qvid(%rip), %rdi leal 1(%rax), %esi movslq %esi, %rsi salq $2, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movq 24(%rsp), %rsi movl $1, %ecx movq d_qverc(%rip), %rdi movl $4, %edx call cudaMemcpy@PLT movl 60(%rsp), %eax movq %rbx, %rsi movq d_qvert(%rip), %rdi movl $1, %ecx leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT movslq 60(%rsp), %rax movq 8(%rsp), %rsi movl $1, %ecx movq d_qelist(%rip), %rdi movslq (%rbx,%rax,4), %rdx salq $2, %rdx call cudaMemcpy@PLT movslq 60(%rsp), %rax movl $1, %ecx movq %r14, %rsi movq d_qtree(%rip), %rdi movslq (%rbx,%rax,4), %rdx call cudaMemcpy@PLT movq 72(%rsp), %rdi xorl %esi, %esi movl $4000152, %edx call cudaMemset@PLT movq 80(%rsp), %rdi xorl %esi, %esi movl $4000152, %edx call cudaMemset@PLT movl 60(%rsp), %eax movq d_qidtov(%rip), %rdi orl $-1, %esi leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemset@PLT movl 60(%rsp), %eax movq d_qvid(%rip), %rdi xorl %esi, %esi leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemset@PLT movl $4000152, %edi call malloc@PLT cvtsi2sdl 60(%rsp), %xmm2 movq %rax, %rbx movaps %xmm2, %xmm0 movq %xmm2, %r15 call sqrt@PLT movsd %xmm0, 8(%rsp) movq %r15, %xmm0 call sqrt@PLT mulsd .LC3(%rip), %xmm0 movsd 8(%rsp), %xmm1 xorl %r9d, %r9d addsd .LC4(%rip), %xmm0 mulsd .LC3(%rip), %xmm1 xorl %r8d, %r8d movabsq $68719476752, %rdx addsd .LC4(%rip), %xmm1 movl $1, %ecx movl $1, %esi movl $1, 136(%rsp) movq %rdx, 140(%rsp) cvttsd2siq %xmm0, %rax movb $1, h_over(%rip) movl $1, 148(%rsp) movl %eax, 128(%rsp) cvttsd2siq %xmm1, %rax movl %eax, 132(%rsp) movq 128(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L689 movq d_qtree(%rip), %rcx movq d_qvid(%rip), %rdx movq d_qverc(%rip), %rsi movq d_qvert(%rip), %rdi call _Z32__device_stub__Z7setdeg1PiS_S_PbPiS_S_Pb .L689: movb $0, h_over(%rip) movl $2, %r15d .L690: cmpb $0, h_over(%rip) jne .L732 movq d_over(%rip), %rdi movl $1, %ecx movl $1, %edx leaq h_over(%rip), %rsi movb $1, h_over(%rip) call cudaMemcpy@PLT movq 72(%rsp), %rdi xorl %esi, %esi movl $4000152, %edx call cudaMemset@PLT movl 148(%rsp), %ecx xorl %r9d, %r9d movq 140(%rsp), %rdx movq 128(%rsp), %rdi movl 136(%rsp), %esi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L691 pushq 80(%rsp) .cfi_def_cfa_offset 280 movq d_qtree(%rip), %r9 movq d_over(%rip), %r8 pushq 80(%rsp) .cfi_def_cfa_offset 288 movq d_qelist(%rip), %rcx movq d_qvid(%rip), %rdx movq d_qverc(%rip), %rsi movq d_qvert(%rip), %rdi call _Z42__device_stub__Z8findhashPiS_S_S_PbS0_S_S_PiS_S_S_PbS0_S_S_ popq %r8 .cfi_def_cfa_offset 280 popq %r9 .cfi_def_cfa_offset 272 .L691: call cudaGetLastError@PLT movl %eax, %edi testl %eax, %eax je .L692 call cudaGetErrorString@PLT leaq .LC5(%rip), %rsi movl $2, %edi movq %rax, %rdx xorl %eax, %eax call __printf_chk@PLT leaq .LC6(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L692: movq 72(%rsp), %rsi movl $2, %ecx movl $4000152, %edx movq %rbx, %rdi call cudaMemcpy@PLT addl %r15d, (%rbx) movq %rbx, %rdx movq %rbx, %rdi leaq 4000152(%rbx), %rsi call _ZN6thrust20THRUST_200700_890_NS14exclusive_scanIPiS2_EET0_T_S4_S3_.isra.0 movq 72(%rsp), %rdi movl $1, %ecx movq %rbx, %rsi movl $4000152, %edx movl 4000148(%rbx), %r15d call cudaMemcpy@PLT movl 148(%rsp), %ecx xorl %r9d, %r9d movq 140(%rsp), %rdx movq 128(%rsp), %rdi movl 136(%rsp), %esi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L693 movq d_qverc(%rip), %rsi movq d_qvert(%rip), %rdi pushq %rcx .cfi_def_cfa_offset 280 pushq d_qidtov(%rip) .cfi_def_cfa_offset 288 movq d_qtree(%rip), %r8 movq 88(%rsp), %r9 movq d_qelist(%rip), %rcx movq d_qvid(%rip), %rdx call _Z38__device_stub__Z7puttoidPiS_S_S_PbS_S_PiS_S_S_PbS_S_ popq %rsi .cfi_def_cfa_offset 280 popq %rdi .cfi_def_cfa_offset 272 .L693: movq d_over(%rip), %rsi movl $2, %ecx movl $1, %edx leaq h_over(%rip), %rdi call cudaMemcpy@PLT jmp .L690 .L732: movslq 60(%rsp), %rdx movq d_qvid(%rip), %rsi movl $2, %ecx xorl %r15d, %r15d movq h_qvid(%rip), %rdi salq $2, %rdx call cudaMemcpy@PLT movl 60(%rsp), %eax movl $2, %ecx movq d_qidtov(%rip), %rsi movq h_qidtov(%rip), %rdi leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT .L695: cmpl %r15d, 60(%rsp) jl .L733 movq h_qidtov(%rip), %rax leaq .LC7(%rip), %rsi movl $2, %edi movl (%rax,%r15,4), %edx xorl %eax, %eax incq %r15 call __printf_chk@PLT jmp .L695 .L733: leaq .LC8(%rip), %rsi movl $2, %edi xorl %eax, %eax xorl %r15d, %r15d call __printf_chk@PLT .L697: cmpl %r15d, 60(%rsp) jl .L734 movq h_qvid(%rip), %rax leaq .LC7(%rip), %rsi movl $2, %edi movl (%rax,%r15,4), %edx xorl %eax, %eax incq %r15 call __printf_chk@PLT jmp .L697 .L734: leaq .LC8(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq d_qtree(%rip), %rdi call cudaFree@PLT movq 72(%rsp), %rdi call cudaFree@PLT movq 80(%rsp), %rdi call cudaFree@PLT movq %rbx, %rdi movq %rbp, %rbx call free@PLT movq %r14, %rdi xorl %r14d, %r14d call free@PLT movl 60(%rsp), %eax leaq 88(%rsp), %rdi leal 1(%rax), %esi movslq %esi, %rsi salq $3, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 .L699: movl 64(%rsp), %eax leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx cmpl %r14d, 60(%rsp) jl .L735 movq %rdx, %rsi movq %rbx, %rdi incl %r14d addq $8, %rbx call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl 64(%rsp), %eax movq -8(%rbx), %rdi xorl %esi, %esi leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemset@PLT jmp .L699 .L735: movq 8(%rbp), %rdi movl $1, %esi xorl %r15d, %r15d call cudaMemset@PLT movl 60(%rsp), %eax movq 88(%rsp), %rdi movq %rbp, %rsi movl $1, %ecx leal 1(%rax), %edx movslq %edx, %rdx salq $3, %rdx call cudaMemcpy@PLT movl 64(%rsp), %eax leaq d_dvert(%rip), %rdi leal 1(%rax), %esi movslq %esi, %rsi salq $2, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl $4, %esi leaq d_dverc(%rip), %rdi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movslq 64(%rsp), %rax leaq d_delist(%rip), %rdi movslq 0(%r13,%rax,4), %rsi salq $2, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movq 32(%rsp), %rsi movl $1, %ecx movq d_dverc(%rip), %rdi movl $4, %edx call cudaMemcpy@PLT movl 64(%rsp), %eax movq %r13, %rsi movq d_dvert(%rip), %rdi movl $1, %ecx leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT movslq 64(%rsp), %rax movq 16(%rsp), %rsi movl $1, %ecx movq d_delist(%rip), %rdi movslq 0(%r13,%rax,4), %rdx salq $2, %rdx call cudaMemcpy@PLT movl 64(%rsp), %ebx cvtsi2sdl %ebx, %xmm3 movaps %xmm3, %xmm0 movq %xmm3, %r14 call sqrt@PLT movq %xmm0, %r13 movq %r14, %xmm0 call sqrt@PLT mulsd .LC3(%rip), %xmm0 leal 1(%rbx), %ecx movq 8(%r12), %rdi addsd .LC4(%rip), %xmm0 movslq %ecx, %rcx movl $1, 160(%rsp) movl $1, 172(%rsp) salq $2, %rcx cvttsd2siq %xmm0, %rax movq %r13, %xmm0 mulsd .LC3(%rip), %xmm0 addsd .LC4(%rip), %xmm0 movl %eax, 152(%rsp) cvttsd2siq %xmm0, %rax movl %eax, 156(%rsp) movabsq $68719476752, %rax movq %rax, 164(%rsp) movb $1, %al rep stosb movl 60(%rsp), %eax leal 1(%rax), %r13d movslq %r13d, %r13 salq $2, %r13 movq %r13, %rdi call malloc@PLT movq %r13, %rcx movq %r13, %rdx xorl %esi, %esi movq %rax, %rdi movq %rax, %rbx call __memset_chk@PLT movq %r13, %rsi leaq 104(%rsp), %rdi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl 60(%rsp), %eax movq 104(%rsp), %rdi xorl %esi, %esi leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemset@PLT movl 60(%rsp), %eax leaq 96(%rsp), %rdi leal 1(%rax), %esi movslq %esi, %rsi salq $3, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl 60(%rsp), %eax leal 1(%rax), %edi movslq %edi, %rdi salq $3, %rdi call malloc@PLT movq %rax, %r13 movq %rax, %r14 .L701: movl 60(%rsp), %edx cmpl %r15d, %edx jl .L736 movl 64(%rsp), %eax movq %r14, %rdi incl %r15d addq $8, %r14 leal 1(%rax), %esi movslq %esi, %rsi salq $2, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movl 64(%rsp), %eax movq -8(%r14), %rdi xorl %esi, %esi leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemset@PLT jmp .L701 .L736: incl %edx movq 96(%rsp), %rdi movq %r13, %rsi movl $1, %ecx movslq %edx, %rdx salq $3, %rdx call cudaMemcpy@PLT movq 8(%r12), %rsi xorl %eax, %eax .L703: movl 64(%rsp), %edx cmpl %eax, %edx jle .L737 movl %eax, (%rsi,%rax,4) incq %rax jmp .L703 .L737: incl %edx movq 8(%r13), %rdi movl $1, %ecx xorl %r15d, %r15d movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT movl 64(%rsp), %eax movl %eax, 4(%rbx) .L705: movl 60(%rsp), %ecx cmpl %r15d, %ecx jl .L738 movq h_qidtov(%rip), %rax leaq 0(,%r15,4), %r14 cmpl $-1, (%rax,%r15,4) je .L707 movl 172(%rsp), %ecx xorl %r9d, %r9d xorl %r8d, %r8d movq 164(%rsp), %rdx movq 152(%rsp), %rdi movl 160(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L708 movq h_qidtov(%rip), %rax movq d_dverc(%rip), %rdx movq d_qelist(%rip), %r9 movq d_qvert(%rip), %r8 movl (%rax,%r14), %edi pushq 88(%rsp) .cfi_def_cfa_offset 280 movq d_delist(%rip), %rcx pushq d_qvid(%rip) .cfi_def_cfa_offset 288 movq d_dvert(%rip), %rsi call _Z40__device_stub__Z7findcvsiPiS_S_S_S_S_PS_iPiS_S_S_S_S_PS_ popq %rax .cfi_def_cfa_offset 280 popq %rdx .cfi_def_cfa_offset 272 .L708: call cudaGetLastError@PLT movl 64(%rsp), %eax movq 0(%rbp,%r15,8), %rsi movl $2, %ecx movq (%r12,%r15,8), %rdi leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT xorl %edx, %edx .L709: movl %edx, 68(%rsp) cmpl %edx, 64(%rsp) jl .L739 movq (%r12,%r15,8), %rcx movslq %edx, %rax cmpl $0, (%rcx,%rax,4) je .L710 leaq .LC7(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L710: movl 68(%rsp), %eax leal 1(%rax), %edx jmp .L709 .L739: leaq .LC8(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq (%r12,%r15,8), %r9 movslq 64(%rsp), %rax movq %r9, %rdx leaq 4(%r9,%rax,4), %rsi movq %r9, %rdi call _ZN6thrust20THRUST_200700_890_NS14exclusive_scanIPiS2_EET0_T_S4_S3_.isra.0 movslq 64(%rsp), %rax movq 0(%rbp,%r15,8), %rdi movq %r9, %rsi movl $1, %ecx movq %rax, %rdx movl (%r9,%rax,4), %eax incl %edx movl %eax, (%rbx,%r15,4) movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT movl 172(%rsp), %ecx xorl %r9d, %r9d movq 164(%rsp), %rdx movq 152(%rsp), %rdi movl 160(%rsp), %esi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L707 movq 0(%r13,%r15,8), %rdx movq 0(%rbp,%r15,8), %rsi movq d_dverc(%rip), %rdi call _Z32__device_stub__Z9puttolistPiS_S_PiS_S_ .L707: incq %r15 jmp .L705 .L738: movq h_qvid(%rip), %rsi xorl %eax, %eax movl $1, %ebp .L714: cmpl %eax, %ecx jle .L740 movslq (%rsi,%rax,4), %rdx movslq (%rbx,%rdx,4), %rdx testl %edx, %edx je .L715 imulq %rdx, %rbp .L715: incq %rax jmp .L714 .L740: movq %rbp, %rdx leaq .LC9(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl 60(%rsp), %eax movq 104(%rsp), %rdi movq %rbx, %rsi movl $1, %ecx leal 1(%rax), %edx movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT cvtsi2sdq %rbp, %xmm4 movaps %xmm4, %xmm0 movq %xmm4, %rbx call sqrt@PLT movsd %xmm0, 8(%rsp) movq %rbx, %xmm0 leaq 4(,%rbp,4), %rbx call sqrt@PLT mulsd .LC3(%rip), %xmm0 leaq 112(%rsp), %rdi movl $1, 184(%rsp) movl $1, 196(%rsp) cvttsd2sil %xmm0, %eax movsd .LC3(%rip), %xmm0 mulsd 8(%rsp), %xmm0 incl %eax movl %eax, 176(%rsp) cvttsd2sil %xmm0, %eax incl %eax movl %eax, 180(%rsp) movabsq $68719476752, %rax movq %rax, 188(%rsp) movl 60(%rsp), %eax leal 1(%rax), %esi movslq %esi, %rsi imulq %rbp, %rsi salq $2, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 leaq 120(%rsp), %rdi movq %rbx, %rsi call _Z10cudaMallocIiE9cudaErrorPPT_m.isra.0 movq 120(%rsp), %rdi xorl %esi, %esi movq %rbx, %rdx call cudaMemset@PLT movl 196(%rsp), %ecx xorl %r9d, %r9d movq 188(%rsp), %rdx movq 176(%rsp), %rdi movl 184(%rsp), %esi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L717 pushq 104(%rsp) .cfi_def_cfa_offset 280 movq d_qvert(%rip), %r9 movq d_qelist(%rip), %r8 pushq 104(%rsp) .cfi_def_cfa_offset 288 movq d_qverc(%rip), %rcx pushq d_delist(%rip) .cfi_def_cfa_offset 296 movq d_qvid(%rip), %rdx pushq d_dvert(%rip) .cfi_def_cfa_offset 304 movq 152(%rsp), %rsi movq 144(%rsp), %rdi call _Z45__device_stub__Z7findallPiS_S_S_S_S_S_S_PS_S_PiS_S_S_S_S_S_S_PS_S_ addq $32, %rsp .cfi_def_cfa_offset 272 .L717: movq d_over(%rip), %rdi call cudaFree@PLT movq d_qverc(%rip), %rdi call cudaFree@PLT movq d_qvert(%rip), %rdi call cudaFree@PLT movq d_qelist(%rip), %rdi call cudaFree@PLT movq d_qvid(%rip), %rdi call cudaFree@PLT movq d_qidtov(%rip), %rdi call cudaFree@PLT movq d_dvert(%rip), %rdi call cudaFree@PLT movq d_delist(%rip), %rdi call cudaFree@PLT movq d_dverc(%rip), %rdi call cudaFree@PLT movq 88(%rsp), %rdi call cudaFree@PLT movq 96(%rsp), %rdi call cudaFree@PLT movq 104(%rsp), %rdi call cudaFree@PLT movq 200(%rsp), %rax subq %fs:40, %rax je .L718 call __stack_chk_fail@PLT .L718: addq $216, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11186: .size main, .-main .section .rodata.str1.1 .LC10: .string "_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv" .LC11: .string "_Z7findallPiS_S_S_S_S_S_S_PS_S_" .LC12: .string "_Z9checkpermPbPiS0_S0_S0_S0_S0_" .LC13: .string "_Z9puttolistPiS_S_" .LC14: .string "_Z7findcvsiPiS_S_S_S_S_PS_" .LC15: .string "_Z7puttoidPiS_S_S_PbS_S_" .LC16: .string "_Z7setdeg1PiS_S_Pb" .LC17: .string "_Z8findhashPiS_S_S_PbS0_S_S_" .LC18: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__45__cpo5beginE" .LC19: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__45__cpo3endE" .LC20: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__45__cpo6cbeginE" .LC21: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__45__cpo4cendE" .LC22: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__45__cpo6rbeginE" .LC23: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__45__cpo4rendE" .LC24: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__45__cpo7crbeginE" .LC25: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__45__cpo5crendE" .LC26: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE" .LC27: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__419piecewise_constructE" .LC28: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__48in_placeE" .LC29: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__420unreachable_sentinelE" .LC30: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std3__47nulloptE" .LC31: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo4swapE" .LC32: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo9iter_moveE" .LC33: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo7advanceE" .LC34: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo5beginE" .LC35: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo3endE" .LC36: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo6cbeginE" .LC37: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo4cendE" .LC38: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo9iter_swapE" .LC39: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo4nextE" .LC40: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo4prevE" .LC41: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo4dataE" .LC42: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo5cdataE" .LC43: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo4sizeE" .LC44: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo5ssizeE" .LC45: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d14cuda3std6ranges3__45__cpo8distanceE" .LC46: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS8cuda_cub3parE" .LC47: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE" .LC48: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS6system6detail10sequential3seqE" .LC49: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_1E" .LC50: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_2E" .LC51: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_3E" .LC52: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_4E" .LC53: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_5E" .LC54: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_6E" .LC55: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_7E" .LC56: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_8E" .LC57: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders2_9E" .LC58: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS12placeholders3_10E" .LC59: .string "_ZN43_INTERNAL_34ebdb36_12_isokernel_cu_df4162d16thrust20THRUST_200700_890_NS3seqE" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB11228: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC10(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC11(%rip), %rdx movq %rbx, %rdi leaq _Z7findallPiS_S_S_S_S_S_S_PS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC12(%rip), %rdx movq %rbx, %rdi leaq _Z9checkpermPbPiS0_S0_S0_S0_S0_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC13(%rip), %rdx movq %rbx, %rdi leaq _Z9puttolistPiS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC14(%rip), %rdx movq %rbx, %rdi leaq _Z7findcvsiPiS_S_S_S_S_PS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC15(%rip), %rdx movq %rbx, %rdi leaq _Z7puttoidPiS_S_S_PbS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC16(%rip), %rdx movq %rbx, %rdi leaq _Z7setdeg1PiS_S_Pb(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC17(%rip), %rdx movq %rbx, %rdi leaq _Z8findhashPiS_S_S_PbS0_S_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi leaq .LC18(%rip), %rdx pushq $0 .cfi_def_cfa_offset 24 xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d pushq $0 .cfi_def_cfa_offset 32 leaq _ZN4cuda3std3__45__cpo5beginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC19(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo3endE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC20(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC21(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo4cendE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC22(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC23(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo4rendE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC24(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC25(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo5crendE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC26(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC27(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__419piecewise_constructE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC28(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__48in_placeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC29(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC30(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__47nulloptE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC31(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC32(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC33(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC34(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC35(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC36(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC37(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC38(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC39(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC40(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC41(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC42(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC43(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC44(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC45(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC46(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC47(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC48(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC49(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC50(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC51(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC52(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC53(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC54(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC55(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC56(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC57(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC58(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC59(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi call __cudaRegisterVar@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE11228: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl h_over .bss .type h_over, @object .size h_over, 1 h_over: .zero 1 .globl d_qdmap .align 8 .type d_qdmap, @object .size d_qdmap, 8 d_qdmap: .zero 8 .globl d_over .align 8 .type d_over, @object .size d_over, 8 d_over: .zero 8 .globl d_qtree .align 8 .type d_qtree, @object .size d_qtree, 8 d_qtree: .zero 8 .globl d_delist .align 8 .type d_delist, @object .size d_delist, 8 d_delist: .zero 8 .globl d_dvert .align 8 .type d_dvert, @object .size d_dvert, 8 d_dvert: .zero 8 .globl d_qelist .align 8 .type d_qelist, @object .size d_qelist, 8 d_qelist: .zero 8 .globl d_qvert .align 8 .type d_qvert, @object .size d_qvert, 8 d_qvert: .zero 8 .globl h_qvid .align 8 .type h_qvid, @object .size h_qvid, 8 h_qvid: .zero 8 .globl h_qidtov .align 8 .type h_qidtov, @object .size h_qidtov, 8 h_qidtov: .zero 8 .globl d_qidtov .align 8 .type d_qidtov, @object .size d_qidtov, 8 d_qidtov: .zero 8 .globl d_qvid .align 8 .type d_qvid, @object .size d_qvid, 8 d_qvid: .zero 8 .globl d_dverc .align 8 .type d_dverc, @object .size d_dverc, 8 d_dverc: .zero 8 .globl d_qverc .align 8 .type d_qverc, @object .size d_qverc, 8 d_qverc: .zero 8 .globl qdmap .align 8 .type qdmap, @object .size qdmap, 8 qdmap: .zero 8 .section .rodata .type _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object .size _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1 _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, @object .size _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1 _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE: .zero 1 .type _ZN6thrust20THRUST_200700_890_NSL3seqE, @object .size _ZN6thrust20THRUST_200700_890_NSL3seqE, 1 _ZN6thrust20THRUST_200700_890_NSL3seqE: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E: .zero 1 .weak _ZN4cuda3std3__47nulloptE .section .rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat .type _ZN4cuda3std3__47nulloptE, @gnu_unique_object .size _ZN4cuda3std3__47nulloptE, 1 _ZN4cuda3std3__47nulloptE: .zero 1 .hidden InitializeInjectionNvtx2_fnptr .weak InitializeInjectionNvtx2_fnptr .bss .align 8 .type InitializeInjectionNvtx2_fnptr, @object .size InitializeInjectionNvtx2_fnptr, 8 InitializeInjectionNvtx2_fnptr: .zero 8 .hidden nvtxGlobals_v3 .weak nvtxGlobals_v3 .section .data.rel.local,"aw" .align 32 .type nvtxGlobals_v3, @object .size nvtxGlobals_v3, 1168 nvtxGlobals_v3: .long 0 .zero 4 .quad 16 .quad nvtxEtiGetModuleFunctionTable_v3 .quad 24 .long 3 .long 0 .quad nvtxEtiSetInjectionNvtxVersion_v3 .quad nvtxMarkEx_impl_init_v3 .quad nvtxMarkA_impl_init_v3 .quad nvtxMarkW_impl_init_v3 .quad nvtxRangeStartEx_impl_init_v3 .quad nvtxRangeStartA_impl_init_v3 .quad nvtxRangeStartW_impl_init_v3 .quad nvtxRangeEnd_impl_init_v3 .quad nvtxRangePushEx_impl_init_v3 .quad nvtxRangePushA_impl_init_v3 .quad nvtxRangePushW_impl_init_v3 .quad nvtxRangePop_impl_init_v3 .quad nvtxNameCategoryA_impl_init_v3 .quad nvtxNameCategoryW_impl_init_v3 .quad nvtxNameOsThreadA_impl_init_v3 .quad nvtxNameOsThreadW_impl_init_v3 .quad nvtxNameCuDeviceA_impl_init_v3 .quad nvtxNameCuDeviceW_impl_init_v3 .quad nvtxNameCuContextA_impl_init_v3 .quad nvtxNameCuContextW_impl_init_v3 .quad nvtxNameCuStreamA_impl_init_v3 .quad nvtxNameCuStreamW_impl_init_v3 .quad nvtxNameCuEventA_impl_init_v3 .quad nvtxNameCuEventW_impl_init_v3 .quad nvtxNameClDeviceA_impl_init_v3 .quad nvtxNameClDeviceW_impl_init_v3 .quad nvtxNameClContextA_impl_init_v3 .quad nvtxNameClContextW_impl_init_v3 .quad nvtxNameClCommandQueueA_impl_init_v3 .quad nvtxNameClCommandQueueW_impl_init_v3 .quad nvtxNameClMemObjectA_impl_init_v3 .quad nvtxNameClMemObjectW_impl_init_v3 .quad nvtxNameClSamplerA_impl_init_v3 .quad nvtxNameClSamplerW_impl_init_v3 .quad nvtxNameClProgramA_impl_init_v3 .quad nvtxNameClProgramW_impl_init_v3 .quad nvtxNameClEventA_impl_init_v3 .quad nvtxNameClEventW_impl_init_v3 .quad nvtxNameCudaDeviceA_impl_init_v3 .quad nvtxNameCudaDeviceW_impl_init_v3 .quad nvtxNameCudaStreamA_impl_init_v3 .quad nvtxNameCudaStreamW_impl_init_v3 .quad nvtxNameCudaEventA_impl_init_v3 .quad nvtxNameCudaEventW_impl_init_v3 .quad nvtxDomainMarkEx_impl_init_v3 .quad nvtxDomainRangeStartEx_impl_init_v3 .quad nvtxDomainRangeEnd_impl_init_v3 .quad nvtxDomainRangePushEx_impl_init_v3 .quad nvtxDomainRangePop_impl_init_v3 .quad nvtxDomainResourceCreate_impl_init_v3 .quad nvtxDomainResourceDestroy_impl_init_v3 .quad nvtxDomainNameCategoryA_impl_init_v3 .quad nvtxDomainNameCategoryW_impl_init_v3 .quad nvtxDomainRegisterStringA_impl_init_v3 .quad nvtxDomainRegisterStringW_impl_init_v3 .quad nvtxDomainCreateA_impl_init_v3 .quad nvtxDomainCreateW_impl_init_v3 .quad nvtxDomainDestroy_impl_init_v3 .quad nvtxInitialize_impl_init_v3 .quad nvtxDomainSyncUserCreate_impl_init_v3 .quad nvtxDomainSyncUserDestroy_impl_init_v3 .quad nvtxDomainSyncUserAcquireStart_impl_init_v3 .quad nvtxDomainSyncUserAcquireFailed_impl_init_v3 .quad nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .quad nvtxDomainSyncUserReleasing_impl_init_v3 .quad 0 .quad nvtxGlobals_v3+48 .quad nvtxGlobals_v3+56 .quad nvtxGlobals_v3+64 .quad nvtxGlobals_v3+72 .quad nvtxGlobals_v3+80 .quad nvtxGlobals_v3+88 .quad nvtxGlobals_v3+96 .quad nvtxGlobals_v3+104 .quad nvtxGlobals_v3+112 .quad nvtxGlobals_v3+120 .quad nvtxGlobals_v3+128 .quad nvtxGlobals_v3+136 .quad nvtxGlobals_v3+144 .quad nvtxGlobals_v3+152 .quad nvtxGlobals_v3+160 .quad 0 .quad 0 .quad nvtxGlobals_v3+168 .quad nvtxGlobals_v3+176 .quad nvtxGlobals_v3+184 .quad nvtxGlobals_v3+192 .quad nvtxGlobals_v3+200 .quad nvtxGlobals_v3+208 .quad nvtxGlobals_v3+216 .quad nvtxGlobals_v3+224 .quad 0 .quad 0 .quad nvtxGlobals_v3+232 .quad nvtxGlobals_v3+240 .quad nvtxGlobals_v3+248 .quad nvtxGlobals_v3+256 .quad nvtxGlobals_v3+264 .quad nvtxGlobals_v3+272 .quad nvtxGlobals_v3+280 .quad nvtxGlobals_v3+288 .quad nvtxGlobals_v3+296 .quad nvtxGlobals_v3+304 .quad nvtxGlobals_v3+312 .quad nvtxGlobals_v3+320 .quad nvtxGlobals_v3+328 .quad nvtxGlobals_v3+336 .quad 0 .quad 0 .quad nvtxGlobals_v3+344 .quad nvtxGlobals_v3+352 .quad nvtxGlobals_v3+360 .quad nvtxGlobals_v3+368 .quad nvtxGlobals_v3+376 .quad nvtxGlobals_v3+384 .quad 0 .quad 0 .quad nvtxGlobals_v3+392 .quad nvtxGlobals_v3+400 .quad nvtxGlobals_v3+408 .quad nvtxGlobals_v3+416 .quad nvtxGlobals_v3+424 .quad nvtxGlobals_v3+432 .quad nvtxGlobals_v3+440 .quad nvtxGlobals_v3+448 .quad nvtxGlobals_v3+456 .quad nvtxGlobals_v3+464 .quad nvtxGlobals_v3+472 .quad nvtxGlobals_v3+480 .quad nvtxGlobals_v3+488 .quad nvtxGlobals_v3+496 .quad nvtxGlobals_v3+504 .quad 0 .quad 0 .quad nvtxGlobals_v3+512 .quad nvtxGlobals_v3+520 .quad nvtxGlobals_v3+528 .quad nvtxGlobals_v3+536 .quad nvtxGlobals_v3+544 .quad nvtxGlobals_v3+552 .quad 0 .weak _ZN4cuda3std3__420unreachable_sentinelE .section .rodata._ZN4cuda3std3__420unreachable_sentinelE,"aG",@progbits,_ZN4cuda3std3__420unreachable_sentinelE,comdat .type _ZN4cuda3std3__420unreachable_sentinelE, @gnu_unique_object .size _ZN4cuda3std3__420unreachable_sentinelE, 1 _ZN4cuda3std3__420unreachable_sentinelE: .zero 1 .weak _ZN4cuda3std3__45__cpo5crendE .section .rodata._ZN4cuda3std3__45__cpo5crendE,"aG",@progbits,_ZN4cuda3std3__45__cpo5crendE,comdat .type _ZN4cuda3std3__45__cpo5crendE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo5crendE, 1 _ZN4cuda3std3__45__cpo5crendE: .zero 1 .weak _ZN4cuda3std3__45__cpo7crbeginE .section .rodata._ZN4cuda3std3__45__cpo7crbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo7crbeginE,comdat .type _ZN4cuda3std3__45__cpo7crbeginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo7crbeginE, 1 _ZN4cuda3std3__45__cpo7crbeginE: .zero 1 .weak _ZN4cuda3std3__45__cpo4rendE .section .rodata._ZN4cuda3std3__45__cpo4rendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4rendE,comdat .type _ZN4cuda3std3__45__cpo4rendE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo4rendE, 1 _ZN4cuda3std3__45__cpo4rendE: .zero 1 .weak _ZN4cuda3std3__45__cpo6rbeginE .section .rodata._ZN4cuda3std3__45__cpo6rbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6rbeginE,comdat .type _ZN4cuda3std3__45__cpo6rbeginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo6rbeginE, 1 _ZN4cuda3std3__45__cpo6rbeginE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo8distanceE .section .rodata._ZN4cuda3std6ranges3__45__cpo8distanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo8distanceE,comdat .type _ZN4cuda3std6ranges3__45__cpo8distanceE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo8distanceE, 1 _ZN4cuda3std6ranges3__45__cpo8distanceE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5ssizeE .section .rodata._ZN4cuda3std6ranges3__45__cpo5ssizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5ssizeE,comdat .type _ZN4cuda3std6ranges3__45__cpo5ssizeE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5ssizeE, 1 _ZN4cuda3std6ranges3__45__cpo5ssizeE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4sizeE .section .rodata._ZN4cuda3std6ranges3__45__cpo4sizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4sizeE,comdat .type _ZN4cuda3std6ranges3__45__cpo4sizeE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4sizeE, 1 _ZN4cuda3std6ranges3__45__cpo4sizeE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5cdataE .section .rodata._ZN4cuda3std6ranges3__45__cpo5cdataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5cdataE,comdat .type _ZN4cuda3std6ranges3__45__cpo5cdataE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5cdataE, 1 _ZN4cuda3std6ranges3__45__cpo5cdataE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4dataE .section .rodata._ZN4cuda3std6ranges3__45__cpo4dataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4dataE,comdat .type _ZN4cuda3std6ranges3__45__cpo4dataE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4dataE, 1 _ZN4cuda3std6ranges3__45__cpo4dataE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4prevE .section .rodata._ZN4cuda3std6ranges3__45__cpo4prevE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4prevE,comdat .type _ZN4cuda3std6ranges3__45__cpo4prevE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4prevE, 1 _ZN4cuda3std6ranges3__45__cpo4prevE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4nextE .section .rodata._ZN4cuda3std6ranges3__45__cpo4nextE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4nextE,comdat .type _ZN4cuda3std6ranges3__45__cpo4nextE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4nextE, 1 _ZN4cuda3std6ranges3__45__cpo4nextE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo9iter_swapE .section .rodata._ZN4cuda3std6ranges3__45__cpo9iter_swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_swapE,comdat .type _ZN4cuda3std6ranges3__45__cpo9iter_swapE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo9iter_swapE, 1 _ZN4cuda3std6ranges3__45__cpo9iter_swapE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4cendE .section .rodata._ZN4cuda3std6ranges3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4cendE,comdat .type _ZN4cuda3std6ranges3__45__cpo4cendE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4cendE, 1 _ZN4cuda3std6ranges3__45__cpo4cendE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo6cbeginE .section .rodata._ZN4cuda3std6ranges3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo6cbeginE,comdat .type _ZN4cuda3std6ranges3__45__cpo6cbeginE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo6cbeginE, 1 _ZN4cuda3std6ranges3__45__cpo6cbeginE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo3endE .section .rodata._ZN4cuda3std6ranges3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo3endE,comdat .type _ZN4cuda3std6ranges3__45__cpo3endE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo3endE, 1 _ZN4cuda3std6ranges3__45__cpo3endE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5beginE .section .rodata._ZN4cuda3std6ranges3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5beginE,comdat .type _ZN4cuda3std6ranges3__45__cpo5beginE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5beginE, 1 _ZN4cuda3std6ranges3__45__cpo5beginE: .zero 1 .section .rodata .type _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, @object .size _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, 1 _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo7advanceE .section .rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat .type _ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo7advanceE, 1 _ZN4cuda3std6ranges3__45__cpo7advanceE: .zero 1 .hidden _ZN4cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE .weak _ZN4cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE .section .rodata._ZN4cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE,"aG",@progbits,_ZN4cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE,comdat .type _ZN4cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE, @gnu_unique_object .size _ZN4cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE, 1 _ZN4cuda3std3__445_GLOBAL__N__34ebdb36_12_isokernel_cu_df4162d16ignoreE: .zero 1 .weak _ZN4cuda3std3__48in_placeE .section .rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat .type _ZN4cuda3std3__48in_placeE, @gnu_unique_object .size _ZN4cuda3std3__48in_placeE, 1 _ZN4cuda3std3__48in_placeE: .zero 1 .weak _ZN4cuda3std3__45__cpo4cendE .section .rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat .type _ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo4cendE, 1 _ZN4cuda3std3__45__cpo4cendE: .zero 1 .weak _ZN4cuda3std3__45__cpo6cbeginE .section .rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat .type _ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo6cbeginE, 1 _ZN4cuda3std3__45__cpo6cbeginE: .zero 1 .weak _ZN4cuda3std3__45__cpo3endE .section .rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat .type _ZN4cuda3std3__45__cpo3endE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo3endE, 1 _ZN4cuda3std3__45__cpo3endE: .zero 1 .weak _ZN4cuda3std3__45__cpo5beginE .section .rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat .type _ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo5beginE, 1 _ZN4cuda3std3__45__cpo5beginE: .zero 1 .weak _ZN4cuda3std3__419piecewise_constructE .section .rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat .type _ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object .size _ZN4cuda3std3__419piecewise_constructE, 1 _ZN4cuda3std3__419piecewise_constructE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo9iter_moveE .section .rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat .type _ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1 _ZN4cuda3std6ranges3__45__cpo9iter_moveE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4swapE .section .rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat .type _ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4swapE, 1 _ZN4cuda3std6ranges3__45__cpo4swapE: .zero 1 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC3: .long 0 .long 1068498944 .align 8 .LC4: .long 0 .long 1072693248 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0020*/ BRA 0x20; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z7findallPiS_S_S_S_S_S_S_PS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff047624 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff057624 */ /* 0x000fca00078e00ff */ /*0040*/ LDG.E R9, [R4.64] ; /* 0x0000000804097981 */ /* 0x000ea2000c1e1900 */ /*0050*/ S2UR UR4, SR_CTAID.Z ; /* 0x00000000000479c3 */ /* 0x000e220000002700 */ /*0060*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff007624 */ /* 0x000fe200078e00ff */ /*0070*/ ULDC UR7, c[0x0][0x10] ; /* 0x0000040000077ab9 */ /* 0x000fe20000000800 */ /*0080*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e640000002200 */ /*0090*/ IMAD R0, R0, c[0x0][0x4], RZ ; /* 0x0000010000007a24 */ /* 0x000fe400078e02ff */ /*00a0*/ S2R R7, SR_TID.Z ; /* 0x0000000000077919 */ /* 0x000ee20000002300 */ /*00b0*/ S2UR UR5, SR_CTAID.Y ; /* 0x00000000000579c3 */ /* 0x000e260000002600 */ /*00c0*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */ /* 0x000f2a0000002100 */ /*00d0*/ S2UR UR6, SR_CTAID.X ; /* 0x00000000000679c3 */ /* 0x000f620000002500 */ /*00e0*/ IMAD R3, R3, c[0x0][0x0], RZ ; /* 0x0000000003037a24 */ /* 0x002fc400078e02ff */ /*00f0*/ IMAD R2, R0.reuse, R7, RZ ; /* 0x0000000700027224 */ /* 0x048fe200078e02ff */ /*0100*/ UIMAD UR4, UR4, UR7, UR5 ; /* 0x00000007040472a4 */ /* 0x001fe2000f8e0205 */ /*0110*/ IMAD R7, R0, c[0x0][0x8], RZ ; /* 0x0000020000077a24 */ /* 0x000fe400078e02ff */ /*0120*/ ULDC UR5, c[0x0][0xc] ; /* 0x0000030000057ab9 */ /* 0x000fe20000000800 */ /*0130*/ IADD3 R2, P0, P1, R2, R3, R6 ; /* 0x0000000302027210 */ /* 0x010fc8000791e006 */ /*0140*/ IADD3.X R3, RZ, RZ, RZ, P0, P1 ; /* 0x000000ffff037210 */ /* 0x000fe200007e24ff */ /*0150*/ UIMAD UR4, UR4, UR5, UR6 ; /* 0x00000005040472a4 */ /* 0x020fcc000f8e0206 */ /*0160*/ IMAD.WIDE.U32 R2, R7, UR4, R2 ; /* 0x0000000407027c25 */ /* 0x000fc8000f8e0002 */ /*0170*/ IMAD.MOV.U32 R22, RZ, RZ, R2 ; /* 0x000000ffff167224 */ /* 0x000fe400078e0002 */ /*0180*/ IMAD.MOV.U32 R23, RZ, RZ, R3 ; /* 0x000000ffff177224 */ /* 0x000fe200078e0003 */ /*0190*/ ISETP.GE.AND P1, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x004fda0003f26270 */ /*01a0*/ @!P1 BRA 0xdc0 ; /* 0x00000c1000009947 */ /* 0x000fea0003800000 */ /*01b0*/ IADD3 R0, R9.reuse, -0x1, RZ ; /* 0xffffffff09007810 */ /* 0x040fe20007ffe0ff */ /*01c0*/ IMAD.MOV.U32 R22, RZ, RZ, R2 ; /* 0x000000ffff167224 */ /* 0x000fe200078e0002 */ /*01d0*/ MOV R18, RZ ; /* 0x000000ff00127202 */ /* 0x000fe20000000f00 */ /*01e0*/ IMAD.MOV.U32 R23, RZ, RZ, R3 ; /* 0x000000ffff177224 */ /* 0x000fe200078e0003 */ /*01f0*/ ISETP.GE.U32.AND P0, PT, R0, 0x3, PT ; /* 0x000000030000780c */ /* 0x000fe40003f06070 */ /*0200*/ LOP3.LUT R0, R9, 0x3, RZ, 0xc0, !PT ; /* 0x0000000309007812 */ /* 0x000fd600078ec0ff */ /*0210*/ @!P0 BRA 0xb30 ; /* 0x0000091000008947 */ /* 0x000fea0003800000 */ /*0220*/ IMAD.IADD R20, R9, 0x1, -R0 ; /* 0x0000000109147824 */ /* 0x000fe400078e0a00 */ /*0230*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ; /* 0x000000ffff127224 */ /* 0x000fe400078e00ff */ /*0240*/ IMAD.MOV.U32 R22, RZ, RZ, R2 ; /* 0x000000ffff167224 */ /* 0x000fe400078e0002 */ /*0250*/ IMAD.MOV.U32 R23, RZ, RZ, R3 ; /* 0x000000ffff177224 */ /* 0x000fe400078e0003 */ /*0260*/ MOV R11, 0x4 ; /* 0x00000004000b7802 */ /* 0x000fca0000000f00 */ /*0270*/ IMAD.WIDE R6, R18, R11, c[0x0][0x170] ; /* 0x00005c0012067625 */ /* 0x000fca00078e020b */ /*0280*/ LDG.E R10, [R6.64] ; /* 0x00000008060a7981 */ /* 0x000ea4000c1e1900 */ /*0290*/ IMAD.WIDE R10, R10, R11, c[0x0][0x1a8] ; /* 0x00006a000a0a7625 */ /* 0x004fca00078e020b */ /*02a0*/ LDG.E R17, [R10.64] ; /* 0x000000080a117981 */ /* 0x000ea2000c1e1900 */ /*02b0*/ IADD3 R20, R20, -0x4, RZ ; /* 0xfffffffc14147810 */ /* 0x000fe20007ffe0ff */ /*02c0*/ BSSY B0, 0x4b0 ; /* 0x000001e000007945 */ /* 0x000fe60003800000 */ /*02d0*/ ISETP.NE.AND P3, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fe40003f65270 */ /*02e0*/ SHF.R.S32.HI R16, RZ, 0x1f, R17 ; /* 0x0000001fff107819 */ /* 0x004fc80000011411 */ /*02f0*/ LOP3.LUT R8, R23, R16, RZ, 0xfc, !PT ; /* 0x0000001017087212 */ /* 0x000fc800078efcff */ /*0300*/ ISETP.NE.U32.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fda0003f05070 */ /*0310*/ @!P0 BRA 0x360 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*0320*/ IMAD.MOV.U32 R19, RZ, RZ, R23 ; /* 0x000000ffff137224 */ /* 0x000fe200078e0017 */ /*0330*/ MOV R8, 0x350 ; /* 0x0000035000087802 */ /* 0x000fe40000000f00 */ /*0340*/ CALL.REL.NOINC 0x1810 ; /* 0x000014c000007944 */ /* 0x000fea0003c00000 */ /*0350*/ BRA 0x4a0 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*0360*/ I2F.U32.RP R8, R17 ; /* 0x0000001100087306 */ /* 0x000e220000209000 */ /*0370*/ IMAD.MOV R13, RZ, RZ, -R17 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e0a11 */ /*0380*/ ISETP.NE.U32.AND P4, PT, R17, RZ, PT ; /* 0x000000ff1100720c */ /* 0x000fe40003f85070 */ /*0390*/ MOV R23, RZ ; /* 0x000000ff00177202 */ /* 0x000fc80000000f00 */ /*03a0*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x001e240000001000 */ /*03b0*/ IADD3 R10, R8, 0xffffffe, RZ ; /* 0x0ffffffe080a7810 */ /* 0x001fcc0007ffe0ff */ /*03c0*/ F2I.FTZ.U32.TRUNC.NTZ R11, R10 ; /* 0x0000000a000b7305 */ /* 0x000064000021f000 */ /*03d0*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x001fe400078e00ff */ /*03e0*/ IMAD R13, R13, R11, RZ ; /* 0x0000000b0d0d7224 */ /* 0x002fc800078e02ff */ /*03f0*/ IMAD.HI.U32 R11, R11, R13, R10 ; /* 0x0000000d0b0b7227 */ /* 0x000fcc00078e000a */ /*0400*/ IMAD.HI.U32 R11, R11, R22, RZ ; /* 0x000000160b0b7227 */ /* 0x000fc800078e00ff */ /*0410*/ IMAD.MOV R13, RZ, RZ, -R11 ; /* 0x000000ffff0d7224 */ /* 0x000fc800078e0a0b */ /*0420*/ IMAD R12, R17, R13, R22 ; /* 0x0000000d110c7224 */ /* 0x000fca00078e0216 */ /*0430*/ ISETP.GE.U32.AND P0, PT, R12, R17, PT ; /* 0x000000110c00720c */ /* 0x000fda0003f06070 */ /*0440*/ @P0 IMAD.IADD R12, R12, 0x1, -R17 ; /* 0x000000010c0c0824 */ /* 0x000fe200078e0a11 */ /*0450*/ @P0 IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b0810 */ /* 0x000fc80007ffe0ff */ /*0460*/ ISETP.GE.U32.AND P2, PT, R12, R17, PT ; /* 0x000000110c00720c */ /* 0x000fda0003f46070 */ /*0470*/ @P2 IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b2810 */ /* 0x000fe40007ffe0ff */ /*0480*/ @!P4 LOP3.LUT R11, RZ, R17, RZ, 0x33, !PT ; /* 0x00000011ff0bc212 */ /* 0x000fca00078e33ff */ /*0490*/ IMAD.MOV.U32 R22, RZ, RZ, R11 ; /* 0x000000ffff167224 */ /* 0x000fe400078e000b */ /*04a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*04b0*/ LDG.E R10, [R6.64+0x4] ; /* 0x00000408060a7981 */ /* 0x000ea2000c1e1900 */ /*04c0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ; /* 0x00000004ff0b7424 */ /* 0x000fc800078e00ff */ /*04d0*/ IMAD.WIDE R10, R10, R11, c[0x0][0x1a8] ; /* 0x00006a000a0a7625 */ /* 0x004fca00078e020b */ /*04e0*/ LDG.E R17, [R10.64] ; /* 0x000000080a117981 */ /* 0x000ea2000c1e1900 */ /*04f0*/ BSSY B0, 0x6d0 ; /* 0x000001d000007945 */ /* 0x000fe20003800000 */ /*0500*/ SHF.R.S32.HI R16, RZ, 0x1f, R17 ; /* 0x0000001fff107819 */ /* 0x004fc80000011411 */ /*0510*/ LOP3.LUT R8, R23, R16, RZ, 0xfc, !PT ; /* 0x0000001017087212 */ /* 0x000fc800078efcff */ /*0520*/ ISETP.NE.U32.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fda0003f05070 */ /*0530*/ @!P0 BRA 0x580 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*0540*/ IMAD.MOV.U32 R19, RZ, RZ, R23 ; /* 0x000000ffff137224 */ /* 0x000fe200078e0017 */ /*0550*/ MOV R8, 0x570 ; /* 0x0000057000087802 */ /* 0x000fe40000000f00 */ /*0560*/ CALL.REL.NOINC 0x1810 ; /* 0x000012a000007944 */ /* 0x000fea0003c00000 */ /*0570*/ BRA 0x6c0 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*0580*/ I2F.U32.RP R8, R17 ; /* 0x0000001100087306 */ /* 0x000e220000209000 */ /*0590*/ IMAD.MOV R13, RZ, RZ, -R17 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e0a11 */ /*05a0*/ ISETP.NE.U32.AND P4, PT, R17, RZ, PT ; /* 0x000000ff1100720c */ /* 0x000fe20003f85070 */ /*05b0*/ IMAD.MOV.U32 R23, RZ, RZ, RZ ; /* 0x000000ffff177224 */ /* 0x000fca00078e00ff */ /*05c0*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x001e240000001000 */ /*05d0*/ IADD3 R10, R8, 0xffffffe, RZ ; /* 0x0ffffffe080a7810 */ /* 0x001fcc0007ffe0ff */ /*05e0*/ F2I.FTZ.U32.TRUNC.NTZ R11, R10 ; /* 0x0000000a000b7305 */ /* 0x000064000021f000 */ /*05f0*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x001fe400078e00ff */ /*0600*/ IMAD R13, R13, R11, RZ ; /* 0x0000000b0d0d7224 */ /* 0x002fc800078e02ff */ /*0610*/ IMAD.HI.U32 R11, R11, R13, R10 ; /* 0x0000000d0b0b7227 */ /* 0x000fcc00078e000a */ /*0620*/ IMAD.HI.U32 R11, R11, R22, RZ ; /* 0x000000160b0b7227 */ /* 0x000fc800078e00ff */ /*0630*/ IMAD.MOV R13, RZ, RZ, -R11 ; /* 0x000000ffff0d7224 */ /* 0x000fc800078e0a0b */ /*0640*/ IMAD R22, R17, R13, R22 ; /* 0x0000000d11167224 */ /* 0x000fca00078e0216 */ /*0650*/ ISETP.GE.U32.AND P0, PT, R22, R17, PT ; /* 0x000000111600720c */ /* 0x000fda0003f06070 */ /*0660*/ @P0 IMAD.IADD R22, R22, 0x1, -R17 ; /* 0x0000000116160824 */ /* 0x000fe200078e0a11 */ /*0670*/ @P0 IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b0810 */ /* 0x000fc80007ffe0ff */ /*0680*/ ISETP.GE.U32.AND P2, PT, R22, R17, PT ; /* 0x000000111600720c */ /* 0x000fda0003f46070 */ /*0690*/ @P2 IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b2810 */ /* 0x000fe40007ffe0ff */ /*06a0*/ @!P4 LOP3.LUT R11, RZ, R17, RZ, 0x33, !PT ; /* 0x00000011ff0bc212 */ /* 0x000fc800078e33ff */ /*06b0*/ MOV R22, R11 ; /* 0x0000000b00167202 */ /* 0x000fe40000000f00 */ /*06c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*06d0*/ LDG.E R10, [R6.64+0x8] ; /* 0x00000808060a7981 */ /* 0x000ea2000c1e1900 */ /*06e0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ; /* 0x00000004ff0b7424 */ /* 0x000fc800078e00ff */ /*06f0*/ IMAD.WIDE R10, R10, R11, c[0x0][0x1a8] ; /* 0x00006a000a0a7625 */ /* 0x004fca00078e020b */ /*0700*/ LDG.E R17, [R10.64] ; /* 0x000000080a117981 */ /* 0x000ea2000c1e1900 */ /*0710*/ BSSY B0, 0x8f0 ; /* 0x000001d000007945 */ /* 0x000fe20003800000 */ /*0720*/ SHF.R.S32.HI R16, RZ, 0x1f, R17 ; /* 0x0000001fff107819 */ /* 0x004fc80000011411 */ /*0730*/ LOP3.LUT R8, R23, R16, RZ, 0xfc, !PT ; /* 0x0000001017087212 */ /* 0x000fc800078efcff */ /*0740*/ ISETP.NE.U32.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fda0003f05070 */ /*0750*/ @!P0 BRA 0x7a0 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*0760*/ IMAD.MOV.U32 R19, RZ, RZ, R23 ; /* 0x000000ffff137224 */ /* 0x000fe200078e0017 */ /*0770*/ MOV R8, 0x790 ; /* 0x0000079000087802 */ /* 0x000fe40000000f00 */ /*0780*/ CALL.REL.NOINC 0x1810 ; /* 0x0000108000007944 */ /* 0x000fea0003c00000 */ /*0790*/ BRA 0x8e0 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*07a0*/ I2F.U32.RP R8, R17 ; /* 0x0000001100087306 */ /* 0x000e220000209000 */ /*07b0*/ IMAD.MOV R13, RZ, RZ, -R17 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e0a11 */ /*07c0*/ ISETP.NE.U32.AND P4, PT, R17, RZ, PT ; /* 0x000000ff1100720c */ /* 0x000fe20003f85070 */ /*07d0*/ IMAD.MOV.U32 R23, RZ, RZ, RZ ; /* 0x000000ffff177224 */ /* 0x000fca00078e00ff */ /*07e0*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x001e240000001000 */ /*07f0*/ IADD3 R10, R8, 0xffffffe, RZ ; /* 0x0ffffffe080a7810 */ /* 0x001fcc0007ffe0ff */ /*0800*/ F2I.FTZ.U32.TRUNC.NTZ R11, R10 ; /* 0x0000000a000b7305 */ /* 0x000064000021f000 */ /*0810*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x001fe400078e00ff */ /*0820*/ IMAD R13, R13, R11, RZ ; /* 0x0000000b0d0d7224 */ /* 0x002fc800078e02ff */ /*0830*/ IMAD.HI.U32 R11, R11, R13, R10 ; /* 0x0000000d0b0b7227 */ /* 0x000fcc00078e000a */ /*0840*/ IMAD.HI.U32 R11, R11, R22, RZ ; /* 0x000000160b0b7227 */ /* 0x000fc800078e00ff */ /*0850*/ IMAD.MOV R13, RZ, RZ, -R11 ; /* 0x000000ffff0d7224 */ /* 0x000fc800078e0a0b */ /*0860*/ IMAD R22, R17, R13, R22 ; /* 0x0000000d11167224 */ /* 0x000fca00078e0216 */ /*0870*/ ISETP.GE.U32.AND P0, PT, R22, R17, PT ; /* 0x000000111600720c */ /* 0x000fda0003f06070 */ /*0880*/ @P0 IADD3 R22, -R17, R22, RZ ; /* 0x0000001611160210 */ /* 0x000fe40007ffe1ff */ /*0890*/ @P0 IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b0810 */ /* 0x000fe40007ffe0ff */ /*08a0*/ ISETP.GE.U32.AND P2, PT, R22, R17, PT ; /* 0x000000111600720c */ /* 0x000fda0003f46070 */ /*08b0*/ @P2 IADD3 R11, R11, 0x1, RZ ; /* 0x000000010b0b2810 */ /* 0x000fe40007ffe0ff */ /*08c0*/ @!P4 LOP3.LUT R11, RZ, R17, RZ, 0x33, !PT ; /* 0x00000011ff0bc212 */ /* 0x000fca00078e33ff */ /*08d0*/ IMAD.MOV.U32 R22, RZ, RZ, R11 ; /* 0x000000ffff167224 */ /* 0x000fe400078e000b */ /*08e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*08f0*/ LDG.E R10, [R6.64+0xc] ; /* 0x00000c08060a7981 */ /* 0x000ea2000c1e1900 */ /*0900*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ; /* 0x00000004ff0b7424 */ /* 0x000fc800078e00ff */ /*0910*/ IMAD.WIDE R10, R10, R11, c[0x0][0x1a8] ; /* 0x00006a000a0a7625 */ /* 0x004fca00078e020b */ /*0920*/ LDG.E R17, [R10.64] ; /* 0x000000080a117981 */ /* 0x000ea2000c1e1900 */ /*0930*/ BSSY B0, 0xb10 ; /* 0x000001d000007945 */ /* 0x000fe20003800000 */ /*0940*/ SHF.R.S32.HI R16, RZ, 0x1f, R17 ; /* 0x0000001fff107819 */ /* 0x004fc80000011411 */ /*0950*/ LOP3.LUT R8, R23, R16, RZ, 0xfc, !PT ; /* 0x0000001017087212 */ /* 0x000fc800078efcff */ /*0960*/ ISETP.NE.U32.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fda0003f05070 */ /*0970*/ @!P0 BRA 0x9c0 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*0980*/ IMAD.MOV.U32 R19, RZ, RZ, R23 ; /* 0x000000ffff137224 */ /* 0x000fe200078e0017 */ /*0990*/ MOV R8, 0x9b0 ; /* 0x000009b000087802 */ /* 0x000fe40000000f00 */ /*09a0*/ CALL.REL.NOINC 0x1810 ; /* 0x00000e6000007944 */ /* 0x000fea0003c00000 */ /*09b0*/ BRA 0xb00 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*09c0*/ I2F.U32.RP R8, R17 ; /* 0x0000001100087306 */ /* 0x000e220000209000 */ /*09d0*/ IMAD.MOV R11, RZ, RZ, -R17 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e0a11 */ /*09e0*/ ISETP.NE.U32.AND P4, PT, R17, RZ, PT ; /* 0x000000ff1100720c */ /* 0x000fe20003f85070 */ /*09f0*/ IMAD.MOV.U32 R23, RZ, RZ, RZ ; /* 0x000000ffff177224 */ /* 0x000fca00078e00ff */ /*0a00*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x001e240000001000 */ /*0a10*/ IADD3 R6, R8, 0xffffffe, RZ ; /* 0x0ffffffe08067810 */ /* 0x001fcc0007ffe0ff */ /*0a20*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */ /* 0x000064000021f000 */ /*0a30*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x001fe400078e00ff */ /*0a40*/ IMAD R11, R11, R7, RZ ; /* 0x000000070b0b7224 */ /* 0x002fc800078e02ff */ /*0a50*/ IMAD.HI.U32 R7, R7, R11, R6 ; /* 0x0000000b07077227 */ /* 0x000fcc00078e0006 */ /*0a60*/ IMAD.HI.U32 R7, R7, R22, RZ ; /* 0x0000001607077227 */ /* 0x000fca00078e00ff */ /*0a70*/ IADD3 R11, -R7, RZ, RZ ; /* 0x000000ff070b7210 */ /* 0x000fca0007ffe1ff */ /*0a80*/ IMAD R22, R17, R11, R22 ; /* 0x0000000b11167224 */ /* 0x000fca00078e0216 */ /*0a90*/ ISETP.GE.U32.AND P0, PT, R22, R17, PT ; /* 0x000000111600720c */ /* 0x000fda0003f06070 */ /*0aa0*/ @P0 IMAD.IADD R22, R22, 0x1, -R17 ; /* 0x0000000116160824 */ /* 0x000fe200078e0a11 */ /*0ab0*/ @P0 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107070810 */ /* 0x000fc80007ffe0ff */ /*0ac0*/ ISETP.GE.U32.AND P2, PT, R22, R17, PT ; /* 0x000000111600720c */ /* 0x000fda0003f46070 */ /*0ad0*/ @P2 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107072810 */ /* 0x000fe40007ffe0ff */ /*0ae0*/ @!P4 LOP3.LUT R7, RZ, R17, RZ, 0x33, !PT ; /* 0x00000011ff07c212 */ /* 0x000fca00078e33ff */ /*0af0*/ IMAD.MOV.U32 R22, RZ, RZ, R7 ; /* 0x000000ffff167224 */ /* 0x000fe400078e0007 */ /*0b00*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0b10*/ IADD3 R18, R18, 0x4, RZ ; /* 0x0000000412127810 */ /* 0x000fe20007ffe0ff */ /*0b20*/ @P3 BRA 0x260 ; /* 0xfffff73000003947 */ /* 0x000fea000383ffff */ /*0b30*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*0b40*/ @!P0 BRA 0xdc0 ; /* 0x0000027000008947 */ /* 0x000fea0003800000 */ /*0b50*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ; /* 0x00000004ff0b7424 */ /* 0x000fc800078e00ff */ /*0b60*/ IMAD.WIDE R6, R18, R11, c[0x0][0x170] ; /* 0x00005c0012067625 */ /* 0x000fcc00078e020b */ /*0b70*/ LDG.E R6, [R6.64] ; /* 0x0000000806067981 */ /* 0x000ea4000c1e1900 */ /*0b80*/ IMAD.WIDE R10, R6, R11, c[0x0][0x1a8] ; /* 0x00006a00060a7625 */ /* 0x004fca00078e020b */ /*0b90*/ LDG.E R17, [R10.64] ; /* 0x000000080a117981 */ /* 0x000ea2000c1e1900 */ /*0ba0*/ BSSY B0, 0xd80 ; /* 0x000001d000007945 */ /* 0x000fe20003800000 */ /*0bb0*/ SHF.R.S32.HI R16, RZ, 0x1f, R17 ; /* 0x0000001fff107819 */ /* 0x004fc80000011411 */ /*0bc0*/ LOP3.LUT R8, R23, R16, RZ, 0xfc, !PT ; /* 0x0000001017087212 */ /* 0x000fc800078efcff */ /*0bd0*/ ISETP.NE.U32.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fda0003f05070 */ /*0be0*/ @!P0 BRA 0xc30 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*0bf0*/ IMAD.MOV.U32 R19, RZ, RZ, R23 ; /* 0x000000ffff137224 */ /* 0x000fe200078e0017 */ /*0c00*/ MOV R8, 0xc20 ; /* 0x00000c2000087802 */ /* 0x000fe40000000f00 */ /*0c10*/ CALL.REL.NOINC 0x1810 ; /* 0x00000bf000007944 */ /* 0x000fea0003c00000 */ /*0c20*/ BRA 0xd70 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*0c30*/ I2F.U32.RP R8, R17 ; /* 0x0000001100087306 */ /* 0x000e220000209000 */ /*0c40*/ IMAD.MOV R11, RZ, RZ, -R17 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e0a11 */ /*0c50*/ ISETP.NE.U32.AND P3, PT, R17, RZ, PT ; /* 0x000000ff1100720c */ /* 0x000fe20003f65070 */ /*0c60*/ IMAD.MOV.U32 R23, RZ, RZ, RZ ; /* 0x000000ffff177224 */ /* 0x000fca00078e00ff */ /*0c70*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x001e240000001000 */ /*0c80*/ IADD3 R6, R8, 0xffffffe, RZ ; /* 0x0ffffffe08067810 */ /* 0x001fcc0007ffe0ff */ /*0c90*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */ /* 0x000064000021f000 */ /*0ca0*/ MOV R6, RZ ; /* 0x000000ff00067202 */ /* 0x001fe20000000f00 */ /*0cb0*/ IMAD R11, R11, R7, RZ ; /* 0x000000070b0b7224 */ /* 0x002fc800078e02ff */ /*0cc0*/ IMAD.HI.U32 R7, R7, R11, R6 ; /* 0x0000000b07077227 */ /* 0x000fcc00078e0006 */ /*0cd0*/ IMAD.HI.U32 R7, R7, R22, RZ ; /* 0x0000001607077227 */ /* 0x000fc800078e00ff */ /*0ce0*/ IMAD.MOV R11, RZ, RZ, -R7 ; /* 0x000000ffff0b7224 */ /* 0x000fc800078e0a07 */ /*0cf0*/ IMAD R10, R17, R11, R22 ; /* 0x0000000b110a7224 */ /* 0x000fca00078e0216 */ /*0d00*/ ISETP.GE.U32.AND P0, PT, R10, R17, PT ; /* 0x000000110a00720c */ /* 0x000fda0003f06070 */ /*0d10*/ @P0 IMAD.IADD R10, R10, 0x1, -R17 ; /* 0x000000010a0a0824 */ /* 0x000fe200078e0a11 */ /*0d20*/ @P0 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107070810 */ /* 0x000fc80007ffe0ff */ /*0d30*/ ISETP.GE.U32.AND P2, PT, R10, R17, PT ; /* 0x000000110a00720c */ /* 0x000fda0003f46070 */ /*0d40*/ @P2 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107072810 */ /* 0x000fe40007ffe0ff */ /*0d50*/ @!P3 LOP3.LUT R7, RZ, R17, RZ, 0x33, !PT ; /* 0x00000011ff07b212 */ /* 0x000fca00078e33ff */ /*0d60*/ IMAD.MOV.U32 R22, RZ, RZ, R7 ; /* 0x000000ffff167224 */ /* 0x000fe400078e0007 */ /*0d70*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0d80*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */ /* 0x000fe40007ffe0ff */ /*0d90*/ IADD3 R18, R18, 0x1, RZ ; /* 0x0000000112127810 */ /* 0x000fe40007ffe0ff */ /*0da0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*0db0*/ @P0 BRA 0xb50 ; /* 0xfffffd9000000947 */ /* 0x000fea000383ffff */ /*0dc0*/ ISETP.NE.U32.AND P0, PT, R22, RZ, PT ; /* 0x000000ff1600720c */ /* 0x000fc80003f05070 */ /*0dd0*/ ISETP.NE.AND.EX P0, PT, R23, RZ, PT, P0 ; /* 0x000000ff1700720c */ /* 0x000fda0003f05300 */ /*0de0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0df0*/ SHF.R.S32.HI R11, RZ, 0x1f, R9 ; /* 0x0000001fff0b7819 */ /* 0x000fe20000011409 */ /*0e00*/ IMAD R0, R3, R9.reuse, RZ ; /* 0x0000000903007224 */ /* 0x080fe400078e02ff */ /*0e10*/ IMAD.WIDE.U32 R6, R2, R9, RZ ; /* 0x0000000902067225 */ /* 0x000fc800078e00ff */ /*0e20*/ IMAD R11, R2, R11, R0 ; /* 0x0000000b020b7224 */ /* 0x000fc800078e0200 */ /*0e30*/ IMAD.IADD R0, R7, 0x1, R11 ; /* 0x0000000107007824 */ /* 0x000fe200078e020b */ /*0e40*/ @!P1 BRA 0x1420 ; /* 0x000005d000009947 */ /* 0x000fea0003800000 */ /*0e50*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */ /* 0x000fe200078e00ff */ /*0e60*/ MOV R10, R2 ; /* 0x00000002000a7202 */ /* 0x000fe20000000f00 */ /*0e70*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e0003 */ /*0e80*/ IMAD.MOV.U32 R12, RZ, RZ, 0x4 ; /* 0x00000004ff0c7424 */ /* 0x000fc800078e00ff */ /*0e90*/ IMAD.WIDE R16, R9, R12, c[0x0][0x170] ; /* 0x00005c0009107625 */ /* 0x000fcc00078e020c */ /*0ea0*/ LDG.E R16, [R16.64] ; /* 0x0000000810107981 */ /* 0x000ea2000c1e1900 */ /*0eb0*/ IMAD.MOV.U32 R15, RZ, RZ, 0x8 ; /* 0x00000008ff0f7424 */ /* 0x000fe400078e00ff */ /*0ec0*/ IMAD.WIDE R12, R16, R12, c[0x0][0x1a8] ; /* 0x00006a00100c7625 */ /* 0x004fca00078e020c */ /*0ed0*/ LDG.E R23, [R12.64] ; /* 0x000000080c177981 */ /* 0x000ea2000c1e1900 */ /*0ee0*/ IMAD.WIDE R14, R16, R15, c[0x0][0x1a0] ; /* 0x00006800100e7625 */ /* 0x000fcc00078e020f */ /*0ef0*/ LDG.E.64 R14, [R14.64] ; /* 0x000000080e0e7981 */ /* 0x000f62000c1e1b00 */ /*0f00*/ BSSY B0, 0x1110 ; /* 0x0000020000007945 */ /* 0x000fe20003800000 */ /*0f10*/ SHF.R.S32.HI R19, RZ, 0x1f, R9 ; /* 0x0000001fff137819 */ /* 0x000fe40000011409 */ /*0f20*/ SHF.R.S32.HI R21, RZ, 0x1f, R23 ; /* 0x0000001fff157819 */ /* 0x004fc80000011417 */ /*0f30*/ LOP3.LUT R8, R11, R21, RZ, 0xfc, !PT ; /* 0x000000150b087212 */ /* 0x000fc800078efcff */ /*0f40*/ ISETP.NE.U32.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fda0003f05070 */ /*0f50*/ @!P0 BRA 0xfd0 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*0f60*/ IMAD.MOV.U32 R20, RZ, RZ, R10 ; /* 0x000000ffff147224 */ /* 0x000fe200078e000a */ /*0f70*/ MOV R8, 0xfa0 ; /* 0x00000fa000087802 */ /* 0x000fe20000000f00 */ /*0f80*/ IMAD.MOV.U32 R18, RZ, RZ, R11 ; /* 0x000000ffff127224 */ /* 0x000fe400078e000b */ /*0f90*/ CALL.REL.NOINC 0x1d50 ; /* 0x00000db000007944 */ /* 0x020fea0003c00000 */ /*0fa0*/ IMAD.MOV.U32 R16, RZ, RZ, R18 ; /* 0x000000ffff107224 */ /* 0x000fe200078e0012 */ /*0fb0*/ MOV R17, R21 ; /* 0x0000001500117202 */ /* 0x000fe20000000f00 */ /*0fc0*/ BRA 0x1100 ; /* 0x0000013000007947 */ /* 0x000fea0003800000 */ /*0fd0*/ I2F.U32.RP R8, R23 ; /* 0x0000001700087306 */ /* 0x000e220000209000 */ /*0fe0*/ IMAD.MOV R21, RZ, RZ, -R23 ; /* 0x000000ffff157224 */ /* 0x000fe200078e0a17 */ /*0ff0*/ ISETP.NE.U32.AND P1, PT, R23, RZ, PT ; /* 0x000000ff1700720c */ /* 0x000fcc0003f25070 */ /*1000*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x001e240000001000 */ /*1010*/ IADD3 R16, R8, 0xffffffe, RZ ; /* 0x0ffffffe08107810 */ /* 0x001fcc0007ffe0ff */ /*1020*/ F2I.FTZ.U32.TRUNC.NTZ R17, R16 ; /* 0x0000001000117305 */ /* 0x000064000021f000 */ /*1030*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */ /* 0x001fe400078e00ff */ /*1040*/ IMAD R21, R21, R17, RZ ; /* 0x0000001115157224 */ /* 0x002fc800078e02ff */ /*1050*/ IMAD.HI.U32 R17, R17, R21, R16 ; /* 0x0000001511117227 */ /* 0x000fcc00078e0010 */ /*1060*/ IMAD.HI.U32 R17, R17, R10, RZ ; /* 0x0000000a11117227 */ /* 0x000fc800078e00ff */ /*1070*/ IMAD.MOV R17, RZ, RZ, -R17 ; /* 0x000000ffff117224 */ /* 0x000fc800078e0a11 */ /*1080*/ IMAD R18, R23, R17, R10 ; /* 0x0000001117127224 */ /* 0x000fe200078e020a */ /*1090*/ MOV R17, RZ ; /* 0x000000ff00117202 */ /* 0x000fc80000000f00 */ /*10a0*/ ISETP.GE.U32.AND P0, PT, R18, R23, PT ; /* 0x000000171200720c */ /* 0x000fda0003f06070 */ /*10b0*/ @P0 IMAD.IADD R18, R18, 0x1, -R23 ; /* 0x0000000112120824 */ /* 0x000fca00078e0a17 */ /*10c0*/ ISETP.GE.U32.AND P0, PT, R18, R23, PT ; /* 0x000000171200720c */ /* 0x000fda0003f06070 */ /*10d0*/ @P0 IMAD.IADD R18, R18, 0x1, -R23 ; /* 0x0000000112120824 */ /* 0x000fe200078e0a17 */ /*10e0*/ @!P1 LOP3.LUT R18, RZ, R23, RZ, 0x33, !PT ; /* 0x00000017ff129212 */ /* 0x000fca00078e33ff */ /*10f0*/ IMAD.MOV.U32 R16, RZ, RZ, R18 ; /* 0x000000ffff107224 */ /* 0x000fe400078e0012 */ /*1100*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1110*/ LEA R14, P0, R16, R14, 0x2 ; /* 0x0000000e100e7211 */ /* 0x020fc800078010ff */ /*1120*/ LEA.HI.X R15, R16, R15, R17, 0x2, P0 ; /* 0x0000000f100f7211 */ /* 0x000fcc00000f1411 */ /*1130*/ LDG.E R15, [R14.64] ; /* 0x000000080e0f7981 */ /* 0x000ea2000c1e1900 */ /*1140*/ IADD3 R8, P0, R9, R6, RZ ; /* 0x0000000609087210 */ /* 0x000fca0007f1e0ff */ /*1150*/ IMAD.X R19, R19, 0x1, R0, P0 ; /* 0x0000000113137824 */ /* 0x000fe200000e0600 */ /*1160*/ LEA R16, P0, R8, c[0x0][0x160], 0x2 ; /* 0x0000580008107a11 */ /* 0x000fc800078010ff */ /*1170*/ LEA.HI.X R17, R8, c[0x0][0x164], R19, 0x2, P0 ; /* 0x0000590008117a11 */ /* 0x000fca00000f1413 */ /*1180*/ STG.E [R16.64], R15 ; /* 0x0000000f10007986 */ /* 0x0041e8000c101908 */ /*1190*/ LDG.E R21, [R12.64] ; /* 0x000000080c157981 */ /* 0x000ea2000c1e1900 */ /*11a0*/ BSSY B0, 0x13d0 ; /* 0x0000022000007945 */ /* 0x000fe20003800000 */ /*11b0*/ SHF.R.S32.HI R23, RZ, 0x1f, R21 ; /* 0x0000001fff177819 */ /* 0x004fc80000011415 */ /*11c0*/ LOP3.LUT R8, R11, R23, RZ, 0xfc, !PT ; /* 0x000000170b087212 */ /* 0x000fc800078efcff */ /*11d0*/ ISETP.NE.U32.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fda0003f05070 */ /*11e0*/ @!P0 BRA 0x1280 ; /* 0x0000009000008947 */ /* 0x000fea0003800000 */ /*11f0*/ IMAD.MOV.U32 R22, RZ, RZ, R10 ; /* 0x000000ffff167224 */ /* 0x001fe200078e000a */ /*1200*/ MOV R8, 0x1250 ; /* 0x0000125000087802 */ /* 0x000fe20000000f00 */ /*1210*/ IMAD.MOV.U32 R19, RZ, RZ, R11 ; /* 0x000000ffff137224 */ /* 0x000fe400078e000b */ /*1220*/ IMAD.MOV.U32 R17, RZ, RZ, R21 ; /* 0x000000ffff117224 */ /* 0x000fe400078e0015 */ /*1230*/ IMAD.MOV.U32 R16, RZ, RZ, R23 ; /* 0x000000ffff107224 */ /* 0x000fe400078e0017 */ /*1240*/ CALL.REL.NOINC 0x1810 ; /* 0x000005c000007944 */ /* 0x000fea0003c00000 */ /*1250*/ IMAD.MOV.U32 R10, RZ, RZ, R22 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0016 */ /*1260*/ MOV R11, R23 ; /* 0x00000017000b7202 */ /* 0x000fe20000000f00 */ /*1270*/ BRA 0x13c0 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*1280*/ I2F.U32.RP R8, R21 ; /* 0x0000001500087306 */ /* 0x001e220000209000 */ /*1290*/ IMAD.MOV R11, RZ, RZ, -R21 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e0a15 */ /*12a0*/ ISETP.NE.U32.AND P2, PT, R21, RZ, PT ; /* 0x000000ff1500720c */ /* 0x000fcc0003f45070 */ /*12b0*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x001e240000001000 */ /*12c0*/ IADD3 R12, R8, 0xffffffe, RZ ; /* 0x0ffffffe080c7810 */ /* 0x001fcc0007ffe0ff */ /*12d0*/ F2I.FTZ.U32.TRUNC.NTZ R13, R12 ; /* 0x0000000c000d7305 */ /* 0x000064000021f000 */ /*12e0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x001fe400078e00ff */ /*12f0*/ IMAD R11, R11, R13, RZ ; /* 0x0000000d0b0b7224 */ /* 0x002fc800078e02ff */ /*1300*/ IMAD.HI.U32 R13, R13, R11, R12 ; /* 0x0000000b0d0d7227 */ /* 0x000fcc00078e000c */ /*1310*/ IMAD.HI.U32 R13, R13, R10, RZ ; /* 0x0000000a0d0d7227 */ /* 0x000fc800078e00ff */ /*1320*/ IMAD.MOV R11, RZ, RZ, -R13 ; /* 0x000000ffff0b7224 */ /* 0x000fc800078e0a0d */ /*1330*/ IMAD R10, R21, R11, R10 ; /* 0x0000000b150a7224 */ /* 0x000fe400078e020a */ /*1340*/ IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b7224 */ /* 0x000fc600078e00ff */ /*1350*/ ISETP.GE.U32.AND P0, PT, R10, R21, PT ; /* 0x000000150a00720c */ /* 0x000fda0003f06070 */ /*1360*/ @P0 IMAD.IADD R10, R10, 0x1, -R21 ; /* 0x000000010a0a0824 */ /* 0x000fe200078e0a15 */ /*1370*/ @P0 IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d0810 */ /* 0x000fc80007ffe0ff */ /*1380*/ ISETP.GE.U32.AND P1, PT, R10, R21, PT ; /* 0x000000150a00720c */ /* 0x000fda0003f26070 */ /*1390*/ @P1 IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d1810 */ /* 0x000fe40007ffe0ff */ /*13a0*/ @!P2 LOP3.LUT R13, RZ, R21, RZ, 0x33, !PT ; /* 0x00000015ff0da212 */ /* 0x000fca00078e33ff */ /*13b0*/ IMAD.MOV.U32 R10, RZ, RZ, R13 ; /* 0x000000ffff0a7224 */ /* 0x000fe400078e000d */ /*13c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*13d0*/ LDG.E R8, [R4.64] ; /* 0x0000000804087981 */ /* 0x000ea2000c1e1900 */ /*13e0*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */ /* 0x000fc80007ffe0ff */ /*13f0*/ ISETP.GE.AND P0, PT, R9, R8, PT ; /* 0x000000080900720c */ /* 0x004fda0003f06270 */ /*1400*/ @!P0 BRA 0xe80 ; /* 0xfffffa7000008947 */ /* 0x000fea000383ffff */ /*1410*/ MOV R9, R8 ; /* 0x0000000800097202 */ /* 0x000fc80000000f00 */ /*1420*/ ISETP.GE.AND P0, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f06270 */ /*1430*/ BSSY B0, 0x17c0 ; /* 0x0000038000007945 */ /* 0x000fd80003800000 */ /*1440*/ @!P0 BRA 0x17b0 ; /* 0x0000036000008947 */ /* 0x000fea0003800000 */ /*1450*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x188] ; /* 0x00006200ff047624 */ /* 0x000fe400078e00ff */ /*1460*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x18c] ; /* 0x00006300ff057624 */ /* 0x000fca00078e00ff */ /*1470*/ LDG.E R8, [R4.64] ; /* 0x0000000804087981 */ /* 0x000162000c1e1900 */ /*1480*/ IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b7224 */ /* 0x000fc600078e00ff */ /*1490*/ IMAD.MOV.U32 R15, RZ, RZ, 0x4 ; /* 0x00000004ff0f7424 */ /* 0x000fc800078e00ff */ /*14a0*/ IMAD.WIDE R4, R11, R15, c[0x0][0x188] ; /* 0x000062000b047625 */ /* 0x001fca00078e020f */ /*14b0*/ LDG.E R21, [R4.64+0x4] ; /* 0x0000040804157981 */ /* 0x000ea2000c1e1900 */ /*14c0*/ IADD3 R13, P0, R11.reuse, R6, RZ ; /* 0x000000060b0d7210 */ /* 0x040fe20007f1e0ff */ /*14d0*/ BSSY B1, 0x1790 ; /* 0x000002b000017945 */ /* 0x000fe20003800000 */ /*14e0*/ IADD3 R10, R11.reuse, 0x1, RZ ; /* 0x000000010b0a7810 */ /* 0x040fe40007ffe0ff */ /*14f0*/ LEA.HI.X.SX32 R14, R11, R0, 0x1, P0 ; /* 0x000000000b0e7211 */ /* 0x000fe400000f0eff */ /*1500*/ LEA R12, P2, R13.reuse, c[0x0][0x160], 0x2 ; /* 0x000058000d0c7a11 */ /* 0x040fe200078410ff */ /*1510*/ IMAD.MOV.U32 R11, RZ, RZ, R10 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e000a */ /*1520*/ ISETP.GE.AND P0, PT, R10, R9, PT ; /* 0x000000090a00720c */ /* 0x000fe40003f06270 */ /*1530*/ LEA.HI.X R13, R13, c[0x0][0x164], R14, 0x2, P2 ; /* 0x000059000d0d7a11 */ /* 0x000fc400010f140e */ /*1540*/ ISETP.GE.AND P1, PT, R8, R21, PT ; /* 0x000000150800720c */ /* 0x024fda0003f26270 */ /*1550*/ @P1 BRA 0x1780 ; /* 0x0000022000001947 */ /* 0x000fea0003800000 */ /*1560*/ LDG.E R4, [R12.64] ; /* 0x000000080c047981 */ /* 0x000ea4000c1e1900 */ /*1570*/ IMAD.WIDE R4, R4, R15, c[0x0][0x190] ; /* 0x0000640004047625 */ /* 0x004fca00078e020f */ /*1580*/ LDG.E R19, [R4.64+0x4] ; /* 0x0000040804137981 */ /* 0x000ea8000c1e1900 */ /*1590*/ LDG.E R18, [R4.64] ; /* 0x0000000804127981 */ /* 0x000ea4000c1e1900 */ /*15a0*/ ISETP.GE.AND P1, PT, R18, R19, PT ; /* 0x000000131200720c */ /* 0x004fda0003f26270 */ /*15b0*/ @P1 EXIT ; /* 0x000000000000194d */ /* 0x000fea0003800000 */ /*15c0*/ IMAD.WIDE R4, R18, R15, c[0x0][0x198] ; /* 0x0000660012047625 */ /* 0x000fc800078e020f */ /*15d0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ; /* 0x00000004ff0d7424 */ /* 0x000fc800078e00ff */ /*15e0*/ IMAD.WIDE R12, R8, R13, c[0x0][0x180] ; /* 0x00006000080c7625 */ /* 0x000fcc00078e020d */ /*15f0*/ LDG.E R13, [R12.64] ; /* 0x000000080c0d7981 */ /* 0x000ea4000c1e1900 */ /*1600*/ IADD3 R10, P1, R13, R6, RZ ; /* 0x000000060d0a7210 */ /* 0x004fc80007f3e0ff */ /*1610*/ LEA.HI.X.SX32 R15, R13, R0, 0x1, P1 ; /* 0x000000000d0f7211 */ /* 0x000fe400008f0eff */ /*1620*/ LEA R14, P1, R10, c[0x0][0x160], 0x2 ; /* 0x000058000a0e7a11 */ /* 0x001fc800078210ff */ /*1630*/ LEA.HI.X R15, R10, c[0x0][0x164], R15, 0x2, P1 ; /* 0x000059000a0f7a11 */ /* 0x000fcc00008f140f */ /*1640*/ LDG.E R15, [R14.64] ; /* 0x000000080e0f7981 */ /* 0x000162000c1e1900 */ /*1650*/ IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108087810 */ /* 0x000fe20007ffe0ff */ /*1660*/ BSSY B2, 0x1770 ; /* 0x0000010000027945 */ /* 0x000fe20003800000 */ /*1670*/ MOV R16, R4 ; /* 0x0000000400107202 */ /* 0x000fe20000000f00 */ /*1680*/ IMAD.MOV.U32 R17, RZ, RZ, R5 ; /* 0x000000ffff117224 */ /* 0x000fe200078e0005 */ /*1690*/ ISETP.GE.AND P3, PT, R8, R21, PT ; /* 0x000000150800720c */ /* 0x000fe20003f66270 */ /*16a0*/ IMAD.MOV.U32 R10, RZ, RZ, R18 ; /* 0x000000ffff0a7224 */ /* 0x000fe400078e0012 */ /*16b0*/ IMAD.MOV.U32 R12, RZ, RZ, R16 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e0010 */ /*16c0*/ IMAD.MOV.U32 R13, RZ, RZ, R17 ; /* 0x000000ffff0d7224 */ /* 0x000fca00078e0011 */ /*16d0*/ LDG.E R12, [R12.64] ; /* 0x000000080c0c7981 */ /* 0x000ea4000c1e1900 */ /*16e0*/ ISETP.NE.AND P1, PT, R15, R12, PT ; /* 0x0000000c0f00720c */ /* 0x024fda0003f25270 */ /*16f0*/ @!P1 BRA 0x1760 ; /* 0x0000006000009947 */ /* 0x000fea0003800000 */ /*1700*/ IADD3 R10, R10, 0x1, RZ ; /* 0x000000010a0a7810 */ /* 0x000fe40007ffe0ff */ /*1710*/ IADD3 R16, P2, R16, 0x4, RZ ; /* 0x0000000410107810 */ /* 0x000fe40007f5e0ff */ /*1720*/ ISETP.GE.AND P1, PT, R10, R19, PT ; /* 0x000000130a00720c */ /* 0x000fc60003f26270 */ /*1730*/ IMAD.X R17, RZ, RZ, R17, P2 ; /* 0x000000ffff117224 */ /* 0x000fd400010e0611 */ /*1740*/ @!P1 BRA 0x16b0 ; /* 0xffffff6000009947 */ /* 0x000fea000383ffff */ /*1750*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1760*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1770*/ @!P3 BRA 0x15d0 ; /* 0xfffffe500000b947 */ /* 0x000fea000383ffff */ /*1780*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1790*/ MOV R8, R21 ; /* 0x0000001500087202 */ /* 0x000fe20000000f00 */ /*17a0*/ @!P0 BRA 0x1490 ; /* 0xfffffce000008947 */ /* 0x000fea000383ffff */ /*17b0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*17c0*/ LEA R4, P0, R2, c[0x0][0x168], 0x2 ; /* 0x00005a0002047a11 */ /* 0x000fc800078010ff */ /*17d0*/ LEA.HI.X R5, R2, c[0x0][0x16c], R3, 0x2, P0 ; /* 0x00005b0002057a11 */ /* 0x000fe200000f1403 */ /*17e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x1 ; /* 0x00000001ff037424 */ /* 0x000fca00078e00ff */ /*17f0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x000fe2000c101908 */ /*1800*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1810*/ IADD3 R12, P2, RZ, -R17.reuse, RZ ; /* 0x80000011ff0c7210 */ /* 0x080fe40007f5e0ff */ /*1820*/ ISETP.GE.AND P0, PT, R16, RZ, PT ; /* 0x000000ff1000720c */ /* 0x000fe40003f06270 */ /*1830*/ ISETP.GE.AND P5, PT, R19, RZ, PT ; /* 0x000000ff1300720c */ /* 0x000fe20003fa6270 */ /*1840*/ IMAD.X R11, RZ, RZ, ~R16, P2 ; /* 0x000000ffff0b7224 */ /* 0x000fe200010e0e10 */ /*1850*/ SEL R12, R12, R17, !P0 ; /* 0x000000110c0c7207 */ /* 0x000fc80004000000 */ /*1860*/ SEL R13, R11, R16, !P0 ; /* 0x000000100b0d7207 */ /* 0x000fc80004000000 */ /*1870*/ I2F.U64.RP R21, R12 ; /* 0x0000000c00157312 */ /* 0x000e300000309000 */ /*1880*/ MUFU.RCP R21, R21 ; /* 0x0000001500157308 */ /* 0x001e240000001000 */ /*1890*/ IADD3 R14, R21, 0x1ffffffe, RZ ; /* 0x1ffffffe150e7810 */ /* 0x001fcc0007ffe0ff */ /*18a0*/ F2I.U64.TRUNC R14, R14 ; /* 0x0000000e000e7311 */ /* 0x000e24000020d800 */ /*18b0*/ IMAD.WIDE.U32 R10, R14, R12, RZ ; /* 0x0000000c0e0a7225 */ /* 0x001fc800078e00ff */ /*18c0*/ IMAD R11, R14, R13, R11 ; /* 0x0000000d0e0b7224 */ /* 0x000fe200078e020b */ /*18d0*/ IADD3 R23, P0, RZ, -R10, RZ ; /* 0x8000000aff177210 */ /* 0x000fc60007f1e0ff */ /*18e0*/ IMAD R11, R15, R12, R11 ; /* 0x0000000c0f0b7224 */ /* 0x000fe400078e020b */ /*18f0*/ IMAD.HI.U32 R10, R14, R23, RZ ; /* 0x000000170e0a7227 */ /* 0x000fc800078e00ff */ /*1900*/ IMAD.X R25, RZ, RZ, ~R11, P0 ; /* 0x000000ffff197224 */ /* 0x000fe400000e0e0b */ /*1910*/ IMAD.MOV.U32 R11, RZ, RZ, R14 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e000e */ /*1920*/ IMAD R27, R15, R25.reuse, RZ ; /* 0x000000190f1b7224 */ /* 0x080fe400078e02ff */ /*1930*/ IMAD.WIDE.U32 R10, P0, R14, R25, R10 ; /* 0x000000190e0a7225 */ /* 0x000fc8000780000a */ /*1940*/ IMAD.HI.U32 R21, R15, R25, RZ ; /* 0x000000190f157227 */ /* 0x000fc800078e00ff */ /*1950*/ IMAD.HI.U32 R10, P2, R15, R23, R10 ; /* 0x000000170f0a7227 */ /* 0x000fc8000784000a */ /*1960*/ IMAD.X R21, R21, 0x1, R15, P0 ; /* 0x0000000115157824 */ /* 0x000fe200000e060f */ /*1970*/ IADD3 R11, P4, R27, R10, RZ ; /* 0x0000000a1b0b7210 */ /* 0x000fc80007f9e0ff */ /*1980*/ IADD3.X R21, RZ, RZ, R21, P4, P2 ; /* 0x000000ffff157210 */ /* 0x000fe200027e4415 */ /*1990*/ IMAD.WIDE.U32 R14, R11, R12, RZ ; /* 0x0000000c0b0e7225 */ /* 0x000fc800078e00ff */ /*19a0*/ IMAD R10, R11, R13, R15 ; /* 0x0000000d0b0a7224 */ /* 0x000fe200078e020f */ /*19b0*/ IADD3 R23, P0, RZ, -R14, RZ ; /* 0x8000000eff177210 */ /* 0x000fe40007f1e0ff */ /*19c0*/ IADD3 R15, P6, RZ, -R22, RZ ; /* 0x80000016ff0f7210 */ /* 0x000fe20007fde0ff */ /*19d0*/ IMAD R14, R21, R12, R10 ; /* 0x0000000c150e7224 */ /* 0x000fe400078e020a */ /*19e0*/ IMAD.HI.U32 R10, R11, R23, RZ ; /* 0x000000170b0a7227 */ /* 0x000fe200078e00ff */ /*19f0*/ SEL R15, R15, R22, !P5 ; /* 0x000000160f0f7207 */ /* 0x000fe40006800000 */ /*1a00*/ IADD3.X R14, RZ, ~R14, RZ, P0, !PT ; /* 0x8000000eff0e7210 */ /* 0x000fe200007fe4ff */ /*1a10*/ IMAD.X R22, RZ, RZ, ~R19, P6 ; /* 0x000000ffff167224 */ /* 0x000fc800030e0e13 */ /*1a20*/ IMAD.WIDE.U32 R10, P0, R11, R14, R10 ; /* 0x0000000e0b0a7225 */ /* 0x000fc8000780000a */ /*1a30*/ IMAD.HI.U32 R24, R21, R14, RZ ; /* 0x0000000e15187227 */ /* 0x000fc800078e00ff */ /*1a40*/ IMAD.HI.U32 R10, P2, R21, R23, R10 ; /* 0x00000017150a7227 */ /* 0x000fc8000784000a */ /*1a50*/ IMAD R11, R21, R14, RZ ; /* 0x0000000e150b7224 */ /* 0x000fca00078e02ff */ /*1a60*/ IADD3 R14, P4, R11, R10, RZ ; /* 0x0000000a0b0e7210 */ /* 0x000fe20007f9e0ff */ /*1a70*/ IMAD.X R11, R24, 0x1, R21, P0 ; /* 0x00000001180b7824 */ /* 0x000fe200000e0615 */ /*1a80*/ SEL R21, R22, R19.reuse, !P5 ; /* 0x0000001316157207 */ /* 0x080fe40006800000 */ /*1a90*/ LOP3.LUT R19, R16, R19, RZ, 0x3c, !PT ; /* 0x0000001310137212 */ /* 0x000fe200078e3cff */ /*1aa0*/ IMAD.HI.U32 R10, R14, R15, RZ ; /* 0x0000000f0e0a7227 */ /* 0x000fe200078e00ff */ /*1ab0*/ IADD3.X R22, RZ, RZ, R11, P4, P2 ; /* 0x000000ffff167210 */ /* 0x000fc600027e440b */ /*1ac0*/ IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e00ff */ /*1ad0*/ IMAD R23, R22, R21.reuse, RZ ; /* 0x0000001516177224 */ /* 0x080fe400078e02ff */ /*1ae0*/ IMAD.WIDE.U32 R10, R14, R21, R10 ; /* 0x000000150e0a7225 */ /* 0x000fc800078e000a */ /*1af0*/ IMAD.HI.U32 R14, R22, R21, RZ ; /* 0x00000015160e7227 */ /* 0x000fc800078e00ff */ /*1b00*/ IMAD.HI.U32 R10, P0, R22, R15, R10 ; /* 0x0000000f160a7227 */ /* 0x000fc8000780000a */ /*1b10*/ IMAD.X R14, RZ, RZ, R14, P0 ; /* 0x000000ffff0e7224 */ /* 0x000fe200000e060e */ /*1b20*/ IADD3 R23, P2, R23, R10, RZ ; /* 0x0000000a17177210 */ /* 0x000fca0007f5e0ff */ /*1b30*/ IMAD.WIDE.U32 R10, R23, R12, RZ ; /* 0x0000000c170a7225 */ /* 0x000fc800078e00ff */ /*1b40*/ IMAD.X R25, RZ, RZ, R14, P2 ; /* 0x000000ffff197224 */ /* 0x000fe200010e060e */ /*1b50*/ IADD3 R27, P2, -R10, R15, RZ ; /* 0x0000000f0a1b7210 */ /* 0x000fe20007f5e1ff */ /*1b60*/ IMAD R11, R23, R13, R11 ; /* 0x0000000d170b7224 */ /* 0x000fc600078e020b */ /*1b70*/ ISETP.GE.U32.AND P0, PT, R27, R12.reuse, PT ; /* 0x0000000c1b00720c */ /* 0x080fe20003f06070 */ /*1b80*/ IMAD R10, R25, R12, R11 ; /* 0x0000000c190a7224 */ /* 0x000fca00078e020b */ /*1b90*/ IADD3.X R11, ~R10, R21, RZ, P2, !PT ; /* 0x000000150a0b7210 */ /* 0x000fe400017fe5ff */ /*1ba0*/ IADD3 R15, P2, R27, -R12, RZ ; /* 0x8000000c1b0f7210 */ /* 0x000fe40007f5e0ff */ /*1bb0*/ ISETP.GE.U32.AND.EX P0, PT, R11, R13, PT, P0 ; /* 0x0000000d0b00720c */ /* 0x000fe40003f06100 */ /*1bc0*/ IADD3 R10, P4, R23, 0x1, RZ ; /* 0x00000001170a7810 */ /* 0x000fe20007f9e0ff */ /*1bd0*/ IMAD.X R21, R11, 0x1, ~R13, P2 ; /* 0x000000010b157824 */ /* 0x000fe200010e0e0d */ /*1be0*/ SEL R15, R15, R27, P0 ; /* 0x0000001b0f0f7207 */ /* 0x000fc60000000000 */ /*1bf0*/ IMAD.X R14, RZ, RZ, R25, P4 ; /* 0x000000ffff0e7224 */ /* 0x000fe200020e0619 */ /*1c00*/ SEL R21, R21, R11, P0 ; /* 0x0000000b15157207 */ /* 0x000fe40000000000 */ /*1c10*/ SEL R11, R10, R23, P0 ; /* 0x000000170a0b7207 */ /* 0x000fe40000000000 */ /*1c20*/ ISETP.GE.U32.AND P2, PT, R15, R12, PT ; /* 0x0000000c0f00720c */ /* 0x000fe40003f46070 */ /*1c30*/ SEL R10, R14, R25, P0 ; /* 0x000000190e0a7207 */ /* 0x000fe40000000000 */ /*1c40*/ IADD3 R22, P4, R11, 0x1, RZ ; /* 0x000000010b167810 */ /* 0x000fe40007f9e0ff */ /*1c50*/ ISETP.GE.U32.AND.EX P0, PT, R21, R13, PT, P2 ; /* 0x0000000d1500720c */ /* 0x000fc40003f06120 */ /*1c60*/ ISETP.GE.AND P2, PT, R19, RZ, PT ; /* 0x000000ff1300720c */ /* 0x000fe20003f46270 */ /*1c70*/ IMAD.X R23, RZ, RZ, R10, P4 ; /* 0x000000ffff177224 */ /* 0x000fe200020e060a */ /*1c80*/ SEL R22, R22, R11, P0 ; /* 0x0000000b16167207 */ /* 0x000fc80000000000 */ /*1c90*/ SEL R23, R23, R10, P0 ; /* 0x0000000a17177207 */ /* 0x000fe40000000000 */ /*1ca0*/ IADD3 R11, P4, RZ, -R22.reuse, RZ ; /* 0x80000016ff0b7210 */ /* 0x080fe40007f9e0ff */ /*1cb0*/ ISETP.NE.U32.AND P0, PT, R17, RZ, PT ; /* 0x000000ff1100720c */ /* 0x000fe40003f05070 */ /*1cc0*/ SEL R22, R11, R22, !P2 ; /* 0x000000160b167207 */ /* 0x000fe20005000000 */ /*1cd0*/ IMAD.X R10, RZ, RZ, ~R23, P4 ; /* 0x000000ffff0a7224 */ /* 0x000fe200020e0e17 */ /*1ce0*/ MOV R11, 0x0 ; /* 0x00000000000b7802 */ /* 0x000fe40000000f00 */ /*1cf0*/ ISETP.NE.AND.EX P0, PT, R16, RZ, PT, P0 ; /* 0x000000ff1000720c */ /* 0x000fc40003f05300 */ /*1d00*/ SEL R23, R10, R23, !P2 ; /* 0x000000170a177207 */ /* 0x000fe20005000000 */ /*1d10*/ IMAD.MOV.U32 R10, RZ, RZ, R8 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0008 */ /*1d20*/ SEL R22, R22, 0xffffffff, P0 ; /* 0xffffffff16167807 */ /* 0x000fe40000000000 */ /*1d30*/ SEL R23, R23, 0xffffffff, P0 ; /* 0xffffffff17177807 */ /* 0x000fe20000000000 */ /*1d40*/ RET.REL.NODEC R10 0x0 ; /* 0xffffe2b00a007950 */ /* 0x000fec0003c3ffff */ /*1d50*/ IADD3 R16, P1, RZ, -R23, RZ ; /* 0x80000017ff107210 */ /* 0x000fe40007f3e0ff */ /*1d60*/ ISETP.GE.AND P0, PT, R21, RZ, PT ; /* 0x000000ff1500720c */ /* 0x000fc60003f06270 */ /*1d70*/ IMAD.X R22, RZ, RZ, ~R21, P1 ; /* 0x000000ffff167224 */ /* 0x000fe200008e0e15 */ /*1d80*/ SEL R16, R16, R23, !P0 ; /* 0x0000001710107207 */ /* 0x000fc80004000000 */ /*1d90*/ SEL R17, R22, R21, !P0 ; /* 0x0000001516117207 */ /* 0x000fc80004000000 */ /*1da0*/ I2F.U64.RP R22, R16 ; /* 0x0000001000167312 */ /* 0x000e300000309000 */ /*1db0*/ MUFU.RCP R22, R22 ; /* 0x0000001600167308 */ /* 0x001e240000001000 */ /*1dc0*/ IADD3 R24, R22, 0x1ffffffe, RZ ; /* 0x1ffffffe16187810 */ /* 0x001fcc0007ffe0ff */ /*1dd0*/ F2I.U64.TRUNC R24, R24 ; /* 0x0000001800187311 */ /* 0x000e24000020d800 */ /*1de0*/ IMAD.WIDE.U32 R26, R24, R16, RZ ; /* 0x00000010181a7225 */ /* 0x001fc800078e00ff */ /*1df0*/ IMAD R27, R24, R17, R27 ; /* 0x00000011181b7224 */ /* 0x000fe200078e021b */ /*1e00*/ IADD3 R29, P0, RZ, -R26, RZ ; /* 0x8000001aff1d7210 */ /* 0x000fc60007f1e0ff */ /*1e10*/ IMAD R27, R25, R16, R27 ; /* 0x00000010191b7224 */ /* 0x000fe400078e021b */ /*1e20*/ IMAD.HI.U32 R26, R24, R29, RZ ; /* 0x0000001d181a7227 */ /* 0x000fc800078e00ff */ /*1e30*/ IMAD.X R31, RZ, RZ, ~R27, P0 ; /* 0x000000ffff1f7224 */ /* 0x000fe400000e0e1b */ /*1e40*/ IMAD.MOV.U32 R27, RZ, RZ, R24 ; /* 0x000000ffff1b7224 */ /* 0x000fe400078e0018 */ /*1e50*/ IMAD R33, R25, R31.reuse, RZ ; /* 0x0000001f19217224 */ /* 0x080fe400078e02ff */ /*1e60*/ IMAD.WIDE.U32 R26, P0, R24, R31, R26 ; /* 0x0000001f181a7225 */ /* 0x000fcc000780001a */ /*1e70*/ IMAD.HI.U32 R26, P1, R25, R29, R26 ; /* 0x0000001d191a7227 */ /* 0x000fc8000782001a */ /*1e80*/ IMAD.HI.U32 R29, R25, R31, RZ ; /* 0x0000001f191d7227 */ /* 0x000fe200078e00ff */ /*1e90*/ IADD3 R27, P2, R33, R26, RZ ; /* 0x0000001a211b7210 */ /* 0x000fc60007f5e0ff */ /*1ea0*/ IMAD.X R29, R29, 0x1, R25, P0 ; /* 0x000000011d1d7824 */ /* 0x000fe400000e0619 */ /*1eb0*/ IMAD.WIDE.U32 R24, R27, R16, RZ ; /* 0x000000101b187225 */ /* 0x000fc600078e00ff */ /*1ec0*/ IADD3.X R29, RZ, RZ, R29, P2, P1 ; /* 0x000000ffff1d7210 */ /* 0x000fe200017e241d */ /*1ed0*/ IMAD R22, R27, R17, R25 ; /* 0x000000111b167224 */ /* 0x000fe200078e0219 */ /*1ee0*/ IADD3 R31, P0, RZ, -R24, RZ ; /* 0x80000018ff1f7210 */ /* 0x000fe40007f1e0ff */ /*1ef0*/ ISETP.GE.AND P1, PT, R18, RZ, PT ; /* 0x000000ff1200720c */ /* 0x000fe20003f26270 */ /*1f00*/ IMAD R22, R29, R16, R22 ; /* 0x000000101d167224 */ /* 0x000fe200078e0216 */ /*1f10*/ IADD3 R25, P4, RZ, -R20, RZ ; /* 0x80000014ff197210 */ /* 0x000fe20007f9e0ff */ /*1f20*/ IMAD.HI.U32 R26, R27, R31, RZ ; /* 0x0000001f1b1a7227 */ /* 0x000fc800078e00ff */ /*1f30*/ IMAD.X R24, RZ, RZ, ~R22, P0 ; /* 0x000000ffff187224 */ /* 0x000fc800000e0e16 */ /*1f40*/ IMAD.WIDE.U32 R26, P0, R27, R24, R26 ; /* 0x000000181b1a7225 */ /* 0x000fcc000780001a */ /*1f50*/ IMAD.HI.U32 R22, P2, R29, R31, R26 ; /* 0x0000001f1d167227 */ /* 0x000fe2000784001a */ /*1f60*/ SEL R27, R25, R20, !P1 ; /* 0x00000014191b7207 */ /* 0x000fe40004800000 */ /*1f70*/ IADD3.X R25, RZ, ~R18, RZ, P4, !PT ; /* 0x80000012ff197210 */ /* 0x000fe200027fe4ff */ /*1f80*/ IMAD R31, R29.reuse, R24.reuse, RZ ; /* 0x000000181d1f7224 */ /* 0x0c0fe400078e02ff */ /*1f90*/ IMAD.HI.U32 R20, R29, R24, RZ ; /* 0x000000181d147227 */ /* 0x000fc600078e00ff */ /*1fa0*/ IADD3 R22, P3, R31, R22, RZ ; /* 0x000000161f167210 */ /* 0x000fe20007f7e0ff */ /*1fb0*/ IMAD.X R20, R20, 0x1, R29, P0 ; /* 0x0000000114147824 */ /* 0x000fe200000e061d */ /*1fc0*/ SEL R29, R25, R18, !P1 ; /* 0x00000012191d7207 */ /* 0x000fe20004800000 */ /*1fd0*/ IMAD.MOV.U32 R25, RZ, RZ, RZ ; /* 0x000000ffff197224 */ /* 0x000fe400078e00ff */ /*1fe0*/ IMAD.HI.U32 R24, R22, R27, RZ ; /* 0x0000001b16187227 */ /* 0x000fe200078e00ff */ /*1ff0*/ IADD3.X R20, RZ, RZ, R20, P3, P2 ; /* 0x000000ffff147210 */ /* 0x000fca0001fe4414 */ /*2000*/ IMAD.WIDE.U32 R24, R22, R29, R24 ; /* 0x0000001d16187225 */ /* 0x000fc800078e0018 */ /*2010*/ IMAD R31, R20.reuse, R29, RZ ; /* 0x0000001d141f7224 */ /* 0x040fe400078e02ff */ /*2020*/ IMAD.HI.U32 R24, P0, R20, R27, R24 ; /* 0x0000001b14187227 */ /* 0x000fc80007800018 */ /*2030*/ IMAD.HI.U32 R18, R20, R29, RZ ; /* 0x0000001d14127227 */ /* 0x000fe200078e00ff */ /*2040*/ IADD3 R31, P2, R31, R24, RZ ; /* 0x000000181f1f7210 */ /* 0x000fc60007f5e0ff */ /*2050*/ IMAD.X R18, RZ, RZ, R18, P0 ; /* 0x000000ffff127224 */ /* 0x000fe400000e0612 */ /*2060*/ IMAD.WIDE.U32 R24, R31, R16, RZ ; /* 0x000000101f187225 */ /* 0x000fc800078e00ff */ /*2070*/ IMAD.X R33, RZ, RZ, R18, P2 ; /* 0x000000ffff217224 */ /* 0x000fe200010e0612 */ /*2080*/ IADD3 R35, P2, -R24, R27, RZ ; /* 0x0000001b18237210 */ /* 0x000fe20007f5e1ff */ /*2090*/ IMAD R31, R31, R17, R25 ; /* 0x000000111f1f7224 */ /* 0x000fc600078e0219 */ /*20a0*/ ISETP.GE.U32.AND P0, PT, R35, R16.reuse, PT ; /* 0x000000102300720c */ /* 0x080fe20003f06070 */ /*20b0*/ IMAD R18, R33, R16, R31 ; /* 0x0000001021127224 */ /* 0x000fc800078e021f */ /*20c0*/ IMAD.X R29, R29, 0x1, ~R18, P2 ; /* 0x000000011d1d7824 */ /* 0x000fe200010e0e12 */ /*20d0*/ IADD3 R25, P2, R35, -R16, RZ ; /* 0x8000001023197210 */ /* 0x000fc80007f5e0ff */ /*20e0*/ ISETP.GE.U32.AND.EX P0, PT, R29.reuse, R17.reuse, PT, P0 ; /* 0x000000111d00720c */ /* 0x0c0fe40003f06100 */ /*20f0*/ IADD3.X R27, R29, ~R17, RZ, P2, !PT ; /* 0x800000111d1b7210 */ /* 0x000fe400017fe4ff */ /*2100*/ SEL R25, R25, R35, P0 ; /* 0x0000002319197207 */ /* 0x000fe40000000000 */ /*2110*/ SEL R27, R27, R29, P0 ; /* 0x0000001d1b1b7207 */ /* 0x000fe40000000000 */ /*2120*/ ISETP.GE.U32.AND P0, PT, R25.reuse, R16.reuse, PT ; /* 0x000000101900720c */ /* 0x0c0fe40003f06070 */ /*2130*/ IADD3 R18, P2, R25, -R16, RZ ; /* 0x8000001019127210 */ /* 0x000fc40007f5e0ff */ /*2140*/ ISETP.GE.U32.AND.EX P0, PT, R27, R17, PT, P0 ; /* 0x000000111b00720c */ /* 0x000fc60003f06100 */ /*2150*/ IMAD.X R16, R27, 0x1, ~R17, P2 ; /* 0x000000011b107824 */ /* 0x000fe200010e0e11 */ /*2160*/ SEL R18, R18, R25, P0 ; /* 0x0000001912127207 */ /* 0x000fc80000000000 */ /*2170*/ SEL R16, R16, R27, P0 ; /* 0x0000001b10107207 */ /* 0x000fe40000000000 */ /*2180*/ IADD3 R17, P2, RZ, -R18.reuse, RZ ; /* 0x80000012ff117210 */ /* 0x080fe40007f5e0ff */ /*2190*/ ISETP.NE.U32.AND P0, PT, R23, RZ, PT ; /* 0x000000ff1700720c */ /* 0x000fe40003f05070 */ /*21a0*/ SEL R18, R17, R18, !P1 ; /* 0x0000001211127207 */ /* 0x000fe20004800000 */ /*21b0*/ IMAD.X R23, RZ, RZ, ~R16, P2 ; /* 0x000000ffff177224 */ /* 0x000fe200010e0e10 */ /*21c0*/ ISETP.NE.AND.EX P0, PT, R21, RZ, PT, P0 ; /* 0x000000ff1500720c */ /* 0x000fe20003f05300 */ /*21d0*/ IMAD.MOV.U32 R17, RZ, RZ, 0x0 ; /* 0x00000000ff117424 */ /* 0x000fc600078e00ff */ /*21e0*/ SEL R21, R23, R16, !P1 ; /* 0x0000001017157207 */ /* 0x000fe20004800000 */ /*21f0*/ IMAD.MOV.U32 R16, RZ, RZ, R8 ; /* 0x000000ffff107224 */ /* 0x000fe200078e0008 */ /*2200*/ SEL R18, R18, 0xffffffff, P0 ; /* 0xffffffff12127807 */ /* 0x000fe40000000000 */ /*2210*/ SEL R21, R21, 0xffffffff, P0 ; /* 0xffffffff15157807 */ /* 0x000fe20000000000 */ /*2220*/ RET.REL.NODEC R16 0x0 ; /* 0xffffddd010007950 */ /* 0x000fec0003c3ffff */ /*2230*/ BRA 0x2230; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*2240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*22a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*22b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*22c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*22d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*22e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*22f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z9checkpermPbPiS0_S0_S0_S0_S0_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff037624 */ /* 0x000fe200078e00ff */ /*0020*/ MOV R2, c[0x0][0x170] ; /* 0x00005c0000027a02 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0040*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea8000c1e1900 */ /*0050*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0060*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002600 */ /*0070*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e680000002100 */ /*0080*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */ /* 0x000ee20000002200 */ /*0090*/ IMAD R0, R0, c[0x0][0x10], R5 ; /* 0x0000040000007a24 */ /* 0x001fc800078e0205 */ /*00a0*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */ /* 0x002fc800078e0207 */ /*00b0*/ IMAD R0, R0, c[0x0][0x4], R9 ; /* 0x0000010000007a24 */ /* 0x008fca00078e0209 */ /*00c0*/ ISETP.GE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x004fda0003f06270 */ /*00d0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00e0*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fca0000000f00 */ /*00f0*/ IMAD.WIDE R2, R0, R7, c[0x0][0x180] ; /* 0x0000600000027625 */ /* 0x000fca00078e0207 */ /*0100*/ LDG.E R8, [R2.64] ; /* 0x0000000402087981 */ /* 0x000ea8000c1e1900 */ /*0110*/ LDG.E R9, [R2.64+0x4] ; /* 0x0000040402097981 */ /* 0x000ea2000c1e1900 */ /*0120*/ IMAD.WIDE R4, R0, R7, c[0x0][0x168] ; /* 0x00005a0000047625 */ /* 0x000fcc00078e0207 */ /*0130*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ee2000c1e1900 */ /*0140*/ ISETP.GE.AND P0, PT, R8, R9, PT ; /* 0x000000090800720c */ /* 0x004fe20003f06270 */ /*0150*/ IMAD.WIDE R6, R4, R7, c[0x0][0x188] ; /* 0x0000620004067625 */ /* 0x008fd800078e0207 */ /*0160*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0170*/ LDG.E R0, [R6.64+0x4] ; /* 0x0000040406007981 */ /* 0x000ea8000c1e1900 */ /*0180*/ LDG.E R11, [R6.64] ; /* 0x00000004060b7981 */ /* 0x000ea4000c1e1900 */ /*0190*/ ISETP.GE.AND P0, PT, R11, R0, PT ; /* 0x000000000b00720c */ /* 0x004fda0003f06270 */ /*01a0*/ @P0 BRA 0x2a0 ; /* 0x000000f000000947 */ /* 0x000fea0003800000 */ /*01b0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*01c0*/ IMAD.WIDE R2, R8, R5, c[0x0][0x178] ; /* 0x00005e0008027625 */ /* 0x000fcc00078e0205 */ /*01d0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea4000c1e1900 */ /*01e0*/ IMAD.WIDE R4, R2, R5, c[0x0][0x168] ; /* 0x00005a0002047625 */ /* 0x004fcc00078e0205 */ /*01f0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000162000c1e1900 */ /*0200*/ BSSY B0, 0x2f0 ; /* 0x000000e000007945 */ /* 0x000fe20003800000 */ /*0210*/ MOV R7, R11 ; /* 0x0000000b00077202 */ /* 0x000fe40000000f00 */ /*0220*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */ /* 0x000fc800078e00ff */ /*0230*/ IMAD.WIDE R2, R7, R2, c[0x0][0x190] ; /* 0x0000640007027625 */ /* 0x000fcc00078e0202 */ /*0240*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea4000c1e1900 */ /*0250*/ ISETP.NE.AND P0, PT, R5, R2, PT ; /* 0x000000020500720c */ /* 0x024fda0003f05270 */ /*0260*/ @!P0 BRA 0x2e0 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*0270*/ IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107077810 */ /* 0x000fc80007ffe0ff */ /*0280*/ ISETP.GE.AND P0, PT, R7, R0, PT ; /* 0x000000000700720c */ /* 0x000fda0003f06270 */ /*0290*/ @!P0 BRA 0x220 ; /* 0xffffff8000008947 */ /* 0x000fea000383ffff */ /*02a0*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */ /* 0x000fe20000000f00 */ /*02b0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */ /* 0x000fca00078e00ff */ /*02c0*/ STG.E.U8 [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x000fe2000c101104 */ /*02d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*02e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*02f0*/ IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108087810 */ /* 0x000fc80007ffe0ff */ /*0300*/ ISETP.GE.AND P0, PT, R8, R9, PT ; /* 0x000000090800720c */ /* 0x000fda0003f06270 */ /*0310*/ @!P0 BRA 0x1b0 ; /* 0xfffffe9000008947 */ /* 0x001fea000383ffff */ /*0320*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0330*/ BRA 0x330; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0340*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0350*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0360*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0370*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0380*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0390*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z9puttolistPiS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */ /* 0x000fe20000000f00 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0030*/ MOV R3, c[0x0][0x164] ; /* 0x0000590000037a02 */ /* 0x000fca0000000f00 */ /*0040*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*0050*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0060*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002600 */ /*0070*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e680000002100 */ /*0080*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */ /* 0x000ee20000002200 */ /*0090*/ IMAD R0, R0, c[0x0][0x10], R5 ; /* 0x0000040000007a24 */ /* 0x001fc800078e0205 */ /*00a0*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */ /* 0x002fc800078e0207 */ /*00b0*/ IMAD R5, R0, c[0x0][0x4], R9 ; /* 0x0000010000057a24 */ /* 0x008fca00078e0209 */ /*00c0*/ ISETP.GE.AND P0, PT, R5, R2, PT ; /* 0x000000020500720c */ /* 0x004fda0003f06270 */ /*00d0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00e0*/ MOV R4, 0x4 ; /* 0x0000000400047802 */ /* 0x000fca0000000f00 */ /*00f0*/ IMAD.WIDE R2, R5, R4, c[0x0][0x168] ; /* 0x00005a0005027625 */ /* 0x000fca00078e0204 */ /*0100*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea8000c1e1900 */ /*0110*/ LDG.E R7, [R2.64+0x4] ; /* 0x0000040402077981 */ /* 0x000ea4000c1e1900 */ /*0120*/ ISETP.NE.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x004fda0003f05270 */ /*0130*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0140*/ IMAD.WIDE R2, R0, R4, c[0x0][0x170] ; /* 0x00005c0000027625 */ /* 0x000fca00078e0204 */ /*0150*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*0160*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0170*/ BRA 0x170; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z7findcvsiPiS_S_S_S_S_PS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R24, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff187624 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR36, c[0x0][0x118] ; /* 0x0000460000247ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IMAD.MOV.U32 R25, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff197624 */ /* 0x000fe200078e00ff */ /*0040*/ IADD3 R1, R1, -0x10, RZ ; /* 0xfffffff001017810 */ /* 0x000fc80007ffe0ff */ /*0050*/ LDG.E R4, [R24.64] ; /* 0x0000002418047981 */ /* 0x000ea8000c1e1900 */ /*0060*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0070*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002600 */ /*0080*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e680000002100 */ /*0090*/ S2R R17, SR_TID.Y ; /* 0x0000000000117919 */ /* 0x000ee20000002200 */ /*00a0*/ IMAD R0, R0, c[0x0][0x10], R3 ; /* 0x0000040000007a24 */ /* 0x001fc800078e0203 */ /*00b0*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */ /* 0x002fc800078e0205 */ /*00c0*/ IMAD R17, R0, c[0x0][0x4], R17 ; /* 0x0000010000117a24 */ /* 0x008fca00078e0211 */ /*00d0*/ ISETP.GE.AND P0, PT, R17, R4, PT ; /* 0x000000041100720c */ /* 0x004fda0003f06270 */ /*00e0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00f0*/ IMAD.MOV.U32 R22, RZ, RZ, 0x4 ; /* 0x00000004ff167424 */ /* 0x000fe400078e00ff */ /*0100*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff137624 */ /* 0x000fc800078e00ff */ /*0110*/ IMAD.WIDE R18, R22, R19, c[0x0][0x180] ; /* 0x0000600016127625 */ /* 0x000fc800078e0213 */ /*0120*/ IMAD.WIDE R22, R17, R22, c[0x0][0x168] ; /* 0x00005a0011167625 */ /* 0x000fe200078e0216 */ /*0130*/ LDG.E R0, [R18.64] ; /* 0x0000002412007981 */ /* 0x000ea8000c1e1900 */ /*0140*/ LDG.E R3, [R18.64+0x4] ; /* 0x0000042412037981 */ /* 0x000ea8000c1e1900 */ /*0150*/ LDG.E R2, [R22.64] ; /* 0x0000002416027981 */ /* 0x000ee8000c1e1900 */ /*0160*/ LDG.E R5, [R22.64+0x4] ; /* 0x0000042416057981 */ /* 0x000ee2000c1e1900 */ /*0170*/ IMAD.IADD R0, R3, 0x1, -R0 ; /* 0x0000000103007824 */ /* 0x004fc400078e0a00 */ /*0180*/ IMAD.IADD R5, R5, 0x1, -R2 ; /* 0x0000000105057824 */ /* 0x008fca00078e0a02 */ /*0190*/ ISETP.GT.AND P0, PT, R0, R5, PT ; /* 0x000000050000720c */ /* 0x000fda0003f04270 */ /*01a0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*01b0*/ MOV R0, 0x150 ; /* 0x0000015000007802 */ /* 0x000fe40000000f00 */ /*01c0*/ SHF.R.S32.HI R5, RZ, 0x1f, R4 ; /* 0x0000001fff057819 */ /* 0x000fe40000011404 */ /*01d0*/ LDC.64 R2, c[0x4][R0] ; /* 0x0100000000027b82 */ /* 0x00006a0000000a00 */ /*01e0*/ LEPC R6 ; /* 0x000000000006734e */ /* 0x000fe20000000000 */ /*01f0*/ MOV R9, 0x260 ; /* 0x0000026000097802 */ /* 0x000fe40000000f00 */ /*0200*/ MOV R20, 0x1e0 ; /* 0x000001e000147802 */ /* 0x000fe40000000f00 */ /*0210*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*0220*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x001fc40000000f00 */ /*0230*/ IADD3 R20, P0, P1, -R20, R9, R6 ; /* 0x0000000914147210 */ /* 0x000fc8000791e106 */ /*0240*/ IADD3.X R21, ~R0, R21, R7, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2507 */ /*0250*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */ /* 0x002fea0003c00000 */ /*0260*/ LDG.E R24, [R24.64] ; /* 0x0000002418187981 */ /* 0x000ea2000c1e1900 */ /*0270*/ IMAD.MOV.U32 R16, RZ, RZ, R4 ; /* 0x000000ffff107224 */ /* 0x000fe400078e0004 */ /*0280*/ IMAD.MOV.U32 R2, RZ, RZ, R5 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0005 */ /*0290*/ ISETP.NE.AND P0, PT, R24, RZ, PT ; /* 0x000000ff1800720c */ /* 0x004fda0003f05270 */ /*02a0*/ @!P0 BRA 0x5e0 ; /* 0x0000033000008947 */ /* 0x000fea0003800000 */ /*02b0*/ ISETP.GT.U32.AND P0, PT, R24, RZ, PT ; /* 0x000000ff1800720c */ /* 0x000fe20003f04070 */ /*02c0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x000fe200078e00ff */ /*02d0*/ SHF.R.S32.HI R0, RZ, 0x1f, R24 ; /* 0x0000001fff007819 */ /* 0x000fe20000011418 */ /*02e0*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */ /* 0x000fc600078e00ff */ /*02f0*/ ISETP.GT.U32.AND.EX P0, PT, R0, RZ, PT, P0 ; /* 0x000000ff0000720c */ /* 0x000fda0003f04100 */ /*0300*/ @!P0 IADD3 R4, P1, R7, R16, RZ ; /* 0x0000001007048210 */ /* 0x000fe20007f3e0ff */ /*0310*/ @!P0 IMAD.MOV.U32 R7, RZ, RZ, 0x1 ; /* 0x00000001ff078424 */ /* 0x000fc800078e00ff */ /*0320*/ @!P0 IMAD.X R5, R9, 0x1, R2, P1 ; /* 0x0000000109058824 */ /* 0x000fe200008e0602 */ /*0330*/ IADD3 R3, P3, R24.reuse, -R7.reuse, RZ ; /* 0x8000000718037210 */ /* 0x0c0fe20007f7e0ff */ /*0340*/ @!P0 IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff098224 */ /* 0x000fe200078e00ff */ /*0350*/ ISETP.GT.U32.AND P2, PT, R24, R7, PT ; /* 0x000000071800720c */ /* 0x000fe40003f44070 */ /*0360*/ ISETP.LE.U32.AND P1, PT, R3, 0x3, PT ; /* 0x000000030300780c */ /* 0x000fe20003f23070 */ /*0370*/ IMAD.X R3, R0.reuse, 0x1, ~R9, P3 ; /* 0x0000000100037824 */ /* 0x040fe200018e0e09 */ /*0380*/ @!P0 ST.E.U8 [R4.64], RZ ; /* 0x000000ff04008985 */ /* 0x0001e2000c101124 */ /*0390*/ ISETP.GT.U32.AND.EX P2, PT, R0, R9, PT, P2 ; /* 0x000000090000720c */ /* 0x000fc80003f44120 */ /*03a0*/ ISETP.LE.U32.OR.EX P1, PT, R3, RZ, !P2, P1 ; /* 0x000000ff0300720c */ /* 0x000fda0005723510 */ /*03b0*/ @P1 BRA 0x4c0 ; /* 0x0000010000001947 */ /* 0x000fea0003800000 */ /*03c0*/ IADD3 R3, P1, R24, -0x3, RZ ; /* 0xfffffffd18037810 */ /* 0x001fe20007f3e0ff */ /*03d0*/ BSSY B0, 0x4c0 ; /* 0x000000e000007945 */ /* 0x000fe20003800000 */ /*03e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*03f0*/ IADD3.X R6, R0, -0x1, RZ, P1, !PT ; /* 0xffffffff00067810 */ /* 0x000fe40000ffe4ff */ /*0400*/ IADD3 R4, P1, R7.reuse, R16, RZ ; /* 0x0000001007047210 */ /* 0x041fe40007f3e0ff */ /*0410*/ IADD3 R7, P2, R7, 0x4, RZ ; /* 0x0000000407077810 */ /* 0x000fc60007f5e0ff */ /*0420*/ IMAD.X R5, R9, 0x1, R2, P1 ; /* 0x0000000109057824 */ /* 0x000fe200008e0602 */ /*0430*/ ISETP.GE.U32.AND P1, PT, R7, R3, PT ; /* 0x000000030700720c */ /* 0x000fe20003f26070 */ /*0440*/ IMAD.X R9, RZ, RZ, R9, P2 ; /* 0x000000ffff097224 */ /* 0x000fc600010e0609 */ /*0450*/ ST.E.U8 [R4.64], RZ ; /* 0x000000ff04007985 */ /* 0x0001e4000c101124 */ /*0460*/ ISETP.GE.U32.AND.EX P1, PT, R9, R6, PT, P1 ; /* 0x000000060900720c */ /* 0x000fe40003f26110 */ /*0470*/ ST.E.U8 [R4.64+0x1], RZ ; /* 0x000001ff04007985 */ /* 0x0001e8000c101124 */ /*0480*/ ST.E.U8 [R4.64+0x2], RZ ; /* 0x000002ff04007985 */ /* 0x0001e8000c101124 */ /*0490*/ ST.E.U8 [R4.64+0x3], RZ ; /* 0x000003ff04007985 */ /* 0x0001e6000c101124 */ /*04a0*/ @!P1 BRA 0x400 ; /* 0xffffff5000009947 */ /* 0x000fea000383ffff */ /*04b0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*04c0*/ IADD3 R3, P3, R24.reuse, -R7.reuse, RZ ; /* 0x8000000718037210 */ /* 0x0c1fe40007f7e0ff */ /*04d0*/ ISETP.GT.U32.AND P2, PT, R24, R7, PT ; /* 0x000000071800720c */ /* 0x000fc40003f44070 */ /*04e0*/ ISETP.LE.U32.AND P1, PT, R3, 0x1, PT ; /* 0x000000010300780c */ /* 0x000fe20003f23070 */ /*04f0*/ IMAD.X R3, R0.reuse, 0x1, ~R9, P3 ; /* 0x0000000100037824 */ /* 0x040fe200018e0e09 */ /*0500*/ ISETP.GT.U32.AND.EX P2, PT, R0, R9, PT, P2 ; /* 0x000000090000720c */ /* 0x000fc80003f44120 */ /*0510*/ ISETP.LE.U32.OR.EX P1, PT, R3, RZ, !P2, P1 ; /* 0x000000ff0300720c */ /* 0x000fda0005723510 */ /*0520*/ @!P1 PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000981c */ /* 0x000fe40003f0e170 */ /*0530*/ @!P1 IADD3 R10, P2, R7.reuse, R16, RZ ; /* 0x00000010070a9210 */ /* 0x040fe40007f5e0ff */ /*0540*/ @!P1 IADD3 R7, P3, R7, 0x2, RZ ; /* 0x0000000207079810 */ /* 0x000fe40007f7e0ff */ /*0550*/ @!P1 IADD3.X R11, R9, R2, RZ, P2, !PT ; /* 0x00000002090b9210 */ /* 0x000fe400017fe4ff */ /*0560*/ ISETP.LT.U32.AND P2, PT, R7, R24, PT ; /* 0x000000180700720c */ /* 0x000fe20003f41070 */ /*0570*/ @!P1 IMAD.X R9, RZ, RZ, R9, P3 ; /* 0x000000ffff099224 */ /* 0x000fe400018e0609 */ /*0580*/ @!P1 ST.E.U8 [R10.64], RZ ; /* 0x000000ff0a009985 */ /* 0x0001e6000c101124 */ /*0590*/ ISETP.LT.U32.OR.EX P0, PT, R9, R0, P0, P2 ; /* 0x000000000900720c */ /* 0x000fe20000701520 */ /*05a0*/ @!P1 ST.E.U8 [R10.64+0x1], RZ ; /* 0x000001ff0a009985 */ /* 0x0001d8000c101124 */ /*05b0*/ @P0 IADD3 R4, P2, R7, R16, RZ ; /* 0x0000001007040210 */ /* 0x000fca0007f5e0ff */ /*05c0*/ @P0 IMAD.X R5, R9, 0x1, R2, P2 ; /* 0x0000000109050824 */ /* 0x000fca00010e0602 */ /*05d0*/ @P0 ST.E.U8 [R4.64], RZ ; /* 0x000000ff04000985 */ /* 0x0001e6000c101124 */ /*05e0*/ LDG.E R20, [R18.64] ; /* 0x0000002412147981 */ /* 0x000ea8000c1e1900 */ /*05f0*/ LDG.E R21, [R18.64+0x4] ; /* 0x0000042412157981 */ /* 0x000ea8000c1e1900 */ /*0600*/ LDG.E R8, [R22.64] ; /* 0x0000002416087981 */ /* 0x000368000c1e1900 */ /*0610*/ LDG.E R9, [R22.64+0x4] ; /* 0x0000042416097981 */ /* 0x000362000c1e1900 */ /*0620*/ IMAD.MOV.U32 R24, RZ, RZ, c[0x0][0x198] ; /* 0x00006600ff187624 */ /* 0x000fc400078e00ff */ /*0630*/ IMAD.MOV.U32 R25, RZ, RZ, c[0x0][0x19c] ; /* 0x00006700ff197624 */ /* 0x000fe400078e00ff */ /*0640*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff047624 */ /* 0x001fe400078e00ff */ /*0650*/ IMAD.MOV.U32 R6, RZ, RZ, R16 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0010 */ /*0660*/ STL.64 [R1+0x8], R24 ; /* 0x0000081801007387 */ /* 0x000fe20000100a00 */ /*0670*/ IMAD.MOV.U32 R7, RZ, RZ, R2 ; /* 0x000000ffff077224 */ /* 0x000fe400078e0002 */ /*0680*/ IMAD.MOV.U32 R5, RZ, RZ, 0x1 ; /* 0x00000001ff057424 */ /* 0x000fe400078e00ff */ /*0690*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff0a7624 */ /* 0x000fc400078e00ff */ /*06a0*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff0b7624 */ /* 0x000fe400078e00ff */ /*06b0*/ IMAD.MOV.U32 R12, RZ, RZ, c[0x0][0x188] ; /* 0x00006200ff0c7624 */ /* 0x000fe400078e00ff */ /*06c0*/ IMAD.MOV.U32 R13, RZ, RZ, c[0x0][0x18c] ; /* 0x00006300ff0d7624 */ /* 0x000fe400078e00ff */ /*06d0*/ IMAD.MOV.U32 R14, RZ, RZ, c[0x0][0x190] ; /* 0x00006400ff0e7624 */ /* 0x000fe400078e00ff */ /*06e0*/ IMAD.MOV.U32 R15, RZ, RZ, c[0x0][0x194] ; /* 0x00006500ff0f7624 */ /* 0x000fe200078e00ff */ /*06f0*/ STL.64 [R1], R20 ; /* 0x0000001401007387 */ /* 0x0041e40000100a00 */ /*0700*/ MOV R20, 0x730 ; /* 0x0000073000147802 */ /* 0x001fc40000000f00 */ /*0710*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fc80000000f00 */ /*0720*/ CALL.REL.NOINC 0x8c0 ; /* 0x0000019000007944 */ /* 0x022fea0003c00000 */ /*0730*/ PRMT R0, R4, 0x9910, RZ ; /* 0x0000991004007816 */ /* 0x000fc800000000ff */ /*0740*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*0750*/ @P0 IMAD.MOV.U32 R6, RZ, RZ, 0x4 ; /* 0x00000004ff060424 */ /* 0x000fe400078e00ff */ /*0760*/ @P0 IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff070624 */ /* 0x000fc800078e00ff */ /*0770*/ @P0 IMAD.WIDE R6, R6, R7, c[0x0][0x190] ; /* 0x0000640006060625 */ /* 0x000fcc00078e0207 */ /*0780*/ @P0 LDG.E R6, [R6.64] ; /* 0x0000002406060981 */ /* 0x000ea2000c1e1900 */ /*0790*/ @P0 IMAD.MOV.U32 R9, RZ, RZ, 0x8 ; /* 0x00000008ff090424 */ /* 0x000fc800078e00ff */ /*07a0*/ @P0 IMAD.WIDE R8, R6, R9, c[0x0][0x198] ; /* 0x0000660006080625 */ /* 0x004fcc00078e0209 */ /*07b0*/ @P0 LDG.E.64 R8, [R8.64] ; /* 0x0000002408080981 */ /* 0x000ea2000c1e1b00 */ /*07c0*/ @P0 IMAD.MOV.U32 R3, RZ, RZ, 0x1 ; /* 0x00000001ff030424 */ /* 0x000fe200078e00ff */ /*07d0*/ MOV R0, 0x158 ; /* 0x0000015800007802 */ /* 0x000fe20000000f00 */ /*07e0*/ IMAD.MOV.U32 R5, RZ, RZ, R2 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0002 */ /*07f0*/ IMAD.MOV.U32 R4, RZ, RZ, R16 ; /* 0x000000ffff047224 */ /* 0x000fe200078e0010 */ /*0800*/ LDC.64 R12, c[0x4][R0] ; /* 0x01000000000c7b82 */ /* 0x0000620000000a00 */ /*0810*/ @P0 IMAD.WIDE R10, R17, 0x4, R8 ; /* 0x00000004110a0825 */ /* 0x004fca00078e0208 */ /*0820*/ @P0 ST.E [R10.64], R3 ; /* 0x000000030a000985 */ /* 0x0001e4000c101924 */ /*0830*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x003fe20000000000 */ /*0840*/ MOV R7, 0x8b0 ; /* 0x000008b000077802 */ /* 0x000fe40000000f00 */ /*0850*/ MOV R20, 0x830 ; /* 0x0000083000147802 */ /* 0x000fe40000000f00 */ /*0860*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*0870*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*0880*/ IADD3 R20, P0, P1, -R20, R7, R2 ; /* 0x0000000714147210 */ /* 0x000fc8000791e102 */ /*0890*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*08a0*/ CALL.ABS.NOINC R12 ; /* 0x000000000c007343 */ /* 0x000fea0003c00000 */ /*08b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*08c0*/ IADD3 R1, R1, -0x80, RZ ; /* 0xffffff8001017810 */ /* 0x000fca0007ffe0ff */ /*08d0*/ STL [R1+0x78], R53 ; /* 0x0000783501007387 */ /* 0x000fe80000100800 */ /*08e0*/ STL [R1+0x74], R52 ; /* 0x0000743401007387 */ /* 0x000fe80000100800 */ /*08f0*/ STL [R1+0x58], R37 ; /* 0x0000582501007387 */ /* 0x000fe80000100800 */ /*0900*/ STL [R1+0x54], R36 ; /* 0x0000542401007387 */ /* 0x000fe80000100800 */ /*0910*/ STL [R1+0x50], R31 ; /* 0x0000501f01007387 */ /* 0x000fe80000100800 */ /*0920*/ STL [R1+0x4c], R30 ; /* 0x00004c1e01007387 */ /* 0x000fe80000100800 */ /*0930*/ STL [R1+0x48], R29 ; /* 0x0000481d01007387 */ /* 0x000fe80000100800 */ /*0940*/ STL [R1+0x40], R27 ; /* 0x0000401b01007387 */ /* 0x000fe80000100800 */ /*0950*/ STL [R1+0x38], R25 ; /* 0x0000381901007387 */ /* 0x000fe80000100800 */ /*0960*/ STL [R1+0x34], R24 ; /* 0x0000341801007387 */ /* 0x000fe80000100800 */ /*0970*/ STL [R1+0x30], R23 ; /* 0x0000301701007387 */ /* 0x000fe80000100800 */ /*0980*/ STL [R1+0x28], R21 ; /* 0x0000281501007387 */ /* 0x000fe80000100800 */ /*0990*/ STL [R1+0x24], R20 ; /* 0x0000241401007387 */ /* 0x000fe80000100800 */ /*09a0*/ STL [R1+0x18], R17 ; /* 0x0000181101007387 */ /* 0x000fe80000100800 */ /*09b0*/ STL [R1+0x14], R16 ; /* 0x0000141001007387 */ /* 0x000fe80000100800 */ /*09c0*/ STL [R1+0x44], R28 ; /* 0x0000441c01007387 */ /* 0x0001e80000100800 */ /*09d0*/ STL [R1+0x3c], R26 ; /* 0x00003c1a01007387 */ /* 0x0003e80000100800 */ /*09e0*/ STL [R1+0x70], R47 ; /* 0x0000702f01007387 */ /* 0x0005e20000100800 */ /*09f0*/ BMOV.32.CLEAR R28, B7 ; /* 0x00000000071c7355 */ /* 0x001e260000100000 */ /*0a00*/ STL [R1+0x6c], R46 ; /* 0x00006c2e01007387 */ /* 0x0007e20000100800 */ /*0a10*/ BMOV.32.CLEAR R26, B6 ; /* 0x00000000061a7355 */ /* 0x002e660000100000 */ /*0a20*/ STL [R1+0x68], R45 ; /* 0x0000682d01007387 */ /* 0x0009e20000100800 */ /*0a30*/ IMAD.MOV.U32 R47, RZ, RZ, R11 ; /* 0x000000ffff2f7224 */ /* 0x004fc600078e000b */ /*0a40*/ STL [R1+0x64], R44 ; /* 0x0000642c01007387 */ /* 0x0005e20000100800 */ /*0a50*/ IMAD.MOV.U32 R46, RZ, RZ, R10 ; /* 0x000000ffff2e7224 */ /* 0x008fc600078e000a */ /*0a60*/ STL [R1+0x60], R39 ; /* 0x0000602701007387 */ /* 0x0007e20000100800 */ /*0a70*/ IMAD.MOV.U32 R45, RZ, RZ, R13 ; /* 0x000000ffff2d7224 */ /* 0x010fc600078e000d */ /*0a80*/ STL [R1+0x5c], R38 ; /* 0x00005c2601007387 */ /* 0x0009e20000100800 */ /*0a90*/ IMAD.MOV.U32 R44, RZ, RZ, R12 ; /* 0x000000ffff2c7224 */ /* 0x004fc600078e000c */ /*0aa0*/ STL [R1+0x2c], R22 ; /* 0x00002c1601007387 */ /* 0x0005e20000100800 */ /*0ab0*/ IMAD.MOV.U32 R39, RZ, RZ, R15 ; /* 0x000000ffff277224 */ /* 0x008fc600078e000f */ /*0ac0*/ STL [R1+0x20], R19 ; /* 0x0000201301007387 */ /* 0x0007e20000100800 */ /*0ad0*/ IMAD.MOV.U32 R38, RZ, RZ, R14 ; /* 0x000000ffff267224 */ /* 0x010fc600078e000e */ /*0ae0*/ STL [R1+0x1c], R18 ; /* 0x00001c1201007387 */ /* 0x0009e20000100800 */ /*0af0*/ IMAD.MOV.U32 R22, RZ, RZ, R4 ; /* 0x000000ffff167224 */ /* 0x004fc600078e0004 */ /*0b00*/ STL [R1+0x10], R2 ; /* 0x0000100201007387 */ /* 0x0005e20000100800 */ /*0b10*/ IMAD.MOV.U32 R19, RZ, RZ, R6 ; /* 0x000000ffff137224 */ /* 0x008fe200078e0006 */ /*0b20*/ MOV R18, R7 ; /* 0x0000000700127202 */ /* 0x010fe20000000f00 */ /*0b30*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ; /* 0x000000ffff027224 */ /* 0x004fe400078e0009 */ /*0b40*/ LDL R16, [R1+0x80] ; /* 0x0000800001107983 */ /* 0x003ea20000100800 */ /*0b50*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0b60*/ LDL R17, [R1+0x84] ; /* 0x0000840001117983 */ /* 0x000ee20000100800 */ /*0b70*/ IMAD.WIDE R12, R22, 0x4, R38 ; /* 0x00000004160c7825 */ /* 0x000fc600078e0226 */ /*0b80*/ LDL.64 R52, [R1+0x88] ; /* 0x0000880001347983 */ /* 0x0001680000100a00 */ /*0b90*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */ /* 0x000f22000c1e1900 */ /*0ba0*/ IADD3 R3, R16, -0x1, R5 ; /* 0xffffffff10037810 */ /* 0x004fca0007ffe005 */ /*0bb0*/ IMAD.WIDE R6, R3, 0x4, R44 ; /* 0x0000000403067825 */ /* 0x000fcc00078e022c */ /*0bc0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x000ea2000c1e1900 */ /*0bd0*/ IMAD.IADD R0, R17, 0x1, -R16 ; /* 0x0000000111007824 */ /* 0x008fca00078e0a10 */ /*0be0*/ ISETP.NE.AND P1, PT, R0, R5, PT ; /* 0x000000050000720c */ /* 0x000fe20003f25270 */ /*0bf0*/ IMAD.WIDE R10, R7, 0x4, R38 ; /* 0x00000004070a7825 */ /* 0x004fcc00078e0226 */ /*0c00*/ LDG.E R11, [R10.64] ; /* 0x000000040a0b7981 */ /* 0x000f22000c1e1900 */ /*0c10*/ BSSY B7, 0x1290 ; /* 0x0000067000077945 */ /* 0x000fe20003800000 */ /*0c20*/ IMAD.MOV.U32 R27, RZ, RZ, R8 ; /* 0x000000ffff1b7224 */ /* 0x000fe200078e0008 */ /*0c30*/ ISETP.GE.AND P0, PT, R11, R12, PT ; /* 0x0000000c0b00720c */ /* 0x010fc60003f06270 */ /*0c40*/ @!P1 BRA 0xd10 ; /* 0x000000c000009947 */ /* 0x000ff20003800000 */ /*0c50*/ IMAD.MOV.U32 R29, RZ, RZ, R5 ; /* 0x000000ffff1d7224 */ /* 0x001fe400078e0005 */ /*0c60*/ @!P0 BRA 0xf00 ; /* 0x0000029000008947 */ /* 0x000fea0003800000 */ /*0c70*/ IMAD.IADD R5, R16, 0x1, R29 ; /* 0x0000000110057824 */ /* 0x000fe200078e021d */ /*0c80*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0c90*/ IMAD.WIDE R4, R5, 0x4, R44 ; /* 0x0000000405047825 */ /* 0x000fcc00078e022c */ /*0ca0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea2000c1e1900 */ /*0cb0*/ IADD3 R29, R29, 0x1, RZ ; /* 0x000000011d1d7810 */ /* 0x000fc80007ffe0ff */ /*0cc0*/ ISETP.NE.AND P1, PT, R0, R29, PT ; /* 0x0000001d0000720c */ /* 0x000fe20003f25270 */ /*0cd0*/ IMAD.WIDE R6, R5, 0x4, R38 ; /* 0x0000000405067825 */ /* 0x004fca00078e0226 */ /*0ce0*/ LDG.E R11, [R6.64] ; /* 0x00000004060b7981 */ /* 0x000ea4000c1e1900 */ /*0cf0*/ ISETP.GE.AND P0, PT, R11, R12, PT ; /* 0x0000000c0b00720c */ /* 0x004fca0003f06270 */ /*0d00*/ @P1 BRA 0xc60 ; /* 0xffffff5000001947 */ /* 0x000ff0000383ffff */ /*0d10*/ IMAD.MOV.U32 R25, RZ, RZ, 0x1 ; /* 0x00000001ff197424 */ /* 0x001fe200078e00ff */ /*0d20*/ @P0 BRA 0x1280 ; /* 0x0000055000000947 */ /* 0x000fea0003800000 */ /*0d30*/ ISETP.GE.AND P0, PT, R27, R2, PT ; /* 0x000000021b00720c */ /* 0x000fe20003f06270 */ /*0d40*/ IMAD.WIDE R52, R11, 0x8, R52 ; /* 0x000000080b347825 */ /* 0x020fe200078e0234 */ /*0d50*/ PRMT R25, RZ, 0x7610, R25 ; /* 0x00007610ff197816 */ /* 0x000fd60000000019 */ /*0d60*/ @P0 BRA 0x1280 ; /* 0x0000051000000947 */ /* 0x000fea0003800000 */ /*0d70*/ IMAD.WIDE R4, R27, 0x4, R46 ; /* 0x000000041b047825 */ /* 0x000fe200078e022e */ /*0d80*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0d90*/ LDG.E R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000ea4000c1e1900 */ /*0da0*/ SHF.R.S32.HI R9, RZ, 0x1f, R3 ; /* 0x0000001fff097819 */ /* 0x004fe40000011403 */ /*0db0*/ IADD3 R6, P0, R3, R19, RZ ; /* 0x0000001303067210 */ /* 0x000fca0007f1e0ff */ /*0dc0*/ IMAD.X R7, R18, 0x1, R9, P0 ; /* 0x0000000112077824 */ /* 0x000fca00000e0609 */ /*0dd0*/ LD.E.U8 R6, [R6.64] ; /* 0x0000000406067980 */ /* 0x000ea2000c101100 */ /*0de0*/ BSSY B0, 0xeb0 ; /* 0x000000c000007945 */ /* 0x000fe20003800000 */ /*0df0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x004fda0003f05270 */ /*0e00*/ @P0 BRA 0xea0 ; /* 0x0000009000000947 */ /* 0x000fea0003800000 */ /*0e10*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0e20*/ LDG.E.64 R4, [R52.64] ; /* 0x0000000434047981 */ /* 0x000ea4000c1e1b00 */ /*0e30*/ LEA R4, P0, R3, R4, 0x2 ; /* 0x0000000403047211 */ /* 0x004fc800078010ff */ /*0e40*/ LEA.HI.X R5, R3, R5, R9, 0x2, P0 ; /* 0x0000000503057211 */ /* 0x000fca00000f1409 */ /*0e50*/ LD.E R4, [R4.64] ; /* 0x0000000404047980 */ /* 0x000ea2000c101900 */ /*0e60*/ IMAD.MOV.U32 R25, RZ, RZ, 0x1 ; /* 0x00000001ff197424 */ /* 0x000fe200078e00ff */ /*0e70*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x004fda0003f05270 */ /*0e80*/ @P0 BREAK B0 ; /* 0x0000000000000942 */ /* 0x000fe20003800000 */ /*0e90*/ @P0 BRA 0x1280 ; /* 0x000003e000000947 */ /* 0x000fea0003800000 */ /*0ea0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0eb0*/ IADD3 R27, R27, 0x1, RZ ; /* 0x000000011b1b7810 */ /* 0x000fc80007ffe0ff */ /*0ec0*/ ISETP.GE.AND P0, PT, R27, R2, PT ; /* 0x000000021b00720c */ /* 0x000fda0003f06270 */ /*0ed0*/ @!P0 BRA 0xd70 ; /* 0xfffffe9000008947 */ /* 0x000fea000383ffff */ /*0ee0*/ PRMT R25, RZ, 0x7610, R25 ; /* 0x00007610ff197816 */ /* 0x000fe20000000019 */ /*0ef0*/ BRA 0x1280 ; /* 0x0000038000007947 */ /* 0x000fea0003800000 */ /*0f00*/ ISETP.GE.AND P0, PT, R27, R2, PT ; /* 0x000000021b00720c */ /* 0x000fe40003f06270 */ /*0f10*/ PRMT R25, RZ, 0x7610, R25 ; /* 0x00007610ff197816 */ /* 0x000fd60000000019 */ /*0f20*/ @P0 BRA 0x1280 ; /* 0x0000035000000947 */ /* 0x000fea0003800000 */ /*0f30*/ IMAD.WIDE R36, R11, 0x8, R52 ; /* 0x000000080b247825 */ /* 0x020fc800078e0234 */ /*0f40*/ IMAD.MOV.U32 R24, RZ, RZ, RZ ; /* 0x000000ffff187224 */ /* 0x000fe400078e00ff */ /*0f50*/ IMAD.MOV.U32 R23, RZ, RZ, R27 ; /* 0x000000ffff177224 */ /* 0x000fc800078e001b */ /*0f60*/ IMAD.WIDE R4, R23, 0x4, R46 ; /* 0x0000000417047825 */ /* 0x000fe200078e022e */ /*0f70*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0f80*/ LDG.E R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000ea4000c1e1900 */ /*0f90*/ SHF.R.S32.HI R7, RZ, 0x1f, R3 ; /* 0x0000001fff077819 */ /* 0x004fe40000011403 */ /*0fa0*/ IADD3 R30, P0, R3, R19, RZ ; /* 0x00000013031e7210 */ /* 0x001fca0007f1e0ff */ /*0fb0*/ IMAD.X R31, R18, 0x1, R7, P0 ; /* 0x00000001121f7824 */ /* 0x000fca00000e0607 */ /*0fc0*/ LD.E.U8 R0, [R30.64] ; /* 0x000000041e007980 */ /* 0x000ea2000c101100 */ /*0fd0*/ BSSY B6, 0x1240 ; /* 0x0000026000067945 */ /* 0x000fe20003800000 */ /*0fe0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x004fda0003f05270 */ /*0ff0*/ @P0 BRA 0x1230 ; /* 0x0000023000000947 */ /* 0x000fea0003800000 */ /*1000*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*1010*/ LDG.E.64 R4, [R36.64] ; /* 0x0000000424047981 */ /* 0x000ea4000c1e1b00 */ /*1020*/ LEA R4, P0, R3, R4, 0x2 ; /* 0x0000000403047211 */ /* 0x004fc800078010ff */ /*1030*/ LEA.HI.X R5, R3, R5, R7, 0x2, P0 ; /* 0x0000000503057211 */ /* 0x000fca00000f1407 */ /*1040*/ LD.E R4, [R4.64] ; /* 0x0000000404047980 */ /* 0x000ea4000c101900 */ /*1050*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x004fda0003f05270 */ /*1060*/ @!P0 BRA 0x1230 ; /* 0x000001c000008947 */ /* 0x000fea0003800000 */ /*1070*/ IMAD.MOV.U32 R15, RZ, RZ, 0x1 ; /* 0x00000001ff0f7424 */ /* 0x000fe200078e00ff */ /*1080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*1090*/ MOV R25, 0x1 ; /* 0x0000000100197802 */ /* 0x000fe20000000f00 */ /*10a0*/ IMAD.MOV.U32 R4, RZ, RZ, R22 ; /* 0x000000ffff047224 */ /* 0x000fe200078e0016 */ /*10b0*/ IADD3 R5, R29, 0x1, RZ ; /* 0x000000011d057810 */ /* 0x000fe20007ffe0ff */ /*10c0*/ ST.E.U8 [R30.64], R15 ; /* 0x0000000f1e007985 */ /* 0x0001e2000c101104 */ /*10d0*/ IMAD.MOV.U32 R6, RZ, RZ, R19 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0013 */ /*10e0*/ MOV R20, 0x11c0 ; /* 0x000011c000147802 */ /* 0x000fe20000000f00 */ /*10f0*/ IMAD.MOV.U32 R7, RZ, RZ, R18 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0012 */ /*1100*/ STL.64 [R1], R16 ; /* 0x0000001001007387 */ /* 0x0003e20000100a00 */ /*1110*/ IMAD.MOV.U32 R8, RZ, RZ, R27 ; /* 0x000000ffff087224 */ /* 0x000fc400078e001b */ /*1120*/ IMAD.MOV.U32 R9, RZ, RZ, R2 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0002 */ /*1130*/ STL.64 [R1+0x8], R52 ; /* 0x0000083401007387 */ /* 0x0003e20000100a00 */ /*1140*/ IMAD.MOV.U32 R10, RZ, RZ, R46 ; /* 0x000000ffff0a7224 */ /* 0x000fe400078e002e */ /*1150*/ IMAD.MOV.U32 R11, RZ, RZ, R47 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e002f */ /*1160*/ IMAD.MOV.U32 R12, RZ, RZ, R44 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e002c */ /*1170*/ IMAD.MOV.U32 R13, RZ, RZ, R45 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e002d */ /*1180*/ IMAD.MOV.U32 R14, RZ, RZ, R38 ; /* 0x000000ffff0e7224 */ /* 0x000fc400078e0026 */ /*1190*/ IMAD.MOV.U32 R15, RZ, RZ, R39 ; /* 0x000000ffff0f7224 */ /* 0x001fe400078e0027 */ /*11a0*/ IMAD.MOV.U32 R21, RZ, RZ, 0x0 ; /* 0x00000000ff157424 */ /* 0x000fc800078e00ff */ /*11b0*/ CALL.REL.NOINC 0x8c0 ; /* 0xfffff70000007944 */ /* 0x002fea0003c3ffff */ /*11c0*/ PRMT R3, R4, 0x9910, RZ ; /* 0x0000991004037816 */ /* 0x000fc800000000ff */ /*11d0*/ LOP3.LUT R24, R24, R3, RZ, 0xfc, !PT ; /* 0x0000000318187212 */ /* 0x000fc800078efcff */ /*11e0*/ ISETP.NE.AND P0, PT, R24, 0x1, PT ; /* 0x000000011800780c */ /* 0x000fda0003f05270 */ /*11f0*/ @!P0 BREAK B6 ; /* 0x0000000000068942 */ /* 0x000fe20003800000 */ /*1200*/ @!P0 BRA 0x1280 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*1210*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*1220*/ ST.E.U8 [R30.64], RZ ; /* 0x000000ff1e007985 */ /* 0x0001e6000c101104 */ /*1230*/ BSYNC B6 ; /* 0x0000000000067941 */ /* 0x000fea0003800000 */ /*1240*/ IADD3 R23, R23, 0x1, RZ ; /* 0x0000000117177810 */ /* 0x000fc80007ffe0ff */ /*1250*/ ISETP.GE.AND P0, PT, R23, R2, PT ; /* 0x000000021700720c */ /* 0x000fda0003f06270 */ /*1260*/ @!P0 BRA 0xf60 ; /* 0xfffffcf000008947 */ /* 0x000fea000383ffff */ /*1270*/ PRMT R25, RZ, 0x7610, R25 ; /* 0x00007610ff197816 */ /* 0x000fe40000000019 */ /*1280*/ BSYNC B7 ; /* 0x0000000000077941 */ /* 0x000fea0003800000 */ /*1290*/ LDL R20, [R1+0x24] ; /* 0x0000240001147983 */ /* 0x0002a20000100800 */ /*12a0*/ BMOV.32 B6, R26 ; /* 0x0000001a06007356 */ /* 0x0007e20000000000 */ /*12b0*/ BMOV.32 B7, R28 ; /* 0x0000001c07007356 */ /* 0x0009e20000000000 */ /*12c0*/ LOP3.LUT R4, R25, 0xffff, RZ, 0xc0, !PT ; /* 0x0000ffff19047812 */ /* 0x000fe200078ec0ff */ /*12d0*/ LDL R21, [R1+0x28] ; /* 0x0000280001157983 */ /* 0x0002a80000100800 */ /*12e0*/ LDL R2, [R1+0x10] ; /* 0x0000100001027983 */ /* 0x0002a80000100800 */ /*12f0*/ LDL R16, [R1+0x14] ; /* 0x0000140001107983 */ /* 0x0002a80000100800 */ /*1300*/ LDL R17, [R1+0x18] ; /* 0x0000180001117983 */ /* 0x0002a80000100800 */ /*1310*/ LDL R18, [R1+0x1c] ; /* 0x00001c0001127983 */ /* 0x0002a80000100800 */ /*1320*/ LDL R19, [R1+0x20] ; /* 0x0000200001137983 */ /* 0x0002a80000100800 */ /*1330*/ LDL R22, [R1+0x2c] ; /* 0x00002c0001167983 */ /* 0x0002a80000100800 */ /*1340*/ LDL R23, [R1+0x30] ; /* 0x0000300001177983 */ /* 0x0002a80000100800 */ /*1350*/ LDL R24, [R1+0x34] ; /* 0x0000340001187983 */ /* 0x0002a80000100800 */ /*1360*/ LDL R25, [R1+0x38] ; /* 0x0000380001197983 */ /* 0x0002a80000100800 */ /*1370*/ LDL R26, [R1+0x3c] ; /* 0x00003c00011a7983 */ /* 0x0082a80000100800 */ /*1380*/ LDL R27, [R1+0x40] ; /* 0x00004000011b7983 */ /* 0x0002a80000100800 */ /*1390*/ LDL R28, [R1+0x44] ; /* 0x00004400011c7983 */ /* 0x0102a80000100800 */ /*13a0*/ LDL R29, [R1+0x48] ; /* 0x00004800011d7983 */ /* 0x0002a80000100800 */ /*13b0*/ LDL R30, [R1+0x4c] ; /* 0x00004c00011e7983 */ /* 0x0012a80000100800 */ /*13c0*/ LDL R31, [R1+0x50] ; /* 0x00005000011f7983 */ /* 0x0002a80000100800 */ /*13d0*/ LDL R36, [R1+0x54] ; /* 0x0000540001247983 */ /* 0x0002a80000100800 */ /*13e0*/ LDL R37, [R1+0x58] ; /* 0x0000580001257983 */ /* 0x0002a80000100800 */ /*13f0*/ LDL R38, [R1+0x5c] ; /* 0x00005c0001267983 */ /* 0x0002a80000100800 */ /*1400*/ LDL R39, [R1+0x60] ; /* 0x0000600001277983 */ /* 0x0002a80000100800 */ /*1410*/ LDL R44, [R1+0x64] ; /* 0x00006400012c7983 */ /* 0x0002a80000100800 */ /*1420*/ LDL R45, [R1+0x68] ; /* 0x00006800012d7983 */ /* 0x0002a80000100800 */ /*1430*/ LDL R46, [R1+0x6c] ; /* 0x00006c00012e7983 */ /* 0x0002a80000100800 */ /*1440*/ LDL R47, [R1+0x70] ; /* 0x00007000012f7983 */ /* 0x0002a80000100800 */ /*1450*/ LDL R52, [R1+0x74] ; /* 0x0000740001347983 */ /* 0x0202a80000100800 */ /*1460*/ LDL R53, [R1+0x78] ; /* 0x0000780001357983 */ /* 0x0002a40000100800 */ /*1470*/ IADD3 R1, R1, 0x80, RZ ; /* 0x0000008001017810 */ /* 0x002fe20007ffe0ff */ /*1480*/ RET.REL.NODEC R20 0x0 ; /* 0xffffeb7014007950 */ /* 0x004fec0003c3ffff */ /*1490*/ BRA 0x1490; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*14a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*14b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*14c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*14d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*14e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*14f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1500*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1510*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z7puttoidPiS_S_S_PbS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fca00078e00ff */ /*0040*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea8000c1e1900 */ /*0050*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0060*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002600 */ /*0070*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e680000002100 */ /*0080*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */ /* 0x000ee20000002200 */ /*0090*/ IMAD R0, R0, c[0x0][0x10], R5 ; /* 0x0000040000007a24 */ /* 0x001fc800078e0205 */ /*00a0*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */ /* 0x002fc800078e0207 */ /*00b0*/ IMAD R0, R0, c[0x0][0x4], R9 ; /* 0x0000010000007a24 */ /* 0x008fca00078e0209 */ /*00c0*/ ISETP.GE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x004fda0003f06270 */ /*00d0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00e0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */ /* 0x000fc800078e00ff */ /*00f0*/ IMAD.WIDE R2, R0, R7, c[0x0][0x170] ; /* 0x00005c0000027625 */ /* 0x000fca00078e0207 */ /*0100*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */ /* 0x000ea4000c1e1900 */ /*0110*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x004fda0003f05270 */ /*0120*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0130*/ IMAD.WIDE R6, R0, R7, c[0x0][0x160] ; /* 0x0000580000067625 */ /* 0x000fca00078e0207 */ /*0140*/ LDG.E R5, [R6.64] ; /* 0x0000000406057981 */ /* 0x000ea8000c1e1900 */ /*0150*/ LDG.E R4, [R6.64+0x4] ; /* 0x0000040406047981 */ /* 0x000ea2000c1e1900 */ /*0160*/ BSSY B0, 0x480 ; /* 0x0000031000007945 */ /* 0x000fe20003800000 */ /*0170*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*0180*/ IMAD.MOV.U32 R10, RZ, RZ, 0x1 ; /* 0x00000001ff0a7424 */ /* 0x000fe200078e00ff */ /*0190*/ ISETP.GE.AND P1, PT, R5, R4, PT ; /* 0x000000040500720c */ /* 0x004fda0003f26270 */ /*01a0*/ @P1 BRA 0x470 ; /* 0x000002c000001947 */ /* 0x000fea0003800000 */ /*01b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*01c0*/ MOV R10, 0x1 ; /* 0x00000001000a7802 */ /* 0x000fe40000000f00 */ /*01d0*/ SHF.R.S32.HI R12, RZ, 0x1f, R5 ; /* 0x0000001fff0c7819 */ /* 0x000fe40000011405 */ /*01e0*/ IADD3 R6, P1, R5, c[0x0][0x180], RZ ; /* 0x0000600005067a10 */ /* 0x000fc80007f3e0ff */ /*01f0*/ IADD3.X R7, R12, c[0x0][0x184], RZ, P1, !PT ; /* 0x000061000c077a10 */ /* 0x000fca0000ffe4ff */ /*0200*/ LDG.E.U8 R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ea2000c1e1100 */ /*0210*/ IMAD.MOV.U32 R9, RZ, RZ, R5 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0005 */ /*0220*/ IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105057810 */ /* 0x000fe20007ffe0ff */ /*0230*/ BSSY B1, 0x460 ; /* 0x0000022000017945 */ /* 0x000fe60003800000 */ /*0240*/ ISETP.GE.AND P1, PT, R5, R4, PT ; /* 0x000000040500720c */ /* 0x000fe40003f26270 */ /*0250*/ ISETP.NE.AND P2, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x004fda0003f45270 */ /*0260*/ @!P2 BRA 0x450 ; /* 0x000001e00000a947 */ /* 0x000fea0003800000 */ /*0270*/ LEA R8, P0, R9, c[0x0][0x178], 0x2 ; /* 0x00005e0009087a11 */ /* 0x000fc800078010ff */ /*0280*/ LEA.HI.X R9, R9, c[0x0][0x17c], R12, 0x2, P0 ; /* 0x00005f0009097a11 */ /* 0x000fca00000f140c */ /*0290*/ LDG.E R6, [R8.64] ; /* 0x0000000408067981 */ /* 0x000ea2000c1e1900 */ /*02a0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */ /* 0x000fc800078e00ff */ /*02b0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x004fcc00078e0207 */ /*02c0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x000ea4000c1e1900 */ /*02d0*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x004fda0003f05270 */ /*02e0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*02f0*/ IMAD.WIDE R6, R10, R7, RZ ; /* 0x000000070a067225 */ /* 0x000fc800078e02ff */ /*0300*/ IMAD R9, R7, 0x2717, RZ ; /* 0x0000271707097824 */ /* 0x000fe400078e02ff */ /*0310*/ IMAD.WIDE.U32 R6, R6, 0x2717, RZ ; /* 0x0000271706067825 */ /* 0x000fc800078e00ff */ /*0320*/ IMAD.IADD R7, R7, 0x1, R9 ; /* 0x0000000107077824 */ /* 0x000fc800078e0209 */ /*0330*/ IMAD.WIDE.U32 R8, R7, 0x4e5ace35, RZ ; /* 0x4e5ace3507087825 */ /* 0x000fcc00078e00ff */ /*0340*/ IMAD.WIDE.U32 R10, P0, R6, -0x79c85d5e, R8 ; /* 0x8637a2a2060a7825 */ /* 0x000fc80007800008 */ /*0350*/ IMAD.WIDE.U32 R8, R6.reuse, 0x4e5ace35, RZ ; /* 0x4e5ace3506087825 */ /* 0x040fe200078e00ff */ /*0360*/ IADD3 R12, P2, R6, R11, RZ ; /* 0x0000000b060c7210 */ /* 0x000fc80007f5e0ff */ /*0370*/ IADD3.X R13, RZ, R7, RZ, P0, P2 ; /* 0x00000007ff0d7210 */ /* 0x000fe400007e44ff */ /*0380*/ IADD3 RZ, P0, R9, R10, RZ ; /* 0x0000000a09ff7210 */ /* 0x000fe40007f1e0ff */ /*0390*/ ISETP.LT.AND P2, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fc60003f41270 */ /*03a0*/ IMAD.WIDE.U32.X R8, R7, -0x79c85d5e, R12, P0 ; /* 0x8637a2a207087825 */ /* 0x000fca00000e040c */ /*03b0*/ IADD3 R8, P0, -R6, R8, RZ ; /* 0x0000000806087210 */ /* 0x000fc80007f1e1ff */ /*03c0*/ IADD3.X R9, ~R7, R9, RZ, P0, !PT ; /* 0x0000000907097210 */ /* 0x000fe400007fe5ff */ /*03d0*/ IADD3 R11, P0, R8, -0x4e5ace35, RZ ; /* 0xb1a531cb080b7810 */ /* 0x000fc80007f1e0ff */ /*03e0*/ IADD3.X R10, R9, 0x79c85d5d, RZ, P0, !PT ; /* 0x79c85d5d090a7810 */ /* 0x000fe400007fe4ff */ /*03f0*/ SEL R7, R11, R8, P2 ; /* 0x000000080b077207 */ /* 0x000fe40001000000 */ /*0400*/ SEL R8, R10, R9, P2 ; /* 0x000000090a087207 */ /* 0x000fe40001000000 */ /*0410*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*0420*/ SHF.R.U64 R7, R7, 0x13, R8 ; /* 0x0000001307077819 */ /* 0x000fc80000001208 */ /*0430*/ LEA.HI R7, R8, R7, RZ, 0x1 ; /* 0x0000000708077211 */ /* 0x000fca00078f08ff */ /*0440*/ IMAD R10, R7, -0xf4243, R6 ; /* 0xfff0bdbd070a7824 */ /* 0x000fe400078e0206 */ /*0450*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0460*/ @!P1 BRA 0x1d0 ; /* 0xfffffd6000009947 */ /* 0x000fea000383ffff */ /*0470*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0480*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0490*/ IMAD.MOV.U32 R6, RZ, RZ, 0x4 ; /* 0x00000004ff067424 */ /* 0x000fc800078e00ff */ /*04a0*/ IMAD.WIDE R4, R10, R6, c[0x0][0x188] ; /* 0x000062000a047625 */ /* 0x000fcc00078e0206 */ /*04b0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea4000c1e1900 */ /*04c0*/ IMAD.WIDE R6, R5, R6, c[0x0][0x190] ; /* 0x0000640005067625 */ /* 0x004fe400078e0206 */ /*04d0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe8000c101904 */ /*04e0*/ STG.E [R6.64], R0 ; /* 0x0000000006007986 */ /* 0x000fe2000c101904 */ /*04f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0500*/ BRA 0x500; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0510*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0580*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0590*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z7setdeg1PiS_S_Pb .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ MOV R3, c[0x0][0x16c] ; /* 0x00005b0000037a02 */ /* 0x000fe20000000f00 */ /*0020*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0040*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea8000c1e1900 */ /*0050*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0060*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002600 */ /*0070*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e680000002100 */ /*0080*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */ /* 0x000ee20000002200 */ /*0090*/ IMAD R0, R0, c[0x0][0x10], R5 ; /* 0x0000040000007a24 */ /* 0x001fc800078e0205 */ /*00a0*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */ /* 0x002fc800078e0207 */ /*00b0*/ IMAD R0, R0, c[0x0][0x4], R9 ; /* 0x0000010000007a24 */ /* 0x008fca00078e0209 */ /*00c0*/ ISETP.GE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x004fda0003f06270 */ /*00d0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00e0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*00f0*/ IMAD.WIDE R2, R0, R5, c[0x0][0x170] ; /* 0x00005c0000027625 */ /* 0x000fca00078e0205 */ /*0100*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */ /* 0x000ea4000c1e1900 */ /*0110*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x004fda0003f05270 */ /*0120*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0130*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x000fca00078e0205 */ /*0140*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */ /* 0x000ea8000c1e1900 */ /*0150*/ LDG.E R7, [R4.64+0x4] ; /* 0x0000040404077981 */ /* 0x000ea2000c1e1900 */ /*0160*/ BSSY B0, 0x220 ; /* 0x000000b000007945 */ /* 0x000fe20003800000 */ /*0170*/ ISETP.GE.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x004fda0003f06270 */ /*0180*/ @P0 BRA 0x210 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*0190*/ IADD3 R4, P0, R0, c[0x0][0x178], RZ ; /* 0x00005e0000047a10 */ /* 0x000fc80007f1e0ff */ /*01a0*/ LEA.HI.X.SX32 R5, R0, c[0x0][0x17c], 0x1, P0 ; /* 0x00005f0000057a11 */ /* 0x000fca00000f0eff */ /*01b0*/ LDG.E.U8 R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea4000c1e1100 */ /*01c0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x004fda0003f05270 */ /*01d0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*01e0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fc80007ffe0ff */ /*01f0*/ ISETP.GE.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x000fda0003f06270 */ /*0200*/ @!P0 BRA 0x190 ; /* 0xffffff8000008947 */ /* 0x000fea000383ffff */ /*0210*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0220*/ MOV R5, 0x1 ; /* 0x0000000100057802 */ /* 0x000fca0000000f00 */ /*0230*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*0240*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0250*/ BRA 0x250; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z8findhashPiS_S_S_PbS0_S_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fca00078e00ff */ /*0040*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea8000c1e1900 */ /*0050*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0060*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002600 */ /*0070*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e680000002100 */ /*0080*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */ /* 0x000ee20000002200 */ /*0090*/ IMAD R0, R0, c[0x0][0x10], R5 ; /* 0x0000040000007a24 */ /* 0x001fc800078e0205 */ /*00a0*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */ /* 0x002fc800078e0207 */ /*00b0*/ IMAD R0, R0, c[0x0][0x4], R9 ; /* 0x0000010000007a24 */ /* 0x008fca00078e0209 */ /*00c0*/ ISETP.GE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x004fda0003f06270 */ /*00d0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00e0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*00f0*/ IMAD.WIDE R2, R0, R5, c[0x0][0x170] ; /* 0x00005c0000027625 */ /* 0x000fcc00078e0205 */ /*0100*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea4000c1e1900 */ /*0110*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x004fda0003f05270 */ /*0120*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0130*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fca00078e0205 */ /*0140*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */ /* 0x000ea8000c1e1900 */ /*0150*/ LDG.E R0, [R2.64+0x4] ; /* 0x0000040402007981 */ /* 0x000ea2000c1e1900 */ /*0160*/ BSSY B0, 0x600 ; /* 0x0000049000007945 */ /* 0x000fe20003800000 */ /*0170*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*0180*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1 ; /* 0x00000001ff097424 */ /* 0x000fe200078e00ff */ /*0190*/ MOV R8, 0x1 ; /* 0x0000000100087802 */ /* 0x000fe40000000f00 */ /*01a0*/ ISETP.GE.AND P1, PT, R5, R0, PT ; /* 0x000000000500720c */ /* 0x004fda0003f26270 */ /*01b0*/ @P1 BRA 0x5f0 ; /* 0x0000043000001947 */ /* 0x000fea0003800000 */ /*01c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*01d0*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0005 */ /*01e0*/ MOV R8, 0x1 ; /* 0x0000000100087802 */ /* 0x000fe20000000f00 */ /*01f0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1 ; /* 0x00000001ff097424 */ /* 0x000fc600078e00ff */ /*0200*/ SHF.R.S32.HI R7, RZ, 0x1f, R3 ; /* 0x0000001fff077819 */ /* 0x000fe40000011403 */ /*0210*/ IADD3 R4, P1, R3, c[0x0][0x188], RZ ; /* 0x0000620003047a10 */ /* 0x000fc80007f3e0ff */ /*0220*/ IADD3.X R5, R7, c[0x0][0x18c], RZ, P1, !PT ; /* 0x0000630007057a10 */ /* 0x000fca0000ffe4ff */ /*0230*/ LDG.E.U8 R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea2000c1e1100 */ /*0240*/ IMAD.MOV.U32 R2, RZ, RZ, R3 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0003 */ /*0250*/ IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103037810 */ /* 0x000fe20007ffe0ff */ /*0260*/ BSSY B1, 0x5e0 ; /* 0x0000037000017945 */ /* 0x000fe60003800000 */ /*0270*/ ISETP.GE.AND P1, PT, R3, R0, PT ; /* 0x000000000300720c */ /* 0x000fe40003f26270 */ /*0280*/ ISETP.NE.AND P2, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x004fda0003f45270 */ /*0290*/ @!P2 BRA 0x5d0 ; /* 0x000003300000a947 */ /* 0x000fea0003800000 */ /*02a0*/ LEA R6, P0, R2, c[0x0][0x178], 0x2 ; /* 0x00005e0002067a11 */ /* 0x000fc800078010ff */ /*02b0*/ LEA.HI.X R7, R2, c[0x0][0x17c], R7, 0x2, P0 ; /* 0x00005f0002077a11 */ /* 0x000fca00000f1407 */ /*02c0*/ LDG.E R4, [R6.64] ; /* 0x0000000406047981 */ /* 0x000ea2000c1e1900 */ /*02d0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*02e0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x004fcc00078e0205 */ /*02f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea4000c1e1900 */ /*0300*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x004fda0003f05270 */ /*0310*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0320*/ IMAD.WIDE R6, R8, R4, RZ ; /* 0x0000000408067225 */ /* 0x000fc800078e02ff */ /*0330*/ IMAD.WIDE R4, R9, R4, RZ ; /* 0x0000000409047225 */ /* 0x000fc800078e02ff */ /*0340*/ IMAD R11, R5, 0x186a3, RZ ; /* 0x000186a3050b7824 */ /* 0x000fe400078e02ff */ /*0350*/ IMAD R9, R7, 0x2717, RZ ; /* 0x0000271707097824 */ /* 0x000fe400078e02ff */ /*0360*/ IMAD.WIDE.U32 R4, R4, 0x186a3, RZ ; /* 0x000186a304047825 */ /* 0x000fc800078e00ff */ /*0370*/ IMAD.WIDE.U32 R6, R6, 0x2717, RZ ; /* 0x0000271706067825 */ /* 0x000fe200078e00ff */ /*0380*/ IADD3 R5, R5, R11, RZ ; /* 0x0000000b05057210 */ /* 0x000fc60007ffe0ff */ /*0390*/ IMAD.IADD R7, R7, 0x1, R9 ; /* 0x0000000107077824 */ /* 0x000fe400078e0209 */ /*03a0*/ IMAD.WIDE.U32 R12, R5, 0x2cbbdc79, RZ ; /* 0x2cbbdc79050c7825 */ /* 0x000fc800078e00ff */ /*03b0*/ IMAD.WIDE.U32 R8, R7, 0x4e5ace35, RZ ; /* 0x4e5ace3507087825 */ /* 0x000fc800078e00ff */ /*03c0*/ IMAD.WIDE.U32 R16, P3, R4, -0x79c9886c, R12 ; /* 0x8636779404107825 */ /* 0x000fc8000786000c */ /*03d0*/ IMAD.WIDE.U32 R10, P0, R6, -0x79c85d5e, R8 ; /* 0x8637a2a2060a7825 */ /* 0x000fe20007800008 */ /*03e0*/ IADD3 R18, P4, R4, R17, RZ ; /* 0x0000001104127210 */ /* 0x000fc60007f9e0ff */ /*03f0*/ IMAD.WIDE.U32 R8, R6.reuse, 0x4e5ace35, RZ ; /* 0x4e5ace3506087825 */ /* 0x040fe200078e00ff */ /*0400*/ IADD3 R12, P2, R6, R11, RZ ; /* 0x0000000b060c7210 */ /* 0x000fe40007f5e0ff */ /*0410*/ IADD3.X R19, RZ, R5, RZ, P3, P4 ; /* 0x00000005ff137210 */ /* 0x000fe20001fe84ff */ /*0420*/ IMAD.WIDE.U32 R14, R4, 0x2cbbdc79, RZ ; /* 0x2cbbdc79040e7825 */ /* 0x000fe200078e00ff */ /*0430*/ IADD3.X R13, RZ, R7, RZ, P0, P2 ; /* 0x00000007ff0d7210 */ /* 0x000fe400007e44ff */ /*0440*/ IADD3 RZ, P0, R9, R10, RZ ; /* 0x0000000a09ff7210 */ /* 0x000fe40007f1e0ff */ /*0450*/ IADD3 RZ, P2, R15, R16, RZ ; /* 0x000000100fff7210 */ /* 0x000fe40007f5e0ff */ /*0460*/ ISETP.LT.AND P4, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fe20003f81270 */ /*0470*/ IMAD.WIDE.U32.X R8, R7, -0x79c85d5e, R12, P0 ; /* 0x8637a2a207087825 */ /* 0x000fc800000e040c */ /*0480*/ IMAD.WIDE.U32.X R10, R5, -0x79c9886c, R18, P2 ; /* 0x86367794050a7825 */ /* 0x000fe200010e0412 */ /*0490*/ IADD3 R2, P0, -R6, R8, RZ ; /* 0x0000000806027210 */ /* 0x000fc80007f1e1ff */ /*04a0*/ IADD3 R10, P2, -R4, R10, RZ ; /* 0x0000000a040a7210 */ /* 0x000fe20007f5e1ff */ /*04b0*/ IMAD.X R8, R9, 0x1, ~R7, P0 ; /* 0x0000000109087824 */ /* 0x000fe200000e0e07 */ /*04c0*/ IADD3 R9, P0, R2, -0x4e5ace35, RZ ; /* 0xb1a531cb02097810 */ /* 0x000fe40007f1e0ff */ /*04d0*/ IADD3 R13, P3, R10, -0x2cbbdc79, RZ ; /* 0xd34423870a0d7810 */ /* 0x000fe20007f7e0ff */ /*04e0*/ IMAD.X R11, R11, 0x1, ~R5, P2 ; /* 0x000000010b0b7824 */ /* 0x000fe200010e0e05 */ /*04f0*/ ISETP.LT.AND P2, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f41270 */ /*0500*/ IADD3.X R7, R8, 0x79c85d5d, RZ, P0, !PT ; /* 0x79c85d5d08077810 */ /* 0x000fe400007fe4ff */ /*0510*/ IADD3.X R12, R11, 0x79c9886b, RZ, P3, !PT ; /* 0x79c9886b0b0c7810 */ /* 0x000fc40001ffe4ff */ /*0520*/ SEL R5, R9, R2, P2 ; /* 0x0000000209057207 */ /* 0x000fe40001000000 */ /*0530*/ SEL R9, R13, R10, P4 ; /* 0x0000000a0d097207 */ /* 0x000fe40002000000 */ /*0540*/ SEL R8, R7, R8, P2 ; /* 0x0000000807087207 */ /* 0x000fe40001000000 */ /*0550*/ SEL R2, R12, R11, P4 ; /* 0x0000000b0c027207 */ /* 0x000fe40002000000 */ /*0560*/ SHF.R.U64 R5, R5, 0x13, R8 ; /* 0x0000001305057819 */ /* 0x000fe40000001208 */ /*0570*/ SHF.R.U64 R9, R9, 0x13, R2 ; /* 0x0000001309097819 */ /* 0x000fc40000001202 */ /*0580*/ LEA.HI R5, R8, R5, RZ, 0x1 ; /* 0x0000000508057211 */ /* 0x000fe400078f08ff */ /*0590*/ LEA.HI R9, R2, R9, RZ, 0x1 ; /* 0x0000000902097211 */ /* 0x000fe400078f08ff */ /*05a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f070 */ /*05b0*/ IMAD R8, R5, -0xf4243, R6 ; /* 0xfff0bdbd05087824 */ /* 0x000fe400078e0206 */ /*05c0*/ IMAD R9, R9, -0xf4265, R4 ; /* 0xfff0bd9b09097824 */ /* 0x000fca00078e0204 */ /*05d0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*05e0*/ @!P1 BRA 0x200 ; /* 0xfffffc1000009947 */ /* 0x000fea000383ffff */ /*05f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0600*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0610*/ IMAD.MOV.U32 R4, RZ, RZ, 0x4 ; /* 0x00000004ff047424 */ /* 0x000fe200078e00ff */ /*0620*/ MOV R7, 0x1 ; /* 0x0000000100077802 */ /* 0x000fe20000000f00 */ /*0630*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff0a7624 */ /* 0x000fe400078e00ff */ /*0640*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff0b7624 */ /* 0x000fc400078e00ff */ /*0650*/ IMAD.WIDE R2, R8, R4, c[0x0][0x190] ; /* 0x0000640008027625 */ /* 0x000fc600078e0204 */ /*0660*/ STG.E.U8 [R10.64], RZ ; /* 0x000000ff0a007986 */ /* 0x000fe2000c101104 */ /*0670*/ IMAD.WIDE R4, R9, R4, c[0x0][0x198] ; /* 0x0000660009047625 */ /* 0x000fc600078e0204 */ /*0680*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x000fe8000c101904 */ /*0690*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x000fe2000c101904 */ /*06a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*06b0*/ BRA 0x6b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*06c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0700*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0710*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0720*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0730*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0740*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0750*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0760*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0770*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <hip/hip_runtime.h> #include <stdlib.h> #include <thrust/scan.h> #include <thrust/device_vector.h> #include <thrust/count.h> const int BASE1 = 10000 + 7; const int BASE2 = 100000 + 3; const int MOD1 = 1000000 + 3; const int MOD2 = 1000000 + 37; __global__ void findhash(int *d_qvert,int *d_qverc,int *d_qvid,int *d_qelist,bool *d_over,bool *d_qtree,int *d_hash1,int *d_hash2) { int i; int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=d_qverc[0]) return ; if(d_qvid[ver]!=0) return; int l=d_qvert[ver+1]; int hash1=1,hash2=1; int flag=0; for(i=d_qvert[ver];i<l;i++) { int m=d_qelist[i]; bool treeedge=d_qtree[i]; if(treeedge){ int tt=d_qvid[m]; if(tt==0) return; flag=1; hash1=(hash1*1L*BASE1)*tt % MOD1; hash2=(hash2*1L*BASE2)*tt % MOD2; } } if(flag==0) return; if(flag==1){ *d_over=false; d_hash1[hash1]=1; d_hash2[hash2]=1; } } __global__ void setdeg1(int *d_qvert,int *d_qverc,int *d_qvid,bool *d_qtree) { int i; int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=d_qverc[0]) return ; if(d_qvid[ver]!=0) return; int l=d_qvert[ver+1]; bool treeedge; for(i=d_qvert[ver];i<l;i++) { treeedge=d_qtree[i]; if(treeedge) return; } //printf("%d %d\n",ver,i); d_qvid[ver]=1; } /*__global__ void alignhash(bool *d_hash1,bool *d_hash2) { int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=1000038) return ; if(d_hash1[ver] || d_hash2[ver]){ d_hash1=true; } }*/ __global__ void puttoid(int *d_qvert,int *d_qverc,int *d_qvid,int *d_qelist,bool *d_qtree,int *d_loc,int * d_qidtov) { int i; int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=d_qverc[0]) return ; if(d_qvid[ver]!=0) return; int l=d_qvert[ver+1]; int hash1=1,hash2=1; int flag=0; for(i=d_qvert[ver];i<l;i++) { int m=d_qelist[i]; bool treeedge=d_qtree[i]; if(treeedge){ int tt=d_qvid[m]; if(tt==0) return; flag=1; hash1=(hash1*1L*BASE1)*tt % MOD1; hash2=(hash2*1L*BASE2)*tt % MOD2; } } //printf("%d %d %d \n",ver,flag,d_loc[hash1]); if(flag==0) return; int id=d_loc[hash1]; d_qvid[ver]=id; d_qidtov[id]=ver; } __device__ bool chechall(int ver,bool *check,int i,int dfrom,int dto,int *d_delist,int *d_qelist,int *d_qvid,int qfrom,int qto,int ** d_dcvslist){ //int ql=qfrom-qto; int ql=qto-qfrom; int j,k,l; //d_dcvslist[2][ql]=true; if(i==ql){ k=d_qelist[i+qfrom-1]; k=d_qvid[k]; if(k>=d_qvid[ver]) return true; for(j=dfrom;j<dto;j++){ l=d_delist[j]; if(check[l]) continue; if(!d_dcvslist[k][l]) continue; return true; } } else{ int res=false; k=d_qelist[i+qfrom-1]; k=d_qvid[k]; if(k>=d_qvid[ver]) return chechall(ver,check,i+1,dfrom,dto,d_delist,d_qelist,d_qvid,qfrom,qto,d_dcvslist); for(j=dfrom;j<dto;j++){ l=d_delist[j]; if(check[l]) continue; if(!d_dcvslist[k][l]) continue; check[l]=true; res|=chechall(ver,check,i+1,dfrom,dto,d_delist,d_qelist,d_qvid,qfrom,qto,d_dcvslist); if(res==true) return true; check[l]=false; } } return false; } __global__ void findcvs(int ver,int *d_dvert,int *d_dverc,int *d_delist,int *d_qvert,int *d_qelist,int *d_qvid,int ** d_dcvslist ) { //int i; int dver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(dver>=d_dverc[0]) return ; int ql=d_qvert[ver+1]-d_qvert[ver]; int dl=d_dvert[dver+1]-d_dvert[dver]; if(ql>dl) return; bool *checked=(bool*)malloc(sizeof(bool)*d_dverc[0]); //bool *checked=new bool[d_dverc[0]]; memset(checked,false,sizeof(bool)*d_dverc[0]); //chechall(bool *check,int i,int dfrom,int dto,int *d_delist,int *d_qelist,int *d_qvid,int qfrom,int qto,bool ** d_dcvslist) if(chechall(ver,checked,1,d_dvert[dver],d_dvert[dver+1],d_delist,d_qelist,d_qvid,d_qvert[ver],d_qvert[ver+1],d_dcvslist)) d_dcvslist[d_qvid[ver]][dver]=true; free(checked); } __global__ void puttolist(int *d_dverc,int *d_loc,int * d_dcvslist ) { int dver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(dver>=d_dverc[0]) return ; if(d_loc[dver]!=d_loc[dver+1]) d_dcvslist[d_loc[dver]]=dver; } __global__ void checkperm(bool *found,int * qdmap,int * d_qverc,int * d_qelist,int * d_qvert,int * d_dvert,int *d_delist){ int i; //found[0]=false; int ver=threadIdx.x*blockDim.y+threadIdx.y+blockDim.x*blockDim.y*(blockIdx.x*gridDim.y+blockIdx.y); if(ver>=d_qverc[0]) return ; int n,p,j,k,flag=0; //for(ver=0;ver<d_qverc[0];ver++){ int l=d_qvert[ver+1]; int dver=qdmap[ver]; n=d_dvert[dver+1]; for(i=d_qvert[ver];i<l;i++) { flag=0; j=d_qelist[i]; p=d_dvert[dver]; k=qdmap[j]; for(;p<n;p++){ if(k==d_delist[p]){ flag=1; break; } } if(!flag){ *found=false; return; } } //} } __global__ void findall(int *d_mapans,int *d_cans,int *d_qvid,int * d_qverc,int * d_qelist,int * d_qvert,int * d_dvert,int *d_delist,int ** d_cvsverlist,int * d_size_cvs) { bool found[1]={true}; long long int blockId = blockIdx.x + blockIdx.y * gridDim.x + gridDim.x * gridDim.y * blockIdx.z; long long int threadId = blockId * (blockDim.x * blockDim.y * blockDim.z) + (threadIdx.z * (blockDim.x * blockDim.y)) + (threadIdx.y * blockDim.x) + threadIdx.x; int i=0; long long int indexperm=threadId; for(i=0;i<d_qverc[0];i++){ int j=d_qvid[i]; indexperm/=d_size_cvs[j]; } if(indexperm) return; indexperm=threadId; int *d_qdmap=&d_mapans[d_qverc[0]*threadId];//new int[d_qverc[0]]; for(i=0;i<d_qverc[0];i++){ int j=d_qvid[i]; d_qdmap[i]=d_cvsverlist[j][indexperm%d_size_cvs[j]]; indexperm/=d_size_cvs[j]; } //dim3 blocks((max/16 )+ 1,(max/16)+1); //dim3 threads(16,16); //found[0]=true; //checkperm<<<blocks,threads>>> (found,d_qdmap,d_qverc,d_qelist,d_qvert,d_dvert,d_delist); int n,p,j,k,flag=0,ver; for(ver=0;ver<d_qverc[0];ver++){ int l=d_qvert[ver+1]; int dver=d_qdmap[ver]; n=d_dvert[dver+1]; for(i=d_qvert[ver];i<l;i++) { flag=0; j=d_qelist[i]; p=d_dvert[dver]; k=d_qdmap[j]; for(;p<n;p++){ if(k==d_delist[p]){ flag=1; break; } } if(!flag){ *found=false; return; } } } if(found[0]){ d_cans[threadId]=1; //printf("%d ", threadId); } //delete d_qdmap; } int * qdmap; int *d_qverc,*d_dverc; int *d_qvid,*d_qidtov,*h_qidtov,*h_qvid; int *d_qvert,*d_qelist,*d_dvert,*d_delist;//,*d_dvelist,*d_qvelist; bool *d_qtree,*d_over; int *d_qdmap; bool h_over; /*void callforallperm(bool * check,int ** cvslist,int i,int max,int dmax){ int j,k,l; l=h_qvid[i-1]; //printf("i%d %di",i,l); if(i==max){ for(j=0;j<dmax;j++) if(cvslist[l][j] && !check[j]){ qdmap[i-1]=j; dim3 blocks((max/16 )+ 1,(max/16)+1); dim3 threads(16,16); h_over=true; //for(k=0;k<max;k++) // printf("%d ",qdmap[k]); cudaMemcpy(d_over, &h_over, sizeof(bool), cudaMemcpyHostToDevice) ; cudaMemcpy(d_qdmap, qdmap, sizeof(int)*(max+1), cudaMemcpyHostToDevice); checkperm<<<blocks,threads>>> (d_over,d_qdmap,d_qverc,d_qelist,d_qvert,d_dvert,d_delist); //checkperm(bool *found,int * qdmap,int * d_qverc,int * d_qelist,int * d_qvert,int * d_dvert,int *d_delist) cudaError_t err = cudaGetLastError(); if(err!=cudaSuccess) { printf("Error: %s\n", cudaGetErrorString(err)); printf("Not Ok"); } cudaMemcpy(&h_over, d_over, sizeof(bool), cudaMemcpyDeviceToHost) ; if(h_over){ for(k=0;k<max;k++) printf("%d ",qdmap[k]); //printf("\n"); printf("OK\n"); } //printf("\n"); } } else{ for(j=0;j<dmax;j++){ //printf("%d %d %d\n",j,check[j],cvslist[l][j]); if(cvslist[l][j] && !check[j]){ check[j]=true; qdmap[i-1]=j; callforallperm(check,cvslist,i+1,max,dmax); check[j]=false; } } } }*/ int main(int argc, char **argv) { int deviceId = 4; hipSetDevice(deviceId); int h_qverc,h_dverc; int *h_qvert,*h_qelist,*h_dvert,*h_delist;//,*h_dvelist,*h_qvelist; bool *h_qtree; int *d_hash1,*d_hash2; int i,j; int **h_cvslist,**d_cvslist,**h_tem; scanf("%d",&h_qverc); h_qvert=(int *)malloc(sizeof(int)*(h_qverc+1)); h_qvid=(int *)malloc(sizeof(int)*(h_qverc+1)); h_qidtov=(int *)malloc(sizeof(int)*(h_qverc+1)); h_tem=(int **)malloc(sizeof(int*)*(h_qverc+1)); h_cvslist=(int **)malloc(sizeof(int*)*(h_qverc+1)); for(i=0;i<=h_qverc;i++){ scanf("%d",&h_qvert[i]); } h_qelist=(int *)malloc(sizeof(int)*h_qvert[h_qverc]); for(i=0;i<h_qvert[h_qverc];i++) scanf("%d",&h_qelist[i]); h_qtree=(bool *)malloc(sizeof(bool)*h_qvert[h_qverc]); for(i=0;i<h_qvert[h_qverc];i++){ scanf("%d",&j); if(j==1) h_qtree[i]=true; else h_qtree[i]=false; } scanf("%d",&h_dverc); h_dvert=(int *)malloc(sizeof(int)*(h_dverc+1)); for(i=0;i<=h_dverc;i++){ scanf("%d",&h_dvert[i]); } for(i=0;i<=h_qverc;i++) h_cvslist[i]=(int *)malloc(sizeof(int)*(h_dverc+1)); h_delist=(int *)malloc(sizeof(int)*h_dvert[h_dverc]); for(i=0;i<h_dvert[h_dverc];i++) scanf("%d",&h_delist[i]); hipMalloc(&d_qverc,sizeof(int)); hipMalloc(&d_over,sizeof(bool)); hipMalloc(&d_qvert,sizeof(int)*(h_qverc+1)); hipMalloc(&d_qidtov,sizeof(int)*(h_qverc+1)); //cudaMalloc(&d_loc,sizeof(int)*(h_qverc+1)); hipMalloc(&d_qelist,sizeof(int)*h_qvert[h_qverc]); hipMalloc(&d_qtree,sizeof(bool)*h_qvert[h_qverc]); hipMalloc(&d_hash1,sizeof(int)*1000038); hipMalloc(&d_hash2,sizeof(int)*1000038); hipMalloc(&d_qvid,sizeof(int)*(h_qverc+1)); hipMemcpy(d_qverc,&h_qverc,sizeof(int),hipMemcpyHostToDevice); hipMemcpy(d_qvert,h_qvert,sizeof(int)*(h_qverc+1),hipMemcpyHostToDevice); hipMemcpy(d_qelist,h_qelist,sizeof(int)*h_qvert[h_qverc],hipMemcpyHostToDevice); hipMemcpy(d_qtree,h_qtree,sizeof(bool)*h_qvert[h_qverc],hipMemcpyHostToDevice); hipMemset(d_hash1,0,sizeof(int)*1000038); hipMemset(d_hash2,0,sizeof(int)*1000038); //cudaMemset(d_loc,0,sizeof(int)*(h_qverc+1)); hipMemset(d_qidtov,-1,sizeof(int)*(h_qverc+1)); hipMemset(d_qvid,0,sizeof(int)*(h_qverc+1)); int *h_hash1=(int *)malloc(sizeof(int)*1000038); int *h_hash2=(int *)malloc(sizeof(int)*1000038); dim3 blocks((sqrt(h_qverc)/16 )+ 1,(sqrt(h_qverc)/16)+1); dim3 threads(16,16); //int *d_qvert,int *d_dverc,int *d_qvid,int *d_qelist,bool *d_over,bool *d_hash1,bool *d_hash2) h_over=true; //h_qvid[1]=1; //h_qvid[3]=1; //cudaMemcpy(d_qvid,h_qvid,sizeof(int)*(h_qverc+1),cudaMemcpyHostToDevice); //printf("qt%d %dqt\n",h_qtree[0],h_qtree[1]); setdeg1<<<blocks,threads>>>(d_qvert,d_qverc,d_qvid,d_qtree); h_over=false; int maxval=2; while(!h_over) { h_over=true; hipMemcpy(d_over, &h_over, sizeof(bool), hipMemcpyHostToDevice) ; hipMemset(d_hash1,0,sizeof(int)*1000038); findhash <<<blocks,threads>>> (d_qvert,d_qverc,d_qvid,d_qelist,d_over,d_qtree,d_hash1,d_hash2); //(int *d_qvert,int *d_dverc,int *d_qvid,int *d_qelist,bool *d_over,bool *d_hash1,bool *d_qtree,bool *d_hash2) hipError_t err = hipGetLastError(); if(err!=hipSuccess) { printf("Error: %s\n", hipGetErrorString(err)); printf("Not Ok"); } hipMemcpy(h_hash1,d_hash1,sizeof(int)*1000038,hipMemcpyDeviceToHost); h_hash1[0]+=maxval; thrust::exclusive_scan(h_hash1,h_hash1+1000038,h_hash1); maxval=h_hash1[1000037]; hipMemcpy(d_hash1,h_hash1,sizeof(int)*1000038,hipMemcpyHostToDevice); puttoid<<<blocks,threads>>>(d_qvert,d_qverc,d_qvid,d_qelist,d_qtree,d_hash1,d_qidtov); /// cudaMemcpy(h_hash2,d_hash2,sizeof(bool)*1000038,cudaMemcpyDeviceToHost); hipMemcpy(&h_over, d_over, sizeof(bool), hipMemcpyDeviceToHost) ; //printf("over flag:%d ",h_over); /*for(i=0;i<h_qverc;i++){ //if() printf("%d ",h_qvid[i]); // if(h_hash2[i]) // printf("h2 %d ",i); // if(h_hash1[i] || h_hash2[i]) // printf("\n"); } printf("\n");*/ } hipMemcpy(h_qvid,d_qvid,sizeof(int)*h_qverc,hipMemcpyDeviceToHost); hipMemcpy(h_qidtov,d_qidtov,sizeof(int)*(h_qverc+1),hipMemcpyDeviceToHost); for(i=0;i<=h_qverc;i++){ printf("%d ",h_qidtov[i]); } printf("\n"); for(i=0;i<=h_qverc;i++){ printf("%d ",h_qvid[i]); } printf("\n"); hipFree(d_qtree); hipFree(d_hash1); hipFree(d_hash2); free(h_hash1); free(h_hash2); free(h_qtree); hipMalloc(&d_cvslist,sizeof(int*)*(h_qverc+1)); for(i=0;i<=h_qverc;i++){ hipMalloc(&h_tem[i],sizeof(int)*(h_dverc+1)); hipMemset(h_tem[i],0,sizeof(int)*(h_dverc+1)); } hipMemset(h_tem[1],1,sizeof(int)*(h_dverc+1)); hipMemcpy(d_cvslist,h_tem,sizeof(int*)*(h_qverc+1),hipMemcpyHostToDevice); hipMalloc(&d_dvert,sizeof(int)*(h_dverc+1)); hipMalloc(&d_dverc,sizeof(int)); hipMalloc(&d_delist,sizeof(int)*h_dvert[h_dverc]); hipMemcpy(d_dverc,&h_dverc,sizeof(int),hipMemcpyHostToDevice); hipMemcpy(d_dvert,h_dvert,sizeof(int)*(h_dverc+1),hipMemcpyHostToDevice); hipMemcpy(d_delist,h_delist,sizeof(int)*h_dvert[h_dverc],hipMemcpyHostToDevice); dim3 dblocks((sqrt(h_dverc)/16 )+ 1,(sqrt(h_dverc)/16)+1); dim3 dthreads(16,16); int **d_cvsverlist,**d_temverlist; int *d_size_cvs,*h_size_cvs; memset(h_cvslist[1],1,sizeof(int)*(h_dverc+1)); h_size_cvs=(int *)malloc(sizeof(int)*(h_qverc+1)); memset(h_size_cvs,0,sizeof(int)*(h_qverc+1)); hipMalloc(&d_size_cvs,sizeof(int)*(h_qverc+1)); hipMemset(d_size_cvs,0,sizeof(int)*(h_qverc+1)); hipMalloc(&d_cvsverlist,sizeof(int*)*(h_qverc+1)); d_temverlist=(int **)malloc(sizeof(int*)*(h_qverc+1)); for(i=0;i<=h_qverc;i++){ hipMalloc(&d_temverlist[i],sizeof(int)*(h_dverc+1)); hipMemset(d_temverlist[i],0,sizeof(int)*(h_dverc+1)); } hipMemcpy(d_cvsverlist,d_temverlist,sizeof(int*)*(h_qverc+1),hipMemcpyHostToDevice); long long int totalthreads=1; for(i=0;i<h_dverc;i++) h_cvslist[1][i]=i; hipMemcpy(d_temverlist[1],h_cvslist[1],sizeof(int)*(h_dverc+1),hipMemcpyHostToDevice); h_size_cvs[1]=h_dverc; for(i=0;i<=h_qverc;i++) { if(h_qidtov[i]!=-1) { //findcvs(int ver,int *d_dvert,int *d_dverc,int *d_delist,int *d_qvert,int *d_qelist,int *d_qvid,bool ** d_dcvslist ) findcvs<<<dblocks,dthreads>>>(h_qidtov[i],d_dvert,d_dverc,d_delist,d_qvert,d_qelist,d_qvid,d_cvslist); hipError_t err = hipGetLastError(); hipMemcpy(h_cvslist[i],h_tem[i],sizeof(int)*(h_dverc+1),hipMemcpyDeviceToHost); for(j=0;j<=h_dverc;j++) if(h_cvslist[i][j]) printf("%d ",j); printf("\n"); //printf("%d ",h_qidtov[i]); thrust::exclusive_scan(h_cvslist[i],h_cvslist[i]+h_dverc+1,h_cvslist[i]); h_size_cvs[i]=h_cvslist[i][h_dverc]; hipMemcpy(h_tem[i],h_cvslist[i],sizeof(int)*(h_dverc+1),hipMemcpyHostToDevice); puttolist<<<dblocks,dthreads>>>(d_dverc,h_tem[i],d_temverlist[i]); // cudaMemcpy(h_cvslist[i],d_temverlist[i],sizeof(int)*(h_dverc+1),cudaMemcpyDeviceToHost); // for(j=0;j<=h_dverc;j++) // printf("%d ",h_cvslist[i][j]); } } // cudaMemcpy(h_delist,d_delist,sizeof(int)*(h_dvert[h_dverc]),cudaMemcpyDeviceToHost); // for(j=0;j<h_dvert[h_dverc];j++) // printf("%d ",h_delist[j]); for(i=0;i<h_qverc;i++) if(h_size_cvs[h_qvid[i]]) totalthreads*=h_size_cvs[h_qvid[i]]; printf("Start %lld\n",totalthreads); hipMemcpy(d_size_cvs,h_size_cvs,sizeof(int)*(h_qverc+1),hipMemcpyHostToDevice); //totalthreads=1000; dim3 dpblocks(((int)(sqrt(totalthreads)/16 )+ 1),((int)(sqrt(totalthreads)/16)+1)); dim3 dpthreads(16,16); int *d_mapans,*d_countans,*h_countans; hipMalloc(&d_mapans,sizeof( int)*totalthreads*(h_qverc+1)); hipMalloc(&d_countans,sizeof( int)*(totalthreads+1)); hipMemset(d_countans,0,sizeof( int)*(totalthreads+1)); //h_countans=(int *)malloc(sizeof(int)*(totalthreads+1)); //h_countans=0; //cudaMemcpy(d_countans, &h_countans, sizeof( int), cudaMemcpyHostToDevice) ; //cudaMemcpy(&h_countans, d_qverc, sizeof(int), cudaMemcpyDeviceToHost) ; //printf("%d\n",h_countans); findall<<<dpblocks,dpthreads>>> (d_mapans,d_countans,d_qvid,d_qverc,d_qelist,d_qvert,d_dvert,d_delist,d_cvsverlist,d_size_cvs); thrust::device_ptr<int> cptr=thrust::device_pointer_cast(d_countans); //int sum=thrust::count(cptr,cptr+totalthreads,1); //cudaMemcpy(h_countans, d_countans, sizeof(int)*totalthreads, cudaMemcpyDeviceToHost) ; //thrust::exclusive_scan(h_countans,h_countans+totalthreads+1,h_countans); //printf("%d\n",h_countans[totalthreads-1] ); //printf("%d\n",h_countans); //printf("%d\n",sum); /*j=0; for(i=0;i<totalthreads;i++) if(h_countans[i]) j++; printf("%d\n",j); *///bool * check=(bool *)malloc(sizeof(bool)*(h_dverc+1)); //memset(check,false,sizeof(bool)*(h_dverc+1)); //qdmap=(int *)malloc(sizeof(int)*(h_qverc+1)); //cudaMalloc(&d_qdmap,sizeof(int)*(h_qverc+1)); //callforallperm(check,h_cvslist,1,h_qverc,h_dverc); hipFree(d_over); hipFree(d_qverc); hipFree(d_qvert); hipFree(d_qelist); hipFree(d_qvid); hipFree(d_qidtov); hipFree(d_dvert); hipFree(d_delist); hipFree(d_dverc); hipFree(d_cvslist); hipFree(d_cvsverlist); hipFree(d_size_cvs); /*free(h_qvid); free(h_qvert); //free(h_qelist); free(h_qidtov); free(h_cvslist); free(h_dvert); free(h_delist);*/ }
.text .file "isokernel.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z23__device_stub__findhashPiS_S_S_PbS0_S_S_ # -- Begin function _Z23__device_stub__findhashPiS_S_S_PbS0_S_S_ .type _Z23__device_stub__findhashPiS_S_S_PbS0_S_S_,@function _Z23__device_stub__findhashPiS_S_S_PbS0_S_S_: # @_Z23__device_stub__findhashPiS_S_S_PbS0_S_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $160, %rsp .cfi_def_cfa_offset 208 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 208(%rsp), %rax movq %rax, 48(%rbx) leaq 216(%rsp), %rax movq %rax, 56(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z8findhashPiS_S_S_PbS0_S_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $176, %rsp .cfi_adjust_cfa_offset -176 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z23__device_stub__findhashPiS_S_S_PbS0_S_S_, .Lfunc_end0-_Z23__device_stub__findhashPiS_S_S_PbS0_S_S_ .cfi_endproc # -- End function .globl _Z22__device_stub__setdeg1PiS_S_Pb # -- Begin function _Z22__device_stub__setdeg1PiS_S_Pb .type _Z22__device_stub__setdeg1PiS_S_Pb,@function _Z22__device_stub__setdeg1PiS_S_Pb: # @_Z22__device_stub__setdeg1PiS_S_Pb .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 16(%rsp), %rdx movq %rcx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7setdeg1PiS_S_Pb, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z22__device_stub__setdeg1PiS_S_Pb, .Lfunc_end1-_Z22__device_stub__setdeg1PiS_S_Pb .cfi_endproc # -- End function .globl _Z22__device_stub__puttoidPiS_S_S_PbS_S_ # -- Begin function _Z22__device_stub__puttoidPiS_S_S_PbS_S_ .type _Z22__device_stub__puttoidPiS_S_S_PbS_S_,@function _Z22__device_stub__puttoidPiS_S_S_PbS_S_: # @_Z22__device_stub__puttoidPiS_S_S_PbS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $160, %rsp .cfi_def_cfa_offset 208 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 208(%rsp), %rax movq %rax, 48(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7puttoidPiS_S_S_PbS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $176, %rsp .cfi_adjust_cfa_offset -176 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z22__device_stub__puttoidPiS_S_S_PbS_S_, .Lfunc_end2-_Z22__device_stub__puttoidPiS_S_S_PbS_S_ .cfi_endproc # -- End function .globl _Z22__device_stub__findcvsiPiS_S_S_S_S_PS_ # -- Begin function _Z22__device_stub__findcvsiPiS_S_S_S_S_PS_ .type _Z22__device_stub__findcvsiPiS_S_S_S_S_PS_,@function _Z22__device_stub__findcvsiPiS_S_S_S_S_PS_: # @_Z22__device_stub__findcvsiPiS_S_S_S_S_PS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $160, %rsp .cfi_def_cfa_offset 208 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 4(%rsp), %rax movl %edi, (%rax) leaq 56(%rsp), %rdi movq %rsi, (%rdi) leaq 48(%rsp), %rsi movq %rdx, (%rsi) leaq 40(%rsp), %rdx movq %rcx, (%rdx) leaq 32(%rsp), %rcx movq %r8, (%rcx) leaq 24(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 208(%rsp), %rax movq %rax, 48(%rbx) leaq 216(%rsp), %rax movq %rax, 56(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7findcvsiPiS_S_S_S_S_PS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $176, %rsp .cfi_adjust_cfa_offset -176 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _Z22__device_stub__findcvsiPiS_S_S_S_S_PS_, .Lfunc_end3-_Z22__device_stub__findcvsiPiS_S_S_S_S_PS_ .cfi_endproc # -- End function .globl _Z24__device_stub__puttolistPiS_S_ # -- Begin function _Z24__device_stub__puttolistPiS_S_ .type _Z24__device_stub__puttolistPiS_S_,@function _Z24__device_stub__puttolistPiS_S_: # @_Z24__device_stub__puttolistPiS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9puttolistPiS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size _Z24__device_stub__puttolistPiS_S_, .Lfunc_end4-_Z24__device_stub__puttolistPiS_S_ .cfi_endproc # -- End function .globl _Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_ # -- Begin function _Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_ .type _Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_,@function _Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_: # @_Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $160, %rsp .cfi_def_cfa_offset 208 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 208(%rsp), %rax movq %rax, 48(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9checkpermPbPiS0_S0_S0_S0_S0_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $176, %rsp .cfi_adjust_cfa_offset -176 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end5: .size _Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_, .Lfunc_end5-_Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_ .cfi_endproc # -- End function .globl _Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_ # -- Begin function _Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_ .type _Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_,@function _Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_: # @_Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $176, %rsp .cfi_def_cfa_offset 224 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 224(%rsp), %rax movq %rax, 48(%rbx) leaq 232(%rsp), %rax movq %rax, 56(%rbx) leaq 240(%rsp), %rax movq %rax, 64(%rbx) leaq 248(%rsp), %rax movq %rax, 72(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7findallPiS_S_S_S_S_S_S_PS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $192, %rsp .cfi_adjust_cfa_offset -192 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end6: .size _Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_, .Lfunc_end6-_Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_ .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI7_0: .quad 0x3fb0000000000000 # double 0.0625 .LCPI7_1: .quad 0x3ff0000000000000 # double 1 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $120, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $4, %edi callq hipSetDevice leaq 4(%rsp), %rbx movl $.L.str, %edi movq %rbx, %rsi xorl %eax, %eax callq __isoc23_scanf movslq (%rbx), %r14 leaq 4(,%r14,4), %rbx movq %rbx, %rdi callq malloc movq %rax, %r15 movq %rbx, %rdi callq malloc movq %rax, h_qvid(%rip) movq %rbx, %rdi callq malloc movq %rax, h_qidtov(%rip) leaq 8(,%r14,8), %rbx movq %rbx, %rdi callq malloc movq %rax, 16(%rsp) # 8-byte Spill movq %rbx, %rdi callq malloc movq %rax, 24(%rsp) # 8-byte Spill testq %r14, %r14 js .LBB7_3 # %bb.1: # %.lr.ph.preheader movq $-1, %r12 movq %r15, %rbx .LBB7_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl $.L.str, %edi movq %rbx, %rsi xorl %eax, %eax callq __isoc23_scanf movslq 4(%rsp), %r14 incq %r12 addq $4, %rbx cmpq %r14, %r12 jl .LBB7_2 .LBB7_3: # %._crit_edge movslq (%r15,%r14,4), %rbx leaq (,%rbx,4), %rdi callq malloc testq %rbx, %rbx movq %rax, 96(%rsp) # 8-byte Spill jle .LBB7_85 # %bb.4: # %.lr.ph248.preheader movq %rax, %rbx xorl %r14d, %r14d .LBB7_5: # %.lr.ph248 # =>This Inner Loop Header: Depth=1 movl $.L.str, %edi movq %rbx, %rsi xorl %eax, %eax callq __isoc23_scanf incq %r14 movslq 4(%rsp), %rax movslq (%r15,%rax,4), %r12 addq $4, %rbx cmpq %r12, %r14 jl .LBB7_5 # %bb.6: # %._crit_edge249 movq %r12, %rdi callq malloc movq %rax, %r13 testl %r12d, %r12d jle .LBB7_9 # %bb.7: # %.lr.ph253.preheader leaq 12(%rsp), %rbx xorl %r14d, %r14d .LBB7_8: # %.lr.ph253 # =>This Inner Loop Header: Depth=1 movl $.L.str, %edi movq %rbx, %rsi xorl %eax, %eax callq __isoc23_scanf cmpl $1, 12(%rsp) sete (%r13,%r14) incq %r14 movslq 4(%rsp), %rax movslq (%r15,%rax,4), %rax cmpq %rax, %r14 jl .LBB7_8 jmp .LBB7_9 .LBB7_85: # %._crit_edge249.thread movq %rbx, %rdi callq malloc movq %rax, %r13 .LBB7_9: # %._crit_edge254 movq %r13, 40(%rsp) # 8-byte Spill leaq 8(%rsp), %rbx movl $.L.str, %edi movq %rbx, %rsi xorl %eax, %eax callq __isoc23_scanf movslq (%rbx), %r14 leaq 4(,%r14,4), %rdi callq malloc testq %r14, %r14 movq %rax, 56(%rsp) # 8-byte Spill js .LBB7_12 # %bb.10: # %.lr.ph258.preheader movq %rax, %r12 movq $-1, %r13 movq %rax, %rbx .LBB7_11: # %.lr.ph258 # =>This Inner Loop Header: Depth=1 movl $.L.str, %edi movq %rbx, %rsi xorl %eax, %eax callq __isoc23_scanf movslq 8(%rsp), %r14 incq %r13 addq $4, %rbx cmpq %r14, %r13 jl .LBB7_11 .LBB7_12: # %.preheader238 movl 4(%rsp), %r13d movslq %r14d, %r14 testl %r13d, %r13d movq 24(%rsp), %r12 # 8-byte Reload js .LBB7_15 # %bb.13: # %.lr.ph262 leaq 4(,%r14,4), %rbx incq %r13 xorl %ebp, %ebp .LBB7_14: # =>This Inner Loop Header: Depth=1 movq %rbx, %rdi callq malloc movq %rax, (%r12,%rbp,8) incq %rbp cmpq %rbp, %r13 jne .LBB7_14 .LBB7_15: # %._crit_edge263 movq 56(%rsp), %r12 # 8-byte Reload movslq (%r12,%r14,4), %rbx leaq (,%rbx,4), %rdi callq malloc movq %rax, %r13 testq %rbx, %rbx jle .LBB7_18 # %bb.16: # %.lr.ph266.preheader movq %r13, %rbx xorl %r14d, %r14d .LBB7_17: # %.lr.ph266 # =>This Inner Loop Header: Depth=1 movl $.L.str, %edi movq %rbx, %rsi xorl %eax, %eax callq __isoc23_scanf incq %r14 movslq 8(%rsp), %rax movslq (%r12,%rax,4), %rax addq $4, %rbx cmpq %rax, %r14 jl .LBB7_17 .LBB7_18: # %._crit_edge267 movq %r13, 48(%rsp) # 8-byte Spill movl $d_qverc, %edi movl $4, %esi callq hipMalloc movl $d_over, %edi movl $1, %esi callq hipMalloc leaq 4(%rsp), %rbx movslq (%rbx), %rax leaq 4(,%rax,4), %rsi movl $d_qvert, %edi callq hipMalloc movslq (%rbx), %rax leaq 4(,%rax,4), %rsi movl $d_qidtov, %edi callq hipMalloc movslq (%rbx), %rax movslq (%r15,%rax,4), %rsi shlq $2, %rsi movl $d_qelist, %edi callq hipMalloc movslq (%rbx), %rax movslq (%r15,%rax,4), %rsi movl $d_qtree, %edi callq hipMalloc leaq 32(%rsp), %rbp movl $4000152, %esi # imm = 0x3D0998 movq %rbp, %rdi callq hipMalloc leaq 88(%rsp), %r13 movl $4000152, %esi # imm = 0x3D0998 movq %r13, %rdi callq hipMalloc movslq (%rbx), %rax leaq 4(,%rax,4), %rsi movl $d_qvid, %edi callq hipMalloc movq d_qverc(%rip), %rdi movl $4, %edx movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movq d_qvert(%rip), %rdi movslq (%rbx), %rax leaq 4(,%rax,4), %rdx movq %r15, %rsi movl $1, %ecx callq hipMemcpy movq d_qelist(%rip), %rdi movslq (%rbx), %rax movslq (%r15,%rax,4), %rdx shlq $2, %rdx movq 96(%rsp), %rsi # 8-byte Reload movl $1, %ecx callq hipMemcpy movq d_qtree(%rip), %rdi movslq (%rbx), %rax movslq (%r15,%rax,4), %rdx movq 40(%rsp), %rsi # 8-byte Reload movl $1, %ecx callq hipMemcpy movq (%rbp), %rdi movl $4000152, %edx # imm = 0x3D0998 xorl %esi, %esi callq hipMemset movq (%r13), %rdi movl $4000152, %edx # imm = 0x3D0998 xorl %esi, %esi callq hipMemset movq d_qidtov(%rip), %rdi movslq (%rbx), %rax leaq 4(,%rax,4), %rdx movl $-1, %esi callq hipMemset movq d_qvid(%rip), %rdi movslq (%rbx), %rax leaq 4(,%rax,4), %rdx xorl %esi, %esi callq hipMemset movl $4000152, %edi # imm = 0x3D0998 callq malloc cvtsi2sdl (%rbx), %xmm0 movq %rax, %rbp xorpd %xmm1, %xmm1 ucomisd %xmm1, %xmm0 jb .LBB7_20 # %bb.19: sqrtsd %xmm0, %xmm0 jmp .LBB7_21 .LBB7_20: # %call.sqrt callq sqrt xorpd %xmm1, %xmm1 .LBB7_21: # %._crit_edge267.split movabsq $68719476752, %r15 # imm = 0x1000000010 mulsd .LCPI7_0(%rip), %xmm0 addsd .LCPI7_1(%rip), %xmm0 cvttsd2si %xmm0, %rbx xorps %xmm0, %xmm0 cvtsi2sdl 4(%rsp), %xmm0 ucomisd %xmm1, %xmm0 jb .LBB7_23 # %bb.22: sqrtsd %xmm0, %xmm0 jmp .LBB7_24 .LBB7_23: # %call.sqrt425 callq sqrt .LBB7_24: # %._crit_edge267.split.split mulsd .LCPI7_0(%rip), %xmm0 addsd .LCPI7_1(%rip), %xmm0 cvttsd2si %xmm0, %r13 movl %ebx, %eax shlq $32, %r13 orq %rax, %r13 movb $1, h_over(%rip) movq %r13, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB7_26 # %bb.25: movq d_qvert(%rip), %rdi movq d_qverc(%rip), %rsi movq d_qvid(%rip), %rdx movq d_qtree(%rip), %rcx callq _Z22__device_stub__setdeg1PiS_S_Pb .LBB7_26: movl $2, %ebx .LBB7_27: # =>This Loop Header: Depth=1 # Child Loop BB7_32 Depth 2 movb $1, h_over(%rip) movq d_over(%rip), %rdi movl $h_over, %esi movl $1, %edx movl $1, %ecx callq hipMemcpy movq 32(%rsp), %rdi movl $4000152, %edx # imm = 0x3D0998 xorl %esi, %esi callq hipMemset movq %r13, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB7_29 # %bb.28: # in Loop: Header=BB7_27 Depth=1 movq d_qvert(%rip), %rdi movq d_qverc(%rip), %rsi movq d_qvid(%rip), %rdx movq d_qelist(%rip), %rcx movq d_over(%rip), %r8 movq d_qtree(%rip), %r9 pushq 88(%rsp) .cfi_adjust_cfa_offset 8 pushq 40(%rsp) .cfi_adjust_cfa_offset 8 callq _Z23__device_stub__findhashPiS_S_S_PbS0_S_S_ addq $16, %rsp .cfi_adjust_cfa_offset -16 .LBB7_29: # in Loop: Header=BB7_27 Depth=1 callq hipGetLastError testl %eax, %eax je .LBB7_31 # %bb.30: # in Loop: Header=BB7_27 Depth=1 movl %eax, %edi callq hipGetErrorString movl $.L.str.1, %edi movq %rax, %rsi xorl %eax, %eax callq printf movl $.L.str.2, %edi xorl %eax, %eax callq printf .LBB7_31: # in Loop: Header=BB7_27 Depth=1 movq 32(%rsp), %rsi movl $4000152, %edx # imm = 0x3D0998 movq %rbp, %rdi movl $2, %ecx callq hipMemcpy addl (%rbp), %ebx movl $0, (%rbp) movl $4, %eax .LBB7_32: # %.lr.ph.i.i.i.i.i.i.i # Parent Loop BB7_27 Depth=1 # => This Inner Loop Header: Depth=2 movl (%rbp,%rax), %ecx addl %ebx, %ecx movl %ebx, (%rbp,%rax) addq $4, %rax movl %ecx, %ebx cmpq $4000152, %rax # imm = 0x3D0998 jne .LBB7_32 # %bb.33: # %_ZN6thrust14exclusive_scanIPiS1_EET0_T_S3_S2_.exit # in Loop: Header=BB7_27 Depth=1 movl 4000148(%rbp), %ebx movq 32(%rsp), %rdi movl $4000152, %edx # imm = 0x3D0998 movq %rbp, %rsi movl $1, %ecx callq hipMemcpy movq %r13, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB7_35 # %bb.34: # in Loop: Header=BB7_27 Depth=1 movq d_qvert(%rip), %rdi movq d_qverc(%rip), %rsi movq d_qvid(%rip), %rdx movq d_qelist(%rip), %rcx movq d_qtree(%rip), %r8 movq 32(%rsp), %r9 subq $8, %rsp .cfi_adjust_cfa_offset 8 pushq d_qidtov(%rip) .cfi_adjust_cfa_offset 8 callq _Z22__device_stub__puttoidPiS_S_S_PbS_S_ addq $16, %rsp .cfi_adjust_cfa_offset -16 .LBB7_35: # in Loop: Header=BB7_27 Depth=1 movq d_over(%rip), %rsi movl $h_over, %edi movl $1, %edx movl $2, %ecx callq hipMemcpy cmpb $0, h_over(%rip) je .LBB7_27 # %bb.36: movq h_qvid(%rip), %rdi movq d_qvid(%rip), %rsi movslq 4(%rsp), %rdx shlq $2, %rdx movl $2, %ecx callq hipMemcpy movq h_qidtov(%rip), %rdi movq d_qidtov(%rip), %rsi movslq 4(%rsp), %rax leaq 4(,%rax,4), %rdx movl $2, %ecx callq hipMemcpy cmpl $0, 4(%rsp) js .LBB7_39 # %bb.37: # %.lr.ph272.preheader movq $-1, %rbx .LBB7_38: # %.lr.ph272 # =>This Inner Loop Header: Depth=1 movq h_qidtov(%rip), %rax movl 4(%rax,%rbx,4), %esi movl $.L.str.3, %edi xorl %eax, %eax callq printf movslq 4(%rsp), %rax incq %rbx cmpq %rax, %rbx jl .LBB7_38 .LBB7_39: # %._crit_edge273 movl $10, %edi callq putchar@PLT cmpl $0, 4(%rsp) movq 40(%rsp), %r14 # 8-byte Reload movq 48(%rsp), %r13 # 8-byte Reload js .LBB7_42 # %bb.40: # %.lr.ph277.preheader movq $-1, %rbx .LBB7_41: # %.lr.ph277 # =>This Inner Loop Header: Depth=1 movq h_qvid(%rip), %rax movl 4(%rax,%rbx,4), %esi movl $.L.str.3, %edi xorl %eax, %eax callq printf movslq 4(%rsp), %rax incq %rbx cmpq %rax, %rbx jl .LBB7_41 .LBB7_42: # %._crit_edge278 movl $10, %edi callq putchar@PLT movq d_qtree(%rip), %rdi callq hipFree movq 32(%rsp), %rdi callq hipFree movq 88(%rsp), %rdi callq hipFree movq %rbp, %rdi callq free movq %r14, %rdi callq free movslq 4(%rsp), %rax leaq 8(,%rax,8), %rsi leaq 80(%rsp), %rdi callq hipMalloc cmpl $0, 4(%rsp) js .LBB7_45 # %bb.43: # %.lr.ph282.preheader movq $-1, %r14 movq 16(%rsp), %rbx # 8-byte Reload .LBB7_44: # %.lr.ph282 # =>This Inner Loop Header: Depth=1 movslq 8(%rsp), %rax leaq 4(,%rax,4), %rsi movq %rbx, %rdi callq hipMalloc movq (%rbx), %rdi movslq 8(%rsp), %rax leaq 4(,%rax,4), %rdx xorl %esi, %esi callq hipMemset movslq 4(%rsp), %rax incq %r14 addq $8, %rbx cmpq %rax, %r14 jl .LBB7_44 .LBB7_45: # %._crit_edge283 movq 16(%rsp), %r14 # 8-byte Reload movq 8(%r14), %rdi leaq 8(%rsp), %rbx movslq (%rbx), %rax leaq 4(,%rax,4), %rdx movl $1, %esi callq hipMemset movq 80(%rsp), %rdi movslq 4(%rsp), %rax leaq 8(,%rax,8), %rdx movq %r14, %rsi movl $1, %ecx callq hipMemcpy movslq (%rbx), %rax leaq 4(,%rax,4), %rsi movl $d_dvert, %edi callq hipMalloc movl $d_dverc, %edi movl $4, %esi callq hipMalloc movslq (%rbx), %rax movslq (%r12,%rax,4), %rsi shlq $2, %rsi movl $d_delist, %edi callq hipMalloc movq d_dverc(%rip), %rdi movl $4, %edx movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movq d_dvert(%rip), %rdi movslq (%rbx), %rax leaq 4(,%rax,4), %rdx movq %r12, %rsi movl $1, %ecx callq hipMemcpy movq d_delist(%rip), %rdi movslq (%rbx), %rax movslq (%r12,%rax,4), %rdx shlq $2, %rdx movq %r13, %rsi movl $1, %ecx callq hipMemcpy cvtsi2sdl (%rbx), %xmm0 xorpd %xmm1, %xmm1 ucomisd %xmm1, %xmm0 jb .LBB7_47 # %bb.46: sqrtsd %xmm0, %xmm0 jmp .LBB7_48 .LBB7_47: # %call.sqrt426 callq sqrt xorpd %xmm1, %xmm1 .LBB7_48: # %._crit_edge283.split movsd %xmm0, 56(%rsp) # 8-byte Spill xorps %xmm0, %xmm0 cvtsi2sdl 8(%rsp), %xmm0 ucomisd %xmm1, %xmm0 jb .LBB7_50 # %bb.49: sqrtsd %xmm0, %xmm0 jmp .LBB7_51 .LBB7_50: # %call.sqrt427 callq sqrt .LBB7_51: # %._crit_edge283.split.split movsd %xmm0, 48(%rsp) # 8-byte Spill movq 24(%rsp), %rax # 8-byte Reload movq 8(%rax), %rbx movslq 8(%rsp), %rax leaq 4(,%rax,4), %rdx movq %rbx, %rdi movl $1, %esi callq memset@PLT movslq 4(%rsp), %rax leaq 4(,%rax,4), %r13 movl $1, %edi movq %r13, %rsi callq calloc@PLT movq %rax, %r12 leaq 64(%rsp), %rbp movq %rbp, %rdi movq %r13, %rsi callq hipMalloc movq (%rbp), %rdi movslq 4(%rsp), %rax leaq 4(,%rax,4), %rdx xorl %esi, %esi callq hipMemset movslq 4(%rsp), %rax leaq 8(,%rax,8), %rsi leaq 72(%rsp), %rdi callq hipMalloc movslq 4(%rsp), %r14 leaq 8(,%r14,8), %r13 movq %r13, %rdi callq malloc movq %rax, %rbp testq %r14, %r14 movq %rax, 40(%rsp) # 8-byte Spill js .LBB7_55 # %bb.52: # %.lr.ph287.preheader movq $-1, %r14 .LBB7_53: # %.lr.ph287 # =>This Inner Loop Header: Depth=1 movslq 8(%rsp), %rax leaq 4(,%rax,4), %rsi movq %rbp, %rdi callq hipMalloc movq (%rbp), %rdi movslq 8(%rsp), %rax leaq 4(,%rax,4), %rdx xorl %esi, %esi callq hipMemset movslq 4(%rsp), %rax incq %r14 addq $8, %rbp cmpq %rax, %r14 jl .LBB7_53 # %bb.54: # %._crit_edge288.loopexit leaq 8(,%rax,8), %r13 movq 40(%rsp), %rbp # 8-byte Reload .LBB7_55: # %._crit_edge288 movq 72(%rsp), %rdi movq %rbp, %rsi movq %r13, %rdx movl $1, %ecx callq hipMemcpy movl 8(%rsp), %eax testl %eax, %eax jle .LBB7_58 # %bb.56: # %.lr.ph292.preheader xorl %ecx, %ecx .LBB7_57: # %.lr.ph292 # =>This Inner Loop Header: Depth=1 movl %ecx, (%rbx,%rcx,4) incq %rcx movslq 8(%rsp), %rax cmpq %rax, %rcx jl .LBB7_57 .LBB7_58: # %._crit_edge293 movq 8(%rbp), %rdi cltq leaq 4(,%rax,4), %rdx movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movl 8(%rsp), %eax movl %eax, 4(%r12) movl $1, %r13d cmpl $0, 4(%rsp) js .LBB7_78 # %bb.59: # %.lr.ph303.preheader movsd 56(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero mulsd .LCPI7_0(%rip), %xmm0 addsd .LCPI7_1(%rip), %xmm0 cvttsd2si %xmm0, %rax movsd 48(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero mulsd .LCPI7_0(%rip), %xmm0 addsd .LCPI7_1(%rip), %xmm0 cvttsd2si %xmm0, %rbx movl %eax, %eax shlq $32, %rbx orq %rax, %rbx xorl %r14d, %r14d .LBB7_60: # %.lr.ph303 # =>This Loop Header: Depth=1 # Child Loop BB7_65 Depth 2 # Child Loop BB7_71 Depth 2 movq h_qidtov(%rip), %rax cmpl $-1, (%rax,%r14,4) je .LBB7_74 # %bb.61: # in Loop: Header=BB7_60 Depth=1 movq %rbx, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB7_63 # %bb.62: # in Loop: Header=BB7_60 Depth=1 movq h_qidtov(%rip), %rax movl (%rax,%r14,4), %edi movq d_dvert(%rip), %rsi movq d_dverc(%rip), %rdx movq d_delist(%rip), %rcx movq d_qvert(%rip), %r8 movq d_qelist(%rip), %r9 pushq 80(%rsp) .cfi_adjust_cfa_offset 8 pushq d_qvid(%rip) .cfi_adjust_cfa_offset 8 callq _Z22__device_stub__findcvsiPiS_S_S_S_S_PS_ addq $16, %rsp .cfi_adjust_cfa_offset -16 .LBB7_63: # in Loop: Header=BB7_60 Depth=1 callq hipGetLastError movq 24(%rsp), %rax # 8-byte Reload movq (%rax,%r14,8), %rbp movq 16(%rsp), %rax # 8-byte Reload movq (%rax,%r14,8), %rsi movslq 8(%rsp), %rax leaq 4(,%rax,4), %rdx movq %rbp, %rdi movl $2, %ecx callq hipMemcpy movl $0, 12(%rsp) movl 8(%rsp), %eax testl %eax, %eax js .LBB7_68 # %bb.64: # %.lr.ph298.preheader # in Loop: Header=BB7_60 Depth=1 xorl %esi, %esi .LBB7_65: # %.lr.ph298 # Parent Loop BB7_60 Depth=1 # => This Inner Loop Header: Depth=2 movslq %esi, %rcx cmpl $0, (%rbp,%rcx,4) je .LBB7_67 # %bb.66: # in Loop: Header=BB7_65 Depth=2 movl $.L.str.3, %edi # kill: def $esi killed $esi killed $rsi xorl %eax, %eax callq printf movl 12(%rsp), %esi movl 8(%rsp), %eax .LBB7_67: # in Loop: Header=BB7_65 Depth=2 leal 1(%rsi), %ecx movl %ecx, 12(%rsp) cmpl %eax, %esi movl %ecx, %esi jl .LBB7_65 .LBB7_68: # %._crit_edge299 # in Loop: Header=BB7_60 Depth=1 movl $10, %edi callq putchar@PLT movslq 8(%rsp), %rax leaq 4(,%rax,4), %rcx addq %rbp, %rcx cmpq %rcx, %rbp je .LBB7_72 # %bb.69: # in Loop: Header=BB7_60 Depth=1 movl (%rbp), %ecx movl $0, (%rbp) testl %eax, %eax je .LBB7_72 # %bb.70: # %.lr.ph.i.i.i.i.i.i.i210.preheader # in Loop: Header=BB7_60 Depth=1 shlq $2, %rax xorl %edx, %edx .LBB7_71: # %.lr.ph.i.i.i.i.i.i.i210 # Parent Loop BB7_60 Depth=1 # => This Inner Loop Header: Depth=2 movl 4(%rbp,%rdx), %esi addl %ecx, %esi movl %ecx, 4(%rbp,%rdx) addq $4, %rdx movl %esi, %ecx cmpq %rdx, %rax jne .LBB7_71 .LBB7_72: # %_ZN6thrust14exclusive_scanIPiS1_EET0_T_S3_S2_.exit217 # in Loop: Header=BB7_60 Depth=1 movslq 8(%rsp), %rax movl (%rbp,%rax,4), %ecx movl %ecx, (%r12,%r14,4) movq 16(%rsp), %rcx # 8-byte Reload movq (%rcx,%r14,8), %rdi leaq 4(,%rax,4), %rdx movq %rbp, %rsi movl $1, %ecx callq hipMemcpy movq %rbx, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB7_74 # %bb.73: # in Loop: Header=BB7_60 Depth=1 movq d_dverc(%rip), %rdi movq 16(%rsp), %rax # 8-byte Reload movq (%rax,%r14,8), %rsi movq 40(%rsp), %rax # 8-byte Reload movq (%rax,%r14,8), %rdx callq _Z24__device_stub__puttolistPiS_S_ .LBB7_74: # in Loop: Header=BB7_60 Depth=1 leaq 1(%r14), %rcx movslq 4(%rsp), %rax cmpq %rax, %r14 movq %rcx, %r14 jl .LBB7_60 # %bb.75: # %.preheader movl %eax, %eax testl %eax, %eax jle .LBB7_78 # %bb.76: # %.lr.ph307 movl $1, %r13d movq h_qvid(%rip), %rcx xorl %edx, %edx .LBB7_77: # =>This Inner Loop Header: Depth=1 movslq (%rcx,%rdx,4), %rsi movl (%r12,%rsi,4), %esi cmpl $1, %esi adcl $0, %esi movslq %esi, %rsi imulq %rsi, %r13 incq %rdx cmpq %rdx, %rax jne .LBB7_77 .LBB7_78: # %._crit_edge308 movl $.L.str.5, %edi movq %r13, %rsi xorl %eax, %eax callq printf movq 64(%rsp), %rdi movslq 4(%rsp), %rax leaq 4(,%rax,4), %rdx movq %r12, %rsi movl $1, %ecx callq hipMemcpy cvtsi2sd %r13, %xmm2 sqrtsd %xmm2, %xmm1 xorpd %xmm3, %xmm3 ucomisd %xmm3, %xmm2 movapd %xmm1, %xmm0 jae .LBB7_80 # %bb.79: # %call.sqrt428 movapd %xmm2, %xmm0 movsd %xmm1, 16(%rsp) # 8-byte Spill movsd %xmm2, 24(%rsp) # 8-byte Spill callq sqrt xorpd %xmm3, %xmm3 movsd 24(%rsp), %xmm2 # 8-byte Reload # xmm2 = mem[0],zero movsd 16(%rsp), %xmm1 # 8-byte Reload # xmm1 = mem[0],zero .LBB7_80: # %._crit_edge308.split mulsd .LCPI7_0(%rip), %xmm0 cvttsd2si %xmm0, %ebp incl %ebp ucomisd %xmm3, %xmm2 jae .LBB7_82 # %bb.81: # %call.sqrt429 movapd %xmm2, %xmm0 callq sqrt movapd %xmm0, %xmm1 .LBB7_82: # %._crit_edge308.split.split mulsd .LCPI7_0(%rip), %xmm1 cvttsd2si %xmm1, %ebx incl %ebx movl %ebp, %eax shlq $32, %rbx orq %rax, %rbx leaq (,%r13,4), %rax movslq 4(%rsp), %rsi incq %rsi imulq %rax, %rsi leaq 112(%rsp), %rdi callq hipMalloc leaq 4(,%r13,4), %r14 leaq 104(%rsp), %r12 movq %r12, %rdi movq %r14, %rsi callq hipMalloc movq (%r12), %rdi xorl %esi, %esi movq %r14, %rdx callq hipMemset movq %rbx, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB7_84 # %bb.83: movq 112(%rsp), %rdi movq 104(%rsp), %rsi movq d_qvid(%rip), %rdx movq d_qverc(%rip), %rcx movq d_qelist(%rip), %r8 movq d_qvert(%rip), %r9 pushq 64(%rsp) .cfi_adjust_cfa_offset 8 pushq 80(%rsp) .cfi_adjust_cfa_offset 8 pushq d_delist(%rip) .cfi_adjust_cfa_offset 8 pushq d_dvert(%rip) .cfi_adjust_cfa_offset 8 callq _Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_ addq $32, %rsp .cfi_adjust_cfa_offset -32 .LBB7_84: movq d_over(%rip), %rdi callq hipFree movq d_qverc(%rip), %rdi callq hipFree movq d_qvert(%rip), %rdi callq hipFree movq d_qelist(%rip), %rdi callq hipFree movq d_qvid(%rip), %rdi callq hipFree movq d_qidtov(%rip), %rdi callq hipFree movq d_dvert(%rip), %rdi callq hipFree movq d_delist(%rip), %rdi callq hipFree movq d_dverc(%rip), %rdi callq hipFree movq 80(%rsp), %rdi callq hipFree movq 72(%rsp), %rdi callq hipFree movq 64(%rsp), %rdi callq hipFree xorl %eax, %eax addq $120, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end7: .size main, .Lfunc_end7-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB8_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB8_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z8findhashPiS_S_S_PbS0_S_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7setdeg1PiS_S_Pb, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7puttoidPiS_S_S_PbS_S_, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7findcvsiPiS_S_S_S_S_PS_, %esi movl $.L__unnamed_4, %edx movl $.L__unnamed_4, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9puttolistPiS_S_, %esi movl $.L__unnamed_5, %edx movl $.L__unnamed_5, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9checkpermPbPiS0_S0_S0_S0_S0_, %esi movl $.L__unnamed_6, %edx movl $.L__unnamed_6, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7findallPiS_S_S_S_S_S_S_PS_S_, %esi movl $.L__unnamed_7, %edx movl $.L__unnamed_7, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end8: .size __hip_module_ctor, .Lfunc_end8-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB9_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB9_2: retq .Lfunc_end9: .size __hip_module_dtor, .Lfunc_end9-__hip_module_dtor .cfi_endproc # -- End function .type _Z8findhashPiS_S_S_PbS0_S_S_,@object # @_Z8findhashPiS_S_S_PbS0_S_S_ .section .rodata,"a",@progbits .globl _Z8findhashPiS_S_S_PbS0_S_S_ .p2align 3, 0x0 _Z8findhashPiS_S_S_PbS0_S_S_: .quad _Z23__device_stub__findhashPiS_S_S_PbS0_S_S_ .size _Z8findhashPiS_S_S_PbS0_S_S_, 8 .type _Z7setdeg1PiS_S_Pb,@object # @_Z7setdeg1PiS_S_Pb .globl _Z7setdeg1PiS_S_Pb .p2align 3, 0x0 _Z7setdeg1PiS_S_Pb: .quad _Z22__device_stub__setdeg1PiS_S_Pb .size _Z7setdeg1PiS_S_Pb, 8 .type _Z7puttoidPiS_S_S_PbS_S_,@object # @_Z7puttoidPiS_S_S_PbS_S_ .globl _Z7puttoidPiS_S_S_PbS_S_ .p2align 3, 0x0 _Z7puttoidPiS_S_S_PbS_S_: .quad _Z22__device_stub__puttoidPiS_S_S_PbS_S_ .size _Z7puttoidPiS_S_S_PbS_S_, 8 .type _Z7findcvsiPiS_S_S_S_S_PS_,@object # @_Z7findcvsiPiS_S_S_S_S_PS_ .globl _Z7findcvsiPiS_S_S_S_S_PS_ .p2align 3, 0x0 _Z7findcvsiPiS_S_S_S_S_PS_: .quad _Z22__device_stub__findcvsiPiS_S_S_S_S_PS_ .size _Z7findcvsiPiS_S_S_S_S_PS_, 8 .type _Z9puttolistPiS_S_,@object # @_Z9puttolistPiS_S_ .globl _Z9puttolistPiS_S_ .p2align 3, 0x0 _Z9puttolistPiS_S_: .quad _Z24__device_stub__puttolistPiS_S_ .size _Z9puttolistPiS_S_, 8 .type _Z9checkpermPbPiS0_S0_S0_S0_S0_,@object # @_Z9checkpermPbPiS0_S0_S0_S0_S0_ .globl _Z9checkpermPbPiS0_S0_S0_S0_S0_ .p2align 3, 0x0 _Z9checkpermPbPiS0_S0_S0_S0_S0_: .quad _Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_ .size _Z9checkpermPbPiS0_S0_S0_S0_S0_, 8 .type _Z7findallPiS_S_S_S_S_S_S_PS_S_,@object # @_Z7findallPiS_S_S_S_S_S_S_PS_S_ .globl _Z7findallPiS_S_S_S_S_S_S_PS_S_ .p2align 3, 0x0 _Z7findallPiS_S_S_S_S_S_S_PS_S_: .quad _Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_ .size _Z7findallPiS_S_S_S_S_S_S_PS_S_, 8 .type qdmap,@object # @qdmap .bss .globl qdmap .p2align 3, 0x0 qdmap: .quad 0 .size qdmap, 8 .type d_qverc,@object # @d_qverc .globl d_qverc .p2align 3, 0x0 d_qverc: .quad 0 .size d_qverc, 8 .type d_dverc,@object # @d_dverc .globl d_dverc .p2align 3, 0x0 d_dverc: .quad 0 .size d_dverc, 8 .type d_qvid,@object # @d_qvid .globl d_qvid .p2align 3, 0x0 d_qvid: .quad 0 .size d_qvid, 8 .type d_qidtov,@object # @d_qidtov .globl d_qidtov .p2align 3, 0x0 d_qidtov: .quad 0 .size d_qidtov, 8 .type h_qidtov,@object # @h_qidtov .globl h_qidtov .p2align 3, 0x0 h_qidtov: .quad 0 .size h_qidtov, 8 .type h_qvid,@object # @h_qvid .globl h_qvid .p2align 3, 0x0 h_qvid: .quad 0 .size h_qvid, 8 .type d_qvert,@object # @d_qvert .globl d_qvert .p2align 3, 0x0 d_qvert: .quad 0 .size d_qvert, 8 .type d_qelist,@object # @d_qelist .globl d_qelist .p2align 3, 0x0 d_qelist: .quad 0 .size d_qelist, 8 .type d_dvert,@object # @d_dvert .globl d_dvert .p2align 3, 0x0 d_dvert: .quad 0 .size d_dvert, 8 .type d_delist,@object # @d_delist .globl d_delist .p2align 3, 0x0 d_delist: .quad 0 .size d_delist, 8 .type d_qtree,@object # @d_qtree .globl d_qtree .p2align 3, 0x0 d_qtree: .quad 0 .size d_qtree, 8 .type d_over,@object # @d_over .globl d_over .p2align 3, 0x0 d_over: .quad 0 .size d_over, 8 .type d_qdmap,@object # @d_qdmap .globl d_qdmap .p2align 3, 0x0 d_qdmap: .quad 0 .size d_qdmap, 8 .type h_over,@object # @h_over .globl h_over h_over: .byte 0 # 0x0 .size h_over, 1 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%d" .size .L.str, 3 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "Error: %s\n" .size .L.str.1, 11 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "Not Ok" .size .L.str.2, 7 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "%d " .size .L.str.3, 4 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "Start %lld\n" .size .L.str.5, 12 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z8findhashPiS_S_S_PbS0_S_S_" .size .L__unnamed_1, 29 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z7setdeg1PiS_S_Pb" .size .L__unnamed_2, 19 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "_Z7puttoidPiS_S_S_PbS_S_" .size .L__unnamed_3, 25 .type .L__unnamed_4,@object # @3 .L__unnamed_4: .asciz "_Z7findcvsiPiS_S_S_S_S_PS_" .size .L__unnamed_4, 27 .type .L__unnamed_5,@object # @4 .L__unnamed_5: .asciz "_Z9puttolistPiS_S_" .size .L__unnamed_5, 19 .type .L__unnamed_6,@object # @5 .L__unnamed_6: .asciz "_Z9checkpermPbPiS0_S0_S0_S0_S0_" .size .L__unnamed_6, 32 .type .L__unnamed_7,@object # @6 .L__unnamed_7: .asciz "_Z7findallPiS_S_S_S_S_S_S_PS_S_" .size .L__unnamed_7, 32 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z23__device_stub__findhashPiS_S_S_PbS0_S_S_ .addrsig_sym _Z22__device_stub__setdeg1PiS_S_Pb .addrsig_sym _Z22__device_stub__puttoidPiS_S_S_PbS_S_ .addrsig_sym _Z22__device_stub__findcvsiPiS_S_S_S_S_PS_ .addrsig_sym _Z24__device_stub__puttolistPiS_S_ .addrsig_sym _Z24__device_stub__checkpermPbPiS0_S0_S0_S0_S0_ .addrsig_sym _Z22__device_stub__findallPiS_S_S_S_S_S_S_PS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z8findhashPiS_S_S_PbS0_S_S_ .addrsig_sym _Z7setdeg1PiS_S_Pb .addrsig_sym _Z7puttoidPiS_S_S_PbS_S_ .addrsig_sym _Z7findcvsiPiS_S_S_S_S_PS_ .addrsig_sym _Z9puttolistPiS_S_ .addrsig_sym _Z9checkpermPbPiS0_S0_S0_S0_S0_ .addrsig_sym _Z7findallPiS_S_S_S_S_S_S_PS_S_ .addrsig_sym d_qverc .addrsig_sym d_dverc .addrsig_sym d_qvid .addrsig_sym d_qidtov .addrsig_sym d_qvert .addrsig_sym d_qelist .addrsig_sym d_dvert .addrsig_sym d_delist .addrsig_sym d_qtree .addrsig_sym d_over .addrsig_sym h_over .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z8findhashPiS_S_S_PbS0_S_S_ ; -- Begin function _Z8findhashPiS_S_S_PbS0_S_S_ .globl _Z8findhashPiS_S_S_PbS0_S_S_ .p2align 8 .type _Z8findhashPiS_S_S_PbS0_S_S_,@function _Z8findhashPiS_S_S_PbS0_S_S_: ; @_Z8findhashPiS_S_S_PbS0_S_S_ ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x44 s_load_b512 s[16:31], s[0:1], 0x0 s_load_b32 s0, s[0:1], 0x4c v_and_b32_e32 v1, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_mul_i32 s1, s2, s14 s_load_b32 s2, s[18:19], 0x0 s_and_b32 s3, s0, 0xffff s_add_i32 s1, s1, s15 s_lshr_b32 s0, s0, 16 v_mad_u64_u32 v[2:3], null, s1, s3, v[1:2] v_bfe_u32 v3, v0, 10, 10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mad_u64_u32 v[0:1], null, v2, s0, v[3:4] s_mov_b32 s0, exec_lo s_waitcnt lgkmcnt(0) v_cmpx_gt_i32_e64 s2, v0 s_cbranch_execz .LBB0_17 ; %bb.1: v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v2, vcc_lo, s20, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s21, v1, vcc_lo global_load_b32 v2, v[2:3], off s_waitcnt vmcnt(0) v_cmp_eq_u32_e32 vcc_lo, 0, v2 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_17 ; %bb.2: v_add_co_u32 v0, vcc_lo, s16, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s17, v1, vcc_lo v_mov_b32_e32 v2, 1 v_mov_b32_e32 v3, 0 s_mov_b32 s0, -1 global_load_b64 v[0:1], v[0:1], off s_mov_b32 s2, -1 s_mov_b32 s1, exec_lo v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_waitcnt vmcnt(0) v_cmpx_lt_i32_e64 v0, v1 s_cbranch_execz .LBB0_14 ; %bb.3: ; %.lr.ph.preheader v_ashrrev_i32_e32 v3, 31, v0 v_mov_b32_e32 v2, v0 v_mov_b32_e32 v6, 1 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v0, 1 s_mov_b32 s3, 0 v_lshlrev_b64 v[4:5], 2, v[2:3] s_mov_b32 s4, 0x34386e s_mov_b32 s5, 0x32738c ; implicit-def: $sgpr2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, s22, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s23, v5, vcc_lo .LBB0_4: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 v_add_co_u32 v9, vcc_lo, s26, v2 v_add_co_ci_u32_e32 v10, vcc_lo, s27, v3, vcc_lo s_mov_b32 s7, -1 s_mov_b32 s6, exec_lo global_load_u8 v7, v[9:10], off s_waitcnt vmcnt(0) v_cmpx_ne_u16_e32 0, v7 s_cbranch_execz .LBB0_8 ; %bb.5: ; in Loop: Header=BB0_4 Depth=1 global_load_b32 v9, v[4:5], off s_mov_b32 s7, 0 s_mov_b32 s8, exec_lo s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v10, 31, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[9:10], 2, v[9:10] v_add_co_u32 v9, vcc_lo, s20, v9 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v10, vcc_lo, s21, v10, vcc_lo global_load_b32 v7, v[9:10], off s_waitcnt vmcnt(0) v_cmpx_ne_u32_e32 0, v7 s_cbranch_execz .LBB0_7 ; %bb.6: ; in Loop: Header=BB0_4 Depth=1 v_mad_i64_i32 v[8:9], null, v6, v7, 0 s_add_u32 s0, 0x115c, s4 s_addc_u32 s9, 0, 0 v_add_co_u32 v13, s0, 0xf4200000, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) s_cmp_lg_u32 s0, 0 s_mov_b32 s7, exec_lo v_mad_u64_u32 v[10:11], null, 0x2717, v8, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_readfirstlane_b32 s0, v13 s_addc_u32 s9, s9, 0x10c6 s_mul_i32 s10, s9, 0xfff0bdbd s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_mul_hi_u32 s11, s0, 0xfff0bdbd v_mov_b32_e32 v6, v11 s_add_i32 s11, s11, s10 s_mul_i32 s12, s0, 0xfff0bdbd s_sub_i32 s11, s11, s0 s_mul_hi_u32 s10, s9, s12 v_mad_u64_u32 v[11:12], null, 0x2717, v9, v[6:7] s_mul_i32 s13, s9, s12 s_mul_hi_u32 s12, s0, s12 s_mul_i32 s15, s0, s11 s_mul_hi_u32 s0, s0, s11 s_add_u32 s12, s12, s15 s_addc_u32 s0, 0, s0 s_delay_alu instid0(VALU_DEP_1) v_ashrrev_i32_e32 v16, 31, v11 s_mul_hi_u32 s14, s9, s11 s_add_u32 s12, s12, s13 s_addc_u32 s0, s0, s10 s_mul_i32 s11, s9, s11 v_add_co_u32 v8, vcc_lo, v10, v16 s_addc_u32 s10, s14, 0 s_add_u32 s0, s0, s11 v_mov_b32_e32 v6, v11 v_add_co_u32 v14, s0, v13, s0 s_addc_u32 s10, 0, s10 v_xor_b32_e32 v17, v8, v16 s_cmp_lg_u32 s0, 0 v_mad_i64_i32 v[8:9], null, v0, v7, 0 s_addc_u32 s0, s9, s10 v_add_co_ci_u32_e32 v10, vcc_lo, v6, v16, vcc_lo v_mad_u64_u32 v[6:7], null, v17, s0, 0 v_mul_hi_u32 v0, v17, v14 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_xor_b32_e32 v18, v10, v16 v_mad_u64_u32 v[10:11], null, 0x186a3, v8, 0 v_mad_u64_u32 v[12:13], null, v18, v14, 0 s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v8, vcc_lo, v0, v6 v_add_co_ci_u32_e32 v19, vcc_lo, 0, v7, vcc_lo v_mad_u64_u32 v[6:7], null, v18, s0, 0 s_add_u32 s0, 0x120a, s5 v_mov_b32_e32 v0, v11 v_add_co_u32 v11, s0, 0xcec00000, s0 s_addc_u32 s9, 0, 0 s_cmp_lg_u32 s0, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[14:15], null, 0x186a3, v9, v[0:1] v_readfirstlane_b32 s0, v11 s_addc_u32 s9, s9, 0x10c6 v_add_co_u32 v0, vcc_lo, v8, v12 s_mul_i32 s10, s9, 0xfff0bd9b s_delay_alu instid0(VALU_DEP_2) s_mul_hi_u32 s11, s0, 0xfff0bd9b v_add_co_ci_u32_e32 v0, vcc_lo, v19, v13, vcc_lo s_add_i32 s11, s11, s10 v_ashrrev_i32_e32 v13, 31, v14 s_sub_i32 s10, s11, s0 s_mul_i32 s11, s0, 0xfff0bd9b s_mul_i32 s15, s0, s10 s_mul_hi_u32 s13, s9, s11 s_mul_i32 s14, s9, s11 s_mul_hi_u32 s11, s0, s11 s_mul_hi_u32 s0, s0, s10 s_add_u32 s11, s11, s15 s_addc_u32 s0, 0, s0 s_mul_hi_u32 s12, s9, s10 s_add_u32 s11, s11, s14 s_addc_u32 s0, s0, s13 s_mul_i32 s10, s9, s10 s_addc_u32 s11, s12, 0 s_add_u32 s0, s0, s10 v_mov_b32_e32 v8, v14 v_add_co_u32 v11, s10, v11, s0 v_add_co_u32 v9, s0, v10, v13 s_addc_u32 s11, 0, s11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e64 v8, s0, v8, v13, s0 v_xor_b32_e32 v14, v9, v13 s_cmp_lg_u32 s10, 0 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo s_addc_u32 s0, s9, s11 v_xor_b32_e32 v15, v8, v13 v_mad_u64_u32 v[7:8], null, v14, s0, 0 v_mul_hi_u32 v12, v14, v11 v_add_co_u32 v0, vcc_lo, v0, v6 v_add_co_ci_u32_e32 v19, vcc_lo, 0, v9, vcc_lo v_mad_u64_u32 v[9:10], null, v15, v11, 0 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_add_co_u32 v20, vcc_lo, v12, v7 v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo v_mad_u64_u32 v[6:7], null, v15, s0, 0 v_mad_u64_u32 v[11:12], null, 0xf4243, v0, 0 v_add_co_u32 v0, vcc_lo, v20, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_ci_u32_e32 v0, vcc_lo, v8, v10, vcc_lo v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, v0, v6 v_mov_b32_e32 v0, v12 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v7, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[6:7], null, 0xf4265, v8, 0 v_mad_u64_u32 v[8:9], null, 0xf4243, v19, v[0:1] v_sub_co_u32 v9, vcc_lo, v17, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mov_b32_e32 v0, v7 v_sub_co_ci_u32_e32 v11, vcc_lo, v18, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_mad_u64_u32 v[7:8], null, 0xf4265, v10, v[0:1] v_subrev_co_u32 v0, vcc_lo, 0xf4243, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_subrev_co_ci_u32_e32 v8, vcc_lo, 0, v11, vcc_lo v_sub_co_u32 v6, vcc_lo, v14, v6 v_cmp_lt_u32_e64 s0, 0xf4242, v0 v_sub_co_ci_u32_e32 v7, vcc_lo, v15, v7, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_subrev_co_u32 v12, vcc_lo, 0xf4265, v6 v_cndmask_b32_e64 v10, 0, -1, s0 v_cmp_eq_u32_e64 s0, 0, v8 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_subrev_co_ci_u32_e32 v14, vcc_lo, 0, v7, vcc_lo v_cmp_lt_u32_e32 vcc_lo, 0xf4264, v12 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v8, -1, v10, s0 v_add_nc_u32_e32 v10, 0xfff0bdbd, v0 v_cndmask_b32_e64 v15, 0, -1, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v8 s_delay_alu instid0(VALU_DEP_3) v_cndmask_b32_e32 v0, v0, v10, vcc_lo v_cmp_lt_u32_e32 vcc_lo, 0xf4242, v9 v_cndmask_b32_e64 v8, 0, -1, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v14 v_cndmask_b32_e32 v10, -1, v15, vcc_lo v_cmp_lt_u32_e32 vcc_lo, 0xf4264, v6 v_add_nc_u32_e32 v15, 0xfff0bd9b, v12 v_cndmask_b32_e64 v14, 0, -1, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v11 v_cndmask_b32_e32 v8, -1, v8, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v7 s_delay_alu instid0(VALU_DEP_4) v_cndmask_b32_e32 v7, -1, v14, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v10 v_cndmask_b32_e32 v10, v12, v15, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v8 v_mov_b32_e32 v8, 1 v_cndmask_b32_e32 v0, v9, v0, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_xor_b32_e32 v0, v0, v16 v_cndmask_b32_e32 v6, v6, v10, vcc_lo v_xor_b32_e32 v7, v6, v13 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_nc_u32_e32 v6, v0, v16 v_sub_nc_u32_e32 v0, v7, v13 .LBB0_7: ; %Flow113 ; in Loop: Header=BB0_4 Depth=1 s_or_b32 exec_lo, exec_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_or_not1_b32 s7, s7, exec_lo .LBB0_8: ; in Loop: Header=BB0_4 Depth=1 s_or_b32 exec_lo, exec_lo, s6 s_mov_b32 s0, -1 s_mov_b32 s6, -1 s_and_saveexec_b32 s8, s7 ; %bb.9: ; in Loop: Header=BB0_4 Depth=1 v_add_co_u32 v2, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo v_add_co_u32 v4, s0, v4, 4 s_delay_alu instid0(VALU_DEP_3) v_cmp_ge_i32_e32 vcc_lo, v2, v1 v_add_co_ci_u32_e64 v5, s0, 0, v5, s0 s_xor_b32 s6, exec_lo, -1 s_or_not1_b32 s0, vcc_lo, exec_lo ; %bb.10: ; %Flow114 ; in Loop: Header=BB0_4 Depth=1 s_or_b32 exec_lo, exec_lo, s8 s_xor_b32 s6, s6, -1 s_and_b32 s0, exec_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_or_b32 s3, s0, s3 s_and_not1_b32 s0, s2, exec_lo s_and_b32 s2, s6, exec_lo s_or_b32 s2, s0, s2 s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB0_4 ; %bb.11: ; %loop.exit.guard s_or_b32 exec_lo, exec_lo, s3 v_mov_b32_e32 v2, 1 v_mov_b32_e32 v3, 0 s_mov_b32 s0, 0 s_mov_b32 s3, -1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_and_saveexec_b32 s4, s2 s_xor_b32 s2, exec_lo, s4 ; %bb.12: ; %._crit_edge.loopexit v_ashrrev_i32_e32 v7, 31, v6 v_ashrrev_i32_e32 v1, 31, v0 v_cmp_eq_u32_e32 vcc_lo, 0, v8 v_mov_b32_e32 v2, v6 s_mov_b32 s0, exec_lo v_mov_b32_e32 v3, v7 v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0 s_or_not1_b32 s3, vcc_lo, exec_lo ; %bb.13: ; %Flow116 s_or_b32 exec_lo, exec_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_or_not1_b32 s2, s3, exec_lo s_or_not1_b32 s0, s0, exec_lo .LBB0_14: ; %Flow115 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_17 ; %bb.15: ; %._crit_edge s_xor_b32 s0, s2, -1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_17 ; %bb.16: v_lshlrev_b64 v[0:1], 2, v[2:3] v_lshlrev_b64 v[2:3], 2, v[4:5] v_mov_b32_e32 v6, 0 v_mov_b32_e32 v4, 1 s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v0, vcc_lo, s28, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s29, v1, vcc_lo v_add_co_u32 v2, vcc_lo, s30, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s31, v3, vcc_lo global_store_b8 v6, v6, s[24:25] global_store_b32 v[0:1], v4, off global_store_b32 v[2:3], v4, off .LBB0_17: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z8findhashPiS_S_S_PbS0_S_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 320 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 21 .amdhsa_next_free_sgpr 32 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z8findhashPiS_S_S_PbS0_S_S_, .Lfunc_end0-_Z8findhashPiS_S_S_PbS0_S_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1684 ; NumSgprs: 34 ; NumVgprs: 21 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 34 ; NumVGPRsForWavesPerEU: 21 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z7setdeg1PiS_S_Pb ; -- Begin function _Z7setdeg1PiS_S_Pb .globl _Z7setdeg1PiS_S_Pb .p2align 8 .type _Z7setdeg1PiS_S_Pb,@function _Z7setdeg1PiS_S_Pb: ; @_Z7setdeg1PiS_S_Pb ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x24 s_load_b256 s[4:11], s[0:1], 0x0 s_load_b32 s0, s[0:1], 0x2c v_and_b32_e32 v1, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_mul_i32 s1, s2, s14 s_load_b32 s2, s[6:7], 0x0 s_and_b32 s3, s0, 0xffff s_add_i32 s1, s1, s15 s_lshr_b32 s0, s0, 16 v_mad_u64_u32 v[2:3], null, s1, s3, v[1:2] v_bfe_u32 v3, v0, 10, 10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mad_u64_u32 v[0:1], null, v2, s0, v[3:4] s_mov_b32 s0, exec_lo s_waitcnt lgkmcnt(0) v_cmpx_gt_i32_e64 s2, v0 s_cbranch_execz .LBB1_10 ; %bb.1: v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[0:1] v_add_co_u32 v0, vcc_lo, s8, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s9, v3, vcc_lo global_load_b32 v4, v[0:1], off s_waitcnt vmcnt(0) v_cmp_eq_u32_e32 vcc_lo, 0, v4 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB1_10 ; %bb.2: v_add_co_u32 v2, vcc_lo, s4, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo s_mov_b32 s1, -1 s_mov_b32 s0, exec_lo global_load_b64 v[2:3], v[2:3], off s_waitcnt vmcnt(0) v_cmpx_lt_i32_e64 v2, v3 s_cbranch_execz .LBB1_8 ; %bb.3: ; %.lr.ph.preheader v_ashrrev_i32_e32 v4, 31, v2 s_mov_b32 s1, 0 ; implicit-def: $sgpr2 ; implicit-def: $sgpr4 ; implicit-def: $sgpr3 .LBB1_4: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 v_add_co_u32 v5, vcc_lo, s10, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo s_or_b32 s3, s3, exec_lo s_or_b32 s4, s4, exec_lo s_mov_b32 s5, exec_lo global_load_u8 v5, v[5:6], off s_waitcnt vmcnt(0) v_cmpx_eq_u16_e32 0, v5 ; %bb.5: ; in Loop: Header=BB1_4 Depth=1 v_add_co_u32 v2, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo s_and_not1_b32 s4, s4, exec_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_cmp_ge_i32_e32 vcc_lo, v2, v3 s_and_not1_b32 s3, s3, exec_lo s_and_b32 s6, vcc_lo, exec_lo s_or_b32 s4, s4, s6 ; %bb.6: ; %Flow ; in Loop: Header=BB1_4 Depth=1 s_or_b32 exec_lo, exec_lo, s5 s_xor_b32 s5, s3, -1 s_and_b32 s6, exec_lo, s4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_or_b32 s1, s6, s1 s_and_not1_b32 s2, s2, exec_lo s_and_b32 s5, s5, exec_lo s_or_b32 s2, s2, s5 s_and_not1_b32 exec_lo, exec_lo, s1 s_cbranch_execnz .LBB1_4 ; %bb.7: ; %loop.exit.guard s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) s_or_not1_b32 s1, s2, exec_lo .LBB1_8: ; %Flow38 s_or_b32 exec_lo, exec_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 exec_lo, exec_lo, s1 s_cbranch_execz .LBB1_10 ; %bb.9: ; %._crit_edge v_mov_b32_e32 v2, 1 global_store_b32 v[0:1], v2, off .LBB1_10: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7setdeg1PiS_S_Pb .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z7setdeg1PiS_S_Pb, .Lfunc_end1-_Z7setdeg1PiS_S_Pb ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 396 ; NumSgprs: 18 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z7puttoidPiS_S_S_PbS_S_ ; -- Begin function _Z7puttoidPiS_S_S_PbS_S_ .globl _Z7puttoidPiS_S_S_PbS_S_ .p2align 8 .type _Z7puttoidPiS_S_S_PbS_S_,@function _Z7puttoidPiS_S_S_PbS_S_: ; @_Z7puttoidPiS_S_S_PbS_S_ ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x3c s_load_b256 s[16:23], s[0:1], 0x0 s_load_b32 s3, s[0:1], 0x44 v_and_b32_e32 v1, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_mul_i32 s2, s2, s14 s_load_b32 s4, s[18:19], 0x0 s_and_b32 s5, s3, 0xffff s_add_i32 s2, s2, s15 s_delay_alu instid0(SALU_CYCLE_1) v_mad_u64_u32 v[2:3], null, s2, s5, v[1:2] v_bfe_u32 v3, v0, 10, 10 s_lshr_b32 s2, s3, 16 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, v2, s2, v[3:4] s_mov_b32 s2, exec_lo s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_i32_e64 s4, v0 s_cbranch_execz .LBB2_17 ; %bb.1: v_ashrrev_i32_e32 v1, 31, v0 s_load_b256 s[4:11], s[0:1], 0x20 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[3:4], 2, v[0:1] v_add_co_u32 v1, vcc_lo, s20, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, s21, v4, vcc_lo global_load_b32 v5, v[1:2], off s_waitcnt vmcnt(0) v_cmp_eq_u32_e32 vcc_lo, 0, v5 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB2_17 ; %bb.2: v_add_co_u32 v3, vcc_lo, s16, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s17, v4, vcc_lo v_mov_b32_e32 v5, 1 v_mov_b32_e32 v6, 0 s_mov_b32 s0, -1 global_load_b64 v[3:4], v[3:4], off s_mov_b32 s2, -1 s_mov_b32 s1, exec_lo s_waitcnt vmcnt(0) v_cmpx_lt_i32_e64 v3, v4 s_cbranch_execz .LBB2_14 ; %bb.3: ; %.lr.ph.preheader v_ashrrev_i32_e32 v6, 31, v3 v_mov_b32_e32 v5, v3 v_mov_b32_e32 v3, 1 v_mov_b32_e32 v9, 0 s_mov_b32 s3, 0 s_waitcnt lgkmcnt(0) s_mov_b32 s10, 0x34386e v_lshlrev_b64 v[7:8], 2, v[5:6] ; implicit-def: $sgpr2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, s22, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s23, v8, vcc_lo .LBB2_4: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 v_add_co_u32 v10, vcc_lo, s4, v5 v_add_co_ci_u32_e32 v11, vcc_lo, s5, v6, vcc_lo s_mov_b32 s13, -1 s_mov_b32 s0, exec_lo global_load_u8 v10, v[10:11], off s_waitcnt vmcnt(0) v_cmpx_ne_u16_e32 0, v10 s_cbranch_execz .LBB2_8 ; %bb.5: ; in Loop: Header=BB2_4 Depth=1 global_load_b32 v10, v[7:8], off s_mov_b32 s11, 0 s_mov_b32 s12, exec_lo s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v11, 31, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], 2, v[10:11] v_add_co_u32 v10, vcc_lo, s20, v10 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v11, vcc_lo, s21, v11, vcc_lo global_load_b32 v10, v[10:11], off s_waitcnt vmcnt(0) v_cmpx_ne_u32_e32 0, v10 s_cbranch_execz .LBB2_7 ; %bb.6: ; in Loop: Header=BB2_4 Depth=1 v_mad_i64_i32 v[11:12], null, v3, v10, 0 s_add_u32 s13, 0x115c, s10 s_addc_u32 s14, 0, 0 v_add_co_u32 v13, s13, 0xf4200000, s13 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) s_cmp_lg_u32 s13, 0 s_mov_b32 s11, exec_lo v_mad_u64_u32 v[9:10], null, 0x2717, v11, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_readfirstlane_b32 s13, v13 s_addc_u32 s14, s14, 0x10c6 s_mul_i32 s15, s14, 0xfff0bdbd s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_mul_hi_u32 s16, s13, 0xfff0bdbd v_mov_b32_e32 v3, v10 s_add_i32 s16, s16, s15 s_mul_i32 s17, s13, 0xfff0bdbd s_sub_i32 s16, s16, s13 s_mul_hi_u32 s15, s14, s17 v_mad_u64_u32 v[10:11], null, 0x2717, v12, v[3:4] s_mul_i32 s18, s14, s17 s_mul_hi_u32 s17, s13, s17 s_mul_i32 s22, s13, s16 s_mul_hi_u32 s13, s13, s16 s_add_u32 s17, s17, s22 s_addc_u32 s13, 0, s13 s_delay_alu instid0(VALU_DEP_1) v_ashrrev_i32_e32 v14, 31, v10 s_mul_hi_u32 s19, s14, s16 s_add_u32 s17, s17, s18 v_mov_b32_e32 v3, v10 s_addc_u32 s13, s13, s15 s_mul_i32 s15, s14, s16 v_add_co_u32 v9, vcc_lo, v9, v14 s_addc_u32 s16, s19, 0 s_add_u32 s13, s13, s15 s_addc_u32 s15, 0, s16 v_add_co_u32 v13, s13, v13, s13 v_add_co_ci_u32_e32 v3, vcc_lo, v3, v14, vcc_lo v_xor_b32_e32 v15, v9, v14 s_cmp_lg_u32 s13, 0 s_addc_u32 s13, s14, s15 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v17, v3, v14 v_mad_u64_u32 v[9:10], null, v15, s13, 0 v_mul_hi_u32 v16, v15, v13 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[11:12], null, v17, v13, 0 v_add_co_u32 v3, vcc_lo, v16, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v13, vcc_lo, 0, v10, vcc_lo v_mad_u64_u32 v[9:10], null, v17, s13, 0 v_add_co_u32 v3, vcc_lo, v3, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v3, vcc_lo, v13, v12, vcc_lo v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, v9 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v10, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, 0xf4243, v3, 0 v_mov_b32_e32 v3, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[10:11], null, 0xf4243, v12, v[3:4] v_sub_co_u32 v3, vcc_lo, v15, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_co_ci_u32_e32 v9, vcc_lo, v17, v10, vcc_lo v_subrev_co_u32 v10, vcc_lo, 0xf4243, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_subrev_co_ci_u32_e32 v11, vcc_lo, 0, v9, vcc_lo v_cmp_lt_u32_e32 vcc_lo, 0xf4242, v10 v_cndmask_b32_e64 v12, 0, -1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, 0xf4242, v3 v_cndmask_b32_e64 v13, 0, -1, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v11 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_dual_cndmask_b32 v11, -1, v12 :: v_dual_add_nc_u32 v12, 0xfff0bdbd, v10 v_cmp_eq_u32_e32 vcc_lo, 0, v9 v_cndmask_b32_e32 v9, -1, v13, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_cmp_ne_u32_e32 vcc_lo, 0, v11 v_cndmask_b32_e32 v10, v10, v12, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cmp_ne_u32_e32 vcc_lo, 0, v9 v_mov_b32_e32 v9, 1 v_cndmask_b32_e32 v3, v3, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_xor_b32_e32 v3, v3, v14 v_sub_nc_u32_e32 v3, v3, v14 .LBB2_7: ; %Flow103 ; in Loop: Header=BB2_4 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_delay_alu instid0(SALU_CYCLE_1) s_or_not1_b32 s13, s11, exec_lo .LBB2_8: ; in Loop: Header=BB2_4 Depth=1 s_or_b32 exec_lo, exec_lo, s0 s_mov_b32 s0, -1 s_mov_b32 s12, -1 s_and_saveexec_b32 s11, s13 ; %bb.9: ; in Loop: Header=BB2_4 Depth=1 v_add_co_u32 v5, vcc_lo, v5, 1 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo v_add_co_u32 v7, s0, v7, 4 s_delay_alu instid0(VALU_DEP_3) v_cmp_ge_i32_e32 vcc_lo, v5, v4 v_add_co_ci_u32_e64 v8, s0, 0, v8, s0 s_xor_b32 s12, exec_lo, -1 s_or_not1_b32 s0, vcc_lo, exec_lo ; %bb.10: ; %Flow104 ; in Loop: Header=BB2_4 Depth=1 s_or_b32 exec_lo, exec_lo, s11 s_xor_b32 s11, s12, -1 s_and_b32 s0, exec_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_or_b32 s3, s0, s3 s_and_not1_b32 s0, s2, exec_lo s_and_b32 s2, s11, exec_lo s_or_b32 s2, s0, s2 s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB2_4 ; %bb.11: ; %loop.exit.guard s_or_b32 exec_lo, exec_lo, s3 v_mov_b32_e32 v5, 1 v_mov_b32_e32 v6, 0 s_mov_b32 s0, 0 s_mov_b32 s3, -1 s_and_saveexec_b32 s4, s2 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s2, exec_lo, s4 ; %bb.12: ; %._crit_edge.loopexit v_ashrrev_i32_e32 v4, 31, v3 v_cmp_eq_u32_e32 vcc_lo, 0, v9 s_mov_b32 s0, exec_lo s_delay_alu instid0(VALU_DEP_2) v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_not1_b32 s3, vcc_lo, exec_lo ; %bb.13: ; %Flow106 s_or_b32 exec_lo, exec_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_or_not1_b32 s2, s3, exec_lo s_or_not1_b32 s0, s0, exec_lo .LBB2_14: ; %Flow105 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB2_17 ; %bb.15: ; %._crit_edge s_xor_b32 s0, s2, -1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB2_17 ; %bb.16: v_lshlrev_b64 v[3:4], 2, v[5:6] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s6, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo global_load_b32 v3, v[3:4], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], 2, v[3:4] v_add_co_u32 v4, vcc_lo, s8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo global_store_b32 v[1:2], v3, off global_store_b32 v[4:5], v0, off .LBB2_17: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7puttoidPiS_S_S_PbS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 312 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 18 .amdhsa_next_free_sgpr 24 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end2: .size _Z7puttoidPiS_S_S_PbS_S_, .Lfunc_end2-_Z7puttoidPiS_S_S_PbS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1224 ; NumSgprs: 26 ; NumVgprs: 18 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 3 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 26 ; NumVGPRsForWavesPerEU: 18 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .section .text.unlikely.,"ax",@progbits .p2align 2 ; -- Begin function __ockl_dm_alloc .type __ockl_dm_alloc,@function __ockl_dm_alloc: ; @__ockl_dm_alloc ; %bb.0: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) s_or_saveexec_b32 s0, -1 scratch_store_b32 off, v40, s32 ; 4-byte Folded Spill s_mov_b32 exec_lo, s0 v_writelane_b32 v40, s34, 0 v_writelane_b32 v40, s35, 1 v_writelane_b32 v40, s36, 2 v_writelane_b32 v40, s37, 3 v_writelane_b32 v40, s38, 4 v_writelane_b32 v40, s39, 5 v_writelane_b32 v40, s40, 6 v_writelane_b32 v40, s41, 7 v_writelane_b32 v40, s42, 8 v_writelane_b32 v40, s43, 9 v_writelane_b32 v40, s44, 10 v_writelane_b32 v40, s30, 11 v_writelane_b32 v40, s31, 12 v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0 v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 s_mov_b32 s22, exec_lo s_delay_alu instid0(VALU_DEP_3) v_cmpx_ne_u64_e32 0, v[4:5] s_cbranch_execz .LBB3_702 ; %bb.1: v_mbcnt_lo_u32_b32 v2, -1, 0 ; implicit-def: $vgpr0_vgpr1 s_mov_b32 s0, exec_lo v_cmpx_gt_u64_e32 0xc01, v[4:5] s_xor_b32 s23, exec_lo, s0 s_cbranch_execz .LBB3_668 ; %bb.2: v_max_u32_e32 v0, 16, v4 v_mov_b32_e32 v5, 0 s_load_b64 s[10:11], s[8:9], 0x60 v_dual_mov_b32 v118, 1 :: v_dual_mov_b32 v17, 0x1800 s_delay_alu instid0(VALU_DEP_3) v_clz_i32_u32_e32 v1, v0 v_mov_b32_e32 v20, 0x200000 v_mov_b32_e32 v8, v5 v_mov_b32_e32 v14, 1 v_mov_b32_e32 v68, 0x100 v_not_b32_e32 v3, v1 v_lshlrev_b32_e32 v1, 1, v1 v_mov_b32_e32 v13, 3 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v3, 15, v3 v_lshlrev_b32_e64 v3, v3, 1 s_waitcnt lgkmcnt(0) s_add_u32 s12, s10, 0x1a800 s_addc_u32 s13, s11, 0 s_add_u32 s14, s10, 0x1a808 v_lshrrev_b32_e32 v4, 1, v3 v_cmp_gt_u32_e32 vcc_lo, v0, v3 s_addc_u32 s15, s11, 0 s_add_u32 s4, s10, 0x800 s_addc_u32 s5, s11, 0 v_or_b32_e32 v3, v4, v3 v_cndmask_b32_e64 v6, 0, 1, vcc_lo s_getpc_b64 s[0:1] s_add_u32 s0, s0, __unnamed_1@rel32@lo+12 s_addc_u32 s1, s1, __unnamed_1@rel32@hi+20 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __unnamed_1@rel32@lo+4 s_addc_u32 s3, s3, __unnamed_1@rel32@hi+12 s_add_u32 s6, s10, 0x1000 v_cmp_gt_u32_e32 vcc_lo, v0, v3 v_sub_nc_u32_e32 v1, v6, v1 s_addc_u32 s7, s11, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v7, vcc_lo, 54, v1, vcc_lo v_lshlrev_b64 v[0:1], 7, v[7:8] v_lshlrev_b64 v[3:4], 5, v[7:8] v_lshrrev_b64 v[8:9], v7, 0xbf s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v32, vcc_lo, s4, v0 v_add_co_ci_u32_e32 v33, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v34, vcc_lo, s10, v0 v_add_co_ci_u32_e32 v35, vcc_lo, s11, v1, vcc_lo v_add_co_u32 v36, vcc_lo, v3, s0 v_add_co_ci_u32_e32 v37, vcc_lo, s1, v4, vcc_lo v_add_co_u32 v38, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v39, vcc_lo, s3, v4, vcc_lo v_add_co_u32 v48, vcc_lo, s6, v0 s_add_u32 s0, s10, 0x2000 v_add_co_ci_u32_e32 v49, vcc_lo, s7, v1, vcc_lo s_addc_u32 s1, s11, 0 v_add_co_u32 v50, vcc_lo, s0, v0 s_add_u32 s2, s10, 0x1800 v_add_co_ci_u32_e32 v51, vcc_lo, s1, v1, vcc_lo s_addc_u32 s3, s11, 0 v_add_co_u32 v52, vcc_lo, s2, v0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, __unnamed_1@rel32@lo+24 s_addc_u32 s1, s1, __unnamed_1@rel32@hi+32 v_add_co_ci_u32_e32 v53, vcc_lo, s3, v1, vcc_lo v_add_co_u32 v54, vcc_lo, v3, s0 v_and_b32_e32 v0, 1, v8 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __unnamed_1@rel32@lo+20 s_addc_u32 s3, s3, __unnamed_1@rel32@hi+28 v_add_co_ci_u32_e32 v55, vcc_lo, s1, v4, vcc_lo v_add_co_u32 v64, vcc_lo, v3, s2 v_mov_b32_e32 v9, v5 s_getpc_b64 s[4:5] s_add_u32 s4, s4, __unnamed_1@rel32@lo+28 s_addc_u32 s5, s5, __unnamed_1@rel32@hi+36 v_add_co_ci_u32_e32 v65, vcc_lo, s3, v4, vcc_lo v_add_co_u32 v66, vcc_lo, v3, s4 v_cmp_eq_u32_e64 s0, 1, v0 v_mov_b32_e32 v0, 0 v_add_co_ci_u32_e32 v67, vcc_lo, s5, v4, vcc_lo v_mov_b32_e32 v8, v5 v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v1, 0 v_mov_b32_e32 v3, v14 s_add_u32 s24, s10, 0x100 s_mov_b32 s4, 0 s_addc_u32 s25, s11, 0 .LBB3_3: ; =>This Loop Header: Depth=1 ; Child Loop BB3_6 Depth 2 ; Child Loop BB3_11 Depth 3 ; Child Loop BB3_14 Depth 4 ; Child Loop BB3_43 Depth 4 ; Child Loop BB3_47 Depth 5 ; Child Loop BB3_75 Depth 5 ; Child Loop BB3_93 Depth 6 ; Child Loop BB3_101 Depth 6 ; Child Loop BB3_107 Depth 6 ; Child Loop BB3_116 Depth 6 ; Child Loop BB3_121 Depth 6 ; Child Loop BB3_123 Depth 6 ; Child Loop BB3_144 Depth 6 ; Child Loop BB3_152 Depth 6 ; Child Loop BB3_158 Depth 6 ; Child Loop BB3_167 Depth 6 ; Child Loop BB3_175 Depth 6 ; Child Loop BB3_178 Depth 6 ; Child Loop BB3_180 Depth 6 ; Child Loop BB3_182 Depth 6 ; Child Loop BB3_184 Depth 6 ; Child Loop BB3_186 Depth 6 ; Child Loop BB3_188 Depth 6 ; Child Loop BB3_210 Depth 6 ; Child Loop BB3_218 Depth 6 ; Child Loop BB3_224 Depth 6 ; Child Loop BB3_233 Depth 6 ; Child Loop BB3_240 Depth 6 ; Child Loop BB3_243 Depth 6 ; Child Loop BB3_248 Depth 6 ; Child Loop BB3_255 Depth 6 ; Child Loop BB3_288 Depth 6 ; Child Loop BB3_296 Depth 6 ; Child Loop BB3_302 Depth 6 ; Child Loop BB3_311 Depth 6 ; Child Loop BB3_320 Depth 5 ; Child Loop BB3_323 Depth 5 ; Child Loop BB3_325 Depth 5 ; Child Loop BB3_327 Depth 5 ; Child Loop BB3_329 Depth 5 ; Child Loop BB3_331 Depth 5 ; Child Loop BB3_333 Depth 5 ; Child Loop BB3_347 Depth 3 ; Child Loop BB3_351 Depth 4 ; Child Loop BB3_378 Depth 4 ; Child Loop BB3_396 Depth 5 ; Child Loop BB3_404 Depth 5 ; Child Loop BB3_410 Depth 5 ; Child Loop BB3_419 Depth 5 ; Child Loop BB3_424 Depth 5 ; Child Loop BB3_426 Depth 5 ; Child Loop BB3_447 Depth 5 ; Child Loop BB3_455 Depth 5 ; Child Loop BB3_461 Depth 5 ; Child Loop BB3_470 Depth 5 ; Child Loop BB3_478 Depth 5 ; Child Loop BB3_481 Depth 5 ; Child Loop BB3_483 Depth 5 ; Child Loop BB3_485 Depth 5 ; Child Loop BB3_487 Depth 5 ; Child Loop BB3_489 Depth 5 ; Child Loop BB3_491 Depth 5 ; Child Loop BB3_513 Depth 5 ; Child Loop BB3_521 Depth 5 ; Child Loop BB3_527 Depth 5 ; Child Loop BB3_536 Depth 5 ; Child Loop BB3_543 Depth 5 ; Child Loop BB3_546 Depth 5 ; Child Loop BB3_551 Depth 5 ; Child Loop BB3_558 Depth 5 ; Child Loop BB3_591 Depth 5 ; Child Loop BB3_599 Depth 5 ; Child Loop BB3_605 Depth 5 ; Child Loop BB3_614 Depth 5 ; Child Loop BB3_623 Depth 4 ; Child Loop BB3_626 Depth 4 ; Child Loop BB3_628 Depth 4 ; Child Loop BB3_630 Depth 4 ; Child Loop BB3_632 Depth 4 ; Child Loop BB3_634 Depth 4 ; Child Loop BB3_636 Depth 4 ; Child Loop BB3_649 Depth 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_mov_b32_e32 v119, v3 v_mov_b32_e32 v3, v5 s_mov_b32 s26, exec_lo ;;#ASMSTART ;;#ASMEND v_cmpx_ne_u32_e32 0, v119 s_cbranch_execz .LBB3_666 ; %bb.4: ; in Loop: Header=BB3_3 Depth=1 v_readfirstlane_b32 s1, v7 s_mov_b32 s27, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e64 s1, v7 s_cbranch_execz .LBB3_665 ; %bb.5: ; %.preheader196.preheader ; in Loop: Header=BB3_3 Depth=1 v_mov_b32_e32 v3, 1 .LBB3_6: ; %.preheader196 ; Parent Loop BB3_3 Depth=1 ; => This Loop Header: Depth=2 ; Child Loop BB3_11 Depth 3 ; Child Loop BB3_14 Depth 4 ; Child Loop BB3_43 Depth 4 ; Child Loop BB3_47 Depth 5 ; Child Loop BB3_75 Depth 5 ; Child Loop BB3_93 Depth 6 ; Child Loop BB3_101 Depth 6 ; Child Loop BB3_107 Depth 6 ; Child Loop BB3_116 Depth 6 ; Child Loop BB3_121 Depth 6 ; Child Loop BB3_123 Depth 6 ; Child Loop BB3_144 Depth 6 ; Child Loop BB3_152 Depth 6 ; Child Loop BB3_158 Depth 6 ; Child Loop BB3_167 Depth 6 ; Child Loop BB3_175 Depth 6 ; Child Loop BB3_178 Depth 6 ; Child Loop BB3_180 Depth 6 ; Child Loop BB3_182 Depth 6 ; Child Loop BB3_184 Depth 6 ; Child Loop BB3_186 Depth 6 ; Child Loop BB3_188 Depth 6 ; Child Loop BB3_210 Depth 6 ; Child Loop BB3_218 Depth 6 ; Child Loop BB3_224 Depth 6 ; Child Loop BB3_233 Depth 6 ; Child Loop BB3_240 Depth 6 ; Child Loop BB3_243 Depth 6 ; Child Loop BB3_248 Depth 6 ; Child Loop BB3_255 Depth 6 ; Child Loop BB3_288 Depth 6 ; Child Loop BB3_296 Depth 6 ; Child Loop BB3_302 Depth 6 ; Child Loop BB3_311 Depth 6 ; Child Loop BB3_320 Depth 5 ; Child Loop BB3_323 Depth 5 ; Child Loop BB3_325 Depth 5 ; Child Loop BB3_327 Depth 5 ; Child Loop BB3_329 Depth 5 ; Child Loop BB3_331 Depth 5 ; Child Loop BB3_333 Depth 5 ; Child Loop BB3_347 Depth 3 ; Child Loop BB3_351 Depth 4 ; Child Loop BB3_378 Depth 4 ; Child Loop BB3_396 Depth 5 ; Child Loop BB3_404 Depth 5 ; Child Loop BB3_410 Depth 5 ; Child Loop BB3_419 Depth 5 ; Child Loop BB3_424 Depth 5 ; Child Loop BB3_426 Depth 5 ; Child Loop BB3_447 Depth 5 ; Child Loop BB3_455 Depth 5 ; Child Loop BB3_461 Depth 5 ; Child Loop BB3_470 Depth 5 ; Child Loop BB3_478 Depth 5 ; Child Loop BB3_481 Depth 5 ; Child Loop BB3_483 Depth 5 ; Child Loop BB3_485 Depth 5 ; Child Loop BB3_487 Depth 5 ; Child Loop BB3_489 Depth 5 ; Child Loop BB3_491 Depth 5 ; Child Loop BB3_513 Depth 5 ; Child Loop BB3_521 Depth 5 ; Child Loop BB3_527 Depth 5 ; Child Loop BB3_536 Depth 5 ; Child Loop BB3_543 Depth 5 ; Child Loop BB3_546 Depth 5 ; Child Loop BB3_551 Depth 5 ; Child Loop BB3_558 Depth 5 ; Child Loop BB3_591 Depth 5 ; Child Loop BB3_599 Depth 5 ; Child Loop BB3_605 Depth 5 ; Child Loop BB3_614 Depth 5 ; Child Loop BB3_623 Depth 4 ; Child Loop BB3_626 Depth 4 ; Child Loop BB3_628 Depth 4 ; Child Loop BB3_630 Depth 4 ; Child Loop BB3_632 Depth 4 ; Child Loop BB3_634 Depth 4 ; Child Loop BB3_636 Depth 4 ; Child Loop BB3_649 Depth 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_mov_b32 v128, v3 :: v_dual_mov_b32 v3, 0 s_mov_b32 s28, exec_lo ;;#ASMSTART ;;#ASMEND v_cmpx_ne_u32_e32 0, v128 s_cbranch_execz .LBB3_664 ; %bb.7: ; in Loop: Header=BB3_6 Depth=2 v_mbcnt_lo_u32_b32 v3, exec_lo, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) v_cmp_eq_u32_e32 vcc_lo, 0, v3 v_mov_b32_e32 v3, 0 s_and_saveexec_b32 s1, vcc_lo s_cbranch_execz .LBB3_9 ; %bb.8: ; in Loop: Header=BB3_6 Depth=2 global_load_b32 v3, v[32:33], off glc .LBB3_9: ; in Loop: Header=BB3_6 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_waitcnt vmcnt(0) v_readfirstlane_b32 s29, v3 s_delay_alu instid0(VALU_DEP_1) s_cmp_gt_u32 s29, 0x100ff s_cbranch_scc0 .LBB3_344 ; %bb.10: ; in Loop: Header=BB3_6 Depth=2 v_mbcnt_lo_u32_b32 v129, exec_lo, 0 v_mov_b32_e32 v4, v7 s_mov_b32 s30, 0 s_bcnt1_i32_b32 s31, exec_lo ; implicit-def: $vgpr11_vgpr12 .LBB3_11: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; => This Loop Header: Depth=3 ; Child Loop BB3_14 Depth 4 ; Child Loop BB3_43 Depth 4 ; Child Loop BB3_47 Depth 5 ; Child Loop BB3_75 Depth 5 ; Child Loop BB3_93 Depth 6 ; Child Loop BB3_101 Depth 6 ; Child Loop BB3_107 Depth 6 ; Child Loop BB3_116 Depth 6 ; Child Loop BB3_121 Depth 6 ; Child Loop BB3_123 Depth 6 ; Child Loop BB3_144 Depth 6 ; Child Loop BB3_152 Depth 6 ; Child Loop BB3_158 Depth 6 ; Child Loop BB3_167 Depth 6 ; Child Loop BB3_175 Depth 6 ; Child Loop BB3_178 Depth 6 ; Child Loop BB3_180 Depth 6 ; Child Loop BB3_182 Depth 6 ; Child Loop BB3_184 Depth 6 ; Child Loop BB3_186 Depth 6 ; Child Loop BB3_188 Depth 6 ; Child Loop BB3_210 Depth 6 ; Child Loop BB3_218 Depth 6 ; Child Loop BB3_224 Depth 6 ; Child Loop BB3_233 Depth 6 ; Child Loop BB3_240 Depth 6 ; Child Loop BB3_243 Depth 6 ; Child Loop BB3_248 Depth 6 ; Child Loop BB3_255 Depth 6 ; Child Loop BB3_288 Depth 6 ; Child Loop BB3_296 Depth 6 ; Child Loop BB3_302 Depth 6 ; Child Loop BB3_311 Depth 6 ; Child Loop BB3_320 Depth 5 ; Child Loop BB3_323 Depth 5 ; Child Loop BB3_325 Depth 5 ; Child Loop BB3_327 Depth 5 ; Child Loop BB3_329 Depth 5 ; Child Loop BB3_331 Depth 5 ; Child Loop BB3_333 Depth 5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_lshlrev_b64 v[15:16], 7, v[4:5] ;;#ASMSTART ;;#ASMEND v_cmp_eq_u32_e64 s1, 0, v129 v_mov_b32_e32 v6, 0 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB3_13 ; %bb.12: ; in Loop: Header=BB3_11 Depth=3 v_add_co_u32 v18, vcc_lo, s10, v15 v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo global_load_b32 v6, v[18:19], off glc .LBB3_13: ; in Loop: Header=BB3_11 Depth=3 s_or_b32 exec_lo, exec_lo, s2 v_lshlrev_b64 v[18:19], 5, v[4:5] s_getpc_b64 s[2:3] s_add_u32 s2, s2, __unnamed_1@rel32@lo+8 s_addc_u32 s3, s3, __unnamed_1@rel32@hi+16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v18, vcc_lo, v18, s2 v_add_co_ci_u32_e32 v19, vcc_lo, s3, v19, vcc_lo s_waitcnt vmcnt(0) v_readfirstlane_b32 s2, v6 global_load_b32 v3, v[18:19], off v_add_nc_u32_e32 v6, s2, v129 s_mov_b32 s2, 0x10100 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v18, 0xff00ff01, v6 v_lshrrev_b32_e32 v18, 16, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_u32_u24_e32 v18, 0x10100, v18 v_sub_nc_u32_e32 v6, v6, v18 v_add_co_u32 v18, vcc_lo, s10, v15 v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo .LBB3_14: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; => This Inner Loop Header: Depth=4 s_mov_b32 s3, exec_lo ; implicit-def: $vgpr15_vgpr16 s_delay_alu instid0(VALU_DEP_3) v_cmpx_gt_u32_e32 0x100, v6 s_xor_b32 s3, exec_lo, s3 ; %bb.15: ; in Loop: Header=BB3_14 Depth=4 s_add_u32 s6, s10, 0x2800 s_addc_u32 s7, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7] v_mad_u64_u32 v[15:16], null, v6, 24, v[21:22] ; %bb.16: ; %Flow1135 ; in Loop: Header=BB3_14 Depth=4 s_and_not1_saveexec_b32 s3, s3 s_cbranch_execz .LBB3_18 ; %bb.17: ; in Loop: Header=BB3_14 Depth=4 s_add_u32 s6, s10, 0x2800 v_add_nc_u32_e32 v21, 0xffffff00, v6 s_addc_u32 s7, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7] v_lshrrev_b32_e32 v23, 8, v21 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[21:22], null, v23, 24, v[15:16] v_and_b32_e32 v23, 0xff, v6 global_load_b64 v[21:22], v[21:22], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[15:16], null, v23, 24, v[21:22] .LBB3_18: ; in Loop: Header=BB3_14 Depth=4 s_or_b32 exec_lo, exec_lo, s3 global_load_b32 v15, v[15:16], off offset:16 glc s_waitcnt vmcnt(0) v_cmp_lt_u32_e32 vcc_lo, v15, v3 s_cbranch_vccz .LBB3_20 ; %bb.19: ; in Loop: Header=BB3_14 Depth=4 s_ctz_i32_b32 s3, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_lshl_b32 s3, s3, 2 v_mov_b32_e32 v15, s3 ds_bpermute_b32 v15, v15, v6 s_branch .LBB3_21 .LBB3_20: ; in Loop: Header=BB3_14 Depth=4 v_mov_b32_e32 v15, -1 .LBB3_21: ; in Loop: Header=BB3_14 Depth=4 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s5, v15 s_cmp_eq_u32 s5, -1 s_cselect_b32 s3, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB3_24 ; %bb.22: ; in Loop: Header=BB3_14 Depth=4 s_cmpk_lt_u32 s5, 0x100 s_cbranch_scc0 .LBB3_25 ; %bb.23: ; in Loop: Header=BB3_14 Depth=4 s_add_u32 s6, s10, 0x2800 s_addc_u32 s7, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7] s_mov_b32 s6, 0 v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22] s_branch .LBB3_26 .LBB3_24: ; in Loop: Header=BB3_14 Depth=4 s_mov_b32 s5, -1 ; implicit-def: $vgpr15_vgpr16 s_branch .LBB3_29 .LBB3_25: ; in Loop: Header=BB3_14 Depth=4 s_mov_b32 s6, -1 ; implicit-def: $vgpr15_vgpr16 .LBB3_26: ; %Flow1128 ; in Loop: Header=BB3_14 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_28 ; %bb.27: ; in Loop: Header=BB3_14 Depth=4 s_add_i32 s6, s5, 0xffffff00 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) s_lshr_b32 s16, s6, 8 s_add_u32 s6, s10, 0x2800 s_addc_u32 s7, s11, 0 s_and_b32 s5, s5, 0xff v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7] v_mad_u64_u32 v[21:22], null, s16, 24, v[15:16] global_load_b64 v[21:22], v[21:22], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22] .LBB3_28: ; %Flow1129 ; in Loop: Header=BB3_14 Depth=4 s_mov_b32 s5, 0 .LBB3_29: ; %Flow1131 ; in Loop: Header=BB3_14 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_33 ; %bb.30: ; in Loop: Header=BB3_14 Depth=4 v_add_nc_u32_e32 v6, s31, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v15, 0xff00ff01, v6 v_lshrrev_b32_e32 v15, 16, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_u32_u24_e32 v15, 0x10100, v15 v_sub_nc_u32_e32 v6, v6, v15 s_and_saveexec_b32 s5, s1 s_cbranch_execz .LBB3_32 ; %bb.31: ; in Loop: Header=BB3_14 Depth=4 global_store_b32 v[18:19], v6, off .LBB3_32: ; in Loop: Header=BB3_14 Depth=4 s_or_b32 exec_lo, exec_lo, s5 v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v15, v11 s_sub_i32 s2, s2, s31 .LBB3_33: ; in Loop: Header=BB3_14 Depth=4 s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccz .LBB3_35 ; %bb.34: ; in Loop: Header=BB3_14 Depth=4 s_mov_b32 s3, 0 s_mov_b32 s5, -1 s_mov_b32 s6, -1 ; implicit-def: $sgpr2 ; implicit-def: $vgpr6 s_branch .LBB3_36 .LBB3_35: ; in Loop: Header=BB3_14 Depth=4 s_cmp_lt_i32 s2, 1 s_mov_b32 s5, 0 s_cselect_b32 s6, -1, 0 ; implicit-def: $sgpr3 .LBB3_36: ; %Flow1137 ; in Loop: Header=BB3_14 Depth=4 v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16 s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_14 ; %bb.37: ; %loop.exit.guard ; in Loop: Header=BB3_11 Depth=3 v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16 s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccz .LBB3_342 ; %bb.38: ; in Loop: Header=BB3_11 Depth=3 v_and_b32_e32 v3, -2, v4 v_mov_b32_e32 v11, 0 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e32 vcc_lo, v4, v7 s_mov_b32 s3, 0 v_cmp_gt_u32_e64 s2, 14, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s34, s2 s_cbranch_execz .LBB3_341 ; %bb.39: ; in Loop: Header=BB3_11 Depth=3 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB3_41 ; %bb.40: ; in Loop: Header=BB3_11 Depth=3 v_mov_b32_e32 v4, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[11:12], 7, v[3:4] v_add_co_u32 v11, vcc_lo, s24, v11 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, s25, v12, vcc_lo global_load_b32 v4, v[11:12], off offset:2048 glc .LBB3_41: ; in Loop: Header=BB3_11 Depth=3 s_or_b32 exec_lo, exec_lo, s2 s_waitcnt vmcnt(0) v_readfirstlane_b32 s36, v4 v_add_nc_u32_e32 v22, 2, v3 s_mov_b32 s6, -1 s_delay_alu instid0(VALU_DEP_2) s_cmp_gt_u32 s36, 0x100ff s_cbranch_scc1 .LBB3_340 ; %bb.42: ; in Loop: Header=BB3_11 Depth=3 v_mov_b32_e32 v4, v5 s_bcnt1_i32_b32 s35, exec_lo s_getpc_b64 s[2:3] s_add_u32 s2, s2, __unnamed_1@rel32@lo+76 s_addc_u32 s3, s3, __unnamed_1@rel32@hi+84 s_getpc_b64 s[6:7] s_add_u32 s6, s6, __unnamed_1@rel32@lo+68 s_addc_u32 s7, s7, __unnamed_1@rel32@hi+76 s_add_u32 s1, s24, 0x800 v_lshlrev_b64 v[11:12], 7, v[3:4] v_lshlrev_b64 v[3:4], 5, v[3:4] v_lshrrev_b64 v[15:16], v22, 0xbf v_mbcnt_lo_u32_b32 v130, exec_lo, 0 v_mov_b32_e32 v23, v5 v_mov_b32_e32 v24, v5 v_add_co_u32 v70, vcc_lo, s24, v11 v_add_co_ci_u32_e32 v71, vcc_lo, s25, v12, vcc_lo v_add_co_u32 v80, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v81, vcc_lo, s3, v4, vcc_lo v_add_co_u32 v82, vcc_lo, v3, s6 v_add_co_ci_u32_e32 v83, vcc_lo, s7, v4, vcc_lo s_addc_u32 s2, s25, 0 v_add_co_u32 v84, vcc_lo, s1, v11 s_add_u32 s1, s24, 0x1000 v_add_co_ci_u32_e32 v85, vcc_lo, s2, v12, vcc_lo s_addc_u32 s2, s25, 0 v_add_co_u32 v86, vcc_lo, s1, v11 s_add_u32 s1, s24, 0x2000 v_add_co_ci_u32_e32 v87, vcc_lo, s2, v12, vcc_lo s_addc_u32 s2, s25, 0 v_add_co_u32 v96, vcc_lo, s1, v11 s_add_u32 s1, s24, 0x1800 v_add_co_ci_u32_e32 v97, vcc_lo, s2, v12, vcc_lo s_addc_u32 s5, s25, 0 v_add_co_u32 v98, vcc_lo, s1, v11 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __unnamed_1@rel32@lo+88 s_addc_u32 s3, s3, __unnamed_1@rel32@hi+96 v_add_co_ci_u32_e32 v99, vcc_lo, s5, v12, vcc_lo v_add_co_u32 v100, vcc_lo, v3, s2 s_getpc_b64 s[6:7] s_add_u32 s6, s6, __unnamed_1@rel32@lo+84 s_addc_u32 s7, s7, __unnamed_1@rel32@hi+92 v_add_co_ci_u32_e32 v101, vcc_lo, s3, v4, vcc_lo v_and_b32_e32 v6, 1, v15 v_add_co_u32 v102, vcc_lo, v3, s6 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __unnamed_1@rel32@lo+92 s_addc_u32 s3, s3, __unnamed_1@rel32@hi+100 v_add_co_ci_u32_e32 v103, vcc_lo, s7, v4, vcc_lo v_add_co_u32 v112, vcc_lo, v3, s2 v_cmp_eq_u32_e64 s1, 1, v6 v_add_co_ci_u32_e32 v113, vcc_lo, s3, v4, vcc_lo v_mov_b32_e32 v25, v5 ; implicit-def: $vgpr114_vgpr115 .LBB3_43: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; => This Loop Header: Depth=4 ; Child Loop BB3_47 Depth 5 ; Child Loop BB3_75 Depth 5 ; Child Loop BB3_93 Depth 6 ; Child Loop BB3_101 Depth 6 ; Child Loop BB3_107 Depth 6 ; Child Loop BB3_116 Depth 6 ; Child Loop BB3_121 Depth 6 ; Child Loop BB3_123 Depth 6 ; Child Loop BB3_144 Depth 6 ; Child Loop BB3_152 Depth 6 ; Child Loop BB3_158 Depth 6 ; Child Loop BB3_167 Depth 6 ; Child Loop BB3_175 Depth 6 ; Child Loop BB3_178 Depth 6 ; Child Loop BB3_180 Depth 6 ; Child Loop BB3_182 Depth 6 ; Child Loop BB3_184 Depth 6 ; Child Loop BB3_186 Depth 6 ; Child Loop BB3_188 Depth 6 ; Child Loop BB3_210 Depth 6 ; Child Loop BB3_218 Depth 6 ; Child Loop BB3_224 Depth 6 ; Child Loop BB3_233 Depth 6 ; Child Loop BB3_240 Depth 6 ; Child Loop BB3_243 Depth 6 ; Child Loop BB3_248 Depth 6 ; Child Loop BB3_255 Depth 6 ; Child Loop BB3_288 Depth 6 ; Child Loop BB3_296 Depth 6 ; Child Loop BB3_302 Depth 6 ; Child Loop BB3_311 Depth 6 ; Child Loop BB3_320 Depth 5 ; Child Loop BB3_323 Depth 5 ; Child Loop BB3_325 Depth 5 ; Child Loop BB3_327 Depth 5 ; Child Loop BB3_329 Depth 5 ; Child Loop BB3_331 Depth 5 ; Child Loop BB3_333 Depth 5 s_cmp_eq_u32 s36, 0 s_mov_b32 s5, -1 ;;#ASMSTART ;;#ASMEND s_cbranch_scc1 .LBB3_72 ; %bb.44: ; in Loop: Header=BB3_43 Depth=4 v_cmp_eq_u32_e64 s2, 0, v130 v_mov_b32_e32 v3, 0 s_delay_alu instid0(VALU_DEP_2) s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_46 ; %bb.45: ; in Loop: Header=BB3_43 Depth=4 global_load_b32 v3, v[70:71], off glc .LBB3_46: ; in Loop: Header=BB3_43 Depth=4 s_or_b32 exec_lo, exec_lo, s3 global_load_b32 v6, v[80:81], off v_cvt_f32_u32_e32 v4, s36 s_sub_i32 s3, 0, s36 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v4, v4 s_waitcnt_depctr 0xfff v_mul_f32_e32 v4, 0x4f7ffffe, v4 v_cvt_u32_f32_e32 v4, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mul_lo_u32 v11, s3, v4 s_waitcnt vmcnt(1) v_readfirstlane_b32 s3, v3 v_add_nc_u32_e32 v3, s3, v130 s_mov_b32 s3, s36 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v11, v4, v11 v_add_nc_u32_e32 v11, v4, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v4, v3, v11 v_mul_lo_u32 v4, v4, s36 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v3, v3, v4 v_subrev_nc_u32_e32 v4, s36, v3 v_cmp_le_u32_e32 vcc_lo, s36, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v3, v3, v4, vcc_lo v_subrev_nc_u32_e32 v4, s36, v3 v_cmp_le_u32_e32 vcc_lo, s36, v3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e32 v12, v3, v4, vcc_lo .LBB3_47: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Inner Loop Header: Depth=5 s_mov_b32 s6, exec_lo ; implicit-def: $vgpr3_vgpr4 s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_u32_e32 0x100, v12 s_xor_b32 s6, exec_lo, s6 ; %bb.48: ; in Loop: Header=BB3_47 Depth=5 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[15:16], null, 0x1800, v22, s[16:17] v_mad_u64_u32 v[3:4], null, v12, 24, v[15:16] ; %bb.49: ; %Flow952 ; in Loop: Header=BB3_47 Depth=5 s_and_not1_saveexec_b32 s6, s6 s_cbranch_execz .LBB3_51 ; %bb.50: ; in Loop: Header=BB3_47 Depth=5 s_add_u32 s16, s10, 0x2800 v_add_nc_u32_e32 v15, 0xffffff00, v12 s_addc_u32 s17, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17] v_lshrrev_b32_e32 v18, 8, v15 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[15:16], null, v18, 24, v[3:4] v_and_b32_e32 v18, 0xff, v12 global_load_b64 v[15:16], v[15:16], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v18, 24, v[15:16] .LBB3_51: ; in Loop: Header=BB3_47 Depth=5 s_or_b32 exec_lo, exec_lo, s6 global_load_b32 v3, v[3:4], off offset:16 glc s_waitcnt vmcnt(0) v_cmp_lt_u32_e32 vcc_lo, v3, v6 s_cbranch_vccz .LBB3_53 ; %bb.52: ; in Loop: Header=BB3_47 Depth=5 s_ctz_i32_b32 s6, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_lshl_b32 s6, s6, 2 v_mov_b32_e32 v3, s6 ds_bpermute_b32 v3, v3, v12 s_branch .LBB3_54 .LBB3_53: ; in Loop: Header=BB3_47 Depth=5 v_mov_b32_e32 v3, -1 .LBB3_54: ; in Loop: Header=BB3_47 Depth=5 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s7, v3 s_cmp_eq_u32 s7, -1 s_cselect_b32 s6, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_57 ; %bb.55: ; in Loop: Header=BB3_47 Depth=5 s_cmpk_lt_u32 s7, 0x100 s_cbranch_scc0 .LBB3_58 ; %bb.56: ; in Loop: Header=BB3_47 Depth=5 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17] s_mov_b32 s16, 0 v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4] s_branch .LBB3_59 .LBB3_57: ; in Loop: Header=BB3_47 Depth=5 s_mov_b32 s7, -1 ; implicit-def: $vgpr15_vgpr16 s_branch .LBB3_62 .LBB3_58: ; in Loop: Header=BB3_47 Depth=5 s_mov_b32 s16, -1 ; implicit-def: $vgpr15_vgpr16 .LBB3_59: ; %Flow946 ; in Loop: Header=BB3_47 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s16 s_cbranch_vccnz .LBB3_61 ; %bb.60: ; in Loop: Header=BB3_47 Depth=5 s_add_i32 s16, s7, 0xffffff00 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) s_lshr_b32 s18, s16, 8 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 s_and_b32 s7, s7, 0xff v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17] v_mad_u64_u32 v[15:16], null, s18, 24, v[3:4] global_load_b64 v[3:4], v[15:16], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4] .LBB3_61: ; %Flow947 ; in Loop: Header=BB3_47 Depth=5 s_mov_b32 s7, 0 .LBB3_62: ; %Flow948 ; in Loop: Header=BB3_47 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s7 s_cbranch_vccnz .LBB3_66 ; %bb.63: ; in Loop: Header=BB3_47 Depth=5 v_add_nc_u32_e32 v3, s35, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v4, v3, v11 v_mul_lo_u32 v4, v4, s36 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v3, v3, v4 v_subrev_nc_u32_e32 v4, s36, v3 v_cmp_le_u32_e32 vcc_lo, s36, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v3, v3, v4, vcc_lo v_subrev_nc_u32_e32 v4, s36, v3 v_cmp_le_u32_e32 vcc_lo, s36, v3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e32 v12, v3, v4, vcc_lo s_and_saveexec_b32 s7, s2 s_cbranch_execz .LBB3_65 ; %bb.64: ; in Loop: Header=BB3_47 Depth=5 global_store_b32 v[70:71], v12, off .LBB3_65: ; in Loop: Header=BB3_47 Depth=5 s_or_b32 exec_lo, exec_lo, s7 v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115 s_sub_i32 s3, s3, s35 .LBB3_66: ; in Loop: Header=BB3_47 Depth=5 s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccz .LBB3_68 ; %bb.67: ; in Loop: Header=BB3_47 Depth=5 s_mov_b32 s6, 0 s_mov_b32 s7, -1 s_mov_b32 s16, -1 ; implicit-def: $sgpr3 ; implicit-def: $vgpr12 s_branch .LBB3_69 .LBB3_68: ; in Loop: Header=BB3_47 Depth=5 s_cmp_lt_i32 s3, 1 s_mov_b32 s7, 0 s_cselect_b32 s16, -1, 0 ; implicit-def: $sgpr6 .LBB3_69: ; %Flow954 ; in Loop: Header=BB3_47 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s16 s_cbranch_vccz .LBB3_71 ; %bb.70: ; in Loop: Header=BB3_47 Depth=5 v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15 s_branch .LBB3_47 .LBB3_71: ; %loop.exit.guard903 ; in Loop: Header=BB3_43 Depth=4 v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15 s_xor_b32 s2, s7, -1 s_branch .LBB3_73 .LBB3_72: ; in Loop: Header=BB3_43 Depth=4 s_mov_b32 s2, -1 ; implicit-def: $vgpr15_vgpr16 ; implicit-def: $sgpr6 .LBB3_73: ; %Flow1121 ; in Loop: Header=BB3_43 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s2 s_cbranch_vccz .LBB3_314 ; %bb.74: ; %.loopexit188 ; in Loop: Header=BB3_43 Depth=4 v_mbcnt_lo_u32_b32 v131, exec_lo, 0 ; implicit-def: $vgpr116_vgpr117 .LBB3_75: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Loop Header: Depth=5 ; Child Loop BB3_93 Depth 6 ; Child Loop BB3_101 Depth 6 ; Child Loop BB3_107 Depth 6 ; Child Loop BB3_116 Depth 6 ; Child Loop BB3_121 Depth 6 ; Child Loop BB3_123 Depth 6 ; Child Loop BB3_144 Depth 6 ; Child Loop BB3_152 Depth 6 ; Child Loop BB3_158 Depth 6 ; Child Loop BB3_167 Depth 6 ; Child Loop BB3_175 Depth 6 ; Child Loop BB3_178 Depth 6 ; Child Loop BB3_180 Depth 6 ; Child Loop BB3_182 Depth 6 ; Child Loop BB3_184 Depth 6 ; Child Loop BB3_186 Depth 6 ; Child Loop BB3_188 Depth 6 ; Child Loop BB3_210 Depth 6 ; Child Loop BB3_218 Depth 6 ; Child Loop BB3_224 Depth 6 ; Child Loop BB3_233 Depth 6 ; Child Loop BB3_240 Depth 6 ; Child Loop BB3_243 Depth 6 ; Child Loop BB3_248 Depth 6 ; Child Loop BB3_255 Depth 6 ; Child Loop BB3_288 Depth 6 ; Child Loop BB3_296 Depth 6 ; Child Loop BB3_302 Depth 6 ; Child Loop BB3_311 Depth 6 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_eq_u32_e64 s2, 0, v131 v_mov_b32_e32 v3, 0 s_mov_b32 s18, 0 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_77 ; %bb.76: ; in Loop: Header=BB3_75 Depth=5 global_load_b32 v3, v[84:85], off glc .LBB3_77: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s3 s_waitcnt vmcnt(0) v_readfirstlane_b32 s37, v3 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_delay_alu instid0(VALU_DEP_3) s_cmp_eq_u32 s37, 0x10100 s_cbranch_scc1 .LBB3_137 ; %bb.78: ; in Loop: Header=BB3_75 Depth=5 v_mov_b32_e32 v3, 0 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_80 ; %bb.79: ; in Loop: Header=BB3_75 Depth=5 v_mov_b32_e32 v69, v5 global_atomic_cmpswap_b32 v3, v[86:87], v[68:69], off glc s_waitcnt vmcnt(0) v_cmp_ne_u32_e32 vcc_lo, 0, v3 v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo .LBB3_80: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s38, v3 s_cmp_lg_u32 s37, s38 s_cbranch_scc1 .LBB3_138 ; %bb.81: ; in Loop: Header=BB3_75 Depth=5 v_mbcnt_lo_u32_b32 v21, exec_lo, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) v_cmp_eq_u32_e32 vcc_lo, 0, v21 v_mov_b32_e32 v3, 0 s_and_saveexec_b32 s3, vcc_lo s_cbranch_execz .LBB3_83 ; %bb.82: ; in Loop: Header=BB3_75 Depth=5 global_load_b32 v3, v[86:87], off glc .LBB3_83: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s3 s_waitcnt vmcnt(0) v_readfirstlane_b32 s20, v3 s_mov_b32 s5, 2 s_delay_alu instid0(VALU_DEP_1) s_cmp_eq_u32 s20, 0x10100 s_cbranch_scc1 .LBB3_171 ; %bb.84: ; in Loop: Header=BB3_75 Depth=5 v_mov_b32_e32 v3, 1 s_and_saveexec_b32 s5, vcc_lo s_cbranch_execz .LBB3_88 ; %bb.85: ; in Loop: Header=BB3_75 Depth=5 global_load_b64 v[28:29], v[96:97], off glc s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt vmcnt(0) lgkmcnt(0) v_sub_co_u32 v3, s3, s6, v28 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_co_ci_u32_e64 v4, s3, s7, v29, s3 v_cmp_lt_u64_e64 s3, 0x752f, v[3:4] v_mov_b32_e32 v3, 1 s_delay_alu instid0(VALU_DEP_2) s_and_saveexec_b32 s16, s3 s_cbranch_execz .LBB3_87 ; %bb.86: ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7 global_atomic_cmpswap_b64 v[3:4], v[96:97], v[26:29], off glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e64 s3, v[3:4], v[28:29] s_delay_alu instid0(VALU_DEP_1) v_cndmask_b32_e64 v3, 1, 2, s3 .LBB3_87: ; %Flow1110 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s16 .LBB3_88: ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s5 v_readfirstlane_b32 s39, v3 s_mov_b32 s5, 1 s_delay_alu instid0(VALU_DEP_1) s_cmp_eq_u32 s39, 1 s_cbranch_scc1 .LBB3_171 ; %bb.89: ; in Loop: Header=BB3_75 Depth=5 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s21, vcc_lo s_cbranch_execz .LBB3_118 ; %bb.90: ; in Loop: Header=BB3_75 Depth=5 s_load_b64 s[16:17], s[8:9], 0x50 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s3, v4 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s3, s3, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s5, s3 s_cbranch_execz .LBB3_96 ; %bb.91: ; in Loop: Header=BB3_75 Depth=5 s_waitcnt lgkmcnt(0) global_load_b64 v[28:29], v5, s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[15:16], v5, s[16:17] s_mov_b32 s6, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v12, v29 v_and_b32_e32 v6, v11, v28 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v11, v6, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v11, v3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v15, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo global_load_b64 v[26:27], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[28:29] s_cbranch_execz .LBB3_95 ; %bb.92: ; %.preheader3.i.i.i117.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s7, 0 .LBB3_93: ; %.preheader3.i.i.i117 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b64 v[18:19], v5, s[16:17] v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v15, v28 v_and_b32_e32 v6, v16, v29 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19] v_mov_b32_e32 v3, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4] v_mov_b32_e32 v12, v15 global_load_b64 v[26:27], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_93 ; %bb.94: ; %Flow1104 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s7 .LBB3_95: ; %Flow1106 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB3_96: ; %.loopexit4.i.i.i112 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b128 v[26:29], v5, s[16:17] v_readfirstlane_b32 s18, v11 v_readfirstlane_b32 s19, v12 s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v15 v_readfirstlane_b32 s7, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[18:19], s[6:7] s_mul_i32 s40, s7, 24 s_mul_hi_u32 s41, s6, 24 s_mul_i32 s42, s6, 24 s_and_saveexec_b32 s43, s3 s_cbranch_execz .LBB3_98 ; %bb.97: ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5 s_add_i32 s5, s41, s40 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v26, s42 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo global_store_b128 v[15:16], v[11:14], off offset:8 .LBB3_98: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s43 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v28, s6 v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo s_mov_b32 s7, s4 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v6, v3 s_mov_b32 s5, s4 s_mov_b32 s6, s4 v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo v_mov_b32_e32 v15, v5 v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v31, s7 v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v29, s5 v_mov_b32_e32 v30, s6 v_mov_b32_e32 v28, s4 s_clause 0x3 global_store_b128 v[11:12], v[15:18], off global_store_b128 v[11:12], v[28:31], off offset:16 global_store_b128 v[11:12], v[28:31], off offset:32 global_store_b128 v[11:12], v[28:31], off offset:48 s_and_saveexec_b32 s5, s3 s_cbranch_execz .LBB3_106 ; %bb.99: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x1 global_load_b64 v[134:135], v5, s[16:17] offset:32 glc global_load_b64 v[3:4], v5, s[16:17] offset:40 s_mov_b32 s6, exec_lo v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s19, v4 v_and_b32_e32 v3, s18, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v6, v4 v_add_co_u32 v3, vcc_lo, v26, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo global_store_b64 v[3:4], v[134:135], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[30:31], v[134:135] s_cbranch_execz .LBB3_102 ; %bb.100: ; %.preheader1.i.i.i115.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s7, 0 .LBB3_101: ; %.preheader1.i.i.i115 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19 s_sleep 1 global_store_b64 v[3:4], v[30:31], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v5, v[28:31], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[30:31] v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15 s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_101 .LBB3_102: ; %Flow1102 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s6 global_load_b64 v[15:16], v5, s[16:17] offset:16 s_mov_b32 s7, exec_lo s_mov_b32 s6, exec_lo v_mbcnt_lo_u32_b32 v3, s7, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_104 ; %bb.103: ; in Loop: Header=BB3_75 Depth=5 s_bcnt1_i32_b32 s7, s7 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s7 s_waitcnt vmcnt(0) global_atomic_add_u64 v[15:16], v[4:5], off offset:8 .LBB3_104: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) global_load_b64 v[18:19], v[15:16], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19] s_cbranch_vccnz .LBB3_106 ; %bb.105: ; in Loop: Header=BB3_75 Depth=5 global_load_b32 v4, v[15:16], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s6, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[18:19], v[4:5], off s_and_b32 m0, s6, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_106: ; %Flow1103 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 s_add_i32 s41, s41, s40 v_add_co_u32 v3, vcc_lo, v26, s42 v_add_co_ci_u32_e32 v4, vcc_lo, s41, v27, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB3_107: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s5, s3 s_cbranch_execz .LBB3_109 ; %bb.108: ; in Loop: Header=BB3_107 Depth=6 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB3_109: ; in Loop: Header=BB3_107 Depth=6 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s5, v6 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB3_111 ; %bb.110: ; in Loop: Header=BB3_107 Depth=6 s_mov_b32 s5, 0 s_sleep 1 s_branch .LBB3_112 .LBB3_111: ; in Loop: Header=BB3_107 Depth=6 s_mov_b32 s5, -1 .LBB3_112: ; %Flow1097 ; in Loop: Header=BB3_107 Depth=6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_107 ; %bb.113: ; in Loop: Header=BB3_75 Depth=5 global_load_b64 v[3:4], v[11:12], off s_and_saveexec_b32 s5, s3 s_cbranch_execz .LBB3_117 ; %bb.114: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x2 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[15:16], v5, s[16:17] offset:24 glc global_load_b64 v[18:19], v5, s[16:17] s_waitcnt vmcnt(2) v_add_co_u32 v6, vcc_lo, v11, 1 v_add_co_ci_u32_e32 v28, vcc_lo, 0, v12, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v29, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v26, vcc_lo, v6, s18 v_add_co_ci_u32_e32 v27, vcc_lo, s19, v28, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27] v_dual_cndmask_b32 v27, v27, v28 :: v_dual_cndmask_b32 v26, v26, v6 v_mov_b32_e32 v28, v15 v_and_b32_e32 v6, v27, v12 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v11, v26, v11 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v11, 24 v_mul_lo_u32 v11, v11, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v18, v11 v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo global_store_b64 v[11:12], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[15:16] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_117 ; %bb.115: ; %.preheader.i.i.i114.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s3, 0 .LBB3_116: ; %.preheader.i.i.i114 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 global_store_b64 v[11:12], v[28:29], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[28:29] v_dual_mov_b32 v29, v16 :: v_dual_mov_b32 v28, v15 s_or_b32 s3, vcc_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB3_116 .LBB3_117: ; %Flow1095 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 .LBB3_118: ; %Flow1107 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s21 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_cmp_eq_u64 s[18:19], 0 s_cbranch_scc1 .LBB3_170 ; %bb.119: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s3, exec_lo s_mov_b32 s5, exec_lo v_mbcnt_lo_u32_b32 v11, s3, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_u32_e32 0x300, v11 s_cbranch_execz .LBB3_122 ; %bb.120: ; %.preheader175.preheader ; in Loop: Header=BB3_75 Depth=5 v_lshlrev_b32_e32 v3, 3, v11 s_bcnt1_i32_b32 s6, s3 s_mov_b32 s16, 0 s_lshl_b32 s7, s6, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v3, s3, s18, v3 v_add_co_ci_u32_e64 v4, null, s19, 0, s3 .LBB3_121: ; %.preheader175 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11 global_store_b64 v[3:4], v[5:6], off v_add_co_u32 v3, s3, v3, s7 v_add_co_ci_u32_e64 v4, s3, 0, v4, s3 s_or_b32 s16, vcc_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s16 s_cbranch_execnz .LBB3_121 .LBB3_122: ; %Flow1089 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 ; implicit-def: $sgpr5 .LBB3_123: ; %.loopexit176 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 ;;#ASMSTART ;;#ASMEND v_cmp_eq_u32_e32 vcc_lo, 0, v21 v_mov_b32_e32 v3, s20 s_and_saveexec_b32 s3, vcc_lo s_cbranch_execz .LBB3_125 ; %bb.124: ; in Loop: Header=BB3_123 Depth=6 global_load_b32 v3, v[86:87], off glc .LBB3_125: ; in Loop: Header=BB3_123 Depth=6 s_or_b32 exec_lo, exec_lo, s3 s_waitcnt vmcnt(0) v_readfirstlane_b32 s20, v3 s_and_not1_b32 s3, s5, exec_lo s_and_b32 s5, vcc_lo, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 s5, s3, s5 s_cmp_lg_u32 s20, 0x10100 s_cbranch_scc0 .LBB3_132 ; %bb.126: ; in Loop: Header=BB3_123 Depth=6 v_mov_b32_e32 v3, s39 s_and_saveexec_b32 s6, vcc_lo s_cbranch_execz .LBB3_130 ; %bb.127: ; in Loop: Header=BB3_123 Depth=6 s_add_i32 s3, s20, 0xffffff00 v_mov_b32_e32 v6, v5 s_lshr_b32 s3, s3, 8 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17] v_mad_u64_u32 v[11:12], null, s3, 24, v[3:4] v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19 global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e64 s3, 0, v[3:4] v_mov_b32_e32 v3, s39 s_delay_alu instid0(VALU_DEP_2) s_and_saveexec_b32 s7, s3 s_cbranch_execz .LBB3_129 ; %bb.128: ; in Loop: Header=BB3_123 Depth=6 s_waitcnt_vscnt null, 0x0 global_atomic_add_u32 v[86:87], v68, off v_mov_b32_e32 v3, 0 .LBB3_129: ; %Flow1082 ; in Loop: Header=BB3_123 Depth=6 s_or_b32 exec_lo, exec_lo, s7 .LBB3_130: ; in Loop: Header=BB3_123 Depth=6 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s6 v_readfirstlane_b32 s3, v3 s_delay_alu instid0(VALU_DEP_1) s_cmp_eq_u32 s3, 0 s_cbranch_scc1 .LBB3_133 ; %bb.131: ; in Loop: Header=BB3_123 Depth=6 s_mov_b32 s6, 0 s_and_not1_b32 vcc_lo, vcc_lo, exec_lo s_sleep 2 ; implicit-def: $sgpr39 s_branch .LBB3_134 .LBB3_132: ; in Loop: Header=BB3_123 Depth=6 s_mov_b32 s16, -1 s_mov_b32 s6, -1 ; implicit-def: $vgpr21 ; implicit-def: $sgpr20 ; implicit-def: $sgpr3 ; implicit-def: $sgpr7 s_branch .LBB3_135 .LBB3_133: ; in Loop: Header=BB3_123 Depth=6 s_mov_b32 s6, -1 ; implicit-def: $vgpr21 ; implicit-def: $sgpr20 ; implicit-def: $sgpr3 .LBB3_134: ; %Flow1086 ; in Loop: Header=BB3_123 Depth=6 s_and_not1_b32 s5, s5, exec_lo s_and_b32 s17, vcc_lo, exec_lo s_mov_b32 s7, 0 s_mov_b32 s16, 0 s_or_b32 s5, s5, s17 .LBB3_135: ; %Flow1085 ; in Loop: Header=BB3_123 Depth=6 s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_139 ; %bb.136: ; in Loop: Header=BB3_123 Depth=6 s_mov_b32 s39, s3 s_branch .LBB3_123 .LBB3_137: ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v117, v4 :: v_dual_mov_b32 v116, v3 s_branch .LBB3_199 .LBB3_138: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s3, -1 ; implicit-def: $sgpr18 s_branch .LBB3_191 .LBB3_139: ; %loop.exit.guard909 ; in Loop: Header=BB3_75 Depth=5 s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccz .LBB3_169 ; %bb.140: ; in Loop: Header=BB3_75 Depth=5 s_and_saveexec_b32 s40, s5 s_cbranch_execz .LBB3_168 ; %bb.141: ; in Loop: Header=BB3_75 Depth=5 s_load_b64 s[16:17], s[8:9], 0x50 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s3, v4 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s3, s3, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s5, s3 s_cbranch_execz .LBB3_147 ; %bb.142: ; in Loop: Header=BB3_75 Depth=5 s_waitcnt lgkmcnt(0) global_load_b64 v[28:29], v5, s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[15:16], v5, s[16:17] s_mov_b32 s6, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v12, v29 v_and_b32_e32 v6, v11, v28 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v11, v6, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v11, v3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v15, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo global_load_b64 v[26:27], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[28:29] s_cbranch_execz .LBB3_146 ; %bb.143: ; %.preheader3.i.i.i124.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s7, 0 .LBB3_144: ; %.preheader3.i.i.i124 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b64 v[18:19], v5, s[16:17] v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v15, v28 v_and_b32_e32 v6, v16, v29 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19] v_mov_b32_e32 v3, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4] v_mov_b32_e32 v12, v15 global_load_b64 v[26:27], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_144 ; %bb.145: ; %Flow1077 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s7 .LBB3_146: ; %Flow1079 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB3_147: ; %.loopexit4.i.i.i119 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b128 v[26:29], v5, s[16:17] v_readfirstlane_b32 s20, v11 v_readfirstlane_b32 s21, v12 s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v15 v_readfirstlane_b32 s7, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[20:21], s[6:7] s_mul_i32 s41, s7, 24 s_mul_hi_u32 s42, s6, 24 s_mul_i32 s43, s6, 24 s_and_saveexec_b32 s44, s3 s_cbranch_execz .LBB3_149 ; %bb.148: ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5 s_add_i32 s5, s42, s41 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v26, s43 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo global_store_b128 v[15:16], v[11:14], off offset:8 .LBB3_149: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s44 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v28, s6 v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo s_mov_b32 s7, s4 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v6, v3 s_mov_b32 s5, s4 s_mov_b32 s6, s4 v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19 v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6 v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4 v_mov_b32_e32 v6, v5 s_clause 0x4 global_store_b64 v[3:4], v[11:12], off global_store_b128 v[3:4], v[28:31], off offset:8 global_store_b128 v[3:4], v[28:31], off offset:24 global_store_b128 v[3:4], v[28:31], off offset:40 global_store_b64 v[3:4], v[5:6], off offset:56 s_and_saveexec_b32 s5, s3 s_cbranch_execz .LBB3_157 ; %bb.150: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x1 global_load_b64 v[134:135], v5, s[16:17] offset:32 glc global_load_b64 v[3:4], v5, s[16:17] offset:40 s_mov_b32 s6, exec_lo v_dual_mov_b32 v132, s20 :: v_dual_mov_b32 v133, s21 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s21, v4 v_and_b32_e32 v3, s20, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v6, v4 v_add_co_u32 v3, vcc_lo, v26, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo global_store_b64 v[3:4], v[134:135], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[30:31], v[134:135] s_cbranch_execz .LBB3_153 ; %bb.151: ; %.preheader1.i.i.i122.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s7, 0 .LBB3_152: ; %.preheader1.i.i.i122 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21 s_sleep 1 global_store_b64 v[3:4], v[30:31], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31] v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11 s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_152 .LBB3_153: ; %Flow1075 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s6 global_load_b64 v[11:12], v5, s[16:17] offset:16 s_mov_b32 s7, exec_lo s_mov_b32 s6, exec_lo v_mbcnt_lo_u32_b32 v3, s7, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_155 ; %bb.154: ; in Loop: Header=BB3_75 Depth=5 s_bcnt1_i32_b32 s7, s7 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s7 s_waitcnt vmcnt(0) global_atomic_add_u64 v[11:12], v[4:5], off offset:8 .LBB3_155: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) global_load_b64 v[15:16], v[11:12], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16] s_cbranch_vccnz .LBB3_157 ; %bb.156: ; in Loop: Header=BB3_75 Depth=5 global_load_b32 v4, v[11:12], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s6, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[15:16], v[4:5], off s_and_b32 m0, s6, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_157: ; %Flow1076 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 s_add_i32 s42, s42, s41 v_add_co_u32 v3, vcc_lo, v26, s43 v_add_co_ci_u32_e32 v4, vcc_lo, s42, v27, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB3_158: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s5, s3 s_cbranch_execz .LBB3_160 ; %bb.159: ; in Loop: Header=BB3_158 Depth=6 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB3_160: ; in Loop: Header=BB3_158 Depth=6 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s5, v6 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB3_162 ; %bb.161: ; in Loop: Header=BB3_158 Depth=6 s_mov_b32 s5, 0 s_sleep 1 s_branch .LBB3_163 .LBB3_162: ; in Loop: Header=BB3_158 Depth=6 s_mov_b32 s5, -1 .LBB3_163: ; %Flow1070 ; in Loop: Header=BB3_158 Depth=6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_158 ; %bb.164: ; in Loop: Header=BB3_75 Depth=5 s_and_b32 exec_lo, exec_lo, s3 s_cbranch_execz .LBB3_168 ; %bb.165: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x2 global_load_b64 v[3:4], v5, s[16:17] offset:40 global_load_b64 v[11:12], v5, s[16:17] offset:24 glc global_load_b64 v[15:16], v5, s[16:17] s_waitcnt vmcnt(2) v_add_co_u32 v6, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v28, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v18, vcc_lo, v6, s20 v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo v_mov_b32_e32 v29, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19] v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6 v_and_b32_e32 v4, v27, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v26, v3 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v4, v6, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v15, v3 v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo global_store_b64 v[3:4], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_168 ; %bb.166: ; %.preheader.i.i.i121.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s3, 0 .LBB3_167: ; %.preheader.i.i.i121 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 global_store_b64 v[3:4], v[28:29], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29] v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11 s_or_b32 s3, vcc_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB3_167 .LBB3_168: ; %Flow1080 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s40 s_mov_b32 s7, s39 .LBB3_169: ; %Flow1081 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s39, s7 .LBB3_170: ; %Flow1091 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s5, s39 .LBB3_171: ; %__ockl_devmem_request.exit125 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) s_cmp_eq_u32 s5, 0 s_cselect_b32 s3, -1, 0 s_and_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB3_190 ; %bb.172: ; in Loop: Header=BB3_75 Depth=5 v_mbcnt_lo_u32_b32 v3, exec_lo, 0 s_mov_b32 s18, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_189 ; %bb.173: ; in Loop: Header=BB3_75 Depth=5 global_load_b64 v[3:4], v[96:97], off glc s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt vmcnt(0) lgkmcnt(0) v_sub_co_u32 v3, vcc_lo, s6, v3 v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_189 ; %bb.174: ; in Loop: Header=BB3_75 Depth=5 v_sub_nc_u32_e32 v3, 0x7530, v3 s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME) v_readfirstlane_b32 s6, v3 s_delay_alu instid0(VALU_DEP_1) s_ashr_i32 s7, s6, 31 s_waitcnt lgkmcnt(0) s_add_u32 s6, s16, s6 s_addc_u32 s7, s17, s7 .LBB3_175: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_waitcnt lgkmcnt(0) s_add_u32 s20, s16, 0x659 s_addc_u32 s21, s17, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s19, s[6:7], s[20:21] s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccnz .LBB3_178 ; %bb.176: ; %.preheader11.i138 ; in Loop: Header=BB3_175 Depth=6 s_sleep 0x7f s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME) s_branch .LBB3_175 .LBB3_177: ; %.preheader9.i137 ; in Loop: Header=BB3_178 Depth=6 s_sleep 63 s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_178: ; %Flow1061 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_waitcnt lgkmcnt(0) s_add_u32 s20, s16, 0x326 s_addc_u32 s21, s17, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s19, s[6:7], s[20:21] s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccz .LBB3_177 ; %bb.179: ; %Flow1058 ; in Loop: Header=BB3_75 Depth=5 s_add_u32 s20, s16, 0x18c s_addc_u32 s21, s17, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s19, s[6:7], s[20:21] s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccnz .LBB3_182 .LBB3_180: ; %.preheader7.i136 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 31 s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt lgkmcnt(0) s_add_u32 s20, s16, 0x18c s_addc_u32 s21, s17, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u64_e64 s19, s[6:7], s[20:21] s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccnz .LBB3_180 s_branch .LBB3_182 .LBB3_181: ; %.preheader5.i135 ; in Loop: Header=BB3_182 Depth=6 s_sleep 15 s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_182: ; %.loopexit8.i128 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_waitcnt lgkmcnt(0) s_add_u32 s20, s16, 0xc0 s_addc_u32 s21, s17, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s19, s[6:7], s[20:21] s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccz .LBB3_181 s_branch .LBB3_184 .LBB3_183: ; %.preheader3.i134 ; in Loop: Header=BB3_184 Depth=6 s_sleep 7 s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_184: ; %Flow1052 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_waitcnt lgkmcnt(0) s_add_u32 s20, s16, 0x59 s_addc_u32 s21, s17, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s19, s[6:7], s[20:21] s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccz .LBB3_183 s_branch .LBB3_186 .LBB3_185: ; %.preheader1.i133 ; in Loop: Header=BB3_186 Depth=6 s_sleep 3 s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_186: ; %Flow1049 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_waitcnt lgkmcnt(0) s_add_u32 s20, s16, 38 s_addc_u32 s21, s17, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s19, s[6:7], s[20:21] s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccz .LBB3_185 ; %bb.187: ; %Flow1046 ; in Loop: Header=BB3_75 Depth=5 v_cmp_le_u64_e64 s16, s[6:7], s[16:17] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccnz .LBB3_189 .LBB3_188: ; %.preheader.i132 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt lgkmcnt(0) v_cmp_gt_u64_e64 s16, s[6:7], s[16:17] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccnz .LBB3_188 .LBB3_189: ; %__ockl_rtcwait_u32.exit139 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s18 s_cmp_lg_u32 s5, 2 v_mov_b32_e32 v117, s4 s_cselect_b32 s5, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) v_cndmask_b32_e64 v116, 0, 1, s5 .LBB3_190: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s18, 0 .LBB3_191: ; %Flow1113 ; in Loop: Header=BB3_75 Depth=5 s_and_b32 vcc_lo, exec_lo, s3 s_cbranch_vccz .LBB3_199 ; %bb.192: ; in Loop: Header=BB3_75 Depth=5 v_mov_b32_e32 v3, 1 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_196 ; %bb.193: ; in Loop: Header=BB3_75 Depth=5 global_load_b64 v[28:29], v[98:99], off glc s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt vmcnt(0) lgkmcnt(0) v_sub_co_u32 v3, vcc_lo, s6, v28 v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v29, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4] v_mov_b32_e32 v3, 1 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s5, vcc_lo s_cbranch_execz .LBB3_195 ; %bb.194: ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7 global_atomic_cmpswap_b64 v[3:4], v[98:99], v[26:29], off glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[28:29] v_mov_b32_e32 v4, s4 v_cndmask_b32_e64 v3, 0, 1, vcc_lo .LBB3_195: ; %Flow1040 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 .LBB3_196: ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s3 v_readfirstlane_b32 s6, v3 v_readfirstlane_b32 s7, v4 s_mov_b32 s18, 0 s_delay_alu instid0(VALU_DEP_1) s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc0 .LBB3_200 ; %bb.197: ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6 .LBB3_198: ; %Flow1039 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v117, v16 :: v_dual_mov_b32 v116, v15 .LBB3_199: ; %Flow1116 ; in Loop: Header=BB3_75 Depth=5 s_xor_b32 s2, s18, -1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s2 s_cbranch_vccnz .LBB3_75 s_branch .LBB3_315 .LBB3_200: ; in Loop: Header=BB3_75 Depth=5 v_mov_b32_e32 v15, 0 v_mov_b32_e32 v16, 0 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_236 ; %bb.201: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x1 global_load_b64 v[3:4], v5, s[12:13] glc global_load_b64 v[11:12], v5, s[14:15] s_waitcnt vmcnt(0) v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12] s_cbranch_vccnz .LBB3_205 ; %bb.202: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s5, exec_lo s_mov_b32 s2, exec_lo v_mbcnt_lo_u32_b32 v6, s5, 0 ; implicit-def: $vgpr3_vgpr4 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB3_204 ; %bb.203: ; in Loop: Header=BB3_75 Depth=5 s_bcnt1_i32_b32 s5, s5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_lshl_b32 s5, s5, 21 v_mov_b32_e32 v4, s5 global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc .LBB3_204: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s2 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v4 v_readfirstlane_b32 s6, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[6:7] v_cmp_ge_u64_e64 s2, v[3:4], v[11:12] s_branch .LBB3_206 .LBB3_205: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s2, -1 ; implicit-def: $vgpr3_vgpr4 .LBB3_206: ; %Flow1037 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_saveexec_b32 s20, s2 s_cbranch_execz .LBB3_235 ; %bb.207: ; in Loop: Header=BB3_75 Depth=5 s_load_b64 s[16:17], s[8:9], 0x50 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s2, v4 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s2, s2, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_213 ; %bb.208: ; in Loop: Header=BB3_75 Depth=5 s_waitcnt lgkmcnt(0) global_load_b64 v[28:29], v5, s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[18:19], v5, s[16:17] s_mov_b32 s6, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v12, v29 v_and_b32_e32 v6, v11, v28 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v11, v6, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v11, v3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v18, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo global_load_b64 v[26:27], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[28:29] s_cbranch_execz .LBB3_212 ; %bb.209: ; %.preheader3.i.i.i145.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s7, 0 .LBB3_210: ; %.preheader3.i.i.i145 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 s_clause 0x1 global_load_b64 v[18:19], v5, s[16:17] offset:40 global_load_b64 v[26:27], v5, s[16:17] v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v3, v18, v28 s_waitcnt vmcnt(0) v_mad_u64_u32 v[11:12], null, v3, 24, v[26:27] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v29 v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4] s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v12, v18 global_load_b64 v[26:27], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_210 ; %bb.211: ; %Flow1033 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s7 .LBB3_212: ; %Flow1035 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB3_213: ; %.loopexit4.i.i.i140 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[18:19], v5, s[16:17] offset:40 global_load_b128 v[26:29], v5, s[16:17] v_readfirstlane_b32 s18, v11 v_readfirstlane_b32 s19, v12 s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v18 v_readfirstlane_b32 s7, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[18:19], s[6:7] s_mul_i32 s21, s7, 24 s_mul_hi_u32 s39, s6, 24 s_mul_i32 s40, s6, 24 s_and_saveexec_b32 s41, s2 s_cbranch_execz .LBB3_215 ; %bb.214: ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5 s_add_i32 s5, s39, s21 s_waitcnt vmcnt(0) v_add_co_u32 v18, vcc_lo, v26, s40 v_add_co_ci_u32_e32 v19, vcc_lo, s5, v27, vcc_lo global_store_b128 v[18:19], v[11:14], off offset:8 .LBB3_215: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s41 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v28, s6 v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo s_mov_b32 s7, s4 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v6, v3 s_mov_b32 s5, s4 s_mov_b32 s6, s4 v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v31, s7 v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v30, s6 v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v28, s4 v_mov_b32_e32 v29, s5 s_clause 0x3 global_store_b128 v[11:12], v[18:21], off global_store_b128 v[11:12], v[28:31], off offset:16 global_store_b128 v[11:12], v[28:31], off offset:32 global_store_b128 v[11:12], v[28:31], off offset:48 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_223 ; %bb.216: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x1 global_load_b64 v[134:135], v5, s[16:17] offset:32 glc global_load_b64 v[3:4], v5, s[16:17] offset:40 s_mov_b32 s6, exec_lo v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s19, v4 v_and_b32_e32 v3, s18, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v6, v4 v_add_co_u32 v3, vcc_lo, v26, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo global_store_b64 v[3:4], v[134:135], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[30:31], v[134:135] s_cbranch_execz .LBB3_219 ; %bb.217: ; %.preheader1.i.i.i143.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s7, 0 .LBB3_218: ; %.preheader1.i.i.i143 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19 s_sleep 1 global_store_b64 v[3:4], v[30:31], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v5, v[28:31], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[30:31] v_dual_mov_b32 v31, v19 :: v_dual_mov_b32 v30, v18 s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_218 .LBB3_219: ; %Flow1031 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s6 global_load_b64 v[18:19], v5, s[16:17] offset:16 s_mov_b32 s7, exec_lo s_mov_b32 s6, exec_lo v_mbcnt_lo_u32_b32 v3, s7, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_221 ; %bb.220: ; in Loop: Header=BB3_75 Depth=5 s_bcnt1_i32_b32 s7, s7 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s7 s_waitcnt vmcnt(0) global_atomic_add_u64 v[18:19], v[4:5], off offset:8 .LBB3_221: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) global_load_b64 v[28:29], v[18:19], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[28:29] s_cbranch_vccnz .LBB3_223 ; %bb.222: ; in Loop: Header=BB3_75 Depth=5 global_load_b32 v4, v[18:19], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s6, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[28:29], v[4:5], off s_and_b32 m0, s6, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_223: ; %Flow1032 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 s_add_i32 s39, s39, s21 v_add_co_u32 v3, vcc_lo, v26, s40 v_add_co_ci_u32_e32 v4, vcc_lo, s39, v27, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB3_224: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_226 ; %bb.225: ; in Loop: Header=BB3_224 Depth=6 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB3_226: ; in Loop: Header=BB3_224 Depth=6 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s5, v6 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB3_228 ; %bb.227: ; in Loop: Header=BB3_224 Depth=6 s_mov_b32 s5, 0 s_sleep 1 s_branch .LBB3_229 .LBB3_228: ; in Loop: Header=BB3_224 Depth=6 s_mov_b32 s5, -1 .LBB3_229: ; %Flow1026 ; in Loop: Header=BB3_224 Depth=6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_224 ; %bb.230: ; in Loop: Header=BB3_75 Depth=5 global_load_b64 v[3:4], v[11:12], off s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_234 ; %bb.231: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x2 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[18:19], v5, s[16:17] offset:24 glc global_load_b64 v[28:29], v5, s[16:17] s_waitcnt vmcnt(2) v_add_co_u32 v6, vcc_lo, v11, 1 v_add_co_ci_u32_e32 v21, vcc_lo, 0, v12, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v26, vcc_lo, v6, s18 v_add_co_ci_u32_e32 v27, vcc_lo, s19, v21, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27] v_dual_cndmask_b32 v27, v27, v21 :: v_dual_cndmask_b32 v26, v26, v6 v_and_b32_e32 v6, v27, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v11, v26, v11 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v11, 24 v_mul_lo_u32 v11, v11, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v11, vcc_lo, v28, v11 v_mov_b32_e32 v28, v18 v_add_co_ci_u32_e32 v12, vcc_lo, v29, v6, vcc_lo v_mov_b32_e32 v29, v19 global_store_b64 v[11:12], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[18:19] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_234 ; %bb.232: ; %.preheader.i.i.i142.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s2, 0 .LBB3_233: ; %.preheader.i.i.i142 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 global_store_b64 v[11:12], v[28:29], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v5, v[26:29], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[28:29] v_dual_mov_b32 v29, v19 :: v_dual_mov_b32 v28, v18 s_or_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB3_233 .LBB3_234: ; %Flow1024 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 .LBB3_235: ; %Flow1038 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s20 .LBB3_236: ; %__ockl_devmem_request.exit146 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s3 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v3 v_readfirstlane_b32 s17, v4 s_cmp_eq_u64 s[16:17], 0 s_cbranch_scc1 .LBB3_281 ; %bb.237: ; in Loop: Header=BB3_75 Depth=5 v_mbcnt_lo_u32_b32 v4, exec_lo, 0 ;;#ASMSTART ;;#ASMEND global_load_b32 v6, v[82:83], off s_bcnt1_i32_b32 s3, exec_lo s_add_u32 s6, s16, 16 s_addc_u32 s7, s17, 0 s_waitcnt vmcnt(0) v_add_nc_u32_e32 v3, 31, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_lshrrev_b32_e32 v3, 5, v3 s_and_saveexec_b32 s2, s1 s_xor_b32 s5, exec_lo, s2 s_cbranch_execz .LBB3_245 ; %bb.238: ; in Loop: Header=BB3_75 Depth=5 global_load_b32 v15, v[100:101], off s_mov_b32 s18, exec_lo v_cmpx_lt_u32_e64 v4, v3 s_cbranch_execz .LBB3_241 ; %bb.239: ; %.preheader172.preheader ; in Loop: Header=BB3_75 Depth=5 v_lshlrev_b64 v[11:12], 2, v[4:5] v_mov_b32_e32 v16, v4 s_lshl_b32 s19, s3, 2 s_mov_b32 s20, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v11, vcc_lo, s6, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo .LBB3_240: ; %.preheader172 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_add_nc_u32_e32 v16, s3, v16 global_store_b32 v[11:12], v5, off v_add_co_u32 v11, s2, v11, s19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_add_co_ci_u32_e64 v12, s2, 0, v12, s2 v_cmp_ge_u32_e32 vcc_lo, v16, v3 s_or_b32 s20, vcc_lo, s20 s_and_not1_b32 exec_lo, exec_lo, s20 s_cbranch_execnz .LBB3_240 .LBB3_241: ; %Flow1013 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s18 global_load_b32 v16, v[102:103], off s_mov_b32 s2, exec_lo s_waitcnt vmcnt(0) v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17] s_delay_alu instid0(VALU_DEP_1) v_cmpx_lt_u32_e64 v11, v6 s_cbranch_execz .LBB3_244 ; %bb.242: ; %.preheader170.preheader ; in Loop: Header=BB3_75 Depth=5 v_mul_lo_u32 v12, v15, s3 s_mov_b32 s18, 0 .LBB3_243: ; %.preheader170 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_lshlrev_b32_e64 v15, v11, 1 v_lshrrev_b32_e32 v16, 3, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v11, v11, v12 v_and_b32_e32 v16, 0x1ffffffc, v16 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_cmp_ge_u32_e32 vcc_lo, v11, v6 global_store_b32 v16, v15, s[6:7] s_or_b32 s18, vcc_lo, s18 s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB3_243 .LBB3_244: ; %Flow1010 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s2 .LBB3_245: ; %Flow1018 ; in Loop: Header=BB3_75 Depth=5 s_and_not1_saveexec_b32 s5, s5 s_cbranch_execz .LBB3_250 ; %bb.246: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s18, exec_lo v_cmpx_lt_u32_e64 v4, v3 s_cbranch_execz .LBB3_249 ; %bb.247: ; %.preheader.preheader ; in Loop: Header=BB3_75 Depth=5 global_load_b32 v15, v[112:113], off v_lshlrev_b64 v[11:12], 2, v[4:5] v_mov_b32_e32 v16, v4 s_lshl_b32 s19, s3, 2 s_mov_b32 s20, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v11, vcc_lo, s6, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo .LBB3_248: ; %.preheader ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_add_nc_u32_e32 v16, s3, v16 s_waitcnt vmcnt(0) global_store_b32 v[11:12], v15, off v_add_co_u32 v11, s2, v11, s19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_add_co_ci_u32_e64 v12, s2, 0, v12, s2 v_cmp_ge_u32_e32 vcc_lo, v16, v3 s_or_b32 s20, vcc_lo, s20 s_and_not1_b32 exec_lo, exec_lo, s20 s_cbranch_execnz .LBB3_248 .LBB3_249: ; %Flow1016 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s18 .LBB3_250: ; %.loopexit ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB3_254 ; %bb.251: ; in Loop: Header=BB3_75 Depth=5 v_and_b32_e32 v6, 31, v6 s_mov_b32 s3, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_ne_u32_e32 0, v6 s_cbranch_execz .LBB3_253 ; %bb.252: ; in Loop: Header=BB3_75 Depth=5 v_add_nc_u32_e32 v4, -1, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[3:4], 2, v[4:5] v_add_co_u32 v3, vcc_lo, s6, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo global_load_b32 v11, v[3:4], off s_waitcnt vmcnt(0) v_lshl_or_b32 v6, -1, v6, v11 global_store_b32 v[3:4], v6, off .LBB3_253: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s3 global_store_b128 v5, v[22:25], s[16:17] .LBB3_254: ; %Flow1007 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s2 ; implicit-def: $sgpr5 .LBB3_255: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 ;;#ASMSTART ;;#ASMEND v_cmp_eq_u32_e64 s2, 0, v131 v_mov_b32_e32 v3, s37 s_delay_alu instid0(VALU_DEP_2) s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_257 ; %bb.256: ; in Loop: Header=BB3_255 Depth=6 global_load_b32 v3, v[84:85], off glc .LBB3_257: ; in Loop: Header=BB3_255 Depth=6 s_or_b32 exec_lo, exec_lo, s3 s_waitcnt vmcnt(0) v_readfirstlane_b32 s37, v3 s_and_not1_b32 s3, s5, exec_lo s_and_b32 s5, s2, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 s5, s3, s5 s_cmp_eq_u32 s37, 0x10100 s_cbranch_scc1 .LBB3_264 ; %bb.258: ; in Loop: Header=BB3_255 Depth=6 v_mov_b32_e32 v3, s38 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_260 ; %bb.259: ; in Loop: Header=BB3_255 Depth=6 global_load_b32 v3, v[86:87], off glc .LBB3_260: ; in Loop: Header=BB3_255 Depth=6 s_or_b32 exec_lo, exec_lo, s3 s_waitcnt vmcnt(0) v_readfirstlane_b32 s38, v3 s_delay_alu instid0(VALU_DEP_1) s_cmp_lg_u32 s37, s38 s_cbranch_scc0 .LBB3_265 ; %bb.261: ; in Loop: Header=BB3_255 Depth=6 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_272 ; %bb.262: ; in Loop: Header=BB3_255 Depth=6 s_cmpk_lt_u32 s37, 0x100 s_cbranch_scc0 .LBB3_266 ; %bb.263: ; in Loop: Header=BB3_255 Depth=6 s_add_u32 s6, s10, 0x2800 s_addc_u32 s7, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7] s_mov_b32 s6, 0 v_mad_u64_u32 v[11:12], null, s37, 24, v[3:4] s_branch .LBB3_267 .LBB3_264: ; in Loop: Header=BB3_255 Depth=6 s_mov_b64 s[2:3], 0 s_mov_b32 s20, -1 s_mov_b32 s18, 0 s_mov_b32 s19, -1 ; implicit-def: $sgpr37 ; implicit-def: $sgpr38 ; implicit-def: $sgpr6_sgpr7 s_branch .LBB3_277 .LBB3_265: ; in Loop: Header=BB3_255 Depth=6 s_mov_b32 s18, -1 s_mov_b32 s19, -1 ; implicit-def: $sgpr37 ; implicit-def: $sgpr38 ; implicit-def: $sgpr6_sgpr7 s_branch .LBB3_276 .LBB3_266: ; in Loop: Header=BB3_255 Depth=6 s_mov_b32 s6, -1 ; implicit-def: $vgpr11_vgpr12 .LBB3_267: ; %Flow999 ; in Loop: Header=BB3_255 Depth=6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_269 ; %bb.268: ; in Loop: Header=BB3_255 Depth=6 s_add_i32 s6, s37, 0xffffff00 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_lshr_b32 s18, s6, 8 s_add_u32 s6, s10, 0x2800 s_addc_u32 s7, s11, 0 v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7] s_and_b32 s6, s37, 0xff s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, s18, 24, v[3:4] global_load_b64 v[3:4], v[11:12], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4] .LBB3_269: ; in Loop: Header=BB3_255 Depth=6 v_dual_mov_b32 v15, s37 :: v_dual_mov_b32 v4, s17 v_dual_mov_b32 v3, s16 :: v_dual_mov_b32 v6, v5 global_store_b32 v5, v15, s[16:17] offset:4 global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s6, vcc_lo s_cbranch_execz .LBB3_271 ; %bb.270: ; in Loop: Header=BB3_255 Depth=6 s_waitcnt_vscnt null, 0x0 global_atomic_add_u32 v[84:85], v118, off v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12 .LBB3_271: ; %Flow997 ; in Loop: Header=BB3_255 Depth=6 s_or_b32 exec_lo, exec_lo, s6 .LBB3_272: ; %Flow1000 ; in Loop: Header=BB3_255 Depth=6 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s3 v_readfirstlane_b32 s6, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s7, v4 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc0 .LBB3_274 ; %bb.273: ; in Loop: Header=BB3_255 Depth=6 s_mov_b32 s19, -1 ; implicit-def: $sgpr37 ; implicit-def: $sgpr38 s_branch .LBB3_275 .LBB3_274: ; in Loop: Header=BB3_255 Depth=6 s_mov_b32 s19, 0 s_and_not1_b32 s2, s2, exec_lo s_sleep 2 .LBB3_275: ; %Flow1005 ; in Loop: Header=BB3_255 Depth=6 s_mov_b32 s18, 0 .LBB3_276: ; %Flow1004 ; in Loop: Header=BB3_255 Depth=6 s_and_not1_b32 s3, s5, exec_lo s_and_b32 s2, s2, exec_lo s_mov_b32 s20, 0 s_or_b32 s5, s3, s2 ; implicit-def: $sgpr2_sgpr3 .LBB3_277: ; %Flow1003 ; in Loop: Header=BB3_255 Depth=6 s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccz .LBB3_255 ; %bb.278: ; %loop.exit.guard913 ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2 s_and_b32 vcc_lo, exec_lo, s20 s_cbranch_vccnz .LBB3_198 ; %bb.279: ; %loop.exit.guard914 ; in Loop: Header=BB3_75 Depth=5 s_xor_b32 s2, s18, -1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s2 s_cbranch_vccz .LBB3_282 ; %bb.280: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s18, 0 s_branch .LBB3_283 .LBB3_281: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s18, 0 s_branch .LBB3_198 .LBB3_282: ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s18, -1 ; implicit-def: $sgpr6_sgpr7 .LBB3_283: ; %Flow994 ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6 s_and_not1_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB3_198 ; %bb.284: ; in Loop: Header=BB3_75 Depth=5 s_and_saveexec_b32 s3, s5 s_cbranch_execz .LBB3_313 ; %bb.285: ; in Loop: Header=BB3_75 Depth=5 s_load_b64 s[18:19], s[8:9], 0x50 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s2, v4 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s2, s2, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_291 ; %bb.286: ; in Loop: Header=BB3_75 Depth=5 s_waitcnt lgkmcnt(0) global_load_b64 v[28:29], v5, s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[11:12], v5, s[18:19] offset:40 global_load_b64 v[15:16], v5, s[18:19] s_mov_b32 s6, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v12, v29 v_and_b32_e32 v6, v11, v28 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v11, v6, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v11, v3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v15, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo global_load_b64 v[26:27], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[28:29] s_cbranch_execz .LBB3_290 ; %bb.287: ; %.preheader3.i.i.i152.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s7, 0 .LBB3_288: ; %.preheader3.i.i.i152 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 s_clause 0x1 global_load_b64 v[15:16], v5, s[18:19] offset:40 global_load_b64 v[18:19], v5, s[18:19] v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v15, v28 v_and_b32_e32 v6, v16, v29 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19] v_mov_b32_e32 v3, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4] v_mov_b32_e32 v12, v15 global_load_b64 v[26:27], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_288 ; %bb.289: ; %Flow990 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s7 .LBB3_290: ; %Flow992 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB3_291: ; %.loopexit4.i.i.i147 ; in Loop: Header=BB3_75 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[15:16], v5, s[18:19] offset:40 global_load_b128 v[26:29], v5, s[18:19] v_readfirstlane_b32 s20, v11 v_readfirstlane_b32 s21, v12 s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v15 v_readfirstlane_b32 s7, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[20:21], s[6:7] s_mul_i32 s37, s7, 24 s_mul_hi_u32 s38, s6, 24 s_mul_i32 s39, s6, 24 s_and_saveexec_b32 s40, s2 s_cbranch_execz .LBB3_293 ; %bb.292: ; in Loop: Header=BB3_75 Depth=5 v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5 s_add_i32 s5, s38, s37 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v26, s39 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo global_store_b128 v[15:16], v[11:14], off offset:8 .LBB3_293: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s40 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v28, s6 v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo s_mov_b32 s7, s4 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v6, v3 s_mov_b32 s5, s4 s_mov_b32 s6, s4 v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17 v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6 v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4 v_mov_b32_e32 v6, v5 s_clause 0x4 global_store_b64 v[3:4], v[11:12], off global_store_b128 v[3:4], v[28:31], off offset:8 global_store_b128 v[3:4], v[28:31], off offset:24 global_store_b128 v[3:4], v[28:31], off offset:40 global_store_b64 v[3:4], v[5:6], off offset:56 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_301 ; %bb.294: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x1 global_load_b64 v[133:134], v5, s[18:19] offset:32 glc global_load_b64 v[3:4], v5, s[18:19] offset:40 s_mov_b32 s6, exec_lo v_dual_mov_b32 v131, s20 :: v_dual_mov_b32 v132, s21 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s21, v4 v_and_b32_e32 v3, s20, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v6, v4 v_add_co_u32 v3, vcc_lo, v26, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo global_store_b64 v[3:4], v[133:134], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[30:31], v5, v[131:134], s[18:19] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[30:31], v[133:134] s_cbranch_execz .LBB3_297 ; %bb.295: ; %.preheader1.i.i.i150.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s7, 0 .LBB3_296: ; %.preheader1.i.i.i150 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21 s_sleep 1 global_store_b64 v[3:4], v[30:31], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[18:19] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31] v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11 s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_296 .LBB3_297: ; %Flow988 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s6 global_load_b64 v[11:12], v5, s[18:19] offset:16 s_mov_b32 s7, exec_lo s_mov_b32 s6, exec_lo v_mbcnt_lo_u32_b32 v3, s7, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_299 ; %bb.298: ; in Loop: Header=BB3_75 Depth=5 s_bcnt1_i32_b32 s7, s7 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s7 s_waitcnt vmcnt(0) global_atomic_add_u64 v[11:12], v[4:5], off offset:8 .LBB3_299: ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) global_load_b64 v[15:16], v[11:12], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16] s_cbranch_vccnz .LBB3_301 ; %bb.300: ; in Loop: Header=BB3_75 Depth=5 global_load_b32 v4, v[11:12], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s6, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[15:16], v[4:5], off s_and_b32 m0, s6, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_301: ; %Flow989 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 s_add_i32 s38, s38, s37 v_add_co_u32 v3, vcc_lo, v26, s39 v_add_co_ci_u32_e32 v4, vcc_lo, s38, v27, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB3_302: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_304 ; %bb.303: ; in Loop: Header=BB3_302 Depth=6 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB3_304: ; in Loop: Header=BB3_302 Depth=6 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s5, v6 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB3_306 ; %bb.305: ; in Loop: Header=BB3_302 Depth=6 s_mov_b32 s5, 0 s_sleep 1 s_branch .LBB3_307 .LBB3_306: ; in Loop: Header=BB3_302 Depth=6 s_mov_b32 s5, -1 .LBB3_307: ; %Flow983 ; in Loop: Header=BB3_302 Depth=6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_302 ; %bb.308: ; in Loop: Header=BB3_75 Depth=5 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_312 ; %bb.309: ; in Loop: Header=BB3_75 Depth=5 s_clause 0x2 global_load_b64 v[3:4], v5, s[18:19] offset:40 global_load_b64 v[11:12], v5, s[18:19] offset:24 glc global_load_b64 v[15:16], v5, s[18:19] s_waitcnt vmcnt(2) v_add_co_u32 v6, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v28, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v18, vcc_lo, v6, s20 v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo v_mov_b32_e32 v29, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19] v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6 v_and_b32_e32 v4, v27, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v26, v3 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v4, v6, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v15, v3 v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo global_store_b64 v[3:4], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[18:19] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_312 ; %bb.310: ; %.preheader.i.i.i149.preheader ; in Loop: Header=BB3_75 Depth=5 s_mov_b32 s2, 0 .LBB3_311: ; %.preheader.i.i.i149 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; Parent Loop BB3_75 Depth=5 ; => This Inner Loop Header: Depth=6 s_sleep 1 global_store_b64 v[3:4], v[28:29], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29] v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11 s_or_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB3_311 .LBB3_312: ; %Flow981 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s5 v_mov_b32_e32 v131, 0 .LBB3_313: ; %Flow993 ; in Loop: Header=BB3_75 Depth=5 s_or_b32 exec_lo, exec_lo, s3 v_dual_mov_b32 v15, v116 :: v_dual_mov_b32 v16, v117 s_mov_b32 s18, -1 s_branch .LBB3_198 .LBB3_314: ; in Loop: Header=BB3_43 Depth=4 ; implicit-def: $vgpr114_vgpr115 ; implicit-def: $sgpr36 ; implicit-def: $vgpr130 s_branch .LBB3_338 .LBB3_315: ; in Loop: Header=BB3_43 Depth=4 v_cmp_ne_u64_e64 s5, 1, v[116:117] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s5 s_cbranch_vccz .LBB3_317 ; %bb.316: ; in Loop: Header=BB3_43 Depth=4 v_dual_mov_b32 v114, v116 :: v_dual_mov_b32 v115, v117 s_branch .LBB3_337 .LBB3_317: ; in Loop: Header=BB3_43 Depth=4 v_mbcnt_lo_u32_b32 v3, exec_lo, 0 s_mov_b32 s16, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_334 ; %bb.318: ; in Loop: Header=BB3_43 Depth=4 global_load_b64 v[3:4], v[98:99], off glc s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt vmcnt(0) lgkmcnt(0) v_sub_co_u32 v3, vcc_lo, s2, v3 v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_334 ; %bb.319: ; in Loop: Header=BB3_43 Depth=4 v_sub_nc_u32_e32 v3, 0x4e20, v3 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) v_readfirstlane_b32 s2, v3 s_delay_alu instid0(VALU_DEP_1) s_ashr_i32 s3, s2, 31 s_waitcnt lgkmcnt(0) s_add_u32 s2, s6, s2 s_addc_u32 s3, s7, s3 .LBB3_320: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0x659 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s17, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s17 s_cbranch_vccnz .LBB3_323 ; %bb.321: ; %.preheader11.i166 ; in Loop: Header=BB3_320 Depth=5 s_sleep 0x7f s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_branch .LBB3_320 .LBB3_322: ; %.preheader9.i165 ; in Loop: Header=BB3_323 Depth=5 s_sleep 63 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_323: ; %Flow975 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0x326 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s17, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s17 s_cbranch_vccz .LBB3_322 ; %bb.324: ; %Flow972 ; in Loop: Header=BB3_43 Depth=4 s_add_u32 s18, s6, 0x18c s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s17, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s17 s_cbranch_vccnz .LBB3_327 .LBB3_325: ; %.preheader7.i164 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 31 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0x18c s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u64_e64 s17, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s17 s_cbranch_vccnz .LBB3_325 s_branch .LBB3_327 .LBB3_326: ; %.preheader5.i163 ; in Loop: Header=BB3_327 Depth=5 s_sleep 15 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_327: ; %.loopexit8.i156 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0xc0 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s17, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s17 s_cbranch_vccz .LBB3_326 s_branch .LBB3_329 .LBB3_328: ; %.preheader3.i162 ; in Loop: Header=BB3_329 Depth=5 s_sleep 7 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_329: ; %Flow966 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0x59 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s17, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s17 s_cbranch_vccz .LBB3_328 s_branch .LBB3_331 .LBB3_330: ; %.preheader1.i161 ; in Loop: Header=BB3_331 Depth=5 s_sleep 3 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_331: ; %Flow963 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 38 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s17, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s17 s_cbranch_vccz .LBB3_330 ; %bb.332: ; %Flow960 ; in Loop: Header=BB3_43 Depth=4 v_cmp_le_u64_e64 s6, s[2:3], s[6:7] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_334 .LBB3_333: ; %.preheader.i160 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_11 Depth=3 ; Parent Loop BB3_43 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt lgkmcnt(0) v_cmp_gt_u64_e64 s6, s[2:3], s[6:7] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_333 .LBB3_334: ; %__ockl_rtcwait_u32.exit167 ; in Loop: Header=BB3_43 Depth=4 s_or_b32 exec_lo, exec_lo, s16 v_mov_b32_e32 v3, s36 s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e32 0, v130 s_cbranch_execz .LBB3_336 ; %bb.335: ; in Loop: Header=BB3_43 Depth=4 global_load_b32 v3, v[84:85], off glc .LBB3_336: ; in Loop: Header=BB3_43 Depth=4 s_or_b32 exec_lo, exec_lo, s2 s_waitcnt vmcnt(0) v_readfirstlane_b32 s36, v3 .LBB3_337: ; in Loop: Header=BB3_43 Depth=4 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115 s_mov_b32 s6, 0 .LBB3_338: ; %Flow1122 ; in Loop: Header=BB3_43 Depth=4 s_and_b32 vcc_lo, exec_lo, s5 s_cbranch_vccz .LBB3_43 ; %bb.339: ; %Flow1123 ; in Loop: Header=BB3_11 Depth=3 v_mov_b32_e32 v22, v7 .LBB3_340: ; %Flow1124 ; in Loop: Header=BB3_11 Depth=3 v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16 s_delay_alu instid0(VALU_DEP_2) v_mov_b32_e32 v4, v22 s_and_b32 s3, s6, exec_lo .LBB3_341: ; %Flow1126 ; in Loop: Header=BB3_11 Depth=3 s_or_b32 exec_lo, exec_lo, s34 .LBB3_342: ; %.loopexit187 ; in Loop: Header=BB3_11 Depth=3 s_xor_b32 s1, s3, -1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, exec_lo, s1 s_or_b32 s30, s1, s30 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s30 s_cbranch_execnz .LBB3_11 ; %bb.343: ; %Flow1139 ; in Loop: Header=BB3_6 Depth=2 s_or_b32 exec_lo, exec_lo, s30 s_mov_b32 s1, 0 s_branch .LBB3_345 .LBB3_344: ; in Loop: Header=BB3_6 Depth=2 s_mov_b32 s1, -1 ; implicit-def: $vgpr11_vgpr12 .LBB3_345: ; %Flow1321 ; in Loop: Header=BB3_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB3_642 ; %bb.346: ; in Loop: Header=BB3_6 Depth=2 v_mbcnt_lo_u32_b32 v70, exec_lo, 0 s_bcnt1_i32_b32 s30, exec_lo ; implicit-def: $vgpr28_vgpr29 .LBB3_347: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; => This Loop Header: Depth=3 ; Child Loop BB3_351 Depth 4 ; Child Loop BB3_378 Depth 4 ; Child Loop BB3_396 Depth 5 ; Child Loop BB3_404 Depth 5 ; Child Loop BB3_410 Depth 5 ; Child Loop BB3_419 Depth 5 ; Child Loop BB3_424 Depth 5 ; Child Loop BB3_426 Depth 5 ; Child Loop BB3_447 Depth 5 ; Child Loop BB3_455 Depth 5 ; Child Loop BB3_461 Depth 5 ; Child Loop BB3_470 Depth 5 ; Child Loop BB3_478 Depth 5 ; Child Loop BB3_481 Depth 5 ; Child Loop BB3_483 Depth 5 ; Child Loop BB3_485 Depth 5 ; Child Loop BB3_487 Depth 5 ; Child Loop BB3_489 Depth 5 ; Child Loop BB3_491 Depth 5 ; Child Loop BB3_513 Depth 5 ; Child Loop BB3_521 Depth 5 ; Child Loop BB3_527 Depth 5 ; Child Loop BB3_536 Depth 5 ; Child Loop BB3_543 Depth 5 ; Child Loop BB3_546 Depth 5 ; Child Loop BB3_551 Depth 5 ; Child Loop BB3_558 Depth 5 ; Child Loop BB3_591 Depth 5 ; Child Loop BB3_599 Depth 5 ; Child Loop BB3_605 Depth 5 ; Child Loop BB3_614 Depth 5 ; Child Loop BB3_623 Depth 4 ; Child Loop BB3_626 Depth 4 ; Child Loop BB3_628 Depth 4 ; Child Loop BB3_630 Depth 4 ; Child Loop BB3_632 Depth 4 ; Child Loop BB3_634 Depth 4 ; Child Loop BB3_636 Depth 4 s_delay_alu instid0(VALU_DEP_2) s_cmp_eq_u32 s29, 0 s_mov_b32 s5, -1 ;;#ASMSTART ;;#ASMEND s_cbranch_scc1 .LBB3_375 ; %bb.348: ; in Loop: Header=BB3_347 Depth=3 v_cmp_eq_u32_e64 s1, 0, v70 v_mov_b32_e32 v3, 0 s_delay_alu instid0(VALU_DEP_2) s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB3_350 ; %bb.349: ; in Loop: Header=BB3_347 Depth=3 global_load_b32 v3, v[34:35], off glc .LBB3_350: ; in Loop: Header=BB3_347 Depth=3 s_or_b32 exec_lo, exec_lo, s2 global_load_b32 v6, v[36:37], off v_cvt_f32_u32_e32 v4, s29 s_sub_i32 s2, 0, s29 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v4, v4 s_waitcnt_depctr 0xfff v_mul_f32_e32 v4, 0x4f7ffffe, v4 v_cvt_u32_f32_e32 v4, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mul_lo_u32 v11, s2, v4 s_waitcnt vmcnt(1) v_readfirstlane_b32 s2, v3 v_add_nc_u32_e32 v3, s2, v70 s_mov_b32 s2, s29 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v11, v4, v11 v_add_nc_u32_e32 v15, v4, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v4, v3, v15 v_mul_lo_u32 v4, v4, s29 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v3, v3, v4 v_subrev_nc_u32_e32 v4, s29, v3 v_cmp_le_u32_e32 vcc_lo, s29, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v3, v3, v4, vcc_lo v_subrev_nc_u32_e32 v4, s29, v3 v_cmp_le_u32_e32 vcc_lo, s29, v3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e32 v16, v3, v4, vcc_lo .LBB3_351: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Inner Loop Header: Depth=4 s_mov_b32 s3, exec_lo ; implicit-def: $vgpr3_vgpr4 s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_u32_e32 0x100, v16 s_xor_b32 s3, exec_lo, s3 ; %bb.352: ; in Loop: Header=BB3_351 Depth=4 s_add_u32 s6, s10, 0x2800 s_addc_u32 s7, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, 0x1800, v7, s[6:7] v_mad_u64_u32 v[3:4], null, v16, 24, v[11:12] ; %bb.353: ; %Flow1148 ; in Loop: Header=BB3_351 Depth=4 s_and_not1_saveexec_b32 s3, s3 s_cbranch_execz .LBB3_355 ; %bb.354: ; in Loop: Header=BB3_351 Depth=4 s_add_u32 s6, s10, 0x2800 v_add_nc_u32_e32 v11, 0xffffff00, v16 s_addc_u32 s7, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[6:7] v_lshrrev_b32_e32 v18, 8, v11 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v18, 24, v[3:4] v_and_b32_e32 v18, 0xff, v16 global_load_b64 v[11:12], v[11:12], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v18, 24, v[11:12] .LBB3_355: ; in Loop: Header=BB3_351 Depth=4 s_or_b32 exec_lo, exec_lo, s3 global_load_b32 v3, v[3:4], off offset:16 glc s_waitcnt vmcnt(0) v_cmp_lt_u32_e32 vcc_lo, v3, v6 s_cbranch_vccz .LBB3_357 ; %bb.356: ; in Loop: Header=BB3_351 Depth=4 s_ctz_i32_b32 s3, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_lshl_b32 s3, s3, 2 v_mov_b32_e32 v3, s3 ds_bpermute_b32 v3, v3, v16 s_branch .LBB3_358 .LBB3_357: ; in Loop: Header=BB3_351 Depth=4 v_mov_b32_e32 v3, -1 .LBB3_358: ; in Loop: Header=BB3_351 Depth=4 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s6, v3 s_cmp_eq_u32 s6, -1 s_cselect_b32 s3, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB3_361 ; %bb.359: ; in Loop: Header=BB3_351 Depth=4 s_cmpk_lt_u32 s6, 0x100 s_cbranch_scc0 .LBB3_362 ; %bb.360: ; in Loop: Header=BB3_351 Depth=4 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 s_mov_b32 s7, 0 v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17] s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4] s_branch .LBB3_363 .LBB3_361: ; in Loop: Header=BB3_351 Depth=4 s_mov_b32 s6, -1 ; implicit-def: $vgpr11_vgpr12 s_branch .LBB3_366 .LBB3_362: ; in Loop: Header=BB3_351 Depth=4 s_mov_b32 s7, -1 ; implicit-def: $vgpr11_vgpr12 .LBB3_363: ; %Flow1141 ; in Loop: Header=BB3_351 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s7 s_cbranch_vccnz .LBB3_365 ; %bb.364: ; in Loop: Header=BB3_351 Depth=4 s_add_i32 s7, s6, 0xffffff00 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) s_lshr_b32 s7, s7, 8 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 s_and_b32 s6, s6, 0xff v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17] v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4] global_load_b64 v[3:4], v[11:12], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4] .LBB3_365: ; %Flow1142 ; in Loop: Header=BB3_351 Depth=4 s_mov_b32 s6, 0 .LBB3_366: ; %Flow1144 ; in Loop: Header=BB3_351 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_370 ; %bb.367: ; in Loop: Header=BB3_351 Depth=4 v_add_nc_u32_e32 v3, s30, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v4, v3, v15 v_mul_lo_u32 v4, v4, s29 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v3, v3, v4 v_subrev_nc_u32_e32 v4, s29, v3 v_cmp_le_u32_e32 vcc_lo, s29, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v3, v3, v4, vcc_lo v_subrev_nc_u32_e32 v4, s29, v3 v_cmp_le_u32_e32 vcc_lo, s29, v3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e32 v16, v3, v4, vcc_lo s_and_saveexec_b32 s6, s1 s_cbranch_execz .LBB3_369 ; %bb.368: ; in Loop: Header=BB3_351 Depth=4 global_store_b32 v[34:35], v16, off .LBB3_369: ; in Loop: Header=BB3_351 Depth=4 s_or_b32 exec_lo, exec_lo, s6 v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29 s_sub_i32 s2, s2, s30 .LBB3_370: ; in Loop: Header=BB3_351 Depth=4 s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccz .LBB3_372 ; %bb.371: ; in Loop: Header=BB3_351 Depth=4 s_mov_b32 s3, -1 s_mov_b32 s6, -1 ; implicit-def: $sgpr2 ; implicit-def: $vgpr16 s_branch .LBB3_373 .LBB3_372: ; in Loop: Header=BB3_351 Depth=4 s_cmp_lt_i32 s2, 1 s_mov_b32 s3, 0 s_cselect_b32 s6, -1, 0 .LBB3_373: ; %Flow1150 ; in Loop: Header=BB3_351 Depth=4 v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11 s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_351 ; %bb.374: ; %loop.exit.guard922 ; in Loop: Header=BB3_347 Depth=3 s_xor_b32 s1, s3, -1 s_branch .LBB3_376 .LBB3_375: ; in Loop: Header=BB3_347 Depth=3 s_mov_b32 s1, -1 ; implicit-def: $vgpr11_vgpr12 .LBB3_376: ; %Flow1317 ; in Loop: Header=BB3_347 Depth=3 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB3_617 ; %bb.377: ; %.loopexit190 ; in Loop: Header=BB3_347 Depth=3 v_mbcnt_lo_u32_b32 v71, exec_lo, 0 ; implicit-def: $vgpr30_vgpr31 .LBB3_378: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Loop Header: Depth=4 ; Child Loop BB3_396 Depth 5 ; Child Loop BB3_404 Depth 5 ; Child Loop BB3_410 Depth 5 ; Child Loop BB3_419 Depth 5 ; Child Loop BB3_424 Depth 5 ; Child Loop BB3_426 Depth 5 ; Child Loop BB3_447 Depth 5 ; Child Loop BB3_455 Depth 5 ; Child Loop BB3_461 Depth 5 ; Child Loop BB3_470 Depth 5 ; Child Loop BB3_478 Depth 5 ; Child Loop BB3_481 Depth 5 ; Child Loop BB3_483 Depth 5 ; Child Loop BB3_485 Depth 5 ; Child Loop BB3_487 Depth 5 ; Child Loop BB3_489 Depth 5 ; Child Loop BB3_491 Depth 5 ; Child Loop BB3_513 Depth 5 ; Child Loop BB3_521 Depth 5 ; Child Loop BB3_527 Depth 5 ; Child Loop BB3_536 Depth 5 ; Child Loop BB3_543 Depth 5 ; Child Loop BB3_546 Depth 5 ; Child Loop BB3_551 Depth 5 ; Child Loop BB3_558 Depth 5 ; Child Loop BB3_591 Depth 5 ; Child Loop BB3_599 Depth 5 ; Child Loop BB3_605 Depth 5 ; Child Loop BB3_614 Depth 5 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_eq_u32_e64 s1, 0, v71 v_mov_b32_e32 v3, 0 s_mov_b32 s18, 0 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB3_380 ; %bb.379: ; in Loop: Header=BB3_378 Depth=4 global_load_b32 v3, v[32:33], off glc .LBB3_380: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s2 s_waitcnt vmcnt(0) v_readfirstlane_b32 s31, v3 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_delay_alu instid0(VALU_DEP_3) s_cmp_eq_u32 s31, 0x10100 s_cbranch_scc1 .LBB3_440 ; %bb.381: ; in Loop: Header=BB3_378 Depth=4 v_mov_b32_e32 v3, 0 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB3_383 ; %bb.382: ; in Loop: Header=BB3_378 Depth=4 v_mov_b32_e32 v69, v5 global_atomic_cmpswap_b32 v3, v[48:49], v[68:69], off glc s_waitcnt vmcnt(0) v_cmp_ne_u32_e32 vcc_lo, 0, v3 v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo .LBB3_383: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s34, v3 s_cmp_lg_u32 s31, s34 s_cbranch_scc1 .LBB3_441 ; %bb.384: ; in Loop: Header=BB3_378 Depth=4 v_mbcnt_lo_u32_b32 v27, exec_lo, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) v_cmp_eq_u32_e32 vcc_lo, 0, v27 v_mov_b32_e32 v3, 0 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB3_386 ; %bb.385: ; in Loop: Header=BB3_378 Depth=4 global_load_b32 v3, v[48:49], off glc .LBB3_386: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s2 s_waitcnt vmcnt(0) v_readfirstlane_b32 s20, v3 s_mov_b32 s16, 2 s_delay_alu instid0(VALU_DEP_1) s_cmp_eq_u32 s20, 0x10100 s_cbranch_scc1 .LBB3_474 ; %bb.387: ; in Loop: Header=BB3_378 Depth=4 v_mov_b32_e32 v3, 1 s_and_saveexec_b32 s3, vcc_lo s_cbranch_execz .LBB3_391 ; %bb.388: ; in Loop: Header=BB3_378 Depth=4 global_load_b64 v[23:24], v[50:51], off glc s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt vmcnt(0) lgkmcnt(0) v_sub_co_u32 v3, s2, s6, v23 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_co_ci_u32_e64 v4, s2, s7, v24, s2 v_cmp_lt_u64_e64 s2, 0x752f, v[3:4] v_mov_b32_e32 v3, 1 s_delay_alu instid0(VALU_DEP_2) s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_390 ; %bb.389: ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v22, s7 global_atomic_cmpswap_b64 v[3:4], v[50:51], v[21:24], off glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e64 s2, v[3:4], v[23:24] s_delay_alu instid0(VALU_DEP_1) v_cndmask_b32_e64 v3, 1, 2, s2 .LBB3_390: ; %Flow1306 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s5 .LBB3_391: ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s3 v_readfirstlane_b32 s3, v3 s_mov_b32 s16, 1 s_delay_alu instid0(VALU_DEP_1) s_cmp_eq_u32 s3, 1 s_cbranch_scc1 .LBB3_474 ; %bb.392: ; in Loop: Header=BB3_378 Depth=4 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s21, vcc_lo s_cbranch_execz .LBB3_421 ; %bb.393: ; in Loop: Header=BB3_378 Depth=4 s_load_b64 s[16:17], s[8:9], 0x50 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s2, v4 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s2, s2, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_399 ; %bb.394: ; in Loop: Header=BB3_378 Depth=4 s_waitcnt lgkmcnt(0) global_load_b64 v[23:24], v5, s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[15:16], v5, s[16:17] s_mov_b32 s6, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v12, v24 v_and_b32_e32 v6, v11, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v11, v6, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v11, v3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v15, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo global_load_b64 v[21:22], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[23:24] s_cbranch_execz .LBB3_398 ; %bb.395: ; %.preheader3.i.i.i75.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s7, 0 .LBB3_396: ; %.preheader3.i.i.i75 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b64 v[18:19], v5, s[16:17] v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v15, v23 v_and_b32_e32 v6, v16, v24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19] v_mov_b32_e32 v3, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4] v_mov_b32_e32 v12, v15 global_load_b64 v[21:22], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_396 ; %bb.397: ; %Flow1300 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s7 .LBB3_398: ; %Flow1302 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB3_399: ; %.loopexit4.i.i.i70 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b128 v[21:24], v5, s[16:17] v_readfirstlane_b32 s18, v11 v_readfirstlane_b32 s19, v12 s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v15 v_readfirstlane_b32 s7, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[18:19], s[6:7] s_mul_i32 s35, s7, 24 s_mul_hi_u32 s36, s6, 24 s_mul_i32 s37, s6, 24 s_and_saveexec_b32 s38, s2 s_cbranch_execz .LBB3_401 ; %bb.400: ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5 s_add_i32 s5, s36, s35 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v21, s37 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo global_store_b128 v[15:16], v[11:14], off offset:8 .LBB3_401: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s38 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v23, s6 v_add_co_ci_u32_e32 v12, vcc_lo, s7, v24, vcc_lo s_mov_b32 s7, s4 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v6, v3 s_mov_b32 s5, s4 s_mov_b32 s6, s4 v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo v_dual_mov_b32 v15, v5 :: v_dual_mov_b32 v26, s7 v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v25, s6 v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v23, s4 v_mov_b32_e32 v24, s5 s_clause 0x3 global_store_b128 v[11:12], v[15:18], off global_store_b128 v[11:12], v[23:26], off offset:16 global_store_b128 v[11:12], v[23:26], off offset:32 global_store_b128 v[11:12], v[23:26], off offset:48 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_409 ; %bb.402: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x1 global_load_b64 v[82:83], v5, s[16:17] offset:32 glc global_load_b64 v[3:4], v5, s[16:17] offset:40 s_mov_b32 s6, exec_lo v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s19, v4 v_and_b32_e32 v3, s18, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v6, v4 v_add_co_u32 v3, vcc_lo, v21, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo global_store_b64 v[3:4], v[82:83], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[25:26], v[82:83] s_cbranch_execz .LBB3_405 ; %bb.403: ; %.preheader1.i.i.i73.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s7, 0 .LBB3_404: ; %.preheader1.i.i.i73 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19 s_sleep 1 global_store_b64 v[3:4], v[25:26], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v5, v[23:26], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[25:26] v_dual_mov_b32 v26, v16 :: v_dual_mov_b32 v25, v15 s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_404 .LBB3_405: ; %Flow1298 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s6 global_load_b64 v[15:16], v5, s[16:17] offset:16 s_mov_b32 s7, exec_lo s_mov_b32 s6, exec_lo v_mbcnt_lo_u32_b32 v3, s7, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_407 ; %bb.406: ; in Loop: Header=BB3_378 Depth=4 s_bcnt1_i32_b32 s7, s7 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s7 s_waitcnt vmcnt(0) global_atomic_add_u64 v[15:16], v[4:5], off offset:8 .LBB3_407: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) global_load_b64 v[18:19], v[15:16], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19] s_cbranch_vccnz .LBB3_409 ; %bb.408: ; in Loop: Header=BB3_378 Depth=4 global_load_b32 v4, v[15:16], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s6, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[18:19], v[4:5], off s_and_b32 m0, s6, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_409: ; %Flow1299 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s5 s_add_i32 s36, s36, s35 v_add_co_u32 v3, vcc_lo, v21, s37 v_add_co_ci_u32_e32 v4, vcc_lo, s36, v22, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB3_410: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_412 ; %bb.411: ; in Loop: Header=BB3_410 Depth=5 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB3_412: ; in Loop: Header=BB3_410 Depth=5 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s5, v6 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB3_414 ; %bb.413: ; in Loop: Header=BB3_410 Depth=5 s_mov_b32 s5, 0 s_sleep 1 s_branch .LBB3_415 .LBB3_414: ; in Loop: Header=BB3_410 Depth=5 s_mov_b32 s5, -1 .LBB3_415: ; %Flow1293 ; in Loop: Header=BB3_410 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_410 ; %bb.416: ; in Loop: Header=BB3_378 Depth=4 global_load_b64 v[3:4], v[11:12], off s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_420 ; %bb.417: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x2 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[15:16], v5, s[16:17] offset:24 glc global_load_b64 v[18:19], v5, s[16:17] s_waitcnt vmcnt(2) v_add_co_u32 v6, vcc_lo, v11, 1 v_add_co_ci_u32_e32 v23, vcc_lo, 0, v12, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v24, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v21, vcc_lo, v6, s18 v_add_co_ci_u32_e32 v22, vcc_lo, s19, v23, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22] v_dual_cndmask_b32 v22, v22, v23 :: v_dual_cndmask_b32 v21, v21, v6 v_dual_mov_b32 v23, v15 :: v_dual_and_b32 v6, v22, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v11, v21, v11 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v11, 24 v_mul_lo_u32 v11, v11, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v18, v11 v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo global_store_b64 v[11:12], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[15:16] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_420 ; %bb.418: ; %.preheader.i.i.i72.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s2, 0 .LBB3_419: ; %.preheader.i.i.i72 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 global_store_b64 v[11:12], v[23:24], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[23:24] v_dual_mov_b32 v24, v16 :: v_dual_mov_b32 v23, v15 s_or_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB3_419 .LBB3_420: ; %Flow1291 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s5 .LBB3_421: ; %Flow1303 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s21 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_cmp_eq_u64 s[18:19], 0 s_cbranch_scc1 .LBB3_473 ; %bb.422: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s2, exec_lo s_mov_b32 s5, exec_lo v_mbcnt_lo_u32_b32 v11, s2, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_u32_e32 0x300, v11 s_cbranch_execz .LBB3_425 ; %bb.423: ; %.preheader185.preheader ; in Loop: Header=BB3_378 Depth=4 v_lshlrev_b32_e32 v3, 3, v11 s_bcnt1_i32_b32 s6, s2 s_mov_b32 s16, 0 s_lshl_b32 s7, s6, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v3, s2, s18, v3 v_add_co_ci_u32_e64 v4, null, s19, 0, s2 .LBB3_424: ; %.preheader185 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11 global_store_b64 v[3:4], v[5:6], off v_add_co_u32 v3, s2, v3, s7 v_add_co_ci_u32_e64 v4, s2, 0, v4, s2 s_or_b32 s16, vcc_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s16 s_cbranch_execnz .LBB3_424 .LBB3_425: ; %Flow1285 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s5 ; implicit-def: $sgpr5 .LBB3_426: ; %.loopexit186 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 ;;#ASMSTART ;;#ASMEND v_cmp_eq_u32_e32 vcc_lo, 0, v27 v_mov_b32_e32 v3, s20 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB3_428 ; %bb.427: ; in Loop: Header=BB3_426 Depth=5 global_load_b32 v3, v[48:49], off glc .LBB3_428: ; in Loop: Header=BB3_426 Depth=5 s_or_b32 exec_lo, exec_lo, s2 s_waitcnt vmcnt(0) v_readfirstlane_b32 s20, v3 s_and_not1_b32 s2, s5, exec_lo s_and_b32 s5, vcc_lo, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 s5, s2, s5 s_cmp_lg_u32 s20, 0x10100 s_cbranch_scc0 .LBB3_435 ; %bb.429: ; in Loop: Header=BB3_426 Depth=5 v_mov_b32_e32 v3, s3 s_and_saveexec_b32 s6, vcc_lo s_cbranch_execz .LBB3_433 ; %bb.430: ; in Loop: Header=BB3_426 Depth=5 s_add_i32 s2, s20, 0xffffff00 v_mov_b32_e32 v6, v5 s_lshr_b32 s2, s2, 8 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17] v_mad_u64_u32 v[11:12], null, s2, 24, v[3:4] v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19 global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e64 s2, 0, v[3:4] v_mov_b32_e32 v3, s3 s_delay_alu instid0(VALU_DEP_2) s_and_saveexec_b32 s7, s2 s_cbranch_execz .LBB3_432 ; %bb.431: ; in Loop: Header=BB3_426 Depth=5 s_waitcnt_vscnt null, 0x0 global_atomic_add_u32 v[48:49], v68, off v_mov_b32_e32 v3, 0 .LBB3_432: ; %Flow1278 ; in Loop: Header=BB3_426 Depth=5 s_or_b32 exec_lo, exec_lo, s7 .LBB3_433: ; in Loop: Header=BB3_426 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s6 v_readfirstlane_b32 s2, v3 s_delay_alu instid0(VALU_DEP_1) s_cmp_eq_u32 s2, 0 s_cbranch_scc1 .LBB3_436 ; %bb.434: ; in Loop: Header=BB3_426 Depth=5 s_mov_b32 s6, 0 s_and_not1_b32 vcc_lo, vcc_lo, exec_lo s_sleep 2 ; implicit-def: $sgpr3 s_branch .LBB3_437 .LBB3_435: ; in Loop: Header=BB3_426 Depth=5 s_mov_b32 s16, -1 s_mov_b32 s6, -1 ; implicit-def: $vgpr27 ; implicit-def: $sgpr20 ; implicit-def: $sgpr2 ; implicit-def: $sgpr7 s_branch .LBB3_438 .LBB3_436: ; in Loop: Header=BB3_426 Depth=5 s_mov_b32 s6, -1 ; implicit-def: $vgpr27 ; implicit-def: $sgpr20 ; implicit-def: $sgpr2 .LBB3_437: ; %Flow1282 ; in Loop: Header=BB3_426 Depth=5 s_and_not1_b32 s5, s5, exec_lo s_and_b32 s17, vcc_lo, exec_lo s_mov_b32 s7, 0 s_mov_b32 s16, 0 s_or_b32 s5, s5, s17 .LBB3_438: ; %Flow1281 ; in Loop: Header=BB3_426 Depth=5 s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_442 ; %bb.439: ; in Loop: Header=BB3_426 Depth=5 s_mov_b32 s3, s2 s_branch .LBB3_426 .LBB3_440: ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v31, v4 :: v_dual_mov_b32 v30, v3 s_branch .LBB3_502 .LBB3_441: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s5, -1 ; implicit-def: $sgpr18 s_branch .LBB3_494 .LBB3_442: ; %loop.exit.guard925 ; in Loop: Header=BB3_378 Depth=4 s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccz .LBB3_472 ; %bb.443: ; in Loop: Header=BB3_378 Depth=4 s_and_saveexec_b32 s35, s5 s_cbranch_execz .LBB3_471 ; %bb.444: ; in Loop: Header=BB3_378 Depth=4 s_load_b64 s[16:17], s[8:9], 0x50 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s2, v4 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s2, s2, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_450 ; %bb.445: ; in Loop: Header=BB3_378 Depth=4 s_waitcnt lgkmcnt(0) global_load_b64 v[23:24], v5, s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[15:16], v5, s[16:17] s_mov_b32 s6, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v12, v24 v_and_b32_e32 v6, v11, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v11, v6, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v11, v3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v15, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo global_load_b64 v[21:22], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[23:24] s_cbranch_execz .LBB3_449 ; %bb.446: ; %.preheader3.i.i.i82.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s7, 0 .LBB3_447: ; %.preheader3.i.i.i82 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b64 v[18:19], v5, s[16:17] v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v15, v23 v_and_b32_e32 v6, v16, v24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19] v_mov_b32_e32 v3, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4] v_mov_b32_e32 v12, v15 global_load_b64 v[21:22], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_447 ; %bb.448: ; %Flow1273 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s7 .LBB3_449: ; %Flow1275 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB3_450: ; %.loopexit4.i.i.i77 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b128 v[21:24], v5, s[16:17] v_readfirstlane_b32 s20, v11 v_readfirstlane_b32 s21, v12 s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v15 v_readfirstlane_b32 s7, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[20:21], s[6:7] s_mul_i32 s36, s7, 24 s_mul_hi_u32 s37, s6, 24 s_mul_i32 s38, s6, 24 s_and_saveexec_b32 s39, s2 s_cbranch_execz .LBB3_452 ; %bb.451: ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5 s_add_i32 s5, s37, s36 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v21, s38 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo global_store_b128 v[15:16], v[11:14], off offset:8 .LBB3_452: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s39 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v23, s6 v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo s_mov_b32 s7, s4 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v6, v3 s_mov_b32 s5, s4 s_mov_b32 s6, s4 v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19 v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6 v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4 v_mov_b32_e32 v6, v5 s_clause 0x4 global_store_b64 v[3:4], v[11:12], off global_store_b128 v[3:4], v[23:26], off offset:8 global_store_b128 v[3:4], v[23:26], off offset:24 global_store_b128 v[3:4], v[23:26], off offset:40 global_store_b64 v[3:4], v[5:6], off offset:56 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_460 ; %bb.453: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x1 global_load_b64 v[82:83], v5, s[16:17] offset:32 glc global_load_b64 v[3:4], v5, s[16:17] offset:40 s_mov_b32 s6, exec_lo v_dual_mov_b32 v80, s20 :: v_dual_mov_b32 v81, s21 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s21, v4 v_and_b32_e32 v3, s20, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v6, v4 v_add_co_u32 v3, vcc_lo, v21, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo global_store_b64 v[3:4], v[82:83], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[25:26], v[82:83] s_cbranch_execz .LBB3_456 ; %bb.454: ; %.preheader1.i.i.i80.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s7, 0 .LBB3_455: ; %.preheader1.i.i.i80 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21 s_sleep 1 global_store_b64 v[3:4], v[25:26], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26] v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11 s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_455 .LBB3_456: ; %Flow1271 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s6 global_load_b64 v[11:12], v5, s[16:17] offset:16 s_mov_b32 s7, exec_lo s_mov_b32 s6, exec_lo v_mbcnt_lo_u32_b32 v3, s7, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_458 ; %bb.457: ; in Loop: Header=BB3_378 Depth=4 s_bcnt1_i32_b32 s7, s7 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s7 s_waitcnt vmcnt(0) global_atomic_add_u64 v[11:12], v[4:5], off offset:8 .LBB3_458: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) global_load_b64 v[15:16], v[11:12], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16] s_cbranch_vccnz .LBB3_460 ; %bb.459: ; in Loop: Header=BB3_378 Depth=4 global_load_b32 v4, v[11:12], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s6, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[15:16], v[4:5], off s_and_b32 m0, s6, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_460: ; %Flow1272 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s5 s_add_i32 s37, s37, s36 v_add_co_u32 v3, vcc_lo, v21, s38 v_add_co_ci_u32_e32 v4, vcc_lo, s37, v22, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB3_461: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB3_463 ; %bb.462: ; in Loop: Header=BB3_461 Depth=5 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB3_463: ; in Loop: Header=BB3_461 Depth=5 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s5, v6 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB3_465 ; %bb.464: ; in Loop: Header=BB3_461 Depth=5 s_mov_b32 s5, 0 s_sleep 1 s_branch .LBB3_466 .LBB3_465: ; in Loop: Header=BB3_461 Depth=5 s_mov_b32 s5, -1 .LBB3_466: ; %Flow1266 ; in Loop: Header=BB3_461 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_461 ; %bb.467: ; in Loop: Header=BB3_378 Depth=4 s_and_b32 exec_lo, exec_lo, s2 s_cbranch_execz .LBB3_471 ; %bb.468: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x2 global_load_b64 v[3:4], v5, s[16:17] offset:40 global_load_b64 v[11:12], v5, s[16:17] offset:24 glc global_load_b64 v[15:16], v5, s[16:17] s_waitcnt vmcnt(2) v_add_co_u32 v6, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v23, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v18, vcc_lo, v6, s20 v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo v_mov_b32_e32 v24, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19] v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6 v_and_b32_e32 v4, v22, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v21, v3 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v4, v6, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v15, v3 v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo global_store_b64 v[3:4], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_471 ; %bb.469: ; %.preheader.i.i.i79.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s2, 0 .LBB3_470: ; %.preheader.i.i.i79 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 global_store_b64 v[3:4], v[23:24], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24] v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11 s_or_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB3_470 .LBB3_471: ; %Flow1276 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s35 s_mov_b32 s7, s3 .LBB3_472: ; %Flow1277 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, s7 .LBB3_473: ; %Flow1287 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s16, s3 .LBB3_474: ; %__ockl_devmem_request.exit83 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) s_cmp_eq_u32 s16, 0 s_cselect_b32 s5, -1, 0 s_and_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_493 ; %bb.475: ; in Loop: Header=BB3_378 Depth=4 v_mbcnt_lo_u32_b32 v3, exec_lo, 0 s_mov_b32 s17, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_492 ; %bb.476: ; in Loop: Header=BB3_378 Depth=4 global_load_b64 v[3:4], v[50:51], off glc s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt vmcnt(0) lgkmcnt(0) v_sub_co_u32 v3, vcc_lo, s2, v3 v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_492 ; %bb.477: ; in Loop: Header=BB3_378 Depth=4 v_sub_nc_u32_e32 v3, 0x7530, v3 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) v_readfirstlane_b32 s2, v3 s_delay_alu instid0(VALU_DEP_1) s_ashr_i32 s3, s2, 31 s_waitcnt lgkmcnt(0) s_add_u32 s2, s6, s2 s_addc_u32 s3, s7, s3 .LBB3_478: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0x659 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s18, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB3_481 ; %bb.479: ; %.preheader11.i ; in Loop: Header=BB3_478 Depth=5 s_sleep 0x7f s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_branch .LBB3_478 .LBB3_480: ; %.preheader9.i ; in Loop: Header=BB3_481 Depth=5 s_sleep 63 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_481: ; %Flow1257 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0x326 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s18, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s18 s_cbranch_vccz .LBB3_480 ; %bb.482: ; %Flow1254 ; in Loop: Header=BB3_378 Depth=4 s_add_u32 s18, s6, 0x18c s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s18, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB3_485 .LBB3_483: ; %.preheader7.i ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 31 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0x18c s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u64_e64 s18, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB3_483 s_branch .LBB3_485 .LBB3_484: ; %.preheader5.i ; in Loop: Header=BB3_485 Depth=5 s_sleep 15 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_485: ; %.loopexit8.i ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0xc0 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s18, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s18 s_cbranch_vccz .LBB3_484 s_branch .LBB3_487 .LBB3_486: ; %.preheader3.i ; in Loop: Header=BB3_487 Depth=5 s_sleep 7 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_487: ; %Flow1248 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 0x59 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s18, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s18 s_cbranch_vccz .LBB3_486 s_branch .LBB3_489 .LBB3_488: ; %.preheader1.i ; in Loop: Header=BB3_489 Depth=5 s_sleep 3 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_489: ; %Flow1245 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_waitcnt lgkmcnt(0) s_add_u32 s18, s6, 38 s_addc_u32 s19, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s18, s[2:3], s[18:19] s_and_b32 vcc_lo, exec_lo, s18 s_cbranch_vccz .LBB3_488 ; %bb.490: ; %Flow1242 ; in Loop: Header=BB3_378 Depth=4 v_cmp_le_u64_e64 s6, s[2:3], s[6:7] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_492 .LBB3_491: ; %.preheader.i ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt lgkmcnt(0) v_cmp_gt_u64_e64 s6, s[2:3], s[6:7] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_491 .LBB3_492: ; %__ockl_rtcwait_u32.exit ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s17 s_cmp_lg_u32 s16, 2 v_mov_b32_e32 v31, s4 s_cselect_b32 s2, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) v_cndmask_b32_e64 v30, 0, 1, s2 .LBB3_493: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s18, 0 .LBB3_494: ; %Flow1309 ; in Loop: Header=BB3_378 Depth=4 s_and_b32 vcc_lo, exec_lo, s5 s_cbranch_vccz .LBB3_502 ; %bb.495: ; in Loop: Header=BB3_378 Depth=4 v_mov_b32_e32 v3, 1 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s5, s1 s_cbranch_execz .LBB3_499 ; %bb.496: ; in Loop: Header=BB3_378 Depth=4 global_load_b64 v[23:24], v[52:53], off glc s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt vmcnt(0) lgkmcnt(0) v_sub_co_u32 v3, vcc_lo, s2, v23 v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v24, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4] v_mov_b32_e32 v3, 1 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s6, vcc_lo s_cbranch_execz .LBB3_498 ; %bb.497: ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v21, s2 :: v_dual_mov_b32 v22, s3 global_atomic_cmpswap_b64 v[3:4], v[52:53], v[21:24], off glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[23:24] v_mov_b32_e32 v4, s4 v_cndmask_b32_e64 v3, 0, 1, vcc_lo .LBB3_498: ; %Flow1236 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s6 .LBB3_499: ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s5 v_readfirstlane_b32 s2, v3 v_readfirstlane_b32 s3, v4 s_mov_b32 s18, 0 s_delay_alu instid0(VALU_DEP_1) s_cmp_lg_u64 s[2:3], 0 s_cbranch_scc0 .LBB3_503 ; %bb.500: ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2 .LBB3_501: ; %Flow1235 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15 .LBB3_502: ; %Flow1312 ; in Loop: Header=BB3_378 Depth=4 s_xor_b32 s1, s18, -1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB3_378 s_branch .LBB3_618 .LBB3_503: ; in Loop: Header=BB3_378 Depth=4 v_mov_b32_e32 v15, 0 v_mov_b32_e32 v16, 0 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16 s_and_saveexec_b32 s18, s1 s_cbranch_execz .LBB3_539 ; %bb.504: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x1 global_load_b64 v[3:4], v5, s[12:13] glc global_load_b64 v[11:12], v5, s[14:15] s_waitcnt vmcnt(0) v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12] s_cbranch_vccnz .LBB3_508 ; %bb.505: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s2, exec_lo s_mov_b32 s1, exec_lo v_mbcnt_lo_u32_b32 v6, s2, 0 ; implicit-def: $vgpr3_vgpr4 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB3_507 ; %bb.506: ; in Loop: Header=BB3_378 Depth=4 s_bcnt1_i32_b32 s2, s2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_lshl_b32 s2, s2, 21 v_mov_b32_e32 v4, s2 global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc .LBB3_507: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s1 s_waitcnt vmcnt(0) v_readfirstlane_b32 s3, v4 v_readfirstlane_b32 s2, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[2:3] v_cmp_ge_u64_e64 s1, v[3:4], v[11:12] s_branch .LBB3_509 .LBB3_508: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s1, -1 ; implicit-def: $vgpr3_vgpr4 .LBB3_509: ; %Flow1233 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_saveexec_b32 s19, s1 s_cbranch_execz .LBB3_538 ; %bb.510: ; in Loop: Header=BB3_378 Depth=4 s_load_b64 s[2:3], s[8:9], 0x50 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s1, v4 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s1, s1, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s5, s1 s_cbranch_execz .LBB3_516 ; %bb.511: ; in Loop: Header=BB3_378 Depth=4 s_waitcnt lgkmcnt(0) global_load_b64 v[23:24], v5, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[11:12], v5, s[2:3] offset:40 global_load_b64 v[18:19], v5, s[2:3] s_mov_b32 s6, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v12, v24 v_and_b32_e32 v6, v11, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v11, v6, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v11, v3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v18, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo global_load_b64 v[21:22], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[23:24] s_cbranch_execz .LBB3_515 ; %bb.512: ; %.preheader3.i.i.i89.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s7, 0 .LBB3_513: ; %.preheader3.i.i.i89 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 s_clause 0x1 global_load_b64 v[18:19], v5, s[2:3] offset:40 global_load_b64 v[21:22], v5, s[2:3] v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v3, v18, v23 s_waitcnt vmcnt(0) v_mad_u64_u32 v[11:12], null, v3, 24, v[21:22] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v24 v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4] s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v12, v18 global_load_b64 v[21:22], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_513 ; %bb.514: ; %Flow1229 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s7 .LBB3_515: ; %Flow1231 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB3_516: ; %.loopexit4.i.i.i84 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[18:19], v5, s[2:3] offset:40 global_load_b128 v[22:25], v5, s[2:3] v_readfirstlane_b32 s16, v11 v_readfirstlane_b32 s17, v12 s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v18 v_readfirstlane_b32 s7, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[16:17], s[6:7] s_mul_i32 s20, s7, 24 s_mul_hi_u32 s21, s6, 24 s_mul_i32 s35, s6, 24 s_and_saveexec_b32 s36, s1 s_cbranch_execz .LBB3_518 ; %bb.517: ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5 s_add_i32 s5, s21, s20 s_waitcnt vmcnt(0) v_add_co_u32 v18, vcc_lo, v22, s35 v_add_co_ci_u32_e32 v19, vcc_lo, s5, v23, vcc_lo global_store_b128 v[18:19], v[11:14], off offset:8 .LBB3_518: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s36 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v24, s6 v_add_co_ci_u32_e32 v12, vcc_lo, s7, v25, vcc_lo s_mov_b32 s7, s4 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v6, v3 s_mov_b32 s5, s4 s_mov_b32 s6, s4 v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v27, s7 v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v26, s6 v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v24, s4 v_mov_b32_e32 v25, s5 s_clause 0x3 global_store_b128 v[11:12], v[18:21], off global_store_b128 v[11:12], v[24:27], off offset:16 global_store_b128 v[11:12], v[24:27], off offset:32 global_store_b128 v[11:12], v[24:27], off offset:48 s_and_saveexec_b32 s5, s1 s_cbranch_execz .LBB3_526 ; %bb.519: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x1 global_load_b64 v[82:83], v5, s[2:3] offset:32 glc global_load_b64 v[3:4], v5, s[2:3] offset:40 s_mov_b32 s6, exec_lo v_dual_mov_b32 v80, s16 :: v_dual_mov_b32 v81, s17 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s17, v4 v_and_b32_e32 v3, s16, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v6, v4 v_add_co_u32 v3, vcc_lo, v22, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v23, v4, vcc_lo global_store_b64 v[3:4], v[82:83], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[26:27], v5, v[80:83], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[26:27], v[82:83] s_cbranch_execz .LBB3_522 ; %bb.520: ; %.preheader1.i.i.i87.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s7, 0 .LBB3_521: ; %.preheader1.i.i.i87 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_dual_mov_b32 v24, s16 :: v_dual_mov_b32 v25, s17 s_sleep 1 global_store_b64 v[3:4], v[26:27], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v5, v[24:27], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[26:27] v_dual_mov_b32 v27, v19 :: v_dual_mov_b32 v26, v18 s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_521 .LBB3_522: ; %Flow1227 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s6 global_load_b64 v[18:19], v5, s[2:3] offset:16 s_mov_b32 s7, exec_lo s_mov_b32 s6, exec_lo v_mbcnt_lo_u32_b32 v3, s7, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_524 ; %bb.523: ; in Loop: Header=BB3_378 Depth=4 s_bcnt1_i32_b32 s7, s7 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s7 s_waitcnt vmcnt(0) global_atomic_add_u64 v[18:19], v[4:5], off offset:8 .LBB3_524: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) global_load_b64 v[24:25], v[18:19], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[24:25] s_cbranch_vccnz .LBB3_526 ; %bb.525: ; in Loop: Header=BB3_378 Depth=4 global_load_b32 v4, v[18:19], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s6, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[24:25], v[4:5], off s_and_b32 m0, s6, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_526: ; %Flow1228 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s5 s_add_i32 s21, s21, s20 v_add_co_u32 v3, vcc_lo, v22, s35 v_add_co_ci_u32_e32 v4, vcc_lo, s21, v23, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB3_527: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s5, s1 s_cbranch_execz .LBB3_529 ; %bb.528: ; in Loop: Header=BB3_527 Depth=5 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB3_529: ; in Loop: Header=BB3_527 Depth=5 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s5, v6 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB3_531 ; %bb.530: ; in Loop: Header=BB3_527 Depth=5 s_mov_b32 s5, 0 s_sleep 1 s_branch .LBB3_532 .LBB3_531: ; in Loop: Header=BB3_527 Depth=5 s_mov_b32 s5, -1 .LBB3_532: ; %Flow1222 ; in Loop: Header=BB3_527 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB3_527 ; %bb.533: ; in Loop: Header=BB3_378 Depth=4 global_load_b64 v[3:4], v[11:12], off s_and_saveexec_b32 s5, s1 s_cbranch_execz .LBB3_537 ; %bb.534: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x2 global_load_b64 v[11:12], v5, s[2:3] offset:40 global_load_b64 v[18:19], v5, s[2:3] offset:24 glc global_load_b64 v[23:24], v5, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v6, vcc_lo, v11, 1 v_add_co_ci_u32_e32 v25, vcc_lo, 0, v12, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v21, vcc_lo, v6, s16 v_add_co_ci_u32_e32 v22, vcc_lo, s17, v25, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22] v_dual_cndmask_b32 v22, v22, v25 :: v_dual_cndmask_b32 v21, v21, v6 v_and_b32_e32 v6, v22, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v11, v21, v11 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v11, 24 v_mul_lo_u32 v11, v11, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v11, vcc_lo, v23, v11 v_mov_b32_e32 v23, v18 v_add_co_ci_u32_e32 v12, vcc_lo, v24, v6, vcc_lo v_mov_b32_e32 v24, v19 global_store_b64 v[11:12], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[18:19] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_537 ; %bb.535: ; %.preheader.i.i.i86.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s1, 0 .LBB3_536: ; %.preheader.i.i.i86 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 global_store_b64 v[11:12], v[23:24], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v5, v[21:24], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[23:24] v_dual_mov_b32 v24, v19 :: v_dual_mov_b32 v23, v18 s_or_b32 s1, vcc_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s1 s_cbranch_execnz .LBB3_536 .LBB3_537: ; %Flow1220 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s5 .LBB3_538: ; %Flow1234 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s19 .LBB3_539: ; %__ockl_devmem_request.exit90 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s18 s_waitcnt vmcnt(0) v_readfirstlane_b32 s2, v3 v_readfirstlane_b32 s3, v4 s_cmp_eq_u64 s[2:3], 0 s_cbranch_scc1 .LBB3_584 ; %bb.540: ; in Loop: Header=BB3_378 Depth=4 v_mbcnt_lo_u32_b32 v4, exec_lo, 0 ;;#ASMSTART ;;#ASMEND global_load_b32 v6, v[38:39], off s_bcnt1_i32_b32 s5, exec_lo s_add_u32 s6, s2, 16 s_addc_u32 s7, s3, 0 s_waitcnt vmcnt(0) v_add_nc_u32_e32 v3, 31, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_lshrrev_b32_e32 v3, 5, v3 s_and_saveexec_b32 s1, s0 s_xor_b32 s16, exec_lo, s1 s_cbranch_execz .LBB3_548 ; %bb.541: ; in Loop: Header=BB3_378 Depth=4 global_load_b32 v15, v[54:55], off s_mov_b32 s17, exec_lo v_cmpx_lt_u32_e64 v4, v3 s_cbranch_execz .LBB3_544 ; %bb.542: ; %.preheader182.preheader ; in Loop: Header=BB3_378 Depth=4 v_lshlrev_b64 v[11:12], 2, v[4:5] v_mov_b32_e32 v16, v4 s_lshl_b32 s18, s5, 2 s_mov_b32 s19, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v11, vcc_lo, s6, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo .LBB3_543: ; %.preheader182 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_add_nc_u32_e32 v16, s5, v16 global_store_b32 v[11:12], v5, off v_add_co_u32 v11, s1, v11, s18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_add_co_ci_u32_e64 v12, s1, 0, v12, s1 v_cmp_ge_u32_e32 vcc_lo, v16, v3 s_or_b32 s19, vcc_lo, s19 s_and_not1_b32 exec_lo, exec_lo, s19 s_cbranch_execnz .LBB3_543 .LBB3_544: ; %Flow1209 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s17 global_load_b32 v16, v[64:65], off s_mov_b32 s1, exec_lo s_waitcnt vmcnt(0) v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17] s_delay_alu instid0(VALU_DEP_1) v_cmpx_lt_u32_e64 v11, v6 s_cbranch_execz .LBB3_547 ; %bb.545: ; %.preheader180.preheader ; in Loop: Header=BB3_378 Depth=4 v_mul_lo_u32 v12, v15, s5 s_mov_b32 s17, 0 .LBB3_546: ; %.preheader180 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_lshlrev_b32_e64 v15, v11, 1 v_lshrrev_b32_e32 v16, 3, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v11, v11, v12 v_and_b32_e32 v16, 0x1ffffffc, v16 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_cmp_ge_u32_e32 vcc_lo, v11, v6 global_store_b32 v16, v15, s[6:7] s_or_b32 s17, vcc_lo, s17 s_and_not1_b32 exec_lo, exec_lo, s17 s_cbranch_execnz .LBB3_546 .LBB3_547: ; %Flow1206 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s1 .LBB3_548: ; %Flow1214 ; in Loop: Header=BB3_378 Depth=4 s_and_not1_saveexec_b32 s16, s16 s_cbranch_execz .LBB3_553 ; %bb.549: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s17, exec_lo v_cmpx_lt_u32_e64 v4, v3 s_cbranch_execz .LBB3_552 ; %bb.550: ; %.preheader178.preheader ; in Loop: Header=BB3_378 Depth=4 global_load_b32 v15, v[66:67], off v_lshlrev_b64 v[11:12], 2, v[4:5] v_mov_b32_e32 v16, v4 s_lshl_b32 s18, s5, 2 s_mov_b32 s19, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v11, vcc_lo, s6, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo .LBB3_551: ; %.preheader178 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_add_nc_u32_e32 v16, s5, v16 s_waitcnt vmcnt(0) global_store_b32 v[11:12], v15, off v_add_co_u32 v11, s1, v11, s18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_add_co_ci_u32_e64 v12, s1, 0, v12, s1 v_cmp_ge_u32_e32 vcc_lo, v16, v3 s_or_b32 s19, vcc_lo, s19 s_and_not1_b32 exec_lo, exec_lo, s19 s_cbranch_execnz .LBB3_551 .LBB3_552: ; %Flow1212 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s17 .LBB3_553: ; %.loopexit179 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s16 s_mov_b32 s1, exec_lo v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB3_557 ; %bb.554: ; in Loop: Header=BB3_378 Depth=4 v_and_b32_e32 v6, 31, v6 s_mov_b32 s5, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_ne_u32_e32 0, v6 s_cbranch_execz .LBB3_556 ; %bb.555: ; in Loop: Header=BB3_378 Depth=4 v_add_nc_u32_e32 v4, -1, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[3:4], 2, v[4:5] v_add_co_u32 v3, vcc_lo, s6, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo global_load_b32 v11, v[3:4], off s_waitcnt vmcnt(0) v_lshl_or_b32 v6, -1, v6, v11 global_store_b32 v[3:4], v6, off .LBB3_556: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s5 global_store_b128 v5, v[7:10], s[2:3] .LBB3_557: ; %Flow1203 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s1 ; implicit-def: $sgpr5 .LBB3_558: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 ;;#ASMSTART ;;#ASMEND v_cmp_eq_u32_e64 s1, 0, v71 v_mov_b32_e32 v3, s31 s_delay_alu instid0(VALU_DEP_2) s_and_saveexec_b32 s6, s1 s_cbranch_execz .LBB3_560 ; %bb.559: ; in Loop: Header=BB3_558 Depth=5 global_load_b32 v3, v[32:33], off glc .LBB3_560: ; in Loop: Header=BB3_558 Depth=5 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) v_readfirstlane_b32 s31, v3 s_and_not1_b32 s5, s5, exec_lo s_and_b32 s6, s1, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 s5, s5, s6 s_cmp_eq_u32 s31, 0x10100 s_cbranch_scc1 .LBB3_567 ; %bb.561: ; in Loop: Header=BB3_558 Depth=5 v_mov_b32_e32 v3, s34 s_and_saveexec_b32 s6, s1 s_cbranch_execz .LBB3_563 ; %bb.562: ; in Loop: Header=BB3_558 Depth=5 global_load_b32 v3, v[48:49], off glc .LBB3_563: ; in Loop: Header=BB3_558 Depth=5 s_or_b32 exec_lo, exec_lo, s6 s_waitcnt vmcnt(0) v_readfirstlane_b32 s34, v3 s_delay_alu instid0(VALU_DEP_1) s_cmp_lg_u32 s31, s34 s_cbranch_scc0 .LBB3_568 ; %bb.564: ; in Loop: Header=BB3_558 Depth=5 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s6, s1 s_cbranch_execz .LBB3_575 ; %bb.565: ; in Loop: Header=BB3_558 Depth=5 s_cmpk_lt_u32 s31, 0x100 s_cbranch_scc0 .LBB3_569 ; %bb.566: ; in Loop: Header=BB3_558 Depth=5 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 s_mov_b32 s7, 0 v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17] s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, s31, 24, v[3:4] s_branch .LBB3_570 .LBB3_567: ; in Loop: Header=BB3_558 Depth=5 s_mov_b64 s[16:17], 0 s_mov_b32 s1, -1 s_mov_b32 s18, 0 s_mov_b32 s19, -1 ; implicit-def: $sgpr31 ; implicit-def: $sgpr34 ; implicit-def: $sgpr6_sgpr7 s_branch .LBB3_580 .LBB3_568: ; in Loop: Header=BB3_558 Depth=5 s_mov_b32 s18, -1 s_mov_b32 s19, -1 ; implicit-def: $sgpr31 ; implicit-def: $sgpr34 ; implicit-def: $sgpr6_sgpr7 s_branch .LBB3_579 .LBB3_569: ; in Loop: Header=BB3_558 Depth=5 s_mov_b32 s7, -1 ; implicit-def: $vgpr11_vgpr12 .LBB3_570: ; %Flow1195 ; in Loop: Header=BB3_558 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s7 s_cbranch_vccnz .LBB3_572 ; %bb.571: ; in Loop: Header=BB3_558 Depth=5 s_add_i32 s7, s31, 0xffffff00 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_lshr_b32 s7, s7, 8 s_add_u32 s16, s10, 0x2800 s_addc_u32 s17, s11, 0 v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17] s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4] s_and_b32 s7, s31, 0xff global_load_b64 v[3:4], v[11:12], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4] .LBB3_572: ; in Loop: Header=BB3_558 Depth=5 v_dual_mov_b32 v15, s31 :: v_dual_mov_b32 v4, s3 v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v6, v5 global_store_b32 v5, v15, s[2:3] offset:4 global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s7, vcc_lo s_cbranch_execz .LBB3_574 ; %bb.573: ; in Loop: Header=BB3_558 Depth=5 s_waitcnt_vscnt null, 0x0 global_atomic_add_u32 v[32:33], v118, off v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12 .LBB3_574: ; %Flow1193 ; in Loop: Header=BB3_558 Depth=5 s_or_b32 exec_lo, exec_lo, s7 .LBB3_575: ; %Flow1196 ; in Loop: Header=BB3_558 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s6 v_readfirstlane_b32 s6, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s7, v4 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc0 .LBB3_577 ; %bb.576: ; in Loop: Header=BB3_558 Depth=5 s_mov_b32 s19, -1 ; implicit-def: $sgpr31 ; implicit-def: $sgpr34 s_branch .LBB3_578 .LBB3_577: ; in Loop: Header=BB3_558 Depth=5 s_mov_b32 s19, 0 s_and_not1_b32 s1, s1, exec_lo s_sleep 2 .LBB3_578: ; %Flow1201 ; in Loop: Header=BB3_558 Depth=5 s_mov_b32 s18, 0 .LBB3_579: ; %Flow1200 ; in Loop: Header=BB3_558 Depth=5 s_and_not1_b32 s5, s5, exec_lo s_and_b32 s16, s1, exec_lo s_mov_b32 s1, 0 s_or_b32 s5, s5, s16 ; implicit-def: $sgpr16_sgpr17 .LBB3_580: ; %Flow1199 ; in Loop: Header=BB3_558 Depth=5 s_and_b32 vcc_lo, exec_lo, s19 s_cbranch_vccz .LBB3_558 ; %bb.581: ; %loop.exit.guard930 ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v15, s16 :: v_dual_mov_b32 v16, s17 s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB3_501 ; %bb.582: ; %loop.exit.guard931 ; in Loop: Header=BB3_378 Depth=4 s_xor_b32 s1, s18, -1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB3_585 ; %bb.583: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s18, 0 s_branch .LBB3_586 .LBB3_584: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s18, 0 s_branch .LBB3_501 .LBB3_585: ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s18, -1 ; implicit-def: $sgpr6_sgpr7 .LBB3_586: ; %Flow1190 ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6 s_and_not1_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB3_501 ; %bb.587: ; in Loop: Header=BB3_378 Depth=4 s_and_saveexec_b32 s20, s5 s_cbranch_execz .LBB3_616 ; %bb.588: ; in Loop: Header=BB3_378 Depth=4 s_load_b64 s[16:17], s[8:9], 0x50 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s1, v4 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s1, s1, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s5, s1 s_cbranch_execz .LBB3_594 ; %bb.589: ; in Loop: Header=BB3_378 Depth=4 s_waitcnt lgkmcnt(0) global_load_b64 v[23:24], v5, s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[11:12], v5, s[16:17] offset:40 global_load_b64 v[15:16], v5, s[16:17] s_mov_b32 s6, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v3, v12, v24 v_and_b32_e32 v6, v11, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v11, v6, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v11, v3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v15, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo global_load_b64 v[21:22], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[23:24] s_cbranch_execz .LBB3_593 ; %bb.590: ; %.preheader3.i.i.i96.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s7, 0 .LBB3_591: ; %.preheader3.i.i.i96 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b64 v[18:19], v5, s[16:17] v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v15, v23 v_and_b32_e32 v6, v16, v24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19] v_mov_b32_e32 v3, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4] v_mov_b32_e32 v12, v15 global_load_b64 v[21:22], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB3_591 ; %bb.592: ; %Flow1186 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s7 .LBB3_593: ; %Flow1188 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB3_594: ; %.loopexit4.i.i.i91 ; in Loop: Header=BB3_378 Depth=4 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[15:16], v5, s[16:17] offset:40 global_load_b128 v[21:24], v5, s[16:17] v_readfirstlane_b32 s18, v11 v_readfirstlane_b32 s19, v12 s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v15 v_readfirstlane_b32 s7, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[18:19], s[6:7] s_mul_i32 s21, s7, 24 s_mul_hi_u32 s31, s6, 24 s_mul_i32 s34, s6, 24 s_and_saveexec_b32 s35, s1 s_cbranch_execz .LBB3_596 ; %bb.595: ; in Loop: Header=BB3_378 Depth=4 v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5 s_add_i32 s5, s31, s21 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v21, s34 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo global_store_b128 v[15:16], v[11:14], off offset:8 .LBB3_596: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s35 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v23, s6 v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo s_mov_b32 s7, s4 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v6, v3 s_mov_b32 s5, s4 s_mov_b32 s6, s4 v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2 v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6 v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4 v_mov_b32_e32 v6, v5 s_clause 0x4 global_store_b64 v[3:4], v[11:12], off global_store_b128 v[3:4], v[23:26], off offset:8 global_store_b128 v[3:4], v[23:26], off offset:24 global_store_b128 v[3:4], v[23:26], off offset:40 global_store_b64 v[3:4], v[5:6], off offset:56 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB3_604 ; %bb.597: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x1 global_load_b64 v[82:83], v5, s[16:17] offset:32 glc global_load_b64 v[3:4], v5, s[16:17] offset:40 s_mov_b32 s3, exec_lo v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s19, v4 v_and_b32_e32 v3, s18, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v6, v4 v_add_co_u32 v3, vcc_lo, v21, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo global_store_b64 v[3:4], v[82:83], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[25:26], v[82:83] s_cbranch_execz .LBB3_600 ; %bb.598: ; %.preheader1.i.i.i94.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s5, 0 .LBB3_599: ; %.preheader1.i.i.i94 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19 s_sleep 1 global_store_b64 v[3:4], v[25:26], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26] v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11 s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB3_599 .LBB3_600: ; %Flow1184 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s3 global_load_b64 v[11:12], v5, s[16:17] offset:16 s_mov_b32 s5, exec_lo s_mov_b32 s3, exec_lo v_mbcnt_lo_u32_b32 v3, s5, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_602 ; %bb.601: ; in Loop: Header=BB3_378 Depth=4 s_bcnt1_i32_b32 s5, s5 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s5 s_waitcnt vmcnt(0) global_atomic_add_u64 v[11:12], v[4:5], off offset:8 .LBB3_602: ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s3 s_waitcnt vmcnt(0) global_load_b64 v[15:16], v[11:12], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16] s_cbranch_vccnz .LBB3_604 ; %bb.603: ; in Loop: Header=BB3_378 Depth=4 global_load_b32 v4, v[11:12], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s3, v4 s_waitcnt_vscnt null, 0x0 global_store_b64 v[15:16], v[4:5], off s_and_b32 m0, s3, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_604: ; %Flow1185 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s2 s_add_i32 s31, s31, s21 v_add_co_u32 v3, vcc_lo, v21, s34 v_add_co_ci_u32_e32 v4, vcc_lo, s31, v22, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB3_605: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB3_607 ; %bb.606: ; in Loop: Header=BB3_605 Depth=5 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB3_607: ; in Loop: Header=BB3_605 Depth=5 s_or_b32 exec_lo, exec_lo, s2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s2, v6 s_cmp_eq_u32 s2, 0 s_cbranch_scc1 .LBB3_609 ; %bb.608: ; in Loop: Header=BB3_605 Depth=5 s_mov_b32 s2, 0 s_sleep 1 s_branch .LBB3_610 .LBB3_609: ; in Loop: Header=BB3_605 Depth=5 s_mov_b32 s2, -1 .LBB3_610: ; %Flow1179 ; in Loop: Header=BB3_605 Depth=5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s2 s_cbranch_vccnz .LBB3_605 ; %bb.611: ; in Loop: Header=BB3_378 Depth=4 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB3_615 ; %bb.612: ; in Loop: Header=BB3_378 Depth=4 s_clause 0x2 global_load_b64 v[3:4], v5, s[16:17] offset:40 global_load_b64 v[11:12], v5, s[16:17] offset:24 glc global_load_b64 v[15:16], v5, s[16:17] s_waitcnt vmcnt(2) v_add_co_u32 v6, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v23, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v18, vcc_lo, v6, s18 v_add_co_ci_u32_e32 v19, vcc_lo, s19, v21, vcc_lo v_mov_b32_e32 v24, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19] v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6 v_and_b32_e32 v4, v22, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v21, v3 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v6, v3, 24 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v4, v6, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v15, v3 v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo global_store_b64 v[3:4], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_615 ; %bb.613: ; %.preheader.i.i.i93.preheader ; in Loop: Header=BB3_378 Depth=4 s_mov_b32 s1, 0 .LBB3_614: ; %.preheader.i.i.i93 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; Parent Loop BB3_378 Depth=4 ; => This Inner Loop Header: Depth=5 s_sleep 1 global_store_b64 v[3:4], v[23:24], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24] v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11 s_or_b32 s1, vcc_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s1 s_cbranch_execnz .LBB3_614 .LBB3_615: ; %Flow1177 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s2 v_mov_b32_e32 v71, 0 .LBB3_616: ; %Flow1189 ; in Loop: Header=BB3_378 Depth=4 s_or_b32 exec_lo, exec_lo, s20 v_dual_mov_b32 v15, v30 :: v_dual_mov_b32 v16, v31 s_mov_b32 s18, -1 s_branch .LBB3_501 .LBB3_617: ; in Loop: Header=BB3_347 Depth=3 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $sgpr29 ; implicit-def: $vgpr70 s_branch .LBB3_641 .LBB3_618: ; in Loop: Header=BB3_347 Depth=3 v_cmp_ne_u64_e64 s5, 1, v[30:31] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s5 s_cbranch_vccz .LBB3_620 ; %bb.619: ; in Loop: Header=BB3_347 Depth=3 v_dual_mov_b32 v28, v30 :: v_dual_mov_b32 v29, v31 s_branch .LBB3_640 .LBB3_620: ; in Loop: Header=BB3_347 Depth=3 v_mbcnt_lo_u32_b32 v3, exec_lo, 0 s_mov_b32 s1, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB3_637 ; %bb.621: ; in Loop: Header=BB3_347 Depth=3 global_load_b64 v[3:4], v[52:53], off glc s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt vmcnt(0) lgkmcnt(0) v_sub_co_u32 v3, vcc_lo, s2, v3 v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_637 ; %bb.622: ; in Loop: Header=BB3_347 Depth=3 v_sub_nc_u32_e32 v3, 0x4e20, v3 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) v_readfirstlane_b32 s2, v3 s_delay_alu instid0(VALU_DEP_1) s_ashr_i32 s3, s2, 31 s_waitcnt lgkmcnt(0) s_add_u32 s2, s6, s2 s_addc_u32 s3, s7, s3 .LBB3_623: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Inner Loop Header: Depth=4 s_waitcnt lgkmcnt(0) s_add_u32 s16, s6, 0x659 s_addc_u32 s17, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s16, s[2:3], s[16:17] s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccnz .LBB3_626 ; %bb.624: ; %.preheader11.i110 ; in Loop: Header=BB3_623 Depth=4 s_sleep 0x7f s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_branch .LBB3_623 .LBB3_625: ; %.preheader9.i109 ; in Loop: Header=BB3_626 Depth=4 s_sleep 63 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_626: ; %Flow1171 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Inner Loop Header: Depth=4 s_waitcnt lgkmcnt(0) s_add_u32 s16, s6, 0x326 s_addc_u32 s17, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s16, s[2:3], s[16:17] s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccz .LBB3_625 ; %bb.627: ; %Flow1168 ; in Loop: Header=BB3_347 Depth=3 s_add_u32 s16, s6, 0x18c s_addc_u32 s17, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s16, s[2:3], s[16:17] s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccnz .LBB3_630 .LBB3_628: ; %.preheader7.i108 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Inner Loop Header: Depth=4 s_sleep 31 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt lgkmcnt(0) s_add_u32 s16, s6, 0x18c s_addc_u32 s17, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u64_e64 s16, s[2:3], s[16:17] s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccnz .LBB3_628 s_branch .LBB3_630 .LBB3_629: ; %.preheader5.i107 ; in Loop: Header=BB3_630 Depth=4 s_sleep 15 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_630: ; %.loopexit8.i100 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Inner Loop Header: Depth=4 s_waitcnt lgkmcnt(0) s_add_u32 s16, s6, 0xc0 s_addc_u32 s17, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s16, s[2:3], s[16:17] s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccz .LBB3_629 s_branch .LBB3_632 .LBB3_631: ; %.preheader3.i106 ; in Loop: Header=BB3_632 Depth=4 s_sleep 7 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_632: ; %Flow1162 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Inner Loop Header: Depth=4 s_waitcnt lgkmcnt(0) s_add_u32 s16, s6, 0x59 s_addc_u32 s17, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s16, s[2:3], s[16:17] s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccz .LBB3_631 s_branch .LBB3_634 .LBB3_633: ; %.preheader1.i105 ; in Loop: Header=BB3_634 Depth=4 s_sleep 3 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) .LBB3_634: ; %Flow1159 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Inner Loop Header: Depth=4 s_waitcnt lgkmcnt(0) s_add_u32 s16, s6, 38 s_addc_u32 s17, s7, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_le_u64_e64 s16, s[2:3], s[16:17] s_and_b32 vcc_lo, exec_lo, s16 s_cbranch_vccz .LBB3_633 ; %bb.635: ; %Flow1156 ; in Loop: Header=BB3_347 Depth=3 v_cmp_le_u64_e64 s6, s[2:3], s[6:7] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_637 .LBB3_636: ; %.preheader.i104 ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; Parent Loop BB3_347 Depth=3 ; => This Inner Loop Header: Depth=4 s_sleep 1 s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME) s_waitcnt lgkmcnt(0) v_cmp_gt_u64_e64 s6, s[2:3], s[6:7] s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_636 .LBB3_637: ; %__ockl_rtcwait_u32.exit111 ; in Loop: Header=BB3_347 Depth=3 s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v3, s29 s_mov_b32 s1, exec_lo v_cmpx_eq_u32_e32 0, v70 s_cbranch_execz .LBB3_639 ; %bb.638: ; in Loop: Header=BB3_347 Depth=3 global_load_b32 v3, v[32:33], off glc .LBB3_639: ; in Loop: Header=BB3_347 Depth=3 s_or_b32 exec_lo, exec_lo, s1 s_waitcnt vmcnt(0) v_readfirstlane_b32 s29, v3 .LBB3_640: ; %Flow1173 ; in Loop: Header=BB3_347 Depth=3 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29 .LBB3_641: ; %Flow1318 ; in Loop: Header=BB3_347 Depth=3 s_and_b32 vcc_lo, exec_lo, s5 s_cbranch_vccz .LBB3_347 .LBB3_642: ; %.loopexit189 ; in Loop: Header=BB3_6 Depth=2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s6, v11 v_readfirstlane_b32 s7, v12 v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0 s_delay_alu instid0(VALU_DEP_2) s_cmp_eq_u64 s[6:7], 0 s_cbranch_scc1 .LBB3_663 ; %bb.643: ; in Loop: Header=BB3_6 Depth=2 s_mov_b32 s5, exec_lo s_delay_alu instid0(SALU_CYCLE_1) v_mbcnt_lo_u32_b32 v3, s5, 0 ;;#ASMSTART ;;#ASMEND global_load_b64 v[0:1], v5, s[6:7] offset:8 glc v_cmp_eq_u32_e32 vcc_lo, 0, v3 s_waitcnt vmcnt(0) global_load_b32 v4, v[0:1], off s_waitcnt vmcnt(0) v_readfirstlane_b32 s2, v4 v_mov_b32_e32 v4, 0 s_and_saveexec_b32 s3, vcc_lo s_cbranch_execz .LBB3_647 ; %bb.644: ; in Loop: Header=BB3_6 Depth=2 s_mov_b32 s17, exec_lo s_bcnt1_i32_b32 s5, s5 v_mbcnt_lo_u32_b32 v4, s17, 0 s_mov_b32 s16, exec_lo ; implicit-def: $vgpr6 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB3_646 ; %bb.645: ; in Loop: Header=BB3_6 Depth=2 s_bcnt1_i32_b32 s1, s17 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_i32 s1, s5, s1 v_mov_b32_e32 v6, s1 global_atomic_add_u32 v6, v[0:1], v6, off offset:8 glc .LBB3_646: ; in Loop: Header=BB3_6 Depth=2 s_or_b32 exec_lo, exec_lo, s16 s_waitcnt vmcnt(0) v_readfirstlane_b32 s1, v6 s_delay_alu instid0(VALU_DEP_1) v_mad_u32_u24 v4, s5, v4, s1 .LBB3_647: ; %Flow944 ; in Loop: Header=BB3_6 Depth=2 s_or_b32 exec_lo, exec_lo, s3 s_mov_b32 s3, s4 s_getpc_b64 s[18:19] s_add_u32 s18, s18, __unnamed_1@rel32@lo+4 s_addc_u32 s19, s19, __unnamed_1@rel32@hi+12 s_lshl_b64 s[16:17], s[2:3], 5 v_mov_b32_e32 v11, 0 s_add_u32 s18, s16, s18 s_addc_u32 s19, s17, s19 v_readfirstlane_b32 s1, v4 s_load_b32 s5, s[18:19], 0x0 v_mov_b32_e32 v12, 0 s_waitcnt lgkmcnt(0) s_add_i32 s3, s5, 31 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lt_u32 s3, 32 s_cbranch_scc1 .LBB3_657 ; %bb.648: ; in Loop: Header=BB3_6 Depth=2 v_cvt_f32_u32_e32 v4, s5 s_getpc_b64 s[18:19] s_add_u32 s18, s18, __unnamed_1@rel32@lo+32 s_addc_u32 s19, s19, __unnamed_1@rel32@hi+40 s_lshr_b32 s3, s3, 5 s_add_u32 s18, s16, s18 s_addc_u32 s19, s17, s19 v_rcp_iflag_f32_e32 v4, v4 s_load_b32 s18, s[18:19], 0x0 s_sub_i32 s19, 0, s5 s_waitcnt_depctr 0xfff v_dual_mul_f32 v4, 0x4f7ffffe, v4 :: v_dual_add_nc_u32 v3, s1, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cvt_u32_f32_e32 v4, v4 v_mul_lo_u32 v6, s19, v4 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_3) v_mul_lo_u32 v3, s18, v3 s_getpc_b64 s[18:19] s_add_u32 s18, s18, __unnamed_1@rel32@lo+16 s_addc_u32 s19, s19, __unnamed_1@rel32@hi+24 s_add_u32 s16, s16, s18 s_addc_u32 s17, s17, s19 s_lshr_b32 s18, s2, 1 s_add_i32 s19, s3, -1 s_add_i32 s18, s18, 4 v_mul_hi_u32 v6, v4, v6 s_lshl_b32 s18, 1, s18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v4, v6 v_cvt_f32_u32_e32 v6, s3 v_mul_hi_u32 v4, v3, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v6, v6 v_mul_lo_u32 v4, v4, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_sub_nc_u32_e32 v3, v3, v4 s_waitcnt_depctr 0xfff v_mul_f32_e32 v4, 0x4f7ffffe, v6 v_subrev_nc_u32_e32 v6, s5, v3 v_cmp_le_u32_e64 s1, s5, v3 v_cvt_u32_f32_e32 v15, v4 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v4, v3, v6, s1 s_sub_i32 s1, 0, s3 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) v_mul_lo_u32 v11, s1, v15 v_add_co_u32 v3, s1, v0, 16 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_add_co_ci_u32_e64 v6, s1, 0, v1, s1 v_subrev_nc_u32_e32 v12, s5, v4 v_cmp_le_u32_e64 s1, s5, v4 s_mov_b32 s5, 0 v_mul_hi_u32 v16, v15, v11 v_cndmask_b32_e64 v4, v4, v12, s1 v_mov_b32_e32 v11, 0 s_bfe_i32 s1, s2, 0x10000 s_lshr_b32 s2, s18, 1 v_mov_b32_e32 v12, 0 v_lshrrev_b32_e32 v4, 5, v4 v_add_nc_u32_e32 v18, v15, v16 s_and_b32 s1, s1, s2 s_delay_alu instid0(SALU_CYCLE_1) s_add_i32 s18, s1, s18 .LBB3_649: ; Parent Loop BB3_3 Depth=1 ; Parent Loop BB3_6 Depth=2 ; => This Inner Loop Header: Depth=3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_lshlrev_b64 v[15:16], 2, v[4:5] s_mov_b32 s2, -1 s_mov_b32 s20, exec_lo ; implicit-def: $vgpr19 v_add_co_u32 v15, s1, v3, v15 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v16, s1, v6, v16, s1 global_load_b32 v21, v[15:16], off glc s_waitcnt vmcnt(0) v_cmpx_ne_u32_e32 -1, v21 s_cbranch_execz .LBB3_653 ; %bb.650: ; in Loop: Header=BB3_649 Depth=3 v_not_b32_e32 v19, v21 s_mov_b32 s21, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ctz_i32_b32_e32 v19, v19 v_min_u32_e32 v21, 32, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_lshlrev_b32_e64 v19, v21, 1 global_atomic_or_b32 v15, v[15:16], v19, off glc s_waitcnt vmcnt(0) v_and_b32_e32 v15, v15, v19 v_mov_b32_e32 v19, 0 v_cmp_ne_u32_e64 s1, 0, v15 v_cmpx_eq_u32_e32 0, v15 s_cbranch_execz .LBB3_652 ; %bb.651: ; in Loop: Header=BB3_649 Depth=3 s_load_b32 s2, s[16:17], 0x0 v_lshl_add_u32 v11, v4, 5, v21 v_mov_b32_e32 v19, 2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mul_lo_u32 v11, v11, s18 s_waitcnt lgkmcnt(0) v_add_co_u32 v12, s2, v0, s2 v_add_co_ci_u32_e64 v15, s2, 0, v1, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v11, s2, v12, v11 v_add_co_ci_u32_e64 v12, s2, 0, v15, s2 .LBB3_652: ; in Loop: Header=BB3_649 Depth=3 s_or_b32 exec_lo, exec_lo, s21 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) s_or_not1_b32 s2, s1, exec_lo .LBB3_653: ; %Flow941 ; in Loop: Header=BB3_649 Depth=3 s_or_b32 exec_lo, exec_lo, s20 s_and_saveexec_b32 s20, s2 ; %bb.654: ; in Loop: Header=BB3_649 Depth=3 v_dual_mov_b32 v19, 0 :: v_dual_add_nc_u32 v4, 1, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v15, v4, v18 v_mul_lo_u32 v15, v15, s3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v4, v4, v15 v_subrev_nc_u32_e32 v15, s3, v4 v_cmp_le_u32_e64 s1, s3, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v4, v4, v15, s1 v_subrev_nc_u32_e32 v15, s3, v4 v_cmp_le_u32_e64 s1, s3, v4 s_delay_alu instid0(VALU_DEP_1) v_cndmask_b32_e64 v4, v4, v15, s1 ; %bb.655: ; in Loop: Header=BB3_649 Depth=3 s_or_b32 exec_lo, exec_lo, s20 v_cmp_ne_u32_e64 s1, 0, v19 s_cmp_eq_u32 s19, 0 s_cselect_b32 s2, -1, 0 s_add_i32 s19, s19, -1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_or_b32 s1, s1, s2 s_and_b32 s1, exec_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_or_b32 s5, s1, s5 s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB3_649 ; %bb.656: ; %Flow942 ; in Loop: Header=BB3_6 Depth=2 s_or_b32 exec_lo, exec_lo, s5 .LBB3_657: ; %.loopexit193 ; in Loop: Header=BB3_6 Depth=2 v_cmp_ne_u64_e64 s1, 0, v[11:12] s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB3_660 ; %bb.658: ; in Loop: Header=BB3_6 Depth=2 s_mov_b32 s3, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mbcnt_lo_u32_b32 v0, s3, 0 v_cmp_eq_u32_e32 vcc_lo, 0, v0 s_and_b32 s5, exec_lo, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 exec_lo, s5 s_cbranch_execz .LBB3_660 ; %bb.659: ; in Loop: Header=BB3_6 Depth=2 s_bcnt1_i32_b32 s1, s1 s_bcnt1_i32_b32 s3, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_i32 s1, s1, s3 v_mov_b32_e32 v0, s1 global_atomic_add_u32 v5, v0, s[6:7] offset:16 .LBB3_660: ; in Loop: Header=BB3_6 Depth=2 s_or_b32 exec_lo, exec_lo, s2 v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 s_mov_b32 s1, exec_lo v_cmpx_ne_u64_e32 0, v[11:12] ; %bb.661: ; in Loop: Header=BB3_6 Depth=2 v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v119, 0 v_dual_mov_b32 v128, 0 :: v_dual_mov_b32 v1, v12 ; %bb.662: ; %Flow ; in Loop: Header=BB3_6 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v3, v128 :: v_dual_mov_b32 v4, v119 .LBB3_663: ; %Flow945 ; in Loop: Header=BB3_6 Depth=2 s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v119, v4 .LBB3_664: ; %Flow1324 ; in Loop: Header=BB3_6 Depth=2 s_or_b32 exec_lo, exec_lo, s28 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mov_b32_e32 v4, v3 ;;#ASMSTART ;;#ASMEND v_cmp_ne_u32_e32 vcc_lo, 0, v4 s_cbranch_vccnz .LBB3_6 .LBB3_665: ; %Flow1326 ; in Loop: Header=BB3_3 Depth=1 s_or_b32 exec_lo, exec_lo, s27 v_mov_b32_e32 v3, v119 .LBB3_666: ; %.loopexit197 ; in Loop: Header=BB3_3 Depth=1 s_or_b32 exec_lo, exec_lo, s26 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mov_b32_e32 v4, v3 ;;#ASMSTART ;;#ASMEND v_cmp_ne_u32_e32 vcc_lo, 0, v4 s_cbranch_vccnz .LBB3_3 ; %bb.667: ; %Flow1328 ; implicit-def: $vgpr4_vgpr5 .LBB3_668: ; %Flow1347 s_and_not1_saveexec_b32 s1, s23 s_cbranch_execz .LBB3_701 ; %bb.669: s_load_b64 s[2:3], s[8:9], 0x50 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v2 v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v2 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB3_675 ; %bb.670: v_mov_b32_e32 v3, 0 s_mov_b32 s5, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[8:9], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[6:7], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v0, v0, v8 v_and_b32_e32 v1, v1, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v0, 24 v_mul_lo_u32 v1, v1, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v10, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo global_load_b64 v[6:7], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[8:9] s_cbranch_execz .LBB3_674 ; %bb.671: ; %.preheader3.i.i.i.preheader s_mov_b32 s6, 0 .LBB3_672: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v6, v6, v8 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v6, 24, v[10:11] v_and_b32_e32 v10, v7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v10, 24, v[1:2] v_mov_b32_e32 v1, v6 global_load_b64 v[6:7], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB3_672 ; %bb.673: ; %Flow1343 s_or_b32 exec_lo, exec_lo, s6 .LBB3_674: ; %Flow1345 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB3_675: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s13, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[6:9], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s10, s7, 24 s_mul_hi_u32 s11, s6, 24 s_mul_i32 s12, s6, 24 s_and_saveexec_b32 s14, s0 s_cbranch_execz .LBB3_677 ; %bb.676: v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, v3 s_add_i32 s13, s11, s10 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s12 v_add_co_ci_u32_e32 v1, vcc_lo, s13, v7, vcc_lo v_dual_mov_b32 v12, 3 :: v_dual_mov_b32 v13, 1 global_store_b128 v[0:1], v[10:13], off offset:8 .LBB3_677: s_or_b32 exec_lo, exec_lo, s14 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v8, s6 v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v2, v0 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_add_co_ci_u32_e32 v9, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v2, v3 v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v13, s19 v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18 s_clause 0x3 global_store_b128 v[8:9], v[2:5], off global_store_b128 v[8:9], v[10:13], off offset:16 global_store_b128 v[8:9], v[10:13], off offset:32 global_store_b128 v[8:9], v[10:13], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB3_685 ; %bb.678: v_mov_b32_e32 v10, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5 s_waitcnt vmcnt(0) v_and_b32_e32 v1, s5, v1 v_and_b32_e32 v0, s4, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v2, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v2, v1 v_add_co_u32 v4, vcc_lo, v6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v7, v1, vcc_lo global_store_b64 v[4:5], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB3_681 ; %bb.679: ; %.preheader1.i.i.i.preheader s_mov_b32 s13, 0 .LBB3_680: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s13, vcc_lo, s13 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB3_680 .LBB3_681: ; %Flow1341 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s13, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s13, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB3_683 ; %bb.682: s_bcnt1_i32_b32 s13, s13 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s13 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB3_683: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB3_685 ; %bb.684: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB3_685: ; %Flow1342 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s11, s11, s10 v_add_co_u32 v0, vcc_lo, v6, s12 v_add_co_ci_u32_e32 v1, vcc_lo, s11, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB3_686: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB3_688 ; %bb.687: ; in Loop: Header=BB3_686 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB3_688: ; in Loop: Header=BB3_686 Depth=1 s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s6, v2 s_cmp_eq_u32 s6, 0 s_cbranch_scc1 .LBB3_690 ; %bb.689: ; in Loop: Header=BB3_686 Depth=1 s_mov_b32 s6, 0 s_sleep 1 s_branch .LBB3_691 .LBB3_690: ; in Loop: Header=BB3_686 Depth=1 s_mov_b32 s6, -1 .LBB3_691: ; %Flow1336 ; in Loop: Header=BB3_686 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB3_686 ; %bb.692: global_load_b64 v[0:1], v[8:9], off s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB3_696 ; %bb.693: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_696 ; %bb.694: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB3_695: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB3_695 .LBB3_696: ; %__ockl_devmem_request.exit s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo s_waitcnt vmcnt(0) v_cmpx_ne_u64_e32 0, v[0:1] s_cbranch_execz .LBB3_700 ; %bb.697: s_mov_b32 s2, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mbcnt_lo_u32_b32 v2, s2, 0 v_cmp_eq_u32_e32 vcc_lo, 0, v2 s_and_b32 s3, exec_lo, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 exec_lo, s3 s_cbranch_execz .LBB3_700 ; %bb.698: s_mov_b32 s3, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mbcnt_lo_u32_b32 v2, s3, 0 v_cmp_eq_u32_e32 vcc_lo, 0, v2 s_and_b32 s4, exec_lo, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 exec_lo, s4 s_cbranch_execz .LBB3_700 ; %bb.699: s_load_b64 s[4:5], s[8:9], 0x60 s_bcnt1_i32_b32 s2, s2 s_bcnt1_i32_b32 s3, s3 v_mov_b32_e32 v4, 0x1a000 s_mul_i32 s2, s2, s3 s_delay_alu instid0(SALU_CYCLE_1) v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, s2 s_waitcnt lgkmcnt(0) global_atomic_add_u64 v4, v[2:3], s[4:5] offset:2184 .LBB3_700: s_or_b32 exec_lo, exec_lo, s0 .LBB3_701: ; %Flow1348 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 .LBB3_702: ; %.loopexit198 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s22 v_readlane_b32 s30, v40, 11 v_readlane_b32 s31, v40, 12 v_readlane_b32 s44, v40, 10 v_readlane_b32 s43, v40, 9 v_readlane_b32 s42, v40, 8 v_readlane_b32 s41, v40, 7 v_readlane_b32 s40, v40, 6 v_readlane_b32 s39, v40, 5 v_readlane_b32 s38, v40, 4 v_readlane_b32 s37, v40, 3 v_readlane_b32 s36, v40, 2 v_readlane_b32 s35, v40, 1 v_readlane_b32 s34, v40, 0 s_or_saveexec_b32 s0, -1 scratch_load_b32 v40, off, s32 ; 4-byte Folded Reload s_mov_b32 exec_lo, s0 s_waitcnt vmcnt(0) lgkmcnt(0) s_setpc_b64 s[30:31] .Lfunc_end3: .size __ockl_dm_alloc, .Lfunc_end3-__ockl_dm_alloc ; -- End function .section .AMDGPU.csdata,"",@progbits ; Function info: ; codeLenInByte = 24288 ; NumSgprs: 47 ; NumVgprs: 136 ; ScratchSize: 8 ; MemoryBound: 1 .text .p2align 2 ; -- Begin function _Z8chechalliPbiiiPiS0_S0_iiPS0_ .type _Z8chechalliPbiiiPiS0_S0_iiPS0_,@function _Z8chechalliPbiiiPiS0_S0_iiPS0_: ; @_Z8chechalliPbiiiPiS0_S0_iiPS0_ ; %bb.0: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) s_mov_b32 s0, s33 s_mov_b32 s33, s32 s_or_saveexec_b32 s1, -1 scratch_store_b32 off, v89, s33 offset:100 ; 4-byte Folded Spill s_mov_b32 exec_lo, s1 v_writelane_b32 v89, s0, 16 s_addk_i32 s32, 0x70 s_clause 0x18 scratch_store_b32 off, v40, s33 offset:96 ; meta instruction scratch_store_b32 off, v41, s33 offset:92 ; meta instruction scratch_store_b32 off, v42, s33 offset:88 ; meta instruction scratch_store_b32 off, v43, s33 offset:84 ; meta instruction scratch_store_b32 off, v44, s33 offset:80 ; meta instruction scratch_store_b32 off, v45, s33 offset:76 ; meta instruction scratch_store_b32 off, v46, s33 offset:72 ; meta instruction scratch_store_b32 off, v47, s33 offset:68 ; meta instruction scratch_store_b32 off, v56, s33 offset:64 ; meta instruction scratch_store_b32 off, v57, s33 offset:60 ; meta instruction scratch_store_b32 off, v58, s33 offset:56 ; meta instruction scratch_store_b32 off, v59, s33 offset:52 ; meta instruction scratch_store_b32 off, v60, s33 offset:48 ; meta instruction scratch_store_b32 off, v61, s33 offset:44 ; meta instruction scratch_store_b32 off, v62, s33 offset:40 ; meta instruction scratch_store_b32 off, v63, s33 offset:36 ; meta instruction scratch_store_b32 off, v72, s33 offset:32 ; meta instruction scratch_store_b32 off, v73, s33 offset:28 ; meta instruction scratch_store_b32 off, v74, s33 offset:24 ; meta instruction scratch_store_b32 off, v75, s33 offset:20 ; meta instruction scratch_store_b32 off, v76, s33 offset:16 ; meta instruction scratch_store_b32 off, v77, s33 offset:12 ; meta instruction scratch_store_b32 off, v78, s33 offset:8 ; meta instruction scratch_store_b32 off, v79, s33 offset:4 ; meta instruction scratch_store_b32 off, v88, s33 v_writelane_b32 v89, s34, 0 v_writelane_b32 v89, s35, 1 v_writelane_b32 v89, s36, 2 v_writelane_b32 v89, s37, 3 v_writelane_b32 v89, s38, 4 v_writelane_b32 v89, s39, 5 v_writelane_b32 v89, s40, 6 v_writelane_b32 v89, s41, 7 v_writelane_b32 v89, s42, 8 v_writelane_b32 v89, s43, 9 v_writelane_b32 v89, s44, 10 v_writelane_b32 v89, s45, 11 v_writelane_b32 v89, s46, 12 v_writelane_b32 v89, s47, 13 v_writelane_b32 v89, s30, 14 v_writelane_b32 v89, s31, 15 v_dual_mov_b32 v63, v12 :: v_dual_mov_b32 v46, v10 v_dual_mov_b32 v45, v9 :: v_dual_mov_b32 v42, v0 v_dual_mov_b32 v62, v6 :: v_dual_mov_b32 v57, v1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_nc_u32_e32 v0, v63, v3 v_dual_mov_b32 v59, v15 :: v_dual_mov_b32 v44, v8 v_ashrrev_i32_e32 v43, 31, v42 v_dual_mov_b32 v47, v11 :: v_dual_mov_b32 v72, v13 s_delay_alu instid0(VALU_DEP_4) v_ashrrev_i32_e32 v1, 31, v0 v_mov_b32_e32 v56, v5 v_mov_b32_e32 v40, v4 v_lshlrev_b64 v[4:5], 2, v[42:43] v_dual_mov_b32 v60, v14 :: v_dual_mov_b32 v61, v7 v_lshlrev_b64 v[0:1], 2, v[0:1] v_mov_b32_e32 v58, v2 v_sub_nc_u32_e32 v2, v72, v63 s_mov_b32 s2, 0 ; implicit-def: $sgpr1 s_mov_b32 s3, exec_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v44, v0 v_add_co_ci_u32_e32 v1, vcc_lo, v45, v1, vcc_lo v_add_co_u32 v0, vcc_lo, -4, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v1, vcc_lo, -1, v1, vcc_lo flat_load_b32 v0, v[0:1] s_waitcnt vmcnt(0) lgkmcnt(0) v_ashrrev_i32_e32 v1, 31, v0 v_lshlrev_b64 v[0:1], 2, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v46, v0 v_add_co_ci_u32_e32 v1, vcc_lo, v47, v1, vcc_lo v_add_co_u32 v4, vcc_lo, v46, v4 v_add_co_ci_u32_e32 v5, vcc_lo, v47, v5, vcc_lo s_clause 0x1 flat_load_b32 v0, v[0:1] flat_load_b32 v1, v[4:5] s_waitcnt vmcnt(0) lgkmcnt(0) v_cmp_lt_i32_e64 s34, v0, v1 v_cmp_ge_i32_e32 vcc_lo, v0, v1 v_cmpx_ne_u32_e64 v2, v3 s_xor_b32 s35, exec_lo, s3 s_cbranch_execz .LBB4_18 ; %bb.1: ; implicit-def: $sgpr37 ; implicit-def: $sgpr36 s_and_saveexec_b32 s0, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s38, exec_lo, s0 s_cbranch_execz .LBB4_3 ; %bb.2: v_dual_mov_b32 v0, v42 :: v_dual_add_nc_u32 v3, 1, v3 v_dual_mov_b32 v1, v57 :: v_dual_mov_b32 v2, v58 v_dual_mov_b32 v4, v40 :: v_dual_mov_b32 v7, v61 v_dual_mov_b32 v5, v56 :: v_dual_mov_b32 v6, v62 v_dual_mov_b32 v8, v44 :: v_dual_mov_b32 v9, v45 v_dual_mov_b32 v10, v46 :: v_dual_mov_b32 v11, v47 v_dual_mov_b32 v12, v63 :: v_dual_mov_b32 v13, v72 v_dual_mov_b32 v14, v60 :: v_dual_mov_b32 v15, v59 s_getpc_b64 s[0:1] s_add_u32 s0, s0, _Z8chechalliPbiiiPiS0_S0_iiPS0_@rel32@lo+4 s_addc_u32 s1, s1, _Z8chechalliPbiiiPiS0_S0_iiPS0_@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) s_swappc_b64 s[30:31], s[0:1] v_and_b32_e32 v0, 1, v0 s_mov_b32 s36, 0 ; implicit-def: $vgpr42 ; implicit-def: $vgpr57 ; implicit-def: $vgpr58 ; implicit-def: $vgpr3 ; implicit-def: $vgpr40 ; implicit-def: $vgpr56 ; implicit-def: $vgpr62 ; implicit-def: $vgpr61 ; implicit-def: $vgpr63 ; implicit-def: $vgpr72 ; implicit-def: $vgpr60 ; implicit-def: $vgpr59 ; implicit-def: $vgpr44_vgpr45 ; implicit-def: $vgpr46_vgpr47 v_cmp_eq_u32_e32 vcc_lo, 1, v0 ; implicit-def: $vgpr0 s_and_b32 s37, vcc_lo, exec_lo .LBB4_3: ; %Flow107 s_and_not1_saveexec_b32 s38, s38 s_cbranch_execz .LBB4_17 ; %bb.4: ; %.preheader88 s_mov_b32 s0, -1 s_mov_b32 s39, exec_lo ; implicit-def: $sgpr1 v_cmpx_lt_i32_e64 v40, v56 s_cbranch_execz .LBB4_16 ; %bb.5: ; %.lr.ph v_ashrrev_i32_e32 v1, 31, v0 v_ashrrev_i32_e32 v41, 31, v40 v_dual_mov_b32 v88, v40 :: v_dual_add_nc_u32 v43, 1, v3 v_mov_b32_e32 v79, 0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[0:1], 3, v[0:1] v_lshlrev_b64 v[2:3], 2, v[40:41] v_mov_b32_e32 v41, 1 s_mov_b32 s40, 0 ; implicit-def: $sgpr41 ; implicit-def: $sgpr42 ; implicit-def: $sgpr43 ; implicit-def: $sgpr44 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v73, vcc_lo, v60, v0 v_add_co_ci_u32_e32 v74, vcc_lo, v59, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v75, vcc_lo, v62, v2 v_add_co_ci_u32_e32 v76, vcc_lo, v61, v3, vcc_lo .LBB4_6: ; =>This Inner Loop Header: Depth=1 flat_load_b32 v0, v[75:76] s_mov_b32 s46, exec_lo ; implicit-def: $sgpr0 ; implicit-def: $sgpr1 s_waitcnt vmcnt(0) lgkmcnt(0) v_ashrrev_i32_e32 v1, 31, v0 v_add_co_u32 v77, vcc_lo, v57, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v78, vcc_lo, v58, v1, vcc_lo flat_load_u8 v2, v[77:78] s_waitcnt vmcnt(0) lgkmcnt(0) v_cmp_ne_u16_e64 s45, 0, v2 v_cmpx_eq_u16_e32 0, v2 s_cbranch_execz .LBB4_12 ; %bb.7: ; in Loop: Header=BB4_6 Depth=1 flat_load_b64 v[2:3], v[73:74] v_lshlrev_b64 v[0:1], 2, v[0:1] s_mov_b32 s2, -1 s_mov_b32 s47, exec_lo ; implicit-def: $sgpr0 ; implicit-def: $sgpr1 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v2, v0 v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo flat_load_b32 v0, v[0:1] s_waitcnt vmcnt(0) lgkmcnt(0) v_cmpx_ne_u32_e32 0, v0 s_cbranch_execz .LBB4_11 ; %bb.8: ; in Loop: Header=BB4_6 Depth=1 v_dual_mov_b32 v0, v42 :: v_dual_mov_b32 v1, v57 v_dual_mov_b32 v2, v58 :: v_dual_mov_b32 v3, v43 v_dual_mov_b32 v4, v40 :: v_dual_mov_b32 v7, v61 v_dual_mov_b32 v5, v56 :: v_dual_mov_b32 v6, v62 v_dual_mov_b32 v8, v44 :: v_dual_mov_b32 v9, v45 v_dual_mov_b32 v10, v46 :: v_dual_mov_b32 v11, v47 v_dual_mov_b32 v12, v63 :: v_dual_mov_b32 v13, v72 v_dual_mov_b32 v14, v60 :: v_dual_mov_b32 v15, v59 flat_store_b8 v[77:78], v41 s_getpc_b64 s[0:1] s_add_u32 s0, s0, _Z8chechalliPbiiiPiS0_S0_iiPS0_@rel32@lo+4 s_addc_u32 s1, s1, _Z8chechalliPbiiiPiS0_S0_iiPS0_@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_swappc_b64 s[30:31], s[0:1] v_and_b32_e32 v0, 1, v0 s_mov_b32 s0, 0 s_mov_b32 s2, 0 v_cmp_eq_u32_e32 vcc_lo, 1, v0 s_xor_b32 s3, vcc_lo, -1 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s1, s3 s_cbranch_execz .LBB4_10 ; %bb.9: ; in Loop: Header=BB4_6 Depth=1 s_mov_b32 s2, exec_lo flat_store_b8 v[77:78], v79 .LBB4_10: ; %Flow103 ; in Loop: Header=BB4_6 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_mov_b32 s1, -1 s_or_not1_b32 s2, s2, exec_lo .LBB4_11: ; %Flow102 ; in Loop: Header=BB4_6 Depth=1 s_or_b32 exec_lo, exec_lo, s47 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) s_and_not1_b32 s3, s45, exec_lo s_and_b32 s2, s2, exec_lo s_or_b32 s45, s3, s2 .LBB4_12: ; %Flow ; in Loop: Header=BB4_6 Depth=1 s_or_b32 exec_lo, exec_lo, s46 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s3, s44, exec_lo s_and_b32 s0, s0, exec_lo s_and_not1_b32 s4, s43, exec_lo s_and_b32 s1, s1, exec_lo s_mov_b32 s2, -1 s_or_b32 s44, s3, s0 s_or_b32 s43, s4, s1 s_and_saveexec_b32 s1, s45 ; %bb.13: ; in Loop: Header=BB4_6 Depth=1 v_add_nc_u32_e32 v88, 1, v88 v_add_co_u32 v75, s0, v75, 4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e64 v76, s0, 0, v76, s0 v_cmp_ge_i32_e32 vcc_lo, v88, v56 s_or_b32 s44, s44, exec_lo s_or_b32 s43, s43, exec_lo s_or_not1_b32 s2, vcc_lo, exec_lo ; %bb.14: ; %Flow104 ; in Loop: Header=BB4_6 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, exec_lo, s2 s_or_b32 s40, s0, s40 s_and_not1_b32 s0, s42, exec_lo s_and_b32 s1, s44, exec_lo s_and_not1_b32 s2, s41, exec_lo s_and_b32 s3, s43, exec_lo s_or_b32 s42, s0, s1 s_or_b32 s41, s2, s3 s_and_not1_b32 exec_lo, exec_lo, s40 s_cbranch_execnz .LBB4_6 ; %bb.15: ; %Flow105 s_or_b32 exec_lo, exec_lo, s40 s_delay_alu instid0(SALU_CYCLE_1) s_or_not1_b32 s0, s42, exec_lo s_and_b32 s1, s41, exec_lo .LBB4_16: ; %Flow106 s_or_b32 exec_lo, exec_lo, s39 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s2, s37, exec_lo s_and_b32 s1, s1, exec_lo s_and_not1_b32 s3, s36, exec_lo s_and_b32 s0, s0, exec_lo s_or_b32 s37, s2, s1 s_or_b32 s36, s3, s0 .LBB4_17: ; %.loopexit89 s_or_b32 exec_lo, exec_lo, s38 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 s1, s37, exec_lo s_and_b32 s2, s36, exec_lo ; implicit-def: $vgpr0 ; implicit-def: $vgpr57 ; implicit-def: $vgpr58 ; implicit-def: $vgpr40 ; implicit-def: $vgpr56 ; implicit-def: $vgpr62 ; implicit-def: $vgpr61 ; implicit-def: $vgpr60 ; implicit-def: $vgpr59 .LBB4_18: ; %Flow111 s_and_not1_saveexec_b32 s3, s35 s_cbranch_execz .LBB4_30 ; %bb.19: s_mov_b32 s5, -1 s_mov_b32 s0, s2 s_and_saveexec_b32 s4, s34 s_cbranch_execz .LBB4_29 ; %bb.20: ; %.preheader s_mov_b32 s0, -1 s_mov_b32 s6, -1 s_mov_b32 s5, exec_lo v_cmpx_lt_i32_e64 v40, v56 s_cbranch_execz .LBB4_28 ; %bb.21: ; %.lr.ph96 v_ashrrev_i32_e32 v1, 31, v0 v_ashrrev_i32_e32 v41, 31, v40 s_mov_b32 s6, 0 ; implicit-def: $sgpr7 ; implicit-def: $sgpr8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[0:1], 3, v[0:1] v_lshlrev_b64 v[2:3], 2, v[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v60, v0 v_add_co_ci_u32_e32 v1, vcc_lo, v59, v1, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, v62, v2 v_add_co_ci_u32_e32 v3, vcc_lo, v61, v3, vcc_lo .LBB4_22: ; =>This Inner Loop Header: Depth=1 flat_load_b32 v4, v[2:3] s_mov_b32 s10, exec_lo ; implicit-def: $sgpr9 s_waitcnt vmcnt(0) lgkmcnt(0) v_ashrrev_i32_e32 v5, 31, v4 v_add_co_u32 v6, vcc_lo, v57, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v58, v5, vcc_lo flat_load_u8 v6, v[6:7] s_waitcnt vmcnt(0) lgkmcnt(0) v_cmp_ne_u16_e64 s0, 0, v6 v_cmpx_eq_u16_e32 0, v6 s_cbranch_execz .LBB4_24 ; %bb.23: ; in Loop: Header=BB4_22 Depth=1 flat_load_b64 v[6:7], v[0:1] v_lshlrev_b64 v[4:5], 2, v[4:5] s_and_not1_b32 s0, s0, exec_lo s_mov_b32 s9, -1 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v6, v4 v_add_co_ci_u32_e32 v5, vcc_lo, v7, v5, vcc_lo flat_load_b32 v4, v[4:5] s_waitcnt vmcnt(0) lgkmcnt(0) v_cmp_eq_u32_e32 vcc_lo, 0, v4 s_and_b32 s11, vcc_lo, exec_lo s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s0, s0, s11 .LBB4_24: ; %Flow108 ; in Loop: Header=BB4_22 Depth=1 s_or_b32 exec_lo, exec_lo, s10 s_mov_b32 s11, -1 s_mov_b32 s12, s9 s_and_saveexec_b32 s10, s0 ; %bb.25: ; in Loop: Header=BB4_22 Depth=1 v_add_nc_u32_e32 v40, 1, v40 v_add_co_u32 v2, s0, v2, 4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e64 v3, s0, 0, v3, s0 v_cmp_ge_i32_e32 vcc_lo, v40, v56 s_and_not1_b32 s12, s9, exec_lo s_or_not1_b32 s11, vcc_lo, exec_lo ; %bb.26: ; %Flow109 ; in Loop: Header=BB4_22 Depth=1 s_or_b32 exec_lo, exec_lo, s10 s_xor_b32 s0, s12, -1 s_and_b32 s10, exec_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s6, s10, s6 s_and_not1_b32 s8, s8, exec_lo s_and_b32 s0, s0, exec_lo s_and_not1_b32 s7, s7, exec_lo s_and_b32 s9, s9, exec_lo s_or_b32 s8, s8, s0 s_or_b32 s7, s7, s9 s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB4_22 ; %bb.27: ; %loop.exit.guard s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_or_not1_b32 s6, s7, exec_lo s_or_not1_b32 s0, s8, exec_lo .LBB4_28: ; %Flow114 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s7, s2, exec_lo s_and_b32 s0, s0, exec_lo s_or_not1_b32 s5, s6, exec_lo s_or_b32 s0, s7, s0 .LBB4_29: ; %Flow113 s_or_b32 exec_lo, exec_lo, s4 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s1, s1, exec_lo s_and_b32 s4, s5, exec_lo s_and_not1_b32 s2, s2, exec_lo s_and_b32 s0, s0, exec_lo s_or_b32 s1, s1, s4 s_or_b32 s2, s2, s0 .LBB4_30: ; %Flow112 s_or_b32 exec_lo, exec_lo, s3 s_and_saveexec_b32 s0, s2 ; %bb.31: ; %.loopexit s_and_not1_b32 s1, s1, exec_lo ; %bb.32: ; %.loopexit87 s_or_b32 exec_lo, exec_lo, s0 s_clause 0x18 scratch_load_b32 v88, off, s33 scratch_load_b32 v79, off, s33 offset:4 scratch_load_b32 v78, off, s33 offset:8 scratch_load_b32 v77, off, s33 offset:12 scratch_load_b32 v76, off, s33 offset:16 scratch_load_b32 v75, off, s33 offset:20 scratch_load_b32 v74, off, s33 offset:24 scratch_load_b32 v73, off, s33 offset:28 scratch_load_b32 v72, off, s33 offset:32 scratch_load_b32 v63, off, s33 offset:36 scratch_load_b32 v62, off, s33 offset:40 scratch_load_b32 v61, off, s33 offset:44 scratch_load_b32 v60, off, s33 offset:48 scratch_load_b32 v59, off, s33 offset:52 scratch_load_b32 v58, off, s33 offset:56 scratch_load_b32 v57, off, s33 offset:60 scratch_load_b32 v56, off, s33 offset:64 scratch_load_b32 v47, off, s33 offset:68 scratch_load_b32 v46, off, s33 offset:72 scratch_load_b32 v45, off, s33 offset:76 scratch_load_b32 v44, off, s33 offset:80 scratch_load_b32 v43, off, s33 offset:84 scratch_load_b32 v42, off, s33 offset:88 scratch_load_b32 v41, off, s33 offset:92 scratch_load_b32 v40, off, s33 offset:96 v_readlane_b32 s30, v89, 14 v_cndmask_b32_e64 v0, 0, 1, s1 v_readlane_b32 s31, v89, 15 v_readlane_b32 s47, v89, 13 v_readlane_b32 s46, v89, 12 v_readlane_b32 s45, v89, 11 v_readlane_b32 s44, v89, 10 v_readlane_b32 s43, v89, 9 v_readlane_b32 s42, v89, 8 v_readlane_b32 s41, v89, 7 v_readlane_b32 s40, v89, 6 v_readlane_b32 s39, v89, 5 v_readlane_b32 s38, v89, 4 v_readlane_b32 s37, v89, 3 v_readlane_b32 s36, v89, 2 v_readlane_b32 s35, v89, 1 v_readlane_b32 s34, v89, 0 v_readlane_b32 s0, v89, 16 s_or_saveexec_b32 s1, -1 scratch_load_b32 v89, off, s33 offset:100 ; 4-byte Folded Reload s_mov_b32 exec_lo, s1 s_addk_i32 s32, 0xff90 s_mov_b32 s33, s0 s_waitcnt vmcnt(0) lgkmcnt(0) s_setpc_b64 s[30:31] .Lfunc_end4: .size _Z8chechalliPbiiiPiS0_S0_iiPS0_, .Lfunc_end4-_Z8chechalliPbiiiPiS0_S0_iiPS0_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Function info: ; codeLenInByte = 2164 ; NumSgprs: 50 ; NumVgprs: 90 ; ScratchSize: 112 ; MemoryBound: 0 .section .text.unlikely.,"ax",@progbits .p2align 2 ; -- Begin function __ockl_dm_dealloc .type __ockl_dm_dealloc,@function __ockl_dm_dealloc: ; @__ockl_dm_dealloc ; %bb.0: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v2, 0xfff, v0 s_mov_b32 s0, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_ne_u64_e32 0, v[2:3] s_xor_b32 s4, exec_lo, s0 s_cbranch_execz .LBB5_12 ; %bb.1: v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v4, 0xffe00000, v0 s_load_b64 s[0:1], s[8:9], 0x60 v_and_b32_e32 v15, 0x1fffff, v0 global_load_b64 v[6:7], v[4:5], off s_waitcnt lgkmcnt(0) s_add_u32 s0, s0, 0x2800 s_addc_u32 s1, s1, 0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __unnamed_1@rel32@lo+16 s_addc_u32 s3, s3, __unnamed_1@rel32@hi+24 s_waitcnt vmcnt(0) v_lshrrev_b32_e32 v1, 1, v6 v_bfe_i32 v2, v6, 0, 1 v_and_b32_e32 v16, 0xff, v7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, 4, v1 v_lshlrev_b32_e64 v1, v1, 1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshrrev_b32_e32 v8, 1, v1 v_and_b32_e32 v2, v2, v8 v_add_nc_u32_e32 v8, 0xffffff00, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v14, v2, v1 v_mov_b32_e32 v2, v6 v_lshrrev_b32_e32 v18, 8, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cvt_f32_u32_e32 v1, v14 v_sub_nc_u32_e32 v0, 0, v14 v_lshlrev_b64 v[12:13], 5, v[2:3] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v1, v1 v_add_co_u32 v12, vcc_lo, v12, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo s_waitcnt_depctr 0xfff v_mul_f32_e32 v1, 0x4f7ffffe, v1 v_cvt_u32_f32_e32 v17, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mul_lo_u32 v9, v0, v17 v_mad_u64_u32 v[0:1], null, 0x1800, v6, s[0:1] v_cmp_gt_u32_e64 s0, 0x100, v7 v_mul_hi_u32 v2, v17, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mad_u64_u32 v[8:9], null, v7, 24, v[0:1] v_mad_u64_u32 v[10:11], null, v18, 24, v[0:1] v_dual_mov_b32 v17, 1 :: v_dual_add_nc_u32 v2, v17, v2 .LBB5_2: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v0, v17 v_cmp_ne_u32_e32 vcc_lo, 0, v17 v_mov_b32_e32 v17, 0 ;;#ASMSTART ;;#ASMEND s_and_saveexec_b32 s5, vcc_lo s_cbranch_execz .LBB5_11 ; %bb.3: ; in Loop: Header=BB5_2 Depth=1 v_readfirstlane_b32 s1, v6 v_readfirstlane_b32 s2, v7 v_mov_b32_e32 v17, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_eq_u32_e32 vcc_lo, s1, v6 v_cmp_eq_u32_e64 s1, s2, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, vcc_lo, s1 s_and_saveexec_b32 s6, s1 s_cbranch_execz .LBB5_10 ; %bb.4: ; in Loop: Header=BB5_2 Depth=1 s_mov_b32 s7, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mbcnt_lo_u32_b32 v0, s7, 0 v_cmp_ne_u32_e64 s1, 0, v0 v_cmp_eq_u32_e32 vcc_lo, 0, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_cndmask_b32_e64 v1, v9, 0, s1 v_cndmask_b32_e64 v0, v8, 0, s1 s_or_b32 s1, s1, s0 s_xor_b32 s2, s1, -1 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s1, s2 s_cbranch_execz .LBB5_6 ; %bb.5: ; in Loop: Header=BB5_2 Depth=1 global_load_b64 v[17:18], v[10:11], off glc s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v16, 24, v[17:18] .LBB5_6: ; in Loop: Header=BB5_2 Depth=1 s_or_b32 exec_lo, exec_lo, s1 global_load_b32 v17, v[12:13], off v_readfirstlane_b32 s2, v0 v_readfirstlane_b32 s3, v1 s_waitcnt vmcnt(0) v_sub_nc_u32_e32 v17, v15, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v18, v17, v2 v_mul_lo_u32 v19, v18, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_nc_u32_e32 v17, v17, v19 v_add_nc_u32_e32 v19, 1, v18 v_sub_nc_u32_e32 v20, v17, v14 v_cmp_ge_u32_e64 s1, v17, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v18, v18, v19, s1 v_cndmask_b32_e64 v17, v17, v20, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v19, 1, v18 v_cmp_ge_u32_e64 s1, v17, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v17, v18, v19, s1 v_lshrrev_b32_e32 v18, 3, v17 v_lshlrev_b32_e64 v17, v17, 1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v18, 0x1ffffffc, v18 v_not_b32_e32 v19, v17 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v17, s1, v4, v18 v_add_co_ci_u32_e64 v18, s1, 0, v5, s1 global_atomic_and_b32 v[17:18], v19, off offset:16 s_and_saveexec_b32 s1, vcc_lo s_cbranch_execz .LBB5_9 ; %bb.7: ; in Loop: Header=BB5_2 Depth=1 s_mov_b32 s10, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mbcnt_lo_u32_b32 v0, s10, 0 v_cmp_eq_u32_e32 vcc_lo, 0, v0 s_and_b32 s11, exec_lo, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 exec_lo, s11 s_cbranch_execz .LBB5_9 ; %bb.8: ; in Loop: Header=BB5_2 Depth=1 s_bcnt1_i32_b32 s7, s7 s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_i32 s7, s7, s10 v_mov_b32_e32 v0, s7 global_atomic_sub_u32 v3, v0, s[2:3] offset:16 .LBB5_9: ; %Flow16 ; in Loop: Header=BB5_2 Depth=1 s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v17, 0 .LBB5_10: ; %Flow18 ; in Loop: Header=BB5_2 Depth=1 s_or_b32 exec_lo, exec_lo, s6 .LBB5_11: ; in Loop: Header=BB5_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s5 v_mov_b32_e32 v0, v17 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) v_cmp_ne_u32_e32 vcc_lo, 0, v0 ; implicit-def: $vgpr0_vgpr1 s_cbranch_vccnz .LBB5_2 .LBB5_12: ; %Flow40 s_and_not1_saveexec_b32 s1, s4 s_cbranch_execz .LBB5_45 ; %bb.13: s_mov_b32 s10, exec_lo v_cmpx_ne_u64_e32 0, v[0:1] s_cbranch_execz .LBB5_44 ; %bb.14: s_load_b64 s[2:3], s[8:9], 0x50 v_mbcnt_lo_u32_b32 v2, -1, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_readfirstlane_b32 s0, v2 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 v_cmp_eq_u32_e64 s0, s0, v2 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB5_20 ; %bb.15: v_mov_b32_e32 v3, 0 s_mov_b32 s5, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB5_19 ; %bb.16: ; %.preheader3.i.i.i.preheader s_mov_b32 s6, 0 .LBB5_17: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB5_17 ; %bb.18: ; %Flow34 s_or_b32 exec_lo, exec_lo, s6 .LBB5_19: ; %Flow36 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB5_20: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s14, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s11, s7, 24 s_mul_hi_u32 s12, s6, 24 s_mul_i32 s13, s6, 24 s_and_saveexec_b32 s15, s0 s_cbranch_execz .LBB5_22 ; %bb.21: v_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v9, v3 s_add_i32 s14, s12, s11 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s13 v_add_co_ci_u32_e32 v13, vcc_lo, s14, v5, vcc_lo v_dual_mov_b32 v10, 3 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB5_22: s_or_b32 exec_lo, exec_lo, s15 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v2, v8 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo v_mov_b32_e32 v2, v3 v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v9, s19 v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v8, s18 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB5_30 ; %bb.23: v_mov_b32_e32 v8, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 v_dual_mov_b32 v9, s4 :: v_dual_mov_b32 v10, s5 s_waitcnt vmcnt(0) v_and_b32_e32 v1, s5, v1 v_and_b32_e32 v0, s4, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v2, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v2, v1 v_add_co_u32 v6, vcc_lo, v4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v5, v1, vcc_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB5_26 ; %bb.24: ; %.preheader1.i.i.i.preheader s_mov_b32 s14, 0 .LBB5_25: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s14, vcc_lo, s14 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s14 s_cbranch_execnz .LBB5_25 .LBB5_26: ; %Flow32 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s14, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s14, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB5_28 ; %bb.27: s_bcnt1_i32_b32 s14, s14 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s14 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB5_28: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB5_30 ; %bb.29: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB5_30: ; %Flow33 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s12, s12, s11 v_add_co_u32 v0, vcc_lo, v4, s13 v_add_co_ci_u32_e32 v1, vcc_lo, s12, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB5_31: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB5_33 ; %bb.32: ; in Loop: Header=BB5_31 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB5_33: ; in Loop: Header=BB5_31 Depth=1 s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s6, v2 s_cmp_eq_u32 s6, 0 s_cbranch_scc1 .LBB5_35 ; %bb.34: ; in Loop: Header=BB5_31 Depth=1 s_mov_b32 s6, 0 s_sleep 1 s_branch .LBB5_36 .LBB5_35: ; in Loop: Header=BB5_31 Depth=1 s_mov_b32 s6, -1 .LBB5_36: ; %Flow27 ; in Loop: Header=BB5_31 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB5_31 ; %bb.37: s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB5_41 ; %bb.38: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB5_41 ; %bb.39: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB5_40: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB5_40 .LBB5_41: ; %__ockl_devmem_request.exit s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_mbcnt_lo_u32_b32 v0, s0, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_cmp_eq_u32_e32 vcc_lo, 0, v0 s_and_b32 s2, exec_lo, vcc_lo s_mov_b32 exec_lo, s2 s_cbranch_execz .LBB5_44 ; %bb.42: s_mov_b32 s2, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mbcnt_lo_u32_b32 v0, s2, 0 v_cmp_eq_u32_e32 vcc_lo, 0, v0 s_and_b32 s3, exec_lo, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 exec_lo, s3 s_cbranch_execz .LBB5_44 ; %bb.43: s_load_b64 s[4:5], s[8:9], 0x60 s_bcnt1_i32_b32 s0, s0 s_bcnt1_i32_b32 s2, s2 v_mov_b32_e32 v2, 0x1a000 s_mul_i32 s0, s0, s2 s_delay_alu instid0(SALU_CYCLE_1) v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s0 s_waitcnt lgkmcnt(0) global_atomic_sub_u64 v2, v[0:1], s[4:5] offset:2184 .LBB5_44: ; %Flow38 s_or_b32 exec_lo, exec_lo, s10 .LBB5_45: ; %.loopexit s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_waitcnt lgkmcnt(0) s_setpc_b64 s[30:31] .Lfunc_end5: .size __ockl_dm_dealloc, .Lfunc_end5-__ockl_dm_dealloc ; -- End function .section .AMDGPU.csdata,"",@progbits ; Function info: ; codeLenInByte = 2296 ; NumSgprs: 34 ; NumVgprs: 21 ; ScratchSize: 0 ; MemoryBound: 0 .text .protected _Z7findcvsiPiS_S_S_S_S_PS_ ; -- Begin function _Z7findcvsiPiS_S_S_S_S_PS_ .globl _Z7findcvsiPiS_S_S_S_S_PS_ .p2align 8 .type _Z7findcvsiPiS_S_S_S_S_PS_,@function _Z7findcvsiPiS_S_S_S_S_PS_: ; @_Z7findcvsiPiS_S_S_S_S_PS_ ; %bb.0: s_mov_b64 s[48:49], s[0:1] s_load_b32 s0, s[0:1], 0x44 s_clause 0x1 s_load_b256 s[52:59], s[48:49], 0x8 s_load_b32 s1, s[48:49], 0x4c v_and_b32_e32 v1, 0x3ff, v0 s_mov_b32 s32, 0 s_waitcnt lgkmcnt(0) s_mul_i32 s2, s0, s14 s_load_b32 s0, s[54:55], 0x0 s_and_b32 s3, s1, 0xffff s_add_i32 s2, s2, s15 s_lshr_b32 s1, s1, 16 v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2] v_bfe_u32 v3, v0, 10, 10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mad_u64_u32 v[0:1], null, v2, s1, v[3:4] s_mov_b32 s1, exec_lo s_waitcnt lgkmcnt(0) v_cmpx_gt_i32_e64 s0, v0 s_cbranch_execz .LBB6_2 ; %bb.1: v_ashrrev_i32_e32 v1, 31, v0 s_load_b32 s46, s[48:49], 0x0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[42:43], 2, v[0:1] v_add_co_u32 v44, vcc_lo, s52, v42 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_add_co_ci_u32_e32 v45, vcc_lo, s53, v43, vcc_lo global_load_b64 v[0:1], v[44:45], off s_waitcnt lgkmcnt(0) s_ashr_i32 s47, s46, 31 s_lshl_b64 s[52:53], s[46:47], 2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s58, s58, s52 s_addc_u32 s59, s59, s53 s_load_b64 s[2:3], s[58:59], 0x0 s_clause 0x1 s_load_b128 s[60:63], s[48:49], 0x28 s_load_b64 s[50:51], s[48:49], 0x38 s_waitcnt lgkmcnt(0) s_sub_i32 s1, s3, s2 s_waitcnt vmcnt(0) v_sub_nc_u32_e32 v0, v1, v0 s_delay_alu instid0(VALU_DEP_1) v_cmp_le_i32_e32 vcc_lo, s1, v0 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execnz .LBB6_3 .LBB6_2: s_endpgm .LBB6_3: s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1 s_add_u32 s8, s48, 64 s_addc_u32 s9, s49, 0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __ockl_dm_alloc@rel32@lo+4 s_addc_u32 s3, s3, __ockl_dm_alloc@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) s_swappc_b64 s[30:31], s[2:3] v_dual_mov_b32 v40, v0 :: v_dual_mov_b32 v41, v1 v_mov_b32_e32 v4, 0 v_dual_mov_b32 v0, v40 :: v_dual_mov_b32 v1, v41 global_load_b32 v2, v4, s[54:55] s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v3, 31, v2 s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u64_e32 vcc_lo, 4, v[2:3] s_cbranch_vccnz .LBB6_5 .LBB6_4: ; %.lr.ph.i.i ; =>This Inner Loop Header: Depth=1 v_add_co_u32 v2, vcc_lo, v2, -4 v_add_co_ci_u32_e32 v3, vcc_lo, -1, v3, vcc_lo global_store_b32 v[0:1], v4, off v_add_co_u32 v0, s0, v0, 4 v_cmp_lt_u64_e32 vcc_lo, 3, v[2:3] v_add_co_ci_u32_e64 v1, s0, 0, v1, s0 s_cbranch_vccnz .LBB6_4 .LBB6_5: ; %NodeBlock77 v_cmp_gt_i64_e32 vcc_lo, 2, v[2:3] s_cbranch_vccnz .LBB6_11 ; %bb.6: ; %NodeBlock v_cmp_lt_i64_e32 vcc_lo, 2, v[2:3] s_mov_b32 s0, -1 s_cbranch_vccz .LBB6_9 ; %bb.7: ; %LeafBlock75 v_cmp_eq_u64_e32 vcc_lo, 3, v[2:3] s_mov_b32 s0, 0 s_cbranch_vccz .LBB6_9 ; %bb.8: v_mov_b32_e32 v4, 0 s_mov_b32 s0, -1 global_store_b8 v[0:1], v4, off offset:2 .LBB6_9: ; %Flow79 s_mov_b32 s1, 0 s_and_b32 vcc_lo, exec_lo, s0 s_mov_b32 s0, 0 s_cbranch_vccz .LBB6_12 ; %bb.10: v_mov_b32_e32 v4, 0 s_mov_b32 s0, -1 global_store_b8 v[0:1], v4, off offset:1 s_branch .LBB6_12 .LBB6_11: s_mov_b32 s1, -1 s_mov_b32 s0, 0 .LBB6_12: ; %Flow s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB6_14 ; %bb.13: ; %LeafBlock v_cmp_eq_u64_e64 s0, 1, v[2:3] .LBB6_14: ; %Flow82 s_delay_alu instid0(VALU_DEP_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB6_16 ; %bb.15: v_mov_b32_e32 v2, 0 global_store_b8 v[0:1], v2, off .LBB6_16: ; %_ZL6memsetPvim.exit v_dual_mov_b32 v46, 0 :: v_dual_mov_b32 v1, v40 v_dual_mov_b32 v0, s46 :: v_dual_mov_b32 v7, s57 global_load_b64 v[4:5], v[44:45], off global_load_b64 v[12:13], v46, s[58:59] v_dual_mov_b32 v44, 1 :: v_dual_mov_b32 v3, 1 v_dual_mov_b32 v2, v41 :: v_dual_mov_b32 v9, s61 v_dual_mov_b32 v6, s56 :: v_dual_mov_b32 v11, s63 v_dual_mov_b32 v8, s60 :: v_dual_mov_b32 v15, s51 v_mov_b32_e32 v10, s62 v_mov_b32_e32 v14, s50 s_getpc_b64 s[0:1] s_add_u32 s0, s0, _Z8chechalliPbiiiPiS0_S0_iiPS0_@rel32@lo+4 s_addc_u32 s1, s1, _Z8chechalliPbiiiPiS0_S0_iiPS0_@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) s_swappc_b64 s[30:31], s[0:1] v_and_b32_e32 v0, 1, v0 s_mov_b32 s0, exec_lo v_cmpx_eq_u32_e32 1, v0 s_cbranch_execz .LBB6_18 ; %bb.17: s_add_u32 s2, s62, s52 s_addc_u32 s3, s63, s53 global_load_b32 v0, v46, s[2:3] s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, s50, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s51, v1, vcc_lo global_load_b64 v[0:1], v[0:1], off s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v0, v42 v_add_co_ci_u32_e32 v1, vcc_lo, v1, v43, vcc_lo flat_store_b32 v[0:1], v44 .LBB6_18: s_or_b32 exec_lo, exec_lo, s0 v_dual_mov_b32 v0, v40 :: v_dual_mov_b32 v1, v41 s_add_u32 s8, s48, 64 s_addc_u32 s9, s49, 0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4 s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_swappc_b64 s[30:31], s[0:1] s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7findcvsiPiS_S_S_S_S_PS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 112 .amdhsa_kernarg_size 320 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 1 .amdhsa_enable_private_segment 1 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 136 .amdhsa_next_free_sgpr 64 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end6: .size _Z7findcvsiPiS_S_S_S_S_PS_, .Lfunc_end6-_Z7findcvsiPiS_S_S_S_S_PS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 788 ; NumSgprs: 66 ; NumVgprs: 136 ; ScratchSize: 112 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 8 ; VGPRBlocks: 16 ; NumSGPRsForWavesPerEU: 66 ; NumVGPRsForWavesPerEU: 136 ; Occupancy: 10 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z9puttolistPiS_S_ ; -- Begin function _Z9puttolistPiS_S_ .globl _Z9puttolistPiS_S_ .p2align 8 .type _Z9puttolistPiS_S_,@function _Z9puttolistPiS_S_: ; @_Z9puttolistPiS_S_ ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x1c s_load_b128 s[4:7], s[0:1], 0x0 s_load_b32 s3, s[0:1], 0x24 v_and_b32_e32 v1, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_mul_i32 s2, s2, s14 s_load_b32 s4, s[4:5], 0x0 s_and_b32 s5, s3, 0xffff s_add_i32 s2, s2, s15 s_delay_alu instid0(SALU_CYCLE_1) v_mad_u64_u32 v[2:3], null, s2, s5, v[1:2] v_bfe_u32 v3, v0, 10, 10 s_lshr_b32 s2, s3, 16 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, v2, s2, v[3:4] s_mov_b32 s2, exec_lo s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_i32_e64 s4, v0 s_cbranch_execz .LBB7_3 ; %bb.1: v_ashrrev_i32_e32 v1, 31, v0 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[1:2], 2, v[0:1] v_add_co_u32 v1, vcc_lo, s6, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo global_load_b64 v[1:2], v[1:2], off s_waitcnt vmcnt(0) v_cmp_ne_u32_e32 vcc_lo, v1, v2 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB7_3 ; %bb.2: v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[1:2], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v1, vcc_lo, s0, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo global_store_b32 v[1:2], v0, off .LBB7_3: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9puttolistPiS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 5 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end7: .size _Z9puttolistPiS_S_, .Lfunc_end7-_Z9puttolistPiS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 244 ; NumSgprs: 18 ; NumVgprs: 5 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 5 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z9checkpermPbPiS0_S0_S0_S0_S0_ ; -- Begin function _Z9checkpermPbPiS0_S0_S0_S0_S0_ .globl _Z9checkpermPbPiS0_S0_S0_S0_S0_ .p2align 8 .type _Z9checkpermPbPiS0_S0_S0_S0_S0_,@function _Z9checkpermPbPiS0_S0_S0_S0_S0_: ; @_Z9checkpermPbPiS0_S0_S0_S0_S0_ ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x3c s_load_b256 s[4:11], s[0:1], 0x0 s_load_b32 s3, s[0:1], 0x44 v_and_b32_e32 v1, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_mul_i32 s2, s2, s14 s_load_b32 s8, s[8:9], 0x0 s_and_b32 s9, s3, 0xffff s_add_i32 s2, s2, s15 s_delay_alu instid0(SALU_CYCLE_1) v_mad_u64_u32 v[2:3], null, s2, s9, v[1:2] v_bfe_u32 v3, v0, 10, 10 s_lshr_b32 s2, s3, 16 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, v2, s2, v[3:4] s_mov_b32 s2, exec_lo s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_i32_e64 s8, v0 s_cbranch_execz .LBB8_14 ; %bb.1: s_load_b256 s[12:19], s[0:1], 0x20 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[0:1] s_waitcnt lgkmcnt(0) v_add_co_u32 v0, vcc_lo, s12, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s13, v3, vcc_lo global_load_b64 v[0:1], v[0:1], off s_waitcnt vmcnt(0) v_cmp_lt_i32_e32 vcc_lo, v0, v1 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB8_14 ; %bb.2: ; %.lr.ph44 v_add_co_u32 v2, vcc_lo, s6, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo s_mov_b32 s0, -1 s_mov_b32 s1, exec_lo global_load_b32 v2, v[2:3], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v3, 31, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[2:3] v_add_co_u32 v2, vcc_lo, s14, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo global_load_b64 v[2:3], v[2:3], off s_waitcnt vmcnt(0) v_cmpx_lt_i32_e64 v2, v3 s_cbranch_execz .LBB8_12 ; %bb.3: ; %.lr.ph.preheader v_ashrrev_i32_e32 v5, 31, v2 v_mov_b32_e32 v4, v2 v_mov_b32_e32 v6, v0 s_mov_b32 s2, 0 ; implicit-def: $sgpr3 ; implicit-def: $sgpr8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], 2, v[4:5] v_add_co_u32 v4, vcc_lo, s16, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, s17, v5, vcc_lo .LBB8_4: ; %.lr.ph ; =>This Loop Header: Depth=1 ; Child Loop BB8_5 Depth 2 v_ashrrev_i32_e32 v7, 31, v6 v_mov_b32_e32 v9, v2 s_mov_b32 s12, 0 ; implicit-def: $sgpr13 ; implicit-def: $sgpr9 ; implicit-def: $sgpr15 ; implicit-def: $sgpr14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], 2, v[6:7] v_add_co_u32 v7, vcc_lo, s10, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo global_load_b32 v7, v[7:8], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v8, 31, v7 v_lshlrev_b64 v[7:8], 2, v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, s6, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo global_load_b32 v0, v[7:8], off v_dual_mov_b32 v8, v5 :: v_dual_mov_b32 v7, v4 .LBB8_5: ; Parent Loop BB8_4 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b32 v10, v[7:8], off s_or_b32 s14, s14, exec_lo s_or_b32 s15, s15, exec_lo s_mov_b32 s16, exec_lo ; implicit-def: $sgpr0 s_waitcnt vmcnt(0) v_cmpx_ne_u32_e64 v0, v10 ; %bb.6: ; in Loop: Header=BB8_5 Depth=2 v_add_nc_u32_e32 v9, 1, v9 v_add_co_u32 v7, s0, v7, 4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e64 v8, s0, 0, v8, s0 v_cmp_ge_i32_e32 vcc_lo, v9, v3 s_and_not1_b32 s15, s15, exec_lo s_mov_b32 s0, -1 s_and_not1_b32 s14, s14, exec_lo s_and_b32 s17, vcc_lo, exec_lo s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s15, s15, s17 ; %bb.7: ; %Flow ; in Loop: Header=BB8_5 Depth=2 s_or_b32 exec_lo, exec_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s16, exec_lo, s15 s_or_b32 s12, s16, s12 s_and_not1_b32 s9, s9, exec_lo s_and_b32 s16, s14, exec_lo s_and_not1_b32 s13, s13, exec_lo s_and_b32 s0, s0, exec_lo s_or_b32 s9, s9, s16 s_or_b32 s13, s13, s0 s_and_not1_b32 exec_lo, exec_lo, s12 s_cbranch_execnz .LBB8_5 ; %bb.8: ; %loop.exit.guard68 ; in Loop: Header=BB8_4 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) s_and_not1_b32 s8, s8, exec_lo s_and_b32 s12, s13, exec_lo s_mov_b32 s0, -1 s_or_b32 s8, s8, s12 s_and_saveexec_b32 s12, s9 s_xor_b32 s9, exec_lo, s12 ; %bb.9: ; in Loop: Header=BB8_4 Depth=1 v_add_nc_u32_e32 v6, 1, v6 s_and_not1_b32 s8, s8, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmp_ge_i32_e32 vcc_lo, v6, v1 s_or_not1_b32 s0, vcc_lo, exec_lo ; %bb.10: ; %Flow69 ; in Loop: Header=BB8_4 Depth=1 s_or_b32 exec_lo, exec_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, exec_lo, s0 s_or_b32 s2, s0, s2 s_and_not1_b32 s0, s3, exec_lo s_and_b32 s3, s8, exec_lo s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s3, s0, s3 s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB8_4 ; %bb.11: ; %loop.exit.guard s_or_b32 exec_lo, exec_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_or_not1_b32 s0, s3, exec_lo .LBB8_12: ; %Flow70 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB8_14 ; %bb.13: ; %.critedge v_mov_b32_e32 v0, 0 global_store_b8 v0, v0, s[4:5] .LBB8_14: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9checkpermPbPiS0_S0_S0_S0_S0_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 312 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end8: .size _Z9checkpermPbPiS0_S0_S0_S0_S0_, .Lfunc_end8-_Z9checkpermPbPiS0_S0_S0_S0_S0_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 696 ; NumSgprs: 22 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z7findallPiS_S_S_S_S_S_S_PS_S_ ; -- Begin function _Z7findallPiS_S_S_S_S_S_S_PS_S_ .globl _Z7findallPiS_S_S_S_S_S_S_PS_S_ .p2align 8 .type _Z7findallPiS_S_S_S_S_S_S_PS_S_,@function _Z7findallPiS_S_S_S_S_S_S_PS_S_: ; @_Z7findallPiS_S_S_S_S_S_S_PS_S_ ; %bb.0: s_clause 0x2 s_load_b64 s[2:3], s[0:1], 0x50 s_load_b64 s[4:5], s[0:1], 0x5c s_load_b512 s[16:31], s[0:1], 0x0 v_bfe_u32 v1, v0, 20, 10 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v0, v0, 10, 10 s_waitcnt lgkmcnt(0) s_mul_i32 s3, s3, s15 s_lshr_b32 s6, s4, 16 s_and_b32 s4, s4, 0xffff s_load_b32 s12, s[22:23], 0x0 s_mul_i32 s6, s6, s4 s_and_b32 s5, s5, 0xffff v_mul_lo_u32 v5, s6, v1 s_add_i32 s3, s3, s14 v_mad_u32_u24 v4, v0, s4, v2 s_mul_i32 s2, s3, s2 s_mul_i32 s3, s6, s5 s_load_b128 s[4:7], s[0:1], 0x40 s_add_i32 s2, s2, s13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v0, s0, v4, v5 v_add_co_ci_u32_e64 v1, null, 0, 0, s0 s_mul_i32 s13, s2, s3 s_mul_hi_u32 s1, s2, s3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, s13 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt lgkmcnt(0) s_cmp_gt_i32 s12, 0 s_cselect_b32 s14, -1, 0 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_cmp_lt_i32 s12, 1 s_cbranch_scc1 .LBB9_3 ; %bb.1: v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_mov_b64 s[2:3], s[20:21] s_mov_b32 s15, s12 .LBB9_2: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 s_load_b32 s8, s[2:3], 0x0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v10, 31, v3 v_add_co_u32 v2, vcc_lo, v2, v10 v_add_co_ci_u32_e32 v3, vcc_lo, v3, v10, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v12, v2, v10 v_xor_b32_e32 v11, v3, v10 s_waitcnt lgkmcnt(0) s_ashr_i32 s9, s8, 31 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_lshl_b64 s[8:9], s[8:9], 2 s_add_u32 s8, s6, s8 s_addc_u32 s9, s7, s9 s_load_b32 s0, s[8:9], 0x0 s_waitcnt lgkmcnt(0) s_ashr_i32 s8, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_add_u32 s10, s0, s8 s_mov_b32 s9, s8 s_addc_u32 s11, s8, s8 s_xor_b64 s[10:11], s[10:11], s[8:9] s_delay_alu instid0(SALU_CYCLE_1) v_cvt_f32_u32_e32 v2, s10 v_cvt_f32_u32_e32 v3, s11 s_sub_u32 s0, 0, s10 s_subb_u32 s9, 0, s11 s_add_i32 s15, s15, -1 s_add_u32 s2, s2, 4 v_fmac_f32_e32 v2, 0x4f800000, v3 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s15, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v2, v2 s_waitcnt_depctr 0xfff v_mul_f32_e32 v2, 0x5f7ffffc, v2 v_mul_f32_e32 v3, 0x2f800000, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_trunc_f32_e32 v3, v3 v_fmac_f32_e32 v2, 0xcf800000, v3 v_cvt_u32_f32_e32 v3, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_u32_f32_e32 v2, v2 v_mul_lo_u32 v6, s0, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mul_hi_u32 v7, s0, v2 v_mul_lo_u32 v9, s9, v2 v_mul_lo_u32 v8, s0, v2 v_add_nc_u32_e32 v6, v7, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_mul_hi_u32 v7, v2, v8 v_mul_hi_u32 v13, v3, v8 v_mul_lo_u32 v8, v3, v8 v_add_nc_u32_e32 v6, v6, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_mul_lo_u32 v9, v2, v6 v_mul_hi_u32 v14, v2, v6 v_mul_hi_u32 v15, v3, v6 v_mul_lo_u32 v6, v3, v6 v_add_co_u32 v7, vcc_lo, v7, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, 0, v14, vcc_lo v_add_co_u32 v7, vcc_lo, v7, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v9, v13, vcc_lo v_add_co_ci_u32_e32 v8, vcc_lo, 0, v15, vcc_lo v_add_co_u32 v6, vcc_lo, v7, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, 0, v8, vcc_lo v_add_co_u32 v2, vcc_lo, v2, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo v_mul_hi_u32 v7, s0, v2 v_mul_lo_u32 v8, s9, v2 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_lo_u32 v9, s0, v3 v_mul_lo_u32 v6, s0, v2 v_add_nc_u32_e32 v7, v7, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_mul_hi_u32 v13, v3, v6 v_mul_lo_u32 v14, v3, v6 v_mul_hi_u32 v6, v2, v6 v_add_nc_u32_e32 v7, v7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_mul_lo_u32 v8, v2, v7 v_mul_hi_u32 v9, v2, v7 v_mul_hi_u32 v15, v3, v7 v_mul_lo_u32 v7, v3, v7 v_add_co_u32 v6, vcc_lo, v6, v8 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, 0, v9, vcc_lo v_add_co_u32 v6, vcc_lo, v6, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v6, vcc_lo, v8, v13, vcc_lo v_add_co_ci_u32_e32 v8, vcc_lo, 0, v15, vcc_lo v_add_co_u32 v6, vcc_lo, v6, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, 0, v8, vcc_lo v_add_co_u32 v6, vcc_lo, v2, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v13, vcc_lo, v3, v7, vcc_lo v_mul_hi_u32 v14, v12, v6 v_mad_u64_u32 v[2:3], null, v11, v6, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[6:7], null, v12, v13, 0 v_mad_u64_u32 v[8:9], null, v11, v13, 0 v_add_co_u32 v6, vcc_lo, v14, v6 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo v_add_co_u32 v2, vcc_lo, v6, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, v7, v3, vcc_lo v_add_co_ci_u32_e32 v3, vcc_lo, 0, v9, vcc_lo v_add_co_u32 v6, vcc_lo, v2, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, 0, v3, vcc_lo v_mul_lo_u32 v8, s11, v6 v_mad_u64_u32 v[2:3], null, s10, v6, 0 s_delay_alu instid0(VALU_DEP_3) v_mul_lo_u32 v14, s10, v7 v_add_co_u32 v9, vcc_lo, v6, 1 v_add_co_ci_u32_e32 v16, vcc_lo, 0, v7, vcc_lo v_add_co_u32 v13, s0, v6, 2 v_sub_co_u32 v2, vcc_lo, v12, v2 v_add3_u32 v3, v3, v14, v8 v_add_co_ci_u32_e64 v15, s0, 0, v7, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v8, v11, v3 v_subrev_co_ci_u32_e64 v8, s0, s11, v8, vcc_lo v_sub_co_ci_u32_e32 v3, vcc_lo, v11, v3, vcc_lo v_cmp_le_u32_e32 vcc_lo, s10, v2 v_sub_co_u32 v12, s0, v2, s10 v_cndmask_b32_e64 v2, 0, -1, vcc_lo v_subrev_co_ci_u32_e64 v8, vcc_lo, 0, v8, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_le_u32_e32 vcc_lo, s10, v12 v_cmp_le_u32_e64 s0, s11, v8 v_cndmask_b32_e64 v11, 0, -1, vcc_lo v_cmp_le_u32_e32 vcc_lo, s11, v3 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v12, 0, -1, s0 v_cndmask_b32_e64 v14, 0, -1, vcc_lo v_cmp_eq_u32_e32 vcc_lo, s11, v8 v_cndmask_b32_e32 v8, v12, v11, vcc_lo v_cmp_eq_u32_e32 vcc_lo, s11, v3 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v2, v14, v2, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v8 v_xor_b32_e32 v8, s8, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_ne_u32_e64 s0, 0, v2 v_dual_cndmask_b32 v3, v16, v15 :: v_dual_cndmask_b32 v2, v9, v13 v_cndmask_b32_e64 v3, v7, v3, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v2, v6, v2, s0 v_xor_b32_e32 v3, v3, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_xor_b32_e32 v2, v2, v8 v_sub_co_u32 v2, vcc_lo, v2, v8 s_delay_alu instid0(VALU_DEP_3) v_sub_co_ci_u32_e32 v3, vcc_lo, v3, v8, vcc_lo s_cbranch_scc1 .LBB9_2 .LBB9_3: ; %._crit_edge s_mov_b32 s0, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u64_e32 0, v[2:3] s_cbranch_execz .LBB9_26 ; %bb.4: v_mov_b32_e32 v7, s12 s_and_not1_b32 vcc_lo, exec_lo, s14 s_ashr_i32 s8, s12, 31 s_cbranch_vccnz .LBB9_7 ; %bb.5: ; %.lr.ph100.preheader v_add_co_u32 v2, s0, s13, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e64 v3, null, s1, 0, s0 s_mov_b32 s9, 0 v_add_co_u32 v4, vcc_lo, v2, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, 0, v3, vcc_lo v_mul_lo_u32 v6, v4, s8 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mul_lo_u32 v5, v2, s12 v_mad_u64_u32 v[2:3], null, v4, s12, 0 v_add3_u32 v3, v3, v6, v5 v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, v1 v_mov_b32_e32 v4, v0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[2:3] v_add_co_u32 v2, vcc_lo, s16, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo .LBB9_6: ; %.lr.ph100 ; =>This Inner Loop Header: Depth=1 global_load_b32 v7, v6, s[20:21] v_ashrrev_i32_e32 v13, 31, v5 s_add_i32 s9, s9, 1 s_add_u32 s20, s20, 4 s_addc_u32 s21, s21, 0 s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v8, 31, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[9:10], 2, v[7:8] v_add_co_u32 v9, vcc_lo, s6, v9 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo v_add_co_u32 v4, vcc_lo, v4, v13 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v13, vcc_lo global_load_b32 v11, v[9:10], off v_xor_b32_e32 v15, v4, v13 v_xor_b32_e32 v14, v5, v13 v_lshlrev_b64 v[4:5], 3, v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, s4, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v4 v_readfirstlane_b32 s1, v5 s_load_b64 s[2:3], s[0:1], 0x0 s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v4, 31, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v11, v4 v_add_co_ci_u32_e32 v7, vcc_lo, v4, v4, vcc_lo v_xor_b32_e32 v16, v5, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v17, v7, v4 v_cvt_f32_u32_e32 v4, v16 v_sub_co_u32 v7, vcc_lo, 0, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cvt_f32_u32_e32 v5, v17 v_sub_co_ci_u32_e32 v8, vcc_lo, 0, v17, vcc_lo v_fmac_f32_e32 v4, 0x4f800000, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v4, v4 s_waitcnt_depctr 0xfff v_mul_f32_e32 v4, 0x5f7ffffc, v4 v_mul_f32_e32 v5, 0x2f800000, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_trunc_f32_e32 v5, v5 v_fmac_f32_e32 v4, 0xcf800000, v5 v_cvt_u32_f32_e32 v5, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_u32_f32_e32 v4, v4 v_mul_lo_u32 v11, v7, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mul_hi_u32 v12, v7, v4 v_mul_lo_u32 v19, v8, v4 v_mul_lo_u32 v18, v7, v4 v_add_nc_u32_e32 v11, v12, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_mul_hi_u32 v12, v4, v18 v_mul_hi_u32 v20, v5, v18 v_mul_lo_u32 v18, v5, v18 v_add_nc_u32_e32 v11, v11, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_mul_lo_u32 v19, v4, v11 v_mul_hi_u32 v21, v4, v11 v_mul_hi_u32 v22, v5, v11 v_mul_lo_u32 v11, v5, v11 v_add_co_u32 v12, vcc_lo, v12, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v19, vcc_lo, 0, v21, vcc_lo v_add_co_u32 v12, vcc_lo, v12, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, v19, v20, vcc_lo v_add_co_ci_u32_e32 v18, vcc_lo, 0, v22, vcc_lo v_add_co_u32 v11, vcc_lo, v12, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, 0, v18, vcc_lo v_add_co_u32 v4, vcc_lo, v4, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v5, v12, vcc_lo v_mul_lo_u32 v11, v7, v4 v_mul_hi_u32 v12, v7, v4 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_mul_lo_u32 v7, v7, v5 v_mul_lo_u32 v8, v8, v4 v_mul_hi_u32 v18, v5, v11 v_mul_lo_u32 v19, v5, v11 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v7, v12, v7 v_mul_hi_u32 v11, v4, v11 v_add_nc_u32_e32 v7, v7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_mul_lo_u32 v8, v4, v7 v_mul_hi_u32 v12, v4, v7 v_mul_hi_u32 v20, v5, v7 v_mul_lo_u32 v7, v5, v7 v_add_co_u32 v8, vcc_lo, v11, v8 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v11, vcc_lo, 0, v12, vcc_lo v_add_co_u32 v8, vcc_lo, v8, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, v11, v18, vcc_lo v_add_co_ci_u32_e32 v11, vcc_lo, 0, v20, vcc_lo v_add_co_u32 v7, vcc_lo, v8, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, 0, v11, vcc_lo v_add_co_u32 v7, vcc_lo, v4, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v18, vcc_lo, v5, v8, vcc_lo v_mul_hi_u32 v19, v15, v7 v_mad_u64_u32 v[4:5], null, v14, v7, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[7:8], null, v15, v18, 0 v_mad_u64_u32 v[11:12], null, v14, v18, 0 v_add_co_u32 v7, vcc_lo, v19, v7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo v_add_co_u32 v4, vcc_lo, v7, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v8, v5, vcc_lo v_add_co_ci_u32_e32 v5, vcc_lo, 0, v12, vcc_lo v_add_co_u32 v7, vcc_lo, v4, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, 0, v5, vcc_lo v_mul_lo_u32 v11, v17, v7 v_mad_u64_u32 v[4:5], null, v16, v7, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v7, v16, v8 v_sub_co_u32 v4, vcc_lo, v15, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v5, v5, v7, v11 v_sub_nc_u32_e32 v7, v14, v5 s_delay_alu instid0(VALU_DEP_1) v_sub_co_ci_u32_e64 v7, s0, v7, v17, vcc_lo v_sub_co_ci_u32_e32 v5, vcc_lo, v14, v5, vcc_lo v_cmp_ge_u32_e32 vcc_lo, v4, v16 v_sub_co_u32 v8, s0, v4, v16 v_cndmask_b32_e64 v11, 0, -1, vcc_lo v_subrev_co_ci_u32_e64 v12, vcc_lo, 0, v7, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_ge_u32_e32 vcc_lo, v8, v16 v_cmp_ge_u32_e64 s1, v12, v17 v_cndmask_b32_e64 v18, 0, -1, vcc_lo v_sub_co_ci_u32_e64 v7, vcc_lo, v7, v17, s0 v_sub_co_u32 v16, vcc_lo, v8, v16 v_cmp_ge_u32_e64 s0, v5, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo v_cndmask_b32_e64 v20, 0, -1, s1 v_cmp_eq_u32_e32 vcc_lo, v12, v17 v_cndmask_b32_e64 v19, 0, -1, s0 v_cmp_eq_u32_e64 s0, v5, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v17, v20, v18, vcc_lo v_cndmask_b32_e64 v11, v19, v11, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_ne_u32_e32 vcc_lo, 0, v17 v_cmp_ne_u32_e64 s0, 0, v11 v_cndmask_b32_e32 v8, v8, v16, vcc_lo v_cndmask_b32_e32 v7, v12, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v4, v4, v8, s0 v_cndmask_b32_e64 v5, v5, v7, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v4, v4, v13 v_xor_b32_e32 v5, v5, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_co_u32 v4, vcc_lo, v4, v13 v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], 2, v[4:5] s_waitcnt lgkmcnt(0) v_add_co_u32 v4, vcc_lo, s2, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo global_load_b32 v4, v[4:5], off s_waitcnt vmcnt(0) global_store_b32 v[2:3], v4, off global_load_b32 v4, v[9:10], off global_load_b32 v7, v6, s[22:23] v_add_co_u32 v2, s0, v2, 4 s_waitcnt vmcnt(1) v_ashrrev_i32_e32 v12, 31, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v4, v12 v_add_co_ci_u32_e32 v5, vcc_lo, v12, v12, vcc_lo v_xor_b32_e32 v16, v4, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v17, v5, v12 v_cvt_f32_u32_e32 v4, v16 v_sub_co_u32 v8, vcc_lo, 0, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cvt_f32_u32_e32 v5, v17 v_sub_co_ci_u32_e32 v9, vcc_lo, 0, v17, vcc_lo v_fmac_f32_e32 v4, 0x4f800000, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v4, v4 s_waitcnt_depctr 0xfff v_mul_f32_e32 v4, 0x5f7ffffc, v4 v_mul_f32_e32 v5, 0x2f800000, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_trunc_f32_e32 v5, v5 v_fmac_f32_e32 v4, 0xcf800000, v5 v_cvt_u32_f32_e32 v5, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_u32_f32_e32 v4, v4 v_mul_lo_u32 v10, v8, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mul_hi_u32 v11, v8, v4 v_mul_lo_u32 v19, v9, v4 v_mul_lo_u32 v18, v8, v4 v_add_nc_u32_e32 v10, v11, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_mul_hi_u32 v11, v4, v18 v_mul_hi_u32 v20, v5, v18 v_mul_lo_u32 v18, v5, v18 v_add_nc_u32_e32 v10, v10, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_mul_lo_u32 v19, v4, v10 v_mul_hi_u32 v21, v4, v10 v_mul_hi_u32 v22, v5, v10 v_mul_lo_u32 v10, v5, v10 v_add_co_u32 v11, vcc_lo, v11, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v19, vcc_lo, 0, v21, vcc_lo v_add_co_u32 v11, vcc_lo, v11, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v11, vcc_lo, v19, v20, vcc_lo v_add_co_ci_u32_e32 v18, vcc_lo, 0, v22, vcc_lo v_add_co_u32 v10, vcc_lo, v11, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v11, vcc_lo, 0, v18, vcc_lo v_add_co_u32 v4, vcc_lo, v4, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v5, v11, vcc_lo v_mul_lo_u32 v10, v8, v4 v_mul_hi_u32 v11, v8, v4 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_mul_lo_u32 v8, v8, v5 v_mul_lo_u32 v9, v9, v4 v_mul_hi_u32 v18, v5, v10 v_mul_lo_u32 v19, v5, v10 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v8, v11, v8 v_mul_hi_u32 v10, v4, v10 v_add_nc_u32_e32 v8, v8, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_mul_lo_u32 v9, v4, v8 v_mul_hi_u32 v11, v4, v8 v_mul_hi_u32 v20, v5, v8 v_mul_lo_u32 v8, v5, v8 v_add_co_u32 v9, vcc_lo, v10, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v10, vcc_lo, 0, v11, vcc_lo v_add_co_u32 v9, vcc_lo, v9, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v10, v18, vcc_lo v_add_co_ci_u32_e32 v10, vcc_lo, 0, v20, vcc_lo v_add_co_u32 v8, vcc_lo, v9, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, 0, v10, vcc_lo v_add_co_u32 v8, vcc_lo, v4, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v18, vcc_lo, v5, v9, vcc_lo v_mul_hi_u32 v19, v15, v8 v_mad_u64_u32 v[4:5], null, v14, v8, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[8:9], null, v15, v18, 0 v_mad_u64_u32 v[10:11], null, v14, v18, 0 v_add_co_u32 v8, vcc_lo, v19, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v9, v5, vcc_lo v_add_co_ci_u32_e32 v5, vcc_lo, 0, v11, vcc_lo v_add_co_u32 v8, vcc_lo, v4, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, 0, v5, vcc_lo v_mul_lo_u32 v10, v17, v8 v_mad_u64_u32 v[4:5], null, v16, v8, 0 s_delay_alu instid0(VALU_DEP_3) v_mul_lo_u32 v19, v16, v9 v_add_co_u32 v11, vcc_lo, v8, 1 v_add_co_ci_u32_e32 v21, vcc_lo, 0, v9, vcc_lo v_add_co_u32 v18, s1, v8, 2 v_sub_co_u32 v4, vcc_lo, v15, v4 v_add3_u32 v5, v5, v19, v10 v_add_co_ci_u32_e64 v20, s1, 0, v9, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v10, v14, v5 v_sub_co_ci_u32_e64 v10, s1, v10, v17, vcc_lo v_sub_co_ci_u32_e32 v5, vcc_lo, v14, v5, vcc_lo v_cmp_ge_u32_e32 vcc_lo, v4, v16 v_sub_co_u32 v15, s1, v4, v16 v_cndmask_b32_e64 v4, 0, -1, vcc_lo v_subrev_co_ci_u32_e64 v10, vcc_lo, 0, v10, s1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_ge_u32_e32 vcc_lo, v15, v16 v_cmp_ge_u32_e64 s1, v10, v17 v_cndmask_b32_e64 v14, 0, -1, vcc_lo v_cmp_ge_u32_e32 vcc_lo, v5, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v15, 0, -1, s1 v_cndmask_b32_e64 v16, 0, -1, vcc_lo v_cmp_eq_u32_e32 vcc_lo, v10, v17 v_cndmask_b32_e32 v10, v15, v14, vcc_lo v_cmp_eq_u32_e32 vcc_lo, v5, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v4, v16, v4, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v10 v_xor_b32_e32 v10, v13, v12 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_cmp_ne_u32_e64 s1, 0, v4 v_dual_cndmask_b32 v5, v21, v20 :: v_dual_cndmask_b32 v4, v11, v18 v_add_co_ci_u32_e64 v3, vcc_lo, 0, v3, s0 s_waitcnt vmcnt(0) v_cmp_ge_i32_e32 vcc_lo, s9, v7 v_cndmask_b32_e64 v5, v9, v5, s1 v_cndmask_b32_e64 v4, v8, v4, s1 s_and_b32 vcc_lo, exec_lo, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v5, v5, v10 v_xor_b32_e32 v4, v4, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_co_u32 v4, s0, v4, v10 v_sub_co_ci_u32_e64 v5, s0, v5, v10, s0 s_cbranch_vccz .LBB9_6 .LBB9_7: ; %Flow190 v_mul_lo_u32 v4, v1, s12 v_mul_lo_u32 v5, v0, s8 v_mad_u64_u32 v[2:3], null, v0, s12, 0 v_max_i32_e32 v10, 0, v7 v_mov_b32_e32 v13, 0 s_mov_b32 s3, exec_lo s_mov_b32 s8, 0 s_mov_b32 s4, 0 ; implicit-def: $sgpr9 ; implicit-def: $sgpr10 ; implicit-def: $sgpr11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v3, v3, v5, v4 v_lshlrev_b64 v[2:3], 2, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, s16, v2 v_add_co_ci_u32_e32 v12, vcc_lo, s17, v3, vcc_lo .LBB9_8: ; =>This Loop Header: Depth=1 ; Child Loop BB9_11 Depth 2 ; Child Loop BB9_13 Depth 3 v_cmp_eq_u32_e32 vcc_lo, s4, v10 s_mov_b32 s0, -1 s_and_not1_b32 s11, s11, exec_lo s_or_b32 s5, s5, exec_lo s_cbranch_vccnz .LBB9_22 ; %bb.9: ; in Loop: Header=BB9_8 Depth=1 s_mov_b32 s5, 0 s_mov_b32 s11, s3 s_lshl_b64 s[0:1], s[4:5], 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) s_add_u32 s6, s26, s0 s_addc_u32 s7, s27, s1 global_load_b64 v[2:3], v13, s[6:7] s_waitcnt vmcnt(0) v_readfirstlane_b32 s6, v2 v_cmp_ge_i32_e32 vcc_lo, s6, v3 s_cbranch_vccnz .LBB9_21 ; %bb.10: ; %.lr.ph113 ; in Loop: Header=BB9_8 Depth=1 v_add_co_u32 v4, vcc_lo, v11, s0 v_add_co_ci_u32_e32 v5, vcc_lo, s1, v12, vcc_lo s_mov_b32 s12, 0 ; implicit-def: $sgpr11 ; implicit-def: $sgpr13 ; implicit-def: $sgpr15 ; implicit-def: $sgpr14 global_load_b32 v4, v[4:5], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v5, 31, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], 2, v[4:5] v_add_co_u32 v4, vcc_lo, s28, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, s29, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v7, 31, v4 v_mov_b32_e32 v6, v4 v_cmp_ge_i32_e32 vcc_lo, v4, v5 v_cmp_lt_i32_e64 s0, v4, v5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[6:7], 2, v[6:7] v_add_co_u32 v6, s1, s30, v6 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v7, s1, s31, v7, s1 .LBB9_11: ; Parent Loop BB9_8 Depth=1 ; => This Loop Header: Depth=2 ; Child Loop BB9_13 Depth 3 s_and_not1_b32 s1, s15, exec_lo s_and_b32 s2, vcc_lo, exec_lo s_and_not1_b32 s14, s14, exec_lo s_or_b32 s15, s1, s2 s_or_b32 s13, s13, exec_lo s_and_saveexec_b32 s16, s0 s_cbranch_execz .LBB9_19 ; %bb.12: ; %.lr.ph105.preheader ; in Loop: Header=BB9_11 Depth=2 s_ashr_i32 s7, s6, 31 v_mov_b32_e32 v14, v4 s_lshl_b64 s[20:21], s[6:7], 2 ; implicit-def: $sgpr17 ; implicit-def: $sgpr7 ; implicit-def: $sgpr23 ; implicit-def: $sgpr22 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s20, s24, s20 s_addc_u32 s21, s25, s21 global_load_b32 v8, v13, s[20:21] s_mov_b32 s20, 0 ; implicit-def: $sgpr21 s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v9, 31, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], 2, v[8:9] v_add_co_u32 v8, s1, v11, v8 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v9, s1, v12, v9, s1 global_load_b32 v2, v[8:9], off v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 .LBB9_13: ; %.lr.ph105 ; Parent Loop BB9_8 Depth=1 ; Parent Loop BB9_11 Depth=2 ; => This Inner Loop Header: Depth=3 global_load_b32 v15, v[8:9], off s_or_b32 s22, s22, exec_lo s_or_b32 s23, s23, exec_lo s_mov_b32 s34, exec_lo ; implicit-def: $sgpr33 ; implicit-def: $sgpr2 s_waitcnt vmcnt(0) v_cmpx_ne_u32_e64 v2, v15 ; %bb.14: ; in Loop: Header=BB9_13 Depth=3 v_add_nc_u32_e32 v14, 1, v14 v_add_co_u32 v8, s2, v8, 4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e64 v9, s2, 0, v9, s2 v_cmp_ge_i32_e64 s1, v14, v5 s_and_not1_b32 s23, s23, exec_lo s_mov_b32 s33, -1 s_mov_b32 s2, 0 s_and_not1_b32 s22, s22, exec_lo s_and_b32 s1, s1, exec_lo s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s23, s23, s1 ; %bb.15: ; %Flow183 ; in Loop: Header=BB9_13 Depth=3 s_or_b32 exec_lo, exec_lo, s34 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, exec_lo, s23 s_or_b32 s20, s1, s20 s_and_not1_b32 s1, s21, exec_lo s_and_b32 s21, s22, exec_lo s_and_not1_b32 s7, s7, exec_lo s_or_b32 s21, s1, s21 s_and_b32 s1, s33, exec_lo s_and_not1_b32 s17, s17, exec_lo s_and_b32 s2, s2, exec_lo s_or_b32 s7, s7, s1 s_or_b32 s17, s17, s2 s_and_not1_b32 exec_lo, exec_lo, s20 s_cbranch_execnz .LBB9_13 ; %bb.16: ; %loop.exit.guard180 ; in Loop: Header=BB9_11 Depth=2 s_or_b32 exec_lo, exec_lo, s20 s_mov_b32 s1, -1 s_and_saveexec_b32 s2, s21 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s2, exec_lo, s2 ; %bb.17: ; in Loop: Header=BB9_11 Depth=2 s_add_i32 s6, s6, 1 s_and_not1_b32 s17, s17, exec_lo v_cmp_ge_i32_e64 s1, s6, v3 s_and_b32 s20, s3, exec_lo s_and_not1_b32 s7, s7, exec_lo s_and_b32 s21, vcc_lo, exec_lo s_or_b32 s17, s17, s20 s_or_b32 s7, s7, s21 s_or_not1_b32 s1, s1, exec_lo ; %bb.18: ; %Flow185 ; in Loop: Header=BB9_11 Depth=2 s_or_b32 exec_lo, exec_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s2, s14, exec_lo s_and_b32 s14, s17, exec_lo s_and_b32 s7, s7, exec_lo s_or_b32 s14, s2, s14 s_and_not1_b32 s2, s15, exec_lo s_and_not1_b32 s13, s13, exec_lo s_and_b32 s1, s1, exec_lo s_or_b32 s15, s2, s7 s_or_b32 s13, s13, s1 .LBB9_19: ; %Flow184 ; in Loop: Header=BB9_11 Depth=2 s_or_b32 exec_lo, exec_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, exec_lo, s13 s_or_b32 s12, s1, s12 s_and_not1_b32 s1, s11, exec_lo s_and_b32 s2, s14, exec_lo s_and_not1_b32 s5, s5, exec_lo s_and_b32 s7, s15, exec_lo s_or_b32 s11, s1, s2 s_or_b32 s5, s5, s7 s_and_not1_b32 exec_lo, exec_lo, s12 s_cbranch_execnz .LBB9_11 ; %bb.20: ; %Flow186 ; in Loop: Header=BB9_8 Depth=1 s_or_b32 exec_lo, exec_lo, s12 .LBB9_21: ; %.critedge ; in Loop: Header=BB9_8 Depth=1 s_add_i32 s4, s4, 1 s_mov_b32 s0, 0 .LBB9_22: ; %Flow188 ; in Loop: Header=BB9_8 Depth=1 s_and_b32 s1, exec_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s8, s1, s8 s_and_not1_b32 s1, s3, exec_lo s_and_b32 s2, s11, exec_lo s_and_not1_b32 s6, s10, exec_lo s_or_b32 s1, s1, s2 s_and_b32 s0, s0, exec_lo s_and_not1_b32 s2, s9, exec_lo s_and_b32 s3, s3, exec_lo s_or_b32 s10, s6, s0 s_or_b32 s9, s2, s3 s_mov_b32 s3, s1 s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB9_8 ; %bb.23: ; %loop.exit.guard s_or_b32 exec_lo, exec_lo, s8 s_and_saveexec_b32 s0, s10 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s0, exec_lo, s0 s_cbranch_execz .LBB9_26 ; %bb.24: s_and_b32 exec_lo, exec_lo, s9 s_cbranch_execz .LBB9_26 ; %bb.25: v_lshlrev_b64 v[0:1], 2, v[0:1] v_mov_b32_e32 v2, 1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, s18, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo global_store_b32 v[0:1], v2, off .LBB9_26: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7findallPiS_S_S_S_S_S_S_PS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 336 .amdhsa_user_sgpr_count 13 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 1 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 2 .amdhsa_next_free_vgpr 23 .amdhsa_next_free_sgpr 35 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end9: .size _Z7findallPiS_S_S_S_S_S_S_PS_S_, .Lfunc_end9-_Z7findallPiS_S_S_S_S_S_S_PS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 4016 ; NumSgprs: 37 ; NumVgprs: 23 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 37 ; NumVGPRsForWavesPerEU: 23 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 13 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .type __unnamed_1,@object ; @0 .section .rodata,"a",@progbits .p2align 2, 0x0 __unnamed_1: .long 130054 ; 0x1fc06 .long 129546 ; 0x1fa0a .long 110114 ; 0x1ae22 .long 16288 ; 0x3fa0 .long 6 ; 0x6 .long 256 ; 0x100 .long 0 ; 0x0 .long 4195 ; 0x1063 .long 86927 ; 0x1538f .long 86758 ; 0x152e6 .long 73744 ; 0x12010 .long 10904 ; 0x2a98 .long 399 ; 0x18f .long 512 ; 0x200 .long 0 ; 0x0 .long 2804 ; 0xaf4 .long 65280 ; 0xff00 .long 64770 ; 0xfd02 .long 55054 ; 0xd70e .long 8192 ; 0x2000 .long 0 ; 0x0 .long 128 ; 0x80 .long 0 ; 0x0 .long 2107 ; 0x83b .long 43576 ; 0xaa38 .long 43406 ; 0xa98e .long 36895 ; 0x901f .long 5504 ; 0x1580 .long 56 ; 0x38 .long 256 ; 0x100 .long 0 ; 0x0 .long 1405 ; 0x57d .long 32703 ; 0x7fbf .long 32193 ; 0x7dc1 .long 27364 ; 0x6ae4 .long 4160 ; 0x1040 .long 63 ; 0x3f .long 64 ; 0x40 .long 0 ; 0x0 .long 1054 ; 0x41e .long 21816 ; 0x5538 .long 21646 ; 0x548e .long 18399 ; 0x47df .long 2816 ; 0xb00 .long 56 ; 0x38 .long 128 ; 0x80 .long 0 ; 0x0 .long 703 ; 0x2bf .long 16367 ; 0x3fef .long 15856 ; 0x3df0 .long 13477 ; 0x34a5 .long 2176 ; 0x880 .long 15 ; 0xf .long 32 ; 0x20 .long 32768 ; 0x8000 .long 527 ; 0x20f .long 10915 ; 0x2aa3 .long 10745 ; 0x29f9 .long 9133 ; 0x23ad .long 1472 ; 0x5c0 .long 35 ; 0x23 .long 64 ; 0x40 .long 0 ; 0x0 .long 352 ; 0x160 .long 8187 ; 0x1ffb .long 7676 ; 0x1dfc .long 6524 ; 0x197c .long 1280 ; 0x500 .long 11 ; 0xb .long 16 ; 0x10 .long 134219776 ; 0x8000800 .long 265 ; 0x109 .long 5459 ; 0x1553 .long 5289 ; 0x14a9 .long 4495 ; 0x118f .long 896 ; 0x380 .long 19 ; 0x13 .long 32 ; 0x20 .long 524288 ; 0x80000 .long 176 ; 0xb0 .long 4094 ; 0xffe .long 3583 ; 0xdff .long 3045 ; 0xbe5 .long 1024 ; 0x400 .long 6 ; 0x6 .long 8 ; 0x8 .long 1077952576 ; 0x40404040 .long 133 ; 0x85 .long 2730 ; 0xaaa .long 2560 ; 0xa00 .long 2176 ; 0x880 .long 512 ; 0x200 .long 10 ; 0xa .long 16 ; 0x10 .long 67109888 ; 0x4000400 .long 89 ; 0x59 .long 2047 ; 0x7ff .long 1536 ; 0x600 .long 1305 ; 0x519 .long 1024 ; 0x400 .long 3 ; 0x3 .long 4 ; 0x4 .long 2290649224 ; 0x88888888 .long 66 ; 0x42 .long 1365 ; 0x555 .long 1195 ; 0x4ab .long 1015 ; 0x3f7 .long 512 ; 0x200 .long 5 ; 0x5 .long 8 ; 0x8 .long 538976288 ; 0x20202020 .long 44 ; 0x2c .long 1023 ; 0x3ff .long 512 ; 0x200 .long 435 ; 0x1b3 .long 2048 ; 0x800 .long 1 ; 0x1 .long 2 ; 0x2 .long 2863311530 ; 0xaaaaaaaa .long 34 ; 0x22 .long 682 ; 0x2aa .long 512 ; 0x200 .long 435 ; 0x1b3 .long 2048 ; 0x800 .long 2 ; 0x2 .long 4 ; 0x4 .long 1145324612 ; 0x44444444 .long 35 ; 0x23 .size __unnamed_1, 512 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .offset: 64 .size: 4 .value_kind: hidden_block_count_x - .offset: 68 .size: 4 .value_kind: hidden_block_count_y - .offset: 72 .size: 4 .value_kind: hidden_block_count_z - .offset: 76 .size: 2 .value_kind: hidden_group_size_x - .offset: 78 .size: 2 .value_kind: hidden_group_size_y - .offset: 80 .size: 2 .value_kind: hidden_group_size_z - .offset: 82 .size: 2 .value_kind: hidden_remainder_x - .offset: 84 .size: 2 .value_kind: hidden_remainder_y - .offset: 86 .size: 2 .value_kind: hidden_remainder_z - .offset: 104 .size: 8 .value_kind: hidden_global_offset_x - .offset: 112 .size: 8 .value_kind: hidden_global_offset_y - .offset: 120 .size: 8 .value_kind: hidden_global_offset_z - .offset: 128 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 320 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z8findhashPiS_S_S_PbS0_S_S_ .private_segment_fixed_size: 0 .sgpr_count: 34 .sgpr_spill_count: 0 .symbol: _Z8findhashPiS_S_S_PbS0_S_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 21 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7setdeg1PiS_S_Pb .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z7setdeg1PiS_S_Pb.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .offset: 56 .size: 4 .value_kind: hidden_block_count_x - .offset: 60 .size: 4 .value_kind: hidden_block_count_y - .offset: 64 .size: 4 .value_kind: hidden_block_count_z - .offset: 68 .size: 2 .value_kind: hidden_group_size_x - .offset: 70 .size: 2 .value_kind: hidden_group_size_y - .offset: 72 .size: 2 .value_kind: hidden_group_size_z - .offset: 74 .size: 2 .value_kind: hidden_remainder_x - .offset: 76 .size: 2 .value_kind: hidden_remainder_y - .offset: 78 .size: 2 .value_kind: hidden_remainder_z - .offset: 96 .size: 8 .value_kind: hidden_global_offset_x - .offset: 104 .size: 8 .value_kind: hidden_global_offset_y - .offset: 112 .size: 8 .value_kind: hidden_global_offset_z - .offset: 120 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 312 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7puttoidPiS_S_S_PbS_S_ .private_segment_fixed_size: 0 .sgpr_count: 26 .sgpr_spill_count: 0 .symbol: _Z7puttoidPiS_S_S_PbS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 18 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .offset: 64 .size: 4 .value_kind: hidden_block_count_x - .offset: 68 .size: 4 .value_kind: hidden_block_count_y - .offset: 72 .size: 4 .value_kind: hidden_block_count_z - .offset: 76 .size: 2 .value_kind: hidden_group_size_x - .offset: 78 .size: 2 .value_kind: hidden_group_size_y - .offset: 80 .size: 2 .value_kind: hidden_group_size_z - .offset: 82 .size: 2 .value_kind: hidden_remainder_x - .offset: 84 .size: 2 .value_kind: hidden_remainder_y - .offset: 86 .size: 2 .value_kind: hidden_remainder_z - .offset: 104 .size: 8 .value_kind: hidden_global_offset_x - .offset: 112 .size: 8 .value_kind: hidden_global_offset_y - .offset: 120 .size: 8 .value_kind: hidden_global_offset_z - .offset: 128 .size: 2 .value_kind: hidden_grid_dims - .offset: 144 .size: 8 .value_kind: hidden_hostcall_buffer - .offset: 160 .size: 8 .value_kind: hidden_heap_v1 .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 320 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7findcvsiPiS_S_S_S_S_PS_ .private_segment_fixed_size: 112 .sgpr_count: 66 .sgpr_spill_count: 0 .symbol: _Z7findcvsiPiS_S_S_S_S_PS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: true .vgpr_count: 136 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9puttolistPiS_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z9puttolistPiS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 5 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .offset: 56 .size: 4 .value_kind: hidden_block_count_x - .offset: 60 .size: 4 .value_kind: hidden_block_count_y - .offset: 64 .size: 4 .value_kind: hidden_block_count_z - .offset: 68 .size: 2 .value_kind: hidden_group_size_x - .offset: 70 .size: 2 .value_kind: hidden_group_size_y - .offset: 72 .size: 2 .value_kind: hidden_group_size_z - .offset: 74 .size: 2 .value_kind: hidden_remainder_x - .offset: 76 .size: 2 .value_kind: hidden_remainder_y - .offset: 78 .size: 2 .value_kind: hidden_remainder_z - .offset: 96 .size: 8 .value_kind: hidden_global_offset_x - .offset: 104 .size: 8 .value_kind: hidden_global_offset_y - .offset: 112 .size: 8 .value_kind: hidden_global_offset_z - .offset: 120 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 312 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9checkpermPbPiS0_S0_S0_S0_S0_ .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z9checkpermPbPiS0_S0_S0_S0_S0_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 64 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 72 .size: 8 .value_kind: global_buffer - .offset: 80 .size: 4 .value_kind: hidden_block_count_x - .offset: 84 .size: 4 .value_kind: hidden_block_count_y - .offset: 88 .size: 4 .value_kind: hidden_block_count_z - .offset: 92 .size: 2 .value_kind: hidden_group_size_x - .offset: 94 .size: 2 .value_kind: hidden_group_size_y - .offset: 96 .size: 2 .value_kind: hidden_group_size_z - .offset: 98 .size: 2 .value_kind: hidden_remainder_x - .offset: 100 .size: 2 .value_kind: hidden_remainder_y - .offset: 102 .size: 2 .value_kind: hidden_remainder_z - .offset: 120 .size: 8 .value_kind: hidden_global_offset_x - .offset: 128 .size: 8 .value_kind: hidden_global_offset_y - .offset: 136 .size: 8 .value_kind: hidden_global_offset_z - .offset: 144 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 336 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7findallPiS_S_S_S_S_S_S_PS_S_ .private_segment_fixed_size: 0 .sgpr_count: 37 .sgpr_spill_count: 0 .symbol: _Z7findallPiS_S_S_S_S_S_S_PS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 23 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
a02a5d0a1f435bc349c30e2f1efc5b1ff68fcf4f
#include <stdio.h> #include <cuda.h> __global__ void vecmul(float *A, float* B, float *C, int size) { // Row and Column indexes: int row = blockIdx.y * blockDim.y + threadIdx.y; int col = blockIdx.x * blockDim.x + threadIdx.x; // Are they bellow the maximum? if (col < size && row < size) { float result = 0; for(int ix = 0; ix < size; ix++) { result += A[row*size + ix]*B[ix*size + col]; } C[row*size + col] = result; } } extern "C" { void maxmul(float *A, float* B, float *C, int size) { int total = size*size; // Allocate device memory: float* gpu_A; float* gpu_B; float* gpu_C; int msize = total * sizeof(float); cudaMalloc((void**)&gpu_A, msize); cudaMemcpy(gpu_A, A, msize, cudaMemcpyHostToDevice); cudaMalloc((void**)&gpu_B, msize); cudaMemcpy(gpu_B, B, msize, cudaMemcpyHostToDevice); cudaMalloc((void**)&gpu_C, msize); // Blocks & grids: dim3 blocks(size, size); dim3 grid(1, 1); // Call the kernel: vecmul<<<grid,blocks>>>(gpu_A, gpu_B, gpu_C, size); // Get the result Matrix: cudaMemcpy(C, gpu_C, msize, cudaMemcpyDeviceToHost); //Free device matrices cudaFree(gpu_A); cudaFree(gpu_B); cudaFree(gpu_C); } }
.file "tmpxft_00236fa5_00000000-6_maxmul.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z30__device_stub__Z6vecmulPfS_S_iPfS_S_i .type _Z30__device_stub__Z6vecmulPfS_S_iPfS_S_i, @function _Z30__device_stub__Z6vecmulPfS_S_iPfS_S_i: .LFB2052: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z6vecmulPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z30__device_stub__Z6vecmulPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6vecmulPfS_S_iPfS_S_i .globl _Z6vecmulPfS_S_i .type _Z6vecmulPfS_S_i, @function _Z6vecmulPfS_S_i: .LFB2053: .cfi_startproc endbr64 jmp _Z30__device_stub__Z6vecmulPfS_S_iPfS_S_i .cfi_endproc .LFE2053: .size _Z6vecmulPfS_S_i, .-_Z6vecmulPfS_S_i .globl maxmul .type maxmul, @function maxmul: .LFB2027: .cfi_startproc endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 movl %ecx, %r14d pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 movq %rdi, %r13 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 movq %rsi, %r12 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rdx, %rbp pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movl %ecx, %ebx imull %ecx, %ebx subq $64, %rsp .cfi_def_cfa_offset 112 movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax sall $2, %ebx leaq 8(%rsp), %rdi movslq %ebx, %rbx movq %rbx, %rsi call cudaMalloc@PLT movq 8(%rsp), %rdi movq %rbx, %rdx movq %r13, %rsi movl $1, %ecx call cudaMemcpy@PLT leaq 16(%rsp), %rdi movq %rbx, %rsi call cudaMalloc@PLT movq 16(%rsp), %rdi movq %rbx, %rdx movq %r12, %rsi movl $1, %ecx call cudaMemcpy@PLT leaq 24(%rsp), %rdi movq %rbx, %rsi call cudaMalloc@PLT movl %r14d, 32(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movl %r14d, 36(%rsp) movq 32(%rsp), %rdx movl $1, %ecx movabsq $4294967297, %rdi movl $1, %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movl %r14d, %ecx movq 8(%rsp), %rdi call _Z30__device_stub__Z6vecmulPfS_S_iPfS_S_i .L9: movq 24(%rsp), %rsi movl $2, %ecx movq %rbx, %rdx movq %rbp, %rdi call cudaMemcpy@PLT movq 8(%rsp), %rdi call cudaFree@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call cudaFree@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $64, %rsp .cfi_def_cfa_offset 48 popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size maxmul, .-maxmul .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z6vecmulPfS_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z6vecmulPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6vecmulPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R21, SR_CTAID.Y ; /* 0x0000000000157919 */ /* 0x000e280000002600 */ /*0020*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002200 */ /*0030*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e680000002500 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e620000002100 */ /*0050*/ IMAD R21, R21, c[0x0][0x4], R0 ; /* 0x0000010015157a24 */ /* 0x001fca00078e0200 */ /*0060*/ ISETP.GE.AND P0, PT, R21, c[0x0][0x178], PT ; /* 0x00005e0015007a0c */ /* 0x000fe20003f06270 */ /*0070*/ IMAD R0, R2, c[0x0][0x0], R3 ; /* 0x0000000002007a24 */ /* 0x002fca00078e0203 */ /*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */ /* 0x000fda0000706670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R19, c[0x0][0x178] ; /* 0x00005e0000137a02 */ /* 0x000fe20000000f00 */ /*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00c0*/ IMAD R21, R21, c[0x0][0x178], RZ ; /* 0x00005e0015157a24 */ /* 0x000fe200078e02ff */ /*00d0*/ MOV R34, RZ ; /* 0x000000ff00227202 */ /* 0x000fe40000000f00 */ /*00e0*/ ISETP.GE.AND P0, PT, R19, 0x1, PT ; /* 0x000000011300780c */ /* 0x000fda0003f06270 */ /*00f0*/ @!P0 BRA 0xc20 ; /* 0x00000b2000008947 */ /* 0x000fea0003800000 */ /*0100*/ IADD3 R2, R19.reuse, -0x1, RZ ; /* 0xffffffff13027810 */ /* 0x040fe40007ffe0ff */ /*0110*/ LOP3.LUT R20, R19, 0x3, RZ, 0xc0, !PT ; /* 0x0000000313147812 */ /* 0x000fe400078ec0ff */ /*0120*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */ /* 0x000fe40003f06070 */ /*0130*/ MOV R34, RZ ; /* 0x000000ff00227202 */ /* 0x000fe40000000f00 */ /*0140*/ MOV R18, RZ ; /* 0x000000ff00127202 */ /* 0x000fd20000000f00 */ /*0150*/ @!P0 BRA 0xb00 ; /* 0x000009a000008947 */ /* 0x000fea0003800000 */ /*0160*/ IADD3 R22, -R20, c[0x0][0x178], RZ ; /* 0x00005e0014167a10 */ /* 0x000fe20007ffe1ff */ /*0170*/ ULDC.64 UR6, c[0x0][0x160] ; /* 0x0000580000067ab9 */ /* 0x000fe20000000a00 */ /*0180*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe40000000f00 */ /*0190*/ ISETP.GT.AND P0, PT, R22, RZ, PT ; /* 0x000000ff1600720c */ /* 0x000fe40003f04270 */ /*01a0*/ MOV R34, RZ ; /* 0x000000ff00227202 */ /* 0x000fe20000000f00 */ /*01b0*/ IMAD.WIDE R6, R0, R7, c[0x0][0x168] ; /* 0x00005a0000067625 */ /* 0x000fe200078e0207 */ /*01c0*/ MOV R18, RZ ; /* 0x000000ff00127202 */ /* 0x000fd20000000f00 */ /*01d0*/ @!P0 BRA 0x970 ; /* 0x0000079000008947 */ /* 0x000fea0003800000 */ /*01e0*/ ISETP.GT.AND P1, PT, R22, 0xc, PT ; /* 0x0000000c1600780c */ /* 0x000fe40003f24270 */ /*01f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*0200*/ @!P1 BRA 0x6b0 ; /* 0x000004a000009947 */ /* 0x000fea0003800000 */ /*0210*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0220*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe20008000f00 */ /*0230*/ IMAD.WIDE R4, R19, 0x4, R6 ; /* 0x0000000413047825 */ /* 0x000fe200078e0206 */ /*0240*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fe20008000f00 */ /*0250*/ LDG.E R35, [R6.64] ; /* 0x0000000406237981 */ /* 0x0000a8000c1e1900 */ /*0260*/ IMAD.WIDE R2, R21, 0x4, R2 ; /* 0x0000000415027825 */ /* 0x000fe200078e0202 */ /*0270*/ LDG.E R27, [R4.64] ; /* 0x00000004041b7981 */ /* 0x0002e8000c1e1900 */ /*0280*/ LDG.E R36, [R2.64] ; /* 0x0000000402247981 */ /* 0x000ea2000c1e1900 */ /*0290*/ IMAD.WIDE R10, R19, 0x4, R4 ; /* 0x00000004130a7825 */ /* 0x000fc600078e0204 */ /*02a0*/ LDG.E R28, [R2.64+0x4] ; /* 0x00000404021c7981 */ /* 0x000ee6000c1e1900 */ /*02b0*/ IMAD.WIDE R12, R19.reuse, 0x4, R10 ; /* 0x00000004130c7825 */ /* 0x040fe200078e020a */ /*02c0*/ LDG.E R26, [R10.64] ; /* 0x000000040a1a7981 */ /* 0x000968000c1e1900 */ /*02d0*/ LDG.E R25, [R2.64+0x8] ; /* 0x0000080402197981 */ /* 0x000f68000c1e1900 */ /*02e0*/ LDG.E R24, [R12.64] ; /* 0x000000040c187981 */ /* 0x000168000c1e1900 */ /*02f0*/ LDG.E R23, [R2.64+0xc] ; /* 0x00000c0402177981 */ /* 0x000f62000c1e1900 */ /*0300*/ IMAD.WIDE R16, R19, 0x4, R12 ; /* 0x0000000413107825 */ /* 0x000fc600078e020c */ /*0310*/ LDG.E R30, [R2.64+0x10] ; /* 0x00001004021e7981 */ /* 0x000f66000c1e1900 */ /*0320*/ IMAD.WIDE R14, R19.reuse, 0x4, R16 ; /* 0x00000004130e7825 */ /* 0x040fe200078e0210 */ /*0330*/ LDG.E R29, [R16.64] ; /* 0x00000004101d7981 */ /* 0x000168000c1e1900 */ /*0340*/ LDG.E R31, [R2.64+0x14] ; /* 0x00001404021f7981 */ /* 0x000f62000c1e1900 */ /*0350*/ IMAD.WIDE R8, R19, 0x4, R14 ; /* 0x0000000413087825 */ /* 0x000fc600078e020e */ /*0360*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000966000c1e1900 */ /*0370*/ IMAD.WIDE R4, R19.reuse, 0x4, R8 ; /* 0x0000000413047825 */ /* 0x042fe200078e0208 */ /*0380*/ LDG.E R32, [R8.64] ; /* 0x0000000408207981 */ /* 0x000368000c1e1900 */ /*0390*/ LDG.E R33, [R2.64+0x18] ; /* 0x0000180402217981 */ /* 0x000f62000c1e1900 */ /*03a0*/ IMAD.WIDE R6, R19, 0x4, R4 ; /* 0x0000000413067825 */ /* 0x001fc600078e0204 */ /*03b0*/ LDG.E R15, [R4.64] ; /* 0x00000004040f7981 */ /* 0x010126000c1e1900 */ /*03c0*/ IMAD.WIDE R10, R19.reuse, 0x4, R6 ; /* 0x00000004130a7825 */ /* 0x040fe200078e0206 */ /*03d0*/ LDG.E R37, [R2.64+0x1c] ; /* 0x00001c0402257981 */ /* 0x000f28000c1e1900 */ /*03e0*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000122000c1e1900 */ /*03f0*/ IMAD.WIDE R12, R19, 0x4, R10 ; /* 0x00000004130c7825 */ /* 0x000fcc00078e020a */ /*0400*/ IMAD.WIDE R16, R19.reuse, 0x4, R12 ; /* 0x0000000413107825 */ /* 0x040fe400078e020c */ /*0410*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */ /* 0x000528000c1e1900 */ /*0420*/ IMAD.WIDE R8, R19.reuse, 0x4, R16 ; /* 0x0000000413087825 */ /* 0x042fe200078e0210 */ /*0430*/ LDG.E R7, [R2.64+0x2c] ; /* 0x00002c0402077981 */ /* 0x001f28000c1e1900 */ /*0440*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */ /* 0x000122000c1e1900 */ /*0450*/ IMAD.WIDE R4, R19, 0x4, R8 ; /* 0x0000000413047825 */ /* 0x000fc600078e0208 */ /*0460*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000f28000c1e1900 */ /*0470*/ LDG.E R17, [R2.64+0x38] ; /* 0x0000380402117981 */ /* 0x001f22000c1e1900 */ /*0480*/ FFMA R36, R35, R36, R34 ; /* 0x0000002423247223 */ /* 0x004fc60000000022 */ /*0490*/ LDG.E R35, [R2.64+0x20] ; /* 0x0000200402237981 */ /* 0x000ea2000c1e1900 */ /*04a0*/ FFMA R36, R27, R28, R36 ; /* 0x0000001c1b247223 */ /* 0x008fc60000000024 */ /*04b0*/ LDG.E R34, [R10.64] ; /* 0x000000040a227981 */ /* 0x0000e8000c1e1900 */ /*04c0*/ LDG.E R27, [R2.64+0x24] ; /* 0x00002404021b7981 */ /* 0x000ee8000c1e1900 */ /*04d0*/ LDG.E R28, [R2.64+0x28] ; /* 0x00002804021c7981 */ /* 0x000ee2000c1e1900 */ /*04e0*/ FFMA R25, R26, R25, R36 ; /* 0x000000191a197223 */ /* 0x020fc60000000024 */ /*04f0*/ LDG.E R36, [R2.64+0x34] ; /* 0x0000340402247981 */ /* 0x000f62000c1e1900 */ /*0500*/ FFMA R26, R24, R23, R25 ; /* 0x00000017181a7223 */ /* 0x000fe20000000019 */ /*0510*/ IMAD.WIDE R24, R19.reuse, 0x4, R4 ; /* 0x0000000413187825 */ /* 0x040fe400078e0204 */ /*0520*/ LDG.E R23, [R2.64+0x30] ; /* 0x0000300402177981 */ /* 0x000f68000c1e1900 */ /*0530*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000362000c1e1900 */ /*0540*/ IMAD.WIDE R10, R19, 0x4, R24 ; /* 0x00000004130a7825 */ /* 0x001fc600078e0218 */ /*0550*/ LDG.E R13, [R24.64] ; /* 0x00000004180d7981 */ /* 0x000168000c1e1900 */ /*0560*/ LDG.E R5, [R10.64] ; /* 0x000000040a057981 */ /* 0x002f68000c1e1900 */ /*0570*/ LDG.E R24, [R2.64+0x3c] ; /* 0x00003c0402187981 */ /* 0x001f62000c1e1900 */ /*0580*/ FFMA R29, R29, R30, R26 ; /* 0x0000001e1d1d7223 */ /* 0x000fc8000000001a */ /*0590*/ FFMA R29, R14, R31, R29 ; /* 0x0000001f0e1d7223 */ /* 0x000fc8000000001d */ /*05a0*/ FFMA R32, R32, R33, R29 ; /* 0x0000002120207223 */ /* 0x000fc8000000001d */ /*05b0*/ FFMA R15, R15, R37, R32 ; /* 0x000000250f0f7223 */ /* 0x010fe20000000020 */ /*05c0*/ IADD3 R22, R22, -0x10, RZ ; /* 0xfffffff016167810 */ /* 0x000fc80007ffe0ff */ /*05d0*/ ISETP.GT.AND P1, PT, R22, 0xc, PT ; /* 0x0000000c1600780c */ /* 0x000fe20003f24270 */ /*05e0*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */ /* 0x000fe2000ff1e03f */ /*05f0*/ IADD3 R18, R18, 0x10, RZ ; /* 0x0000001012127810 */ /* 0x000fc60007ffe0ff */ /*0600*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*0610*/ FFMA R15, R6, R35, R15 ; /* 0x00000023060f7223 */ /* 0x004fc8000000000f */ /*0620*/ FFMA R15, R34, R27, R15 ; /* 0x0000001b220f7223 */ /* 0x008fc8000000000f */ /*0630*/ FFMA R15, R12, R28, R15 ; /* 0x0000001c0c0f7223 */ /* 0x000fc8000000000f */ /*0640*/ FFMA R7, R16, R7, R15 ; /* 0x0000000710077223 */ /* 0x000fc8000000000f */ /*0650*/ FFMA R7, R8, R23, R7 ; /* 0x0000001708077223 */ /* 0x020fc80000000007 */ /*0660*/ FFMA R4, R4, R36, R7 ; /* 0x0000002404047223 */ /* 0x000fc80000000007 */ /*0670*/ FFMA R4, R13, R17, R4 ; /* 0x000000110d047223 */ /* 0x000fe20000000004 */ /*0680*/ IMAD.WIDE R6, R19, 0x4, R10 ; /* 0x0000000413067825 */ /* 0x000fc600078e020a */ /*0690*/ FFMA R34, R5, R24, R4 ; /* 0x0000001805227223 */ /* 0x000fe20000000004 */ /*06a0*/ @P1 BRA 0x220 ; /* 0xfffffb7000001947 */ /* 0x000fea000383ffff */ /*06b0*/ ISETP.GT.AND P1, PT, R22, 0x4, PT ; /* 0x000000041600780c */ /* 0x000fda0003f24270 */ /*06c0*/ @!P1 BRA 0x950 ; /* 0x0000028000009947 */ /* 0x000fea0003800000 */ /*06d0*/ IMAD.WIDE R16, R19, 0x4, R6 ; /* 0x0000000413107825 */ /* 0x000fe200078e0206 */ /*06e0*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe20008000f00 */ /*06f0*/ LDG.E R13, [R6.64] ; /* 0x00000004060d7981 */ /* 0x0000a2000c1e1900 */ /*0700*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fc60008000f00 */ /*0710*/ IMAD.WIDE R24, R19, 0x4, R16 ; /* 0x0000000413187825 */ /* 0x000fe200078e0210 */ /*0720*/ LDG.E R14, [R16.64] ; /* 0x00000004100e7981 */ /* 0x0002e6000c1e1900 */ /*0730*/ IMAD.WIDE R2, R21, 0x4, R2 ; /* 0x0000000415027825 */ /* 0x000fc800078e0202 */ /*0740*/ IMAD.WIDE R26, R19.reuse, 0x4, R24 ; /* 0x00000004131a7825 */ /* 0x040fe200078e0218 */ /*0750*/ LDG.E R12, [R2.64] ; /* 0x00000004020c7981 */ /* 0x000ea8000c1e1900 */ /*0760*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */ /* 0x000ee2000c1e1900 */ /*0770*/ IMAD.WIDE R4, R19, 0x4, R26 ; /* 0x0000000413047825 */ /* 0x000fc600078e021a */ /*0780*/ LDG.E R24, [R24.64] ; /* 0x0000000418187981 */ /* 0x000968000c1e1900 */ /*0790*/ LDG.E R23, [R2.64+0x8] ; /* 0x0000080402177981 */ /* 0x000f62000c1e1900 */ /*07a0*/ IMAD.WIDE R8, R19, 0x4, R4 ; /* 0x0000000413087825 */ /* 0x000fc600078e0204 */ /*07b0*/ LDG.E R26, [R26.64] ; /* 0x000000041a1a7981 */ /* 0x000168000c1e1900 */ /*07c0*/ LDG.E R28, [R2.64+0xc] ; /* 0x00000c04021c7981 */ /* 0x000f62000c1e1900 */ /*07d0*/ IMAD.WIDE R10, R19, 0x4, R8 ; /* 0x00000004130a7825 */ /* 0x000fc600078e0208 */ /*07e0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000f68000c1e1900 */ /*07f0*/ LDG.E R29, [R2.64+0x10] ; /* 0x00001004021d7981 */ /* 0x000f62000c1e1900 */ /*0800*/ IMAD.WIDE R6, R19, 0x4, R10 ; /* 0x0000000413067825 */ /* 0x001fc600078e020a */ /*0810*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */ /* 0x000f68000c1e1900 */ /*0820*/ LDG.E R16, [R2.64+0x14] ; /* 0x0000140402107981 */ /* 0x002f68000c1e1900 */ /*0830*/ LDG.E R17, [R10.64] ; /* 0x000000040a117981 */ /* 0x000f68000c1e1900 */ /*0840*/ LDG.E R25, [R2.64+0x18] ; /* 0x0000180402197981 */ /* 0x010f28000c1e1900 */ /*0850*/ LDG.E R30, [R2.64+0x1c] ; /* 0x00001c04021e7981 */ /* 0x000f28000c1e1900 */ /*0860*/ LDG.E R27, [R6.64] ; /* 0x00000004061b7981 */ /* 0x000122000c1e1900 */ /*0870*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */ /* 0x000fe2000ff1e03f */ /*0880*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*0890*/ IADD3 R18, R18, 0x8, RZ ; /* 0x0000000812127810 */ /* 0x000fe40007ffe0ff */ /*08a0*/ IADD3 R22, R22, -0x8, RZ ; /* 0xfffffff816167810 */ /* 0x000fe20007ffe0ff */ /*08b0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*08c0*/ IMAD.WIDE R6, R19, 0x4, R6 ; /* 0x0000000413067825 */ /* 0x001fe200078e0206 */ /*08d0*/ FFMA R13, R13, R12, R34 ; /* 0x0000000c0d0d7223 */ /* 0x004fc80000000022 */ /*08e0*/ FFMA R13, R14, R15, R13 ; /* 0x0000000f0e0d7223 */ /* 0x008fc8000000000d */ /*08f0*/ FFMA R13, R24, R23, R13 ; /* 0x00000017180d7223 */ /* 0x020fc8000000000d */ /*0900*/ FFMA R13, R26, R28, R13 ; /* 0x0000001c1a0d7223 */ /* 0x000fc8000000000d */ /*0910*/ FFMA R4, R4, R29, R13 ; /* 0x0000001d04047223 */ /* 0x000fc8000000000d */ /*0920*/ FFMA R4, R9, R16, R4 ; /* 0x0000001009047223 */ /* 0x000fc80000000004 */ /*0930*/ FFMA R4, R17, R25, R4 ; /* 0x0000001911047223 */ /* 0x010fc80000000004 */ /*0940*/ FFMA R34, R27, R30, R4 ; /* 0x0000001e1b227223 */ /* 0x000fe20000000004 */ /*0950*/ ISETP.NE.OR P0, PT, R22, RZ, P0 ; /* 0x000000ff1600720c */ /* 0x000fda0000705670 */ /*0960*/ @!P0 BRA 0xb00 ; /* 0x0000019000008947 */ /* 0x000fea0003800000 */ /*0970*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe20008000f00 */ /*0980*/ IMAD.WIDE R8, R19, 0x4, R6 ; /* 0x0000000413087825 */ /* 0x000fe200078e0206 */ /*0990*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fe20008000f00 */ /*09a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x000ea8000c1e1900 */ /*09b0*/ IMAD.WIDE R4, R21, 0x4, R2 ; /* 0x0000000415047825 */ /* 0x000fc800078e0202 */ /*09c0*/ IMAD.WIDE R10, R19.reuse, 0x4, R8 ; /* 0x00000004130a7825 */ /* 0x040fe200078e0208 */ /*09d0*/ LDG.E R12, [R4.64] ; /* 0x00000004040c7981 */ /* 0x000ea8000c1e1900 */ /*09e0*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */ /* 0x000ee2000c1e1900 */ /*09f0*/ IMAD.WIDE R2, R19, 0x4, R10 ; /* 0x0000000413027825 */ /* 0x000fc600078e020a */ /*0a00*/ LDG.E R13, [R4.64+0x4] ; /* 0x00000404040d7981 */ /* 0x000ee8000c1e1900 */ /*0a10*/ LDG.E R15, [R10.64] ; /* 0x000000040a0f7981 */ /* 0x000f28000c1e1900 */ /*0a20*/ LDG.E R14, [R4.64+0x8] ; /* 0x00000804040e7981 */ /* 0x000f28000c1e1900 */ /*0a30*/ LDG.E R16, [R4.64+0xc] ; /* 0x00000c0404107981 */ /* 0x000f68000c1e1900 */ /*0a40*/ LDG.E R17, [R2.64] ; /* 0x0000000402117981 */ /* 0x000f62000c1e1900 */ /*0a50*/ IADD3 R22, R22, -0x4, RZ ; /* 0xfffffffc16167810 */ /* 0x000fc80007ffe0ff */ /*0a60*/ ISETP.NE.AND P0, PT, R22, RZ, PT ; /* 0x000000ff1600720c */ /* 0x000fe20003f05270 */ /*0a70*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */ /* 0x000fe2000ff1e03f */ /*0a80*/ IADD3 R18, R18, 0x4, RZ ; /* 0x0000000412127810 */ /* 0x000fc60007ffe0ff */ /*0a90*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*0aa0*/ FFMA R12, R7, R12, R34 ; /* 0x0000000c070c7223 */ /* 0x004fc80000000022 */ /*0ab0*/ FFMA R12, R9, R13, R12 ; /* 0x0000000d090c7223 */ /* 0x008fe2000000000c */ /*0ac0*/ IMAD.WIDE R6, R19, 0x4, R2 ; /* 0x0000000413067825 */ /* 0x000fc600078e0202 */ /*0ad0*/ FFMA R12, R15, R14, R12 ; /* 0x0000000e0f0c7223 */ /* 0x010fc8000000000c */ /*0ae0*/ FFMA R34, R17, R16, R12 ; /* 0x0000001011227223 */ /* 0x020fe2000000000c */ /*0af0*/ @P0 BRA 0x970 ; /* 0xfffffe7000000947 */ /* 0x000fea000383ffff */ /*0b00*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fda0003f05270 */ /*0b10*/ @!P0 BRA 0xc20 ; /* 0x0000010000008947 */ /* 0x000fea0003800000 */ /*0b20*/ IADD3 R2, R21, R18, RZ ; /* 0x0000001215027210 */ /* 0x000fe20007ffe0ff */ /*0b30*/ IMAD R4, R18, c[0x0][0x178], R0 ; /* 0x00005e0012047a24 */ /* 0x000fe200078e0200 */ /*0b40*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fca0000000f00 */ /*0b50*/ IMAD.WIDE R2, R2, R5, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fc800078e0205 */ /*0b60*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */ /* 0x000fe200078e0205 */ /*0b70*/ MOV R6, R2 ; /* 0x0000000200067202 */ /* 0x000fc80000000f00 */ /*0b80*/ MOV R2, R6 ; /* 0x0000000600027202 */ /* 0x000fe20000000f00 */ /*0b90*/ LDG.E R7, [R4.64] ; /* 0x0000000404077981 */ /* 0x0000aa000c1e1900 */ /*0ba0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x0002a2000c1e1900 */ /*0bb0*/ IADD3 R20, R20, -0x1, RZ ; /* 0xffffffff14147810 */ /* 0x000fe40007ffe0ff */ /*0bc0*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */ /* 0x000fc40007f3e0ff */ /*0bd0*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fe20003f05270 */ /*0be0*/ IMAD.WIDE R4, R19, 0x4, R4 ; /* 0x0000000413047825 */ /* 0x001fe200078e0204 */ /*0bf0*/ IADD3.X R3, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff037210 */ /* 0x002fe20000ffe4ff */ /*0c00*/ FFMA R34, R7, R2, R34 ; /* 0x0000000207227223 */ /* 0x004fd40000000022 */ /*0c10*/ @P0 BRA 0xb80 ; /* 0xffffff6000000947 */ /* 0x000fea000383ffff */ /*0c20*/ IADD3 R2, R0, R21, RZ ; /* 0x0000001500027210 */ /* 0x000fe40007ffe0ff */ /*0c30*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x000fca0000000f00 */ /*0c40*/ IMAD.WIDE R2, R2, R3, c[0x0][0x170] ; /* 0x00005c0002027625 */ /* 0x000fca00078e0203 */ /*0c50*/ STG.E [R2.64], R34 ; /* 0x0000002202007986 */ /* 0x000fe2000c101904 */ /*0c60*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0c70*/ BRA 0xc70; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0c80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ca0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ce0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <hip/hip_runtime.h> __global__ void vecmul(float *A, float* B, float *C, int size) { // Row and Column indexes: int row = blockIdx.y * blockDim.y + threadIdx.y; int col = blockIdx.x * blockDim.x + threadIdx.x; // Are they bellow the maximum? if (col < size && row < size) { float result = 0; for(int ix = 0; ix < size; ix++) { result += A[row*size + ix]*B[ix*size + col]; } C[row*size + col] = result; } } extern "C" { void maxmul(float *A, float* B, float *C, int size) { int total = size*size; // Allocate device memory: float* gpu_A; float* gpu_B; float* gpu_C; int msize = total * sizeof(float); hipMalloc((void**)&gpu_A, msize); hipMemcpy(gpu_A, A, msize, hipMemcpyHostToDevice); hipMalloc((void**)&gpu_B, msize); hipMemcpy(gpu_B, B, msize, hipMemcpyHostToDevice); hipMalloc((void**)&gpu_C, msize); // Blocks & grids: dim3 blocks(size, size); dim3 grid(1, 1); // Call the kernel: vecmul<<<grid,blocks>>>(gpu_A, gpu_B, gpu_C, size); // Get the result Matrix: hipMemcpy(C, gpu_C, msize, hipMemcpyDeviceToHost); //Free device matrices hipFree(gpu_A); hipFree(gpu_B); hipFree(gpu_C); } }
.text .file "maxmul.hip" .globl _Z21__device_stub__vecmulPfS_S_i # -- Begin function _Z21__device_stub__vecmulPfS_S_i .type _Z21__device_stub__vecmulPfS_S_i,@function _Z21__device_stub__vecmulPfS_S_i: # @_Z21__device_stub__vecmulPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6vecmulPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__vecmulPfS_S_i, .Lfunc_end0-_Z21__device_stub__vecmulPfS_S_i .cfi_endproc # -- End function .globl maxmul # -- Begin function maxmul .type maxmul,@function maxmul: # @maxmul .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %ecx, %ebp movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r12 movl %ecx, %eax imull %ecx, %eax shll $2, %eax movslq %eax, %r14 leaq 16(%rsp), %r13 movq %r13, %rdi movq %r14, %rsi callq hipMalloc movq (%r13), %rdi movq %r12, %rsi movq %r14, %rdx movl $1, %ecx callq hipMemcpy leaq 8(%rsp), %r12 movq %r12, %rdi movq %r14, %rsi callq hipMalloc movq (%r12), %rdi movq %r15, %rsi movq %r14, %rdx movl $1, %ecx callq hipMemcpy movq %rsp, %rdi movq %r14, %rsi callq hipMalloc movl %ebp, %eax movq %rax, %rdx shlq $32, %rdx orq %rax, %rdx movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movq 16(%rsp), %rdi movq 8(%rsp), %rsi movq (%rsp), %rdx movl %ebp, %ecx callq _Z21__device_stub__vecmulPfS_S_i .LBB1_2: movq (%rsp), %rsi movq %rbx, %rdi movq %r14, %rdx movl $2, %ecx callq hipMemcpy movq 16(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree movq (%rsp), %rdi callq hipFree addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size maxmul, .Lfunc_end1-maxmul .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6vecmulPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z6vecmulPfS_S_i,@object # @_Z6vecmulPfS_S_i .section .rodata,"a",@progbits .globl _Z6vecmulPfS_S_i .p2align 3, 0x0 _Z6vecmulPfS_S_i: .quad _Z21__device_stub__vecmulPfS_S_i .size _Z6vecmulPfS_S_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z6vecmulPfS_S_i" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__vecmulPfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6vecmulPfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6vecmulPfS_S_i ; -- Begin function _Z6vecmulPfS_S_i .globl _Z6vecmulPfS_S_i .p2align 8 .type _Z6vecmulPfS_S_i,@function _Z6vecmulPfS_S_i: ; @_Z6vecmulPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s3, s[0:1], 0x2c s_load_b32 s2, s[0:1], 0x18 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v4, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_lshr_b32 s4, s3, 16 s_and_b32 s3, s3, 0xffff v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2] v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5] s_mov_b32 s3, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v1, v2, v0 v_cmpx_gt_i32_e64 s2, v1 s_cbranch_execz .LBB0_6 ; %bb.1: ; %.preheader s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 v_mul_lo_u32 v1, v2, s2 s_cmp_lt_i32 s2, 1 s_cbranch_scc1 .LBB0_4 ; %bb.2: ; %.lr.ph.preheader s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v2, 31, v1 v_mov_b32_e32 v6, 0 v_mov_b32_e32 v4, v0 s_mov_b32 s3, s2 v_lshlrev_b64 v[2:3], 2, v[1:2] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s4, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo .LBB0_3: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v5, 31, v4 s_add_i32 s3, s3, -1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_eq_u32 s3, 0 v_lshlrev_b64 v[7:8], 2, v[4:5] v_add_nc_u32_e32 v4, s2, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, s6, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo global_load_b32 v5, v[2:3], off global_load_b32 v7, v[7:8], off v_add_co_u32 v2, vcc_lo, v2, 4 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo s_waitcnt vmcnt(0) v_fmac_f32_e32 v6, v5, v7 s_cbranch_scc0 .LBB0_3 s_branch .LBB0_5 .LBB0_4: v_mov_b32_e32 v6, 0 .LBB0_5: ; %Flow46 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v0, v1, v0 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] s_waitcnt lgkmcnt(0) v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b32 v[0:1], v6, off .LBB0_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6vecmulPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6vecmulPfS_S_i, .Lfunc_end0-_Z6vecmulPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 332 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6vecmulPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z6vecmulPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 9 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
da6458c9d2cccd2213e7e0bb5b0ed0be06eabe53
/* * Name: Nate Steawrt * Date: 04-04-16 * Description: Serial implementation of Matrix morphism */ #include <time.h> #include <stdio.h> #include <stdlib.h> #define RANDOM_VALUE_MIN 1.0 #define RANDOM_VALUE_MAX 2.0 #define NUM_ROWS 4097 #define NUM_COLS 4097 /* * Calculate and return a random value between min and max. */ double randDouble(double min, double max) { double range = max - min; double dist = RAND_MAX / range; return min + (rand() / dist); } /* * Output the matrix to fout */ void outputMatrix(FILE *fout, double *matrix, int rows, int cols) { int i, j; for (i = 0; i < rows; i++) { for (j = 0; j < cols; j++) { fprintf(fout, "%lf ", *(matrix + i * cols + j)); } fprintf(fout, "\n"); } } __global__ void computeMath(double *matrix) { int i; // Grab id of thread int threadId = blockDim.x * threadIdx.y + threadIdx.x + 1; // Declare pointers to the two arguments of the addition and the result pointer double *f_ptr, *first_ptr, *second_ptr; // Grab starting points for pointers f_ptr = matrix + threadId * NUM_COLS; first_ptr = matrix + (threadId - 1) * NUM_COLS + 1; second_ptr = f_ptr + 1; // Compute a single row for (i = 0; i < NUM_COLS - 1; i++, f_ptr++, first_ptr++, second_ptr++) { *f_ptr = *first_ptr + *second_ptr; } } /* * Check if an error occurred during the last CUDA command */ void checkError() { int errorCode = cudaGetLastError(); if (errorCode != 0) { printf("Error %d occurred during last operation.\n", errorCode); } } int main(void) { // Declare the needed variables int i, j; // Define thread hierarchy int nblocks = 64; int dimX = 64; int dimY = 1; // Declare the memory pointers double *h_matrix, *d_matrix; // Allocate memory for host and device size_t memSize = NUM_ROWS * NUM_COLS * sizeof(*h_matrix); // Create space on the host and device for matrix h_matrix = (double *)malloc(memSize); cudaMalloc( (void**) &d_matrix, memSize); checkError(); // Initialize the matrix and copy values into device double *f_ptr = h_matrix; // Setup a traversal pointer for (i = 0; i < NUM_ROWS; i++) { for (j = 0; j < NUM_COLS; j++, f_ptr++) { *f_ptr = randDouble(RANDOM_VALUE_MIN, RANDOM_VALUE_MAX); } } cudaMemcpy(d_matrix, h_matrix, memSize, cudaMemcpyHostToDevice); checkError(); // Set up grid and block structure dim3 dimGrid(nblocks); dim3 dimBlock(dimX, dimY); // Launch the kernel for (i = 0; i < 100; i++) { computeMath<<< dimGrid, dimBlock >>>(d_matrix); checkError(); } // Retrieve results and free memory cudaMemcpy(h_matrix, d_matrix, memSize, cudaMemcpyDeviceToHost); checkError(); free(h_matrix); cudaFree(d_matrix); checkError(); }
.file "tmpxft_002bd3b9_00000000-6_stewart_nate_lab4p1_parallel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2033: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2033: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z10randDoubledd .type _Z10randDoubledd, @function _Z10randDoubledd: .LFB2027: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 subsd %xmm0, %xmm1 movsd %xmm0, 8(%rsp) movsd .LC0(%rip), %xmm0 divsd %xmm1, %xmm0 movsd %xmm0, (%rsp) call rand@PLT movsd 8(%rsp), %xmm2 cvtsi2sdl %eax, %xmm0 divsd (%rsp), %xmm0 addq $24, %rsp .cfi_def_cfa_offset 8 addsd %xmm2, %xmm0 ret .cfi_endproc .LFE2027: .size _Z10randDoubledd, .-_Z10randDoubledd .section .rodata.str1.1,"aMS",@progbits,1 .LC1: .string "%lf " .LC2: .string "\n" .text .globl _Z12outputMatrixP8_IO_FILEPdii .type _Z12outputMatrixP8_IO_FILEPdii, @function _Z12outputMatrixP8_IO_FILEPdii: .LFB2028: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movl %edx, %r14d pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 xorl %r13d, %r13d pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 xorl %r12d, %r12d pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %ecx, %ebx subq $24, %rsp .cfi_def_cfa_offset 80 movq %rdi, (%rsp) .L5: cmpl %r14d, %r13d jge .L4 movslq %r12d, %rax xorl %r15d, %r15d leaq 0(%rbp,%rax,8), %r8 .L8: cmpl %r15d, %ebx jle .L11 movq (%rsp), %rdi movl $2, %esi movb $1, %al movq %r8, 8(%rsp) movsd (%r8,%r15,8), %xmm0 leaq .LC1(%rip), %rdx incq %r15 call __fprintf_chk@PLT movq 8(%rsp), %r8 jmp .L8 .L11: movq (%rsp), %rdi leaq .LC2(%rip), %rdx xorl %eax, %eax incl %r13d movl $2, %esi addl %ebx, %r12d call __fprintf_chk@PLT jmp .L5 .L4: addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size _Z12outputMatrixP8_IO_FILEPdii, .-_Z12outputMatrixP8_IO_FILEPdii .section .rodata.str1.1 .LC3: .string "Error %d occurred during last operation.\n" .text .globl _Z10checkErrorv .type _Z10checkErrorv, @function _Z10checkErrorv: .LFB2029: .cfi_startproc endbr64 pushq %rsi .cfi_def_cfa_offset 16 call cudaGetLastError@PLT testl %eax, %eax je .L12 movl %eax, %edx leaq .LC3(%rip), %rsi movl $2, %edi xorl %eax, %eax popq %rcx .cfi_remember_state .cfi_def_cfa_offset 8 jmp __printf_chk@PLT .L12: .cfi_restore_state popq %rax .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size _Z10checkErrorv, .-_Z10checkErrorv .globl _Z31__device_stub__Z11computeMathPdPd .type _Z31__device_stub__Z11computeMathPdPd, @function _Z31__device_stub__Z11computeMathPdPd: .LFB2055: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L15 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq _Z11computeMathPd(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L15: movq 88(%rsp), %rax subq %fs:40, %rax je .L17 call __stack_chk_fail@PLT .L17: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2055: .size _Z31__device_stub__Z11computeMathPdPd, .-_Z31__device_stub__Z11computeMathPdPd .globl _Z11computeMathPd .type _Z11computeMathPd, @function _Z11computeMathPd: .LFB2056: .cfi_startproc endbr64 jmp _Z31__device_stub__Z11computeMathPdPd .cfi_endproc .LFE2056: .size _Z11computeMathPd, .-_Z11computeMathPd .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2030: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 movl $134283272, %edi pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 subq $56, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax call malloc@PLT leaq 8(%rsp), %rdi movl $134283272, %esi movq %rax, %rbx call cudaMalloc@PLT leaq 134283272(%rbx), %r13 movq %rbx, %r12 call _Z10checkErrorv .L21: xorl %ebp, %ebp .L22: movsd .LC4(%rip), %xmm1 movsd .LC5(%rip), %xmm0 call _Z10randDoubledd movsd %xmm0, (%r12,%rbp) addq $8, %rbp cmpq $32776, %rbp jne .L22 addq $32776, %r12 cmpq %r12, %r13 jne .L21 movq 8(%rsp), %rdi movl $1, %ecx movl $134283272, %edx movq %rbx, %rsi movl $100, %ebp call cudaMemcpy@PLT call _Z10checkErrorv movl $67108865, %eax movl $1, 24(%rsp) salq $6, %rax movl $1, 36(%rsp) movq %rax, 16(%rsp) movq %rax, 28(%rsp) .L25: movl 36(%rsp), %ecx movq 28(%rsp), %rdx xorl %r9d, %r9d xorl %r8d, %r8d movq 16(%rsp), %rdi movl 24(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L24 movq 8(%rsp), %rdi call _Z31__device_stub__Z11computeMathPdPd .L24: call _Z10checkErrorv decl %ebp jne .L25 movq 8(%rsp), %rsi movl $2, %ecx movl $134283272, %edx movq %rbx, %rdi call cudaMemcpy@PLT call _Z10checkErrorv movq %rbx, %rdi call free@PLT movq 8(%rsp), %rdi call cudaFree@PLT call _Z10checkErrorv movq 40(%rsp), %rax subq %fs:40, %rax je .L26 call __stack_chk_fail@PLT .L26: addq $56, %rsp .cfi_def_cfa_offset 40 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2030: .size main, .-main .section .rodata.str1.1 .LC6: .string "_Z11computeMathPd" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2058: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC6(%rip), %rdx movq %rax, %rdi leaq _Z11computeMathPd(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2058: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC0: .long -4194304 .long 1105199103 .align 8 .LC4: .long 0 .long 1073741824 .align 8 .LC5: .long 0 .long 1072693248 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z11computeMathPd .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */ /* 0x000e220000002200 */ /*0020*/ IMAD.MOV.U32 R5, RZ, RZ, 0x8 ; /* 0x00000008ff057424 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fc800078e0203 */ /*0060*/ IMAD R0, R0, 0x1001, RZ ; /* 0x0000100100007824 */ /* 0x000fc800078e02ff */ /*0070*/ IMAD.WIDE R2, R0.reuse, R5.reuse, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x0c0fe200078e0205 */ /*0080*/ IADD3 R4, R0, 0x1001, RZ ; /* 0x0000100100047810 */ /* 0x000fe40007ffe0ff */ /*0090*/ MOV R0, RZ ; /* 0x000000ff00007202 */ /* 0x000fe40000000f00 */ /*00a0*/ IADD3 R14, P0, R2, 0x80, RZ ; /* 0x00000080020e7810 */ /* 0x000fe20007f1e0ff */ /*00b0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e0205 */ /*00c0*/ IMAD.X R15, RZ, RZ, R3, P0 ; /* 0x000000ffff0f7224 */ /* 0x000fe200000e0603 */ /*00d0*/ IADD3 R6, P1, R4, 0x80, RZ ; /* 0x0000008004067810 */ /* 0x000fc80007f3e0ff */ /*00e0*/ IADD3.X R7, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff077210 */ /* 0x000fe40000ffe4ff */ /*00f0*/ IMAD.MOV.U32 R4, RZ, RZ, R14 ; /* 0x000000ffff047224 */ /* 0x000fe200078e000e */ /*0100*/ MOV R5, R15 ; /* 0x0000000f00057202 */ /* 0x000fe20000000f00 */ /*0110*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */ /* 0x002fe200078e0006 */ /*0120*/ MOV R3, R7 ; /* 0x0000000700037202 */ /* 0x000fc60000000f00 */ /*0130*/ LDG.E.64 R8, [R4.64+-0x78] ; /* 0xffff880404087981 */ /* 0x000ea8000c1e1b00 */ /*0140*/ LDG.E.64 R6, [R2.64+-0x78] ; /* 0xffff880402067981 */ /* 0x000ea4000c1e1b00 */ /*0150*/ DADD R6, R6, R8 ; /* 0x0000000006067229 */ /* 0x0040640000000008 */ /*0160*/ LDG.E.64 R8, [R2.64+-0x70] ; /* 0xffff900402087981 */ /* 0x001eaa000c1e1b00 */ /*0170*/ STG.E.64 [R2.64+-0x80], R6 ; /* 0xffff800602007986 */ /* 0x0021e8000c101b04 */ /*0180*/ LDG.E.64 R10, [R4.64+-0x70] ; /* 0xffff9004040a7981 */ /* 0x000ea8000c1e1b00 */ /*0190*/ LDG.E.64 R6, [R2.64+-0x58] ; /* 0xffffa80402067981 */ /* 0x001ee2000c1e1b00 */ /*01a0*/ DADD R8, R8, R10 ; /* 0x0000000008087229 */ /* 0x004046000000000a */ /*01b0*/ LDG.E.64 R10, [R2.64+-0x68] ; /* 0xffff9804020a7981 */ /* 0x001ea8000c1e1b00 */ /*01c0*/ STG.E.64 [R2.64+-0x78], R8 ; /* 0xffff880802007986 */ /* 0x0021e8000c101b04 */ /*01d0*/ LDG.E.64 R12, [R4.64+-0x68] ; /* 0xffff9804040c7981 */ /* 0x000ea8000c1e1b00 */ /*01e0*/ LDG.E.64 R8, [R2.64+-0x50] ; /* 0xffffb00402087981 */ /* 0x001f22000c1e1b00 */ /*01f0*/ DADD R10, R10, R12 ; /* 0x000000000a0a7229 */ /* 0x004046000000000c */ /*0200*/ LDG.E.64 R12, [R2.64+-0x60] ; /* 0xffffa004020c7981 */ /* 0x001ea8000c1e1b00 */ /*0210*/ STG.E.64 [R2.64+-0x70], R10 ; /* 0xffff900a02007986 */ /* 0x0021e8000c101b04 */ /*0220*/ LDG.E.64 R14, [R4.64+-0x60] ; /* 0xffffa004040e7981 */ /* 0x000ea8000c1e1b00 */ /*0230*/ LDG.E.64 R10, [R2.64+-0x48] ; /* 0xffffb804020a7981 */ /* 0x001f62000c1e1b00 */ /*0240*/ DADD R12, R12, R14 ; /* 0x000000000c0c7229 */ /* 0x004e0e000000000e */ /*0250*/ STG.E.64 [R2.64+-0x68], R12 ; /* 0xffff980c02007986 */ /* 0x0011e8000c101b04 */ /*0260*/ LDG.E.64 R14, [R4.64+-0x58] ; /* 0xffffa804040e7981 */ /* 0x000ee8000c1e1b00 */ /*0270*/ LDG.E.64 R12, [R2.64+-0x40] ; /* 0xffffc004020c7981 */ /* 0x001ea2000c1e1b00 */ /*0280*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */ /* 0x008e0e000000000e */ /*0290*/ STG.E.64 [R2.64+-0x60], R6 ; /* 0xffffa00602007986 */ /* 0x0011e8000c101b04 */ /*02a0*/ LDG.E.64 R14, [R4.64+-0x50] ; /* 0xffffb004040e7981 */ /* 0x000f28000c1e1b00 */ /*02b0*/ LDG.E.64 R6, [R2.64+-0x38] ; /* 0xffffc80402067981 */ /* 0x001ee2000c1e1b00 */ /*02c0*/ DADD R8, R8, R14 ; /* 0x0000000008087229 */ /* 0x010e0e000000000e */ /*02d0*/ STG.E.64 [R2.64+-0x58], R8 ; /* 0xffffa80802007986 */ /* 0x0011e8000c101b04 */ /*02e0*/ LDG.E.64 R14, [R4.64+-0x48] ; /* 0xffffb804040e7981 */ /* 0x000f68000c1e1b00 */ /*02f0*/ LDG.E.64 R8, [R2.64+-0x30] ; /* 0xffffd00402087981 */ /* 0x001f22000c1e1b00 */ /*0300*/ DADD R10, R10, R14 ; /* 0x000000000a0a7229 */ /* 0x020e0e000000000e */ /*0310*/ STG.E.64 [R2.64+-0x50], R10 ; /* 0xffffb00a02007986 */ /* 0x0011e8000c101b04 */ /*0320*/ LDG.E.64 R14, [R4.64+-0x40] ; /* 0xffffc004040e7981 */ /* 0x000ea8000c1e1b00 */ /*0330*/ LDG.E.64 R10, [R2.64+-0x28] ; /* 0xffffd804020a7981 */ /* 0x001f62000c1e1b00 */ /*0340*/ DADD R12, R12, R14 ; /* 0x000000000c0c7229 */ /* 0x004e0e000000000e */ /*0350*/ STG.E.64 [R2.64+-0x48], R12 ; /* 0xffffb80c02007986 */ /* 0x0011e8000c101b04 */ /*0360*/ LDG.E.64 R14, [R4.64+-0x38] ; /* 0xffffc804040e7981 */ /* 0x000ee8000c1e1b00 */ /*0370*/ LDG.E.64 R12, [R2.64+-0x20] ; /* 0xffffe004020c7981 */ /* 0x001ea2000c1e1b00 */ /*0380*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */ /* 0x008e0e000000000e */ /*0390*/ STG.E.64 [R2.64+-0x40], R6 ; /* 0xffffc00602007986 */ /* 0x0011e8000c101b04 */ /*03a0*/ LDG.E.64 R14, [R4.64+-0x30] ; /* 0xffffd004040e7981 */ /* 0x000f28000c1e1b00 */ /*03b0*/ LDG.E.64 R6, [R2.64+-0x18] ; /* 0xffffe80402067981 */ /* 0x001ee2000c1e1b00 */ /*03c0*/ DADD R8, R8, R14 ; /* 0x0000000008087229 */ /* 0x010e0e000000000e */ /*03d0*/ STG.E.64 [R2.64+-0x38], R8 ; /* 0xffffc80802007986 */ /* 0x0011e8000c101b04 */ /*03e0*/ LDG.E.64 R14, [R4.64+-0x28] ; /* 0xffffd804040e7981 */ /* 0x000f68000c1e1b00 */ /*03f0*/ LDG.E.64 R8, [R2.64+-0x10] ; /* 0xfffff00402087981 */ /* 0x001f22000c1e1b00 */ /*0400*/ DADD R10, R10, R14 ; /* 0x000000000a0a7229 */ /* 0x020e0e000000000e */ /*0410*/ STG.E.64 [R2.64+-0x30], R10 ; /* 0xffffd00a02007986 */ /* 0x0011e8000c101b04 */ /*0420*/ LDG.E.64 R14, [R4.64+-0x20] ; /* 0xffffe004040e7981 */ /* 0x000ea8000c1e1b00 */ /*0430*/ LDG.E.64 R10, [R2.64+-0x8] ; /* 0xfffff804020a7981 */ /* 0x001f62000c1e1b00 */ /*0440*/ DADD R12, R12, R14 ; /* 0x000000000c0c7229 */ /* 0x004e0e000000000e */ /*0450*/ STG.E.64 [R2.64+-0x28], R12 ; /* 0xffffd80c02007986 */ /* 0x0011e8000c101b04 */ /*0460*/ LDG.E.64 R14, [R4.64+-0x18] ; /* 0xffffe804040e7981 */ /* 0x000ee8000c1e1b00 */ /*0470*/ LDG.E.64 R12, [R2.64] ; /* 0x00000004020c7981 */ /* 0x001ea2000c1e1b00 */ /*0480*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */ /* 0x008e0e000000000e */ /*0490*/ STG.E.64 [R2.64+-0x20], R6 ; /* 0xffffe00602007986 */ /* 0x0011e8000c101b04 */ /*04a0*/ LDG.E.64 R14, [R4.64+-0x10] ; /* 0xfffff004040e7981 */ /* 0x000f28000c1e1b00 */ /*04b0*/ LDG.E.64 R6, [R2.64+0x8] ; /* 0x0000080402067981 */ /* 0x001ee2000c1e1b00 */ /*04c0*/ DADD R8, R8, R14 ; /* 0x0000000008087229 */ /* 0x010e0e000000000e */ /*04d0*/ STG.E.64 [R2.64+-0x18], R8 ; /* 0xffffe80802007986 */ /* 0x0011e8000c101b04 */ /*04e0*/ LDG.E.64 R14, [R4.64+-0x8] ; /* 0xfffff804040e7981 */ /* 0x000f68000c1e1b00 */ /*04f0*/ LDG.E.64 R8, [R2.64+0x10] ; /* 0x0000100402087981 */ /* 0x001f22000c1e1b00 */ /*0500*/ DADD R10, R10, R14 ; /* 0x000000000a0a7229 */ /* 0x020e0e000000000e */ /*0510*/ STG.E.64 [R2.64+-0x10], R10 ; /* 0xfffff00a02007986 */ /* 0x0011e8000c101b04 */ /*0520*/ LDG.E.64 R14, [R4.64] ; /* 0x00000004040e7981 */ /* 0x000ea8000c1e1b00 */ /*0530*/ LDG.E.64 R10, [R2.64+0x18] ; /* 0x00001804020a7981 */ /* 0x001f62000c1e1b00 */ /*0540*/ DADD R12, R12, R14 ; /* 0x000000000c0c7229 */ /* 0x004e0e000000000e */ /*0550*/ STG.E.64 [R2.64+-0x8], R12 ; /* 0xfffff80c02007986 */ /* 0x0011e8000c101b04 */ /*0560*/ LDG.E.64 R14, [R4.64+0x8] ; /* 0x00000804040e7981 */ /* 0x000ee8000c1e1b00 */ /*0570*/ LDG.E.64 R12, [R2.64+0x20] ; /* 0x00002004020c7981 */ /* 0x001ea2000c1e1b00 */ /*0580*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */ /* 0x008e0e000000000e */ /*0590*/ STG.E.64 [R2.64], R6 ; /* 0x0000000602007986 */ /* 0x0011e8000c101b04 */ /*05a0*/ LDG.E.64 R14, [R4.64+0x10] ; /* 0x00001004040e7981 */ /* 0x000f28000c1e1b00 */ /*05b0*/ LDG.E.64 R6, [R2.64+0x28] ; /* 0x0000280402067981 */ /* 0x001ee2000c1e1b00 */ /*05c0*/ DADD R8, R8, R14 ; /* 0x0000000008087229 */ /* 0x010e0e000000000e */ /*05d0*/ STG.E.64 [R2.64+0x8], R8 ; /* 0x0000080802007986 */ /* 0x0011e8000c101b04 */ /*05e0*/ LDG.E.64 R14, [R4.64+0x18] ; /* 0x00001804040e7981 */ /* 0x000f68000c1e1b00 */ /*05f0*/ LDG.E.64 R8, [R2.64+0x30] ; /* 0x0000300402087981 */ /* 0x001f22000c1e1b00 */ /*0600*/ DADD R10, R10, R14 ; /* 0x000000000a0a7229 */ /* 0x020e0e000000000e */ /*0610*/ STG.E.64 [R2.64+0x10], R10 ; /* 0x0000100a02007986 */ /* 0x0011e8000c101b04 */ /*0620*/ LDG.E.64 R14, [R4.64+0x20] ; /* 0x00002004040e7981 */ /* 0x000ea8000c1e1b00 */ /*0630*/ LDG.E.64 R10, [R2.64+0x38] ; /* 0x00003804020a7981 */ /* 0x001f62000c1e1b00 */ /*0640*/ DADD R12, R12, R14 ; /* 0x000000000c0c7229 */ /* 0x004e0e000000000e */ /*0650*/ STG.E.64 [R2.64+0x18], R12 ; /* 0x0000180c02007986 */ /* 0x0011e8000c101b04 */ /*0660*/ LDG.E.64 R14, [R4.64+0x28] ; /* 0x00002804040e7981 */ /* 0x000ee8000c1e1b00 */ /*0670*/ LDG.E.64 R12, [R2.64+0x40] ; /* 0x00004004020c7981 */ /* 0x001ea2000c1e1b00 */ /*0680*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */ /* 0x008e0e000000000e */ /*0690*/ STG.E.64 [R2.64+0x20], R6 ; /* 0x0000200602007986 */ /* 0x0011e8000c101b04 */ /*06a0*/ LDG.E.64 R14, [R4.64+0x30] ; /* 0x00003004040e7981 */ /* 0x000f28000c1e1b00 */ /*06b0*/ LDG.E.64 R6, [R2.64+0x48] ; /* 0x0000480402067981 */ /* 0x001ee2000c1e1b00 */ /*06c0*/ DADD R8, R8, R14 ; /* 0x0000000008087229 */ /* 0x010e0e000000000e */ /*06d0*/ STG.E.64 [R2.64+0x28], R8 ; /* 0x0000280802007986 */ /* 0x0011e8000c101b04 */ /*06e0*/ LDG.E.64 R14, [R4.64+0x38] ; /* 0x00003804040e7981 */ /* 0x000f68000c1e1b00 */ /*06f0*/ LDG.E.64 R8, [R2.64+0x50] ; /* 0x0000500402087981 */ /* 0x001f22000c1e1b00 */ /*0700*/ DADD R10, R10, R14 ; /* 0x000000000a0a7229 */ /* 0x020e0e000000000e */ /*0710*/ STG.E.64 [R2.64+0x30], R10 ; /* 0x0000300a02007986 */ /* 0x0011e8000c101b04 */ /*0720*/ LDG.E.64 R14, [R4.64+0x40] ; /* 0x00004004040e7981 */ /* 0x000ea8000c1e1b00 */ /*0730*/ LDG.E.64 R10, [R2.64+0x58] ; /* 0x00005804020a7981 */ /* 0x001f62000c1e1b00 */ /*0740*/ DADD R12, R12, R14 ; /* 0x000000000c0c7229 */ /* 0x004e0e000000000e */ /*0750*/ STG.E.64 [R2.64+0x38], R12 ; /* 0x0000380c02007986 */ /* 0x0011e8000c101b04 */ /*0760*/ LDG.E.64 R14, [R4.64+0x48] ; /* 0x00004804040e7981 */ /* 0x000ee8000c1e1b00 */ /*0770*/ LDG.E.64 R12, [R2.64+0x60] ; /* 0x00006004020c7981 */ /* 0x001ea2000c1e1b00 */ /*0780*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */ /* 0x008e0e000000000e */ /*0790*/ STG.E.64 [R2.64+0x40], R6 ; /* 0x0000400602007986 */ /* 0x0011e8000c101b04 */ /*07a0*/ LDG.E.64 R14, [R4.64+0x50] ; /* 0x00005004040e7981 */ /* 0x000f28000c1e1b00 */ /*07b0*/ LDG.E.64 R6, [R2.64+0x68] ; /* 0x0000680402067981 */ /* 0x001ee2000c1e1b00 */ /*07c0*/ DADD R8, R8, R14 ; /* 0x0000000008087229 */ /* 0x010e0e000000000e */ /*07d0*/ STG.E.64 [R2.64+0x48], R8 ; /* 0x0000480802007986 */ /* 0x0011e8000c101b04 */ /*07e0*/ LDG.E.64 R14, [R4.64+0x58] ; /* 0x00005804040e7981 */ /* 0x000f68000c1e1b00 */ /*07f0*/ LDG.E.64 R8, [R2.64+0x70] ; /* 0x0000700402087981 */ /* 0x001f22000c1e1b00 */ /*0800*/ DADD R10, R10, R14 ; /* 0x000000000a0a7229 */ /* 0x020e0e000000000e */ /*0810*/ STG.E.64 [R2.64+0x50], R10 ; /* 0x0000500a02007986 */ /* 0x0011e8000c101b04 */ /*0820*/ LDG.E.64 R14, [R4.64+0x60] ; /* 0x00006004040e7981 */ /* 0x000ea8000c1e1b00 */ /*0830*/ LDG.E.64 R10, [R2.64+0x78] ; /* 0x00007804020a7981 */ /* 0x001f62000c1e1b00 */ /*0840*/ DADD R12, R12, R14 ; /* 0x000000000c0c7229 */ /* 0x004e0e000000000e */ /*0850*/ STG.E.64 [R2.64+0x58], R12 ; /* 0x0000580c02007986 */ /* 0x0011e8000c101b04 */ /*0860*/ LDG.E.64 R14, [R4.64+0x68] ; /* 0x00006804040e7981 */ /* 0x000ee8000c1e1b00 */ /*0870*/ LDG.E.64 R12, [R2.64+0x80] ; /* 0x00008004020c7981 */ /* 0x001ea2000c1e1b00 */ /*0880*/ DADD R6, R6, R14 ; /* 0x0000000006067229 */ /* 0x008e0e000000000e */ /*0890*/ STG.E.64 [R2.64+0x60], R6 ; /* 0x0000600602007986 */ /* 0x0011e8000c101b04 */ /*08a0*/ LDG.E.64 R14, [R4.64+0x70] ; /* 0x00007004040e7981 */ /* 0x000f24000c1e1b00 */ /*08b0*/ DADD R8, R8, R14 ; /* 0x0000000008087229 */ /* 0x010e4e000000000e */ /*08c0*/ STG.E.64 [R2.64+0x68], R8 ; /* 0x0000680802007986 */ /* 0x0023e8000c101b04 */ /*08d0*/ LDG.E.64 R14, [R4.64+0x78] ; /* 0x00007804040e7981 */ /* 0x000f62000c1e1b00 */ /*08e0*/ IADD3 R0, R0, 0x20, RZ ; /* 0x0000002000007810 */ /* 0x000fe20007ffe0ff */ /*08f0*/ DADD R10, R10, R14 ; /* 0x000000000a0a7229 */ /* 0x020ece000000000e */ /*0900*/ STG.E.64 [R2.64+0x70], R10 ; /* 0x0000700a02007986 */ /* 0x0083e8000c101b04 */ /*0910*/ LDG.E.64 R14, [R4.64+0x80] ; /* 0x00008004040e7981 */ /* 0x000ea2000c1e1b00 */ /*0920*/ ISETP.NE.AND P0, PT, R0, 0x1000, PT ; /* 0x000010000000780c */ /* 0x000fe40003f05270 */ /*0930*/ IADD3 R6, P2, R2, 0x100, RZ ; /* 0x0000010002067810 */ /* 0x001fc80007f5e0ff */ /*0940*/ IADD3.X R7, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff077210 */ /* 0x000fe200017fe4ff */ /*0950*/ DADD R12, R12, R14 ; /* 0x000000000c0c7229 */ /* 0x0040a4000000000e */ /*0960*/ IADD3 R14, P1, R4, 0x100, RZ ; /* 0x00000100040e7810 */ /* 0x001fca0007f3e0ff */ /*0970*/ STG.E.64 [R2.64+0x78], R12 ; /* 0x0000780c02007986 */ /* 0x0043e2000c101b04 */ /*0980*/ IMAD.X R15, RZ, RZ, R5, P1 ; /* 0x000000ffff0f7224 */ /* 0x000fe200008e0605 */ /*0990*/ @P0 BRA 0xf0 ; /* 0xfffff75000000947 */ /* 0x000fea000383ffff */ /*09a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*09b0*/ BRA 0x9b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*09c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
/* * Name: Nate Steawrt * Date: 04-04-16 * Description: Serial implementation of Matrix morphism */ #include <hip/hip_runtime.h> #include <time.h> #include <stdio.h> #include <stdlib.h> #define RANDOM_VALUE_MIN 1.0 #define RANDOM_VALUE_MAX 2.0 #define NUM_ROWS 4097 #define NUM_COLS 4097 /* * Calculate and return a random value between min and max. */ double randDouble(double min, double max) { double range = max - min; double dist = RAND_MAX / range; return min + (rand() / dist); } /* * Output the matrix to fout */ void outputMatrix(FILE *fout, double *matrix, int rows, int cols) { int i, j; for (i = 0; i < rows; i++) { for (j = 0; j < cols; j++) { fprintf(fout, "%lf ", *(matrix + i * cols + j)); } fprintf(fout, "\n"); } } __global__ void computeMath(double *matrix) { int i; // Grab id of thread int threadId = blockDim.x * threadIdx.y + threadIdx.x + 1; // Declare pointers to the two arguments of the addition and the result pointer double *f_ptr, *first_ptr, *second_ptr; // Grab starting points for pointers f_ptr = matrix + threadId * NUM_COLS; first_ptr = matrix + (threadId - 1) * NUM_COLS + 1; second_ptr = f_ptr + 1; // Compute a single row for (i = 0; i < NUM_COLS - 1; i++, f_ptr++, first_ptr++, second_ptr++) { *f_ptr = *first_ptr + *second_ptr; } } /* * Check if an error occurred during the last CUDA command */ void checkError() { int errorCode = hipGetLastError(); if (errorCode != 0) { printf("Error %d occurred during last operation.\n", errorCode); } } int main(void) { // Declare the needed variables int i, j; // Define thread hierarchy int nblocks = 64; int dimX = 64; int dimY = 1; // Declare the memory pointers double *h_matrix, *d_matrix; // Allocate memory for host and device size_t memSize = NUM_ROWS * NUM_COLS * sizeof(*h_matrix); // Create space on the host and device for matrix h_matrix = (double *)malloc(memSize); hipMalloc( (void**) &d_matrix, memSize); checkError(); // Initialize the matrix and copy values into device double *f_ptr = h_matrix; // Setup a traversal pointer for (i = 0; i < NUM_ROWS; i++) { for (j = 0; j < NUM_COLS; j++, f_ptr++) { *f_ptr = randDouble(RANDOM_VALUE_MIN, RANDOM_VALUE_MAX); } } hipMemcpy(d_matrix, h_matrix, memSize, hipMemcpyHostToDevice); checkError(); // Set up grid and block structure dim3 dimGrid(nblocks); dim3 dimBlock(dimX, dimY); // Launch the kernel for (i = 0; i < 100; i++) { computeMath<<< dimGrid, dimBlock >>>(d_matrix); checkError(); } // Retrieve results and free memory hipMemcpy(h_matrix, d_matrix, memSize, hipMemcpyDeviceToHost); checkError(); free(h_matrix); hipFree(d_matrix); checkError(); }
.text .file "stewart_nate_lab4p1_parallel.hip" .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _Z10randDoubledd .LCPI0_0: .quad 0x41dfffffffc00000 # double 2147483647 .text .globl _Z10randDoubledd .type _Z10randDoubledd,@function _Z10randDoubledd: # @_Z10randDoubledd .cfi_startproc # %bb.0: subq $24, %rsp .cfi_def_cfa_offset 32 movsd %xmm0, 16(%rsp) # 8-byte Spill subsd %xmm0, %xmm1 movsd .LCPI0_0(%rip), %xmm0 # xmm0 = mem[0],zero divsd %xmm1, %xmm0 movsd %xmm0, 8(%rsp) # 8-byte Spill callq rand xorps %xmm0, %xmm0 cvtsi2sd %eax, %xmm0 divsd 8(%rsp), %xmm0 # 8-byte Folded Reload addsd 16(%rsp), %xmm0 # 8-byte Folded Reload addq $24, %rsp .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z10randDoubledd, .Lfunc_end0-_Z10randDoubledd .cfi_endproc # -- End function .globl _Z12outputMatrixP8_IO_FILEPdii # -- Begin function _Z12outputMatrixP8_IO_FILEPdii .type _Z12outputMatrixP8_IO_FILEPdii,@function _Z12outputMatrixP8_IO_FILEPdii: # @_Z12outputMatrixP8_IO_FILEPdii .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %ecx, 12(%rsp) # 4-byte Spill testl %edx, %edx jle .LBB1_6 # %bb.1: # %.preheader.lr.ph movq %rsi, %r14 movq %rdi, %r15 movslq 12(%rsp), %r12 # 4-byte Folded Reload movl %edx, %eax movq %rax, 16(%rsp) # 8-byte Spill movl %r12d, %ebp shlq $3, %r12 xorl %ebx, %ebx .LBB1_2: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB1_4 Depth 2 cmpl $0, 12(%rsp) # 4-byte Folded Reload jle .LBB1_5 # %bb.3: # %.lr.ph # in Loop: Header=BB1_2 Depth=1 xorl %r13d, %r13d .LBB1_4: # Parent Loop BB1_2 Depth=1 # => This Inner Loop Header: Depth=2 movsd (%r14,%r13,8), %xmm0 # xmm0 = mem[0],zero movl $.L.str, %esi movq %r15, %rdi movb $1, %al callq fprintf incq %r13 cmpq %r13, %rbp jne .LBB1_4 .LBB1_5: # %._crit_edge # in Loop: Header=BB1_2 Depth=1 movl $10, %edi movq %r15, %rsi callq fputc@PLT incq %rbx addq %r12, %r14 cmpq 16(%rsp), %rbx # 8-byte Folded Reload jne .LBB1_2 .LBB1_6: # %._crit_edge15 addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z12outputMatrixP8_IO_FILEPdii, .Lfunc_end1-_Z12outputMatrixP8_IO_FILEPdii .cfi_endproc # -- End function .globl _Z26__device_stub__computeMathPd # -- Begin function _Z26__device_stub__computeMathPd .type _Z26__device_stub__computeMathPd,@function _Z26__device_stub__computeMathPd: # @_Z26__device_stub__computeMathPd .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11computeMathPd, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z26__device_stub__computeMathPd, .Lfunc_end2-_Z26__device_stub__computeMathPd .cfi_endproc # -- End function .globl _Z10checkErrorv # -- Begin function _Z10checkErrorv .type _Z10checkErrorv,@function _Z10checkErrorv: # @_Z10checkErrorv .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 callq hipGetLastError testl %eax, %eax je .LBB3_1 # %bb.2: movl $.L.str.2, %edi movl %eax, %esi xorl %eax, %eax popq %rcx .cfi_def_cfa_offset 8 jmp printf # TAILCALL .LBB3_1: .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _Z10checkErrorv, .Lfunc_end3-_Z10checkErrorv .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI4_0: .quad 0x41dfffffffc00000 # double 2147483647 .LCPI4_1: .quad 0x3ff0000000000000 # double 1 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $16, %rsp .cfi_def_cfa_offset 64 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $134283272, %edi # imm = 0x8010008 callq malloc movq %rax, %rbx leaq 8(%rsp), %rdi movl $134283272, %esi # imm = 0x8010008 callq hipMalloc callq _Z10checkErrorv xorl %r14d, %r14d movq %rbx, %r15 .LBB4_1: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB4_2 Depth 2 xorl %r12d, %r12d .LBB4_2: # Parent Loop BB4_1 Depth=1 # => This Inner Loop Header: Depth=2 callq rand movsd .LCPI4_0(%rip), %xmm1 # xmm1 = mem[0],zero xorps %xmm0, %xmm0 cvtsi2sd %eax, %xmm0 divsd %xmm1, %xmm0 movsd .LCPI4_1(%rip), %xmm1 # xmm1 = mem[0],zero addsd %xmm1, %xmm0 movsd %xmm0, (%r15,%r12) addq $8, %r12 cmpl $32776, %r12d # imm = 0x8008 jne .LBB4_2 # %bb.3: # in Loop: Header=BB4_1 Depth=1 incl %r14d addq %r12, %r15 cmpl $4097, %r14d # imm = 0x1001 jne .LBB4_1 # %bb.4: movabsq $4294967360, %r14 # imm = 0x100000040 movq 8(%rsp), %rdi movl $134283272, %edx # imm = 0x8010008 movq %rbx, %rsi movl $1, %ecx callq hipMemcpy callq _Z10checkErrorv movl $100, %ebp .LBB4_5: # =>This Inner Loop Header: Depth=1 movq %r14, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB4_7 # %bb.6: # in Loop: Header=BB4_5 Depth=1 movq 8(%rsp), %rdi callq _Z26__device_stub__computeMathPd .LBB4_7: # in Loop: Header=BB4_5 Depth=1 callq _Z10checkErrorv decl %ebp jne .LBB4_5 # %bb.8: movq 8(%rsp), %rsi movl $134283272, %edx # imm = 0x8010008 movq %rbx, %rdi movl $2, %ecx callq hipMemcpy callq _Z10checkErrorv movq %rbx, %rdi callq free movq 8(%rsp), %rdi callq hipFree callq _Z10checkErrorv xorl %eax, %eax addq $16, %rsp .cfi_def_cfa_offset 48 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size main, .Lfunc_end4-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB5_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB5_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11computeMathPd, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end5: .size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB6_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB6_2: retq .Lfunc_end6: .size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%lf " .size .L.str, 5 .type _Z11computeMathPd,@object # @_Z11computeMathPd .section .rodata,"a",@progbits .globl _Z11computeMathPd .p2align 3, 0x0 _Z11computeMathPd: .quad _Z26__device_stub__computeMathPd .size _Z11computeMathPd, 8 .type .L.str.2,@object # @.str.2 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.2: .asciz "Error %d occurred during last operation.\n" .size .L.str.2, 42 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z11computeMathPd" .size .L__unnamed_1, 18 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z26__device_stub__computeMathPd .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z11computeMathPd .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z11computeMathPd ; -- Begin function _Z11computeMathPd .globl _Z11computeMathPd .p2align 8 .type _Z11computeMathPd,@function _Z11computeMathPd: ; @_Z11computeMathPd ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v1, 0x3ff, v0 v_bfe_u32 v0, v0, 10, 10 s_load_b64 s[0:1], s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u32_u24 v0, v0, s2, v1 v_mov_b32_e32 v1, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshl_add_u32 v0, v0, 12, v0 v_add_nc_u32_e32 v2, 0x1001, v0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[0:1], 3, v[0:1] v_ashrrev_i32_e32 v3, 31, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v0, s0 v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 3, v[2:3] v_add_co_u32 v0, vcc_lo, s0, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo v_add_co_u32 v2, vcc_lo, v4, 8 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v5, vcc_lo s_mov_b64 s[0:1], 0 .LBB0_1: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) v_add_co_u32 v4, vcc_lo, v2, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo v_add_co_u32 v6, vcc_lo, v0, s0 v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo s_add_u32 s0, s0, 8 s_clause 0x1 global_load_b64 v[4:5], v[4:5], off global_load_b64 v[8:9], v[6:7], off offset:8 s_addc_u32 s1, s1, 0 s_cmpk_lg_u32 s0, 0x8000 s_waitcnt vmcnt(0) v_add_f64 v[4:5], v[4:5], v[8:9] global_store_b64 v[6:7], v[4:5], off s_cbranch_scc1 .LBB0_1 ; %bb.2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11computeMathPd .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 10 .amdhsa_next_free_sgpr 3 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z11computeMathPd, .Lfunc_end0-_Z11computeMathPd ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 256 ; NumSgprs: 5 ; NumVgprs: 10 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 5 ; NumVGPRsForWavesPerEU: 10 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11computeMathPd .private_segment_fixed_size: 0 .sgpr_count: 5 .sgpr_spill_count: 0 .symbol: _Z11computeMathPd.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 10 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
2322ef578e0f653a115e966b6cd9d2a69fa1588b
#include "includes.h" #define WEIGHTSUM 273 #define BLOCK_SIZE 16 int * heatmap; size_t heatmap_pitch; int * scaled_heatmap; size_t scaled_heatmap_pitch; int * blurred_heatmap; size_t blurred_heatmap_pitch; float* d_desiredPositionX; float* d_desiredPositionY; __global__ void computeScaledHeatmap(int* heatmap, size_t heatmap_pitch, int* scaled_heatmap, size_t scaled_heatmap_pitch) { // Block row and column int blockRow = blockIdx.y; int blockCol = blockIdx.x; // Thread row and column block int row = threadIdx.y; int col = threadIdx.x; // x, y coordinate int x = blockCol * blockDim.x + col; int y = blockRow * blockDim.y + row; // Scale the data for visual representation int value = *((int*)((char*)heatmap + y * heatmap_pitch) + x); for (int r = 0; r < CELLSIZE; r++) { int* row = (int*)((char*)scaled_heatmap + (r + y * CELLSIZE) * scaled_heatmap_pitch); for (int c = 0; c < CELLSIZE; c++) { row[x * CELLSIZE + c] = value; } } }
.file "tmpxft_0039955e_00000000-6_computeScaledHeatmap.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z44__device_stub__Z20computeScaledHeatmapPimS_mPimS_m .type _Z44__device_stub__Z20computeScaledHeatmapPimS_mPimS_m, @function _Z44__device_stub__Z20computeScaledHeatmapPimS_mPimS_m: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movq %rcx, (%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z20computeScaledHeatmapPimS_m(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z44__device_stub__Z20computeScaledHeatmapPimS_mPimS_m, .-_Z44__device_stub__Z20computeScaledHeatmapPimS_mPimS_m .globl _Z20computeScaledHeatmapPimS_m .type _Z20computeScaledHeatmapPimS_m, @function _Z20computeScaledHeatmapPimS_m: .LFB2033: .cfi_startproc endbr64 jmp _Z44__device_stub__Z20computeScaledHeatmapPimS_mPimS_m .cfi_endproc .LFE2033: .size _Z20computeScaledHeatmapPimS_m, .-_Z20computeScaledHeatmapPimS_m .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z20computeScaledHeatmapPimS_m" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z20computeScaledHeatmapPimS_m(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl d_desiredPositionY .bss .align 8 .type d_desiredPositionY, @object .size d_desiredPositionY, 8 d_desiredPositionY: .zero 8 .globl d_desiredPositionX .align 8 .type d_desiredPositionX, @object .size d_desiredPositionX, 8 d_desiredPositionX: .zero 8 .globl blurred_heatmap_pitch .align 8 .type blurred_heatmap_pitch, @object .size blurred_heatmap_pitch, 8 blurred_heatmap_pitch: .zero 8 .globl blurred_heatmap .align 8 .type blurred_heatmap, @object .size blurred_heatmap, 8 blurred_heatmap: .zero 8 .globl scaled_heatmap_pitch .align 8 .type scaled_heatmap_pitch, @object .size scaled_heatmap_pitch, 8 scaled_heatmap_pitch: .zero 8 .globl scaled_heatmap .align 8 .type scaled_heatmap, @object .size scaled_heatmap, 8 scaled_heatmap: .zero 8 .globl heatmap_pitch .align 8 .type heatmap_pitch, @object .size heatmap_pitch, 8 heatmap_pitch: .zero 8 .globl heatmap .align 8 .type heatmap, @object .size heatmap, 8 heatmap: .zero 8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z20computeScaledHeatmapPimS_m .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */ /* 0x000e220000002600 */ /*0020*/ MOV R4, c[0x0][0x168] ; /* 0x00005a0000047a02 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002200 */ /*0050*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e680000002500 */ /*0060*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e620000002100 */ /*0070*/ IMAD R3, R3, c[0x0][0x4], R0 ; /* 0x0000010003037a24 */ /* 0x001fc800078e0200 */ /*0080*/ IMAD.WIDE.U32 R4, R3, R4, c[0x0][0x160] ; /* 0x0000580003047625 */ /* 0x000fe200078e0004 */ /*0090*/ SHF.R.S32.HI R0, RZ, 0x1f, R3 ; /* 0x0000001fff007819 */ /* 0x000fc60000011403 */ /*00a0*/ IMAD R2, R2, c[0x0][0x0], R7 ; /* 0x0000000002027a24 */ /* 0x002fe400078e0207 */ /*00b0*/ IMAD R0, R0, c[0x0][0x168], RZ ; /* 0x00005a0000007a24 */ /* 0x000fc800078e02ff */ /*00c0*/ IMAD R9, R3, c[0x0][0x16c], R0 ; /* 0x00005b0003097a24 */ /* 0x000fca00078e0200 */ /*00d0*/ IADD3 R5, R5, R9, RZ ; /* 0x0000000905057210 */ /* 0x000fca0007ffe0ff */ /*00e0*/ IMAD.WIDE R4, R2, 0x4, R4 ; /* 0x0000000402047825 */ /* 0x000fca00078e0204 */ /*00f0*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */ /* 0x0000a2000c1e1900 */ /*0100*/ LEA R3, R3, R3, 0x2 ; /* 0x0000000303037211 */ /* 0x000fe400078e10ff */ /*0110*/ MOV R21, c[0x0][0x178] ; /* 0x00005e0000157a02 */ /* 0x000fe40000000f00 */ /*0120*/ SHF.R.S32.HI R7, RZ, 0x1f, R3 ; /* 0x0000001fff077819 */ /* 0x000fe40000011403 */ /*0130*/ IADD3 R6, R3.reuse, 0x1, RZ ; /* 0x0000000103067810 */ /* 0x040fe40007ffe0ff */ /*0140*/ IADD3 R8, R3, 0x2, RZ ; /* 0x0000000203087810 */ /* 0x000fe20007ffe0ff */ /*0150*/ IMAD R14, R7, c[0x0][0x178], RZ ; /* 0x00005e00070e7a24 */ /* 0x000fe200078e02ff */ /*0160*/ IADD3 R10, R3.reuse, 0x3, RZ ; /* 0x00000003030a7810 */ /* 0x040fe20007ffe0ff */ /*0170*/ IMAD.WIDE.U32 R4, R3, R21, c[0x0][0x170] ; /* 0x00005c0003047625 */ /* 0x001fe200078e0015 */ /*0180*/ SHF.R.S32.HI R7, RZ, 0x1f, R6 ; /* 0x0000001fff077819 */ /* 0x000fc40000011406 */ /*0190*/ IADD3 R12, R3.reuse, 0x4, RZ ; /* 0x00000004030c7810 */ /* 0x040fe20007ffe0ff */ /*01a0*/ IMAD R13, R3, c[0x0][0x17c], R14 ; /* 0x00005f00030d7a24 */ /* 0x000fe200078e020e */ /*01b0*/ SHF.R.S32.HI R9, RZ, 0x1f, R8 ; /* 0x0000001fff097819 */ /* 0x000fe20000011408 */ /*01c0*/ IMAD R7, R7, c[0x0][0x178], RZ ; /* 0x00005e0007077a24 */ /* 0x000fe200078e02ff */ /*01d0*/ SHF.R.S32.HI R3, RZ, 0x1f, R10 ; /* 0x0000001fff037819 */ /* 0x000fe4000001140a */ /*01e0*/ SHF.R.S32.HI R11, RZ, 0x1f, R12 ; /* 0x0000001fff0b7819 */ /* 0x000fe2000001140c */ /*01f0*/ IMAD R9, R9, c[0x0][0x178], RZ ; /* 0x00005e0009097a24 */ /* 0x000fe200078e02ff */ /*0200*/ IADD3 R5, R5, R13, RZ ; /* 0x0000000d05057210 */ /* 0x000fe20007ffe0ff */ /*0210*/ IMAD R15, R6, c[0x0][0x17c], R7 ; /* 0x00005f00060f7a24 */ /* 0x000fe400078e0207 */ /*0220*/ IMAD R17, R3, c[0x0][0x178], RZ ; /* 0x00005e0003117a24 */ /* 0x000fc400078e02ff */ /*0230*/ IMAD.WIDE.U32 R6, R6, R21, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fc800078e0015 */ /*0240*/ IMAD R19, R11, c[0x0][0x178], RZ ; /* 0x00005e000b137a24 */ /* 0x000fe200078e02ff */ /*0250*/ IADD3 R7, R7, R15, RZ ; /* 0x0000000f07077210 */ /* 0x000fe20007ffe0ff */ /*0260*/ IMAD R3, R8, c[0x0][0x17c], R9 ; /* 0x00005f0008037a24 */ /* 0x000fe200078e0209 */ /*0270*/ LEA R15, R2, R2, 0x2 ; /* 0x00000002020f7211 */ /* 0x000fe200078e10ff */ /*0280*/ IMAD.WIDE.U32 R8, R8, R21, c[0x0][0x170] ; /* 0x00005c0008087625 */ /* 0x000fc800078e0015 */ /*0290*/ IMAD R17, R10.reuse, c[0x0][0x17c], R17 ; /* 0x00005f000a117a24 */ /* 0x040fe200078e0211 */ /*02a0*/ IADD3 R9, R9, R3, RZ ; /* 0x0000000309097210 */ /* 0x000fe20007ffe0ff */ /*02b0*/ IMAD.WIDE.U32 R10, R10, R21, c[0x0][0x170] ; /* 0x00005c000a0a7625 */ /* 0x000fc800078e0015 */ /*02c0*/ IMAD R19, R12.reuse, c[0x0][0x17c], R19 ; /* 0x00005f000c137a24 */ /* 0x040fe200078e0213 */ /*02d0*/ IADD3 R11, R11, R17, RZ ; /* 0x000000110b0b7210 */ /* 0x000fe20007ffe0ff */ /*02e0*/ IMAD.WIDE.U32 R12, R12, R21, c[0x0][0x170] ; /* 0x00005c000c0c7625 */ /* 0x000fc800078e0015 */ /*02f0*/ IMAD.WIDE R4, R15, 0x4, R4 ; /* 0x000000040f047825 */ /* 0x000fe200078e0204 */ /*0300*/ IADD3 R13, R13, R19, RZ ; /* 0x000000130d0d7210 */ /* 0x000fc60007ffe0ff */ /*0310*/ IMAD.WIDE R2, R15, 0x4, R6 ; /* 0x000000040f027825 */ /* 0x000fc800078e0206 */ /*0320*/ IMAD.WIDE R6, R15, 0x4, R8 ; /* 0x000000040f067825 */ /* 0x000fc800078e0208 */ /*0330*/ IMAD.WIDE R8, R15, 0x4, R10 ; /* 0x000000040f087825 */ /* 0x000fc800078e020a */ /*0340*/ IMAD.WIDE R10, R15, 0x4, R12 ; /* 0x000000040f0a7825 */ /* 0x000fe200078e020c */ /*0350*/ STG.E [R4.64], R0 ; /* 0x0000000004007986 */ /* 0x004fe8000c101904 */ /*0360*/ STG.E [R4.64+0x4], R0 ; /* 0x0000040004007986 */ /* 0x000fe8000c101904 */ /*0370*/ STG.E [R4.64+0x8], R0 ; /* 0x0000080004007986 */ /* 0x000fe8000c101904 */ /*0380*/ STG.E [R4.64+0xc], R0 ; /* 0x00000c0004007986 */ /* 0x000fe8000c101904 */ /*0390*/ STG.E [R4.64+0x10], R0 ; /* 0x0000100004007986 */ /* 0x000fe8000c101904 */ /*03a0*/ STG.E [R2.64], R0 ; /* 0x0000000002007986 */ /* 0x000fe8000c101904 */ /*03b0*/ STG.E [R2.64+0x4], R0 ; /* 0x0000040002007986 */ /* 0x000fe8000c101904 */ /*03c0*/ STG.E [R2.64+0x8], R0 ; /* 0x0000080002007986 */ /* 0x000fe8000c101904 */ /*03d0*/ STG.E [R2.64+0xc], R0 ; /* 0x00000c0002007986 */ /* 0x000fe8000c101904 */ /*03e0*/ STG.E [R2.64+0x10], R0 ; /* 0x0000100002007986 */ /* 0x000fe8000c101904 */ /*03f0*/ STG.E [R6.64], R0 ; /* 0x0000000006007986 */ /* 0x000fe8000c101904 */ /*0400*/ STG.E [R6.64+0x4], R0 ; /* 0x0000040006007986 */ /* 0x000fe8000c101904 */ /*0410*/ STG.E [R6.64+0x8], R0 ; /* 0x0000080006007986 */ /* 0x000fe8000c101904 */ /*0420*/ STG.E [R6.64+0xc], R0 ; /* 0x00000c0006007986 */ /* 0x000fe8000c101904 */ /*0430*/ STG.E [R6.64+0x10], R0 ; /* 0x0000100006007986 */ /* 0x000fe8000c101904 */ /*0440*/ STG.E [R8.64], R0 ; /* 0x0000000008007986 */ /* 0x000fe8000c101904 */ /*0450*/ STG.E [R8.64+0x4], R0 ; /* 0x0000040008007986 */ /* 0x000fe8000c101904 */ /*0460*/ STG.E [R8.64+0x8], R0 ; /* 0x0000080008007986 */ /* 0x000fe8000c101904 */ /*0470*/ STG.E [R8.64+0xc], R0 ; /* 0x00000c0008007986 */ /* 0x000fe8000c101904 */ /*0480*/ STG.E [R8.64+0x10], R0 ; /* 0x0000100008007986 */ /* 0x000fe8000c101904 */ /*0490*/ STG.E [R10.64], R0 ; /* 0x000000000a007986 */ /* 0x000fe8000c101904 */ /*04a0*/ STG.E [R10.64+0x4], R0 ; /* 0x000004000a007986 */ /* 0x000fe8000c101904 */ /*04b0*/ STG.E [R10.64+0x8], R0 ; /* 0x000008000a007986 */ /* 0x000fe8000c101904 */ /*04c0*/ STG.E [R10.64+0xc], R0 ; /* 0x00000c000a007986 */ /* 0x000fe8000c101904 */ /*04d0*/ STG.E [R10.64+0x10], R0 ; /* 0x000010000a007986 */ /* 0x000fe2000c101904 */ /*04e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*04f0*/ BRA 0x4f0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0500*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0510*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" #define WEIGHTSUM 273 #define BLOCK_SIZE 16 int * heatmap; size_t heatmap_pitch; int * scaled_heatmap; size_t scaled_heatmap_pitch; int * blurred_heatmap; size_t blurred_heatmap_pitch; float* d_desiredPositionX; float* d_desiredPositionY; __global__ void computeScaledHeatmap(int* heatmap, size_t heatmap_pitch, int* scaled_heatmap, size_t scaled_heatmap_pitch) { // Block row and column int blockRow = blockIdx.y; int blockCol = blockIdx.x; // Thread row and column block int row = threadIdx.y; int col = threadIdx.x; // x, y coordinate int x = blockCol * blockDim.x + col; int y = blockRow * blockDim.y + row; // Scale the data for visual representation int value = *((int*)((char*)heatmap + y * heatmap_pitch) + x); for (int r = 0; r < CELLSIZE; r++) { int* row = (int*)((char*)scaled_heatmap + (r + y * CELLSIZE) * scaled_heatmap_pitch); for (int c = 0; c < CELLSIZE; c++) { row[x * CELLSIZE + c] = value; } } }
.text .file "computeScaledHeatmap.hip" .globl _Z35__device_stub__computeScaledHeatmapPimS_m # -- Begin function _Z35__device_stub__computeScaledHeatmapPimS_m .type _Z35__device_stub__computeScaledHeatmapPimS_m,@function _Z35__device_stub__computeScaledHeatmapPimS_m: # @_Z35__device_stub__computeScaledHeatmapPimS_m .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 16(%rsp), %rdx movq %rcx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z20computeScaledHeatmapPimS_m, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z35__device_stub__computeScaledHeatmapPimS_m, .Lfunc_end0-_Z35__device_stub__computeScaledHeatmapPimS_m .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z20computeScaledHeatmapPimS_m, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type heatmap,@object # @heatmap .bss .globl heatmap .p2align 3, 0x0 heatmap: .quad 0 .size heatmap, 8 .type heatmap_pitch,@object # @heatmap_pitch .globl heatmap_pitch .p2align 3, 0x0 heatmap_pitch: .quad 0 # 0x0 .size heatmap_pitch, 8 .type scaled_heatmap,@object # @scaled_heatmap .globl scaled_heatmap .p2align 3, 0x0 scaled_heatmap: .quad 0 .size scaled_heatmap, 8 .type scaled_heatmap_pitch,@object # @scaled_heatmap_pitch .globl scaled_heatmap_pitch .p2align 3, 0x0 scaled_heatmap_pitch: .quad 0 # 0x0 .size scaled_heatmap_pitch, 8 .type blurred_heatmap,@object # @blurred_heatmap .globl blurred_heatmap .p2align 3, 0x0 blurred_heatmap: .quad 0 .size blurred_heatmap, 8 .type blurred_heatmap_pitch,@object # @blurred_heatmap_pitch .globl blurred_heatmap_pitch .p2align 3, 0x0 blurred_heatmap_pitch: .quad 0 # 0x0 .size blurred_heatmap_pitch, 8 .type d_desiredPositionX,@object # @d_desiredPositionX .globl d_desiredPositionX .p2align 3, 0x0 d_desiredPositionX: .quad 0 .size d_desiredPositionX, 8 .type d_desiredPositionY,@object # @d_desiredPositionY .globl d_desiredPositionY .p2align 3, 0x0 d_desiredPositionY: .quad 0 .size d_desiredPositionY, 8 .type _Z20computeScaledHeatmapPimS_m,@object # @_Z20computeScaledHeatmapPimS_m .section .rodata,"a",@progbits .globl _Z20computeScaledHeatmapPimS_m .p2align 3, 0x0 _Z20computeScaledHeatmapPimS_m: .quad _Z35__device_stub__computeScaledHeatmapPimS_m .size _Z20computeScaledHeatmapPimS_m, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z20computeScaledHeatmapPimS_m" .size .L__unnamed_1, 31 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z35__device_stub__computeScaledHeatmapPimS_m .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z20computeScaledHeatmapPimS_m .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z20computeScaledHeatmapPimS_m ; -- Begin function _Z20computeScaledHeatmapPimS_m .globl _Z20computeScaledHeatmapPimS_m .p2align 8 .type _Z20computeScaledHeatmapPimS_m,@function _Z20computeScaledHeatmapPimS_m: ; @_Z20computeScaledHeatmapPimS_m ; %bb.0: s_clause 0x1 s_load_b32 s8, s[0:1], 0x2c s_load_b256 s[0:7], s[0:1], 0x0 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v0, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_lshr_b32 s9, s8, 16 s_and_b32 s8, s8, 0xffff v_mad_u64_u32 v[2:3], null, s15, s9, v[1:2] v_mad_u64_u32 v[3:4], null, s14, s8, v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v4, 31, v2 v_mul_lo_u32 v6, v2, s3 v_mad_u64_u32 v[0:1], null, v2, s2, s[0:1] v_mul_lo_u32 v7, v4, s2 v_ashrrev_i32_e32 v4, 31, v3 s_mov_b32 s2, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[4:5], 2, v[3:4] v_add3_u32 v1, v7, v1, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, v4 v_add_co_ci_u32_e32 v1, vcc_lo, v1, v5, vcc_lo v_lshl_add_u32 v5, v2, 2, v2 global_load_b32 v0, v[0:1], off v_lshl_add_u32 v1, v3, 2, v3 v_ashrrev_i32_e32 v3, 31, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v2, 31, v1 v_mul_lo_u32 v6, s6, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[1:2], 2, v[1:2] v_mad_u64_u32 v[3:4], null, s6, v5, v[1:2] v_mul_lo_u32 v1, s7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add3_u32 v2, v1, v4, v6 v_add_co_u32 v1, vcc_lo, s4, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo .LBB0_1: ; =>This Loop Header: Depth=1 ; Child Loop BB0_2 Depth 2 s_mov_b64 s[0:1], 0 .LBB0_2: ; Parent Loop BB0_1 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) v_add_co_u32 v3, vcc_lo, v1, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo s_add_u32 s0, s0, 4 s_addc_u32 s1, s1, 0 s_cmp_eq_u32 s0, 20 s_waitcnt vmcnt(0) global_store_b32 v[3:4], v0, off s_cbranch_scc0 .LBB0_2 ; %bb.3: ; in Loop: Header=BB0_1 Depth=1 v_add_co_u32 v1, vcc_lo, v1, s6 v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo s_add_i32 s2, s2, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s2, 5 s_cbranch_scc0 .LBB0_1 ; %bb.4: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z20computeScaledHeatmapPimS_m .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 8 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z20computeScaledHeatmapPimS_m, .Lfunc_end0-_Z20computeScaledHeatmapPimS_m ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 336 ; NumSgprs: 18 ; NumVgprs: 8 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 8 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 8 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 8 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z20computeScaledHeatmapPimS_m .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z20computeScaledHeatmapPimS_m.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 8 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
b23d13b2420bc49c49271690a707980c45541a6a
#include<stdio.h> #include<math.h> #include<cuda.h> #define N 256 __global__ void matrix_vector_multi_gpu_2_128(float *A_d,float *B_d,float *C_d){ int i,j; j=blockIdx.x*128+threadIdx.x; A_d[j]=0.0F; for(i=0;i<N;i++){ A_d[j]=A_d[j]+B_d[j*N+i]*C_d[i]; } } int main(){ int i,j; float A[N],B[N*N],C[N]; float *A_d,*B_d,*C_d; dim3 blocks(2,1,1); dim3 threads(128,1,1); for(j=0;j<N;j++){ for(i=0;i<N;i++){ B[j*N+i]=((float)j)/256.0; } } for(j=0;j<N;j++){ C[j]=1.0F; } cudaMalloc((void**)&A_d,N*sizeof(float)); cudaMalloc((void**)&B_d,N*N*sizeof(float)); cudaMalloc((void**)&C_d,N*sizeof(float)); cudaMemcpy(A_d,A,N*sizeof(float),cudaMemcpyHostToDevice); cudaMemcpy(B_d,B,N*N*sizeof(float),cudaMemcpyHostToDevice); cudaMemcpy(C_d,C,N*sizeof(float),cudaMemcpyHostToDevice); matrix_vector_multi_gpu_2_128<<<blocks,threads>>>(A_d,B_d,C_d); cudaMemcpy(A,A_d,N*sizeof(float),cudaMemcpyDeviceToHost); for(j=0;j<N;j++){ printf("A[ %d ]=%f \n",j,A[j]); } cudaFree(A_d); cudaFree(B_d); cudaFree(C_d); return 0; }
.file "tmpxft_00331a62_00000000-6_Matrix-cuda-2-128.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z53__device_stub__Z29matrix_vector_multi_gpu_2_128PfS_S_PfS_S_ .type _Z53__device_stub__Z29matrix_vector_multi_gpu_2_128PfS_S_PfS_S_, @function _Z53__device_stub__Z29matrix_vector_multi_gpu_2_128PfS_S_PfS_S_: .LFB2052: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z29matrix_vector_multi_gpu_2_128PfS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z53__device_stub__Z29matrix_vector_multi_gpu_2_128PfS_S_PfS_S_, .-_Z53__device_stub__Z29matrix_vector_multi_gpu_2_128PfS_S_PfS_S_ .globl _Z29matrix_vector_multi_gpu_2_128PfS_S_ .type _Z29matrix_vector_multi_gpu_2_128PfS_S_, @function _Z29matrix_vector_multi_gpu_2_128PfS_S_: .LFB2053: .cfi_startproc endbr64 jmp _Z53__device_stub__Z29matrix_vector_multi_gpu_2_128PfS_S_PfS_S_ .cfi_endproc .LFE2053: .size _Z29matrix_vector_multi_gpu_2_128PfS_S_, .-_Z29matrix_vector_multi_gpu_2_128PfS_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC2: .string "A[ %d ]=%f \n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 leaq -262144(%rsp), %r11 .cfi_def_cfa 11, 262176 .LPSRL0: subq $4096, %rsp orq $0, (%rsp) cmpq %r11, %rsp jne .LPSRL0 .cfi_def_cfa_register 7 subq $2112, %rsp .cfi_def_cfa_offset 264288 movss .LC0(%rip), %xmm1 xorl %edx, %edx movq %fs:40, %rax movq %rax, 264248(%rsp) movabsq $4294967298, %rax movl $1, 40(%rsp) leaq 2104(%rsp), %rcx movl $1, 52(%rsp) movq %rcx, %rbx movq %rax, 32(%rsp) addq $126, %rax movq %rax, 44(%rsp) .L9: cvtsi2ssl %edx, %xmm0 xorl %eax, %eax mulss %xmm1, %xmm0 .L10: movss %xmm0, (%rcx,%rax,4) incq %rax cmpq $256, %rax jne .L10 incl %edx addq $1024, %rcx cmpl $256, %edx jne .L9 movss .LC1(%rip), %xmm0 xorl %eax, %eax .L11: leaq 1080(%rsp), %r12 movss %xmm0, (%r12,%rax,4) incq %rax cmpq $256, %rax jne .L11 leaq 8(%rsp), %rdi movl $1024, %esi leaq 56(%rsp), %rbp call cudaMalloc@PLT leaq 16(%rsp), %rdi movl $262144, %esi call cudaMalloc@PLT leaq 24(%rsp), %rdi movl $1024, %esi call cudaMalloc@PLT movq 8(%rsp), %rdi movl $1, %ecx movq %rbp, %rsi movl $1024, %edx call cudaMemcpy@PLT movq 16(%rsp), %rdi movl $1, %ecx movq %rbx, %rsi movl $262144, %edx call cudaMemcpy@PLT movq 24(%rsp), %rdi movl $1, %ecx movq %r12, %rsi movl $1024, %edx call cudaMemcpy@PLT movl 52(%rsp), %ecx movl 40(%rsp), %esi xorl %r9d, %r9d movq 44(%rsp), %rdx movq 32(%rsp), %rdi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L12 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movq 8(%rsp), %rdi call _Z53__device_stub__Z29matrix_vector_multi_gpu_2_128PfS_S_PfS_S_ .L12: movq 8(%rsp), %rsi movl $2, %ecx movq %rbp, %rdi xorl %ebx, %ebx movl $1024, %edx leaq .LC2(%rip), %r12 call cudaMemcpy@PLT .L13: movl %ebx, %edx cvtss2sd 0(%rbp,%rbx,4), %xmm0 movq %r12, %rsi movb $1, %al movl $2, %edi incq %rbx call __printf_chk@PLT cmpq $256, %rbx jne .L13 movq 8(%rsp), %rdi call cudaFree@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call cudaFree@PLT movq 264248(%rsp), %rax subq %fs:40, %rax je .L14 call __stack_chk_fail@PLT .L14: addq $264256, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC3: .string "_Z29matrix_vector_multi_gpu_2_128PfS_S_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC3(%rip), %rdx movq %rax, %rdi leaq _Z29matrix_vector_multi_gpu_2_128PfS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC0: .long 998244352 .align 4 .LC1: .long 1065353216 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z29matrix_vector_multi_gpu_2_128PfS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0040*/ MOV R6, c[0x0][0x170] ; /* 0x00005c0000067a02 */ /* 0x000fe20000000f00 */ /*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e220000002100 */ /*0060*/ MOV R7, c[0x0][0x174] ; /* 0x00005d0000077a02 */ /* 0x000fe40000000f00 */ /*0070*/ MOV R9, RZ ; /* 0x000000ff00097202 */ /* 0x000fe40000000f00 */ /*0080*/ LEA R0, R0, R3, 0x7 ; /* 0x0000000300007211 */ /* 0x001fc800078e38ff */ /*0090*/ SHF.L.U32 R4, R0.reuse, 0x8, RZ ; /* 0x0000000800047819 */ /* 0x040fe200000006ff */ /*00a0*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fe200078e0205 */ /*00b0*/ MOV R0, RZ ; /* 0x000000ff00007202 */ /* 0x000fc60000000f00 */ /*00c0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */ /* 0x000fe200078e0205 */ /*00d0*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e8000c101904 */ /*00e0*/ IADD3 R8, P0, R4, 0x20, RZ ; /* 0x0000002004087810 */ /* 0x000fc80007f1e0ff */ /*00f0*/ IADD3.X R5, RZ, R5, RZ, P0, !PT ; /* 0x00000005ff057210 */ /* 0x000fe400007fe4ff */ /*0100*/ MOV R4, R8 ; /* 0x0000000800047202 */ /* 0x000fe40000000f00 */ /*0110*/ LDG.E R8, [R6.64] ; /* 0x0000000406087981 */ /* 0x004ea8000c1e1900 */ /*0120*/ LDG.E R10, [R4.64+-0x20] ; /* 0xffffe004040a7981 */ /* 0x000ea4000c1e1900 */ /*0130*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x004fca0000000009 */ /*0140*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0003e8000c101904 */ /*0150*/ LDG.E R8, [R6.64+0x4] ; /* 0x0000040406087981 */ /* 0x000ea8000c1e1900 */ /*0160*/ LDG.E R10, [R4.64+-0x1c] ; /* 0xffffe404040a7981 */ /* 0x000ea4000c1e1900 */ /*0170*/ FFMA R11, R8, R10, R9 ; /* 0x0000000a080b7223 */ /* 0x004fca0000000009 */ /*0180*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*0190*/ LDG.E R8, [R6.64+0x8] ; /* 0x0000080406087981 */ /* 0x000ee8000c1e1900 */ /*01a0*/ LDG.E R10, [R4.64+-0x18] ; /* 0xffffe804040a7981 */ /* 0x000ee4000c1e1900 */ /*01b0*/ FFMA R13, R8, R10, R11 ; /* 0x0000000a080d7223 */ /* 0x008fca000000000b */ /*01c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0007e8000c101904 */ /*01d0*/ LDG.E R8, [R6.64+0xc] ; /* 0x00000c0406087981 */ /* 0x000e68000c1e1900 */ /*01e0*/ LDG.E R10, [R4.64+-0x14] ; /* 0xffffec04040a7981 */ /* 0x000e64000c1e1900 */ /*01f0*/ FFMA R9, R8, R10, R13 ; /* 0x0000000a08097223 */ /* 0x002fca000000000d */ /*0200*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0003e8000c101904 */ /*0210*/ LDG.E R8, [R6.64+0x10] ; /* 0x0000100406087981 */ /* 0x000ea8000c1e1900 */ /*0220*/ LDG.E R10, [R4.64+-0x10] ; /* 0xfffff004040a7981 */ /* 0x000ea4000c1e1900 */ /*0230*/ FFMA R11, R8, R10, R9 ; /* 0x0000000a080b7223 */ /* 0x004fca0000000009 */ /*0240*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*0250*/ LDG.E R8, [R6.64+0x14] ; /* 0x0000140406087981 */ /* 0x000ee8000c1e1900 */ /*0260*/ LDG.E R10, [R4.64+-0xc] ; /* 0xfffff404040a7981 */ /* 0x000ee4000c1e1900 */ /*0270*/ FFMA R13, R8, R10, R11 ; /* 0x0000000a080d7223 */ /* 0x008fca000000000b */ /*0280*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0007e8000c101904 */ /*0290*/ LDG.E R8, [R6.64+0x18] ; /* 0x0000180406087981 */ /* 0x000e68000c1e1900 */ /*02a0*/ LDG.E R10, [R4.64+-0x8] ; /* 0xfffff804040a7981 */ /* 0x000e64000c1e1900 */ /*02b0*/ FFMA R9, R8, R10, R13 ; /* 0x0000000a08097223 */ /* 0x002fca000000000d */ /*02c0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0003e8000c101904 */ /*02d0*/ LDG.E R8, [R6.64+0x1c] ; /* 0x00001c0406087981 */ /* 0x000ea8000c1e1900 */ /*02e0*/ LDG.E R10, [R4.64+-0x4] ; /* 0xfffffc04040a7981 */ /* 0x000ea4000c1e1900 */ /*02f0*/ FFMA R11, R8, R10, R9 ; /* 0x0000000a080b7223 */ /* 0x004fca0000000009 */ /*0300*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*0310*/ LDG.E R8, [R6.64+0x20] ; /* 0x0000200406087981 */ /* 0x000ee8000c1e1900 */ /*0320*/ LDG.E R10, [R4.64] ; /* 0x00000004040a7981 */ /* 0x000ee4000c1e1900 */ /*0330*/ FFMA R13, R8, R10, R11 ; /* 0x0000000a080d7223 */ /* 0x008fca000000000b */ /*0340*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0007e8000c101904 */ /*0350*/ LDG.E R8, [R6.64+0x24] ; /* 0x0000240406087981 */ /* 0x000e68000c1e1900 */ /*0360*/ LDG.E R10, [R4.64+0x4] ; /* 0x00000404040a7981 */ /* 0x000e64000c1e1900 */ /*0370*/ FFMA R9, R8, R10, R13 ; /* 0x0000000a08097223 */ /* 0x002fca000000000d */ /*0380*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0003e8000c101904 */ /*0390*/ LDG.E R8, [R6.64+0x28] ; /* 0x0000280406087981 */ /* 0x000ea8000c1e1900 */ /*03a0*/ LDG.E R10, [R4.64+0x8] ; /* 0x00000804040a7981 */ /* 0x000ea4000c1e1900 */ /*03b0*/ FFMA R11, R8, R10, R9 ; /* 0x0000000a080b7223 */ /* 0x004fca0000000009 */ /*03c0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*03d0*/ LDG.E R8, [R6.64+0x2c] ; /* 0x00002c0406087981 */ /* 0x000ee8000c1e1900 */ /*03e0*/ LDG.E R10, [R4.64+0xc] ; /* 0x00000c04040a7981 */ /* 0x000ee4000c1e1900 */ /*03f0*/ FFMA R13, R8, R10, R11 ; /* 0x0000000a080d7223 */ /* 0x008fca000000000b */ /*0400*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0007e8000c101904 */ /*0410*/ LDG.E R8, [R6.64+0x30] ; /* 0x0000300406087981 */ /* 0x000e68000c1e1900 */ /*0420*/ LDG.E R10, [R4.64+0x10] ; /* 0x00001004040a7981 */ /* 0x000e64000c1e1900 */ /*0430*/ FFMA R9, R8, R10, R13 ; /* 0x0000000a08097223 */ /* 0x002fca000000000d */ /*0440*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0003e8000c101904 */ /*0450*/ LDG.E R8, [R6.64+0x34] ; /* 0x0000340406087981 */ /* 0x000ea8000c1e1900 */ /*0460*/ LDG.E R10, [R4.64+0x14] ; /* 0x00001404040a7981 */ /* 0x000ea4000c1e1900 */ /*0470*/ FFMA R11, R8, R10, R9 ; /* 0x0000000a080b7223 */ /* 0x004fca0000000009 */ /*0480*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*0490*/ LDG.E R8, [R6.64+0x38] ; /* 0x0000380406087981 */ /* 0x000ee8000c1e1900 */ /*04a0*/ LDG.E R10, [R4.64+0x18] ; /* 0x00001804040a7981 */ /* 0x000ee2000c1e1900 */ /*04b0*/ IADD3 R0, R0, 0x10, RZ ; /* 0x0000001000007810 */ /* 0x000fe20007ffe0ff */ /*04c0*/ FFMA R13, R8, R10, R11 ; /* 0x0000000a080d7223 */ /* 0x008fca000000000b */ /*04d0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*04e0*/ LDG.E R8, [R6.64+0x3c] ; /* 0x00003c0406087981 */ /* 0x000668000c1e1900 */ /*04f0*/ LDG.E R10, [R4.64+0x1c] ; /* 0x00001c04040a7981 */ /* 0x000e62000c1e1900 */ /*0500*/ ISETP.NE.AND P0, PT, R0, 0x100, PT ; /* 0x000001000000780c */ /* 0x000fe40003f05270 */ /*0510*/ IADD3 R6, P2, R6, 0x40, RZ ; /* 0x0000004006067810 */ /* 0x008fc80007f5e0ff */ /*0520*/ IADD3.X R7, RZ, R7, RZ, P2, !PT ; /* 0x00000007ff077210 */ /* 0x000fe200017fe4ff */ /*0530*/ FFMA R9, R8, R10, R13 ; /* 0x0000000a08097223 */ /* 0x002fe2000000000d */ /*0540*/ IADD3 R8, P1, R4, 0x40, RZ ; /* 0x0000004004087810 */ /* 0x000fc80007f3e0ff */ /*0550*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0005e2000c101904 */ /*0560*/ IADD3.X R5, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff057210 */ /* 0x000fe20000ffe4ff */ /*0570*/ @P0 BRA 0x100 ; /* 0xfffffb8000000947 */ /* 0x000fea000383ffff */ /*0580*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0590*/ BRA 0x590; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*05a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0600*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0610*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0620*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0630*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0640*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0650*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0660*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0670*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include<stdio.h> #include<math.h> #include<hip/hip_runtime.h> #define N 256 __global__ void matrix_vector_multi_gpu_2_128(float *A_d,float *B_d,float *C_d){ int i,j; j=blockIdx.x*128+threadIdx.x; A_d[j]=0.0F; for(i=0;i<N;i++){ A_d[j]=A_d[j]+B_d[j*N+i]*C_d[i]; } } int main(){ int i,j; float A[N],B[N*N],C[N]; float *A_d,*B_d,*C_d; dim3 blocks(2,1,1); dim3 threads(128,1,1); for(j=0;j<N;j++){ for(i=0;i<N;i++){ B[j*N+i]=((float)j)/256.0; } } for(j=0;j<N;j++){ C[j]=1.0F; } hipMalloc((void**)&A_d,N*sizeof(float)); hipMalloc((void**)&B_d,N*N*sizeof(float)); hipMalloc((void**)&C_d,N*sizeof(float)); hipMemcpy(A_d,A,N*sizeof(float),hipMemcpyHostToDevice); hipMemcpy(B_d,B,N*N*sizeof(float),hipMemcpyHostToDevice); hipMemcpy(C_d,C,N*sizeof(float),hipMemcpyHostToDevice); matrix_vector_multi_gpu_2_128<<<blocks,threads>>>(A_d,B_d,C_d); hipMemcpy(A,A_d,N*sizeof(float),hipMemcpyDeviceToHost); for(j=0;j<N;j++){ printf("A[ %d ]=%f \n",j,A[j]); } hipFree(A_d); hipFree(B_d); hipFree(C_d); return 0; }
.text .file "Matrix-cuda-2-128.hip" .globl _Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_ # -- Begin function _Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_ .type _Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_,@function _Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_: # @_Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z29matrix_vector_multi_gpu_2_128PfS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_, .Lfunc_end0-_Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_ .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI1_0: .quad 0x3f70000000000000 # double 0.00390625 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $264224, %rsp # imm = 0x40820 .cfi_def_cfa_offset 264256 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 2080(%rsp), %rax xorl %ecx, %ecx movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero .LBB1_1: # %.preheader23 # =>This Loop Header: Depth=1 # Child Loop BB1_2 Depth 2 xorps %xmm1, %xmm1 cvtsi2sd %ecx, %xmm1 mulsd %xmm0, %xmm1 cvtsd2ss %xmm1, %xmm1 xorl %edx, %edx .LBB1_2: # Parent Loop BB1_1 Depth=1 # => This Inner Loop Header: Depth=2 movss %xmm1, (%rax,%rdx,4) incq %rdx cmpq $256, %rdx # imm = 0x100 jne .LBB1_2 # %bb.3: # in Loop: Header=BB1_1 Depth=1 incq %rcx addq $1024, %rax # imm = 0x400 cmpq $256, %rcx # imm = 0x100 jne .LBB1_1 # %bb.4: # %.preheader.preheader xorl %eax, %eax .LBB1_5: # %.preheader # =>This Inner Loop Header: Depth=1 movl $1065353216, 1056(%rsp,%rax,4) # imm = 0x3F800000 incq %rax cmpq $256, %rax # imm = 0x100 jne .LBB1_5 # %bb.6: leaq 8(%rsp), %rbx movl $1024, %esi # imm = 0x400 movq %rbx, %rdi callq hipMalloc leaq 24(%rsp), %r14 movl $262144, %esi # imm = 0x40000 movq %r14, %rdi callq hipMalloc leaq 16(%rsp), %r15 movl $1024, %esi # imm = 0x400 movq %r15, %rdi callq hipMalloc movq (%rbx), %rdi leaq 32(%rsp), %rsi movl $1024, %edx # imm = 0x400 movl $1, %ecx callq hipMemcpy movq (%r14), %rdi leaq 2080(%rsp), %rsi movl $262144, %edx # imm = 0x40000 movl $1, %ecx callq hipMemcpy movq (%r15), %rdi leaq 1056(%rsp), %rsi movl $1024, %edx # imm = 0x400 movl $1, %ecx callq hipMemcpy movabsq $4294967298, %rdi # imm = 0x100000002 leaq 126(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_8 # %bb.7: movq 8(%rsp), %rdi movq 24(%rsp), %rsi movq 16(%rsp), %rdx callq _Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_ .LBB1_8: movq 8(%rsp), %rsi leaq 32(%rsp), %rdi movl $1024, %edx # imm = 0x400 movl $2, %ecx callq hipMemcpy xorl %ebx, %ebx .LBB1_9: # =>This Inner Loop Header: Depth=1 xorps %xmm0, %xmm0 cvtss2sd 32(%rsp,%rbx,4), %xmm0 movl $.L.str, %edi movl %ebx, %esi movb $1, %al callq printf incq %rbx cmpq $256, %rbx # imm = 0x100 jne .LBB1_9 # %bb.10: movq 8(%rsp), %rdi callq hipFree movq 24(%rsp), %rdi callq hipFree movq 16(%rsp), %rdi callq hipFree xorl %eax, %eax addq $264224, %rsp # imm = 0x40820 .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z29matrix_vector_multi_gpu_2_128PfS_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z29matrix_vector_multi_gpu_2_128PfS_S_,@object # @_Z29matrix_vector_multi_gpu_2_128PfS_S_ .section .rodata,"a",@progbits .globl _Z29matrix_vector_multi_gpu_2_128PfS_S_ .p2align 3, 0x0 _Z29matrix_vector_multi_gpu_2_128PfS_S_: .quad _Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_ .size _Z29matrix_vector_multi_gpu_2_128PfS_S_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "A[ %d ]=%f \n" .size .L.str, 13 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z29matrix_vector_multi_gpu_2_128PfS_S_" .size .L__unnamed_1, 40 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z44__device_stub__matrix_vector_multi_gpu_2_128PfS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z29matrix_vector_multi_gpu_2_128PfS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z29matrix_vector_multi_gpu_2_128PfS_S_ ; -- Begin function _Z29matrix_vector_multi_gpu_2_128PfS_S_ .globl _Z29matrix_vector_multi_gpu_2_128PfS_S_ .p2align 8 .type _Z29matrix_vector_multi_gpu_2_128PfS_S_,@function _Z29matrix_vector_multi_gpu_2_128PfS_S_: ; @_Z29matrix_vector_multi_gpu_2_128PfS_S_ ; %bb.0: s_load_b128 s[4:7], s[0:1], 0x0 v_lshl_add_u32 v0, s15, 7, v0 s_load_b64 s[0:1], s[0:1], 0x10 v_mov_b32_e32 v5, 0 s_mov_b64 s[2:3], 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 8, v0 v_ashrrev_i32_e32 v1, 31, v0 v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[0:1], 2, v[0:1] v_lshlrev_b64 v[3:4], 2, v[3:4] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, s4, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v3, vcc_lo, s6, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo global_store_b32 v[0:1], v2, off .LBB0_1: ; =>This Inner Loop Header: Depth=1 v_add_co_u32 v6, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v7, vcc_lo, s3, v4, vcc_lo s_add_u32 s4, s0, s2 s_addc_u32 s5, s1, s3 global_load_b32 v8, v2, s[4:5] global_load_b32 v6, v[6:7], off s_add_u32 s2, s2, 4 s_addc_u32 s3, s3, 0 s_cmpk_lg_i32 s2, 0x400 s_waitcnt vmcnt(0) v_fmac_f32_e32 v5, v6, v8 global_store_b32 v[0:1], v5, off s_cbranch_scc1 .LBB0_1 ; %bb.2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z29matrix_vector_multi_gpu_2_128PfS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 24 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z29matrix_vector_multi_gpu_2_128PfS_S_, .Lfunc_end0-_Z29matrix_vector_multi_gpu_2_128PfS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 196 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 24 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z29matrix_vector_multi_gpu_2_128PfS_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z29matrix_vector_multi_gpu_2_128PfS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 9 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
f591c0fb722293686c2b141ff4f1a4e156515797
#include<stdio.h> #include<stdlib.h> #include<cuda.h> // #include <opencv2/opencv.hpp> #include<fstream> // #include <TooN/TooN.h> // #include <TooN/se3.h> // #include <TooN/GR_SVD.h> // using namespace cv; using namespace std; __device__ int get_pos(){ return threadIdx.x + blockIdx.x * blockDim.x; } struct Img{ int* data; int image_width; int image_height; int img_arr_size; Img(){ } Img(int w, int h){ image_height = h; image_width = w; img_arr_size = sizeof(int) * image_width*image_height; cudaMalloc((void**)&data, img_arr_size); } }; struct Matrix4 { float4 data[4]; inline __host__ __device__ float3 get_translation() const { return make_float3(data[0].w, data[1].w, data[2].w); } }; inline Matrix4 getCameraMatrix( const float4 & k ){ Matrix4 K; K.data[0] = make_float4(k.x, 0, k.z, 0); K.data[1] = make_float4(0, k.y, k.w, 0); K.data[2] = make_float4(0, 0, 1, 0); K.data[3] = make_float4(0, 0, 0, 1); return K; } inline Matrix4 getInverseCameraMatrix( const float4 & k ){ Matrix4 invK; invK.data[0] = make_float4(1.0f/k.x, 0, -k.z/k.x, 0); invK.data[1] = make_float4(0, 1.0f/k.y, -k.w/k.y, 0); invK.data[2] = make_float4(0, 0, 1, 0); invK.data[3] = make_float4(0, 0, 0, 1); return invK; } inline __host__ __device__ float3 make_float3(float4 a) { // printf("make_float3_start\n"); return make_float3(a.x, a.y, a.z); } inline __host__ __device__ float dot(float3 a, float3 b) { // printf("dot_start\n"); return a.x * b.x + a.y * b.y + a.z * b.z; } inline __host__ __device__ float3 rotate( const Matrix4 & M, const float3 & v){ // printf("start\n"); float3 ans = make_float3(dot(make_float3(M.data[0]), v),dot(make_float3(M.data[1]), v),dot(make_float3(M.data[2]), v)); // printf("end\n"); return ans; } std::ostream & operator<<( std::ostream & out, const Matrix4 & m ){ for(unsigned i = 0; i < 4; ++i) out << m.data[i].x << " " << m.data[i].y << " " << m.data[i].z << " " << m.data[i].w << "\n"; return out; } // __global__ void point2depthimage(Matrix4 r_inv, float* depth_image, float* point_sequence) { // printf("aaa\n"); // } __global__ void mykernel(float3* a, const Matrix4 r_inv, int max_num,Img* img){ // printf("%d %d %d %d \n", r_inv.data[0].x, r_inv.data[0].y, r_inv.data[0].z, r_inv.data[0].w); int index = get_pos(); if(index >= max_num) return ; // printf("index is %d x is %f, y is %f, z is %f\n", index,arr[index].x, arr[index].y, arr[index].z); float3 pixel_ = rotate(r_inv, a[index]); int depth = int(pixel_.z); int2 image_pos =make_int2(pixel_.x / pixel_.z, pixel_.y / pixel_.z); if(image_pos.x >= img->image_width || image_pos.y >= img->image_height ) return; else{ img->data[img->image_width * image_pos.y + image_pos.x] = depth; } printf("index is %d,x is %f, y is %f, z is %f, image_pos.x is %d, image_pos.z is %d\n",index,pixel_.x, pixel_.y, pixel_.z, image_pos.x, image_pos.y); } int num = 1000; float3* simulation_array; float3* test_gpu_array; int* img; int array_size = sizeof(float3)*num; float4 four_element = make_float4(1,1,1,1); int img_width = 100, img_height = 200; int* image_show; Img* img_show = new Img(img_width, img_height); // Matrix4 camera_M = getCameraMatrix(rotate_matrix); Matrix4 inv_camera_M = getInverseCameraMatrix(four_element); int main() { simulation_array = (float3*)malloc(array_size); image_show = (int*)malloc(img_show->img_arr_size); // mykernel<<<100,1000>>>(); for(int x = 0; x<num;x++){ simulation_array[x] = make_float3(rand()%10,rand()%10,rand()%10); // printf("%f, %f, %f\n", simulation_array[x].x, simulation_arr/ay[x].y,simulation_array[x].z); } cudaMalloc((void**)&test_gpu_array, array_size); cudaMemcpy(test_gpu_array,simulation_array,array_size, cudaMemcpyHostToDevice); // cout<<inv_camera_M; mykernel<<<100,10>>>(test_gpu_array, inv_camera_M, num, img_show); cudaMemcpy(image_show,img_show->data, img_show->img_arr_size, cudaMemcpyDeviceToHost); // printf("Hello World!\n"); cudaDeviceSynchronize(); ofstream ofile; ofile.open("image_show.txt"); for(int i=0; i<img_height;i++) for(int j=0;j<img_width;j++){ if(j == img_width-1) ofile<<image_show[i*img_width + j]<<'\n'; else ofile<<image_show[i*img_width + j]<<' '; } ofile.close(); cudaDeviceReset(); // uchar *ptmp = NULL; // Mat depth_image = Mat(img_height, img_width, CV_8UC1); // for(int i = 0 ;i<img_height;i++){ // // ptmp = depth_image.ptr<uchar>(i); // for(int ii = 0; ii < img_width; ii++){ // depth_image.at<uchar>(i,ii) = image_show[ii+i*img_show->image_width]; // } // } // // namedWindow("depth_image"); // imshow("depth_image", depth_image); // waitKey(0); }
.file "tmpxft_0037d407_00000000-6_test.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3783: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3783: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .type _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0, @function _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0: .LFB4487: .cfi_startproc subq $24, %rsp .cfi_def_cfa_offset 32 movq (%rdi), %rax movb %sil, 12(%rsp) movq -24(%rax), %rax cmpq $0, 16(%rdi,%rax) je .L3 leaq 12(%rsp), %rsi movl $1, %edx call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT jmp .L2 .L3: movsbl 12(%rsp), %esi call _ZNSo3putEc@PLT .L2: addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE4487: .size _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0, .-_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0 .globl _Z7get_posv .type _Z7get_posv, @function _Z7get_posv: .LFB3766: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE3766: .size _Z7get_posv, .-_Z7get_posv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string " " .LC1: .string "\n" .text .globl _ZlsRSoRK7Matrix4 .type _ZlsRSoRK7Matrix4, @function _ZlsRSoRK7Matrix4: .LFB3779: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 leaq 64(%rsi), %r13 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 leaq .LC0(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movq %rsi, %rbx pushq %rcx .cfi_def_cfa_offset 48 .L10: movq %rbp, %rdi cvtss2sd (%rbx), %xmm0 addq $16, %rbx call _ZNSo9_M_insertIdEERSoT_@PLT movq %r12, %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT cvtss2sd -12(%rbx), %xmm0 movq %rax, %rdi call _ZNSo9_M_insertIdEERSoT_@PLT movq %r12, %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT cvtss2sd -8(%rbx), %xmm0 movq %rax, %rdi call _ZNSo9_M_insertIdEERSoT_@PLT movq %r12, %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT cvtss2sd -4(%rbx), %xmm0 movq %rax, %rdi call _ZNSo9_M_insertIdEERSoT_@PLT leaq .LC1(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT cmpq %r13, %rbx jne .L10 popq %rdx .cfi_def_cfa_offset 40 movq %rbp, %rax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3779: .size _ZlsRSoRK7Matrix4, .-_ZlsRSoRK7Matrix4 .globl _Z47__device_stub__Z8mykernelP6float37Matrix4iP3ImgP6float3RK7Matrix4iP3Img .type _Z47__device_stub__Z8mykernelP6float37Matrix4iP3ImgP6float3RK7Matrix4iP3Img, @function _Z47__device_stub__Z8mykernelP6float37Matrix4iP3ImgP6float3RK7Matrix4iP3Img: .LFB3805: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movl %edx, 20(%rsp) leaq 40(%rsp), %rdx movq %rcx, 8(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movq %rsi, 112(%rsp) leaq 68(%rsp), %rsi movq %rax, 104(%rsp) leaq 20(%rsp), %rax movq %rax, 120(%rsp) leaq 8(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movl $1, 64(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L13 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z8mykernelP6float37Matrix4iP3Img(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L13: movq 136(%rsp), %rax subq %fs:40, %rax je .L15 call __stack_chk_fail@PLT .L15: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3805: .size _Z47__device_stub__Z8mykernelP6float37Matrix4iP3ImgP6float3RK7Matrix4iP3Img, .-_Z47__device_stub__Z8mykernelP6float37Matrix4iP3ImgP6float3RK7Matrix4iP3Img .globl _Z8mykernelP6float37Matrix4iP3Img .type _Z8mykernelP6float37Matrix4iP3Img, @function _Z8mykernelP6float37Matrix4iP3Img: .LFB3806: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 movq %rdx, %rcx movl %esi, %edx leaq 16(%rsp), %rsi call _Z47__device_stub__Z8mykernelP6float37Matrix4iP3ImgP6float3RK7Matrix4iP3Img popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3806: .size _Z8mykernelP6float37Matrix4iP3Img, .-_Z8mykernelP6float37Matrix4iP3Img .section .rodata.str1.1 .LC2: .string "_Z8mykernelP6float37Matrix4iP3Img" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3808: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC2(%rip), %rdx movq %rax, %rdi leaq _Z8mykernelP6float37Matrix4iP3Img(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3808: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .rodata.str1.1 .LC3: .string "image_show.txt" .section .text.startup .globl main .type main, @function main: .LFB3780: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA3780 endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 xorl %ebp, %ebp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movl $10, %ebx subq $576, %rsp .cfi_def_cfa_offset 608 movslq array_size(%rip), %rdi movq %fs:40, %rax movq %rax, 568(%rsp) xorl %eax, %eax call malloc@PLT movq %rax, simulation_array(%rip) movq img_show(%rip), %rax movslq 16(%rax), %rdi call malloc@PLT movq %rax, image_show(%rip) .L22: cmpl %ebp, num(%rip) jle .L41 call rand@PLT cltd idivl %ebx cvtsi2ssl %edx, %xmm2 movd %xmm2, %r12d call rand@PLT cltd idivl %ebx cvtsi2ssl %edx, %xmm0 movss %xmm0, 12(%rsp) call rand@PLT movss 12(%rsp), %xmm0 imulq $12, %rbp, %rcx addq simulation_array(%rip), %rcx cltd movl %r12d, 8(%rcx) incq %rbp idivl %ebx movss %xmm0, 4(%rcx) cvtsi2ssl %edx, %xmm1 movss %xmm1, (%rcx) jmp .L22 .L41: movslq array_size(%rip), %rsi leaq test_gpu_array(%rip), %rdi leaq 48(%rsp), %rbx .LEHB0: call cudaMalloc@PLT movslq array_size(%rip), %rdx movl $1, %ecx movq simulation_array(%rip), %rsi movq test_gpu_array(%rip), %rdi call cudaMemcpy@PLT movl $2147483653, %edx xorl %r9d, %r9d xorl %r8d, %r8d movl $1073741849, %edi addq %rdx, %rdx movl $1, %ecx movl $1, %esi salq $2, %rdi movq %rdx, 36(%rsp) movl $1, 44(%rsp) movq %rdi, 24(%rsp) movl $1, 32(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L24 leaq inv_camera_M(%rip), %rsi movl $16, %ecx movq %rbx, %rdi movl num(%rip), %edx rep movsl movq img_show(%rip), %rcx movq test_gpu_array(%rip), %rdi movq %rbx, %rsi call _Z47__device_stub__Z8mykernelP6float37Matrix4iP3ImgP6float3RK7Matrix4iP3Img .L24: movq img_show(%rip), %rax movq image_show(%rip), %rdi movl $2, %ecx movslq 16(%rax), %rdx movq (%rax), %rsi call cudaMemcpy@PLT call cudaDeviceSynchronize@PLT movq %rbx, %rdi call _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT .LEHE0: movl $16, %edx leaq .LC3(%rip), %rsi movq %rbx, %rdi .LEHB1: call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT xorl %r12d, %r12d .L25: cmpl %r12d, img_height(%rip) jle .L42 xorl %ebp, %ebp .L29: movl img_width(%rip), %eax cmpl %ebp, %eax jle .L43 movl %eax, %edx movq image_show(%rip), %rcx decl %eax movq %rbx, %rdi imull %r12d, %edx addl %ebp, %edx movslq %edx, %rdx movl (%rcx,%rdx,4), %esi cmpl %ebp, %eax jne .L26 call _ZNSolsEi@PLT movq %rax, %rdi movl $10, %esi jmp .L40 .L26: call _ZNSolsEi@PLT movq %rax, %rdi movl $32, %esi .L40: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.isra.0 incl %ebp jmp .L29 .L43: incl %r12d jmp .L25 .L42: movq %rbx, %rdi call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT call cudaDeviceReset@PLT .LEHE1: movq %rbx, %rdi call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT movq 568(%rsp), %rax subq %fs:40, %rax je .L32 jmp .L37 .L35: endbr64 movq %rax, %rbp .L30: movq %rbx, %rdi call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT movq 568(%rsp), %rax subq %fs:40, %rax jne .L37 movq %rbp, %rdi .LEHB2: call _Unwind_Resume@PLT .LEHE2: .L37: call __stack_chk_fail@PLT .L32: addq $576, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3780: .globl __gxx_personality_v0 .section .gcc_except_table,"a",@progbits .LLSDA3780: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE3780-.LLSDACSB3780 .LLSDACSB3780: .uleb128 .LEHB0-.LFB3780 .uleb128 .LEHE0-.LEHB0 .uleb128 0 .uleb128 0 .uleb128 .LEHB1-.LFB3780 .uleb128 .LEHE1-.LEHB1 .uleb128 .L35-.LFB3780 .uleb128 0 .uleb128 .LEHB2-.LFB3780 .uleb128 .LEHE2-.LEHB2 .uleb128 0 .uleb128 0 .LLSDACSE3780: .section .text.startup .size main, .-main .type _GLOBAL__sub_I__Z7get_posv, @function _GLOBAL__sub_I__Z7get_posv: .LFB4483: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA4483 endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 pushq %rdi .cfi_def_cfa_offset 32 imull $12, num(%rip), %eax movl $24, %edi movl %eax, array_size(%rip) movabsq $4575657222473777152, %rax movq %rax, four_element(%rip) movq %rax, 8+four_element(%rip) .LEHB3: call _Znwm@PLT .LEHE3: movl img_width(%rip), %esi movq %rax, %rbx movl img_height(%rip), %eax movl %esi, 8(%rbx) movq %rbx, %rdi imull %eax, %esi movl %eax, 12(%rbx) sall $2, %esi movl %esi, 16(%rbx) movslq %esi, %rsi .LEHB4: call cudaMalloc@PLT .LEHE4: movss 8+four_element(%rip), %xmm0 xorl %eax, %eax xorl %edx, %edx xorl %ecx, %ecx movss four_element(%rip), %xmm2 movss .LC4(%rip), %xmm3 movss .LC5(%rip), %xmm1 movq %rax, 12+inv_camera_M(%rip) xorps %xmm3, %xmm0 movl $127, %eax movq %rbx, img_show(%rip) divss %xmm2, %xmm0 movaps %xmm1, %xmm4 salq $55, %rax movl $0x00000000, 4+inv_camera_M(%rip) movl $0x00000000, 28+inv_camera_M(%rip) movq %rdx, 32+inv_camera_M(%rip) movq $1065353216, 40+inv_camera_M(%rip) movq %rcx, 48+inv_camera_M(%rip) movq %rax, 56+inv_camera_M(%rip) divss %xmm2, %xmm4 movss 4+four_element(%rip), %xmm2 movss %xmm0, 8+inv_camera_M(%rip) movss 12+four_element(%rip), %xmm0 xorps %xmm3, %xmm0 divss %xmm2, %xmm0 movss %xmm4, inv_camera_M(%rip) divss %xmm2, %xmm1 movss %xmm0, 24+inv_camera_M(%rip) movss %xmm1, 20+inv_camera_M(%rip) popq %rsi .cfi_remember_state .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .L46: .cfi_restore_state endbr64 movq %rax, %rbp .L45: movq %rbx, %rdi movl $24, %esi call _ZdlPvm@PLT movq %rbp, %rdi .LEHB5: call _Unwind_Resume@PLT .LEHE5: .cfi_endproc .LFE4483: .section .gcc_except_table .LLSDA4483: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE4483-.LLSDACSB4483 .LLSDACSB4483: .uleb128 .LEHB3-.LFB4483 .uleb128 .LEHE3-.LEHB3 .uleb128 0 .uleb128 0 .uleb128 .LEHB4-.LFB4483 .uleb128 .LEHE4-.LEHB4 .uleb128 .L46-.LFB4483 .uleb128 0 .uleb128 .LEHB5-.LFB4483 .uleb128 .LEHE5-.LEHB5 .uleb128 0 .uleb128 0 .LLSDACSE4483: .section .text.startup .size _GLOBAL__sub_I__Z7get_posv, .-_GLOBAL__sub_I__Z7get_posv .section .init_array .align 8 .quad _GLOBAL__sub_I__Z7get_posv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl inv_camera_M .bss .align 32 .type inv_camera_M, @object .size inv_camera_M, 64 inv_camera_M: .zero 64 .globl img_show .align 8 .type img_show, @object .size img_show, 8 img_show: .zero 8 .globl image_show .align 8 .type image_show, @object .size image_show, 8 image_show: .zero 8 .globl img_height .data .align 4 .type img_height, @object .size img_height, 4 img_height: .long 200 .globl img_width .align 4 .type img_width, @object .size img_width, 4 img_width: .long 100 .globl four_element .bss .align 16 .type four_element, @object .size four_element, 16 four_element: .zero 16 .globl array_size .align 4 .type array_size, @object .size array_size, 4 array_size: .zero 4 .globl img .align 8 .type img, @object .size img, 8 img: .zero 8 .globl test_gpu_array .align 8 .type test_gpu_array, @object .size test_gpu_array, 8 test_gpu_array: .zero 8 .globl simulation_array .align 8 .type simulation_array, @object .size simulation_array, 8 simulation_array: .zero 8 .globl num .data .align 4 .type num, @object .size num, 4 num: .long 1000 .section .rodata.cst16,"aM",@progbits,16 .align 16 .LC4: .long -2147483648 .long 0 .long 0 .long 0 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC5: .long 1065353216 .hidden DW.ref.__gxx_personality_v0 .weak DW.ref.__gxx_personality_v0 .section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat .align 8 .type DW.ref.__gxx_personality_v0, @object .size DW.ref.__gxx_personality_v0, 8 DW.ref.__gxx_personality_v0: .quad __gxx_personality_v0 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z8mykernelP6float37Matrix4iP3Img .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fc800078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ IADD3 R1, R1, -0x28, RZ ; /* 0xffffffd801017810 */ /* 0x000fc60007ffe0ff */ /*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0040*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0050*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x1b0], PT ; /* 0x00006c0000007a0c */ /* 0x000fda0003f06270 */ /*0060*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0070*/ IMAD.MOV.U32 R3, RZ, RZ, 0xc ; /* 0x0000000cff037424 */ /* 0x000fe200078e00ff */ /*0080*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fc60000000a00 */ /*0090*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fca00078e0203 */ /*00a0*/ LDG.E R6, [R2.64+0x4] ; /* 0x0000040602067981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R5, [R2.64] ; /* 0x0000000602057981 */ /* 0x000ee8000c1e1900 */ /*00c0*/ LDG.E R9, [R2.64+0x8] ; /* 0x0000080602097981 */ /* 0x000f22000c1e1900 */ /*00d0*/ BSSY B0, 0x250 ; /* 0x0000017000007945 */ /* 0x000fe20003800000 */ /*00e0*/ FMUL R4, R6, c[0x0][0x194] ; /* 0x0000650006047a20 */ /* 0x004fc80000400000 */ /*00f0*/ FFMA R4, R5, c[0x0][0x190], R4 ; /* 0x0000640005047a23 */ /* 0x008fc80000000004 */ /*0100*/ FFMA R7, R9, c[0x0][0x198], R4 ; /* 0x0000660009077a23 */ /* 0x010fe20000000004 */ /*0110*/ FMUL R4, R6.reuse, c[0x0][0x174] ; /* 0x00005d0006047a20 */ /* 0x040fe20000400000 */ /*0120*/ FMUL R6, R6, c[0x0][0x184] ; /* 0x0000610006067a20 */ /* 0x000fe40000400000 */ /*0130*/ MUFU.RCP R8, R7 ; /* 0x0000000700087308 */ /* 0x000e220000001000 */ /*0140*/ FFMA R4, R5.reuse, c[0x0][0x170], R4 ; /* 0x00005c0005047a23 */ /* 0x040fe20000000004 */ /*0150*/ FFMA R6, R5, c[0x0][0x180], R6 ; /* 0x0000600005067a23 */ /* 0x000fc60000000006 */ /*0160*/ FFMA R4, R9.reuse, c[0x0][0x178], R4 ; /* 0x00005e0009047a23 */ /* 0x040fe20000000004 */ /*0170*/ FFMA R5, R9, c[0x0][0x188], R6 ; /* 0x0000620009057a23 */ /* 0x000fc60000000006 */ /*0180*/ FCHK P0, R4, R7 ; /* 0x0000000704007302 */ /* 0x000e620000000000 */ /*0190*/ FFMA R11, -R7, R8, 1 ; /* 0x3f800000070b7423 */ /* 0x001fc80000000108 */ /*01a0*/ FFMA R11, R8, R11, R8 ; /* 0x0000000b080b7223 */ /* 0x000fc80000000008 */ /*01b0*/ FFMA R2, R4, R11, RZ ; /* 0x0000000b04027223 */ /* 0x000fc800000000ff */ /*01c0*/ FFMA R3, -R7, R2, R4 ; /* 0x0000000207037223 */ /* 0x000fc80000000104 */ /*01d0*/ FFMA R2, R11, R3, R2 ; /* 0x000000030b027223 */ /* 0x000fe20000000002 */ /*01e0*/ @!P0 BRA 0x240 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*01f0*/ IMAD.MOV.U32 R3, RZ, RZ, R4 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0004 */ /*0200*/ MOV R8, 0x230 ; /* 0x0000023000087802 */ /* 0x000fe20000000f00 */ /*0210*/ IMAD.MOV.U32 R6, RZ, RZ, R7 ; /* 0x000000ffff067224 */ /* 0x000fe400078e0007 */ /*0220*/ CALL.REL.NOINC 0x5f0 ; /* 0x000003c000007944 */ /* 0x000fea0003c00000 */ /*0230*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */ /* 0x001fe400078e000a */ /*0240*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0250*/ MUFU.RCP R6, R7 ; /* 0x0000000700067308 */ /* 0x000e220000001000 */ /*0260*/ BSSY B0, 0x350 ; /* 0x000000e000007945 */ /* 0x000fee0003800000 */ /*0270*/ FCHK P0, R5, R7 ; /* 0x0000000705007302 */ /* 0x000e620000000000 */ /*0280*/ FFMA R3, -R7, R6, 1 ; /* 0x3f80000007037423 */ /* 0x001fce0000000106 */ /*0290*/ F2I.TRUNC.NTZ R2, R2 ; /* 0x0000000200027305 */ /* 0x000e22000020f100 */ /*02a0*/ FFMA R9, R6, R3, R6 ; /* 0x0000000306097223 */ /* 0x000fc80000000006 */ /*02b0*/ FFMA R6, R5, R9, RZ ; /* 0x0000000905067223 */ /* 0x000fc800000000ff */ /*02c0*/ FFMA R3, -R7, R6, R5 ; /* 0x0000000607037223 */ /* 0x000fc80000000105 */ /*02d0*/ FFMA R3, R9, R3, R6 ; /* 0x0000000309037223 */ /* 0x000fe20000000006 */ /*02e0*/ @!P0 BRA 0x340 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*02f0*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */ /* 0x001fe200078e0005 */ /*0300*/ MOV R8, 0x330 ; /* 0x0000033000087802 */ /* 0x000fe20000000f00 */ /*0310*/ IMAD.MOV.U32 R6, RZ, RZ, R7 ; /* 0x000000ffff067224 */ /* 0x000fe400078e0007 */ /*0320*/ CALL.REL.NOINC 0x5f0 ; /* 0x000002c000007944 */ /* 0x000fea0003c00000 */ /*0330*/ IMAD.MOV.U32 R3, RZ, RZ, R10 ; /* 0x000000ffff037224 */ /* 0x001fe400078e000a */ /*0340*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*0350*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x1b8] ; /* 0x00006e00ff087624 */ /* 0x000fe200078e00ff */ /*0360*/ ULDC.64 UR4, c[0x0][0x1b8] ; /* 0x00006e0000047ab9 */ /* 0x000fe20000000a00 */ /*0370*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x1bc] ; /* 0x00006f00ff097624 */ /* 0x000fca00078e00ff */ /*0380*/ LDG.E R21, [R8.64+0x8] ; /* 0x0000080608157981 */ /* 0x000ea2000c1e1900 */ /*0390*/ UIADD3 UR4, UP0, UR4, 0x8, URZ ; /* 0x0000000804047890 */ /* 0x000fc8000ff1e03f */ /*03a0*/ UIADD3.X UR5, URZ, UR5, URZ, UP0, !UPT ; /* 0x000000053f057290 */ /* 0x000fe400087fe43f */ /*03b0*/ IMAD.U32 R18, RZ, RZ, UR4 ; /* 0x00000004ff127e24 */ /* 0x000fc8000f8e00ff */ /*03c0*/ IMAD.U32 R19, RZ, RZ, UR5 ; /* 0x00000005ff137e24 */ /* 0x000fe2000f8e00ff */ /*03d0*/ ISETP.GE.AND P0, PT, R2, R21, PT ; /* 0x000000150200720c */ /* 0x004fda0003f06270 */ /*03e0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*03f0*/ LDG.E R6, [R18.64+0x4] ; /* 0x0000040612067981 */ /* 0x000ea2000c1e1900 */ /*0400*/ F2I.TRUNC.NTZ R3, R3 ; /* 0x0000000300037305 */ /* 0x000ea4000020f100 */ /*0410*/ ISETP.GE.AND P0, PT, R3, R6, PT ; /* 0x000000060300720c */ /* 0x004fe40003f06270 */ /*0420*/ IADD3 R6, P1, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fd60007f3e0ff */ /*0430*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0440*/ LDG.E.64 R8, [R18.64+-0x8] ; /* 0xfffff80612087981 */ /* 0x0000a2000c1e1b00 */ /*0450*/ F2I.TRUNC.NTZ R11, R7 ; /* 0x00000007000b7305 */ /* 0x0002e2000020f100 */ /*0460*/ IMAD R21, R3, R21, R2 ; /* 0x0000001503157224 */ /* 0x000fe200078e0202 */ /*0470*/ MOV R10, 0x0 ; /* 0x00000000000a7802 */ /* 0x000fcc0000000f00 */ /*0480*/ F2F.F64.F32 R12, R4 ; /* 0x00000004000c7310 */ /* 0x0009620000201800 */ /*0490*/ LDC.64 R18, c[0x4][R10] ; /* 0x010000000a127b82 */ /* 0x00102e0000000a00 */ /*04a0*/ F2F.F64.F32 R14, R5 ; /* 0x00000005000e7310 */ /* 0x0002220000201800 */ /*04b0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x010fce00078e00ff */ /*04c0*/ F2F.F64.F32 R16, R7 ; /* 0x0000000700107310 */ /* 0x0008220000201800 */ /*04d0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x002fe400078e00ff */ /*04e0*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P1 ; /* 0x00000900ff077624 */ /* 0x010fe400008e06ff */ /*04f0*/ IMAD.WIDE R8, R21, 0x4, R8 ; /* 0x0000000415087825 */ /* 0x004fca00078e0208 */ /*0500*/ ST.E [R8.64], R11 ; /* 0x0000000b08007985 */ /* 0x0083e8000c101906 */ /*0510*/ STL.64 [R1+0x8], R12 ; /* 0x0000080c01007387 */ /* 0x0203e80000100a00 */ /*0520*/ STL.64 [R1+0x10], R14 ; /* 0x0000100e01007387 */ /* 0x0013e80000100a00 */ /*0530*/ STL.64 [R1+0x20], R2 ; /* 0x0000200201007387 */ /* 0x0003e80000100a00 */ /*0540*/ STL.64 [R1+0x18], R16 ; /* 0x0000181001007387 */ /* 0x0003e80000100a00 */ /*0550*/ STL [R1], R0 ; /* 0x0000000001007387 */ /* 0x0003e40000100800 */ /*0560*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x002fe20000000000 */ /*0570*/ MOV R9, 0x5e0 ; /* 0x000005e000097802 */ /* 0x000fc40000000f00 */ /*0580*/ MOV R20, 0x560 ; /* 0x0000056000147802 */ /* 0x000fe40000000f00 */ /*0590*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*05a0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*05b0*/ IADD3 R20, P0, P1, -R20, R9, R2 ; /* 0x0000000914147210 */ /* 0x000fc8000791e102 */ /*05c0*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*05d0*/ CALL.ABS.NOINC R18 ; /* 0x0000000012007343 */ /* 0x000fea0003c00000 */ /*05e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*05f0*/ SHF.R.U32.HI R10, RZ, 0x17, R6 ; /* 0x00000017ff0a7819 */ /* 0x000fe20000011606 */ /*0600*/ BSSY B1, 0xc30 ; /* 0x0000062000017945 */ /* 0x000fe20003800000 */ /*0610*/ SHF.R.U32.HI R9, RZ, 0x17, R3 ; /* 0x00000017ff097819 */ /* 0x000fe40000011603 */ /*0620*/ LOP3.LUT R15, R10, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0a0f7812 */ /* 0x000fe400078ec0ff */ /*0630*/ LOP3.LUT R13, R9, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff090d7812 */ /* 0x000fe400078ec0ff */ /*0640*/ IADD3 R11, R15, -0x1, RZ ; /* 0xffffffff0f0b7810 */ /* 0x000fe40007ffe0ff */ /*0650*/ IADD3 R10, R13, -0x1, RZ ; /* 0xffffffff0d0a7810 */ /* 0x000fc40007ffe0ff */ /*0660*/ ISETP.GT.U32.AND P0, PT, R11, 0xfd, PT ; /* 0x000000fd0b00780c */ /* 0x000fc80003f04070 */ /*0670*/ ISETP.GT.U32.OR P0, PT, R10, 0xfd, P0 ; /* 0x000000fd0a00780c */ /* 0x000fda0000704470 */ /*0680*/ @!P0 IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff098224 */ /* 0x000fe200078e00ff */ /*0690*/ @!P0 BRA 0x810 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*06a0*/ FSETP.GTU.FTZ.AND P0, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f1c200 */ /*06b0*/ FSETP.GTU.FTZ.AND P1, PT, |R6|, +INF , PT ; /* 0x7f8000000600780b */ /* 0x000fc80003f3c200 */ /*06c0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*06d0*/ @P0 BRA 0xc10 ; /* 0x0000053000000947 */ /* 0x000fea0003800000 */ /*06e0*/ LOP3.LUT P0, RZ, R6, 0x7fffffff, R3, 0xc8, !PT ; /* 0x7fffffff06ff7812 */ /* 0x000fda000780c803 */ /*06f0*/ @!P0 BRA 0xbf0 ; /* 0x000004f000008947 */ /* 0x000fea0003800000 */ /*0700*/ FSETP.NEU.FTZ.AND P2, PT, |R3|.reuse, +INF , PT ; /* 0x7f8000000300780b */ /* 0x040fe40003f5d200 */ /*0710*/ FSETP.NEU.FTZ.AND P1, PT, |R6|, +INF , PT ; /* 0x7f8000000600780b */ /* 0x000fe40003f3d200 */ /*0720*/ FSETP.NEU.FTZ.AND P0, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fd60003f1d200 */ /*0730*/ @!P1 BRA !P2, 0xbf0 ; /* 0x000004b000009947 */ /* 0x000fea0005000000 */ /*0740*/ LOP3.LUT P2, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fc8000784c0ff */ /*0750*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*0760*/ @P1 BRA 0xbd0 ; /* 0x0000046000001947 */ /* 0x000fea0003800000 */ /*0770*/ LOP3.LUT P1, RZ, R6, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff06ff7812 */ /* 0x000fc8000782c0ff */ /*0780*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*0790*/ @P0 BRA 0xba0 ; /* 0x0000040000000947 */ /* 0x000fea0003800000 */ /*07a0*/ ISETP.GE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fe40003f06270 */ /*07b0*/ ISETP.GE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fd60003f26270 */ /*07c0*/ @P0 IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff090224 */ /* 0x000fe200078e00ff */ /*07d0*/ @!P0 FFMA R3, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003038823 */ /* 0x000fe200000000ff */ /*07e0*/ @!P0 IMAD.MOV.U32 R9, RZ, RZ, -0x40 ; /* 0xffffffc0ff098424 */ /* 0x000fe200078e00ff */ /*07f0*/ @!P1 FFMA R6, R6, 1.84467440737095516160e+19, RZ ; /* 0x5f80000006069823 */ /* 0x000fc800000000ff */ /*0800*/ @!P1 IADD3 R9, R9, 0x40, RZ ; /* 0x0000004009099810 */ /* 0x000fe40007ffe0ff */ /*0810*/ LEA R11, R15, 0xc0800000, 0x17 ; /* 0xc08000000f0b7811 */ /* 0x000fe200078eb8ff */ /*0820*/ BSSY B2, 0xb90 ; /* 0x0000036000027945 */ /* 0x000fe80003800000 */ /*0830*/ IMAD.IADD R11, R6, 0x1, -R11 ; /* 0x00000001060b7824 */ /* 0x000fe200078e0a0b */ /*0840*/ IADD3 R6, R13, -0x7f, RZ ; /* 0xffffff810d067810 */ /* 0x000fc60007ffe0ff */ /*0850*/ MUFU.RCP R10, R11 ; /* 0x0000000b000a7308 */ /* 0x000e220000001000 */ /*0860*/ FADD.FTZ R12, -R11, -RZ ; /* 0x800000ff0b0c7221 */ /* 0x000fe20000010100 */ /*0870*/ IMAD R3, R6.reuse, -0x800000, R3 ; /* 0xff80000006037824 */ /* 0x040fe200078e0203 */ /*0880*/ IADD3 R6, R6, 0x7f, -R15 ; /* 0x0000007f06067810 */ /* 0x000fca0007ffe80f */ /*0890*/ IMAD.IADD R6, R6, 0x1, R9 ; /* 0x0000000106067824 */ /* 0x000fe200078e0209 */ /*08a0*/ FFMA R13, R10, R12, 1 ; /* 0x3f8000000a0d7423 */ /* 0x001fc8000000000c */ /*08b0*/ FFMA R17, R10, R13, R10 ; /* 0x0000000d0a117223 */ /* 0x000fc8000000000a */ /*08c0*/ FFMA R10, R3, R17, RZ ; /* 0x00000011030a7223 */ /* 0x000fc800000000ff */ /*08d0*/ FFMA R13, R12, R10, R3 ; /* 0x0000000a0c0d7223 */ /* 0x000fc80000000003 */ /*08e0*/ FFMA R14, R17, R13, R10 ; /* 0x0000000d110e7223 */ /* 0x000fc8000000000a */ /*08f0*/ FFMA R13, R12, R14, R3 ; /* 0x0000000e0c0d7223 */ /* 0x000fc80000000003 */ /*0900*/ FFMA R10, R17, R13, R14 ; /* 0x0000000d110a7223 */ /* 0x000fca000000000e */ /*0910*/ SHF.R.U32.HI R3, RZ, 0x17, R10 ; /* 0x00000017ff037819 */ /* 0x000fc8000001160a */ /*0920*/ LOP3.LUT R3, R3, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff03037812 */ /* 0x000fca00078ec0ff */ /*0930*/ IMAD.IADD R11, R3, 0x1, R6 ; /* 0x00000001030b7824 */ /* 0x000fca00078e0206 */ /*0940*/ IADD3 R3, R11, -0x1, RZ ; /* 0xffffffff0b037810 */ /* 0x000fc80007ffe0ff */ /*0950*/ ISETP.GE.U32.AND P0, PT, R3, 0xfe, PT ; /* 0x000000fe0300780c */ /* 0x000fda0003f06070 */ /*0960*/ @!P0 BRA 0xb70 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*0970*/ ISETP.GT.AND P0, PT, R11, 0xfe, PT ; /* 0x000000fe0b00780c */ /* 0x000fda0003f04270 */ /*0980*/ @P0 BRA 0xb40 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*0990*/ ISETP.GE.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fda0003f06270 */ /*09a0*/ @P0 BRA 0xb80 ; /* 0x000001d000000947 */ /* 0x000fea0003800000 */ /*09b0*/ ISETP.GE.AND P0, PT, R11, -0x18, PT ; /* 0xffffffe80b00780c */ /* 0x000fe40003f06270 */ /*09c0*/ LOP3.LUT R10, R10, 0x80000000, RZ, 0xc0, !PT ; /* 0x800000000a0a7812 */ /* 0x000fd600078ec0ff */ /*09d0*/ @!P0 BRA 0xb80 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*09e0*/ FFMA.RZ R3, R17, R13.reuse, R14.reuse ; /* 0x0000000d11037223 */ /* 0x180fe2000000c00e */ /*09f0*/ IADD3 R12, R11, 0x20, RZ ; /* 0x000000200b0c7810 */ /* 0x000fe20007ffe0ff */ /*0a00*/ FFMA.RM R6, R17, R13.reuse, R14.reuse ; /* 0x0000000d11067223 */ /* 0x180fe2000000400e */ /*0a10*/ ISETP.NE.AND P2, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe40003f45270 */ /*0a20*/ LOP3.LUT R9, R3, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff03097812 */ /* 0x000fe200078ec0ff */ /*0a30*/ FFMA.RP R3, R17, R13, R14 ; /* 0x0000000d11037223 */ /* 0x000fe2000000800e */ /*0a40*/ ISETP.NE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe20003f25270 */ /*0a50*/ IMAD.MOV R11, RZ, RZ, -R11 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e0a0b */ /*0a60*/ LOP3.LUT R9, R9, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000009097812 */ /* 0x000fe400078efcff */ /*0a70*/ FSETP.NEU.FTZ.AND P0, PT, R3, R6, PT ; /* 0x000000060300720b */ /* 0x000fc40003f1d000 */ /*0a80*/ SHF.L.U32 R12, R9, R12, RZ ; /* 0x0000000c090c7219 */ /* 0x000fe400000006ff */ /*0a90*/ SEL R6, R11, RZ, P2 ; /* 0x000000ff0b067207 */ /* 0x000fe40001000000 */ /*0aa0*/ ISETP.NE.AND P1, PT, R12, RZ, P1 ; /* 0x000000ff0c00720c */ /* 0x000fe40000f25270 */ /*0ab0*/ SHF.R.U32.HI R6, RZ, R6, R9 ; /* 0x00000006ff067219 */ /* 0x000fe40000011609 */ /*0ac0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40000703570 */ /*0ad0*/ SHF.R.U32.HI R12, RZ, 0x1, R6 ; /* 0x00000001ff0c7819 */ /* 0x000fc40000011606 */ /*0ae0*/ SEL R3, RZ, 0x1, !P0 ; /* 0x00000001ff037807 */ /* 0x000fc80004000000 */ /*0af0*/ LOP3.LUT R3, R3, 0x1, R12, 0xf8, !PT ; /* 0x0000000103037812 */ /* 0x000fc800078ef80c */ /*0b00*/ LOP3.LUT R3, R3, R6, RZ, 0xc0, !PT ; /* 0x0000000603037212 */ /* 0x000fca00078ec0ff */ /*0b10*/ IMAD.IADD R3, R12, 0x1, R3 ; /* 0x000000010c037824 */ /* 0x000fca00078e0203 */ /*0b20*/ LOP3.LUT R10, R3, R10, RZ, 0xfc, !PT ; /* 0x0000000a030a7212 */ /* 0x000fe200078efcff */ /*0b30*/ BRA 0xb80 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*0b40*/ LOP3.LUT R10, R10, 0x80000000, RZ, 0xc0, !PT ; /* 0x800000000a0a7812 */ /* 0x000fc800078ec0ff */ /*0b50*/ LOP3.LUT R10, R10, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f8000000a0a7812 */ /* 0x000fe200078efcff */ /*0b60*/ BRA 0xb80 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0b70*/ IMAD R10, R6, 0x800000, R10 ; /* 0x00800000060a7824 */ /* 0x000fe400078e020a */ /*0b80*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0b90*/ BRA 0xc20 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*0ba0*/ LOP3.LUT R3, R6, 0x80000000, R3, 0x48, !PT ; /* 0x8000000006037812 */ /* 0x000fc800078e4803 */ /*0bb0*/ LOP3.LUT R10, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f800000030a7812 */ /* 0x000fe200078efcff */ /*0bc0*/ BRA 0xc20 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0bd0*/ LOP3.LUT R10, R6, 0x80000000, R3, 0x48, !PT ; /* 0x80000000060a7812 */ /* 0x000fe200078e4803 */ /*0be0*/ BRA 0xc20 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*0bf0*/ MUFU.RSQ R10, -QNAN ; /* 0xffc00000000a7908 */ /* 0x000e220000001400 */ /*0c00*/ BRA 0xc20 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0c10*/ FADD.FTZ R10, R3, R6 ; /* 0x00000006030a7221 */ /* 0x000fe40000010000 */ /*0c20*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0c30*/ IMAD.MOV.U32 R9, RZ, RZ, 0x0 ; /* 0x00000000ff097424 */ /* 0x000fc800078e00ff */ /*0c40*/ RET.REL.NODEC R8 0x0 ; /* 0xfffff3b008007950 */ /* 0x000fea0003c3ffff */ /*0c50*/ BRA 0xc50; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0c60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ca0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ce0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include<stdio.h> #include<stdlib.h> #include<hip/hip_runtime.h> // #include <opencv2/opencv.hpp> #include<fstream> // #include <TooN/TooN.h> // #include <TooN/se3.h> // #include <TooN/GR_SVD.h> // using namespace cv; using namespace std; __device__ int get_pos(){ return threadIdx.x + blockIdx.x * blockDim.x; } struct Img{ int* data; int image_width; int image_height; int img_arr_size; Img(){ } Img(int w, int h){ image_height = h; image_width = w; img_arr_size = sizeof(int) * image_width*image_height; hipMalloc((void**)&data, img_arr_size); } }; struct Matrix4 { float4 data[4]; inline __host__ __device__ float3 get_translation() const { return make_float3(data[0].w, data[1].w, data[2].w); } }; inline Matrix4 getCameraMatrix( const float4 & k ){ Matrix4 K; K.data[0] = make_float4(k.x, 0, k.z, 0); K.data[1] = make_float4(0, k.y, k.w, 0); K.data[2] = make_float4(0, 0, 1, 0); K.data[3] = make_float4(0, 0, 0, 1); return K; } inline Matrix4 getInverseCameraMatrix( const float4 & k ){ Matrix4 invK; invK.data[0] = make_float4(1.0f/k.x, 0, -k.z/k.x, 0); invK.data[1] = make_float4(0, 1.0f/k.y, -k.w/k.y, 0); invK.data[2] = make_float4(0, 0, 1, 0); invK.data[3] = make_float4(0, 0, 0, 1); return invK; } inline __host__ __device__ float3 make_float3(float4 a) { // printf("make_float3_start\n"); return make_float3(a.x, a.y, a.z); } inline __host__ __device__ float dot(float3 a, float3 b) { // printf("dot_start\n"); return a.x * b.x + a.y * b.y + a.z * b.z; } inline __host__ __device__ float3 rotate( const Matrix4 & M, const float3 & v){ // printf("start\n"); float3 ans = make_float3(dot(make_float3(M.data[0]), v),dot(make_float3(M.data[1]), v),dot(make_float3(M.data[2]), v)); // printf("end\n"); return ans; } std::ostream & operator<<( std::ostream & out, const Matrix4 & m ){ for(unsigned i = 0; i < 4; ++i) out << m.data[i].x << " " << m.data[i].y << " " << m.data[i].z << " " << m.data[i].w << "\n"; return out; } // __global__ void point2depthimage(Matrix4 r_inv, float* depth_image, float* point_sequence) { // printf("aaa\n"); // } __global__ void mykernel(float3* a, const Matrix4 r_inv, int max_num,Img* img){ // printf("%d %d %d %d \n", r_inv.data[0].x, r_inv.data[0].y, r_inv.data[0].z, r_inv.data[0].w); int index = get_pos(); if(index >= max_num) return ; // printf("index is %d x is %f, y is %f, z is %f\n", index,arr[index].x, arr[index].y, arr[index].z); float3 pixel_ = rotate(r_inv, a[index]); int depth = int(pixel_.z); int2 image_pos =make_int2(pixel_.x / pixel_.z, pixel_.y / pixel_.z); if(image_pos.x >= img->image_width || image_pos.y >= img->image_height ) return; else{ img->data[img->image_width * image_pos.y + image_pos.x] = depth; } printf("index is %d,x is %f, y is %f, z is %f, image_pos.x is %d, image_pos.z is %d\n",index,pixel_.x, pixel_.y, pixel_.z, image_pos.x, image_pos.y); } int num = 1000; float3* simulation_array; float3* test_gpu_array; int* img; int array_size = sizeof(float3)*num; float4 four_element = make_float4(1,1,1,1); int img_width = 100, img_height = 200; int* image_show; Img* img_show = new Img(img_width, img_height); // Matrix4 camera_M = getCameraMatrix(rotate_matrix); Matrix4 inv_camera_M = getInverseCameraMatrix(four_element); int main() { simulation_array = (float3*)malloc(array_size); image_show = (int*)malloc(img_show->img_arr_size); // mykernel<<<100,1000>>>(); for(int x = 0; x<num;x++){ simulation_array[x] = make_float3(rand()%10,rand()%10,rand()%10); // printf("%f, %f, %f\n", simulation_array[x].x, simulation_arr/ay[x].y,simulation_array[x].z); } hipMalloc((void**)&test_gpu_array, array_size); hipMemcpy(test_gpu_array,simulation_array,array_size, hipMemcpyHostToDevice); // cout<<inv_camera_M; mykernel<<<100,10>>>(test_gpu_array, inv_camera_M, num, img_show); hipMemcpy(image_show,img_show->data, img_show->img_arr_size, hipMemcpyDeviceToHost); // printf("Hello World!\n"); hipDeviceSynchronize(); ofstream ofile; ofile.open("image_show.txt"); for(int i=0; i<img_height;i++) for(int j=0;j<img_width;j++){ if(j == img_width-1) ofile<<image_show[i*img_width + j]<<'\n'; else ofile<<image_show[i*img_width + j]<<' '; } ofile.close(); hipDeviceReset(); // uchar *ptmp = NULL; // Mat depth_image = Mat(img_height, img_width, CV_8UC1); // for(int i = 0 ;i<img_height;i++){ // // ptmp = depth_image.ptr<uchar>(i); // for(int ii = 0; ii < img_width; ii++){ // depth_image.at<uchar>(i,ii) = image_show[ii+i*img_show->image_width]; // } // } // // namedWindow("depth_image"); // imshow("depth_image", depth_image); // waitKey(0); }
.text .file "test.hip" .globl _ZlsRSoRK7Matrix4 # -- Begin function _ZlsRSoRK7Matrix4 .type _ZlsRSoRK7Matrix4,@function _ZlsRSoRK7Matrix4: # @_ZlsRSoRK7Matrix4 .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rsi, %r14 movq %rdi, %rbx xorl %r12d, %r12d .LBB0_1: # =>This Inner Loop Header: Depth=1 xorps %xmm0, %xmm0 cvtss2sd (%r14,%r12), %xmm0 movq %rbx, %rdi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r15 movl $.L.str, %esi movl $2, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l xorps %xmm0, %xmm0 cvtss2sd 4(%r14,%r12), %xmm0 movq %r15, %rdi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r15 movl $.L.str, %esi movl $2, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l xorps %xmm0, %xmm0 cvtss2sd 8(%r14,%r12), %xmm0 movq %r15, %rdi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r15 movl $.L.str, %esi movl $2, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l xorps %xmm0, %xmm0 cvtss2sd 12(%r14,%r12), %xmm0 movq %r15, %rdi callq _ZNSo9_M_insertIdEERSoT_ movl $.L.str.1, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l addq $16, %r12 cmpq $64, %r12 jne .LBB0_1 # %bb.2: movq %rbx, %rax addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _ZlsRSoRK7Matrix4, .Lfunc_end0-_ZlsRSoRK7Matrix4 .cfi_endproc # -- End function .globl _Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img # -- Begin function _Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .type _Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img,@function _Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img: # @_Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 12(%rsp), %rcx movl %esi, (%rcx) leaq 32(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) leaq 160(%rsp), %rax movq %rax, 8(%rbx) movq %rcx, 16(%rbx) movq %rsi, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img, .Lfunc_end1-_Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .Lfunc_begin0: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception0 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $616, %rsp # imm = 0x268 .cfi_def_cfa_offset 656 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movslq array_size(%rip), %rbx movq %rbx, %rdi callq malloc movq %rax, simulation_array(%rip) movq img_show(%rip), %rax movslq 16(%rax), %rdi callq malloc movq %rax, image_show(%rip) cmpl $0, num(%rip) jle .LBB2_4 # %bb.1: # %.lr.ph.preheader movl $8, %ebx xorl %r14d, %r14d .LBB2_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 callq rand cltq imulq $1717986919, %rax, %rcx # imm = 0x66666667 movq %rcx, %rdx shrq $63, %rdx sarq $34, %rcx addl %edx, %ecx addl %ecx, %ecx leal (%rcx,%rcx,4), %ecx subl %ecx, %eax xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 movaps %xmm0, 80(%rsp) # 16-byte Spill callq rand cltq imulq $1717986919, %rax, %rcx # imm = 0x66666667 movq %rcx, %rdx shrq $63, %rdx sarq $34, %rcx addl %edx, %ecx addl %ecx, %ecx leal (%rcx,%rcx,4), %ecx subl %ecx, %eax xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 movaps 80(%rsp), %xmm1 # 16-byte Reload unpcklps %xmm0, %xmm1 # xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] movaps %xmm1, 80(%rsp) # 16-byte Spill callq rand cltq imulq $1717986919, %rax, %rcx # imm = 0x66666667 movq %rcx, %rdx shrq $63, %rdx sarq $34, %rcx addl %edx, %ecx addl %ecx, %ecx leal (%rcx,%rcx,4), %ecx subl %ecx, %eax xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 movq simulation_array(%rip), %rax movaps 80(%rsp), %xmm1 # 16-byte Reload movlps %xmm1, -8(%rax,%rbx) movss %xmm0, (%rax,%rbx) incq %r14 movslq num(%rip), %rax addq $12, %rbx cmpq %rax, %r14 jl .LBB2_2 # %bb.3: # %._crit_edge.loopexit movslq array_size(%rip), %rbx .LBB2_4: # %._crit_edge movl $test_gpu_array, %edi movq %rbx, %rsi callq hipMalloc movq test_gpu_array(%rip), %rdi movq simulation_array(%rip), %rsi movslq array_size(%rip), %rdx movl $1, %ecx callq hipMemcpy movabsq $4294967306, %rdx # imm = 0x10000000A leaq 90(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_6 # %bb.5: movq test_gpu_array(%rip), %rdi movl num(%rip), %esi movq img_show(%rip), %rdx movaps inv_camera_M+48(%rip), %xmm0 movaps %xmm0, 48(%rsp) movaps inv_camera_M+32(%rip), %xmm0 movaps %xmm0, 32(%rsp) movaps inv_camera_M+16(%rip), %xmm0 movaps %xmm0, 16(%rsp) movaps inv_camera_M(%rip), %xmm0 movaps %xmm0, (%rsp) callq _Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .LBB2_6: movq image_show(%rip), %rdi movq img_show(%rip), %rax movq (%rax), %rsi movslq 16(%rax), %rdx movl $2, %ecx callq hipMemcpy callq hipDeviceSynchronize leaq 104(%rsp), %rbx movq %rbx, %rdi callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev .Ltmp0: movl $.L.str.5, %esi movq %rbx, %rdi movl $16, %edx callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode .Ltmp1: # %bb.7: # %.preheader34 movl img_height(%rip), %ecx testl %ecx, %ecx jle .LBB2_17 # %bb.8: # %.preheader.preheader xorl %r15d, %r15d movl img_width(%rip), %eax leaq 104(%rsp), %rbx leaq 79(%rsp), %r14 .LBB2_9: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB2_11 Depth 2 testl %eax, %eax jle .LBB2_16 # %bb.10: # %.lr.ph37.preheader # in Loop: Header=BB2_9 Depth=1 xorl %r12d, %r12d .LBB2_11: # %.lr.ph37 # Parent Loop BB2_9 Depth=1 # => This Inner Loop Header: Depth=2 movl %r15d, %ecx imull %eax, %ecx movslq %ecx, %rcx addq %r12, %rcx movq image_show(%rip), %rdx movl (%rdx,%rcx,4), %esi decl %eax cmpl %eax, %r12d jne .LBB2_22 # %bb.12: # in Loop: Header=BB2_11 Depth=2 .Ltmp8: movq %rbx, %rdi callq _ZNSolsEi .Ltmp9: # %bb.13: # in Loop: Header=BB2_11 Depth=2 movb $10, 79(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB2_20 # %bb.14: # in Loop: Header=BB2_11 Depth=2 .Ltmp10: movl $1, %edx movq %rax, %rdi movq %r14, %rsi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp11: jmp .LBB2_26 .LBB2_22: # in Loop: Header=BB2_11 Depth=2 .Ltmp2: movq %rbx, %rdi callq _ZNSolsEi .Ltmp3: # %bb.23: # in Loop: Header=BB2_11 Depth=2 movb $32, 79(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB2_25 # %bb.24: # in Loop: Header=BB2_11 Depth=2 .Ltmp4: movl $1, %edx movq %rax, %rdi movq %r14, %rsi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp5: jmp .LBB2_26 .LBB2_20: # in Loop: Header=BB2_11 Depth=2 .Ltmp12: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .Ltmp13: jmp .LBB2_26 .LBB2_25: # in Loop: Header=BB2_11 Depth=2 .Ltmp6: movq %rax, %rdi movl $32, %esi callq _ZNSo3putEc .Ltmp7: .LBB2_26: # in Loop: Header=BB2_11 Depth=2 movl img_width(%rip), %eax incq %r12 cmpl %eax, %r12d jl .LBB2_11 # %bb.15: # %._crit_edge38.loopexit # in Loop: Header=BB2_9 Depth=1 movl img_height(%rip), %ecx .LBB2_16: # %._crit_edge38 # in Loop: Header=BB2_9 Depth=1 incl %r15d cmpl %ecx, %r15d jl .LBB2_9 .LBB2_17: # %._crit_edge40 .Ltmp15: leaq 104(%rsp), %rdi callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv .Ltmp16: # %bb.18: .Ltmp17: callq hipDeviceReset .Ltmp18: # %bb.19: movq _ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax leaq 112(%rsp), %rdi movq %rax, -8(%rdi) movq _ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx movq -24(%rax), %rax movq %rcx, 104(%rsp,%rax) callq _ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev leaq 352(%rsp), %rdi callq _ZNSt8ios_baseD2Ev xorl %eax, %eax addq $616, %rsp # imm = 0x268 .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB2_27: .cfi_def_cfa_offset 656 .Ltmp19: jmp .LBB2_28 .LBB2_21: .Ltmp14: .LBB2_28: movq %rax, %rbx leaq 104(%rsp), %rdi callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc .section .gcc_except_table,"a",@progbits .p2align 2, 0x0 GCC_except_table2: .Lexception0: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end0-.Lcst_begin0 .Lcst_begin0: .uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 << .uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 << .uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1 .uleb128 .Ltmp19-.Lfunc_begin0 # jumps to .Ltmp19 .byte 0 # On action: cleanup .uleb128 .Ltmp8-.Lfunc_begin0 # >> Call Site 3 << .uleb128 .Ltmp7-.Ltmp8 # Call between .Ltmp8 and .Ltmp7 .uleb128 .Ltmp14-.Lfunc_begin0 # jumps to .Ltmp14 .byte 0 # On action: cleanup .uleb128 .Ltmp15-.Lfunc_begin0 # >> Call Site 4 << .uleb128 .Ltmp18-.Ltmp15 # Call between .Ltmp15 and .Ltmp18 .uleb128 .Ltmp19-.Lfunc_begin0 # jumps to .Ltmp19 .byte 0 # On action: cleanup .uleb128 .Ltmp18-.Lfunc_begin0 # >> Call Site 5 << .uleb128 .Lfunc_end2-.Ltmp18 # Call between .Ltmp18 and .Lfunc_end2 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end0: .p2align 2, 0x0 # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function _GLOBAL__sub_I_test.hip .LCPI3_0: .long 0x3f800000 # float 1 .section .rodata.cst16,"aM",@progbits,16 .p2align 4, 0x0 .LCPI3_1: .long 0x80000000 # float -0 .long 0x80000000 # float -0 .long 0x80000000 # float -0 .long 0x80000000 # float -0 .section .text.startup,"ax",@progbits .type _GLOBAL__sub_I_test.hip,@function _GLOBAL__sub_I_test.hip: # @_GLOBAL__sub_I_test.hip .Lfunc_begin1: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception1 # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movl num(%rip), %eax shll $2, %eax leal (%rax,%rax,2), %eax movl %eax, array_size(%rip) movabsq $4575657222473777152, %rax # imm = 0x3F8000003F800000 movq %rax, four_element(%rip) movq %rax, four_element+8(%rip) movl $24, %edi callq _Znwm movq %rax, %rbx movl img_width(%rip), %eax movl img_height(%rip), %ecx movl %ecx, 12(%rbx) movl %eax, 8(%rbx) imull %ecx, %eax shll $2, %eax movl %eax, 16(%rbx) movslq %eax, %rsi .Ltmp20: movq %rbx, %rdi callq hipMalloc .Ltmp21: # %bb.1: # %__cxx_global_var_init.3.exit movq %rbx, img_show(%rip) movss four_element(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero movss .LCPI3_0(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero movaps %xmm1, %xmm2 divss %xmm0, %xmm2 movss four_element+8(%rip), %xmm3 # xmm3 = mem[0],zero,zero,zero movaps .LCPI3_1(%rip), %xmm4 # xmm4 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0] xorps %xmm4, %xmm3 divss %xmm0, %xmm3 xorps %xmm0, %xmm0 xorps %xmm5, %xmm5 movss %xmm2, %xmm5 # xmm5 = xmm2[0],xmm5[1,2,3] xorps %xmm2, %xmm2 movss %xmm3, %xmm2 # xmm2 = xmm3[0],xmm2[1,2,3] movlhps %xmm2, %xmm5 # xmm5 = xmm5[0],xmm2[0] movaps %xmm5, inv_camera_M(%rip) movss four_element+4(%rip), %xmm2 # xmm2 = mem[0],zero,zero,zero divss %xmm2, %xmm1 movss four_element+12(%rip), %xmm3 # xmm3 = mem[0],zero,zero,zero xorps %xmm4, %xmm3 divss %xmm2, %xmm3 movq %xmm1, %xmm1 # xmm1 = xmm1[0],zero movss %xmm3, %xmm0 # xmm0 = xmm3[0],xmm0[1,2,3] shufps $66, %xmm0, %xmm1 # xmm1 = xmm1[2,0],xmm0[0,1] movaps %xmm1, inv_camera_M+16(%rip) xorl %eax, %eax movq %rax, inv_camera_M+32(%rip) movq $1065353216, inv_camera_M+40(%rip) # imm = 0x3F800000 movq %rax, inv_camera_M+48(%rip) movabsq $4575657221408423936, %rax # imm = 0x3F80000000000000 movq %rax, inv_camera_M+56(%rip) addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .LBB3_2: .cfi_def_cfa_offset 32 .Ltmp22: movq %rax, %r14 movq %rbx, %rdi callq _ZdlPv movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end3: .size _GLOBAL__sub_I_test.hip, .Lfunc_end3-_GLOBAL__sub_I_test.hip .cfi_endproc .section .gcc_except_table,"a",@progbits .p2align 2, 0x0 GCC_except_table3: .Lexception1: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end1-.Lcst_begin1 .Lcst_begin1: .uleb128 .Lfunc_begin1-.Lfunc_begin1 # >> Call Site 1 << .uleb128 .Ltmp20-.Lfunc_begin1 # Call between .Lfunc_begin1 and .Ltmp20 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp20-.Lfunc_begin1 # >> Call Site 2 << .uleb128 .Ltmp21-.Ltmp20 # Call between .Ltmp20 and .Ltmp21 .uleb128 .Ltmp22-.Lfunc_begin1 # jumps to .Ltmp22 .byte 0 # On action: cleanup .uleb128 .Ltmp21-.Lfunc_begin1 # >> Call Site 3 << .uleb128 .Lfunc_end3-.Ltmp21 # Call between .Ltmp21 and .Lfunc_end3 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end1: .p2align 2, 0x0 # -- End function .text .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB4_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB4_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end4: .size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB5_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB5_2: retq .Lfunc_end5: .size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz " " .size .L.str, 3 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "\n" .size .L.str.1, 2 .type _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img,@object # @_Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .section .rodata,"a",@progbits .globl _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .p2align 3, 0x0 _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img: .quad _Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .size _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img, 8 .type num,@object # @num .data .globl num .p2align 2, 0x0 num: .long 1000 # 0x3e8 .size num, 4 .type simulation_array,@object # @simulation_array .bss .globl simulation_array .p2align 3, 0x0 simulation_array: .quad 0 .size simulation_array, 8 .type test_gpu_array,@object # @test_gpu_array .globl test_gpu_array .p2align 3, 0x0 test_gpu_array: .quad 0 .size test_gpu_array, 8 .type img,@object # @img .globl img .p2align 3, 0x0 img: .quad 0 .size img, 8 .type array_size,@object # @array_size .globl array_size .p2align 2, 0x0 array_size: .long 0 # 0x0 .size array_size, 4 .type four_element,@object # @four_element .globl four_element .p2align 4, 0x0 four_element: .zero 16 .size four_element, 16 .type img_width,@object # @img_width .data .globl img_width .p2align 2, 0x0 img_width: .long 100 # 0x64 .size img_width, 4 .type img_height,@object # @img_height .globl img_height .p2align 2, 0x0 img_height: .long 200 # 0xc8 .size img_height, 4 .type image_show,@object # @image_show .bss .globl image_show .p2align 3, 0x0 image_show: .quad 0 .size image_show, 8 .type img_show,@object # @img_show .globl img_show .p2align 3, 0x0 img_show: .quad 0 .size img_show, 8 .type inv_camera_M,@object # @inv_camera_M .globl inv_camera_M .p2align 4, 0x0 inv_camera_M: .zero 64 .size inv_camera_M, 64 .type .L.str.5,@object # @.str.5 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.5: .asciz "image_show.txt" .size .L.str.5, 15 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img" .size .L__unnamed_1, 51 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad _GLOBAL__sub_I_test.hip .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z23__device_stub__mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .addrsig_sym __gxx_personality_v0 .addrsig_sym _GLOBAL__sub_I_test.hip .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Unwind_Resume .addrsig_sym _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .addrsig_sym test_gpu_array .addrsig_sym inv_camera_M .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img ; -- Begin function _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .globl _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .p2align 8 .type _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img,@function _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img: ; @_Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x6c s_load_b32 s5, s[0:1], 0x50 s_add_u32 s2, s0, 0x60 s_addc_u32 s3, s1, 0 s_waitcnt lgkmcnt(0) s_and_b32 s4, s4, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, s15, s4, v[0:1] s_mov_b32 s4, exec_lo v_cmpx_gt_i32_e64 s5, v3 s_cbranch_execz .LBB0_308 ; %bb.1: s_load_b64 s[4:5], s[0:1], 0x0 s_waitcnt lgkmcnt(0) v_mad_i64_i32 v[0:1], null, v3, 12, s[4:5] global_load_b96 v[0:2], v[0:1], off s_clause 0x2 s_load_b256 s[4:11], s[0:1], 0x10 s_load_b128 s[12:15], s[0:1], 0x30 s_load_b64 s[0:1], s[0:1], 0x58 s_waitcnt vmcnt(0) lgkmcnt(0) v_mul_f32_e32 v37, s5, v1 v_mul_f32_e32 v35, s13, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v37, s4, v0 v_fmac_f32_e32 v35, s12, v0 s_load_b32 s4, s[0:1], 0x8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v37, s6, v2 v_fmac_f32_e32 v35, s14, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f32 v4, null, v35, v35, v37 v_div_scale_f32 v7, vcc_lo, v37, v35, v37 v_rcp_f32_e32 v5, v4 s_waitcnt_depctr 0xfff v_fma_f32 v6, -v4, v5, 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v5, v6, v5 v_mul_f32_e32 v6, v7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v8, -v4, v6, v7 v_fmac_f32_e32 v6, v8, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v4, -v4, v6, v7 v_div_fmas_f32 v4, v4, v5, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fixup_f32 v4, v4, v35, v37 v_cvt_i32_f32_e32 v5, v4 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_i32_e32 vcc_lo, s4, v5 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_308 ; %bb.2: v_mul_f32_e32 v36, s9, v1 s_load_b32 s5, s[0:1], 0xc s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v36, s8, v0 v_fmac_f32_e32 v36, s10, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f32 v0, null, v35, v35, v36 v_div_scale_f32 v4, vcc_lo, v36, v35, v36 v_rcp_f32_e32 v1, v0 s_waitcnt_depctr 0xfff v_fma_f32 v2, -v0, v1, 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v1, v2, v1 v_mul_f32_e32 v2, v4, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v6, -v0, v2, v4 v_fmac_f32_e32 v2, v6, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v0, -v0, v2, v4 v_div_fmas_f32 v0, v0, v1, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fixup_f32 v0, v0, v35, v36 v_cvt_i32_f32_e32 v2, v0 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_i32_e32 vcc_lo, s5, v2 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_308 ; %bb.3: s_load_b64 s[0:1], s[0:1], 0x0 v_mad_u64_u32 v[0:1], null, s4, v2, v[5:6] v_cvt_i32_f32_e32 v4, v35 v_mbcnt_lo_u32_b32 v34, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v10, v34 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] s_waitcnt lgkmcnt(0) v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b32 v[0:1], v4, off s_load_b64 s[2:3], s[2:3], 0x50 v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v10 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_9 ; %bb.4: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[8:9], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[6:7], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v9 v_and_b32_e32 v0, v0, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo global_load_b64 v[6:7], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[8:9] s_cbranch_execz .LBB0_8 ; %bb.5: ; %.preheader3.i.i.i.preheader s_mov_b32 s5, 0 .LBB0_6: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v4, s[2:3] offset:40 global_load_b64 v[11:12], v4, s[2:3] v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v6, v6, v8 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v6, 24, v[11:12] v_and_b32_e32 v11, v7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v6 global_load_b64 v[6:7], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_6 ; %bb.7: ; %Flow598 s_or_b32 exec_lo, exec_lo, s5 .LBB0_8: ; %Flow600 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_9: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v11, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[12:13], v11, s[2:3] offset:40 global_load_b128 v[6:9], v11, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v12 v_readfirstlane_b32 s7, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_11 ; %bb.10: v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v13, v11 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v7, vcc_lo v_dual_mov_b32 v14, 2 :: v_dual_mov_b32 v15, 1 global_store_b128 v[0:1], v[12:15], off offset:8 .LBB0_11: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[10:11] s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, s6 v_add_co_ci_u32_e32 v8, vcc_lo, s7, v9, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v4, v0 s_mov_b32 s15, s12 s_mov_b32 s13, s12 s_mov_b32 s14, s12 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_dual_mov_b32 v10, 33 :: v_dual_mov_b32 v13, v11 v_dual_mov_b32 v12, v11 :: v_dual_mov_b32 v17, s15 v_dual_mov_b32 v16, s14 :: v_dual_mov_b32 v15, s13 v_mov_b32_e32 v14, s12 s_clause 0x3 global_store_b128 v[0:1], v[10:13], off global_store_b128 v[0:1], v[14:17], off offset:16 global_store_b128 v[0:1], v[14:17], off offset:32 global_store_b128 v[0:1], v[14:17], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_19 ; %bb.12: v_mov_b32_e32 v4, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[16:17], v4, s[2:3] offset:32 glc global_load_b64 v[8:9], v4, s[2:3] offset:40 v_dual_mov_b32 v15, s5 :: v_dual_mov_b32 v14, s4 s_waitcnt vmcnt(0) v_and_b32_e32 v9, s5, v9 v_and_b32_e32 v8, s4, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v9, v9, 24 v_mul_hi_u32 v10, v8, 24 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v9, v10, v9 v_add_co_u32 v12, vcc_lo, v6, v8 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v13, vcc_lo, v7, v9, vcc_lo global_store_b64 v[12:13], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v4, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[10:11], v[16:17] s_cbranch_execz .LBB0_15 ; %bb.13: ; %.preheader1.i.i.i.preheader s_mov_b32 s10, 0 .LBB0_14: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v9, s5 s_sleep 1 global_store_b64 v[12:13], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v4, v[8:11], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11] v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_14 .LBB0_15: ; %Flow596 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v11, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v4, s10, 0 global_load_b64 v[8:9], v11, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_17 ; %bb.16: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v10, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[8:9], v[10:11], off offset:8 .LBB0_17: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[10:11], v[8:9], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] s_cbranch_vccnz .LBB0_19 ; %bb.18: global_load_b32 v8, v[8:9], off offset:24 v_mov_b32_e32 v9, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v8 s_waitcnt_vscnt null, 0x0 global_store_b64 v[10:11], v[8:9], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_19: ; %Flow597 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v4, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v7, vcc_lo, s8, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v4, 20 v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo .LBB0_20: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v4, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_22 ; %bb.21: ; in Loop: Header=BB0_20 Depth=1 global_load_b32 v4, v[6:7], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v4, 1, v4 .LBB0_22: ; in Loop: Header=BB0_20 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v4 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_24 ; %bb.23: ; in Loop: Header=BB0_20 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_25 .LBB0_24: ; in Loop: Header=BB0_20 Depth=1 s_mov_b32 s1, -1 .LBB0_25: ; %Flow591 ; in Loop: Header=BB0_20 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_20 ; %bb.26: global_load_b64 v[6:7], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_30 ; %bb.27: v_mov_b32_e32 v4, 0 s_clause 0x2 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[12:13], v4, s[2:3] offset:24 glc global_load_b64 v[10:11], v4, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v14, s4 v_add_co_ci_u32_e32 v9, vcc_lo, s5, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v9, v9, v15 :: v_dual_cndmask_b32 v8, v8, v14 v_and_b32_e32 v1, v9, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v8, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v14, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v14, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v10, v0 v_mov_b32_e32 v10, v12 v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[0:1], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v4, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_30 ; %bb.28: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_29: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v4, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_29 .LBB0_30: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[4:5] s_add_u32 s4, s4, .str@rel32@lo+4 s_addc_u32 s5, s5, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[4:5], 0 s_cbranch_scc0 .LBB0_116 ; %bb.31: s_waitcnt vmcnt(0) v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v4, 2, v6 v_dual_mov_b32 v9, v7 :: v_dual_and_b32 v8, -3, v6 v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 s_mov_b64 s[6:7], 0x4d .LBB0_32: ; =>This Loop Header: Depth=1 ; Child Loop BB0_35 Depth 2 ; Child Loop BB0_42 Depth 2 ; Child Loop BB0_50 Depth 2 ; Child Loop BB0_58 Depth 2 ; Child Loop BB0_66 Depth 2 ; Child Loop BB0_74 Depth 2 ; Child Loop BB0_82 Depth 2 ; Child Loop BB0_90 Depth 2 ; Child Loop BB0_98 Depth 2 ; Child Loop BB0_104 Depth 2 ; Child Loop BB0_113 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[6:7], 56 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr15 s_and_b32 s0, s0, exec_lo s_cselect_b32 s8, s6, 56 s_cselect_b32 s9, s7, 0 s_cmp_gt_u32 s8, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_37 ; %bb.33: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_cmp_eq_u32 s8, 0 s_cbranch_scc1 .LBB0_36 ; %bb.34: ; %.preheader31.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_lshl_b64 s[0:1], s[8:9], 3 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[4:5] .LBB0_35: ; %.preheader31.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v0, v1, s[12:13] s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[10:11], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s0, s10 v_or_b32_e32 v16, v10, v16 v_or_b32_e32 v17, v11, v17 s_cbranch_scc1 .LBB0_35 .LBB0_36: ; %Flow567 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s15, 0 .LBB0_37: ; %Flow569 ; in Loop: Header=BB0_32 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[4:5] s_cbranch_vccnz .LBB0_39 ; %bb.38: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[16:17], v1, s[4:5] s_add_i32 s15, s8, -8 s_add_u32 s0, s4, 8 s_addc_u32 s1, s5, 0 .LBB0_39: ; %.loopexit32.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_44 ; %bb.40: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_43 ; %bb.41: ; %.preheader29.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_42: ; %.preheader29.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v18, v10, v18 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v19, v11, v19 s_cbranch_scc1 .LBB0_42 .LBB0_43: ; %Flow562 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_45 .LBB0_44: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr18_vgpr19 ; implicit-def: $sgpr14 .LBB0_45: ; %Flow564 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_47 ; %bb.46: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[18:19], v1, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_47: ; %.loopexit30.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_52 ; %bb.48: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_51 ; %bb.49: ; %.preheader27.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_50: ; %.preheader27.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v20, v10, v20 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v21, v11, v21 s_cbranch_scc1 .LBB0_50 .LBB0_51: ; %Flow557 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_53 .LBB0_52: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_53: ; %Flow559 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_55 ; %bb.54: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[20:21], v1, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_55: ; %.loopexit28.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_60 ; %bb.56: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_59 ; %bb.57: ; %.preheader25.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_58: ; %.preheader25.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v22, v10, v22 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v23, v11, v23 s_cbranch_scc1 .LBB0_58 .LBB0_59: ; %Flow552 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_61 .LBB0_60: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr22_vgpr23 ; implicit-def: $sgpr14 .LBB0_61: ; %Flow554 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_63 ; %bb.62: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[22:23], v1, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_63: ; %.loopexit26.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_68 ; %bb.64: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v24, 0 v_mov_b32_e32 v25, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_67 ; %bb.65: ; %.preheader23.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_66: ; %.preheader23.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v24, v10, v24 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v25, v11, v25 s_cbranch_scc1 .LBB0_66 .LBB0_67: ; %Flow547 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_69 .LBB0_68: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_69: ; %Flow549 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_71 ; %bb.70: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[24:25], v1, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_71: ; %.loopexit24.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_76 ; %bb.72: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v26, 0 v_mov_b32_e32 v27, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_75 ; %bb.73: ; %.preheader21.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_74: ; %.preheader21.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v0, v1, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v26, v10, v26 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v27, v11, v27 s_cbranch_scc1 .LBB0_74 .LBB0_75: ; %Flow542 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_77 .LBB0_76: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $sgpr14 .LBB0_77: ; %Flow544 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_79 ; %bb.78: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[26:27], v1, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_79: ; %.loopexit22.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_84 ; %bb.80: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v28, 0 v_mov_b32_e32 v29, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_83 ; %bb.81: ; %.preheader.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[0:1] .LBB0_82: ; %.preheader.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v0, v1, s[12:13] s_add_i32 s14, s14, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v0, 0xffff, v0 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[10:11], s10, v[0:1] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 0 v_or_b32_e32 v28, v10, v28 v_or_b32_e32 v29, v11, v29 s_cbranch_scc1 .LBB0_82 .LBB0_83: ; %Flow537 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_branch .LBB0_85 .LBB0_84: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 .LBB0_85: ; %Flow539 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_87 ; %bb.86: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[28:29], v1, s[0:1] .LBB0_87: ; %.loopexit.i ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v0, v34 s_waitcnt vmcnt(0) v_mov_b32_e32 v10, 0 v_mov_b32_e32 v11, 0 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_93 ; %bb.88: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[32:33], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[10:11], v1, s[2:3] offset:40 global_load_b64 v[14:15], v1, s[2:3] s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v11, v11, v33 v_and_b32_e32 v10, v10, v32 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v11, v11, 24 v_mul_hi_u32 v30, v10, 24 v_mul_lo_u32 v10, v10, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v11, v30, v11 s_waitcnt vmcnt(0) v_add_co_u32 v10, vcc_lo, v14, v10 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v11, vcc_lo, v15, v11, vcc_lo global_load_b64 v[30:31], v[10:11], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[10:11], v1, v[30:33], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[10:11], v[32:33] s_cbranch_execz .LBB0_92 ; %bb.89: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s11, 0 .LBB0_90: ; %.preheader3.i.i19.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[14:15], v1, s[2:3] offset:40 global_load_b64 v[30:31], v1, s[2:3] v_dual_mov_b32 v33, v11 :: v_dual_mov_b32 v32, v10 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v14, v14, v32 s_waitcnt vmcnt(0) v_mad_u64_u32 v[10:11], null, v14, 24, v[30:31] v_and_b32_e32 v30, v15, v33 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[14:15], null, v30, 24, v[11:12] v_mov_b32_e32 v11, v14 global_load_b64 v[30:31], v[10:11], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[10:11], v1, v[30:33], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[32:33] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_90 ; %bb.91: ; %Flow532 ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_92: ; %Flow534 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 .LBB0_93: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[14:15], v1, s[2:3] offset:40 global_load_b128 v[30:33], v1, s[2:3] v_readfirstlane_b32 s10, v10 v_readfirstlane_b32 s11, v11 s_mov_b32 s16, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s12, v14 v_readfirstlane_b32 s13, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[10:11], s[12:13] s_mul_i32 s1, s13, 24 s_mul_hi_u32 s14, s12, 24 s_mul_i32 s15, s12, 24 s_and_saveexec_b32 s17, s0 s_cbranch_execz .LBB0_95 ; %bb.94: ; in Loop: Header=BB0_32 Depth=1 v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v11, v1 s_add_i32 s16, s14, s1 s_waitcnt vmcnt(0) v_add_co_u32 v14, vcc_lo, v30, s15 v_add_co_ci_u32_e32 v15, vcc_lo, s16, v31, vcc_lo global_store_b128 v[14:15], v[10:13], off offset:8 .LBB0_95: ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s17 v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56 v_or_b32_e32 v10, 0, v9 v_or_b32_e32 v11, v8, v4 s_lshl_b64 s[12:13], s[12:13], 12 s_lshl_b32 s16, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s16, s16, 28 v_dual_cndmask_b32 v15, v10, v9 :: v_dual_cndmask_b32 v10, v11, v8 v_lshlrev_b64 v[8:9], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v32, s12 v_add_co_ci_u32_e32 v11, vcc_lo, s13, v33, vcc_lo s_and_b32 s16, s16, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v32, vcc_lo, v0, v8 v_and_or_b32 v14, 0xffffff1f, v10, s16 v_add_co_ci_u32_e32 v33, vcc_lo, v11, v9, vcc_lo s_clause 0x3 global_store_b128 v[32:33], v[14:17], off global_store_b128 v[32:33], v[18:21], off offset:16 global_store_b128 v[32:33], v[22:25], off offset:32 global_store_b128 v[32:33], v[26:29], off offset:48 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_103 ; %bb.96: ; in Loop: Header=BB0_32 Depth=1 s_clause 0x1 global_load_b64 v[18:19], v1, s[2:3] offset:32 glc global_load_b64 v[8:9], v1, s[2:3] offset:40 v_dual_mov_b32 v16, s10 :: v_dual_mov_b32 v17, s11 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v8 v_readfirstlane_b32 s17, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[10:11] s_mul_i32 s13, s17, 24 s_mul_hi_u32 s17, s16, 24 s_mul_i32 s16, s16, 24 s_add_i32 s17, s17, s13 v_add_co_u32 v14, vcc_lo, v30, s16 v_add_co_ci_u32_e32 v15, vcc_lo, s17, v31, vcc_lo s_mov_b32 s13, exec_lo global_store_b64 v[14:15], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v1, v[16:19], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[10:11], v[18:19] s_cbranch_execz .LBB0_99 ; %bb.97: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s16, 0 .LBB0_98: ; %.preheader1.i.i17.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, s11 s_sleep 1 global_store_b64 v[14:15], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v1, v[8:11], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11] v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8 s_or_b32 s16, vcc_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s16 s_cbranch_execnz .LBB0_98 .LBB0_99: ; %Flow530 ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s13 global_load_b64 v[8:9], v1, s[2:3] offset:16 s_mov_b32 s16, exec_lo s_mov_b32 s13, exec_lo v_mbcnt_lo_u32_b32 v0, s16, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB0_101 ; %bb.100: ; in Loop: Header=BB0_32 Depth=1 s_bcnt1_i32_b32 s16, s16 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v0, s16 s_waitcnt vmcnt(0) global_atomic_add_u64 v[8:9], v[0:1], off offset:8 .LBB0_101: ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_waitcnt vmcnt(0) global_load_b64 v[10:11], v[8:9], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] s_cbranch_vccnz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_32 Depth=1 global_load_b32 v0, v[8:9], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s13, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[10:11], v[0:1], off s_and_b32 m0, s13, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_103: ; %Flow531 ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_add_i32 s14, s14, s1 v_add_co_u32 v0, vcc_lo, v30, s15 v_add_co_ci_u32_e32 v9, vcc_lo, s14, v31, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo .LBB0_104: ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v0, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_106 ; %bb.105: ; in Loop: Header=BB0_104 Depth=2 global_load_b32 v0, v[8:9], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v0, 1, v0 .LBB0_106: ; in Loop: Header=BB0_104 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v0 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_108 ; %bb.107: ; in Loop: Header=BB0_104 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_109 .LBB0_108: ; in Loop: Header=BB0_104 Depth=2 s_mov_b32 s1, -1 .LBB0_109: ; %Flow525 ; in Loop: Header=BB0_104 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_104 ; %bb.110: ; in Loop: Header=BB0_32 Depth=1 global_load_b128 v[8:11], v[32:33], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_114 ; %bb.111: ; in Loop: Header=BB0_32 Depth=1 s_clause 0x2 global_load_b64 v[10:11], v1, s[2:3] offset:40 global_load_b64 v[18:19], v1, s[2:3] offset:24 glc global_load_b64 v[16:17], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v0, vcc_lo, v10, 1 v_add_co_ci_u32_e32 v20, vcc_lo, 0, v11, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v14, vcc_lo, v0, s10 v_add_co_ci_u32_e32 v15, vcc_lo, s11, v20, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15] v_cndmask_b32_e32 v14, v14, v0, vcc_lo v_dual_cndmask_b32 v15, v15, v20 :: v_dual_and_b32 v10, v14, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v15, v11 v_mul_hi_u32 v11, v10, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_lo_u32 v0, v0, 24 v_mul_lo_u32 v10, v10, 24 v_add_nc_u32_e32 v0, v11, v0 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v10, vcc_lo, v16, v10 v_mov_b32_e32 v16, v18 v_add_co_ci_u32_e32 v11, vcc_lo, v17, v0, vcc_lo v_mov_b32_e32 v17, v19 global_store_b64 v[10:11], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[16:17], v1, v[14:17], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[16:17], v[18:19] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_114 ; %bb.112: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s0, 0 .LBB0_113: ; %.preheader.i.i16.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[10:11], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v1, v[14:17], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[16:17] v_dual_mov_b32 v16, v18 :: v_dual_mov_b32 v17, v19 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_113 .LBB0_114: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s6, s6, s8 s_subb_u32 s7, s7, s9 s_add_u32 s4, s4, s8 s_addc_u32 s5, s5, s9 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc1 .LBB0_32 ; %bb.115: ; %Flow570 s_mov_b32 s0, 0 s_branch .LBB0_117 .LBB0_116: s_mov_b32 s0, -1 ; implicit-def: $vgpr8_vgpr9 .LBB0_117: ; %Flow585 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_146 ; %bb.118: s_waitcnt vmcnt(0) v_mov_b32_e32 v8, v34 v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v8 v_cmp_eq_u32_e64 s0, s0, v8 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_124 ; %bb.119: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[11:12], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v12 v_and_b32_e32 v0, v0, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v13, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v13, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v9, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v10, v1, vcc_lo global_load_b64 v[9:10], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[9:12], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[11:12] s_cbranch_execz .LBB0_123 ; %bb.120: ; %.preheader3.i.i.i29.preheader s_mov_b32 s5, 0 .LBB0_121: ; %.preheader3.i.i.i29 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[9:10], v4, s[2:3] offset:40 global_load_b64 v[13:14], v4, s[2:3] v_dual_mov_b32 v12, v1 :: v_dual_mov_b32 v11, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v9, v9, v11 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v9, 24, v[13:14] v_and_b32_e32 v13, v10, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v13, 24, v[1:2] v_mov_b32_e32 v1, v9 global_load_b64 v[9:10], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[9:12], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[11:12] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_121 ; %bb.122: ; %Flow582 s_or_b32 exec_lo, exec_lo, s5 .LBB0_123: ; %Flow584 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_124: ; %.loopexit4.i.i.i24 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v9, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[14:15], v9, s[2:3] offset:40 global_load_b128 v[10:13], v9, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v14 v_readfirstlane_b32 s7, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_126 ; %bb.125: v_dual_mov_b32 v14, s10 :: v_dual_mov_b32 v15, v9 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v11, vcc_lo v_dual_mov_b32 v16, 2 :: v_dual_mov_b32 v17, 1 global_store_b128 v[0:1], v[14:17], off offset:8 .LBB0_126: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[8:9] s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v12, s6 v_add_co_ci_u32_e32 v8, vcc_lo, s7, v13, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v4, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v6, 0xffffff1f, v6, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v9 v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v15, s15 v_dual_mov_b32 v13, s13 :: v_dual_mov_b32 v14, s14 s_clause 0x3 global_store_b128 v[0:1], v[6:9], off global_store_b128 v[0:1], v[12:15], off offset:16 global_store_b128 v[0:1], v[12:15], off offset:32 global_store_b128 v[0:1], v[12:15], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_134 ; %bb.127: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v15, s5 v_mov_b32_e32 v14, s4 s_clause 0x1 global_load_b64 v[16:17], v4, s[2:3] offset:32 glc global_load_b64 v[6:7], v4, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v6 v_readfirstlane_b32 s11, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v12, vcc_lo, v10, s10 v_add_co_ci_u32_e32 v13, vcc_lo, s11, v11, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[12:13], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v4, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[8:9], v[16:17] s_cbranch_execz .LBB0_130 ; %bb.128: ; %.preheader1.i.i.i27.preheader s_mov_b32 s10, 0 .LBB0_129: ; %.preheader1.i.i.i27 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s5 s_sleep 1 global_store_b64 v[12:13], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v4, v[6:9], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_129 .LBB0_130: ; %Flow580 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v9, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v4, s10, 0 global_load_b64 v[6:7], v9, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_132 ; %bb.131: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v8, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[6:7], v[8:9], off offset:8 .LBB0_132: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[8:9], v[6:7], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] s_cbranch_vccnz .LBB0_134 ; %bb.133: global_load_b32 v6, v[6:7], off offset:24 v_mov_b32_e32 v7, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v6 s_waitcnt_vscnt null, 0x0 global_store_b64 v[8:9], v[6:7], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_134: ; %Flow581 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v4, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v7, vcc_lo, s8, v11, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v4, 20 v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo .LBB0_135: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v4, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_137 ; %bb.136: ; in Loop: Header=BB0_135 Depth=1 global_load_b32 v4, v[6:7], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v4, 1, v4 .LBB0_137: ; in Loop: Header=BB0_135 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v4 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_139 ; %bb.138: ; in Loop: Header=BB0_135 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_140 .LBB0_139: ; in Loop: Header=BB0_135 Depth=1 s_mov_b32 s1, -1 .LBB0_140: ; %Flow575 ; in Loop: Header=BB0_135 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_135 ; %bb.141: global_load_b128 v[8:11], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_145 ; %bb.142: v_mov_b32_e32 v4, 0 s_clause 0x2 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[6:7], v4, s[2:3] offset:24 glc global_load_b64 v[12:13], v4, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v14, s4 v_add_co_ci_u32_e32 v11, vcc_lo, s5, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] v_dual_cndmask_b32 v11, v11, v15 :: v_dual_cndmask_b32 v10, v10, v14 v_and_b32_e32 v1, v11, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v10, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v14, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v14, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v12, v0 v_mov_b32_e32 v12, v6 v_add_co_ci_u32_e32 v1, vcc_lo, v13, v1, vcc_lo v_mov_b32_e32 v13, v7 global_store_b64 v[0:1], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v4, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[12:13], v[6:7] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_145 ; %bb.143: ; %.preheader.i.i.i26.preheader s_mov_b32 s0, 0 .LBB0_144: ; %.preheader.i.i.i26 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v4, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[12:13] v_dual_mov_b32 v13, v7 :: v_dual_mov_b32 v12, v6 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_144 .LBB0_145: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_146: ; %__ockl_printf_append_string_n.exit s_waitcnt vmcnt(0) v_mov_b32_e32 v10, v34 v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v10 v_cmp_eq_u32_e64 s0, s0, v10 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_152 ; %bb.147: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[13:14], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[6:7], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v14 v_and_b32_e32 v0, v0, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo global_load_b64 v[11:12], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[11:14], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[13:14] s_cbranch_execz .LBB0_151 ; %bb.148: ; %.preheader3.i.i.i36.preheader s_mov_b32 s5, 0 .LBB0_149: ; %.preheader3.i.i.i36 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v4, s[2:3] offset:40 global_load_b64 v[11:12], v4, s[2:3] v_dual_mov_b32 v14, v1 :: v_dual_mov_b32 v13, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v6, v6, v13 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v6, 24, v[11:12] v_and_b32_e32 v11, v7, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v6 global_load_b64 v[11:12], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[11:14], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[13:14] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_149 ; %bb.150: ; %Flow518 s_or_b32 exec_lo, exec_lo, s5 .LBB0_151: ; %Flow520 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_152: ; %.loopexit4.i.i.i30 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v11, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[6:7], v11, s[2:3] offset:40 global_load_b128 v[12:15], v11, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v6 v_readfirstlane_b32 s7, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_154 ; %bb.153: v_dual_mov_b32 v16, s10 :: v_dual_mov_b32 v17, v11 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v12, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v13, vcc_lo v_dual_mov_b32 v18, 2 :: v_dual_mov_b32 v19, 1 global_store_b128 v[0:1], v[16:19], off offset:8 .LBB0_154: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[10:11] s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v14, s6 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v15, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v4, v0 s_mov_b32 s15, s12 s_mov_b32 s13, s12 s_mov_b32 s14, s12 v_and_or_b32 v8, 0xffffff1f, v8, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo v_dual_mov_b32 v10, v3 :: v_dual_mov_b32 v17, s15 v_dual_mov_b32 v16, s14 :: v_dual_mov_b32 v15, s13 v_mov_b32_e32 v14, s12 s_clause 0x3 global_store_b128 v[0:1], v[8:11], off global_store_b128 v[0:1], v[14:17], off offset:16 global_store_b128 v[0:1], v[14:17], off offset:32 global_store_b128 v[0:1], v[14:17], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_162 ; %bb.155: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v15, s5 v_mov_b32_e32 v14, s4 s_clause 0x1 global_load_b64 v[16:17], v10, s[2:3] offset:32 glc global_load_b64 v[3:4], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v12, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v13, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v10, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[8:9], v[16:17] s_cbranch_execz .LBB0_158 ; %bb.156: ; %.preheader1.i.i.i34.preheader s_mov_b32 s10, 0 .LBB0_157: ; %.preheader1.i.i.i34 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s5 s_sleep 1 global_store_b64 v[3:4], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v10, v[6:9], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_157 .LBB0_158: ; %Flow516 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v7, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v6, s10, 0 global_load_b64 v[3:4], v7, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB0_160 ; %bb.159: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v6, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[6:7], off offset:8 .LBB0_160: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[6:7], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] s_cbranch_vccnz .LBB0_162 ; %bb.161: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[6:7], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_162: ; %Flow517 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v12, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v13, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_163: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_165 ; %bb.164: ; in Loop: Header=BB0_163 Depth=1 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB0_165: ; in Loop: Header=BB0_163 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v6 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_167 ; %bb.166: ; in Loop: Header=BB0_163 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_168 .LBB0_167: ; in Loop: Header=BB0_163 Depth=1 s_mov_b32 s1, -1 .LBB0_168: ; %Flow511 ; in Loop: Header=BB0_163 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_163 ; %bb.169: global_load_b64 v[6:7], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_173 ; %bb.170: v_mov_b32_e32 v3, 0 s_clause 0x2 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[12:13], v3, s[2:3] offset:24 glc global_load_b64 v[10:11], v3, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v4, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v4, s4 v_add_co_ci_u32_e32 v9, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v8, v8, v4 :: v_dual_cndmask_b32 v9, v9, v14 v_and_b32_e32 v0, v8, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v9, v1 v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v0, v0, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v0, vcc_lo, v10, v0 v_mov_b32_e32 v10, v12 v_mul_lo_u32 v1, v1, 24 v_add_nc_u32_e32 v1, v4, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[0:1], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v3, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_173 ; %bb.171: ; %.preheader.i.i.i33.preheader s_mov_b32 s0, 0 .LBB0_172: ; %.preheader.i.i.i33 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v3, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_172 .LBB0_173: ; %__ockl_printf_append_args.exit s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v0 v_mov_b32_e32 v4, 0 v_cmp_eq_u32_e64 s0, s0, v0 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_179 ; %bb.174: v_mov_b32_e32 v1, 0 s_mov_b32 s4, exec_lo global_load_b64 v[10:11], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[8:9], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v11 v_and_b32_e32 v3, v3, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v12, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v12, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v8, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v9, v4, vcc_lo global_load_b64 v[8:9], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[10:11] s_cbranch_execz .LBB0_178 ; %bb.175: ; %.preheader3.i.i.i43.preheader s_mov_b32 s5, 0 .LBB0_176: ; %.preheader3.i.i.i43 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b64 v[12:13], v1, s[2:3] v_dual_mov_b32 v11, v4 :: v_dual_mov_b32 v10, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v10 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v8, 24, v[12:13] v_and_b32_e32 v12, v9, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v12, 24, v[4:5] v_mov_b32_e32 v4, v8 global_load_b64 v[8:9], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[10:11] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_176 ; %bb.177: ; %Flow504 s_or_b32 exec_lo, exec_lo, s5 .LBB0_178: ; %Flow506 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_179: ; %.loopexit4.i.i.i37 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v1, 0 v_readfirstlane_b32 s4, v3 v_readfirstlane_b32 s5, v4 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b128 v[10:13], v1, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_181 ; %bb.180: v_dual_mov_b32 v14, s10 :: v_dual_mov_b32 v15, v1 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s10, v11, vcc_lo v_dual_mov_b32 v16, 2 :: v_dual_mov_b32 v17, 1 global_store_b128 v[3:4], v[14:17], off offset:8 .LBB0_181: s_or_b32 exec_lo, exec_lo, s11 v_cvt_f64_f32_e32 v[8:9], v37 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v12, s6 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v13, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v6, 0xffffff1f, v6, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13 v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15 s_clause 0x3 global_store_b128 v[0:1], v[6:9], off global_store_b128 v[0:1], v[12:15], off offset:16 global_store_b128 v[0:1], v[12:15], off offset:32 global_store_b128 v[0:1], v[12:15], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_189 ; %bb.182: v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, s4 v_mov_b32_e32 v14, s5 s_clause 0x1 global_load_b64 v[15:16], v12, s[2:3] offset:32 glc global_load_b64 v[3:4], v12, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v10, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v11, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v12, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[8:9], v[15:16] s_cbranch_execz .LBB0_185 ; %bb.183: ; %.preheader1.i.i.i41.preheader s_mov_b32 s10, 0 .LBB0_184: ; %.preheader1.i.i.i41 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s5 s_sleep 1 global_store_b64 v[3:4], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v12, v[6:9], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_184 .LBB0_185: ; %Flow502 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v7, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v6, s10, 0 global_load_b64 v[3:4], v7, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB0_187 ; %bb.186: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v6, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[6:7], off offset:8 .LBB0_187: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[6:7], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] s_cbranch_vccnz .LBB0_189 ; %bb.188: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[6:7], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_189: ; %Flow503 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v11, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_190: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_192 ; %bb.191: ; in Loop: Header=BB0_190 Depth=1 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB0_192: ; in Loop: Header=BB0_190 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v6 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_194 ; %bb.193: ; in Loop: Header=BB0_190 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_195 .LBB0_194: ; in Loop: Header=BB0_190 Depth=1 s_mov_b32 s1, -1 .LBB0_195: ; %Flow497 ; in Loop: Header=BB0_190 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_190 ; %bb.196: global_load_b64 v[6:7], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_200 ; %bb.197: v_mov_b32_e32 v3, 0 s_clause 0x2 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[12:13], v3, s[2:3] offset:24 glc global_load_b64 v[10:11], v3, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v4, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v4, s4 v_add_co_ci_u32_e32 v9, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v8, v8, v4 :: v_dual_cndmask_b32 v9, v9, v14 v_and_b32_e32 v0, v8, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v9, v1 v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v0, v0, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v0, vcc_lo, v10, v0 v_mov_b32_e32 v10, v12 v_mul_lo_u32 v1, v1, 24 v_add_nc_u32_e32 v1, v4, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[0:1], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v3, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_200 ; %bb.198: ; %.preheader.i.i.i40.preheader s_mov_b32 s0, 0 .LBB0_199: ; %.preheader.i.i.i40 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v3, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_199 .LBB0_200: ; %__ockl_printf_append_args.exit44 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v0 v_mov_b32_e32 v4, 0 v_cmp_eq_u32_e64 s0, s0, v0 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_206 ; %bb.201: v_mov_b32_e32 v1, 0 s_mov_b32 s4, exec_lo global_load_b64 v[10:11], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[8:9], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v11 v_and_b32_e32 v3, v3, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v12, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v12, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v8, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v9, v4, vcc_lo global_load_b64 v[8:9], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[10:11] s_cbranch_execz .LBB0_205 ; %bb.202: ; %.preheader3.i.i.i51.preheader s_mov_b32 s5, 0 .LBB0_203: ; %.preheader3.i.i.i51 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b64 v[12:13], v1, s[2:3] v_dual_mov_b32 v11, v4 :: v_dual_mov_b32 v10, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v10 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v8, 24, v[12:13] v_and_b32_e32 v12, v9, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v12, 24, v[4:5] v_mov_b32_e32 v4, v8 global_load_b64 v[8:9], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[10:11] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_203 ; %bb.204: ; %Flow490 s_or_b32 exec_lo, exec_lo, s5 .LBB0_205: ; %Flow492 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_206: ; %.loopexit4.i.i.i45 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v1, 0 v_readfirstlane_b32 s4, v3 v_readfirstlane_b32 s5, v4 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b128 v[10:13], v1, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_208 ; %bb.207: v_dual_mov_b32 v14, s10 :: v_dual_mov_b32 v15, v1 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s10, v11, vcc_lo v_dual_mov_b32 v16, 2 :: v_dual_mov_b32 v17, 1 global_store_b128 v[3:4], v[14:17], off offset:8 .LBB0_208: s_or_b32 exec_lo, exec_lo, s11 v_cvt_f64_f32_e32 v[8:9], v36 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v12, s6 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v13, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v6, 0xffffff1f, v6, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13 v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15 s_clause 0x3 global_store_b128 v[0:1], v[6:9], off global_store_b128 v[0:1], v[12:15], off offset:16 global_store_b128 v[0:1], v[12:15], off offset:32 global_store_b128 v[0:1], v[12:15], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_216 ; %bb.209: v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, s4 v_mov_b32_e32 v14, s5 s_clause 0x1 global_load_b64 v[15:16], v12, s[2:3] offset:32 glc global_load_b64 v[3:4], v12, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v10, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v11, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v12, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[8:9], v[15:16] s_cbranch_execz .LBB0_212 ; %bb.210: ; %.preheader1.i.i.i49.preheader s_mov_b32 s10, 0 .LBB0_211: ; %.preheader1.i.i.i49 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s5 s_sleep 1 global_store_b64 v[3:4], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v12, v[6:9], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_211 .LBB0_212: ; %Flow488 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v7, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v6, s10, 0 global_load_b64 v[3:4], v7, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB0_214 ; %bb.213: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v6, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[6:7], off offset:8 .LBB0_214: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[6:7], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] s_cbranch_vccnz .LBB0_216 ; %bb.215: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[6:7], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_216: ; %Flow489 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v11, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_217: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_219 ; %bb.218: ; in Loop: Header=BB0_217 Depth=1 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB0_219: ; in Loop: Header=BB0_217 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v6 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_221 ; %bb.220: ; in Loop: Header=BB0_217 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_222 .LBB0_221: ; in Loop: Header=BB0_217 Depth=1 s_mov_b32 s1, -1 .LBB0_222: ; %Flow483 ; in Loop: Header=BB0_217 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_217 ; %bb.223: global_load_b64 v[6:7], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_227 ; %bb.224: v_mov_b32_e32 v3, 0 s_clause 0x2 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[12:13], v3, s[2:3] offset:24 glc global_load_b64 v[10:11], v3, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v4, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v4, s4 v_add_co_ci_u32_e32 v9, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v8, v8, v4 :: v_dual_cndmask_b32 v9, v9, v14 v_and_b32_e32 v0, v8, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v9, v1 v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v0, v0, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v0, vcc_lo, v10, v0 v_mov_b32_e32 v10, v12 v_mul_lo_u32 v1, v1, 24 v_add_nc_u32_e32 v1, v4, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[0:1], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v3, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_227 ; %bb.225: ; %.preheader.i.i.i48.preheader s_mov_b32 s0, 0 .LBB0_226: ; %.preheader.i.i.i48 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v3, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_226 .LBB0_227: ; %__ockl_printf_append_args.exit52 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v0 v_mov_b32_e32 v4, 0 v_cmp_eq_u32_e64 s0, s0, v0 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_233 ; %bb.228: v_mov_b32_e32 v1, 0 s_mov_b32 s4, exec_lo global_load_b64 v[10:11], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[8:9], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v11 v_and_b32_e32 v3, v3, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v12, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v12, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v8, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v9, v4, vcc_lo global_load_b64 v[8:9], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[10:11] s_cbranch_execz .LBB0_232 ; %bb.229: ; %.preheader3.i.i.i59.preheader s_mov_b32 s5, 0 .LBB0_230: ; %.preheader3.i.i.i59 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b64 v[12:13], v1, s[2:3] v_dual_mov_b32 v11, v4 :: v_dual_mov_b32 v10, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v10 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v8, 24, v[12:13] v_and_b32_e32 v12, v9, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v12, 24, v[4:5] v_mov_b32_e32 v4, v8 global_load_b64 v[8:9], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[10:11] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_230 ; %bb.231: ; %Flow476 s_or_b32 exec_lo, exec_lo, s5 .LBB0_232: ; %Flow478 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_233: ; %.loopexit4.i.i.i53 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v1, 0 v_readfirstlane_b32 s4, v3 v_readfirstlane_b32 s5, v4 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b128 v[10:13], v1, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_235 ; %bb.234: v_dual_mov_b32 v14, s10 :: v_dual_mov_b32 v15, v1 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s10, v11, vcc_lo v_dual_mov_b32 v16, 2 :: v_dual_mov_b32 v17, 1 global_store_b128 v[3:4], v[14:17], off offset:8 .LBB0_235: s_or_b32 exec_lo, exec_lo, s11 v_cvt_f64_f32_e32 v[8:9], v35 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v12, s6 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v13, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v6, 0xffffff1f, v6, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13 v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15 s_clause 0x3 global_store_b128 v[0:1], v[6:9], off global_store_b128 v[0:1], v[12:15], off offset:16 global_store_b128 v[0:1], v[12:15], off offset:32 global_store_b128 v[0:1], v[12:15], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_243 ; %bb.236: v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, s4 v_mov_b32_e32 v14, s5 s_clause 0x1 global_load_b64 v[15:16], v12, s[2:3] offset:32 glc global_load_b64 v[3:4], v12, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v10, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v11, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v12, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[8:9], v[15:16] s_cbranch_execz .LBB0_239 ; %bb.237: ; %.preheader1.i.i.i57.preheader s_mov_b32 s10, 0 .LBB0_238: ; %.preheader1.i.i.i57 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v6, s4 :: v_dual_mov_b32 v7, s5 s_sleep 1 global_store_b64 v[3:4], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v12, v[6:9], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_238 .LBB0_239: ; %Flow474 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v7, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v6, s10, 0 global_load_b64 v[3:4], v7, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB0_241 ; %bb.240: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v6, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[6:7], off offset:8 .LBB0_241: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[6:7], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] s_cbranch_vccnz .LBB0_243 ; %bb.242: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[6:7], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_243: ; %Flow475 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v10, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v11, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_244: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_246 ; %bb.245: ; in Loop: Header=BB0_244 Depth=1 global_load_b32 v6, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB0_246: ; in Loop: Header=BB0_244 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v6 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_248 ; %bb.247: ; in Loop: Header=BB0_244 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_249 .LBB0_248: ; in Loop: Header=BB0_244 Depth=1 s_mov_b32 s1, -1 .LBB0_249: ; %Flow469 ; in Loop: Header=BB0_244 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_244 ; %bb.250: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_254 ; %bb.251: v_mov_b32_e32 v10, 0 s_clause 0x2 global_load_b64 v[0:1], v10, s[2:3] offset:40 global_load_b64 v[11:12], v10, s[2:3] offset:24 glc global_load_b64 v[8:9], v10, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v13, s4 v_add_co_ci_u32_e32 v7, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] v_dual_cndmask_b32 v7, v7, v14 :: v_dual_cndmask_b32 v6, v6, v13 v_and_b32_e32 v1, v7, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v6, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v13, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v8, v0 v_mov_b32_e32 v8, v11 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v9, v12 global_store_b64 v[0:1], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v10, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_254 ; %bb.252: ; %.preheader.i.i.i56.preheader s_mov_b32 s0, 0 .LBB0_253: ; %.preheader.i.i.i56 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v10, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9] v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_253 .LBB0_254: ; %__ockl_printf_append_args.exit60 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v11, v34 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v11 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v11 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_260 ; %bb.255: v_mov_b32_e32 v6, 0 s_mov_b32 s4, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_259 ; %bb.256: ; %.preheader3.i.i.i67.preheader s_mov_b32 s5, 0 .LBB0_257: ; %.preheader3.i.i.i67 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[12:13], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[12:13] v_and_b32_e32 v12, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v12, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_257 ; %bb.258: ; %Flow462 s_or_b32 exec_lo, exec_lo, s5 .LBB0_259: ; %Flow464 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_260: ; %.loopexit4.i.i.i61 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v12, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[13:14], v12, s[2:3] offset:40 global_load_b128 v[7:10], v12, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v13 v_readfirstlane_b32 s7, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_262 ; %bb.261: v_dual_mov_b32 v13, s10 :: v_dual_mov_b32 v14, v12 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v8, vcc_lo v_dual_mov_b32 v15, 2 :: v_dual_mov_b32 v16, 1 global_store_b128 v[0:1], v[13:16], off offset:8 .LBB0_262: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[11:12] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v9, s6 v_add_co_ci_u32_e32 v9, vcc_lo, s7, v10, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v6, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_dual_mov_b32 v6, v12 :: v_dual_mov_b32 v9, s12 v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, s14 v_mov_b32_e32 v12, s15 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_270 ; %bb.263: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s4 v_mov_b32_e32 v13, s5 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v9, vcc_lo, v7, s10 v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_266 ; %bb.264: ; %.preheader1.i.i.i65.preheader s_mov_b32 s10, 0 .LBB0_265: ; %.preheader1.i.i.i65 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s5 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_265 .LBB0_266: ; %Flow460 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v6, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v5, s10, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_268 ; %bb.267: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_268: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_270 ; %bb.269: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_270: ; %Flow461 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v7, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_271: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_273 ; %bb.272: ; in Loop: Header=BB0_271 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_273: ; in Loop: Header=BB0_271 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_275 ; %bb.274: ; in Loop: Header=BB0_271 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_276 .LBB0_275: ; in Loop: Header=BB0_271 Depth=1 s_mov_b32 s1, -1 .LBB0_276: ; %Flow455 ; in Loop: Header=BB0_271 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_271 ; %bb.277: global_load_b64 v[0:1], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_281 ; %bb.278: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[5:6], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v5, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v12, s4 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_and_b32_e32 v6, v4, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v3, v5 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v5, 24 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, v7, v5 v_mov_b32_e32 v5, v10 v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo v_mov_b32_e32 v6, v11 global_store_b64 v[7:8], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_281 ; %bb.279: ; %.preheader.i.i.i64.preheader s_mov_b32 s0, 0 .LBB0_280: ; %.preheader.i.i.i64 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6] v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_280 .LBB0_281: ; %__ockl_printf_append_args.exit68 s_or_b32 exec_lo, exec_lo, s1 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v34 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v34 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_287 ; %bb.282: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_286 ; %bb.283: ; %.preheader3.i.i.i75.preheader s_mov_b32 s5, 0 .LBB0_284: ; %.preheader3.i.i.i75 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_284 ; %bb.285: ; %Flow448 s_or_b32 exec_lo, exec_lo, s5 .LBB0_286: ; %Flow450 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_287: ; %.loopexit4.i.i.i69 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v35, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v35, s[2:3] offset:40 global_load_b128 v[4:7], v35, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_289 ; %bb.288: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v35 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_289: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[34:35] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v3, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1d, v0, 34 v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo v_dual_mov_b32 v3, v35 :: v_dual_mov_b32 v6, s12 v_dual_mov_b32 v7, s13 :: v_dual_mov_b32 v8, s14 v_mov_b32_e32 v9, s15 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_297 ; %bb.290: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v6, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_293 ; %bb.291: ; %.preheader1.i.i.i73.preheader s_mov_b32 s10, 0 .LBB0_292: ; %.preheader1.i.i.i73 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_292 .LBB0_293: ; %Flow446 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_295 ; %bb.294: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_295: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_297 ; %bb.296: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_297: ; %Flow447 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_298: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_300 ; %bb.299: ; in Loop: Header=BB0_298 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_300: ; in Loop: Header=BB0_298 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_302 ; %bb.301: ; in Loop: Header=BB0_298 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_303 .LBB0_302: ; in Loop: Header=BB0_298 Depth=1 s_mov_b32 s1, -1 .LBB0_303: ; %Flow441 ; in Loop: Header=BB0_298 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_298 ; %bb.304: s_and_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_308 ; %bb.305: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_308 ; %bb.306: ; %.preheader.i.i.i72.preheader s_mov_b32 s0, 0 .LBB0_307: ; %.preheader.i.i.i72 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_307 .LBB0_308: ; %__ockl_printf_append_args.exit76 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 352 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 38 .amdhsa_next_free_sgpr 18 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img, .Lfunc_end0-_Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 13940 ; NumSgprs: 20 ; NumVgprs: 38 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 20 ; NumVGPRsForWavesPerEU: 38 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "index is %d,x is %f, y is %f, z is %f, image_pos.x is %d, image_pos.z is %d\n" .size .str, 77 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 64 .value_kind: by_value - .offset: 80 .size: 4 .value_kind: by_value - .address_space: global .offset: 88 .size: 8 .value_kind: global_buffer - .offset: 96 .size: 4 .value_kind: hidden_block_count_x - .offset: 100 .size: 4 .value_kind: hidden_block_count_y - .offset: 104 .size: 4 .value_kind: hidden_block_count_z - .offset: 108 .size: 2 .value_kind: hidden_group_size_x - .offset: 110 .size: 2 .value_kind: hidden_group_size_y - .offset: 112 .size: 2 .value_kind: hidden_group_size_z - .offset: 114 .size: 2 .value_kind: hidden_remainder_x - .offset: 116 .size: 2 .value_kind: hidden_remainder_y - .offset: 118 .size: 2 .value_kind: hidden_remainder_z - .offset: 136 .size: 8 .value_kind: hidden_global_offset_x - .offset: 144 .size: 8 .value_kind: hidden_global_offset_y - .offset: 152 .size: 8 .value_kind: hidden_global_offset_z - .offset: 160 .size: 2 .value_kind: hidden_grid_dims - .offset: 176 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 16 .kernarg_segment_size: 352 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img .private_segment_fixed_size: 0 .sgpr_count: 20 .sgpr_spill_count: 0 .symbol: _Z8mykernelP15HIP_vector_typeIfLj3EE7Matrix4iP3Img.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 38 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
fdf437eef1e308bbd509f381d0e36fc23f7d9bc9
void ocean() { int m = 1 << 7; int n = 1 << 7; }
.file "tmpxft_00347b48_00000000-6_ocean.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2011: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2011: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z5oceanv .type _Z5oceanv, @function _Z5oceanv: .LFB2008: .cfi_startproc endbr64 ret .cfi_endproc .LFE2008: .size _Z5oceanv, .-_Z5oceanv .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2034: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2034: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> void ocean() { int m = 1 << 7; int n = 1 << 7; }
.text .file "ocean.hip" .globl _Z5oceanv # -- Begin function _Z5oceanv .type _Z5oceanv,@function _Z5oceanv: # @_Z5oceanv .cfi_startproc # %bb.0: retq .Lfunc_end0: .size _Z5oceanv, .Lfunc_end0-_Z5oceanv .cfi_endproc # -- End function .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
a5338642fe60e917604ffba4e39f7eb38c4c15cb
#include <stdio.h> #include <cuda.h> //size of array #define N 4096 //vector addition kernel __global__ void vectorAddKernel(int *a, int *b, int *c) { int tdx = blockIdx.x * blockDim.x + threadIdx.x; if(tdx < N) { c[tdx] = a[tdx]+b[tdx]; } } int main() { //grid and block sizes dim3 grid(16, 1, 1); dim3 block(256, 1, 1); //host arrays int a_h[N]; int b_h[N]; int c_h[N]; //device memory pointers int *a_d; int *b_d; int *c_d; //load arrays with some numbers for(int i=0; i<N; i++) { a_h[i] = i; b_h[i] = i*1; } //allocate device memory cudaMalloc((void**)&a_d, N*sizeof(int)); cudaMalloc((void**)&b_d, N*sizeof(int)); cudaMalloc((void**)&c_d, N*sizeof(int)); //copy the host arrays to device cudaMemcpy(&a_d, &a_h, N*sizeof(int), cudaMemcpyHostToDevice); cudaMemcpy(&b_d, &b_h, N*sizeof(int), cudaMemcpyHostToDevice); cudaMemcpy(&c_d, &c_h, N*sizeof(int), cudaMemcpyHostToDevice); //CUDA events to measure time cudaEvent_t start; cudaEvent_t stop; float elapsedTime; //start timer cudaEventCreate(&start); cudaEventCreate(&stop); cudaEventRecord(start, 0); //launch kernel vectorAddKernel<<<grid, block>>>(a_d, b_d, c_d); //stop timer cudaEventRecord(stop, 0); cudaEventSynchronize(stop); cudaEventElapsedTime(&elapsedTime, start, stop); //copy the results to host cudaMemcpy(c_h, c_d, N*sizeof(int), cudaMemcpyDeviceToHost); //print the results for(int i=0; i<N; i++) { printf("%i+%i = %i\n",a_h[i], b_h[i], c_h[i]); } //print out execution time printf("Time to calculate results: %f ms.\n", elapsedTime); //clean up cudaFree(a_h); cudaFree(b_h); cudaFree(c_h); cudaEventDestroy(start); cudaEventDestroy(stop); return 0; }
.file "tmpxft_002d14b8_00000000-6_exc2a.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z39__device_stub__Z15vectorAddKernelPiS_S_PiS_S_ .type _Z39__device_stub__Z15vectorAddKernelPiS_S_PiS_S_, @function _Z39__device_stub__Z15vectorAddKernelPiS_S_PiS_S_: .LFB2052: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z15vectorAddKernelPiS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z39__device_stub__Z15vectorAddKernelPiS_S_PiS_S_, .-_Z39__device_stub__Z15vectorAddKernelPiS_S_PiS_S_ .globl _Z15vectorAddKernelPiS_S_ .type _Z15vectorAddKernelPiS_S_, @function _Z15vectorAddKernelPiS_S_: .LFB2053: .cfi_startproc endbr64 jmp _Z39__device_stub__Z15vectorAddKernelPiS_S_PiS_S_ .cfi_endproc .LFE2053: .size _Z15vectorAddKernelPiS_S_, .-_Z15vectorAddKernelPiS_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "%i+%i = %i\n" .LC1: .string "Time to calculate results: %f ms.\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 leaq -49152(%rsp), %r11 .cfi_def_cfa 11, 49200 .LPSRL0: subq $4096, %rsp orq $0, (%rsp) cmpq %r11, %rsp jne .LPSRL0 .cfi_def_cfa_register 7 subq $80, %rsp .cfi_def_cfa_offset 49280 movq %fs:40, %rax movq %rax, 49224(%rsp) movabsq $4294967312, %rax movl $1, 56(%rsp) leaq 72(%rsp), %r13 leaq 16456(%rsp), %r12 movl $1, 68(%rsp) movq %rax, 48(%rsp) addq $240, %rax movq %rax, 60(%rsp) xorl %eax, %eax .L9: movl %eax, 0(%r13,%rax,4) movl %eax, (%r12,%rax,4) incq %rax cmpq $4096, %rax jne .L9 leaq 8(%rsp), %r14 leaq 16(%rsp), %rbp movl $16384, %esi movq %r14, %rdi leaq 24(%rsp), %rbx call cudaMalloc@PLT movq %rbp, %rdi movl $16384, %esi call cudaMalloc@PLT movl $16384, %esi movq %rbx, %rdi call cudaMalloc@PLT movl $1, %ecx movq %r13, %rsi movq %r14, %rdi movl $16384, %edx call cudaMemcpy@PLT movq %rbp, %rdi movl $1, %ecx movq %r12, %rsi movl $16384, %edx leaq 32840(%rsp), %rbp call cudaMemcpy@PLT movl $1, %ecx movq %rbp, %rsi movq %rbx, %rdi movl $16384, %edx call cudaMemcpy@PLT leaq 32(%rsp), %rdi call cudaEventCreate@PLT leaq 40(%rsp), %rdi call cudaEventCreate@PLT movq 32(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movl 68(%rsp), %ecx movl 56(%rsp), %esi xorl %r9d, %r9d movq 60(%rsp), %rdx movq 48(%rsp), %rdi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L10 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movq 8(%rsp), %rdi call _Z39__device_stub__Z15vectorAddKernelPiS_S_PiS_S_ .L10: movq 40(%rsp), %rdi xorl %esi, %esi xorl %ebx, %ebx leaq .LC0(%rip), %r14 call cudaEventRecord@PLT movq 40(%rsp), %rdi call cudaEventSynchronize@PLT movq 40(%rsp), %rdx movq 32(%rsp), %rsi leaq 4(%rsp), %rdi call cudaEventElapsedTime@PLT movq 24(%rsp), %rsi movl $2, %ecx movq %rbp, %rdi movl $16384, %edx call cudaMemcpy@PLT .L11: movl (%r12,%rbx), %ecx movl 0(%r13,%rbx), %edx movq %r14, %rsi xorl %eax, %eax movl 0(%rbp,%rbx), %r8d movl $2, %edi addq $4, %rbx call __printf_chk@PLT cmpq $16384, %rbx jne .L11 leaq .LC1(%rip), %rsi movl $2, %edi movb $1, %al cvtss2sd 4(%rsp), %xmm0 call __printf_chk@PLT movq %r13, %rdi call cudaFree@PLT movq %r12, %rdi call cudaFree@PLT movq %rbp, %rdi call cudaFree@PLT movq 32(%rsp), %rdi call cudaEventDestroy@PLT movq 40(%rsp), %rdi call cudaEventDestroy@PLT movq 49224(%rsp), %rax subq %fs:40, %rax je .L12 call __stack_chk_fail@PLT .L12: addq $49232, %rsp .cfi_def_cfa_offset 48 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC2: .string "_Z15vectorAddKernelPiS_S_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC2(%rip), %rdx movq %rax, %rdi leaq _Z15vectorAddKernelPiS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z15vectorAddKernelPiS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GT.AND P0, PT, R6, 0xfff, PT ; /* 0x00000fff0600780c */ /* 0x000fda0003f04270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */ /* 0x004fca0007ffe0ff */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <hip/hip_runtime.h> //size of array #define N 4096 //vector addition kernel __global__ void vectorAddKernel(int *a, int *b, int *c) { int tdx = blockIdx.x * blockDim.x + threadIdx.x; if(tdx < N) { c[tdx] = a[tdx]+b[tdx]; } } int main() { //grid and block sizes dim3 grid(16, 1, 1); dim3 block(256, 1, 1); //host arrays int a_h[N]; int b_h[N]; int c_h[N]; //device memory pointers int *a_d; int *b_d; int *c_d; //load arrays with some numbers for(int i=0; i<N; i++) { a_h[i] = i; b_h[i] = i*1; } //allocate device memory hipMalloc((void**)&a_d, N*sizeof(int)); hipMalloc((void**)&b_d, N*sizeof(int)); hipMalloc((void**)&c_d, N*sizeof(int)); //copy the host arrays to device hipMemcpy(&a_d, &a_h, N*sizeof(int), hipMemcpyHostToDevice); hipMemcpy(&b_d, &b_h, N*sizeof(int), hipMemcpyHostToDevice); hipMemcpy(&c_d, &c_h, N*sizeof(int), hipMemcpyHostToDevice); //CUDA events to measure time hipEvent_t start; hipEvent_t stop; float elapsedTime; //start timer hipEventCreate(&start); hipEventCreate(&stop); hipEventRecord(start, 0); //launch kernel vectorAddKernel<<<grid, block>>>(a_d, b_d, c_d); //stop timer hipEventRecord(stop, 0); hipEventSynchronize(stop); hipEventElapsedTime(&elapsedTime, start, stop); //copy the results to host hipMemcpy(c_h, c_d, N*sizeof(int), hipMemcpyDeviceToHost); //print the results for(int i=0; i<N; i++) { printf("%i+%i = %i\n",a_h[i], b_h[i], c_h[i]); } //print out execution time printf("Time to calculate results: %f ms.\n", elapsedTime); //clean up hipFree(a_h); hipFree(b_h); hipFree(c_h); hipEventDestroy(start); hipEventDestroy(stop); return 0; }
.text .file "exc2a.hip" .globl _Z30__device_stub__vectorAddKernelPiS_S_ # -- Begin function _Z30__device_stub__vectorAddKernelPiS_S_ .type _Z30__device_stub__vectorAddKernelPiS_S_,@function _Z30__device_stub__vectorAddKernelPiS_S_: # @_Z30__device_stub__vectorAddKernelPiS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z15vectorAddKernelPiS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z30__device_stub__vectorAddKernelPiS_S_, .Lfunc_end0-_Z30__device_stub__vectorAddKernelPiS_S_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $49200, %rsp # imm = 0xC030 .cfi_def_cfa_offset 49232 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 xorl %eax, %eax .LBB1_1: # =>This Inner Loop Header: Depth=1 movl %eax, 32816(%rsp,%rax,4) movl %eax, 16432(%rsp,%rax,4) incq %rax cmpq $4096, %rax # imm = 0x1000 jne .LBB1_1 # %bb.2: leaq 40(%rsp), %r14 movl $16384, %esi # imm = 0x4000 movq %r14, %rdi callq hipMalloc leaq 32(%rsp), %r15 movl $16384, %esi # imm = 0x4000 movq %r15, %rdi callq hipMalloc leaq 24(%rsp), %rbx movl $16384, %esi # imm = 0x4000 movq %rbx, %rdi callq hipMalloc leaq 32816(%rsp), %rsi movl $16384, %edx # imm = 0x4000 movq %r14, %rdi movl $1, %ecx callq hipMemcpy leaq 16432(%rsp), %rsi movl $16384, %edx # imm = 0x4000 movq %r15, %rdi movl $1, %ecx callq hipMemcpy leaq 48(%rsp), %rsi movl $16384, %edx # imm = 0x4000 movq %rbx, %rdi movl $1, %ecx callq hipMemcpy leaq 16(%rsp), %rbx movq %rbx, %rdi callq hipEventCreate movq %rsp, %rdi callq hipEventCreate movq (%rbx), %rdi xorl %esi, %esi callq hipEventRecord movabsq $4294967312, %rdi # imm = 0x100000010 leaq 240(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_4 # %bb.3: movq 40(%rsp), %rdi movq 32(%rsp), %rsi movq 24(%rsp), %rdx callq _Z30__device_stub__vectorAddKernelPiS_S_ .LBB1_4: movq (%rsp), %rdi xorl %esi, %esi callq hipEventRecord movq (%rsp), %rdi callq hipEventSynchronize movq 16(%rsp), %rsi movq (%rsp), %rdx leaq 12(%rsp), %rdi callq hipEventElapsedTime movq 24(%rsp), %rsi leaq 48(%rsp), %rdi movl $16384, %edx # imm = 0x4000 movl $2, %ecx callq hipMemcpy xorl %ebx, %ebx .LBB1_5: # =>This Inner Loop Header: Depth=1 movl 32816(%rsp,%rbx,4), %esi movl 16432(%rsp,%rbx,4), %edx movl 48(%rsp,%rbx,4), %ecx movl $.L.str, %edi xorl %eax, %eax callq printf incq %rbx cmpq $4096, %rbx # imm = 0x1000 jne .LBB1_5 # %bb.6: cvtss2sd 12(%rsp), %xmm0 movl $.L.str.1, %edi movb $1, %al callq printf leaq 32816(%rsp), %rdi callq hipFree leaq 16432(%rsp), %rdi callq hipFree leaq 48(%rsp), %rdi callq hipFree movq 16(%rsp), %rdi callq hipEventDestroy movq (%rsp), %rdi callq hipEventDestroy xorl %eax, %eax addq $49200, %rsp # imm = 0xC030 .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z15vectorAddKernelPiS_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z15vectorAddKernelPiS_S_,@object # @_Z15vectorAddKernelPiS_S_ .section .rodata,"a",@progbits .globl _Z15vectorAddKernelPiS_S_ .p2align 3, 0x0 _Z15vectorAddKernelPiS_S_: .quad _Z30__device_stub__vectorAddKernelPiS_S_ .size _Z15vectorAddKernelPiS_S_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%i+%i = %i\n" .size .L.str, 12 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "Time to calculate results: %f ms.\n" .size .L.str.1, 35 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z15vectorAddKernelPiS_S_" .size .L__unnamed_1, 26 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z30__device_stub__vectorAddKernelPiS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z15vectorAddKernelPiS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z15vectorAddKernelPiS_S_ ; -- Begin function _Z15vectorAddKernelPiS_S_ .globl _Z15vectorAddKernelPiS_S_ .p2align 8 .type _Z15vectorAddKernelPiS_S_,@function _Z15vectorAddKernelPiS_S_: ; @_Z15vectorAddKernelPiS_S_ ; %bb.0: s_load_b32 s2, s[0:1], 0x24 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e32 0x1000, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_nc_u32_e32 v2, v3, v2 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z15vectorAddKernelPiS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z15vectorAddKernelPiS_S_, .Lfunc_end0-_Z15vectorAddKernelPiS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 168 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z15vectorAddKernelPiS_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z15vectorAddKernelPiS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
ed3d050aef8e91d2daba39e21abf4c85a0211905
#include <stdio.h> #include <time.h> #include <stdlib.h> #include <cuda.h> #define n 2 void fillMatrix(double *w, int li, int lj){ double count = 0; for(int i=0; i<li; i++){ for(int j=0; j<lj; j++){ w[i*lj+j] = count; count++; } } } void print(double *w, int li, int lj){ for(int i=0; i<li; i++){ for(int j=0; j<lj; j++){ printf("%.4lf ", w[i*lj+j]); } printf("\n"); } } __global__ void product(double *d_x, double *d_y, double *d_z){ int row = blockIdx.y*blockDim.y+threadIdx.y; int col = blockIdx.x*blockDim.x+threadIdx.x; double sum = 0; if ((row < n) && (col < n)){ for (int i = 0; i < n; i++) sum += d_x[n*row + i] * d_y[i*n+col]; d_z[row*n+col] = sum; } } int main(int argc, char const *argv[]) { int size1 = n*n*sizeof(double); int size2 = n*n*sizeof(double); int size3 = n*n*sizeof(double); double *x = (double*)malloc(size1); double *y = (double*)malloc(size2); double *z = (double*)malloc(size3); fillMatrix(x,n,n); fillMatrix(y,n,n); clock_t begin, end; double time_spent; begin = clock(); double *d_x = (double*)malloc(size1); double *d_y = (double*)malloc(size2); double *d_z = (double*)malloc(size3); cudaMalloc((void**)&d_x, size1); cudaMalloc((void**)&d_y, size2); cudaMalloc((void**)&d_z, size3); cudaMemcpy(d_x, x, size1, cudaMemcpyHostToDevice); cudaMemcpy(d_y, y, size2, cudaMemcpyHostToDevice); int threads = 16; dim3 dimBlock(threads,threads); dim3 dimGrid((n+dimBlock.x-1)/dimBlock.x, (n+dimBlock.y-1)/dimBlock.y); product<<<dimGrid,dimBlock>>>(d_x, d_y, d_z); cudaMemcpy(z,d_z,size3,cudaMemcpyDeviceToHost); print(x,n,n); printf("\n"); print(y,n,n); printf("\n"); print(z,n,n); end = clock(); time_spent = (double)(end - begin) / CLOCKS_PER_SEC; printf("%lf\n", time_spent); return 0; }
.file "tmpxft_0021a4bc_00000000-6_threaded.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2032: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2032: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z10fillMatrixPdii .type _Z10fillMatrixPdii, @function _Z10fillMatrixPdii: .LFB2027: .cfi_startproc endbr64 movsd .LC1(%rip), %xmm1 xorl %ecx, %ecx xorl %r8d, %r8d xorps %xmm0, %xmm0 .L3: cmpl %esi, %r8d jge .L2 movslq %ecx, %rax leaq (%rdi,%rax,8), %r9 xorl %eax, %eax .L6: cmpl %eax, %edx jle .L8 movsd %xmm0, (%r9,%rax,8) addsd %xmm1, %xmm0 incq %rax jmp .L6 .L8: incl %r8d addl %edx, %ecx jmp .L3 .L2: ret .cfi_endproc .LFE2027: .size _Z10fillMatrixPdii, .-_Z10fillMatrixPdii .section .rodata.str1.1,"aMS",@progbits,1 .LC2: .string "%.4lf " .LC3: .string "\n" .text .globl _Z5printPdii .type _Z5printPdii, @function _Z5printPdii: .LFB2028: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movl %esi, %r14d pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 xorl %r13d, %r13d pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 xorl %r12d, %r12d pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %edx, %ebx subq $24, %rsp .cfi_def_cfa_offset 80 .L10: cmpl %r14d, %r13d jge .L9 movslq %r12d, %rax xorl %r15d, %r15d leaq 0(%rbp,%rax,8), %rcx .L13: cmpl %r15d, %ebx jle .L15 movsd (%rcx,%r15,8), %xmm0 leaq .LC2(%rip), %rsi movl $2, %edi movb $1, %al movq %rcx, 8(%rsp) incq %r15 call __printf_chk@PLT movq 8(%rsp), %rcx jmp .L13 .L15: leaq .LC3(%rip), %rsi xorl %eax, %eax incl %r13d addl %ebx, %r12d movl $2, %edi call __printf_chk@PLT jmp .L10 .L9: addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size _Z5printPdii, .-_Z5printPdii .globl _Z30__device_stub__Z7productPdS_S_PdS_S_ .type _Z30__device_stub__Z7productPdS_S_PdS_S_, @function _Z30__device_stub__Z7productPdS_S_PdS_S_: .LFB2054: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L16 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z7productPdS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L16: movq 120(%rsp), %rax subq %fs:40, %rax je .L18 call __stack_chk_fail@PLT .L18: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2054: .size _Z30__device_stub__Z7productPdS_S_PdS_S_, .-_Z30__device_stub__Z7productPdS_S_PdS_S_ .globl _Z7productPdS_S_ .type _Z7productPdS_S_, @function _Z7productPdS_S_: .LFB2055: .cfi_startproc endbr64 jmp _Z30__device_stub__Z7productPdS_S_PdS_S_ .cfi_endproc .LFE2055: .size _Z7productPdS_S_, .-_Z7productPdS_S_ .section .rodata.str1.1 .LC5: .string "%lf\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2029: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 movl $32, %edi pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 subq $72, %rsp .cfi_def_cfa_offset 112 movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax call malloc@PLT movl $32, %edi movq %rax, %rbp call malloc@PLT movl $32, %edi movq %rax, %rbx call malloc@PLT movl $2, %edx movl $2, %esi movq %rbp, %rdi movq %rax, %r12 call _Z10fillMatrixPdii movq %rbx, %rdi call _Z10fillMatrixPdii call clock@PLT movl $32, %edi movq %rax, %r13 call malloc@PLT movl $32, %edi movq %rax, 8(%rsp) call malloc@PLT movl $32, %edi movq %rax, 16(%rsp) call malloc@PLT leaq 8(%rsp), %rdi movl $32, %esi movq %rax, 24(%rsp) call cudaMalloc@PLT leaq 16(%rsp), %rdi movl $32, %esi call cudaMalloc@PLT leaq 24(%rsp), %rdi movl $32, %esi call cudaMalloc@PLT movq 8(%rsp), %rdi movl $1, %ecx movq %rbp, %rsi movl $32, %edx call cudaMemcpy@PLT movq 16(%rsp), %rdi movl $1, %ecx movq %rbx, %rsi movl $32, %edx call cudaMemcpy@PLT xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $68719476752, %rdx movl $1, %esi movabsq $4294967297, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L22 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movq 8(%rsp), %rdi call _Z30__device_stub__Z7productPdS_S_PdS_S_ .L22: movq 24(%rsp), %rsi movl $2, %ecx movl $32, %edx movq %r12, %rdi call cudaMemcpy@PLT movl $2, %edx movq %rbp, %rdi movl $2, %esi call _Z5printPdii leaq .LC3(%rip), %rbp movl $2, %edi xorl %eax, %eax movq %rbp, %rsi call __printf_chk@PLT movl $2, %edx movl $2, %esi movq %rbx, %rdi call _Z5printPdii movq %rbp, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl $2, %esi movq %r12, %rdi movl $2, %edx call _Z5printPdii call clock@PLT leaq .LC5(%rip), %rsi movl $2, %edi subq %r13, %rax cvtsi2sdq %rax, %xmm0 movb $1, %al divsd .LC4(%rip), %xmm0 call __printf_chk@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L23 call __stack_chk_fail@PLT .L23: addq $72, %rsp .cfi_def_cfa_offset 40 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size main, .-main .section .rodata.str1.1 .LC6: .string "_Z7productPdS_S_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2057: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC6(%rip), %rdx movq %rax, %rdi leaq _Z7productPdS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2057: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC1: .long 0 .long 1072693248 .align 8 .LC4: .long 0 .long 1093567616 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7productPdS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R14, SR_CTAID.X ; /* 0x00000000000e7919 */ /* 0x000e280000002500 */ /*0020*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e280000002100 */ /*0030*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e680000002600 */ /*0040*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e620000002200 */ /*0050*/ IMAD R14, R14, c[0x0][0x0], R5 ; /* 0x000000000e0e7a24 */ /* 0x001fca00078e0205 */ /*0060*/ ISETP.GT.AND P0, PT, R14, 0x1, PT ; /* 0x000000010e00780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x002fca00078e0203 */ /*0080*/ ISETP.GT.OR P0, PT, R0, 0x1, P0 ; /* 0x000000010000780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ SHF.L.U32 R15, R0, 0x1, RZ ; /* 0x00000001000f7819 */ /* 0x000fe200000006ff */ /*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00c0*/ MOV R17, 0x8 ; /* 0x0000000800117802 */ /* 0x000fca0000000f00 */ /*00d0*/ IMAD.WIDE R2, R15, R17, c[0x0][0x160] ; /* 0x000058000f027625 */ /* 0x000fc800078e0211 */ /*00e0*/ IMAD.WIDE R4, R14, R17, c[0x0][0x168] ; /* 0x00005a000e047625 */ /* 0x000fe200078e0211 */ /*00f0*/ LDG.E.64 R8, [R2.64] ; /* 0x0000000402087981 */ /* 0x000ea8000c1e1b00 */ /*0100*/ LDG.E.64 R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea8000c1e1b00 */ /*0110*/ LDG.E.64 R12, [R2.64+0x8] ; /* 0x00000804020c7981 */ /* 0x000ee8000c1e1b00 */ /*0120*/ LDG.E.64 R10, [R4.64+0x10] ; /* 0x00001004040a7981 */ /* 0x000ee2000c1e1b00 */ /*0130*/ DFMA R6, R6, R8, RZ ; /* 0x000000080606722b */ /* 0x0040c400000000ff */ /*0140*/ IADD3 R8, R14, R15, RZ ; /* 0x0000000f0e087210 */ /* 0x001fca0007ffe0ff */ /*0150*/ IMAD.WIDE R8, R8, R17, c[0x0][0x170] ; /* 0x00005c0008087625 */ /* 0x000fe200078e0211 */ /*0160*/ DFMA R6, R10, R12, R6 ; /* 0x0000000c0a06722b */ /* 0x008e0e0000000006 */ /*0170*/ STG.E.64 [R8.64], R6 ; /* 0x0000000608007986 */ /* 0x001fe2000c101b04 */ /*0180*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0190*/ BRA 0x190; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <time.h> #include <stdlib.h> #include <hip/hip_runtime.h> #define n 2 void fillMatrix(double *w, int li, int lj){ double count = 0; for(int i=0; i<li; i++){ for(int j=0; j<lj; j++){ w[i*lj+j] = count; count++; } } } void print(double *w, int li, int lj){ for(int i=0; i<li; i++){ for(int j=0; j<lj; j++){ printf("%.4lf ", w[i*lj+j]); } printf("\n"); } } __global__ void product(double *d_x, double *d_y, double *d_z){ int row = blockIdx.y*blockDim.y+threadIdx.y; int col = blockIdx.x*blockDim.x+threadIdx.x; double sum = 0; if ((row < n) && (col < n)){ for (int i = 0; i < n; i++) sum += d_x[n*row + i] * d_y[i*n+col]; d_z[row*n+col] = sum; } } int main(int argc, char const *argv[]) { int size1 = n*n*sizeof(double); int size2 = n*n*sizeof(double); int size3 = n*n*sizeof(double); double *x = (double*)malloc(size1); double *y = (double*)malloc(size2); double *z = (double*)malloc(size3); fillMatrix(x,n,n); fillMatrix(y,n,n); clock_t begin, end; double time_spent; begin = clock(); double *d_x = (double*)malloc(size1); double *d_y = (double*)malloc(size2); double *d_z = (double*)malloc(size3); hipMalloc((void**)&d_x, size1); hipMalloc((void**)&d_y, size2); hipMalloc((void**)&d_z, size3); hipMemcpy(d_x, x, size1, hipMemcpyHostToDevice); hipMemcpy(d_y, y, size2, hipMemcpyHostToDevice); int threads = 16; dim3 dimBlock(threads,threads); dim3 dimGrid((n+dimBlock.x-1)/dimBlock.x, (n+dimBlock.y-1)/dimBlock.y); product<<<dimGrid,dimBlock>>>(d_x, d_y, d_z); hipMemcpy(z,d_z,size3,hipMemcpyDeviceToHost); print(x,n,n); printf("\n"); print(y,n,n); printf("\n"); print(z,n,n); end = clock(); time_spent = (double)(end - begin) / CLOCKS_PER_SEC; printf("%lf\n", time_spent); return 0; }
.text .file "threaded.hip" .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _Z10fillMatrixPdii .LCPI0_0: .quad 0x3ff0000000000000 # double 1 .text .globl _Z10fillMatrixPdii .type _Z10fillMatrixPdii,@function _Z10fillMatrixPdii: # @_Z10fillMatrixPdii .cfi_startproc # %bb.0: testl %esi, %esi jle .LBB0_6 # %bb.1: # %.preheader.lr.ph movl %esi, %eax movl %edx, %ecx xorpd %xmm0, %xmm0 xorl %esi, %esi movsd .LCPI0_0(%rip), %xmm1 # xmm1 = mem[0],zero xorl %r8d, %r8d .LBB0_2: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB0_4 Depth 2 testl %edx, %edx jle .LBB0_5 # %bb.3: # %.lr.ph # in Loop: Header=BB0_2 Depth=1 movl %esi, %r9d leaq (%rdi,%r9,8), %r9 xorl %r10d, %r10d .LBB0_4: # Parent Loop BB0_2 Depth=1 # => This Inner Loop Header: Depth=2 movsd %xmm0, (%r9,%r10,8) addsd %xmm1, %xmm0 incq %r10 cmpq %r10, %rcx jne .LBB0_4 .LBB0_5: # %._crit_edge # in Loop: Header=BB0_2 Depth=1 incq %r8 addl %edx, %esi cmpq %rax, %r8 jne .LBB0_2 .LBB0_6: # %._crit_edge18 retq .Lfunc_end0: .size _Z10fillMatrixPdii, .Lfunc_end0-_Z10fillMatrixPdii .cfi_endproc # -- End function .globl _Z5printPdii # -- Begin function _Z5printPdii .type _Z5printPdii,@function _Z5printPdii: # @_Z5printPdii .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rdi, 8(%rsp) # 8-byte Spill testl %esi, %esi jle .LBB1_6 # %bb.1: # %.preheader.lr.ph movl %edx, %ebx movl %esi, %eax movq %rax, 16(%rsp) # 8-byte Spill movl %edx, %r12d xorl %r13d, %r13d xorl %ebp, %ebp .LBB1_2: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB1_4 Depth 2 testl %ebx, %ebx jle .LBB1_5 # %bb.3: # %.lr.ph # in Loop: Header=BB1_2 Depth=1 movl %r13d, %eax movq 8(%rsp), %rcx # 8-byte Reload leaq (%rcx,%rax,8), %r14 xorl %r15d, %r15d .LBB1_4: # Parent Loop BB1_2 Depth=1 # => This Inner Loop Header: Depth=2 movsd (%r14,%r15,8), %xmm0 # xmm0 = mem[0],zero movl $.L.str, %edi movb $1, %al callq printf incq %r15 cmpq %r15, %r12 jne .LBB1_4 .LBB1_5: # %._crit_edge # in Loop: Header=BB1_2 Depth=1 movl $10, %edi callq putchar@PLT incq %rbp addl %ebx, %r13d cmpq 16(%rsp), %rbp # 8-byte Folded Reload jne .LBB1_2 .LBB1_6: # %._crit_edge13 addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z5printPdii, .Lfunc_end1-_Z5printPdii .cfi_endproc # -- End function .globl _Z22__device_stub__productPdS_S_ # -- Begin function _Z22__device_stub__productPdS_S_ .type _Z22__device_stub__productPdS_S_,@function _Z22__device_stub__productPdS_S_: # @_Z22__device_stub__productPdS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7productPdS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z22__device_stub__productPdS_S_, .Lfunc_end2-_Z22__device_stub__productPdS_S_ .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI3_0: .quad 0x412e848000000000 # double 1.0E+6 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: # %.preheader.i pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $40, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $32, %edi callq malloc movq %rax, %r12 movl $32, %edi callq malloc movq %rax, %r14 movl $32, %edi callq malloc movq %rax, %rbx xorl %eax, %eax movq %rax, (%r12) movabsq $4607182418800017408, %rcx # imm = 0x3FF0000000000000 movq %rcx, 8(%r12) movabsq $4611686018427387904, %rdx # imm = 0x4000000000000000 movq %rdx, 16(%r12) movabsq $4613937818241073152, %rsi # imm = 0x4008000000000000 movq %rsi, 24(%r12) movq %rax, (%r14) movq %rcx, 8(%r14) movq %rdx, 16(%r14) movq %rsi, 24(%r14) callq clock movq %rax, 16(%rsp) # 8-byte Spill movl $32, %edi callq malloc leaq 32(%rsp), %rbp movq %rax, (%rbp) movl $32, %edi callq malloc leaq 24(%rsp), %r13 movq %rax, (%r13) movl $32, %edi callq malloc leaq 8(%rsp), %r15 movq %rax, (%r15) movl $32, %esi movq %rbp, %rdi callq hipMalloc movl $32, %esi movq %r13, %rdi callq hipMalloc movl $32, %esi movq %r15, %rdi callq hipMalloc movq (%rbp), %rdi movl $32, %edx movq %r12, %rsi movl $1, %ecx callq hipMemcpy movq (%r13), %rdi movl $32, %edx movq %r14, %rsi movl $1, %ecx callq hipMemcpy movabsq $4294967297, %rdi # imm = 0x100000001 movabsq $68719476752, %rdx # imm = 0x1000000010 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB3_2 # %bb.1: movq 32(%rsp), %rdi movq 24(%rsp), %rsi movq 8(%rsp), %rdx callq _Z22__device_stub__productPdS_S_ .LBB3_2: movq 8(%rsp), %rsi movl $32, %edx movq %rbx, %rdi movl $2, %ecx callq hipMemcpy movq %r12, %rdi movl $2, %esi movl $2, %edx callq _Z5printPdii movl $10, %edi callq putchar@PLT movq %r14, %rdi movl $2, %esi movl $2, %edx callq _Z5printPdii movl $10, %edi callq putchar@PLT movq %rbx, %rdi movl $2, %esi movl $2, %edx callq _Z5printPdii callq clock subq 16(%rsp), %rax # 8-byte Folded Reload cvtsi2sd %rax, %xmm0 divsd .LCPI3_0(%rip), %xmm0 movl $.L.str.2, %edi movb $1, %al callq printf xorl %eax, %eax addq $40, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size main, .Lfunc_end3-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB4_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB4_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7productPdS_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end4: .size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB5_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB5_2: retq .Lfunc_end5: .size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%.4lf " .size .L.str, 7 .type _Z7productPdS_S_,@object # @_Z7productPdS_S_ .section .rodata,"a",@progbits .globl _Z7productPdS_S_ .p2align 3, 0x0 _Z7productPdS_S_: .quad _Z22__device_stub__productPdS_S_ .size _Z7productPdS_S_, 8 .type .L.str.2,@object # @.str.2 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.2: .asciz "%lf\n" .size .L.str.2, 5 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z7productPdS_S_" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__productPdS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7productPdS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7productPdS_S_ ; -- Begin function _Z7productPdS_S_ .globl _Z7productPdS_S_ .p2align 8 .type _Z7productPdS_S_,@function _Z7productPdS_S_: ; @_Z7productPdS_S_ ; %bb.0: s_load_b32 s2, s[0:1], 0x24 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v2, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, s15, s3, v[1:2] v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v1, v3, v0 v_cmpx_gt_i32_e32 2, v1 s_cbranch_execz .LBB0_4 ; %bb.1: ; %.preheader s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 v_mov_b32_e32 v1, 0 v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 1, v3 s_mov_b32 s3, 0 s_mov_b32 s2, -1 .LBB0_2: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_or_b32_e32 v4, s3, v3 v_lshl_add_u32 v6, s3, 1, v0 s_mov_b32 s3, 1 v_ashrrev_i32_e32 v5, 31, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v7, 31, v6 v_lshlrev_b64 v[4:5], 3, v[4:5] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[6:7], 3, v[6:7] s_waitcnt lgkmcnt(0) v_add_co_u32 v4, vcc_lo, s4, v4 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo v_add_co_u32 v6, vcc_lo, s6, v6 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo global_load_b64 v[4:5], v[4:5], off global_load_b64 v[6:7], v[6:7], off s_waitcnt vmcnt(0) v_fma_f64 v[1:2], v[4:5], v[6:7], v[1:2] v_cndmask_b32_e64 v4, 0, 1, s2 s_mov_b32 s2, 0 s_delay_alu instid0(VALU_DEP_1) v_cmp_ne_u32_e32 vcc_lo, 1, v4 s_cbranch_vccz .LBB0_2 ; %bb.3: v_add_nc_u32_e32 v3, v3, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[3:4], 3, v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s0, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo global_store_b64 v[3:4], v[1:2], off .LBB0_4: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7productPdS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 8 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7productPdS_S_, .Lfunc_end0-_Z7productPdS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 316 ; NumSgprs: 18 ; NumVgprs: 8 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 8 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7productPdS_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z7productPdS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 8 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
8b1e676150c31675f7810e558e044cd1065141fb
#include<stdio.h> #include<cuda_runtime.h> #include <stdlib.h> #define length 10 #define length_thread 256 #define test(a){\ for(int i =0;i<length;i++){\ printf("a[%d] = %d \n",i,a[i] );\ }\ } #define pr_array(a,start,end){\ for(int i=start;i<=end;i++){\ printf("a[%d] = %d\n",i,a[i]);\ }\ } //return b_end where the vuela a will be put in the new array //if a equel a vuale which is in the b array,a will in front of the vuale; #define insert0(a,b,b_start,b_end){\ while((b_end-b_start)>1){\ int point = (b_start+b_end)/2;\ if(a<=b[point])b_end = point;\ else b_start = point;\ }\ b_end += (a>b[b_end])-(a<=b[b_start]);\ }\ //if a equel a vuale which is in the b array,a will in back of the vuale; #define insert1(a,b,b_start,b_end){\ while((b_end-b_start)>1){\ int point = (b_start+b_end)/2;\ if(a<b[point])b_end = point;\ else b_start = point;\ }\ b_end += (a>=b[b_end])-(a<b[b_start]);\ }\ int cmp(const void *a,const void *b) { return *(int *)a-*(int *)b; } __global__ void pr(int *a){ int tid = threadIdx.x; __shared__ int a_s[length]; a_s[tid] = a[tid]; a[tid] = a_s[tid]*2; } __global__ void merger_thread(int *a,int len){ __shared__ int a_s[length_thread]; int tid = threadIdx.x + blockIdx.x * blockDim.x; int r1,r2; if(tid < len){ a_s[threadIdx.x] = a[tid]; } r1 = blockDim.x/2; int flag = (threadIdx.x>=r1); tid = threadIdx.x%r1; if((gridDim.x-1) == blockIdx.x)len %= blockDim.x; else len = blockDim.x; __syncthreads(); if(threadIdx.x<(len/2)){ r1 = threadIdx.x*2; if(a_s[r1]>a_s[r1+1]){ r2 = a_s[r1]; a_s[r1] = a_s[r1+1]; a_s[r1+1] = r2; } } int loop = 1; int x , start , end; x = len; x = (x/2) + (x%2); while(x>1){ x = (x/2) + (x%2); r1 = tid>>loop; r1 *= 2; start = r1+1-(int)flag; r1 += flag; end = 1<<loop; r1 *= end; start *= end; r2 = tid % end; r1 += r2; end += (start-1); __syncthreads(); if(end > len)end = len; if(r1 < len){ r1 = a_s[r1]; if(flag){ insert1(r1,a_s,start,end); } else{ insert0(r1,a_s,start,end); } end %= (1<<loop); r2 +=end; a_s[r2] = r1; } loop++; __syncthreads(); } if(threadIdx.x < len){ a[threadIdx.x + blockIdx.x * blockDim.x] = a_s[threadIdx.x]; } } int random(int range){ static int start = 444; int d = 233333; int k = 33352; start = ((start*k)+d)%range; return start; } int* gen(){ int *a_h; cudaHostAlloc( (void**)&a_h, length* sizeof(int),cudaHostAllocDefault ); for (int i = 0; i < length; ++i) { a_h[i] = random(52); printf("a_h[%d] = %d \n",i,a_h[i]); } return a_h; } void sort_int(int *a,int len){ int block_num = len/length_thread; if((len%length_thread)!=0)block_num++; merger_thread<<<block_num,length_thread>>>(a,len); } void msort(void *a,size_t num,size_t size,int ( * comparator ) ( const void *, const void * ) ){ } int main(){ /* int *a_h = gen(); test(a_h); qsort(a_h,length,sizeof(int),cmp); printf("sorted!!!!!!!\n"); test(a_h); a_h[43]=10; a_h[42]=10; pr_array(a_h,10,100); int start = 10,end = 50; insert0(10,a_h,start,end); printf("end %d\n",end ); start = 10; end=50; insert1(10,a_h,start,end); printf("end %d\n",end ); printf("used ipad pro maked\n"); */ int *a_h; cudaHostAlloc( (void**)&a_h, length* sizeof(int),cudaHostAllocDefault ); for (int i = 0;i<length;i++) { a_h[i] = length - i; printf("a_h[%d] = %d \n",i,a_h[i]); } int *a_d; cudaMalloc( (void**)&a_d, length*sizeof(int) ); cudaMemcpy(a_d,a_h, length*sizeof(int),cudaMemcpyHostToDevice); sort_int(a_d,length); cudaMemcpy(a_h,a_d,length*sizeof(int),cudaMemcpyDeviceToHost); for (int i = 0;i<length;i++) { printf("a_h[%d] = %d \n",i,a_h[i]); } }
.file "tmpxft_00397bfc_00000000-6_sort.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2035: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2035: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z3cmpPKvS0_ .type _Z3cmpPKvS0_, @function _Z3cmpPKvS0_: .LFB2027: .cfi_startproc endbr64 movl (%rdi), %eax subl (%rsi), %eax ret .cfi_endproc .LFE2027: .size _Z3cmpPKvS0_, .-_Z3cmpPKvS0_ .globl _Z6randomi .type _Z6randomi, @function _Z6randomi: .LFB2028: .cfi_startproc endbr64 imull $33352, _ZZ6randomiE5start(%rip), %eax addl $233333, %eax cltd idivl %edi movl %edx, _ZZ6randomiE5start(%rip) movl %edx, %eax ret .cfi_endproc .LFE2028: .size _Z6randomi, .-_Z6randomi .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "a_h[%d] = %d \n" .text .globl _Z3genv .type _Z3genv, @function _Z3genv: .LFB2029: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 xorl %edx, %edx movl $40, %esi leaq .LC0(%rip), %rbp pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 xorl %ebx, %ebx subq $24, %rsp .cfi_def_cfa_offset 48 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax movq %rsp, %rdi call cudaHostAlloc@PLT .L5: movq (%rsp), %rax movl $52, %edi leaq (%rax,%rbx,4), %rsi call _Z6randomi movl %ebx, %edx movl $2, %edi incq %rbx movl %eax, (%rsi) movl %eax, %ecx movq %rbp, %rsi xorl %eax, %eax call __printf_chk@PLT cmpq $10, %rbx jne .L5 movq (%rsp), %rax movq 8(%rsp), %rdx subq %fs:40, %rdx je .L6 call __stack_chk_fail@PLT .L6: addq $24, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size _Z3genv, .-_Z3genv .globl _Z5msortPvmmPFiPKvS1_E .type _Z5msortPvmmPFiPKvS1_E, @function _Z5msortPvmmPFiPKvS1_E: .LFB2031: .cfi_startproc endbr64 ret .cfi_endproc .LFE2031: .size _Z5msortPvmmPFiPKvS1_E, .-_Z5msortPvmmPFiPKvS1_E .globl _Z21__device_stub__Z2prPiPi .type _Z21__device_stub__Z2prPiPi, @function _Z21__device_stub__Z2prPiPi: .LFB2057: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L11 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq _Z2prPi(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L11: movq 88(%rsp), %rax subq %fs:40, %rax je .L13 call __stack_chk_fail@PLT .L13: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2057: .size _Z21__device_stub__Z2prPiPi, .-_Z21__device_stub__Z2prPiPi .globl _Z2prPi .type _Z2prPi, @function _Z2prPi: .LFB2058: .cfi_startproc endbr64 jmp _Z21__device_stub__Z2prPiPi .cfi_endproc .LFE2058: .size _Z2prPi, .-_Z2prPi .globl _Z34__device_stub__Z13merger_threadPiiPii .type _Z34__device_stub__Z13merger_threadPiiPii, @function _Z34__device_stub__Z13merger_threadPiiPii: .LFB2059: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movl %esi, 4(%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) leaq 4(%rsp), %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L16 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z13merger_threadPii(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L16: movq 104(%rsp), %rax subq %fs:40, %rax je .L18 call __stack_chk_fail@PLT .L18: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2059: .size _Z34__device_stub__Z13merger_threadPiiPii, .-_Z34__device_stub__Z13merger_threadPiiPii .globl _Z13merger_threadPii .type _Z13merger_threadPii, @function _Z13merger_threadPii: .LFB2060: .cfi_startproc endbr64 jmp _Z34__device_stub__Z13merger_threadPiiPii .cfi_endproc .LFE2060: .size _Z13merger_threadPii, .-_Z13merger_threadPii .globl _Z8sort_intPii .type _Z8sort_intPii, @function _Z8sort_intPii: .LFB2030: .cfi_startproc endbr64 movl %esi, %eax movl $256, %ecx pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 movq %rdi, %rbp cltd pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 movl %esi, %ebx idivl %ecx subq $40, %rsp .cfi_def_cfa_offset 64 cmpb $1, %sil movl $16777217, %edx movl $1, %ecx sbbl $-1, %eax xorl %r9d, %r9d xorl %r8d, %r8d salq $8, %rdx movl %eax, 8(%rsp) movabsq $4294967297, %rax movq %rax, 12(%rsp) movq 8(%rsp), %rdi movl 16(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L21 addq $40, %rsp .cfi_remember_state .cfi_def_cfa_offset 24 movl %ebx, %esi movq %rbp, %rdi popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp _Z34__device_stub__Z13merger_threadPiiPii .L21: .cfi_restore_state addq $40, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2030: .size _Z8sort_intPii, .-_Z8sort_intPii .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2032: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 xorl %edx, %edx movl $40, %esi leaq .LC0(%rip), %rbp pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 xorl %ebx, %ebx subq $40, %rsp .cfi_def_cfa_offset 64 movq %fs:40, %rax movq %rax, 24(%rsp) xorl %eax, %eax leaq 8(%rsp), %rdi call cudaHostAlloc@PLT .L28: movq 8(%rsp), %rax movl $10, %ecx movl %ebx, %edx movq %rbp, %rsi subl %ebx, %ecx movl $2, %edi movl %ecx, (%rax,%rbx,4) xorl %eax, %eax incq %rbx call __printf_chk@PLT cmpq $10, %rbx jne .L28 leaq 16(%rsp), %rdi movl $40, %esi xorl %ebx, %ebx call cudaMalloc@PLT movq 8(%rsp), %rsi movq 16(%rsp), %rdi movl $1, %ecx movl $40, %edx call cudaMemcpy@PLT movq 16(%rsp), %rdi movl $10, %esi call _Z8sort_intPii movq 16(%rsp), %rsi movq 8(%rsp), %rdi movl $2, %ecx movl $40, %edx call cudaMemcpy@PLT .L29: movq 8(%rsp), %rax movl %ebx, %edx movq %rbp, %rsi movl $2, %edi movl (%rax,%rbx,4), %ecx xorl %eax, %eax incq %rbx call __printf_chk@PLT cmpq $10, %rbx jne .L29 movq 24(%rsp), %rax subq %fs:40, %rax je .L30 call __stack_chk_fail@PLT .L30: addq $40, %rsp .cfi_def_cfa_offset 24 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size main, .-main .section .rodata.str1.1 .LC1: .string "_Z13merger_threadPii" .LC2: .string "_Z2prPi" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2062: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC1(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z13merger_threadPii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC2(%rip), %rdx orl $-1, %r8d leaq _Z2prPi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2062: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .data .align 4 .type _ZZ6randomiE5start, @object .size _ZZ6randomiE5start, 4 _ZZ6randomiE5start: .long 444 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z13merger_threadPii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e240000002100 */ /*0040*/ IMAD R2, R3, c[0x0][0x0], R0 ; /* 0x0000000003027a24 */ /* 0x001fca00078e0200 */ /*0050*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x168], PT ; /* 0x00005a0002007a0c */ /* 0x000fda0003f06270 */ /*0060*/ @!P0 IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff058424 */ /* 0x000fc800078e00ff */ /*0070*/ @!P0 IMAD.WIDE R4, R2, R5, c[0x0][0x160] ; /* 0x0000580002048625 */ /* 0x000fca00078e0205 */ /*0080*/ @!P0 LDG.E R7, [R4.64] ; /* 0x0000000604078981 */ /* 0x000162000c1e1900 */ /*0090*/ ULDC UR4, c[0x0][0xc] ; /* 0x0000030000047ab9 */ /* 0x000fe20000000800 */ /*00a0*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff087624 */ /* 0x000fe200078e00ff */ /*00b0*/ UIADD3 UR4, UR4, -0x1, URZ ; /* 0xffffffff04047890 */ /* 0x000fcc000fffe03f */ /*00c0*/ ISETP.NE.AND P1, PT, R3, UR4, PT ; /* 0x0000000403007c0c */ /* 0x000fe2000bf25270 */ /*00d0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff037624 */ /* 0x000fd800078e00ff */ /*00e0*/ @P1 BRA 0x200 ; /* 0x0000011000001947 */ /* 0x000fea0003800000 */ /*00f0*/ I2F.U32.RP R3, c[0x0][0x0] ; /* 0x0000000000037b06 */ /* 0x001e220000209000 */ /*0100*/ ISETP.NE.U32.AND P2, PT, RZ, c[0x0][0x0], PT ; /* 0x00000000ff007a0c */ /* 0x000fce0003f45070 */ /*0110*/ MUFU.RCP R3, R3 ; /* 0x0000000300037308 */ /* 0x001e240000001000 */ /*0120*/ IADD3 R4, R3, 0xffffffe, RZ ; /* 0x0ffffffe03047810 */ /* 0x001fcc0007ffe0ff */ /*0130*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */ /* 0x000064000021f000 */ /*0140*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */ /* 0x001fe400078e00ff */ /*0150*/ IMAD.MOV R9, RZ, RZ, -R5 ; /* 0x000000ffff097224 */ /* 0x002fc800078e0a05 */ /*0160*/ IMAD R9, R9, c[0x0][0x0], RZ ; /* 0x0000000009097a24 */ /* 0x000fc800078e02ff */ /*0170*/ IMAD.HI.U32 R5, R5, R9, R4 ; /* 0x0000000905057227 */ /* 0x000fcc00078e0004 */ /*0180*/ IMAD.HI.U32 R5, R5, c[0x0][0x168], RZ ; /* 0x00005a0005057a27 */ /* 0x000fc800078e00ff */ /*0190*/ IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff057224 */ /* 0x000fc800078e0a05 */ /*01a0*/ IMAD R3, R5, R8, c[0x0][0x168] ; /* 0x00005a0005037624 */ /* 0x000fca00078e0208 */ /*01b0*/ ISETP.GE.U32.AND P1, PT, R3, c[0x0][0x0], PT ; /* 0x0000000003007a0c */ /* 0x000fda0003f26070 */ /*01c0*/ @P1 IADD3 R3, R3, -c[0x0][0x0], RZ ; /* 0x8000000003031a10 */ /* 0x000fc80007ffe0ff */ /*01d0*/ ISETP.GE.U32.AND P1, PT, R3, c[0x0][0x0], PT ; /* 0x0000000003007a0c */ /* 0x000fda0003f26070 */ /*01e0*/ @P1 IADD3 R3, R3, -c[0x0][0x0], RZ ; /* 0x8000000003031a10 */ /* 0x000fe40007ffe0ff */ /*01f0*/ @!P2 LOP3.LUT R3, RZ, c[0x0][0x0], RZ, 0x33, !PT ; /* 0x00000000ff03aa12 */ /* 0x000fc800078e33ff */ /*0200*/ LEA.HI R4, R3, R3, RZ, 0x1 ; /* 0x0000000303047211 */ /* 0x001fe200078f08ff */ /*0210*/ @!P0 STS [R0.X4], R7 ; /* 0x0000000700008388 */ /* 0x0201e20000004800 */ /*0220*/ BSSY B0, 0x2e0 ; /* 0x000000b000007945 */ /* 0x000fe40003800000 */ /*0230*/ SHF.R.S32.HI R5, RZ, 0x1, R4 ; /* 0x00000001ff057819 */ /* 0x000fe40000011404 */ /*0240*/ LOP3.LUT R4, R4, 0xfffffffe, RZ, 0xc0, !PT ; /* 0xfffffffe04047812 */ /* 0x000fe200078ec0ff */ /*0250*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0260*/ ISETP.GE.U32.AND P1, PT, R0, R5, PT ; /* 0x000000050000720c */ /* 0x000fda0003f26070 */ /*0270*/ @P1 BRA 0x2d0 ; /* 0x0000005000001947 */ /* 0x000fea0003800000 */ /*0280*/ LDS.64 R6, [R0.X8] ; /* 0x0000000000067984 */ /* 0x001e240000008a00 */ /*0290*/ ISETP.GT.AND P0, PT, R6, R7, PT ; /* 0x000000070600720c */ /* 0x001fe20003f04270 */ /*02a0*/ IMAD.MOV.U32 R10, RZ, RZ, R7 ; /* 0x000000ffff0a7224 */ /* 0x000fe400078e0007 */ /*02b0*/ IMAD.MOV.U32 R11, RZ, RZ, R6 ; /* 0x000000ffff0b7224 */ /* 0x000fd400078e0006 */ /*02c0*/ @P0 STS.64 [R0.X8], R10 ; /* 0x0000000a00000388 */ /* 0x0001e40000008a00 */ /*02d0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*02e0*/ IADD3 R6, R5, R3, -R4 ; /* 0x0000000305067210 */ /* 0x000fc80007ffe804 */ /*02f0*/ ISETP.GE.AND P0, PT, R6, 0x2, PT ; /* 0x000000020600780c */ /* 0x000fda0003f06270 */ /*0300*/ @!P0 BRA 0xbc0 ; /* 0x000008b000008947 */ /* 0x000fea0003800000 */ /*0310*/ SHF.R.U32.HI R11, RZ, 0x1, R8 ; /* 0x00000001ff0b7819 */ /* 0x000fe20000011608 */ /*0320*/ UMOV UR4, 0x1 ; /* 0x0000000100047882 */ /* 0x000fc60000000000 */ /*0330*/ I2F.U32.RP R7, R11 ; /* 0x0000000b00077306 */ /* 0x000e220000209000 */ /*0340*/ ISETP.NE.U32.AND P2, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fce0003f45070 */ /*0350*/ MUFU.RCP R7, R7 ; /* 0x0000000700077308 */ /* 0x001e240000001000 */ /*0360*/ IADD3 R5, R7, 0xffffffe, RZ ; /* 0x0ffffffe07057810 */ /* 0x001fcc0007ffe0ff */ /*0370*/ F2I.FTZ.U32.TRUNC.NTZ R5, R5 ; /* 0x0000000500057305 */ /* 0x000e24000021f000 */ /*0380*/ IMAD.MOV R4, RZ, RZ, -R5 ; /* 0x000000ffff047224 */ /* 0x001fc800078e0a05 */ /*0390*/ IMAD R9, R4, R11, RZ ; /* 0x0000000b04097224 */ /* 0x000fe400078e02ff */ /*03a0*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */ /* 0x000fc800078e00ff */ /*03b0*/ IMAD.HI.U32 R9, R5, R9, R4 ; /* 0x0000000905097227 */ /* 0x000fc800078e0004 */ /*03c0*/ IMAD.MOV.U32 R5, RZ, RZ, R6 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0006 */ /*03d0*/ IMAD.HI.U32 R9, R9, R0, RZ ; /* 0x0000000009097227 */ /* 0x000fc800078e00ff */ /*03e0*/ IMAD.MOV R9, RZ, RZ, -R9 ; /* 0x000000ffff097224 */ /* 0x000fc800078e0a09 */ /*03f0*/ IMAD R4, R11, R9, R0 ; /* 0x000000090b047224 */ /* 0x000fca00078e0200 */ /*0400*/ ISETP.GE.U32.AND P0, PT, R4, R11, PT ; /* 0x0000000b0400720c */ /* 0x000fda0003f06070 */ /*0410*/ @P0 IMAD.IADD R4, R4, 0x1, -R11 ; /* 0x0000000104040824 */ /* 0x000fe200078e0a0b */ /*0420*/ ISETP.GE.U32.AND P0, PT, R0, R11, PT ; /* 0x0000000b0000720c */ /* 0x000fc80003f06070 */ /*0430*/ ISETP.GE.U32.AND P1, PT, R4, R11, PT ; /* 0x0000000b0400720c */ /* 0x000fe40003f26070 */ /*0440*/ SEL R7, RZ, 0x1, !P0 ; /* 0x00000001ff077807 */ /* 0x000fd60004000000 */ /*0450*/ @P1 IMAD.IADD R4, R4, 0x1, -R11 ; /* 0x0000000104041824 */ /* 0x000fe200078e0a0b */ /*0460*/ ISETP.GE.U32.AND P1, PT, R0, R11.reuse, PT ; /* 0x0000000b0000720c */ /* 0x080fe40003f26070 */ /*0470*/ @!P2 LOP3.LUT R4, RZ, R11, RZ, 0x33, !PT ; /* 0x0000000bff04a212 */ /* 0x000fe400078e33ff */ /*0480*/ SEL R6, RZ, 0x1, P1 ; /* 0x00000001ff067807 */ /* 0x000fe40000800000 */ /*0490*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */ /* 0x000fe200078e00ff */ /*04a0*/ IABS R14, R4 ; /* 0x00000004000e7213 */ /* 0x000fe20000000000 */ /*04b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*04c0*/ ISETP.GE.AND P3, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe40003f66270 */ /*04d0*/ SHF.L.U32 R8, R8, UR4, RZ ; /* 0x0000000408087c19 */ /* 0x000fc600080006ff */ /*04e0*/ BSSY B1, 0xb80 ; /* 0x0000069000017945 */ /* 0x000fe20003800000 */ /*04f0*/ IABS R12, R8.reuse ; /* 0x00000008000c7213 */ /* 0x080fe40000000000 */ /*0500*/ IABS R15, R8 ; /* 0x00000008000f7213 */ /* 0x000fe40000000000 */ /*0510*/ I2F.RP R9, R12 ; /* 0x0000000c00097306 */ /* 0x001e300000209400 */ /*0520*/ MUFU.RCP R9, R9 ; /* 0x0000000900097308 */ /* 0x001e240000001000 */ /*0530*/ IADD3 R10, R9, 0xffffffe, RZ ; /* 0x0ffffffe090a7810 */ /* 0x001fe20007ffe0ff */ /*0540*/ IMAD.MOV R9, RZ, RZ, -R15 ; /* 0x000000ffff097224 */ /* 0x000fca00078e0a0f */ /*0550*/ F2I.FTZ.U32.TRUNC.NTZ R11, R10 ; /* 0x0000000a000b7305 */ /* 0x000064000021f000 */ /*0560*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x001fe400078e00ff */ /*0570*/ IMAD.MOV R13, RZ, RZ, -R11 ; /* 0x000000ffff0d7224 */ /* 0x002fc800078e0a0b */ /*0580*/ IMAD R13, R13, R12, RZ ; /* 0x0000000c0d0d7224 */ /* 0x000fc800078e02ff */ /*0590*/ IMAD.HI.U32 R11, R11, R13, R10 ; /* 0x0000000d0b0b7227 */ /* 0x000fcc00078e000a */ /*05a0*/ IMAD.HI.U32 R11, R11, R14, RZ ; /* 0x0000000e0b0b7227 */ /* 0x000fc800078e00ff */ /*05b0*/ IMAD R9, R11, R9, R14 ; /* 0x000000090b097224 */ /* 0x000fe200078e020e */ /*05c0*/ SHF.R.U32.HI R11, RZ, UR4, R4 ; /* 0x00000004ff0b7c19 */ /* 0x000fc80008011604 */ /*05d0*/ ISETP.GT.U32.AND P1, PT, R12, R9, PT ; /* 0x000000090c00720c */ /* 0x000fe20003f24070 */ /*05e0*/ IMAD R10, R11.reuse, 0x2, R7 ; /* 0x000000020b0a7824 */ /* 0x040fe400078e0207 */ /*05f0*/ IMAD R11, R11, 0x2, R6 ; /* 0x000000020b0b7824 */ /* 0x000fc600078e0206 */ /*0600*/ SHF.L.U32 R10, R10, UR4, RZ ; /* 0x000000040a0a7c19 */ /* 0x000fce00080006ff */ /*0610*/ @!P1 IMAD.IADD R9, R9, 0x1, -R12 ; /* 0x0000000109099824 */ /* 0x000fe200078e0a0c */ /*0620*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fc80003f25270 */ /*0630*/ ISETP.GT.U32.AND P2, PT, R12, R9, PT ; /* 0x000000090c00720c */ /* 0x000fda0003f44070 */ /*0640*/ @!P2 IMAD.IADD R9, R9, 0x1, -R12 ; /* 0x000000010909a824 */ /* 0x000fc800078e0a0c */ /*0650*/ @!P3 IMAD.MOV R9, RZ, RZ, -R9 ; /* 0x000000ffff09b224 */ /* 0x000fe200078e0a09 */ /*0660*/ @!P1 LOP3.LUT R9, RZ, R8, RZ, 0x33, !PT ; /* 0x00000008ff099212 */ /* 0x000fca00078e33ff */ /*0670*/ IMAD.IADD R14, R10, 0x1, R9 ; /* 0x000000010a0e7824 */ /* 0x000fe200078e0209 */ /*0680*/ LOP3.LUT R10, R5, 0x1, RZ, 0xc0, !PT ; /* 0x00000001050a7812 */ /* 0x000fc800078ec0ff */ /*0690*/ ISETP.GE.AND P1, PT, R14, R3, PT ; /* 0x000000030e00720c */ /* 0x000fe40003f26270 */ /*06a0*/ LEA.HI R5, R5, R10, RZ, 0x1f ; /* 0x0000000a05057211 */ /* 0x000fd600078ff8ff */ /*06b0*/ @P1 BRA 0xb70 ; /* 0x000004b000001947 */ /* 0x000fea0003800000 */ /*06c0*/ LDS R10, [R14.X4] ; /* 0x000000000e0a7984 */ /* 0x0000620000004800 */ /*06d0*/ SHF.L.U32 R11, R11, UR4, RZ ; /* 0x000000040b0b7c19 */ /* 0x000fe200080006ff */ /*06e0*/ BSSY B0, 0x990 ; /* 0x000002a000007945 */ /* 0x000fe60003800000 */ /*06f0*/ IADD3 R12, R8, -0x1, R11 ; /* 0xffffffff080c7810 */ /* 0x000fc80007ffe00b */ /*0700*/ IMNMX R12, R12, R3, PT ; /* 0x000000030c0c7217 */ /* 0x000fca0003800200 */ /*0710*/ IMAD.IADD R13, R12, 0x1, -R11 ; /* 0x000000010c0d7824 */ /* 0x000fe200078e0a0b */ /*0720*/ @P0 BRA 0x860 ; /* 0x0000013000000947 */ /* 0x000fea0003800000 */ /*0730*/ ISETP.GE.AND P1, PT, R13, 0x2, PT ; /* 0x000000020d00780c */ /* 0x001fe20003f26270 */ /*0740*/ BSSY B2, 0x810 ; /* 0x000000c000027945 */ /* 0x000fd80003800000 */ /*0750*/ @!P1 BRA 0x800 ; /* 0x000000a000009947 */ /* 0x000fea0003800000 */ /*0760*/ IMAD.IADD R13, R12, 0x1, R11 ; /* 0x000000010c0d7824 */ /* 0x000fca00078e020b */ /*0770*/ LEA.HI R13, R13, R13, RZ, 0x1 ; /* 0x0000000d0d0d7211 */ /* 0x000fc800078f08ff */ /*0780*/ SHF.R.S32.HI R13, RZ, 0x1, R13 ; /* 0x00000001ff0d7819 */ /* 0x000fca000001140d */ /*0790*/ LDS R15, [R13.X4] ; /* 0x000000000d0f7984 */ /* 0x000e240000004800 */ /*07a0*/ ISETP.GT.AND P1, PT, R10, R15, PT ; /* 0x0000000f0a00720c */ /* 0x003fc80003f24270 */ /*07b0*/ SEL R11, R11, R13, !P1 ; /* 0x0000000d0b0b7207 */ /* 0x000fe40004800000 */ /*07c0*/ SEL R12, R13, R12, !P1 ; /* 0x0000000c0d0c7207 */ /* 0x000fca0004800000 */ /*07d0*/ IMAD.IADD R14, R12, 0x1, -R11 ; /* 0x000000010c0e7824 */ /* 0x000fca00078e0a0b */ /*07e0*/ ISETP.GT.AND P1, PT, R14, 0x1, PT ; /* 0x000000010e00780c */ /* 0x000fda0003f24270 */ /*07f0*/ @P1 BRA 0x760 ; /* 0xffffff6000001947 */ /* 0x000fea000383ffff */ /*0800*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0810*/ LDS R11, [R11.X4] ; /* 0x000000000b0b7984 */ /* 0x000e280000004800 */ /*0820*/ LDS R13, [R12.X4] ; /* 0x000000000c0d7984 */ /* 0x000ea20000004800 */ /*0830*/ ISETP.LE.AND P2, PT, R10.reuse, R11, PT ; /* 0x0000000b0a00720c */ /* 0x043fe40003f43270 */ /*0840*/ ISETP.GT.AND P1, PT, R10, R13, PT ; /* 0x0000000d0a00720c */ /* 0x004fe20003f24270 */ /*0850*/ BRA 0x980 ; /* 0x0000012000007947 */ /* 0x000fee0003800000 */ /*0860*/ ISETP.GE.AND P1, PT, R13, 0x2, PT ; /* 0x000000020d00780c */ /* 0x001fe20003f26270 */ /*0870*/ BSSY B2, 0x940 ; /* 0x000000c000027945 */ /* 0x000fd80003800000 */ /*0880*/ @!P1 BRA 0x930 ; /* 0x000000a000009947 */ /* 0x000fea0003800000 */ /*0890*/ IMAD.IADD R13, R12, 0x1, R11 ; /* 0x000000010c0d7824 */ /* 0x000fca00078e020b */ /*08a0*/ LEA.HI R13, R13, R13, RZ, 0x1 ; /* 0x0000000d0d0d7211 */ /* 0x000fc800078f08ff */ /*08b0*/ SHF.R.S32.HI R14, RZ, 0x1, R13 ; /* 0x00000001ff0e7819 */ /* 0x000fca000001140d */ /*08c0*/ LDS R13, [R14.X4] ; /* 0x000000000e0d7984 */ /* 0x000e240000004800 */ /*08d0*/ ISETP.GE.AND P1, PT, R10, R13, PT ; /* 0x0000000d0a00720c */ /* 0x003fc80003f26270 */ /*08e0*/ SEL R11, R11, R14, !P1 ; /* 0x0000000e0b0b7207 */ /* 0x000fe40004800000 */ /*08f0*/ SEL R12, R14, R12, !P1 ; /* 0x0000000c0e0c7207 */ /* 0x000fca0004800000 */ /*0900*/ IMAD.IADD R13, R12, 0x1, -R11 ; /* 0x000000010c0d7824 */ /* 0x000fca00078e0a0b */ /*0910*/ ISETP.GT.AND P1, PT, R13, 0x1, PT ; /* 0x000000010d00780c */ /* 0x000fda0003f24270 */ /*0920*/ @P1 BRA 0x890 ; /* 0xffffff6000001947 */ /* 0x000fea000383ffff */ /*0930*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0940*/ LDS R11, [R11.X4] ; /* 0x000000000b0b7984 */ /* 0x000e280000004800 */ /*0950*/ LDS R13, [R12.X4] ; /* 0x000000000c0d7984 */ /* 0x000ea20000004800 */ /*0960*/ ISETP.LT.AND P2, PT, R10.reuse, R11, PT ; /* 0x0000000b0a00720c */ /* 0x043fe40003f41270 */ /*0970*/ ISETP.GE.AND P1, PT, R10, R13, PT ; /* 0x0000000d0a00720c */ /* 0x004fd00003f26270 */ /*0980*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0990*/ IABS R16, R8.reuse ; /* 0x0000000800107213 */ /* 0x080fe40000000000 */ /*09a0*/ IADD3 R11, R12, -0x1, RZ ; /* 0xffffffff0c0b7810 */ /* 0x000fe20007ffe0ff */ /*09b0*/ @!P2 IMAD.MOV R11, RZ, RZ, R12 ; /* 0x000000ffff0ba224 */ /* 0x000fe200078e020c */ /*09c0*/ I2F.RP R15, R16 ; /* 0x00000010000f7306 */ /* 0x000e220000209400 */ /*09d0*/ IABS R12, R8 ; /* 0x00000008000c7213 */ /* 0x000fc40000000000 */ /*09e0*/ ISETP.NE.AND P3, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f65270 */ /*09f0*/ IADD3 R14, R11, 0x1, RZ ; /* 0x000000010b0e7810 */ /* 0x000fe20007ffe0ff */ /*0a00*/ @!P1 IMAD.MOV R14, RZ, RZ, R11 ; /* 0x000000ffff0e9224 */ /* 0x000fca00078e020b */ /*0a10*/ ISETP.GE.AND P2, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fe20003f46270 */ /*0a20*/ MUFU.RCP R15, R15 ; /* 0x0000000f000f7308 */ /* 0x001e240000001000 */ /*0a30*/ IADD3 R13, R15, 0xffffffe, RZ ; /* 0x0ffffffe0f0d7810 */ /* 0x001fe40007ffe0ff */ /*0a40*/ IABS R15, R14 ; /* 0x0000000e000f7213 */ /* 0x000fc80000000000 */ /*0a50*/ F2I.FTZ.U32.TRUNC.NTZ R13, R13 ; /* 0x0000000d000d7305 */ /* 0x000e24000021f000 */ /*0a60*/ IMAD.MOV R17, RZ, RZ, -R13 ; /* 0x000000ffff117224 */ /* 0x001fc800078e0a0d */ /*0a70*/ IMAD R11, R17, R16, RZ ; /* 0x00000010110b7224 */ /* 0x000fe400078e02ff */ /*0a80*/ IMAD.MOV R17, RZ, RZ, -R12 ; /* 0x000000ffff117224 */ /* 0x000fe400078e0a0c */ /*0a90*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x000fc800078e00ff */ /*0aa0*/ IMAD.HI.U32 R11, R13, R11, R12 ; /* 0x0000000b0d0b7227 */ /* 0x000fc800078e000c */ /*0ab0*/ IMAD.MOV.U32 R12, RZ, RZ, R15 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e000f */ /*0ac0*/ IMAD.MOV.U32 R13, RZ, RZ, R17 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e0011 */ /*0ad0*/ IMAD.HI.U32 R11, R11, R12, RZ ; /* 0x0000000c0b0b7227 */ /* 0x000fc800078e00ff */ /*0ae0*/ IMAD R11, R11, R13, R12 ; /* 0x0000000d0b0b7224 */ /* 0x000fca00078e020c */ /*0af0*/ ISETP.GT.U32.AND P1, PT, R16, R11, PT ; /* 0x0000000b1000720c */ /* 0x000fda0003f24070 */ /*0b00*/ @!P1 IMAD.IADD R11, R11, 0x1, -R16 ; /* 0x000000010b0b9824 */ /* 0x000fca00078e0a10 */ /*0b10*/ ISETP.GT.U32.AND P1, PT, R16, R11, PT ; /* 0x0000000b1000720c */ /* 0x000fda0003f24070 */ /*0b20*/ @!P1 IMAD.IADD R11, R11, 0x1, -R16 ; /* 0x000000010b0b9824 */ /* 0x000fc800078e0a10 */ /*0b30*/ @!P2 IMAD.MOV R11, RZ, RZ, -R11 ; /* 0x000000ffff0ba224 */ /* 0x000fe200078e0a0b */ /*0b40*/ @!P3 LOP3.LUT R11, RZ, R8, RZ, 0x33, !PT ; /* 0x00000008ff0bb212 */ /* 0x000fca00078e33ff */ /*0b50*/ IMAD.IADD R9, R9, 0x1, R11 ; /* 0x0000000109097824 */ /* 0x000fca00078e020b */ /*0b60*/ STS [R9.X4], R10 ; /* 0x0000000a09007388 */ /* 0x0001e40000004800 */ /*0b70*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0b80*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0b90*/ ISETP.GT.U32.AND P1, PT, R5, 0x1, PT ; /* 0x000000010500780c */ /* 0x000fe20003f24070 */ /*0ba0*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fd8000fffe03f */ /*0bb0*/ @P1 BRA 0x490 ; /* 0xfffff8d000001947 */ /* 0x000fea000383ffff */ /*0bc0*/ ISETP.GE.U32.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x000fda0003f06070 */ /*0bd0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0be0*/ LDS R5, [R0.X4] ; /* 0x0000000000057984 */ /* 0x000e620000004800 */ /*0bf0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc800078e00ff */ /*0c00*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fca00078e0003 */ /*0c10*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x002fe2000c101906 */ /*0c20*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0c30*/ BRA 0xc30; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0c40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ca0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ce0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z2prPi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */ /* 0x000e220000002100 */ /*0020*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0040*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x001fca00078e0203 */ /*0050*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea4000c1e1900 */ /*0060*/ SHF.L.U32 R5, R0, 0x1, RZ ; /* 0x0000000100057819 */ /* 0x004fca00000006ff */ /*0070*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*0080*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0090*/ BRA 0x90; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include<stdio.h> #include<hip/hip_runtime.h> #include <stdlib.h> #define length 10 #define length_thread 256 #define test(a){\ for(int i =0;i<length;i++){\ printf("a[%d] = %d \n",i,a[i] );\ }\ } #define pr_array(a,start,end){\ for(int i=start;i<=end;i++){\ printf("a[%d] = %d\n",i,a[i]);\ }\ } //return b_end where the vuela a will be put in the new array //if a equel a vuale which is in the b array,a will in front of the vuale; #define insert0(a,b,b_start,b_end){\ while((b_end-b_start)>1){\ int point = (b_start+b_end)/2;\ if(a<=b[point])b_end = point;\ else b_start = point;\ }\ b_end += (a>b[b_end])-(a<=b[b_start]);\ }\ //if a equel a vuale which is in the b array,a will in back of the vuale; #define insert1(a,b,b_start,b_end){\ while((b_end-b_start)>1){\ int point = (b_start+b_end)/2;\ if(a<b[point])b_end = point;\ else b_start = point;\ }\ b_end += (a>=b[b_end])-(a<b[b_start]);\ }\ int cmp(const void *a,const void *b) { return *(int *)a-*(int *)b; } __global__ void pr(int *a){ int tid = threadIdx.x; __shared__ int a_s[length]; a_s[tid] = a[tid]; a[tid] = a_s[tid]*2; } __global__ void merger_thread(int *a,int len){ __shared__ int a_s[length_thread]; int tid = threadIdx.x + blockIdx.x * blockDim.x; int r1,r2; if(tid < len){ a_s[threadIdx.x] = a[tid]; } r1 = blockDim.x/2; int flag = (threadIdx.x>=r1); tid = threadIdx.x%r1; if((gridDim.x-1) == blockIdx.x)len %= blockDim.x; else len = blockDim.x; __syncthreads(); if(threadIdx.x<(len/2)){ r1 = threadIdx.x*2; if(a_s[r1]>a_s[r1+1]){ r2 = a_s[r1]; a_s[r1] = a_s[r1+1]; a_s[r1+1] = r2; } } int loop = 1; int x , start , end; x = len; x = (x/2) + (x%2); while(x>1){ x = (x/2) + (x%2); r1 = tid>>loop; r1 *= 2; start = r1+1-(int)flag; r1 += flag; end = 1<<loop; r1 *= end; start *= end; r2 = tid % end; r1 += r2; end += (start-1); __syncthreads(); if(end > len)end = len; if(r1 < len){ r1 = a_s[r1]; if(flag){ insert1(r1,a_s,start,end); } else{ insert0(r1,a_s,start,end); } end %= (1<<loop); r2 +=end; a_s[r2] = r1; } loop++; __syncthreads(); } if(threadIdx.x < len){ a[threadIdx.x + blockIdx.x * blockDim.x] = a_s[threadIdx.x]; } } int random(int range){ static int start = 444; int d = 233333; int k = 33352; start = ((start*k)+d)%range; return start; } int* gen(){ int *a_h; hipHostAlloc( (void**)&a_h, length* sizeof(int),hipHostMallocDefault ); for (int i = 0; i < length; ++i) { a_h[i] = random(52); printf("a_h[%d] = %d \n",i,a_h[i]); } return a_h; } void sort_int(int *a,int len){ int block_num = len/length_thread; if((len%length_thread)!=0)block_num++; merger_thread<<<block_num,length_thread>>>(a,len); } void msort(void *a,size_t num,size_t size,int ( * comparator ) ( const void *, const void * ) ){ } int main(){ /* int *a_h = gen(); test(a_h); qsort(a_h,length,sizeof(int),cmp); printf("sorted!!!!!!!\n"); test(a_h); a_h[43]=10; a_h[42]=10; pr_array(a_h,10,100); int start = 10,end = 50; insert0(10,a_h,start,end); printf("end %d\n",end ); start = 10; end=50; insert1(10,a_h,start,end); printf("end %d\n",end ); printf("used ipad pro maked\n"); */ int *a_h; hipHostAlloc( (void**)&a_h, length* sizeof(int),hipHostMallocDefault ); for (int i = 0;i<length;i++) { a_h[i] = length - i; printf("a_h[%d] = %d \n",i,a_h[i]); } int *a_d; hipMalloc( (void**)&a_d, length*sizeof(int) ); hipMemcpy(a_d,a_h, length*sizeof(int),hipMemcpyHostToDevice); sort_int(a_d,length); hipMemcpy(a_h,a_d,length*sizeof(int),hipMemcpyDeviceToHost); for (int i = 0;i<length;i++) { printf("a_h[%d] = %d \n",i,a_h[i]); } }
.text .file "sort.hip" .globl _Z3cmpPKvS0_ # -- Begin function _Z3cmpPKvS0_ .type _Z3cmpPKvS0_,@function _Z3cmpPKvS0_: # @_Z3cmpPKvS0_ .cfi_startproc # %bb.0: movl (%rdi), %eax subl (%rsi), %eax retq .Lfunc_end0: .size _Z3cmpPKvS0_, .Lfunc_end0-_Z3cmpPKvS0_ .cfi_endproc # -- End function .globl _Z17__device_stub__prPi # -- Begin function _Z17__device_stub__prPi .type _Z17__device_stub__prPi,@function _Z17__device_stub__prPi: # @_Z17__device_stub__prPi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z2prPi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z17__device_stub__prPi, .Lfunc_end1-_Z17__device_stub__prPi .cfi_endproc # -- End function .globl _Z28__device_stub__merger_threadPii # -- Begin function _Z28__device_stub__merger_threadPii .type _Z28__device_stub__merger_threadPii,@function _Z28__device_stub__merger_threadPii: # @_Z28__device_stub__merger_threadPii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 4(%rsp), %rcx movl %esi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z13merger_threadPii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z28__device_stub__merger_threadPii, .Lfunc_end2-_Z28__device_stub__merger_threadPii .cfi_endproc # -- End function .globl _Z6randomi # -- Begin function _Z6randomi .type _Z6randomi,@function _Z6randomi: # @_Z6randomi .cfi_startproc # %bb.0: imull $33352, _ZZ6randomiE5start(%rip), %eax # imm = 0x8248 addl $233333, %eax # imm = 0x38F75 cltd idivl %edi movl %edx, %eax movl %edx, _ZZ6randomiE5start(%rip) retq .Lfunc_end3: .size _Z6randomi, .Lfunc_end3-_Z6randomi .cfi_endproc # -- End function .globl _Z3genv # -- Begin function _Z3genv .type _Z3genv,@function _Z3genv: # @_Z3genv .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $16, %rsp .cfi_def_cfa_offset 32 .cfi_offset %rbx, -16 leaq 8(%rsp), %rdi movl $40, %esi xorl %edx, %edx callq hipHostAlloc xorl %ebx, %ebx .LBB4_1: # =>This Inner Loop Header: Depth=1 imull $33352, _ZZ6randomiE5start(%rip), %eax # imm = 0x8248 addl $233333, %eax # imm = 0x38F75 movslq %eax, %rdx imulq $1321528399, %rdx, %rax # imm = 0x4EC4EC4F movq %rax, %rcx shrq $63, %rcx sarq $36, %rax addl %ecx, %eax imull $52, %eax, %eax subl %eax, %edx movl %edx, _ZZ6randomiE5start(%rip) movq 8(%rsp), %rax movl %edx, (%rax,%rbx,4) movl $.L.str, %edi movl %ebx, %esi # kill: def $edx killed $edx killed $rdx xorl %eax, %eax callq printf incq %rbx cmpq $10, %rbx jne .LBB4_1 # %bb.2: movq 8(%rsp), %rax addq $16, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size _Z3genv, .Lfunc_end4-_Z3genv .cfi_endproc # -- End function .globl _Z8sort_intPii # -- Begin function _Z8sort_intPii .type _Z8sort_intPii,@function _Z8sort_intPii: # @_Z8sort_intPii .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movl %esi, %ebx leal 255(%rbx), %eax testl %esi, %esi cmovnsl %esi, %eax sarl $8, %eax cmpb $1, %bl sbbl $-1, %eax movq %rdi, %r14 btsq $32, %rax movabsq $4294967296, %rdx # imm = 0x100000000 orq $256, %rdx # imm = 0x100 movq %rax, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax je .LBB5_2 # %bb.1: addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .LBB5_2: .cfi_def_cfa_offset 32 movq %r14, %rdi movl %ebx, %esi addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp _Z28__device_stub__merger_threadPii # TAILCALL .Lfunc_end5: .size _Z8sort_intPii, .Lfunc_end5-_Z8sort_intPii .cfi_endproc # -- End function .globl _Z5msortPvmmPFiPKvS1_E # -- Begin function _Z5msortPvmmPFiPKvS1_E .type _Z5msortPvmmPFiPKvS1_E,@function _Z5msortPvmmPFiPKvS1_E: # @_Z5msortPvmmPFiPKvS1_E .cfi_startproc # %bb.0: retq .Lfunc_end6: .size _Z5msortPvmmPFiPKvS1_E, .Lfunc_end6-_Z5msortPvmmPFiPKvS1_E .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 subq $24, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 leaq 8(%rsp), %rdi movl $40, %esi xorl %edx, %edx callq hipHostAlloc movl $10, %ebx xorl %r14d, %r14d .LBB7_1: # =>This Inner Loop Header: Depth=1 movq 8(%rsp), %rax movl %ebx, (%rax,%r14,4) movl $.L.str, %edi movl %r14d, %esi movl %ebx, %edx xorl %eax, %eax callq printf incq %r14 decq %rbx jne .LBB7_1 # %bb.2: leaq 16(%rsp), %rbx movl $40, %esi movq %rbx, %rdi callq hipMalloc movq (%rbx), %rdi movq 8(%rsp), %rsi movl $40, %edx movl $1, %ecx callq hipMemcpy movq (%rbx), %rdi movl $10, %esi callq _Z8sort_intPii movq 8(%rsp), %rdi movq (%rbx), %rsi movl $40, %edx movl $2, %ecx callq hipMemcpy xorl %ebx, %ebx .LBB7_3: # =>This Inner Loop Header: Depth=1 movq 8(%rsp), %rax movl (%rax,%rbx,4), %edx movl $.L.str, %edi movl %ebx, %esi xorl %eax, %eax callq printf incq %rbx cmpq $10, %rbx jne .LBB7_3 # %bb.4: xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end7: .size main, .Lfunc_end7-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB8_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB8_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z2prPi, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z13merger_threadPii, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end8: .size __hip_module_ctor, .Lfunc_end8-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB9_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB9_2: retq .Lfunc_end9: .size __hip_module_dtor, .Lfunc_end9-__hip_module_dtor .cfi_endproc # -- End function .type _Z2prPi,@object # @_Z2prPi .section .rodata,"a",@progbits .globl _Z2prPi .p2align 3, 0x0 _Z2prPi: .quad _Z17__device_stub__prPi .size _Z2prPi, 8 .type _Z13merger_threadPii,@object # @_Z13merger_threadPii .globl _Z13merger_threadPii .p2align 3, 0x0 _Z13merger_threadPii: .quad _Z28__device_stub__merger_threadPii .size _Z13merger_threadPii, 8 .type _ZZ6randomiE5start,@object # @_ZZ6randomiE5start .data .p2align 2, 0x0 _ZZ6randomiE5start: .long 444 # 0x1bc .size _ZZ6randomiE5start, 4 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "a_h[%d] = %d \n" .size .L.str, 15 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z2prPi" .size .L__unnamed_1, 8 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z13merger_threadPii" .size .L__unnamed_2, 21 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z17__device_stub__prPi .addrsig_sym _Z28__device_stub__merger_threadPii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z2prPi .addrsig_sym _Z13merger_threadPii .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z2prPi ; -- Begin function _Z2prPi .globl _Z2prPi .p2align 8 .type _Z2prPi,@function _Z2prPi: ; @_Z2prPi ; %bb.0: s_load_b64 s[0:1], s[0:1], 0x0 v_lshlrev_b32_e32 v0, 2, v0 s_waitcnt lgkmcnt(0) global_load_b32 v1, v0, s[0:1] s_waitcnt vmcnt(0) v_lshlrev_b32_e32 v1, 1, v1 global_store_b32 v0, v1, s[0:1] s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z2prPi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 8 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 2 .amdhsa_next_free_sgpr 2 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z2prPi, .Lfunc_end0-_Z2prPi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 52 ; NumSgprs: 2 ; NumVgprs: 2 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 2 ; NumVGPRsForWavesPerEU: 2 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z13merger_threadPii ; -- Begin function _Z13merger_threadPii .globl _Z13merger_threadPii .p2align 8 .type _Z13merger_threadPii,@function _Z13merger_threadPii: ; @_Z13merger_threadPii ; %bb.0: s_clause 0x3 s_load_b32 s4, s[0:1], 0x1c s_load_b32 s5, s[0:1], 0x8 s_load_b64 s[2:3], s[0:1], 0x0 s_load_b32 s0, s[0:1], 0x10 v_lshlrev_b32_e32 v4, 2, v0 s_mov_b32 s1, exec_lo s_waitcnt lgkmcnt(0) s_and_b32 s4, s4, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1] v_cmpx_gt_i32_e64 s5, v1 s_cbranch_execz .LBB1_2 ; %bb.1: v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[1:2] v_add_co_u32 v2, vcc_lo, s2, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo global_load_b32 v2, v[2:3], off s_waitcnt vmcnt(0) ds_store_b32 v4, v2 .LBB1_2: s_or_b32 exec_lo, exec_lo, s1 s_add_i32 s1, s0, -1 s_lshr_b32 s0, s4, 1 s_cmp_lg_u32 s1, s15 s_cbranch_scc1 .LBB1_4 ; %bb.3: v_cvt_f32_u32_e32 v2, s4 s_sub_i32 s6, 0, s4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v2, v2 s_waitcnt_depctr 0xfff v_mul_f32_e32 v2, 0x4f7ffffe, v2 v_cvt_u32_f32_e32 v2, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_mul_i32 s6, s6, s1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_hi_u32 s6, s1, s6 s_add_i32 s1, s1, s6 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_hi_u32 s1, s5, s1 s_mul_i32 s1, s1, s4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_sub_i32 s1, s5, s1 s_sub_i32 s5, s1, s4 s_cmp_ge_u32 s1, s4 s_cselect_b32 s1, s5, s1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_sub_i32 s5, s1, s4 s_cmp_ge_u32 s1, s4 s_cselect_b32 s4, s5, s1 s_lshr_b32 s1, s4, 1 s_branch .LBB1_5 .LBB1_4: s_mov_b32 s1, s0 .LBB1_5: s_mov_b32 s5, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e64 s1, v0 s_cbranch_execz .LBB1_8 ; %bb.6: v_lshlrev_b32_e32 v5, 3, v0 ds_load_b64 v[2:3], v5 s_waitcnt lgkmcnt(0) v_cmp_gt_i32_e32 vcc_lo, v2, v3 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB1_8 ; %bb.7: v_dual_mov_b32 v6, v3 :: v_dual_mov_b32 v7, v2 ds_store_b64 v5, v[6:7] .LBB1_8: s_or_b32 exec_lo, exec_lo, s5 s_and_b32 s5, s4, 1 s_mov_b32 s6, 1 s_add_i32 s5, s1, s5 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lt_u32 s5, 2 s_cbranch_scc1 .LBB1_25 ; %bb.9: ; %.lr.ph108 v_cvt_f32_u32_e32 v2, s0 v_cvt_f32_u32_e32 v5, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v3, v2 s_waitcnt_depctr 0xfff v_mul_f32_e32 v3, v5, v3 v_trunc_f32_e32 v3, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f32 v5, -v3, v2, v5 v_cvt_u32_f32_e32 v3, v3 v_cmp_ge_f32_e64 vcc_lo, |v5|, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, 0, v3, vcc_lo v_cmp_le_u32_e32 vcc_lo, s0, v0 v_mul_lo_u32 v2, v2, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_sub_nc_u32_e32 v3, v0, v2 v_cndmask_b32_e64 v2, 0, 1, vcc_lo v_cmp_gt_u32_e32 vcc_lo, s0, v0 v_and_b32_e32 v3, 0x7fff, v3 v_cndmask_b32_e64 v5, 0, 1, vcc_lo .LBB1_10: ; =>This Loop Header: Depth=1 ; Child Loop BB1_14 Depth 2 ; Child Loop BB1_20 Depth 2 s_lshl_b32 s1, 1, s6 s_delay_alu instid0(VALU_DEP_2) v_lshrrev_b32_e32 v9, s6, v3 s_ashr_i32 s0, s1, 31 s_mov_b32 s8, exec_lo s_add_i32 s7, s1, s0 s_waitcnt lgkmcnt(0) s_xor_b32 s7, s7, s0 s_barrier v_cvt_f32_u32_e32 v6, s7 s_sub_i32 s0, 0, s7 buffer_gl0_inv v_rcp_iflag_f32_e32 v6, v6 s_waitcnt_depctr 0xfff v_mul_f32_e32 v6, 0x4f7ffffe, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cvt_u32_f32_e32 v6, v6 v_mul_lo_u32 v7, s0, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v7, v6, v7 v_add_nc_u32_e32 v6, v6, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v7, v3, v6 v_mul_lo_u32 v7, v7, s7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v7, v3, v7 v_subrev_nc_u32_e32 v8, s7, v7 v_cmp_le_u32_e64 s0, s7, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v7, v7, v8, s0 v_lshlrev_b32_e32 v8, 1, v9 v_subrev_nc_u32_e32 v9, s7, v7 v_cmp_le_u32_e64 s0, s7, v7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_or_b32_e32 v10, v8, v2 v_cndmask_b32_e64 v7, v7, v9, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshl_add_u32 v9, v10, s6, v7 v_cmpx_gt_i32_e64 s4, v9 s_cbranch_execz .LBB1_24 ; %bb.11: ; in Loop: Header=BB1_10 Depth=1 v_or_b32_e32 v8, v8, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b32_e32 v10, s6, v8 v_lshlrev_b32_e32 v8, 2, v9 v_add3_u32 v9, s1, -1, v10 ds_load_b32 v8, v8 v_min_i32_e32 v9, s4, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v11, v9, v10 v_cmp_lt_i32_e64 s0, 1, v11 ; implicit-def: $vgpr11 s_and_saveexec_b32 s1, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s9, exec_lo, s1 s_cbranch_execz .LBB1_17 ; %bb.12: ; %.preheader95 ; in Loop: Header=BB1_10 Depth=1 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB1_16 ; %bb.13: ; %.lr.ph.preheader ; in Loop: Header=BB1_10 Depth=1 s_mov_b32 s11, 0 .LBB1_14: ; %.lr.ph ; Parent Loop BB1_10 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e32 v11, v9, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshrrev_b32_e32 v12, 31, v11 v_add_nc_u32_e32 v11, v11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v11, 1, v11 v_lshlrev_b32_e32 v12, 2, v11 ds_load_b32 v12, v12 s_waitcnt lgkmcnt(0) v_cmp_gt_i32_e64 s1, v8, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v10, v10, v11, s1 v_cndmask_b32_e64 v9, v11, v9, s1 v_sub_nc_u32_e32 v11, v9, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_i32_e64 s1, 2, v11 s_or_b32 s11, s1, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB1_14 ; %bb.15: ; %Flow ; in Loop: Header=BB1_10 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB1_16: ; %Flow114 ; in Loop: Header=BB1_10 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 v_lshlrev_b32_e32 v11, 2, v9 v_lshlrev_b32_e32 v10, 2, v10 ds_load_b32 v11, v11 ds_load_b32 v10, v10 s_waitcnt lgkmcnt(1) v_cmp_gt_i32_e64 s1, v8, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_ci_u32_e64 v9, s1, 0, v9, s1 s_waitcnt lgkmcnt(0) v_cmp_le_i32_e64 s1, v8, v10 ; implicit-def: $vgpr10 v_subrev_co_ci_u32_e64 v11, s1, 0, v9, s1 ; implicit-def: $vgpr9 .LBB1_17: ; %Flow117 ; in Loop: Header=BB1_10 Depth=1 s_and_not1_saveexec_b32 s1, s9 s_cbranch_execz .LBB1_23 ; %bb.18: ; %.preheader ; in Loop: Header=BB1_10 Depth=1 s_and_saveexec_b32 s9, s0 s_cbranch_execz .LBB1_22 ; %bb.19: ; %.lr.ph101.preheader ; in Loop: Header=BB1_10 Depth=1 s_mov_b32 s10, 0 .LBB1_20: ; %.lr.ph101 ; Parent Loop BB1_10 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e32 v11, v9, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshrrev_b32_e32 v12, 31, v11 v_add_nc_u32_e32 v11, v11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v11, 1, v11 v_lshlrev_b32_e32 v12, 2, v11 ds_load_b32 v12, v12 s_waitcnt lgkmcnt(0) v_cmp_lt_i32_e64 s0, v8, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v10, v11, v10, s0 v_cndmask_b32_e64 v9, v9, v11, s0 v_sub_nc_u32_e32 v11, v9, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_i32_e64 s0, 2, v11 s_or_b32 s10, s0, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB1_20 ; %bb.21: ; %Flow115 ; in Loop: Header=BB1_10 Depth=1 s_or_b32 exec_lo, exec_lo, s10 .LBB1_22: ; %Flow116 ; in Loop: Header=BB1_10 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s9 v_lshlrev_b32_e32 v11, 2, v9 v_lshlrev_b32_e32 v10, 2, v10 ds_load_b32 v11, v11 ds_load_b32 v10, v10 s_waitcnt lgkmcnt(1) v_cmp_ge_i32_e64 s0, v8, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_ci_u32_e64 v9, s0, 0, v9, s0 s_waitcnt lgkmcnt(0) v_cmp_lt_i32_e64 s0, v8, v10 v_subrev_co_ci_u32_e64 v11, s0, 0, v9, s0 .LBB1_23: ; %Flow118 ; in Loop: Header=BB1_10 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v9, 31, v11 v_add_nc_u32_e32 v10, v11, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_xor_b32_e32 v10, v10, v9 v_mul_hi_u32 v6, v10, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v6, v6, s7 v_sub_nc_u32_e32 v6, v10, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_subrev_nc_u32_e32 v10, s7, v6 v_cmp_le_u32_e64 s0, s7, v6 v_cndmask_b32_e64 v6, v6, v10, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_subrev_nc_u32_e32 v10, s7, v6 v_cmp_le_u32_e64 s0, s7, v6 v_cndmask_b32_e64 v6, v6, v10, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_xor_b32_e32 v6, v6, v9 v_sub_nc_u32_e32 v6, v6, v9 s_delay_alu instid0(VALU_DEP_1) v_add_lshl_u32 v6, v6, v7, 2 s_waitcnt lgkmcnt(0) ds_store_b32 v6, v8 .LBB1_24: ; %Flow119 ; in Loop: Header=BB1_10 Depth=1 s_or_b32 exec_lo, exec_lo, s8 s_lshr_b32 s0, s5, 1 s_and_b32 s1, s5, 1 s_add_i32 s6, s6, 1 s_add_i32 s5, s0, s1 s_waitcnt lgkmcnt(0) s_cmp_gt_u32 s5, 1 s_barrier buffer_gl0_inv s_cbranch_scc1 .LBB1_10 .LBB1_25: ; %._crit_edge109 s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e64 s4, v0 s_cbranch_execz .LBB1_27 ; %bb.26: ds_load_b32 v3, v4 v_mov_b32_e32 v2, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] v_add_co_u32 v0, vcc_lo, s2, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo s_waitcnt lgkmcnt(0) global_store_b32 v[0:1], v3, off .LBB1_27: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z13merger_threadPii .amdhsa_group_segment_fixed_size 1024 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 13 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z13merger_threadPii, .Lfunc_end1-_Z13merger_threadPii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1408 ; NumSgprs: 18 ; NumVgprs: 13 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 1024 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 13 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 8 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z2prPi .private_segment_fixed_size: 0 .sgpr_count: 2 .sgpr_spill_count: 0 .symbol: _Z2prPi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 2 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 1024 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z13merger_threadPii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z13merger_threadPii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 13 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
d5d9881107497b01cebc008ccd2058a66ccc8e66
/* #include "cuda_runtime.h" #include "device_launch_parameters.h" #include <stdlib.h> #include <stdio.h> #include <time.h> __global__ void addMultipleBlocks(float *d_a,float *d_b,float *d_c,int m,int n) { int i=blockIdx.x*blockDim.x+ threadIdx.x; if(i<(m*n)) d_c[i]=d_a[i]+d_b[i]; } __global__ void addSingleBlock(float *d_a,float *d_b,float *d_c,int m,int n) { int i=threadIdx.x; d_c[i]=d_a[i]+d_b[i]; } int main() { float *a,*b,*c; float *d_a,*d_b,*d_c; int size,m,n,i,j; time_t start; printf("Enter the number of rows and columns : \n"); scanf("%d%d",&m,&n); a=(float *)malloc((size=sizeof(float)*m*n)); b=(float *)malloc(size); c=(float *)malloc(size); for(i=0;i<m;i++) for(j=0;j<n;j++) { a[i*n+j]=i*2+j+0.8; b[i*n+j]=i*2+j+0.1; } cudaMalloc((void **)&d_a,size); cudaMalloc((void**)&d_b,size); cudaMalloc((void **)&d_c,size); cudaMemcpy(d_a,a,size,cudaMemcpyHostToDevice); cudaMemcpy(d_b,b,size,cudaMemcpyHostToDevice); start=time(0); addSingleBlock<<<1,(m*n)>>>(d_a,d_b,d_c,m,n); cudaMemcpy(c,d_c,size,cudaMemcpyDeviceToHost); printf("Result using a single block : \n"); for(i=0;i<m;i++) { for(j=0;j<n;j++) printf("%f ",c[i*n+j]); printf("\n"); } printf("\n\n\n TIME TAKEN TO COMPUTER THE ADDITION WITH SINGLE BLOCK - %f",(difftime(time(0),start))); cudaFree(d_c); free(c); cudaMalloc((void **)&d_c,size); c=(float *)malloc(size); start=time(0); addMultipleBlocks<<< (int)((m*n)/9.0+1),9>>>(d_a,d_b,d_c,m,n); cudaMemcpy(c,d_c,size,cudaMemcpyDeviceToHost); printf("Result using a multiple blocks(3x3) : \n"); for(i=0;i<m;i++) { for(j=0;j<n;j++) printf("%f ",c[i*n+j]); printf("\n"); } printf("\n\n\n TIME TAKEN TO COMPUTER THE ADDITION WITH MULTIPLE BLOCKS - %f",(difftime(time(0),start))); free(a); free(b); free(c); cudaFree(d_a); cudaFree(d_b); cudaFree(d_c); return 0; } */
.file "tmpxft_0022250b_00000000-6_kernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2033: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2033: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> /* #include "cuda_runtime.h" #include "device_launch_parameters.h" #include <stdlib.h> #include <stdio.h> #include <time.h> __global__ void addMultipleBlocks(float *d_a,float *d_b,float *d_c,int m,int n) { int i=blockIdx.x*blockDim.x+ threadIdx.x; if(i<(m*n)) d_c[i]=d_a[i]+d_b[i]; } __global__ void addSingleBlock(float *d_a,float *d_b,float *d_c,int m,int n) { int i=threadIdx.x; d_c[i]=d_a[i]+d_b[i]; } int main() { float *a,*b,*c; float *d_a,*d_b,*d_c; int size,m,n,i,j; time_t start; printf("Enter the number of rows and columns : \n"); scanf("%d%d",&m,&n); a=(float *)malloc((size=sizeof(float)*m*n)); b=(float *)malloc(size); c=(float *)malloc(size); for(i=0;i<m;i++) for(j=0;j<n;j++) { a[i*n+j]=i*2+j+0.8; b[i*n+j]=i*2+j+0.1; } cudaMalloc((void **)&d_a,size); cudaMalloc((void**)&d_b,size); cudaMalloc((void **)&d_c,size); cudaMemcpy(d_a,a,size,cudaMemcpyHostToDevice); cudaMemcpy(d_b,b,size,cudaMemcpyHostToDevice); start=time(0); addSingleBlock<<<1,(m*n)>>>(d_a,d_b,d_c,m,n); cudaMemcpy(c,d_c,size,cudaMemcpyDeviceToHost); printf("Result using a single block : \n"); for(i=0;i<m;i++) { for(j=0;j<n;j++) printf("%f ",c[i*n+j]); printf("\n"); } printf("\n\n\n TIME TAKEN TO COMPUTER THE ADDITION WITH SINGLE BLOCK - %f",(difftime(time(0),start))); cudaFree(d_c); free(c); cudaMalloc((void **)&d_c,size); c=(float *)malloc(size); start=time(0); addMultipleBlocks<<< (int)((m*n)/9.0+1),9>>>(d_a,d_b,d_c,m,n); cudaMemcpy(c,d_c,size,cudaMemcpyDeviceToHost); printf("Result using a multiple blocks(3x3) : \n"); for(i=0;i<m;i++) { for(j=0;j<n;j++) printf("%f ",c[i*n+j]); printf("\n"); } printf("\n\n\n TIME TAKEN TO COMPUTER THE ADDITION WITH MULTIPLE BLOCKS - %f",(difftime(time(0),start))); free(a); free(b); free(c); cudaFree(d_a); cudaFree(d_b); cudaFree(d_c); return 0; } */
.text .file "kernel.hip" .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
a4745e87fe80d3bdff6fed8d5a4da4759d167406
#include <iostream> #include <thrust/device_vector.h> #include <thrust/host_vector.h> #include <thrust/reduce.h> using namespace std; int main(int argc, const char *argv[]) { string N; if (argc > 1) { N = string(argv[1]); } unsigned int n = atoi(N.c_str()); thrust::host_vector<int> H(n); for (unsigned int i = 0; i < n; i++) { H[i] = 1; } thrust::device_vector<int> D = H; cudaEvent_t start; cudaEvent_t stop; cudaEventCreate(&start); cudaEventCreate(&stop); cudaEventRecord(start); int sum = thrust::reduce(D.begin(), D.end()); cudaEventRecord(stop); cudaEventSynchronize(stop); // Get the elapsed time in milliseconds float ms; cudaEventElapsedTime(&ms, start, stop); cout << sum << endl; cout << ms << endl; return 0; }
.file "tmpxft_002e285e_00000000-6_reduction_thrust.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .section .text._ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi .type _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, @function _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi: .LFB8225: .cfi_startproc endbr64 movq %rdi, %rdx movl %esi, %eax ret .cfi_endproc .LFE8225: .size _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi .section .text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .type _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, @function _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi: .LFB8227: .cfi_startproc endbr64 xorl %eax, %eax cmpq %rdi, 8(%rsi) jne .L2 cmpl %edx, (%rsi) sete %al .L2: ret .cfi_endproc .LFE8227: .size _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv.str1.1,"aMS",@progbits,1 .LC1: .string "generic" .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv .type _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv: .LFB8237: .cfi_startproc endbr64 leaq .LC1(%rip), %rax ret .cfi_endproc .LFE8237: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv.str1.1,"aMS",@progbits,1 .LC2: .string "system" .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv .type _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv: .LFB8242: .cfi_startproc endbr64 leaq .LC2(%rip), %rax ret .cfi_endproc .LFE8242: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev: .LFB8247: .cfi_startproc endbr64 ret .cfi_endproc .LFE8247: .size _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev: .LFB8252: .cfi_startproc endbr64 ret .cfi_endproc .LFE8252: .size _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev .section .text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .type _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, @function _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE: .LFB8226: .cfi_startproc endbr64 movq (%rdi), %rax pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdx, %rbx call *24(%rax) movq %rdx, %rcx xorl %edx, %edx cmpq %rcx, 8(%rbx) jne .L11 cmpl %eax, (%rbx) sete %dl .L11: movl %edx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8226: .size _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv.str1.1,"aMS",@progbits,1 .LC3: .string "cuda" .section .text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv .type _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, @function _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv: .LFB8302: .cfi_startproc endbr64 leaq .LC3(%rip), %rax ret .cfi_endproc .LFE8302: .size _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv .section .text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev: .LFB8307: .cfi_startproc endbr64 ret .cfi_endproc .LFE8307: .size _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev .text .type nvtxDomainRangePop, @function nvtxDomainRangePop: .LFB8459: .cfi_startproc movq 424+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L18 jmp *%rax .L18: movl $-2, %eax ret .cfi_endproc .LFE8459: .size nvtxDomainRangePop, .-nvtxDomainRangePop .section .text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .weak nvtxEtiGetModuleFunctionTable_v3 .hidden nvtxEtiGetModuleFunctionTable_v3 .type nvtxEtiGetModuleFunctionTable_v3, @function nvtxEtiGetModuleFunctionTable_v3: .LFB8470: .cfi_startproc endbr64 decl %edi xorl %eax, %eax cmpl $5, %edi ja .L19 leaq .L22(%rip), %rcx movslq (%rcx,%rdi,4), %rax addq %rcx, %rax notrack jmp *%rax .section .rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .align 4 .align 4 .L22: .long .L27-.L22 .long .L32-.L22 .long .L25-.L22 .long .L24-.L22 .long .L23-.L22 .long .L21-.L22 .section .text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .L27: leaq 560+nvtxGlobals_v3(%rip), %rcx jmp .L36 .L25: leaq 776+nvtxGlobals_v3(%rip), %rcx movl $128, %eax jmp .L26 .L24: leaq 904+nvtxGlobals_v3(%rip), %rcx jmp .L37 .L23: leaq 968+nvtxGlobals_v3(%rip), %rcx .L36: movl $136, %eax jmp .L26 .L21: leaq 1104+nvtxGlobals_v3(%rip), %rcx .L37: movl $64, %eax jmp .L26 .L32: leaq 696+nvtxGlobals_v3(%rip), %rcx movl $80, %eax .L26: testq %rdx, %rdx je .L28 shrl $3, %eax decl %eax movl %eax, (%rdx) .L28: testq %rsi, %rsi jne .L29 .L30: movl $1, %eax ret .L29: movq %rcx, (%rsi) jmp .L30 .L19: ret .cfi_endproc .LFE8470: .size nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3 .section .text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat .weak nvtxGetExportTable_v3 .hidden nvtxGetExportTable_v3 .type nvtxGetExportTable_v3, @function nvtxGetExportTable_v3: .LFB8471: .cfi_startproc endbr64 leaq 8+nvtxGlobals_v3(%rip), %rax cmpl $1, %edi je .L38 cmpl $3, %edi leaq 16(%rax), %rax movl $0, %edx cmovne %rdx, %rax .L38: ret .cfi_endproc .LFE8471: .size nvtxGetExportTable_v3, .-nvtxGetExportTable_v3 .section .text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat .weak nvtxEtiSetInjectionNvtxVersion_v3 .hidden nvtxEtiSetInjectionNvtxVersion_v3 .type nvtxEtiSetInjectionNvtxVersion_v3, @function nvtxEtiSetInjectionNvtxVersion_v3: .LFB8472: .cfi_startproc endbr64 ret .cfi_endproc .LFE8472: .size nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3 .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv .type _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv: .LFB9542: .cfi_startproc endbr64 movq 8(%rdi), %rax ret .cfi_endproc .LFE9542: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv .section .text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev .type _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev, @function _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev: .LFB12246: .cfi_startproc endbr64 ret .cfi_endproc .LFE12246: .size _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev .set _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev .type _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev: .LFB12341: .cfi_startproc endbr64 ret .cfi_endproc .LFE12341: .size _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev .set _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev .section .text._ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_ .type _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_, @function _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_: .LFB12797: .cfi_startproc endbr64 cmpq %rdi, %rsi sete %al ret .cfi_endproc .LFE12797: .size _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_, .-_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_ .section .text._ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_ .type _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_, @function _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_: .LFB12798: .cfi_startproc endbr64 cmpq %rdi, %rsi sete %al ret .cfi_endproc .LFE12798: .size _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_, .-_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_ .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev: .LFB8249: .cfi_startproc endbr64 movl $8, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE8249: .size _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev: .LFB8254: .cfi_startproc endbr64 movl $8, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE8254: .size _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev: .LFB8309: .cfi_startproc endbr64 movl $8, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE8309: .size _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev .type _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev, @function _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev: .LFB12248: .cfi_startproc endbr64 movl $16, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE12248: .size _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev .type _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev: .LFB12343: .cfi_startproc endbr64 movl $8, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE12343: .size _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev .section .text._ZN4cuda3__410cuda_errorD2Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat .align 2 .weak _ZN4cuda3__410cuda_errorD2Ev .type _ZN4cuda3__410cuda_errorD2Ev, @function _ZN4cuda3__410cuda_errorD2Ev: .LFB6753: .cfi_startproc endbr64 leaq 16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax movq %rax, (%rdi) jmp _ZNSt13runtime_errorD2Ev@PLT .cfi_endproc .LFE6753: .size _ZN4cuda3__410cuda_errorD2Ev, .-_ZN4cuda3__410cuda_errorD2Ev .weak _ZN4cuda3__410cuda_errorD1Ev .set _ZN4cuda3__410cuda_errorD1Ev,_ZN4cuda3__410cuda_errorD2Ev .section .text._ZN4cuda3__410cuda_errorD0Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat .align 2 .weak _ZN4cuda3__410cuda_errorD0Ev .type _ZN4cuda3__410cuda_errorD0Ev, @function _ZN4cuda3__410cuda_errorD0Ev: .LFB6755: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call _ZN4cuda3__410cuda_errorD1Ev movq 8(%rsp), %rdi movl $16, %esi addq $24, %rsp .cfi_def_cfa_offset 8 jmp _ZdlPvm@PLT .cfi_endproc .LFE6755: .size _ZN4cuda3__410cuda_errorD0Ev, .-_ZN4cuda3__410cuda_errorD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev: .LFB8311: .cfi_startproc endbr64 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx leaq 32(%rdi), %rdi movq %rax, -32(%rdi) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZNSt13runtime_errorD2Ev@PLT .cfi_endproc .LFE8311: .size _ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev: .LFB8313: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev movq 8(%rsp), %rdi movl $64, %esi addq $24, %rsp .cfi_def_cfa_offset 8 jmp _ZdlPvm@PLT .cfi_endproc .LFE8313: .size _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev: .LFB9539: .cfi_startproc endbr64 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx leaq 8(%rdi), %rdi movq %rax, -8(%rdi) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZNSt9bad_allocD2Ev@PLT .cfi_endproc .LFE9539: .size _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev: .LFB9541: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev movq 8(%rsp), %rdi movl $40, %esi addq $24, %rsp .cfi_def_cfa_offset 8 jmp _ZdlPvm@PLT .cfi_endproc .LFE9541: .size _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev .text .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB11201: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE11201: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .align 2 .type _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_ySE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0, @function _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_ySE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0: .LFB12815: .cfi_startproc pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 movq %rdi, %rax movq %r8, %r14 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 movq %rcx, %r13 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 movq %rdx, %r12 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movq %r9, %rbx movq 12(%rdi), %rdx movl 20(%rdi), %ecx movl 8(%rax), %esi movq (%rdi), %rdi movq 32(%rax), %r9 movq 24(%rax), %r8 call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L67 subq $80, %rsp .cfi_def_cfa_offset 128 movl $18, %ecx movq %rbx, %rsi movq %rsp, %rdi rep movsl movq (%r14), %rdx movq 0(%r13), %rsi movq (%r12), %rdi call *%rbp addq $80, %rsp .cfi_def_cfa_offset 48 .L67: popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp cudaPeekAtLastError@PLT .cfi_endproc .LFE12815: .size _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_ySE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_ySE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0 .align 2 .type _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_ySC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0, @function _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_ySC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0: .LFB12816: .cfi_startproc pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 movq %rdi, %rax movq %r9, %r14 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 movq %r8, %r13 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 movq %rcx, %r12 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rdx, %rbp pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movq %rsi, %rbx movq 12(%rdi), %rdx movl 20(%rdi), %ecx movl 8(%rax), %esi movq (%rdi), %rdi movq 32(%rax), %r9 movq 24(%rax), %r8 call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L70 movl (%r14), %ecx movq 0(%r13), %rdx movq (%r12), %rsi movq 0(%rbp), %rdi call *%rbx .L70: popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp cudaPeekAtLastError@PLT .cfi_endproc .LFE12816: .size _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_ySC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_ySC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0 .align 2 .type _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_iNS0_4plusIiEEiN4cuda3std3__410__identityEEJS5_S5_iS7_iSB_EEE9cudaErrorT_DpRKT0_.isra.0, @function _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_iNS0_4plusIiEEiN4cuda3std3__410__identityEEJS5_S5_iS7_iSB_EEE9cudaErrorT_DpRKT0_.isra.0: .LFB12817: .cfi_startproc pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 movq %rdi, %rax movq %r9, %r14 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 movq %r8, %r13 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 movq %rcx, %r12 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rdx, %rbp pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movq %rsi, %rbx movq 12(%rdi), %rdx movl 20(%rdi), %ecx movl 8(%rax), %esi movq (%rdi), %rdi movq 32(%rax), %r9 movq 24(%rax), %r8 call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L73 movl (%r14), %ecx movl 0(%r13), %edx movq (%r12), %rsi movq 0(%rbp), %rdi call *%rbx .L73: popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp cudaPeekAtLastError@PLT .cfi_endproc .LFE12817: .size _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_iNS0_4plusIiEEiN4cuda3std3__410__identityEEJS5_S5_iS7_iSB_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_iNS0_4plusIiEEiN4cuda3std3__410__identityEEJS5_S5_iS7_iSB_EEE9cudaErrorT_DpRKT0_.isra.0 .align 2 .type _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_jSE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0, @function _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_jSE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0: .LFB12818: .cfi_startproc pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 movq %rdi, %rax movq %r8, %r14 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 movq %rcx, %r13 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 movq %rdx, %r12 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movq %r9, %rbx movq 12(%rdi), %rdx movl 20(%rdi), %ecx movl 8(%rax), %esi movq (%rdi), %rdi movq 32(%rax), %r9 movq 24(%rax), %r8 call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L76 subq $48, %rsp .cfi_def_cfa_offset 96 movl $10, %ecx movq %rbx, %rsi movq %rsp, %rdi rep movsl movl (%r14), %edx movq 0(%r13), %rsi movq (%r12), %rdi call *%rbp addq $48, %rsp .cfi_def_cfa_offset 48 .L76: popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp cudaPeekAtLastError@PLT .cfi_endproc .LFE12818: .size _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_jSE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_jSE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0 .align 2 .type _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_jSC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0, @function _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_jSC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0: .LFB12819: .cfi_startproc pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 movq %rdi, %rax movq %r9, %r14 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 movq %r8, %r13 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 movq %rcx, %r12 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rdx, %rbp pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movq %rsi, %rbx movq 12(%rdi), %rdx movl 20(%rdi), %ecx movl 8(%rax), %esi movq (%rdi), %rdi movq 32(%rax), %r9 movq 24(%rax), %r8 call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L79 movl (%r14), %ecx movl 0(%r13), %edx movq (%r12), %rsi movq 0(%rbp), %rdi call *%rbx .L79: popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp cudaPeekAtLastError@PLT .cfi_endproc .LFE12819: .size _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_jSC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0, .-_ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_jSC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0 .section .text._ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,comdat .weak _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .hidden _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .type _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, @function _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_: .LFB11721: .cfi_startproc endbr64 subq $168, %rsp .cfi_def_cfa_offset 176 movq %rdi, 8(%rsp) leaq 56(%rsp), %rdi movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movq %rsi, 24(%rsp) leaq 68(%rsp), %rsi movq %rax, 104(%rsp) leaq 24(%rsp), %rax movq %rax, 112(%rsp) leaq 32(%rsp), %rax movq %rax, 120(%rsp) leaq 7(%rsp), %rax movq %rax, 128(%rsp) leaq 20(%rsp), %rax movq %rax, 136(%rsp) leaq 6(%rsp), %rax movq %rdx, 32(%rsp) leaq 40(%rsp), %rdx movl %ecx, 20(%rsp) leaq 48(%rsp), %rcx movq %rax, 144(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movl $1, 64(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L81 pushq 48(%rsp) .cfi_def_cfa_offset 184 leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 192 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 184 popq %rdx .cfi_def_cfa_offset 176 .L81: movq 152(%rsp), %rax subq %fs:40, %rax je .L83 call __stack_chk_fail@PLT .L83: addq $168, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11721: .size _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, .-_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv.str1.1,"aMS",@progbits,1 .LC4: .string ": " .LC5: .string "basic_string::append" .section .text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv .type _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, @function _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv: .LFB8334: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA8334 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movq %rdi, %rbx subq $56, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax cmpq $0, 40(%rdi) jne .L87 call _ZNKSt13runtime_error4whatEv@PLT leaq 32(%rbx), %r13 movq %rax, %rdi movq %rax, %rbp call strlen@PLT movq 40(%rbx), %rdx movq %rbp, %rcx xorl %esi, %esi movq %rax, %r8 movq %r13, %rdi .LEHB0: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT cmpl $0, 16(%rbx) je .L87 cmpq $0, 40(%rbx) jne .L89 .L91: movq 24(%rbx), %rsi leaq 8(%rsp), %r12 movl 16(%rbx), %edx movq %r12, %rdi movq (%rsi), %rax call *48(%rax) jmp .L103 .L89: leaq .LC4(%rip), %rsi movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT .LEHE0: jmp .L91 .L103: movq 16(%rsp), %rdx movq 8(%rsp), %rsi movabsq $4611686018427387903, %rax subq 40(%rbx), %rax cmpq %rdx, %rax jnb .L92 movq 40(%rsp), %rax subq %fs:40, %rax jne .L102 leaq .LC5(%rip), %rdi .LEHB1: call _ZSt20__throw_length_errorPKc@PLT .L92: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT .LEHE1: movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT .L87: movq 32(%rbx), %rbx jmp .L85 .L99: endbr64 movq %rax, %rbp .L94: movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbp, %rdi jmp .L95 .L98: endbr64 movq %rax, %rdi .L95: call __cxa_begin_catch@PLT movq %rbx, %rdi call _ZNKSt13runtime_error4whatEv@PLT movq %rax, %rbx call __cxa_end_catch@PLT .L85: movq 40(%rsp), %rax subq %fs:40, %rax je .L97 .L102: call __stack_chk_fail@PLT .L97: addq $56, %rsp .cfi_def_cfa_offset 40 movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8334: .globl __gxx_personality_v0 .section .gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat .align 4 .LLSDA8334: .byte 0xff .byte 0x9b .uleb128 .LLSDATT8334-.LLSDATTD8334 .LLSDATTD8334: .byte 0x1 .uleb128 .LLSDACSE8334-.LLSDACSB8334 .LLSDACSB8334: .uleb128 .LEHB0-.LFB8334 .uleb128 .LEHE0-.LEHB0 .uleb128 .L98-.LFB8334 .uleb128 0x1 .uleb128 .LEHB1-.LFB8334 .uleb128 .LEHE1-.LEHB1 .uleb128 .L99-.LFB8334 .uleb128 0x3 .LLSDACSE8334: .byte 0x1 .byte 0 .byte 0 .byte 0x7d .align 4 .long 0 .LLSDATT8334: .section .text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat .size _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv .section .text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat .weak _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .hidden _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .type _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv: .LFB11621: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 72(%rsp) movabsq $4294967297, %rax leaq 8(%rsp), %rcx movq %rsp, %rdx leaq 28(%rsp), %rsi leaq 16(%rsp), %rdi movl $1, 24(%rsp) movl $1, 36(%rsp) movq %rax, 16(%rsp) movq %rax, 28(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L104 pushq 8(%rsp) .cfi_def_cfa_offset 104 leaq _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi pushq 8(%rsp) .cfi_def_cfa_offset 112 movq 44(%rsp), %rcx movl 52(%rsp), %r8d movq 32(%rsp), %rsi movl 40(%rsp), %edx leaq 80(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L104: movq 72(%rsp), %rax subq %fs:40, %rax je .L106 call __stack_chk_fail@PLT .L106: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11621: .size _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .section .text._ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,comdat .weak _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .hidden _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .type _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, @function _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_: .LFB11720: .cfi_startproc endbr64 subq $168, %rsp .cfi_def_cfa_offset 176 movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rax, 104(%rsp) leaq 32(%rsp), %rax movq %rax, 112(%rsp) leaq 16(%rsp), %rax movq %rax, 120(%rsp) leaq 15(%rsp), %rax movq %rax, 128(%rsp) leaq 20(%rsp), %rax movq %rax, 136(%rsp) leaq 14(%rsp), %rax movq %rsi, 32(%rsp) leaq 68(%rsp), %rsi movl %edx, 16(%rsp) leaq 40(%rsp), %rdx movl %ecx, 20(%rsp) leaq 48(%rsp), %rcx movq %rax, 144(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movl $1, 64(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L108 pushq 48(%rsp) .cfi_def_cfa_offset 184 leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 192 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 184 popq %rdx .cfi_def_cfa_offset 176 .L108: movq 152(%rsp), %rax subq %fs:40, %rax je .L110 call __stack_chk_fail@PLT .L110: addq $168, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11720: .size _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, .-_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .section .text._ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_,comdat .weak _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_ .hidden _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_ .type _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_, @function _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_: .LFB11719: .cfi_startproc endbr64 subq $168, %rsp .cfi_def_cfa_offset 176 movq %rdi, 8(%rsp) leaq 48(%rsp), %rcx leaq 56(%rsp), %rdi movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movq %rsi, 32(%rsp) leaq 68(%rsp), %rsi movq %rax, 104(%rsp) leaq 32(%rsp), %rax movq %rax, 112(%rsp) leaq 28(%rsp), %rax movq %rax, 120(%rsp) leaq 176(%rsp), %rax movq %rax, 128(%rsp) leaq 7(%rsp), %rax movq %rax, 136(%rsp) leaq 6(%rsp), %rax movl %edx, 28(%rsp) leaq 40(%rsp), %rdx movq %rax, 144(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movl $1, 64(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L112 pushq 48(%rsp) .cfi_def_cfa_offset 184 leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 192 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 184 popq %rdx .cfi_def_cfa_offset 176 .L112: movq 152(%rsp), %rax subq %fs:40, %rax je .L114 call __stack_chk_fail@PLT .L114: addq $168, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11719: .size _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_, .-_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_ .section .text._ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,comdat .weak _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .hidden _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .type _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, @function _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_: .LFB11717: .cfi_startproc endbr64 subq $168, %rsp .cfi_def_cfa_offset 176 movq %rdi, 8(%rsp) leaq 56(%rsp), %rdi movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movq %rsi, 32(%rsp) leaq 68(%rsp), %rsi movq %rax, 104(%rsp) leaq 32(%rsp), %rax movq %rax, 112(%rsp) leaq 24(%rsp), %rax movq %rax, 120(%rsp) leaq 7(%rsp), %rax movq %rax, 128(%rsp) leaq 28(%rsp), %rax movq %rax, 136(%rsp) leaq 6(%rsp), %rax movl %edx, 24(%rsp) leaq 40(%rsp), %rdx movl %ecx, 28(%rsp) leaq 48(%rsp), %rcx movq %rax, 144(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movl $1, 64(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L116 pushq 48(%rsp) .cfi_def_cfa_offset 184 leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 192 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 184 popq %rdx .cfi_def_cfa_offset 176 .L116: movq 152(%rsp), %rax subq %fs:40, %rax je .L118 call __stack_chk_fail@PLT .L118: addq $168, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11717: .size _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, .-_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .section .text._ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_,comdat .weak _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .hidden _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .type _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, @function _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_: .LFB11724: .cfi_startproc endbr64 subq $168, %rsp .cfi_def_cfa_offset 176 movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rax, 104(%rsp) leaq 32(%rsp), %rax movq %rax, 112(%rsp) leaq 16(%rsp), %rax movq %rax, 120(%rsp) leaq 15(%rsp), %rax movq %rax, 128(%rsp) leaq 20(%rsp), %rax movq %rax, 136(%rsp) leaq 14(%rsp), %rax movq %rsi, 32(%rsp) leaq 68(%rsp), %rsi movl %edx, 16(%rsp) leaq 40(%rsp), %rdx movl %ecx, 20(%rsp) leaq 48(%rsp), %rcx movq %rax, 144(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movl $1, 64(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L120 pushq 48(%rsp) .cfi_def_cfa_offset 184 leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 192 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 184 popq %rdx .cfi_def_cfa_offset 176 .L120: movq 152(%rsp), %rax subq %fs:40, %rax je .L122 call __stack_chk_fail@PLT .L122: addq $168, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11724: .size _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_, .-_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .section .text._ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_,comdat .weak _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_ .hidden _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_ .type _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_, @function _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_: .LFB11723: .cfi_startproc endbr64 subq $168, %rsp .cfi_def_cfa_offset 176 movq %rdi, 8(%rsp) leaq 48(%rsp), %rcx leaq 56(%rsp), %rdi movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movq %rsi, 24(%rsp) leaq 68(%rsp), %rsi movq %rax, 104(%rsp) leaq 24(%rsp), %rax movq %rax, 112(%rsp) leaq 32(%rsp), %rax movq %rax, 120(%rsp) leaq 176(%rsp), %rax movq %rax, 128(%rsp) leaq 7(%rsp), %rax movq %rax, 136(%rsp) leaq 6(%rsp), %rax movq %rdx, 32(%rsp) leaq 40(%rsp), %rdx movq %rax, 144(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movl $1, 64(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L124 pushq 48(%rsp) .cfi_def_cfa_offset 184 leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 192 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 184 popq %rdx .cfi_def_cfa_offset 176 .L124: movq 152(%rsp), %rax subq %fs:40, %rax je .L126 call __stack_chk_fail@PLT .L126: addq $168, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11723: .size _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_, .-_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_ .section .rodata._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc.str1.1,"aMS",@progbits,1 .LC6: .string "cudaError %d: %s" .section .text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat .weak _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .hidden _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .type _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, @function _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc: .LFB6751: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA6751 endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $288, %rsp .cfi_def_cfa_offset 320 movl %edi, 12(%rsp) movl $16, %edi leaq 24(%rsp), %r12 movq %fs:40, %rax movq %rax, 280(%rsp) xorl %eax, %eax call __cxa_allocate_exception@PLT leaq 24(%rsp), %rdi movl $64, %ecx leaq .LC6(%rip), %r8 movq %rax, %rbx xorl %eax, %eax movl $256, %esi rep stosl pushq %rdx .cfi_def_cfa_offset 328 movl $256, %ecx movl $2, %edx pushq %rbp .cfi_def_cfa_offset 336 movl 28(%rsp), %r9d movq %r12, %rdi call __snprintf_chk@PLT popq %rcx .cfi_def_cfa_offset 328 movq %rbx, %rdi popq %rsi .cfi_def_cfa_offset 320 movq %r12, %rsi call _ZNSt13runtime_errorC2EPKc@PLT leaq 16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax movq %rax, (%rbx) movq 280(%rsp), %rax subq %fs:40, %rax je .L129 call __stack_chk_fail@PLT .L129: leaq _ZN4cuda3__410cuda_errorD1Ev(%rip), %rdx leaq _ZTIN4cuda3__410cuda_errorE(%rip), %rsi movq %rbx, %rdi .LEHB2: call __cxa_throw@PLT .LEHE2: .cfi_endproc .LFE6751: .section .gcc_except_table._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"aG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat .LLSDA6751: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE6751-.LLSDACSB6751 .LLSDACSB6751: .uleb128 .LEHB2-.LFB6751 .uleb128 .LEHE2-.LEHB2 .uleb128 0 .uleb128 0 .LLSDACSE6751: .section .text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat .size _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, .-_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .section .rodata._ZN4cuda3__423__ensure_current_deviceD2Ev.str1.1,"aMS",@progbits,1 .LC7: .string "Failed to set device" .section .text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat .align 2 .weak _ZN4cuda3__423__ensure_current_deviceD2Ev .type _ZN4cuda3__423__ensure_current_deviceD2Ev, @function _ZN4cuda3__423__ensure_current_deviceD2Ev: .LFB6760: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA6760 endbr64 movl 4(%rdi), %eax cmpl (%rdi), %eax je .L138 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %eax, %edi call cudaSetDevice@PLT movl %eax, %ebx testl %eax, %eax je .L132 call cudaGetLastError@PLT leaq .LC7(%rip), %rsi movl %ebx, %edi call _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .L132: popq %rbx .cfi_def_cfa_offset 8 ret .L138: .cfi_restore 3 ret .cfi_endproc .LFE6760: .section .gcc_except_table._ZN4cuda3__423__ensure_current_deviceD2Ev,"aG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat .LLSDA6760: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE6760-.LLSDACSB6760 .LLSDACSB6760: .LLSDACSE6760: .section .text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat .size _ZN4cuda3__423__ensure_current_deviceD2Ev, .-_ZN4cuda3__423__ensure_current_deviceD2Ev .weak _ZN4cuda3__423__ensure_current_deviceD1Ev .set _ZN4cuda3__423__ensure_current_deviceD1Ev,_ZN4cuda3__423__ensure_current_deviceD2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,comdat .weak _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv .type _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, @function _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv: .LFB8245: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 leaq _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbx pushq %rcx .cfi_def_cfa_offset 32 movb _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %al testb %al, %al jne .L143 leaq _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L143 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE(%rip), %rax leaq _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev(%rip), %rdi movq %rbx, %rsi leaq __dso_handle(%rip), %rdx movq %rax, _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip) call __cxa_atexit@PLT movq %rbp, %rdi call __cxa_guard_release@PLT .L143: movq %rbx, %rax popq %rdx .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8245: .size _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei .type _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei: .LFB8243: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx subq $32, %rsp .cfi_def_cfa_offset 48 movl %edx, 12(%rsp) movq %fs:40, %rax movq %rax, 24(%rsp) xorl %eax, %eax call _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv movl 12(%rsp), %edx movq %rbx, %rdi movq %rax, %rsi movq (%rax), %rax call *48(%rax) movq 24(%rsp), %rax subq %fs:40, %rax je .L150 call __stack_chk_fail@PLT .L150: addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8243: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei .section .text._ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,comdat .weak _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv .type _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, @function _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv: .LFB8250: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 leaq _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbx pushq %rcx .cfi_def_cfa_offset 32 movb _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %al testb %al, %al jne .L154 leaq _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L154 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE(%rip), %rax leaq _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev(%rip), %rdi movq %rbx, %rsi leaq __dso_handle(%rip), %rdx movq %rax, _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip) call __cxa_atexit@PLT movq %rbp, %rdi call __cxa_guard_release@PLT .L154: movq %rbx, %rax popq %rdx .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8250: .size _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv .section .text._ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,comdat .weak _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE .type _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, @function _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE: .LFB8295: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %edi, %ebx call _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv movq %rax, %rdx movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8295: .size _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, .-_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi .type _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi: .LFB8244: .cfi_startproc endbr64 leal -9901(%rsi), %eax pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %esi, %ebx cmpl $78, %eax ja .L163 leaq .L165(%rip), %rdx movslq (%rdx,%rax,4), %rax addq %rdx, %rax notrack jmp *%rax .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat .align 4 .align 4 .L165: .long .L242-.L165 .long .L241-.L165 .long .L240-.L165 .long .L239-.L165 .long .L238-.L165 .long .L237-.L165 .long .L236-.L165 .long .L235-.L165 .long .L234-.L165 .long .L233-.L165 .long .L232-.L165 .long .L231-.L165 .long .L230-.L165 .long .L229-.L165 .long .L228-.L165 .long .L227-.L165 .long .L226-.L165 .long .L225-.L165 .long .L224-.L165 .long .L223-.L165 .long .L222-.L165 .long .L221-.L165 .long .L220-.L165 .long .L219-.L165 .long .L218-.L165 .long .L217-.L165 .long .L216-.L165 .long .L215-.L165 .long .L214-.L165 .long .L213-.L165 .long .L212-.L165 .long .L211-.L165 .long .L210-.L165 .long .L209-.L165 .long .L208-.L165 .long .L207-.L165 .long .L163-.L165 .long .L206-.L165 .long .L205-.L165 .long .L204-.L165 .long .L203-.L165 .long .L202-.L165 .long .L201-.L165 .long .L200-.L165 .long .L199-.L165 .long .L198-.L165 .long .L197-.L165 .long .L196-.L165 .long .L195-.L165 .long .L194-.L165 .long .L193-.L165 .long .L192-.L165 .long .L191-.L165 .long .L190-.L165 .long .L189-.L165 .long .L188-.L165 .long .L187-.L165 .long .L186-.L165 .long .L185-.L165 .long .L184-.L165 .long .L183-.L165 .long .L182-.L165 .long .L181-.L165 .long .L180-.L165 .long .L179-.L165 .long .L178-.L165 .long .L177-.L165 .long .L176-.L165 .long .L175-.L165 .long .L174-.L165 .long .L173-.L165 .long .L172-.L165 .long .L171-.L165 .long .L170-.L165 .long .L169-.L165 .long .L168-.L165 .long .L167-.L165 .long .L166-.L165 .long .L164-.L165 .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat .L242: movl $9901, %edi jmp .L244 .L241: movl $9902, %edi jmp .L244 .L240: movl $9903, %edi jmp .L244 .L239: movl $9904, %edi jmp .L244 .L198: movl $9946, %edi jmp .L244 .L197: movl $9947, %edi jmp .L244 .L196: movl $9948, %edi jmp .L244 .L195: movl $9949, %edi jmp .L244 .L238: movl $9905, %edi jmp .L244 .L194: movl $9950, %edi jmp .L244 .L237: movl $9906, %edi jmp .L244 .L236: movl $9907, %edi jmp .L244 .L235: movl $9908, %edi jmp .L244 .L234: movl $9909, %edi jmp .L244 .L193: movl $9951, %edi jmp .L244 .L233: movl $9910, %edi jmp .L244 .L192: movl $9952, %edi jmp .L244 .L191: movl $9953, %edi jmp .L244 .L190: movl $9954, %edi jmp .L244 .L189: movl $9955, %edi jmp .L244 .L188: movl $9956, %edi jmp .L244 .L187: movl $9957, %edi jmp .L244 .L202: movl $9942, %edi jmp .L244 .L232: movl $9911, %edi jmp .L244 .L231: movl $9912, %edi jmp .L244 .L199: movl $9945, %edi jmp .L244 .L186: movl $9958, %edi jmp .L244 .L185: movl $9959, %edi jmp .L244 .L201: movl $9943, %edi jmp .L244 .L184: movl $9960, %edi jmp .L244 .L183: movl $9961, %edi jmp .L244 .L182: movl $9962, %edi jmp .L244 .L230: movl $9913, %edi jmp .L244 .L229: movl $9914, %edi jmp .L244 .L228: movl $9915, %edi jmp .L244 .L227: movl $9916, %edi jmp .L244 .L226: movl $9917, %edi jmp .L244 .L181: movl $9963, %edi jmp .L244 .L225: movl $9918, %edi jmp .L244 .L180: movl $9964, %edi jmp .L244 .L224: movl $9919, %edi jmp .L244 .L223: movl $9920, %edi jmp .L244 .L222: movl $9921, %edi jmp .L244 .L179: movl $9965, %edi jmp .L244 .L221: movl $9922, %edi jmp .L244 .L178: movl $9966, %edi jmp .L244 .L177: movl $9967, %edi jmp .L244 .L176: movl $9968, %edi jmp .L244 .L175: movl $9969, %edi jmp .L244 .L174: movl $9970, %edi jmp .L244 .L220: movl $9923, %edi jmp .L244 .L219: movl $9924, %edi jmp .L244 .L218: movl $9925, %edi jmp .L244 .L173: movl $9971, %edi jmp .L244 .L217: movl $9926, %edi jmp .L244 .L216: movl $9927, %edi jmp .L244 .L215: movl $9928, %edi jmp .L244 .L172: movl $9972, %edi jmp .L244 .L214: movl $9929, %edi jmp .L244 .L213: movl $9930, %edi jmp .L244 .L212: movl $9931, %edi jmp .L244 .L171: movl $9973, %edi jmp .L244 .L211: movl $9932, %edi jmp .L244 .L210: movl $9933, %edi jmp .L244 .L170: movl $9974, %edi jmp .L244 .L169: movl $9975, %edi jmp .L244 .L168: movl $9976, %edi jmp .L244 .L200: movl $9944, %edi jmp .L244 .L209: movl $9934, %edi jmp .L244 .L208: movl $9935, %edi jmp .L244 .L207: movl $9936, %edi jmp .L244 .L206: movl $9938, %edi jmp .L244 .L167: movl $9977, %edi jmp .L244 .L166: movl $9978, %edi jmp .L244 .L164: movl $9979, %edi jmp .L244 .L205: movl $9939, %edi jmp .L244 .L204: movl $9940, %edi jmp .L244 .L203: movl $9941, %edi .L244: popq %rbx .cfi_remember_state .cfi_def_cfa_offset 8 jmp _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE .L163: .cfi_restore_state call _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv movq %rax, %rdx movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8244: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi .section .text._ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,comdat .weak _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv .type _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, @function _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv: .LFB8305: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 leaq _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbx pushq %rcx .cfi_def_cfa_offset 32 movb _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %al testb %al, %al jne .L247 leaq _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L247 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE(%rip), %rax leaq _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev(%rip), %rdi movq %rbx, %rsi leaq __dso_handle(%rip), %rdx movq %rax, _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip) call __cxa_atexit@PLT movq %rbp, %rdi call __cxa_guard_release@PLT .L247: movq %rbx, %rax popq %rdx .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8305: .size _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv .section .text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi .type _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, @function _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi: .LFB8304: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %esi, %ebx cmpl $998, %esi jg .L254 call _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv movq %rax, %rdx movl %ebx, %eax popq %rbx .cfi_remember_state .cfi_def_cfa_offset 8 ret .L254: .cfi_restore_state call _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv movl %ebx, %esi popq %rbx .cfi_def_cfa_offset 8 movq %rax, %rdi movq (%rax), %rax movq 24(%rax), %rax jmp *%rax .cfi_endproc .LFE8304: .size _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi .section .text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat .weak _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .type _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, @function _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc: .LFB8349: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA8349 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 movq %rsi, %r13 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movl %edi, %ebp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 pushq %rcx .cfi_def_cfa_offset 48 .LEHB3: call cudaGetLastError@PLT .LEHE3: testl %ebp, %ebp je .L258 movl $64, %edi call __cxa_allocate_exception@PLT movq %rax, %rbx call _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv movq %r13, %rsi movq %rbx, %rdi movq %rax, %r12 .LEHB4: call _ZNSt13runtime_errorC2EPKc@PLT .LEHE4: leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax xorl %edx, %edx movl %ebp, 16(%rbx) movq %rbx, %rdi movq %rax, (%rbx) leaq 48(%rbx), %rax leaq _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rsi movq %rdx, 40(%rbx) leaq _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev(%rip), %rdx movq %r12, 24(%rbx) movq %rax, 32(%rbx) movb $0, 48(%rbx) .LEHB5: call __cxa_throw@PLT .L261: endbr64 movq %rax, %rbp .L260: movq %rbx, %rdi call __cxa_free_exception@PLT movq %rbp, %rdi call _Unwind_Resume@PLT .LEHE5: .L258: popq %rax .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8349: .section .gcc_except_table._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat .LLSDA8349: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE8349-.LLSDACSB8349 .LLSDACSB8349: .uleb128 .LEHB3-.LFB8349 .uleb128 .LEHE3-.LEHB3 .uleb128 0 .uleb128 0 .uleb128 .LEHB4-.LFB8349 .uleb128 .LEHE4-.LEHB4 .uleb128 .L261-.LFB8349 .uleb128 0 .uleb128 .LEHB5-.LFB8349 .uleb128 .LEHE5-.LEHB5 .uleb128 0 .uleb128 0 .LLSDACSE8349: .section .text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat .size _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, .-_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .section .rodata._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm.str1.1,"aMS",@progbits,1 .LC8: .string "CUDA free failed" .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm .type _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm, @function _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm: .LFB12370: .cfi_startproc endbr64 pushq %rcx .cfi_def_cfa_offset 16 movq %rsi, %rdi call cudaFree@PLT testl %eax, %eax je .L263 movl %eax, %edi leaq .LC8(%rip), %rsi popq %rdx .cfi_remember_state .cfi_def_cfa_offset 8 jmp _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .L263: .cfi_restore_state popq %rax .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12370: .size _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm .section .text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm .type _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm, @function _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm: .LFB12347: .cfi_startproc endbr64 movq 8(%rdi), %rdi jmp _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm .cfi_endproc .LFE12347: .size _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm .section .text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat .weak nvtxSetInitFunctionsToNoops_v3 .hidden nvtxSetInitFunctionsToNoops_v3 .type nvtxSetInitFunctionsToNoops_v3, @function nvtxSetInitFunctionsToNoops_v3: .LFB8537: .cfi_startproc endbr64 testl %edi, %edi leaq nvtxMarkEx_impl_init_v3(%rip), %rdx setne %al cmpq %rdx, 48+nvtxGlobals_v3(%rip) je .L396 testb %al, %al je .L268 .L396: xorl %r10d, %r10d movq %r10, 48+nvtxGlobals_v3(%rip) .L268: leaq nvtxMarkA_impl_init_v3(%rip), %rdx cmpq %rdx, 56+nvtxGlobals_v3(%rip) je .L397 testb %al, %al je .L270 .L397: xorl %r9d, %r9d movq %r9, 56+nvtxGlobals_v3(%rip) .L270: leaq nvtxMarkW_impl_init_v3(%rip), %rdx cmpq %rdx, 64+nvtxGlobals_v3(%rip) je .L398 testb %al, %al je .L272 .L398: xorl %r8d, %r8d movq %r8, 64+nvtxGlobals_v3(%rip) .L272: leaq nvtxRangeStartEx_impl_init_v3(%rip), %rdx cmpq %rdx, 72+nvtxGlobals_v3(%rip) je .L399 testb %al, %al je .L274 .L399: xorl %edi, %edi movq %rdi, 72+nvtxGlobals_v3(%rip) .L274: leaq nvtxRangeStartA_impl_init_v3(%rip), %rdx cmpq %rdx, 80+nvtxGlobals_v3(%rip) je .L400 testb %al, %al je .L276 .L400: xorl %esi, %esi movq %rsi, 80+nvtxGlobals_v3(%rip) .L276: leaq nvtxRangeStartW_impl_init_v3(%rip), %rdx cmpq %rdx, 88+nvtxGlobals_v3(%rip) je .L401 testb %al, %al je .L278 .L401: xorl %ecx, %ecx movq %rcx, 88+nvtxGlobals_v3(%rip) .L278: leaq nvtxRangeEnd_impl_init_v3(%rip), %rdx cmpq %rdx, 96+nvtxGlobals_v3(%rip) je .L402 testb %al, %al je .L280 .L402: xorl %edx, %edx movq %rdx, 96+nvtxGlobals_v3(%rip) .L280: leaq nvtxRangePushEx_impl_init_v3(%rip), %rdx cmpq %rdx, 104+nvtxGlobals_v3(%rip) je .L403 testb %al, %al je .L282 .L403: xorl %r11d, %r11d movq %r11, 104+nvtxGlobals_v3(%rip) .L282: leaq nvtxRangePushA_impl_init_v3(%rip), %rdx cmpq %rdx, 112+nvtxGlobals_v3(%rip) je .L404 testb %al, %al je .L284 .L404: xorl %r10d, %r10d movq %r10, 112+nvtxGlobals_v3(%rip) .L284: leaq nvtxRangePushW_impl_init_v3(%rip), %rdx cmpq %rdx, 120+nvtxGlobals_v3(%rip) je .L405 testb %al, %al je .L286 .L405: xorl %r9d, %r9d movq %r9, 120+nvtxGlobals_v3(%rip) .L286: leaq nvtxRangePop_impl_init_v3(%rip), %rdx cmpq %rdx, 128+nvtxGlobals_v3(%rip) je .L406 testb %al, %al je .L288 .L406: xorl %r8d, %r8d movq %r8, 128+nvtxGlobals_v3(%rip) .L288: leaq nvtxNameCategoryA_impl_init_v3(%rip), %rdx cmpq %rdx, 136+nvtxGlobals_v3(%rip) je .L407 testb %al, %al je .L290 .L407: xorl %edi, %edi movq %rdi, 136+nvtxGlobals_v3(%rip) .L290: leaq nvtxNameCategoryW_impl_init_v3(%rip), %rdx cmpq %rdx, 144+nvtxGlobals_v3(%rip) je .L408 testb %al, %al je .L292 .L408: xorl %esi, %esi movq %rsi, 144+nvtxGlobals_v3(%rip) .L292: leaq nvtxNameOsThreadA_impl_init_v3(%rip), %rdx cmpq %rdx, 152+nvtxGlobals_v3(%rip) je .L409 testb %al, %al je .L294 .L409: xorl %ecx, %ecx movq %rcx, 152+nvtxGlobals_v3(%rip) .L294: leaq nvtxNameOsThreadW_impl_init_v3(%rip), %rdx cmpq %rdx, 160+nvtxGlobals_v3(%rip) je .L410 testb %al, %al je .L296 .L410: xorl %edx, %edx movq %rdx, 160+nvtxGlobals_v3(%rip) .L296: leaq nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 168+nvtxGlobals_v3(%rip) je .L411 testb %al, %al je .L298 .L411: xorl %r11d, %r11d movq %r11, 168+nvtxGlobals_v3(%rip) .L298: leaq nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 176+nvtxGlobals_v3(%rip) je .L412 testb %al, %al je .L300 .L412: xorl %r10d, %r10d movq %r10, 176+nvtxGlobals_v3(%rip) .L300: leaq nvtxNameCuContextA_impl_init_v3(%rip), %rdx cmpq %rdx, 184+nvtxGlobals_v3(%rip) je .L413 testb %al, %al je .L302 .L413: xorl %r9d, %r9d movq %r9, 184+nvtxGlobals_v3(%rip) .L302: leaq nvtxNameCuContextW_impl_init_v3(%rip), %rdx cmpq %rdx, 192+nvtxGlobals_v3(%rip) je .L414 testb %al, %al je .L304 .L414: xorl %r8d, %r8d movq %r8, 192+nvtxGlobals_v3(%rip) .L304: leaq nvtxNameCuStreamA_impl_init_v3(%rip), %rdx cmpq %rdx, 200+nvtxGlobals_v3(%rip) je .L415 testb %al, %al je .L306 .L415: xorl %edi, %edi movq %rdi, 200+nvtxGlobals_v3(%rip) .L306: leaq nvtxNameCuStreamW_impl_init_v3(%rip), %rdx cmpq %rdx, 208+nvtxGlobals_v3(%rip) je .L416 testb %al, %al je .L308 .L416: xorl %esi, %esi movq %rsi, 208+nvtxGlobals_v3(%rip) .L308: leaq nvtxNameCuEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 216+nvtxGlobals_v3(%rip) je .L417 testb %al, %al je .L310 .L417: xorl %ecx, %ecx movq %rcx, 216+nvtxGlobals_v3(%rip) .L310: leaq nvtxNameCuEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 224+nvtxGlobals_v3(%rip) je .L418 testb %al, %al je .L312 .L418: xorl %edx, %edx movq %rdx, 224+nvtxGlobals_v3(%rip) .L312: leaq nvtxNameClDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 232+nvtxGlobals_v3(%rip) je .L419 testb %al, %al je .L314 .L419: xorl %r11d, %r11d movq %r11, 232+nvtxGlobals_v3(%rip) .L314: leaq nvtxNameClDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 240+nvtxGlobals_v3(%rip) je .L420 testb %al, %al je .L316 .L420: xorl %r10d, %r10d movq %r10, 240+nvtxGlobals_v3(%rip) .L316: leaq nvtxNameClContextA_impl_init_v3(%rip), %rdx cmpq %rdx, 248+nvtxGlobals_v3(%rip) je .L421 testb %al, %al je .L318 .L421: xorl %r9d, %r9d movq %r9, 248+nvtxGlobals_v3(%rip) .L318: leaq nvtxNameClContextW_impl_init_v3(%rip), %rdx cmpq %rdx, 256+nvtxGlobals_v3(%rip) je .L422 testb %al, %al je .L320 .L422: xorl %r8d, %r8d movq %r8, 256+nvtxGlobals_v3(%rip) .L320: leaq nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx cmpq %rdx, 264+nvtxGlobals_v3(%rip) je .L423 testb %al, %al je .L322 .L423: xorl %edi, %edi movq %rdi, 264+nvtxGlobals_v3(%rip) .L322: leaq nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx cmpq %rdx, 272+nvtxGlobals_v3(%rip) je .L424 testb %al, %al je .L324 .L424: xorl %esi, %esi movq %rsi, 272+nvtxGlobals_v3(%rip) .L324: leaq nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx cmpq %rdx, 280+nvtxGlobals_v3(%rip) je .L425 testb %al, %al je .L326 .L425: xorl %ecx, %ecx movq %rcx, 280+nvtxGlobals_v3(%rip) .L326: leaq nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx cmpq %rdx, 288+nvtxGlobals_v3(%rip) je .L426 testb %al, %al je .L328 .L426: xorl %edx, %edx movq %rdx, 288+nvtxGlobals_v3(%rip) .L328: leaq nvtxNameClSamplerA_impl_init_v3(%rip), %rdx cmpq %rdx, 296+nvtxGlobals_v3(%rip) je .L427 testb %al, %al je .L330 .L427: xorl %r11d, %r11d movq %r11, 296+nvtxGlobals_v3(%rip) .L330: leaq nvtxNameClSamplerW_impl_init_v3(%rip), %rdx cmpq %rdx, 304+nvtxGlobals_v3(%rip) je .L428 testb %al, %al je .L332 .L428: xorl %r10d, %r10d movq %r10, 304+nvtxGlobals_v3(%rip) .L332: leaq nvtxNameClProgramA_impl_init_v3(%rip), %rdx cmpq %rdx, 312+nvtxGlobals_v3(%rip) je .L429 testb %al, %al je .L334 .L429: xorl %r9d, %r9d movq %r9, 312+nvtxGlobals_v3(%rip) .L334: leaq nvtxNameClProgramW_impl_init_v3(%rip), %rdx cmpq %rdx, 320+nvtxGlobals_v3(%rip) je .L430 testb %al, %al je .L336 .L430: xorl %r8d, %r8d movq %r8, 320+nvtxGlobals_v3(%rip) .L336: leaq nvtxNameClEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 328+nvtxGlobals_v3(%rip) je .L431 testb %al, %al je .L338 .L431: xorl %edi, %edi movq %rdi, 328+nvtxGlobals_v3(%rip) .L338: leaq nvtxNameClEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 336+nvtxGlobals_v3(%rip) je .L432 testb %al, %al je .L340 .L432: xorl %esi, %esi movq %rsi, 336+nvtxGlobals_v3(%rip) .L340: leaq nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 344+nvtxGlobals_v3(%rip) je .L433 testb %al, %al je .L342 .L433: xorl %ecx, %ecx movq %rcx, 344+nvtxGlobals_v3(%rip) .L342: leaq nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 352+nvtxGlobals_v3(%rip) je .L434 testb %al, %al je .L344 .L434: xorl %edx, %edx movq %rdx, 352+nvtxGlobals_v3(%rip) .L344: leaq nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx cmpq %rdx, 360+nvtxGlobals_v3(%rip) je .L435 testb %al, %al je .L346 .L435: xorl %r11d, %r11d movq %r11, 360+nvtxGlobals_v3(%rip) .L346: leaq nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx cmpq %rdx, 368+nvtxGlobals_v3(%rip) je .L436 testb %al, %al je .L348 .L436: xorl %r10d, %r10d movq %r10, 368+nvtxGlobals_v3(%rip) .L348: leaq nvtxNameCudaEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 376+nvtxGlobals_v3(%rip) je .L437 testb %al, %al je .L350 .L437: xorl %r9d, %r9d movq %r9, 376+nvtxGlobals_v3(%rip) .L350: leaq nvtxNameCudaEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 384+nvtxGlobals_v3(%rip) je .L438 testb %al, %al je .L352 .L438: xorl %r8d, %r8d movq %r8, 384+nvtxGlobals_v3(%rip) .L352: leaq nvtxDomainMarkEx_impl_init_v3(%rip), %rdx cmpq %rdx, 392+nvtxGlobals_v3(%rip) je .L439 testb %al, %al je .L354 .L439: xorl %edi, %edi movq %rdi, 392+nvtxGlobals_v3(%rip) .L354: leaq nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx cmpq %rdx, 400+nvtxGlobals_v3(%rip) je .L440 testb %al, %al je .L356 .L440: xorl %esi, %esi movq %rsi, 400+nvtxGlobals_v3(%rip) .L356: leaq nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx cmpq %rdx, 408+nvtxGlobals_v3(%rip) je .L441 testb %al, %al je .L358 .L441: xorl %ecx, %ecx movq %rcx, 408+nvtxGlobals_v3(%rip) .L358: leaq nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx cmpq %rdx, 416+nvtxGlobals_v3(%rip) je .L442 testb %al, %al je .L360 .L442: xorl %edx, %edx movq %rdx, 416+nvtxGlobals_v3(%rip) .L360: leaq nvtxDomainRangePop_impl_init_v3(%rip), %rdx cmpq %rdx, 424+nvtxGlobals_v3(%rip) je .L443 testb %al, %al je .L362 .L443: xorl %r11d, %r11d movq %r11, 424+nvtxGlobals_v3(%rip) .L362: leaq nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx cmpq %rdx, 432+nvtxGlobals_v3(%rip) je .L444 testb %al, %al je .L364 .L444: xorl %r10d, %r10d movq %r10, 432+nvtxGlobals_v3(%rip) .L364: leaq nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 440+nvtxGlobals_v3(%rip) je .L445 testb %al, %al je .L366 .L445: xorl %r9d, %r9d movq %r9, 440+nvtxGlobals_v3(%rip) .L366: leaq nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx cmpq %rdx, 448+nvtxGlobals_v3(%rip) je .L446 testb %al, %al je .L368 .L446: xorl %r8d, %r8d movq %r8, 448+nvtxGlobals_v3(%rip) .L368: leaq nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx cmpq %rdx, 456+nvtxGlobals_v3(%rip) je .L447 testb %al, %al je .L370 .L447: xorl %edi, %edi movq %rdi, 456+nvtxGlobals_v3(%rip) .L370: leaq nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx cmpq %rdx, 464+nvtxGlobals_v3(%rip) je .L448 testb %al, %al je .L372 .L448: xorl %esi, %esi movq %rsi, 464+nvtxGlobals_v3(%rip) .L372: leaq nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx cmpq %rdx, 472+nvtxGlobals_v3(%rip) je .L449 testb %al, %al je .L374 .L449: xorl %ecx, %ecx movq %rcx, 472+nvtxGlobals_v3(%rip) .L374: leaq nvtxDomainCreateA_impl_init_v3(%rip), %rdx cmpq %rdx, 480+nvtxGlobals_v3(%rip) je .L450 testb %al, %al je .L376 .L450: xorl %edx, %edx movq %rdx, 480+nvtxGlobals_v3(%rip) .L376: leaq nvtxDomainCreateW_impl_init_v3(%rip), %rdx cmpq %rdx, 488+nvtxGlobals_v3(%rip) je .L451 testb %al, %al je .L378 .L451: xorl %r11d, %r11d movq %r11, 488+nvtxGlobals_v3(%rip) .L378: leaq nvtxDomainDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 496+nvtxGlobals_v3(%rip) je .L452 testb %al, %al je .L380 .L452: xorl %r10d, %r10d movq %r10, 496+nvtxGlobals_v3(%rip) .L380: leaq nvtxInitialize_impl_init_v3(%rip), %rdx cmpq %rdx, 504+nvtxGlobals_v3(%rip) je .L453 testb %al, %al je .L382 .L453: xorl %r9d, %r9d movq %r9, 504+nvtxGlobals_v3(%rip) .L382: leaq nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx cmpq %rdx, 512+nvtxGlobals_v3(%rip) je .L454 testb %al, %al je .L384 .L454: xorl %r8d, %r8d movq %r8, 512+nvtxGlobals_v3(%rip) .L384: leaq nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 520+nvtxGlobals_v3(%rip) je .L455 testb %al, %al je .L386 .L455: xorl %edi, %edi movq %rdi, 520+nvtxGlobals_v3(%rip) .L386: leaq nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx cmpq %rdx, 528+nvtxGlobals_v3(%rip) je .L456 testb %al, %al je .L388 .L456: xorl %esi, %esi movq %rsi, 528+nvtxGlobals_v3(%rip) .L388: leaq nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx cmpq %rdx, 536+nvtxGlobals_v3(%rip) je .L457 testb %al, %al je .L390 .L457: xorl %ecx, %ecx movq %rcx, 536+nvtxGlobals_v3(%rip) .L390: leaq nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx cmpq %rdx, 544+nvtxGlobals_v3(%rip) je .L458 testb %al, %al je .L392 .L458: xorl %edx, %edx movq %rdx, 544+nvtxGlobals_v3(%rip) .L392: leaq nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx cmpq %rdx, 552+nvtxGlobals_v3(%rip) je .L459 testb %al, %al je .L267 .L459: xorl %eax, %eax movq %rax, 552+nvtxGlobals_v3(%rip) .L267: ret .cfi_endproc .LFE8537: .size nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3 .section .rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1 .LC9: .string "NVTX_INJECTION64_PATH" .LC10: .string "InitializeInjectionNvtx2" .section .text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat .weak nvtxInitializeInjectionLibrary_v3 .hidden nvtxInitializeInjectionLibrary_v3 .type nvtxInitializeInjectionLibrary_v3, @function nvtxInitializeInjectionLibrary_v3: .LFB8538: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq .LC9(%rip), %rdi call getenv@PLT movq %rax, %rbx testq %rax, %rax je .L653 movl $1, %esi movq %rax, %rdi call dlopen@PLT movl $4, %edx movq %rax, %rbx testq %rax, %rax je .L652 leaq .LC10(%rip), %rsi movq %rax, %rdi call dlsym@PLT testq %rax, %rax jne .L655 movq %rbx, %rdi call dlclose@PLT movl $5, %edx jmp .L652 .L653: movq InitializeInjectionNvtx2_fnptr(%rip), %rax movl $7, %edx testq %rax, %rax je .L652 .L655: leaq nvtxGetExportTable_v3(%rip), %rdi call *%rax xorl %edx, %edx testl %eax, %eax jne .L652 testq %rbx, %rbx je .L656 movq %rbx, %rdi call dlclose@PLT .L656: movl $6, %edx .L652: movl %edx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8538: .size nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3 .section .text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat .weak nvtxInitOnce_v3 .hidden nvtxInitOnce_v3 .type nvtxInitOnce_v3, @function nvtxInitOnce_v3: .LFB8539: .cfi_startproc endbr64 movl nvtxGlobals_v3(%rip), %eax cmpl $2, %eax je .L672 pushq %rdx .cfi_def_cfa_offset 16 movl $1, %eax xorl %edx, %edx mfence lock cmpxchgl %edx, nvtxGlobals_v3(%rip) testl %eax, %eax jne .L675 call nvtxInitializeInjectionLibrary_v3 xorl %edi, %edi testl %eax, %eax setne %dil call nvtxSetInitFunctionsToNoops_v3 movl $2, %eax mfence xchgl nvtxGlobals_v3(%rip), %eax jmp .L664 .L675: mfence movl nvtxGlobals_v3(%rip), %eax cmpl $2, %eax je .L664 call sched_yield@PLT jmp .L675 .L664: popq %rax .cfi_def_cfa_offset 8 ret .L672: ret .cfi_endproc .LFE8539: .size nvtxInitOnce_v3, .-nvtxInitOnce_v3 .section .text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat .weak nvtxDomainSyncUserReleasing_impl_init_v3 .hidden nvtxDomainSyncUserReleasing_impl_init_v3 .type nvtxDomainSyncUserReleasing_impl_init_v3, @function nvtxDomainSyncUserReleasing_impl_init_v3: .LFB8536: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 552+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L676 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L676: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8536: .size nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .hidden nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .type nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function nvtxDomainSyncUserAcquireSuccess_impl_init_v3: .LFB8535: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 544+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L679 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L679: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8535: .size nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireFailed_impl_init_v3 .hidden nvtxDomainSyncUserAcquireFailed_impl_init_v3 .type nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function nvtxDomainSyncUserAcquireFailed_impl_init_v3: .LFB8534: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 536+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L682 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L682: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8534: .size nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireStart_impl_init_v3 .hidden nvtxDomainSyncUserAcquireStart_impl_init_v3 .type nvtxDomainSyncUserAcquireStart_impl_init_v3, @function nvtxDomainSyncUserAcquireStart_impl_init_v3: .LFB8533: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 528+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L685 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L685: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8533: .size nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3 .section .text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat .weak nvtxDomainSyncUserDestroy_impl_init_v3 .hidden nvtxDomainSyncUserDestroy_impl_init_v3 .type nvtxDomainSyncUserDestroy_impl_init_v3, @function nvtxDomainSyncUserDestroy_impl_init_v3: .LFB8532: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 520+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L688 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L688: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8532: .size nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3 .section .text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat .weak nvtxDomainSyncUserCreate_impl_init_v3 .hidden nvtxDomainSyncUserCreate_impl_init_v3 .type nvtxDomainSyncUserCreate_impl_init_v3, @function nvtxDomainSyncUserCreate_impl_init_v3: .LFB8531: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 512+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L692 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L692: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8531: .size nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3 .section .text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat .weak nvtxInitialize_impl_init_v3 .hidden nvtxInitialize_impl_init_v3 .type nvtxInitialize_impl_init_v3, @function nvtxInitialize_impl_init_v3: .LFB8502: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 504+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L694 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L694: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8502: .size nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3 .section .text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat .weak nvtxDomainDestroy_impl_init_v3 .hidden nvtxDomainDestroy_impl_init_v3 .type nvtxDomainDestroy_impl_init_v3, @function nvtxDomainDestroy_impl_init_v3: .LFB8501: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 496+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L697 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L697: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8501: .size nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3 .section .text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat .weak nvtxDomainCreateW_impl_init_v3 .hidden nvtxDomainCreateW_impl_init_v3 .type nvtxDomainCreateW_impl_init_v3, @function nvtxDomainCreateW_impl_init_v3: .LFB8500: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 488+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L701 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L701: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8500: .size nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3 .section .text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat .weak nvtxDomainCreateA_impl_init_v3 .hidden nvtxDomainCreateA_impl_init_v3 .type nvtxDomainCreateA_impl_init_v3, @function nvtxDomainCreateA_impl_init_v3: .LFB8499: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 480+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L704 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L704: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8499: .size nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3 .section .text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat .weak nvtxDomainRegisterStringW_impl_init_v3 .hidden nvtxDomainRegisterStringW_impl_init_v3 .type nvtxDomainRegisterStringW_impl_init_v3, @function nvtxDomainRegisterStringW_impl_init_v3: .LFB8498: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 472+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L707 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L707: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8498: .size nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3 .section .text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat .weak nvtxDomainRegisterStringA_impl_init_v3 .hidden nvtxDomainRegisterStringA_impl_init_v3 .type nvtxDomainRegisterStringA_impl_init_v3, @function nvtxDomainRegisterStringA_impl_init_v3: .LFB8497: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 464+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L710 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L710: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8497: .size nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3 .section .text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat .weak nvtxDomainNameCategoryW_impl_init_v3 .hidden nvtxDomainNameCategoryW_impl_init_v3 .type nvtxDomainNameCategoryW_impl_init_v3, @function nvtxDomainNameCategoryW_impl_init_v3: .LFB8496: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 movq %rdi, 24(%rsp) movl %esi, 20(%rsp) movq %rdx, 8(%rsp) call nvtxInitOnce_v3 movq 456+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L712 movq 8(%rsp), %rdx movl 20(%rsp), %esi movq 24(%rsp), %rdi addq $40, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L712: .cfi_restore_state addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8496: .size nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3 .section .text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat .weak nvtxDomainNameCategoryA_impl_init_v3 .hidden nvtxDomainNameCategoryA_impl_init_v3 .type nvtxDomainNameCategoryA_impl_init_v3, @function nvtxDomainNameCategoryA_impl_init_v3: .LFB8495: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 movq %rdi, 24(%rsp) movl %esi, 20(%rsp) movq %rdx, 8(%rsp) call nvtxInitOnce_v3 movq 448+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L715 movq 8(%rsp), %rdx movl 20(%rsp), %esi movq 24(%rsp), %rdi addq $40, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L715: .cfi_restore_state addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8495: .size nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3 .section .text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat .weak nvtxDomainResourceDestroy_impl_init_v3 .hidden nvtxDomainResourceDestroy_impl_init_v3 .type nvtxDomainResourceDestroy_impl_init_v3, @function nvtxDomainResourceDestroy_impl_init_v3: .LFB8494: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 440+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L718 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L718: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8494: .size nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3 .section .text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat .weak nvtxDomainResourceCreate_impl_init_v3 .hidden nvtxDomainResourceCreate_impl_init_v3 .type nvtxDomainResourceCreate_impl_init_v3, @function nvtxDomainResourceCreate_impl_init_v3: .LFB8493: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 432+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L722 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L722: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8493: .size nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3 .section .text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat .weak nvtxDomainRangePop_impl_init_v3 .hidden nvtxDomainRangePop_impl_init_v3 .type nvtxDomainRangePop_impl_init_v3, @function nvtxDomainRangePop_impl_init_v3: .LFB8492: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 8(%rsp), %rdi addq $24, %rsp .cfi_def_cfa_offset 8 jmp nvtxDomainRangePop .cfi_endproc .LFE8492: .size nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3 .section .text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat .weak nvtxDomainRangePushEx_impl_init_v3 .hidden nvtxDomainRangePushEx_impl_init_v3 .type nvtxDomainRangePushEx_impl_init_v3, @function nvtxDomainRangePushEx_impl_init_v3: .LFB8491: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 416+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L727 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L727: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8491: .size nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3 .section .text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat .weak nvtxDomainRangeEnd_impl_init_v3 .hidden nvtxDomainRangeEnd_impl_init_v3 .type nvtxDomainRangeEnd_impl_init_v3, @function nvtxDomainRangeEnd_impl_init_v3: .LFB8490: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 408+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L729 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L729: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8490: .size nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3 .section .text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat .weak nvtxDomainRangeStartEx_impl_init_v3 .hidden nvtxDomainRangeStartEx_impl_init_v3 .type nvtxDomainRangeStartEx_impl_init_v3, @function nvtxDomainRangeStartEx_impl_init_v3: .LFB8489: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 400+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L733 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L733: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8489: .size nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3 .section .text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat .weak nvtxDomainMarkEx_impl_init_v3 .hidden nvtxDomainMarkEx_impl_init_v3 .type nvtxDomainMarkEx_impl_init_v3, @function nvtxDomainMarkEx_impl_init_v3: .LFB8488: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 392+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L735 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L735: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8488: .size nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3 .section .text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat .weak nvtxNameCudaEventW_impl_init_v3 .hidden nvtxNameCudaEventW_impl_init_v3 .type nvtxNameCudaEventW_impl_init_v3, @function nvtxNameCudaEventW_impl_init_v3: .LFB8516: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 384+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L738 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L738: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8516: .size nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3 .section .text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat .weak nvtxNameCudaEventA_impl_init_v3 .hidden nvtxNameCudaEventA_impl_init_v3 .type nvtxNameCudaEventA_impl_init_v3, @function nvtxNameCudaEventA_impl_init_v3: .LFB8515: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 376+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L741 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L741: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8515: .size nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3 .section .text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat .weak nvtxNameCudaStreamW_impl_init_v3 .hidden nvtxNameCudaStreamW_impl_init_v3 .type nvtxNameCudaStreamW_impl_init_v3, @function nvtxNameCudaStreamW_impl_init_v3: .LFB8514: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 368+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L744 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L744: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8514: .size nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3 .section .text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat .weak nvtxNameCudaStreamA_impl_init_v3 .hidden nvtxNameCudaStreamA_impl_init_v3 .type nvtxNameCudaStreamA_impl_init_v3, @function nvtxNameCudaStreamA_impl_init_v3: .LFB8513: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 360+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L747 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L747: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8513: .size nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3 .section .text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat .weak nvtxNameCudaDeviceW_impl_init_v3 .hidden nvtxNameCudaDeviceW_impl_init_v3 .type nvtxNameCudaDeviceW_impl_init_v3, @function nvtxNameCudaDeviceW_impl_init_v3: .LFB8512: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 352+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L750 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L750: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8512: .size nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3 .section .text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat .weak nvtxNameCudaDeviceA_impl_init_v3 .hidden nvtxNameCudaDeviceA_impl_init_v3 .type nvtxNameCudaDeviceA_impl_init_v3, @function nvtxNameCudaDeviceA_impl_init_v3: .LFB8511: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 344+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L753 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L753: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8511: .size nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3 .section .text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat .weak nvtxNameClEventW_impl_init_v3 .hidden nvtxNameClEventW_impl_init_v3 .type nvtxNameClEventW_impl_init_v3, @function nvtxNameClEventW_impl_init_v3: .LFB8530: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 336+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L756 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L756: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8530: .size nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3 .section .text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat .weak nvtxNameClEventA_impl_init_v3 .hidden nvtxNameClEventA_impl_init_v3 .type nvtxNameClEventA_impl_init_v3, @function nvtxNameClEventA_impl_init_v3: .LFB8529: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 328+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L759 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L759: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8529: .size nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3 .section .text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat .weak nvtxNameClProgramW_impl_init_v3 .hidden nvtxNameClProgramW_impl_init_v3 .type nvtxNameClProgramW_impl_init_v3, @function nvtxNameClProgramW_impl_init_v3: .LFB8528: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 320+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L762 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L762: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8528: .size nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3 .section .text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat .weak nvtxNameClProgramA_impl_init_v3 .hidden nvtxNameClProgramA_impl_init_v3 .type nvtxNameClProgramA_impl_init_v3, @function nvtxNameClProgramA_impl_init_v3: .LFB8527: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 312+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L765 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L765: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8527: .size nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3 .section .text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat .weak nvtxNameClSamplerW_impl_init_v3 .hidden nvtxNameClSamplerW_impl_init_v3 .type nvtxNameClSamplerW_impl_init_v3, @function nvtxNameClSamplerW_impl_init_v3: .LFB8526: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 304+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L768 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L768: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8526: .size nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3 .section .text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat .weak nvtxNameClSamplerA_impl_init_v3 .hidden nvtxNameClSamplerA_impl_init_v3 .type nvtxNameClSamplerA_impl_init_v3, @function nvtxNameClSamplerA_impl_init_v3: .LFB8525: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 296+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L771 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L771: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8525: .size nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3 .section .text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat .weak nvtxNameClMemObjectW_impl_init_v3 .hidden nvtxNameClMemObjectW_impl_init_v3 .type nvtxNameClMemObjectW_impl_init_v3, @function nvtxNameClMemObjectW_impl_init_v3: .LFB8524: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 288+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L774 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L774: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8524: .size nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3 .section .text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat .weak nvtxNameClMemObjectA_impl_init_v3 .hidden nvtxNameClMemObjectA_impl_init_v3 .type nvtxNameClMemObjectA_impl_init_v3, @function nvtxNameClMemObjectA_impl_init_v3: .LFB8523: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 280+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L777 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L777: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8523: .size nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3 .section .text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat .weak nvtxNameClCommandQueueW_impl_init_v3 .hidden nvtxNameClCommandQueueW_impl_init_v3 .type nvtxNameClCommandQueueW_impl_init_v3, @function nvtxNameClCommandQueueW_impl_init_v3: .LFB8522: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 272+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L780 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L780: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8522: .size nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3 .section .text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat .weak nvtxNameClCommandQueueA_impl_init_v3 .hidden nvtxNameClCommandQueueA_impl_init_v3 .type nvtxNameClCommandQueueA_impl_init_v3, @function nvtxNameClCommandQueueA_impl_init_v3: .LFB8521: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 264+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L783 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L783: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8521: .size nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3 .section .text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat .weak nvtxNameClContextW_impl_init_v3 .hidden nvtxNameClContextW_impl_init_v3 .type nvtxNameClContextW_impl_init_v3, @function nvtxNameClContextW_impl_init_v3: .LFB8520: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 256+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L786 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L786: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8520: .size nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3 .section .text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat .weak nvtxNameClContextA_impl_init_v3 .hidden nvtxNameClContextA_impl_init_v3 .type nvtxNameClContextA_impl_init_v3, @function nvtxNameClContextA_impl_init_v3: .LFB8519: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 248+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L789 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L789: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8519: .size nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3 .section .text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat .weak nvtxNameClDeviceW_impl_init_v3 .hidden nvtxNameClDeviceW_impl_init_v3 .type nvtxNameClDeviceW_impl_init_v3, @function nvtxNameClDeviceW_impl_init_v3: .LFB8518: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 240+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L792 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L792: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8518: .size nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3 .section .text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat .weak nvtxNameClDeviceA_impl_init_v3 .hidden nvtxNameClDeviceA_impl_init_v3 .type nvtxNameClDeviceA_impl_init_v3, @function nvtxNameClDeviceA_impl_init_v3: .LFB8517: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 232+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L795 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L795: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8517: .size nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3 .section .text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat .weak nvtxNameCuEventW_impl_init_v3 .hidden nvtxNameCuEventW_impl_init_v3 .type nvtxNameCuEventW_impl_init_v3, @function nvtxNameCuEventW_impl_init_v3: .LFB8510: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 224+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L798 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L798: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8510: .size nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3 .section .text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat .weak nvtxNameCuEventA_impl_init_v3 .hidden nvtxNameCuEventA_impl_init_v3 .type nvtxNameCuEventA_impl_init_v3, @function nvtxNameCuEventA_impl_init_v3: .LFB8509: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 216+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L801 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L801: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8509: .size nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3 .section .text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat .weak nvtxNameCuStreamW_impl_init_v3 .hidden nvtxNameCuStreamW_impl_init_v3 .type nvtxNameCuStreamW_impl_init_v3, @function nvtxNameCuStreamW_impl_init_v3: .LFB8508: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 208+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L804 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L804: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8508: .size nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3 .section .text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat .weak nvtxNameCuStreamA_impl_init_v3 .hidden nvtxNameCuStreamA_impl_init_v3 .type nvtxNameCuStreamA_impl_init_v3, @function nvtxNameCuStreamA_impl_init_v3: .LFB8507: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 200+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L807 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L807: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8507: .size nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3 .section .text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat .weak nvtxNameCuContextW_impl_init_v3 .hidden nvtxNameCuContextW_impl_init_v3 .type nvtxNameCuContextW_impl_init_v3, @function nvtxNameCuContextW_impl_init_v3: .LFB8506: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 192+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L810 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L810: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8506: .size nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3 .section .text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat .weak nvtxNameCuContextA_impl_init_v3 .hidden nvtxNameCuContextA_impl_init_v3 .type nvtxNameCuContextA_impl_init_v3, @function nvtxNameCuContextA_impl_init_v3: .LFB8505: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 184+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L813 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L813: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8505: .size nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3 .section .text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat .weak nvtxNameCuDeviceW_impl_init_v3 .hidden nvtxNameCuDeviceW_impl_init_v3 .type nvtxNameCuDeviceW_impl_init_v3, @function nvtxNameCuDeviceW_impl_init_v3: .LFB8504: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 176+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L816 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L816: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8504: .size nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3 .section .text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat .weak nvtxNameCuDeviceA_impl_init_v3 .hidden nvtxNameCuDeviceA_impl_init_v3 .type nvtxNameCuDeviceA_impl_init_v3, @function nvtxNameCuDeviceA_impl_init_v3: .LFB8503: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 168+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L819 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L819: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8503: .size nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3 .section .text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat .weak nvtxNameOsThreadW_impl_init_v3 .hidden nvtxNameOsThreadW_impl_init_v3 .type nvtxNameOsThreadW_impl_init_v3, @function nvtxNameOsThreadW_impl_init_v3: .LFB8487: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 160+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L822 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L822: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8487: .size nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3 .section .text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat .weak nvtxNameOsThreadA_impl_init_v3 .hidden nvtxNameOsThreadA_impl_init_v3 .type nvtxNameOsThreadA_impl_init_v3, @function nvtxNameOsThreadA_impl_init_v3: .LFB8486: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 152+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L825 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L825: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8486: .size nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3 .section .text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat .weak nvtxNameCategoryW_impl_init_v3 .hidden nvtxNameCategoryW_impl_init_v3 .type nvtxNameCategoryW_impl_init_v3, @function nvtxNameCategoryW_impl_init_v3: .LFB8485: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 144+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L828 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L828: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8485: .size nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3 .section .text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat .weak nvtxNameCategoryA_impl_init_v3 .hidden nvtxNameCategoryA_impl_init_v3 .type nvtxNameCategoryA_impl_init_v3, @function nvtxNameCategoryA_impl_init_v3: .LFB8484: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 136+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L831 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L831: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8484: .size nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3 .section .text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat .weak nvtxRangePop_impl_init_v3 .hidden nvtxRangePop_impl_init_v3 .type nvtxRangePop_impl_init_v3, @function nvtxRangePop_impl_init_v3: .LFB8483: .cfi_startproc endbr64 pushq %rsi .cfi_def_cfa_offset 16 call nvtxInitOnce_v3 movq 128+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L835 popq %rcx .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L835: .cfi_restore_state movl $-2, %eax popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8483: .size nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3 .section .text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat .weak nvtxRangePushW_impl_init_v3 .hidden nvtxRangePushW_impl_init_v3 .type nvtxRangePushW_impl_init_v3, @function nvtxRangePushW_impl_init_v3: .LFB8482: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 120+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L838 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L838: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8482: .size nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3 .section .text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat .weak nvtxRangePushA_impl_init_v3 .hidden nvtxRangePushA_impl_init_v3 .type nvtxRangePushA_impl_init_v3, @function nvtxRangePushA_impl_init_v3: .LFB8481: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 112+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L841 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L841: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8481: .size nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3 .section .text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat .weak nvtxRangePushEx_impl_init_v3 .hidden nvtxRangePushEx_impl_init_v3 .type nvtxRangePushEx_impl_init_v3, @function nvtxRangePushEx_impl_init_v3: .LFB8480: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 104+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L844 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L844: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8480: .size nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3 .section .text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat .weak nvtxRangeEnd_impl_init_v3 .hidden nvtxRangeEnd_impl_init_v3 .type nvtxRangeEnd_impl_init_v3, @function nvtxRangeEnd_impl_init_v3: .LFB8479: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 96+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L846 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L846: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8479: .size nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3 .section .text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat .weak nvtxRangeStartW_impl_init_v3 .hidden nvtxRangeStartW_impl_init_v3 .type nvtxRangeStartW_impl_init_v3, @function nvtxRangeStartW_impl_init_v3: .LFB8478: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 88+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L850 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L850: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8478: .size nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3 .section .text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat .weak nvtxRangeStartA_impl_init_v3 .hidden nvtxRangeStartA_impl_init_v3 .type nvtxRangeStartA_impl_init_v3, @function nvtxRangeStartA_impl_init_v3: .LFB8477: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 80+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L853 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L853: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8477: .size nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3 .section .text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat .weak nvtxRangeStartEx_impl_init_v3 .hidden nvtxRangeStartEx_impl_init_v3 .type nvtxRangeStartEx_impl_init_v3, @function nvtxRangeStartEx_impl_init_v3: .LFB8476: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 72+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L856 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L856: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8476: .size nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3 .section .text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat .weak nvtxMarkW_impl_init_v3 .hidden nvtxMarkW_impl_init_v3 .type nvtxMarkW_impl_init_v3, @function nvtxMarkW_impl_init_v3: .LFB8475: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 64+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L858 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L858: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8475: .size nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3 .section .text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat .weak nvtxMarkA_impl_init_v3 .hidden nvtxMarkA_impl_init_v3 .type nvtxMarkA_impl_init_v3, @function nvtxMarkA_impl_init_v3: .LFB8474: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 56+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L861 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L861: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8474: .size nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3 .section .text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat .weak nvtxMarkEx_impl_init_v3 .hidden nvtxMarkEx_impl_init_v3 .type nvtxMarkEx_impl_init_v3, @function nvtxMarkEx_impl_init_v3: .LFB8473: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 48+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L864 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L864: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8473: .size nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3 .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .type _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @function _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: .LFB9536: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA9536 endbr64 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 xorl %ecx, %ecx pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movq %rsi, %r12 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 leaq 8(%rdi), %rbp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movq %rdi, %rbx pushq %rdx .cfi_def_cfa_offset 48 movq %rax, (%rdi) leaq 24(%rdi), %rax movq %rcx, 16(%rdi) movq %rax, 8(%rdi) movb $0, 24(%rdi) call _ZNKSt9bad_alloc4whatEv@PLT movq %rax, %rdi movq %rax, %r13 call strlen@PLT movq 16(%rbx), %rdx movq %r13, %rcx xorl %esi, %esi movq %rax, %r8 movq %rbp, %rdi .LEHB6: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT leaq .LC4(%rip), %rsi movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT movq 8(%r12), %rdx movq (%r12), %rsi movabsq $4611686018427387903, %rax subq 16(%rbx), %rax cmpq %rdx, %rax jnb .L868 leaq .LC5(%rip), %rdi call _ZSt20__throw_length_errorPKc@PLT .L868: movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT .LEHE6: popq %rax .cfi_remember_state .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .L870: .cfi_restore_state endbr64 movq %rax, %r12 .L869: movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbx, %rdi call _ZNSt9bad_allocD2Ev@PLT movq %r12, %rdi .LEHB7: call _Unwind_Resume@PLT .LEHE7: .cfi_endproc .LFE9536: .section .gcc_except_table._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat .LLSDA9536: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE9536-.LLSDACSB9536 .LLSDACSB9536: .uleb128 .LEHB6-.LFB9536 .uleb128 .LEHE6-.LEHB6 .uleb128 .L870-.LFB9536 .uleb128 0 .uleb128 .LEHB7-.LFB9536 .uleb128 .LEHE7-.LEHB7 .uleb128 0 .uleb128 0 .LLSDACSE9536: .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC5ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat .size _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .weak _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .set _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .section .rodata.str1.1,"aMS",@progbits,1 .LC11: .string "_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_" .LC12: .string "_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_" .LC13: .string "_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_" .LC14: .string "_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_" .LC15: .string "_ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_" .LC16: .string "_ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_" .LC17: .string "_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv" .LC18: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__45__cpo5beginE" .LC19: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__45__cpo3endE" .LC20: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__45__cpo6cbeginE" .LC21: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__45__cpo4cendE" .LC22: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__45__cpo6rbeginE" .LC23: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__45__cpo4rendE" .LC24: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__45__cpo7crbeginE" .LC25: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__45__cpo5crendE" .LC26: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE" .LC27: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__419piecewise_constructE" .LC28: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__48in_placeE" .LC29: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__47nulloptE" .LC30: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std3__420unreachable_sentinelE" .LC31: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo4swapE" .LC32: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo9iter_moveE" .LC33: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo7advanceE" .LC34: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo5beginE" .LC35: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo3endE" .LC36: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo6cbeginE" .LC37: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo4cendE" .LC38: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo9iter_swapE" .LC39: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo4nextE" .LC40: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo4prevE" .LC41: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo4dataE" .LC42: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo5cdataE" .LC43: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo4sizeE" .LC44: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo5ssizeE" .LC45: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main4cuda3std6ranges3__45__cpo8distanceE" .LC46: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS8cuda_cub3parE" .LC47: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE" .LC48: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS6system6detail10sequential3seqE" .LC49: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_1E" .LC50: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_2E" .LC51: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_3E" .LC52: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_4E" .LC53: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_5E" .LC54: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_6E" .LC55: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_7E" .LC56: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_8E" .LC57: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders2_9E" .LC58: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS12placeholders3_10E" .LC59: .string "_ZN46_INTERNAL_0da1b259_19_reduction_thrust_cu_main6thrust20THRUST_200700_890_NS3seqE" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB11238: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC11(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC12(%rip), %rdx movq %rbx, %rdi leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC13(%rip), %rdx movq %rbx, %rdi leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC14(%rip), %rdx movq %rbx, %rdi leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC15(%rip), %rdx movq %rbx, %rdi leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC16(%rip), %rdx movq %rbx, %rdi leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC17(%rip), %rdx movq %rbx, %rdi leaq _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r8d, %r8d movq %rbx, %rdi pushq $0 .cfi_def_cfa_offset 24 leaq .LC18(%rip), %rdx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo5beginE(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC19(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo3endE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC20(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC21(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo4cendE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC22(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC23(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo4rendE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC24(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC25(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo5crendE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC26(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC27(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__419piecewise_constructE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC28(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__48in_placeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC29(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__47nulloptE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC30(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC31(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC32(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC33(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC34(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC35(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC36(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC37(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC38(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC39(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC40(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC41(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC42(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC43(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC44(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC45(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC46(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC47(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC48(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC49(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC50(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC51(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC52(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC53(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC54(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC55(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC56(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC57(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC58(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC59(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi call __cudaRegisterVar@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE11238: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .rodata._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i.str1.1,"aMS",@progbits,1 .LC60: .string "Failed to query current device" .section .text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat .align 2 .weak _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i .type _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, @function _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i: .LFB11624: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA11624 endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rdi, %r13 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movq %rsi, %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movslq %edx, %rbx subq $168, %rsp .cfi_def_cfa_offset 224 movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax movb _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %al testb %al, %al jne .L877 leaq _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %r14 movq %r14, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L877 movq %rsp, %rdi movl $-1, (%rsp) .LEHB8: call cudaGetDeviceCount@PLT movl %eax, %ebp call cudaGetLastError@PLT .LEHE8: testl %ebp, %ebp sete %dl testl %eax, %eax setne %al testb %al, %dl jne .L904 testl %ebp, %ebp je .L879 .L904: movl $-1, (%rsp) .L879: movl (%rsp), %eax movq %r14, %rdi movl %eax, _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip) call __cxa_guard_release@PLT .L877: cmpl _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %ebx jge .L881 testl %ebx, %ebx js .L881 jmp .L925 .L902: endbr64 movq %rax, %rbx .L883: movq %r14, %rdi call __cxa_guard_abort@PLT jmp .L924 .L925: imulq $12, %rbx, %rbp addq %r13, %rbp movl 0(%rbp), %eax cmpl $2, %eax je .L899 jmp .L926 .L881: movl $101, %eax salq $32, %rax jmp .L887 .L926: xorl %eax, %eax movl $1, %edx lock cmpxchgl %edx, 0(%rbp) jne .L888 movl (%r12), %eax leaq 4(%rsp), %rdi movl %eax, (%rsp) xorl %eax, %eax movl %eax, 4(%rsp) .LEHB9: call cudaGetDevice@PLT movl %eax, %r12d testl %eax, %eax je .L889 call cudaGetLastError@PLT leaq .LC60(%rip), %rsi movq 152(%rsp), %rax subq %fs:40, %rax je .L923 jmp .L922 .L889: movl (%rsp), %edi cmpl %edi, 4(%rsp) je .L891 call cudaSetDevice@PLT movl %eax, %r12d testl %eax, %eax je .L891 call cudaGetLastError@PLT leaq .LC7(%rip), %rsi movq 152(%rsp), %rax subq %fs:40, %rax jne .L922 .L923: movl %r12d, %edi call _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .LEHE9: .L891: leaq 8(%rsp), %rdi leaq _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi movq %rsp, %r15 .LEHB10: call cudaFuncGetAttributes@PLT movl %eax, %r14d call cudaGetLastError@PLT .LEHE10: movl %eax, %r12d testl %r14d, %r14d jne .L905 testl %eax, %eax jne .L893 .L905: movl %r14d, %r12d .L893: imull $10, 40(%rsp), %eax movq %r15, %rdi movl %eax, 4(%rbp) call _ZN4cuda3__423__ensure_current_deviceD1Ev movl %r12d, 8(%rbp) testl %r12d, %r12d je .L896 .LEHB11: call cudaGetLastError@PLT jmp .L896 .L903: endbr64 movq %rax, %rbx .L897: movq %r15, %rdi call _ZN4cuda3__423__ensure_current_deviceD1Ev .L924: movq 152(%rsp), %rax subq %fs:40, %rax jne .L922 movq %rbx, %rdi call _Unwind_Resume@PLT .LEHE11: .L896: movl $2, 0(%rbp) jmp .L899 .L888: decl %eax jne .L899 .L900: movl 0(%rbp), %eax cmpl $2, %eax jne .L900 .L899: imulq $12, %rbx, %rbx movq 4(%r13,%rbx), %rax .L887: movq 152(%rsp), %rdx subq %fs:40, %rdx je .L901 .L922: call __stack_chk_fail@PLT .L901: addq $168, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11624: .section .gcc_except_table._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"aG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat .LLSDA11624: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE11624-.LLSDACSB11624 .LLSDACSB11624: .uleb128 .LEHB8-.LFB11624 .uleb128 .LEHE8-.LEHB8 .uleb128 .L902-.LFB11624 .uleb128 0 .uleb128 .LEHB9-.LFB11624 .uleb128 .LEHE9-.LEHB9 .uleb128 0 .uleb128 0 .uleb128 .LEHB10-.LFB11624 .uleb128 .LEHE10-.LEHB10 .uleb128 .L903-.LFB11624 .uleb128 0 .uleb128 .LEHB11-.LFB11624 .uleb128 .LEHE11-.LEHB11 .uleb128 0 .uleb128 0 .LLSDACSE11624: .section .text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat .size _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, .-_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i .section .text._ZN3cub17CUB_200700_890_NS10PtxVersionERi,"axG",@progbits,_ZN3cub17CUB_200700_890_NS10PtxVersionERi,comdat .weak _ZN3cub17CUB_200700_890_NS10PtxVersionERi .type _ZN3cub17CUB_200700_890_NS10PtxVersionERi, @function _ZN3cub17CUB_200700_890_NS10PtxVersionERi: .LFB6993: .cfi_startproc endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 subq $16, %rsp .cfi_def_cfa_offset 64 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax leaq 4(%rsp), %r13 movl $-1, 4(%rsp) movq %r13, %rdi call cudaGetDevice@PLT movl %eax, %ebx call cudaGetLastError@PLT testl %ebx, %ebx sete %dl testl %eax, %eax setne %al testb %al, %dl jne .L934 testl %ebx, %ebx jne .L934 movl 4(%rsp), %r12d jmp .L928 .L934: orl $-1, %r12d .L928: movb _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %al leaq _ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %rbx testb %al, %al jne .L930 leaq _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %r14 movq %r14, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L930 movl $384, %ecx xorl %eax, %eax movq %rbx, %rdi rep stosl movq %r14, %rdi call __cxa_guard_release@PLT .L930: movl %r12d, %edx movq %r13, %rsi movq %rbx, %rdi movl %r12d, 4(%rsp) call _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i movq %rax, %r12 movq %rax, %rbx call cudaGetLastError@PLT shrq $32, %r12 orl %r12d, %eax movl %r12d, %r13d jne .L927 movl %ebx, 0(%rbp) .L927: movq 8(%rsp), %rax subq %fs:40, %rax je .L933 call __stack_chk_fail@PLT .L933: addq $16, %rsp .cfi_def_cfa_offset 48 movl %r13d, %eax popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6993: .size _ZN3cub17CUB_200700_890_NS10PtxVersionERi, .-_ZN3cub17CUB_200700_890_NS10PtxVersionERi .section .rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1 .LC61: .string "basic_string: construction from null is not valid" .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat .align 2 .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: .LFB11636: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $16, %rsp .cfi_def_cfa_offset 48 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax leaq 16(%rdi), %rax movq %rax, (%rdi) testq %rsi, %rsi jne .L940 movq 8(%rsp), %rax subq %fs:40, %rax jne .L945 leaq .LC61(%rip), %rdi call _ZSt19__throw_logic_errorPKc@PLT .L940: movq %rdi, %rbx movq %rsi, %rdi movq %rsi, %rbp call strlen@PLT movq %rax, (%rsp) leaq 0(%rbp,%rax), %r12 cmpq $15, %rax jbe .L942 movq %rsp, %rsi xorl %edx, %edx movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT movq %rax, (%rbx) movq (%rsp), %rax movq %rax, 16(%rbx) .L942: movq (%rbx), %rdi movq %r12, %rdx movq %rbp, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT movq (%rsp), %rax movq (%rbx), %rdx movq %rax, 8(%rbx) movb $0, (%rdx,%rax) movq 8(%rsp), %rax subq %fs:40, %rax je .L943 .L945: call __stack_chk_fail@PLT .L943: addq $16, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11636: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .set _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1 .LC62: .string "Unknown error" .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei .type _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei: .LFB8238: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA8238 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movl %edx, %r12d pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movq %rdi, %rbx subq $24, %rsp .cfi_def_cfa_offset 64 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax movb _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %al testb %al, %al jne .L948 leaq _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L948 leaq _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %r13 leaq 7(%rsp), %rdx leaq .LC62(%rip), %rsi movq %r13, %rdi .LEHB12: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE12: movq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdi leaq __dso_handle(%rip), %rdx movq %r13, %rsi call __cxa_atexit@PLT movq %rbp, %rdi call __cxa_guard_release@PLT .L948: movl %r12d, %edi call strerror@PLT movq %rax, %rsi testq %rax, %rax je .L950 leaq 7(%rsp), %rdx movq %rbx, %rdi .LEHB13: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ jmp .L946 .L950: leaq _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rsi movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@PLT jmp .L946 .L955: endbr64 movq %rax, %rbx .L952: movq %rbp, %rdi call __cxa_guard_abort@PLT movq 8(%rsp), %rax subq %fs:40, %rax jne .L960 movq %rbx, %rdi call _Unwind_Resume@PLT .LEHE13: .L946: movq 8(%rsp), %rax subq %fs:40, %rax je .L954 .L960: call __stack_chk_fail@PLT .L954: addq $24, %rsp .cfi_def_cfa_offset 40 movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8238: .section .gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat .LLSDA8238: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE8238-.LLSDACSB8238 .LLSDACSB8238: .uleb128 .LEHB12-.LFB8238 .uleb128 .LEHE12-.LEHB12 .uleb128 .L955-.LFB8238 .uleb128 0 .uleb128 .LEHB13-.LFB8238 .uleb128 .LEHE13-.LEHB13 .uleb128 0 .uleb128 0 .LLSDACSE8238: .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat .size _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1 .LC63: .string "unknown error" .LC64: .string "cudaErrorUnknown" .section .text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei .type _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, @function _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei: .LFB8303: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA8303 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movq %rdi, %r12 movl %edx, %edi pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movl %edx, %ebp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 subq $88, %rsp .cfi_def_cfa_offset 128 movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax .LEHB14: call cudaGetErrorString@PLT movl %ebp, %edi movq %rax, %rbx call cudaGetErrorName@PLT movq %rax, %rsi testq %rbx, %rbx jne .L962 leaq .LC63(%rip), %rbx .L962: testq %rsi, %rsi jne .L963 leaq .LC64(%rip), %rsi .L963: leaq 8(%rsp), %rbp leaq 7(%rsp), %rdx movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE14: leaq .LC4(%rip), %rsi movq %rbp, %rdi .LEHB15: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT .LEHE15: leaq 40(%rsp), %r13 movq %rax, %rsi movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %rbx, %rsi movq %r13, %rdi .LEHB16: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT .LEHE16: movq %rax, %rsi movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 72(%rsp), %rax subq %fs:40, %rax je .L967 jmp .L972 .L971: endbr64 movq %rax, %rbx .L964: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L965 .L970: endbr64 movq %rax, %rbx .L965: movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 72(%rsp), %rax subq %fs:40, %rax jne .L972 movq %rbx, %rdi .LEHB17: call _Unwind_Resume@PLT .LEHE17: .L972: call __stack_chk_fail@PLT .L967: addq $88, %rsp .cfi_def_cfa_offset 40 movq %r12, %rax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8303: .section .gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat .LLSDA8303: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE8303-.LLSDACSB8303 .LLSDACSB8303: .uleb128 .LEHB14-.LFB8303 .uleb128 .LEHE14-.LEHB14 .uleb128 0 .uleb128 0 .uleb128 .LEHB15-.LFB8303 .uleb128 .LEHE15-.LEHB15 .uleb128 .L970-.LFB8303 .uleb128 0 .uleb128 .LEHB16-.LFB8303 .uleb128 .LEHE16-.LEHB16 .uleb128 .L971-.LFB8303 .uleb128 0 .uleb128 .LEHB17-.LFB8303 .uleb128 .LEHE17-.LEHB17 .uleb128 0 .uleb128 0 .LLSDACSE8303: .section .text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat .size _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm .type _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm, @function _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm: .LFB12517: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12517 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 subq $104, %rsp .cfi_def_cfa_offset 144 movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 16(%rsp), %rdi .LEHB18: call cudaMalloc@PLT testl %eax, %eax je .L975 movl %eax, %ebx leaq 24(%rsp), %r12 call cudaGetLastError@PLT .LEHE18: movl $40, %edi call __cxa_allocate_exception@PLT movq %rax, %rbp call _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv movl %ebx, %edx movq %r12, %rdi movq %rax, %rsi movq (%rax), %rax .LEHB19: call *48(%rax) .LEHE19: leaq 56(%rsp), %r13 movq 24(%rsp), %rsi leaq 15(%rsp), %rdx movq %r13, %rdi .LEHB20: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE20: movq %r13, %rsi movq %rbp, %rdi .LEHB21: call _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .LEHE21: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 88(%rsp), %rax subq %fs:40, %rax jne .L985 leaq _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev(%rip), %rdx leaq _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rsi movq %rbp, %rdi .LEHB22: call __cxa_throw@PLT .L975: movq 16(%rsp), %rax movq 88(%rsp), %rdx subq %fs:40, %rdx je .L981 jmp .L985 .L984: endbr64 movq %rax, %rbx .L977: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L978 .L983: endbr64 movq %rax, %rbx .L978: movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L979 .L982: endbr64 movq %rax, %rbx .L979: movq %rbp, %rdi call __cxa_free_exception@PLT movq 88(%rsp), %rax subq %fs:40, %rax jne .L985 movq %rbx, %rdi call _Unwind_Resume@PLT .LEHE22: .L985: call __stack_chk_fail@PLT .L981: addq $104, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12517: .section .gcc_except_table._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat .LLSDA12517: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12517-.LLSDACSB12517 .LLSDACSB12517: .uleb128 .LEHB18-.LFB12517 .uleb128 .LEHE18-.LEHB18 .uleb128 0 .uleb128 0 .uleb128 .LEHB19-.LFB12517 .uleb128 .LEHE19-.LEHB19 .uleb128 .L982-.LFB12517 .uleb128 0 .uleb128 .LEHB20-.LFB12517 .uleb128 .LEHE20-.LEHB20 .uleb128 .L983-.LFB12517 .uleb128 0 .uleb128 .LEHB21-.LFB12517 .uleb128 .LEHE21-.LEHB21 .uleb128 .L984-.LFB12517 .uleb128 0 .uleb128 .LEHB22-.LFB12517 .uleb128 .LEHE22-.LEHB22 .uleb128 0 .uleb128 0 .LLSDACSE12517: .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat .size _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm .section .text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm .type _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm, @function _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm: .LFB12461: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 movq 8(%rdi), %rdi call _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12461: .size _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv .type _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv, @function _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv: .LFB12169: .cfi_startproc endbr64 movq 16(%rdi), %rsi testq %rsi, %rsi je .L996 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx movq 8(%rdi), %rdi salq $2, %rsi call _ZdlPvm@PLT xorl %eax, %eax movq %rax, 8(%rbx) movq %rax, 16(%rbx) popq %rbx .cfi_def_cfa_offset 8 ret .L996: .cfi_restore 3 ret .cfi_endproc .LFE12169: .size _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv .type _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv, @function _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv: .LFB12196: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12196 endbr64 movq 16(%rdi), %rdx testq %rdx, %rdx je .L1005 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx movq 8(%rdi), %rsi salq $2, %rdx movq (%rdi), %rdi movl $4, %ecx call _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm xorl %eax, %eax movq %rax, 8(%rbx) movq %rax, 16(%rbx) popq %rbx .cfi_def_cfa_offset 8 ret .L1005: .cfi_restore 3 ret .cfi_endproc .LFE12196: .section .gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv,comdat .LLSDA12196: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12196-.LLSDACSB12196 .LLSDACSB12196: .LLSDACSE12196: .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv,comdat .size _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv .section .rodata._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE.str1.1,"aMS",@progbits,1 .LC65: .string "assignment exceeds max_size()." .LC66: .string "__copy::trivial_device_copy H->D: failed" .section .text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE .type _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE, @function _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE: .LFB12269: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12269 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movq %r8, %rbp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 pushq %r9 .cfi_def_cfa_offset 48 testq %rsi, %rsi jne .L1009 popq %rdx .cfi_remember_state .cfi_def_cfa_offset 40 movq %r8, %rdi popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 jmp _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv .L1009: .cfi_restore_state movq 16(%rdi), %rbx addq %rbx, %rbx cmpq %rsi, %rbx cmovb %rsi, %rbx cmpq %rsi, %rbx jnb .L1010 movl $16, %edi call __cxa_allocate_exception@PLT leaq .LC65(%rip), %rsi movq %rax, %rdi movq %rax, %rbx .LEHB23: call _ZNSt12length_errorC1EPKc@PLT .LEHE23: movq _ZNSt12length_errorD1Ev@GOTPCREL(%rip), %rdx leaq _ZTISt12length_error(%rip), %rsi movq %rbx, %rdi .LEHB24: call __cxa_throw@PLT .L1010: movq (%r8), %rdi movq %rdx, %r12 movl $4, %edx movq %rcx, %r13 leaq 0(,%rbx,4), %rsi call _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm .LEHE24: movq %r12, %rdx movq %rbx, 16(%rbp) movq %rax, 8(%rbp) movq %rax, %rdi subq %r13, %rdx jns .L1008 sarq $2, %rdx movl $1, %r8d movl $1, %ecx movq %r12, %rsi imulq $-4, %rdx, %rdx .LEHB25: call cudaMemcpyAsync@PLT movl $1, %edi movl %eax, %ebx call cudaStreamSynchronize@PLT leaq .LC66(%rip), %rsi movl %ebx, %edi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .LEHE25: jmp .L1008 .L1015: endbr64 movq %rax, %rbp .L1012: movq %rbx, %rdi call __cxa_free_exception@PLT movq %rbp, %rdi jmp .L1019 .L1016: endbr64 movq %rax, %rdi .L1013: call __cxa_begin_catch@PLT movq %rbp, %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv .LEHB26: call __cxa_rethrow@PLT .LEHE26: .L1017: endbr64 movq %rax, %rbx .L1014: call __cxa_end_catch@PLT movq %rbx, %rdi .L1019: .LEHB27: call _Unwind_Resume@PLT .LEHE27: .L1008: popq %rax .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12269: .section .gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE,comdat .align 4 .LLSDA12269: .byte 0xff .byte 0x9b .uleb128 .LLSDATT12269-.LLSDATTD12269 .LLSDATTD12269: .byte 0x1 .uleb128 .LLSDACSE12269-.LLSDACSB12269 .LLSDACSB12269: .uleb128 .LEHB23-.LFB12269 .uleb128 .LEHE23-.LEHB23 .uleb128 .L1015-.LFB12269 .uleb128 0 .uleb128 .LEHB24-.LFB12269 .uleb128 .LEHE24-.LEHB24 .uleb128 0 .uleb128 0 .uleb128 .LEHB25-.LFB12269 .uleb128 .LEHE25-.LEHB25 .uleb128 .L1016-.LFB12269 .uleb128 0x1 .uleb128 .LEHB26-.LFB12269 .uleb128 .LEHE26-.LEHB26 .uleb128 .L1017-.LFB12269 .uleb128 0 .uleb128 .LEHB27-.LFB12269 .uleb128 .LEHE27-.LEHB27 .uleb128 0 .uleb128 0 .LLSDACSE12269: .byte 0x1 .byte 0 .align 4 .long 0 .LLSDATT12269: .section .text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE,comdat .size _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE .section .rodata .align 32 .LC0: .value 3 .value 48 .long 0 .long 0 .long 0 .long 0 .long 0 .quad 0 .long 0 .zero 4 .quad 0 .section .text._ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_,"axG",@progbits,_ZN5nvtx32v116event_attributesC5IJEEERKNS0_7messageEDpRKT_,comdat .align 2 .weak _ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_ .type _ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_, @function _ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_: .LFB12423: .cfi_startproc endbr64 movq %rsi, %rdx movq %rdi, %rax movl $12, %ecx leaq .LC0(%rip), %rsi rep movsl movq 8(%rdx), %rcx movl (%rdx), %edx movq %rcx, 40(%rax) movl %edx, 32(%rax) ret .cfi_endproc .LFE12423: .size _ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_, .-_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_ .weak _ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_ .set _ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_,_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_ .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv .type _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv, @function _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv: .LFB12442: .cfi_startproc endbr64 movq 8(%rdi), %rax ret .cfi_endproc .LFE12442: .size _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv .section .rodata._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v.str1.1,"aMS",@progbits,1 .LC67: .string "CCCL" .section .text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat .weak _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v .type _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, @function _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v: .LFB12533: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12533 endbr64 movb _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %al testb %al, %al jne .L1032 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rbx movq %rbx, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1024 movq 480+nvtxGlobals_v3(%rip), %rdx xorl %eax, %eax testq %rdx, %rdx je .L1026 leaq .LC67(%rip), %rdi call *%rdx .L1026: movq %rbx, %rdi movq %rax, _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip) call __cxa_guard_release@PLT .L1024: leaq _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax popq %rbx .cfi_def_cfa_offset 8 ret .L1032: .cfi_restore 3 leaq _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax ret .cfi_endproc .LFE12533: .section .gcc_except_table._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"aG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat .LLSDA12533: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12533-.LLSDACSB12533 .LLSDACSB12533: .LLSDACSE12533: .section .text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat .size _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, .-_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v .section .text._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"axG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat .align 2 .weak _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc .type _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc, @function _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc: .LFB12474: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12474 endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx subq $16, %rsp .cfi_def_cfa_offset 32 movq %rsi, 8(%rsp) call _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v movq 464+nvtxGlobals_v3(%rip), %rdx movq (%rax), %rdi xorl %eax, %eax testq %rdx, %rdx je .L1036 movq 8(%rsp), %rsi call *%rdx .L1036: movq %rax, (%rbx) addq $16, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12474: .section .gcc_except_table._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"aG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat .LLSDA12474: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12474-.LLSDACSB12474 .LLSDACSB12474: .LLSDACSE12474: .section .text._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"axG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat .size _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc, .-_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc .weak _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc .set _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc .text .align 2 .type _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0, @function _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0: .LFB12844: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12844 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 movq %rdi, %rbx pushq %rdx .cfi_def_cfa_offset 32 cmpb $0, 1(%rdi) je .L1041 call _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v movq (%rax), %rdi call nvtxDomainRangePop movb $0, 1(%rbx) .L1041: call _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v movq (%rax), %rdi movq 416+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L1042 movq %rbp, %rsi call *%rax .L1042: movb $1, 1(%rbx) popq %rax .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12844: .section .gcc_except_table,"a",@progbits .LLSDA12844: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12844-.LLSDACSB12844 .LLSDACSB12844: .LLSDACSE12844: .text .size _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0, .-_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0 .section .text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat .align 2 .weak _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev .hidden _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev .type _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, @function _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev: .LFB12471: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12471 endbr64 cmpb $0, 1(%rdi) je .L1050 pushq %rax .cfi_def_cfa_offset 16 call _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v movq (%rax), %rdi call nvtxDomainRangePop popq %rdx .cfi_def_cfa_offset 8 ret .L1050: ret .cfi_endproc .LFE12471: .section .gcc_except_table .LLSDA12471: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12471-.LLSDACSB12471 .LLSDACSB12471: .LLSDACSE12471: .section .text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat .size _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, .-_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev .weak _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev .hidden _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev .set _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev .section .rodata._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv.str1.1,"aMS",@progbits,1 .LC68: .string "device free failed" .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv .type _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv, @function _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv: .LFB12559: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12559 endbr64 cmpq $0, 16(%rdi) je .L1056 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx movq 8(%rdi), %rdi call cudaFree@PLT leaq .LC68(%rip), %rsi movl %eax, %edi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc xorl %eax, %eax movq %rax, 8(%rbx) movq %rax, 16(%rbx) popq %rbx .cfi_def_cfa_offset 8 ret .L1056: .cfi_restore 3 ret .cfi_endproc .LFE12559: .section .gcc_except_table .LLSDA12559: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12559-.LLSDACSB12559 .LLSDACSB12559: .LLSDACSE12559: .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv,comdat .size _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv .section .text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii,comdat .weak _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii .hidden _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii .type _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii, @function _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii: .LFB12694: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 xorl %r8d, %r8d movslq %ecx, %rcx call cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags@PLT movl %eax, %ebx call cudaGetLastError@PLT testl %ebx, %ebx jne .L1062 testl %eax, %eax jne .L1059 .L1062: movl %ebx, %eax .L1059: popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12694: .size _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii .section .rodata.str1.1 .LC69: .string "cub::DeviceReduce::Reduce" .text .type _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0, @function _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0: .LFB12850: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12850 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movq %rdx, %r15 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movq %rsi, %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movq %rdi, %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %r8d, %ebx subq $488, %rsp .cfi_def_cfa_offset 544 movq %rcx, 16(%rsp) movq 544(%rsp), %r13 movl %r9d, 28(%rsp) movq %fs:40, %rax movq %rax, 472(%rsp) xorl %eax, %eax movw $0, 42(%rsp) movb _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %al testb %al, %al jne .L1069 leaq _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1069 leaq _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi leaq .LC69(%rip), %rsi call _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc movq %rbp, %rdi call __cxa_guard_release@PLT .L1069: movb _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al testb %al, %al jne .L1072 leaq _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1072 movq _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax leaq _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi leaq 408(%rsp), %rsi movl $3, 408(%rsp) movq %rax, 416(%rsp) call _ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_ movq %rbp, %rdi call __cxa_guard_release@PLT .L1072: leaq 42(%rsp), %rax testq %r12, %r12 movq %rax, 8(%rsp) je .L1074 leaq _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rsi movq %rax, %rdi call _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0 .L1074: xorl %eax, %eax leaq 44(%rsp), %rdi movl %eax, 44(%rsp) .LEHB28: call _ZN3cub17CUB_200700_890_NS10PtxVersionERi movl %eax, %ebp call cudaGetLastError@PLT testl %ebp, %ebp jne .L1130 testl %eax, %eax jne .L1075 testl %ebp, %ebp jne .L1130 movq 16(%rsp), %rdx movl 44(%rsp), %eax movq %r12, 408(%rsp) movq %r14, 416(%rsp) movq %rdx, 432(%rsp) movl 28(%rsp), %edx movq %r15, 424(%rsp) movl %ebx, 440(%rsp) movl %edx, 448(%rsp) movq %r13, 456(%rsp) movl %eax, 464(%rsp) cmpl $599, %eax jg .L1077 cmpl $349, %eax jg .L1078 cmpl $5120, %ebx ja .L1079 testq %r12, %r12 jne .L1080 .L1097: movq $1, (%r14) jmp .L1082 .L1080: movq %r13, 200(%rsp) leaq 432(%rsp), %rcx movabsq $4294967297, %rax movabsq $1099511627777, %rdx movq %rax, 168(%rsp) leaq 168(%rsp), %rdi movq %rax, 184(%rsp) xorl %eax, %eax movq %rdx, 176(%rsp) leaq 424(%rsp), %rdx movq %rax, 192(%rsp) jmp .L1313 .L1079: leaq 88(%rsp), %rdi call cudaGetDevice@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1158 testl %eax, %eax jne .L1113 .L1158: movl %r15d, %eax testl %r15d, %r15d jne .L1113 movl 88(%rsp), %edx leaq 128(%rsp), %rdi movl $16, %esi call cudaDeviceGetAttribute@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1159 testl %eax, %eax jne .L1113 .L1159: movl %r15d, %eax testl %r15d, %r15d jne .L1113 movl $335544321, %eax leaq 340(%rsp), %rdi xorl %ecx, %ecx movl $256, %edx salq $8, %rax leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi movq $5120, 336(%rsp) movq %rax, 328(%rsp) call _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1152 testl %eax, %eax jne .L1113 testl %r15d, %r15d jne .L1152 movl 336(%rsp), %esi xorl %eax, %eax xorl %edx, %edx movl 340(%rsp), %ecx movl %eax, 404(%rsp) movl %ebx, %eax imull 128(%rsp), %ecx divl %esi movl %ebx, 396(%rsp) movl %ebx, 400(%rsp) movl %ebx, 388(%rsp) leal (%rcx,%rcx,4), %ecx cmpl $1, %edx sbbl $-1, %eax cmpl %eax, %ecx movl %eax, %ebx movl %eax, 368(%rsp) cmovle %ecx, %ebx cltd movslq %ecx, %rcx idivl %ebx movl %ebx, 392(%rsp) imull %esi, %eax movl %edx, 372(%rsp) imull %esi, %edx movl %eax, 380(%rsp) addl %eax, %esi leaq 255(,%rcx,4), %rax movl %edx, 384(%rsp) orb $-1, %al movl %esi, 376(%rsp) testq %r12, %r12 jne .L1088 movq %rax, (%r14) xorl %r14d, %r14d jmp .L1089 .L1088: cmpq %rax, (%r14) jnb .L1090 call cudaGetLastError@PLT xorl %r14d, %r14d movl $1, %r15d jmp .L1089 .L1090: leaq 255(%r12), %r14 xorb %r14b, %r14b .L1089: call cudaGetLastError@PLT testl $1, %r15d jne .L1161 testl %eax, %eax jne .L1113 .L1161: testl %r15d, %r15d jne .L1152 testq %r12, %r12 je .L1082 movl %ebx, 168(%rsp) leaq 424(%rsp), %rdx movabsq $1099511627777, %rax leaq 248(%rsp), %rdi movl %ebx, 248(%rsp) leaq 288(%rsp), %rbx leaq 368(%rsp), %r9 movq %r14, 288(%rsp) movq %rbx, %rcx xorl %r14d, %r14d leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi movq %rax, 256(%rsp) leaq 440(%rsp), %r8 movabsq $4294967297, %rax movl $1, 252(%rsp) movq %rax, 264(%rsp) movq %r14, 272(%rsp) movq %r13, 280(%rsp) call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_jSE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %r12d call cudaGetLastError@PLT testl %r12d, %r12d jne .L1162 testl %eax, %eax jne .L1113 .L1162: movl %r12d, %eax testl %r12d, %r12d jne .L1113 call cudaGetLastError@PLT testl %eax, %eax jne .L1113 movabsq $4294967297, %rax xorl %r12d, %r12d movabsq $1099511627777, %rsi movq %r13, 240(%rsp) movq %rax, 208(%rsp) leaq 432(%rsp), %rcx leaq 208(%rsp), %rdi movq %rsi, 216(%rsp) movq %rax, 224(%rsp) movq %r12, 232(%rsp) jmp .L1318 .L1078: cmpl $5120, %ebx ja .L1096 testq %r12, %r12 je .L1097 movabsq $4294967297, %rax xorl %r11d, %r11d movabsq $1099511627777, %rdx movq %r13, 400(%rsp) movq %rdx, 376(%rsp) leaq 432(%rsp), %rcx leaq 424(%rsp), %rdx movq %rax, 368(%rsp) leaq 368(%rsp), %rdi movq %rax, 384(%rsp) movq %r11, 392(%rsp) jmp .L1313 .L1096: leaq 88(%rsp), %rdi call cudaGetDevice@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1165 testl %eax, %eax jne .L1113 .L1165: movl %r15d, %eax testl %r15d, %r15d jne .L1113 movl 88(%rsp), %edx leaq 128(%rsp), %rdi movl $16, %esi call cudaDeviceGetAttribute@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1166 testl %eax, %eax jne .L1113 .L1166: movl %r15d, %eax testl %r15d, %r15d jne .L1113 movl $335544321, %eax leaq 260(%rsp), %rdi xorl %ecx, %ecx movl $256, %edx salq $8, %rax leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi movq $5120, 256(%rsp) movq %rax, 248(%rsp) call _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1152 testl %eax, %eax jne .L1113 testl %r15d, %r15d jne .L1152 movl 256(%rsp), %esi movl %ebx, %eax xorl %edx, %edx xorl %r10d, %r10d movl 260(%rsp), %ecx imull 128(%rsp), %ecx movl %ebx, 396(%rsp) divl %esi movl %ebx, 400(%rsp) movl %ebx, 388(%rsp) movl %r10d, 404(%rsp) leal (%rcx,%rcx,4), %ecx cmpl $1, %edx sbbl $-1, %eax cmpl %eax, %ecx movl %eax, %ebx movl %eax, 368(%rsp) cmovle %ecx, %ebx cltd movslq %ecx, %rcx idivl %ebx movl %ebx, 392(%rsp) imull %esi, %eax movl %edx, 372(%rsp) imull %esi, %edx movl %eax, 380(%rsp) addl %esi, %eax movl %eax, 376(%rsp) leaq 255(,%rcx,4), %rax movl %edx, 384(%rsp) orb $-1, %al testq %r12, %r12 jne .L1103 movq %rax, (%r14) xorl %r14d, %r14d jmp .L1104 .L1103: cmpq %rax, (%r14) jnb .L1105 call cudaGetLastError@PLT xorl %r14d, %r14d movl $1, %r15d jmp .L1104 .L1105: leaq 255(%r12), %r14 xorb %r14b, %r14b .L1104: call cudaGetLastError@PLT testl $1, %r15d jne .L1168 testl %eax, %eax jne .L1113 .L1168: testl %r15d, %r15d jne .L1152 testq %r12, %r12 je .L1082 movabsq $1099511627777, %rax xorl %r9d, %r9d movl %ebx, 168(%rsp) leaq 424(%rsp), %rdx movl %ebx, 288(%rsp) leaq 208(%rsp), %rbx leaq 288(%rsp), %rdi movq %rax, 296(%rsp) leaq 440(%rsp), %r8 movq %rbx, %rcx movabsq $4294967297, %rax movq %r9, 312(%rsp) leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi leaq 368(%rsp), %r9 movq %r14, 208(%rsp) movl $1, 292(%rsp) movq %rax, 304(%rsp) movq %r13, 320(%rsp) call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_jSE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %r12d call cudaGetLastError@PLT testl %r12d, %r12d jne .L1169 testl %eax, %eax jne .L1113 .L1169: movl %r12d, %eax testl %r12d, %r12d jne .L1113 call cudaGetLastError@PLT testl %eax, %eax jne .L1113 movabsq $4294967297, %rax xorl %r8d, %r8d movq %r13, 360(%rsp) movabsq $1099511627777, %rcx movq %rax, 328(%rsp) leaq 328(%rsp), %rdi movq %rax, 344(%rsp) movq %r8, 352(%rsp) movq %rcx, 336(%rsp) leaq 432(%rsp), %rcx .L1318: leaq 448(%rsp), %r9 leaq 168(%rsp), %r8 jmp .L1316 .L1077: cmpl $4096, %ebx ja .L1111 testq %r12, %r12 je .L1097 movq %r13, 80(%rsp) xorl %edi, %edi movabsq $4294967297, %rax movabsq $1099511627777, %rsi movq %rax, 48(%rsp) leaq 432(%rsp), %rcx leaq 424(%rsp), %rdx movq %rsi, 56(%rsp) movq %rax, 64(%rsp) movq %rdi, 72(%rsp) leaq 48(%rsp), %rdi .L1313: leaq 448(%rsp), %r9 leaq 440(%rsp), %r8 leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_jSC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %ebx call cudaGetLastError@PLT movl %eax, %ebp testl %ebx, %ebx jne .L1171 testl %eax, %eax jne .L1082 .L1171: movl %ebx, %ebp testl %ebx, %ebx jne .L1082 call cudaGetLastError@PLT jmp .L1113 .L1111: leaq 168(%rsp), %rdi call cudaGetDevice@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1172 testl %eax, %eax jne .L1113 .L1172: movl %r15d, %eax testl %r15d, %r15d jne .L1113 movl 168(%rsp), %edx leaq 208(%rsp), %rdi movl $16, %esi call cudaDeviceGetAttribute@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1173 testl %eax, %eax jne .L1113 .L1173: movl %r15d, %eax testl %r15d, %r15d jne .L1113 movl $268435457, %eax leaq 340(%rsp), %rdi xorl %ecx, %ecx movl $256, %edx salq $8, %rax leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi movq $4096, 336(%rsp) movq %rax, 328(%rsp) call _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPijNS0_13GridEvenShareIjEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1152 testl %eax, %eax jne .L1113 testl %r15d, %r15d jne .L1152 xorl %esi, %esi movl %ebx, %eax xorl %edx, %edx movl 340(%rsp), %ecx movl %esi, 404(%rsp) movl 336(%rsp), %esi imull 208(%rsp), %ecx movl %ebx, 396(%rsp) divl %esi movl %ebx, 400(%rsp) movl %ebx, 388(%rsp) leal (%rcx,%rcx,4), %ecx cmpl $1, %edx sbbl $-1, %eax cmpl %eax, %ecx movl %eax, %ebx movl %eax, 368(%rsp) cmovle %ecx, %ebx cltd movslq %ecx, %rcx idivl %ebx movl %ebx, 392(%rsp) imull %esi, %eax movl %edx, 372(%rsp) imull %esi, %edx movl %eax, 380(%rsp) addl %esi, %eax movl %eax, 376(%rsp) leaq 255(,%rcx,4), %rax movl %edx, 384(%rsp) orb $-1, %al testq %r12, %r12 jne .L1117 movq %rax, (%r14) xorl %r14d, %r14d jmp .L1118 .L1117: cmpq %rax, (%r14) jnb .L1119 call cudaGetLastError@PLT xorl %r14d, %r14d movl $1, %r15d jmp .L1118 .L1119: leaq 255(%r12), %r14 xorb %r14b, %r14b .L1118: call cudaGetLastError@PLT testl $1, %r15d jne .L1175 testl %eax, %eax jne .L1113 .L1175: testl %r15d, %r15d jne .L1152 testq %r12, %r12 je .L1082 xorl %edx, %edx movl %ebx, 248(%rsp) movabsq $1099511627777, %rax leaq 128(%rsp), %rdi movl %ebx, 128(%rsp) leaq 288(%rsp), %rbx leaq 368(%rsp), %r9 movq %rax, 136(%rsp) leaq 440(%rsp), %r8 movq %rbx, %rcx movabsq $4294967297, %rax movq %rdx, 152(%rsp) leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi leaq 424(%rsp), %rdx movq %r14, 288(%rsp) movl $1, 132(%rsp) movq %rax, 144(%rsp) movq %r13, 160(%rsp) call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPijN3cub17CUB_200700_890_NS13GridEvenShareIjEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_jSE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %r12d call cudaGetLastError@PLT testl %r12d, %r12d jne .L1176 testl %eax, %eax jne .L1113 .L1176: movl %r12d, %eax testl %r12d, %r12d jne .L1113 call cudaGetLastError@PLT testl %eax, %eax jne .L1113 movabsq $4294967297, %rax movq %r13, 120(%rsp) movabsq $1099511627777, %rdx leaq 432(%rsp), %rcx movq %rax, 88(%rsp) leaq 88(%rsp), %rdi leaq 448(%rsp), %r9 movq %rax, 104(%rsp) xorl %eax, %eax leaq 248(%rsp), %r8 movq %rdx, 96(%rsp) movq %rax, 112(%rsp) .L1316: movq %rbx, %rdx leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_iNS0_4plusIiEEiN4cuda3std3__410__identityEEJS5_S5_iS7_iSB_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %ebx call cudaGetLastError@PLT testl %ebx, %ebx jne .L1177 testl %eax, %eax jne .L1113 .L1177: movl %ebx, %eax testl %ebx, %ebx jne .L1113 call cudaGetLastError@PLT testl %eax, %eax je .L1082 jmp .L1113 .L1152: movl %r15d, %eax .L1113: movl %eax, %ebp .L1082: call cudaGetLastError@PLT .LEHE28: testl %ebp, %ebp jne .L1130 testl %eax, %eax jne .L1075 testl %ebp, %ebp je .L1126 .L1130: movl %ebp, %eax .L1075: movl %eax, %ebp .L1126: movq 8(%rsp), %rdi call _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev movq 472(%rsp), %rax subq %fs:40, %rax je .L1129 jmp .L1279 .L1155: endbr64 movq %rax, %rbx .L1127: movq 8(%rsp), %rdi call _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev movq 472(%rsp), %rax subq %fs:40, %rax jne .L1279 movq %rbx, %rdi .LEHB29: call _Unwind_Resume@PLT .LEHE29: .L1279: call __stack_chk_fail@PLT .L1129: addq $488, %rsp .cfi_def_cfa_offset 56 movl %ebp, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12850: .section .gcc_except_table .LLSDA12850: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12850-.LLSDACSB12850 .LLSDACSB12850: .uleb128 .LEHB28-.LFB12850 .uleb128 .LEHE28-.LEHB28 .uleb128 .L1155-.LFB12850 .uleb128 0 .uleb128 .LEHB29-.LFB12850 .uleb128 .LEHE29-.LEHB29 .uleb128 0 .uleb128 0 .LLSDACSE12850: .text .size _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0, .-_ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0 .section .text._ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii,"axG",@progbits,_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii,comdat .weak _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii .hidden _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii .type _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii, @function _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii: .LFB12702: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 xorl %r8d, %r8d movslq %ecx, %rcx call cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags@PLT movl %eax, %ebx call cudaGetLastError@PLT testl %ebx, %ebx jne .L1322 testl %eax, %eax jne .L1319 .L1322: movl %ebx, %eax .L1319: popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12702: .size _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii, .-_ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii .text .type _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0, @function _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0: .LFB12851: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12851 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movq %rdx, %r15 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movq %rsi, %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movq %rdi, %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movq %r8, %rbx subq $520, %rsp .cfi_def_cfa_offset 576 movq %rcx, 16(%rsp) movq 576(%rsp), %r13 movl %r9d, 28(%rsp) movq %fs:40, %rax movq %rax, 504(%rsp) xorl %eax, %eax movw $0, 42(%rsp) movb _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %al testb %al, %al jne .L1329 leaq _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1329 leaq _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi leaq .LC69(%rip), %rsi call _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc movq %rbp, %rdi call __cxa_guard_release@PLT .L1329: movb _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al testb %al, %al jne .L1332 leaq _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1332 movq _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax leaq _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi leaq 432(%rsp), %rsi movl $3, 432(%rsp) movq %rax, 440(%rsp) call _ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_ movq %rbp, %rdi call __cxa_guard_release@PLT .L1332: leaq 42(%rsp), %rax testq %r12, %r12 movq %rax, 8(%rsp) je .L1334 leaq _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rsi movq %rax, %rdi call _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0 .L1334: xorl %eax, %eax leaq 44(%rsp), %rdi movl %eax, 44(%rsp) .LEHB30: call _ZN3cub17CUB_200700_890_NS10PtxVersionERi movl %eax, %ebp call cudaGetLastError@PLT testl %ebp, %ebp jne .L1390 testl %eax, %eax jne .L1335 testl %ebp, %ebp jne .L1390 movq 16(%rsp), %rdx movl 44(%rsp), %eax movq %r12, 368(%rsp) movq %r14, 376(%rsp) movq %rdx, 392(%rsp) movl 28(%rsp), %edx movq %r15, 384(%rsp) movq %rbx, 400(%rsp) movl %edx, 412(%rsp) movq %r13, 416(%rsp) movl %eax, 424(%rsp) cmpl $599, %eax jg .L1337 cmpl $349, %eax jg .L1338 cmpq $5120, %rbx ja .L1339 testq %r12, %r12 jne .L1340 .L1357: movq $1, (%r14) jmp .L1342 .L1340: movq %r13, 200(%rsp) leaq 392(%rsp), %rcx movabsq $4294967297, %rax movabsq $1099511627777, %rdx movq %rax, 168(%rsp) leaq 168(%rsp), %rdi movq %rax, 184(%rsp) xorl %eax, %eax movq %rdx, 176(%rsp) leaq 384(%rsp), %rdx movq %rax, 192(%rsp) jmp .L1573 .L1339: leaq 88(%rsp), %rdi call cudaGetDevice@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1418 testl %eax, %eax jne .L1373 .L1418: movl %r15d, %eax testl %r15d, %r15d jne .L1373 movl 88(%rsp), %edx leaq 128(%rsp), %rdi movl $16, %esi call cudaDeviceGetAttribute@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1419 testl %eax, %eax jne .L1373 .L1419: movl %r15d, %eax testl %r15d, %r15d jne .L1373 movl $335544321, %eax leaq 340(%rsp), %rdi xorl %ecx, %ecx movl $256, %edx salq $8, %rax leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi movq $5120, 336(%rsp) movq %rax, 328(%rsp) call _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1412 testl %eax, %eax jne .L1373 testl %r15d, %r15d jne .L1412 movslq 336(%rsp), %rdi xorl %eax, %eax xorl %edx, %edx movl 340(%rsp), %ecx movq %rax, 496(%rsp) movq %rbx, %rax imull 128(%rsp), %ecx divq %rdi movq %rbx, 480(%rsp) movq %rbx, 488(%rsp) movq %rbx, 464(%rsp) leal (%rcx,%rcx,4), %ecx movq %rdi, %rsi cmpq $1, %rdx sbbq $-1, %rax cmpl %eax, %ecx movl %eax, %ebx movl %eax, 432(%rsp) cmovle %ecx, %ebx cltd movslq %ecx, %rcx idivl %ebx movl %ebx, 472(%rsp) imull %edi, %eax movl %edx, 436(%rsp) imull %edx, %esi cltq addq %rax, %rdi movq %rax, 448(%rsp) movslq %esi, %rsi leaq 255(,%rcx,4), %rax movq %rsi, 456(%rsp) orb $-1, %al movq %rdi, 440(%rsp) testq %r12, %r12 jne .L1348 movq %rax, (%r14) xorl %r14d, %r14d jmp .L1349 .L1348: cmpq %rax, (%r14) jnb .L1350 call cudaGetLastError@PLT xorl %r14d, %r14d movl $1, %r15d jmp .L1349 .L1350: leaq 255(%r12), %r14 xorb %r14b, %r14b .L1349: call cudaGetLastError@PLT testl $1, %r15d jne .L1421 testl %eax, %eax jne .L1373 .L1421: testl %r15d, %r15d jne .L1412 testq %r12, %r12 je .L1342 movl %ebx, 168(%rsp) leaq 384(%rsp), %rdx movabsq $1099511627777, %rax leaq 248(%rsp), %rdi movl %ebx, 248(%rsp) leaq 288(%rsp), %rbx leaq 432(%rsp), %r9 movq %r14, 288(%rsp) movq %rbx, %rcx xorl %r14d, %r14d leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi movq %rax, 256(%rsp) leaq 400(%rsp), %r8 movabsq $4294967297, %rax movl $1, 252(%rsp) movq %rax, 264(%rsp) movq %r14, 272(%rsp) movq %r13, 280(%rsp) call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_ySE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %r12d call cudaGetLastError@PLT testl %r12d, %r12d jne .L1422 testl %eax, %eax jne .L1373 .L1422: movl %r12d, %eax testl %r12d, %r12d jne .L1373 call cudaGetLastError@PLT testl %eax, %eax jne .L1373 movabsq $4294967297, %rax xorl %r12d, %r12d movabsq $1099511627777, %rdx movq %r13, 240(%rsp) movq %rax, 208(%rsp) leaq 392(%rsp), %rcx leaq 208(%rsp), %rdi movq %rdx, 216(%rsp) movq %rax, 224(%rsp) movq %r12, 232(%rsp) jmp .L1578 .L1338: cmpq $5120, %rbx ja .L1356 testq %r12, %r12 je .L1357 movabsq $4294967297, %rax xorl %r11d, %r11d movabsq $1099511627777, %rdx movq %r13, 464(%rsp) movq %rdx, 440(%rsp) leaq 392(%rsp), %rcx leaq 384(%rsp), %rdx movq %rax, 432(%rsp) leaq 432(%rsp), %rdi movq %rax, 448(%rsp) movq %r11, 456(%rsp) jmp .L1573 .L1356: leaq 88(%rsp), %rdi call cudaGetDevice@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1425 testl %eax, %eax jne .L1373 .L1425: movl %r15d, %eax testl %r15d, %r15d jne .L1373 movl 88(%rsp), %edx leaq 128(%rsp), %rdi movl $16, %esi call cudaDeviceGetAttribute@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1426 testl %eax, %eax jne .L1373 .L1426: movl %r15d, %eax testl %r15d, %r15d jne .L1373 movl $335544321, %eax leaq 260(%rsp), %rdi xorl %ecx, %ecx movl $256, %edx salq $8, %rax leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi movq $5120, 256(%rsp) movq %rax, 248(%rsp) call _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1412 testl %eax, %eax jne .L1373 testl %r15d, %r15d jne .L1412 movslq 256(%rsp), %rdi movq %rbx, %rax xorl %edx, %edx xorl %r10d, %r10d movl 260(%rsp), %ecx imull 128(%rsp), %ecx movq %rbx, 480(%rsp) divq %rdi movq %rbx, 488(%rsp) movq %rbx, 464(%rsp) movq %r10, 496(%rsp) leal (%rcx,%rcx,4), %ecx movq %rdi, %rsi cmpq $1, %rdx sbbq $-1, %rax cmpl %eax, %ecx movl %eax, %ebx movl %eax, 432(%rsp) cmovle %ecx, %ebx cltd movslq %ecx, %rcx idivl %ebx movl %ebx, 472(%rsp) imull %edi, %eax movl %edx, 436(%rsp) imull %edx, %esi cltq addq %rax, %rdi movq %rax, 448(%rsp) movslq %esi, %rsi leaq 255(,%rcx,4), %rax movq %rsi, 456(%rsp) orb $-1, %al movq %rdi, 440(%rsp) testq %r12, %r12 jne .L1363 movq %rax, (%r14) xorl %r14d, %r14d jmp .L1364 .L1363: cmpq %rax, (%r14) jnb .L1365 call cudaGetLastError@PLT xorl %r14d, %r14d movl $1, %r15d jmp .L1364 .L1365: leaq 255(%r12), %r14 xorb %r14b, %r14b .L1364: call cudaGetLastError@PLT testl $1, %r15d jne .L1428 testl %eax, %eax jne .L1373 .L1428: testl %r15d, %r15d jne .L1412 testq %r12, %r12 je .L1342 movabsq $1099511627777, %rax xorl %r9d, %r9d movl %ebx, 168(%rsp) leaq 384(%rsp), %rdx movl %ebx, 288(%rsp) leaq 208(%rsp), %rbx leaq 288(%rsp), %rdi movq %rax, 296(%rsp) leaq 400(%rsp), %r8 movq %rbx, %rcx movabsq $4294967297, %rax movq %r9, 312(%rsp) leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi leaq 432(%rsp), %r9 movq %r14, 208(%rsp) movl $1, 292(%rsp) movq %rax, 304(%rsp) movq %r13, 320(%rsp) call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_ySE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %r12d call cudaGetLastError@PLT testl %r12d, %r12d jne .L1429 testl %eax, %eax jne .L1373 .L1429: movl %r12d, %eax testl %r12d, %r12d jne .L1373 call cudaGetLastError@PLT testl %eax, %eax jne .L1373 movabsq $4294967297, %rax xorl %r8d, %r8d movabsq $1099511627777, %rdx movq %r13, 360(%rsp) movq %rax, 328(%rsp) leaq 392(%rsp), %rcx leaq 328(%rsp), %rdi movq %rdx, 336(%rsp) movq %rax, 344(%rsp) movq %r8, 352(%rsp) .L1578: leaq 412(%rsp), %r9 leaq 168(%rsp), %r8 jmp .L1576 .L1337: cmpq $4096, %rbx ja .L1371 testq %r12, %r12 je .L1357 movq %r13, 80(%rsp) xorl %edi, %edi leaq 392(%rsp), %rcx movabsq $4294967297, %rax movabsq $1099511627777, %rdx movq %rax, 48(%rsp) movq %rax, 64(%rsp) movq %rdx, 56(%rsp) leaq 384(%rsp), %rdx movq %rdi, 72(%rsp) leaq 48(%rsp), %rdi .L1573: leaq 412(%rsp), %r9 leaq 400(%rsp), %r8 leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyNS0_4plusIiEEiN4cuda3std3__410__identityEEJS9_SA_ySC_iSG_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %ebx call cudaGetLastError@PLT movl %eax, %ebp testl %ebx, %ebx jne .L1431 testl %eax, %eax jne .L1342 .L1431: movl %ebx, %ebp testl %ebx, %ebx jne .L1342 call cudaGetLastError@PLT jmp .L1373 .L1371: leaq 168(%rsp), %rdi call cudaGetDevice@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1432 testl %eax, %eax jne .L1373 .L1432: movl %r15d, %eax testl %r15d, %r15d jne .L1373 movl 168(%rsp), %edx leaq 208(%rsp), %rdi movl $16, %esi call cudaDeviceGetAttribute@PLT movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1433 testl %eax, %eax jne .L1373 .L1433: movl %r15d, %eax testl %r15d, %r15d jne .L1373 movl $268435457, %eax leaq 340(%rsp), %rdi xorl %ecx, %ecx movl $256, %edx salq $8, %rax leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi movq $4096, 336(%rsp) movq %rax, 328(%rsp) call _ZN3cub17CUB_200700_890_NS14MaxSmOccupancyIPFvN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS3_10device_ptrIiEEEEPiyNS0_13GridEvenShareIyEENS3_4plusIiEEN4cuda3std3__410__identityEEEE9cudaErrorRiT_ii movl %eax, %r15d call cudaGetLastError@PLT testl %r15d, %r15d jne .L1412 testl %eax, %eax jne .L1373 testl %r15d, %r15d jne .L1412 movslq 336(%rsp), %rdi movq %rbx, %rax xorl %edx, %edx xorl %esi, %esi movl 340(%rsp), %ecx imull 208(%rsp), %ecx movq %rbx, 480(%rsp) divq %rdi movq %rbx, 488(%rsp) movq %rbx, 464(%rsp) movq %rsi, 496(%rsp) leal (%rcx,%rcx,4), %ecx movq %rdi, %rsi cmpq $1, %rdx sbbq $-1, %rax cmpl %eax, %ecx movl %eax, %ebx movl %eax, 432(%rsp) cmovle %ecx, %ebx cltd movslq %ecx, %rcx idivl %ebx movl %ebx, 472(%rsp) imull %edi, %eax movl %edx, 436(%rsp) imull %edx, %esi cltq addq %rax, %rdi movq %rax, 448(%rsp) movslq %esi, %rsi leaq 255(,%rcx,4), %rax movq %rsi, 456(%rsp) orb $-1, %al movq %rdi, 440(%rsp) testq %r12, %r12 jne .L1377 movq %rax, (%r14) xorl %r14d, %r14d jmp .L1378 .L1377: cmpq %rax, (%r14) jnb .L1379 call cudaGetLastError@PLT xorl %r14d, %r14d movl $1, %r15d jmp .L1378 .L1379: leaq 255(%r12), %r14 xorb %r14b, %r14b .L1378: call cudaGetLastError@PLT testl $1, %r15d jne .L1435 testl %eax, %eax jne .L1373 .L1435: testl %r15d, %r15d jne .L1412 testq %r12, %r12 je .L1342 xorl %edx, %edx movl %ebx, 248(%rsp) movabsq $1099511627777, %rax leaq 128(%rsp), %rdi movl %ebx, 128(%rsp) leaq 288(%rsp), %rbx leaq 432(%rsp), %r9 movq %rax, 136(%rsp) leaq 400(%rsp), %r8 movq %rbx, %rcx movabsq $4294967297, %rax movq %rdx, 152(%rsp) leaq _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_(%rip), %rsi leaq 384(%rsp), %rdx movq %r14, 288(%rsp) movl $1, 132(%rsp) movq %rax, 144(%rsp) movq %r13, 160(%rsp) call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvNS0_6detail15normal_iteratorINS0_10device_ptrIiEEEEPiyN3cub17CUB_200700_890_NS13GridEvenShareIyEENS0_4plusIiEEN4cuda3std3__410__identityEEJS9_SA_ySE_SG_SK_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %r12d call cudaGetLastError@PLT testl %r12d, %r12d jne .L1436 testl %eax, %eax jne .L1373 .L1436: movl %r12d, %eax testl %r12d, %r12d jne .L1373 call cudaGetLastError@PLT testl %eax, %eax jne .L1373 movabsq $4294967297, %rax movq %r13, 120(%rsp) movabsq $1099511627777, %rcx leaq 88(%rsp), %rdi movq %rax, 88(%rsp) leaq 412(%rsp), %r9 leaq 248(%rsp), %r8 movq %rax, 104(%rsp) xorl %eax, %eax movq %rax, 112(%rsp) movq %rcx, 96(%rsp) leaq 392(%rsp), %rcx .L1576: movq %rbx, %rdx leaq _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_(%rip), %rsi call _ZNK6thrust20THRUST_200700_890_NS8cuda_cub8launcher14triple_chevron9doit_hostIPFvPiS5_iNS0_4plusIiEEiN4cuda3std3__410__identityEEJS5_S5_iS7_iSB_EEE9cudaErrorT_DpRKT0_.isra.0 call cudaPeekAtLastError@PLT movl %eax, %ebx call cudaGetLastError@PLT testl %ebx, %ebx jne .L1437 testl %eax, %eax jne .L1373 .L1437: movl %ebx, %eax testl %ebx, %ebx jne .L1373 call cudaGetLastError@PLT testl %eax, %eax je .L1342 jmp .L1373 .L1412: movl %r15d, %eax .L1373: movl %eax, %ebp .L1342: call cudaGetLastError@PLT .LEHE30: testl %ebp, %ebp jne .L1390 testl %eax, %eax jne .L1335 testl %ebp, %ebp je .L1386 .L1390: movl %ebp, %eax .L1335: movl %eax, %ebp .L1386: movq 8(%rsp), %rdi call _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev movq 504(%rsp), %rax subq %fs:40, %rax je .L1389 jmp .L1539 .L1415: endbr64 movq %rax, %rbx .L1387: movq 8(%rsp), %rdi call _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev movq 504(%rsp), %rax subq %fs:40, %rax jne .L1539 movq %rbx, %rdi .LEHB31: call _Unwind_Resume@PLT .LEHE31: .L1539: call __stack_chk_fail@PLT .L1389: addq $520, %rsp .cfi_def_cfa_offset 56 movl %ebp, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12851: .section .gcc_except_table .LLSDA12851: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12851-.LLSDACSB12851 .LLSDACSB12851: .uleb128 .LEHB30-.LFB12851 .uleb128 .LEHE30-.LEHB30 .uleb128 .L1415-.LFB12851 .uleb128 0 .uleb128 .LEHB31-.LFB12851 .uleb128 .LEHE31-.LEHB31 .uleb128 0 .uleb128 0 .LLSDACSE12851: .text .size _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0, .-_ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0 .section .rodata.str1.1 .LC70: .string "Invalid input range, passed negative size" .LC71: .string "after reduction step 1" .LC72: .string "temporary_buffer::allocate: get_temporary_buffer failed" .LC73: .string "after reduction step 2" .LC74: .string "reduce failed to synchronize" .LC75: .string "trivial_device_copy D->H failed" .section .text.startup .globl main .type main, @function main: .LFB11195: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA11195 endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 xorl %r11d, %r11d movq %rsp, %rbp .cfi_def_cfa_register 6 pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $280, %rsp .cfi_offset 15, -24 .cfi_offset 14, -32 .cfi_offset 13, -40 .cfi_offset 12, -48 .cfi_offset 3, -56 movq %fs:40, %rax movq %rax, -56(%rbp) xorl %eax, %eax leaq -136(%rbp), %rax decl %edi movq %r11, -144(%rbp) movq %rax, -152(%rbp) movb $0, -136(%rbp) jle .L1580 leaq -88(%rbp), %rbx movq 8(%rsi), %rsi leaq -184(%rbp), %rdx movq %rbx, %rdi .LEHB32: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE32: movq %rbx, %rdi call _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@PLT movq -80(%rbp), %r15 testb %al, %al je .L1581 testq %r15, %r15 je .L1582 movq -88(%rbp), %rsi movq -152(%rbp), %rdi movq %r15, %rdx call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_copyEPcPKcm@PLT .L1582: movq -80(%rbp), %rax movq -152(%rbp), %rdx movq %rax, -144(%rbp) movb $0, (%rdx,%rax) jmp .L1583 .L1581: leaq -152(%rbp), %rdi call _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@PLT movl %eax, %edx xorl %eax, %eax testb %dl, %dl jne .L1584 movq -152(%rbp), %rax movq -136(%rbp), %r12 .L1584: movq -88(%rbp), %rdx movq %r15, -144(%rbp) movq %rdx, -152(%rbp) movq -72(%rbp), %rdx movq %rdx, -136(%rbp) testq %rax, %rax je .L1585 movq %rax, -88(%rbp) movq %r12, -72(%rbp) jmp .L1583 .L1585: leaq -72(%rbp), %rax movq %rax, -88(%rbp) .L1583: movq -88(%rbp), %rax xorl %r10d, %r10d movq %rbx, %rdi movq %r10, -80(%rbp) movb $0, (%rax) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT .L1580: movq -152(%rbp), %rdi call atoi@PLT xorl %r9d, %r9d movl %eax, %r12d movq %r9, -208(%rbp) movq %r9, -200(%rbp) movq %r12, %rbx movq %r9, -192(%rbp) testq %r12, %r12 jne .L1586 .L1588: movq -208(%rbp), %rdx xorl %eax, %eax jmp .L1587 .L1586: leaq 0(,%r12,4), %rax movq %rax, %rdi movq %rax, %r15 .LEHB33: call _Znwm@PLT .LEHE33: movq %rax, %rdx movq %rax, -208(%rbp) xorl %eax, %eax movq %r15, %rcx movq %rdx, %rdi movq %r12, -200(%rbp) rep stosb movq %r12, -192(%rbp) jmp .L1588 .L1631: endbr64 movq %rax, %rbx .L1589: leaq -216(%rbp), %rdi jmp .L1661 .L1587: cmpl %ebx, %eax jnb .L1666 movl $1, (%rdx,%rax,4) incq %rax jmp .L1587 .L1666: movb _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %al leaq _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %rbx testb %al, %al jne .L1593 leaq _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1593 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE(%rip), %rax leaq __dso_handle(%rip), %r12 movq %rax, _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip) movb _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %al leaq _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %r13 testb %al, %al jne .L1596 leaq _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %r14 movq %r14, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1596 leaq _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev(%rip), %rdi movq %r12, %rdx movq %r13, %rsi call __cxa_atexit@PLT movq %r14, %rdi call __cxa_guard_release@PLT .L1596: leaq _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev(%rip), %rdi movq %r12, %rdx movq %rbx, %rsi movq %r13, 8+_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip) call __cxa_atexit@PLT leaq _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %rdi call __cxa_guard_release@PLT .L1593: movq -192(%rbp), %rax movq -208(%rbp), %rdx movq %rbx, -184(%rbp) xorl %r8d, %r8d movq %r8, -176(%rbp) leaq 0(,%rax,4), %rbx movq %r8, -168(%rbp) leaq (%rdx,%rbx), %rcx negq %rbx movq %r8, -160(%rbp) sarq $2, %rbx movq %rbx, %rax negq %rax movq %rax, %r14 leaq -184(%rbp), %rax movq %rax, -296(%rbp) movq -296(%rbp), %r8 leaq -216(%rbp), %rax movq %r14, %rsi movq %rax, -320(%rbp) movq %r8, %rdi .LEHB34: call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIiNS0_16device_allocatorIiEEE17allocate_and_copyINS1_15normal_iteratorIPKiEEEEvmT_SB_RNS1_18contiguous_storageIiS4_EE .LEHE34: leaq -272(%rbp), %rdi movq %r14, -160(%rbp) .LEHB35: call cudaEventCreate@PLT jmp .L1667 .L1632: endbr64 jmp .L1664 .L1667: leaq -264(%rbp), %rdi call cudaEventCreate@PLT movq -272(%rbp), %rdi xorl %esi, %esi call cudaEventRecord@PLT .LEHE35: imulq $-4, %rbx, %rbx xorl %edi, %edi movq -176(%rbp), %r13 movq %rdi, -256(%rbp) movq %rbx, %r14 sarq $2, %r14 testq %rbx, %rbx jns .L1601 movl $16, %edi call __cxa_allocate_exception@PLT leaq .LC70(%rip), %rsi movq %rax, %rdi movq %rax, %r15 .LEHB36: call _ZNSt13runtime_errorC1EPKc@PLT .LEHE36: movq -56(%rbp), %rax subq %fs:40, %rax jne .L1656 movq _ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx leaq _ZTISt13runtime_error(%rip), %rsi movq %r15, %rdi .LEHB37: call __cxa_throw@PLT .L1634: endbr64 movq %rax, %rbx .L1603: movq %r15, %rdi jmp .L1660 .L1601: movl $2147483647, %eax leaq -256(%rbp), %r12 salq $2, %rax cmpq %rbx, %rax jb .L1605 pushq %rsi xorl %r9d, %r9d movl %r14d, %r8d xorl %ecx, %ecx pushq $1 movq %r13, %rdx movq %r12, %rsi xorl %edi, %edi .cfi_escape 0x2e,0x10 call _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0 jmp .L1658 .L1605: pushq %rcx xorl %r9d, %r9d movq %r14, %r8 xorl %ecx, %ecx pushq $1 movq %r13, %rdx movq %r12, %rsi xorl %edi, %edi call _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0 .L1658: popq %r15 leaq .LC71(%rip), %rsi popq %rdx movl %eax, %edi .cfi_escape 0x2e,0 call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc leaq -274(%rbp), %rax xorl %r11d, %r11d movq %rax, -240(%rbp) movq -256(%rbp), %rax movq %r11, -232(%rbp) addq $4, %rax movq %r11, -224(%rbp) movq %rax, -304(%rbp) leaq -248(%rbp), %rax movq %rax, -312(%rbp) je .L1607 movq -304(%rbp), %rsi xorl %r10d, %r10d movq %rax, %rdi movq %r10, -248(%rbp) call cudaMalloc@PLT movl %eax, %r15d testl %eax, %eax je .L1608 call cudaGetLastError@PLT .LEHE37: movl $40, %edi leaq -88(%rbp), %r12 call __cxa_allocate_exception@PLT movq %rax, %r14 call _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv movl %r15d, %edx movq %r12, %rdi movq %rax, %rsi movq (%rax), %rax .LEHB38: call *48(%rax) .LEHE38: leaq -120(%rbp), %r13 movq -88(%rbp), %rsi leaq -273(%rbp), %rdx movq %r13, %rdi .LEHB39: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE39: movq %r13, %rsi movq %r14, %rdi .LEHB40: call _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .LEHE40: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -56(%rbp), %rax subq %fs:40, %rax jne .L1656 leaq _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev(%rip), %rdx leaq _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rsi movq %r14, %rdi .LEHB41: call __cxa_throw@PLT .LEHE41: .L1608: movq -248(%rbp), %rdi xorl %eax, %eax movq -304(%rbp), %rcx testq %rdi, %rdi cmovne -304(%rbp), %rax cmpq %rcx, %rax jnb .L1615 jmp .L1668 .L1639: endbr64 movq %rax, %rbx .L1612: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L1618 .L1638: endbr64 jmp .L1665 .L1637: endbr64 jmp .L1663 .L1668: call cudaFree@PLT leaq .LC68(%rip), %rsi leaq -88(%rbp), %r12 movl %eax, %edi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc movl $40, %edi call __cxa_allocate_exception@PLT movq -312(%rbp), %rdx leaq .LC72(%rip), %rsi movq %r12, %rdi movq %rax, %r14 .LEHB42: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE42: movq %r12, %rsi movq %r14, %rdi .LEHB43: call _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .LEHE43: movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -56(%rbp), %rax subq %fs:40, %rax jne .L1656 leaq _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev(%rip), %rdx leaq _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rsi movq %r14, %rdi .LEHB44: call __cxa_throw@PLT .LEHE44: .L1615: movq -304(%rbp), %rax movq %rdi, -232(%rbp) movq %rax, -224(%rbp) jmp .L1617 .L1636: endbr64 .L1665: movq %rax, %rbx .L1618: movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L1619 .L1635: endbr64 .L1663: movq %rax, %rbx .L1619: movq %r14, %rdi .L1660: call __cxa_free_exception@PLT jmp .L1604 .L1607: xorl %r9d, %r9d movq %r9, -232(%rbp) .L1617: leaq -240(%rbp), %rax movq %rax, %r15 movq %rax, %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv movq %r15, %rdi movq %rax, -304(%rbp) call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv movq -304(%rbp), %rcx leaq 4(%rax), %rdi movl $2147483647, %eax salq $2, %rax cmpq %rbx, %rax jb .L1620 pushq %r8 xorl %r9d, %r9d movl %r14d, %r8d movq %r13, %rdx pushq $1 movq %r12, %rsi .LEHB45: .cfi_escape 0x2e,0x10 call _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0 jmp .L1659 .L1620: pushq %rsi xorl %r9d, %r9d movq %r14, %r8 movq %r13, %rdx pushq $1 movq %r12, %rsi call _ZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_st.isra.0 .L1659: popq %rdx leaq .LC73(%rip), %rsi popq %rcx movl %eax, %edi .cfi_escape 0x2e,0 call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc movl $1, %edi call cudaStreamSynchronize@PLT movl %eax, %ebx call cudaGetLastError@PLT movl %eax, %edi testl %ebx, %ebx jne .L1640 testl %eax, %eax jne .L1622 .L1640: movl %ebx, %edi .L1622: leaq .LC74(%rip), %rsi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc movq %r15, %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE4dataEv movl $1, %r8d movl $2, %ecx movq -312(%rbp), %rdi movq %rax, %rsi movl $4, %edx call cudaMemcpyAsync@PLT movl $1, %edi movl %eax, %ebx call cudaStreamSynchronize@PLT leaq .LC75(%rip), %rsi movl %ebx, %edi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .LEHE45: movq %r15, %rdi movl -248(%rbp), %ebx call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv movq -264(%rbp), %rdi xorl %esi, %esi .LEHB46: call cudaEventRecord@PLT jmp .L1669 .L1633: endbr64 movq %rax, %rbx .L1625: movq %r15, %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIhNS1_18no_throw_allocatorINS1_19temporary_allocatorIhNS0_8cuda_cub3tagEEEEEE10deallocateEv jmp .L1604 .L1669: movq -264(%rbp), %rdi call cudaEventSynchronize@PLT movq -264(%rbp), %rdx movq -272(%rbp), %rsi movq %r15, %rdi call cudaEventElapsedTime@PLT movl %ebx, %esi leaq _ZSt4cout(%rip), %rbx movq %rbx, %rdi call _ZNSolsEi@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movq %rbx, %rdi cvtss2sd -240(%rbp), %xmm0 call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT .LEHE46: movq -296(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv movq -320(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv leaq -152(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -56(%rbp), %rax subq %fs:40, %rax je .L1627 jmp .L1656 .L1630: endbr64 .L1664: movq %rax, %rbx .L1604: movq -296(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiNS0_16device_allocatorIiEEE10deallocateEv movq -320(%rbp), %rdi .L1661: call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIiSaIiEE10deallocateEv jmp .L1590 .L1629: endbr64 movq %rax, %rbx .L1590: leaq -152(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -56(%rbp), %rax subq %fs:40, %rax jne .L1656 movq %rbx, %rdi .LEHB47: call _Unwind_Resume@PLT .LEHE47: .L1656: call __stack_chk_fail@PLT .L1627: leaq -40(%rbp), %rsp xorl %eax, %eax popq %rbx popq %r12 popq %r13 popq %r14 popq %r15 popq %rbp .cfi_def_cfa 7, 8 ret .cfi_endproc .LFE11195: .section .gcc_except_table .LLSDA11195: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE11195-.LLSDACSB11195 .LLSDACSB11195: .uleb128 .LEHB32-.LFB11195 .uleb128 .LEHE32-.LEHB32 .uleb128 .L1629-.LFB11195 .uleb128 0 .uleb128 .LEHB33-.LFB11195 .uleb128 .LEHE33-.LEHB33 .uleb128 .L1631-.LFB11195 .uleb128 0 .uleb128 .LEHB34-.LFB11195 .uleb128 .LEHE34-.LEHB34 .uleb128 .L1632-.LFB11195 .uleb128 0 .uleb128 .LEHB35-.LFB11195 .uleb128 .LEHE35-.LEHB35 .uleb128 .L1630-.LFB11195 .uleb128 0 .uleb128 .LEHB36-.LFB11195 .uleb128 .LEHE36-.LEHB36 .uleb128 .L1634-.LFB11195 .uleb128 0 .uleb128 .LEHB37-.LFB11195 .uleb128 .LEHE37-.LEHB37 .uleb128 .L1630-.LFB11195 .uleb128 0 .uleb128 .LEHB38-.LFB11195 .uleb128 .LEHE38-.LEHB38 .uleb128 .L1637-.LFB11195 .uleb128 0 .uleb128 .LEHB39-.LFB11195 .uleb128 .LEHE39-.LEHB39 .uleb128 .L1638-.LFB11195 .uleb128 0 .uleb128 .LEHB40-.LFB11195 .uleb128 .LEHE40-.LEHB40 .uleb128 .L1639-.LFB11195 .uleb128 0 .uleb128 .LEHB41-.LFB11195 .uleb128 .LEHE41-.LEHB41 .uleb128 .L1630-.LFB11195 .uleb128 0 .uleb128 .LEHB42-.LFB11195 .uleb128 .LEHE42-.LEHB42 .uleb128 .L1635-.LFB11195 .uleb128 0 .uleb128 .LEHB43-.LFB11195 .uleb128 .LEHE43-.LEHB43 .uleb128 .L1636-.LFB11195 .uleb128 0 .uleb128 .LEHB44-.LFB11195 .uleb128 .LEHE44-.LEHB44 .uleb128 .L1630-.LFB11195 .uleb128 0 .uleb128 .LEHB45-.LFB11195 .uleb128 .LEHE45-.LEHB45 .uleb128 .L1633-.LFB11195 .uleb128 0 .uleb128 .LEHB46-.LFB11195 .uleb128 .LEHE46-.LEHB46 .uleb128 .L1630-.LFB11195 .uleb128 0 .uleb128 .LEHB47-.LFB11195 .uleb128 .LEHE47-.LEHB47 .uleb128 0 .uleb128 0 .LLSDACSE11195: .section .text.startup .size main, .-main .weak _ZTSN4cuda3__410cuda_errorE .section .rodata._ZTSN4cuda3__410cuda_errorE,"aG",@progbits,_ZTSN4cuda3__410cuda_errorE,comdat .align 16 .type _ZTSN4cuda3__410cuda_errorE, @object .size _ZTSN4cuda3__410cuda_errorE, 24 _ZTSN4cuda3__410cuda_errorE: .string "N4cuda3__410cuda_errorE" .weak _ZTIN4cuda3__410cuda_errorE .section .data.rel.ro._ZTIN4cuda3__410cuda_errorE,"awG",@progbits,_ZTIN4cuda3__410cuda_errorE,comdat .align 8 .type _ZTIN4cuda3__410cuda_errorE, @object .size _ZTIN4cuda3__410cuda_errorE, 24 _ZTIN4cuda3__410cuda_errorE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN4cuda3__410cuda_errorE .quad _ZTISt13runtime_error .weak _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, 55 _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE: .string "N6thrust20THRUST_200700_890_NS6system14error_categoryE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, 16 _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE .weak _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 70 _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE: .string "N6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .quad _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE .weak _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 69 _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE: .string "N6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .quad _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE .weak _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 76 _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE: .string "N6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .quad _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE .weak _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, 53 _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE: .string "N6thrust20THRUST_200700_890_NS6system12system_errorE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE .quad _ZTISt13runtime_error .weak _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 56 _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE: .string "N6thrust20THRUST_200700_890_NS6system6detail9bad_allocE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .quad _ZTISt9bad_alloc .weak _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, @object .size _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, 74 _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE: .string "N6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE" .weak _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, @object .size _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, 16 _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE .weak _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, @object .size _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, 135 _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE: .string "N6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE" .weak _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, @object .size _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, 16 _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE .weak _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 193 _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE: .string "N6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .quad _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE .weak _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object .size _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 228 _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE: .string "N6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE" .weak _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object .size _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 24 _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .quad _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE .weak _ZTVN4cuda3__410cuda_errorE .section .data.rel.ro._ZTVN4cuda3__410cuda_errorE,"awG",@progbits,_ZTVN4cuda3__410cuda_errorE,comdat .align 8 .type _ZTVN4cuda3__410cuda_errorE, @object .size _ZTVN4cuda3__410cuda_errorE, 40 _ZTVN4cuda3__410cuda_errorE: .quad 0 .quad _ZTIN4cuda3__410cuda_errorE .quad _ZN4cuda3__410cuda_errorD1Ev .quad _ZN4cuda3__410cuda_errorD0Ev .quad _ZNKSt13runtime_error4whatEv .weak _ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 72 _ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .quad _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei .weak _ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 72 _ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .quad _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei .weak _ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 72 _ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .quad _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv .quad _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .quad _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei .weak _ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, 40 _ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE .quad _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv .weak _ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 40 _ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .quad _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv .weak _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 56 _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .quad _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev .quad _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm .quad _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm .quad _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_ .weak _ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object .size _ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 56 _ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .quad _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev .quad _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev .quad _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm .quad _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm .quad _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_ .weak _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d .section .bss._ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat .align 8 .type _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object .size _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8 _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d: .zero 8 .weak _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d .section .bss._ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat .align 8 .type _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object .size _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8 _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d: .zero 8 .weak _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr .section .bss._ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr, 8 _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr .section .bss._ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr,comdat .align 32 .type _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr, 48 _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr: .zero 48 .weak _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name .section .bss._ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name, 8 _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name .section .bss._ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name,comdat .align 8 .type _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name, 8 _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEilEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_name: .zero 8 .weak _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr .section .bss._ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr, 8 _ZGVZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr .section .bss._ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr,comdat .align 32 .type _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS12DeviceReduce6ReduceIN6thrust20THRUST_200700_890_NS6detail15normal_iteratorINS4_10device_ptrIiEEEEPiNS4_4plusIiEEiiEE9cudaErrorPvRmT_T0_T3_T1_T2_P11CUstream_stE21__cub_nvtx3_func_attr, 48 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_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, 16 _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource: .zero 16 .weak _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache 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@gnu_unique_object .size _ZN4cuda3std3__45__cpo4rendE, 1 _ZN4cuda3std3__45__cpo4rendE: .zero 1 .weak _ZN4cuda3std3__45__cpo6rbeginE .section .rodata._ZN4cuda3std3__45__cpo6rbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6rbeginE,comdat .type _ZN4cuda3std3__45__cpo6rbeginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo6rbeginE, 1 _ZN4cuda3std3__45__cpo6rbeginE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo8distanceE .section .rodata._ZN4cuda3std6ranges3__45__cpo8distanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo8distanceE,comdat .type _ZN4cuda3std6ranges3__45__cpo8distanceE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo8distanceE, 1 _ZN4cuda3std6ranges3__45__cpo8distanceE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5ssizeE .section .rodata._ZN4cuda3std6ranges3__45__cpo5ssizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5ssizeE,comdat .type _ZN4cuda3std6ranges3__45__cpo5ssizeE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5ssizeE, 1 _ZN4cuda3std6ranges3__45__cpo5ssizeE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4sizeE .section .rodata._ZN4cuda3std6ranges3__45__cpo4sizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4sizeE,comdat .type _ZN4cuda3std6ranges3__45__cpo4sizeE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4sizeE, 1 _ZN4cuda3std6ranges3__45__cpo4sizeE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5cdataE .section .rodata._ZN4cuda3std6ranges3__45__cpo5cdataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5cdataE,comdat .type _ZN4cuda3std6ranges3__45__cpo5cdataE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5cdataE, 1 _ZN4cuda3std6ranges3__45__cpo5cdataE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4dataE .section .rodata._ZN4cuda3std6ranges3__45__cpo4dataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4dataE,comdat .type _ZN4cuda3std6ranges3__45__cpo4dataE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4dataE, 1 _ZN4cuda3std6ranges3__45__cpo4dataE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4prevE .section .rodata._ZN4cuda3std6ranges3__45__cpo4prevE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4prevE,comdat .type _ZN4cuda3std6ranges3__45__cpo4prevE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4prevE, 1 _ZN4cuda3std6ranges3__45__cpo4prevE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4nextE .section .rodata._ZN4cuda3std6ranges3__45__cpo4nextE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4nextE,comdat .type _ZN4cuda3std6ranges3__45__cpo4nextE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4nextE, 1 _ZN4cuda3std6ranges3__45__cpo4nextE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo9iter_swapE .section .rodata._ZN4cuda3std6ranges3__45__cpo9iter_swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_swapE,comdat .type _ZN4cuda3std6ranges3__45__cpo9iter_swapE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo9iter_swapE, 1 _ZN4cuda3std6ranges3__45__cpo9iter_swapE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4cendE .section .rodata._ZN4cuda3std6ranges3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4cendE,comdat .type _ZN4cuda3std6ranges3__45__cpo4cendE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4cendE, 1 _ZN4cuda3std6ranges3__45__cpo4cendE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo6cbeginE .section .rodata._ZN4cuda3std6ranges3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo6cbeginE,comdat .type _ZN4cuda3std6ranges3__45__cpo6cbeginE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo6cbeginE, 1 _ZN4cuda3std6ranges3__45__cpo6cbeginE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo3endE .section .rodata._ZN4cuda3std6ranges3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo3endE,comdat .type _ZN4cuda3std6ranges3__45__cpo3endE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo3endE, 1 _ZN4cuda3std6ranges3__45__cpo3endE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5beginE .section .rodata._ZN4cuda3std6ranges3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5beginE,comdat .type _ZN4cuda3std6ranges3__45__cpo5beginE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5beginE, 1 _ZN4cuda3std6ranges3__45__cpo5beginE: .zero 1 .weak _ZN4cuda3std3__47nulloptE .section .rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat .type _ZN4cuda3std3__47nulloptE, @gnu_unique_object .size _ZN4cuda3std3__47nulloptE, 1 _ZN4cuda3std3__47nulloptE: .zero 1 .hidden InitializeInjectionNvtx2_fnptr .weak InitializeInjectionNvtx2_fnptr .bss .align 8 .type InitializeInjectionNvtx2_fnptr, @object .size InitializeInjectionNvtx2_fnptr, 8 InitializeInjectionNvtx2_fnptr: .zero 8 .hidden nvtxGlobals_v3 .weak nvtxGlobals_v3 .section .data.rel.local,"aw" .align 32 .type nvtxGlobals_v3, @object .size nvtxGlobals_v3, 1168 nvtxGlobals_v3: .long 0 .zero 4 .quad 16 .quad nvtxEtiGetModuleFunctionTable_v3 .quad 24 .long 3 .long 0 .quad nvtxEtiSetInjectionNvtxVersion_v3 .quad nvtxMarkEx_impl_init_v3 .quad nvtxMarkA_impl_init_v3 .quad nvtxMarkW_impl_init_v3 .quad nvtxRangeStartEx_impl_init_v3 .quad nvtxRangeStartA_impl_init_v3 .quad nvtxRangeStartW_impl_init_v3 .quad nvtxRangeEnd_impl_init_v3 .quad nvtxRangePushEx_impl_init_v3 .quad nvtxRangePushA_impl_init_v3 .quad nvtxRangePushW_impl_init_v3 .quad nvtxRangePop_impl_init_v3 .quad nvtxNameCategoryA_impl_init_v3 .quad nvtxNameCategoryW_impl_init_v3 .quad nvtxNameOsThreadA_impl_init_v3 .quad nvtxNameOsThreadW_impl_init_v3 .quad nvtxNameCuDeviceA_impl_init_v3 .quad nvtxNameCuDeviceW_impl_init_v3 .quad nvtxNameCuContextA_impl_init_v3 .quad nvtxNameCuContextW_impl_init_v3 .quad nvtxNameCuStreamA_impl_init_v3 .quad nvtxNameCuStreamW_impl_init_v3 .quad nvtxNameCuEventA_impl_init_v3 .quad nvtxNameCuEventW_impl_init_v3 .quad nvtxNameClDeviceA_impl_init_v3 .quad nvtxNameClDeviceW_impl_init_v3 .quad nvtxNameClContextA_impl_init_v3 .quad nvtxNameClContextW_impl_init_v3 .quad nvtxNameClCommandQueueA_impl_init_v3 .quad nvtxNameClCommandQueueW_impl_init_v3 .quad nvtxNameClMemObjectA_impl_init_v3 .quad nvtxNameClMemObjectW_impl_init_v3 .quad nvtxNameClSamplerA_impl_init_v3 .quad nvtxNameClSamplerW_impl_init_v3 .quad nvtxNameClProgramA_impl_init_v3 .quad nvtxNameClProgramW_impl_init_v3 .quad nvtxNameClEventA_impl_init_v3 .quad nvtxNameClEventW_impl_init_v3 .quad nvtxNameCudaDeviceA_impl_init_v3 .quad nvtxNameCudaDeviceW_impl_init_v3 .quad nvtxNameCudaStreamA_impl_init_v3 .quad nvtxNameCudaStreamW_impl_init_v3 .quad nvtxNameCudaEventA_impl_init_v3 .quad nvtxNameCudaEventW_impl_init_v3 .quad nvtxDomainMarkEx_impl_init_v3 .quad nvtxDomainRangeStartEx_impl_init_v3 .quad nvtxDomainRangeEnd_impl_init_v3 .quad nvtxDomainRangePushEx_impl_init_v3 .quad nvtxDomainRangePop_impl_init_v3 .quad nvtxDomainResourceCreate_impl_init_v3 .quad nvtxDomainResourceDestroy_impl_init_v3 .quad nvtxDomainNameCategoryA_impl_init_v3 .quad nvtxDomainNameCategoryW_impl_init_v3 .quad nvtxDomainRegisterStringA_impl_init_v3 .quad nvtxDomainRegisterStringW_impl_init_v3 .quad nvtxDomainCreateA_impl_init_v3 .quad nvtxDomainCreateW_impl_init_v3 .quad nvtxDomainDestroy_impl_init_v3 .quad nvtxInitialize_impl_init_v3 .quad nvtxDomainSyncUserCreate_impl_init_v3 .quad nvtxDomainSyncUserDestroy_impl_init_v3 .quad nvtxDomainSyncUserAcquireStart_impl_init_v3 .quad nvtxDomainSyncUserAcquireFailed_impl_init_v3 .quad nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .quad nvtxDomainSyncUserReleasing_impl_init_v3 .quad 0 .quad nvtxGlobals_v3+48 .quad nvtxGlobals_v3+56 .quad nvtxGlobals_v3+64 .quad nvtxGlobals_v3+72 .quad nvtxGlobals_v3+80 .quad nvtxGlobals_v3+88 .quad nvtxGlobals_v3+96 .quad nvtxGlobals_v3+104 .quad nvtxGlobals_v3+112 .quad nvtxGlobals_v3+120 .quad nvtxGlobals_v3+128 .quad nvtxGlobals_v3+136 .quad nvtxGlobals_v3+144 .quad nvtxGlobals_v3+152 .quad nvtxGlobals_v3+160 .quad 0 .quad 0 .quad nvtxGlobals_v3+168 .quad nvtxGlobals_v3+176 .quad nvtxGlobals_v3+184 .quad nvtxGlobals_v3+192 .quad nvtxGlobals_v3+200 .quad nvtxGlobals_v3+208 .quad nvtxGlobals_v3+216 .quad nvtxGlobals_v3+224 .quad 0 .quad 0 .quad nvtxGlobals_v3+232 .quad nvtxGlobals_v3+240 .quad nvtxGlobals_v3+248 .quad nvtxGlobals_v3+256 .quad nvtxGlobals_v3+264 .quad nvtxGlobals_v3+272 .quad nvtxGlobals_v3+280 .quad nvtxGlobals_v3+288 .quad nvtxGlobals_v3+296 .quad nvtxGlobals_v3+304 .quad nvtxGlobals_v3+312 .quad nvtxGlobals_v3+320 .quad nvtxGlobals_v3+328 .quad nvtxGlobals_v3+336 .quad 0 .quad 0 .quad nvtxGlobals_v3+344 .quad nvtxGlobals_v3+352 .quad nvtxGlobals_v3+360 .quad nvtxGlobals_v3+368 .quad nvtxGlobals_v3+376 .quad nvtxGlobals_v3+384 .quad 0 .quad 0 .quad nvtxGlobals_v3+392 .quad nvtxGlobals_v3+400 .quad nvtxGlobals_v3+408 .quad nvtxGlobals_v3+416 .quad nvtxGlobals_v3+424 .quad nvtxGlobals_v3+432 .quad nvtxGlobals_v3+440 .quad nvtxGlobals_v3+448 .quad nvtxGlobals_v3+456 .quad nvtxGlobals_v3+464 .quad nvtxGlobals_v3+472 .quad nvtxGlobals_v3+480 .quad nvtxGlobals_v3+488 .quad nvtxGlobals_v3+496 .quad nvtxGlobals_v3+504 .quad 0 .quad 0 .quad nvtxGlobals_v3+512 .quad nvtxGlobals_v3+520 .quad nvtxGlobals_v3+528 .quad nvtxGlobals_v3+536 .quad nvtxGlobals_v3+544 .quad nvtxGlobals_v3+552 .quad 0 .section .rodata .type _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object .size _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1 _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, @object .size _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1 _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE: .zero 1 .weak _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result .section .bss._ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat .align 8 .type _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object .size _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8 _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result: .zero 8 .weak _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result .section .bss._ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat .align 8 .type _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8 _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result: .zero 8 .weak _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result .section .bss._ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,comdat .align 8 .type _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object .size _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8 _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result: .zero 8 .weak _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result .section .bss._ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,comdat .align 8 .type _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8 _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result: .zero 8 .weak _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result .section .bss._ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,comdat .align 8 .type _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object .size _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, 8 _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result: .zero 8 .weak _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result .section .bss._ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,comdat .align 8 .type _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, 8 _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result: .zero 8 .weak _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err .section .bss._ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat .align 8 .type _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object .size _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 8 _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err: .zero 8 .weak _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err .section .bss._ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat .align 32 .type _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object .size _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 32 _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err: .zero 32 .section .rodata .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E: .zero 1 .weak _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count .section .bss._ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 8 _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count .section .bss._ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat .align 4 .type _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 4 _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count: .zero 4 .section .rodata .type _ZN6thrust20THRUST_200700_890_NSL3seqE, @object .size _ZN6thrust20THRUST_200700_890_NSL3seqE, 1 _ZN6thrust20THRUST_200700_890_NSL3seqE: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, @object .size _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, 1 _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo7advanceE .section .rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat .type _ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo7advanceE, 1 _ZN4cuda3std6ranges3__45__cpo7advanceE: .zero 1 .hidden _ZN4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE .weak _ZN4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE .section .rodata._ZN4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE,"aG",@progbits,_ZN4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE,comdat .type _ZN4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE, @gnu_unique_object .size _ZN4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE, 1 _ZN4cuda3std3__448_GLOBAL__N__0da1b259_19_reduction_thrust_cu_main6ignoreE: .zero 1 .weak _ZN4cuda3std3__48in_placeE .section .rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat .type _ZN4cuda3std3__48in_placeE, @gnu_unique_object .size _ZN4cuda3std3__48in_placeE, 1 _ZN4cuda3std3__48in_placeE: .zero 1 .weak _ZN4cuda3std3__45__cpo4cendE .section .rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat .type _ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo4cendE, 1 _ZN4cuda3std3__45__cpo4cendE: .zero 1 .weak _ZN4cuda3std3__45__cpo6cbeginE .section .rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat .type _ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo6cbeginE, 1 _ZN4cuda3std3__45__cpo6cbeginE: .zero 1 .weak _ZN4cuda3std3__45__cpo3endE .section .rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat .type _ZN4cuda3std3__45__cpo3endE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo3endE, 1 _ZN4cuda3std3__45__cpo3endE: .zero 1 .weak _ZN4cuda3std3__45__cpo5beginE .section .rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat .type _ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo5beginE, 1 _ZN4cuda3std3__45__cpo5beginE: .zero 1 .weak _ZN4cuda3std3__419piecewise_constructE .section .rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat .type _ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object .size _ZN4cuda3std3__419piecewise_constructE, 1 _ZN4cuda3std3__419piecewise_constructE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo9iter_moveE .section .rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat .type _ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1 _ZN4cuda3std6ranges3__45__cpo9iter_moveE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4swapE .section .rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat .type _ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4swapE, 1 _ZN4cuda3std6ranges3__45__cpo4swapE: .zero 1 .hidden DW.ref.__gxx_personality_v0 .weak DW.ref.__gxx_personality_v0 .section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat .align 8 .type DW.ref.__gxx_personality_v0, @object .size DW.ref.__gxx_personality_v0, 8 DW.ref.__gxx_personality_v0: .quad __gxx_personality_v0 .hidden __dso_handle .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c */ /* 0x000fe20003f05270 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fd80000000a00 */ /*0030*/ @!P0 BRA 0x3660 ; /* 0x0000362000008947 */ /* 0x000fea0003800000 */ /*0040*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0050*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */ /* 0x000fe200078e00ff */ /*0060*/ BSSY B0, 0x35f0 ; /* 0x0000358000007945 */ /* 0x000fe80003800000 */ /*0070*/ LOP3.LUT P0, RZ, R2, 0xf, RZ, 0xc0, !PT ; /* 0x0000000f02ff7812 */ /* 0x000fda000780c0ff */ /*0080*/ @!P0 BRA 0x1be0 ; /* 0x00001b5000008947 */ /* 0x000fea0003800000 */ /*0090*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff027624 */ /* 0x000fca00078e00ff */ /*00a0*/ ISETP.GE.AND P0, PT, R2, 0x1000, PT ; /* 0x000010000200780c */ /* 0x000fda0003f06270 */ /*00b0*/ @!P0 BRA 0xec0 ; /* 0x00000e0000008947 */ /* 0x000fea0003800000 */ /*00c0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*00d0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x001fca00078e0205 */ /*00e0*/ LDG.E.CONSTANT R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000ea8000c1e9900 */ /*00f0*/ LDG.E.CONSTANT R6, [R4.64+0x400] ; /* 0x0004000404067981 */ /* 0x000ea8000c1e9900 */ /*0100*/ LDG.E.CONSTANT R7, [R4.64+0x800] ; /* 0x0008000404077981 */ /* 0x000ea8000c1e9900 */ /*0110*/ LDG.E.CONSTANT R8, [R4.64+0xc00] ; /* 0x000c000404087981 */ /* 0x000ee8000c1e9900 */ /*0120*/ LDG.E.CONSTANT R9, [R4.64+0x1000] ; /* 0x0010000404097981 */ /* 0x000ee8000c1e9900 */ /*0130*/ LDG.E.CONSTANT R10, [R4.64+0x1400] ; /* 0x00140004040a7981 */ /* 0x000f28000c1e9900 */ /*0140*/ LDG.E.CONSTANT R11, [R4.64+0x1800] ; /* 0x00180004040b7981 */ /* 0x000f28000c1e9900 */ /*0150*/ LDG.E.CONSTANT R12, [R4.64+0x1c00] ; /* 0x001c0004040c7981 */ /* 0x000f68000c1e9900 */ /*0160*/ LDG.E.CONSTANT R13, [R4.64+0x2000] ; /* 0x00200004040d7981 */ /* 0x000f68000c1e9900 */ /*0170*/ LDG.E.CONSTANT R14, [R4.64+0x2400] ; /* 0x00240004040e7981 */ /* 0x000f68000c1e9900 */ /*0180*/ LDG.E.CONSTANT R15, [R4.64+0x2800] ; /* 0x00280004040f7981 */ /* 0x000f68000c1e9900 */ /*0190*/ LDG.E.CONSTANT R16, [R4.64+0x2c00] ; /* 0x002c000404107981 */ /* 0x000f68000c1e9900 */ /*01a0*/ LDG.E.CONSTANT R17, [R4.64+0x3000] ; /* 0x0030000404117981 */ /* 0x000f68000c1e9900 */ /*01b0*/ LDG.E.CONSTANT R18, [R4.64+0x3400] ; /* 0x0034000404127981 */ /* 0x000f68000c1e9900 */ /*01c0*/ LDG.E.CONSTANT R19, [R4.64+0x3800] ; /* 0x0038000404137981 */ /* 0x000f68000c1e9900 */ /*01d0*/ LDG.E.CONSTANT R20, [R4.64+0x3c00] ; /* 0x003c000404147981 */ /* 0x000f62000c1e9900 */ /*01e0*/ ISETP.GE.AND P0, PT, R2, 0x2000, PT ; /* 0x000020000200780c */ /* 0x000fc40003f06270 */ /*01f0*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x004fc80007ffe003 */ /*0200*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fe20007ffe003 */ /*0210*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1000 ; /* 0x00001000ff097424 */ /* 0x000fc600078e00ff */ /*0220*/ IADD3 R3, R11, R10, R3 ; /* 0x0000000a0b037210 */ /* 0x010fc80007ffe003 */ /*0230*/ IADD3 R3, R13, R12, R3 ; /* 0x0000000c0d037210 */ /* 0x020fc80007ffe003 */ /*0240*/ IADD3 R3, R15, R14, R3 ; /* 0x0000000e0f037210 */ /* 0x000fc80007ffe003 */ /*0250*/ IADD3 R3, R17, R16, R3 ; /* 0x0000001011037210 */ /* 0x000fc80007ffe003 */ /*0260*/ IADD3 R3, R19, R18, R3 ; /* 0x0000001213037210 */ /* 0x000fca0007ffe003 */ /*0270*/ IMAD.IADD R6, R20, 0x1, R3 ; /* 0x0000000114067824 */ /* 0x000fe200078e0203 */ /*0280*/ @!P0 BRA 0x4f0 ; /* 0x0000026000008947 */ /* 0x000fea0003800000 */ /*0290*/ IADD3 R8, R2, -0x1000, RZ ; /* 0xfffff00002087810 */ /* 0x000fe20007ffe0ff */ /*02a0*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0004 */ /*02b0*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0005 */ /*02c0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1000 ; /* 0x00001000ff097424 */ /* 0x000fe400078e00ff */ /*02d0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fe400078e0008 */ /*02e0*/ LDG.E.CONSTANT R5, [R2.64+0x4000] ; /* 0x0040000402057981 */ /* 0x000ea8000c1e9900 */ /*02f0*/ LDG.E.CONSTANT R7, [R2.64+0x4400] ; /* 0x0044000402077981 */ /* 0x000ea8000c1e9900 */ /*0300*/ LDG.E.CONSTANT R10, [R2.64+0x4800] ; /* 0x00480004020a7981 */ /* 0x0000e8000c1e9900 */ /*0310*/ LDG.E.CONSTANT R11, [R2.64+0x4c00] ; /* 0x004c0004020b7981 */ /* 0x0000e8000c1e9900 */ /*0320*/ LDG.E.CONSTANT R12, [R2.64+0x5000] ; /* 0x00500004020c7981 */ /* 0x000128000c1e9900 */ /*0330*/ LDG.E.CONSTANT R13, [R2.64+0x5400] ; /* 0x00540004020d7981 */ /* 0x000128000c1e9900 */ /*0340*/ LDG.E.CONSTANT R14, [R2.64+0x5800] ; /* 0x00580004020e7981 */ /* 0x000168000c1e9900 */ /*0350*/ LDG.E.CONSTANT R15, [R2.64+0x5c00] ; /* 0x005c0004020f7981 */ /* 0x000168000c1e9900 */ /*0360*/ LDG.E.CONSTANT R16, [R2.64+0x6000] ; /* 0x0060000402107981 */ /* 0x000168000c1e9900 */ /*0370*/ LDG.E.CONSTANT R17, [R2.64+0x6400] ; /* 0x0064000402117981 */ /* 0x000168000c1e9900 */ /*0380*/ LDG.E.CONSTANT R18, [R2.64+0x6800] ; /* 0x0068000402127981 */ /* 0x000168000c1e9900 */ /*0390*/ LDG.E.CONSTANT R19, [R2.64+0x6c00] ; /* 0x006c000402137981 */ /* 0x000168000c1e9900 */ /*03a0*/ LDG.E.CONSTANT R20, [R2.64+0x7000] ; /* 0x0070000402147981 */ /* 0x000168000c1e9900 */ /*03b0*/ LDG.E.CONSTANT R21, [R2.64+0x7400] ; /* 0x0074000402157981 */ /* 0x000168000c1e9900 */ /*03c0*/ LDG.E.CONSTANT R22, [R2.64+0x7800] ; /* 0x0078000402167981 */ /* 0x000168000c1e9900 */ /*03d0*/ LDG.E.CONSTANT R23, [R2.64+0x7c00] ; /* 0x007c000402177981 */ /* 0x000162000c1e9900 */ /*03e0*/ ISETP.GE.AND P0, PT, R4, 0x1000, PT ; /* 0x000010000400780c */ /* 0x000fc40003f06270 */ /*03f0*/ IADD3 R5, R7, R5, R6 ; /* 0x0000000507057210 */ /* 0x004fe40007ffe006 */ /*0400*/ IADD3 R7, P1, R2, 0x4000, RZ ; /* 0x0000400002077810 */ /* 0x000fca0007f3e0ff */ /*0410*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */ /* 0x001fe200008e0603 */ /*0420*/ IADD3 R5, R11, R10, R5 ; /* 0x0000000a0b057210 */ /* 0x008fc80007ffe005 */ /*0430*/ IADD3 R5, R13, R12, R5 ; /* 0x0000000c0d057210 */ /* 0x010fc80007ffe005 */ /*0440*/ IADD3 R5, R15, R14, R5 ; /* 0x0000000e0f057210 */ /* 0x020fc80007ffe005 */ /*0450*/ IADD3 R5, R17, R16, R5 ; /* 0x0000001011057210 */ /* 0x000fc80007ffe005 */ /*0460*/ IADD3 R5, R19, R18, R5 ; /* 0x0000001213057210 */ /* 0x000fc80007ffe005 */ /*0470*/ IADD3 R5, R21, R20, R5 ; /* 0x0000001415057210 */ /* 0x000fc80007ffe005 */ /*0480*/ IADD3 R6, R23, R22, R5 ; /* 0x0000001617067210 */ /* 0x000fe20007ffe005 */ /*0490*/ @!P0 BRA 0xc50 ; /* 0x000007b000008947 */ /* 0x000fea0003800000 */ /*04a0*/ IADD3 R9, R9, 0x1000, RZ ; /* 0x0000100009097810 */ /* 0x000fe20007ffe0ff */ /*04b0*/ IMAD.MOV.U32 R2, RZ, RZ, R7 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0007 */ /*04c0*/ IADD3 R4, R4, -0x1000, RZ ; /* 0xfffff00004047810 */ /* 0x000fe40007ffe0ff */ /*04d0*/ ISETP.GT.AND P0, PT, R9, R8, PT ; /* 0x000000080900720c */ /* 0x000fda0003f04270 */ /*04e0*/ @!P0 BRA 0x2e0 ; /* 0xfffffdf000008947 */ /* 0x000fea000383ffff */ /*04f0*/ ISETP.GE.AND P0, PT, R9, c[0x0][0x170], PT ; /* 0x00005c0009007a0c */ /* 0x000fda0003f06270 */ /*0500*/ @P0 BRA 0xc50 ; /* 0x0000074000000947 */ /* 0x000fea0003800000 */ /*0510*/ IADD3 R7, -R9, c[0x0][0x170], RZ ; /* 0x00005c0009077a10 */ /* 0x000fe20007ffe1ff */ /*0520*/ BSSY B1, 0xc50 ; /* 0x0000072000017945 */ /* 0x000fe60003800000 */ /*0530*/ ISETP.GE.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x000fda0003f06270 */ /*0540*/ @P0 BRA 0xc40 ; /* 0x000006f000000947 */ /* 0x000fea0003800000 */ /*0550*/ LOP3.LUT R2, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff027212 */ /* 0x000fe200078e33ff */ /*0560*/ BSSY B2, 0x6c0 ; /* 0x0000015000027945 */ /* 0x000fe20003800000 */ /*0570*/ IMAD.MOV.U32 R8, RZ, RZ, R0 ; /* 0x000000ffff087224 */ /* 0x000fe400078e0000 */ /*0580*/ IADD3 R3, -R9, c[0x0][0x170], R2 ; /* 0x00005c0009037a10 */ /* 0x000fc80007ffe102 */ /*0590*/ LEA.HI R2, R3.reuse, 0x1, RZ, 0x18 ; /* 0x0000000103027811 */ /* 0x040fe400078fc0ff */ /*05a0*/ ISETP.GE.U32.AND P1, PT, R3, 0x300, PT ; /* 0x000003000300780c */ /* 0x000fe40003f26070 */ /*05b0*/ LOP3.LUT P0, R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */ /* 0x000fda000780c0ff */ /*05c0*/ @!P0 BRA 0x6b0 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*05d0*/ IMAD.IADD R2, R0, 0x1, R9 ; /* 0x0000000100027824 */ /* 0x000fe400078e0209 */ /*05e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fe400078e00ff */ /*05f0*/ IMAD.MOV.U32 R8, RZ, RZ, R0 ; /* 0x000000ffff087224 */ /* 0x000fe400078e0000 */ /*0600*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fc800078e0203 */ /*0610*/ IMAD.MOV.U32 R5, RZ, RZ, R3 ; /* 0x000000ffff057224 */ /* 0x000fc800078e0003 */ /*0620*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */ /* 0x000fcc00078e0005 */ /*0630*/ LDG.E.CONSTANT R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x0000a2000c1e9900 */ /*0640*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */ /* 0x000fe40007ffe0ff */ /*0650*/ IADD3 R8, R8, 0x100, RZ ; /* 0x0000010008087810 */ /* 0x000fe40007ffe0ff */ /*0660*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe40003f05270 */ /*0670*/ IADD3 R2, P2, R2, 0x400, RZ ; /* 0x0000040002027810 */ /* 0x001fca0007f5e0ff */ /*0680*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x000fe400010e0605 */ /*0690*/ IMAD.IADD R6, R3, 0x1, R6 ; /* 0x0000000103067824 */ /* 0x004fc800078e0206 */ /*06a0*/ @P0 BRA 0x620 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*06b0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*06c0*/ @!P1 BRA 0xc40 ; /* 0x0000057000009947 */ /* 0x000fea0003800000 */ /*06d0*/ IMAD.IADD R2, R7, 0x1, -R8 ; /* 0x0000000107027824 */ /* 0x000fe200078e0a08 */ /*06e0*/ BSSY B2, 0xa10 ; /* 0x0000032000027945 */ /* 0x000fe20003800000 */ /*06f0*/ IMAD.IADD R9, R8, 0x1, R9 ; /* 0x0000000108097824 */ /* 0x000fe200078e0209 */ /*0700*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f070 */ /*0710*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fe200078e00ff */ /*0720*/ ISETP.GT.AND P1, PT, R2, 0xc00, PT ; /* 0x00000c000200780c */ /* 0x000fe40003f24270 */ /*0730*/ IADD3 R10, R9.reuse, 0x300, RZ ; /* 0x00000300090a7810 */ /* 0x040fe20007ffe0ff */ /*0740*/ IMAD.WIDE R4, R9.reuse, R3.reuse, c[0x0][0x160] ; /* 0x0000580009047625 */ /* 0x0c0fe200078e0203 */ /*0750*/ IADD3 R12, R9.reuse, 0x200, RZ ; /* 0x00000200090c7810 */ /* 0x040fe40007ffe0ff */ /*0760*/ IADD3 R2, R9, 0x100, RZ ; /* 0x0000010009027810 */ /* 0x000fe20007ffe0ff */ /*0770*/ IMAD.WIDE R10, R10, R3, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fc800078e0203 */ /*0780*/ IMAD.WIDE R12, R12, R3, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x000fc800078e0203 */ /*0790*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fe200078e0203 */ /*07a0*/ @!P1 BRA 0xa00 ; /* 0x0000025000009947 */ /* 0x000fea0003800000 */ /*07b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*07c0*/ IADD3 R9, R7, -0xc00, RZ ; /* 0xfffff40007097810 */ /* 0x000fe40007ffe0ff */ /*07d0*/ LDG.E.CONSTANT R19, [R4.64] ; /* 0x0000000404137981 */ /* 0x0000a8000c1e9900 */ /*07e0*/ LDG.E.CONSTANT R18, [R2.64] ; /* 0x0000000402127981 */ /* 0x0002a8000c1e9900 */ /*07f0*/ LDG.E.CONSTANT R21, [R12.64] ; /* 0x000000040c157981 */ /* 0x000728000c1e9900 */ /*0800*/ LDG.E.CONSTANT R20, [R10.64] ; /* 0x000000040a147981 */ /* 0x000b28000c1e9900 */ /*0810*/ LDG.E.CONSTANT R23, [R4.64+0x1000] ; /* 0x0010000404177981 */ /* 0x000128000c1e9900 */ /*0820*/ LDG.E.CONSTANT R22, [R2.64+0x1000] ; /* 0x0010000402167981 */ /* 0x000328000c1e9900 */ /*0830*/ LDG.E.CONSTANT R25, [R12.64+0x1000] ; /* 0x001000040c197981 */ /* 0x000728000c1e9900 */ /*0840*/ LDG.E.CONSTANT R24, [R10.64+0x1000] ; /* 0x001000040a187981 */ /* 0x000b28000c1e9900 */ /*0850*/ LDG.E.CONSTANT R27, [R4.64+0x2000] ; /* 0x00200004041b7981 */ /* 0x000128000c1e9900 */ /*0860*/ LDG.E.CONSTANT R26, [R2.64+0x2000] ; /* 0x00200004021a7981 */ /* 0x000328000c1e9900 */ /*0870*/ LDG.E.CONSTANT R29, [R12.64+0x2000] ; /* 0x002000040c1d7981 */ /* 0x000728000c1e9900 */ /*0880*/ LDG.E.CONSTANT R28, [R10.64+0x2000] ; /* 0x002000040a1c7981 */ /* 0x000b28000c1e9900 */ /*0890*/ LDG.E.CONSTANT R16, [R4.64+0x3000] ; /* 0x0030000404107981 */ /* 0x000128000c1e9900 */ /*08a0*/ LDG.E.CONSTANT R17, [R2.64+0x3000] ; /* 0x0030000402117981 */ /* 0x000328000c1e9900 */ /*08b0*/ LDG.E.CONSTANT R14, [R12.64+0x3000] ; /* 0x003000040c0e7981 */ /* 0x000728000c1e9900 */ /*08c0*/ LDG.E.CONSTANT R15, [R10.64+0x3000] ; /* 0x003000040a0f7981 */ /* 0x000b22000c1e9900 */ /*08d0*/ IADD3 R8, R8, 0x1000, RZ ; /* 0x0000100008087810 */ /* 0x000fc40007ffe0ff */ /*08e0*/ IADD3 R2, P4, R2, 0x4000, RZ ; /* 0x0000400002027810 */ /* 0x002fe40007f9e0ff */ /*08f0*/ ISETP.GE.AND P1, PT, R8, R9, PT ; /* 0x000000090800720c */ /* 0x000fe40003f26270 */ /*0900*/ IADD3 R12, P3, R12, 0x4000, RZ ; /* 0x000040000c0c7810 */ /* 0x008fe20007f7e0ff */ /*0910*/ IMAD.X R3, RZ, RZ, R3, P4 ; /* 0x000000ffff037224 */ /* 0x000fe200020e0603 */ /*0920*/ IADD3 R4, P5, R4, 0x4000, RZ ; /* 0x0000400004047810 */ /* 0x001fe40007fbe0ff */ /*0930*/ IADD3 R10, P2, R10, 0x4000, RZ ; /* 0x000040000a0a7810 */ /* 0x020fe20007f5e0ff */ /*0940*/ IMAD.X R13, RZ, RZ, R13, P3 ; /* 0x000000ffff0d7224 */ /* 0x000fe400018e060d */ /*0950*/ IMAD.X R5, RZ, RZ, R5, P5 ; /* 0x000000ffff057224 */ /* 0x000fc400028e0605 */ /*0960*/ IMAD.X R11, RZ, RZ, R11, P2 ; /* 0x000000ffff0b7224 */ /* 0x000fe200010e060b */ /*0970*/ IADD3 R18, R18, R19, R6 ; /* 0x0000001312127210 */ /* 0x004fc80007ffe006 */ /*0980*/ IADD3 R18, R20, R21, R18 ; /* 0x0000001514127210 */ /* 0x010fc80007ffe012 */ /*0990*/ IADD3 R18, R22, R23, R18 ; /* 0x0000001716127210 */ /* 0x000fc80007ffe012 */ /*09a0*/ IADD3 R18, R24, R25, R18 ; /* 0x0000001918127210 */ /* 0x000fc80007ffe012 */ /*09b0*/ IADD3 R18, R26, R27, R18 ; /* 0x0000001b1a127210 */ /* 0x000fc80007ffe012 */ /*09c0*/ IADD3 R18, R28, R29, R18 ; /* 0x0000001d1c127210 */ /* 0x000fc80007ffe012 */ /*09d0*/ IADD3 R16, R17, R16, R18 ; /* 0x0000001011107210 */ /* 0x000fc80007ffe012 */ /*09e0*/ IADD3 R6, R15, R14, R16 ; /* 0x0000000e0f067210 */ /* 0x000fe20007ffe010 */ /*09f0*/ @!P1 BRA 0x7d0 ; /* 0xfffffdd000009947 */ /* 0x000fea000383ffff */ /*0a00*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0a10*/ IMAD.IADD R9, R7, 0x1, -R8 ; /* 0x0000000107097824 */ /* 0x000fe200078e0a08 */ /*0a20*/ BSSY B2, 0xbc0 ; /* 0x0000019000027945 */ /* 0x000fe80003800000 */ /*0a30*/ ISETP.GT.AND P1, PT, R9, 0x400, PT ; /* 0x000004000900780c */ /* 0x000fda0003f24270 */ /*0a40*/ @!P1 BRA 0xbb0 ; /* 0x0000016000009947 */ /* 0x000fea0003800000 */ /*0a50*/ LDG.E.CONSTANT R9, [R4.64] ; /* 0x0000000404097981 */ /* 0x0000a8000c1e9900 */ /*0a60*/ LDG.E.CONSTANT R14, [R2.64] ; /* 0x00000004020e7981 */ /* 0x0002a8000c1e9900 */ /*0a70*/ LDG.E.CONSTANT R16, [R12.64] ; /* 0x000000040c107981 */ /* 0x000728000c1e9900 */ /*0a80*/ LDG.E.CONSTANT R15, [R10.64] ; /* 0x000000040a0f7981 */ /* 0x000b28000c1e9900 */ /*0a90*/ LDG.E.CONSTANT R18, [R4.64+0x1000] ; /* 0x0010000404127981 */ /* 0x000128000c1e9900 */ /*0aa0*/ LDG.E.CONSTANT R17, [R2.64+0x1000] ; /* 0x0010000402117981 */ /* 0x000328000c1e9900 */ /*0ab0*/ LDG.E.CONSTANT R20, [R12.64+0x1000] ; /* 0x001000040c147981 */ /* 0x000728000c1e9900 */ /*0ac0*/ LDG.E.CONSTANT R19, [R10.64+0x1000] ; /* 0x001000040a137981 */ /* 0x000b22000c1e9900 */ /*0ad0*/ IADD3 R4, P4, R4, 0x2000, RZ ; /* 0x0000200004047810 */ /* 0x001fc40007f9e0ff */ /*0ae0*/ IADD3 R2, P3, R2, 0x2000, RZ ; /* 0x0000200002027810 */ /* 0x002fe40007f7e0ff */ /*0af0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*0b00*/ IMAD.X R5, RZ, RZ, R5, P4 ; /* 0x000000ffff057224 */ /* 0x000fe200020e0605 */ /*0b10*/ IADD3 R12, P2, R12, 0x2000, RZ ; /* 0x000020000c0c7810 */ /* 0x008fe20007f5e0ff */ /*0b20*/ IMAD.X R3, RZ, RZ, R3, P3 ; /* 0x000000ffff037224 */ /* 0x000fe200018e0603 */ /*0b30*/ IADD3 R8, R8, 0x800, RZ ; /* 0x0000080008087810 */ /* 0x000fe40007ffe0ff */ /*0b40*/ IADD3 R10, P1, R10, 0x2000, RZ ; /* 0x000020000a0a7810 */ /* 0x020fe20007f3e0ff */ /*0b50*/ IMAD.X R13, RZ, RZ, R13, P2 ; /* 0x000000ffff0d7224 */ /* 0x000fc800010e060d */ /*0b60*/ IMAD.X R11, RZ, RZ, R11, P1 ; /* 0x000000ffff0b7224 */ /* 0x000fe200008e060b */ /*0b70*/ IADD3 R9, R14, R9, R6 ; /* 0x000000090e097210 */ /* 0x004fc80007ffe006 */ /*0b80*/ IADD3 R9, R15, R16, R9 ; /* 0x000000100f097210 */ /* 0x010fc80007ffe009 */ /*0b90*/ IADD3 R9, R17, R18, R9 ; /* 0x0000001211097210 */ /* 0x000fc80007ffe009 */ /*0ba0*/ IADD3 R6, R19, R20, R9 ; /* 0x0000001413067210 */ /* 0x000fe40007ffe009 */ /*0bb0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0bc0*/ ISETP.LT.OR P0, PT, R8, R7, P0 ; /* 0x000000070800720c */ /* 0x000fda0000701670 */ /*0bd0*/ @!P0 BRA 0xc40 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*0be0*/ LDG.E.CONSTANT R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea8000c1e9900 */ /*0bf0*/ LDG.E.CONSTANT R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e9900 */ /*0c00*/ LDG.E.CONSTANT R13, [R12.64] ; /* 0x000000040c0d7981 */ /* 0x000ee8000c1e9900 */ /*0c10*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee2000c1e9900 */ /*0c20*/ IADD3 R6, R2, R5, R6 ; /* 0x0000000502067210 */ /* 0x004fc80007ffe006 */ /*0c30*/ IADD3 R6, R10, R13, R6 ; /* 0x0000000d0a067210 */ /* 0x008fe40007ffe006 */ /*0c40*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0c50*/ S2R R8, SR_LANEID ; /* 0x0000000000087919 */ /* 0x000e280000000000 */ /*0c60*/ SHFL.DOWN PT, R2, R6, 0x1, 0x1f ; /* 0x08201f0006027f89 */ /* 0x000e6200000e0000 */ /*0c70*/ ISETP.GT.AND P0, PT, R8.reuse, 0x1e, PT ; /* 0x0000001e0800780c */ /* 0x041fe40003f04270 */ /*0c80*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f25270 */ /*0c90*/ SEL R3, R2, RZ, !P0 ; /* 0x000000ff02037207 */ /* 0x002fe40004000000 */ /*0ca0*/ ISETP.GT.AND P0, PT, R8, 0x1d, PT ; /* 0x0000001d0800780c */ /* 0x000fc60003f04270 */ /*0cb0*/ IMAD.IADD R3, R3, 0x1, R6 ; /* 0x0000000103037824 */ /* 0x000fca00078e0206 */ /*0cc0*/ SHFL.DOWN PT, R2, R3, 0x2, 0x1f ; /* 0x08401f0003027f89 */ /* 0x000e2200000e0000 */ /*0cd0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff079819 */ /* 0x000fc80000011400 */ /*0ce0*/ @!P1 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x0000000007079211 */ /* 0x000fc800078f28ff */ /*0cf0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fe40000011407 */ /*0d00*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x001fe40004000000 */ /*0d10*/ ISETP.GT.AND P0, PT, R8, 0x1b, PT ; /* 0x0000001b0800780c */ /* 0x000fc60003f04270 */ /*0d20*/ IMAD.IADD R2, R3, 0x1, R2 ; /* 0x0000000103027824 */ /* 0x000fca00078e0202 */ /*0d30*/ SHFL.DOWN PT, R4, R2, 0x4, 0x1f ; /* 0x08801f0002047f89 */ /* 0x000e2400000e0000 */ /*0d40*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*0d50*/ ISETP.GT.AND P0, PT, R8, 0x17, PT ; /* 0x000000170800780c */ /* 0x000fc60003f04270 */ /*0d60*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fe400078e0205 */ /*0d70*/ @!P1 IMAD.SHL.U32 R2, R7, 0x4, RZ ; /* 0x0000000407029824 */ /* 0x000fc600078e00ff */ /*0d80*/ SHFL.DOWN PT, R4, R5, 0x8, 0x1f ; /* 0x09001f0005047f89 */ /* 0x000e2400000e0000 */ /*0d90*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*0da0*/ ISETP.GT.AND P0, PT, R8, 0xf, PT ; /* 0x0000000f0800780c */ /* 0x000fc60003f04270 */ /*0db0*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*0dc0*/ SHFL.DOWN PT, R3, R4, 0x10, 0x1f ; /* 0x0a001f0004037f89 */ /* 0x000e2400000e0000 */ /*0dd0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*0de0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*0df0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x000fca00078e0203 */ /*0e00*/ @!P1 STS [R2+0x8], R3 ; /* 0x0000080302009388 */ /* 0x0001e80000000800 */ /*0e10*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0e20*/ @P0 BRA 0x35e0 ; /* 0x000027b000000947 */ /* 0x000fea0003800000 */ /*0e30*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x001fe80000000800 */ /*0e40*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*0e50*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000e620000000a00 */ /*0e60*/ IADD3 R0, R4, R0, R3 ; /* 0x0000000004007210 */ /* 0x001fc80007ffe003 */ /*0e70*/ IADD3 R0, R6, R0, R5 ; /* 0x0000000006007210 */ /* 0x000fc80007ffe005 */ /*0e80*/ IADD3 R8, R8, R0, R7 ; /* 0x0000000008087210 */ /* 0x002fe20007ffe007 */ /*0e90*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fc800078e00ff */ /*0ea0*/ IMAD.IADD R3, R8, 0x1, R9 ; /* 0x0000000108037824 */ /* 0x000fe200078e0209 */ /*0eb0*/ BRA 0x35e0 ; /* 0x0000272000007947 */ /* 0x000fea0003800000 */ /*0ec0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */ /* 0x001fe20003f06270 */ /*0ed0*/ BSSY B1, 0xf60 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*0ee0*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */ /* 0x000fe400078e00ff */ /*0ef0*/ IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff067224 */ /* 0x000fd200078e0000 */ /*0f00*/ @P0 BRA 0xf50 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0f10*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*0f20*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x000fca00078e0205 */ /*0f30*/ LDG.E.CONSTANT R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000162000c1e9900 */ /*0f40*/ IADD3 R6, R0, 0x100, RZ ; /* 0x0000010000067810 */ /* 0x000fc60007ffe0ff */ /*0f50*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0f60*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x170], PT ; /* 0x00005c0006007a0c */ /* 0x000fe20003f06270 */ /*0f70*/ BSSY B1, 0x1560 ; /* 0x000005e000017945 */ /* 0x000fd80003800000 */ /*0f80*/ @P0 BRA 0x1550 ; /* 0x000005c000000947 */ /* 0x000fea0003800000 */ /*0f90*/ LOP3.LUT R4, RZ, R6, RZ, 0x33, !PT ; /* 0x00000006ff047212 */ /* 0x001fe200078e33ff */ /*0fa0*/ BSSY B2, 0x10d0 ; /* 0x0000012000027945 */ /* 0x000fe60003800000 */ /*0fb0*/ IADD3 R5, R4, c[0x0][0x170], RZ ; /* 0x00005c0004057a10 */ /* 0x000fc80007ffe0ff */ /*0fc0*/ LEA.HI R4, R5.reuse, 0x1, RZ, 0x18 ; /* 0x0000000105047811 */ /* 0x040fe400078fc0ff */ /*0fd0*/ ISETP.GE.U32.AND P1, PT, R5, 0x300, PT ; /* 0x000003000500780c */ /* 0x000fe40003f26070 */ /*0fe0*/ LOP3.LUT P0, R7, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304077812 */ /* 0x000fda000780c0ff */ /*0ff0*/ @!P0 BRA 0x10c0 ; /* 0x000000c000008947 */ /* 0x000fea0003800000 */ /*1000*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*1010*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fc800078e0205 */ /*1020*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ; /* 0x000000ffff087224 */ /* 0x000fc800078e0004 */ /*1030*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fcc00078e0008 */ /*1040*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x0000a2000c1e9900 */ /*1050*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*1060*/ IADD3 R8, P2, R8, 0x400, RZ ; /* 0x0000040008087810 */ /* 0x000fe40007f5e0ff */ /*1070*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*1080*/ IADD3 R6, R6, 0x100, RZ ; /* 0x0000010006067810 */ /* 0x000fe20007ffe0ff */ /*1090*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe400010e0605 */ /*10a0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x024fd000078e0203 */ /*10b0*/ @P0 BRA 0x1030 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*10c0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*10d0*/ @!P1 BRA 0x1550 ; /* 0x0000047000009947 */ /* 0x000fea0003800000 */ /*10e0*/ IADD3 R4, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006047a10 */ /* 0x000fe20007ffe1ff */ /*10f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*1100*/ BSSY B2, 0x1360 ; /* 0x0000025000027945 */ /* 0x000fe20003800000 */ /*1110*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*1120*/ ISETP.GT.AND P1, PT, R4, 0xc00, PT ; /* 0x00000c000400780c */ /* 0x000fe20003f24270 */ /*1130*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fd800078e0205 */ /*1140*/ @!P1 BRA 0x1350 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*1150*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*1160*/ IADD3 R23, R2, -0xc00, RZ ; /* 0xfffff40002177810 */ /* 0x000fe40007ffe0ff */ /*1170*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e9900 */ /*1180*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*1190*/ LDG.E.CONSTANT R10, [R4.64+0x800] ; /* 0x00080004040a7981 */ /* 0x0000e8000c1e9900 */ /*11a0*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x0000e8000c1e9900 */ /*11b0*/ LDG.E.CONSTANT R12, [R4.64+0x1000] ; /* 0x00100004040c7981 */ /* 0x000128000c1e9900 */ /*11c0*/ LDG.E.CONSTANT R11, [R4.64+0x1400] ; /* 0x00140004040b7981 */ /* 0x000128000c1e9900 */ /*11d0*/ LDG.E.CONSTANT R14, [R4.64+0x1800] ; /* 0x00180004040e7981 */ /* 0x000128000c1e9900 */ /*11e0*/ LDG.E.CONSTANT R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */ /* 0x000128000c1e9900 */ /*11f0*/ LDG.E.CONSTANT R16, [R4.64+0x2000] ; /* 0x0020000404107981 */ /* 0x000128000c1e9900 */ /*1200*/ LDG.E.CONSTANT R15, [R4.64+0x2400] ; /* 0x00240004040f7981 */ /* 0x000128000c1e9900 */ /*1210*/ LDG.E.CONSTANT R18, [R4.64+0x2800] ; /* 0x0028000404127981 */ /* 0x000128000c1e9900 */ /*1220*/ LDG.E.CONSTANT R17, [R4.64+0x2c00] ; /* 0x002c000404117981 */ /* 0x000128000c1e9900 */ /*1230*/ LDG.E.CONSTANT R20, [R4.64+0x3000] ; /* 0x0030000404147981 */ /* 0x000128000c1e9900 */ /*1240*/ LDG.E.CONSTANT R19, [R4.64+0x3400] ; /* 0x0034000404137981 */ /* 0x000128000c1e9900 */ /*1250*/ LDG.E.CONSTANT R22, [R4.64+0x3800] ; /* 0x0038000404167981 */ /* 0x000128000c1e9900 */ /*1260*/ LDG.E.CONSTANT R21, [R4.64+0x3c00] ; /* 0x003c000404157981 */ /* 0x000122000c1e9900 */ /*1270*/ IADD3 R6, R6, 0x1000, RZ ; /* 0x0000100006067810 */ /* 0x000fc80007ffe0ff */ /*1280*/ ISETP.GE.AND P1, PT, R6, R23, PT ; /* 0x000000170600720c */ /* 0x000fe40003f26270 */ /*1290*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*12a0*/ IADD3 R8, P2, R4, 0x4000, RZ ; /* 0x0000400004087810 */ /* 0x000fca0007f5e0ff */ /*12b0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe200010e0605 */ /*12c0*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*12d0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fc600078e0008 */ /*12e0*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*12f0*/ IADD3 R7, R13, R14, R7 ; /* 0x0000000e0d077210 */ /* 0x000fc80007ffe007 */ /*1300*/ IADD3 R7, R15, R16, R7 ; /* 0x000000100f077210 */ /* 0x000fc80007ffe007 */ /*1310*/ IADD3 R7, R17, R18, R7 ; /* 0x0000001211077210 */ /* 0x000fc80007ffe007 */ /*1320*/ IADD3 R7, R19, R20, R7 ; /* 0x0000001413077210 */ /* 0x000fc80007ffe007 */ /*1330*/ IADD3 R3, R21, R22, R7 ; /* 0x0000001615037210 */ /* 0x000fe20007ffe007 */ /*1340*/ @!P1 BRA 0x1170 ; /* 0xfffffe2000009947 */ /* 0x000fea000383ffff */ /*1350*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1360*/ IADD3 R7, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006077a10 */ /* 0x000fe20007ffe1ff */ /*1370*/ BSSY B2, 0x14d0 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*1380*/ ISETP.GT.AND P1, PT, R7, 0x400, PT ; /* 0x000004000700780c */ /* 0x000fda0003f24270 */ /*1390*/ @!P1 BRA 0x14c0 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*13a0*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e9900 */ /*13b0*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*13c0*/ LDG.E.CONSTANT R10, [R4.64+0x800] ; /* 0x00080004040a7981 */ /* 0x0000e8000c1e9900 */ /*13d0*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x0000e8000c1e9900 */ /*13e0*/ LDG.E.CONSTANT R12, [R4.64+0x1000] ; /* 0x00100004040c7981 */ /* 0x000128000c1e9900 */ /*13f0*/ LDG.E.CONSTANT R11, [R4.64+0x1400] ; /* 0x00140004040b7981 */ /* 0x000128000c1e9900 */ /*1400*/ LDG.E.CONSTANT R14, [R4.64+0x1800] ; /* 0x00180004040e7981 */ /* 0x000128000c1e9900 */ /*1410*/ LDG.E.CONSTANT R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */ /* 0x000122000c1e9900 */ /*1420*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*1430*/ IADD3 R6, R6, 0x800, RZ ; /* 0x0000080006067810 */ /* 0x000fe40007ffe0ff */ /*1440*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*1450*/ IADD3 R8, P1, R4, 0x2000, RZ ; /* 0x0000200004087810 */ /* 0x000fca0007f3e0ff */ /*1460*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x001fe200078e0008 */ /*1470*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*1480*/ IMAD.X R9, RZ, RZ, R5, P1 ; /* 0x000000ffff097224 */ /* 0x000fc800008e0605 */ /*1490*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe200078e0009 */ /*14a0*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*14b0*/ IADD3 R3, R13, R14, R7 ; /* 0x0000000e0d037210 */ /* 0x000fe40007ffe007 */ /*14c0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*14d0*/ ISETP.LT.OR P0, PT, R6, c[0x0][0x170], P0 ; /* 0x00005c0006007a0c */ /* 0x000fda0000701670 */ /*14e0*/ @!P0 BRA 0x1550 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*14f0*/ LDG.E.CONSTANT R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea8000c1e9900 */ /*1500*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*1510*/ LDG.E.CONSTANT R8, [R4.64+0x800] ; /* 0x0008000404087981 */ /* 0x000ee8000c1e9900 */ /*1520*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x000ee2000c1e9900 */ /*1530*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x024fc80007ffe003 */ /*1540*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fe40007ffe003 */ /*1550*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1560*/ ISETP.GT.AND P0, PT, R2, 0xff, PT ; /* 0x000000ff0200780c */ /* 0x000fda0003f04270 */ /*1570*/ @P0 BRA 0x1970 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*1580*/ SHF.R.S32.HI R5, RZ, 0x1f, R0 ; /* 0x0000001fff057819 */ /* 0x001fe20000011400 */ /*1590*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */ /* 0x000e260000000000 */ /*15a0*/ LEA.HI R8, R5, R0, RZ, 0x5 ; /* 0x0000000005087211 */ /* 0x000fc800078f28ff */ /*15b0*/ LOP3.LUT R4, R8, 0xffffffe0, RZ, 0xc0, !PT ; /* 0xffffffe008047812 */ /* 0x000fe400078ec0ff */ /*15c0*/ SHF.R.S32.HI R8, RZ, 0x5, R8 ; /* 0x00000005ff087819 */ /* 0x000fe40000011408 */ /*15d0*/ IADD3 R5, R4, 0x20, RZ ; /* 0x0000002004057810 */ /* 0x000fe40007ffe0ff */ /*15e0*/ LOP3.LUT R4, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff047212 */ /* 0x000fe400078e33ff */ /*15f0*/ ISETP.GT.AND P0, PT, R5, c[0x0][0x170], PT ; /* 0x00005c0005007a0c */ /* 0x000fe40003f04270 */ /*1600*/ IADD3 R4, R4, c[0x0][0x170], RZ ; /* 0x00005c0004047a10 */ /* 0x000fc80007ffe0ff */ /*1610*/ SEL R4, R4, 0x1f, P0 ; /* 0x0000001f04047807 */ /* 0x000fe40000000000 */ /*1620*/ IADD3 R7, R11, 0x2, RZ ; /* 0x000000020b077810 */ /* 0x001fc60007ffe0ff */ /*1630*/ SHFL.DOWN PT, R5, R3, 0x1, R4 ; /* 0x0820000003057989 */ /* 0x020e2200000e0004 */ /*1640*/ ISETP.GE.AND P0, PT, R11.reuse, R4, PT ; /* 0x000000040b00720c */ /* 0x040fe40003f06270 */ /*1650*/ IADD3 R9, R11.reuse, 0x4, RZ ; /* 0x000000040b097810 */ /* 0x040fe40007ffe0ff */ /*1660*/ ISETP.NE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fda0003f25270 */ /*1670*/ @!P1 IMAD.SHL.U32 R8, R8, 0x4, RZ ; /* 0x0000000408089824 */ /* 0x000fe200078e00ff */ /*1680*/ SEL R6, R5, RZ, !P0 ; /* 0x000000ff05067207 */ /* 0x001fe40004000000 */ /*1690*/ ISETP.GT.AND P0, PT, R7, R4, PT ; /* 0x000000040700720c */ /* 0x000fc60003f04270 */ /*16a0*/ IMAD.IADD R5, R6, 0x1, R3 ; /* 0x0000000106057824 */ /* 0x000fca00078e0203 */ /*16b0*/ SHFL.DOWN PT, R6, R5, 0x2, R4 ; /* 0x0840000005067989 */ /* 0x000e2400000e0004 */ /*16c0*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*16d0*/ ISETP.GT.AND P0, PT, R9, R4, PT ; /* 0x000000040900720c */ /* 0x000fc60003f04270 */ /*16e0*/ IMAD.IADD R7, R5, 0x1, R6 ; /* 0x0000000105077824 */ /* 0x000fe200078e0206 */ /*16f0*/ IADD3 R5, R11, 0x8, RZ ; /* 0x000000080b057810 */ /* 0x000fc80007ffe0ff */ /*1700*/ SHFL.DOWN PT, R6, R7, 0x4, R4 ; /* 0x0880000007067989 */ /* 0x000e2400000e0004 */ /*1710*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*1720*/ ISETP.GT.AND P0, PT, R5, R4, PT ; /* 0x000000040500720c */ /* 0x000fc60003f04270 */ /*1730*/ IMAD.IADD R3, R7, 0x1, R6 ; /* 0x0000000107037824 */ /* 0x000fe200078e0206 */ /*1740*/ IADD3 R7, R11, 0x10, RZ ; /* 0x000000100b077810 */ /* 0x000fc80007ffe0ff */ /*1750*/ SHFL.DOWN PT, R6, R3, 0x8, R4 ; /* 0x0900000003067989 */ /* 0x000e2400000e0004 */ /*1760*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*1770*/ ISETP.GT.AND P0, PT, R7, R4, PT ; /* 0x000000040700720c */ /* 0x000fc60003f04270 */ /*1780*/ IMAD.IADD R5, R3, 0x1, R6 ; /* 0x0000000103057824 */ /* 0x000fca00078e0206 */ /*1790*/ SHFL.DOWN PT, R6, R5, 0x10, R4 ; /* 0x0a00000005067989 */ /* 0x000e2400000e0004 */ /*17a0*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*17b0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*17c0*/ IMAD.IADD R3, R5, 0x1, R6 ; /* 0x0000000105037824 */ /* 0x000fca00078e0206 */ /*17d0*/ @!P1 STS [R8+0x8], R3 ; /* 0x0000080308009388 */ /* 0x0001e80000000800 */ /*17e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*17f0*/ @P0 BRA 0x35e0 ; /* 0x00001de000000947 */ /* 0x000fea0003800000 */ /*1800*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x001e220000000c00 */ /*1810*/ ISETP.GT.AND P1, PT, R2, 0x40, PT ; /* 0x000000400200780c */ /* 0x000fc40003f24270 */ /*1820*/ ISETP.GT.AND P0, PT, R2.reuse, 0x20, PT ; /* 0x000000200200780c */ /* 0x040fe20003f04270 */ /*1830*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x000e620000000800 */ /*1840*/ ISETP.GT.AND P2, PT, R2, 0xa0, PT ; /* 0x000000a00200780c */ /* 0x000fc60003f44270 */ /*1850*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000ea20000000a00 */ /*1860*/ SEL R4, R4, RZ, P1 ; /* 0x000000ff04047207 */ /* 0x001fe40000800000 */ /*1870*/ ISETP.GT.AND P1, PT, R2, 0x80, PT ; /* 0x000000800200780c */ /* 0x000fe40003f24270 */ /*1880*/ SEL R0, R0, RZ, P0 ; /* 0x000000ff00007207 */ /* 0x002fe40000000000 */ /*1890*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */ /* 0x000fe40000800000 */ /*18a0*/ ISETP.GE.AND P1, PT, R2.reuse, 0xe1, PT ; /* 0x000000e10200780c */ /* 0x040fe40003f26270 */ /*18b0*/ ISETP.GT.AND P0, PT, R2, 0x60, PT ; /* 0x000000600200780c */ /* 0x000fc40003f04270 */ /*18c0*/ IADD3 R0, R4, R3, R0 ; /* 0x0000000304007210 */ /* 0x000fe40007ffe000 */ /*18d0*/ SEL R5, R5, RZ, P0 ; /* 0x000000ff05057207 */ /* 0x000fe40000000000 */ /*18e0*/ ISETP.GT.AND P0, PT, R2, 0xc0, PT ; /* 0x000000c00200780c */ /* 0x000fe40003f04270 */ /*18f0*/ SEL R2, R7, RZ, P2 ; /* 0x000000ff07027207 */ /* 0x000fe40001000000 */ /*1900*/ IADD3 R5, R6, R0, R5 ; /* 0x0000000006057210 */ /* 0x000fe20007ffe005 */ /*1910*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*1920*/ SEL R8, R8, RZ, P0 ; /* 0x000000ff08087207 */ /* 0x004fc80000000000 */ /*1930*/ IADD3 R3, R8, R5, R2 ; /* 0x0000000508037210 */ /* 0x000fe20007ffe002 */ /*1940*/ @!P1 BRA 0x35e0 ; /* 0x00001c9000009947 */ /* 0x000fea0003800000 */ /*1950*/ IMAD.IADD R3, R3, 0x1, R9 ; /* 0x0000000103037824 */ /* 0x000fe200078e0209 */ /*1960*/ BRA 0x35e0 ; /* 0x00001c7000007947 */ /* 0x000fea0003800000 */ /*1970*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e680000000000 */ /*1980*/ SHFL.DOWN PT, R2, R3, 0x1, 0x1f ; /* 0x08201f0003027f89 */ /* 0x020ea200000e0000 */ /*1990*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x042fe40003f04270 */ /*19a0*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*19b0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x004fc40004000000 */ /*19c0*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*19d0*/ IMAD.IADD R2, R2, 0x1, R3 ; /* 0x0000000102027824 */ /* 0x000fca00078e0203 */ /*19e0*/ SHFL.DOWN PT, R4, R2, 0x2, 0x1f ; /* 0x08401f0002047f89 */ /* 0x001e2200000e0000 */ /*19f0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff079819 */ /* 0x000fc80000011400 */ /*1a00*/ @!P1 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x0000000007079211 */ /* 0x000fc800078f28ff */ /*1a10*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fe40000011407 */ /*1a20*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*1a30*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*1a40*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fca00078e0205 */ /*1a50*/ SHFL.DOWN PT, R4, R5, 0x4, 0x1f ; /* 0x08801f0005047f89 */ /* 0x000e2400000e0000 */ /*1a60*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*1a70*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*1a80*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*1a90*/ SHFL.DOWN PT, R3, R4, 0x8, 0x1f ; /* 0x09001f0004037f89 */ /* 0x000e2400000e0000 */ /*1aa0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1ab0*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*1ac0*/ IMAD.IADD R2, R4, 0x1, R3 ; /* 0x0000000104027824 */ /* 0x000fe400078e0203 */ /*1ad0*/ @!P1 IMAD.SHL.U32 R4, R7, 0x4, RZ ; /* 0x0000000407049824 */ /* 0x000fc600078e00ff */ /*1ae0*/ SHFL.DOWN PT, R3, R2, 0x10, 0x1f ; /* 0x0a001f0002037f89 */ /* 0x000e2400000e0000 */ /*1af0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1b00*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*1b10*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*1b20*/ @!P1 STS [R4+0x8], R3 ; /* 0x0000080304009388 */ /* 0x0001e80000000800 */ /*1b30*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1b40*/ @P0 BRA 0x35e0 ; /* 0x00001a9000000947 */ /* 0x000fea0003800000 */ /*1b50*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x001fe80000000800 */ /*1b60*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*1b70*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000e620000000a00 */ /*1b80*/ IADD3 R0, R4, R0, R3 ; /* 0x0000000004007210 */ /* 0x001fc80007ffe003 */ /*1b90*/ IADD3 R0, R6, R0, R5 ; /* 0x0000000006007210 */ /* 0x000fc80007ffe005 */ /*1ba0*/ IADD3 R8, R8, R0, R7 ; /* 0x0000000008087210 */ /* 0x002fe20007ffe007 */ /*1bb0*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fc800078e00ff */ /*1bc0*/ IMAD.IADD R3, R8, 0x1, R9 ; /* 0x0000000108037824 */ /* 0x000fe200078e0209 */ /*1bd0*/ BRA 0x35e0 ; /* 0x00001a0000007947 */ /* 0x000fea0003800000 */ /*1be0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff027624 */ /* 0x000fca00078e00ff */ /*1bf0*/ ISETP.GE.AND P0, PT, R2, 0x1000, PT ; /* 0x000010000200780c */ /* 0x000fda0003f06270 */ /*1c00*/ @!P0 BRA 0x28e0 ; /* 0x00000cd000008947 */ /* 0x000fea0003800000 */ /*1c10*/ IMAD.SHL.U32 R16, R0, 0x4, RZ ; /* 0x0000000400107824 */ /* 0x001fe400078e00ff */ /*1c20*/ IMAD.MOV.U32 R17, RZ, RZ, 0x4 ; /* 0x00000004ff117424 */ /* 0x000fc800078e00ff */ /*1c30*/ IMAD.WIDE.U32 R16, R16, R17, c[0x0][0x160] ; /* 0x0000580010107625 */ /* 0x000fca00078e0011 */ /*1c40*/ LDG.E.128.CONSTANT R20, [R16.64] ; /* 0x0000000410147981 */ /* 0x000ea8000c1e9d00 */ /*1c50*/ LDG.E.128.CONSTANT R12, [R16.64+0x1000] ; /* 0x00100004100c7981 */ /* 0x000ee8000c1e9d00 */ /*1c60*/ LDG.E.128.CONSTANT R8, [R16.64+0x2000] ; /* 0x0020000410087981 */ /* 0x000f28000c1e9d00 */ /*1c70*/ LDG.E.128.CONSTANT R4, [R16.64+0x3000] ; /* 0x0030000410047981 */ /* 0x000f62000c1e9d00 */ /*1c80*/ ISETP.GE.AND P0, PT, R2, 0x2000, PT ; /* 0x000020000200780c */ /* 0x000fc40003f06270 */ /*1c90*/ IADD3 R21, R22, R21, R20 ; /* 0x0000001516157210 */ /* 0x004fc80007ffe014 */ /*1ca0*/ IADD3 R21, R12, R23, R21 ; /* 0x000000170c157210 */ /* 0x008fc80007ffe015 */ /*1cb0*/ IADD3 R21, R14, R13, R21 ; /* 0x0000000d0e157210 */ /* 0x000fc80007ffe015 */ /*1cc0*/ IADD3 R21, R8, R15, R21 ; /* 0x0000000f08157210 */ /* 0x010fc80007ffe015 */ /*1cd0*/ IADD3 R21, R10, R9, R21 ; /* 0x000000090a157210 */ /* 0x000fc80007ffe015 */ /*1ce0*/ IADD3 R21, R4, R11, R21 ; /* 0x0000000b04157210 */ /* 0x020fc80007ffe015 */ /*1cf0*/ IADD3 R3, R6, R5, R21 ; /* 0x0000000506037210 */ /* 0x000fe20007ffe015 */ /*1d00*/ IMAD.MOV.U32 R21, RZ, RZ, 0x1000 ; /* 0x00001000ff157424 */ /* 0x000fc800078e00ff */ /*1d10*/ IMAD.IADD R3, R7, 0x1, R3 ; /* 0x0000000107037824 */ /* 0x000fe200078e0203 */ /*1d20*/ @!P0 BRA 0x1ed0 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*1d30*/ IADD3 R20, R2, -0x1000, RZ ; /* 0xfffff00002147810 */ /* 0x000fe20007ffe0ff */ /*1d40*/ IMAD.MOV.U32 R22, RZ, RZ, R16 ; /* 0x000000ffff167224 */ /* 0x000fe400078e0010 */ /*1d50*/ IMAD.MOV.U32 R23, RZ, RZ, R17 ; /* 0x000000ffff177224 */ /* 0x000fe400078e0011 */ /*1d60*/ IMAD.MOV.U32 R21, RZ, RZ, 0x1000 ; /* 0x00001000ff157424 */ /* 0x000fe400078e00ff */ /*1d70*/ IMAD.MOV.U32 R2, RZ, RZ, R20 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0014 */ /*1d80*/ LDG.E.128.CONSTANT R4, [R22.64+0x4000] ; /* 0x0040000416047981 */ /* 0x000ea8000c1e9d00 */ /*1d90*/ LDG.E.128.CONSTANT R8, [R22.64+0x5000] ; /* 0x0050000416087981 */ /* 0x0000e8000c1e9d00 */ /*1da0*/ LDG.E.128.CONSTANT R12, [R22.64+0x6000] ; /* 0x00600004160c7981 */ /* 0x000128000c1e9d00 */ /*1db0*/ LDG.E.128.CONSTANT R16, [R22.64+0x7000] ; /* 0x0070000416107981 */ /* 0x000162000c1e9d00 */ /*1dc0*/ ISETP.GE.AND P0, PT, R2, 0x1000, PT ; /* 0x000010000200780c */ /* 0x000fc40003f06270 */ /*1dd0*/ IADD3 R3, R5, R4, R3 ; /* 0x0000000405037210 */ /* 0x004fe40007ffe003 */ /*1de0*/ IADD3 R4, P1, R22, 0x4000, RZ ; /* 0x0000400016047810 */ /* 0x000fe40007f3e0ff */ /*1df0*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x000fc60007ffe003 */ /*1e00*/ IMAD.X R23, RZ, RZ, R23, P1 ; /* 0x000000ffff177224 */ /* 0x001fe200008e0617 */ /*1e10*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fc80007ffe003 */ /*1e20*/ IADD3 R3, R11, R10, R3 ; /* 0x0000000a0b037210 */ /* 0x000fc80007ffe003 */ /*1e30*/ IADD3 R3, R13, R12, R3 ; /* 0x0000000c0d037210 */ /* 0x010fc80007ffe003 */ /*1e40*/ IADD3 R3, R15, R14, R3 ; /* 0x0000000e0f037210 */ /* 0x000fc80007ffe003 */ /*1e50*/ IADD3 R3, R17, R16, R3 ; /* 0x0000001011037210 */ /* 0x020fc80007ffe003 */ /*1e60*/ IADD3 R3, R19, R18, R3 ; /* 0x0000001213037210 */ /* 0x000fe20007ffe003 */ /*1e70*/ @!P0 BRA 0x2670 ; /* 0x000007f000008947 */ /* 0x000fea0003800000 */ /*1e80*/ IADD3 R21, R21, 0x1000, RZ ; /* 0x0000100015157810 */ /* 0x000fe20007ffe0ff */ /*1e90*/ IMAD.MOV.U32 R22, RZ, RZ, R4 ; /* 0x000000ffff167224 */ /* 0x000fe200078e0004 */ /*1ea0*/ IADD3 R2, R2, -0x1000, RZ ; /* 0xfffff00002027810 */ /* 0x000fe40007ffe0ff */ /*1eb0*/ ISETP.GT.AND P0, PT, R21, R20, PT ; /* 0x000000141500720c */ /* 0x000fda0003f04270 */ /*1ec0*/ @!P0 BRA 0x1d80 ; /* 0xfffffeb000008947 */ /* 0x000fea000383ffff */ /*1ed0*/ ISETP.GE.AND P0, PT, R21, c[0x0][0x170], PT ; /* 0x00005c0015007a0c */ /* 0x000fda0003f06270 */ /*1ee0*/ @P0 BRA 0x2670 ; /* 0x0000078000000947 */ /* 0x000fea0003800000 */ /*1ef0*/ IADD3 R9, -R21, c[0x0][0x170], RZ ; /* 0x00005c0015097a10 */ /* 0x000fe20007ffe1ff */ /*1f00*/ BSSY B1, 0x2670 ; /* 0x0000076000017945 */ /* 0x000fe60003800000 */ /*1f10*/ ISETP.GE.AND P0, PT, R0, R9, PT ; /* 0x000000090000720c */ /* 0x000fda0003f06270 */ /*1f20*/ @P0 BRA 0x2660 ; /* 0x0000073000000947 */ /* 0x000fea0003800000 */ /*1f30*/ LOP3.LUT R4, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff047212 */ /* 0x000fe200078e33ff */ /*1f40*/ BSSY B2, 0x20a0 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*1f50*/ IADD3 R4, -R21, c[0x0][0x170], R4 ; /* 0x00005c0015047a10 */ /* 0x000fc80007ffe104 */ /*1f60*/ LEA.HI R2, R4.reuse, 0x1, RZ, 0x18 ; /* 0x0000000104027811 */ /* 0x040fe400078fc0ff */ /*1f70*/ ISETP.GE.U32.AND P1, PT, R4, 0x300, PT ; /* 0x000003000400780c */ /* 0x000fe40003f26070 */ /*1f80*/ LOP3.LUT P0, R6, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302067812 */ /* 0x000fe2000780c0ff */ /*1f90*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */ /* 0x000fd800078e0000 */ /*1fa0*/ @!P0 BRA 0x2090 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*1fb0*/ IMAD.IADD R4, R0, 0x1, R21 ; /* 0x0000000100047824 */ /* 0x000fe400078e0215 */ /*1fc0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe400078e00ff */ /*1fd0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0000 */ /*1fe0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e0205 */ /*1ff0*/ IMAD.MOV.U32 R7, RZ, RZ, R4 ; /* 0x000000ffff077224 */ /* 0x000fc800078e0004 */ /*2000*/ IMAD.MOV.U32 R4, RZ, RZ, R7 ; /* 0x000000ffff047224 */ /* 0x000fcc00078e0007 */ /*2010*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x0000a2000c1e9900 */ /*2020*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */ /* 0x000fe40007ffe0ff */ /*2030*/ IADD3 R7, P2, R7, 0x400, RZ ; /* 0x0000040007077810 */ /* 0x000fe40007f5e0ff */ /*2040*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f05270 */ /*2050*/ IADD3 R2, R2, 0x100, RZ ; /* 0x0000010002027810 */ /* 0x000fe20007ffe0ff */ /*2060*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe400010e0605 */ /*2070*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x004fd000078e0203 */ /*2080*/ @P0 BRA 0x2000 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*2090*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*20a0*/ @!P1 BRA 0x2660 ; /* 0x000005b000009947 */ /* 0x000fea0003800000 */ /*20b0*/ IMAD.IADD R4, R9, 0x1, -R2 ; /* 0x0000000109047824 */ /* 0x000fe200078e0a02 */ /*20c0*/ BSSY B2, 0x2410 ; /* 0x0000034000027945 */ /* 0x000fe20003800000 */ /*20d0*/ IMAD.IADD R21, R2, 0x1, R21 ; /* 0x0000000102157824 */ /* 0x000fe200078e0215 */ /*20e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f070 */ /*20f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*2100*/ ISETP.GT.AND P1, PT, R4, 0xc00, PT ; /* 0x00000c000400780c */ /* 0x000fe40003f24270 */ /*2110*/ IADD3 R12, R21.reuse, 0x300, RZ ; /* 0x00000300150c7810 */ /* 0x040fe20007ffe0ff */ /*2120*/ IMAD.WIDE R6, R21.reuse, R5.reuse, c[0x0][0x160] ; /* 0x0000580015067625 */ /* 0x0c0fe200078e0205 */ /*2130*/ IADD3 R10, R21.reuse, 0x200, RZ ; /* 0x00000200150a7810 */ /* 0x040fe40007ffe0ff */ /*2140*/ IADD3 R4, R21, 0x100, RZ ; /* 0x0000010015047810 */ /* 0x000fe20007ffe0ff */ /*2150*/ IMAD.WIDE R12, R12, R5, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x000fc800078e0205 */ /*2160*/ IMAD.WIDE R10, R10, R5, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fc800078e0205 */ /*2170*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e0205 */ /*2180*/ IMAD.MOV.U32 R8, RZ, RZ, R12 ; /* 0x000000ffff087224 */ /* 0x000fe200078e000c */ /*2190*/ @!P1 BRA 0x2400 ; /* 0x0000026000009947 */ /* 0x000fea0003800000 */ /*21a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*21b0*/ IADD3 R15, R9, -0xc00, RZ ; /* 0xfffff400090f7810 */ /* 0x000fe40007ffe0ff */ /*21c0*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0008 */ /*21d0*/ LDG.E.CONSTANT R18, [R6.64] ; /* 0x0000000406127981 */ /* 0x0000a8000c1e9900 */ /*21e0*/ LDG.E.CONSTANT R20, [R4.64] ; /* 0x0000000404147981 */ /* 0x0002a8000c1e9900 */ /*21f0*/ LDG.E.CONSTANT R21, [R10.64] ; /* 0x000000040a157981 */ /* 0x000728000c1e9900 */ /*2200*/ LDG.E.CONSTANT R8, [R12.64] ; /* 0x000000040c087981 */ /* 0x000f28000c1e9900 */ /*2210*/ LDG.E.CONSTANT R23, [R6.64+0x1000] ; /* 0x0010000406177981 */ /* 0x000168000c1e9900 */ /*2220*/ LDG.E.CONSTANT R22, [R4.64+0x1000] ; /* 0x0010000404167981 */ /* 0x000368000c1e9900 */ /*2230*/ LDG.E.CONSTANT R25, [R10.64+0x1000] ; /* 0x001000040a197981 */ /* 0x000768000c1e9900 */ /*2240*/ LDG.E.CONSTANT R24, [R12.64+0x1000] ; /* 0x001000040c187981 */ /* 0x000f68000c1e9900 */ /*2250*/ LDG.E.CONSTANT R27, [R6.64+0x2000] ; /* 0x00200004061b7981 */ /* 0x000168000c1e9900 */ /*2260*/ LDG.E.CONSTANT R26, [R4.64+0x2000] ; /* 0x00200004041a7981 */ /* 0x000368000c1e9900 */ /*2270*/ LDG.E.CONSTANT R29, [R10.64+0x2000] ; /* 0x002000040a1d7981 */ /* 0x000768000c1e9900 */ /*2280*/ LDG.E.CONSTANT R28, [R12.64+0x2000] ; /* 0x002000040c1c7981 */ /* 0x000f68000c1e9900 */ /*2290*/ LDG.E.CONSTANT R16, [R6.64+0x3000] ; /* 0x0030000406107981 */ /* 0x000168000c1e9900 */ /*22a0*/ LDG.E.CONSTANT R19, [R4.64+0x3000] ; /* 0x0030000404137981 */ /* 0x000368000c1e9900 */ /*22b0*/ LDG.E.CONSTANT R14, [R10.64+0x3000] ; /* 0x003000040a0e7981 */ /* 0x000768000c1e9900 */ /*22c0*/ LDG.E.CONSTANT R17, [R12.64+0x3000] ; /* 0x003000040c117981 */ /* 0x000562000c1e9900 */ /*22d0*/ IADD3 R2, R2, 0x1000, RZ ; /* 0x0000100002027810 */ /* 0x000fc40007ffe0ff */ /*22e0*/ IADD3 R4, P4, R4, 0x4000, RZ ; /* 0x0000400004047810 */ /* 0x002fe40007f9e0ff */ /*22f0*/ ISETP.GE.AND P1, PT, R2, R15, PT ; /* 0x0000000f0200720c */ /* 0x000fe40003f26270 */ /*2300*/ IADD3 R10, P3, R10, 0x4000, RZ ; /* 0x000040000a0a7810 */ /* 0x008fe20007f7e0ff */ /*2310*/ IMAD.X R5, RZ, RZ, R5, P4 ; /* 0x000000ffff057224 */ /* 0x000fe200020e0605 */ /*2320*/ IADD3 R6, P5, R6, 0x4000, RZ ; /* 0x0000400006067810 */ /* 0x001fc60007fbe0ff */ /*2330*/ IMAD.X R11, RZ, RZ, R11, P3 ; /* 0x000000ffff0b7224 */ /* 0x000fe400018e060b */ /*2340*/ IMAD.X R7, RZ, RZ, R7, P5 ; /* 0x000000ffff077224 */ /* 0x000fe200028e0607 */ /*2350*/ IADD3 R18, R20, R18, R3 ; /* 0x0000001214127210 */ /* 0x004fc80007ffe003 */ /*2360*/ IADD3 R8, R8, R21, R18 ; /* 0x0000001508087210 */ /* 0x010fc80007ffe012 */ /*2370*/ IADD3 R8, R22, R23, R8 ; /* 0x0000001716087210 */ /* 0x020fc80007ffe008 */ /*2380*/ IADD3 R8, R24, R25, R8 ; /* 0x0000001918087210 */ /* 0x000fc80007ffe008 */ /*2390*/ IADD3 R8, R26, R27, R8 ; /* 0x0000001b1a087210 */ /* 0x000fc80007ffe008 */ /*23a0*/ IADD3 R28, R28, R29, R8 ; /* 0x0000001d1c1c7210 */ /* 0x000fe40007ffe008 */ /*23b0*/ IADD3 R8, P2, R12, 0x4000, RZ ; /* 0x000040000c087810 */ /* 0x000fca0007f5e0ff */ /*23c0*/ IMAD.X R13, RZ, RZ, R13, P2 ; /* 0x000000ffff0d7224 */ /* 0x000fe200010e060d */ /*23d0*/ IADD3 R16, R19, R16, R28 ; /* 0x0000001013107210 */ /* 0x000fc80007ffe01c */ /*23e0*/ IADD3 R3, R17, R14, R16 ; /* 0x0000000e11037210 */ /* 0x000fe20007ffe010 */ /*23f0*/ @!P1 BRA 0x21c0 ; /* 0xfffffdc000009947 */ /* 0x000fea000383ffff */ /*2400*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2410*/ IMAD.IADD R12, R9, 0x1, -R2 ; /* 0x00000001090c7824 */ /* 0x000fe200078e0a02 */ /*2420*/ BSSY B2, 0x25d0 ; /* 0x000001a000027945 */ /* 0x000fe80003800000 */ /*2430*/ ISETP.GT.AND P1, PT, R12, 0x400, PT ; /* 0x000004000c00780c */ /* 0x000fda0003f24270 */ /*2440*/ @!P1 BRA 0x25c0 ; /* 0x0000017000009947 */ /* 0x000fea0003800000 */ /*2450*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0008 */ /*2460*/ LDG.E.CONSTANT R14, [R6.64] ; /* 0x00000004060e7981 */ /* 0x0000a8000c1e9900 */ /*2470*/ LDG.E.CONSTANT R15, [R4.64] ; /* 0x00000004040f7981 */ /* 0x0002a8000c1e9900 */ /*2480*/ LDG.E.CONSTANT R17, [R10.64] ; /* 0x000000040a117981 */ /* 0x000728000c1e9900 */ /*2490*/ LDG.E.CONSTANT R16, [R12.64] ; /* 0x000000040c107981 */ /* 0x000b28000c1e9900 */ /*24a0*/ LDG.E.CONSTANT R19, [R6.64+0x1000] ; /* 0x0010000406137981 */ /* 0x000128000c1e9900 */ /*24b0*/ LDG.E.CONSTANT R18, [R4.64+0x1000] ; /* 0x0010000404127981 */ /* 0x000328000c1e9900 */ /*24c0*/ LDG.E.CONSTANT R21, [R10.64+0x1000] ; /* 0x001000040a157981 */ /* 0x000728000c1e9900 */ /*24d0*/ LDG.E.CONSTANT R20, [R12.64+0x1000] ; /* 0x001000040c147981 */ /* 0x000b22000c1e9900 */ /*24e0*/ IADD3 R8, P1, R8, 0x2000, RZ ; /* 0x0000200008087810 */ /* 0x000fc40007f3e0ff */ /*24f0*/ IADD3 R4, P3, R4, 0x2000, RZ ; /* 0x0000200004047810 */ /* 0x002fe40007f7e0ff */ /*2500*/ IADD3 R6, P4, R6, 0x2000, RZ ; /* 0x0000200006067810 */ /* 0x001fe40007f9e0ff */ /*2510*/ IADD3 R10, P2, R10, 0x2000, RZ ; /* 0x000020000a0a7810 */ /* 0x008fe20007f5e0ff */ /*2520*/ IMAD.X R5, RZ, RZ, R5, P3 ; /* 0x000000ffff057224 */ /* 0x000fe200018e0605 */ /*2530*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*2540*/ IMAD.X R13, RZ, RZ, R13, P1 ; /* 0x000000ffff0d7224 */ /* 0x020fe200008e060d */ /*2550*/ IADD3 R2, R2, 0x800, RZ ; /* 0x0000080002027810 */ /* 0x000fe20007ffe0ff */ /*2560*/ IMAD.X R11, RZ, RZ, R11, P2 ; /* 0x000000ffff0b7224 */ /* 0x000fe400010e060b */ /*2570*/ IMAD.X R7, RZ, RZ, R7, P4 ; /* 0x000000ffff077224 */ /* 0x000fe200020e0607 */ /*2580*/ IADD3 R14, R15, R14, R3 ; /* 0x0000000e0f0e7210 */ /* 0x004fc80007ffe003 */ /*2590*/ IADD3 R14, R16, R17, R14 ; /* 0x00000011100e7210 */ /* 0x010fc80007ffe00e */ /*25a0*/ IADD3 R14, R18, R19, R14 ; /* 0x00000013120e7210 */ /* 0x000fc80007ffe00e */ /*25b0*/ IADD3 R3, R20, R21, R14 ; /* 0x0000001514037210 */ /* 0x000fe40007ffe00e */ /*25c0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*25d0*/ ISETP.LT.OR P0, PT, R2, R9, P0 ; /* 0x000000090200720c */ /* 0x000fe20000701670 */ /*25e0*/ IMAD.MOV.U32 R9, RZ, RZ, R13 ; /* 0x000000ffff097224 */ /* 0x000fd800078e000d */ /*25f0*/ @!P0 BRA 0x2660 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*2600*/ LDG.E.CONSTANT R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ea8000c1e9900 */ /*2610*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e9900 */ /*2620*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee8000c1e9900 */ /*2630*/ LDG.E.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee2000c1e9900 */ /*2640*/ IADD3 R3, R4, R6, R3 ; /* 0x0000000604037210 */ /* 0x004fc80007ffe003 */ /*2650*/ IADD3 R3, R8, R10, R3 ; /* 0x0000000a08037210 */ /* 0x008fe40007ffe003 */ /*2660*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2670*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e280000000000 */ /*2680*/ SHFL.DOWN PT, R2, R3, 0x1, 0x1f ; /* 0x08201f0003027f89 */ /* 0x000e6200000e0000 */ /*2690*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x041fe40003f04270 */ /*26a0*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*26b0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x002fe40004000000 */ /*26c0*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*26d0*/ IMAD.IADD R2, R2, 0x1, R3 ; /* 0x0000000102027824 */ /* 0x000fca00078e0203 */ /*26e0*/ SHFL.DOWN PT, R4, R2, 0x2, 0x1f ; /* 0x08401f0002047f89 */ /* 0x000e2200000e0000 */ /*26f0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff079819 */ /* 0x000fc80000011400 */ /*2700*/ @!P1 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x0000000007079211 */ /* 0x000fc800078f28ff */ /*2710*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fe40000011407 */ /*2720*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*2730*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*2740*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fca00078e0205 */ /*2750*/ SHFL.DOWN PT, R4, R5, 0x4, 0x1f ; /* 0x08801f0005047f89 */ /* 0x000e2400000e0000 */ /*2760*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*2770*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*2780*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*2790*/ SHFL.DOWN PT, R3, R4, 0x8, 0x1f ; /* 0x09001f0004037f89 */ /* 0x000e2400000e0000 */ /*27a0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*27b0*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*27c0*/ IMAD.IADD R2, R4, 0x1, R3 ; /* 0x0000000104027824 */ /* 0x000fe400078e0203 */ /*27d0*/ @!P1 IMAD.SHL.U32 R4, R7, 0x4, RZ ; /* 0x0000000407049824 */ /* 0x000fc600078e00ff */ /*27e0*/ SHFL.DOWN PT, R3, R2, 0x10, 0x1f ; /* 0x0a001f0002037f89 */ /* 0x000e2400000e0000 */ /*27f0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*2800*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*2810*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*2820*/ @!P1 STS [R4+0x8], R3 ; /* 0x0000080304009388 */ /* 0x0001e80000000800 */ /*2830*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*2840*/ @P0 BRA 0x35e0 ; /* 0x00000d9000000947 */ /* 0x000fea0003800000 */ /*2850*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x001fe80000000800 */ /*2860*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*2870*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000e620000000a00 */ /*2880*/ IADD3 R0, R4, R0, R3 ; /* 0x0000000004007210 */ /* 0x001fc80007ffe003 */ /*2890*/ IADD3 R0, R6, R0, R5 ; /* 0x0000000006007210 */ /* 0x000fc80007ffe005 */ /*28a0*/ IADD3 R8, R8, R0, R7 ; /* 0x0000000008087210 */ /* 0x002fe20007ffe007 */ /*28b0*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fc800078e00ff */ /*28c0*/ IMAD.IADD R3, R8, 0x1, R9 ; /* 0x0000000108037824 */ /* 0x000fe200078e0209 */ /*28d0*/ BRA 0x35e0 ; /* 0x00000d0000007947 */ /* 0x000fea0003800000 */ /*28e0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */ /* 0x001fe20003f06270 */ /*28f0*/ BSSY B1, 0x2980 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*2900*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */ /* 0x000fe400078e00ff */ /*2910*/ IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff067224 */ /* 0x000fd200078e0000 */ /*2920*/ @P0 BRA 0x2970 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*2930*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*2940*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x000fca00078e0205 */ /*2950*/ LDG.E.CONSTANT R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000162000c1e9900 */ /*2960*/ IADD3 R6, R0, 0x100, RZ ; /* 0x0000010000067810 */ /* 0x000fc60007ffe0ff */ /*2970*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2980*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x170], PT ; /* 0x00005c0006007a0c */ /* 0x000fe20003f06270 */ /*2990*/ BSSY B1, 0x2f80 ; /* 0x000005e000017945 */ /* 0x000fd80003800000 */ /*29a0*/ @P0 BRA 0x2f70 ; /* 0x000005c000000947 */ /* 0x000fea0003800000 */ /*29b0*/ LOP3.LUT R4, RZ, R6, RZ, 0x33, !PT ; /* 0x00000006ff047212 */ /* 0x001fe200078e33ff */ /*29c0*/ BSSY B2, 0x2af0 ; /* 0x0000012000027945 */ /* 0x000fe60003800000 */ /*29d0*/ IADD3 R5, R4, c[0x0][0x170], RZ ; /* 0x00005c0004057a10 */ /* 0x000fc80007ffe0ff */ /*29e0*/ LEA.HI R4, R5.reuse, 0x1, RZ, 0x18 ; /* 0x0000000105047811 */ /* 0x040fe400078fc0ff */ /*29f0*/ ISETP.GE.U32.AND P1, PT, R5, 0x300, PT ; /* 0x000003000500780c */ /* 0x000fe40003f26070 */ /*2a00*/ LOP3.LUT P0, R7, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304077812 */ /* 0x000fda000780c0ff */ /*2a10*/ @!P0 BRA 0x2ae0 ; /* 0x000000c000008947 */ /* 0x000fea0003800000 */ /*2a20*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*2a30*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fc800078e0205 */ /*2a40*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ; /* 0x000000ffff087224 */ /* 0x000fc800078e0004 */ /*2a50*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fcc00078e0008 */ /*2a60*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x0000a2000c1e9900 */ /*2a70*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*2a80*/ IADD3 R8, P2, R8, 0x400, RZ ; /* 0x0000040008087810 */ /* 0x000fe40007f5e0ff */ /*2a90*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*2aa0*/ IADD3 R6, R6, 0x100, RZ ; /* 0x0000010006067810 */ /* 0x000fe20007ffe0ff */ /*2ab0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe400010e0605 */ /*2ac0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x024fd000078e0203 */ /*2ad0*/ @P0 BRA 0x2a50 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*2ae0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2af0*/ @!P1 BRA 0x2f70 ; /* 0x0000047000009947 */ /* 0x000fea0003800000 */ /*2b00*/ IADD3 R4, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006047a10 */ /* 0x000fe20007ffe1ff */ /*2b10*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*2b20*/ BSSY B2, 0x2d80 ; /* 0x0000025000027945 */ /* 0x000fe20003800000 */ /*2b30*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*2b40*/ ISETP.GT.AND P1, PT, R4, 0xc00, PT ; /* 0x00000c000400780c */ /* 0x000fe20003f24270 */ /*2b50*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fd800078e0205 */ /*2b60*/ @!P1 BRA 0x2d70 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*2b70*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*2b80*/ IADD3 R23, R2, -0xc00, RZ ; /* 0xfffff40002177810 */ /* 0x000fe40007ffe0ff */ /*2b90*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e9900 */ /*2ba0*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*2bb0*/ LDG.E.CONSTANT R10, [R4.64+0x800] ; /* 0x00080004040a7981 */ /* 0x0000e8000c1e9900 */ /*2bc0*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x0000e8000c1e9900 */ /*2bd0*/ LDG.E.CONSTANT R12, [R4.64+0x1000] ; /* 0x00100004040c7981 */ /* 0x000128000c1e9900 */ /*2be0*/ LDG.E.CONSTANT R11, [R4.64+0x1400] ; /* 0x00140004040b7981 */ /* 0x000128000c1e9900 */ /*2bf0*/ LDG.E.CONSTANT R14, [R4.64+0x1800] ; /* 0x00180004040e7981 */ /* 0x000128000c1e9900 */ /*2c00*/ LDG.E.CONSTANT R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */ /* 0x000128000c1e9900 */ /*2c10*/ LDG.E.CONSTANT R16, [R4.64+0x2000] ; /* 0x0020000404107981 */ /* 0x000128000c1e9900 */ /*2c20*/ LDG.E.CONSTANT R15, [R4.64+0x2400] ; /* 0x00240004040f7981 */ /* 0x000128000c1e9900 */ /*2c30*/ LDG.E.CONSTANT R18, [R4.64+0x2800] ; /* 0x0028000404127981 */ /* 0x000128000c1e9900 */ /*2c40*/ LDG.E.CONSTANT R17, [R4.64+0x2c00] ; /* 0x002c000404117981 */ /* 0x000128000c1e9900 */ /*2c50*/ LDG.E.CONSTANT R20, [R4.64+0x3000] ; /* 0x0030000404147981 */ /* 0x000128000c1e9900 */ /*2c60*/ LDG.E.CONSTANT R19, [R4.64+0x3400] ; /* 0x0034000404137981 */ /* 0x000128000c1e9900 */ /*2c70*/ LDG.E.CONSTANT R22, [R4.64+0x3800] ; /* 0x0038000404167981 */ /* 0x000128000c1e9900 */ /*2c80*/ LDG.E.CONSTANT R21, [R4.64+0x3c00] ; /* 0x003c000404157981 */ /* 0x000122000c1e9900 */ /*2c90*/ IADD3 R6, R6, 0x1000, RZ ; /* 0x0000100006067810 */ /* 0x000fc80007ffe0ff */ /*2ca0*/ ISETP.GE.AND P1, PT, R6, R23, PT ; /* 0x000000170600720c */ /* 0x000fe40003f26270 */ /*2cb0*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*2cc0*/ IADD3 R8, P2, R4, 0x4000, RZ ; /* 0x0000400004087810 */ /* 0x000fca0007f5e0ff */ /*2cd0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe200010e0605 */ /*2ce0*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*2cf0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fc600078e0008 */ /*2d00*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*2d10*/ IADD3 R7, R13, R14, R7 ; /* 0x0000000e0d077210 */ /* 0x000fc80007ffe007 */ /*2d20*/ IADD3 R7, R15, R16, R7 ; /* 0x000000100f077210 */ /* 0x000fc80007ffe007 */ /*2d30*/ IADD3 R7, R17, R18, R7 ; /* 0x0000001211077210 */ /* 0x000fc80007ffe007 */ /*2d40*/ IADD3 R7, R19, R20, R7 ; /* 0x0000001413077210 */ /* 0x000fc80007ffe007 */ /*2d50*/ IADD3 R3, R21, R22, R7 ; /* 0x0000001615037210 */ /* 0x000fe20007ffe007 */ /*2d60*/ @!P1 BRA 0x2b90 ; /* 0xfffffe2000009947 */ /* 0x000fea000383ffff */ /*2d70*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2d80*/ IADD3 R7, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006077a10 */ /* 0x000fe20007ffe1ff */ /*2d90*/ BSSY B2, 0x2ef0 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*2da0*/ ISETP.GT.AND P1, PT, R7, 0x400, PT ; /* 0x000004000700780c */ /* 0x000fda0003f24270 */ /*2db0*/ @!P1 BRA 0x2ee0 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*2dc0*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e9900 */ /*2dd0*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*2de0*/ LDG.E.CONSTANT R10, [R4.64+0x800] ; /* 0x00080004040a7981 */ /* 0x0000e8000c1e9900 */ /*2df0*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x0000e8000c1e9900 */ /*2e00*/ LDG.E.CONSTANT R12, [R4.64+0x1000] ; /* 0x00100004040c7981 */ /* 0x000128000c1e9900 */ /*2e10*/ LDG.E.CONSTANT R11, [R4.64+0x1400] ; /* 0x00140004040b7981 */ /* 0x000128000c1e9900 */ /*2e20*/ LDG.E.CONSTANT R14, [R4.64+0x1800] ; /* 0x00180004040e7981 */ /* 0x000128000c1e9900 */ /*2e30*/ LDG.E.CONSTANT R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */ /* 0x000122000c1e9900 */ /*2e40*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*2e50*/ IADD3 R6, R6, 0x800, RZ ; /* 0x0000080006067810 */ /* 0x000fe40007ffe0ff */ /*2e60*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*2e70*/ IADD3 R8, P1, R4, 0x2000, RZ ; /* 0x0000200004087810 */ /* 0x000fca0007f3e0ff */ /*2e80*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x001fe200078e0008 */ /*2e90*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*2ea0*/ IMAD.X R9, RZ, RZ, R5, P1 ; /* 0x000000ffff097224 */ /* 0x000fc800008e0605 */ /*2eb0*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe200078e0009 */ /*2ec0*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*2ed0*/ IADD3 R3, R13, R14, R7 ; /* 0x0000000e0d037210 */ /* 0x000fe40007ffe007 */ /*2ee0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2ef0*/ ISETP.LT.OR P0, PT, R6, c[0x0][0x170], P0 ; /* 0x00005c0006007a0c */ /* 0x000fda0000701670 */ /*2f00*/ @!P0 BRA 0x2f70 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*2f10*/ LDG.E.CONSTANT R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea8000c1e9900 */ /*2f20*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*2f30*/ LDG.E.CONSTANT R8, [R4.64+0x800] ; /* 0x0008000404087981 */ /* 0x000ee8000c1e9900 */ /*2f40*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x000ee2000c1e9900 */ /*2f50*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x024fc80007ffe003 */ /*2f60*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fe40007ffe003 */ /*2f70*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2f80*/ ISETP.GT.AND P0, PT, R2, 0xff, PT ; /* 0x000000ff0200780c */ /* 0x000fda0003f04270 */ /*2f90*/ @P0 BRA 0x3390 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*2fa0*/ SHF.R.S32.HI R5, RZ, 0x1f, R0 ; /* 0x0000001fff057819 */ /* 0x001fe20000011400 */ /*2fb0*/ S2R R8, SR_LANEID ; /* 0x0000000000087919 */ /* 0x000e260000000000 */ /*2fc0*/ LEA.HI R7, R5, R0, RZ, 0x5 ; /* 0x0000000005077211 */ /* 0x000fc800078f28ff */ /*2fd0*/ LOP3.LUT R4, R7, 0xffffffe0, RZ, 0xc0, !PT ; /* 0xffffffe007047812 */ /* 0x000fe400078ec0ff */ /*2fe0*/ SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff077819 */ /* 0x000fe40000011407 */ /*2ff0*/ IADD3 R5, R4, 0x20, RZ ; /* 0x0000002004057810 */ /* 0x000fe40007ffe0ff */ /*3000*/ LOP3.LUT R4, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff047212 */ /* 0x000fe400078e33ff */ /*3010*/ ISETP.GT.AND P0, PT, R5, c[0x0][0x170], PT ; /* 0x00005c0005007a0c */ /* 0x000fe40003f04270 */ /*3020*/ IADD3 R4, R4, c[0x0][0x170], RZ ; /* 0x00005c0004047a10 */ /* 0x000fc80007ffe0ff */ /*3030*/ SEL R9, R4, 0x1f, P0 ; /* 0x0000001f04097807 */ /* 0x000fe40000000000 */ /*3040*/ IADD3 R6, R8, 0x2, RZ ; /* 0x0000000208067810 */ /* 0x001fc60007ffe0ff */ /*3050*/ SHFL.DOWN PT, R4, R3, 0x1, R9 ; /* 0x0820000003047989 */ /* 0x020e2200000e0009 */ /*3060*/ ISETP.GE.AND P0, PT, R8.reuse, R9.reuse, PT ; /* 0x000000090800720c */ /* 0x0c0fe40003f06270 */ /*3070*/ IADD3 R10, R8.reuse, 0x4, RZ ; /* 0x00000004080a7810 */ /* 0x040fe40007ffe0ff */ /*3080*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f25270 */ /*3090*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*30a0*/ ISETP.GT.AND P0, PT, R6, R9, PT ; /* 0x000000090600720c */ /* 0x000fc60003f04270 */ /*30b0*/ IMAD.IADD R4, R4, 0x1, R3 ; /* 0x0000000104047824 */ /* 0x000fca00078e0203 */ /*30c0*/ SHFL.DOWN PT, R5, R4, 0x2, R9 ; /* 0x0840000004057989 */ /* 0x000e2400000e0009 */ /*30d0*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*30e0*/ ISETP.GT.AND P0, PT, R10, R9, PT ; /* 0x000000090a00720c */ /* 0x000fc60003f04270 */ /*30f0*/ IMAD.IADD R5, R4, 0x1, R5 ; /* 0x0000000104057824 */ /* 0x000fe200078e0205 */ /*3100*/ IADD3 R4, R8.reuse, 0x8, RZ ; /* 0x0000000808047810 */ /* 0x040fe40007ffe0ff */ /*3110*/ IADD3 R8, R8, 0x10, RZ ; /* 0x0000001008087810 */ /* 0x000fe40007ffe0ff */ /*3120*/ SHFL.DOWN PT, R6, R5, 0x4, R9 ; /* 0x0880000005067989 */ /* 0x000e2400000e0009 */ /*3130*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*3140*/ ISETP.GT.AND P0, PT, R4, R9, PT ; /* 0x000000090400720c */ /* 0x000fc60003f04270 */ /*3150*/ IMAD.IADD R6, R5, 0x1, R6 ; /* 0x0000000105067824 */ /* 0x000fca00078e0206 */ /*3160*/ SHFL.DOWN PT, R3, R6, 0x8, R9 ; /* 0x0900000006037989 */ /* 0x000e2400000e0009 */ /*3170*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*3180*/ ISETP.GT.AND P0, PT, R8, R9, PT ; /* 0x000000090800720c */ /* 0x000fc60003f04270 */ /*3190*/ IMAD.IADD R4, R6, 0x1, R3 ; /* 0x0000000106047824 */ /* 0x000fe400078e0203 */ /*31a0*/ @!P1 IMAD.SHL.U32 R6, R7, 0x4, RZ ; /* 0x0000000407069824 */ /* 0x000fc600078e00ff */ /*31b0*/ SHFL.DOWN PT, R3, R4, 0x10, R9 ; /* 0x0a00000004037989 */ /* 0x000e2400000e0009 */ /*31c0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*31d0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*31e0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x000fca00078e0203 */ /*31f0*/ @!P1 STS [R6+0x8], R3 ; /* 0x0000080306009388 */ /* 0x0001e80000000800 */ /*3200*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*3210*/ @P0 BRA 0x35e0 ; /* 0x000003c000000947 */ /* 0x000fea0003800000 */ /*3220*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x001e220000000c00 */ /*3230*/ ISETP.GT.AND P1, PT, R2, 0x40, PT ; /* 0x000000400200780c */ /* 0x000fc40003f24270 */ /*3240*/ ISETP.GT.AND P0, PT, R2.reuse, 0x20, PT ; /* 0x000000200200780c */ /* 0x040fe20003f04270 */ /*3250*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x000e620000000800 */ /*3260*/ ISETP.GT.AND P2, PT, R2, 0xa0, PT ; /* 0x000000a00200780c */ /* 0x000fc60003f44270 */ /*3270*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000ea20000000a00 */ /*3280*/ SEL R4, R4, RZ, P1 ; /* 0x000000ff04047207 */ /* 0x001fe40000800000 */ /*3290*/ ISETP.GT.AND P1, PT, R2, 0x80, PT ; /* 0x000000800200780c */ /* 0x000fe40003f24270 */ /*32a0*/ SEL R0, R0, RZ, P0 ; /* 0x000000ff00007207 */ /* 0x002fe40000000000 */ /*32b0*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */ /* 0x000fe40000800000 */ /*32c0*/ ISETP.GE.AND P1, PT, R2.reuse, 0xe1, PT ; /* 0x000000e10200780c */ /* 0x040fe40003f26270 */ /*32d0*/ ISETP.GT.AND P0, PT, R2, 0x60, PT ; /* 0x000000600200780c */ /* 0x000fc40003f04270 */ /*32e0*/ IADD3 R0, R4, R3, R0 ; /* 0x0000000304007210 */ /* 0x000fe40007ffe000 */ /*32f0*/ SEL R5, R5, RZ, P0 ; /* 0x000000ff05057207 */ /* 0x000fe40000000000 */ /*3300*/ ISETP.GT.AND P0, PT, R2, 0xc0, PT ; /* 0x000000c00200780c */ /* 0x000fe40003f04270 */ /*3310*/ SEL R2, R7, RZ, P2 ; /* 0x000000ff07027207 */ /* 0x000fe40001000000 */ /*3320*/ IADD3 R5, R6, R0, R5 ; /* 0x0000000006057210 */ /* 0x000fe20007ffe005 */ /*3330*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*3340*/ SEL R8, R8, RZ, P0 ; /* 0x000000ff08087207 */ /* 0x004fc80000000000 */ /*3350*/ IADD3 R3, R8, R5, R2 ; /* 0x0000000508037210 */ /* 0x000fe20007ffe002 */ /*3360*/ @!P1 BRA 0x35e0 ; /* 0x0000027000009947 */ /* 0x000fea0003800000 */ /*3370*/ IMAD.IADD R3, R3, 0x1, R9 ; /* 0x0000000103037824 */ /* 0x000fe200078e0209 */ /*3380*/ BRA 0x35e0 ; /* 0x0000025000007947 */ /* 0x000fea0003800000 */ /*3390*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e620000000000 */ /*33a0*/ ISETP.NE.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f45270 */ /*33b0*/ SHFL.DOWN PT, R2, R3, 0x1, 0x1f ; /* 0x08201f0003027f89 */ /* 0x020ea200000e0000 */ /*33c0*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x042fe40003f04270 */ /*33d0*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*33e0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x004fe40004000000 */ /*33f0*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*3400*/ IMAD.IADD R2, R2, 0x1, R3 ; /* 0x0000000102027824 */ /* 0x000fca00078e0203 */ /*3410*/ SHFL.DOWN PT, R4, R2, 0x2, 0x1f ; /* 0x08401f0002047f89 */ /* 0x001e2200000e0000 */ /*3420*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff079819 */ /* 0x000fc80000011400 */ /*3430*/ @!P1 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x0000000007079211 */ /* 0x000fe200078f28ff */ /*3440*/ @!P2 IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff00a224 */ /* 0x000fc600078e00ff */ /*3450*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fca0000011407 */ /*3460*/ @!P1 IMAD.SHL.U32 R10, R7, 0x4, RZ ; /* 0x00000004070a9824 */ /* 0x000fe200078e00ff */ /*3470*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*3480*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*3490*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fca00078e0205 */ /*34a0*/ SHFL.DOWN PT, R4, R5, 0x4, 0x1f ; /* 0x08801f0005047f89 */ /* 0x000e2400000e0000 */ /*34b0*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*34c0*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*34d0*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*34e0*/ SHFL.DOWN PT, R3, R4, 0x8, 0x1f ; /* 0x09001f0004037f89 */ /* 0x000e2400000e0000 */ /*34f0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*3500*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*3510*/ IMAD.IADD R2, R4, 0x1, R3 ; /* 0x0000000104027824 */ /* 0x000fca00078e0203 */ /*3520*/ SHFL.DOWN PT, R3, R2, 0x10, 0x1f ; /* 0x0a001f0002037f89 */ /* 0x000e2400000e0000 */ /*3530*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fca0004000000 */ /*3540*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*3550*/ @!P1 STS [R10+0x8], R3 ; /* 0x000008030a009388 */ /* 0x000fe80000000800 */ /*3560*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*3570*/ @!P2 LDS R2, [0xc] ; /* 0x00000c00ff02a984 */ /* 0x000fe80000000800 */ /*3580*/ @!P2 LDS.128 R4, [0x10] ; /* 0x00001000ff04a984 */ /* 0x000e280000000c00 */ /*3590*/ @!P2 LDS.64 R8, [0x20] ; /* 0x00002000ff08a984 */ /* 0x000e620000000a00 */ /*35a0*/ @!P2 IADD3 R2, R4, R2, R3 ; /* 0x000000020402a210 */ /* 0x001fc80007ffe003 */ /*35b0*/ @!P2 IADD3 R2, R6, R2, R5 ; /* 0x000000020602a210 */ /* 0x000fc80007ffe005 */ /*35c0*/ @!P2 IADD3 R2, R8, R2, R7 ; /* 0x000000020802a210 */ /* 0x002fca0007ffe007 */ /*35d0*/ @!P2 IMAD.IADD R3, R2, 0x1, R9 ; /* 0x000000010203a824 */ /* 0x000fe400078e0209 */ /*35e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*35f0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*3600*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*3610*/ IADD3 R5, R3, c[0x0][0x178], RZ ; /* 0x00005e0003057a10 */ /* 0x000fe20007ffe0ff */ /*3620*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*3630*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fca00078e00ff */ /*3640*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*3650*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*3660*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e240000002100 */ /*3670*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x001fda0003f05270 */ /*3680*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*3690*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff057624 */ /* 0x000fe400078e00ff */ /*36a0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*36b0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fca00078e00ff */ /*36c0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*36d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*36e0*/ BRA 0x36e0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*36f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3700*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3710*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3720*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3730*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3740*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3750*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3760*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3770*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEyS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0030*/ BSSY B0, 0x1ca0 ; /* 0x00001c6000007945 */ /* 0x000fe20003800000 */ /*0040*/ IMAD.SHL.U32 R5, R0, 0x1000, RZ ; /* 0x0000100000057824 */ /* 0x001fca00078e00ff */ /*0050*/ IADD3 R27, P1, -R5, c[0x0][0x198], RZ ; /* 0x00006600051b7a10 */ /* 0x000fe40007f3e1ff */ /*0060*/ SHF.R.S32.HI R3, RZ, 0x1f, R5 ; /* 0x0000001fff037819 */ /* 0x000fe40000011405 */ /*0070*/ ISETP.GE.U32.AND P0, PT, R27, 0x1000, PT ; /* 0x000010001b00780c */ /* 0x000fe40003f06070 */ /*0080*/ IADD3.X R29, ~R3, c[0x0][0x19c], RZ, P1, !PT ; /* 0x00006700031d7a10 */ /* 0x000fc80000ffe5ff */ /*0090*/ ISETP.GE.U32.AND.EX P0, PT, R29, RZ, PT, P0 ; /* 0x000000ff1d00720c */ /* 0x000fda0003f06100 */ /*00a0*/ @!P0 BRA 0xf00 ; /* 0x00000e5000008947 */ /* 0x000fea0003800000 */ /*00b0*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */ /* 0x000e240000002100 */ /*00c0*/ IADD3 R10, P0, R5, R2, RZ ; /* 0x00000002050a7210 */ /* 0x001fc80007f1e0ff */ /*00d0*/ LEA.HI.X.SX32 R9, R2, R3, 0x1, P0 ; /* 0x0000000302097211 */ /* 0x000fe400000f0eff */ /*00e0*/ LEA R6, P0, R10, c[0x0][0x160], 0x2 ; /* 0x000058000a067a11 */ /* 0x000fc800078010ff */ /*00f0*/ LEA.HI.X R7, R10, c[0x0][0x164], R9, 0x2, P0 ; /* 0x000059000a077a11 */ /* 0x000fca00000f1409 */ /*0100*/ LDG.E R4, [R6.64+0x400] ; /* 0x0004000606047981 */ /* 0x000ea8000c1e1900 */ /*0110*/ LDG.E R11, [R6.64] ; /* 0x00000006060b7981 */ /* 0x000ea8000c1e1900 */ /*0120*/ LDG.E R8, [R6.64+0x800] ; /* 0x0008000606087981 */ /* 0x000ea8000c1e1900 */ /*0130*/ LDG.E R13, [R6.64+0xc00] ; /* 0x000c0006060d7981 */ /* 0x000ee8000c1e1900 */ /*0140*/ LDG.E R12, [R6.64+0x1000] ; /* 0x00100006060c7981 */ /* 0x000ee8000c1e1900 */ /*0150*/ LDG.E R15, [R6.64+0x1400] ; /* 0x00140006060f7981 */ /* 0x000f28000c1e1900 */ /*0160*/ LDG.E R14, [R6.64+0x1800] ; /* 0x00180006060e7981 */ /* 0x000f28000c1e1900 */ /*0170*/ LDG.E R17, [R6.64+0x1c00] ; /* 0x001c000606117981 */ /* 0x000f68000c1e1900 */ /*0180*/ LDG.E R16, [R6.64+0x2000] ; /* 0x0020000606107981 */ /* 0x000f68000c1e1900 */ /*0190*/ LDG.E R19, [R6.64+0x2400] ; /* 0x0024000606137981 */ /* 0x000f68000c1e1900 */ /*01a0*/ LDG.E R18, [R6.64+0x2800] ; /* 0x0028000606127981 */ /* 0x000f68000c1e1900 */ /*01b0*/ LDG.E R21, [R6.64+0x2c00] ; /* 0x002c000606157981 */ /* 0x000f68000c1e1900 */ /*01c0*/ LDG.E R20, [R6.64+0x3000] ; /* 0x0030000606147981 */ /* 0x000f68000c1e1900 */ /*01d0*/ LDG.E R23, [R6.64+0x3400] ; /* 0x0034000606177981 */ /* 0x000f68000c1e1900 */ /*01e0*/ LDG.E R22, [R6.64+0x3800] ; /* 0x0038000606167981 */ /* 0x000f68000c1e1900 */ /*01f0*/ LDG.E R25, [R6.64+0x3c00] ; /* 0x003c000606197981 */ /* 0x000f62000c1e1900 */ /*0200*/ IADD3 R4, R8, R4, R11 ; /* 0x0000000408047210 */ /* 0x004fe20007ffe00b */ /*0210*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x1a0] ; /* 0x00006800ff087624 */ /* 0x000fc600078e00ff */ /*0220*/ IADD3 R4, R12, R13, R4 ; /* 0x0000000d0c047210 */ /* 0x008fc80007ffe004 */ /*0230*/ IADD3 R4, R14, R15, R4 ; /* 0x0000000f0e047210 */ /* 0x010fc80007ffe004 */ /*0240*/ IADD3 R16, R16, R17, R4 ; /* 0x0000001110107210 */ /* 0x020fe20007ffe004 */ /*0250*/ IMAD.SHL.U32 R4, R8, 0x1000, RZ ; /* 0x0000100008047824 */ /* 0x000fca00078e00ff */ /*0260*/ ISETP.GE.U32.AND P0, PT, R27, R4, PT ; /* 0x000000041b00720c */ /* 0x000fe40003f06070 */ /*0270*/ SHF.R.S32.HI R8, RZ, 0x1f, R4 ; /* 0x0000001fff087819 */ /* 0x000fe40000011404 */ /*0280*/ IADD3 R16, R18, R19, R16 ; /* 0x0000001312107210 */ /* 0x000fe40007ffe010 */ /*0290*/ ISETP.GE.U32.AND.EX P0, PT, R29, R8, PT, P0 ; /* 0x000000081d00720c */ /* 0x000fe40003f06100 */ /*02a0*/ IADD3 R16, R20, R21, R16 ; /* 0x0000001514107210 */ /* 0x000fc80007ffe010 */ /*02b0*/ IADD3 R16, R22, R23, R16 ; /* 0x0000001716107210 */ /* 0x000fca0007ffe010 */ /*02c0*/ IMAD.IADD R6, R16, 0x1, R25 ; /* 0x0000000110067824 */ /* 0x000fe400078e0219 */ /*02d0*/ @!P0 BRA 0xc80 ; /* 0x000009a000008947 */ /* 0x000fea0003800000 */ /*02e0*/ ULDC.64 UR4, c[0x0][0x198] ; /* 0x0000660000047ab9 */ /* 0x000fe20000000a00 */ /*02f0*/ IADD3 R5, P0, R4.reuse, R5, RZ ; /* 0x0000000504057210 */ /* 0x040fe20007f1e0ff */ /*0300*/ UIADD3 UR4, UP0, UR4, -0x1000, URZ ; /* 0xfffff00004047890 */ /* 0x000fe2000ff1e03f */ /*0310*/ IADD3 R10, P1, R4, R10, RZ ; /* 0x0000000a040a7210 */ /* 0x000fe20007f3e0ff */ /*0320*/ IMAD.MOV.U32 R12, RZ, RZ, R2 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e0002 */ /*0330*/ UIADD3.X UR5, UR5, -0x1, URZ, UP0, !UPT ; /* 0xffffffff05057890 */ /* 0x000fe200087fe43f */ /*0340*/ IMAD.X R3, R8.reuse, 0x1, R3, P0 ; /* 0x0000000108037824 */ /* 0x040fe200000e0603 */ /*0350*/ ISETP.GT.U32.AND P0, PT, R5, UR4, PT ; /* 0x0000000405007c0c */ /* 0x000fe2000bf04070 */ /*0360*/ IMAD.X R9, R8, 0x1, R9, P1 ; /* 0x0000000108097824 */ /* 0x000fe200008e0609 */ /*0370*/ LEA R14, P2, R10, c[0x0][0x160], 0x2 ; /* 0x000058000a0e7a11 */ /* 0x000fc400078410ff */ /*0380*/ ISETP.GT.U32.AND.EX P0, PT, R3, UR5, PT, P0 ; /* 0x0000000503007c0c */ /* 0x000fe4000bf04100 */ /*0390*/ LEA R16, P1, R5.reuse, c[0x0][0x160], 0x2 ; /* 0x0000580005107a11 */ /* 0x040fe400078210ff */ /*03a0*/ LEA.HI.X R15, R10, c[0x0][0x164], R9, 0x2, P2 ; /* 0x000059000a0f7a11 */ /* 0x000fe400010f1409 */ /*03b0*/ LEA.HI.X R17, R5, c[0x0][0x164], R3, 0x2, P1 ; /* 0x0000590005117a11 */ /* 0x000fce00008f1403 */ /*03c0*/ @P0 BRA 0x650 ; /* 0x0000028000000947 */ /* 0x000fea0003800000 */ /*03d0*/ IADD3 R7, P0, R12, R5, RZ ; /* 0x000000050c077210 */ /* 0x000fc80007f1e0ff */ /*03e0*/ LEA.HI.X.SX32 R18, R12, R3, 0x1, P0 ; /* 0x000000030c127211 */ /* 0x000fe400000f0eff */ /*03f0*/ LEA R10, P0, R7, c[0x0][0x160], 0x2 ; /* 0x00005800070a7a11 */ /* 0x000fc800078010ff */ /*0400*/ LEA.HI.X R11, R7, c[0x0][0x164], R18, 0x2, P0 ; /* 0x00005900070b7a11 */ /* 0x000fca00000f1412 */ /*0410*/ LDG.E R13, [R10.64] ; /* 0x000000060a0d7981 */ /* 0x000ea8000c1e1900 */ /*0420*/ LDG.E R19, [R10.64+0x400] ; /* 0x000400060a137981 */ /* 0x000ea8000c1e1900 */ /*0430*/ LDG.E R20, [R10.64+0x800] ; /* 0x000800060a147981 */ /* 0x000ee8000c1e1900 */ /*0440*/ LDG.E R21, [R10.64+0xc00] ; /* 0x000c00060a157981 */ /* 0x000ee8000c1e1900 */ /*0450*/ LDG.E R22, [R10.64+0x1000] ; /* 0x001000060a167981 */ /* 0x000f28000c1e1900 */ /*0460*/ LDG.E R23, [R10.64+0x1400] ; /* 0x001400060a177981 */ /* 0x000f28000c1e1900 */ /*0470*/ LDG.E R24, [R10.64+0x1800] ; /* 0x001800060a187981 */ /* 0x000f68000c1e1900 */ /*0480*/ LDG.E R25, [R10.64+0x1c00] ; /* 0x001c00060a197981 */ /* 0x000f68000c1e1900 */ /*0490*/ LDG.E R26, [R10.64+0x2000] ; /* 0x002000060a1a7981 */ /* 0x000f68000c1e1900 */ /*04a0*/ LDG.E R27, [R10.64+0x2400] ; /* 0x002400060a1b7981 */ /* 0x000f68000c1e1900 */ /*04b0*/ LDG.E R28, [R10.64+0x2800] ; /* 0x002800060a1c7981 */ /* 0x000f68000c1e1900 */ /*04c0*/ LDG.E R29, [R10.64+0x2c00] ; /* 0x002c00060a1d7981 */ /* 0x000f68000c1e1900 */ /*04d0*/ LDG.E R18, [R10.64+0x3000] ; /* 0x003000060a127981 */ /* 0x000f68000c1e1900 */ /*04e0*/ LDG.E R9, [R10.64+0x3400] ; /* 0x003400060a097981 */ /* 0x000f68000c1e1900 */ /*04f0*/ LDG.E R7, [R10.64+0x3800] ; /* 0x003800060a077981 */ /* 0x000f68000c1e1900 */ /*0500*/ LDG.E R30, [R10.64+0x3c00] ; /* 0x003c00060a1e7981 */ /* 0x000f62000c1e1900 */ /*0510*/ IADD3 R13, R19, R13, R6 ; /* 0x0000000d130d7210 */ /* 0x004fc40007ffe006 */ /*0520*/ IADD3 R19, P1, -R5, c[0x0][0x198], RZ ; /* 0x0000660005137a10 */ /* 0x000fc80007f3e1ff */ /*0530*/ ISETP.GE.U32.AND P0, PT, R19, R4, PT ; /* 0x000000041300720c */ /* 0x000fe40003f06070 */ /*0540*/ IADD3 R13, R21, R20, R13 ; /* 0x00000014150d7210 */ /* 0x008fe40007ffe00d */ /*0550*/ IADD3.X R19, ~R3, c[0x0][0x19c], RZ, P1, !PT ; /* 0x0000670003137a10 */ /* 0x000fc80000ffe5ff */ /*0560*/ ISETP.GE.U32.AND.EX P0, PT, R19, R8, PT, P0 ; /* 0x000000081300720c */ /* 0x000fe40003f06100 */ /*0570*/ IADD3 R13, R23, R22, R13 ; /* 0x00000016170d7210 */ /* 0x010fc80007ffe00d */ /*0580*/ IADD3 R13, R25, R24, R13 ; /* 0x00000018190d7210 */ /* 0x020fc80007ffe00d */ /*0590*/ IADD3 R13, R27, R26, R13 ; /* 0x0000001a1b0d7210 */ /* 0x000fc80007ffe00d */ /*05a0*/ IADD3 R13, R29, R28, R13 ; /* 0x0000001c1d0d7210 */ /* 0x000fc80007ffe00d */ /*05b0*/ IADD3 R18, R9, R18, R13 ; /* 0x0000001209127210 */ /* 0x000fc80007ffe00d */ /*05c0*/ IADD3 R6, R30, R7, R18 ; /* 0x000000071e067210 */ /* 0x000fe20007ffe012 */ /*05d0*/ @!P0 BRA 0xc80 ; /* 0x000006a000008947 */ /* 0x000fea0003800000 */ /*05e0*/ IADD3 R5, P0, R4.reuse, R5, RZ ; /* 0x0000000504057210 */ /* 0x040fe20007f1e0ff */ /*05f0*/ IMAD.WIDE R16, R4, 0x4, R16 ; /* 0x0000000404107825 */ /* 0x000fc800078e0210 */ /*0600*/ IMAD.X R3, R8, 0x1, R3, P0 ; /* 0x0000000108037824 */ /* 0x000fe200000e0603 */ /*0610*/ ISETP.GT.U32.AND P0, PT, R5, UR4, PT ; /* 0x0000000405007c0c */ /* 0x000fe2000bf04070 */ /*0620*/ IMAD.WIDE R14, R4, 0x4, R14 ; /* 0x00000004040e7825 */ /* 0x000fc600078e020e */ /*0630*/ ISETP.GT.U32.AND.EX P0, PT, R3, UR5, PT, P0 ; /* 0x0000000503007c0c */ /* 0x000fda000bf04100 */ /*0640*/ @!P0 BRA 0x3d0 ; /* 0xfffffd8000008947 */ /* 0x000fea000383ffff */ /*0650*/ ISETP.GE.U32.AND P0, PT, R5, c[0x0][0x198], PT ; /* 0x0000660005007a0c */ /* 0x000fc80003f06070 */ /*0660*/ ISETP.GE.U32.AND.EX P0, PT, R3, c[0x0][0x19c], PT, P0 ; /* 0x0000670003007a0c */ /* 0x000fda0003f06100 */ /*0670*/ @P0 BRA 0xc80 ; /* 0x0000060000000947 */ /* 0x000fea0003800000 */ /*0680*/ IADD3 R3, -R5, c[0x0][0x198], RZ ; /* 0x0000660005037a10 */ /* 0x000fe20007ffe1ff */ /*0690*/ BSSY B1, 0xc80 ; /* 0x000005e000017945 */ /* 0x000fe60003800000 */ /*06a0*/ ISETP.GE.AND P0, PT, R12, R3, PT ; /* 0x000000030c00720c */ /* 0x000fda0003f06270 */ /*06b0*/ @P0 BRA 0xc70 ; /* 0x000005b000000947 */ /* 0x000fea0003800000 */ /*06c0*/ LOP3.LUT R4, RZ, R12, RZ, 0x33, !PT ; /* 0x0000000cff047212 */ /* 0x000fe200078e33ff */ /*06d0*/ BSSY B2, 0x800 ; /* 0x0000012000027945 */ /* 0x000fe60003800000 */ /*06e0*/ IADD3 R5, -R5, c[0x0][0x198], R4 ; /* 0x0000660005057a10 */ /* 0x000fc80007ffe104 */ /*06f0*/ LEA.HI R4, R5.reuse, 0x1, RZ, 0x18 ; /* 0x0000000105047811 */ /* 0x040fe400078fc0ff */ /*0700*/ ISETP.GE.U32.AND P0, PT, R5, 0x300, PT ; /* 0x000003000500780c */ /* 0x000fe40003f06070 */ /*0710*/ LOP3.LUT P1, R4, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304047812 */ /* 0x000fda000782c0ff */ /*0720*/ @!P1 BRA 0x7f0 ; /* 0x000000c000009947 */ /* 0x000fea0003800000 */ /*0730*/ S2R R12, SR_TID.X ; /* 0x00000000000c7919 */ /* 0x000e220000002100 */ /*0740*/ IMAD.MOV.U32 R7, RZ, RZ, R4 ; /* 0x000000ffff077224 */ /* 0x000fc600078e0004 */ /*0750*/ IMAD.MOV.U32 R5, RZ, RZ, R15 ; /* 0x000000ffff057224 */ /* 0x000fe400078e000f */ /*0760*/ IMAD.MOV.U32 R4, RZ, RZ, R14 ; /* 0x000000ffff047224 */ /* 0x000fca00078e000e */ /*0770*/ LDG.E R5, [R4.64] ; /* 0x0000000604057981 */ /* 0x000ea2000c1e1900 */ /*0780*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*0790*/ IADD3 R14, P2, R14, 0x400, RZ ; /* 0x000004000e0e7810 */ /* 0x000fe40007f5e0ff */ /*07a0*/ ISETP.NE.AND P1, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f25270 */ /*07b0*/ IADD3 R12, R12, 0x100, RZ ; /* 0x000001000c0c7810 */ /* 0x001fe20007ffe0ff */ /*07c0*/ IMAD.X R15, RZ, RZ, R15, P2 ; /* 0x000000ffff0f7224 */ /* 0x000fe400010e060f */ /*07d0*/ IMAD.IADD R6, R5, 0x1, R6 ; /* 0x0000000105067824 */ /* 0x004fd000078e0206 */ /*07e0*/ @P1 BRA 0x750 ; /* 0xffffff6000001947 */ /* 0x000fea000383ffff */ /*07f0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0800*/ @!P0 BRA 0xc70 ; /* 0x0000046000008947 */ /* 0x000fea0003800000 */ /*0810*/ IMAD.IADD R4, R3, 0x1, -R12 ; /* 0x0000000103047824 */ /* 0x000fe200078e0a0c */ /*0820*/ BSSY B2, 0xa80 ; /* 0x0000025000027945 */ /* 0x000fe20003800000 */ /*0830*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fc60003f0f070 */ /*0840*/ ISETP.GT.AND P1, PT, R4, 0xc00, PT ; /* 0x00000c000400780c */ /* 0x000fe20003f24270 */ /*0850*/ IMAD.WIDE R4, R12, 0x4, R16 ; /* 0x000000040c047825 */ /* 0x000fd800078e0210 */ /*0860*/ @!P1 BRA 0xa70 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*0870*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0880*/ IADD3 R23, R3, -0xc00, RZ ; /* 0xfffff40003177810 */ /* 0x000fe40007ffe0ff */ /*0890*/ LDG.E R7, [R4.64] ; /* 0x0000000604077981 */ /* 0x000ea8000c1e1900 */ /*08a0*/ LDG.E R8, [R4.64+0x400] ; /* 0x0004000604087981 */ /* 0x000ea8000c1e1900 */ /*08b0*/ LDG.E R10, [R4.64+0x800] ; /* 0x00080006040a7981 */ /* 0x0000e8000c1e1900 */ /*08c0*/ LDG.E R9, [R4.64+0xc00] ; /* 0x000c000604097981 */ /* 0x0000e8000c1e1900 */ /*08d0*/ LDG.E R14, [R4.64+0x1000] ; /* 0x00100006040e7981 */ /* 0x000128000c1e1900 */ /*08e0*/ LDG.E R11, [R4.64+0x1400] ; /* 0x00140006040b7981 */ /* 0x000128000c1e1900 */ /*08f0*/ LDG.E R16, [R4.64+0x1800] ; /* 0x0018000604107981 */ /* 0x000168000c1e1900 */ /*0900*/ LDG.E R13, [R4.64+0x1c00] ; /* 0x001c0006040d7981 */ /* 0x000168000c1e1900 */ /*0910*/ LDG.E R18, [R4.64+0x2000] ; /* 0x0020000604127981 */ /* 0x000168000c1e1900 */ /*0920*/ LDG.E R15, [R4.64+0x2400] ; /* 0x00240006040f7981 */ /* 0x000168000c1e1900 */ /*0930*/ LDG.E R20, [R4.64+0x2800] ; /* 0x0028000604147981 */ /* 0x000168000c1e1900 */ /*0940*/ LDG.E R17, [R4.64+0x2c00] ; /* 0x002c000604117981 */ /* 0x000168000c1e1900 */ /*0950*/ LDG.E R22, [R4.64+0x3000] ; /* 0x0030000604167981 */ /* 0x000168000c1e1900 */ /*0960*/ LDG.E R19, [R4.64+0x3400] ; /* 0x0034000604137981 */ /* 0x000168000c1e1900 */ /*0970*/ LDG.E R24, [R4.64+0x3800] ; /* 0x0038000604187981 */ /* 0x000168000c1e1900 */ /*0980*/ LDG.E R21, [R4.64+0x3c00] ; /* 0x003c000604157981 */ /* 0x000162000c1e1900 */ /*0990*/ IADD3 R12, R12, 0x1000, RZ ; /* 0x000010000c0c7810 */ /* 0x000fc80007ffe0ff */ /*09a0*/ ISETP.GE.AND P1, PT, R12, R23, PT ; /* 0x000000170c00720c */ /* 0x000fe40003f26270 */ /*09b0*/ IADD3 R7, R8, R7, R6 ; /* 0x0000000708077210 */ /* 0x004fe40007ffe006 */ /*09c0*/ IADD3 R8, P2, R4, 0x4000, RZ ; /* 0x0000400004087810 */ /* 0x000fca0007f5e0ff */ /*09d0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe200010e0605 */ /*09e0*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*09f0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fc600078e0008 */ /*0a00*/ IADD3 R7, R11, R14, R7 ; /* 0x0000000e0b077210 */ /* 0x010fc80007ffe007 */ /*0a10*/ IADD3 R7, R13, R16, R7 ; /* 0x000000100d077210 */ /* 0x020fc80007ffe007 */ /*0a20*/ IADD3 R7, R15, R18, R7 ; /* 0x000000120f077210 */ /* 0x000fc80007ffe007 */ /*0a30*/ IADD3 R7, R17, R20, R7 ; /* 0x0000001411077210 */ /* 0x000fc80007ffe007 */ /*0a40*/ IADD3 R7, R19, R22, R7 ; /* 0x0000001613077210 */ /* 0x000fc80007ffe007 */ /*0a50*/ IADD3 R6, R21, R24, R7 ; /* 0x0000001815067210 */ /* 0x000fe20007ffe007 */ /*0a60*/ @!P1 BRA 0x890 ; /* 0xfffffe2000009947 */ /* 0x000fea000383ffff */ /*0a70*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0a80*/ IMAD.IADD R7, R3, 0x1, -R12 ; /* 0x0000000103077824 */ /* 0x000fe200078e0a0c */ /*0a90*/ BSSY B2, 0xbf0 ; /* 0x0000015000027945 */ /* 0x000fe80003800000 */ /*0aa0*/ ISETP.GT.AND P1, PT, R7, 0x400, PT ; /* 0x000004000700780c */ /* 0x000fda0003f24270 */ /*0ab0*/ @!P1 BRA 0xbe0 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*0ac0*/ LDG.E R7, [R4.64] ; /* 0x0000000604077981 */ /* 0x000ea8000c1e1900 */ /*0ad0*/ LDG.E R8, [R4.64+0x400] ; /* 0x0004000604087981 */ /* 0x000ea8000c1e1900 */ /*0ae0*/ LDG.E R10, [R4.64+0x800] ; /* 0x00080006040a7981 */ /* 0x0000e8000c1e1900 */ /*0af0*/ LDG.E R9, [R4.64+0xc00] ; /* 0x000c000604097981 */ /* 0x0000e8000c1e1900 */ /*0b00*/ LDG.E R14, [R4.64+0x1000] ; /* 0x00100006040e7981 */ /* 0x000128000c1e1900 */ /*0b10*/ LDG.E R11, [R4.64+0x1400] ; /* 0x00140006040b7981 */ /* 0x000128000c1e1900 */ /*0b20*/ LDG.E R16, [R4.64+0x1800] ; /* 0x0018000604107981 */ /* 0x000168000c1e1900 */ /*0b30*/ LDG.E R13, [R4.64+0x1c00] ; /* 0x001c0006040d7981 */ /* 0x000162000c1e1900 */ /*0b40*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*0b50*/ IADD3 R12, R12, 0x800, RZ ; /* 0x000008000c0c7810 */ /* 0x000fe40007ffe0ff */ /*0b60*/ IADD3 R7, R8, R7, R6 ; /* 0x0000000708077210 */ /* 0x004fe40007ffe006 */ /*0b70*/ IADD3 R8, P1, R4, 0x2000, RZ ; /* 0x0000200004087810 */ /* 0x000fca0007f3e0ff */ /*0b80*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x001fe200078e0008 */ /*0b90*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*0ba0*/ IMAD.X R9, RZ, RZ, R5, P1 ; /* 0x000000ffff097224 */ /* 0x000fc800008e0605 */ /*0bb0*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe200078e0009 */ /*0bc0*/ IADD3 R7, R11, R14, R7 ; /* 0x0000000e0b077210 */ /* 0x010fc80007ffe007 */ /*0bd0*/ IADD3 R6, R13, R16, R7 ; /* 0x000000100d067210 */ /* 0x020fe40007ffe007 */ /*0be0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0bf0*/ ISETP.LT.OR P0, PT, R12, R3, P0 ; /* 0x000000030c00720c */ /* 0x000fda0000701670 */ /*0c00*/ @!P0 BRA 0xc70 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*0c10*/ LDG.E R3, [R4.64] ; /* 0x0000000604037981 */ /* 0x000ea8000c1e1900 */ /*0c20*/ LDG.E R7, [R4.64+0x400] ; /* 0x0004000604077981 */ /* 0x000ea8000c1e1900 */ /*0c30*/ LDG.E R8, [R4.64+0x800] ; /* 0x0008000604087981 */ /* 0x000ee8000c1e1900 */ /*0c40*/ LDG.E R9, [R4.64+0xc00] ; /* 0x000c000604097981 */ /* 0x000ee2000c1e1900 */ /*0c50*/ IADD3 R3, R7, R3, R6 ; /* 0x0000000307037210 */ /* 0x004fc80007ffe006 */ /*0c60*/ IADD3 R6, R9, R8, R3 ; /* 0x0000000809067210 */ /* 0x008fe40007ffe003 */ /*0c70*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0c80*/ S2R R8, SR_LANEID ; /* 0x0000000000087919 */ /* 0x000e280000000000 */ /*0c90*/ SHFL.DOWN PT, R3, R6, 0x1, 0x1f ; /* 0x08201f0006037f89 */ /* 0x000e6200000e0000 */ /*0ca0*/ ISETP.GT.AND P0, PT, R8.reuse, 0x1e, PT ; /* 0x0000001e0800780c */ /* 0x041fe40003f04270 */ /*0cb0*/ ISETP.NE.AND P1, PT, R8.reuse, RZ, PT ; /* 0x000000ff0800720c */ /* 0x040fe40003f25270 */ /*0cc0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x002fe40004000000 */ /*0cd0*/ ISETP.GT.AND P0, PT, R8, 0x1d, PT ; /* 0x0000001d0800780c */ /* 0x000fc60003f04270 */ /*0ce0*/ IMAD.IADD R3, R3, 0x1, R6 ; /* 0x0000000103037824 */ /* 0x000fca00078e0206 */ /*0cf0*/ SHFL.DOWN PT, R4, R3, 0x2, 0x1f ; /* 0x08401f0003047f89 */ /* 0x000e2800000e0000 */ /*0d00*/ @!P1 S2R R7, SR_TID.X ; /* 0x0000000000079919 */ /* 0x000e620000002100 */ /*0d10*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*0d20*/ ISETP.GT.AND P0, PT, R8, 0x1b, PT ; /* 0x0000001b0800780c */ /* 0x000fc60003f04270 */ /*0d30*/ IMAD.IADD R4, R3, 0x1, R4 ; /* 0x0000000103047824 */ /* 0x000fca00078e0204 */ /*0d40*/ SHFL.DOWN PT, R5, R4, 0x4, 0x1f ; /* 0x08801f0004057f89 */ /* 0x000e2400000e0000 */ /*0d50*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*0d60*/ ISETP.GT.AND P0, PT, R8, 0x17, PT ; /* 0x000000170800780c */ /* 0x000fc60003f04270 */ /*0d70*/ IMAD.IADD R5, R4, 0x1, R5 ; /* 0x0000000104057824 */ /* 0x000fe200078e0205 */ /*0d80*/ @!P1 SHF.R.S32.HI R4, RZ, 0x1f, R7 ; /* 0x0000001fff049819 */ /* 0x002fc80000011407 */ /*0d90*/ SHFL.DOWN PT, R6, R5, 0x8, 0x1f ; /* 0x09001f0005067f89 */ /* 0x000e2200000e0000 */ /*0da0*/ @!P1 LEA.HI R4, R4, R7, RZ, 0x5 ; /* 0x0000000704049211 */ /* 0x000fc800078f28ff */ /*0db0*/ @!P1 SHF.R.S32.HI R4, RZ, 0x5, R4 ; /* 0x00000005ff049819 */ /* 0x000fca0000011404 */ /*0dc0*/ @!P1 IMAD.SHL.U32 R4, R4, 0x4, RZ ; /* 0x0000000404049824 */ /* 0x000fe200078e00ff */ /*0dd0*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*0de0*/ ISETP.GT.AND P0, PT, R8, 0xf, PT ; /* 0x0000000f0800780c */ /* 0x000fc60003f04270 */ /*0df0*/ IMAD.IADD R6, R5, 0x1, R6 ; /* 0x0000000105067824 */ /* 0x000fca00078e0206 */ /*0e00*/ SHFL.DOWN PT, R3, R6, 0x10, 0x1f ; /* 0x0a001f0006037f89 */ /* 0x000e2400000e0000 */ /*0e10*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*0e20*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fc60003f05270 */ /*0e30*/ IMAD.IADD R5, R6, 0x1, R3 ; /* 0x0000000106057824 */ /* 0x000fca00078e0203 */ /*0e40*/ @!P1 STS [R4+0x8], R5 ; /* 0x0000080504009388 */ /* 0x0001e80000000800 */ /*0e50*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0e60*/ @P0 BRA 0x1c90 ; /* 0x00000e2000000947 */ /* 0x000fea0003800000 */ /*0e70*/ LDS R2, [0xc] ; /* 0x00000c00ff027984 */ /* 0x001fe80000000800 */ /*0e80*/ LDS.128 R8, [0x10] ; /* 0x00001000ff087984 */ /* 0x000e280000000c00 */ /*0e90*/ LDS.64 R6, [0x20] ; /* 0x00002000ff067984 */ /* 0x000e620000000a00 */ /*0ea0*/ IADD3 R2, R8, R2, R5 ; /* 0x0000000208027210 */ /* 0x001fc80007ffe005 */ /*0eb0*/ IADD3 R2, R10, R2, R9 ; /* 0x000000020a027210 */ /* 0x000fc80007ffe009 */ /*0ec0*/ IADD3 R6, R6, R2, R11 ; /* 0x0000000206067210 */ /* 0x002fe20007ffe00b */ /*0ed0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fc800078e00ff */ /*0ee0*/ IMAD.IADD R5, R6, 0x1, R7 ; /* 0x0000000106057824 */ /* 0x000fe200078e0207 */ /*0ef0*/ BRA 0x1c90 ; /* 0x00000d9000007947 */ /* 0x000fea0003800000 */ /*0f00*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */ /* 0x000e220000002100 */ /*0f10*/ IADD3 R4, -R5, c[0x0][0x198], RZ ; /* 0x0000660005047a10 */ /* 0x000fe20007ffe1ff */ /*0f20*/ BSSY B1, 0xfe0 ; /* 0x000000b000017945 */ /* 0x000fe20003800000 */ /*0f30*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x000fe400078e00ff */ /*0f40*/ ISETP.GE.AND P0, PT, R9, R4, PT ; /* 0x000000040900720c */ /* 0x001fe20003f06270 */ /*0f50*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ; /* 0x000000ffff027224 */ /* 0x000fd800078e0009 */ /*0f60*/ @P0 BRA 0xfd0 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*0f70*/ IADD3 R7, P0, R5, R2, RZ ; /* 0x0000000205077210 */ /* 0x000fc80007f1e0ff */ /*0f80*/ LEA.HI.X.SX32 R8, R2, R3, 0x1, P0 ; /* 0x0000000302087211 */ /* 0x000fe400000f0eff */ /*0f90*/ LEA R6, P0, R7, c[0x0][0x160], 0x2 ; /* 0x0000580007067a11 */ /* 0x000fc800078010ff */ /*0fa0*/ LEA.HI.X R7, R7, c[0x0][0x164], R8, 0x2, P0 ; /* 0x0000590007077a11 */ /* 0x000fca00000f1408 */ /*0fb0*/ LDG.E R8, [R6.64] ; /* 0x0000000606087981 */ /* 0x000162000c1e1900 */ /*0fc0*/ IADD3 R9, R2, 0x100, RZ ; /* 0x0000010002097810 */ /* 0x000fc60007ffe0ff */ /*0fd0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0fe0*/ ISETP.GE.AND P0, PT, R9, R4, PT ; /* 0x000000040900720c */ /* 0x000fe20003f06270 */ /*0ff0*/ BSSY B1, 0x1630 ; /* 0x0000063000017945 */ /* 0x000fd80003800000 */ /*1000*/ @P0 BRA 0x1620 ; /* 0x0000061000000947 */ /* 0x000fea0003800000 */ /*1010*/ LOP3.LUT R6, RZ, R9, RZ, 0x33, !PT ; /* 0x00000009ff067212 */ /* 0x001fe200078e33ff */ /*1020*/ BSSY B2, 0x1180 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*1030*/ IADD3 R7, -R5, c[0x0][0x198], R6 ; /* 0x0000660005077a10 */ /* 0x000fc80007ffe106 */ /*1040*/ LEA.HI R6, R7.reuse, 0x1, RZ, 0x18 ; /* 0x0000000107067811 */ /* 0x040fe400078fc0ff */ /*1050*/ ISETP.GE.U32.AND P0, PT, R7, 0x300, PT ; /* 0x000003000700780c */ /* 0x000fe40003f06070 */ /*1060*/ LOP3.LUT P1, R6, R6, 0x3, RZ, 0xc0, !PT ; /* 0x0000000306067812 */ /* 0x000fda000782c0ff */ /*1070*/ @!P1 BRA 0x1170 ; /* 0x000000f000009947 */ /* 0x000fea0003800000 */ /*1080*/ IADD3 R12, P1, R5, R9, RZ ; /* 0x00000009050c7210 */ /* 0x000fe20007f3e0ff */ /*1090*/ IMAD.MOV.U32 R10, RZ, RZ, R6 ; /* 0x000000ffff0a7224 */ /* 0x000fc600078e0006 */ /*10a0*/ LEA R11, P2, R12, c[0x0][0x160], 0x2 ; /* 0x000058000c0b7a11 */ /* 0x000fe400078410ff */ /*10b0*/ LEA.HI.X.SX32 R7, R9, R3, 0x1, P1 ; /* 0x0000000309077211 */ /* 0x000fc800008f0eff */ /*10c0*/ LEA.HI.X R12, R12, c[0x0][0x164], R7, 0x2, P2 ; /* 0x000059000c0c7a11 */ /* 0x000fca00010f1407 */ /*10d0*/ IMAD.MOV.U32 R7, RZ, RZ, R12 ; /* 0x000000ffff077224 */ /* 0x000fe400078e000c */ /*10e0*/ IMAD.MOV.U32 R6, RZ, RZ, R11 ; /* 0x000000ffff067224 */ /* 0x000fca00078e000b */ /*10f0*/ LDG.E R7, [R6.64] ; /* 0x0000000606077981 */ /* 0x000ea2000c1e1900 */ /*1100*/ IADD3 R10, R10, -0x1, RZ ; /* 0xffffffff0a0a7810 */ /* 0x000fe40007ffe0ff */ /*1110*/ IADD3 R11, P2, R11, 0x400, RZ ; /* 0x000004000b0b7810 */ /* 0x000fe40007f5e0ff */ /*1120*/ ISETP.NE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fe40003f25270 */ /*1130*/ IADD3 R9, R9, 0x100, RZ ; /* 0x0000010009097810 */ /* 0x000fe20007ffe0ff */ /*1140*/ IMAD.X R12, RZ, RZ, R12, P2 ; /* 0x000000ffff0c7224 */ /* 0x000fe400010e060c */ /*1150*/ IMAD.IADD R8, R7, 0x1, R8 ; /* 0x0000000107087824 */ /* 0x024fd000078e0208 */ /*1160*/ @P1 BRA 0x10d0 ; /* 0xffffff6000001947 */ /* 0x000fea000383ffff */ /*1170*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1180*/ @!P0 BRA 0x1620 ; /* 0x0000049000008947 */ /* 0x000fea0003800000 */ /*1190*/ IMAD.IADD R7, R4, 0x1, -R9 ; /* 0x0000000104077824 */ /* 0x000fe200078e0a09 */ /*11a0*/ IADD3 R5, P0, R5, R9, RZ ; /* 0x0000000905057210 */ /* 0x000fe20007f1e0ff */ /*11b0*/ BSSY B2, 0x1430 ; /* 0x0000027000027945 */ /* 0x000fe60003800000 */ /*11c0*/ ISETP.GT.AND P1, PT, R7, 0xc00, PT ; /* 0x00000c000700780c */ /* 0x000fe40003f24270 */ /*11d0*/ LEA.HI.X.SX32 R10, R9, R3, 0x1, P0 ; /* 0x00000003090a7211 */ /* 0x000fe400000f0eff */ /*11e0*/ LEA R6, P0, R5, c[0x0][0x160], 0x2 ; /* 0x0000580005067a11 */ /* 0x000fc800078010ff */ /*11f0*/ LEA.HI.X R7, R5, c[0x0][0x164], R10, 0x2, P0 ; /* 0x0000590005077a11 */ /* 0x000fe400000f140a */ /*1200*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fc60003f0f070 */ /*1210*/ @!P1 BRA 0x1420 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*1220*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*1230*/ IADD3 R24, R4, -0xc00, RZ ; /* 0xfffff40004187810 */ /* 0x000fc60007ffe0ff */ /*1240*/ LDG.E R3, [R6.64] ; /* 0x0000000606037981 */ /* 0x000ea8000c1e1900 */ /*1250*/ LDG.E R5, [R6.64+0x400] ; /* 0x0004000606057981 */ /* 0x000ea8000c1e1900 */ /*1260*/ LDG.E R10, [R6.64+0x800] ; /* 0x00080006060a7981 */ /* 0x0000e8000c1e1900 */ /*1270*/ LDG.E R11, [R6.64+0xc00] ; /* 0x000c0006060b7981 */ /* 0x0000e8000c1e1900 */ /*1280*/ LDG.E R12, [R6.64+0x1000] ; /* 0x00100006060c7981 */ /* 0x000128000c1e1900 */ /*1290*/ LDG.E R13, [R6.64+0x1400] ; /* 0x00140006060d7981 */ /* 0x000128000c1e1900 */ /*12a0*/ LDG.E R14, [R6.64+0x1800] ; /* 0x00180006060e7981 */ /* 0x000128000c1e1900 */ /*12b0*/ LDG.E R15, [R6.64+0x1c00] ; /* 0x001c0006060f7981 */ /* 0x000128000c1e1900 */ /*12c0*/ LDG.E R16, [R6.64+0x2000] ; /* 0x0020000606107981 */ /* 0x000128000c1e1900 */ /*12d0*/ LDG.E R17, [R6.64+0x2400] ; /* 0x0024000606117981 */ /* 0x000128000c1e1900 */ /*12e0*/ LDG.E R18, [R6.64+0x2800] ; /* 0x0028000606127981 */ /* 0x000128000c1e1900 */ /*12f0*/ LDG.E R19, [R6.64+0x2c00] ; /* 0x002c000606137981 */ /* 0x000128000c1e1900 */ /*1300*/ LDG.E R20, [R6.64+0x3000] ; /* 0x0030000606147981 */ /* 0x000128000c1e1900 */ /*1310*/ LDG.E R21, [R6.64+0x3400] ; /* 0x0034000606157981 */ /* 0x000128000c1e1900 */ /*1320*/ LDG.E R22, [R6.64+0x3800] ; /* 0x0038000606167981 */ /* 0x000128000c1e1900 */ /*1330*/ LDG.E R23, [R6.64+0x3c00] ; /* 0x003c000606177981 */ /* 0x000122000c1e1900 */ /*1340*/ IADD3 R9, R9, 0x1000, RZ ; /* 0x0000100009097810 */ /* 0x000fc80007ffe0ff */ /*1350*/ ISETP.GE.AND P1, PT, R9, R24, PT ; /* 0x000000180900720c */ /* 0x000fe40003f26270 */ /*1360*/ IADD3 R3, R5, R3, R8 ; /* 0x0000000305037210 */ /* 0x024fe40007ffe008 */ /*1370*/ IADD3 R5, P2, R6, 0x4000, RZ ; /* 0x0000400006057810 */ /* 0x000fca0007f5e0ff */ /*1380*/ IMAD.X R7, RZ, RZ, R7, P2 ; /* 0x000000ffff077224 */ /* 0x001fe200010e0607 */ /*1390*/ IADD3 R3, R11, R10, R3 ; /* 0x0000000a0b037210 */ /* 0x008fe20007ffe003 */ /*13a0*/ IMAD.MOV.U32 R6, RZ, RZ, R5 ; /* 0x000000ffff067224 */ /* 0x000fc600078e0005 */ /*13b0*/ IADD3 R3, R13, R12, R3 ; /* 0x0000000c0d037210 */ /* 0x010fc80007ffe003 */ /*13c0*/ IADD3 R3, R15, R14, R3 ; /* 0x0000000e0f037210 */ /* 0x000fc80007ffe003 */ /*13d0*/ IADD3 R3, R17, R16, R3 ; /* 0x0000001011037210 */ /* 0x000fc80007ffe003 */ /*13e0*/ IADD3 R3, R19, R18, R3 ; /* 0x0000001213037210 */ /* 0x000fc80007ffe003 */ /*13f0*/ IADD3 R3, R21, R20, R3 ; /* 0x0000001415037210 */ /* 0x000fc80007ffe003 */ /*1400*/ IADD3 R8, R23, R22, R3 ; /* 0x0000001617087210 */ /* 0x000fe20007ffe003 */ /*1410*/ @!P1 BRA 0x1240 ; /* 0xfffffe2000009947 */ /* 0x000fea000383ffff */ /*1420*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1430*/ IMAD.IADD R3, R4, 0x1, -R9 ; /* 0x0000000104037824 */ /* 0x000fe200078e0a09 */ /*1440*/ BSSY B2, 0x15a0 ; /* 0x0000015000027945 */ /* 0x000fe80003800000 */ /*1450*/ ISETP.GT.AND P1, PT, R3, 0x400, PT ; /* 0x000004000300780c */ /* 0x000fda0003f24270 */ /*1460*/ @!P1 BRA 0x1590 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*1470*/ LDG.E R3, [R6.64] ; /* 0x0000000606037981 */ /* 0x000ea8000c1e1900 */ /*1480*/ LDG.E R5, [R6.64+0x400] ; /* 0x0004000606057981 */ /* 0x000ea8000c1e1900 */ /*1490*/ LDG.E R10, [R6.64+0x800] ; /* 0x00080006060a7981 */ /* 0x0000e8000c1e1900 */ /*14a0*/ LDG.E R11, [R6.64+0xc00] ; /* 0x000c0006060b7981 */ /* 0x0000e8000c1e1900 */ /*14b0*/ LDG.E R12, [R6.64+0x1000] ; /* 0x00100006060c7981 */ /* 0x000128000c1e1900 */ /*14c0*/ LDG.E R13, [R6.64+0x1400] ; /* 0x00140006060d7981 */ /* 0x000128000c1e1900 */ /*14d0*/ LDG.E R14, [R6.64+0x1800] ; /* 0x00180006060e7981 */ /* 0x000128000c1e1900 */ /*14e0*/ LDG.E R15, [R6.64+0x1c00] ; /* 0x001c0006060f7981 */ /* 0x000122000c1e1900 */ /*14f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*1500*/ IADD3 R9, R9, 0x800, RZ ; /* 0x0000080009097810 */ /* 0x000fe40007ffe0ff */ /*1510*/ IADD3 R3, R5, R3, R8 ; /* 0x0000000305037210 */ /* 0x024fe40007ffe008 */ /*1520*/ IADD3 R5, P1, R6, 0x2000, RZ ; /* 0x0000200006057810 */ /* 0x000fca0007f3e0ff */ /*1530*/ IMAD.MOV.U32 R6, RZ, RZ, R5 ; /* 0x000000ffff067224 */ /* 0x001fe200078e0005 */ /*1540*/ IADD3 R3, R11, R10, R3 ; /* 0x0000000a0b037210 */ /* 0x008fe20007ffe003 */ /*1550*/ IMAD.X R10, RZ, RZ, R7, P1 ; /* 0x000000ffff0a7224 */ /* 0x000fc800008e0607 */ /*1560*/ IMAD.MOV.U32 R7, RZ, RZ, R10 ; /* 0x000000ffff077224 */ /* 0x000fe200078e000a */ /*1570*/ IADD3 R3, R13, R12, R3 ; /* 0x0000000c0d037210 */ /* 0x010fc80007ffe003 */ /*1580*/ IADD3 R8, R15, R14, R3 ; /* 0x0000000e0f087210 */ /* 0x000fe40007ffe003 */ /*1590*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*15a0*/ ISETP.LT.OR P0, PT, R9, R4, P0 ; /* 0x000000040900720c */ /* 0x000fda0000701670 */ /*15b0*/ @!P0 BRA 0x1620 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*15c0*/ LDG.E R3, [R6.64] ; /* 0x0000000606037981 */ /* 0x000ea8000c1e1900 */ /*15d0*/ LDG.E R5, [R6.64+0x400] ; /* 0x0004000606057981 */ /* 0x000ea8000c1e1900 */ /*15e0*/ LDG.E R10, [R6.64+0x800] ; /* 0x00080006060a7981 */ /* 0x000ee8000c1e1900 */ /*15f0*/ LDG.E R9, [R6.64+0xc00] ; /* 0x000c000606097981 */ /* 0x000ee2000c1e1900 */ /*1600*/ IADD3 R3, R5, R3, R8 ; /* 0x0000000305037210 */ /* 0x024fc80007ffe008 */ /*1610*/ IADD3 R8, R9, R10, R3 ; /* 0x0000000a09087210 */ /* 0x008fe40007ffe003 */ /*1620*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1630*/ ISETP.GT.AND P0, PT, R4, 0xff, PT ; /* 0x000000ff0400780c */ /* 0x000fda0003f04270 */ /*1640*/ @P0 BRA 0x1a40 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*1650*/ SHF.R.S32.HI R3, RZ, 0x1f, R2 ; /* 0x0000001fff037819 */ /* 0x000fe20000011402 */ /*1660*/ S2R R14, SR_LANEID ; /* 0x00000000000e7919 */ /* 0x000e660000000000 */ /*1670*/ LEA.HI R3, R3, R2, RZ, 0x5 ; /* 0x0000000203037211 */ /* 0x000fc800078f28ff */ /*1680*/ LOP3.LUT R5, R3, 0xffffffe0, RZ, 0xc0, !PT ; /* 0xffffffe003057812 */ /* 0x000fe400078ec0ff */ /*1690*/ SHF.R.S32.HI R3, RZ, 0x5, R3 ; /* 0x00000005ff037819 */ /* 0x000fe40000011403 */ /*16a0*/ IADD3 R7, R5, 0x20, RZ ; /* 0x0000002005077810 */ /* 0x001fe40007ffe0ff */ /*16b0*/ LOP3.LUT R5, RZ, R5, RZ, 0x33, !PT ; /* 0x00000005ff057212 */ /* 0x000fe400078e33ff */ /*16c0*/ ISETP.GT.AND P0, PT, R7, R4, PT ; /* 0x000000040700720c */ /* 0x000fc60003f04270 */ /*16d0*/ IMAD.IADD R5, R4, 0x1, R5 ; /* 0x0000000104057824 */ /* 0x000fca00078e0205 */ /*16e0*/ SEL R7, R5, 0x1f, P0 ; /* 0x0000001f05077807 */ /* 0x000fe40000000000 */ /*16f0*/ IADD3 R10, R14.reuse, 0x2, RZ ; /* 0x000000020e0a7810 */ /* 0x042fe40007ffe0ff */ /*1700*/ ISETP.GE.AND P0, PT, R14.reuse, R7, PT ; /* 0x000000070e00720c */ /* 0x040fe20003f06270 */ /*1710*/ SHFL.DOWN PT, R5, R8, 0x1, R7 ; /* 0x0820000008057989 */ /* 0x020e2200000e0007 */ /*1720*/ IADD3 R12, R14.reuse, 0x4, RZ ; /* 0x000000040e0c7810 */ /* 0x040fe40007ffe0ff */ /*1730*/ ISETP.NE.AND P1, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fe40003f25270 */ /*1740*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fc40004000000 */ /*1750*/ ISETP.GT.AND P0, PT, R10, R7, PT ; /* 0x000000070a00720c */ /* 0x000fc60003f04270 */ /*1760*/ IMAD.IADD R6, R5, 0x1, R8 ; /* 0x0000000105067824 */ /* 0x000fca00078e0208 */ /*1770*/ SHFL.DOWN PT, R5, R6, 0x2, R7 ; /* 0x0840000006057989 */ /* 0x000e2400000e0007 */ /*1780*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*1790*/ ISETP.GT.AND P0, PT, R12, R7, PT ; /* 0x000000070c00720c */ /* 0x000fc60003f04270 */ /*17a0*/ IMAD.IADD R10, R6, 0x1, R5 ; /* 0x00000001060a7824 */ /* 0x000fe200078e0205 */ /*17b0*/ IADD3 R6, R14, 0x8, RZ ; /* 0x000000080e067810 */ /* 0x000fc80007ffe0ff */ /*17c0*/ SHFL.DOWN PT, R5, R10, 0x4, R7 ; /* 0x088000000a057989 */ /* 0x000e2400000e0007 */ /*17d0*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*17e0*/ ISETP.GT.AND P0, PT, R6, R7, PT ; /* 0x000000070600720c */ /* 0x000fc60003f04270 */ /*17f0*/ IMAD.IADD R8, R10, 0x1, R5 ; /* 0x000000010a087824 */ /* 0x000fe200078e0205 */ /*1800*/ IADD3 R10, R14, 0x10, RZ ; /* 0x000000100e0a7810 */ /* 0x000fc80007ffe0ff */ /*1810*/ SHFL.DOWN PT, R5, R8, 0x8, R7 ; /* 0x0900000008057989 */ /* 0x000e2400000e0007 */ /*1820*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*1830*/ ISETP.GT.AND P0, PT, R10, R7, PT ; /* 0x000000070a00720c */ /* 0x000fc60003f04270 */ /*1840*/ IMAD.IADD R6, R8, 0x1, R5 ; /* 0x0000000108067824 */ /* 0x000fe400078e0205 */ /*1850*/ @!P1 IMAD.SHL.U32 R8, R3, 0x4, RZ ; /* 0x0000000403089824 */ /* 0x000fc600078e00ff */ /*1860*/ SHFL.DOWN PT, R5, R6, 0x10, R7 ; /* 0x0a00000006057989 */ /* 0x000e2400000e0007 */ /*1870*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*1880*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fc60003f05270 */ /*1890*/ IMAD.IADD R5, R6, 0x1, R5 ; /* 0x0000000106057824 */ /* 0x000fca00078e0205 */ /*18a0*/ @!P1 STS [R8+0x8], R5 ; /* 0x0000080508009388 */ /* 0x0001e80000000800 */ /*18b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*18c0*/ @P0 BRA 0x1c90 ; /* 0x000003c000000947 */ /* 0x000fea0003800000 */ /*18d0*/ LDS.128 R8, [0x10] ; /* 0x00001000ff087984 */ /* 0x001e220000000c00 */ /*18e0*/ ISETP.GT.AND P2, PT, R4, 0x80, PT ; /* 0x000000800400780c */ /* 0x000fc40003f44270 */ /*18f0*/ ISETP.GT.AND P1, PT, R4.reuse, 0x40, PT ; /* 0x000000400400780c */ /* 0x040fe20003f24270 */ /*1900*/ LDS R2, [0xc] ; /* 0x00000c00ff027984 */ /* 0x000e620000000800 */ /*1910*/ ISETP.GT.AND P0, PT, R4, 0x20, PT ; /* 0x000000200400780c */ /* 0x000fc60003f04270 */ /*1920*/ LDS.64 R6, [0x20] ; /* 0x00002000ff067984 */ /* 0x000ea20000000a00 */ /*1930*/ SEL R10, R10, RZ, P2 ; /* 0x000000ff0a0a7207 */ /* 0x001fe40001000000 */ /*1940*/ ISETP.GE.AND P2, PT, R4, 0xe1, PT ; /* 0x000000e10400780c */ /* 0x000fe40003f46270 */ /*1950*/ SEL R8, R8, RZ, P1 ; /* 0x000000ff08087207 */ /* 0x000fe40000800000 */ /*1960*/ ISETP.GT.AND P1, PT, R4, 0x60, PT ; /* 0x000000600400780c */ /* 0x000fe40003f24270 */ /*1970*/ SEL R2, R2, RZ, P0 ; /* 0x000000ff02027207 */ /* 0x002fe40000000000 */ /*1980*/ SEL R9, R9, RZ, P1 ; /* 0x000000ff09097207 */ /* 0x000fc40000800000 */ /*1990*/ IADD3 R2, R8, R5, R2 ; /* 0x0000000508027210 */ /* 0x000fe40007ffe002 */ /*19a0*/ ISETP.GT.AND P0, PT, R4.reuse, 0xa0, PT ; /* 0x000000a00400780c */ /* 0x040fe40003f04270 */ /*19b0*/ ISETP.GT.AND P1, PT, R4, 0xc0, PT ; /* 0x000000c00400780c */ /* 0x000fe40003f24270 */ /*19c0*/ SEL R4, R11, RZ, P0 ; /* 0x000000ff0b047207 */ /* 0x000fe40000000000 */ /*19d0*/ IADD3 R9, R10, R2, R9 ; /* 0x000000020a097210 */ /* 0x000fe20007ffe009 */ /*19e0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fe200078e00ff */ /*19f0*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */ /* 0x004fc80000800000 */ /*1a00*/ IADD3 R5, R6, R9, R4 ; /* 0x0000000906057210 */ /* 0x000fe20007ffe004 */ /*1a10*/ @!P2 BRA 0x1c90 ; /* 0x000002700000a947 */ /* 0x000fea0003800000 */ /*1a20*/ IMAD.IADD R5, R5, 0x1, R7 ; /* 0x0000000105057824 */ /* 0x000fe200078e0207 */ /*1a30*/ BRA 0x1c90 ; /* 0x0000025000007947 */ /* 0x000fea0003800000 */ /*1a40*/ S2R R9, SR_LANEID ; /* 0x0000000000097919 */ /* 0x000e620000000000 */ /*1a50*/ ISETP.NE.AND P2, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fc60003f45270 */ /*1a60*/ SHFL.DOWN PT, R3, R8, 0x1, 0x1f ; /* 0x08201f0008037f89 */ /* 0x020ea200000e0000 */ /*1a70*/ ISETP.GT.AND P0, PT, R9.reuse, 0x1e, PT ; /* 0x0000001e0900780c */ /* 0x042fe40003f04270 */ /*1a80*/ ISETP.NE.AND P1, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe40003f25270 */ /*1a90*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x004fe40004000000 */ /*1aa0*/ ISETP.GT.AND P0, PT, R9, 0x1d, PT ; /* 0x0000001d0900780c */ /* 0x000fc60003f04270 */ /*1ab0*/ IMAD.IADD R3, R3, 0x1, R8 ; /* 0x0000000103037824 */ /* 0x000fca00078e0208 */ /*1ac0*/ SHFL.DOWN PT, R4, R3, 0x2, 0x1f ; /* 0x08401f0003047f89 */ /* 0x000e6200000e0000 */ /*1ad0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R2 ; /* 0x0000001fff079819 */ /* 0x001fc80000011402 */ /*1ae0*/ @!P1 LEA.HI R7, R7, R2, RZ, 0x5 ; /* 0x0000000207079211 */ /* 0x000fe200078f28ff */ /*1af0*/ @!P2 IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff02a224 */ /* 0x000fe200078e00ff */ /*1b00*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x002fe40004000000 */ /*1b10*/ ISETP.GT.AND P0, PT, R9, 0x1b, PT ; /* 0x0000001b0900780c */ /* 0x000fc60003f04270 */ /*1b20*/ IMAD.IADD R4, R3, 0x1, R4 ; /* 0x0000000103047824 */ /* 0x000fca00078e0204 */ /*1b30*/ SHFL.DOWN PT, R5, R4, 0x4, 0x1f ; /* 0x08801f0004057f89 */ /* 0x000e2400000e0000 */ /*1b40*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*1b50*/ ISETP.GT.AND P0, PT, R9, 0x17, PT ; /* 0x000000170900780c */ /* 0x000fc60003f04270 */ /*1b60*/ IMAD.IADD R5, R4, 0x1, R5 ; /* 0x0000000104057824 */ /* 0x000fe200078e0205 */ /*1b70*/ @!P1 SHF.R.S32.HI R4, RZ, 0x5, R7 ; /* 0x00000005ff049819 */ /* 0x000fc80000011407 */ /*1b80*/ SHFL.DOWN PT, R6, R5, 0x8, 0x1f ; /* 0x09001f0005067f89 */ /* 0x000e2200000e0000 */ /*1b90*/ @!P1 IMAD.SHL.U32 R4, R4, 0x4, RZ ; /* 0x0000000404049824 */ /* 0x000fe200078e00ff */ /*1ba0*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*1bb0*/ ISETP.GT.AND P0, PT, R9, 0xf, PT ; /* 0x0000000f0900780c */ /* 0x000fc60003f04270 */ /*1bc0*/ IMAD.IADD R6, R5, 0x1, R6 ; /* 0x0000000105067824 */ /* 0x000fca00078e0206 */ /*1bd0*/ SHFL.DOWN PT, R3, R6, 0x10, 0x1f ; /* 0x0a001f0006037f89 */ /* 0x000e2400000e0000 */ /*1be0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fca0004000000 */ /*1bf0*/ IMAD.IADD R5, R6, 0x1, R3 ; /* 0x0000000106057824 */ /* 0x000fca00078e0203 */ /*1c00*/ @!P1 STS [R4+0x8], R5 ; /* 0x0000080504009388 */ /* 0x000fe80000000800 */ /*1c10*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1c20*/ @!P2 LDS R3, [0xc] ; /* 0x00000c00ff03a984 */ /* 0x000fe80000000800 */ /*1c30*/ @!P2 LDS.128 R8, [0x10] ; /* 0x00001000ff08a984 */ /* 0x000e280000000c00 */ /*1c40*/ @!P2 LDS.64 R6, [0x20] ; /* 0x00002000ff06a984 */ /* 0x000e620000000a00 */ /*1c50*/ @!P2 IADD3 R3, R8, R3, R5 ; /* 0x000000030803a210 */ /* 0x001fc80007ffe005 */ /*1c60*/ @!P2 IADD3 R3, R10, R3, R9 ; /* 0x000000030a03a210 */ /* 0x000fc80007ffe009 */ /*1c70*/ @!P2 IADD3 R6, R6, R3, R11 ; /* 0x000000030606a210 */ /* 0x002fca0007ffe00b */ /*1c80*/ @!P2 IMAD.IADD R5, R6, 0x1, R7 ; /* 0x000000010605a824 */ /* 0x000fe400078e0207 */ /*1c90*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*1ca0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fda0003f05270 */ /*1cb0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*1cc0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc800078e00ff */ /*1cd0*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x168] ; /* 0x00005a0000027625 */ /* 0x000fca00078e0003 */ /*1ce0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101906 */ /*1cf0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1d00*/ BRA 0x1d00; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1d10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1da0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1db0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1dc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1dd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1de0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1df0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIiyN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPiyS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ ISETP.NE.U32.AND P0, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c */ /* 0x000fe20003f05070 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0030*/ ISETP.NE.AND.EX P0, PT, RZ, c[0x0][0x174], PT, P0 ; /* 0x00005d00ff007a0c */ /* 0x000fda0003f05300 */ /*0040*/ @!P0 BRA 0x1c40 ; /* 0x00001bf000008947 */ /* 0x000fea0003800000 */ /*0050*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff027624 */ /* 0x000fe200078e00ff */ /*0060*/ BSSY B0, 0x1bd0 ; /* 0x00001b6000007945 */ /* 0x000fe20003800000 */ /*0070*/ IMAD.MOV.U32 R21, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff157624 */ /* 0x000fc600078e00ff */ /*0080*/ ISETP.GE.U32.AND P0, PT, R2, 0x1000, PT ; /* 0x000010000200780c */ /* 0x000fc80003f06070 */ /*0090*/ ISETP.GE.U32.AND.EX P0, PT, R21, RZ, PT, P0 ; /* 0x000000ff1500720c */ /* 0x000fda0003f06100 */ /*00a0*/ @!P0 BRA 0xe90 ; /* 0x00000de000008947 */ /* 0x000fea0003800000 */ /*00b0*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*00c0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*00d0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x001fca00078e0205 */ /*00e0*/ LDG.E R3, [R4.64+0x400] ; /* 0x0004000404037981 */ /* 0x000ea8000c1e1900 */ /*00f0*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea8000c1e1900 */ /*0100*/ LDG.E R7, [R4.64+0x800] ; /* 0x0008000404077981 */ /* 0x000ea8000c1e1900 */ /*0110*/ LDG.E R8, [R4.64+0xc00] ; /* 0x000c000404087981 */ /* 0x000ee8000c1e1900 */ /*0120*/ LDG.E R9, [R4.64+0x1000] ; /* 0x0010000404097981 */ /* 0x000ee8000c1e1900 */ /*0130*/ LDG.E R10, [R4.64+0x1400] ; /* 0x00140004040a7981 */ /* 0x000f28000c1e1900 */ /*0140*/ LDG.E R11, [R4.64+0x1800] ; /* 0x00180004040b7981 */ /* 0x000f28000c1e1900 */ /*0150*/ LDG.E R12, [R4.64+0x1c00] ; /* 0x001c0004040c7981 */ /* 0x000f68000c1e1900 */ /*0160*/ LDG.E R13, [R4.64+0x2000] ; /* 0x00200004040d7981 */ /* 0x000f68000c1e1900 */ /*0170*/ LDG.E R14, [R4.64+0x2400] ; /* 0x00240004040e7981 */ /* 0x000f68000c1e1900 */ /*0180*/ LDG.E R15, [R4.64+0x2800] ; /* 0x00280004040f7981 */ /* 0x000f68000c1e1900 */ /*0190*/ LDG.E R16, [R4.64+0x2c00] ; /* 0x002c000404107981 */ /* 0x000f68000c1e1900 */ /*01a0*/ LDG.E R17, [R4.64+0x3000] ; /* 0x0030000404117981 */ /* 0x000f68000c1e1900 */ /*01b0*/ LDG.E R18, [R4.64+0x3400] ; /* 0x0034000404127981 */ /* 0x000f68000c1e1900 */ /*01c0*/ LDG.E R19, [R4.64+0x3800] ; /* 0x0038000404137981 */ /* 0x000f68000c1e1900 */ /*01d0*/ LDG.E R20, [R4.64+0x3c00] ; /* 0x003c000404147981 */ /* 0x000f62000c1e1900 */ /*01e0*/ IADD3 R3, R7, R3, R6 ; /* 0x0000000307037210 */ /* 0x004fc40007ffe006 */ /*01f0*/ IADD3 R6, P0, R2, -0x1000, RZ ; /* 0xfffff00002067810 */ /* 0x000fc80007f1e0ff */ /*0200*/ IADD3.X R7, R21, -0x1, RZ, P0, !PT ; /* 0xffffffff15077810 */ /* 0x000fe400007fe4ff */ /*0210*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fe20007ffe003 */ /*0220*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1000 ; /* 0x00001000ff097424 */ /* 0x000fe200078e00ff */ /*0230*/ ISETP.GE.U32.AND P0, PT, R6, 0x1000, PT ; /* 0x000010000600780c */ /* 0x000fe20003f06070 */ /*0240*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x000fc600078e00ff */ /*0250*/ ISETP.GE.U32.AND.EX P0, PT, R7, RZ, PT, P0 ; /* 0x000000ff0700720c */ /* 0x000fe40003f06100 */ /*0260*/ IADD3 R3, R11, R10, R3 ; /* 0x0000000a0b037210 */ /* 0x010fc80007ffe003 */ /*0270*/ IADD3 R3, R13, R12, R3 ; /* 0x0000000c0d037210 */ /* 0x020fc80007ffe003 */ /*0280*/ IADD3 R3, R15, R14, R3 ; /* 0x0000000e0f037210 */ /* 0x000fc80007ffe003 */ /*0290*/ IADD3 R3, R17, R16, R3 ; /* 0x0000001011037210 */ /* 0x000fc80007ffe003 */ /*02a0*/ IADD3 R3, R19, R18, R3 ; /* 0x0000001213037210 */ /* 0x000fca0007ffe003 */ /*02b0*/ IMAD.IADD R10, R3, 0x1, R20 ; /* 0x00000001030a7824 */ /* 0x000fe200078e0214 */ /*02c0*/ @!P0 BRA 0x570 ; /* 0x000002a000008947 */ /* 0x000fea0003800000 */ /*02d0*/ IADD3 R2, P0, R4, 0x7c00, RZ ; /* 0x00007c0004027810 */ /* 0x000fe20007f1e0ff */ /*02e0*/ IMAD.MOV.U32 R25, RZ, RZ, R6 ; /* 0x000000ffff197224 */ /* 0x000fe400078e0006 */ /*02f0*/ IMAD.MOV.U32 R26, RZ, RZ, R7 ; /* 0x000000ffff1a7224 */ /* 0x000fe400078e0007 */ /*0300*/ IMAD.X R3, RZ, RZ, R5, P0 ; /* 0x000000ffff037224 */ /* 0x000fe400000e0605 */ /*0310*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1000 ; /* 0x00001000ff097424 */ /* 0x000fe400078e00ff */ /*0320*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x000fc400078e00ff */ /*0330*/ LDG.E R5, [R2.64+-0x3c00] ; /* 0xffc4000402057981 */ /* 0x000ea8000c1e1900 */ /*0340*/ LDG.E R4, [R2.64+-0x3800] ; /* 0xffc8000402047981 */ /* 0x000ea8000c1e1900 */ /*0350*/ LDG.E R11, [R2.64+-0x3400] ; /* 0xffcc0004020b7981 */ /* 0x000ee8000c1e1900 */ /*0360*/ LDG.E R12, [R2.64+-0x3000] ; /* 0xffd00004020c7981 */ /* 0x000ee8000c1e1900 */ /*0370*/ LDG.E R13, [R2.64+-0x2c00] ; /* 0xffd40004020d7981 */ /* 0x000f28000c1e1900 */ /*0380*/ LDG.E R14, [R2.64+-0x2800] ; /* 0xffd80004020e7981 */ /* 0x000f28000c1e1900 */ /*0390*/ LDG.E R15, [R2.64+-0x2400] ; /* 0xffdc0004020f7981 */ /* 0x000f68000c1e1900 */ /*03a0*/ LDG.E R16, [R2.64+-0x2000] ; /* 0xffe0000402107981 */ /* 0x000f68000c1e1900 */ /*03b0*/ LDG.E R17, [R2.64+-0x1c00] ; /* 0xffe4000402117981 */ /* 0x000f68000c1e1900 */ /*03c0*/ LDG.E R18, [R2.64+-0x1800] ; /* 0xffe8000402127981 */ /* 0x000f68000c1e1900 */ /*03d0*/ LDG.E R19, [R2.64+-0x1400] ; /* 0xffec000402137981 */ /* 0x000f68000c1e1900 */ /*03e0*/ LDG.E R20, [R2.64+-0x1000] ; /* 0xfff0000402147981 */ /* 0x000f68000c1e1900 */ /*03f0*/ LDG.E R21, [R2.64+-0xc00] ; /* 0xfff4000402157981 */ /* 0x000f68000c1e1900 */ /*0400*/ LDG.E R22, [R2.64+-0x800] ; /* 0xfff8000402167981 */ /* 0x000f68000c1e1900 */ /*0410*/ LDG.E R23, [R2.64+-0x400] ; /* 0xfffc000402177981 */ /* 0x000f68000c1e1900 */ /*0420*/ LDG.E R24, [R2.64] ; /* 0x0000000402187981 */ /* 0x000f62000c1e1900 */ /*0430*/ ISETP.GE.U32.AND P0, PT, R25, 0x1000, PT ; /* 0x000010001900780c */ /* 0x000fc80003f06070 */ /*0440*/ ISETP.GE.U32.AND.EX P0, PT, R26, RZ, PT, P0 ; /* 0x000000ff1a00720c */ /* 0x000fe40003f06100 */ /*0450*/ IADD3 R4, R4, R5, R10 ; /* 0x0000000504047210 */ /* 0x004fc80007ffe00a */ /*0460*/ IADD3 R4, R12, R11, R4 ; /* 0x0000000b0c047210 */ /* 0x008fc80007ffe004 */ /*0470*/ IADD3 R4, R14, R13, R4 ; /* 0x0000000d0e047210 */ /* 0x010fc80007ffe004 */ /*0480*/ IADD3 R4, R16, R15, R4 ; /* 0x0000000f10047210 */ /* 0x020fc80007ffe004 */ /*0490*/ IADD3 R4, R18, R17, R4 ; /* 0x0000001112047210 */ /* 0x000fc80007ffe004 */ /*04a0*/ IADD3 R4, R20, R19, R4 ; /* 0x0000001314047210 */ /* 0x000fc80007ffe004 */ /*04b0*/ IADD3 R4, R22, R21, R4 ; /* 0x0000001516047210 */ /* 0x000fc80007ffe004 */ /*04c0*/ IADD3 R10, R24, R23, R4 ; /* 0x00000017180a7210 */ /* 0x000fe20007ffe004 */ /*04d0*/ @!P0 BRA 0xc10 ; /* 0x0000073000008947 */ /* 0x000fea0003800000 */ /*04e0*/ IADD3 R9, P0, R9, 0x1000, RZ ; /* 0x0000100009097810 */ /* 0x000fe40007f1e0ff */ /*04f0*/ IADD3 R2, P2, R2, 0x4000, RZ ; /* 0x0000400002027810 */ /* 0x000fe40007f5e0ff */ /*0500*/ IADD3 R25, P1, R25, -0x1000, RZ ; /* 0xfffff00019197810 */ /* 0x000fe20007f3e0ff */ /*0510*/ IMAD.X R8, RZ, RZ, R8, P0 ; /* 0x000000ffff087224 */ /* 0x000fe200000e0608 */ /*0520*/ ISETP.GT.U32.AND P0, PT, R9, R6, PT ; /* 0x000000060900720c */ /* 0x000fe20003f04070 */ /*0530*/ IMAD.X R3, RZ, RZ, R3, P2 ; /* 0x000000ffff037224 */ /* 0x000fe200010e0603 */ /*0540*/ IADD3.X R26, R26, -0x1, RZ, P1, !PT ; /* 0xffffffff1a1a7810 */ /* 0x000fe40000ffe4ff */ /*0550*/ ISETP.GT.U32.AND.EX P0, PT, R8, R7, PT, P0 ; /* 0x000000070800720c */ /* 0x000fda0003f04100 */ /*0560*/ @!P0 BRA 0x330 ; /* 0xfffffdc000008947 */ /* 0x000fea000383ffff */ /*0570*/ ISETP.GE.U32.AND P0, PT, R9, c[0x0][0x170], PT ; /* 0x00005c0009007a0c */ /* 0x000fc80003f06070 */ /*0580*/ ISETP.GE.U32.AND.EX P0, PT, R8, c[0x0][0x174], PT, P0 ; /* 0x00005d0008007a0c */ /* 0x000fda0003f06100 */ /*0590*/ @P0 BRA 0xc10 ; /* 0x0000067000000947 */ /* 0x000fea0003800000 */ /*05a0*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */ /* 0x000e220000002100 */ /*05b0*/ IADD3 R5, -R9, c[0x0][0x170], RZ ; /* 0x00005c0009057a10 */ /* 0x000fe20007ffe1ff */ /*05c0*/ BSSY B1, 0xc10 ; /* 0x0000064000017945 */ /* 0x000fe60003800000 */ /*05d0*/ ISETP.GE.AND P0, PT, R4, R5, PT ; /* 0x000000050400720c */ /* 0x001fda0003f06270 */ /*05e0*/ @P0 BRA 0xc00 ; /* 0x0000061000000947 */ /* 0x000fea0003800000 */ /*05f0*/ LOP3.LUT R2, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff027212 */ /* 0x000fe200078e33ff */ /*0600*/ BSSY B2, 0x760 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*0610*/ IADD3 R3, -R9, c[0x0][0x170], R2 ; /* 0x00005c0009037a10 */ /* 0x000fc80007ffe102 */ /*0620*/ LEA.HI R2, R3.reuse, 0x1, RZ, 0x18 ; /* 0x0000000103027811 */ /* 0x040fe400078fc0ff */ /*0630*/ ISETP.GE.U32.AND P0, PT, R3, 0x300, PT ; /* 0x000003000300780c */ /* 0x000fe40003f06070 */ /*0640*/ LOP3.LUT P1, R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */ /* 0x000fda000782c0ff */ /*0650*/ @!P1 BRA 0x750 ; /* 0x000000f000009947 */ /* 0x000fea0003800000 */ /*0660*/ IADD3 R12, P1, R4, R9, RZ ; /* 0x00000009040c7210 */ /* 0x000fe20007f3e0ff */ /*0670*/ IMAD.MOV.U32 R6, RZ, RZ, R2 ; /* 0x000000ffff067224 */ /* 0x000fc600078e0002 */ /*0680*/ LEA R7, P2, R12, c[0x0][0x160], 0x2 ; /* 0x000058000c077a11 */ /* 0x000fe400078410ff */ /*0690*/ LEA.HI.X.SX32 R3, R4, R8, 0x1, P1 ; /* 0x0000000804037211 */ /* 0x000fc800008f0eff */ /*06a0*/ LEA.HI.X R12, R12, c[0x0][0x164], R3, 0x2, P2 ; /* 0x000059000c0c7a11 */ /* 0x000fca00010f1403 */ /*06b0*/ IMAD.MOV.U32 R3, RZ, RZ, R12 ; /* 0x000000ffff037224 */ /* 0x000fe400078e000c */ /*06c0*/ IMAD.MOV.U32 R2, RZ, RZ, R7 ; /* 0x000000ffff027224 */ /* 0x000fca00078e0007 */ /*06d0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*06e0*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */ /* 0x000fe40007ffe0ff */ /*06f0*/ IADD3 R7, P2, R7, 0x400, RZ ; /* 0x0000040007077810 */ /* 0x000fe40007f5e0ff */ /*0700*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*0710*/ IADD3 R4, R4, 0x100, RZ ; /* 0x0000010004047810 */ /* 0x000fe20007ffe0ff */ /*0720*/ IMAD.X R12, RZ, RZ, R12, P2 ; /* 0x000000ffff0c7224 */ /* 0x000fe400010e060c */ /*0730*/ IMAD.IADD R10, R3, 0x1, R10 ; /* 0x00000001030a7824 */ /* 0x004fd000078e020a */ /*0740*/ @P1 BRA 0x6b0 ; /* 0xffffff6000001947 */ /* 0x000fea000383ffff */ /*0750*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0760*/ @!P0 BRA 0xc00 ; /* 0x0000049000008947 */ /* 0x000fea0003800000 */ /*0770*/ IMAD.IADD R3, R5, 0x1, -R4 ; /* 0x0000000105037824 */ /* 0x000fe200078e0a04 */ /*0780*/ IADD3 R9, P0, R4.reuse, R9, RZ ; /* 0x0000000904097210 */ /* 0x040fe20007f1e0ff */ /*0790*/ BSSY B2, 0xa10 ; /* 0x0000027000027945 */ /* 0x000fe60003800000 */ /*07a0*/ ISETP.GT.AND P1, PT, R3, 0xc00, PT ; /* 0x00000c000300780c */ /* 0x000fe40003f24270 */ /*07b0*/ LEA.HI.X.SX32 R8, R4, R8, 0x1, P0 ; /* 0x0000000804087211 */ /* 0x000fe400000f0eff */ /*07c0*/ LEA R2, P0, R9, c[0x0][0x160], 0x2 ; /* 0x0000580009027a11 */ /* 0x000fc800078010ff */ /*07d0*/ LEA.HI.X R3, R9, c[0x0][0x164], R8, 0x2, P0 ; /* 0x0000590009037a11 */ /* 0x000fe400000f1408 */ /*07e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fc60003f0f070 */ /*07f0*/ @!P1 BRA 0xa00 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*0800*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0810*/ IADD3 R23, R5, -0xc00, RZ ; /* 0xfffff40005177810 */ /* 0x000fc60007ffe0ff */ /*0820*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */ /* 0x000ea8000c1e1900 */ /*0830*/ LDG.E R6, [R2.64+0x400] ; /* 0x0004000402067981 */ /* 0x000ea8000c1e1900 */ /*0840*/ LDG.E R9, [R2.64+0x800] ; /* 0x0008000402097981 */ /* 0x0000e8000c1e1900 */ /*0850*/ LDG.E R8, [R2.64+0xc00] ; /* 0x000c000402087981 */ /* 0x0000e8000c1e1900 */ /*0860*/ LDG.E R11, [R2.64+0x1000] ; /* 0x00100004020b7981 */ /* 0x000128000c1e1900 */ /*0870*/ LDG.E R12, [R2.64+0x1400] ; /* 0x00140004020c7981 */ /* 0x000128000c1e1900 */ /*0880*/ LDG.E R13, [R2.64+0x1800] ; /* 0x00180004020d7981 */ /* 0x000168000c1e1900 */ /*0890*/ LDG.E R14, [R2.64+0x1c00] ; /* 0x001c0004020e7981 */ /* 0x000168000c1e1900 */ /*08a0*/ LDG.E R15, [R2.64+0x2000] ; /* 0x00200004020f7981 */ /* 0x000168000c1e1900 */ /*08b0*/ LDG.E R16, [R2.64+0x2400] ; /* 0x0024000402107981 */ /* 0x000168000c1e1900 */ /*08c0*/ LDG.E R17, [R2.64+0x2800] ; /* 0x0028000402117981 */ /* 0x000168000c1e1900 */ /*08d0*/ LDG.E R18, [R2.64+0x2c00] ; /* 0x002c000402127981 */ /* 0x000168000c1e1900 */ /*08e0*/ LDG.E R19, [R2.64+0x3000] ; /* 0x0030000402137981 */ /* 0x000168000c1e1900 */ /*08f0*/ LDG.E R20, [R2.64+0x3400] ; /* 0x0034000402147981 */ /* 0x000168000c1e1900 */ /*0900*/ LDG.E R21, [R2.64+0x3800] ; /* 0x0038000402157981 */ /* 0x000168000c1e1900 */ /*0910*/ LDG.E R22, [R2.64+0x3c00] ; /* 0x003c000402167981 */ /* 0x000162000c1e1900 */ /*0920*/ IADD3 R4, R4, 0x1000, RZ ; /* 0x0000100004047810 */ /* 0x000fc80007ffe0ff */ /*0930*/ ISETP.GE.AND P1, PT, R4, R23, PT ; /* 0x000000170400720c */ /* 0x000fe40003f26270 */ /*0940*/ IADD3 R6, R6, R7, R10 ; /* 0x0000000706067210 */ /* 0x004fe40007ffe00a */ /*0950*/ IADD3 R7, P2, R2, 0x4000, RZ ; /* 0x0000400002077810 */ /* 0x000fca0007f5e0ff */ /*0960*/ IMAD.X R3, RZ, RZ, R3, P2 ; /* 0x000000ffff037224 */ /* 0x001fe200010e0603 */ /*0970*/ IADD3 R6, R8, R9, R6 ; /* 0x0000000908067210 */ /* 0x008fe20007ffe006 */ /*0980*/ IMAD.MOV.U32 R2, RZ, RZ, R7 ; /* 0x000000ffff027224 */ /* 0x000fc600078e0007 */ /*0990*/ IADD3 R6, R12, R11, R6 ; /* 0x0000000b0c067210 */ /* 0x010fc80007ffe006 */ /*09a0*/ IADD3 R6, R14, R13, R6 ; /* 0x0000000d0e067210 */ /* 0x020fc80007ffe006 */ /*09b0*/ IADD3 R6, R16, R15, R6 ; /* 0x0000000f10067210 */ /* 0x000fc80007ffe006 */ /*09c0*/ IADD3 R6, R18, R17, R6 ; /* 0x0000001112067210 */ /* 0x000fc80007ffe006 */ /*09d0*/ IADD3 R6, R20, R19, R6 ; /* 0x0000001314067210 */ /* 0x000fc80007ffe006 */ /*09e0*/ IADD3 R10, R22, R21, R6 ; /* 0x00000015160a7210 */ /* 0x000fe20007ffe006 */ /*09f0*/ @!P1 BRA 0x820 ; /* 0xfffffe2000009947 */ /* 0x000fea000383ffff */ /*0a00*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0a10*/ IMAD.IADD R6, R5, 0x1, -R4 ; /* 0x0000000105067824 */ /* 0x000fe200078e0a04 */ /*0a20*/ BSSY B2, 0xb80 ; /* 0x0000015000027945 */ /* 0x000fe80003800000 */ /*0a30*/ ISETP.GT.AND P1, PT, R6, 0x400, PT ; /* 0x000004000600780c */ /* 0x000fda0003f24270 */ /*0a40*/ @!P1 BRA 0xb70 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*0a50*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */ /* 0x000ea8000c1e1900 */ /*0a60*/ LDG.E R6, [R2.64+0x400] ; /* 0x0004000402067981 */ /* 0x000ea8000c1e1900 */ /*0a70*/ LDG.E R9, [R2.64+0x800] ; /* 0x0008000402097981 */ /* 0x0000e8000c1e1900 */ /*0a80*/ LDG.E R8, [R2.64+0xc00] ; /* 0x000c000402087981 */ /* 0x0000e8000c1e1900 */ /*0a90*/ LDG.E R11, [R2.64+0x1000] ; /* 0x00100004020b7981 */ /* 0x000128000c1e1900 */ /*0aa0*/ LDG.E R12, [R2.64+0x1400] ; /* 0x00140004020c7981 */ /* 0x000128000c1e1900 */ /*0ab0*/ LDG.E R13, [R2.64+0x1800] ; /* 0x00180004020d7981 */ /* 0x000168000c1e1900 */ /*0ac0*/ LDG.E R14, [R2.64+0x1c00] ; /* 0x001c0004020e7981 */ /* 0x000162000c1e1900 */ /*0ad0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*0ae0*/ IADD3 R4, R4, 0x800, RZ ; /* 0x0000080004047810 */ /* 0x000fe40007ffe0ff */ /*0af0*/ IADD3 R6, R6, R7, R10 ; /* 0x0000000706067210 */ /* 0x004fe40007ffe00a */ /*0b00*/ IADD3 R7, P1, R2, 0x2000, RZ ; /* 0x0000200002077810 */ /* 0x000fca0007f3e0ff */ /*0b10*/ IMAD.MOV.U32 R2, RZ, RZ, R7 ; /* 0x000000ffff027224 */ /* 0x001fe200078e0007 */ /*0b20*/ IADD3 R6, R8, R9, R6 ; /* 0x0000000908067210 */ /* 0x008fe20007ffe006 */ /*0b30*/ IMAD.X R8, RZ, RZ, R3, P1 ; /* 0x000000ffff087224 */ /* 0x000fc800008e0603 */ /*0b40*/ IMAD.MOV.U32 R3, RZ, RZ, R8 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0008 */ /*0b50*/ IADD3 R6, R12, R11, R6 ; /* 0x0000000b0c067210 */ /* 0x010fc80007ffe006 */ /*0b60*/ IADD3 R10, R14, R13, R6 ; /* 0x0000000d0e0a7210 */ /* 0x020fe40007ffe006 */ /*0b70*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0b80*/ ISETP.LT.OR P0, PT, R4, R5, P0 ; /* 0x000000050400720c */ /* 0x000fda0000701670 */ /*0b90*/ @!P0 BRA 0xc00 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*0ba0*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */ /* 0x000ea8000c1e1900 */ /*0bb0*/ LDG.E R4, [R2.64+0x400] ; /* 0x0004000402047981 */ /* 0x000ea8000c1e1900 */ /*0bc0*/ LDG.E R7, [R2.64+0x800] ; /* 0x0008000402077981 */ /* 0x000ee8000c1e1900 */ /*0bd0*/ LDG.E R6, [R2.64+0xc00] ; /* 0x000c000402067981 */ /* 0x000ee2000c1e1900 */ /*0be0*/ IADD3 R4, R4, R5, R10 ; /* 0x0000000504047210 */ /* 0x004fc80007ffe00a */ /*0bf0*/ IADD3 R10, R6, R7, R4 ; /* 0x00000007060a7210 */ /* 0x008fe40007ffe004 */ /*0c00*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0c10*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e280000000000 */ /*0c20*/ SHFL.DOWN PT, R2, R10, 0x1, 0x1f ; /* 0x08201f000a027f89 */ /* 0x000e6200000e0000 */ /*0c30*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x041fe40003f04270 */ /*0c40*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*0c50*/ SEL R3, R2, RZ, !P0 ; /* 0x000000ff02037207 */ /* 0x002fe40004000000 */ /*0c60*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*0c70*/ IMAD.IADD R3, R3, 0x1, R10 ; /* 0x0000000103037824 */ /* 0x000fca00078e020a */ /*0c80*/ SHFL.DOWN PT, R2, R3, 0x2, 0x1f ; /* 0x08401f0003027f89 */ /* 0x000e2800000e0000 */ /*0c90*/ @!P1 S2R R7, SR_TID.X ; /* 0x0000000000079919 */ /* 0x000e620000002100 */ /*0ca0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x001fe40004000000 */ /*0cb0*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*0cc0*/ IMAD.IADD R2, R3, 0x1, R2 ; /* 0x0000000103027824 */ /* 0x000fca00078e0202 */ /*0cd0*/ SHFL.DOWN PT, R4, R2, 0x4, 0x1f ; /* 0x08801f0002047f89 */ /* 0x000e2400000e0000 */ /*0ce0*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*0cf0*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*0d00*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fe200078e0205 */ /*0d10*/ @!P1 SHF.R.S32.HI R2, RZ, 0x1f, R7 ; /* 0x0000001fff029819 */ /* 0x002fc80000011407 */ /*0d20*/ SHFL.DOWN PT, R4, R5, 0x8, 0x1f ; /* 0x09001f0005047f89 */ /* 0x000e2200000e0000 */ /*0d30*/ @!P1 LEA.HI R2, R2, R7, RZ, 0x5 ; /* 0x0000000702029211 */ /* 0x000fc800078f28ff */ /*0d40*/ @!P1 SHF.R.S32.HI R2, RZ, 0x5, R2 ; /* 0x00000005ff029819 */ /* 0x000fca0000011402 */ /*0d50*/ @!P1 IMAD.SHL.U32 R2, R2, 0x4, RZ ; /* 0x0000000402029824 */ /* 0x000fe200078e00ff */ /*0d60*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*0d70*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*0d80*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*0d90*/ SHFL.DOWN PT, R3, R4, 0x10, 0x1f ; /* 0x0a001f0004037f89 */ /* 0x000e2400000e0000 */ /*0da0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*0db0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*0dc0*/ IMAD.IADD R9, R4, 0x1, R3 ; /* 0x0000000104097824 */ /* 0x000fca00078e0203 */ /*0dd0*/ @!P1 STS [R2+0x8], R9 ; /* 0x0000080902009388 */ /* 0x0001e80000000800 */ /*0de0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0df0*/ @P0 BRA 0x1bc0 ; /* 0x00000dc000000947 */ /* 0x000fea0003800000 */ /*0e00*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x001fe80000000800 */ /*0e10*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*0e20*/ LDS.64 R2, [0x20] ; /* 0x00002000ff027984 */ /* 0x000e620000000a00 */ /*0e30*/ IADD3 R0, R4, R0, R9 ; /* 0x0000000004007210 */ /* 0x001fc80007ffe009 */ /*0e40*/ IADD3 R0, R6, R0, R5 ; /* 0x0000000006007210 */ /* 0x000fc80007ffe005 */ /*0e50*/ IADD3 R2, R2, R0, R7 ; /* 0x0000000002027210 */ /* 0x002fe20007ffe007 */ /*0e60*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fc800078e00ff */ /*0e70*/ IMAD.IADD R9, R2, 0x1, R3 ; /* 0x0000000102097824 */ /* 0x000fe200078e0203 */ /*0e80*/ BRA 0x1bc0 ; /* 0x00000d3000007947 */ /* 0x000fea0003800000 */ /*0e90*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0ea0*/ BSSY B1, 0xf40 ; /* 0x0000009000017945 */ /* 0x000fe20003800000 */ /*0eb0*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */ /* 0x000fe200078e00ff */ /*0ec0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */ /* 0x001fe20003f06270 */ /*0ed0*/ IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff067224 */ /* 0x000fd800078e0000 */ /*0ee0*/ @P0 BRA 0xf30 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0ef0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*0f00*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fca00078e0205 */ /*0f10*/ LDG.E R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000162000c1e1900 */ /*0f20*/ IADD3 R6, R6, 0x100, RZ ; /* 0x0000010006067810 */ /* 0x000fc60007ffe0ff */ /*0f30*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0f40*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x170], PT ; /* 0x00005c0006007a0c */ /* 0x000fe20003f06270 */ /*0f50*/ BSSY B1, 0x1560 ; /* 0x0000060000017945 */ /* 0x000fd80003800000 */ /*0f60*/ @P0 BRA 0x1550 ; /* 0x000005e000000947 */ /* 0x000fea0003800000 */ /*0f70*/ LOP3.LUT R4, RZ, R6, RZ, 0x33, !PT ; /* 0x00000006ff047212 */ /* 0x001fe200078e33ff */ /*0f80*/ BSSY B2, 0x10b0 ; /* 0x0000012000027945 */ /* 0x000fe60003800000 */ /*0f90*/ IADD3 R5, R4, c[0x0][0x170], RZ ; /* 0x00005c0004057a10 */ /* 0x000fc80007ffe0ff */ /*0fa0*/ LEA.HI R4, R5.reuse, 0x1, RZ, 0x18 ; /* 0x0000000105047811 */ /* 0x040fe400078fc0ff */ /*0fb0*/ ISETP.GE.U32.AND P0, PT, R5, 0x300, PT ; /* 0x000003000500780c */ /* 0x000fe40003f06070 */ /*0fc0*/ LOP3.LUT P1, R7, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304077812 */ /* 0x000fda000782c0ff */ /*0fd0*/ @!P1 BRA 0x10a0 ; /* 0x000000c000009947 */ /* 0x000fea0003800000 */ /*0fe0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*0ff0*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fc800078e0205 */ /*1000*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ; /* 0x000000ffff087224 */ /* 0x000fc800078e0004 */ /*1010*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fcc00078e0008 */ /*1020*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x0000a2000c1e1900 */ /*1030*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*1040*/ IADD3 R8, P2, R8, 0x400, RZ ; /* 0x0000040008087810 */ /* 0x000fe40007f5e0ff */ /*1050*/ ISETP.NE.AND P1, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f25270 */ /*1060*/ IADD3 R6, R6, 0x100, RZ ; /* 0x0000010006067810 */ /* 0x000fe20007ffe0ff */ /*1070*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe400010e0605 */ /*1080*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x024fd000078e0203 */ /*1090*/ @P1 BRA 0x1010 ; /* 0xffffff7000001947 */ /* 0x000fea000383ffff */ /*10a0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*10b0*/ @!P0 BRA 0x1550 ; /* 0x0000049000008947 */ /* 0x000fea0003800000 */ /*10c0*/ IADD3 R7, -R6.reuse, c[0x0][0x170], RZ ; /* 0x00005c0006077a10 */ /* 0x040fe20007ffe1ff */ /*10d0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*10e0*/ BSSY B2, 0x1360 ; /* 0x0000027000027945 */ /* 0x000fe40003800000 */ /*10f0*/ ISETP.GT.AND P1, PT, R7, 0xc00, PT ; /* 0x00000c000700780c */ /* 0x000fe20003f24270 */ /*1100*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fca00078e0205 */ /*1110*/ IADD3 R4, P0, R4, 0x800, RZ ; /* 0x0000080004047810 */ /* 0x000fca0007f1e0ff */ /*1120*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */ /* 0x000fe200000e0605 */ /*1130*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f070 */ /*1140*/ @!P1 BRA 0x1350 ; /* 0x0000020000009947 */ /* 0x000fee0003800000 */ /*1150*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*1160*/ IADD3 R23, R2, -0xc00, RZ ; /* 0xfffff40002177810 */ /* 0x000fc60007ffe0ff */ /*1170*/ LDG.E R8, [R4.64+-0x800] ; /* 0xfff8000404087981 */ /* 0x000ea8000c1e1900 */ /*1180*/ LDG.E R7, [R4.64+-0x400] ; /* 0xfffc000404077981 */ /* 0x000ea8000c1e1900 */ /*1190*/ LDG.E R10, [R4.64] ; /* 0x00000004040a7981 */ /* 0x0000e8000c1e1900 */ /*11a0*/ LDG.E R9, [R4.64+0x400] ; /* 0x0004000404097981 */ /* 0x0000e8000c1e1900 */ /*11b0*/ LDG.E R12, [R4.64+0x800] ; /* 0x00080004040c7981 */ /* 0x000128000c1e1900 */ /*11c0*/ LDG.E R11, [R4.64+0xc00] ; /* 0x000c0004040b7981 */ /* 0x000128000c1e1900 */ /*11d0*/ LDG.E R14, [R4.64+0x1000] ; /* 0x00100004040e7981 */ /* 0x000128000c1e1900 */ /*11e0*/ LDG.E R13, [R4.64+0x1400] ; /* 0x00140004040d7981 */ /* 0x000128000c1e1900 */ /*11f0*/ LDG.E R16, [R4.64+0x1800] ; /* 0x0018000404107981 */ /* 0x000128000c1e1900 */ /*1200*/ LDG.E R15, [R4.64+0x1c00] ; /* 0x001c0004040f7981 */ /* 0x000128000c1e1900 */ /*1210*/ LDG.E R18, [R4.64+0x2000] ; /* 0x0020000404127981 */ /* 0x000128000c1e1900 */ /*1220*/ LDG.E R17, [R4.64+0x2400] ; /* 0x0024000404117981 */ /* 0x000128000c1e1900 */ /*1230*/ LDG.E R20, [R4.64+0x2800] ; /* 0x0028000404147981 */ /* 0x000128000c1e1900 */ /*1240*/ LDG.E R19, [R4.64+0x2c00] ; /* 0x002c000404137981 */ /* 0x000128000c1e1900 */ /*1250*/ LDG.E R22, [R4.64+0x3000] ; /* 0x0030000404167981 */ /* 0x000128000c1e1900 */ /*1260*/ LDG.E R21, [R4.64+0x3400] ; /* 0x0034000404157981 */ /* 0x000122000c1e1900 */ /*1270*/ IADD3 R6, R6, 0x1000, RZ ; /* 0x0000100006067810 */ /* 0x000fc80007ffe0ff */ /*1280*/ ISETP.GE.AND P1, PT, R6, R23, PT ; /* 0x000000170600720c */ /* 0x000fe40003f26270 */ /*1290*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*12a0*/ IADD3 R8, P2, R4, 0x4000, RZ ; /* 0x0000400004087810 */ /* 0x000fca0007f5e0ff */ /*12b0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe200010e0605 */ /*12c0*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*12d0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fc600078e0008 */ /*12e0*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*12f0*/ IADD3 R7, R13, R14, R7 ; /* 0x0000000e0d077210 */ /* 0x000fc80007ffe007 */ /*1300*/ IADD3 R7, R15, R16, R7 ; /* 0x000000100f077210 */ /* 0x000fc80007ffe007 */ /*1310*/ IADD3 R7, R17, R18, R7 ; /* 0x0000001211077210 */ /* 0x000fc80007ffe007 */ /*1320*/ IADD3 R7, R19, R20, R7 ; /* 0x0000001413077210 */ /* 0x000fc80007ffe007 */ /*1330*/ IADD3 R3, R21, R22, R7 ; /* 0x0000001615037210 */ /* 0x000fe20007ffe007 */ /*1340*/ @!P1 BRA 0x1170 ; /* 0xfffffe2000009947 */ /* 0x000fea000383ffff */ /*1350*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1360*/ IADD3 R7, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006077a10 */ /* 0x000fe20007ffe1ff */ /*1370*/ BSSY B2, 0x14d0 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*1380*/ ISETP.GT.AND P1, PT, R7, 0x400, PT ; /* 0x000004000700780c */ /* 0x000fda0003f24270 */ /*1390*/ @!P1 BRA 0x14c0 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*13a0*/ LDG.E R8, [R4.64+-0x800] ; /* 0xfff8000404087981 */ /* 0x000ea8000c1e1900 */ /*13b0*/ LDG.E R7, [R4.64+-0x400] ; /* 0xfffc000404077981 */ /* 0x000ea8000c1e1900 */ /*13c0*/ LDG.E R10, [R4.64] ; /* 0x00000004040a7981 */ /* 0x0000e8000c1e1900 */ /*13d0*/ LDG.E R9, [R4.64+0x400] ; /* 0x0004000404097981 */ /* 0x0000e8000c1e1900 */ /*13e0*/ LDG.E R12, [R4.64+0x800] ; /* 0x00080004040c7981 */ /* 0x000128000c1e1900 */ /*13f0*/ LDG.E R11, [R4.64+0xc00] ; /* 0x000c0004040b7981 */ /* 0x000128000c1e1900 */ /*1400*/ LDG.E R14, [R4.64+0x1000] ; /* 0x00100004040e7981 */ /* 0x000128000c1e1900 */ /*1410*/ LDG.E R13, [R4.64+0x1400] ; /* 0x00140004040d7981 */ /* 0x000122000c1e1900 */ /*1420*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*1430*/ IADD3 R6, R6, 0x800, RZ ; /* 0x0000080006067810 */ /* 0x000fe40007ffe0ff */ /*1440*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*1450*/ IADD3 R8, P1, R4, 0x2000, RZ ; /* 0x0000200004087810 */ /* 0x000fca0007f3e0ff */ /*1460*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x001fe200078e0008 */ /*1470*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*1480*/ IMAD.X R9, RZ, RZ, R5, P1 ; /* 0x000000ffff097224 */ /* 0x000fc800008e0605 */ /*1490*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe200078e0009 */ /*14a0*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*14b0*/ IADD3 R3, R13, R14, R7 ; /* 0x0000000e0d037210 */ /* 0x000fe40007ffe007 */ /*14c0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*14d0*/ ISETP.LT.OR P0, PT, R6, c[0x0][0x170], P0 ; /* 0x00005c0006007a0c */ /* 0x000fda0000701670 */ /*14e0*/ @!P0 BRA 0x1550 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*14f0*/ LDG.E R6, [R4.64+-0x800] ; /* 0xfff8000404067981 */ /* 0x000ea8000c1e1900 */ /*1500*/ LDG.E R7, [R4.64+-0x400] ; /* 0xfffc000404077981 */ /* 0x000ea8000c1e1900 */ /*1510*/ LDG.E R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ee8000c1e1900 */ /*1520*/ LDG.E R9, [R4.64+0x400] ; /* 0x0004000404097981 */ /* 0x000ee2000c1e1900 */ /*1530*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x024fc80007ffe003 */ /*1540*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fe40007ffe003 */ /*1550*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1560*/ ISETP.GT.AND P0, PT, R2, 0xff, PT ; /* 0x000000ff0200780c */ /* 0x000fda0003f04270 */ /*1570*/ @P0 BRA 0x1970 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*1580*/ SHF.R.S32.HI R5, RZ, 0x1f, R0 ; /* 0x0000001fff057819 */ /* 0x001fe20000011400 */ /*1590*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */ /* 0x000e260000000000 */ /*15a0*/ LEA.HI R8, R5, R0, RZ, 0x5 ; /* 0x0000000005087211 */ /* 0x000fc800078f28ff */ /*15b0*/ LOP3.LUT R4, R8, 0xffffffe0, RZ, 0xc0, !PT ; /* 0xffffffe008047812 */ /* 0x000fe400078ec0ff */ /*15c0*/ SHF.R.S32.HI R8, RZ, 0x5, R8 ; /* 0x00000005ff087819 */ /* 0x000fe40000011408 */ /*15d0*/ IADD3 R5, R4, 0x20, RZ ; /* 0x0000002004057810 */ /* 0x000fe40007ffe0ff */ /*15e0*/ LOP3.LUT R4, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff047212 */ /* 0x000fe400078e33ff */ /*15f0*/ ISETP.GT.AND P0, PT, R5, c[0x0][0x170], PT ; /* 0x00005c0005007a0c */ /* 0x000fe40003f04270 */ /*1600*/ IADD3 R4, R4, c[0x0][0x170], RZ ; /* 0x00005c0004047a10 */ /* 0x000fc80007ffe0ff */ /*1610*/ SEL R4, R4, 0x1f, P0 ; /* 0x0000001f04047807 */ /* 0x000fe40000000000 */ /*1620*/ IADD3 R7, R11, 0x2, RZ ; /* 0x000000020b077810 */ /* 0x001fc60007ffe0ff */ /*1630*/ SHFL.DOWN PT, R5, R3, 0x1, R4 ; /* 0x0820000003057989 */ /* 0x020e2200000e0004 */ /*1640*/ ISETP.GE.AND P0, PT, R11.reuse, R4, PT ; /* 0x000000040b00720c */ /* 0x040fe40003f06270 */ /*1650*/ IADD3 R9, R11.reuse, 0x4, RZ ; /* 0x000000040b097810 */ /* 0x040fe40007ffe0ff */ /*1660*/ ISETP.NE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fda0003f25270 */ /*1670*/ @!P1 IMAD.SHL.U32 R8, R8, 0x4, RZ ; /* 0x0000000408089824 */ /* 0x000fe200078e00ff */ /*1680*/ SEL R6, R5, RZ, !P0 ; /* 0x000000ff05067207 */ /* 0x001fe40004000000 */ /*1690*/ ISETP.GT.AND P0, PT, R7, R4, PT ; /* 0x000000040700720c */ /* 0x000fc60003f04270 */ /*16a0*/ IMAD.IADD R5, R6, 0x1, R3 ; /* 0x0000000106057824 */ /* 0x000fca00078e0203 */ /*16b0*/ SHFL.DOWN PT, R6, R5, 0x2, R4 ; /* 0x0840000005067989 */ /* 0x000e2400000e0004 */ /*16c0*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*16d0*/ ISETP.GT.AND P0, PT, R9, R4, PT ; /* 0x000000040900720c */ /* 0x000fc60003f04270 */ /*16e0*/ IMAD.IADD R7, R5, 0x1, R6 ; /* 0x0000000105077824 */ /* 0x000fe200078e0206 */ /*16f0*/ IADD3 R5, R11, 0x8, RZ ; /* 0x000000080b057810 */ /* 0x000fc80007ffe0ff */ /*1700*/ SHFL.DOWN PT, R6, R7, 0x4, R4 ; /* 0x0880000007067989 */ /* 0x000e2400000e0004 */ /*1710*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*1720*/ ISETP.GT.AND P0, PT, R5, R4, PT ; /* 0x000000040500720c */ /* 0x000fc60003f04270 */ /*1730*/ IMAD.IADD R3, R7, 0x1, R6 ; /* 0x0000000107037824 */ /* 0x000fe200078e0206 */ /*1740*/ IADD3 R7, R11, 0x10, RZ ; /* 0x000000100b077810 */ /* 0x000fc80007ffe0ff */ /*1750*/ SHFL.DOWN PT, R6, R3, 0x8, R4 ; /* 0x0900000003067989 */ /* 0x000e2400000e0004 */ /*1760*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*1770*/ ISETP.GT.AND P0, PT, R7, R4, PT ; /* 0x000000040700720c */ /* 0x000fc60003f04270 */ /*1780*/ IMAD.IADD R5, R3, 0x1, R6 ; /* 0x0000000103057824 */ /* 0x000fca00078e0206 */ /*1790*/ SHFL.DOWN PT, R6, R5, 0x10, R4 ; /* 0x0a00000005067989 */ /* 0x000e2400000e0004 */ /*17a0*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*17b0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*17c0*/ IMAD.IADD R9, R5, 0x1, R6 ; /* 0x0000000105097824 */ /* 0x000fca00078e0206 */ /*17d0*/ @!P1 STS [R8+0x8], R9 ; /* 0x0000080908009388 */ /* 0x0001e80000000800 */ /*17e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*17f0*/ @P0 BRA 0x1bc0 ; /* 0x000003c000000947 */ /* 0x000fea0003800000 */ /*1800*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x001e220000000c00 */ /*1810*/ ISETP.GT.AND P2, PT, R2, 0x80, PT ; /* 0x000000800200780c */ /* 0x000fc40003f44270 */ /*1820*/ ISETP.GT.AND P1, PT, R2.reuse, 0x40, PT ; /* 0x000000400200780c */ /* 0x040fe20003f24270 */ /*1830*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x000e620000000800 */ /*1840*/ ISETP.GT.AND P0, PT, R2, 0x20, PT ; /* 0x000000200200780c */ /* 0x000fc60003f04270 */ /*1850*/ LDS.64 R10, [0x20] ; /* 0x00002000ff0a7984 */ /* 0x000ea20000000a00 */ /*1860*/ SEL R6, R6, RZ, P2 ; /* 0x000000ff06067207 */ /* 0x001fe40001000000 */ /*1870*/ ISETP.GE.AND P2, PT, R2, 0xe1, PT ; /* 0x000000e10200780c */ /* 0x000fe40003f46270 */ /*1880*/ SEL R4, R4, RZ, P1 ; /* 0x000000ff04047207 */ /* 0x000fe40000800000 */ /*1890*/ ISETP.GT.AND P1, PT, R2, 0x60, PT ; /* 0x000000600200780c */ /* 0x000fe40003f24270 */ /*18a0*/ SEL R0, R0, RZ, P0 ; /* 0x000000ff00007207 */ /* 0x002fe40000000000 */ /*18b0*/ SEL R5, R5, RZ, P1 ; /* 0x000000ff05057207 */ /* 0x000fc40000800000 */ /*18c0*/ IADD3 R0, R4, R9, R0 ; /* 0x0000000904007210 */ /* 0x000fe40007ffe000 */ /*18d0*/ ISETP.GT.AND P0, PT, R2.reuse, 0xa0, PT ; /* 0x000000a00200780c */ /* 0x040fe40003f04270 */ /*18e0*/ ISETP.GT.AND P1, PT, R2, 0xc0, PT ; /* 0x000000c00200780c */ /* 0x000fe40003f24270 */ /*18f0*/ SEL R2, R7, RZ, P0 ; /* 0x000000ff07027207 */ /* 0x000fe40000000000 */ /*1900*/ IADD3 R5, R6, R0, R5 ; /* 0x0000000006057210 */ /* 0x000fe20007ffe005 */ /*1910*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*1920*/ SEL R10, R10, RZ, P1 ; /* 0x000000ff0a0a7207 */ /* 0x004fc80000800000 */ /*1930*/ IADD3 R9, R10, R5, R2 ; /* 0x000000050a097210 */ /* 0x000fe20007ffe002 */ /*1940*/ @!P2 BRA 0x1bc0 ; /* 0x000002700000a947 */ /* 0x000fea0003800000 */ /*1950*/ IMAD.IADD R9, R9, 0x1, R11 ; /* 0x0000000109097824 */ /* 0x000fe200078e020b */ /*1960*/ BRA 0x1bc0 ; /* 0x0000025000007947 */ /* 0x000fea0003800000 */ /*1970*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e680000000000 */ /*1980*/ SHFL.DOWN PT, R2, R3, 0x1, 0x1f ; /* 0x08201f0003027f89 */ /* 0x020ea200000e0000 */ /*1990*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x042fe40003f04270 */ /*19a0*/ ISETP.NE.AND P2, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f45270 */ /*19b0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x004fc40004000000 */ /*19c0*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x040fe40003f04270 */ /*19d0*/ ISETP.GT.AND P1, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fe20003f24270 */ /*19e0*/ IMAD.IADD R2, R2, 0x1, R3 ; /* 0x0000000102027824 */ /* 0x000fca00078e0203 */ /*19f0*/ SHFL.DOWN PT, R4, R2, 0x2, 0x1f ; /* 0x08401f0002047f89 */ /* 0x001e2200000e0000 */ /*1a00*/ @!P2 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff07a819 */ /* 0x000fc80000011400 */ /*1a10*/ @!P2 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x000000000707a211 */ /* 0x000fc800078f28ff */ /*1a20*/ @!P2 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff07a819 */ /* 0x000fca0000011407 */ /*1a30*/ @!P2 IMAD.SHL.U32 R8, R7, 0x4, RZ ; /* 0x000000040708a824 */ /* 0x000fe200078e00ff */ /*1a40*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*1a50*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*1a60*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fca00078e0205 */ /*1a70*/ SHFL.DOWN PT, R4, R5, 0x4, 0x1f ; /* 0x08801f0005047f89 */ /* 0x000e2400000e0000 */ /*1a80*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*1a90*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*1aa0*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*1ab0*/ SHFL.DOWN PT, R3, R4, 0x8, 0x1f ; /* 0x09001f0004037f89 */ /* 0x000e2400000e0000 */ /*1ac0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1ad0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*1ae0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x000fca00078e0203 */ /*1af0*/ SHFL.DOWN PT, R2, R3, 0x10, 0x1f ; /* 0x0a001f0003027f89 */ /* 0x000e2a00000e0000 */ /*1b00*/ @!P0 IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff008224 */ /* 0x000fe200078e00ff */ /*1b10*/ SEL R2, R2, RZ, !P1 ; /* 0x000000ff02027207 */ /* 0x001fca0004800000 */ /*1b20*/ IMAD.IADD R9, R3, 0x1, R2 ; /* 0x0000000103097824 */ /* 0x000fca00078e0202 */ /*1b30*/ @!P2 STS [R8+0x8], R9 ; /* 0x000008090800a388 */ /* 0x000fe80000000800 */ /*1b40*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1b50*/ @!P0 LDS R2, [0xc] ; /* 0x00000c00ff028984 */ /* 0x000fe80000000800 */ /*1b60*/ @!P0 LDS.128 R4, [0x10] ; /* 0x00001000ff048984 */ /* 0x000e280000000c00 */ /*1b70*/ @!P0 LDS.64 R10, [0x20] ; /* 0x00002000ff0a8984 */ /* 0x000e620000000a00 */ /*1b80*/ @!P0 IADD3 R2, R4, R2, R9 ; /* 0x0000000204028210 */ /* 0x001fc80007ffe009 */ /*1b90*/ @!P0 IADD3 R2, R6, R2, R5 ; /* 0x0000000206028210 */ /* 0x000fc80007ffe005 */ /*1ba0*/ @!P0 IADD3 R2, R10, R2, R7 ; /* 0x000000020a028210 */ /* 0x002fca0007ffe007 */ /*1bb0*/ @!P0 IMAD.IADD R9, R2, 0x1, R11 ; /* 0x0000000102098824 */ /* 0x000fe400078e020b */ /*1bc0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*1bd0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*1be0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*1bf0*/ IADD3 R9, R9, c[0x0][0x17c], RZ ; /* 0x00005f0009097a10 */ /* 0x000fe20007ffe0ff */ /*1c00*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*1c10*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fca00078e00ff */ /*1c20*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x000fe2000c101904 */ /*1c30*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1c40*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e240000002100 */ /*1c50*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x001fda0003f05270 */ /*1c60*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*1c70*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff057624 */ /* 0x000fe400078e00ff */ /*1c80*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*1c90*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fca00078e00ff */ /*1ca0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*1cb0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1cc0*/ BRA 0x1cc0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1cd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ce0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1cf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600EPiS9_iS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c */ /* 0x000fe20003f05270 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fd80000000a00 */ /*0030*/ @!P0 BRA 0x3660 ; /* 0x0000362000008947 */ /* 0x000fea0003800000 */ /*0040*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0050*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */ /* 0x000fe200078e00ff */ /*0060*/ BSSY B0, 0x35f0 ; /* 0x0000358000007945 */ /* 0x000fe80003800000 */ /*0070*/ LOP3.LUT P0, RZ, R2, 0xf, RZ, 0xc0, !PT ; /* 0x0000000f02ff7812 */ /* 0x000fda000780c0ff */ /*0080*/ @!P0 BRA 0x1be0 ; /* 0x00001b5000008947 */ /* 0x000fea0003800000 */ /*0090*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff027624 */ /* 0x000fca00078e00ff */ /*00a0*/ ISETP.GE.AND P0, PT, R2, 0x1000, PT ; /* 0x000010000200780c */ /* 0x000fda0003f06270 */ /*00b0*/ @!P0 BRA 0xec0 ; /* 0x00000e0000008947 */ /* 0x000fea0003800000 */ /*00c0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*00d0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x001fca00078e0205 */ /*00e0*/ LDG.E.CONSTANT R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000ea8000c1e9900 */ /*00f0*/ LDG.E.CONSTANT R6, [R4.64+0x400] ; /* 0x0004000404067981 */ /* 0x000ea8000c1e9900 */ /*0100*/ LDG.E.CONSTANT R7, [R4.64+0x800] ; /* 0x0008000404077981 */ /* 0x000ea8000c1e9900 */ /*0110*/ LDG.E.CONSTANT R8, [R4.64+0xc00] ; /* 0x000c000404087981 */ /* 0x000ee8000c1e9900 */ /*0120*/ LDG.E.CONSTANT R9, [R4.64+0x1000] ; /* 0x0010000404097981 */ /* 0x000ee8000c1e9900 */ /*0130*/ LDG.E.CONSTANT R10, [R4.64+0x1400] ; /* 0x00140004040a7981 */ /* 0x000f28000c1e9900 */ /*0140*/ LDG.E.CONSTANT R11, [R4.64+0x1800] ; /* 0x00180004040b7981 */ /* 0x000f28000c1e9900 */ /*0150*/ LDG.E.CONSTANT R12, [R4.64+0x1c00] ; /* 0x001c0004040c7981 */ /* 0x000f68000c1e9900 */ /*0160*/ LDG.E.CONSTANT R13, [R4.64+0x2000] ; /* 0x00200004040d7981 */ /* 0x000f68000c1e9900 */ /*0170*/ LDG.E.CONSTANT R14, [R4.64+0x2400] ; /* 0x00240004040e7981 */ /* 0x000f68000c1e9900 */ /*0180*/ LDG.E.CONSTANT R15, [R4.64+0x2800] ; /* 0x00280004040f7981 */ /* 0x000f68000c1e9900 */ /*0190*/ LDG.E.CONSTANT R16, [R4.64+0x2c00] ; /* 0x002c000404107981 */ /* 0x000f68000c1e9900 */ /*01a0*/ LDG.E.CONSTANT R17, [R4.64+0x3000] ; /* 0x0030000404117981 */ /* 0x000f68000c1e9900 */ /*01b0*/ LDG.E.CONSTANT R18, [R4.64+0x3400] ; /* 0x0034000404127981 */ /* 0x000f68000c1e9900 */ /*01c0*/ LDG.E.CONSTANT R19, [R4.64+0x3800] ; /* 0x0038000404137981 */ /* 0x000f68000c1e9900 */ /*01d0*/ LDG.E.CONSTANT R20, [R4.64+0x3c00] ; /* 0x003c000404147981 */ /* 0x000f62000c1e9900 */ /*01e0*/ ISETP.GE.AND P0, PT, R2, 0x2000, PT ; /* 0x000020000200780c */ /* 0x000fc40003f06270 */ /*01f0*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x004fc80007ffe003 */ /*0200*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fe20007ffe003 */ /*0210*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1000 ; /* 0x00001000ff097424 */ /* 0x000fc600078e00ff */ /*0220*/ IADD3 R3, R11, R10, R3 ; /* 0x0000000a0b037210 */ /* 0x010fc80007ffe003 */ /*0230*/ IADD3 R3, R13, R12, R3 ; /* 0x0000000c0d037210 */ /* 0x020fc80007ffe003 */ /*0240*/ IADD3 R3, R15, R14, R3 ; /* 0x0000000e0f037210 */ /* 0x000fc80007ffe003 */ /*0250*/ IADD3 R3, R17, R16, R3 ; /* 0x0000001011037210 */ /* 0x000fc80007ffe003 */ /*0260*/ IADD3 R3, R19, R18, R3 ; /* 0x0000001213037210 */ /* 0x000fca0007ffe003 */ /*0270*/ IMAD.IADD R6, R20, 0x1, R3 ; /* 0x0000000114067824 */ /* 0x000fe200078e0203 */ /*0280*/ @!P0 BRA 0x4f0 ; /* 0x0000026000008947 */ /* 0x000fea0003800000 */ /*0290*/ IADD3 R8, R2, -0x1000, RZ ; /* 0xfffff00002087810 */ /* 0x000fe20007ffe0ff */ /*02a0*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0004 */ /*02b0*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0005 */ /*02c0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1000 ; /* 0x00001000ff097424 */ /* 0x000fe400078e00ff */ /*02d0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fe400078e0008 */ /*02e0*/ LDG.E.CONSTANT R5, [R2.64+0x4000] ; /* 0x0040000402057981 */ /* 0x000ea8000c1e9900 */ /*02f0*/ LDG.E.CONSTANT R7, [R2.64+0x4400] ; /* 0x0044000402077981 */ /* 0x000ea8000c1e9900 */ /*0300*/ LDG.E.CONSTANT R10, [R2.64+0x4800] ; /* 0x00480004020a7981 */ /* 0x0000e8000c1e9900 */ /*0310*/ LDG.E.CONSTANT R11, [R2.64+0x4c00] ; /* 0x004c0004020b7981 */ /* 0x0000e8000c1e9900 */ /*0320*/ LDG.E.CONSTANT R12, [R2.64+0x5000] ; /* 0x00500004020c7981 */ /* 0x000128000c1e9900 */ /*0330*/ LDG.E.CONSTANT R13, [R2.64+0x5400] ; /* 0x00540004020d7981 */ /* 0x000128000c1e9900 */ /*0340*/ LDG.E.CONSTANT R14, [R2.64+0x5800] ; /* 0x00580004020e7981 */ /* 0x000168000c1e9900 */ /*0350*/ LDG.E.CONSTANT R15, [R2.64+0x5c00] ; /* 0x005c0004020f7981 */ /* 0x000168000c1e9900 */ /*0360*/ LDG.E.CONSTANT R16, [R2.64+0x6000] ; /* 0x0060000402107981 */ /* 0x000168000c1e9900 */ /*0370*/ LDG.E.CONSTANT R17, [R2.64+0x6400] ; /* 0x0064000402117981 */ /* 0x000168000c1e9900 */ /*0380*/ LDG.E.CONSTANT R18, [R2.64+0x6800] ; /* 0x0068000402127981 */ /* 0x000168000c1e9900 */ /*0390*/ LDG.E.CONSTANT R19, [R2.64+0x6c00] ; /* 0x006c000402137981 */ /* 0x000168000c1e9900 */ /*03a0*/ LDG.E.CONSTANT R20, [R2.64+0x7000] ; /* 0x0070000402147981 */ /* 0x000168000c1e9900 */ /*03b0*/ LDG.E.CONSTANT R21, [R2.64+0x7400] ; /* 0x0074000402157981 */ /* 0x000168000c1e9900 */ /*03c0*/ LDG.E.CONSTANT R22, [R2.64+0x7800] ; /* 0x0078000402167981 */ /* 0x000168000c1e9900 */ /*03d0*/ LDG.E.CONSTANT R23, [R2.64+0x7c00] ; /* 0x007c000402177981 */ /* 0x000162000c1e9900 */ /*03e0*/ ISETP.GE.AND P0, PT, R4, 0x1000, PT ; /* 0x000010000400780c */ /* 0x000fc40003f06270 */ /*03f0*/ IADD3 R5, R7, R5, R6 ; /* 0x0000000507057210 */ /* 0x004fe40007ffe006 */ /*0400*/ IADD3 R7, P1, R2, 0x4000, RZ ; /* 0x0000400002077810 */ /* 0x000fca0007f3e0ff */ /*0410*/ IMAD.X R3, RZ, RZ, R3, P1 ; /* 0x000000ffff037224 */ /* 0x001fe200008e0603 */ /*0420*/ IADD3 R5, R11, R10, R5 ; /* 0x0000000a0b057210 */ /* 0x008fc80007ffe005 */ /*0430*/ IADD3 R5, R13, R12, R5 ; /* 0x0000000c0d057210 */ /* 0x010fc80007ffe005 */ /*0440*/ IADD3 R5, R15, R14, R5 ; /* 0x0000000e0f057210 */ /* 0x020fc80007ffe005 */ /*0450*/ IADD3 R5, R17, R16, R5 ; /* 0x0000001011057210 */ /* 0x000fc80007ffe005 */ /*0460*/ IADD3 R5, R19, R18, R5 ; /* 0x0000001213057210 */ /* 0x000fc80007ffe005 */ /*0470*/ IADD3 R5, R21, R20, R5 ; /* 0x0000001415057210 */ /* 0x000fc80007ffe005 */ /*0480*/ IADD3 R6, R23, R22, R5 ; /* 0x0000001617067210 */ /* 0x000fe20007ffe005 */ /*0490*/ @!P0 BRA 0xc50 ; /* 0x000007b000008947 */ /* 0x000fea0003800000 */ /*04a0*/ IADD3 R9, R9, 0x1000, RZ ; /* 0x0000100009097810 */ /* 0x000fe20007ffe0ff */ /*04b0*/ IMAD.MOV.U32 R2, RZ, RZ, R7 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0007 */ /*04c0*/ IADD3 R4, R4, -0x1000, RZ ; /* 0xfffff00004047810 */ /* 0x000fe40007ffe0ff */ /*04d0*/ ISETP.GT.AND P0, PT, R9, R8, PT ; /* 0x000000080900720c */ /* 0x000fda0003f04270 */ /*04e0*/ @!P0 BRA 0x2e0 ; /* 0xfffffdf000008947 */ /* 0x000fea000383ffff */ /*04f0*/ ISETP.GE.AND P0, PT, R9, c[0x0][0x170], PT ; /* 0x00005c0009007a0c */ /* 0x000fda0003f06270 */ /*0500*/ @P0 BRA 0xc50 ; /* 0x0000074000000947 */ /* 0x000fea0003800000 */ /*0510*/ IADD3 R7, -R9, c[0x0][0x170], RZ ; /* 0x00005c0009077a10 */ /* 0x000fe20007ffe1ff */ /*0520*/ BSSY B1, 0xc50 ; /* 0x0000072000017945 */ /* 0x000fe60003800000 */ /*0530*/ ISETP.GE.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x000fda0003f06270 */ /*0540*/ @P0 BRA 0xc40 ; /* 0x000006f000000947 */ /* 0x000fea0003800000 */ /*0550*/ LOP3.LUT R2, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff027212 */ /* 0x000fe200078e33ff */ /*0560*/ BSSY B2, 0x6c0 ; /* 0x0000015000027945 */ /* 0x000fe20003800000 */ /*0570*/ IMAD.MOV.U32 R8, RZ, RZ, R0 ; /* 0x000000ffff087224 */ /* 0x000fe400078e0000 */ /*0580*/ IADD3 R3, -R9, c[0x0][0x170], R2 ; /* 0x00005c0009037a10 */ /* 0x000fc80007ffe102 */ /*0590*/ LEA.HI R2, R3.reuse, 0x1, RZ, 0x18 ; /* 0x0000000103027811 */ /* 0x040fe400078fc0ff */ /*05a0*/ ISETP.GE.U32.AND P1, PT, R3, 0x300, PT ; /* 0x000003000300780c */ /* 0x000fe40003f26070 */ /*05b0*/ LOP3.LUT P0, R4, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302047812 */ /* 0x000fda000780c0ff */ /*05c0*/ @!P0 BRA 0x6b0 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*05d0*/ IMAD.IADD R2, R0, 0x1, R9 ; /* 0x0000000100027824 */ /* 0x000fe400078e0209 */ /*05e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fe400078e00ff */ /*05f0*/ IMAD.MOV.U32 R8, RZ, RZ, R0 ; /* 0x000000ffff087224 */ /* 0x000fe400078e0000 */ /*0600*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fc800078e0203 */ /*0610*/ IMAD.MOV.U32 R5, RZ, RZ, R3 ; /* 0x000000ffff057224 */ /* 0x000fc800078e0003 */ /*0620*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */ /* 0x000fcc00078e0005 */ /*0630*/ LDG.E.CONSTANT R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x0000a2000c1e9900 */ /*0640*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */ /* 0x000fe40007ffe0ff */ /*0650*/ IADD3 R8, R8, 0x100, RZ ; /* 0x0000010008087810 */ /* 0x000fe40007ffe0ff */ /*0660*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe40003f05270 */ /*0670*/ IADD3 R2, P2, R2, 0x400, RZ ; /* 0x0000040002027810 */ /* 0x001fca0007f5e0ff */ /*0680*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x000fe400010e0605 */ /*0690*/ IMAD.IADD R6, R3, 0x1, R6 ; /* 0x0000000103067824 */ /* 0x004fc800078e0206 */ /*06a0*/ @P0 BRA 0x620 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*06b0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*06c0*/ @!P1 BRA 0xc40 ; /* 0x0000057000009947 */ /* 0x000fea0003800000 */ /*06d0*/ IMAD.IADD R2, R7, 0x1, -R8 ; /* 0x0000000107027824 */ /* 0x000fe200078e0a08 */ /*06e0*/ BSSY B2, 0xa10 ; /* 0x0000032000027945 */ /* 0x000fe20003800000 */ /*06f0*/ IMAD.IADD R9, R8, 0x1, R9 ; /* 0x0000000108097824 */ /* 0x000fe200078e0209 */ /*0700*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f070 */ /*0710*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fe200078e00ff */ /*0720*/ ISETP.GT.AND P1, PT, R2, 0xc00, PT ; /* 0x00000c000200780c */ /* 0x000fe40003f24270 */ /*0730*/ IADD3 R10, R9.reuse, 0x300, RZ ; /* 0x00000300090a7810 */ /* 0x040fe20007ffe0ff */ /*0740*/ IMAD.WIDE R4, R9.reuse, R3.reuse, c[0x0][0x160] ; /* 0x0000580009047625 */ /* 0x0c0fe200078e0203 */ /*0750*/ IADD3 R12, R9.reuse, 0x200, RZ ; /* 0x00000200090c7810 */ /* 0x040fe40007ffe0ff */ /*0760*/ IADD3 R2, R9, 0x100, RZ ; /* 0x0000010009027810 */ /* 0x000fe20007ffe0ff */ /*0770*/ IMAD.WIDE R10, R10, R3, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fc800078e0203 */ /*0780*/ IMAD.WIDE R12, R12, R3, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x000fc800078e0203 */ /*0790*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fe200078e0203 */ /*07a0*/ @!P1 BRA 0xa00 ; /* 0x0000025000009947 */ /* 0x000fea0003800000 */ /*07b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*07c0*/ IADD3 R9, R7, -0xc00, RZ ; /* 0xfffff40007097810 */ /* 0x000fe40007ffe0ff */ /*07d0*/ LDG.E.CONSTANT R19, [R4.64] ; /* 0x0000000404137981 */ /* 0x0000a8000c1e9900 */ /*07e0*/ LDG.E.CONSTANT R18, [R2.64] ; /* 0x0000000402127981 */ /* 0x0002a8000c1e9900 */ /*07f0*/ LDG.E.CONSTANT R21, [R12.64] ; /* 0x000000040c157981 */ /* 0x000728000c1e9900 */ /*0800*/ LDG.E.CONSTANT R20, [R10.64] ; /* 0x000000040a147981 */ /* 0x000b28000c1e9900 */ /*0810*/ LDG.E.CONSTANT R23, [R4.64+0x1000] ; /* 0x0010000404177981 */ /* 0x000128000c1e9900 */ /*0820*/ LDG.E.CONSTANT R22, [R2.64+0x1000] ; /* 0x0010000402167981 */ /* 0x000328000c1e9900 */ /*0830*/ LDG.E.CONSTANT R25, [R12.64+0x1000] ; /* 0x001000040c197981 */ /* 0x000728000c1e9900 */ /*0840*/ LDG.E.CONSTANT R24, [R10.64+0x1000] ; /* 0x001000040a187981 */ /* 0x000b28000c1e9900 */ /*0850*/ LDG.E.CONSTANT R27, [R4.64+0x2000] ; /* 0x00200004041b7981 */ /* 0x000128000c1e9900 */ /*0860*/ LDG.E.CONSTANT R26, [R2.64+0x2000] ; /* 0x00200004021a7981 */ /* 0x000328000c1e9900 */ /*0870*/ LDG.E.CONSTANT R29, [R12.64+0x2000] ; /* 0x002000040c1d7981 */ /* 0x000728000c1e9900 */ /*0880*/ LDG.E.CONSTANT R28, [R10.64+0x2000] ; /* 0x002000040a1c7981 */ /* 0x000b28000c1e9900 */ /*0890*/ LDG.E.CONSTANT R16, [R4.64+0x3000] ; /* 0x0030000404107981 */ /* 0x000128000c1e9900 */ /*08a0*/ LDG.E.CONSTANT R17, [R2.64+0x3000] ; /* 0x0030000402117981 */ /* 0x000328000c1e9900 */ /*08b0*/ LDG.E.CONSTANT R14, [R12.64+0x3000] ; /* 0x003000040c0e7981 */ /* 0x000728000c1e9900 */ /*08c0*/ LDG.E.CONSTANT R15, [R10.64+0x3000] ; /* 0x003000040a0f7981 */ /* 0x000b22000c1e9900 */ /*08d0*/ IADD3 R8, R8, 0x1000, RZ ; /* 0x0000100008087810 */ /* 0x000fc40007ffe0ff */ /*08e0*/ IADD3 R2, P4, R2, 0x4000, RZ ; /* 0x0000400002027810 */ /* 0x002fe40007f9e0ff */ /*08f0*/ ISETP.GE.AND P1, PT, R8, R9, PT ; /* 0x000000090800720c */ /* 0x000fe40003f26270 */ /*0900*/ IADD3 R12, P3, R12, 0x4000, RZ ; /* 0x000040000c0c7810 */ /* 0x008fe20007f7e0ff */ /*0910*/ IMAD.X R3, RZ, RZ, R3, P4 ; /* 0x000000ffff037224 */ /* 0x000fe200020e0603 */ /*0920*/ IADD3 R4, P5, R4, 0x4000, RZ ; /* 0x0000400004047810 */ /* 0x001fe40007fbe0ff */ /*0930*/ IADD3 R10, P2, R10, 0x4000, RZ ; /* 0x000040000a0a7810 */ /* 0x020fe20007f5e0ff */ /*0940*/ IMAD.X R13, RZ, RZ, R13, P3 ; /* 0x000000ffff0d7224 */ /* 0x000fe400018e060d */ /*0950*/ IMAD.X R5, RZ, RZ, R5, P5 ; /* 0x000000ffff057224 */ /* 0x000fc400028e0605 */ /*0960*/ IMAD.X R11, RZ, RZ, R11, P2 ; /* 0x000000ffff0b7224 */ /* 0x000fe200010e060b */ /*0970*/ IADD3 R18, R18, R19, R6 ; /* 0x0000001312127210 */ /* 0x004fc80007ffe006 */ /*0980*/ IADD3 R18, R20, R21, R18 ; /* 0x0000001514127210 */ /* 0x010fc80007ffe012 */ /*0990*/ IADD3 R18, R22, R23, R18 ; /* 0x0000001716127210 */ /* 0x000fc80007ffe012 */ /*09a0*/ IADD3 R18, R24, R25, R18 ; /* 0x0000001918127210 */ /* 0x000fc80007ffe012 */ /*09b0*/ IADD3 R18, R26, R27, R18 ; /* 0x0000001b1a127210 */ /* 0x000fc80007ffe012 */ /*09c0*/ IADD3 R18, R28, R29, R18 ; /* 0x0000001d1c127210 */ /* 0x000fc80007ffe012 */ /*09d0*/ IADD3 R16, R17, R16, R18 ; /* 0x0000001011107210 */ /* 0x000fc80007ffe012 */ /*09e0*/ IADD3 R6, R15, R14, R16 ; /* 0x0000000e0f067210 */ /* 0x000fe20007ffe010 */ /*09f0*/ @!P1 BRA 0x7d0 ; /* 0xfffffdd000009947 */ /* 0x000fea000383ffff */ /*0a00*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0a10*/ IMAD.IADD R9, R7, 0x1, -R8 ; /* 0x0000000107097824 */ /* 0x000fe200078e0a08 */ /*0a20*/ BSSY B2, 0xbc0 ; /* 0x0000019000027945 */ /* 0x000fe80003800000 */ /*0a30*/ ISETP.GT.AND P1, PT, R9, 0x400, PT ; /* 0x000004000900780c */ /* 0x000fda0003f24270 */ /*0a40*/ @!P1 BRA 0xbb0 ; /* 0x0000016000009947 */ /* 0x000fea0003800000 */ /*0a50*/ LDG.E.CONSTANT R9, [R4.64] ; /* 0x0000000404097981 */ /* 0x0000a8000c1e9900 */ /*0a60*/ LDG.E.CONSTANT R14, [R2.64] ; /* 0x00000004020e7981 */ /* 0x0002a8000c1e9900 */ /*0a70*/ LDG.E.CONSTANT R16, [R12.64] ; /* 0x000000040c107981 */ /* 0x000728000c1e9900 */ /*0a80*/ LDG.E.CONSTANT R15, [R10.64] ; /* 0x000000040a0f7981 */ /* 0x000b28000c1e9900 */ /*0a90*/ LDG.E.CONSTANT R18, [R4.64+0x1000] ; /* 0x0010000404127981 */ /* 0x000128000c1e9900 */ /*0aa0*/ LDG.E.CONSTANT R17, [R2.64+0x1000] ; /* 0x0010000402117981 */ /* 0x000328000c1e9900 */ /*0ab0*/ LDG.E.CONSTANT R20, [R12.64+0x1000] ; /* 0x001000040c147981 */ /* 0x000728000c1e9900 */ /*0ac0*/ LDG.E.CONSTANT R19, [R10.64+0x1000] ; /* 0x001000040a137981 */ /* 0x000b22000c1e9900 */ /*0ad0*/ IADD3 R4, P4, R4, 0x2000, RZ ; /* 0x0000200004047810 */ /* 0x001fc40007f9e0ff */ /*0ae0*/ IADD3 R2, P3, R2, 0x2000, RZ ; /* 0x0000200002027810 */ /* 0x002fe40007f7e0ff */ /*0af0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*0b00*/ IMAD.X R5, RZ, RZ, R5, P4 ; /* 0x000000ffff057224 */ /* 0x000fe200020e0605 */ /*0b10*/ IADD3 R12, P2, R12, 0x2000, RZ ; /* 0x000020000c0c7810 */ /* 0x008fe20007f5e0ff */ /*0b20*/ IMAD.X R3, RZ, RZ, R3, P3 ; /* 0x000000ffff037224 */ /* 0x000fe200018e0603 */ /*0b30*/ IADD3 R8, R8, 0x800, RZ ; /* 0x0000080008087810 */ /* 0x000fe40007ffe0ff */ /*0b40*/ IADD3 R10, P1, R10, 0x2000, RZ ; /* 0x000020000a0a7810 */ /* 0x020fe20007f3e0ff */ /*0b50*/ IMAD.X R13, RZ, RZ, R13, P2 ; /* 0x000000ffff0d7224 */ /* 0x000fc800010e060d */ /*0b60*/ IMAD.X R11, RZ, RZ, R11, P1 ; /* 0x000000ffff0b7224 */ /* 0x000fe200008e060b */ /*0b70*/ IADD3 R9, R14, R9, R6 ; /* 0x000000090e097210 */ /* 0x004fc80007ffe006 */ /*0b80*/ IADD3 R9, R15, R16, R9 ; /* 0x000000100f097210 */ /* 0x010fc80007ffe009 */ /*0b90*/ IADD3 R9, R17, R18, R9 ; /* 0x0000001211097210 */ /* 0x000fc80007ffe009 */ /*0ba0*/ IADD3 R6, R19, R20, R9 ; /* 0x0000001413067210 */ /* 0x000fe40007ffe009 */ /*0bb0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0bc0*/ ISETP.LT.OR P0, PT, R8, R7, P0 ; /* 0x000000070800720c */ /* 0x000fda0000701670 */ /*0bd0*/ @!P0 BRA 0xc40 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*0be0*/ LDG.E.CONSTANT R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea8000c1e9900 */ /*0bf0*/ LDG.E.CONSTANT R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e9900 */ /*0c00*/ LDG.E.CONSTANT R13, [R12.64] ; /* 0x000000040c0d7981 */ /* 0x000ee8000c1e9900 */ /*0c10*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee2000c1e9900 */ /*0c20*/ IADD3 R6, R2, R5, R6 ; /* 0x0000000502067210 */ /* 0x004fc80007ffe006 */ /*0c30*/ IADD3 R6, R10, R13, R6 ; /* 0x0000000d0a067210 */ /* 0x008fe40007ffe006 */ /*0c40*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0c50*/ S2R R8, SR_LANEID ; /* 0x0000000000087919 */ /* 0x000e280000000000 */ /*0c60*/ SHFL.DOWN PT, R2, R6, 0x1, 0x1f ; /* 0x08201f0006027f89 */ /* 0x000e6200000e0000 */ /*0c70*/ ISETP.GT.AND P0, PT, R8.reuse, 0x1e, PT ; /* 0x0000001e0800780c */ /* 0x041fe40003f04270 */ /*0c80*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f25270 */ /*0c90*/ SEL R3, R2, RZ, !P0 ; /* 0x000000ff02037207 */ /* 0x002fe40004000000 */ /*0ca0*/ ISETP.GT.AND P0, PT, R8, 0x1d, PT ; /* 0x0000001d0800780c */ /* 0x000fc60003f04270 */ /*0cb0*/ IMAD.IADD R3, R3, 0x1, R6 ; /* 0x0000000103037824 */ /* 0x000fca00078e0206 */ /*0cc0*/ SHFL.DOWN PT, R2, R3, 0x2, 0x1f ; /* 0x08401f0003027f89 */ /* 0x000e2200000e0000 */ /*0cd0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff079819 */ /* 0x000fc80000011400 */ /*0ce0*/ @!P1 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x0000000007079211 */ /* 0x000fc800078f28ff */ /*0cf0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fe40000011407 */ /*0d00*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x001fe40004000000 */ /*0d10*/ ISETP.GT.AND P0, PT, R8, 0x1b, PT ; /* 0x0000001b0800780c */ /* 0x000fc60003f04270 */ /*0d20*/ IMAD.IADD R2, R3, 0x1, R2 ; /* 0x0000000103027824 */ /* 0x000fca00078e0202 */ /*0d30*/ SHFL.DOWN PT, R4, R2, 0x4, 0x1f ; /* 0x08801f0002047f89 */ /* 0x000e2400000e0000 */ /*0d40*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*0d50*/ ISETP.GT.AND P0, PT, R8, 0x17, PT ; /* 0x000000170800780c */ /* 0x000fc60003f04270 */ /*0d60*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fe400078e0205 */ /*0d70*/ @!P1 IMAD.SHL.U32 R2, R7, 0x4, RZ ; /* 0x0000000407029824 */ /* 0x000fc600078e00ff */ /*0d80*/ SHFL.DOWN PT, R4, R5, 0x8, 0x1f ; /* 0x09001f0005047f89 */ /* 0x000e2400000e0000 */ /*0d90*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*0da0*/ ISETP.GT.AND P0, PT, R8, 0xf, PT ; /* 0x0000000f0800780c */ /* 0x000fc60003f04270 */ /*0db0*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*0dc0*/ SHFL.DOWN PT, R3, R4, 0x10, 0x1f ; /* 0x0a001f0004037f89 */ /* 0x000e2400000e0000 */ /*0dd0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*0de0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*0df0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x000fca00078e0203 */ /*0e00*/ @!P1 STS [R2+0x8], R3 ; /* 0x0000080302009388 */ /* 0x0001e80000000800 */ /*0e10*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0e20*/ @P0 BRA 0x35e0 ; /* 0x000027b000000947 */ /* 0x000fea0003800000 */ /*0e30*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x001fe80000000800 */ /*0e40*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*0e50*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000e620000000a00 */ /*0e60*/ IADD3 R0, R4, R0, R3 ; /* 0x0000000004007210 */ /* 0x001fc80007ffe003 */ /*0e70*/ IADD3 R0, R6, R0, R5 ; /* 0x0000000006007210 */ /* 0x000fc80007ffe005 */ /*0e80*/ IADD3 R8, R8, R0, R7 ; /* 0x0000000008087210 */ /* 0x002fe20007ffe007 */ /*0e90*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fc800078e00ff */ /*0ea0*/ IMAD.IADD R3, R8, 0x1, R9 ; /* 0x0000000108037824 */ /* 0x000fe200078e0209 */ /*0eb0*/ BRA 0x35e0 ; /* 0x0000272000007947 */ /* 0x000fea0003800000 */ /*0ec0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */ /* 0x001fe20003f06270 */ /*0ed0*/ BSSY B1, 0xf60 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*0ee0*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */ /* 0x000fe400078e00ff */ /*0ef0*/ IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff067224 */ /* 0x000fd200078e0000 */ /*0f00*/ @P0 BRA 0xf50 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0f10*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*0f20*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x000fca00078e0205 */ /*0f30*/ LDG.E.CONSTANT R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000162000c1e9900 */ /*0f40*/ IADD3 R6, R0, 0x100, RZ ; /* 0x0000010000067810 */ /* 0x000fc60007ffe0ff */ /*0f50*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0f60*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x170], PT ; /* 0x00005c0006007a0c */ /* 0x000fe20003f06270 */ /*0f70*/ BSSY B1, 0x1560 ; /* 0x000005e000017945 */ /* 0x000fd80003800000 */ /*0f80*/ @P0 BRA 0x1550 ; /* 0x000005c000000947 */ /* 0x000fea0003800000 */ /*0f90*/ LOP3.LUT R4, RZ, R6, RZ, 0x33, !PT ; /* 0x00000006ff047212 */ /* 0x001fe200078e33ff */ /*0fa0*/ BSSY B2, 0x10d0 ; /* 0x0000012000027945 */ /* 0x000fe60003800000 */ /*0fb0*/ IADD3 R5, R4, c[0x0][0x170], RZ ; /* 0x00005c0004057a10 */ /* 0x000fc80007ffe0ff */ /*0fc0*/ LEA.HI R4, R5.reuse, 0x1, RZ, 0x18 ; /* 0x0000000105047811 */ /* 0x040fe400078fc0ff */ /*0fd0*/ ISETP.GE.U32.AND P1, PT, R5, 0x300, PT ; /* 0x000003000500780c */ /* 0x000fe40003f26070 */ /*0fe0*/ LOP3.LUT P0, R7, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304077812 */ /* 0x000fda000780c0ff */ /*0ff0*/ @!P0 BRA 0x10c0 ; /* 0x000000c000008947 */ /* 0x000fea0003800000 */ /*1000*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*1010*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fc800078e0205 */ /*1020*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ; /* 0x000000ffff087224 */ /* 0x000fc800078e0004 */ /*1030*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fcc00078e0008 */ /*1040*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x0000a2000c1e9900 */ /*1050*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*1060*/ IADD3 R8, P2, R8, 0x400, RZ ; /* 0x0000040008087810 */ /* 0x000fe40007f5e0ff */ /*1070*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*1080*/ IADD3 R6, R6, 0x100, RZ ; /* 0x0000010006067810 */ /* 0x000fe20007ffe0ff */ /*1090*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe400010e0605 */ /*10a0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x024fd000078e0203 */ /*10b0*/ @P0 BRA 0x1030 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*10c0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*10d0*/ @!P1 BRA 0x1550 ; /* 0x0000047000009947 */ /* 0x000fea0003800000 */ /*10e0*/ IADD3 R4, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006047a10 */ /* 0x000fe20007ffe1ff */ /*10f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*1100*/ BSSY B2, 0x1360 ; /* 0x0000025000027945 */ /* 0x000fe20003800000 */ /*1110*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*1120*/ ISETP.GT.AND P1, PT, R4, 0xc00, PT ; /* 0x00000c000400780c */ /* 0x000fe20003f24270 */ /*1130*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fd800078e0205 */ /*1140*/ @!P1 BRA 0x1350 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*1150*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*1160*/ IADD3 R23, R2, -0xc00, RZ ; /* 0xfffff40002177810 */ /* 0x000fe40007ffe0ff */ /*1170*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e9900 */ /*1180*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*1190*/ LDG.E.CONSTANT R10, [R4.64+0x800] ; /* 0x00080004040a7981 */ /* 0x0000e8000c1e9900 */ /*11a0*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x0000e8000c1e9900 */ /*11b0*/ LDG.E.CONSTANT R12, [R4.64+0x1000] ; /* 0x00100004040c7981 */ /* 0x000128000c1e9900 */ /*11c0*/ LDG.E.CONSTANT R11, [R4.64+0x1400] ; /* 0x00140004040b7981 */ /* 0x000128000c1e9900 */ /*11d0*/ LDG.E.CONSTANT R14, [R4.64+0x1800] ; /* 0x00180004040e7981 */ /* 0x000128000c1e9900 */ /*11e0*/ LDG.E.CONSTANT R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */ /* 0x000128000c1e9900 */ /*11f0*/ LDG.E.CONSTANT R16, [R4.64+0x2000] ; /* 0x0020000404107981 */ /* 0x000128000c1e9900 */ /*1200*/ LDG.E.CONSTANT R15, [R4.64+0x2400] ; /* 0x00240004040f7981 */ /* 0x000128000c1e9900 */ /*1210*/ LDG.E.CONSTANT R18, [R4.64+0x2800] ; /* 0x0028000404127981 */ /* 0x000128000c1e9900 */ /*1220*/ LDG.E.CONSTANT R17, [R4.64+0x2c00] ; /* 0x002c000404117981 */ /* 0x000128000c1e9900 */ /*1230*/ LDG.E.CONSTANT R20, [R4.64+0x3000] ; /* 0x0030000404147981 */ /* 0x000128000c1e9900 */ /*1240*/ LDG.E.CONSTANT R19, [R4.64+0x3400] ; /* 0x0034000404137981 */ /* 0x000128000c1e9900 */ /*1250*/ LDG.E.CONSTANT R22, [R4.64+0x3800] ; /* 0x0038000404167981 */ /* 0x000128000c1e9900 */ /*1260*/ LDG.E.CONSTANT R21, [R4.64+0x3c00] ; /* 0x003c000404157981 */ /* 0x000122000c1e9900 */ /*1270*/ IADD3 R6, R6, 0x1000, RZ ; /* 0x0000100006067810 */ /* 0x000fc80007ffe0ff */ /*1280*/ ISETP.GE.AND P1, PT, R6, R23, PT ; /* 0x000000170600720c */ /* 0x000fe40003f26270 */ /*1290*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*12a0*/ IADD3 R8, P2, R4, 0x4000, RZ ; /* 0x0000400004087810 */ /* 0x000fca0007f5e0ff */ /*12b0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe200010e0605 */ /*12c0*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*12d0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fc600078e0008 */ /*12e0*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*12f0*/ IADD3 R7, R13, R14, R7 ; /* 0x0000000e0d077210 */ /* 0x000fc80007ffe007 */ /*1300*/ IADD3 R7, R15, R16, R7 ; /* 0x000000100f077210 */ /* 0x000fc80007ffe007 */ /*1310*/ IADD3 R7, R17, R18, R7 ; /* 0x0000001211077210 */ /* 0x000fc80007ffe007 */ /*1320*/ IADD3 R7, R19, R20, R7 ; /* 0x0000001413077210 */ /* 0x000fc80007ffe007 */ /*1330*/ IADD3 R3, R21, R22, R7 ; /* 0x0000001615037210 */ /* 0x000fe20007ffe007 */ /*1340*/ @!P1 BRA 0x1170 ; /* 0xfffffe2000009947 */ /* 0x000fea000383ffff */ /*1350*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1360*/ IADD3 R7, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006077a10 */ /* 0x000fe20007ffe1ff */ /*1370*/ BSSY B2, 0x14d0 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*1380*/ ISETP.GT.AND P1, PT, R7, 0x400, PT ; /* 0x000004000700780c */ /* 0x000fda0003f24270 */ /*1390*/ @!P1 BRA 0x14c0 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*13a0*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e9900 */ /*13b0*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*13c0*/ LDG.E.CONSTANT R10, [R4.64+0x800] ; /* 0x00080004040a7981 */ /* 0x0000e8000c1e9900 */ /*13d0*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x0000e8000c1e9900 */ /*13e0*/ LDG.E.CONSTANT R12, [R4.64+0x1000] ; /* 0x00100004040c7981 */ /* 0x000128000c1e9900 */ /*13f0*/ LDG.E.CONSTANT R11, [R4.64+0x1400] ; /* 0x00140004040b7981 */ /* 0x000128000c1e9900 */ /*1400*/ LDG.E.CONSTANT R14, [R4.64+0x1800] ; /* 0x00180004040e7981 */ /* 0x000128000c1e9900 */ /*1410*/ LDG.E.CONSTANT R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */ /* 0x000122000c1e9900 */ /*1420*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*1430*/ IADD3 R6, R6, 0x800, RZ ; /* 0x0000080006067810 */ /* 0x000fe40007ffe0ff */ /*1440*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*1450*/ IADD3 R8, P1, R4, 0x2000, RZ ; /* 0x0000200004087810 */ /* 0x000fca0007f3e0ff */ /*1460*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x001fe200078e0008 */ /*1470*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*1480*/ IMAD.X R9, RZ, RZ, R5, P1 ; /* 0x000000ffff097224 */ /* 0x000fc800008e0605 */ /*1490*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe200078e0009 */ /*14a0*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*14b0*/ IADD3 R3, R13, R14, R7 ; /* 0x0000000e0d037210 */ /* 0x000fe40007ffe007 */ /*14c0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*14d0*/ ISETP.LT.OR P0, PT, R6, c[0x0][0x170], P0 ; /* 0x00005c0006007a0c */ /* 0x000fda0000701670 */ /*14e0*/ @!P0 BRA 0x1550 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*14f0*/ LDG.E.CONSTANT R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea8000c1e9900 */ /*1500*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*1510*/ LDG.E.CONSTANT R8, [R4.64+0x800] ; /* 0x0008000404087981 */ /* 0x000ee8000c1e9900 */ /*1520*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x000ee2000c1e9900 */ /*1530*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x024fc80007ffe003 */ /*1540*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fe40007ffe003 */ /*1550*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1560*/ ISETP.GT.AND P0, PT, R2, 0xff, PT ; /* 0x000000ff0200780c */ /* 0x000fda0003f04270 */ /*1570*/ @P0 BRA 0x1970 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*1580*/ SHF.R.S32.HI R5, RZ, 0x1f, R0 ; /* 0x0000001fff057819 */ /* 0x001fe20000011400 */ /*1590*/ S2R R11, SR_LANEID ; /* 0x00000000000b7919 */ /* 0x000e260000000000 */ /*15a0*/ LEA.HI R8, R5, R0, RZ, 0x5 ; /* 0x0000000005087211 */ /* 0x000fc800078f28ff */ /*15b0*/ LOP3.LUT R4, R8, 0xffffffe0, RZ, 0xc0, !PT ; /* 0xffffffe008047812 */ /* 0x000fe400078ec0ff */ /*15c0*/ SHF.R.S32.HI R8, RZ, 0x5, R8 ; /* 0x00000005ff087819 */ /* 0x000fe40000011408 */ /*15d0*/ IADD3 R5, R4, 0x20, RZ ; /* 0x0000002004057810 */ /* 0x000fe40007ffe0ff */ /*15e0*/ LOP3.LUT R4, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff047212 */ /* 0x000fe400078e33ff */ /*15f0*/ ISETP.GT.AND P0, PT, R5, c[0x0][0x170], PT ; /* 0x00005c0005007a0c */ /* 0x000fe40003f04270 */ /*1600*/ IADD3 R4, R4, c[0x0][0x170], RZ ; /* 0x00005c0004047a10 */ /* 0x000fc80007ffe0ff */ /*1610*/ SEL R4, R4, 0x1f, P0 ; /* 0x0000001f04047807 */ /* 0x000fe40000000000 */ /*1620*/ IADD3 R7, R11, 0x2, RZ ; /* 0x000000020b077810 */ /* 0x001fc60007ffe0ff */ /*1630*/ SHFL.DOWN PT, R5, R3, 0x1, R4 ; /* 0x0820000003057989 */ /* 0x020e2200000e0004 */ /*1640*/ ISETP.GE.AND P0, PT, R11.reuse, R4, PT ; /* 0x000000040b00720c */ /* 0x040fe40003f06270 */ /*1650*/ IADD3 R9, R11.reuse, 0x4, RZ ; /* 0x000000040b097810 */ /* 0x040fe40007ffe0ff */ /*1660*/ ISETP.NE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fda0003f25270 */ /*1670*/ @!P1 IMAD.SHL.U32 R8, R8, 0x4, RZ ; /* 0x0000000408089824 */ /* 0x000fe200078e00ff */ /*1680*/ SEL R6, R5, RZ, !P0 ; /* 0x000000ff05067207 */ /* 0x001fe40004000000 */ /*1690*/ ISETP.GT.AND P0, PT, R7, R4, PT ; /* 0x000000040700720c */ /* 0x000fc60003f04270 */ /*16a0*/ IMAD.IADD R5, R6, 0x1, R3 ; /* 0x0000000106057824 */ /* 0x000fca00078e0203 */ /*16b0*/ SHFL.DOWN PT, R6, R5, 0x2, R4 ; /* 0x0840000005067989 */ /* 0x000e2400000e0004 */ /*16c0*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*16d0*/ ISETP.GT.AND P0, PT, R9, R4, PT ; /* 0x000000040900720c */ /* 0x000fc60003f04270 */ /*16e0*/ IMAD.IADD R7, R5, 0x1, R6 ; /* 0x0000000105077824 */ /* 0x000fe200078e0206 */ /*16f0*/ IADD3 R5, R11, 0x8, RZ ; /* 0x000000080b057810 */ /* 0x000fc80007ffe0ff */ /*1700*/ SHFL.DOWN PT, R6, R7, 0x4, R4 ; /* 0x0880000007067989 */ /* 0x000e2400000e0004 */ /*1710*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*1720*/ ISETP.GT.AND P0, PT, R5, R4, PT ; /* 0x000000040500720c */ /* 0x000fc60003f04270 */ /*1730*/ IMAD.IADD R3, R7, 0x1, R6 ; /* 0x0000000107037824 */ /* 0x000fe200078e0206 */ /*1740*/ IADD3 R7, R11, 0x10, RZ ; /* 0x000000100b077810 */ /* 0x000fc80007ffe0ff */ /*1750*/ SHFL.DOWN PT, R6, R3, 0x8, R4 ; /* 0x0900000003067989 */ /* 0x000e2400000e0004 */ /*1760*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*1770*/ ISETP.GT.AND P0, PT, R7, R4, PT ; /* 0x000000040700720c */ /* 0x000fc60003f04270 */ /*1780*/ IMAD.IADD R5, R3, 0x1, R6 ; /* 0x0000000103057824 */ /* 0x000fca00078e0206 */ /*1790*/ SHFL.DOWN PT, R6, R5, 0x10, R4 ; /* 0x0a00000005067989 */ /* 0x000e2400000e0004 */ /*17a0*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*17b0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*17c0*/ IMAD.IADD R3, R5, 0x1, R6 ; /* 0x0000000105037824 */ /* 0x000fca00078e0206 */ /*17d0*/ @!P1 STS [R8+0x8], R3 ; /* 0x0000080308009388 */ /* 0x0001e80000000800 */ /*17e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*17f0*/ @P0 BRA 0x35e0 ; /* 0x00001de000000947 */ /* 0x000fea0003800000 */ /*1800*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x001e220000000c00 */ /*1810*/ ISETP.GT.AND P1, PT, R2, 0x40, PT ; /* 0x000000400200780c */ /* 0x000fc40003f24270 */ /*1820*/ ISETP.GT.AND P0, PT, R2.reuse, 0x20, PT ; /* 0x000000200200780c */ /* 0x040fe20003f04270 */ /*1830*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x000e620000000800 */ /*1840*/ ISETP.GT.AND P2, PT, R2, 0xa0, PT ; /* 0x000000a00200780c */ /* 0x000fc60003f44270 */ /*1850*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000ea20000000a00 */ /*1860*/ SEL R4, R4, RZ, P1 ; /* 0x000000ff04047207 */ /* 0x001fe40000800000 */ /*1870*/ ISETP.GT.AND P1, PT, R2, 0x80, PT ; /* 0x000000800200780c */ /* 0x000fe40003f24270 */ /*1880*/ SEL R0, R0, RZ, P0 ; /* 0x000000ff00007207 */ /* 0x002fe40000000000 */ /*1890*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */ /* 0x000fe40000800000 */ /*18a0*/ ISETP.GE.AND P1, PT, R2.reuse, 0xe1, PT ; /* 0x000000e10200780c */ /* 0x040fe40003f26270 */ /*18b0*/ ISETP.GT.AND P0, PT, R2, 0x60, PT ; /* 0x000000600200780c */ /* 0x000fc40003f04270 */ /*18c0*/ IADD3 R0, R4, R3, R0 ; /* 0x0000000304007210 */ /* 0x000fe40007ffe000 */ /*18d0*/ SEL R5, R5, RZ, P0 ; /* 0x000000ff05057207 */ /* 0x000fe40000000000 */ /*18e0*/ ISETP.GT.AND P0, PT, R2, 0xc0, PT ; /* 0x000000c00200780c */ /* 0x000fe40003f04270 */ /*18f0*/ SEL R2, R7, RZ, P2 ; /* 0x000000ff07027207 */ /* 0x000fe40001000000 */ /*1900*/ IADD3 R5, R6, R0, R5 ; /* 0x0000000006057210 */ /* 0x000fe20007ffe005 */ /*1910*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*1920*/ SEL R8, R8, RZ, P0 ; /* 0x000000ff08087207 */ /* 0x004fc80000000000 */ /*1930*/ IADD3 R3, R8, R5, R2 ; /* 0x0000000508037210 */ /* 0x000fe20007ffe002 */ /*1940*/ @!P1 BRA 0x35e0 ; /* 0x00001c9000009947 */ /* 0x000fea0003800000 */ /*1950*/ IMAD.IADD R3, R3, 0x1, R9 ; /* 0x0000000103037824 */ /* 0x000fe200078e0209 */ /*1960*/ BRA 0x35e0 ; /* 0x00001c7000007947 */ /* 0x000fea0003800000 */ /*1970*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e680000000000 */ /*1980*/ SHFL.DOWN PT, R2, R3, 0x1, 0x1f ; /* 0x08201f0003027f89 */ /* 0x020ea200000e0000 */ /*1990*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x042fe40003f04270 */ /*19a0*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*19b0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x004fc40004000000 */ /*19c0*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*19d0*/ IMAD.IADD R2, R2, 0x1, R3 ; /* 0x0000000102027824 */ /* 0x000fca00078e0203 */ /*19e0*/ SHFL.DOWN PT, R4, R2, 0x2, 0x1f ; /* 0x08401f0002047f89 */ /* 0x001e2200000e0000 */ /*19f0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff079819 */ /* 0x000fc80000011400 */ /*1a00*/ @!P1 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x0000000007079211 */ /* 0x000fc800078f28ff */ /*1a10*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fe40000011407 */ /*1a20*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*1a30*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*1a40*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fca00078e0205 */ /*1a50*/ SHFL.DOWN PT, R4, R5, 0x4, 0x1f ; /* 0x08801f0005047f89 */ /* 0x000e2400000e0000 */ /*1a60*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*1a70*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*1a80*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*1a90*/ SHFL.DOWN PT, R3, R4, 0x8, 0x1f ; /* 0x09001f0004037f89 */ /* 0x000e2400000e0000 */ /*1aa0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1ab0*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*1ac0*/ IMAD.IADD R2, R4, 0x1, R3 ; /* 0x0000000104027824 */ /* 0x000fe400078e0203 */ /*1ad0*/ @!P1 IMAD.SHL.U32 R4, R7, 0x4, RZ ; /* 0x0000000407049824 */ /* 0x000fc600078e00ff */ /*1ae0*/ SHFL.DOWN PT, R3, R2, 0x10, 0x1f ; /* 0x0a001f0002037f89 */ /* 0x000e2400000e0000 */ /*1af0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1b00*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*1b10*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*1b20*/ @!P1 STS [R4+0x8], R3 ; /* 0x0000080304009388 */ /* 0x0001e80000000800 */ /*1b30*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1b40*/ @P0 BRA 0x35e0 ; /* 0x00001a9000000947 */ /* 0x000fea0003800000 */ /*1b50*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x001fe80000000800 */ /*1b60*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*1b70*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000e620000000a00 */ /*1b80*/ IADD3 R0, R4, R0, R3 ; /* 0x0000000004007210 */ /* 0x001fc80007ffe003 */ /*1b90*/ IADD3 R0, R6, R0, R5 ; /* 0x0000000006007210 */ /* 0x000fc80007ffe005 */ /*1ba0*/ IADD3 R8, R8, R0, R7 ; /* 0x0000000008087210 */ /* 0x002fe20007ffe007 */ /*1bb0*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fc800078e00ff */ /*1bc0*/ IMAD.IADD R3, R8, 0x1, R9 ; /* 0x0000000108037824 */ /* 0x000fe200078e0209 */ /*1bd0*/ BRA 0x35e0 ; /* 0x00001a0000007947 */ /* 0x000fea0003800000 */ /*1be0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff027624 */ /* 0x000fca00078e00ff */ /*1bf0*/ ISETP.GE.AND P0, PT, R2, 0x1000, PT ; /* 0x000010000200780c */ /* 0x000fda0003f06270 */ /*1c00*/ @!P0 BRA 0x28e0 ; /* 0x00000cd000008947 */ /* 0x000fea0003800000 */ /*1c10*/ IMAD.SHL.U32 R16, R0, 0x4, RZ ; /* 0x0000000400107824 */ /* 0x001fe400078e00ff */ /*1c20*/ IMAD.MOV.U32 R17, RZ, RZ, 0x4 ; /* 0x00000004ff117424 */ /* 0x000fc800078e00ff */ /*1c30*/ IMAD.WIDE.U32 R16, R16, R17, c[0x0][0x160] ; /* 0x0000580010107625 */ /* 0x000fca00078e0011 */ /*1c40*/ LDG.E.128.CONSTANT R20, [R16.64] ; /* 0x0000000410147981 */ /* 0x000ea8000c1e9d00 */ /*1c50*/ LDG.E.128.CONSTANT R12, [R16.64+0x1000] ; /* 0x00100004100c7981 */ /* 0x000ee8000c1e9d00 */ /*1c60*/ LDG.E.128.CONSTANT R8, [R16.64+0x2000] ; /* 0x0020000410087981 */ /* 0x000f28000c1e9d00 */ /*1c70*/ LDG.E.128.CONSTANT R4, [R16.64+0x3000] ; /* 0x0030000410047981 */ /* 0x000f62000c1e9d00 */ /*1c80*/ ISETP.GE.AND P0, PT, R2, 0x2000, PT ; /* 0x000020000200780c */ /* 0x000fc40003f06270 */ /*1c90*/ IADD3 R21, R22, R21, R20 ; /* 0x0000001516157210 */ /* 0x004fc80007ffe014 */ /*1ca0*/ IADD3 R21, R12, R23, R21 ; /* 0x000000170c157210 */ /* 0x008fc80007ffe015 */ /*1cb0*/ IADD3 R21, R14, R13, R21 ; /* 0x0000000d0e157210 */ /* 0x000fc80007ffe015 */ /*1cc0*/ IADD3 R21, R8, R15, R21 ; /* 0x0000000f08157210 */ /* 0x010fc80007ffe015 */ /*1cd0*/ IADD3 R21, R10, R9, R21 ; /* 0x000000090a157210 */ /* 0x000fc80007ffe015 */ /*1ce0*/ IADD3 R21, R4, R11, R21 ; /* 0x0000000b04157210 */ /* 0x020fc80007ffe015 */ /*1cf0*/ IADD3 R3, R6, R5, R21 ; /* 0x0000000506037210 */ /* 0x000fe20007ffe015 */ /*1d00*/ IMAD.MOV.U32 R21, RZ, RZ, 0x1000 ; /* 0x00001000ff157424 */ /* 0x000fc800078e00ff */ /*1d10*/ IMAD.IADD R3, R7, 0x1, R3 ; /* 0x0000000107037824 */ /* 0x000fe200078e0203 */ /*1d20*/ @!P0 BRA 0x1ed0 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*1d30*/ IADD3 R20, R2, -0x1000, RZ ; /* 0xfffff00002147810 */ /* 0x000fe20007ffe0ff */ /*1d40*/ IMAD.MOV.U32 R22, RZ, RZ, R16 ; /* 0x000000ffff167224 */ /* 0x000fe400078e0010 */ /*1d50*/ IMAD.MOV.U32 R23, RZ, RZ, R17 ; /* 0x000000ffff177224 */ /* 0x000fe400078e0011 */ /*1d60*/ IMAD.MOV.U32 R21, RZ, RZ, 0x1000 ; /* 0x00001000ff157424 */ /* 0x000fe400078e00ff */ /*1d70*/ IMAD.MOV.U32 R2, RZ, RZ, R20 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0014 */ /*1d80*/ LDG.E.128.CONSTANT R4, [R22.64+0x4000] ; /* 0x0040000416047981 */ /* 0x000ea8000c1e9d00 */ /*1d90*/ LDG.E.128.CONSTANT R8, [R22.64+0x5000] ; /* 0x0050000416087981 */ /* 0x0000e8000c1e9d00 */ /*1da0*/ LDG.E.128.CONSTANT R12, [R22.64+0x6000] ; /* 0x00600004160c7981 */ /* 0x000128000c1e9d00 */ /*1db0*/ LDG.E.128.CONSTANT R16, [R22.64+0x7000] ; /* 0x0070000416107981 */ /* 0x000162000c1e9d00 */ /*1dc0*/ ISETP.GE.AND P0, PT, R2, 0x1000, PT ; /* 0x000010000200780c */ /* 0x000fc40003f06270 */ /*1dd0*/ IADD3 R3, R5, R4, R3 ; /* 0x0000000405037210 */ /* 0x004fe40007ffe003 */ /*1de0*/ IADD3 R4, P1, R22, 0x4000, RZ ; /* 0x0000400016047810 */ /* 0x000fe40007f3e0ff */ /*1df0*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x000fc60007ffe003 */ /*1e00*/ IMAD.X R23, RZ, RZ, R23, P1 ; /* 0x000000ffff177224 */ /* 0x001fe200008e0617 */ /*1e10*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fc80007ffe003 */ /*1e20*/ IADD3 R3, R11, R10, R3 ; /* 0x0000000a0b037210 */ /* 0x000fc80007ffe003 */ /*1e30*/ IADD3 R3, R13, R12, R3 ; /* 0x0000000c0d037210 */ /* 0x010fc80007ffe003 */ /*1e40*/ IADD3 R3, R15, R14, R3 ; /* 0x0000000e0f037210 */ /* 0x000fc80007ffe003 */ /*1e50*/ IADD3 R3, R17, R16, R3 ; /* 0x0000001011037210 */ /* 0x020fc80007ffe003 */ /*1e60*/ IADD3 R3, R19, R18, R3 ; /* 0x0000001213037210 */ /* 0x000fe20007ffe003 */ /*1e70*/ @!P0 BRA 0x2670 ; /* 0x000007f000008947 */ /* 0x000fea0003800000 */ /*1e80*/ IADD3 R21, R21, 0x1000, RZ ; /* 0x0000100015157810 */ /* 0x000fe20007ffe0ff */ /*1e90*/ IMAD.MOV.U32 R22, RZ, RZ, R4 ; /* 0x000000ffff167224 */ /* 0x000fe200078e0004 */ /*1ea0*/ IADD3 R2, R2, -0x1000, RZ ; /* 0xfffff00002027810 */ /* 0x000fe40007ffe0ff */ /*1eb0*/ ISETP.GT.AND P0, PT, R21, R20, PT ; /* 0x000000141500720c */ /* 0x000fda0003f04270 */ /*1ec0*/ @!P0 BRA 0x1d80 ; /* 0xfffffeb000008947 */ /* 0x000fea000383ffff */ /*1ed0*/ ISETP.GE.AND P0, PT, R21, c[0x0][0x170], PT ; /* 0x00005c0015007a0c */ /* 0x000fda0003f06270 */ /*1ee0*/ @P0 BRA 0x2670 ; /* 0x0000078000000947 */ /* 0x000fea0003800000 */ /*1ef0*/ IADD3 R9, -R21, c[0x0][0x170], RZ ; /* 0x00005c0015097a10 */ /* 0x000fe20007ffe1ff */ /*1f00*/ BSSY B1, 0x2670 ; /* 0x0000076000017945 */ /* 0x000fe60003800000 */ /*1f10*/ ISETP.GE.AND P0, PT, R0, R9, PT ; /* 0x000000090000720c */ /* 0x000fda0003f06270 */ /*1f20*/ @P0 BRA 0x2660 ; /* 0x0000073000000947 */ /* 0x000fea0003800000 */ /*1f30*/ LOP3.LUT R4, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff047212 */ /* 0x000fe200078e33ff */ /*1f40*/ BSSY B2, 0x20a0 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*1f50*/ IADD3 R4, -R21, c[0x0][0x170], R4 ; /* 0x00005c0015047a10 */ /* 0x000fc80007ffe104 */ /*1f60*/ LEA.HI R2, R4.reuse, 0x1, RZ, 0x18 ; /* 0x0000000104027811 */ /* 0x040fe400078fc0ff */ /*1f70*/ ISETP.GE.U32.AND P1, PT, R4, 0x300, PT ; /* 0x000003000400780c */ /* 0x000fe40003f26070 */ /*1f80*/ LOP3.LUT P0, R6, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302067812 */ /* 0x000fe2000780c0ff */ /*1f90*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */ /* 0x000fd800078e0000 */ /*1fa0*/ @!P0 BRA 0x2090 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*1fb0*/ IMAD.IADD R4, R0, 0x1, R21 ; /* 0x0000000100047824 */ /* 0x000fe400078e0215 */ /*1fc0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe400078e00ff */ /*1fd0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0000 */ /*1fe0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e0205 */ /*1ff0*/ IMAD.MOV.U32 R7, RZ, RZ, R4 ; /* 0x000000ffff077224 */ /* 0x000fc800078e0004 */ /*2000*/ IMAD.MOV.U32 R4, RZ, RZ, R7 ; /* 0x000000ffff047224 */ /* 0x000fcc00078e0007 */ /*2010*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x0000a2000c1e9900 */ /*2020*/ IADD3 R6, R6, -0x1, RZ ; /* 0xffffffff06067810 */ /* 0x000fe40007ffe0ff */ /*2030*/ IADD3 R7, P2, R7, 0x400, RZ ; /* 0x0000040007077810 */ /* 0x000fe40007f5e0ff */ /*2040*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f05270 */ /*2050*/ IADD3 R2, R2, 0x100, RZ ; /* 0x0000010002027810 */ /* 0x000fe20007ffe0ff */ /*2060*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe400010e0605 */ /*2070*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x004fd000078e0203 */ /*2080*/ @P0 BRA 0x2000 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*2090*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*20a0*/ @!P1 BRA 0x2660 ; /* 0x000005b000009947 */ /* 0x000fea0003800000 */ /*20b0*/ IMAD.IADD R4, R9, 0x1, -R2 ; /* 0x0000000109047824 */ /* 0x000fe200078e0a02 */ /*20c0*/ BSSY B2, 0x2410 ; /* 0x0000034000027945 */ /* 0x000fe20003800000 */ /*20d0*/ IMAD.IADD R21, R2, 0x1, R21 ; /* 0x0000000102157824 */ /* 0x000fe200078e0215 */ /*20e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f070 */ /*20f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*2100*/ ISETP.GT.AND P1, PT, R4, 0xc00, PT ; /* 0x00000c000400780c */ /* 0x000fe40003f24270 */ /*2110*/ IADD3 R12, R21.reuse, 0x300, RZ ; /* 0x00000300150c7810 */ /* 0x040fe20007ffe0ff */ /*2120*/ IMAD.WIDE R6, R21.reuse, R5.reuse, c[0x0][0x160] ; /* 0x0000580015067625 */ /* 0x0c0fe200078e0205 */ /*2130*/ IADD3 R10, R21.reuse, 0x200, RZ ; /* 0x00000200150a7810 */ /* 0x040fe40007ffe0ff */ /*2140*/ IADD3 R4, R21, 0x100, RZ ; /* 0x0000010015047810 */ /* 0x000fe20007ffe0ff */ /*2150*/ IMAD.WIDE R12, R12, R5, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x000fc800078e0205 */ /*2160*/ IMAD.WIDE R10, R10, R5, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fc800078e0205 */ /*2170*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e0205 */ /*2180*/ IMAD.MOV.U32 R8, RZ, RZ, R12 ; /* 0x000000ffff087224 */ /* 0x000fe200078e000c */ /*2190*/ @!P1 BRA 0x2400 ; /* 0x0000026000009947 */ /* 0x000fea0003800000 */ /*21a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*21b0*/ IADD3 R15, R9, -0xc00, RZ ; /* 0xfffff400090f7810 */ /* 0x000fe40007ffe0ff */ /*21c0*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0008 */ /*21d0*/ LDG.E.CONSTANT R18, [R6.64] ; /* 0x0000000406127981 */ /* 0x0000a8000c1e9900 */ /*21e0*/ LDG.E.CONSTANT R20, [R4.64] ; /* 0x0000000404147981 */ /* 0x0002a8000c1e9900 */ /*21f0*/ LDG.E.CONSTANT R21, [R10.64] ; /* 0x000000040a157981 */ /* 0x000728000c1e9900 */ /*2200*/ LDG.E.CONSTANT R8, [R12.64] ; /* 0x000000040c087981 */ /* 0x000f28000c1e9900 */ /*2210*/ LDG.E.CONSTANT R23, [R6.64+0x1000] ; /* 0x0010000406177981 */ /* 0x000168000c1e9900 */ /*2220*/ LDG.E.CONSTANT R22, [R4.64+0x1000] ; /* 0x0010000404167981 */ /* 0x000368000c1e9900 */ /*2230*/ LDG.E.CONSTANT R25, [R10.64+0x1000] ; /* 0x001000040a197981 */ /* 0x000768000c1e9900 */ /*2240*/ LDG.E.CONSTANT R24, [R12.64+0x1000] ; /* 0x001000040c187981 */ /* 0x000f68000c1e9900 */ /*2250*/ LDG.E.CONSTANT R27, [R6.64+0x2000] ; /* 0x00200004061b7981 */ /* 0x000168000c1e9900 */ /*2260*/ LDG.E.CONSTANT R26, [R4.64+0x2000] ; /* 0x00200004041a7981 */ /* 0x000368000c1e9900 */ /*2270*/ LDG.E.CONSTANT R29, [R10.64+0x2000] ; /* 0x002000040a1d7981 */ /* 0x000768000c1e9900 */ /*2280*/ LDG.E.CONSTANT R28, [R12.64+0x2000] ; /* 0x002000040c1c7981 */ /* 0x000f68000c1e9900 */ /*2290*/ LDG.E.CONSTANT R16, [R6.64+0x3000] ; /* 0x0030000406107981 */ /* 0x000168000c1e9900 */ /*22a0*/ LDG.E.CONSTANT R19, [R4.64+0x3000] ; /* 0x0030000404137981 */ /* 0x000368000c1e9900 */ /*22b0*/ LDG.E.CONSTANT R14, [R10.64+0x3000] ; /* 0x003000040a0e7981 */ /* 0x000768000c1e9900 */ /*22c0*/ LDG.E.CONSTANT R17, [R12.64+0x3000] ; /* 0x003000040c117981 */ /* 0x000562000c1e9900 */ /*22d0*/ IADD3 R2, R2, 0x1000, RZ ; /* 0x0000100002027810 */ /* 0x000fc40007ffe0ff */ /*22e0*/ IADD3 R4, P4, R4, 0x4000, RZ ; /* 0x0000400004047810 */ /* 0x002fe40007f9e0ff */ /*22f0*/ ISETP.GE.AND P1, PT, R2, R15, PT ; /* 0x0000000f0200720c */ /* 0x000fe40003f26270 */ /*2300*/ IADD3 R10, P3, R10, 0x4000, RZ ; /* 0x000040000a0a7810 */ /* 0x008fe20007f7e0ff */ /*2310*/ IMAD.X R5, RZ, RZ, R5, P4 ; /* 0x000000ffff057224 */ /* 0x000fe200020e0605 */ /*2320*/ IADD3 R6, P5, R6, 0x4000, RZ ; /* 0x0000400006067810 */ /* 0x001fc60007fbe0ff */ /*2330*/ IMAD.X R11, RZ, RZ, R11, P3 ; /* 0x000000ffff0b7224 */ /* 0x000fe400018e060b */ /*2340*/ IMAD.X R7, RZ, RZ, R7, P5 ; /* 0x000000ffff077224 */ /* 0x000fe200028e0607 */ /*2350*/ IADD3 R18, R20, R18, R3 ; /* 0x0000001214127210 */ /* 0x004fc80007ffe003 */ /*2360*/ IADD3 R8, R8, R21, R18 ; /* 0x0000001508087210 */ /* 0x010fc80007ffe012 */ /*2370*/ IADD3 R8, R22, R23, R8 ; /* 0x0000001716087210 */ /* 0x020fc80007ffe008 */ /*2380*/ IADD3 R8, R24, R25, R8 ; /* 0x0000001918087210 */ /* 0x000fc80007ffe008 */ /*2390*/ IADD3 R8, R26, R27, R8 ; /* 0x0000001b1a087210 */ /* 0x000fc80007ffe008 */ /*23a0*/ IADD3 R28, R28, R29, R8 ; /* 0x0000001d1c1c7210 */ /* 0x000fe40007ffe008 */ /*23b0*/ IADD3 R8, P2, R12, 0x4000, RZ ; /* 0x000040000c087810 */ /* 0x000fca0007f5e0ff */ /*23c0*/ IMAD.X R13, RZ, RZ, R13, P2 ; /* 0x000000ffff0d7224 */ /* 0x000fe200010e060d */ /*23d0*/ IADD3 R16, R19, R16, R28 ; /* 0x0000001013107210 */ /* 0x000fc80007ffe01c */ /*23e0*/ IADD3 R3, R17, R14, R16 ; /* 0x0000000e11037210 */ /* 0x000fe20007ffe010 */ /*23f0*/ @!P1 BRA 0x21c0 ; /* 0xfffffdc000009947 */ /* 0x000fea000383ffff */ /*2400*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2410*/ IMAD.IADD R12, R9, 0x1, -R2 ; /* 0x00000001090c7824 */ /* 0x000fe200078e0a02 */ /*2420*/ BSSY B2, 0x25d0 ; /* 0x000001a000027945 */ /* 0x000fe80003800000 */ /*2430*/ ISETP.GT.AND P1, PT, R12, 0x400, PT ; /* 0x000004000c00780c */ /* 0x000fda0003f24270 */ /*2440*/ @!P1 BRA 0x25c0 ; /* 0x0000017000009947 */ /* 0x000fea0003800000 */ /*2450*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0008 */ /*2460*/ LDG.E.CONSTANT R14, [R6.64] ; /* 0x00000004060e7981 */ /* 0x0000a8000c1e9900 */ /*2470*/ LDG.E.CONSTANT R15, [R4.64] ; /* 0x00000004040f7981 */ /* 0x0002a8000c1e9900 */ /*2480*/ LDG.E.CONSTANT R17, [R10.64] ; /* 0x000000040a117981 */ /* 0x000728000c1e9900 */ /*2490*/ LDG.E.CONSTANT R16, [R12.64] ; /* 0x000000040c107981 */ /* 0x000b28000c1e9900 */ /*24a0*/ LDG.E.CONSTANT R19, [R6.64+0x1000] ; /* 0x0010000406137981 */ /* 0x000128000c1e9900 */ /*24b0*/ LDG.E.CONSTANT R18, [R4.64+0x1000] ; /* 0x0010000404127981 */ /* 0x000328000c1e9900 */ /*24c0*/ LDG.E.CONSTANT R21, [R10.64+0x1000] ; /* 0x001000040a157981 */ /* 0x000728000c1e9900 */ /*24d0*/ LDG.E.CONSTANT R20, [R12.64+0x1000] ; /* 0x001000040c147981 */ /* 0x000b22000c1e9900 */ /*24e0*/ IADD3 R8, P1, R8, 0x2000, RZ ; /* 0x0000200008087810 */ /* 0x000fc40007f3e0ff */ /*24f0*/ IADD3 R4, P3, R4, 0x2000, RZ ; /* 0x0000200004047810 */ /* 0x002fe40007f7e0ff */ /*2500*/ IADD3 R6, P4, R6, 0x2000, RZ ; /* 0x0000200006067810 */ /* 0x001fe40007f9e0ff */ /*2510*/ IADD3 R10, P2, R10, 0x2000, RZ ; /* 0x000020000a0a7810 */ /* 0x008fe20007f5e0ff */ /*2520*/ IMAD.X R5, RZ, RZ, R5, P3 ; /* 0x000000ffff057224 */ /* 0x000fe200018e0605 */ /*2530*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*2540*/ IMAD.X R13, RZ, RZ, R13, P1 ; /* 0x000000ffff0d7224 */ /* 0x020fe200008e060d */ /*2550*/ IADD3 R2, R2, 0x800, RZ ; /* 0x0000080002027810 */ /* 0x000fe20007ffe0ff */ /*2560*/ IMAD.X R11, RZ, RZ, R11, P2 ; /* 0x000000ffff0b7224 */ /* 0x000fe400010e060b */ /*2570*/ IMAD.X R7, RZ, RZ, R7, P4 ; /* 0x000000ffff077224 */ /* 0x000fe200020e0607 */ /*2580*/ IADD3 R14, R15, R14, R3 ; /* 0x0000000e0f0e7210 */ /* 0x004fc80007ffe003 */ /*2590*/ IADD3 R14, R16, R17, R14 ; /* 0x00000011100e7210 */ /* 0x010fc80007ffe00e */ /*25a0*/ IADD3 R14, R18, R19, R14 ; /* 0x00000013120e7210 */ /* 0x000fc80007ffe00e */ /*25b0*/ IADD3 R3, R20, R21, R14 ; /* 0x0000001514037210 */ /* 0x000fe40007ffe00e */ /*25c0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*25d0*/ ISETP.LT.OR P0, PT, R2, R9, P0 ; /* 0x000000090200720c */ /* 0x000fe20000701670 */ /*25e0*/ IMAD.MOV.U32 R9, RZ, RZ, R13 ; /* 0x000000ffff097224 */ /* 0x000fd800078e000d */ /*25f0*/ @!P0 BRA 0x2660 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*2600*/ LDG.E.CONSTANT R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ea8000c1e9900 */ /*2610*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e9900 */ /*2620*/ LDG.E.CONSTANT R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee8000c1e9900 */ /*2630*/ LDG.E.CONSTANT R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee2000c1e9900 */ /*2640*/ IADD3 R3, R4, R6, R3 ; /* 0x0000000604037210 */ /* 0x004fc80007ffe003 */ /*2650*/ IADD3 R3, R8, R10, R3 ; /* 0x0000000a08037210 */ /* 0x008fe40007ffe003 */ /*2660*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2670*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e280000000000 */ /*2680*/ SHFL.DOWN PT, R2, R3, 0x1, 0x1f ; /* 0x08201f0003027f89 */ /* 0x000e6200000e0000 */ /*2690*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x041fe40003f04270 */ /*26a0*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*26b0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x002fe40004000000 */ /*26c0*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*26d0*/ IMAD.IADD R2, R2, 0x1, R3 ; /* 0x0000000102027824 */ /* 0x000fca00078e0203 */ /*26e0*/ SHFL.DOWN PT, R4, R2, 0x2, 0x1f ; /* 0x08401f0002047f89 */ /* 0x000e2200000e0000 */ /*26f0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff079819 */ /* 0x000fc80000011400 */ /*2700*/ @!P1 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x0000000007079211 */ /* 0x000fc800078f28ff */ /*2710*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fe40000011407 */ /*2720*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*2730*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*2740*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fca00078e0205 */ /*2750*/ SHFL.DOWN PT, R4, R5, 0x4, 0x1f ; /* 0x08801f0005047f89 */ /* 0x000e2400000e0000 */ /*2760*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*2770*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*2780*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*2790*/ SHFL.DOWN PT, R3, R4, 0x8, 0x1f ; /* 0x09001f0004037f89 */ /* 0x000e2400000e0000 */ /*27a0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*27b0*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*27c0*/ IMAD.IADD R2, R4, 0x1, R3 ; /* 0x0000000104027824 */ /* 0x000fe400078e0203 */ /*27d0*/ @!P1 IMAD.SHL.U32 R4, R7, 0x4, RZ ; /* 0x0000000407049824 */ /* 0x000fc600078e00ff */ /*27e0*/ SHFL.DOWN PT, R3, R2, 0x10, 0x1f ; /* 0x0a001f0002037f89 */ /* 0x000e2400000e0000 */ /*27f0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*2800*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*2810*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*2820*/ @!P1 STS [R4+0x8], R3 ; /* 0x0000080304009388 */ /* 0x0001e80000000800 */ /*2830*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*2840*/ @P0 BRA 0x35e0 ; /* 0x00000d9000000947 */ /* 0x000fea0003800000 */ /*2850*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x001fe80000000800 */ /*2860*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*2870*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000e620000000a00 */ /*2880*/ IADD3 R0, R4, R0, R3 ; /* 0x0000000004007210 */ /* 0x001fc80007ffe003 */ /*2890*/ IADD3 R0, R6, R0, R5 ; /* 0x0000000006007210 */ /* 0x000fc80007ffe005 */ /*28a0*/ IADD3 R8, R8, R0, R7 ; /* 0x0000000008087210 */ /* 0x002fe20007ffe007 */ /*28b0*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fc800078e00ff */ /*28c0*/ IMAD.IADD R3, R8, 0x1, R9 ; /* 0x0000000108037824 */ /* 0x000fe200078e0209 */ /*28d0*/ BRA 0x35e0 ; /* 0x00000d0000007947 */ /* 0x000fea0003800000 */ /*28e0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */ /* 0x001fe20003f06270 */ /*28f0*/ BSSY B1, 0x2980 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*2900*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */ /* 0x000fe400078e00ff */ /*2910*/ IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff067224 */ /* 0x000fd200078e0000 */ /*2920*/ @P0 BRA 0x2970 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*2930*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*2940*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x000fca00078e0205 */ /*2950*/ LDG.E.CONSTANT R3, [R4.64] ; /* 0x0000000404037981 */ /* 0x000162000c1e9900 */ /*2960*/ IADD3 R6, R0, 0x100, RZ ; /* 0x0000010000067810 */ /* 0x000fc60007ffe0ff */ /*2970*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2980*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x170], PT ; /* 0x00005c0006007a0c */ /* 0x000fe20003f06270 */ /*2990*/ BSSY B1, 0x2f80 ; /* 0x000005e000017945 */ /* 0x000fd80003800000 */ /*29a0*/ @P0 BRA 0x2f70 ; /* 0x000005c000000947 */ /* 0x000fea0003800000 */ /*29b0*/ LOP3.LUT R4, RZ, R6, RZ, 0x33, !PT ; /* 0x00000006ff047212 */ /* 0x001fe200078e33ff */ /*29c0*/ BSSY B2, 0x2af0 ; /* 0x0000012000027945 */ /* 0x000fe60003800000 */ /*29d0*/ IADD3 R5, R4, c[0x0][0x170], RZ ; /* 0x00005c0004057a10 */ /* 0x000fc80007ffe0ff */ /*29e0*/ LEA.HI R4, R5.reuse, 0x1, RZ, 0x18 ; /* 0x0000000105047811 */ /* 0x040fe400078fc0ff */ /*29f0*/ ISETP.GE.U32.AND P1, PT, R5, 0x300, PT ; /* 0x000003000500780c */ /* 0x000fe40003f26070 */ /*2a00*/ LOP3.LUT P0, R7, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304077812 */ /* 0x000fda000780c0ff */ /*2a10*/ @!P0 BRA 0x2ae0 ; /* 0x000000c000008947 */ /* 0x000fea0003800000 */ /*2a20*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*2a30*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fc800078e0205 */ /*2a40*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ; /* 0x000000ffff087224 */ /* 0x000fc800078e0004 */ /*2a50*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fcc00078e0008 */ /*2a60*/ LDG.E.CONSTANT R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x0000a2000c1e9900 */ /*2a70*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*2a80*/ IADD3 R8, P2, R8, 0x400, RZ ; /* 0x0000040008087810 */ /* 0x000fe40007f5e0ff */ /*2a90*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*2aa0*/ IADD3 R6, R6, 0x100, RZ ; /* 0x0000010006067810 */ /* 0x000fe20007ffe0ff */ /*2ab0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe400010e0605 */ /*2ac0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x024fd000078e0203 */ /*2ad0*/ @P0 BRA 0x2a50 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*2ae0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2af0*/ @!P1 BRA 0x2f70 ; /* 0x0000047000009947 */ /* 0x000fea0003800000 */ /*2b00*/ IADD3 R4, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006047a10 */ /* 0x000fe20007ffe1ff */ /*2b10*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*2b20*/ BSSY B2, 0x2d80 ; /* 0x0000025000027945 */ /* 0x000fe20003800000 */ /*2b30*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*2b40*/ ISETP.GT.AND P1, PT, R4, 0xc00, PT ; /* 0x00000c000400780c */ /* 0x000fe20003f24270 */ /*2b50*/ IMAD.WIDE R4, R6, R5, c[0x0][0x160] ; /* 0x0000580006047625 */ /* 0x000fd800078e0205 */ /*2b60*/ @!P1 BRA 0x2d70 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*2b70*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*2b80*/ IADD3 R23, R2, -0xc00, RZ ; /* 0xfffff40002177810 */ /* 0x000fe40007ffe0ff */ /*2b90*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e9900 */ /*2ba0*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*2bb0*/ LDG.E.CONSTANT R10, [R4.64+0x800] ; /* 0x00080004040a7981 */ /* 0x0000e8000c1e9900 */ /*2bc0*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x0000e8000c1e9900 */ /*2bd0*/ LDG.E.CONSTANT R12, [R4.64+0x1000] ; /* 0x00100004040c7981 */ /* 0x000128000c1e9900 */ /*2be0*/ LDG.E.CONSTANT R11, [R4.64+0x1400] ; /* 0x00140004040b7981 */ /* 0x000128000c1e9900 */ /*2bf0*/ LDG.E.CONSTANT R14, [R4.64+0x1800] ; /* 0x00180004040e7981 */ /* 0x000128000c1e9900 */ /*2c00*/ LDG.E.CONSTANT R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */ /* 0x000128000c1e9900 */ /*2c10*/ LDG.E.CONSTANT R16, [R4.64+0x2000] ; /* 0x0020000404107981 */ /* 0x000128000c1e9900 */ /*2c20*/ LDG.E.CONSTANT R15, [R4.64+0x2400] ; /* 0x00240004040f7981 */ /* 0x000128000c1e9900 */ /*2c30*/ LDG.E.CONSTANT R18, [R4.64+0x2800] ; /* 0x0028000404127981 */ /* 0x000128000c1e9900 */ /*2c40*/ LDG.E.CONSTANT R17, [R4.64+0x2c00] ; /* 0x002c000404117981 */ /* 0x000128000c1e9900 */ /*2c50*/ LDG.E.CONSTANT R20, [R4.64+0x3000] ; /* 0x0030000404147981 */ /* 0x000128000c1e9900 */ /*2c60*/ LDG.E.CONSTANT R19, [R4.64+0x3400] ; /* 0x0034000404137981 */ /* 0x000128000c1e9900 */ /*2c70*/ LDG.E.CONSTANT R22, [R4.64+0x3800] ; /* 0x0038000404167981 */ /* 0x000128000c1e9900 */ /*2c80*/ LDG.E.CONSTANT R21, [R4.64+0x3c00] ; /* 0x003c000404157981 */ /* 0x000122000c1e9900 */ /*2c90*/ IADD3 R6, R6, 0x1000, RZ ; /* 0x0000100006067810 */ /* 0x000fc80007ffe0ff */ /*2ca0*/ ISETP.GE.AND P1, PT, R6, R23, PT ; /* 0x000000170600720c */ /* 0x000fe40003f26270 */ /*2cb0*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*2cc0*/ IADD3 R8, P2, R4, 0x4000, RZ ; /* 0x0000400004087810 */ /* 0x000fca0007f5e0ff */ /*2cd0*/ IMAD.X R5, RZ, RZ, R5, P2 ; /* 0x000000ffff057224 */ /* 0x001fe200010e0605 */ /*2ce0*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*2cf0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x000fc600078e0008 */ /*2d00*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*2d10*/ IADD3 R7, R13, R14, R7 ; /* 0x0000000e0d077210 */ /* 0x000fc80007ffe007 */ /*2d20*/ IADD3 R7, R15, R16, R7 ; /* 0x000000100f077210 */ /* 0x000fc80007ffe007 */ /*2d30*/ IADD3 R7, R17, R18, R7 ; /* 0x0000001211077210 */ /* 0x000fc80007ffe007 */ /*2d40*/ IADD3 R7, R19, R20, R7 ; /* 0x0000001413077210 */ /* 0x000fc80007ffe007 */ /*2d50*/ IADD3 R3, R21, R22, R7 ; /* 0x0000001615037210 */ /* 0x000fe20007ffe007 */ /*2d60*/ @!P1 BRA 0x2b90 ; /* 0xfffffe2000009947 */ /* 0x000fea000383ffff */ /*2d70*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2d80*/ IADD3 R7, -R6, c[0x0][0x170], RZ ; /* 0x00005c0006077a10 */ /* 0x000fe20007ffe1ff */ /*2d90*/ BSSY B2, 0x2ef0 ; /* 0x0000015000027945 */ /* 0x000fe60003800000 */ /*2da0*/ ISETP.GT.AND P1, PT, R7, 0x400, PT ; /* 0x000004000700780c */ /* 0x000fda0003f24270 */ /*2db0*/ @!P1 BRA 0x2ee0 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*2dc0*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e9900 */ /*2dd0*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*2de0*/ LDG.E.CONSTANT R10, [R4.64+0x800] ; /* 0x00080004040a7981 */ /* 0x0000e8000c1e9900 */ /*2df0*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x0000e8000c1e9900 */ /*2e00*/ LDG.E.CONSTANT R12, [R4.64+0x1000] ; /* 0x00100004040c7981 */ /* 0x000128000c1e9900 */ /*2e10*/ LDG.E.CONSTANT R11, [R4.64+0x1400] ; /* 0x00140004040b7981 */ /* 0x000128000c1e9900 */ /*2e20*/ LDG.E.CONSTANT R14, [R4.64+0x1800] ; /* 0x00180004040e7981 */ /* 0x000128000c1e9900 */ /*2e30*/ LDG.E.CONSTANT R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */ /* 0x000122000c1e9900 */ /*2e40*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*2e50*/ IADD3 R6, R6, 0x800, RZ ; /* 0x0000080006067810 */ /* 0x000fe40007ffe0ff */ /*2e60*/ IADD3 R7, R7, R8, R3 ; /* 0x0000000807077210 */ /* 0x024fe40007ffe003 */ /*2e70*/ IADD3 R8, P1, R4, 0x2000, RZ ; /* 0x0000200004087810 */ /* 0x000fca0007f3e0ff */ /*2e80*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x001fe200078e0008 */ /*2e90*/ IADD3 R7, R9, R10, R7 ; /* 0x0000000a09077210 */ /* 0x008fe20007ffe007 */ /*2ea0*/ IMAD.X R9, RZ, RZ, R5, P1 ; /* 0x000000ffff097224 */ /* 0x000fc800008e0605 */ /*2eb0*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe200078e0009 */ /*2ec0*/ IADD3 R7, R11, R12, R7 ; /* 0x0000000c0b077210 */ /* 0x010fc80007ffe007 */ /*2ed0*/ IADD3 R3, R13, R14, R7 ; /* 0x0000000e0d037210 */ /* 0x000fe40007ffe007 */ /*2ee0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2ef0*/ ISETP.LT.OR P0, PT, R6, c[0x0][0x170], P0 ; /* 0x00005c0006007a0c */ /* 0x000fda0000701670 */ /*2f00*/ @!P0 BRA 0x2f70 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*2f10*/ LDG.E.CONSTANT R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea8000c1e9900 */ /*2f20*/ LDG.E.CONSTANT R7, [R4.64+0x400] ; /* 0x0004000404077981 */ /* 0x000ea8000c1e9900 */ /*2f30*/ LDG.E.CONSTANT R8, [R4.64+0x800] ; /* 0x0008000404087981 */ /* 0x000ee8000c1e9900 */ /*2f40*/ LDG.E.CONSTANT R9, [R4.64+0xc00] ; /* 0x000c000404097981 */ /* 0x000ee2000c1e9900 */ /*2f50*/ IADD3 R3, R7, R6, R3 ; /* 0x0000000607037210 */ /* 0x024fc80007ffe003 */ /*2f60*/ IADD3 R3, R9, R8, R3 ; /* 0x0000000809037210 */ /* 0x008fe40007ffe003 */ /*2f70*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2f80*/ ISETP.GT.AND P0, PT, R2, 0xff, PT ; /* 0x000000ff0200780c */ /* 0x000fda0003f04270 */ /*2f90*/ @P0 BRA 0x3390 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*2fa0*/ SHF.R.S32.HI R5, RZ, 0x1f, R0 ; /* 0x0000001fff057819 */ /* 0x001fe20000011400 */ /*2fb0*/ S2R R8, SR_LANEID ; /* 0x0000000000087919 */ /* 0x000e260000000000 */ /*2fc0*/ LEA.HI R7, R5, R0, RZ, 0x5 ; /* 0x0000000005077211 */ /* 0x000fc800078f28ff */ /*2fd0*/ LOP3.LUT R4, R7, 0xffffffe0, RZ, 0xc0, !PT ; /* 0xffffffe007047812 */ /* 0x000fe400078ec0ff */ /*2fe0*/ SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff077819 */ /* 0x000fe40000011407 */ /*2ff0*/ IADD3 R5, R4, 0x20, RZ ; /* 0x0000002004057810 */ /* 0x000fe40007ffe0ff */ /*3000*/ LOP3.LUT R4, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff047212 */ /* 0x000fe400078e33ff */ /*3010*/ ISETP.GT.AND P0, PT, R5, c[0x0][0x170], PT ; /* 0x00005c0005007a0c */ /* 0x000fe40003f04270 */ /*3020*/ IADD3 R4, R4, c[0x0][0x170], RZ ; /* 0x00005c0004047a10 */ /* 0x000fc80007ffe0ff */ /*3030*/ SEL R9, R4, 0x1f, P0 ; /* 0x0000001f04097807 */ /* 0x000fe40000000000 */ /*3040*/ IADD3 R6, R8, 0x2, RZ ; /* 0x0000000208067810 */ /* 0x001fc60007ffe0ff */ /*3050*/ SHFL.DOWN PT, R4, R3, 0x1, R9 ; /* 0x0820000003047989 */ /* 0x020e2200000e0009 */ /*3060*/ ISETP.GE.AND P0, PT, R8.reuse, R9.reuse, PT ; /* 0x000000090800720c */ /* 0x0c0fe40003f06270 */ /*3070*/ IADD3 R10, R8.reuse, 0x4, RZ ; /* 0x00000004080a7810 */ /* 0x040fe40007ffe0ff */ /*3080*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f25270 */ /*3090*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*30a0*/ ISETP.GT.AND P0, PT, R6, R9, PT ; /* 0x000000090600720c */ /* 0x000fc60003f04270 */ /*30b0*/ IMAD.IADD R4, R4, 0x1, R3 ; /* 0x0000000104047824 */ /* 0x000fca00078e0203 */ /*30c0*/ SHFL.DOWN PT, R5, R4, 0x2, R9 ; /* 0x0840000004057989 */ /* 0x000e2400000e0009 */ /*30d0*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*30e0*/ ISETP.GT.AND P0, PT, R10, R9, PT ; /* 0x000000090a00720c */ /* 0x000fc60003f04270 */ /*30f0*/ IMAD.IADD R5, R4, 0x1, R5 ; /* 0x0000000104057824 */ /* 0x000fe200078e0205 */ /*3100*/ IADD3 R4, R8.reuse, 0x8, RZ ; /* 0x0000000808047810 */ /* 0x040fe40007ffe0ff */ /*3110*/ IADD3 R8, R8, 0x10, RZ ; /* 0x0000001008087810 */ /* 0x000fe40007ffe0ff */ /*3120*/ SHFL.DOWN PT, R6, R5, 0x4, R9 ; /* 0x0880000005067989 */ /* 0x000e2400000e0009 */ /*3130*/ SEL R6, R6, RZ, !P0 ; /* 0x000000ff06067207 */ /* 0x001fe40004000000 */ /*3140*/ ISETP.GT.AND P0, PT, R4, R9, PT ; /* 0x000000090400720c */ /* 0x000fc60003f04270 */ /*3150*/ IMAD.IADD R6, R5, 0x1, R6 ; /* 0x0000000105067824 */ /* 0x000fca00078e0206 */ /*3160*/ SHFL.DOWN PT, R3, R6, 0x8, R9 ; /* 0x0900000006037989 */ /* 0x000e2400000e0009 */ /*3170*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*3180*/ ISETP.GT.AND P0, PT, R8, R9, PT ; /* 0x000000090800720c */ /* 0x000fc60003f04270 */ /*3190*/ IMAD.IADD R4, R6, 0x1, R3 ; /* 0x0000000106047824 */ /* 0x000fe400078e0203 */ /*31a0*/ @!P1 IMAD.SHL.U32 R6, R7, 0x4, RZ ; /* 0x0000000407069824 */ /* 0x000fc600078e00ff */ /*31b0*/ SHFL.DOWN PT, R3, R4, 0x10, R9 ; /* 0x0a00000004037989 */ /* 0x000e2400000e0009 */ /*31c0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*31d0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*31e0*/ IMAD.IADD R3, R4, 0x1, R3 ; /* 0x0000000104037824 */ /* 0x000fca00078e0203 */ /*31f0*/ @!P1 STS [R6+0x8], R3 ; /* 0x0000080306009388 */ /* 0x0001e80000000800 */ /*3200*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*3210*/ @P0 BRA 0x35e0 ; /* 0x000003c000000947 */ /* 0x000fea0003800000 */ /*3220*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x001e220000000c00 */ /*3230*/ ISETP.GT.AND P1, PT, R2, 0x40, PT ; /* 0x000000400200780c */ /* 0x000fc40003f24270 */ /*3240*/ ISETP.GT.AND P0, PT, R2.reuse, 0x20, PT ; /* 0x000000200200780c */ /* 0x040fe20003f04270 */ /*3250*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x000e620000000800 */ /*3260*/ ISETP.GT.AND P2, PT, R2, 0xa0, PT ; /* 0x000000a00200780c */ /* 0x000fc60003f44270 */ /*3270*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000ea20000000a00 */ /*3280*/ SEL R4, R4, RZ, P1 ; /* 0x000000ff04047207 */ /* 0x001fe40000800000 */ /*3290*/ ISETP.GT.AND P1, PT, R2, 0x80, PT ; /* 0x000000800200780c */ /* 0x000fe40003f24270 */ /*32a0*/ SEL R0, R0, RZ, P0 ; /* 0x000000ff00007207 */ /* 0x002fe40000000000 */ /*32b0*/ SEL R6, R6, RZ, P1 ; /* 0x000000ff06067207 */ /* 0x000fe40000800000 */ /*32c0*/ ISETP.GE.AND P1, PT, R2.reuse, 0xe1, PT ; /* 0x000000e10200780c */ /* 0x040fe40003f26270 */ /*32d0*/ ISETP.GT.AND P0, PT, R2, 0x60, PT ; /* 0x000000600200780c */ /* 0x000fc40003f04270 */ /*32e0*/ IADD3 R0, R4, R3, R0 ; /* 0x0000000304007210 */ /* 0x000fe40007ffe000 */ /*32f0*/ SEL R5, R5, RZ, P0 ; /* 0x000000ff05057207 */ /* 0x000fe40000000000 */ /*3300*/ ISETP.GT.AND P0, PT, R2, 0xc0, PT ; /* 0x000000c00200780c */ /* 0x000fe40003f04270 */ /*3310*/ SEL R2, R7, RZ, P2 ; /* 0x000000ff07027207 */ /* 0x000fe40001000000 */ /*3320*/ IADD3 R5, R6, R0, R5 ; /* 0x0000000006057210 */ /* 0x000fe20007ffe005 */ /*3330*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*3340*/ SEL R8, R8, RZ, P0 ; /* 0x000000ff08087207 */ /* 0x004fc80000000000 */ /*3350*/ IADD3 R3, R8, R5, R2 ; /* 0x0000000508037210 */ /* 0x000fe20007ffe002 */ /*3360*/ @!P1 BRA 0x35e0 ; /* 0x0000027000009947 */ /* 0x000fea0003800000 */ /*3370*/ IMAD.IADD R3, R3, 0x1, R9 ; /* 0x0000000103037824 */ /* 0x000fe200078e0209 */ /*3380*/ BRA 0x35e0 ; /* 0x0000025000007947 */ /* 0x000fea0003800000 */ /*3390*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e620000000000 */ /*33a0*/ ISETP.NE.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f45270 */ /*33b0*/ SHFL.DOWN PT, R2, R3, 0x1, 0x1f ; /* 0x08201f0003027f89 */ /* 0x020ea200000e0000 */ /*33c0*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x042fe40003f04270 */ /*33d0*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*33e0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x004fe40004000000 */ /*33f0*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*3400*/ IMAD.IADD R2, R2, 0x1, R3 ; /* 0x0000000102027824 */ /* 0x000fca00078e0203 */ /*3410*/ SHFL.DOWN PT, R4, R2, 0x2, 0x1f ; /* 0x08401f0002047f89 */ /* 0x001e2200000e0000 */ /*3420*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R0 ; /* 0x0000001fff079819 */ /* 0x000fc80000011400 */ /*3430*/ @!P1 LEA.HI R7, R7, R0, RZ, 0x5 ; /* 0x0000000007079211 */ /* 0x000fe200078f28ff */ /*3440*/ @!P2 IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff00a224 */ /* 0x000fc600078e00ff */ /*3450*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fca0000011407 */ /*3460*/ @!P1 IMAD.SHL.U32 R10, R7, 0x4, RZ ; /* 0x00000004070a9824 */ /* 0x000fe200078e00ff */ /*3470*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*3480*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*3490*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fca00078e0205 */ /*34a0*/ SHFL.DOWN PT, R4, R5, 0x4, 0x1f ; /* 0x08801f0005047f89 */ /* 0x000e2400000e0000 */ /*34b0*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*34c0*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*34d0*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*34e0*/ SHFL.DOWN PT, R3, R4, 0x8, 0x1f ; /* 0x09001f0004037f89 */ /* 0x000e2400000e0000 */ /*34f0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*3500*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*3510*/ IMAD.IADD R2, R4, 0x1, R3 ; /* 0x0000000104027824 */ /* 0x000fca00078e0203 */ /*3520*/ SHFL.DOWN PT, R3, R2, 0x10, 0x1f ; /* 0x0a001f0002037f89 */ /* 0x000e2400000e0000 */ /*3530*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fca0004000000 */ /*3540*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*3550*/ @!P1 STS [R10+0x8], R3 ; /* 0x000008030a009388 */ /* 0x000fe80000000800 */ /*3560*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*3570*/ @!P2 LDS R2, [0xc] ; /* 0x00000c00ff02a984 */ /* 0x000fe80000000800 */ /*3580*/ @!P2 LDS.128 R4, [0x10] ; /* 0x00001000ff04a984 */ /* 0x000e280000000c00 */ /*3590*/ @!P2 LDS.64 R8, [0x20] ; /* 0x00002000ff08a984 */ /* 0x000e620000000a00 */ /*35a0*/ @!P2 IADD3 R2, R4, R2, R3 ; /* 0x000000020402a210 */ /* 0x001fc80007ffe003 */ /*35b0*/ @!P2 IADD3 R2, R6, R2, R5 ; /* 0x000000020602a210 */ /* 0x000fc80007ffe005 */ /*35c0*/ @!P2 IADD3 R2, R8, R2, R7 ; /* 0x000000020802a210 */ /* 0x002fca0007ffe007 */ /*35d0*/ @!P2 IMAD.IADD R3, R2, 0x1, R9 ; /* 0x000000010203a824 */ /* 0x000fe400078e0209 */ /*35e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*35f0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*3600*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*3610*/ IADD3 R5, R3, c[0x0][0x178], RZ ; /* 0x00005e0003057a10 */ /* 0x000fe20007ffe0ff */ /*3620*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*3630*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fca00078e00ff */ /*3640*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*3650*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*3660*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e240000002100 */ /*3670*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x001fda0003f05270 */ /*3680*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*3690*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff057624 */ /* 0x000fe400078e00ff */ /*36a0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*36b0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fca00078e00ff */ /*36c0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*36d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*36e0*/ BRA 0x36e0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*36f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3700*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3710*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3720*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3730*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3740*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3750*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3760*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3770*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _ZN3cub17CUB_200700_890_NS18DeviceReduceKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEjS6_iN4cuda3std3__410__identityEEEvT0_PT3_T1_NS0_13GridEvenShareISL_EET2_T4_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0030*/ BSSY B0, 0x2140 ; /* 0x0000210000007945 */ /* 0x000fe40003800000 */ /*0040*/ S2R R14, SR_TID.X ; /* 0x00000000000e7919 */ /* 0x000e620000002100 */ /*0050*/ IMAD.SHL.U32 R15, R0, 0x1000, RZ ; /* 0x00001000000f7824 */ /* 0x001fe400078e00ff */ /*0060*/ IMAD.MOV.U32 R18, RZ, RZ, R14 ; /* 0x000000ffff127224 */ /* 0x002fc600078e000e */ /*0070*/ IADD3 R16, -R15, c[0x0][0x188], RZ ; /* 0x000062000f107a10 */ /* 0x000fc80007ffe1ff */ /*0080*/ ISETP.GE.U32.AND P0, PT, R16, 0x1000, PT ; /* 0x000010001000780c */ /* 0x000fda0003f06070 */ /*0090*/ @!P0 BRA 0x1140 ; /* 0x000010a000008947 */ /* 0x000fea0003800000 */ /*00a0*/ IADD3 R3, P0, R15, R18, RZ ; /* 0x000000120f037210 */ /* 0x000fc80007f1e0ff */ /*00b0*/ LEA.HI.X.SX32 R4, R18, RZ, 0x1, P0 ; /* 0x000000ff12047211 */ /* 0x000fe400000f0eff */ /*00c0*/ LEA R2, P0, R3, c[0x0][0x160], 0x2 ; /* 0x0000580003027a11 */ /* 0x000fc800078010ff */ /*00d0*/ LEA.HI.X R3, R3, c[0x0][0x164], R4, 0x2, P0 ; /* 0x0000590003037a11 */ /* 0x000fca00000f1404 */ /*00e0*/ LDG.E R4, [R2.64+0x400] ; /* 0x0004000602047981 */ /* 0x000ea8000c1e1900 */ /*00f0*/ LDG.E R5, [R2.64] ; /* 0x0000000602057981 */ /* 0x000ea8000c1e1900 */ /*0100*/ LDG.E R6, [R2.64+0x800] ; /* 0x0008000602067981 */ /* 0x000ea8000c1e1900 */ /*0110*/ LDG.E R7, [R2.64+0xc00] ; /* 0x000c000602077981 */ /* 0x000ee8000c1e1900 */ /*0120*/ LDG.E R8, [R2.64+0x1000] ; /* 0x0010000602087981 */ /* 0x000ee8000c1e1900 */ /*0130*/ LDG.E R9, [R2.64+0x1400] ; /* 0x0014000602097981 */ /* 0x000f28000c1e1900 */ /*0140*/ LDG.E R10, [R2.64+0x1800] ; /* 0x00180006020a7981 */ /* 0x000f28000c1e1900 */ /*0150*/ LDG.E R11, [R2.64+0x1c00] ; /* 0x001c0006020b7981 */ /* 0x000f68000c1e1900 */ /*0160*/ LDG.E R12, [R2.64+0x2000] ; /* 0x00200006020c7981 */ /* 0x000f68000c1e1900 */ /*0170*/ LDG.E R13, [R2.64+0x2400] ; /* 0x00240006020d7981 */ /* 0x000f68000c1e1900 */ /*0180*/ LDG.E R17, [R2.64+0x2800] ; /* 0x0028000602117981 */ /* 0x000f68000c1e1900 */ /*0190*/ LDG.E R19, [R2.64+0x2c00] ; /* 0x002c000602137981 */ /* 0x000f68000c1e1900 */ /*01a0*/ LDG.E R18, [R2.64+0x3000] ; /* 0x0030000602127981 */ /* 0x000f68000c1e1900 */ /*01b0*/ LDG.E R21, [R2.64+0x3400] ; /* 0x0034000602157981 */ /* 0x000f68000c1e1900 */ /*01c0*/ LDG.E R20, [R2.64+0x3800] ; /* 0x0038000602147981 */ /* 0x000f68000c1e1900 */ /*01d0*/ LDG.E R23, [R2.64+0x3c00] ; /* 0x003c000602177981 */ /* 0x000f62000c1e1900 */ /*01e0*/ ULDC UR4, c[0x0][0x18c] ; /* 0x0000630000047ab9 */ /* 0x000fc40000000800 */ /*01f0*/ USHF.L.U32 UR4, UR4, 0xc, URZ ; /* 0x0000000c04047899 */ /* 0x000fcc000800063f */ /*0200*/ ISETP.GE.U32.AND P0, PT, R16, UR4, PT ; /* 0x0000000410007c0c */ /* 0x000fe4000bf06070 */ /*0210*/ IADD3 R4, R6, R4, R5 ; /* 0x0000000406047210 */ /* 0x004fc80007ffe005 */ /*0220*/ IADD3 R4, R8, R7, R4 ; /* 0x0000000708047210 */ /* 0x008fc80007ffe004 */ /*0230*/ IADD3 R4, R10, R9, R4 ; /* 0x000000090a047210 */ /* 0x010fc80007ffe004 */ /*0240*/ IADD3 R4, R12, R11, R4 ; /* 0x0000000b0c047210 */ /* 0x020fc80007ffe004 */ /*0250*/ IADD3 R4, R17, R13, R4 ; /* 0x0000000d11047210 */ /* 0x000fc80007ffe004 */ /*0260*/ IADD3 R4, R18, R19, R4 ; /* 0x0000001312047210 */ /* 0x000fc80007ffe004 */ /*0270*/ IADD3 R4, R20, R21, R4 ; /* 0x0000001514047210 */ /* 0x000fca0007ffe004 */ /*0280*/ IMAD.IADD R4, R4, 0x1, R23 ; /* 0x0000000104047824 */ /* 0x000fe200078e0217 */ /*0290*/ @!P0 BRA 0xec0 ; /* 0x00000c2000008947 */ /* 0x000fea0003800000 */ /*02a0*/ ULDC UR5, c[0x0][0x188] ; /* 0x0000620000057ab9 */ /* 0x000fe20000000800 */ /*02b0*/ IADD3 R7, R15.reuse, UR4, RZ ; /* 0x000000040f077c10 */ /* 0x040fe2000fffe0ff */ /*02c0*/ UIADD3 UR5, UR5, -0x1000, URZ ; /* 0xfffff00005057890 */ /* 0x000fe2000fffe03f */ /*02d0*/ IADD3 R15, R15, UR4, R14.reuse ; /* 0x000000040f0f7c10 */ /* 0x100fe2000fffe00e */ /*02e0*/ IMAD.MOV.U32 R5, RZ, RZ, R14 ; /* 0x000000ffff057224 */ /* 0x000fe200078e000e */ /*02f0*/ IADD3 R18, R7.reuse, 0x300, RZ ; /* 0x0000030007127810 */ /* 0x040fe20007ffe0ff */ /*0300*/ IMAD.MOV.U32 R6, RZ, RZ, R7 ; /* 0x000000ffff067224 */ /* 0x000fe400078e0007 */ /*0310*/ ISETP.GT.U32.AND P0, PT, R7, UR5, PT ; /* 0x0000000507007c0c */ /* 0x000fda000bf04070 */ /*0320*/ @P0 BRA 0x580 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*0330*/ IADD3 R3, P0, R14, R7, RZ ; /* 0x000000070e037210 */ /* 0x000fc80007f1e0ff */ /*0340*/ LEA.HI.X.SX32 R8, R14, RZ, 0x1, P0 ; /* 0x000000ff0e087211 */ /* 0x000fe400000f0eff */ /*0350*/ LEA R2, P0, R3, c[0x0][0x160], 0x2 ; /* 0x0000580003027a11 */ /* 0x000fc800078010ff */ /*0360*/ LEA.HI.X R3, R3, c[0x0][0x164], R8, 0x2, P0 ; /* 0x0000590003037a11 */ /* 0x000fca00000f1408 */ /*0370*/ LDG.E R9, [R2.64] ; /* 0x0000000602097981 */ /* 0x000ea8000c1e1900 */ /*0380*/ LDG.E R8, [R2.64+0x400] ; /* 0x0004000602087981 */ /* 0x000ea8000c1e1900 */ /*0390*/ LDG.E R11, [R2.64+0x800] ; /* 0x00080006020b7981 */ /* 0x000ee8000c1e1900 */ /*03a0*/ LDG.E R10, [R2.64+0xc00] ; /* 0x000c0006020a7981 */ /* 0x000ee8000c1e1900 */ /*03b0*/ LDG.E R13, [R2.64+0x1000] ; /* 0x00100006020d7981 */ /* 0x000f28000c1e1900 */ /*03c0*/ LDG.E R12, [R2.64+0x1400] ; /* 0x00140006020c7981 */ /* 0x000f28000c1e1900 */ /*03d0*/ LDG.E R17, [R2.64+0x1800] ; /* 0x0018000602117981 */ /* 0x000f68000c1e1900 */ /*03e0*/ LDG.E R16, [R2.64+0x1c00] ; /* 0x001c000602107981 */ /* 0x000f68000c1e1900 */ /*03f0*/ LDG.E R19, [R2.64+0x2000] ; /* 0x0020000602137981 */ /* 0x000f68000c1e1900 */ /*0400*/ LDG.E R20, [R2.64+0x2400] ; /* 0x0024000602147981 */ /* 0x000f68000c1e1900 */ /*0410*/ LDG.E R21, [R2.64+0x2800] ; /* 0x0028000602157981 */ /* 0x000f68000c1e1900 */ /*0420*/ LDG.E R22, [R2.64+0x2c00] ; /* 0x002c000602167981 */ /* 0x000f68000c1e1900 */ /*0430*/ LDG.E R23, [R2.64+0x3000] ; /* 0x0030000602177981 */ /* 0x000f68000c1e1900 */ /*0440*/ LDG.E R24, [R2.64+0x3400] ; /* 0x0034000602187981 */ /* 0x000f68000c1e1900 */ /*0450*/ LDG.E R25, [R2.64+0x3800] ; /* 0x0038000602197981 */ /* 0x000f68000c1e1900 */ /*0460*/ LDG.E R26, [R2.64+0x3c00] ; /* 0x003c0006021a7981 */ /* 0x000f62000c1e1900 */ /*0470*/ IADD3 R8, R8, R9, R4 ; /* 0x0000000908087210 */ /* 0x004fc40007ffe004 */ /*0480*/ IADD3 R4, -R7, c[0x0][0x188], RZ ; /* 0x0000620007047a10 */ /* 0x000fc80007ffe1ff */ /*0490*/ ISETP.GE.U32.AND P0, PT, R4, UR4, PT ; /* 0x0000000404007c0c */ /* 0x000fe4000bf06070 */ /*04a0*/ IADD3 R8, R10, R11, R8 ; /* 0x0000000b0a087210 */ /* 0x008fc80007ffe008 */ /*04b0*/ IADD3 R8, R12, R13, R8 ; /* 0x0000000d0c087210 */ /* 0x010fc80007ffe008 */ /*04c0*/ IADD3 R8, R16, R17, R8 ; /* 0x0000001110087210 */ /* 0x020fc80007ffe008 */ /*04d0*/ IADD3 R8, R20, R19, R8 ; /* 0x0000001314087210 */ /* 0x000fc80007ffe008 */ /*04e0*/ IADD3 R8, R22, R21, R8 ; /* 0x0000001516087210 */ /* 0x000fc80007ffe008 */ /*04f0*/ IADD3 R8, R24, R23, R8 ; /* 0x0000001718087210 */ /* 0x000fc80007ffe008 */ /*0500*/ IADD3 R4, R26, R25, R8 ; /* 0x000000191a047210 */ /* 0x000fe20007ffe008 */ /*0510*/ @!P0 BRA 0xec0 ; /* 0x000009a000008947 */ /* 0x000fea0003800000 */ /*0520*/ IADD3 R7, R7, UR4, RZ ; /* 0x0000000407077c10 */ /* 0x000fe4000fffe0ff */ /*0530*/ IADD3 R18, R18, UR4, RZ ; /* 0x0000000412127c10 */ /* 0x000fe4000fffe0ff */ /*0540*/ ISETP.GT.U32.AND P0, PT, R7, UR5, PT ; /* 0x0000000507007c0c */ /* 0x000fe4000bf04070 */ /*0550*/ IADD3 R6, R6, UR4, RZ ; /* 0x0000000406067c10 */ /* 0x000fe4000fffe0ff */ /*0560*/ IADD3 R15, R15, UR4, RZ ; /* 0x000000040f0f7c10 */ /* 0x000fd2000fffe0ff */ /*0570*/ @!P0 BRA 0x330 ; /* 0xfffffdb000008947 */ /* 0x000fea000383ffff */ /*0580*/ ISETP.GE.U32.AND P0, PT, R7, c[0x0][0x188], PT ; /* 0x0000620007007a0c */ /* 0x000fda0003f06070 */ /*0590*/ @P0 BRA 0xec0 ; /* 0x0000092000000947 */ /* 0x000fea0003800000 */ /*05a0*/ IADD3 R16, -R7, c[0x0][0x188], RZ ; /* 0x0000620007107a10 */ /* 0x000fe20007ffe1ff */ /*05b0*/ BSSY B1, 0xec0 ; /* 0x0000090000017945 */ /* 0x000fe60003800000 */ /*05c0*/ ISETP.GE.AND P0, PT, R5, R16, PT ; /* 0x000000100500720c */ /* 0x000fda0003f06270 */ /*05d0*/ @P0 BRA 0xeb0 ; /* 0x000008d000000947 */ /* 0x000fea0003800000 */ /*05e0*/ LOP3.LUT R2, RZ, R5, RZ, 0x33, !PT ; /* 0x00000005ff027212 */ /* 0x000fe200078e33ff */ /*05f0*/ BSSY B2, 0x710 ; /* 0x0000011000027945 */ /* 0x000fe60003800000 */ /*0600*/ IADD3 R3, -R7, c[0x0][0x188], R2 ; /* 0x0000620007037a10 */ /* 0x000fc80007ffe102 */ /*0610*/ LEA.HI R2, R3.reuse, 0x1, RZ, 0x18 ; /* 0x0000000103027811 */ /* 0x040fe400078fc0ff */ /*0620*/ ISETP.GE.U32.AND P1, PT, R3, 0x300, PT ; /* 0x000003000300780c */ /* 0x000fe40003f26070 */ /*0630*/ LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */ /* 0x000fda000780c0ff */ /*0640*/ @!P0 BRA 0x700 ; /* 0x000000b000008947 */ /* 0x000fea0003800000 */ /*0650*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e220000002100 */ /*0660*/ IMAD.MOV.U32 R7, RZ, RZ, R2 ; /* 0x000000ffff077224 */ /* 0x000fc600078e0002 */ /*0670*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */ /* 0x000fc800078e00ff */ /*0680*/ IMAD.WIDE.U32 R2, R15, R2, c[0x0][0x160] ; /* 0x000058000f027625 */ /* 0x000fcc00078e0002 */ /*0690*/ LDG.E R3, [R2.64] ; /* 0x0000000602037981 */ /* 0x000ea2000c1e1900 */ /*06a0*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*06b0*/ IADD3 R5, R5, 0x100, RZ ; /* 0x0000010005057810 */ /* 0x001fe40007ffe0ff */ /*06c0*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*06d0*/ IADD3 R15, R15, 0x100, RZ ; /* 0x000001000f0f7810 */ /* 0x000fe20007ffe0ff */ /*06e0*/ IMAD.IADD R4, R3, 0x1, R4 ; /* 0x0000000103047824 */ /* 0x004fd400078e0204 */ /*06f0*/ @P0 BRA 0x670 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*0700*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0710*/ @!P1 BRA 0xeb0 ; /* 0x0000079000009947 */ /* 0x000fea0003800000 */ /*0720*/ IMAD.IADD R2, R16, 0x1, -R5 ; /* 0x0000000110027824 */ /* 0x000fe200078e0a05 */ /*0730*/ BSSY B2, 0xb80 ; /* 0x0000044000027945 */ /* 0x000fe20003800000 */ /*0740*/ IMAD.IADD R18, R5.reuse, 0x1, R18 ; /* 0x0000000105127824 */ /* 0x040fe200078e0212 */ /*0750*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f070 */ /*0760*/ IMAD.IADD R17, R5, 0x1, R6 ; /* 0x0000000105117824 */ /* 0x000fe200078e0206 */ /*0770*/ ISETP.GT.AND P1, PT, R2, 0xc00, PT ; /* 0x00000c000200780c */ /* 0x000fda0003f24270 */ /*0780*/ @!P1 BRA 0xb70 ; /* 0x000003e000009947 */ /* 0x000fea0003800000 */ /*0790*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*07a0*/ IADD3 R20, R16, -0xc00, RZ ; /* 0xfffff40010147810 */ /* 0x000fe40007ffe0ff */ /*07b0*/ IADD3 R22, R18.reuse, -0x200, RZ ; /* 0xfffffe0012167810 */ /* 0x040fe20007ffe0ff */ /*07c0*/ IMAD.MOV.U32 R25, RZ, RZ, 0x4 ; /* 0x00000004ff197424 */ /* 0x000fe200078e00ff */ /*07d0*/ IADD3 R8, R18, -0x100, RZ ; /* 0xffffff0012087810 */ /* 0x000fc60007ffe0ff */ /*07e0*/ IMAD.WIDE.U32 R22, R22, R25, c[0x0][0x160] ; /* 0x0000580016167625 */ /* 0x000fe200078e0019 */ /*07f0*/ IADD3 R12, R17, 0x400, RZ ; /* 0x00000400110c7810 */ /* 0x000fc60007ffe0ff */ /*0800*/ IMAD.WIDE.U32 R6, R17, R25.reuse, c[0x0][0x160] ; /* 0x0000580011067625 */ /* 0x080fe200078e0019 */ /*0810*/ IADD3 R14, R18, 0x200, RZ ; /* 0x00000200120e7810 */ /* 0x000fe20007ffe0ff */ /*0820*/ LDG.E R22, [R22.64] ; /* 0x0000000616167981 */ /* 0x0000a4000c1e1900 */ /*0830*/ IMAD.WIDE.U32 R8, R8, R25.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe400078e0019 */ /*0840*/ LDG.E R21, [R6.64] ; /* 0x0000000606157981 */ /* 0x0002a4000c1e1900 */ /*0850*/ IMAD.WIDE.U32 R10, R18.reuse, R25.reuse, c[0x0][0x160] ; /* 0x00005800120a7625 */ /* 0x0c0fe200078e0019 */ /*0860*/ IADD3 R2, R18.reuse, 0x300, RZ ; /* 0x0000030012027810 */ /* 0x040fe20007ffe0ff */ /*0870*/ LDG.E R19, [R8.64] ; /* 0x0000000608137981 */ /* 0x000722000c1e1900 */ /*0880*/ IADD3 R32, R18, 0x400, RZ ; /* 0x0000040012207810 */ /* 0x000fe20007ffe0ff */ /*0890*/ IMAD.WIDE.U32 R12, R12, R25, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x000fc400078e0019 */ /*08a0*/ LDG.E R24, [R10.64] ; /* 0x000000060a187981 */ /* 0x000b24000c1e1900 */ /*08b0*/ IMAD.WIDE.U32 R14, R14, R25.reuse, c[0x0][0x160] ; /* 0x000058000e0e7625 */ /* 0x080fe200078e0019 */ /*08c0*/ IADD3 R28, R17, 0x800, RZ ; /* 0x00000800111c7810 */ /* 0x000fe20007ffe0ff */ /*08d0*/ LDG.E R23, [R12.64] ; /* 0x000000060c177981 */ /* 0x001122000c1e1900 */ /*08e0*/ IADD3 R8, R18, 0x600, RZ ; /* 0x0000060012087810 */ /* 0x008fe20007ffe0ff */ /*08f0*/ IMAD.WIDE.U32 R2, R2, R25.reuse, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x080fe400078e0019 */ /*0900*/ LDG.E R26, [R14.64] ; /* 0x000000060e1a7981 */ /* 0x000722000c1e1900 */ /*0910*/ IADD3 R30, R18, 0x700, RZ ; /* 0x00000700121e7810 */ /* 0x000fe20007ffe0ff */ /*0920*/ IMAD.WIDE.U32 R32, R32, R25, c[0x0][0x160] ; /* 0x0000580020207625 */ /* 0x000fc400078e0019 */ /*0930*/ LDG.E R27, [R2.64] ; /* 0x00000006021b7981 */ /* 0x000b22000c1e1900 */ /*0940*/ IADD3 R12, R18, 0x800, RZ ; /* 0x00000800120c7810 */ /* 0x001fe20007ffe0ff */ /*0950*/ IMAD.WIDE.U32 R6, R28, R25.reuse, c[0x0][0x160] ; /* 0x000058001c067625 */ /* 0x082fe200078e0019 */ /*0960*/ IADD3 R34, R18, 0xa00, RZ ; /* 0x00000a0012227810 */ /* 0x000fe20007ffe0ff */ /*0970*/ LDG.E R28, [R32.64] ; /* 0x00000006201c7981 */ /* 0x000124000c1e1900 */ /*0980*/ IMAD.WIDE.U32 R8, R8, R25.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe200078e0019 */ /*0990*/ IADD3 R14, R17, 0xc00, RZ ; /* 0x00000c00110e7810 */ /* 0x008fe20007ffe0ff */ /*09a0*/ LDG.E R29, [R6.64] ; /* 0x00000006061d7981 */ /* 0x0002e4000c1e1900 */ /*09b0*/ IMAD.WIDE.U32 R10, R30, R25.reuse, c[0x0][0x160] ; /* 0x000058001e0a7625 */ /* 0x0a0fe200078e0019 */ /*09c0*/ IADD3 R36, R18, 0xb00, RZ ; /* 0x00000b0012247810 */ /* 0x000fe20007ffe0ff */ /*09d0*/ LDG.E R30, [R8.64] ; /* 0x00000006081e7981 */ /* 0x000ae4000c1e1900 */ /*09e0*/ IMAD.WIDE.U32 R12, R12, R25.reuse, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x080fe200078e0019 */ /*09f0*/ IADD3 R32, R18, 0xc00, RZ ; /* 0x00000c0012207810 */ /* 0x001fe20007ffe0ff */ /*0a00*/ LDG.E R10, [R10.64] ; /* 0x000000060a0a7981 */ /* 0x000ee4000c1e1900 */ /*0a10*/ IMAD.WIDE.U32 R14, R14, R25, c[0x0][0x160] ; /* 0x000058000e0e7625 */ /* 0x000fc400078e0019 */ /*0a20*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000ee4000c1e1900 */ /*0a30*/ IMAD.WIDE.U32 R2, R34, R25.reuse, c[0x0][0x160] ; /* 0x0000580022027625 */ /* 0x080fe400078e0019 */ /*0a40*/ LDG.E R14, [R14.64] ; /* 0x000000060e0e7981 */ /* 0x000ee4000c1e1900 */ /*0a50*/ IMAD.WIDE.U32 R6, R36, R25.reuse, c[0x0][0x160] ; /* 0x0000580024067625 */ /* 0x082fe400078e0019 */ /*0a60*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000ee4000c1e1900 */ /*0a70*/ IMAD.WIDE.U32 R8, R32, R25, c[0x0][0x160] ; /* 0x0000580020087625 */ /* 0x020fc400078e0019 */ /*0a80*/ LDG.E R7, [R6.64] ; /* 0x0000000606077981 */ /* 0x000f68000c1e1900 */ /*0a90*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */ /* 0x000f62000c1e1900 */ /*0aa0*/ IADD3 R5, R5, 0x1000, RZ ; /* 0x0000100005057810 */ /* 0x000fc80007ffe0ff */ /*0ab0*/ ISETP.GE.AND P1, PT, R5, R20, PT ; /* 0x000000140500720c */ /* 0x000fe40003f26270 */ /*0ac0*/ IADD3 R18, R18, 0x1000, RZ ; /* 0x0000100012127810 */ /* 0x000fe40007ffe0ff */ /*0ad0*/ IADD3 R17, R17, 0x1000, RZ ; /* 0x0000100011117810 */ /* 0x000fe40007ffe0ff */ /*0ae0*/ IADD3 R21, R22, R21, R4 ; /* 0x0000001516157210 */ /* 0x004fc80007ffe004 */ /*0af0*/ IADD3 R19, R24, R19, R21 ; /* 0x0000001318137210 */ /* 0x010fc80007ffe015 */ /*0b00*/ IADD3 R19, R26, R23, R19 ; /* 0x000000171a137210 */ /* 0x000fc80007ffe013 */ /*0b10*/ IADD3 R19, R28, R27, R19 ; /* 0x0000001b1c137210 */ /* 0x000fc80007ffe013 */ /*0b20*/ IADD3 R19, R30, R29, R19 ; /* 0x0000001d1e137210 */ /* 0x008fc80007ffe013 */ /*0b30*/ IADD3 R13, R13, R10, R19 ; /* 0x0000000a0d0d7210 */ /* 0x000fc80007ffe013 */ /*0b40*/ IADD3 R2, R2, R14, R13 ; /* 0x0000000e02027210 */ /* 0x000fc80007ffe00d */ /*0b50*/ IADD3 R4, R8, R7, R2 ; /* 0x0000000708047210 */ /* 0x020fe20007ffe002 */ /*0b60*/ @!P1 BRA 0x7b0 ; /* 0xfffffc4000009947 */ /* 0x000fea000383ffff */ /*0b70*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0b80*/ IMAD.IADD R2, R16, 0x1, -R5 ; /* 0x0000000110027824 */ /* 0x000fe200078e0a05 */ /*0b90*/ BSSY B2, 0xdc0 ; /* 0x0000022000027945 */ /* 0x000fe80003800000 */ /*0ba0*/ ISETP.GT.AND P1, PT, R2, 0x400, PT ; /* 0x000004000200780c */ /* 0x000fda0003f24270 */ /*0bb0*/ @!P1 BRA 0xdb0 ; /* 0x000001f000009947 */ /* 0x000fea0003800000 */ /*0bc0*/ IADD3 R6, R18.reuse, -0x200, RZ ; /* 0xfffffe0012067810 */ /* 0x040fe20007ffe0ff */ /*0bd0*/ IMAD.MOV.U32 R23, RZ, RZ, 0x4 ; /* 0x00000004ff177424 */ /* 0x000fe200078e00ff */ /*0be0*/ IADD3 R8, R18, -0x100, RZ ; /* 0xffffff0012087810 */ /* 0x000fc60007ffe0ff */ /*0bf0*/ IMAD.WIDE.U32 R6, R6, R23, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x000fe200078e0017 */ /*0c00*/ IADD3 R12, R17, 0x400, RZ ; /* 0x00000400110c7810 */ /* 0x000fc60007ffe0ff */ /*0c10*/ IMAD.WIDE.U32 R2, R17, R23.reuse, c[0x0][0x160] ; /* 0x0000580011027625 */ /* 0x080fe200078e0017 */ /*0c20*/ IADD3 R14, R18, 0x200, RZ ; /* 0x00000200120e7810 */ /* 0x000fe20007ffe0ff */ /*0c30*/ LDG.E R20, [R6.64] ; /* 0x0000000606147981 */ /* 0x0000a4000c1e1900 */ /*0c40*/ IMAD.WIDE.U32 R8, R8, R23.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe200078e0017 */ /*0c50*/ IADD3 R22, R18.reuse, 0x300, RZ ; /* 0x0000030012167810 */ /* 0x040fe20007ffe0ff */ /*0c60*/ LDG.E R19, [R2.64] ; /* 0x0000000602137981 */ /* 0x0002a4000c1e1900 */ /*0c70*/ IMAD.WIDE.U32 R10, R18.reuse, R23.reuse, c[0x0][0x160] ; /* 0x00005800120a7625 */ /* 0x0c0fe200078e0017 */ /*0c80*/ IADD3 R21, R18, 0x400, RZ ; /* 0x0000040012157810 */ /* 0x000fe20007ffe0ff */ /*0c90*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */ /* 0x000ee4000c1e1900 */ /*0ca0*/ IMAD.WIDE.U32 R12, R12, R23, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x000fc400078e0017 */ /*0cb0*/ LDG.E R10, [R10.64] ; /* 0x000000060a0a7981 */ /* 0x000ee4000c1e1900 */ /*0cc0*/ IMAD.WIDE.U32 R14, R14, R23.reuse, c[0x0][0x160] ; /* 0x000058000e0e7625 */ /* 0x080fe400078e0017 */ /*0cd0*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000f24000c1e1900 */ /*0ce0*/ IMAD.WIDE.U32 R6, R22, R23.reuse, c[0x0][0x160] ; /* 0x0000580016067625 */ /* 0x081fe400078e0017 */ /*0cf0*/ LDG.E R14, [R14.64] ; /* 0x000000060e0e7981 */ /* 0x000f24000c1e1900 */ /*0d00*/ IMAD.WIDE.U32 R2, R21, R23, c[0x0][0x160] ; /* 0x0000580015027625 */ /* 0x002fc400078e0017 */ /*0d10*/ LDG.E R7, [R6.64] ; /* 0x0000000606077981 */ /* 0x000f68000c1e1900 */ /*0d20*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000f62000c1e1900 */ /*0d30*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0d40*/ IADD3 R5, R5, 0x800, RZ ; /* 0x0000080005057810 */ /* 0x000fe40007ffe0ff */ /*0d50*/ IADD3 R18, R18, 0x800, RZ ; /* 0x0000080012127810 */ /* 0x000fe40007ffe0ff */ /*0d60*/ IADD3 R17, R17, 0x800, RZ ; /* 0x0000080011117810 */ /* 0x000fc40007ffe0ff */ /*0d70*/ IADD3 R19, R20, R19, R4 ; /* 0x0000001314137210 */ /* 0x004fc80007ffe004 */ /*0d80*/ IADD3 R8, R10, R8, R19 ; /* 0x000000080a087210 */ /* 0x008fc80007ffe013 */ /*0d90*/ IADD3 R8, R14, R13, R8 ; /* 0x0000000d0e087210 */ /* 0x010fc80007ffe008 */ /*0da0*/ IADD3 R4, R2, R7, R8 ; /* 0x0000000702047210 */ /* 0x020fe40007ffe008 */ /*0db0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0dc0*/ ISETP.LT.OR P0, PT, R5, R16, P0 ; /* 0x000000100500720c */ /* 0x000fda0000701670 */ /*0dd0*/ @!P0 BRA 0xeb0 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*0de0*/ IADD3 R6, R18.reuse, -0x200, RZ ; /* 0xfffffe0012067810 */ /* 0x040fe20007ffe0ff */ /*0df0*/ IMAD.MOV.U32 R19, RZ, RZ, 0x4 ; /* 0x00000004ff137424 */ /* 0x000fe200078e00ff */ /*0e00*/ IADD3 R8, R18, -0x100, RZ ; /* 0xffffff0012087810 */ /* 0x000fc60007ffe0ff */ /*0e10*/ IMAD.WIDE.U32 R2, R17, R19, c[0x0][0x160] ; /* 0x0000580011027625 */ /* 0x000fc800078e0013 */ /*0e20*/ IMAD.WIDE.U32 R6, R6, R19.reuse, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x080fe400078e0013 */ /*0e30*/ LDG.E R3, [R2.64] ; /* 0x0000000602037981 */ /* 0x000ea4000c1e1900 */ /*0e40*/ IMAD.WIDE.U32 R8, R8, R19.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe400078e0013 */ /*0e50*/ LDG.E R6, [R6.64] ; /* 0x0000000606067981 */ /* 0x000ea4000c1e1900 */ /*0e60*/ IMAD.WIDE.U32 R18, R18, R19, c[0x0][0x160] ; /* 0x0000580012127625 */ /* 0x000fe400078e0013 */ /*0e70*/ LDG.E R9, [R8.64] ; /* 0x0000000608097981 */ /* 0x000ee8000c1e1900 */ /*0e80*/ LDG.E R18, [R18.64] ; /* 0x0000000612127981 */ /* 0x000ee2000c1e1900 */ /*0e90*/ IADD3 R4, R6, R3, R4 ; /* 0x0000000306047210 */ /* 0x004fc80007ffe004 */ /*0ea0*/ IADD3 R4, R18, R9, R4 ; /* 0x0000000912047210 */ /* 0x008fe40007ffe004 */ /*0eb0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0ec0*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e280000000000 */ /*0ed0*/ SHFL.DOWN PT, R2, R4, 0x1, 0x1f ; /* 0x08201f0004027f89 */ /* 0x000e6800000e0000 */ /*0ee0*/ S2R R14, SR_TID.X ; /* 0x00000000000e7919 */ /* 0x000ea20000002100 */ /*0ef0*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x041fe40003f04270 */ /*0f00*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fc40003f25270 */ /*0f10*/ SEL R3, R2, RZ, !P0 ; /* 0x000000ff02037207 */ /* 0x002fe40004000000 */ /*0f20*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*0f30*/ IMAD.IADD R3, R3, 0x1, R4 ; /* 0x0000000103037824 */ /* 0x000fca00078e0204 */ /*0f40*/ SHFL.DOWN PT, R2, R3, 0x2, 0x1f ; /* 0x08401f0003027f89 */ /* 0x000e2200000e0000 */ /*0f50*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R14 ; /* 0x0000001fff079819 */ /* 0x004fc8000001140e */ /*0f60*/ @!P1 LEA.HI R7, R7, R14, RZ, 0x5 ; /* 0x0000000e07079211 */ /* 0x000fc800078f28ff */ /*0f70*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fe40000011407 */ /*0f80*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x001fe40004000000 */ /*0f90*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*0fa0*/ IMAD.IADD R2, R3, 0x1, R2 ; /* 0x0000000103027824 */ /* 0x000fca00078e0202 */ /*0fb0*/ SHFL.DOWN PT, R5, R2, 0x4, 0x1f ; /* 0x08801f0002057f89 */ /* 0x000e2400000e0000 */ /*0fc0*/ SEL R5, R5, RZ, !P0 ; /* 0x000000ff05057207 */ /* 0x001fe40004000000 */ /*0fd0*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*0fe0*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fe400078e0205 */ /*0ff0*/ @!P1 IMAD.SHL.U32 R2, R7, 0x4, RZ ; /* 0x0000000407029824 */ /* 0x000fc600078e00ff */ /*1000*/ SHFL.DOWN PT, R4, R5, 0x8, 0x1f ; /* 0x09001f0005047f89 */ /* 0x000e2400000e0000 */ /*1010*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*1020*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*1030*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*1040*/ SHFL.DOWN PT, R3, R4, 0x10, 0x1f ; /* 0x0a001f0004037f89 */ /* 0x000e2400000e0000 */ /*1050*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1060*/ ISETP.NE.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fc60003f05270 */ /*1070*/ IMAD.IADD R9, R4, 0x1, R3 ; /* 0x0000000104097824 */ /* 0x000fca00078e0203 */ /*1080*/ @!P1 STS [R2+0x8], R9 ; /* 0x0000080902009388 */ /* 0x0001e80000000800 */ /*1090*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*10a0*/ @P0 BRA 0x2130 ; /* 0x0000108000000947 */ /* 0x000fea0003800000 */ /*10b0*/ LDS R2, [0xc] ; /* 0x00000c00ff027984 */ /* 0x001fe20000000800 */ /*10c0*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */ /* 0x000fc600078e00ff */ /*10d0*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*10e0*/ LDS.64 R10, [0x20] ; /* 0x00002000ff0a7984 */ /* 0x000e620000000a00 */ /*10f0*/ IADD3 R2, R4, R2, R9 ; /* 0x0000000204027210 */ /* 0x001fc80007ffe009 */ /*1100*/ IADD3 R2, R6, R2, R5 ; /* 0x0000000206027210 */ /* 0x000fc80007ffe005 */ /*1110*/ IADD3 R2, R10, R2, R7 ; /* 0x000000020a027210 */ /* 0x002fca0007ffe007 */ /*1120*/ IMAD.IADD R9, R2, 0x1, R11 ; /* 0x0000000102097824 */ /* 0x000fe200078e020b */ /*1130*/ BRA 0x2130 ; /* 0x00000ff000007947 */ /* 0x000fea0003800000 */ /*1140*/ ISETP.GE.AND P0, PT, R18, R16, PT ; /* 0x000000101200720c */ /* 0x000fe20003f06270 */ /*1150*/ BSSY B1, 0x1ad0 ; /* 0x0000097000017945 */ /* 0x000fe20003800000 */ /*1160*/ IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff147224 */ /* 0x000fd600078e00ff */ /*1170*/ @P0 BRA 0x1ac0 ; /* 0x0000094000000947 */ /* 0x000fea0003800000 */ /*1180*/ IMAD.IADD R20, R15, 0x1, R18 ; /* 0x000000010f147824 */ /* 0x000fe400078e0212 */ /*1190*/ IMAD.MOV.U32 R21, RZ, RZ, 0x4 ; /* 0x00000004ff157424 */ /* 0x000fc800078e00ff */ /*11a0*/ IMAD.WIDE.U32 R20, R20, R21, c[0x0][0x160] ; /* 0x0000580014147625 */ /* 0x000fcc00078e0015 */ /*11b0*/ LDG.E R20, [R20.64] ; /* 0x0000000614147981 */ /* 0x000162000c1e1900 */ /*11c0*/ IADD3 R18, R18, 0x100, RZ ; /* 0x0000010012127810 */ /* 0x000fc80007ffe0ff */ /*11d0*/ ISETP.GE.AND P0, PT, R18, R16, PT ; /* 0x000000101200720c */ /* 0x000fda0003f06270 */ /*11e0*/ @P0 BRA 0x1ac0 ; /* 0x000008d000000947 */ /* 0x000fea0003800000 */ /*11f0*/ LOP3.LUT R2, RZ, R18, RZ, 0x33, !PT ; /* 0x00000012ff027212 */ /* 0x001fe200078e33ff */ /*1200*/ BSSY B2, 0x1320 ; /* 0x0000011000027945 */ /* 0x000fe60003800000 */ /*1210*/ IADD3 R3, -R15, c[0x0][0x188], R2 ; /* 0x000062000f037a10 */ /* 0x000fc80007ffe102 */ /*1220*/ LEA.HI R2, R3.reuse, 0x1, RZ, 0x18 ; /* 0x0000000103027811 */ /* 0x040fe400078fc0ff */ /*1230*/ ISETP.GE.U32.AND P1, PT, R3, 0x300, PT ; /* 0x000003000300780c */ /* 0x000fe40003f26070 */ /*1240*/ LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */ /* 0x000fda000780c0ff */ /*1250*/ @!P0 BRA 0x1310 ; /* 0x000000b000008947 */ /* 0x000fea0003800000 */ /*1260*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */ /* 0x000fe400078e0002 */ /*1270*/ IMAD.IADD R5, R15, 0x1, R18 ; /* 0x000000010f057824 */ /* 0x000fe400078e0212 */ /*1280*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */ /* 0x000fc800078e00ff */ /*1290*/ IMAD.WIDE.U32 R2, R5, R2, c[0x0][0x160] ; /* 0x0000580005027625 */ /* 0x000fcc00078e0002 */ /*12a0*/ LDG.E R3, [R2.64] ; /* 0x0000000602037981 */ /* 0x000ea2000c1e1900 */ /*12b0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */ /* 0x000fe40007ffe0ff */ /*12c0*/ IADD3 R18, R18, 0x100, RZ ; /* 0x0000010012127810 */ /* 0x000fe40007ffe0ff */ /*12d0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe40003f05270 */ /*12e0*/ IADD3 R5, R5, 0x100, RZ ; /* 0x0000010005057810 */ /* 0x000fe20007ffe0ff */ /*12f0*/ IMAD.IADD R20, R3, 0x1, R20 ; /* 0x0000000103147824 */ /* 0x024fd400078e0214 */ /*1300*/ @P0 BRA 0x1280 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*1310*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1320*/ @!P1 BRA 0x1ac0 ; /* 0x0000079000009947 */ /* 0x000fea0003800000 */ /*1330*/ IMAD.IADD R2, R16, 0x1, -R18 ; /* 0x0000000110027824 */ /* 0x000fe200078e0a12 */ /*1340*/ BSSY B2, 0x1780 ; /* 0x0000043000027945 */ /* 0x000fe20003800000 */ /*1350*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*1360*/ IADD3 R19, R18, 0x300, R15 ; /* 0x0000030012137810 */ /* 0x000fe40007ffe00f */ /*1370*/ ISETP.GT.AND P1, PT, R2, 0xc00, PT ; /* 0x00000c000200780c */ /* 0x000fda0003f24270 */ /*1380*/ @!P1 BRA 0x1770 ; /* 0x000003e000009947 */ /* 0x000fea0003800000 */ /*1390*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*13a0*/ IADD3 R17, R16, -0xc00, RZ ; /* 0xfffff40010117810 */ /* 0x000fe40007ffe0ff */ /*13b0*/ IADD3 R5, R19, -0x200, RZ ; /* 0xfffffe0013057810 */ /* 0x000fe20007ffe0ff */ /*13c0*/ IMAD.IADD R3, R15, 0x1, R18.reuse ; /* 0x000000010f037824 */ /* 0x100fe200078e0212 */ /*13d0*/ IADD3 R31, R19, -0x100, RZ ; /* 0xffffff00131f7810 */ /* 0x000fe20007ffe0ff */ /*13e0*/ IMAD.MOV.U32 R28, RZ, RZ, 0x4 ; /* 0x00000004ff1c7424 */ /* 0x000fe200078e00ff */ /*13f0*/ IADD3 R9, R15, 0x400, R18 ; /* 0x000004000f097810 */ /* 0x000fc60007ffe012 */ /*1400*/ IMAD.WIDE.U32 R2, R3, R28, c[0x0][0x160] ; /* 0x0000580003027625 */ /* 0x000fe200078e001c */ /*1410*/ IADD3 R11, R19, 0x200, RZ ; /* 0x00000200130b7810 */ /* 0x000fc60007ffe0ff */ /*1420*/ IMAD.WIDE.U32 R4, R5, R28.reuse, c[0x0][0x160] ; /* 0x0000580005047625 */ /* 0x080fe200078e001c */ /*1430*/ LDG.E R23, [R2.64] ; /* 0x0000000602177981 */ /* 0x0000a6000c1e1900 */ /*1440*/ IMAD.WIDE.U32 R30, R31, R28.reuse, c[0x0][0x160] ; /* 0x000058001f1e7625 */ /* 0x080fe200078e001c */ /*1450*/ LDG.E R22, [R4.64] ; /* 0x0000000604167981 */ /* 0x0002a6000c1e1900 */ /*1460*/ IMAD.WIDE.U32 R6, R19.reuse, R28.reuse, c[0x0][0x160] ; /* 0x0000580013067625 */ /* 0x0c0fe200078e001c */ /*1470*/ IADD3 R13, R19.reuse, 0x300, RZ ; /* 0x00000300130d7810 */ /* 0x040fe20007ffe0ff */ /*1480*/ LDG.E R21, [R30.64] ; /* 0x000000061e157981 */ /* 0x000722000c1e1900 */ /*1490*/ IADD3 R27, R19, 0x400, RZ ; /* 0x00000400131b7810 */ /* 0x000fe20007ffe0ff */ /*14a0*/ IMAD.WIDE.U32 R8, R9, R28, c[0x0][0x160] ; /* 0x0000580009087625 */ /* 0x000fc400078e001c */ /*14b0*/ LDG.E R24, [R6.64] ; /* 0x0000000606187981 */ /* 0x000124000c1e1900 */ /*14c0*/ IMAD.WIDE.U32 R10, R11, R28.reuse, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x080fe200078e001c */ /*14d0*/ IADD3 R29, R15, 0x800, R18 ; /* 0x000008000f1d7810 */ /* 0x000fe20007ffe012 */ /*14e0*/ LDG.E R25, [R8.64] ; /* 0x0000000608197981 */ /* 0x000322000c1e1900 */ /*14f0*/ IADD3 R31, R19, 0x600, RZ ; /* 0x00000600131f7810 */ /* 0x008fe20007ffe0ff */ /*1500*/ IMAD.WIDE.U32 R12, R13, R28.reuse, c[0x0][0x160] ; /* 0x000058000d0c7625 */ /* 0x080fe200078e001c */ /*1510*/ IADD3 R33, R19, 0x700, RZ ; /* 0x0000070013217810 */ /* 0x000fe20007ffe0ff */ /*1520*/ LDG.E R26, [R10.64] ; /* 0x000000060a1a7981 */ /* 0x000724000c1e1900 */ /*1530*/ IMAD.WIDE.U32 R2, R27, R28, c[0x0][0x160] ; /* 0x000058001b027625 */ /* 0x001fc400078e001c */ /*1540*/ LDG.E R27, [R12.64] ; /* 0x000000060c1b7981 */ /* 0x000124000c1e1900 */ /*1550*/ IMAD.WIDE.U32 R6, R31, R28.reuse, c[0x0][0x160] ; /* 0x000058001f067625 */ /* 0x080fe200078e001c */ /*1560*/ IADD3 R31, R15, 0xc00, R18 ; /* 0x00000c000f1f7810 */ /* 0x000fe20007ffe012 */ /*1570*/ LDG.E R30, [R2.64] ; /* 0x00000006021e7981 */ /* 0x000122000c1e1900 */ /*1580*/ IADD3 R11, R19, 0x800, RZ ; /* 0x00000800130b7810 */ /* 0x008fe20007ffe0ff */ /*1590*/ IMAD.WIDE.U32 R4, R29, R28.reuse, c[0x0][0x160] ; /* 0x000058001d047625 */ /* 0x082fe400078e001c */ /*15a0*/ LDG.E R32, [R6.64] ; /* 0x0000000606207981 */ /* 0x0002e4000c1e1900 */ /*15b0*/ IMAD.WIDE.U32 R8, R33, R28.reuse, c[0x0][0x160] ; /* 0x0000580021087625 */ /* 0x080fe200078e001c */ /*15c0*/ IADD3 R33, R19, 0xa00, RZ ; /* 0x00000a0013217810 */ /* 0x000fe20007ffe0ff */ /*15d0*/ LDG.E R29, [R4.64] ; /* 0x00000006041d7981 */ /* 0x0002e4000c1e1900 */ /*15e0*/ IMAD.WIDE.U32 R10, R11, R28.reuse, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x080fe200078e001c */ /*15f0*/ IADD3 R35, R19, 0xb00, RZ ; /* 0x00000b0013237810 */ /* 0x000fe20007ffe0ff */ /*1600*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */ /* 0x000ee4000c1e1900 */ /*1610*/ IMAD.WIDE.U32 R12, R31, R28.reuse, c[0x0][0x160] ; /* 0x000058001f0c7625 */ /* 0x081fe200078e001c */ /*1620*/ IADD3 R31, R19, 0xc00, RZ ; /* 0x00000c00131f7810 */ /* 0x000fe20007ffe0ff */ /*1630*/ LDG.E R11, [R10.64] ; /* 0x000000060a0b7981 */ /* 0x000ee4000c1e1900 */ /*1640*/ IMAD.WIDE.U32 R2, R33, R28, c[0x0][0x160] ; /* 0x0000580021027625 */ /* 0x000fc400078e001c */ /*1650*/ LDG.E R12, [R12.64] ; /* 0x000000060c0c7981 */ /* 0x000ee4000c1e1900 */ /*1660*/ IMAD.WIDE.U32 R4, R35, R28.reuse, c[0x0][0x160] ; /* 0x0000580023047625 */ /* 0x082fe400078e001c */ /*1670*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000ee4000c1e1900 */ /*1680*/ IMAD.WIDE.U32 R6, R31, R28, c[0x0][0x160] ; /* 0x000058001f067625 */ /* 0x000fe400078e001c */ /*1690*/ LDG.E R5, [R4.64] ; /* 0x0000000604057981 */ /* 0x000ee8000c1e1900 */ /*16a0*/ LDG.E R6, [R6.64] ; /* 0x0000000606067981 */ /* 0x000ee2000c1e1900 */ /*16b0*/ IADD3 R18, R18, 0x1000, RZ ; /* 0x0000100012127810 */ /* 0x000fc80007ffe0ff */ /*16c0*/ ISETP.GE.AND P1, PT, R18, R17, PT ; /* 0x000000111200720c */ /* 0x000fe40003f26270 */ /*16d0*/ IADD3 R19, R19, 0x1000, RZ ; /* 0x0000100013137810 */ /* 0x000fe40007ffe0ff */ /*16e0*/ IADD3 R22, R22, R23, R20 ; /* 0x0000001716167210 */ /* 0x024fc80007ffe014 */ /*16f0*/ IADD3 R21, R24, R21, R22 ; /* 0x0000001518157210 */ /* 0x010fc80007ffe016 */ /*1700*/ IADD3 R21, R26, R25, R21 ; /* 0x000000191a157210 */ /* 0x000fc80007ffe015 */ /*1710*/ IADD3 R21, R30, R27, R21 ; /* 0x0000001b1e157210 */ /* 0x000fc80007ffe015 */ /*1720*/ IADD3 R21, R32, R29, R21 ; /* 0x0000001d20157210 */ /* 0x008fc80007ffe015 */ /*1730*/ IADD3 R11, R11, R8, R21 ; /* 0x000000080b0b7210 */ /* 0x000fc80007ffe015 */ /*1740*/ IADD3 R2, R2, R12, R11 ; /* 0x0000000c02027210 */ /* 0x000fc80007ffe00b */ /*1750*/ IADD3 R20, R6, R5, R2 ; /* 0x0000000506147210 */ /* 0x000fe20007ffe002 */ /*1760*/ @!P1 BRA 0x13b0 ; /* 0xfffffc4000009947 */ /* 0x000fea000383ffff */ /*1770*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1780*/ IMAD.IADD R2, R16, 0x1, -R18 ; /* 0x0000000110027824 */ /* 0x000fe200078e0a12 */ /*1790*/ BSSY B2, 0x19c0 ; /* 0x0000022000027945 */ /* 0x000fe80003800000 */ /*17a0*/ ISETP.GT.AND P1, PT, R2, 0x400, PT ; /* 0x000004000200780c */ /* 0x000fda0003f24270 */ /*17b0*/ @!P1 BRA 0x19b0 ; /* 0x000001f000009947 */ /* 0x000fea0003800000 */ /*17c0*/ IADD3 R4, R19, -0x200, RZ ; /* 0xfffffe0013047810 */ /* 0x000fe20007ffe0ff */ /*17d0*/ IMAD.IADD R12, R15, 0x1, R18.reuse ; /* 0x000000010f0c7824 */ /* 0x100fe200078e0212 */ /*17e0*/ IADD3 R6, R19, -0x100, RZ ; /* 0xffffff0013067810 */ /* 0x000fe20007ffe0ff */ /*17f0*/ IMAD.MOV.U32 R25, RZ, RZ, 0x4 ; /* 0x00000004ff197424 */ /* 0x000fe200078e00ff */ /*1800*/ IADD3 R10, R15, 0x400, R18 ; /* 0x000004000f0a7810 */ /* 0x000fc60007ffe012 */ /*1810*/ IMAD.WIDE.U32 R12, R12, R25, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x000fe200078e0019 */ /*1820*/ IADD3 R2, R19, 0x200, RZ ; /* 0x0000020013027810 */ /* 0x000fc60007ffe0ff */ /*1830*/ IMAD.WIDE.U32 R4, R4, R25.reuse, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x080fe200078e0019 */ /*1840*/ LDG.E R17, [R12.64] ; /* 0x000000060c117981 */ /* 0x0000a6000c1e1900 */ /*1850*/ IMAD.WIDE.U32 R6, R6, R25.reuse, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x080fe200078e0019 */ /*1860*/ LDG.E R21, [R4.64] ; /* 0x0000000604157981 */ /* 0x0002a6000c1e1900 */ /*1870*/ IMAD.WIDE.U32 R8, R19.reuse, R25.reuse, c[0x0][0x160] ; /* 0x0000580013087625 */ /* 0x0c0fe200078e0019 */ /*1880*/ IADD3 R23, R19.reuse, 0x300, RZ ; /* 0x0000030013177810 */ /* 0x040fe20007ffe0ff */ /*1890*/ LDG.E R6, [R6.64] ; /* 0x0000000606067981 */ /* 0x000ee2000c1e1900 */ /*18a0*/ IADD3 R22, R19, 0x400, RZ ; /* 0x0000040013167810 */ /* 0x000fe20007ffe0ff */ /*18b0*/ IMAD.WIDE.U32 R10, R10, R25, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fc400078e0019 */ /*18c0*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */ /* 0x000ee4000c1e1900 */ /*18d0*/ IMAD.WIDE.U32 R2, R2, R25.reuse, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x080fe400078e0019 */ /*18e0*/ LDG.E R11, [R10.64] ; /* 0x000000060a0b7981 */ /* 0x000f24000c1e1900 */ /*18f0*/ IMAD.WIDE.U32 R12, R23, R25.reuse, c[0x0][0x160] ; /* 0x00005800170c7625 */ /* 0x081fe400078e0019 */ /*1900*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000f24000c1e1900 */ /*1910*/ IMAD.WIDE.U32 R4, R22, R25, c[0x0][0x160] ; /* 0x0000580016047625 */ /* 0x002fc400078e0019 */ /*1920*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000f28000c1e1900 */ /*1930*/ LDG.E R4, [R4.64] ; /* 0x0000000604047981 */ /* 0x000f22000c1e1900 */ /*1940*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*1950*/ IADD3 R18, R18, 0x800, RZ ; /* 0x0000080012127810 */ /* 0x000fe40007ffe0ff */ /*1960*/ IADD3 R19, R19, 0x800, RZ ; /* 0x0000080013137810 */ /* 0x000fe40007ffe0ff */ /*1970*/ IADD3 R17, R21, R17, R20 ; /* 0x0000001115117210 */ /* 0x024fc80007ffe014 */ /*1980*/ IADD3 R6, R8, R6, R17 ; /* 0x0000000608067210 */ /* 0x008fc80007ffe011 */ /*1990*/ IADD3 R6, R2, R11, R6 ; /* 0x0000000b02067210 */ /* 0x010fc80007ffe006 */ /*19a0*/ IADD3 R20, R4, R13, R6 ; /* 0x0000000d04147210 */ /* 0x000fe40007ffe006 */ /*19b0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*19c0*/ ISETP.LT.OR P0, PT, R18, R16, P0 ; /* 0x000000101200720c */ /* 0x000fda0000701670 */ /*19d0*/ @!P0 BRA 0x1ac0 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*19e0*/ IADD3 R4, R19, -0x200, RZ ; /* 0xfffffe0013047810 */ /* 0x000fe20007ffe0ff */ /*19f0*/ IMAD.IADD R2, R15, 0x1, R18 ; /* 0x000000010f027824 */ /* 0x000fe200078e0212 */ /*1a00*/ IADD3 R6, R19, -0x100, RZ ; /* 0xffffff0013067810 */ /* 0x000fe20007ffe0ff */ /*1a10*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */ /* 0x000fc800078e00ff */ /*1a20*/ IMAD.WIDE.U32 R2, R2, R9, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fc800078e0009 */ /*1a30*/ IMAD.WIDE.U32 R4, R4, R9.reuse, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x080fe400078e0009 */ /*1a40*/ LDG.E R3, [R2.64] ; /* 0x0000000602037981 */ /* 0x000ea4000c1e1900 */ /*1a50*/ IMAD.WIDE.U32 R6, R6, R9.reuse, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x080fe400078e0009 */ /*1a60*/ LDG.E R4, [R4.64] ; /* 0x0000000604047981 */ /* 0x000ea4000c1e1900 */ /*1a70*/ IMAD.WIDE.U32 R8, R19, R9, c[0x0][0x160] ; /* 0x0000580013087625 */ /* 0x000fe400078e0009 */ /*1a80*/ LDG.E R7, [R6.64] ; /* 0x0000000606077981 */ /* 0x000ee8000c1e1900 */ /*1a90*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */ /* 0x000ee2000c1e1900 */ /*1aa0*/ IADD3 R20, R4, R3, R20 ; /* 0x0000000304147210 */ /* 0x024fc80007ffe014 */ /*1ab0*/ IADD3 R20, R8, R7, R20 ; /* 0x0000000708147210 */ /* 0x008fe40007ffe014 */ /*1ac0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x001fea0003800000 */ /*1ad0*/ ISETP.GT.AND P0, PT, R16, 0xff, PT ; /* 0x000000ff1000780c */ /* 0x000fda0003f04270 */ /*1ae0*/ @P0 BRA 0x1ee0 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*1af0*/ SHF.R.S32.HI R3, RZ, 0x1f, R14 ; /* 0x0000001fff037819 */ /* 0x000fe2000001140e */ /*1b00*/ S2R R8, SR_LANEID ; /* 0x0000000000087919 */ /* 0x000e260000000000 */ /*1b10*/ LEA.HI R7, R3, R14, RZ, 0x5 ; /* 0x0000000e03077211 */ /* 0x000fc800078f28ff */ /*1b20*/ LOP3.LUT R2, R7, 0xffffffe0, RZ, 0xc0, !PT ; /* 0xffffffe007027812 */ /* 0x000fe400078ec0ff */ /*1b30*/ SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff077819 */ /* 0x000fe40000011407 */ /*1b40*/ LOP3.LUT R5, RZ, R2, RZ, 0x33, !PT ; /* 0x00000002ff057212 */ /* 0x000fe400078e33ff */ /*1b50*/ IADD3 R3, R2, 0x20, RZ ; /* 0x0000002002037810 */ /* 0x000fc60007ffe0ff */ /*1b60*/ IMAD.IADD R5, R16, 0x1, R5 ; /* 0x0000000110057824 */ /* 0x000fe200078e0205 */ /*1b70*/ ISETP.GT.AND P0, PT, R3, R16, PT ; /* 0x000000100300720c */ /* 0x000fc80003f04270 */ /*1b80*/ SEL R5, R5, 0x1f, P0 ; /* 0x0000001f05057807 */ /* 0x000fe40000000000 */ /*1b90*/ IADD3 R4, R8, 0x2, RZ ; /* 0x0000000208047810 */ /* 0x001fc60007ffe0ff */ /*1ba0*/ SHFL.DOWN PT, R2, R20, 0x1, R5 ; /* 0x0820000014027989 */ /* 0x020e2200000e0005 */ /*1bb0*/ ISETP.GE.AND P0, PT, R8.reuse, R5.reuse, PT ; /* 0x000000050800720c */ /* 0x0c0fe40003f06270 */ /*1bc0*/ IADD3 R6, R8.reuse, 0x4, RZ ; /* 0x0000000408067810 */ /* 0x040fe40007ffe0ff */ /*1bd0*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f25270 */ /*1be0*/ SEL R3, R2, RZ, !P0 ; /* 0x000000ff02037207 */ /* 0x001fe40004000000 */ /*1bf0*/ ISETP.GT.AND P0, PT, R4, R5, PT ; /* 0x000000050400720c */ /* 0x000fc60003f04270 */ /*1c00*/ IMAD.IADD R2, R3, 0x1, R20 ; /* 0x0000000103027824 */ /* 0x000fca00078e0214 */ /*1c10*/ SHFL.DOWN PT, R3, R2, 0x2, R5 ; /* 0x0840000002037989 */ /* 0x000e2400000e0005 */ /*1c20*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1c30*/ ISETP.GT.AND P0, PT, R6, R5, PT ; /* 0x000000050600720c */ /* 0x000fc60003f04270 */ /*1c40*/ IMAD.IADD R4, R2, 0x1, R3 ; /* 0x0000000102047824 */ /* 0x000fe200078e0203 */ /*1c50*/ IADD3 R2, R8, 0x8, RZ ; /* 0x0000000808027810 */ /* 0x000fc80007ffe0ff */ /*1c60*/ SHFL.DOWN PT, R3, R4, 0x4, R5 ; /* 0x0880000004037989 */ /* 0x000e2400000e0005 */ /*1c70*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1c80*/ ISETP.GT.AND P0, PT, R2, R5, PT ; /* 0x000000050200720c */ /* 0x000fc60003f04270 */ /*1c90*/ IMAD.IADD R6, R4, 0x1, R3 ; /* 0x0000000104067824 */ /* 0x000fe200078e0203 */ /*1ca0*/ IADD3 R4, R8, 0x10, RZ ; /* 0x0000001008047810 */ /* 0x000fc80007ffe0ff */ /*1cb0*/ SHFL.DOWN PT, R3, R6, 0x8, R5 ; /* 0x0900000006037989 */ /* 0x000e2400000e0005 */ /*1cc0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1cd0*/ ISETP.GT.AND P0, PT, R4, R5, PT ; /* 0x000000050400720c */ /* 0x000fe20003f04270 */ /*1ce0*/ @!P1 IMAD.SHL.U32 R4, R7, 0x4, RZ ; /* 0x0000000407049824 */ /* 0x000fe400078e00ff */ /*1cf0*/ IMAD.IADD R2, R6, 0x1, R3 ; /* 0x0000000106027824 */ /* 0x000fca00078e0203 */ /*1d00*/ SHFL.DOWN PT, R3, R2, 0x10, R5 ; /* 0x0a00000002037989 */ /* 0x000e2400000e0005 */ /*1d10*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1d20*/ ISETP.NE.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fc60003f05270 */ /*1d30*/ IMAD.IADD R9, R2, 0x1, R3 ; /* 0x0000000102097824 */ /* 0x000fca00078e0203 */ /*1d40*/ @!P1 STS [R4+0x8], R9 ; /* 0x0000080904009388 */ /* 0x0001e80000000800 */ /*1d50*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1d60*/ @P0 BRA 0x2130 ; /* 0x000003c000000947 */ /* 0x000fea0003800000 */ /*1d70*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x001e220000000c00 */ /*1d80*/ ISETP.GT.AND P2, PT, R16.reuse, 0x80, PT ; /* 0x000000801000780c */ /* 0x040fe20003f44270 */ /*1d90*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e00ff */ /*1da0*/ ISETP.GT.AND P1, PT, R16.reuse, 0x40, PT ; /* 0x000000401000780c */ /* 0x040fe20003f24270 */ /*1db0*/ LDS R2, [0xc] ; /* 0x00000c00ff027984 */ /* 0x000e620000000800 */ /*1dc0*/ ISETP.GT.AND P0, PT, R16, 0x20, PT ; /* 0x000000201000780c */ /* 0x000fc60003f04270 */ /*1dd0*/ LDS.64 R10, [0x20] ; /* 0x00002000ff0a7984 */ /* 0x000ea20000000a00 */ /*1de0*/ SEL R6, R6, RZ, P2 ; /* 0x000000ff06067207 */ /* 0x001fe40001000000 */ /*1df0*/ ISETP.GE.AND P2, PT, R16, 0xe1, PT ; /* 0x000000e11000780c */ /* 0x000fe40003f46270 */ /*1e00*/ SEL R4, R4, RZ, P1 ; /* 0x000000ff04047207 */ /* 0x000fe40000800000 */ /*1e10*/ ISETP.GT.AND P1, PT, R16, 0x60, PT ; /* 0x000000601000780c */ /* 0x000fe40003f24270 */ /*1e20*/ SEL R2, R2, RZ, P0 ; /* 0x000000ff02027207 */ /* 0x002fe40000000000 */ /*1e30*/ SEL R5, R5, RZ, P1 ; /* 0x000000ff05057207 */ /* 0x000fc40000800000 */ /*1e40*/ IADD3 R2, R4, R9, R2 ; /* 0x0000000904027210 */ /* 0x000fe40007ffe002 */ /*1e50*/ ISETP.GT.AND P0, PT, R16.reuse, 0xa0, PT ; /* 0x000000a01000780c */ /* 0x040fe40003f04270 */ /*1e60*/ ISETP.GT.AND P1, PT, R16, 0xc0, PT ; /* 0x000000c01000780c */ /* 0x000fe40003f24270 */ /*1e70*/ SEL R7, R7, RZ, P0 ; /* 0x000000ff07077207 */ /* 0x000fe40000000000 */ /*1e80*/ IADD3 R2, R6, R2, R5 ; /* 0x0000000206027210 */ /* 0x000fe40007ffe005 */ /*1e90*/ SEL R10, R10, RZ, P1 ; /* 0x000000ff0a0a7207 */ /* 0x004fc80000800000 */ /*1ea0*/ IADD3 R9, R10, R2, R7 ; /* 0x000000020a097210 */ /* 0x000fe20007ffe007 */ /*1eb0*/ @!P2 BRA 0x2130 ; /* 0x000002700000a947 */ /* 0x000fea0003800000 */ /*1ec0*/ IMAD.IADD R9, R9, 0x1, R11 ; /* 0x0000000109097824 */ /* 0x000fe200078e020b */ /*1ed0*/ BRA 0x2130 ; /* 0x0000025000007947 */ /* 0x000fea0003800000 */ /*1ee0*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e220000000000 */ /*1ef0*/ ISETP.NE.AND P2, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fc60003f45270 */ /*1f00*/ SHFL.DOWN PT, R2, R20, 0x1, 0x1f ; /* 0x08201f0014027f89 */ /* 0x020e6200000e0000 */ /*1f10*/ ISETP.GT.AND P0, PT, R6.reuse, 0x1e, PT ; /* 0x0000001e0600780c */ /* 0x041fe40003f04270 */ /*1f20*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f25270 */ /*1f30*/ SEL R3, R2, RZ, !P0 ; /* 0x000000ff02037207 */ /* 0x002fe40004000000 */ /*1f40*/ ISETP.GT.AND P0, PT, R6, 0x1d, PT ; /* 0x0000001d0600780c */ /* 0x000fc60003f04270 */ /*1f50*/ IMAD.IADD R3, R3, 0x1, R20 ; /* 0x0000000103037824 */ /* 0x000fca00078e0214 */ /*1f60*/ SHFL.DOWN PT, R2, R3, 0x2, 0x1f ; /* 0x08401f0003027f89 */ /* 0x000e2200000e0000 */ /*1f70*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R14 ; /* 0x0000001fff079819 */ /* 0x000fc8000001140e */ /*1f80*/ @!P1 LEA.HI R7, R7, R14, RZ, 0x5 ; /* 0x0000000e07079211 */ /* 0x000fe200078f28ff */ /*1f90*/ @!P2 IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0ea224 */ /* 0x000fc600078e00ff */ /*1fa0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fca0000011407 */ /*1fb0*/ @!P1 IMAD.SHL.U32 R8, R7, 0x4, RZ ; /* 0x0000000407089824 */ /* 0x000fe200078e00ff */ /*1fc0*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x001fe40004000000 */ /*1fd0*/ ISETP.GT.AND P0, PT, R6, 0x1b, PT ; /* 0x0000001b0600780c */ /* 0x000fc60003f04270 */ /*1fe0*/ IMAD.IADD R2, R3, 0x1, R2 ; /* 0x0000000103027824 */ /* 0x000fca00078e0202 */ /*1ff0*/ SHFL.DOWN PT, R4, R2, 0x4, 0x1f ; /* 0x08801f0002047f89 */ /* 0x000e2400000e0000 */ /*2000*/ SEL R5, R4, RZ, !P0 ; /* 0x000000ff04057207 */ /* 0x001fe40004000000 */ /*2010*/ ISETP.GT.AND P0, PT, R6, 0x17, PT ; /* 0x000000170600780c */ /* 0x000fc60003f04270 */ /*2020*/ IMAD.IADD R5, R2, 0x1, R5 ; /* 0x0000000102057824 */ /* 0x000fca00078e0205 */ /*2030*/ SHFL.DOWN PT, R4, R5, 0x8, 0x1f ; /* 0x09001f0005047f89 */ /* 0x000e2400000e0000 */ /*2040*/ SEL R4, R4, RZ, !P0 ; /* 0x000000ff04047207 */ /* 0x001fe40004000000 */ /*2050*/ ISETP.GT.AND P0, PT, R6, 0xf, PT ; /* 0x0000000f0600780c */ /* 0x000fc60003f04270 */ /*2060*/ IMAD.IADD R4, R5, 0x1, R4 ; /* 0x0000000105047824 */ /* 0x000fca00078e0204 */ /*2070*/ SHFL.DOWN PT, R3, R4, 0x10, 0x1f ; /* 0x0a001f0004037f89 */ /* 0x000e2400000e0000 */ /*2080*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fca0004000000 */ /*2090*/ IMAD.IADD R9, R4, 0x1, R3 ; /* 0x0000000104097824 */ /* 0x000fca00078e0203 */ /*20a0*/ @!P1 STS [R8+0x8], R9 ; /* 0x0000080908009388 */ /* 0x000fe80000000800 */ /*20b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*20c0*/ @!P2 LDS R2, [0xc] ; /* 0x00000c00ff02a984 */ /* 0x000fe80000000800 */ /*20d0*/ @!P2 LDS.128 R4, [0x10] ; /* 0x00001000ff04a984 */ /* 0x000e280000000c00 */ /*20e0*/ @!P2 LDS.64 R10, [0x20] ; /* 0x00002000ff0aa984 */ /* 0x000e620000000a00 */ /*20f0*/ @!P2 IADD3 R2, R4, R2, R9 ; /* 0x000000020402a210 */ /* 0x001fc80007ffe009 */ /*2100*/ @!P2 IADD3 R2, R6, R2, R5 ; /* 0x000000020602a210 */ /* 0x000fc80007ffe005 */ /*2110*/ @!P2 IADD3 R2, R10, R2, R7 ; /* 0x000000020a02a210 */ /* 0x002fca0007ffe007 */ /*2120*/ @!P2 IMAD.IADD R9, R2, 0x1, R11 ; /* 0x000000010209a824 */ /* 0x000fe400078e020b */ /*2130*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*2140*/ ISETP.NE.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fda0003f05270 */ /*2150*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*2160*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc800078e00ff */ /*2170*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x168] ; /* 0x00005a0000027625 */ /* 0x000fca00078e0003 */ /*2180*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x000fe2000c101906 */ /*2190*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*21a0*/ BRA 0x21a0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*21b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _ZN3cub17CUB_200700_890_NS28DeviceReduceSingleTileKernelINS0_18DeviceReducePolicyIijN6thrust20THRUST_200700_890_NS4plusIiEEE9Policy600ENS4_6detail15normal_iteratorINS4_10device_ptrIiEEEEPijS6_iiN4cuda3std3__410__identityEEEvT0_T1_T2_T3_T4_T6_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a0c */ /* 0x000fe20003f05270 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fd80000000a00 */ /*0030*/ @!P0 BRA 0x20b0 ; /* 0x0000207000008947 */ /* 0x000fea0003800000 */ /*0040*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */ /* 0x000e220000002100 */ /*0050*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff007624 */ /* 0x000fe200078e00ff */ /*0060*/ BSSY B0, 0x2040 ; /* 0x00001fd000007945 */ /* 0x000fe80003800000 */ /*0070*/ ISETP.GE.U32.AND P0, PT, R0, 0x1000, PT ; /* 0x000010000000780c */ /* 0x000fe20003f06070 */ /*0080*/ IMAD.MOV.U32 R7, RZ, RZ, R6 ; /* 0x000000ffff077224 */ /* 0x001fd800078e0006 */ /*0090*/ @!P0 BRA 0x10a0 ; /* 0x0000100000008947 */ /* 0x000fea0003800000 */ /*00a0*/ IMAD.MOV.U32 R20, RZ, RZ, 0x4 ; /* 0x00000004ff147424 */ /* 0x000fc800078e00ff */ /*00b0*/ IMAD.WIDE R2, R7, R20, c[0x0][0x160] ; /* 0x0000580007027625 */ /* 0x000fca00078e0214 */ /*00c0*/ LDG.E R4, [R2.64+0x400] ; /* 0x0004000402047981 */ /* 0x000ea8000c1e1900 */ /*00d0*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */ /* 0x000ea8000c1e1900 */ /*00e0*/ LDG.E R7, [R2.64+0x800] ; /* 0x0008000402077981 */ /* 0x000ea8000c1e1900 */ /*00f0*/ LDG.E R9, [R2.64+0xc00] ; /* 0x000c000402097981 */ /* 0x000ee8000c1e1900 */ /*0100*/ LDG.E R8, [R2.64+0x1000] ; /* 0x0010000402087981 */ /* 0x000ee8000c1e1900 */ /*0110*/ LDG.E R11, [R2.64+0x1400] ; /* 0x00140004020b7981 */ /* 0x000f28000c1e1900 */ /*0120*/ LDG.E R10, [R2.64+0x1800] ; /* 0x00180004020a7981 */ /* 0x000f28000c1e1900 */ /*0130*/ LDG.E R13, [R2.64+0x1c00] ; /* 0x001c0004020d7981 */ /* 0x000f68000c1e1900 */ /*0140*/ LDG.E R12, [R2.64+0x2000] ; /* 0x00200004020c7981 */ /* 0x000f68000c1e1900 */ /*0150*/ LDG.E R15, [R2.64+0x2400] ; /* 0x00240004020f7981 */ /* 0x000f68000c1e1900 */ /*0160*/ LDG.E R14, [R2.64+0x2800] ; /* 0x00280004020e7981 */ /* 0x000f68000c1e1900 */ /*0170*/ LDG.E R17, [R2.64+0x2c00] ; /* 0x002c000402117981 */ /* 0x000f68000c1e1900 */ /*0180*/ LDG.E R16, [R2.64+0x3000] ; /* 0x0030000402107981 */ /* 0x000f68000c1e1900 */ /*0190*/ LDG.E R19, [R2.64+0x3400] ; /* 0x0034000402137981 */ /* 0x000f68000c1e1900 */ /*01a0*/ LDG.E R18, [R2.64+0x3800] ; /* 0x0038000402127981 */ /* 0x000f68000c1e1900 */ /*01b0*/ LDG.E R21, [R2.64+0x3c00] ; /* 0x003c000402157981 */ /* 0x000f62000c1e1900 */ /*01c0*/ IADD3 R4, R7, R4, R5 ; /* 0x0000000407047210 */ /* 0x004fc40007ffe005 */ /*01d0*/ IADD3 R5, R0, -0x1000, RZ ; /* 0xfffff00000057810 */ /* 0x000fe20007ffe0ff */ /*01e0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1000 ; /* 0x00001000ff007424 */ /* 0x000fc600078e00ff */ /*01f0*/ ISETP.GE.U32.AND P0, PT, R5, 0x1000, PT ; /* 0x000010000500780c */ /* 0x000fe40003f06070 */ /*0200*/ IADD3 R4, R8, R9, R4 ; /* 0x0000000908047210 */ /* 0x008fc80007ffe004 */ /*0210*/ IADD3 R4, R10, R11, R4 ; /* 0x0000000b0a047210 */ /* 0x010fc80007ffe004 */ /*0220*/ IADD3 R4, R12, R13, R4 ; /* 0x0000000d0c047210 */ /* 0x020fc80007ffe004 */ /*0230*/ IADD3 R4, R14, R15, R4 ; /* 0x0000000f0e047210 */ /* 0x000fc80007ffe004 */ /*0240*/ IADD3 R4, R16, R17, R4 ; /* 0x0000001110047210 */ /* 0x000fc80007ffe004 */ /*0250*/ IADD3 R4, R18, R19, R4 ; /* 0x0000001312047210 */ /* 0x000fca0007ffe004 */ /*0260*/ IMAD.IADD R4, R4, 0x1, R21 ; /* 0x0000000104047824 */ /* 0x000fe200078e0215 */ /*0270*/ @!P0 BRA 0x4a0 ; /* 0x0000022000008947 */ /* 0x000fea0003800000 */ /*0280*/ IMAD.WIDE R6, R6, R20, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x000fc800078e0214 */ /*0290*/ IMAD.MOV.U32 R8, RZ, RZ, R5 ; /* 0x000000ffff087224 */ /* 0x000fe400078e0005 */ /*02a0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1000 ; /* 0x00001000ff007424 */ /* 0x000fc800078e00ff */ /*02b0*/ IMAD.WIDE.U32 R2, R0, 0x4, R6 ; /* 0x0000000400027825 */ /* 0x000fca00078e0006 */ /*02c0*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */ /* 0x000ea8000c1e1900 */ /*02d0*/ LDG.E R10, [R2.64+0x400] ; /* 0x00040004020a7981 */ /* 0x000ea8000c1e1900 */ /*02e0*/ LDG.E R12, [R2.64+0x800] ; /* 0x00080004020c7981 */ /* 0x000ee8000c1e1900 */ /*02f0*/ LDG.E R11, [R2.64+0xc00] ; /* 0x000c0004020b7981 */ /* 0x000ee8000c1e1900 */ /*0300*/ LDG.E R14, [R2.64+0x1000] ; /* 0x00100004020e7981 */ /* 0x000f28000c1e1900 */ /*0310*/ LDG.E R13, [R2.64+0x1400] ; /* 0x00140004020d7981 */ /* 0x000f28000c1e1900 */ /*0320*/ LDG.E R16, [R2.64+0x1800] ; /* 0x0018000402107981 */ /* 0x000f68000c1e1900 */ /*0330*/ LDG.E R15, [R2.64+0x1c00] ; /* 0x001c0004020f7981 */ /* 0x000f68000c1e1900 */ /*0340*/ LDG.E R18, [R2.64+0x2000] ; /* 0x0020000402127981 */ /* 0x000f68000c1e1900 */ /*0350*/ LDG.E R17, [R2.64+0x2400] ; /* 0x0024000402117981 */ /* 0x000f68000c1e1900 */ /*0360*/ LDG.E R20, [R2.64+0x2800] ; /* 0x0028000402147981 */ /* 0x000f68000c1e1900 */ /*0370*/ LDG.E R19, [R2.64+0x2c00] ; /* 0x002c000402137981 */ /* 0x000f68000c1e1900 */ /*0380*/ LDG.E R22, [R2.64+0x3000] ; /* 0x0030000402167981 */ /* 0x000f68000c1e1900 */ /*0390*/ LDG.E R21, [R2.64+0x3400] ; /* 0x0034000402157981 */ /* 0x000f68000c1e1900 */ /*03a0*/ LDG.E R24, [R2.64+0x3800] ; /* 0x0038000402187981 */ /* 0x000f68000c1e1900 */ /*03b0*/ LDG.E R23, [R2.64+0x3c00] ; /* 0x003c000402177981 */ /* 0x000f62000c1e1900 */ /*03c0*/ ISETP.GE.U32.AND P0, PT, R8, 0x1000, PT ; /* 0x000010000800780c */ /* 0x000fc40003f06070 */ /*03d0*/ IADD3 R9, R10, R9, R4 ; /* 0x000000090a097210 */ /* 0x004fc80007ffe004 */ /*03e0*/ IADD3 R9, R11, R12, R9 ; /* 0x0000000c0b097210 */ /* 0x008fc80007ffe009 */ /*03f0*/ IADD3 R9, R13, R14, R9 ; /* 0x0000000e0d097210 */ /* 0x010fc80007ffe009 */ /*0400*/ IADD3 R9, R15, R16, R9 ; /* 0x000000100f097210 */ /* 0x020fc80007ffe009 */ /*0410*/ IADD3 R9, R17, R18, R9 ; /* 0x0000001211097210 */ /* 0x000fc80007ffe009 */ /*0420*/ IADD3 R9, R19, R20, R9 ; /* 0x0000001413097210 */ /* 0x000fc80007ffe009 */ /*0430*/ IADD3 R9, R21, R22, R9 ; /* 0x0000001615097210 */ /* 0x000fc80007ffe009 */ /*0440*/ IADD3 R4, R23, R24, R9 ; /* 0x0000001817047210 */ /* 0x000fe20007ffe009 */ /*0450*/ @!P0 BRA 0xe20 ; /* 0x000009c000008947 */ /* 0x000fea0003800000 */ /*0460*/ IADD3 R0, R0, 0x1000, RZ ; /* 0x0000100000007810 */ /* 0x000fe40007ffe0ff */ /*0470*/ IADD3 R8, R8, -0x1000, RZ ; /* 0xfffff00008087810 */ /* 0x000fe40007ffe0ff */ /*0480*/ ISETP.GT.U32.AND P0, PT, R0, R5, PT ; /* 0x000000050000720c */ /* 0x000fda0003f04070 */ /*0490*/ @!P0 BRA 0x2b0 ; /* 0xfffffe1000008947 */ /* 0x000fea000383ffff */ /*04a0*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */ /* 0x000fda0003f06070 */ /*04b0*/ @P0 BRA 0xe20 ; /* 0x0000096000000947 */ /* 0x000fea0003800000 */ /*04c0*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e220000002100 */ /*04d0*/ IADD3 R18, -R0, c[0x0][0x170], RZ ; /* 0x00005c0000127a10 */ /* 0x000fe20007ffe1ff */ /*04e0*/ BSSY B1, 0xe20 ; /* 0x0000093000017945 */ /* 0x000fe60003800000 */ /*04f0*/ ISETP.GE.AND P0, PT, R5, R18, PT ; /* 0x000000120500720c */ /* 0x001fda0003f06270 */ /*0500*/ @P0 BRA 0xe10 ; /* 0x0000090000000947 */ /* 0x000fea0003800000 */ /*0510*/ LOP3.LUT R3, RZ, R5, RZ, 0x33, !PT ; /* 0x00000005ff037212 */ /* 0x000fe200078e33ff */ /*0520*/ BSSY B2, 0x670 ; /* 0x0000014000027945 */ /* 0x000fe60003800000 */ /*0530*/ IADD3 R3, -R0, c[0x0][0x170], R3 ; /* 0x00005c0000037a10 */ /* 0x000fc80007ffe103 */ /*0540*/ LEA.HI R2, R3.reuse, 0x1, RZ, 0x18 ; /* 0x0000000103027811 */ /* 0x040fe400078fc0ff */ /*0550*/ ISETP.GE.U32.AND P1, PT, R3, 0x300, PT ; /* 0x000003000300780c */ /* 0x000fe40003f26070 */ /*0560*/ LOP3.LUT P0, RZ, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302ff7812 */ /* 0x000fda000780c0ff */ /*0570*/ @!P0 BRA 0x660 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*0580*/ LOP3.LUT R3, RZ, R5, RZ, 0x33, !PT ; /* 0x00000005ff037212 */ /* 0x000fe200078e33ff */ /*0590*/ IMAD.IADD R6, R5, 0x1, R0 ; /* 0x0000000105067824 */ /* 0x000fc600078e0200 */ /*05a0*/ IADD3 R3, -R0, c[0x0][0x170], R3 ; /* 0x00005c0000037a10 */ /* 0x000fc80007ffe103 */ /*05b0*/ LEA.HI R3, R3, 0x1, RZ, 0x18 ; /* 0x0000000103037811 */ /* 0x000fc800078fc0ff */ /*05c0*/ LOP3.LUT R7, R3, 0x3, RZ, 0xc0, !PT ; /* 0x0000000303077812 */ /* 0x000fe400078ec0ff */ /*05d0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc800078e00ff */ /*05e0*/ IMAD.WIDE.U32 R2, R6, R3, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x000fcc00078e0003 */ /*05f0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*0600*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*0610*/ IADD3 R5, R5, 0x100, RZ ; /* 0x0000010005057810 */ /* 0x000fe40007ffe0ff */ /*0620*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*0630*/ IADD3 R6, R6, 0x100, RZ ; /* 0x0000010006067810 */ /* 0x000fe20007ffe0ff */ /*0640*/ IMAD.IADD R4, R3, 0x1, R4 ; /* 0x0000000103047824 */ /* 0x004fd400078e0204 */ /*0650*/ @P0 BRA 0x5d0 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*0660*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0670*/ @!P1 BRA 0xe10 ; /* 0x0000079000009947 */ /* 0x000fea0003800000 */ /*0680*/ IMAD.IADD R2, R18, 0x1, -R5 ; /* 0x0000000112027824 */ /* 0x000fe200078e0a05 */ /*0690*/ BSSY B2, 0xad0 ; /* 0x0000043000027945 */ /* 0x000fe20003800000 */ /*06a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*06b0*/ IADD3 R17, R5, 0x300, R0 ; /* 0x0000030005117810 */ /* 0x000fe40007ffe000 */ /*06c0*/ ISETP.GT.AND P1, PT, R2, 0xc00, PT ; /* 0x00000c000200780c */ /* 0x000fda0003f24270 */ /*06d0*/ @!P1 BRA 0xac0 ; /* 0x000003e000009947 */ /* 0x000fea0003800000 */ /*06e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*06f0*/ IADD3 R16, R18, -0xc00, RZ ; /* 0xfffff40012107810 */ /* 0x000fe40007ffe0ff */ /*0700*/ IADD3 R25, R17.reuse, -0x200, RZ ; /* 0xfffffe0011197810 */ /* 0x040fe20007ffe0ff */ /*0710*/ IMAD.MOV.U32 R26, RZ, RZ, 0x4 ; /* 0x00000004ff1a7424 */ /* 0x000fe200078e00ff */ /*0720*/ IADD3 R7, R17, -0x100, RZ ; /* 0xffffff0011077810 */ /* 0x000fe20007ffe0ff */ /*0730*/ IMAD.IADD R3, R5, 0x1, R0 ; /* 0x0000000105037824 */ /* 0x000fe400078e0200 */ /*0740*/ IMAD.WIDE.U32 R24, R25, R26, c[0x0][0x160] ; /* 0x0000580019187625 */ /* 0x000fe200078e001a */ /*0750*/ IADD3 R11, R0, 0x400, R5 ; /* 0x00000400000b7810 */ /* 0x000fc60007ffe005 */ /*0760*/ IMAD.WIDE.U32 R2, R3, R26.reuse, c[0x0][0x160] ; /* 0x0000580003027625 */ /* 0x080fe200078e001a */ /*0770*/ IADD3 R13, R17, 0x200, RZ ; /* 0x00000200110d7810 */ /* 0x000fe20007ffe0ff */ /*0780*/ LDG.E R24, [R24.64] ; /* 0x0000000418187981 */ /* 0x0000a4000c1e1900 */ /*0790*/ IMAD.WIDE.U32 R6, R7, R26.reuse, c[0x0][0x160] ; /* 0x0000580007067625 */ /* 0x080fe200078e001a */ /*07a0*/ IADD3 R29, R17.reuse, 0x400, RZ ; /* 0x00000400111d7810 */ /* 0x040fe20007ffe0ff */ /*07b0*/ LDG.E R19, [R2.64] ; /* 0x0000000402137981 */ /* 0x0002a4000c1e1900 */ /*07c0*/ IMAD.WIDE.U32 R8, R17.reuse, R26.reuse, c[0x0][0x160] ; /* 0x0000580011087625 */ /* 0x0c0fe200078e001a */ /*07d0*/ IADD3 R15, R17, 0x300, RZ ; /* 0x00000300110f7810 */ /* 0x000fe20007ffe0ff */ /*07e0*/ LDG.E R23, [R6.64] ; /* 0x0000000406177981 */ /* 0x000724000c1e1900 */ /*07f0*/ IMAD.WIDE.U32 R10, R11, R26, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x000fc400078e001a */ /*0800*/ LDG.E R22, [R8.64] ; /* 0x0000000408167981 */ /* 0x000b24000c1e1900 */ /*0810*/ IMAD.WIDE.U32 R12, R13, R26.reuse, c[0x0][0x160] ; /* 0x000058000d0c7625 */ /* 0x080fe200078e001a */ /*0820*/ IADD3 R27, R0, 0x800, R5 ; /* 0x00000800001b7810 */ /* 0x000fe20007ffe005 */ /*0830*/ LDG.E R21, [R10.64] ; /* 0x000000040a157981 */ /* 0x000122000c1e1900 */ /*0840*/ IADD3 R31, R17, 0x700, RZ ; /* 0x00000700111f7810 */ /* 0x000fe20007ffe0ff */ /*0850*/ IMAD.WIDE.U32 R28, R29, R26.reuse, c[0x0][0x160] ; /* 0x000058001d1c7625 */ /* 0x080fe200078e001a */ /*0860*/ IADD3 R7, R17, 0x600, RZ ; /* 0x0000060011077810 */ /* 0x008fe20007ffe0ff */ /*0870*/ LDG.E R20, [R12.64] ; /* 0x000000040c147981 */ /* 0x000724000c1e1900 */ /*0880*/ IMAD.WIDE.U32 R2, R15, R26, c[0x0][0x160] ; /* 0x000058000f027625 */ /* 0x002fc400078e001a */ /*0890*/ LDG.E R28, [R28.64] ; /* 0x000000041c1c7981 */ /* 0x000322000c1e1900 */ /*08a0*/ IADD3 R11, R17, 0x800, RZ ; /* 0x00000800110b7810 */ /* 0x001fe20007ffe0ff */ /*08b0*/ IMAD.WIDE.U32 R14, R27, R26.reuse, c[0x0][0x160] ; /* 0x000058001b0e7625 */ /* 0x080fe400078e001a */ /*08c0*/ LDG.E R25, [R2.64] ; /* 0x0000000402197981 */ /* 0x000124000c1e1900 */ /*08d0*/ IMAD.WIDE.U32 R6, R7, R26.reuse, c[0x0][0x160] ; /* 0x0000580007067625 */ /* 0x080fe200078e001a */ /*08e0*/ IADD3 R13, R0, 0xc00, R5 ; /* 0x00000c00000d7810 */ /* 0x008fe20007ffe005 */ /*08f0*/ LDG.E R27, [R14.64] ; /* 0x000000040e1b7981 */ /* 0x000724000c1e1900 */ /*0900*/ IMAD.WIDE.U32 R8, R31, R26.reuse, c[0x0][0x160] ; /* 0x000058001f087625 */ /* 0x0a0fe200078e001a */ /*0910*/ IADD3 R31, R17, 0xa00, RZ ; /* 0x00000a00111f7810 */ /* 0x000fe20007ffe0ff */ /*0920*/ LDG.E R30, [R6.64] ; /* 0x00000004061e7981 */ /* 0x000b24000c1e1900 */ /*0930*/ IMAD.WIDE.U32 R10, R11, R26.reuse, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x080fe200078e001a */ /*0940*/ IADD3 R33, R17.reuse, 0xb00, RZ ; /* 0x00000b0011217810 */ /* 0x040fe20007ffe0ff */ /*0950*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000f22000c1e1900 */ /*0960*/ IADD3 R29, R17, 0xc00, RZ ; /* 0x00000c00111d7810 */ /* 0x002fe20007ffe0ff */ /*0970*/ IMAD.WIDE.U32 R12, R13, R26, c[0x0][0x160] ; /* 0x000058000d0c7625 */ /* 0x000fc400078e001a */ /*0980*/ LDG.E R11, [R10.64] ; /* 0x000000040a0b7981 */ /* 0x000f24000c1e1900 */ /*0990*/ IMAD.WIDE.U32 R2, R31, R26.reuse, c[0x0][0x160] ; /* 0x000058001f027625 */ /* 0x081fe400078e001a */ /*09a0*/ LDG.E R13, [R12.64] ; /* 0x000000040c0d7981 */ /* 0x000f24000c1e1900 */ /*09b0*/ IMAD.WIDE.U32 R14, R33, R26.reuse, c[0x0][0x160] ; /* 0x00005800210e7625 */ /* 0x088fe400078e001a */ /*09c0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ee4000c1e1900 */ /*09d0*/ IMAD.WIDE.U32 R6, R29, R26, c[0x0][0x160] ; /* 0x000058001d067625 */ /* 0x020fc400078e001a */ /*09e0*/ LDG.E R15, [R14.64] ; /* 0x000000040e0f7981 */ /* 0x000f68000c1e1900 */ /*09f0*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000f62000c1e1900 */ /*0a00*/ IADD3 R5, R5, 0x1000, RZ ; /* 0x0000100005057810 */ /* 0x000fc80007ffe0ff */ /*0a10*/ ISETP.GE.AND P1, PT, R5, R16, PT ; /* 0x000000100500720c */ /* 0x000fe40003f26270 */ /*0a20*/ IADD3 R17, R17, 0x1000, RZ ; /* 0x0000100011117810 */ /* 0x000fe40007ffe0ff */ /*0a30*/ IADD3 R19, R24, R19, R4 ; /* 0x0000001318137210 */ /* 0x004fc80007ffe004 */ /*0a40*/ IADD3 R19, R22, R23, R19 ; /* 0x0000001716137210 */ /* 0x010fc80007ffe013 */ /*0a50*/ IADD3 R19, R20, R21, R19 ; /* 0x0000001514137210 */ /* 0x000fc80007ffe013 */ /*0a60*/ IADD3 R19, R28, R25, R19 ; /* 0x000000191c137210 */ /* 0x000fc80007ffe013 */ /*0a70*/ IADD3 R19, R30, R27, R19 ; /* 0x0000001b1e137210 */ /* 0x000fc80007ffe013 */ /*0a80*/ IADD3 R8, R11, R8, R19 ; /* 0x000000080b087210 */ /* 0x000fc80007ffe013 */ /*0a90*/ IADD3 R2, R2, R13, R8 ; /* 0x0000000d02027210 */ /* 0x008fc80007ffe008 */ /*0aa0*/ IADD3 R4, R6, R15, R2 ; /* 0x0000000f06047210 */ /* 0x020fe20007ffe002 */ /*0ab0*/ @!P1 BRA 0x700 ; /* 0xfffffc4000009947 */ /* 0x000fea000383ffff */ /*0ac0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0ad0*/ IMAD.IADD R2, R18, 0x1, -R5 ; /* 0x0000000112027824 */ /* 0x000fe200078e0a05 */ /*0ae0*/ BSSY B2, 0xd10 ; /* 0x0000022000027945 */ /* 0x000fe80003800000 */ /*0af0*/ ISETP.GT.AND P1, PT, R2, 0x400, PT ; /* 0x000004000200780c */ /* 0x000fda0003f24270 */ /*0b00*/ @!P1 BRA 0xd00 ; /* 0x000001f000009947 */ /* 0x000fea0003800000 */ /*0b10*/ IADD3 R6, R17, -0x200, RZ ; /* 0xfffffe0011067810 */ /* 0x000fe20007ffe0ff */ /*0b20*/ IMAD.IADD R2, R5, 0x1, R0 ; /* 0x0000000105027824 */ /* 0x000fe200078e0200 */ /*0b30*/ IADD3 R8, R17, -0x100, RZ ; /* 0xffffff0011087810 */ /* 0x000fe20007ffe0ff */ /*0b40*/ IMAD.MOV.U32 R23, RZ, RZ, 0x4 ; /* 0x00000004ff177424 */ /* 0x000fe200078e00ff */ /*0b50*/ IADD3 R12, R0, 0x400, R5 ; /* 0x00000400000c7810 */ /* 0x000fc60007ffe005 */ /*0b60*/ IMAD.WIDE.U32 R2, R2, R23, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fe200078e0017 */ /*0b70*/ IADD3 R14, R17, 0x200, RZ ; /* 0x00000200110e7810 */ /* 0x000fc60007ffe0ff */ /*0b80*/ IMAD.WIDE.U32 R6, R6, R23.reuse, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x080fe200078e0017 */ /*0b90*/ LDG.E R19, [R2.64] ; /* 0x0000000402137981 */ /* 0x0000a6000c1e1900 */ /*0ba0*/ IMAD.WIDE.U32 R8, R8, R23.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe200078e0017 */ /*0bb0*/ LDG.E R16, [R6.64] ; /* 0x0000000406107981 */ /* 0x0002a6000c1e1900 */ /*0bc0*/ IMAD.WIDE.U32 R10, R17.reuse, R23.reuse, c[0x0][0x160] ; /* 0x00005800110a7625 */ /* 0x0c0fe200078e0017 */ /*0bd0*/ IADD3 R21, R17.reuse, 0x300, RZ ; /* 0x0000030011157810 */ /* 0x040fe20007ffe0ff */ /*0be0*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */ /* 0x000ee2000c1e1900 */ /*0bf0*/ IADD3 R20, R17, 0x400, RZ ; /* 0x0000040011147810 */ /* 0x000fe20007ffe0ff */ /*0c00*/ IMAD.WIDE.U32 R12, R12, R23, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x000fc400078e0017 */ /*0c10*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee4000c1e1900 */ /*0c20*/ IMAD.WIDE.U32 R14, R14, R23.reuse, c[0x0][0x160] ; /* 0x000058000e0e7625 */ /* 0x080fe400078e0017 */ /*0c30*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */ /* 0x000f24000c1e1900 */ /*0c40*/ IMAD.WIDE.U32 R2, R21, R23.reuse, c[0x0][0x160] ; /* 0x0000580015027625 */ /* 0x081fe400078e0017 */ /*0c50*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000f24000c1e1900 */ /*0c60*/ IMAD.WIDE.U32 R6, R20, R23, c[0x0][0x160] ; /* 0x0000580014067625 */ /* 0x002fc400078e0017 */ /*0c70*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000f68000c1e1900 */ /*0c80*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000f62000c1e1900 */ /*0c90*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0ca0*/ IADD3 R5, R5, 0x800, RZ ; /* 0x0000080005057810 */ /* 0x000fe40007ffe0ff */ /*0cb0*/ IADD3 R17, R17, 0x800, RZ ; /* 0x0000080011117810 */ /* 0x000fe40007ffe0ff */ /*0cc0*/ IADD3 R16, R16, R19, R4 ; /* 0x0000001310107210 */ /* 0x004fc80007ffe004 */ /*0cd0*/ IADD3 R9, R10, R9, R16 ; /* 0x000000090a097210 */ /* 0x008fc80007ffe010 */ /*0ce0*/ IADD3 R9, R14, R12, R9 ; /* 0x0000000c0e097210 */ /* 0x010fc80007ffe009 */ /*0cf0*/ IADD3 R4, R6, R2, R9 ; /* 0x0000000206047210 */ /* 0x020fe40007ffe009 */ /*0d00*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0d10*/ ISETP.LT.OR P0, PT, R5, R18, P0 ; /* 0x000000120500720c */ /* 0x000fda0000701670 */ /*0d20*/ @!P0 BRA 0xe10 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*0d30*/ IADD3 R6, R17, -0x200, RZ ; /* 0xfffffe0011067810 */ /* 0x000fe20007ffe0ff */ /*0d40*/ IMAD.IADD R2, R5, 0x1, R0 ; /* 0x0000000105027824 */ /* 0x000fe200078e0200 */ /*0d50*/ IADD3 R8, R17, -0x100, RZ ; /* 0xffffff0011087810 */ /* 0x000fe20007ffe0ff */ /*0d60*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ; /* 0x00000004ff0b7424 */ /* 0x000fc800078e00ff */ /*0d70*/ IMAD.WIDE.U32 R2, R2, R11, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fc800078e000b */ /*0d80*/ IMAD.WIDE.U32 R6, R6, R11.reuse, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x080fe400078e000b */ /*0d90*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea4000c1e1900 */ /*0da0*/ IMAD.WIDE.U32 R8, R8, R11.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe400078e000b */ /*0db0*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ea4000c1e1900 */ /*0dc0*/ IMAD.WIDE.U32 R10, R17, R11, c[0x0][0x160] ; /* 0x00005800110a7625 */ /* 0x000fe400078e000b */ /*0dd0*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */ /* 0x000ee8000c1e1900 */ /*0de0*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee2000c1e1900 */ /*0df0*/ IADD3 R4, R6, R3, R4 ; /* 0x0000000306047210 */ /* 0x004fc80007ffe004 */ /*0e00*/ IADD3 R4, R10, R9, R4 ; /* 0x000000090a047210 */ /* 0x008fe40007ffe004 */ /*0e10*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0e20*/ S2R R8, SR_LANEID ; /* 0x0000000000087919 */ /* 0x000e280000000000 */ /*0e30*/ SHFL.DOWN PT, R0, R4, 0x1, 0x1f ; /* 0x08201f0004007f89 */ /* 0x000e6800000e0000 */ /*0e40*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */ /* 0x000ea20000002100 */ /*0e50*/ ISETP.GT.AND P0, PT, R8.reuse, 0x1e, PT ; /* 0x0000001e0800780c */ /* 0x041fe40003f04270 */ /*0e60*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fc40003f25270 */ /*0e70*/ SEL R3, R0, RZ, !P0 ; /* 0x000000ff00037207 */ /* 0x002fe40004000000 */ /*0e80*/ ISETP.GT.AND P0, PT, R8, 0x1d, PT ; /* 0x0000001d0800780c */ /* 0x000fc60003f04270 */ /*0e90*/ IMAD.IADD R3, R3, 0x1, R4 ; /* 0x0000000103037824 */ /* 0x000fca00078e0204 */ /*0ea0*/ SHFL.DOWN PT, R0, R3, 0x2, 0x1f ; /* 0x08401f0003007f89 */ /* 0x000e2200000e0000 */ /*0eb0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R6 ; /* 0x0000001fff079819 */ /* 0x004fc80000011406 */ /*0ec0*/ @!P1 LEA.HI R7, R7, R6, RZ, 0x5 ; /* 0x0000000607079211 */ /* 0x000fc800078f28ff */ /*0ed0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fe40000011407 */ /*0ee0*/ SEL R0, R0, RZ, !P0 ; /* 0x000000ff00007207 */ /* 0x001fe40004000000 */ /*0ef0*/ ISETP.GT.AND P0, PT, R8, 0x1b, PT ; /* 0x0000001b0800780c */ /* 0x000fc60003f04270 */ /*0f00*/ IMAD.IADD R0, R3, 0x1, R0 ; /* 0x0000000103007824 */ /* 0x000fca00078e0200 */ /*0f10*/ SHFL.DOWN PT, R2, R0, 0x4, 0x1f ; /* 0x08801f0000027f89 */ /* 0x000e2400000e0000 */ /*0f20*/ SEL R5, R2, RZ, !P0 ; /* 0x000000ff02057207 */ /* 0x001fe40004000000 */ /*0f30*/ ISETP.GT.AND P0, PT, R8, 0x17, PT ; /* 0x000000170800780c */ /* 0x000fc60003f04270 */ /*0f40*/ IMAD.IADD R5, R0, 0x1, R5 ; /* 0x0000000100057824 */ /* 0x000fe400078e0205 */ /*0f50*/ @!P1 IMAD.SHL.U32 R0, R7, 0x4, RZ ; /* 0x0000000407009824 */ /* 0x000fc600078e00ff */ /*0f60*/ SHFL.DOWN PT, R2, R5, 0x8, 0x1f ; /* 0x09001f0005027f89 */ /* 0x000e2400000e0000 */ /*0f70*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x001fe40004000000 */ /*0f80*/ ISETP.GT.AND P0, PT, R8, 0xf, PT ; /* 0x0000000f0800780c */ /* 0x000fc60003f04270 */ /*0f90*/ IMAD.IADD R2, R5, 0x1, R2 ; /* 0x0000000105027824 */ /* 0x000fca00078e0202 */ /*0fa0*/ SHFL.DOWN PT, R3, R2, 0x10, 0x1f ; /* 0x0a001f0002037f89 */ /* 0x000e2400000e0000 */ /*0fb0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*0fc0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fc60003f05270 */ /*0fd0*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*0fe0*/ @!P1 STS [R0+0x8], R3 ; /* 0x0000080300009388 */ /* 0x0001e80000000800 */ /*0ff0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1000*/ @P0 BRA 0x2030 ; /* 0x0000102000000947 */ /* 0x000fea0003800000 */ /*1010*/ LDS R0, [0xc] ; /* 0x00000c00ff007984 */ /* 0x001fe80000000800 */ /*1020*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x000e280000000c00 */ /*1030*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000e620000000a00 */ /*1040*/ IADD3 R0, R4, R0, R3 ; /* 0x0000000004007210 */ /* 0x001fc80007ffe003 */ /*1050*/ IADD3 R0, R6, R0, R5 ; /* 0x0000000006007210 */ /* 0x000fe20007ffe005 */ /*1060*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fc600078e00ff */ /*1070*/ IADD3 R0, R8, R0, R7 ; /* 0x0000000008007210 */ /* 0x002fca0007ffe007 */ /*1080*/ IMAD.IADD R3, R0, 0x1, R9 ; /* 0x0000000100037824 */ /* 0x000fe200078e0209 */ /*1090*/ BRA 0x2030 ; /* 0x00000f9000007947 */ /* 0x000fea0003800000 */ /*10a0*/ ISETP.GE.AND P0, PT, R7, c[0x0][0x170], PT ; /* 0x00005c0007007a0c */ /* 0x000fe20003f06270 */ /*10b0*/ BSSY B1, 0x19d0 ; /* 0x0000091000017945 */ /* 0x000fe20003800000 */ /*10c0*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */ /* 0x000fd600078e00ff */ /*10d0*/ @P0 BRA 0x19c0 ; /* 0x000008e000000947 */ /* 0x000fea0003800000 */ /*10e0*/ IMAD.MOV.U32 R16, RZ, RZ, 0x4 ; /* 0x00000004ff107424 */ /* 0x000fc800078e00ff */ /*10f0*/ IMAD.WIDE.U32 R16, R7, R16, c[0x0][0x160] ; /* 0x0000580007107625 */ /* 0x000fcc00078e0010 */ /*1100*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */ /* 0x000162000c1e1900 */ /*1110*/ IADD3 R7, R7, 0x100, RZ ; /* 0x0000010007077810 */ /* 0x000fc80007ffe0ff */ /*1120*/ ISETP.GE.AND P0, PT, R7, c[0x0][0x170], PT ; /* 0x00005c0007007a0c */ /* 0x000fda0003f06270 */ /*1130*/ @P0 BRA 0x19c0 ; /* 0x0000088000000947 */ /* 0x000fea0003800000 */ /*1140*/ LOP3.LUT R2, RZ, R7, RZ, 0x33, !PT ; /* 0x00000007ff027212 */ /* 0x001fe200078e33ff */ /*1150*/ BSSY B2, 0x1250 ; /* 0x000000f000027945 */ /* 0x000fe60003800000 */ /*1160*/ IADD3 R3, R2, c[0x0][0x170], RZ ; /* 0x00005c0002037a10 */ /* 0x000fc80007ffe0ff */ /*1170*/ LEA.HI R2, R3.reuse, 0x1, RZ, 0x18 ; /* 0x0000000103027811 */ /* 0x040fe400078fc0ff */ /*1180*/ ISETP.GE.U32.AND P1, PT, R3, 0x300, PT ; /* 0x000003000300780c */ /* 0x000fe40003f26070 */ /*1190*/ LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */ /* 0x000fda000780c0ff */ /*11a0*/ @!P0 BRA 0x1240 ; /* 0x0000009000008947 */ /* 0x000fea0003800000 */ /*11b0*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */ /* 0x000fe400078e0002 */ /*11c0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */ /* 0x000fc800078e00ff */ /*11d0*/ IMAD.WIDE.U32 R2, R7, R2, c[0x0][0x160] ; /* 0x0000580007027625 */ /* 0x000fcc00078e0002 */ /*11e0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*11f0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */ /* 0x000fe40007ffe0ff */ /*1200*/ IADD3 R7, R7, 0x100, RZ ; /* 0x0000010007077810 */ /* 0x000fe40007ffe0ff */ /*1210*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe20003f05270 */ /*1220*/ IMAD.IADD R16, R3, 0x1, R16 ; /* 0x0000000103107824 */ /* 0x024fd800078e0210 */ /*1230*/ @P0 BRA 0x11c0 ; /* 0xffffff8000000947 */ /* 0x000fea000383ffff */ /*1240*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1250*/ @!P1 BRA 0x19c0 ; /* 0x0000076000009947 */ /* 0x000fea0003800000 */ /*1260*/ IADD3 R2, -R7, c[0x0][0x170], RZ ; /* 0x00005c0007027a10 */ /* 0x000fe20007ffe1ff */ /*1270*/ BSSY B2, 0x1690 ; /* 0x0000041000027945 */ /* 0x000fe20003800000 */ /*1280*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*1290*/ ISETP.GT.AND P1, PT, R2, 0xc00, PT ; /* 0x00000c000200780c */ /* 0x000fda0003f24270 */ /*12a0*/ @!P1 BRA 0x1680 ; /* 0x000003d000009947 */ /* 0x000fea0003800000 */ /*12b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*12c0*/ IADD3 R18, R0, -0xc00, RZ ; /* 0xfffff40000127810 */ /* 0x000fe40007ffe0ff */ /*12d0*/ IADD3 R3, R7.reuse, 0x100, RZ ; /* 0x0000010007037810 */ /* 0x040fe20007ffe0ff */ /*12e0*/ IMAD.MOV.U32 R14, RZ, RZ, 0x4 ; /* 0x00000004ff0e7424 */ /* 0x000fe200078e00ff */ /*12f0*/ IADD3 R5, R7.reuse, 0x200, RZ ; /* 0x0000020007057810 */ /* 0x040fe40007ffe0ff */ /*1300*/ IADD3 R9, R7, 0x300, RZ ; /* 0x0000030007097810 */ /* 0x000fe20007ffe0ff */ /*1310*/ IMAD.WIDE.U32 R2, R3, R14, c[0x0][0x160] ; /* 0x0000580003027625 */ /* 0x000fe200078e000e */ /*1320*/ IADD3 R11, R7, 0x400, RZ ; /* 0x00000400070b7810 */ /* 0x000fc60007ffe0ff */ /*1330*/ IMAD.WIDE.U32 R26, R7.reuse, R14.reuse, c[0x0][0x160] ; /* 0x00005800071a7625 */ /* 0x0c0fe200078e000e */ /*1340*/ IADD3 R13, R7, 0x500, RZ ; /* 0x00000500070d7810 */ /* 0x000fe20007ffe0ff */ /*1350*/ LDG.E R17, [R2.64] ; /* 0x0000000402117981 */ /* 0x0000a4000c1e1900 */ /*1360*/ IMAD.WIDE.U32 R4, R5, R14.reuse, c[0x0][0x160] ; /* 0x0000580005047625 */ /* 0x080fe200078e000e */ /*1370*/ IADD3 R25, R7, 0x600, RZ ; /* 0x0000060007197810 */ /* 0x000fe20007ffe0ff */ /*1380*/ LDG.E R19, [R26.64] ; /* 0x000000041a137981 */ /* 0x0002a4000c1e1900 */ /*1390*/ IMAD.WIDE.U32 R8, R9, R14.reuse, c[0x0][0x160] ; /* 0x0000580009087625 */ /* 0x080fe200078e000e */ /*13a0*/ IADD3 R29, R7.reuse, 0x900, RZ ; /* 0x00000900071d7810 */ /* 0x040fe20007ffe0ff */ /*13b0*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */ /* 0x000722000c1e1900 */ /*13c0*/ IADD3 R3, R7, 0x700, RZ ; /* 0x0000070007037810 */ /* 0x001fe20007ffe0ff */ /*13d0*/ IMAD.WIDE.U32 R10, R11, R14, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x000fc400078e000e */ /*13e0*/ LDG.E R21, [R8.64] ; /* 0x0000000408157981 */ /* 0x000124000c1e1900 */ /*13f0*/ IMAD.WIDE.U32 R12, R13, R14.reuse, c[0x0][0x160] ; /* 0x000058000d0c7625 */ /* 0x080fe200078e000e */ /*1400*/ IADD3 R15, R7, 0x800, RZ ; /* 0x00000800070f7810 */ /* 0x000fe20007ffe0ff */ /*1410*/ LDG.E R22, [R10.64] ; /* 0x000000040a167981 */ /* 0x000124000c1e1900 */ /*1420*/ IMAD.WIDE.U32 R24, R25, R14.reuse, c[0x0][0x160] ; /* 0x0000580019187625 */ /* 0x080fe200078e000e */ /*1430*/ IADD3 R31, R7, 0xa00, RZ ; /* 0x00000a00071f7810 */ /* 0x000fe20007ffe0ff */ /*1440*/ LDG.E R23, [R12.64] ; /* 0x000000040c177981 */ /* 0x000724000c1e1900 */ /*1450*/ IMAD.WIDE.U32 R2, R3, R14, c[0x0][0x160] ; /* 0x0000580003027625 */ /* 0x000fc400078e000e */ /*1460*/ LDG.E R24, [R24.64] ; /* 0x0000000418187981 */ /* 0x000722000c1e1900 */ /*1470*/ IADD3 R11, R7, 0xb00, RZ ; /* 0x00000b00070b7810 */ /* 0x001fe20007ffe0ff */ /*1480*/ IMAD.WIDE.U32 R28, R29, R14.reuse, c[0x0][0x160] ; /* 0x000058001d1c7625 */ /* 0x080fe400078e000e */ /*1490*/ LDG.E R27, [R2.64] ; /* 0x00000004021b7981 */ /* 0x002124000c1e1900 */ /*14a0*/ IMAD.WIDE.U32 R4, R15, R14.reuse, c[0x0][0x160] ; /* 0x000058000f047625 */ /* 0x088fe200078e000e */ /*14b0*/ IADD3 R13, R7.reuse, 0xc00, RZ ; /* 0x00000c00070d7810 */ /* 0x040fe20007ffe0ff */ /*14c0*/ LDG.E R29, [R28.64] ; /* 0x000000041c1d7981 */ /* 0x000ee2000c1e1900 */ /*14d0*/ IADD3 R15, R7, 0xd00, RZ ; /* 0x00000d00070f7810 */ /* 0x000fe20007ffe0ff */ /*14e0*/ IMAD.WIDE.U32 R8, R31, R14.reuse, c[0x0][0x160] ; /* 0x000058001f087625 */ /* 0x080fe200078e000e */ /*14f0*/ IADD3 R25, R7, 0xe00, RZ ; /* 0x00000e0007197810 */ /* 0x000fe20007ffe0ff */ /*1500*/ LDG.E R26, [R4.64] ; /* 0x00000004041a7981 */ /* 0x0002e4000c1e1900 */ /*1510*/ IMAD.WIDE.U32 R10, R11, R14.reuse, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x080fe200078e000e */ /*1520*/ IADD3 R31, R7, 0xf00, RZ ; /* 0x00000f00071f7810 */ /* 0x000fe20007ffe0ff */ /*1530*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee4000c1e1900 */ /*1540*/ IMAD.WIDE.U32 R12, R13, R14, c[0x0][0x160] ; /* 0x000058000d0c7625 */ /* 0x000fc400078e000e */ /*1550*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee4000c1e1900 */ /*1560*/ IMAD.WIDE.U32 R2, R15, R14.reuse, c[0x0][0x160] ; /* 0x000058000f027625 */ /* 0x081fe400078e000e */ /*1570*/ LDG.E R13, [R12.64] ; /* 0x000000040c0d7981 */ /* 0x000ee4000c1e1900 */ /*1580*/ IMAD.WIDE.U32 R4, R25, R14.reuse, c[0x0][0x160] ; /* 0x0000580019047625 */ /* 0x082fe400078e000e */ /*1590*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ee4000c1e1900 */ /*15a0*/ IMAD.WIDE.U32 R14, R31, R14, c[0x0][0x160] ; /* 0x000058001f0e7625 */ /* 0x000fc400078e000e */ /*15b0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ee8000c1e1900 */ /*15c0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000ee2000c1e1900 */ /*15d0*/ IADD3 R7, R7, 0x1000, RZ ; /* 0x0000100007077810 */ /* 0x000fc80007ffe0ff */ /*15e0*/ ISETP.GE.AND P1, PT, R7, R18, PT ; /* 0x000000120700720c */ /* 0x000fe40003f26270 */ /*15f0*/ IADD3 R17, R17, R19, R16 ; /* 0x0000001311117210 */ /* 0x024fc80007ffe010 */ /*1600*/ IADD3 R17, R21, R20, R17 ; /* 0x0000001415117210 */ /* 0x010fc80007ffe011 */ /*1610*/ IADD3 R17, R23, R22, R17 ; /* 0x0000001617117210 */ /* 0x000fc80007ffe011 */ /*1620*/ IADD3 R17, R27, R24, R17 ; /* 0x000000181b117210 */ /* 0x000fc80007ffe011 */ /*1630*/ IADD3 R17, R29, R26, R17 ; /* 0x0000001a1d117210 */ /* 0x008fc80007ffe011 */ /*1640*/ IADD3 R8, R10, R8, R17 ; /* 0x000000080a087210 */ /* 0x000fc80007ffe011 */ /*1650*/ IADD3 R2, R2, R13, R8 ; /* 0x0000000d02027210 */ /* 0x000fc80007ffe008 */ /*1660*/ IADD3 R16, R14, R5, R2 ; /* 0x000000050e107210 */ /* 0x000fe20007ffe002 */ /*1670*/ @!P1 BRA 0x12d0 ; /* 0xfffffc5000009947 */ /* 0x000fea000383ffff */ /*1680*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1690*/ IADD3 R2, -R7, c[0x0][0x170], RZ ; /* 0x00005c0007027a10 */ /* 0x000fe20007ffe1ff */ /*16a0*/ BSSY B2, 0x18c0 ; /* 0x0000021000027945 */ /* 0x000fe60003800000 */ /*16b0*/ ISETP.GT.AND P1, PT, R2, 0x400, PT ; /* 0x000004000200780c */ /* 0x000fda0003f24270 */ /*16c0*/ @!P1 BRA 0x18b0 ; /* 0x000001e000009947 */ /* 0x000fea0003800000 */ /*16d0*/ IADD3 R2, R7.reuse, 0x100, RZ ; /* 0x0000010007027810 */ /* 0x040fe20007ffe0ff */ /*16e0*/ IMAD.MOV.U32 R21, RZ, RZ, 0x4 ; /* 0x00000004ff157424 */ /* 0x000fe200078e00ff */ /*16f0*/ IADD3 R4, R7.reuse, 0x200, RZ ; /* 0x0000020007047810 */ /* 0x040fe40007ffe0ff */ /*1700*/ IADD3 R8, R7.reuse, 0x300, RZ ; /* 0x0000030007087810 */ /* 0x040fe20007ffe0ff */ /*1710*/ IMAD.WIDE.U32 R2, R2, R21, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fe200078e0015 */ /*1720*/ IADD3 R10, R7, 0x400, RZ ; /* 0x00000400070a7810 */ /* 0x000fc60007ffe0ff */ /*1730*/ IMAD.WIDE.U32 R14, R7.reuse, R21.reuse, c[0x0][0x160] ; /* 0x00005800070e7625 */ /* 0x0c0fe200078e0015 */ /*1740*/ IADD3 R12, R7.reuse, 0x500, RZ ; /* 0x00000500070c7810 */ /* 0x040fe20007ffe0ff */ /*1750*/ LDG.E R18, [R2.64] ; /* 0x0000000402127981 */ /* 0x0000a4000c1e1900 */ /*1760*/ IMAD.WIDE.U32 R4, R4, R21.reuse, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x080fe200078e0015 */ /*1770*/ IADD3 R19, R7.reuse, 0x600, RZ ; /* 0x0000060007137810 */ /* 0x040fe20007ffe0ff */ /*1780*/ LDG.E R17, [R14.64] ; /* 0x000000040e117981 */ /* 0x0002a4000c1e1900 */ /*1790*/ IMAD.WIDE.U32 R8, R8, R21.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe200078e0015 */ /*17a0*/ IADD3 R20, R7, 0x700, RZ ; /* 0x0000070007147810 */ /* 0x000fe20007ffe0ff */ /*17b0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ee4000c1e1900 */ /*17c0*/ IMAD.WIDE.U32 R10, R10, R21, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fc400078e0015 */ /*17d0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee4000c1e1900 */ /*17e0*/ IMAD.WIDE.U32 R12, R12, R21.reuse, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x080fe400078e0015 */ /*17f0*/ LDG.E R11, [R10.64] ; /* 0x000000040a0b7981 */ /* 0x000f24000c1e1900 */ /*1800*/ IMAD.WIDE.U32 R2, R19, R21.reuse, c[0x0][0x160] ; /* 0x0000580013027625 */ /* 0x081fe400078e0015 */ /*1810*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */ /* 0x000f24000c1e1900 */ /*1820*/ IMAD.WIDE.U32 R14, R20, R21, c[0x0][0x160] ; /* 0x00005800140e7625 */ /* 0x002fc400078e0015 */ /*1830*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000f28000c1e1900 */ /*1840*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000f22000c1e1900 */ /*1850*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*1860*/ IADD3 R7, R7, 0x800, RZ ; /* 0x0000080007077810 */ /* 0x000fe40007ffe0ff */ /*1870*/ IADD3 R17, R18, R17, R16 ; /* 0x0000001112117210 */ /* 0x024fc80007ffe010 */ /*1880*/ IADD3 R4, R8, R4, R17 ; /* 0x0000000408047210 */ /* 0x008fc80007ffe011 */ /*1890*/ IADD3 R4, R12, R11, R4 ; /* 0x0000000b0c047210 */ /* 0x010fc80007ffe004 */ /*18a0*/ IADD3 R16, R14, R3, R4 ; /* 0x000000030e107210 */ /* 0x000fe40007ffe004 */ /*18b0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*18c0*/ ISETP.LT.OR P0, PT, R7, c[0x0][0x170], P0 ; /* 0x00005c0007007a0c */ /* 0x000fda0000701670 */ /*18d0*/ @!P0 BRA 0x19c0 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*18e0*/ IADD3 R4, R7.reuse, 0x100, RZ ; /* 0x0000010007047810 */ /* 0x040fe20007ffe0ff */ /*18f0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ; /* 0x00000004ff0b7424 */ /* 0x000fe200078e00ff */ /*1900*/ IADD3 R8, R7.reuse, 0x200, RZ ; /* 0x0000020007087810 */ /* 0x040fe40007ffe0ff */ /*1910*/ IADD3 R10, R7, 0x300, RZ ; /* 0x00000300070a7810 */ /* 0x000fe20007ffe0ff */ /*1920*/ IMAD.WIDE.U32 R4, R4, R11, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e000b */ /*1930*/ IMAD.WIDE.U32 R2, R7, R11.reuse, c[0x0][0x160] ; /* 0x0000580007027625 */ /* 0x080fe400078e000b */ /*1940*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea4000c1e1900 */ /*1950*/ IMAD.WIDE.U32 R8, R8, R11.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe400078e000b */ /*1960*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea4000c1e1900 */ /*1970*/ IMAD.WIDE.U32 R10, R10, R11, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fe400078e000b */ /*1980*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */ /* 0x000ee8000c1e1900 */ /*1990*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee2000c1e1900 */ /*19a0*/ IADD3 R16, R4, R3, R16 ; /* 0x0000000304107210 */ /* 0x024fc80007ffe010 */ /*19b0*/ IADD3 R16, R10, R9, R16 ; /* 0x000000090a107210 */ /* 0x008fe40007ffe010 */ /*19c0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x001fea0003800000 */ /*19d0*/ ISETP.GT.AND P0, PT, R0, 0xff, PT ; /* 0x000000ff0000780c */ /* 0x000fda0003f04270 */ /*19e0*/ @P0 BRA 0x1de0 ; /* 0x000003f000000947 */ /* 0x000fea0003800000 */ /*19f0*/ SHF.R.S32.HI R3, RZ, 0x1f, R6 ; /* 0x0000001fff037819 */ /* 0x000fe20000011406 */ /*1a00*/ S2R R10, SR_LANEID ; /* 0x00000000000a7919 */ /* 0x000e260000000000 */ /*1a10*/ LEA.HI R7, R3, R6, RZ, 0x5 ; /* 0x0000000603077211 */ /* 0x000fc800078f28ff */ /*1a20*/ LOP3.LUT R2, R7, 0xffffffe0, RZ, 0xc0, !PT ; /* 0xffffffe007027812 */ /* 0x000fe400078ec0ff */ /*1a30*/ SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff077819 */ /* 0x000fe40000011407 */ /*1a40*/ IADD3 R3, R2, 0x20, RZ ; /* 0x0000002002037810 */ /* 0x000fe40007ffe0ff */ /*1a50*/ LOP3.LUT R2, RZ, R2, RZ, 0x33, !PT ; /* 0x00000002ff027212 */ /* 0x000fe400078e33ff */ /*1a60*/ ISETP.GT.AND P0, PT, R3, c[0x0][0x170], PT ; /* 0x00005c0003007a0c */ /* 0x000fe40003f04270 */ /*1a70*/ IADD3 R2, R2, c[0x0][0x170], RZ ; /* 0x00005c0002027a10 */ /* 0x000fc80007ffe0ff */ /*1a80*/ SEL R5, R2, 0x1f, P0 ; /* 0x0000001f02057807 */ /* 0x000fe40000000000 */ /*1a90*/ IADD3 R4, R10, 0x2, RZ ; /* 0x000000020a047810 */ /* 0x001fc60007ffe0ff */ /*1aa0*/ SHFL.DOWN PT, R2, R16, 0x1, R5 ; /* 0x0820000010027989 */ /* 0x020e2200000e0005 */ /*1ab0*/ ISETP.GE.AND P0, PT, R10.reuse, R5.reuse, PT ; /* 0x000000050a00720c */ /* 0x0c0fe40003f06270 */ /*1ac0*/ IADD3 R8, R10.reuse, 0x4, RZ ; /* 0x000000040a087810 */ /* 0x040fe40007ffe0ff */ /*1ad0*/ ISETP.NE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fe40003f25270 */ /*1ae0*/ SEL R3, R2, RZ, !P0 ; /* 0x000000ff02037207 */ /* 0x001fe40004000000 */ /*1af0*/ ISETP.GT.AND P0, PT, R4, R5, PT ; /* 0x000000050400720c */ /* 0x000fc60003f04270 */ /*1b00*/ IMAD.IADD R2, R3, 0x1, R16 ; /* 0x0000000103027824 */ /* 0x000fca00078e0210 */ /*1b10*/ SHFL.DOWN PT, R3, R2, 0x2, R5 ; /* 0x0840000002037989 */ /* 0x000e2400000e0005 */ /*1b20*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1b30*/ ISETP.GT.AND P0, PT, R8, R5, PT ; /* 0x000000050800720c */ /* 0x000fc60003f04270 */ /*1b40*/ IMAD.IADD R4, R2, 0x1, R3 ; /* 0x0000000102047824 */ /* 0x000fe200078e0203 */ /*1b50*/ IADD3 R2, R10, 0x8, RZ ; /* 0x000000080a027810 */ /* 0x000fc80007ffe0ff */ /*1b60*/ SHFL.DOWN PT, R3, R4, 0x4, R5 ; /* 0x0880000004037989 */ /* 0x000e2400000e0005 */ /*1b70*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1b80*/ ISETP.GT.AND P0, PT, R2, R5, PT ; /* 0x000000050200720c */ /* 0x000fc60003f04270 */ /*1b90*/ IMAD.IADD R8, R4, 0x1, R3 ; /* 0x0000000104087824 */ /* 0x000fe200078e0203 */ /*1ba0*/ IADD3 R4, R10, 0x10, RZ ; /* 0x000000100a047810 */ /* 0x000fc80007ffe0ff */ /*1bb0*/ SHFL.DOWN PT, R3, R8, 0x8, R5 ; /* 0x0900000008037989 */ /* 0x000e2400000e0005 */ /*1bc0*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1bd0*/ ISETP.GT.AND P0, PT, R4, R5, PT ; /* 0x000000050400720c */ /* 0x000fe20003f04270 */ /*1be0*/ @!P1 IMAD.SHL.U32 R4, R7, 0x4, RZ ; /* 0x0000000407049824 */ /* 0x000fe400078e00ff */ /*1bf0*/ IMAD.IADD R2, R8, 0x1, R3 ; /* 0x0000000108027824 */ /* 0x000fca00078e0203 */ /*1c00*/ SHFL.DOWN PT, R3, R2, 0x10, R5 ; /* 0x0a00000002037989 */ /* 0x000e2400000e0005 */ /*1c10*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fe40004000000 */ /*1c20*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fc60003f05270 */ /*1c30*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*1c40*/ @!P1 STS [R4+0x8], R3 ; /* 0x0000080304009388 */ /* 0x0001e80000000800 */ /*1c50*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1c60*/ @P0 BRA 0x2030 ; /* 0x000003c000000947 */ /* 0x000fea0003800000 */ /*1c70*/ LDS.128 R4, [0x10] ; /* 0x00001000ff047984 */ /* 0x001e220000000c00 */ /*1c80*/ ISETP.GT.AND P2, PT, R0, 0x80, PT ; /* 0x000000800000780c */ /* 0x000fc40003f44270 */ /*1c90*/ ISETP.GT.AND P1, PT, R0.reuse, 0x40, PT ; /* 0x000000400000780c */ /* 0x040fe20003f24270 */ /*1ca0*/ LDS R2, [0xc] ; /* 0x00000c00ff027984 */ /* 0x000e620000000800 */ /*1cb0*/ ISETP.GT.AND P0, PT, R0, 0x20, PT ; /* 0x000000200000780c */ /* 0x000fc60003f04270 */ /*1cc0*/ LDS.64 R8, [0x20] ; /* 0x00002000ff087984 */ /* 0x000ea20000000a00 */ /*1cd0*/ SEL R6, R6, RZ, P2 ; /* 0x000000ff06067207 */ /* 0x001fe40001000000 */ /*1ce0*/ ISETP.GE.AND P2, PT, R0, 0xe1, PT ; /* 0x000000e10000780c */ /* 0x000fe40003f46270 */ /*1cf0*/ SEL R4, R4, RZ, P1 ; /* 0x000000ff04047207 */ /* 0x000fe40000800000 */ /*1d00*/ ISETP.GT.AND P1, PT, R0, 0x60, PT ; /* 0x000000600000780c */ /* 0x000fe40003f24270 */ /*1d10*/ SEL R2, R2, RZ, P0 ; /* 0x000000ff02027207 */ /* 0x002fe40000000000 */ /*1d20*/ SEL R5, R5, RZ, P1 ; /* 0x000000ff05057207 */ /* 0x000fc40000800000 */ /*1d30*/ IADD3 R2, R4, R3, R2 ; /* 0x0000000304027210 */ /* 0x000fe40007ffe002 */ /*1d40*/ ISETP.GT.AND P0, PT, R0.reuse, 0xa0, PT ; /* 0x000000a00000780c */ /* 0x040fe40003f04270 */ /*1d50*/ ISETP.GT.AND P1, PT, R0, 0xc0, PT ; /* 0x000000c00000780c */ /* 0x000fe40003f24270 */ /*1d60*/ SEL R7, R7, RZ, P0 ; /* 0x000000ff07077207 */ /* 0x000fe40000000000 */ /*1d70*/ IADD3 R2, R6, R2, R5 ; /* 0x0000000206027210 */ /* 0x000fe20007ffe005 */ /*1d80*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fe200078e00ff */ /*1d90*/ SEL R8, R8, RZ, P1 ; /* 0x000000ff08087207 */ /* 0x004fc80000800000 */ /*1da0*/ IADD3 R3, R8, R2, R7 ; /* 0x0000000208037210 */ /* 0x000fe20007ffe007 */ /*1db0*/ @!P2 BRA 0x2030 ; /* 0x000002700000a947 */ /* 0x000fea0003800000 */ /*1dc0*/ IMAD.IADD R3, R3, 0x1, R9 ; /* 0x0000000103037824 */ /* 0x000fe200078e0209 */ /*1dd0*/ BRA 0x2030 ; /* 0x0000025000007947 */ /* 0x000fea0003800000 */ /*1de0*/ S2R R4, SR_LANEID ; /* 0x0000000000047919 */ /* 0x000e220000000000 */ /*1df0*/ ISETP.NE.AND P2, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fc60003f45270 */ /*1e00*/ SHFL.DOWN PT, R0, R16, 0x1, 0x1f ; /* 0x08201f0010007f89 */ /* 0x020e6200000e0000 */ /*1e10*/ ISETP.GT.AND P0, PT, R4.reuse, 0x1e, PT ; /* 0x0000001e0400780c */ /* 0x041fe40003f04270 */ /*1e20*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe40003f25270 */ /*1e30*/ SEL R3, R0, RZ, !P0 ; /* 0x000000ff00037207 */ /* 0x002fe40004000000 */ /*1e40*/ ISETP.GT.AND P0, PT, R4, 0x1d, PT ; /* 0x0000001d0400780c */ /* 0x000fc60003f04270 */ /*1e50*/ IMAD.IADD R3, R3, 0x1, R16 ; /* 0x0000000103037824 */ /* 0x000fca00078e0210 */ /*1e60*/ SHFL.DOWN PT, R0, R3, 0x2, 0x1f ; /* 0x08401f0003007f89 */ /* 0x000e2200000e0000 */ /*1e70*/ @!P1 SHF.R.S32.HI R7, RZ, 0x1f, R6 ; /* 0x0000001fff079819 */ /* 0x000fc80000011406 */ /*1e80*/ @!P1 LEA.HI R7, R7, R6, RZ, 0x5 ; /* 0x0000000607079211 */ /* 0x000fe200078f28ff */ /*1e90*/ @!P2 IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff06a224 */ /* 0x000fc600078e00ff */ /*1ea0*/ @!P1 SHF.R.S32.HI R7, RZ, 0x5, R7 ; /* 0x00000005ff079819 */ /* 0x000fca0000011407 */ /*1eb0*/ @!P1 IMAD.SHL.U32 R12, R7, 0x4, RZ ; /* 0x00000004070c9824 */ /* 0x000fe200078e00ff */ /*1ec0*/ SEL R0, R0, RZ, !P0 ; /* 0x000000ff00007207 */ /* 0x001fe40004000000 */ /*1ed0*/ ISETP.GT.AND P0, PT, R4, 0x1b, PT ; /* 0x0000001b0400780c */ /* 0x000fc60003f04270 */ /*1ee0*/ IMAD.IADD R0, R3, 0x1, R0 ; /* 0x0000000103007824 */ /* 0x000fca00078e0200 */ /*1ef0*/ SHFL.DOWN PT, R2, R0, 0x4, 0x1f ; /* 0x08801f0000027f89 */ /* 0x000e2400000e0000 */ /*1f00*/ SEL R5, R2, RZ, !P0 ; /* 0x000000ff02057207 */ /* 0x001fe40004000000 */ /*1f10*/ ISETP.GT.AND P0, PT, R4, 0x17, PT ; /* 0x000000170400780c */ /* 0x000fc60003f04270 */ /*1f20*/ IMAD.IADD R5, R0, 0x1, R5 ; /* 0x0000000100057824 */ /* 0x000fca00078e0205 */ /*1f30*/ SHFL.DOWN PT, R2, R5, 0x8, 0x1f ; /* 0x09001f0005027f89 */ /* 0x000e2400000e0000 */ /*1f40*/ SEL R2, R2, RZ, !P0 ; /* 0x000000ff02027207 */ /* 0x001fe40004000000 */ /*1f50*/ ISETP.GT.AND P0, PT, R4, 0xf, PT ; /* 0x0000000f0400780c */ /* 0x000fc60003f04270 */ /*1f60*/ IMAD.IADD R2, R5, 0x1, R2 ; /* 0x0000000105027824 */ /* 0x000fca00078e0202 */ /*1f70*/ SHFL.DOWN PT, R3, R2, 0x10, 0x1f ; /* 0x0a001f0002037f89 */ /* 0x000e2400000e0000 */ /*1f80*/ SEL R3, R3, RZ, !P0 ; /* 0x000000ff03037207 */ /* 0x001fca0004000000 */ /*1f90*/ IMAD.IADD R3, R2, 0x1, R3 ; /* 0x0000000102037824 */ /* 0x000fca00078e0203 */ /*1fa0*/ @!P1 STS [R12+0x8], R3 ; /* 0x000008030c009388 */ /* 0x000fe80000000800 */ /*1fb0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1fc0*/ @!P2 LDS R0, [0xc] ; /* 0x00000c00ff00a984 */ /* 0x000fe80000000800 */ /*1fd0*/ @!P2 LDS.128 R8, [0x10] ; /* 0x00001000ff08a984 */ /* 0x000e280000000c00 */ /*1fe0*/ @!P2 LDS.64 R4, [0x20] ; /* 0x00002000ff04a984 */ /* 0x000e620000000a00 */ /*1ff0*/ @!P2 IADD3 R0, R8, R0, R3 ; /* 0x000000000800a210 */ /* 0x001fc80007ffe003 */ /*2000*/ @!P2 IADD3 R0, R10, R0, R9 ; /* 0x000000000a00a210 */ /* 0x000fc80007ffe009 */ /*2010*/ @!P2 IADD3 R0, R4, R0, R11 ; /* 0x000000000400a210 */ /* 0x002fca0007ffe00b */ /*2020*/ @!P2 IMAD.IADD R3, R0, 0x1, R5 ; /* 0x000000010003a824 */ /* 0x000fe400078e0205 */ /*2030*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*2040*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fda0003f05270 */ /*2050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*2060*/ IADD3 R5, R3, c[0x0][0x178], RZ ; /* 0x00005e0003057a10 */ /* 0x000fe20007ffe0ff */ /*2070*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*2080*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fca00078e00ff */ /*2090*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*20a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*20b0*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e240000002100 */ /*20c0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x001fda0003f05270 */ /*20d0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*20e0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff057624 */ /* 0x000fe400078e00ff */ /*20f0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*2100*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff037624 */ /* 0x000fca00078e00ff */ /*2110*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*2120*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*2130*/ BRA 0x2130; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*2140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*21f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0020*/ BRA 0x20; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <iostream> #include <thrust/device_vector.h> #include <thrust/host_vector.h> #include <thrust/reduce.h> using namespace std; int main(int argc, const char *argv[]) { string N; if (argc > 1) { N = string(argv[1]); } unsigned int n = atoi(N.c_str()); thrust::host_vector<int> H(n); for (unsigned int i = 0; i < n; i++) { H[i] = 1; } thrust::device_vector<int> D = H; hipEvent_t start; hipEvent_t stop; hipEventCreate(&start); hipEventCreate(&stop); hipEventRecord(start); int sum = thrust::reduce(D.begin(), D.end()); hipEventRecord(stop); hipEventSynchronize(stop); // Get the elapsed time in milliseconds float ms; hipEventElapsedTime(&ms, start, stop); cout << sum << endl; cout << ms << endl; return 0; }
.text .file "reduction_thrust.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl main # -- Begin function main .type main,@function main: # @main .Lfunc_begin0: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception0 # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 subq $120, %rsp .cfi_def_cfa_offset 144 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movl %edi, %eax leaq 104(%rsp), %r14 movq %r14, -16(%r14) movq $0, -8(%r14) movb $0, (%r14) movq %r14, %rdi cmpl $2, %eax jl .LBB0_5 # %bb.1: movq 8(%rsi), %rsi .Ltmp0: leaq 56(%rsp), %rdi leaq 24(%rsp), %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .Ltmp1: # %bb.2: leaq 88(%rsp), %rdi leaq 56(%rsp), %rbx movq %rbx, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ movq (%rbx), %rdi leaq 72(%rsp), %rax cmpq %rax, %rdi je .LBB0_4 # %bb.3: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB0_4: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq 88(%rsp), %rdi .LBB0_5: callq atoi movl %eax, %ebx .Ltmp3: leaq 56(%rsp), %rdi movq %rbx, %rsi callq _ZN6thrust6detail11vector_baseIiSaIiEEC2Em .Ltmp4: # %bb.6: # %_ZN6thrust11host_vectorIiSaIiEEC2Em.exit.preheader testq %rbx, %rbx je .LBB0_9 # %bb.7: # %.lr.ph xorl %eax, %eax .LBB0_8: # %_ZN6thrust11host_vectorIiSaIiEEC2Em.exit # =>This Inner Loop Header: Depth=1 movq 64(%rsp), %rcx movl $1, (%rcx,%rax,4) incq %rax cmpq %rax, %rbx jne .LBB0_8 .LBB0_9: # %_ZN6thrust11host_vectorIiSaIiEEC2Em.exit._crit_edge .Ltmp6: leaq 24(%rsp), %rdi leaq 56(%rsp), %rsi callq _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE .Ltmp7: # %bb.10: # %_ZN6thrust13device_vectorIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS_6detail11vector_baseIT_T0_EE.exit .Ltmp9: leaq 16(%rsp), %rdi callq hipEventCreate .Ltmp10: # %bb.11: .Ltmp11: leaq 8(%rsp), %rdi callq hipEventCreate .Ltmp12: # %bb.12: movq 16(%rsp), %rdi .Ltmp13: xorl %esi, %esi callq hipEventRecord .Ltmp14: # %bb.13: movq 32(%rsp), %rsi movq 48(%rsp), %rdx .Ltmp16: leaq 4(%rsp), %rdi xorl %ecx, %ecx callq _ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_ .Ltmp17: # %bb.14: movl %eax, %ebx movq 8(%rsp), %rdi .Ltmp18: xorl %esi, %esi callq hipEventRecord .Ltmp19: # %bb.15: movq 8(%rsp), %rdi .Ltmp20: callq hipEventSynchronize .Ltmp21: # %bb.16: movq 16(%rsp), %rsi movq 8(%rsp), %rdx .Ltmp23: leaq 4(%rsp), %rdi callq hipEventElapsedTime .Ltmp24: # %bb.17: .Ltmp25: movl $_ZSt4cout, %edi movl %ebx, %esi callq _ZNSolsEi .Ltmp26: # %bb.18: movq %rax, %rbx movq (%rax), %rax movq -24(%rax), %rdi addq %rbx, %rdi .Ltmp27: movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc .Ltmp28: # %bb.19: # %.noexc .Ltmp29: movsbl %al, %esi movq %rbx, %rdi callq _ZNSo3putEc .Ltmp30: # %bb.20: # %.noexc35 .Ltmp31: movq %rax, %rdi callq _ZNSo5flushEv .Ltmp32: # %bb.21: # %_ZNSolsEPFRSoS_E.exit cvtss2sd 4(%rsp), %xmm0 .Ltmp33: movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ .Ltmp34: # %bb.22: # %_ZNSolsEf.exit movq %rax, %rbx movq (%rax), %rax movq -24(%rax), %rdi addq %rbx, %rdi .Ltmp35: movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc .Ltmp36: # %bb.23: # %.noexc37 .Ltmp37: movsbl %al, %esi movq %rbx, %rdi callq _ZNSo3putEc .Ltmp38: # %bb.24: # %.noexc38 .Ltmp39: movq %rax, %rdi callq _ZNSo5flushEv .Ltmp40: # %bb.25: # %_ZNSolsEPFRSoS_E.exit25 movq 40(%rsp), %rdx testq %rdx, %rdx je .LBB0_27 # %bb.26: movq 24(%rsp), %rax movq 32(%rsp), %rsi shlq $2, %rdx movq 8(%rax), %rdi .Ltmp45: movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Ltmp46: .LBB0_27: # %_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEED2Ev.exit cmpq $0, 72(%rsp) je .LBB0_29 # %bb.28: movq 64(%rsp), %rdi callq _ZdlPv .LBB0_29: # %_ZN6thrust6detail11vector_baseIiSaIiEED2Ev.exit movq 88(%rsp), %rdi cmpq %r14, %rdi je .LBB0_31 # %bb.30: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i26 callq _ZdlPv .LBB0_31: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit28 xorl %eax, %eax addq $120, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .LBB0_32: .cfi_def_cfa_offset 144 .Ltmp2: jmp .LBB0_33 .LBB0_34: .Ltmp47: jmp .LBB0_48 .LBB0_35: .Ltmp8: movq %rax, %rbx jmp .LBB0_42 .LBB0_36: .Ltmp5: .LBB0_33: movq %rax, %rbx jmp .LBB0_44 .LBB0_37: .Ltmp22: jmp .LBB0_40 .LBB0_38: .Ltmp15: jmp .LBB0_40 .LBB0_39: .Ltmp41: .LBB0_40: movq %rax, %rbx movq 40(%rsp), %rdx testq %rdx, %rdx je .LBB0_42 # %bb.41: movq 24(%rsp), %rax movq 32(%rsp), %rsi shlq $2, %rdx movq 8(%rax), %rdi .Ltmp42: movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Ltmp43: .LBB0_42: # %_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEED2Ev.exit29 cmpq $0, 72(%rsp) je .LBB0_44 # %bb.43: movq 64(%rsp), %rdi callq _ZdlPv .LBB0_44: movq 88(%rsp), %rdi cmpq %r14, %rdi je .LBB0_46 # %bb.45: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i32 callq _ZdlPv .LBB0_46: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit34 movq %rbx, %rdi callq _Unwind_Resume@PLT .LBB0_47: .Ltmp44: .LBB0_48: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end0: .size main, .Lfunc_end0-main .cfi_endproc .section .gcc_except_table,"a",@progbits .p2align 2, 0x0 GCC_except_table0: .Lexception0: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase0-.Lttbaseref0 .Lttbaseref0: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end0-.Lcst_begin0 .Lcst_begin0: .uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 1 << .uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1 .uleb128 .Ltmp2-.Lfunc_begin0 # jumps to .Ltmp2 .byte 0 # On action: cleanup .uleb128 .Ltmp3-.Lfunc_begin0 # >> Call Site 2 << .uleb128 .Ltmp4-.Ltmp3 # Call between .Ltmp3 and .Ltmp4 .uleb128 .Ltmp5-.Lfunc_begin0 # jumps to .Ltmp5 .byte 0 # On action: cleanup .uleb128 .Ltmp6-.Lfunc_begin0 # >> Call Site 3 << .uleb128 .Ltmp7-.Ltmp6 # Call between .Ltmp6 and .Ltmp7 .uleb128 .Ltmp8-.Lfunc_begin0 # jumps to .Ltmp8 .byte 0 # On action: cleanup .uleb128 .Ltmp9-.Lfunc_begin0 # >> Call Site 4 << .uleb128 .Ltmp14-.Ltmp9 # Call between .Ltmp9 and .Ltmp14 .uleb128 .Ltmp15-.Lfunc_begin0 # jumps to .Ltmp15 .byte 0 # On action: cleanup .uleb128 .Ltmp16-.Lfunc_begin0 # >> Call Site 5 << .uleb128 .Ltmp21-.Ltmp16 # Call between .Ltmp16 and .Ltmp21 .uleb128 .Ltmp22-.Lfunc_begin0 # jumps to .Ltmp22 .byte 0 # On action: cleanup .uleb128 .Ltmp23-.Lfunc_begin0 # >> Call Site 6 << .uleb128 .Ltmp40-.Ltmp23 # Call between .Ltmp23 and .Ltmp40 .uleb128 .Ltmp41-.Lfunc_begin0 # jumps to .Ltmp41 .byte 0 # On action: cleanup .uleb128 .Ltmp45-.Lfunc_begin0 # >> Call Site 7 << .uleb128 .Ltmp46-.Ltmp45 # Call between .Ltmp45 and .Ltmp46 .uleb128 .Ltmp47-.Lfunc_begin0 # jumps to .Ltmp47 .byte 1 # On action: 1 .uleb128 .Ltmp42-.Lfunc_begin0 # >> Call Site 8 << .uleb128 .Ltmp43-.Ltmp42 # Call between .Ltmp42 and .Ltmp43 .uleb128 .Ltmp44-.Lfunc_begin0 # jumps to .Ltmp44 .byte 1 # On action: 1 .uleb128 .Ltmp43-.Lfunc_begin0 # >> Call Site 9 << .uleb128 .Lfunc_end0-.Ltmp43 # Call between .Ltmp43 and .Lfunc_end0 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end0: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase0: .p2align 2, 0x0 # -- End function .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .p2align 1, 0x90 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 leaq 16(%rdi), %rax movq %rax, (%rdi) testq %rsi, %rsi je .LBB1_1 # %bb.2: movq %rsi, %rbx movq %rdi, %r14 movq %rsi, %rdi callq strlen leaq (%rax,%rbx), %rdx movq %r14, %rdi movq %rbx, %rsi addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL .LBB1_1: .cfi_def_cfa_offset 32 movl $.L.str, %edi callq _ZSt19__throw_logic_errorPKc .Lfunc_end1: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end1-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .cfi_endproc # -- End function .section .text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat .hidden __clang_call_terminate # -- Begin function __clang_call_terminate .weak __clang_call_terminate .type __clang_call_terminate,@function __clang_call_terminate: # @__clang_call_terminate .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 callq __cxa_begin_catch callq _ZSt9terminatev .Lfunc_end2: .size __clang_call_terminate, .Lfunc_end2-__clang_call_terminate .cfi_endproc # -- End function .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .p2align 1, 0x90 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdx, %r14 movq %rsi, %r15 movq %rdi, %rbx subq %rsi, %r14 movq %r14, (%rsp) cmpq $15, %r14 jbe .LBB3_1 # %bb.2: movq %rsp, %r12 movq %rbx, %rdi movq %r12, %rsi xorl %edx, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm movq %rax, (%rbx) movq (%r12), %rcx movq %rcx, 16(%rbx) jmp .LBB3_3 .LBB3_1: # %._crit_edge movq (%rbx), %rax .LBB3_3: testq %r14, %r14 je .LBB3_7 # %bb.4: cmpq $1, %r14 jne .LBB3_6 # %bb.5: movb (%r15), %cl movb %cl, (%rax) jmp .LBB3_7 .LBB3_6: movq %rax, %rdi movq %r15, %rsi movq %r14, %rdx callq memcpy@PLT .LBB3_7: # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit movq (%rsp), %rax movq %rax, 8(%rbx) movq (%rbx), %rcx movb $0, (%rcx,%rax) addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end3-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .cfi_endproc # -- End function .section .text._ZN6thrust6detail11vector_baseIiSaIiEEC2Em,"axG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEEC2Em,comdat .weak _ZN6thrust6detail11vector_baseIiSaIiEEC2Em # -- Begin function _ZN6thrust6detail11vector_baseIiSaIiEEC2Em .p2align 1, 0x90 .type _ZN6thrust6detail11vector_baseIiSaIiEEC2Em,@function _ZN6thrust6detail11vector_baseIiSaIiEEC2Em: # @_ZN6thrust6detail11vector_baseIiSaIiEEC2Em .Lfunc_begin1: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception1 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 xorps %xmm0, %xmm0 movups %xmm0, 8(%rdi) movq $0, 24(%rdi) testq %rsi, %rsi je .LBB4_3 # %bb.1: # %_ZN6thrust6detail18contiguous_storageIiSaIiEE19default_construct_nENS0_15normal_iteratorIPiEEm.exit.i .Ltmp48: movq %rsi, %rbx movq %rdi, %r14 leaq 8(%rdi), %r15 xorl %edx, %edx callq _ZNSt15__new_allocatorIiE8allocateEmPKv .Ltmp49: # %bb.2: # %.noexc movq %rax, 8(%r14) movq %rbx, 16(%r14) movq %rbx, 24(%r14) shlq $2, %rbx movq %rax, %rdi xorl %esi, %esi movq %rbx, %rdx popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp memset@PLT # TAILCALL .LBB4_3: # %_ZN6thrust6detail11vector_baseIiSaIiEE12default_initEm.exit .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB4_4: .cfi_def_cfa_offset 32 .Ltmp50: movq %rax, %rbx cmpq $0, 16(%r14) je .LBB4_6 # %bb.5: movq (%r15), %rdi callq _ZdlPv xorps %xmm0, %xmm0 movups %xmm0, (%r15) .LBB4_6: # %_ZN6thrust6detail18contiguous_storageIiSaIiEED2Ev.exit movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end4: .size _ZN6thrust6detail11vector_baseIiSaIiEEC2Em, .Lfunc_end4-_ZN6thrust6detail11vector_baseIiSaIiEEC2Em .cfi_endproc .section .gcc_except_table._ZN6thrust6detail11vector_baseIiSaIiEEC2Em,"aG",@progbits,_ZN6thrust6detail11vector_baseIiSaIiEEC2Em,comdat .p2align 2, 0x0 GCC_except_table4: .Lexception1: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end1-.Lcst_begin1 .Lcst_begin1: .uleb128 .Ltmp48-.Lfunc_begin1 # >> Call Site 1 << .uleb128 .Ltmp49-.Ltmp48 # Call between .Ltmp48 and .Ltmp49 .uleb128 .Ltmp50-.Lfunc_begin1 # jumps to .Ltmp50 .byte 0 # On action: cleanup .uleb128 .Ltmp49-.Lfunc_begin1 # >> Call Site 2 << .uleb128 .Lfunc_end4-.Ltmp49 # Call between .Ltmp49 and .Lfunc_end4 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end1: .p2align 2, 0x0 # -- End function .section .text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat .weak _ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv .p2align 1, 0x90 .type _ZNSt15__new_allocatorIiE8allocateEmPKv,@function _ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movq %rsi, %rax shrq $61, %rax jne .LBB5_1 # %bb.3: shlq $2, %rsi movq %rsi, %rdi popq %rax .cfi_def_cfa_offset 8 jmp _Znwm # TAILCALL .LBB5_1: .cfi_def_cfa_offset 16 shrq $62, %rsi je .LBB5_2 # %bb.4: callq _ZSt28__throw_bad_array_new_lengthv .LBB5_2: callq _ZSt17__throw_bad_allocv .Lfunc_end5: .size _ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end5-_ZNSt15__new_allocatorIiE8allocateEmPKv .cfi_endproc # -- End function .section .text._ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE,"axG",@progbits,_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE,comdat .weak _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE # -- Begin function _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE .p2align 1, 0x90 .type _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE,@function _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE: # @_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE .Lfunc_begin2: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception2 # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rsi, %r14 movq %rdi, %rbx callq _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v movq %rax, (%rbx) xorps %xmm0, %xmm0 movups %xmm0, 8(%rbx) movq $0, 24(%rbx) movq 8(%r14), %rdx movq 24(%r14), %r14 leaq (%rdx,%r14,4), %rcx shlq $2, %r14 negq %r14 sarq $2, %r14 negq %r14 .Ltmp51: movq %rbx, %rdi movq %r14, %rsi movq %rbx, %r8 callq _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE .Ltmp52: # %bb.1: movq %r14, 24(%rbx) addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .LBB6_3: .cfi_def_cfa_offset 32 .Ltmp53: movq %rax, %r14 .Ltmp54: movq %rbx, %rdi callq _ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv .Ltmp55: # %bb.4: # %_ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEED2Ev.exit movq %r14, %rdi callq _Unwind_Resume@PLT .LBB6_2: .Ltmp56: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end6: .size _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE, .Lfunc_end6-_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE .cfi_endproc .section .gcc_except_table._ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE,"aG",@progbits,_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEEC2IiSaIiEEERKNS1_IT_T0_EE,comdat .p2align 2, 0x0 GCC_except_table6: .Lexception2: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase1-.Lttbaseref1 .Lttbaseref1: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end2-.Lcst_begin2 .Lcst_begin2: .uleb128 .Lfunc_begin2-.Lfunc_begin2 # >> Call Site 1 << .uleb128 .Ltmp51-.Lfunc_begin2 # Call between .Lfunc_begin2 and .Ltmp51 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp51-.Lfunc_begin2 # >> Call Site 2 << .uleb128 .Ltmp52-.Ltmp51 # Call between .Ltmp51 and .Ltmp52 .uleb128 .Ltmp53-.Lfunc_begin2 # jumps to .Ltmp53 .byte 0 # On action: cleanup .uleb128 .Ltmp54-.Lfunc_begin2 # >> Call Site 3 << .uleb128 .Ltmp55-.Ltmp54 # Call between .Ltmp54 and .Ltmp55 .uleb128 .Ltmp56-.Lfunc_begin2 # jumps to .Ltmp56 .byte 1 # On action: 1 .uleb128 .Ltmp55-.Lfunc_begin2 # >> Call Site 4 << .uleb128 .Lfunc_end6-.Ltmp55 # Call between .Ltmp55 and .Lfunc_end6 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end2: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase1: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,"axG",@progbits,_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,comdat .weak _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v # -- Begin function _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v .type _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,@function _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v: # @_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v .cfi_startproc # %bb.0: movb _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %al testb %al, %al je .LBB7_1 .LBB7_4: movl $_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %eax retq .LBB7_1: pushq %rax .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB7_3 # %bb.2: movq $_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE+16, _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource(%rip) callq _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v movq %rax, _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource+8(%rip) movl $_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %edi callq __cxa_guard_release .LBB7_3: addq $8, %rsp .cfi_def_cfa_offset 8 jmp .LBB7_4 .Lfunc_end7: .size _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v, .Lfunc_end7-_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v .cfi_endproc # -- End function .section .text._ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,"axG",@progbits,_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,comdat .weak _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev # -- Begin function _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev .p2align 1, 0x90 .type _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,@function _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev: # @_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev .cfi_startproc # %bb.0: retq .Lfunc_end8: .size _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev, .Lfunc_end8-_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev .cfi_endproc # -- End function .section .text._ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,"axG",@progbits,_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,comdat .weak _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v # -- Begin function _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v .type _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,@function _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v: # @_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v .cfi_startproc # %bb.0: movb _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource(%rip), %al testb %al, %al je .LBB9_1 .LBB9_4: movl $_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %eax retq .LBB9_1: pushq %rax .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB9_3 # %bb.2: movl $_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %edi callq __cxa_guard_release .LBB9_3: addq $8, %rsp .cfi_def_cfa_offset 8 jmp .LBB9_4 .Lfunc_end9: .size _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v, .Lfunc_end9-_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v .cfi_endproc # -- End function .section .text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,comdat .weak _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev .p2align 1, 0x90 .type _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,@function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end10: .size _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev, .Lfunc_end10-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev .cfi_endproc # -- End function .section .text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,comdat .weak _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm .p2align 1, 0x90 .type _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,@function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm .cfi_startproc # %bb.0: movq 8(%rdi), %rdi jmp _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm # TAILCALL .Lfunc_end11: .size _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm, .Lfunc_end11-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm .cfi_endproc # -- End function .section .text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,comdat .weak _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm .p2align 1, 0x90 .type _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,@function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm .cfi_startproc # %bb.0: movq 8(%rdi), %rdi jmp _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm # TAILCALL .Lfunc_end12: .size _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm, .Lfunc_end12-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm .cfi_endproc # -- End function .section .text._ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,"axG",@progbits,_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,comdat .weak _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ # -- Begin function _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ .p2align 1, 0x90 .type _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,@function _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_: # @_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ .cfi_startproc # %bb.0: cmpq %rsi, %rdi sete %al retq .Lfunc_end13: .size _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_, .Lfunc_end13-_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ .cfi_endproc # -- End function .section .text._ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,"axG",@progbits,_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,comdat .weak _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev # -- Begin function _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev .p2align 1, 0x90 .type _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,@function _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev: # @_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev .cfi_startproc # %bb.0: retq .Lfunc_end14: .size _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev, .Lfunc_end14-_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,comdat .weak _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev .p2align 1, 0x90 .type _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,@function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end15: .size _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev, .Lfunc_end15-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,comdat .weak _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm .p2align 1, 0x90 .type _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,@function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm .Lfunc_begin3: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception3 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $80, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 leaq 8(%rsp), %rdi callq hipMalloc testl %eax, %eax jne .LBB16_1 # %bb.16: movq 8(%rsp), %rax addq $80, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB16_1: .cfi_def_cfa_offset 112 movl %eax, %ebp callq hipGetLastError movl $40, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp57: callq _ZN6thrust6system12hip_categoryEv .Ltmp58: # %bb.2: movq (%rax), %rcx .Ltmp59: leaq 16(%rsp), %rdi movq %rax, %rsi movl %ebp, %edx callq *48(%rcx) .Ltmp60: # %bb.3: movq 16(%rsp), %rsi .Ltmp62: leaq 48(%rsp), %rdi leaq 7(%rsp), %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .Ltmp63: # %bb.4: movb $1, %bpl .Ltmp65: leaq 48(%rsp), %rsi movq %rbx, %rdi callq _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .Ltmp66: # %bb.5: xorl %ebp, %ebp .Ltmp67: movl $_ZTIN6thrust6system6detail9bad_allocE, %esi movl $_ZN6thrust6system6detail9bad_allocD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .Ltmp68: # %bb.17: .LBB16_7: .Ltmp69: movq %rax, %r14 leaq 64(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB16_9 # %bb.8: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB16_9: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit leaq 32(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB16_11 # %bb.10: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15 callq _ZdlPv .LBB16_11: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15 testb %bpl, %bpl jne .LBB16_14 jmp .LBB16_15 .LBB16_12: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread .Ltmp64: movq %rax, %r14 leaq 32(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB16_14 # %bb.13: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15.thread26 callq _ZdlPv jmp .LBB16_14 .LBB16_6: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15.thread .Ltmp61: movq %rax, %r14 .LBB16_14: movq %rbx, %rdi callq __cxa_free_exception .LBB16_15: movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end16: .size _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm, .Lfunc_end16-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm .cfi_endproc .section .gcc_except_table._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,"aG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,comdat .p2align 2, 0x0 GCC_except_table16: .Lexception3: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end3-.Lcst_begin3 .Lcst_begin3: .uleb128 .Lfunc_begin3-.Lfunc_begin3 # >> Call Site 1 << .uleb128 .Ltmp57-.Lfunc_begin3 # Call between .Lfunc_begin3 and .Ltmp57 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp57-.Lfunc_begin3 # >> Call Site 2 << .uleb128 .Ltmp60-.Ltmp57 # Call between .Ltmp57 and .Ltmp60 .uleb128 .Ltmp61-.Lfunc_begin3 # jumps to .Ltmp61 .byte 0 # On action: cleanup .uleb128 .Ltmp62-.Lfunc_begin3 # >> Call Site 3 << .uleb128 .Ltmp63-.Ltmp62 # Call between .Ltmp62 and .Ltmp63 .uleb128 .Ltmp64-.Lfunc_begin3 # jumps to .Ltmp64 .byte 0 # On action: cleanup .uleb128 .Ltmp65-.Lfunc_begin3 # >> Call Site 4 << .uleb128 .Ltmp68-.Ltmp65 # Call between .Ltmp65 and .Ltmp68 .uleb128 .Ltmp69-.Lfunc_begin3 # jumps to .Ltmp69 .byte 0 # On action: cleanup .uleb128 .Ltmp68-.Lfunc_begin3 # >> Call Site 5 << .uleb128 .Lfunc_end16-.Ltmp68 # Call between .Ltmp68 and .Lfunc_end16 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end3: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,comdat .weak _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .p2align 1, 0x90 .type _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,@function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Lfunc_begin4: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception4 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %rsi, %rdi callq hipFree testl %eax, %eax jne .LBB17_1 # %bb.5: popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB17_1: .cfi_def_cfa_offset 32 movl %eax, %ebp callq hipGetLastError movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp70: callq _ZN6thrust6system12hip_categoryEv .Ltmp71: # %bb.2: .Ltmp72: movl $.L.str.9, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp73: # %bb.3: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB17_4: .Ltmp74: movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end17: .size _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm, .Lfunc_end17-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .cfi_endproc .section .gcc_except_table._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,"aG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,comdat .p2align 2, 0x0 GCC_except_table17: .Lexception4: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end4-.Lcst_begin4 .Lcst_begin4: .uleb128 .Lfunc_begin4-.Lfunc_begin4 # >> Call Site 1 << .uleb128 .Ltmp70-.Lfunc_begin4 # Call between .Lfunc_begin4 and .Ltmp70 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp70-.Lfunc_begin4 # >> Call Site 2 << .uleb128 .Ltmp73-.Ltmp70 # Call between .Ltmp70 and .Ltmp73 .uleb128 .Ltmp74-.Lfunc_begin4 # jumps to .Ltmp74 .byte 0 # On action: cleanup .uleb128 .Ltmp73-.Lfunc_begin4 # >> Call Site 3 << .uleb128 .Lfunc_end17-.Ltmp73 # Call between .Ltmp73 and .Lfunc_end17 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end4: .p2align 2, 0x0 # -- End function .section .text._ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,"axG",@progbits,_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,comdat .weak _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ # -- Begin function _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ .p2align 1, 0x90 .type _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,@function _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_: # @_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ .cfi_startproc # %bb.0: cmpq %rsi, %rdi sete %al retq .Lfunc_end18: .size _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_, .Lfunc_end18-_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ .cfi_endproc # -- End function .section .text._ZN6thrust6system12hip_categoryEv,"axG",@progbits,_ZN6thrust6system12hip_categoryEv,comdat .weak _ZN6thrust6system12hip_categoryEv # -- Begin function _ZN6thrust6system12hip_categoryEv .type _ZN6thrust6system12hip_categoryEv,@function _ZN6thrust6system12hip_categoryEv: # @_ZN6thrust6system12hip_categoryEv .cfi_startproc # %bb.0: movb _ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al testb %al, %al je .LBB19_1 .LBB19_4: movl $_ZZN6thrust6system12hip_categoryEvE6result, %eax retq .LBB19_1: pushq %rax .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust6system12hip_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB19_3 # %bb.2: movq $_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system12hip_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system12hip_categoryEvE6result, %edi callq __cxa_guard_release .LBB19_3: addq $8, %rsp .cfi_def_cfa_offset 8 jmp .LBB19_4 .Lfunc_end19: .size _ZN6thrust6system12hip_categoryEv, .Lfunc_end19-_ZN6thrust6system12hip_categoryEv .cfi_endproc # -- End function .section .text._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat .weak _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .p2align 1, 0x90 .type _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .Lfunc_begin5: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception5 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 pushq %rax .cfi_def_cfa_offset 64 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rsi, %r15 movq %rdi, %rbx movq $_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi) leaq 8(%rdi), %r14 leaq 24(%rdi), %rbp movq %rbp, 8(%rdi) movq $0, 16(%rdi) movb $0, 24(%rdi) callq _ZNKSt9bad_alloc4whatEv movq %rax, %r12 movq 16(%rbx), %r13 movq %rax, %rdi callq strlen .Ltmp75: movq %r14, %rdi xorl %esi, %esi movq %r13, %rdx movq %r12, %rcx movq %rax, %r8 callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm .Ltmp76: # %bb.1: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit .Ltmp77: movl $.L.str.7, %esi movq %r14, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc .Ltmp78: # %bb.2: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit movq (%r15), %rsi movq 8(%r15), %rdx .Ltmp79: movq %r14, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp80: # %bb.3: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB20_4: .cfi_def_cfa_offset 64 .Ltmp81: movq %rax, %r15 movq (%r14), %rdi cmpq %rbp, %rdi je .LBB20_6 # %bb.5: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB20_6: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq %rbx, %rdi callq _ZNSt9bad_allocD2Ev movq %r15, %rdi callq _Unwind_Resume@PLT .Lfunc_end20: .size _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end20-_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .cfi_endproc .section .gcc_except_table._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat .p2align 2, 0x0 GCC_except_table20: .Lexception5: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end5-.Lcst_begin5 .Lcst_begin5: .uleb128 .Ltmp75-.Lfunc_begin5 # >> Call Site 1 << .uleb128 .Ltmp80-.Ltmp75 # Call between .Ltmp75 and .Ltmp80 .uleb128 .Ltmp81-.Lfunc_begin5 # jumps to .Ltmp81 .byte 0 # On action: cleanup .uleb128 .Ltmp80-.Lfunc_begin5 # >> Call Site 2 << .uleb128 .Lfunc_end20-.Ltmp80 # Call between .Ltmp80 and .Lfunc_end20 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end5: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD2Ev,comdat .weak _ZN6thrust6system6detail9bad_allocD2Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD2Ev .p2align 1, 0x90 .type _ZN6thrust6system6detail9bad_allocD2Ev,@function _ZN6thrust6system6detail9bad_allocD2Ev: # @_ZN6thrust6system6detail9bad_allocD2Ev .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq $_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi) movq 8(%rdi), %rdi leaq 24(%rbx), %rax cmpq %rax, %rdi je .LBB21_2 # %bb.1: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB21_2: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZNSt9bad_allocD2Ev # TAILCALL .Lfunc_end21: .size _ZN6thrust6system6detail9bad_allocD2Ev, .Lfunc_end21-_ZN6thrust6system6detail9bad_allocD2Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system14error_categoryD2Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD2Ev,comdat .weak _ZN6thrust6system14error_categoryD2Ev # -- Begin function _ZN6thrust6system14error_categoryD2Ev .p2align 1, 0x90 .type _ZN6thrust6system14error_categoryD2Ev,@function _ZN6thrust6system14error_categoryD2Ev: # @_ZN6thrust6system14error_categoryD2Ev .cfi_startproc # %bb.0: movq $_ZTVN6thrust6system14error_categoryE+16, (%rdi) retq .Lfunc_end22: .size _ZN6thrust6system14error_categoryD2Ev, .Lfunc_end22-_ZN6thrust6system14error_categoryD2Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,comdat .weak _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev # -- Begin function _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev .p2align 1, 0x90 .type _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,@function _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev: # @_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end23: .size _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev, .Lfunc_end23-_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,comdat .weak _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv .p2align 1, 0x90 .type _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,@function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv .cfi_startproc # %bb.0: movl $.L.str.1, %eax retq .Lfunc_end24: .size _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv, .Lfunc_end24-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv .cfi_endproc # -- End function .section .text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,comdat .weak _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi .p2align 1, 0x90 .type _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,@function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl %esi, %ebx cmpl $50, %esi jg .LBB25_5 # %bb.1: movb _ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al testb %al, %al je .LBB25_2 .LBB25_4: # %_ZN6thrust6system20make_error_conditionENS0_11hip_rocprim4errc6errc_tE.exit movl $_ZZN6thrust6system12hip_categoryEvE6result, %edx movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 retq .LBB25_5: .cfi_def_cfa_offset 16 movb _ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al testb %al, %al je .LBB25_6 .LBB25_8: # %_ZN6thrust6system15system_categoryEv.exit movq _ZZN6thrust6system15system_categoryEvE6result(%rip), %rax movq 24(%rax), %rax movl $_ZZN6thrust6system15system_categoryEvE6result, %edi movl %ebx, %esi popq %rbx .cfi_def_cfa_offset 8 jmpq *%rax # TAILCALL .LBB25_2: .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust6system12hip_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB25_4 # %bb.3: movq $_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system12hip_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system12hip_categoryEvE6result, %edi callq __cxa_guard_release jmp .LBB25_4 .LBB25_6: movl $_ZGVZN6thrust6system15system_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB25_8 # %bb.7: movq $_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system15system_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system15system_categoryEvE6result, %edi callq __cxa_guard_release jmp .LBB25_8 .Lfunc_end25: .size _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi, .Lfunc_end25-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi .cfi_endproc # -- End function .section .text._ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,comdat .weak _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE # -- Begin function _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .p2align 1, 0x90 .type _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,@function _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE: # @_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdx, %rbx movq (%rdi), %rax callq *24(%rax) cmpq 8(%rbx), %rdx sete %cl cmpl (%rbx), %eax sete %al andb %cl, %al popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end26: .size _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE, .Lfunc_end26-_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .cfi_endproc # -- End function .section .text._ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,comdat .weak _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi # -- Begin function _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .p2align 1, 0x90 .type _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,@function _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi: # @_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .cfi_startproc # %bb.0: cmpq %rdi, 8(%rsi) sete %cl cmpl %edx, (%rsi) sete %al andb %cl, %al retq .Lfunc_end27: .size _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi, .Lfunc_end27-_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .cfi_endproc # -- End function .section .text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat .weak _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei .p2align 1, 0x90 .type _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,@function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei .Lfunc_begin6: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception6 # %bb.0: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $72, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %edx, %ebp movq %rdi, %rbx movl %edx, %edi callq hipGetErrorString movq %rax, %r15 movl %ebp, %edi callq hipGetErrorName testq %rax, %rax movl $.L.str.6, %r14d cmovneq %rax, %r14 leaq 24(%rsp), %rax movq %rax, -16(%rax) movq %r14, %rdi callq strlen leaq (%rax,%r14), %rdx leaq 8(%rsp), %r12 movq %r12, %rdi movq %r14, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .Ltmp82: movl $.L.str.7, %esi movq %r12, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc .Ltmp83: # %bb.1: # %.noexc movq %rax, %r12 leaq 56(%rsp), %r14 movq %r14, -16(%r14) movq (%rax), %rsi movq %rax, %rbp addq $16, %rbp cmpq %rbp, %rsi je .LBB28_2 # %bb.3: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i movq %rsi, 40(%rsp) movq 16(%r12), %rax movq %rax, 56(%rsp) movq 8(%r12), %r13 jmp .LBB28_4 .LBB28_2: movq 8(%r12), %r13 leaq 1(%r13), %rdx movq %r14, %rdi callq memcpy@PLT .LBB28_4: leaq 40(%rsp), %rdi movq %r13, 8(%rdi) movq %rbp, (%r12) movq $0, 8(%r12) movb $0, 16(%r12) testq %r15, %r15 movl $.L.str.5, %esi cmovneq %r15, %rsi .Ltmp85: callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc .Ltmp86: # %bb.5: # %.noexc16 movq %rax, %r15 leaq 16(%rbx), %rdi movq %rdi, (%rbx) movq (%rax), %rsi movq %rax, %r12 addq $16, %r12 cmpq %r12, %rsi je .LBB28_6 # %bb.7: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i13 movq %rsi, (%rbx) movq 16(%r15), %rax movq %rax, 16(%rbx) movq 8(%r15), %r13 jmp .LBB28_8 .LBB28_6: movq 8(%r15), %r13 leaq 1(%r13), %rdx callq memcpy@PLT .LBB28_8: movq %r13, 8(%rbx) movq %r12, (%r15) movq $0, 8(%r15) movb $0, 16(%r15) movq 40(%rsp), %rdi cmpq %r14, %rdi je .LBB28_10 # %bb.9: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i18 callq _ZdlPv .LBB28_10: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq 8(%rsp), %rdi leaq 24(%rsp), %rax cmpq %rax, %rdi je .LBB28_12 # %bb.11: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i19 callq _ZdlPv .LBB28_12: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit21 movq %rbx, %rax addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB28_14: .cfi_def_cfa_offset 128 .Ltmp87: movq %rax, %rbx movq 40(%rsp), %rdi cmpq %r14, %rdi je .LBB28_16 # %bb.15: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i22 callq _ZdlPv jmp .LBB28_16 .LBB28_13: .Ltmp84: movq %rax, %rbx .LBB28_16: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit24 movq 8(%rsp), %rdi leaq 24(%rsp), %rax cmpq %rax, %rdi je .LBB28_18 # %bb.17: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i25 callq _ZdlPv .LBB28_18: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit27 movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end28: .size _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei, .Lfunc_end28-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei .cfi_endproc .section .gcc_except_table._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat .p2align 2, 0x0 GCC_except_table28: .Lexception6: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end6-.Lcst_begin6 .Lcst_begin6: .uleb128 .Lfunc_begin6-.Lfunc_begin6 # >> Call Site 1 << .uleb128 .Ltmp82-.Lfunc_begin6 # Call between .Lfunc_begin6 and .Ltmp82 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp82-.Lfunc_begin6 # >> Call Site 2 << .uleb128 .Ltmp83-.Ltmp82 # Call between .Ltmp82 and .Ltmp83 .uleb128 .Ltmp84-.Lfunc_begin6 # jumps to .Ltmp84 .byte 0 # On action: cleanup .uleb128 .Ltmp83-.Lfunc_begin6 # >> Call Site 3 << .uleb128 .Ltmp85-.Ltmp83 # Call between .Ltmp83 and .Ltmp85 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp85-.Lfunc_begin6 # >> Call Site 4 << .uleb128 .Ltmp86-.Ltmp85 # Call between .Ltmp85 and .Ltmp86 .uleb128 .Ltmp87-.Lfunc_begin6 # jumps to .Ltmp87 .byte 0 # On action: cleanup .uleb128 .Ltmp86-.Lfunc_begin6 # >> Call Site 5 << .uleb128 .Lfunc_end28-.Ltmp86 # Call between .Ltmp86 and .Lfunc_end28 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end6: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6system14error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD0Ev,comdat .weak _ZN6thrust6system14error_categoryD0Ev # -- Begin function _ZN6thrust6system14error_categoryD0Ev .p2align 1, 0x90 .type _ZN6thrust6system14error_categoryD0Ev,@function _ZN6thrust6system14error_categoryD0Ev: # @_ZN6thrust6system14error_categoryD0Ev .cfi_startproc # %bb.0: ud2 .Lfunc_end29: .size _ZN6thrust6system14error_categoryD0Ev, .Lfunc_end29-_ZN6thrust6system14error_categoryD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system14error_category23default_error_conditionEi,comdat .weak _ZNK6thrust6system14error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system14error_category23default_error_conditionEi .p2align 1, 0x90 .type _ZNK6thrust6system14error_category23default_error_conditionEi,@function _ZNK6thrust6system14error_category23default_error_conditionEi: # @_ZNK6thrust6system14error_category23default_error_conditionEi .cfi_startproc # %bb.0: movl %esi, %eax movq %rdi, %rdx retq .Lfunc_end30: .size _ZNK6thrust6system14error_category23default_error_conditionEi, .Lfunc_end30-_ZNK6thrust6system14error_category23default_error_conditionEi .cfi_endproc # -- End function .section .text._ZN6thrust6system15system_categoryEv,"axG",@progbits,_ZN6thrust6system15system_categoryEv,comdat .weak _ZN6thrust6system15system_categoryEv # -- Begin function _ZN6thrust6system15system_categoryEv .type _ZN6thrust6system15system_categoryEv,@function _ZN6thrust6system15system_categoryEv: # @_ZN6thrust6system15system_categoryEv .cfi_startproc # %bb.0: movb _ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al testb %al, %al je .LBB31_1 .LBB31_4: movl $_ZZN6thrust6system15system_categoryEvE6result, %eax retq .LBB31_1: pushq %rax .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust6system15system_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB31_3 # %bb.2: movq $_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system15system_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system15system_categoryEvE6result, %edi callq __cxa_guard_release .LBB31_3: addq $8, %rsp .cfi_def_cfa_offset 8 jmp .LBB31_4 .Lfunc_end31: .size _ZN6thrust6system15system_categoryEv, .Lfunc_end31-_ZN6thrust6system15system_categoryEv .cfi_endproc # -- End function .section .text._ZN6thrust6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail21system_error_categoryD0Ev,comdat .weak _ZN6thrust6system6detail21system_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail21system_error_categoryD0Ev .p2align 1, 0x90 .type _ZN6thrust6system6detail21system_error_categoryD0Ev,@function _ZN6thrust6system6detail21system_error_categoryD0Ev: # @_ZN6thrust6system6detail21system_error_categoryD0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end32: .size _ZN6thrust6system6detail21system_error_categoryD0Ev, .Lfunc_end32-_ZN6thrust6system6detail21system_error_categoryD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category4nameEv,comdat .weak _ZNK6thrust6system6detail21system_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail21system_error_category4nameEv .p2align 1, 0x90 .type _ZNK6thrust6system6detail21system_error_category4nameEv,@function _ZNK6thrust6system6detail21system_error_category4nameEv: # @_ZNK6thrust6system6detail21system_error_category4nameEv .cfi_startproc # %bb.0: movl $.L.str.2, %eax retq .Lfunc_end33: .size _ZNK6thrust6system6detail21system_error_category4nameEv, .Lfunc_end33-_ZNK6thrust6system6detail21system_error_category4nameEv .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat .weak _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi .p2align 1, 0x90 .type _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,@function _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi: # @_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl %esi, %ebx leal -9901(%rbx), %eax cmpl $78, %eax ja .LBB34_81 # %bb.1: jmpq *.LJTI34_0(,%rax,8) .LBB34_2: movl $9901, %edi # imm = 0x26AD jmp .LBB34_3 .LBB34_77: movl $9979, %edi # imm = 0x26FB jmp .LBB34_3 .LBB34_33: movl $9961, %edi # imm = 0x26E9 jmp .LBB34_3 .LBB34_50: movl $9968, %edi # imm = 0x26F0 jmp .LBB34_3 .LBB34_67: movl $9974, %edi # imm = 0x26F6 jmp .LBB34_3 .LBB34_75: movl $9977, %edi # imm = 0x26F9 jmp .LBB34_3 .LBB34_28: movl $9945, %edi # imm = 0x26D9 jmp .LBB34_3 .LBB34_19: movl $9952, %edi # imm = 0x26E0 jmp .LBB34_3 .LBB34_29: movl $9958, %edi # imm = 0x26E6 jmp .LBB34_3 .LBB34_22: movl $9955, %edi # imm = 0x26E3 jmp .LBB34_3 .LBB34_17: movl $9951, %edi # imm = 0x26DF jmp .LBB34_3 .LBB34_66: movl $9933, %edi # imm = 0x26CD jmp .LBB34_3 .LBB34_80: movl $9941, %edi # imm = 0x26D5 jmp .LBB34_3 .LBB34_59: movl $9928, %edi # imm = 0x26C8 jmp .LBB34_3 .LBB34_79: movl $9940, %edi # imm = 0x26D4 jmp .LBB34_3 .LBB34_74: movl $9938, %edi # imm = 0x26D2 jmp .LBB34_3 .LBB34_58: movl $9927, %edi # imm = 0x26C7 jmp .LBB34_3 .LBB34_45: movl $9921, %edi # imm = 0x26C1 jmp .LBB34_3 .LBB34_68: movl $9975, %edi # imm = 0x26F7 jmp .LBB34_3 .LBB34_7: movl $9946, %edi # imm = 0x26DA jmp .LBB34_3 .LBB34_39: movl $9917, %edi # imm = 0x26BD jmp .LBB34_3 .LBB34_48: movl $9966, %edi # imm = 0x26EE jmp .LBB34_3 .LBB34_71: movl $9934, %edi # imm = 0x26CE jmp .LBB34_3 .LBB34_13: movl $9906, %edi # imm = 0x26B2 jmp .LBB34_3 .LBB34_43: movl $9919, %edi # imm = 0x26BF jmp .LBB34_3 .LBB34_47: movl $9922, %edi # imm = 0x26C2 jmp .LBB34_3 .LBB34_25: movl $9942, %edi # imm = 0x26D6 jmp .LBB34_3 .LBB34_57: movl $9926, %edi # imm = 0x26C6 jmp .LBB34_3 .LBB34_61: movl $9929, %edi # imm = 0x26C9 jmp .LBB34_3 .LBB34_4: movl $9902, %edi # imm = 0x26AE jmp .LBB34_3 .LBB34_54: movl $9924, %edi # imm = 0x26C4 jmp .LBB34_3 .LBB34_18: movl $9910, %edi # imm = 0x26B6 jmp .LBB34_3 .LBB34_56: movl $9971, %edi # imm = 0x26F3 jmp .LBB34_3 .LBB34_5: movl $9903, %edi # imm = 0x26AF jmp .LBB34_3 .LBB34_11: movl $9905, %edi # imm = 0x26B1 jmp .LBB34_3 .LBB34_36: movl $9914, %edi # imm = 0x26BA jmp .LBB34_3 .LBB34_62: movl $9930, %edi # imm = 0x26CA jmp .LBB34_3 .LBB34_65: movl $9932, %edi # imm = 0x26CC jmp .LBB34_3 .LBB34_15: movl $9908, %edi # imm = 0x26B4 jmp .LBB34_3 .LBB34_6: movl $9904, %edi # imm = 0x26B0 jmp .LBB34_3 .LBB34_26: movl $9911, %edi # imm = 0x26B7 jmp .LBB34_3 .LBB34_31: movl $9943, %edi # imm = 0x26D7 jmp .LBB34_3 .LBB34_53: movl $9923, %edi # imm = 0x26C3 jmp .LBB34_3 .LBB34_16: movl $9909, %edi # imm = 0x26B5 jmp .LBB34_3 .LBB34_8: movl $9947, %edi # imm = 0x26DB jmp .LBB34_3 .LBB34_12: movl $9950, %edi # imm = 0x26DE jmp .LBB34_3 .LBB34_14: movl $9907, %edi # imm = 0x26B3 jmp .LBB34_3 .LBB34_44: movl $9920, %edi # imm = 0x26C0 jmp .LBB34_3 .LBB34_69: movl $9976, %edi # imm = 0x26F8 jmp .LBB34_3 .LBB34_9: movl $9948, %edi # imm = 0x26DC jmp .LBB34_3 .LBB34_78: movl $9939, %edi # imm = 0x26D3 jmp .LBB34_3 .LBB34_35: movl $9913, %edi # imm = 0x26B9 jmp .LBB34_3 .LBB34_23: movl $9956, %edi # imm = 0x26E4 jmp .LBB34_3 .LBB34_55: movl $9925, %edi # imm = 0x26C5 jmp .LBB34_3 .LBB34_63: movl $9931, %edi # imm = 0x26CB jmp .LBB34_3 .LBB34_27: movl $9912, %edi # imm = 0x26B8 jmp .LBB34_3 .LBB34_72: movl $9935, %edi # imm = 0x26CF jmp .LBB34_3 .LBB34_37: movl $9915, %edi # imm = 0x26BB jmp .LBB34_3 .LBB34_38: movl $9916, %edi # imm = 0x26BC jmp .LBB34_3 .LBB34_24: movl $9957, %edi # imm = 0x26E5 jmp .LBB34_3 .LBB34_70: movl $9944, %edi # imm = 0x26D8 jmp .LBB34_3 .LBB34_41: movl $9918, %edi # imm = 0x26BE jmp .LBB34_3 .LBB34_42: movl $9964, %edi # imm = 0x26EC jmp .LBB34_3 .LBB34_46: movl $9965, %edi # imm = 0x26ED jmp .LBB34_3 .LBB34_32: movl $9960, %edi # imm = 0x26E8 jmp .LBB34_3 .LBB34_64: movl $9973, %edi # imm = 0x26F5 jmp .LBB34_3 .LBB34_30: movl $9959, %edi # imm = 0x26E7 jmp .LBB34_3 .LBB34_49: movl $9967, %edi # imm = 0x26EF jmp .LBB34_3 .LBB34_21: movl $9954, %edi # imm = 0x26E2 jmp .LBB34_3 .LBB34_73: movl $9936, %edi # imm = 0x26D0 jmp .LBB34_3 .LBB34_51: movl $9969, %edi # imm = 0x26F1 jmp .LBB34_3 .LBB34_10: movl $9949, %edi # imm = 0x26DD jmp .LBB34_3 .LBB34_34: movl $9962, %edi # imm = 0x26EA jmp .LBB34_3 .LBB34_52: movl $9970, %edi # imm = 0x26F2 jmp .LBB34_3 .LBB34_20: movl $9953, %edi # imm = 0x26E1 jmp .LBB34_3 .LBB34_40: movl $9963, %edi # imm = 0x26EB jmp .LBB34_3 .LBB34_60: movl $9972, %edi # imm = 0x26F4 jmp .LBB34_3 .LBB34_76: movl $9978, %edi # imm = 0x26FA .LBB34_3: callq _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE movl %eax, %ebx .LBB34_82: movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 retq .LBB34_81: .cfi_def_cfa_offset 16 callq _ZN6thrust6system15system_categoryEv movq %rax, %rdx jmp .LBB34_82 .Lfunc_end34: .size _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi, .Lfunc_end34-_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi .cfi_endproc .section .rodata._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat .p2align 3, 0x0 .LJTI34_0: .quad .LBB34_2 .quad .LBB34_4 .quad .LBB34_5 .quad .LBB34_6 .quad .LBB34_11 .quad .LBB34_13 .quad .LBB34_14 .quad .LBB34_15 .quad .LBB34_16 .quad .LBB34_18 .quad .LBB34_26 .quad .LBB34_27 .quad .LBB34_35 .quad .LBB34_36 .quad .LBB34_37 .quad .LBB34_38 .quad .LBB34_39 .quad .LBB34_41 .quad .LBB34_43 .quad .LBB34_44 .quad .LBB34_45 .quad .LBB34_47 .quad .LBB34_53 .quad .LBB34_54 .quad .LBB34_55 .quad .LBB34_57 .quad .LBB34_58 .quad .LBB34_59 .quad .LBB34_61 .quad .LBB34_62 .quad .LBB34_63 .quad .LBB34_65 .quad .LBB34_66 .quad .LBB34_71 .quad .LBB34_72 .quad .LBB34_73 .quad .LBB34_81 .quad .LBB34_74 .quad .LBB34_78 .quad .LBB34_79 .quad .LBB34_80 .quad .LBB34_25 .quad .LBB34_31 .quad .LBB34_70 .quad .LBB34_28 .quad .LBB34_7 .quad .LBB34_8 .quad .LBB34_9 .quad .LBB34_10 .quad .LBB34_12 .quad .LBB34_17 .quad .LBB34_19 .quad .LBB34_20 .quad .LBB34_21 .quad .LBB34_22 .quad .LBB34_23 .quad .LBB34_24 .quad .LBB34_29 .quad .LBB34_30 .quad .LBB34_32 .quad .LBB34_33 .quad .LBB34_34 .quad .LBB34_40 .quad .LBB34_42 .quad .LBB34_46 .quad .LBB34_48 .quad .LBB34_49 .quad .LBB34_50 .quad .LBB34_51 .quad .LBB34_52 .quad .LBB34_56 .quad .LBB34_60 .quad .LBB34_64 .quad .LBB34_67 .quad .LBB34_68 .quad .LBB34_69 .quad .LBB34_75 .quad .LBB34_76 .quad .LBB34_77 # -- End function .section .text._ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,comdat .weak _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei .p2align 1, 0x90 .type _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,@function _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %rbp, -16 movl %edx, %ebp movq %rdi, %rbx movb _ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al testb %al, %al je .LBB35_1 .LBB35_3: # %_ZN6thrust6system16generic_categoryEv.exit movq _ZZN6thrust6system16generic_categoryEvE6result(%rip), %rax movl $_ZZN6thrust6system16generic_categoryEvE6result, %esi movq %rbx, %rdi movl %ebp, %edx callq *48(%rax) movq %rbx, %rax addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB35_1: .cfi_def_cfa_offset 32 movl $_ZGVZN6thrust6system16generic_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB35_3 # %bb.2: movq $_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system16generic_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system16generic_categoryEvE6result, %edi callq __cxa_guard_release jmp .LBB35_3 .Lfunc_end35: .size _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei, .Lfunc_end35-_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei .cfi_endproc # -- End function .section .text._ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,"axG",@progbits,_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,comdat .weak _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE # -- Begin function _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE .type _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,@function _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE: # @_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl %edi, %ebx movb _ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al testb %al, %al je .LBB36_1 .LBB36_3: # %_ZN6thrust6system16generic_categoryEv.exit movl $_ZZN6thrust6system16generic_categoryEvE6result, %edx movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 retq .LBB36_1: .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust6system16generic_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB36_3 # %bb.2: movq $_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system16generic_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system16generic_categoryEvE6result, %edi callq __cxa_guard_release jmp .LBB36_3 .Lfunc_end36: .size _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE, .Lfunc_end36-_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE .cfi_endproc # -- End function .section .text._ZN6thrust6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail22generic_error_categoryD0Ev,comdat .weak _ZN6thrust6system6detail22generic_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail22generic_error_categoryD0Ev .p2align 1, 0x90 .type _ZN6thrust6system6detail22generic_error_categoryD0Ev,@function _ZN6thrust6system6detail22generic_error_categoryD0Ev: # @_ZN6thrust6system6detail22generic_error_categoryD0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end37: .size _ZN6thrust6system6detail22generic_error_categoryD0Ev, .Lfunc_end37-_ZN6thrust6system6detail22generic_error_categoryD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category4nameEv,comdat .weak _ZNK6thrust6system6detail22generic_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail22generic_error_category4nameEv .p2align 1, 0x90 .type _ZNK6thrust6system6detail22generic_error_category4nameEv,@function _ZNK6thrust6system6detail22generic_error_category4nameEv: # @_ZNK6thrust6system6detail22generic_error_category4nameEv .cfi_startproc # %bb.0: movl $.L.str.3, %eax retq .Lfunc_end38: .size _ZNK6thrust6system6detail22generic_error_category4nameEv, .Lfunc_end38-_ZNK6thrust6system6detail22generic_error_category4nameEv .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat .weak _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei .p2align 1, 0x90 .type _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,@function _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei .Lfunc_begin7: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception7 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movl %edx, %ebp movq %rdi, %rbx movb _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %al testb %al, %al je .LBB39_1 .LBB39_4: movl %ebp, %edi callq strerror movq %rax, %r14 leaq 16(%rbx), %rax movq %rax, (%rbx) testq %r14, %r14 je .LBB39_6 # %bb.5: movq %r14, %rdi callq strlen movq %r14, %rdx addq %rax, %rdx movq %rbx, %rdi movq %r14, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag jmp .LBB39_7 .LBB39_6: movq _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %rsi movq _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+8(%rip), %rdx addq %rsi, %rdx movq %rbx, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag .LBB39_7: movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB39_1: .cfi_def_cfa_offset 32 movl $_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB39_4 # %bb.2: movq $_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+16, _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip) .Ltmp88: movl $_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi movl $.L.str.4, %esi movl $.L.str.4+13, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .Ltmp89: # %bb.3: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit movl $_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edi movl $_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi callq __cxa_guard_release jmp .LBB39_4 .LBB39_8: # %.critedge17 .Ltmp90: movq %rax, %rbx movl $_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi callq __cxa_guard_abort movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end39: .size _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei, .Lfunc_end39-_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei .cfi_endproc .section .gcc_except_table._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat .p2align 2, 0x0 GCC_except_table39: .Lexception7: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end7-.Lcst_begin7 .Lcst_begin7: .uleb128 .Lfunc_begin7-.Lfunc_begin7 # >> Call Site 1 << .uleb128 .Ltmp88-.Lfunc_begin7 # Call between .Lfunc_begin7 and .Ltmp88 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp88-.Lfunc_begin7 # >> Call Site 2 << .uleb128 .Ltmp89-.Ltmp88 # Call between .Ltmp88 and .Ltmp89 .uleb128 .Ltmp90-.Lfunc_begin7 # jumps to .Ltmp90 .byte 0 # On action: cleanup .uleb128 .Ltmp89-.Lfunc_begin7 # >> Call Site 3 << .uleb128 .Lfunc_end39-.Ltmp89 # Call between .Ltmp89 and .Lfunc_end39 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end7: .p2align 2, 0x0 # -- End function .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,comdat .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag .p2align 1, 0x90 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,@function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdx, %r14 movq %rsi, %r15 movq %rdi, %rbx subq %rsi, %r14 movq %r14, (%rsp) cmpq $15, %r14 jbe .LBB40_1 # %bb.2: movq %rsp, %r12 movq %rbx, %rdi movq %r12, %rsi xorl %edx, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm movq %rax, (%rbx) movq (%r12), %rcx movq %rcx, 16(%rbx) jmp .LBB40_3 .LBB40_1: # %._crit_edge movq (%rbx), %rax .LBB40_3: testq %r14, %r14 je .LBB40_7 # %bb.4: cmpq $1, %r14 jne .LBB40_6 # %bb.5: movb (%r15), %cl movb %cl, (%rax) jmp .LBB40_7 .LBB40_6: movq %rax, %rdi movq %r15, %rsi movq %r14, %rdx callq memcpy@PLT .LBB40_7: # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tagEN6_GuardD2Ev.exit movq (%rsp), %rax movq %rax, 8(%rbx) movq (%rbx), %rcx movb $0, (%rcx,%rax) addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end40: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag, .Lfunc_end40-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag .cfi_endproc # -- End function .section .text._ZN6thrust6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD0Ev,comdat .weak _ZN6thrust6system6detail9bad_allocD0Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD0Ev .p2align 1, 0x90 .type _ZN6thrust6system6detail9bad_allocD0Ev,@function _ZN6thrust6system6detail9bad_allocD0Ev: # @_ZN6thrust6system6detail9bad_allocD0Ev .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq $_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi) movq 8(%rdi), %rdi leaq 24(%rbx), %rax cmpq %rax, %rdi je .LBB41_2 # %bb.1: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i callq _ZdlPv .LBB41_2: # %_ZN6thrust6system6detail9bad_allocD2Ev.exit movq %rbx, %rdi callq _ZNSt9bad_allocD2Ev movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZdlPv # TAILCALL .Lfunc_end41: .size _ZN6thrust6system6detail9bad_allocD0Ev, .Lfunc_end41-_ZN6thrust6system6detail9bad_allocD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust6system6detail9bad_alloc4whatEv,comdat .weak _ZNK6thrust6system6detail9bad_alloc4whatEv # -- Begin function _ZNK6thrust6system6detail9bad_alloc4whatEv .p2align 1, 0x90 .type _ZNK6thrust6system6detail9bad_alloc4whatEv,@function _ZNK6thrust6system6detail9bad_alloc4whatEv: # @_ZNK6thrust6system6detail9bad_alloc4whatEv .cfi_startproc # %bb.0: movq 8(%rdi), %rax retq .Lfunc_end42: .size _ZNK6thrust6system6detail9bad_alloc4whatEv, .Lfunc_end42-_ZNK6thrust6system6detail9bad_alloc4whatEv .cfi_endproc # -- End function .section .text._ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,"axG",@progbits,_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,comdat .weak _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc # -- Begin function _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .p2align 1, 0x90 .type _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,@function _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc: # @_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %rdx, %rbx movl %esi, %ebp movq %rdi, %r14 movq %rcx, %rsi callq _ZNSt13runtime_errorC2EPKc movq $_ZTVN6thrust6system12system_errorE+16, (%r14) movl %ebp, 16(%r14) movq %rbx, 24(%r14) leaq 48(%r14), %rax movq %rax, 32(%r14) movq $0, 40(%r14) movb $0, 48(%r14) popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end43: .size _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc, .Lfunc_end43-_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .cfi_endproc # -- End function .section .text._ZN6thrust6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust6system12system_errorD2Ev,comdat .weak _ZN6thrust6system12system_errorD2Ev # -- Begin function _ZN6thrust6system12system_errorD2Ev .p2align 1, 0x90 .type _ZN6thrust6system12system_errorD2Ev,@function _ZN6thrust6system12system_errorD2Ev: # @_ZN6thrust6system12system_errorD2Ev .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq $_ZTVN6thrust6system12system_errorE+16, (%rdi) movq 32(%rdi), %rdi leaq 48(%rbx), %rax cmpq %rax, %rdi je .LBB44_2 # %bb.1: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB44_2: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZNSt13runtime_errorD2Ev # TAILCALL .Lfunc_end44: .size _ZN6thrust6system12system_errorD2Ev, .Lfunc_end44-_ZN6thrust6system12system_errorD2Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust6system12system_errorD0Ev,comdat .weak _ZN6thrust6system12system_errorD0Ev # -- Begin function _ZN6thrust6system12system_errorD0Ev .p2align 1, 0x90 .type _ZN6thrust6system12system_errorD0Ev,@function _ZN6thrust6system12system_errorD0Ev: # @_ZN6thrust6system12system_errorD0Ev .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq $_ZTVN6thrust6system12system_errorE+16, (%rdi) movq 32(%rdi), %rdi leaq 48(%rbx), %rax cmpq %rax, %rdi je .LBB45_2 # %bb.1: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i callq _ZdlPv .LBB45_2: # %_ZN6thrust6system12system_errorD2Ev.exit movq %rbx, %rdi callq _ZNSt13runtime_errorD2Ev movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZdlPv # TAILCALL .Lfunc_end45: .size _ZN6thrust6system12system_errorD0Ev, .Lfunc_end45-_ZN6thrust6system12system_errorD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat .weak _ZNK6thrust6system12system_error4whatEv # -- Begin function _ZNK6thrust6system12system_error4whatEv .p2align 1, 0x90 .type _ZNK6thrust6system12system_error4whatEv,@function _ZNK6thrust6system12system_error4whatEv: # @_ZNK6thrust6system12system_error4whatEv .Lfunc_begin8: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception8 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $40, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 32(%rdi), %r14 cmpq $0, 40(%rdi) je .LBB46_3 .LBB46_1: movq (%r14), %rbx .LBB46_2: movq %rbx, %rax addq $40, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB46_3: .cfi_def_cfa_offset 80 movq %rdi, %rbx callq _ZNKSt13runtime_error4whatEv movq %rax, %r15 movq 40(%rbx), %r12 movq %rax, %rdi callq strlen .Ltmp91: movq %r14, %rdi xorl %esi, %esi movq %r12, %rdx movq %r15, %rcx movq %rax, %r8 callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm .Ltmp92: # %bb.4: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit movl 16(%rbx), %edx testl %edx, %edx je .LBB46_1 # %bb.5: cmpq $0, 40(%rbx) je .LBB46_8 # %bb.6: .Ltmp93: movl $.L.str.7, %esi movq %r14, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc .Ltmp94: # %bb.7: # %._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit_crit_edge movl 16(%rbx), %edx .LBB46_8: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit movq 24(%rbx), %rsi movq (%rsi), %rax .Ltmp96: leaq 8(%rsp), %rdi callq *48(%rax) .Ltmp97: # %bb.9: # %_ZNK6thrust6system10error_code7messageB5cxx11Ev.exit movq 8(%rsp), %rsi movq 16(%rsp), %rdx .Ltmp99: movq %r14, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp100: # %bb.10: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit leaq 24(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB46_1 # %bb.11: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv jmp .LBB46_1 .LBB46_12: .Ltmp101: movq %rax, %r14 leaq 24(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB46_17 # %bb.13: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4 callq _ZdlPv jmp .LBB46_17 .LBB46_14: .Ltmp98: jmp .LBB46_16 .LBB46_15: .Ltmp95: .LBB46_16: movq %rax, %r14 .LBB46_17: movq %r14, %rdi callq __cxa_begin_catch movq %rbx, %rdi callq _ZNKSt13runtime_error4whatEv movq %rax, %rbx .Ltmp102: callq __cxa_end_catch .Ltmp103: jmp .LBB46_2 .LBB46_18: .Ltmp104: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end46: .size _ZNK6thrust6system12system_error4whatEv, .Lfunc_end46-_ZNK6thrust6system12system_error4whatEv .cfi_endproc .section .gcc_except_table._ZNK6thrust6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat .p2align 2, 0x0 GCC_except_table46: .Lexception8: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase2-.Lttbaseref2 .Lttbaseref2: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end8-.Lcst_begin8 .Lcst_begin8: .uleb128 .Ltmp91-.Lfunc_begin8 # >> Call Site 1 << .uleb128 .Ltmp94-.Ltmp91 # Call between .Ltmp91 and .Ltmp94 .uleb128 .Ltmp95-.Lfunc_begin8 # jumps to .Ltmp95 .byte 1 # On action: 1 .uleb128 .Ltmp96-.Lfunc_begin8 # >> Call Site 2 << .uleb128 .Ltmp97-.Ltmp96 # Call between .Ltmp96 and .Ltmp97 .uleb128 .Ltmp98-.Lfunc_begin8 # jumps to .Ltmp98 .byte 1 # On action: 1 .uleb128 .Ltmp99-.Lfunc_begin8 # >> Call Site 3 << .uleb128 .Ltmp100-.Ltmp99 # Call between .Ltmp99 and .Ltmp100 .uleb128 .Ltmp101-.Lfunc_begin8 # jumps to .Ltmp101 .byte 1 # On action: 1 .uleb128 .Ltmp100-.Lfunc_begin8 # >> Call Site 4 << .uleb128 .Ltmp102-.Ltmp100 # Call between .Ltmp100 and .Ltmp102 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp102-.Lfunc_begin8 # >> Call Site 5 << .uleb128 .Ltmp103-.Ltmp102 # Call between .Ltmp102 and .Ltmp103 .uleb128 .Ltmp104-.Lfunc_begin8 # jumps to .Ltmp104 .byte 1 # On action: 1 .Lcst_end8: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase2: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE,"axG",@progbits,_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE,comdat .weak _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE # -- Begin function _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE .p2align 1, 0x90 .type _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE,@function _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE: # @_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE .Lfunc_begin9: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception9 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %r8, %rbx testq %rsi, %rsi je .LBB47_9 # %bb.1: # %_ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE8allocateEm.exit movq %rcx, %r15 movq %rdx, %r14 movq 16(%rdi), %r12 addq %r12, %r12 cmpq %r12, %rsi cmovaq %rsi, %r12 movq (%rbx), %rax leaq (,%r12,4), %rsi movq 8(%rax), %rdi movl $4, %edx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm movq %rax, 8(%rbx) movq %r12, 16(%rbx) movq %r14, %rcx subq %r15, %rcx sarq $2, %rcx negq %rcx .Ltmp105: leaq 6(%rsp), %rdi leaq 7(%rsp), %rsi movq %r14, %rdx movq %rax, %r8 callq _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE .Ltmp106: # %bb.2: addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB47_9: .cfi_def_cfa_offset 48 movq %rbx, %rdi addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp _ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv # TAILCALL .LBB47_3: .cfi_def_cfa_offset 48 .Ltmp107: movq %rax, %rdi callq __cxa_begin_catch .Ltmp108: movq %rbx, %rdi callq _ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv .Ltmp109: # %bb.4: .Ltmp110: callq __cxa_rethrow .Ltmp111: # %bb.8: .LBB47_5: .Ltmp112: movq %rax, %rbx .Ltmp113: callq __cxa_end_catch .Ltmp114: # %bb.6: movq %rbx, %rdi callq _Unwind_Resume@PLT .LBB47_7: .Ltmp115: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end47: .size _ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE, .Lfunc_end47-_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE .cfi_endproc .section .gcc_except_table._ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE,"aG",@progbits,_ZN6thrust6detail11vector_baseIiNS_16device_allocatorIiEEE17allocate_and_copyINS0_15normal_iteratorIPKiEEEEvmT_SA_RNS0_18contiguous_storageIiS3_EE,comdat .p2align 2, 0x0 GCC_except_table47: .Lexception9: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase3-.Lttbaseref3 .Lttbaseref3: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end9-.Lcst_begin9 .Lcst_begin9: .uleb128 .Lfunc_begin9-.Lfunc_begin9 # >> Call Site 1 << .uleb128 .Ltmp105-.Lfunc_begin9 # Call between .Lfunc_begin9 and .Ltmp105 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp105-.Lfunc_begin9 # >> Call Site 2 << .uleb128 .Ltmp106-.Ltmp105 # Call between .Ltmp105 and .Ltmp106 .uleb128 .Ltmp107-.Lfunc_begin9 # jumps to .Ltmp107 .byte 1 # On action: 1 .uleb128 .Ltmp106-.Lfunc_begin9 # >> Call Site 3 << .uleb128 .Ltmp108-.Ltmp106 # Call between .Ltmp106 and .Ltmp108 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp108-.Lfunc_begin9 # >> Call Site 4 << .uleb128 .Ltmp111-.Ltmp108 # Call between .Ltmp108 and .Ltmp111 .uleb128 .Ltmp112-.Lfunc_begin9 # jumps to .Ltmp112 .byte 0 # On action: cleanup .uleb128 .Ltmp113-.Lfunc_begin9 # >> Call Site 5 << .uleb128 .Ltmp114-.Ltmp113 # Call between .Ltmp113 and .Ltmp114 .uleb128 .Ltmp115-.Lfunc_begin9 # jumps to .Ltmp115 .byte 1 # On action: 1 .uleb128 .Ltmp114-.Lfunc_begin9 # >> Call Site 6 << .uleb128 .Lfunc_end47-.Ltmp114 # Call between .Ltmp114 and .Lfunc_end47 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end9: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase3: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv,"axG",@progbits,_ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv,comdat .weak _ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv # -- Begin function _ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv .p2align 1, 0x90 .type _ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv,@function _ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv: # @_ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv .cfi_startproc # %bb.0: movq 16(%rdi), %rdx testq %rdx, %rdx je .LBB48_2 # %bb.1: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq (%rdi), %rax movq 8(%rdi), %rsi shlq $2, %rdx movq 8(%rax), %rdi movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm xorps %xmm0, %xmm0 movups %xmm0, 8(%rbx) popq %rbx .cfi_def_cfa_offset 8 .LBB48_2: retq .Lfunc_end48: .size _ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv, .Lfunc_end48-_ZN6thrust6detail18contiguous_storageIiNS_16device_allocatorIiEEE10deallocateEv .cfi_endproc # -- End function .section .text._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,"axG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,comdat .weak _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE # -- Begin function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE .type _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,@function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE: # @_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE .Lfunc_begin10: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception10 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %r8, %rbx movq %rcx, %r14 testq %rcx, %rcx je .LBB49_6 # %bb.1: # %_ZN6thrust11hip_rocprim22trivial_copy_to_deviceIiEE10hipError_tPT_PKS3_mP12ihipStream_t.exit.i leaq (,%r14,4), %rax movq %rbx, %rdi movq %rdx, %rsi movq %rax, %rdx movl $1, %ecx xorl %r8d, %r8d callq hipMemcpyWithStream movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB49_2 .LBB49_6: # %_ZN6thrust11hip_rocprim6__copy19trivial_device_copyINS_6system3cpp6detail3tagENS0_3tagEimEEvRNS5_16execution_policyIT_EERNS0_16execution_policyIT0_EEPT1_PKSG_T2_.exit leaq (%rbx,%r14,4), %rax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB49_2: .cfi_def_cfa_offset 32 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp116: callq _ZN6thrust6system12hip_categoryEv .Ltmp117: # %bb.3: .Ltmp118: movl $.L.str.11, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp119: # %bb.4: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB49_5: .Ltmp120: movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end49: .size _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE, .Lfunc_end49-_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE .cfi_endproc .section .gcc_except_table._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,"aG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagENS_6detail15normal_iteratorIPKiEEmNS_10device_ptrIiEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,comdat .p2align 2, 0x0 GCC_except_table49: .Lexception10: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end10-.Lcst_begin10 .Lcst_begin10: .uleb128 .Lfunc_begin10-.Lfunc_begin10 # >> Call Site 1 << .uleb128 .Ltmp116-.Lfunc_begin10 # Call between .Lfunc_begin10 and .Ltmp116 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp116-.Lfunc_begin10 # >> Call Site 2 << .uleb128 .Ltmp119-.Ltmp116 # Call between .Ltmp116 and .Ltmp119 .uleb128 .Ltmp120-.Lfunc_begin10 # jumps to .Ltmp120 .byte 0 # On action: cleanup .uleb128 .Ltmp119-.Lfunc_begin10 # >> Call Site 3 << .uleb128 .Lfunc_end49-.Ltmp119 # Call between .Ltmp119 and .Lfunc_end49 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end10: .p2align 2, 0x0 # -- End function .section .text._ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_,"axG",@progbits,_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_,comdat .weak _ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_ # -- Begin function _ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_ .p2align 1, 0x90 .type _ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_,@function _ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_: # @_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_ .Lfunc_begin11: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception11 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $56, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %ecx, %ebp testq %rdx, %rdx je .LBB50_18 # %bb.1: movq %rdx, %r14 movq %rsi, %rcx movq %rdi, %r13 xorl %eax, %eax leaq 8(%rsp), %rsi movq %rax, (%rsi) .cfi_escape 0x2e, 0x10 xorl %edi, %edi movq %rcx, 24(%rsp) # 8-byte Spill movq %rcx, %rdx xorl %ecx, %ecx movl %ebp, %r8d movq %r14, %r9 pushq $0 .cfi_adjust_cfa_offset 8 pushq %rax .cfi_adjust_cfa_offset 8 callq _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb addq $16, %rsp .cfi_adjust_cfa_offset -16 movl %eax, %r12d .cfi_escape 0x2e, 0x00 callq hipGetLastError testl %r12d, %r12d jne .LBB50_2 # %bb.7: # %.noexc.i movq 8(%rsp), %rax xorl %ecx, %ecx testb $3, %al setne %cl leaq (%rax,%rcx,4), %r12 andq $-4, %r12 leaq 4(%r12), %rax cmpq $5, %rax movl $4, %ebx cmovaeq %rax, %rbx .cfi_escape 0x2e, 0x00 callq hipGetLastError leaq 32(%rsp), %r15 movq %r13, 16(%rsp) # 8-byte Spill movq %r13, (%r15) xorps %xmm0, %xmm0 movups %xmm0, 8(%r15) .cfi_escape 0x2e, 0x00 movq %r15, %rdi movq %rbx, %rsi callq _ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm movq %rax, %r13 movq %rax, 8(%r15) movq %rbx, 16(%r15) .Ltmp126: .cfi_escape 0x2e, 0x00 callq hipGetLastError .Ltmp127: # %bb.8: # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_t.exit.i .Ltmp128: addq %r13, %r12 .cfi_escape 0x2e, 0x10 leaq 8(%rsp), %rsi movq %r13, %rdi movq 24(%rsp), %rdx # 8-byte Reload movq %r12, %rcx movl %ebp, %r8d movq %r14, %r9 pushq $0 .cfi_adjust_cfa_offset 8 pushq $0 .cfi_adjust_cfa_offset 8 callq _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb addq $16, %rsp .cfi_adjust_cfa_offset -16 .Ltmp129: # %bb.9: # %_ZN7rocprim6reduceINS_14default_configEN6thrust6detail15normal_iteratorINS2_10device_ptrIiEEEEPiiNS2_4plusIiEEEE10hipError_tPvRmT0_T1_T2_mT3_P12ihipStream_tb.exit.i .Ltmp130: movl %eax, %ebp .cfi_escape 0x2e, 0x00 callq hipGetLastError .Ltmp131: # %bb.10: # %.noexc31.i testl %ebp, %ebp jne .LBB50_11 # %bb.16: # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit35.i .Ltmp140: .cfi_escape 0x2e, 0x00 leaq 3(%rsp), %rsi leaq 4(%rsp), %r8 movl $1, %ecx movq 16(%rsp), %rdi # 8-byte Reload movq %r12, %rdx callq _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE .Ltmp141: # %bb.17: movl 4(%rsp), %ebp .cfi_escape 0x2e, 0x00 leaq 32(%rsp), %rdi callq _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev .LBB50_18: # %_ZN6thrust11hip_rocprim8__reduce6reduceINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SB_T3_.exit movl %ebp, %eax addq $56, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB50_2: .cfi_def_cfa_offset 112 .cfi_escape 0x2e, 0x00 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp121: .cfi_escape 0x2e, 0x00 callq _ZN6thrust6system12hip_categoryEv .Ltmp122: # %bb.3: .Ltmp123: .cfi_escape 0x2e, 0x00 movl $.L.str.12, %ecx movq %rbx, %rdi movl %r12d, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp124: # %bb.4: .cfi_escape 0x2e, 0x00 movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB50_11: .cfi_escape 0x2e, 0x00 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp132: .cfi_escape 0x2e, 0x00 callq _ZN6thrust6system12hip_categoryEv .Ltmp133: # %bb.12: .Ltmp134: movq %rax, %r14 .cfi_escape 0x2e, 0x00 movl $.L.str.13, %esi movq %rbx, %rdi callq _ZNSt13runtime_errorC2EPKc .Ltmp135: # %bb.13: movq $_ZTVN6thrust6system12system_errorE+16, (%rbx) movl %ebp, 16(%rbx) movq %r14, 24(%rbx) movq %rbx, %rax addq $48, %rax movq %rax, 32(%rbx) movq $0, 40(%rbx) movb $0, 48(%rbx) .Ltmp137: .cfi_escape 0x2e, 0x00 movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .Ltmp138: # %bb.14: # %.noexc32.i .LBB50_15: .Ltmp136: movq %rax, %r14 .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq __cxa_free_exception jmp .LBB50_22 .LBB50_5: .Ltmp125: movq %rax, %r14 .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq __cxa_free_exception jmp .LBB50_6 .LBB50_20: .Ltmp142: jmp .LBB50_21 .LBB50_19: .Ltmp139: .LBB50_21: # %.body.i movq %rax, %r14 .LBB50_22: # %.body.i .cfi_escape 0x2e, 0x00 leaq 32(%rsp), %rdi callq _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev .LBB50_6: # %common.resume.i .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end50: .size _ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_, .Lfunc_end50-_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_ .cfi_endproc .section .gcc_except_table._ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_,"aG",@progbits,_ZZN6thrust11hip_rocprim8reduce_nINS0_3tagENS_6detail15normal_iteratorINS_10device_ptrIiEEEEliNS_4plusIiEEEET2_RNS0_16execution_policyIT_EET0_T1_SA_T3_EN10workaround3parERNSB_IS2_EES7_liS9_,comdat .p2align 2, 0x0 GCC_except_table50: .Lexception11: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end11-.Lcst_begin11 .Lcst_begin11: .uleb128 .Lfunc_begin11-.Lfunc_begin11 # >> Call Site 1 << .uleb128 .Ltmp126-.Lfunc_begin11 # Call between .Lfunc_begin11 and .Ltmp126 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp126-.Lfunc_begin11 # >> Call Site 2 << .uleb128 .Ltmp131-.Ltmp126 # Call between .Ltmp126 and .Ltmp131 .uleb128 .Ltmp139-.Lfunc_begin11 # jumps to .Ltmp139 .byte 0 # On action: cleanup .uleb128 .Ltmp140-.Lfunc_begin11 # >> Call Site 3 << .uleb128 .Ltmp141-.Ltmp140 # Call between .Ltmp140 and .Ltmp141 .uleb128 .Ltmp142-.Lfunc_begin11 # jumps to .Ltmp142 .byte 0 # On action: cleanup .uleb128 .Ltmp141-.Lfunc_begin11 # >> Call Site 4 << .uleb128 .Ltmp121-.Ltmp141 # Call between .Ltmp141 and .Ltmp121 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp121-.Lfunc_begin11 # >> Call Site 5 << .uleb128 .Ltmp124-.Ltmp121 # Call between .Ltmp121 and .Ltmp124 .uleb128 .Ltmp125-.Lfunc_begin11 # jumps to .Ltmp125 .byte 0 # On action: cleanup .uleb128 .Ltmp124-.Lfunc_begin11 # >> Call Site 6 << .uleb128 .Ltmp132-.Ltmp124 # Call between .Ltmp124 and .Ltmp132 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp132-.Lfunc_begin11 # >> Call Site 7 << .uleb128 .Ltmp135-.Ltmp132 # Call between .Ltmp132 and .Ltmp135 .uleb128 .Ltmp136-.Lfunc_begin11 # jumps to .Ltmp136 .byte 0 # On action: cleanup .uleb128 .Ltmp137-.Lfunc_begin11 # >> Call Site 8 << .uleb128 .Ltmp138-.Ltmp137 # Call between .Ltmp137 and .Ltmp138 .uleb128 .Ltmp139-.Lfunc_begin11 # jumps to .Ltmp139 .byte 0 # On action: cleanup .uleb128 .Ltmp138-.Lfunc_begin11 # >> Call Site 9 << .uleb128 .Lfunc_end50-.Ltmp138 # Call between .Ltmp138 and .Lfunc_end50 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end11: .p2align 2, 0x0 # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb .LCPI51_0: .quad 0x41cdcd6500000000 # double 1.0E+9 .LCPI51_1: .quad 0x408f400000000000 # double 1000 .section .text._ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,comdat .weak _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb .type _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,@function _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb: # @_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $1640, %rsp # imm = 0x668 .cfi_def_cfa_offset 1696 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %r9, %r14 movl %r8d, %ebx movq %rcx, %r13 movq %rdx, 64(%rsp) # 8-byte Spill movq %rsi, %rbp movq %rdi, %r12 movq 1696(%rsp), %r15 testq $-3, %r15 jne .LBB51_1 # %bb.3: # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.i leaq 48(%rsp), %rdi callq hipGetDevice testl %eax, %eax jne .LBB51_69 # %bb.4: # %thread-pre-split.i movl 48(%rsp), %esi jmp .LBB51_5 .LBB51_1: movq %r15, %rdi callq hipGetStreamDeviceId movl %eax, %esi movl %eax, 48(%rsp) testl %eax, %eax js .LBB51_2 .LBB51_5: # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread.i movl $999, %eax # imm = 0x3E7 cmpl $511, %esi # imm = 0x1FF ja .LBB51_69 # %bb.6: movl %ebx, 28(%rsp) # 4-byte Spill movl %esi, %ebx movl _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4), %eax testl %eax, %eax movq %r13, 56(%rsp) # 8-byte Spill je .LBB51_7 .LBB51_9: movabsq $17179869440, %rcx # imm = 0x400000100 cmpl $1029, %eax # imm = 0x405 movl 28(%rsp), %ebx # 4-byte Reload jle .LBB51_10 # %bb.13: cmpl $1030, %eax # imm = 0x406 je .LBB51_17 # %bb.14: cmpl $1100, %eax # imm = 0x44C je .LBB51_18 # %bb.15: cmpl $1102, %eax # imm = 0x44E jne .LBB51_19 # %bb.16: movabsq $34359738496, %rcx # imm = 0x800000080 subq $-128, %rcx jmp .LBB51_19 .LBB51_2: movl $400, %eax # imm = 0x190 jmp .LBB51_69 .LBB51_7: leaq 168(%rsp), %rdi callq hipGetDevicePropertiesR0600 testl %eax, %eax jne .LBB51_69 # %bb.8: # %_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE.exit.thread225 movq %r14, %r13 leaq 1328(%rsp), %r14 leaq 1584(%rsp), %rsi movq %r14, %rdi callq _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag subq %r14, %rax movq %r14, %rdi movq %r13, %r14 movq %rax, %rsi callq _ZN7rocprim6detail25get_target_arch_from_nameEPKcm movl %eax, %ecx xchgl %ecx, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%rbx,4) jmp .LBB51_9 .LBB51_10: cmpl $803, %eax # imm = 0x323 je .LBB51_18 # %bb.11: cmpl $900, %eax # imm = 0x384 jne .LBB51_19 # %bb.12: movabsq $34359738496, %rcx # imm = 0x800000080 jmp .LBB51_19 .LBB51_18: movabsq $68719476992, %rcx # imm = 0x1000000100 jmp .LBB51_19 .LBB51_17: movabsq $8589934848, %rcx # imm = 0x200000100 .LBB51_19: # %_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEiEEEEDaNS0_11target_archE.exit movq %rcx, %r13 shrq $32, %r13 movq %rcx, 40(%rsp) # 8-byte Spill imull %ecx, %r13d leaq (%r14,%r13), %rax decq %rax xorl %ecx, %ecx xorl %edx, %edx divq %r13 movq %rcx, 168(%rsp) movq %rcx, 48(%rsp) movq %rcx, 80(%rsp) cmpq $2, %rax jb .LBB51_22 # %bb.20: movzbl 1704(%rsp), %r10d leaq 80(%rsp), %rsi xorl %edi, %edi xorl %edx, %edx movq 56(%rsp), %rcx # 8-byte Reload movq %r15, %r11 movl %ebx, %r15d movl %ebx, %r8d movq %rax, %rbx movq %rax, %r9 pushq %r10 .cfi_adjust_cfa_offset 8 pushq %r11 .cfi_adjust_cfa_offset 8 callq _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb addq $16, %rsp .cfi_adjust_cfa_offset -16 testl %eax, %eax jne .LBB51_69 # %bb.21: # %._crit_edge261 movq 80(%rsp), %rcx movq %rbx, %rax movl %r15d, %ebx movq 1696(%rsp), %r15 .LBB51_22: movq %rax, 32(%rsp) # 8-byte Spill leaq (,%rax,4), %rax xorl %edx, %edx cmpq %r14, %r13 cmovbq %rax, %rdx leaq 168(%rsp), %rax movq %rax, 120(%rsp) movq %rdx, 128(%rsp) movl $4, %eax movq %rax, 136(%rsp) leaq 48(%rsp), %rdx movq %rdx, 144(%rsp) movq %rcx, 152(%rsp) movq %rax, 160(%rsp) subq $48, %rsp .cfi_adjust_cfa_offset 48 movupd 168(%rsp), %xmm0 movups 184(%rsp), %xmm1 movups 200(%rsp), %xmm2 movups %xmm2, 32(%rsp) movups %xmm1, 16(%rsp) movupd %xmm0, (%rsp) movq %r12, %rdi movq %rbp, %rsi callq _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_ addq $48, %rsp .cfi_adjust_cfa_offset -48 testq %r12, %r12 je .LBB51_69 # %bb.23: testl %eax, %eax jne .LBB51_69 # %bb.24: movl $-1, %eax xorl %edx, %edx divl %r13d # kill: def $eax killed $eax def $rax movq %rax, 72(%rsp) # 8-byte Spill movb 1704(%rsp), %sil testb %sil, %sil je .LBB51_49 # %bb.25: movl $_ZSt4cout, %edi movl $.L.str.14, %esi movl $11, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq 40(%rsp), %r12 # 8-byte Reload # kill: def $r12d killed $r12d killed $r12 def $r12 andl $384, %r12d # imm = 0x180 movl $_ZSt4cout, %edi movq %r12, %rsi callq _ZNSo9_M_insertImEERSoT_ movb $10, 15(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB51_27 # %bb.26: leaq 15(%rsp), %rsi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB51_28 .LBB51_49: # %.thread244 cmpq $1, 32(%rsp) # 8-byte Folded Reload ja .LBB51_38 # %bb.50: # %.thread244..thread245_crit_edge movq 40(%rsp), %r12 # 8-byte Reload andl $384, %r12d # imm = 0x180 xorl %eax, %eax jmp .LBB51_61 .LBB51_27: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .LBB51_28: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit movl $_ZSt4cout, %edi movl $.L.str.15, %esi movl $17, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq 32(%rsp), %rsi # 8-byte Reload callq _ZNSo9_M_insertImEERSoT_ movb $10, 15(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB51_30 # %bb.29: leaq 15(%rsp), %rsi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB51_31 .LBB51_30: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .LBB51_31: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit163 movl $_ZSt4cout, %edi movl $.L.str.16, %esi movl $23, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq 72(%rsp), %rsi # 8-byte Reload callq _ZNSo9_M_insertImEERSoT_ movb $10, 15(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB51_33 # %bb.32: leaq 15(%rsp), %rsi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB51_34 .LBB51_33: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .LBB51_34: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit166 movl $_ZSt4cout, %edi movl $.L.str.17, %esi movl $16, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq %r13, %rsi callq _ZNSo9_M_insertImEERSoT_ movb $10, 15(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB51_36 # %bb.35: leaq 15(%rsp), %rsi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB51_37 .LBB51_36: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .LBB51_37: cmpq $1, 32(%rsp) # 8-byte Folded Reload movb 1704(%rsp), %sil jbe .LBB51_60 .LBB51_38: leaq -1(%r14), %rcx movq 72(%rsp), %r12 # 8-byte Reload imulq %r13, %r12 leaq (%rcx,%r12), %rax xorl %edx, %edx movq %rdx, 16(%rsp) # 8-byte Spill xorl %edx, %edx divq %r12 movq %rax, 112(%rsp) # 8-byte Spill addq %r12, %rcx jb .LBB51_55 # %bb.39: # %.lr.ph leaq -1(%r13), %rax movq %rax, 104(%rsp) # 8-byte Spill movq 40(%rsp), %rbx # 8-byte Reload andl $384, %ebx # imm = 0x180 btsq $32, %rbx movq %rbx, 40(%rsp) # 8-byte Spill xorl %r15d, %r15d xorl %ebx, %ebx xorl %eax, %eax movq %rax, 16(%rsp) # 8-byte Spill movq %r14, 96(%rsp) # 8-byte Spill .LBB51_40: # =>This Inner Loop Header: Depth=1 subq %rbx, %r14 cmpq %r12, %r14 cmovaeq %r12, %r14 movq 104(%rsp), %rax # 8-byte Reload addq %r14, %rax xorl %edx, %edx divq %r13 movq %rax, %rbp testb %sil, %sil je .LBB51_42 # %bb.41: # in Loop: Header=BB51_40 Depth=1 callq _ZNSt6chrono3_V212system_clock3nowEv movq %rax, 16(%rsp) # 8-byte Spill .LBB51_42: # in Loop: Header=BB51_40 Depth=1 movl %ebp, %edi movabsq $4294967296, %rax # imm = 0x100000000 orq %rax, %rdi movl $1, %esi movq 40(%rsp), %rdx # 8-byte Reload movl $1, %ecx xorl %r8d, %r8d movq 1696(%rsp), %r9 callq __hipPushCallConfiguration testl %eax, %eax jne .LBB51_44 # %bb.43: # in Loop: Header=BB51_40 Depth=1 movq 64(%rsp), %rax # 8-byte Reload leaq (%rax,%rbx,4), %rdi movq %r15, %rdx imulq 72(%rsp), %rdx # 8-byte Folded Reload shlq $2, %rdx addq 168(%rsp), %rdx movq %r14, %rsi movl 28(%rsp), %ecx # 4-byte Reload callq _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .LBB51_44: # in Loop: Header=BB51_40 Depth=1 callq hipGetLastError testl %eax, %eax movb 1704(%rsp), %sil jne .LBB51_51 # %bb.45: # in Loop: Header=BB51_40 Depth=1 testb %sil, %sil je .LBB51_51 # %bb.46: # in Loop: Header=BB51_40 Depth=1 movl $_ZSt4cout, %edi movl $.L.str.18, %esi movl $19, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movl $.L.str.19, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq %r14, %rsi callq _ZNSo9_M_insertImEERSoT_ movl $.L.str.20, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq 1696(%rsp), %rdi callq hipStreamSynchronize testl %eax, %eax jne .LBB51_69 # %bb.47: # in Loop: Header=BB51_40 Depth=1 callq _ZNSt6chrono3_V212system_clock3nowEv subq 16(%rsp), %rax # 8-byte Folded Reload cvtsi2sd %rax, %xmm0 divsd .LCPI51_0(%rip), %xmm0 movsd %xmm0, 88(%rsp) # 8-byte Spill movl $_ZSt4cout, %edi movl $.L.str.21, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movsd 88(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero mulsd .LCPI51_1(%rip), %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r14 movl $.L.str.22, %esi movl $3, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movb $10, 15(%rsp) movq (%r14), %rax movq -24(%rax), %rax cmpq $0, 16(%r14,%rax) je .LBB51_52 # %bb.48: # in Loop: Header=BB51_40 Depth=1 movl $1, %edx movq %r14, %rdi leaq 15(%rsp), %rsi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB51_53 .LBB51_51: # in Loop: Header=BB51_40 Depth=1 testl %eax, %eax je .LBB51_54 jmp .LBB51_69 .LBB51_52: # in Loop: Header=BB51_40 Depth=1 movq %r14, %rdi movl $10, %esi callq _ZNSo3putEc .LBB51_53: # in Loop: Header=BB51_40 Depth=1 movb 1704(%rsp), %sil .LBB51_54: # in Loop: Header=BB51_40 Depth=1 incq %r15 addq %r12, %rbx cmpq 112(%rsp), %r15 # 8-byte Folded Reload movq 96(%rsp), %r14 # 8-byte Reload jb .LBB51_40 .LBB51_55: # %._crit_edge testb %sil, %sil je .LBB51_57 # %bb.56: callq _ZNSt6chrono3_V212system_clock3nowEv movb 1704(%rsp), %sil movq %rax, 16(%rsp) # 8-byte Spill .LBB51_57: movq 48(%rsp), %rdi movq 168(%rsp), %rdx movzbl %sil, %eax movl %esi, %ebp leaq 80(%rsp), %rsi movq 56(%rsp), %rcx # 8-byte Reload movl 28(%rsp), %r8d # 4-byte Reload movq 32(%rsp), %r9 # 8-byte Reload pushq %rax .cfi_adjust_cfa_offset 8 movq 1704(%rsp), %rbx pushq %rbx .cfi_adjust_cfa_offset 8 callq _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb addq $16, %rsp .cfi_adjust_cfa_offset -16 testl %eax, %eax jne .LBB51_70 # %bb.58: testb %bpl, %bpl je .LBB51_70 # %bb.59: movl $_ZSt4cout, %edi movl $.L.str.23, %esi movl $20, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movl $.L.str.19, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq 32(%rsp), %rsi # 8-byte Reload callq _ZNSo9_M_insertImEERSoT_ movl $.L.str.20, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq %rbx, %rdi jmp .LBB51_66 .LBB51_60: callq _ZNSt6chrono3_V212system_clock3nowEv .LBB51_61: # %.thread245 movq %rax, 16(%rsp) # 8-byte Spill movq 56(%rsp), %r13 # 8-byte Reload btsq $32, %r12 movabsq $4294967296, %rdi # imm = 0x100000000 orq $1, %rdi movl $1, %esi movq %r12, %rdx movl $1, %ecx xorl %r8d, %r8d movq %r15, %r9 callq __hipPushCallConfiguration testl %eax, %eax jne .LBB51_63 # %bb.62: movq 64(%rsp), %rdi # 8-byte Reload movq %r14, %rsi movq %r13, %rdx movl %ebx, %ecx callq _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .LBB51_63: callq hipGetLastError testl %eax, %eax jne .LBB51_70 # %bb.64: cmpb $0, 1704(%rsp) je .LBB51_70 # %bb.65: movl $_ZSt4cout, %edi movl $.L.str.18, %esi movl $19, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movl $.L.str.19, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq %r14, %rsi callq _ZNSo9_M_insertImEERSoT_ movl $.L.str.20, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq %r15, %rdi .LBB51_66: callq hipStreamSynchronize testl %eax, %eax jne .LBB51_69 # %bb.67: # %.sink.split callq _ZNSt6chrono3_V212system_clock3nowEv subq 16(%rsp), %rax # 8-byte Folded Reload cvtsi2sd %rax, %xmm0 divsd .LCPI51_0(%rip), %xmm0 movsd %xmm0, 64(%rsp) # 8-byte Spill movl $_ZSt4cout, %edi movl $.L.str.21, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movsd 64(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero mulsd .LCPI51_1(%rip), %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %rbx movl $.L.str.22, %esi movl $3, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq %rbx, %rdi movl $10, %esi callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c jmp .LBB51_68 .LBB51_70: testl %eax, %eax jne .LBB51_69 .LBB51_68: xorl %eax, %eax .LBB51_69: addq $1640, %rsp # imm = 0x668 .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end51: .size _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb, .Lfunc_end51-_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEN6thrust6detail15normal_iteratorINS3_10device_ptrIiEEEEPiiNS3_4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb .cfi_endproc # -- End function .section .text._ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE,"axG",@progbits,_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE,comdat .weak _ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE # -- Begin function _ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE .type _ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE,@function _ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE: # @_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $1480, %rsp # imm = 0x5C8 .cfi_def_cfa_offset 1520 .cfi_offset %rbx, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rsi, %rbx testq $-3, %rdi jne .LBB52_1 # %bb.3: # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit leaq 4(%rsp), %rdi callq hipGetDevice movl %eax, %ebp testl %eax, %eax jne .LBB52_9 # %bb.4: # %thread-pre-split movl 4(%rsp), %eax jmp .LBB52_5 .LBB52_1: callq hipGetStreamDeviceId movl %eax, 4(%rsp) testl %eax, %eax js .LBB52_2 .LBB52_5: # %_ZN7rocprim6detail22get_device_from_streamEP12ihipStream_tRi.exit.thread movl $999, %ebp # imm = 0x3E7 cmpl $511, %eax # imm = 0x1FF ja .LBB52_9 # %bb.6: movl %eax, %r15d movl _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r15,4), %ecx movl %ecx, (%rbx) xorl %ebp, %ebp testl %ecx, %ecx jne .LBB52_9 # %bb.7: leaq 8(%rsp), %rdi movl %eax, %esi callq hipGetDevicePropertiesR0600 movl %eax, %ebp testl %eax, %eax jne .LBB52_9 # %bb.8: leaq 1168(%rsp), %r14 leaq 1424(%rsp), %rsi movq %r14, %rdi callq _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag subq %r14, %rax movq %r14, %rdi movq %rax, %rsi callq _ZN7rocprim6detail25get_target_arch_from_nameEPKcm movl %eax, (%rbx) xchgl %eax, _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache(,%r15,4) jmp .LBB52_9 .LBB52_2: movl $400, %ebp # imm = 0x190 .LBB52_9: # %_ZN7rocprim6detail15get_device_archEiRNS0_11target_archE.exit movl %ebp, %eax addq $1480, %rsp # imm = 0x5C8 .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end52: .size _ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE, .Lfunc_end52-_ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb .LCPI53_0: .quad 0x41cdcd6500000000 # double 1.0E+9 .LCPI53_1: .quad 0x408f400000000000 # double 1000 .section .text._ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,"axG",@progbits,_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,comdat .weak _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb .type _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb,@function _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb: # @_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $184, %rsp .cfi_def_cfa_offset 240 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %r9, %rbp movl %r8d, %r15d movq %rcx, %r12 movq %rdx, %r14 movq %rsi, %rbx movq %rdi, %r13 movq 240(%rsp), %rdi leaq 100(%rsp), %rsi callq _ZN7rocprim6detail16host_target_archEP12ihipStream_tRNS0_11target_archE testl %eax, %eax je .LBB53_1 .LBB53_61: addq $184, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB53_1: .cfi_def_cfa_offset 240 movq %r12, %rdx movq %r13, 16(%rsp) # 8-byte Spill movq %rbp, 24(%rsp) # 8-byte Spill movq 240(%rsp), %r12 movq %r14, 72(%rsp) # 8-byte Spill movabsq $17179869440, %rcx # imm = 0x400000100 movl 100(%rsp), %eax cmpl $1029, %eax # imm = 0x405 movq %rdx, 56(%rsp) # 8-byte Spill jle .LBB53_2 # %bb.5: cmpl $1030, %eax # imm = 0x406 movl %r15d, %r8d movq 24(%rsp), %rdi # 8-byte Reload movq %rbx, %rsi movq 16(%rsp), %r14 # 8-byte Reload je .LBB53_9 # %bb.6: cmpl $1100, %eax # imm = 0x44C je .LBB53_10 # %bb.7: cmpl $1102, %eax # imm = 0x44E jne .LBB53_11 # %bb.8: movabsq $34359738496, %rcx # imm = 0x800000080 subq $-128, %rcx jmp .LBB53_11 .LBB53_2: cmpl $803, %eax # imm = 0x323 movl %r15d, %r8d movq 24(%rsp), %rdi # 8-byte Reload movq %rbx, %rsi movq 16(%rsp), %r14 # 8-byte Reload je .LBB53_10 # %bb.3: cmpl $900, %eax # imm = 0x384 jne .LBB53_11 # %bb.4: movabsq $34359738496, %rcx # imm = 0x800000080 jmp .LBB53_11 .LBB53_10: movabsq $68719476992, %rcx # imm = 0x1000000100 jmp .LBB53_11 .LBB53_9: movabsq $8589934848, %rcx # imm = 0x200000100 .LBB53_11: # %_ZN7rocprim6detail20dispatch_target_archINS0_21wrapped_reduce_configINS_14default_configEiEEEEDaNS0_11target_archE.exit movb 248(%rsp), %bpl movq %rcx, %r13 shrq $32, %r13 movq %rcx, 40(%rsp) # 8-byte Spill imull %ecx, %r13d leaq (%rdi,%r13), %rax decq %rax xorl %ecx, %ecx xorl %edx, %edx divq %r13 movq %rcx, 88(%rsp) movq %rcx, 104(%rsp) movq %rcx, 80(%rsp) cmpq $2, %rax jb .LBB53_14 # %bb.12: movzbl %bpl, %r10d leaq 80(%rsp), %rsi xorl %edi, %edi xorl %edx, %edx movq 56(%rsp), %rcx # 8-byte Reload movq %rax, %r14 movq %rax, %r9 pushq %r10 .cfi_adjust_cfa_offset 8 pushq %r12 .cfi_adjust_cfa_offset 8 callq _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb addq $16, %rsp .cfi_adjust_cfa_offset -16 testl %eax, %eax jne .LBB53_61 # %bb.13: # %._crit_edge245 movq 80(%rsp), %rcx movq %r14, %rax movq 24(%rsp), %rdi # 8-byte Reload movq %rbx, %rsi movq 16(%rsp), %r14 # 8-byte Reload .LBB53_14: movq %rax, 32(%rsp) # 8-byte Spill leaq (,%rax,4), %rax xorl %edx, %edx cmpq %rdi, %r13 cmovbq %rax, %rdx leaq 88(%rsp), %rax movq %rax, 136(%rsp) movq %rdx, 144(%rsp) movl $4, %eax movq %rax, 152(%rsp) leaq 104(%rsp), %rdx movq %rdx, 160(%rsp) movq %rcx, 168(%rsp) movq %rax, 176(%rsp) subq $48, %rsp .cfi_adjust_cfa_offset 48 movupd 184(%rsp), %xmm0 movups 200(%rsp), %xmm1 movups 216(%rsp), %xmm2 movups %xmm2, 32(%rsp) movups %xmm1, 16(%rsp) movupd %xmm0, (%rsp) movq %r14, %rdi callq _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_ addq $48, %rsp .cfi_adjust_cfa_offset -48 testq %r14, %r14 je .LBB53_61 # %bb.15: testl %eax, %eax jne .LBB53_61 # %bb.16: movl $-1, %eax xorl %edx, %edx divl %r13d # kill: def $eax killed $eax def $rax movq %rax, 64(%rsp) # 8-byte Spill testb %bpl, %bpl je .LBB53_41 # %bb.17: movl $_ZSt4cout, %edi movl $.L.str.14, %esi movl $11, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq 40(%rsp), %rbx # 8-byte Reload # kill: def $ebx killed $ebx killed $rbx def $rbx andl $384, %ebx # imm = 0x180 movl $_ZSt4cout, %edi movq %rbx, %rsi callq _ZNSo9_M_insertImEERSoT_ movb $10, 15(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) movq 72(%rsp), %rbp # 8-byte Reload je .LBB53_19 # %bb.18: leaq 15(%rsp), %rsi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB53_20 .LBB53_41: # %.thread228 cmpq $1, 32(%rsp) # 8-byte Folded Reload movq 72(%rsp), %rbp # 8-byte Reload ja .LBB53_30 # %bb.42: # %.thread228..thread229_crit_edge movq 40(%rsp), %rbx # 8-byte Reload andl $384, %ebx # imm = 0x180 xorl %eax, %eax jmp .LBB53_54 .LBB53_19: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .LBB53_20: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit movl $_ZSt4cout, %edi movl $.L.str.15, %esi movl $17, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq 32(%rsp), %rsi # 8-byte Reload callq _ZNSo9_M_insertImEERSoT_ movb $10, 15(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB53_22 # %bb.21: leaq 15(%rsp), %rsi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB53_23 .LBB53_22: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .LBB53_23: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit161 movl $_ZSt4cout, %edi movl $.L.str.16, %esi movl $23, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq 64(%rsp), %rsi # 8-byte Reload callq _ZNSo9_M_insertImEERSoT_ movb $10, 15(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB53_25 # %bb.24: leaq 15(%rsp), %rsi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB53_26 .LBB53_25: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .LBB53_26: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit164 movl $_ZSt4cout, %edi movl $.L.str.17, %esi movl $16, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq %r13, %rsi callq _ZNSo9_M_insertImEERSoT_ movb $10, 15(%rsp) movq (%rax), %rcx movq -24(%rcx), %rcx cmpq $0, 16(%rax,%rcx) je .LBB53_28 # %bb.27: leaq 15(%rsp), %rsi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB53_29 .LBB53_28: movq %rax, %rdi movl $10, %esi callq _ZNSo3putEc .LBB53_29: cmpq $1, 32(%rsp) # 8-byte Folded Reload jbe .LBB53_53 .LBB53_30: movl %r15d, 52(%rsp) # 4-byte Spill movq 24(%rsp), %rax # 8-byte Reload leaq -1(%rax), %rcx movq 64(%rsp), %r15 # 8-byte Reload imulq %r13, %r15 leaq (%rcx,%r15), %rax xorl %edx, %edx movq %rdx, 16(%rsp) # 8-byte Spill xorl %edx, %edx divq %r15 movq %rax, 128(%rsp) # 8-byte Spill addq %r15, %rcx jb .LBB53_46 # %bb.31: # %.lr.ph leaq -1(%r13), %rax movq %rax, 120(%rsp) # 8-byte Spill movq 40(%rsp), %r14 # 8-byte Reload andl $384, %r14d # imm = 0x180 btsq $32, %r14 movq %r14, 40(%rsp) # 8-byte Spill xorl %r14d, %r14d xorl %r12d, %r12d xorl %eax, %eax movq %rax, 16(%rsp) # 8-byte Spill .LBB53_32: # =>This Inner Loop Header: Depth=1 movq 24(%rsp), %rbp # 8-byte Reload subq %r12, %rbp cmpq %r15, %rbp cmovaeq %r15, %rbp movq 120(%rsp), %rax # 8-byte Reload addq %rbp, %rax xorl %edx, %edx divq %r13 movq %rax, %rbx cmpb $0, 248(%rsp) je .LBB53_34 # %bb.33: # in Loop: Header=BB53_32 Depth=1 callq _ZNSt6chrono3_V212system_clock3nowEv movq %rax, 16(%rsp) # 8-byte Spill .LBB53_34: # in Loop: Header=BB53_32 Depth=1 movl %ebx, %edi movabsq $4294967296, %rax # imm = 0x100000000 orq %rax, %rdi movl $1, %esi movq 40(%rsp), %rdx # 8-byte Reload movl $1, %ecx xorl %r8d, %r8d movq 240(%rsp), %r9 callq __hipPushCallConfiguration testl %eax, %eax jne .LBB53_36 # %bb.35: # in Loop: Header=BB53_32 Depth=1 movq 72(%rsp), %rax # 8-byte Reload leaq (%rax,%r12,4), %rdi movq %r14, %rdx imulq 64(%rsp), %rdx # 8-byte Folded Reload shlq $2, %rdx addq 88(%rsp), %rdx movq %rbp, %rsi movl 52(%rsp), %ecx # 4-byte Reload callq _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .LBB53_36: # in Loop: Header=BB53_32 Depth=1 callq hipGetLastError testl %eax, %eax jne .LBB53_43 # %bb.37: # in Loop: Header=BB53_32 Depth=1 cmpb $0, 248(%rsp) je .LBB53_43 # %bb.38: # in Loop: Header=BB53_32 Depth=1 movl $_ZSt4cout, %edi movl $.L.str.18, %esi movl $19, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movl $.L.str.19, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq %rbp, %rsi callq _ZNSo9_M_insertImEERSoT_ movl $.L.str.20, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq 240(%rsp), %rdi callq hipStreamSynchronize testl %eax, %eax jne .LBB53_61 # %bb.39: # in Loop: Header=BB53_32 Depth=1 callq _ZNSt6chrono3_V212system_clock3nowEv subq 16(%rsp), %rax # 8-byte Folded Reload cvtsi2sd %rax, %xmm0 divsd .LCPI53_0(%rip), %xmm0 movsd %xmm0, 112(%rsp) # 8-byte Spill movl $_ZSt4cout, %edi movl $.L.str.21, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movsd 112(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero mulsd .LCPI53_1(%rip), %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %rbp movl $.L.str.22, %esi movl $3, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movb $10, 15(%rsp) movq (%rbp), %rax movq -24(%rax), %rax cmpq $0, 16(%rbp,%rax) je .LBB53_44 # %bb.40: # in Loop: Header=BB53_32 Depth=1 movl $1, %edx movq %rbp, %rdi leaq 15(%rsp), %rsi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB53_45 .LBB53_43: # in Loop: Header=BB53_32 Depth=1 testl %eax, %eax je .LBB53_45 jmp .LBB53_61 .LBB53_44: # in Loop: Header=BB53_32 Depth=1 movq %rbp, %rdi movl $10, %esi callq _ZNSo3putEc .LBB53_45: # in Loop: Header=BB53_32 Depth=1 incq %r14 addq %r15, %r12 cmpq 128(%rsp), %r14 # 8-byte Folded Reload jb .LBB53_32 .LBB53_46: # %._crit_edge movb 248(%rsp), %bpl testb %bpl, %bpl je .LBB53_48 # %bb.47: callq _ZNSt6chrono3_V212system_clock3nowEv movq %rax, 16(%rsp) # 8-byte Spill .LBB53_48: movq 104(%rsp), %rdi movq 88(%rsp), %rdx movzbl %bpl, %eax leaq 80(%rsp), %rsi movq 56(%rsp), %rcx # 8-byte Reload movl 52(%rsp), %r8d # 4-byte Reload movq 32(%rsp), %r9 # 8-byte Reload pushq %rax .cfi_adjust_cfa_offset 8 movq 248(%rsp), %rbx pushq %rbx .cfi_adjust_cfa_offset 8 callq _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb addq $16, %rsp .cfi_adjust_cfa_offset -16 testl %eax, %eax jne .LBB53_59 # %bb.49: testb %bpl, %bpl je .LBB53_59 # %bb.50: movl $_ZSt4cout, %edi movl $.L.str.23, %esi movl $20, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movl $.L.str.19, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq 32(%rsp), %rsi # 8-byte Reload jmp .LBB53_51 .LBB53_53: callq _ZNSt6chrono3_V212system_clock3nowEv .LBB53_54: # %.thread229 movq %rax, 16(%rsp) # 8-byte Spill movq 56(%rsp), %r13 # 8-byte Reload btsq $32, %rbx movabsq $4294967296, %rdi # imm = 0x100000000 orq $1, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d movq %r12, %rbx movq %r12, %r9 callq __hipPushCallConfiguration testl %eax, %eax jne .LBB53_56 # %bb.55: movq %rbp, %rdi movq 24(%rsp), %rsi # 8-byte Reload movq %r13, %rdx movl %r15d, %ecx callq _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .LBB53_56: callq hipGetLastError testl %eax, %eax jne .LBB53_59 # %bb.57: cmpb $0, 248(%rsp) je .LBB53_59 # %bb.58: movl $_ZSt4cout, %edi movl $.L.str.18, %esi movl $19, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movl $.L.str.19, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movq 24(%rsp), %rsi # 8-byte Reload .LBB53_51: callq _ZNSo9_M_insertImEERSoT_ movl $.L.str.20, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq %rbx, %rdi callq hipStreamSynchronize testl %eax, %eax jne .LBB53_61 # %bb.52: # %.sink.split callq _ZNSt6chrono3_V212system_clock3nowEv subq 16(%rsp), %rax # 8-byte Folded Reload cvtsi2sd %rax, %xmm0 divsd .LCPI53_0(%rip), %xmm0 movsd %xmm0, 24(%rsp) # 8-byte Spill movl $_ZSt4cout, %edi movl $.L.str.21, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movsd 24(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero mulsd .LCPI53_1(%rip), %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %rbx movl $.L.str.22, %esi movl $3, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq %rbx, %rdi movl $10, %esi callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c jmp .LBB53_60 .LBB53_59: testl %eax, %eax jne .LBB53_61 .LBB53_60: xorl %eax, %eax jmp .LBB53_61 .Lfunc_end53: .size _ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb, .Lfunc_end53-_ZN7rocprim6detail11reduce_implILb1ENS_14default_configEPiS3_iN6thrust4plusIiEEEE10hipError_tPvRmT1_T2_T3_mT4_P12ihipStream_tb .cfi_endproc # -- End function .section .text._ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_,"axG",@progbits,_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_,comdat .weak _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_ # -- Begin function _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_ .type _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_,@function _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_: # @_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rsi, %r15 movq %rdi, %r14 leaq 32(%rsp), %rbx movq %rbx, %rdi callq _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv cmpq $5, %rax movl $4, %edx cmovaeq %rax, %rdx testq %r14, %r14 je .LBB54_1 # %bb.2: movl $1, %ecx cmpq %rdx, (%r15) jb .LBB54_7 # %bb.3: movq (%rbx), %rcx movq 8(%rbx), %rax testq %rax, %rax movq %r14, %rdx cmoveq %rax, %rdx movq %rdx, (%rcx) xorl %ecx, %ecx cmpq $0, 32(%rbx) je .LBB54_4 # %bb.5: movq 40(%rbx), %rsi xorl %edx, %edx divq %rsi cmpq $1, %rdx sbbq $-1, %rax imulq %rsi, %rax addq %rax, %r14 jmp .LBB54_6 .LBB54_1: movq %rdx, (%r15) xorl %ecx, %ecx jmp .LBB54_7 .LBB54_4: xorl %r14d, %r14d .LBB54_6: # %_ZN7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE11set_storageEPv.exit movq 24(%rbx), %rax movq %r14, (%rax) .LBB54_7: movl %ecx, %eax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end54: .size _ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_, .Lfunc_end54-_ZN7rocprim6detail12temp_storage9partitionINS1_16linear_partitionIJNS1_16simple_partitionIiEENS4_IvEEEEEEE10hipError_tPvRmT_ .cfi_endproc # -- End function .section .text._ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,comdat .weak _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ # -- Begin function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .type _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,@function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_: # @_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 3(%rsp), %rax movq %rax, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end55: .size _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, .Lfunc_end55-_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .cfi_endproc # -- End function .section .text._ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,comdat .weak _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ # -- Begin function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .type _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,@function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_: # @_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 3(%rsp), %rax movq %rax, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end56: .size _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, .Lfunc_end56-_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .cfi_endproc # -- End function .section .rodata.cst16,"aM",@progbits,16 .p2align 4, 0x0 # -- Begin function _ZN7rocprim6detail25get_target_arch_from_nameEPKcm .LCPI57_0: .long 803 # 0x323 .long 900 # 0x384 .long 906 # 0x38a .long 908 # 0x38c .LCPI57_1: .long 910 # 0x38e .long 1030 # 0x406 .long 1100 # 0x44c .long 1102 # 0x44e .section .text._ZN7rocprim6detail25get_target_arch_from_nameEPKcm,"axG",@progbits,_ZN7rocprim6detail25get_target_arch_from_nameEPKcm,comdat .weak _ZN7rocprim6detail25get_target_arch_from_nameEPKcm .type _ZN7rocprim6detail25get_target_arch_from_nameEPKcm,@function _ZN7rocprim6detail25get_target_arch_from_nameEPKcm: # @_ZN7rocprim6detail25get_target_arch_from_nameEPKcm .cfi_startproc # %bb.0: movq $.L.str.24, -104(%rsp) movq $.L.str.25, -96(%rsp) movq $.L.str.26, -88(%rsp) movq $.L.str.27, -80(%rsp) movq $.L.str.28, -72(%rsp) movq $.L.str.29, -64(%rsp) movq $.L.str.30, -56(%rsp) movq $.L.str.31, -48(%rsp) movaps .LCPI57_0(%rip), %xmm0 # xmm0 = [803,900,906,908] movaps %xmm0, -40(%rsp) movaps .LCPI57_1(%rip), %xmm0 # xmm0 = [910,1030,1100,1102] movaps %xmm0, -24(%rsp) xorl %eax, %eax .LBB57_1: # =>This Loop Header: Depth=1 # Child Loop BB57_4 Depth 2 movq -104(%rsp,%rax,8), %rcx testq %rsi, %rsi je .LBB57_2 # %bb.3: # %.lr.ph.preheader.i # in Loop: Header=BB57_1 Depth=1 leaq (%rcx,%rsi), %r8 xorl %edx, %edx .LBB57_4: # %.lr.ph.i # Parent Loop BB57_1 Depth=1 # => This Inner Loop Header: Depth=2 movb (%rcx,%rdx), %r9b testb %r9b, %r9b je .LBB57_7 # %bb.5: # %.lr.ph.i # in Loop: Header=BB57_4 Depth=2 cmpb (%rdi,%rdx), %r9b jne .LBB57_7 # %bb.6: # in Loop: Header=BB57_4 Depth=2 incq %rdx cmpq %rdx, %rsi jne .LBB57_4 jmp .LBB57_9 .LBB57_2: # in Loop: Header=BB57_1 Depth=1 xorl %edx, %edx jmp .LBB57_8 .LBB57_7: # %._crit_edge.i.loopexit # in Loop: Header=BB57_1 Depth=1 addq %rdx, %rcx .LBB57_8: # %._crit_edge.i # in Loop: Header=BB57_1 Depth=1 movq %rcx, %r8 cmpq %rsi, %rdx jne .LBB57_11 .LBB57_9: # %_ZN7rocprim6detail13prefix_equalsEPKcS2_m.exit # in Loop: Header=BB57_1 Depth=1 cmpb $0, (%r8) je .LBB57_10 .LBB57_11: # %_ZN7rocprim6detail13prefix_equalsEPKcS2_m.exit.thread # in Loop: Header=BB57_1 Depth=1 incq %rax cmpq $8, %rax jne .LBB57_1 # %bb.12: movl $-1, %eax retq .LBB57_10: movl -40(%rsp,%rax,4), %eax retq .Lfunc_end57: .size _ZN7rocprim6detail25get_target_arch_from_nameEPKcm, .Lfunc_end57-_ZN7rocprim6detail25get_target_arch_from_nameEPKcm .cfi_endproc # -- End function .section .text._ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,"axG",@progbits,_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,comdat .weak _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag # -- Begin function _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag .type _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag,@function _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag: # @_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag .cfi_startproc # %bb.0: movq %rdi, %rax movq %rsi, %rcx subq %rdi, %rcx movq %rcx, %rdx sarq $2, %rdx testq %rdx, %rdx jle .LBB58_12 # %bb.1: # %.lr.ph.preheader andq $-4, %rcx addq %rax, %rcx incq %rdx addq $3, %rax .LBB58_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movzbl -3(%rax), %edi testl %edi, %edi je .LBB58_26 # %bb.3: # %.lr.ph # in Loop: Header=BB58_2 Depth=1 cmpl $58, %edi je .LBB58_26 # %bb.4: # in Loop: Header=BB58_2 Depth=1 movzbl -2(%rax), %edi testl %edi, %edi je .LBB58_24 # %bb.5: # in Loop: Header=BB58_2 Depth=1 cmpl $58, %edi je .LBB58_24 # %bb.6: # in Loop: Header=BB58_2 Depth=1 movzbl -1(%rax), %edi testl %edi, %edi je .LBB58_25 # %bb.7: # in Loop: Header=BB58_2 Depth=1 cmpl $58, %edi je .LBB58_25 # %bb.8: # in Loop: Header=BB58_2 Depth=1 movzbl (%rax), %edi testl %edi, %edi je .LBB58_27 # %bb.9: # in Loop: Header=BB58_2 Depth=1 cmpl $58, %edi je .LBB58_27 # %bb.10: # in Loop: Header=BB58_2 Depth=1 decq %rdx addq $4, %rax cmpq $1, %rdx jg .LBB58_2 # %bb.11: # %._crit_edge.loopexit movq %rcx, %rax .LBB58_12: # %._crit_edge movq %rsi, %rcx subq %rax, %rcx cmpq $1, %rcx je .LBB58_21 # %bb.13: # %._crit_edge cmpq $2, %rcx je .LBB58_18 # %bb.14: # %._crit_edge cmpq $3, %rcx jne .LBB58_23 # %bb.15: movzbl (%rax), %ecx testl %ecx, %ecx je .LBB58_27 # %bb.16: cmpl $58, %ecx je .LBB58_27 # %bb.17: incq %rax .LBB58_18: movzbl (%rax), %ecx testl %ecx, %ecx je .LBB58_27 # %bb.19: cmpl $58, %ecx je .LBB58_27 # %bb.20: incq %rax .LBB58_21: movzbl (%rax), %ecx testl %ecx, %ecx je .LBB58_27 # %bb.22: cmpl $58, %ecx je .LBB58_27 .LBB58_23: movq %rsi, %rax retq .LBB58_26: # %.loopexit.loopexit addq $-3, %rax .LBB58_27: # %.loopexit retq .LBB58_24: # %.loopexit.loopexit.split.loop.exit addq $-2, %rax retq .LBB58_25: # %.loopexit.loopexit.split.loop.exit52 decq %rax retq .Lfunc_end58: .size _ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag, .Lfunc_end58-_ZSt9__find_ifIPKcN9__gnu_cxx5__ops10_Iter_predIZN7rocprim6detail14parse_gcn_archES1_EUlRS0_E_EEET_SA_SA_T0_St26random_access_iterator_tag .cfi_endproc # -- End function .section .text._ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,comdat .weak _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ # -- Begin function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .type _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,@function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_: # @_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 3(%rsp), %rax movq %rax, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end59: .size _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, .Lfunc_end59-_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .cfi_endproc # -- End function .section .text._ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,comdat .weak _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ # -- Begin function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .type _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,@function _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_: # @_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 3(%rsp), %rax movq %rax, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end60: .size _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, .Lfunc_end60-_ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .cfi_endproc # -- End function .section .text._ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv,"axG",@progbits,_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv,comdat .weak _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv # -- Begin function _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv .p2align 1, 0x90 .type _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv,@function _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv: # @_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv .cfi_startproc # %bb.0: # %_ZZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEvENKUlRKT_E_clIS4_EEDaS9_.exit.i.i movq 8(%rdi), %rax movq 16(%rdi), %rsi movq 32(%rdi), %r8 movq 40(%rdi), %rcx testq %r8, %r8 je .LBB61_2 # %bb.1: xorl %edx, %edx divq %rcx cmpq $1, %rdx sbbq $-1, %rax imulq %rcx, %rax addq %r8, %rax .LBB61_2: # %_ZN7rocprim6detail17for_each_in_tupleIRKNS_5tupleIJNS0_12temp_storage16simple_partitionIiEENS4_IvEEEEEZNKS3_16linear_partitionIJS5_S6_EE10get_layoutEvEUlRKT_E_EEvOSC_OT0_.exit cmpq %rcx, %rsi cmovaq %rsi, %rcx cmpq $1, %rcx adcq $0, %rcx movq %rcx, %rdx retq .Lfunc_end61: .size _ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv, .Lfunc_end61-_ZNK7rocprim6detail12temp_storage16linear_partitionIJNS1_16simple_partitionIiEENS3_IvEEEE10get_layoutEv .cfi_endproc # -- End function .section .text._ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,"axG",@progbits,_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,comdat .weak _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev # -- Begin function _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev .p2align 1, 0x90 .type _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,@function _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev: # @_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev .Lfunc_begin12: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception12 # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq 16(%rdi), %rdx testq %rdx, %rdx je .LBB62_3 # %bb.1: movq %rdi, %rbx movq 8(%rdi), %rsi .Ltmp143: callq _ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm .Ltmp144: # %bb.2: # %.noexc addq $8, %rbx xorps %xmm0, %xmm0 movups %xmm0, (%rbx) .LBB62_3: # %_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEE10deallocateEv.exit popq %rbx .cfi_def_cfa_offset 8 retq .LBB62_4: .cfi_def_cfa_offset 16 .Ltmp145: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end62: .size _ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev, .Lfunc_end62-_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev .cfi_endproc .section .gcc_except_table._ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,"aG",@progbits,_ZN6thrust6detail18contiguous_storageIhNS0_18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEEEED2Ev,comdat .p2align 2, 0x0 GCC_except_table62: .Lexception12: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase4-.Lttbaseref4 .Lttbaseref4: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end12-.Lcst_begin12 .Lcst_begin12: .uleb128 .Ltmp143-.Lfunc_begin12 # >> Call Site 1 << .uleb128 .Ltmp144-.Ltmp143 # Call between .Ltmp143 and .Ltmp144 .uleb128 .Ltmp145-.Lfunc_begin12 # jumps to .Ltmp145 .byte 1 # On action: 1 .Lcst_end12: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase4: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,"axG",@progbits,_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,comdat .weak _ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm # -- Begin function _ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm .p2align 1, 0x90 .type _ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,@function _ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm: # @_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm .Lfunc_begin13: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception13 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $40, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rsi, %r14 movq %rdi, %rbx movq (%rdi), %rdi callq _ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm testq %r14, %r14 je .LBB63_11 # %bb.1: testq %rax, %rax je .LBB63_2 .LBB63_11: addq $40, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB63_2: .cfi_def_cfa_offset 80 movq (%rbx), %rdi xorl %esi, %esi callq _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_ movl $40, %edi callq __cxa_allocate_exception movq %rax, %rbx leaq 24(%rsp), %r15 movq %r15, -16(%r15) .Ltmp146: leaq 8(%rsp), %rdi movl $.L.str.33, %esi movl $.L.str.33+55, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .Ltmp147: # %bb.3: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit movb $1, %bpl .Ltmp149: leaq 8(%rsp), %rsi movq %rbx, %rdi callq _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .Ltmp150: # %bb.4: xorl %ebp, %ebp .Ltmp151: movl $_ZTIN6thrust6system6detail9bad_allocE, %esi movl $_ZN6thrust6system6detail9bad_allocD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .Ltmp152: # %bb.12: .LBB63_6: .Ltmp153: movq %rax, %r14 movq 8(%rsp), %rdi cmpq %r15, %rdi je .LBB63_8 # %bb.7: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit callq _ZdlPv .LBB63_8: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit testb %bpl, %bpl jne .LBB63_9 jmp .LBB63_10 .LBB63_5: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread .Ltmp148: movq %rax, %r14 .LBB63_9: movq %rbx, %rdi callq __cxa_free_exception .LBB63_10: movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end63: .size _ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm, .Lfunc_end63-_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm .cfi_endproc .section .gcc_except_table._ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,"aG",@progbits,_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE8allocateEm,comdat .p2align 2, 0x0 GCC_except_table63: .Lexception13: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end13-.Lcst_begin13 .Lcst_begin13: .uleb128 .Lfunc_begin13-.Lfunc_begin13 # >> Call Site 1 << .uleb128 .Ltmp146-.Lfunc_begin13 # Call between .Lfunc_begin13 and .Ltmp146 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp146-.Lfunc_begin13 # >> Call Site 2 << .uleb128 .Ltmp147-.Ltmp146 # Call between .Ltmp146 and .Ltmp147 .uleb128 .Ltmp148-.Lfunc_begin13 # jumps to .Ltmp148 .byte 0 # On action: cleanup .uleb128 .Ltmp149-.Lfunc_begin13 # >> Call Site 3 << .uleb128 .Ltmp152-.Ltmp149 # Call between .Ltmp149 and .Ltmp152 .uleb128 .Ltmp153-.Lfunc_begin13 # jumps to .Ltmp153 .byte 0 # On action: cleanup .uleb128 .Ltmp152-.Lfunc_begin13 # >> Call Site 4 << .uleb128 .Lfunc_end63-.Ltmp152 # Call between .Ltmp152 and .Lfunc_end63 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end13: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,"axG",@progbits,_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,comdat .weak _ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm # -- Begin function _ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm .type _ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,@function _ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm: # @_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm .Lfunc_begin14: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception14 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $80, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 leaq 8(%rsp), %rdi movq $0, (%rdi) callq hipMalloc testl %eax, %eax jne .LBB64_1 # %bb.16: movq 8(%rsp), %rax addq $80, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB64_1: .cfi_def_cfa_offset 112 movl %eax, %ebp callq hipGetLastError movl $40, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp154: callq _ZN6thrust6system12hip_categoryEv .Ltmp155: # %bb.2: movq (%rax), %rcx .Ltmp156: leaq 16(%rsp), %rdi movq %rax, %rsi movl %ebp, %edx callq *48(%rcx) .Ltmp157: # %bb.3: movq 16(%rsp), %rsi .Ltmp159: leaq 48(%rsp), %rdi leaq 7(%rsp), %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .Ltmp160: # %bb.4: movb $1, %bpl .Ltmp162: leaq 48(%rsp), %rsi movq %rbx, %rdi callq _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .Ltmp163: # %bb.5: xorl %ebp, %ebp .Ltmp164: movl $_ZTIN6thrust6system6detail9bad_allocE, %esi movl $_ZN6thrust6system6detail9bad_allocD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .Ltmp165: # %bb.17: .LBB64_7: .Ltmp166: movq %rax, %r14 leaq 64(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB64_9 # %bb.8: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB64_9: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit leaq 32(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB64_11 # %bb.10: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14 callq _ZdlPv .LBB64_11: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14 testb %bpl, %bpl jne .LBB64_14 jmp .LBB64_15 .LBB64_12: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread .Ltmp161: movq %rax, %r14 leaq 32(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB64_14 # %bb.13: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14.thread25 callq _ZdlPv jmp .LBB64_14 .LBB64_6: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14.thread .Ltmp158: movq %rax, %r14 .LBB64_14: movq %rbx, %rdi callq __cxa_free_exception .LBB64_15: movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end64: .size _ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm, .Lfunc_end64-_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm .cfi_endproc .section .gcc_except_table._ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,"aG",@progbits,_ZN6thrust11hip_rocprim6mallocINS0_3tagEEEPvRNS0_16execution_policyIT_EEm,comdat .p2align 2, 0x0 GCC_except_table64: .Lexception14: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end14-.Lcst_begin14 .Lcst_begin14: .uleb128 .Lfunc_begin14-.Lfunc_begin14 # >> Call Site 1 << .uleb128 .Ltmp154-.Lfunc_begin14 # Call between .Lfunc_begin14 and .Ltmp154 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp154-.Lfunc_begin14 # >> Call Site 2 << .uleb128 .Ltmp157-.Ltmp154 # Call between .Ltmp154 and .Ltmp157 .uleb128 .Ltmp158-.Lfunc_begin14 # jumps to .Ltmp158 .byte 0 # On action: cleanup .uleb128 .Ltmp159-.Lfunc_begin14 # >> Call Site 3 << .uleb128 .Ltmp160-.Ltmp159 # Call between .Ltmp159 and .Ltmp160 .uleb128 .Ltmp161-.Lfunc_begin14 # jumps to .Ltmp161 .byte 0 # On action: cleanup .uleb128 .Ltmp162-.Lfunc_begin14 # >> Call Site 4 << .uleb128 .Ltmp165-.Ltmp162 # Call between .Ltmp162 and .Ltmp165 .uleb128 .Ltmp166-.Lfunc_begin14 # jumps to .Ltmp166 .byte 0 # On action: cleanup .uleb128 .Ltmp165-.Lfunc_begin14 # >> Call Site 5 << .uleb128 .Lfunc_end64-.Ltmp165 # Call between .Ltmp165 and .Lfunc_end64 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end14: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,"axG",@progbits,_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,comdat .weak _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_ # -- Begin function _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_ .type _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,@function _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_: # @_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_ .Lfunc_begin15: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception15 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %rsi, %rdi callq hipFree movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB65_1 # %bb.5: # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB65_1: .cfi_def_cfa_offset 32 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp167: callq _ZN6thrust6system12hip_categoryEv .Ltmp168: # %bb.2: .Ltmp169: movl $.L.str.34, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp170: # %bb.3: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB65_4: .Ltmp171: movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end65: .size _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_, .Lfunc_end65-_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_ .cfi_endproc .section .gcc_except_table._ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,"aG",@progbits,_ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_,comdat .p2align 2, 0x0 GCC_except_table65: .Lexception15: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end15-.Lcst_begin15 .Lcst_begin15: .uleb128 .Lfunc_begin15-.Lfunc_begin15 # >> Call Site 1 << .uleb128 .Ltmp167-.Lfunc_begin15 # Call between .Lfunc_begin15 and .Ltmp167 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp167-.Lfunc_begin15 # >> Call Site 2 << .uleb128 .Ltmp170-.Ltmp167 # Call between .Ltmp167 and .Ltmp170 .uleb128 .Ltmp171-.Lfunc_begin15 # jumps to .Ltmp171 .byte 0 # On action: cleanup .uleb128 .Ltmp170-.Lfunc_begin15 # >> Call Site 3 << .uleb128 .Lfunc_end65-.Ltmp170 # Call between .Ltmp170 and .Lfunc_end65 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end15: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,"axG",@progbits,_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,comdat .weak _ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm # -- Begin function _ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm .p2align 1, 0x90 .type _ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,@function _ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm: # @_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm .Lfunc_begin16: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception16 # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movq (%rdi), %rdi .Ltmp172: callq _ZN6thrust11hip_rocprim4freeINS0_3tagENS_7pointerIhS2_NS_11use_defaultES4_EEEEvRNS0_16execution_policyIT_EET0_ .Ltmp173: # %bb.1: # %_ZN6thrust6detail19temporary_allocatorIhNS_11hip_rocprim3tagEE10deallocateENS_7pointerIhS3_NS_11use_defaultES6_EEm.exit popq %rax .cfi_def_cfa_offset 8 retq .LBB66_2: .cfi_def_cfa_offset 16 .Ltmp174: movq %rax, %rdi callq __cxa_begin_catch popq %rax .cfi_def_cfa_offset 8 jmp __cxa_end_catch # TAILCALL .Lfunc_end66: .size _ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm, .Lfunc_end66-_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm .cfi_endproc .section .gcc_except_table._ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,"aG",@progbits,_ZN6thrust6detail18no_throw_allocatorINS0_19temporary_allocatorIhNS_11hip_rocprim3tagEEEE10deallocateENS_7pointerIhS4_NS_11use_defaultES8_EEm,comdat .p2align 2, 0x0 GCC_except_table66: .Lexception16: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase5-.Lttbaseref5 .Lttbaseref5: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end16-.Lcst_begin16 .Lcst_begin16: .uleb128 .Ltmp172-.Lfunc_begin16 # >> Call Site 1 << .uleb128 .Ltmp173-.Ltmp172 # Call between .Ltmp172 and .Ltmp173 .uleb128 .Ltmp174-.Lfunc_begin16 # jumps to .Ltmp174 .byte 1 # On action: 1 .uleb128 .Ltmp173-.Lfunc_begin16 # >> Call Site 2 << .uleb128 .Lfunc_end66-.Ltmp173 # Call between .Ltmp173 and .Lfunc_end66 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end16: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase5: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,"axG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,comdat .weak _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE # -- Begin function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE .type _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,@function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE: # @_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE .Lfunc_begin17: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception17 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %r8, %rbx movq %rcx, %r14 testq %rcx, %rcx je .LBB67_6 # %bb.1: # %_ZN6thrust11hip_rocprim24trivial_copy_from_deviceIiEE10hipError_tPT_PKS3_mP12ihipStream_t.exit.i leaq (,%r14,4), %rax movq %rbx, %rdi movq %rdx, %rsi movq %rax, %rdx movl $2, %ecx xorl %r8d, %r8d callq hipMemcpyWithStream movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB67_2 .LBB67_6: # %_ZN6thrust11hip_rocprim6__copy19trivial_device_copyINS0_3tagENS_6system3cpp6detail3tagEimEEvRNS0_16execution_policyIT_EERNS6_16execution_policyIT0_EEPT1_PKSG_T2_.exit leaq (%rbx,%r14,4), %rax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB67_2: .cfi_def_cfa_offset 32 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp175: callq _ZN6thrust6system12hip_categoryEv .Ltmp176: # %bb.3: .Ltmp177: movl $.L.str.35, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp178: # %bb.4: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB67_5: .Ltmp179: movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end67: .size _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE, .Lfunc_end67-_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE .cfi_endproc .section .gcc_except_table._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,"aG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagEPimS8_EET3_RNS_16execution_policyIT_EERNSA_IT0_EET1_T2_S9_NS_6detail17integral_constantIbLb1EEE,comdat .p2align 2, 0x0 GCC_except_table67: .Lexception17: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end17-.Lcst_begin17 .Lcst_begin17: .uleb128 .Lfunc_begin17-.Lfunc_begin17 # >> Call Site 1 << .uleb128 .Ltmp175-.Lfunc_begin17 # Call between .Lfunc_begin17 and .Ltmp175 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp175-.Lfunc_begin17 # >> Call Site 2 << .uleb128 .Ltmp178-.Ltmp175 # Call between .Ltmp175 and .Ltmp178 .uleb128 .Ltmp179-.Lfunc_begin17 # jumps to .Ltmp179 .byte 0 # On action: cleanup .uleb128 .Ltmp178-.Lfunc_begin17 # >> Call Site 3 << .uleb128 .Lfunc_end67-.Ltmp178 # Call between .Ltmp178 and .Lfunc_end67 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end17: .p2align 2, 0x0 # -- End function .text .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB68_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB68_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, %esi movl $.L__unnamed_4, %edx movl $.L__unnamed_4, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end68: .size __hip_module_ctor, .Lfunc_end68-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB69_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB69_2: retq .Lfunc_end69: .size __hip_module_dtor, .Lfunc_end69-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "basic_string: construction from null is not valid" .size .L.str, 50 .type _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,@object # @_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .section .bss._ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,comdat .weak _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .p2align 3, 0x0 _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource: .zero 16 .size _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, 16 .type _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,@object # @_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .section .bss._ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,comdat .weak _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .p2align 3, 0x0 _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource: .quad 0 # 0x0 .size _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, 8 .hidden __dso_handle .type _ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .section .rodata._ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat .weak _ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .p2align 3, 0x0 _ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE: .quad 0 .quad _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .quad _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev .quad _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev .quad _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm .quad _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm .quad _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ .size _ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 56 .type _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .section .rodata._ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat .weak _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE: .asciz "N6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE" .size _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 200 .type _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,@object # @_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .section .rodata._ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,"aG",@progbits,_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,comdat .weak _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE: .asciz "N6thrust2mr15memory_resourceINS_10device_ptrIvEEEE" .size _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE, 51 .type _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,@object # @_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .section .rodata._ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,"aG",@progbits,_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,comdat .weak _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .p2align 3, 0x0 _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .size _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE, 16 .type _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .section .rodata._ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat .weak _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .p2align 3, 0x0 _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .quad _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .size _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 24 .type _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,@object # @_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .section .data._ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,"awG",@progbits,_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,comdat .weak _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .p2align 3, 0x0 _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource: .quad _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE+16 .size _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, 8 .type _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .section .rodata._ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat .weak _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .p2align 3, 0x0 _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE: .quad 0 .quad _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .quad _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev .quad _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev .quad _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm .quad _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .quad _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ .size _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 56 .type _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,@object # @_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .section .bss._ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,comdat .weak _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .p2align 3, 0x0 _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource: .quad 0 # 0x0 .size _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, 8 .type _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .section .rodata._ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat .weak _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE: .asciz "N6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE" .size _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 166 .type _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,@object # @_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .section .rodata._ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,comdat .weak _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE: .asciz "N6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE" .size _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE, 113 .type _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,@object # @_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .section .rodata._ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,comdat .weak _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .p2align 3, 0x0 _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .size _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE, 16 .type _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .section .rodata._ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat .weak _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .p2align 3, 0x0 _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .quad _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .size _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 24 .type _ZTSN6thrust6system6detail9bad_allocE,@object # @_ZTSN6thrust6system6detail9bad_allocE .section .rodata._ZTSN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust6system6detail9bad_allocE,comdat .weak _ZTSN6thrust6system6detail9bad_allocE _ZTSN6thrust6system6detail9bad_allocE: .asciz "N6thrust6system6detail9bad_allocE" .size _ZTSN6thrust6system6detail9bad_allocE, 34 .type _ZTIN6thrust6system6detail9bad_allocE,@object # @_ZTIN6thrust6system6detail9bad_allocE .section .rodata._ZTIN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTIN6thrust6system6detail9bad_allocE,comdat .weak _ZTIN6thrust6system6detail9bad_allocE .p2align 3, 0x0 _ZTIN6thrust6system6detail9bad_allocE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system6detail9bad_allocE .quad _ZTISt9bad_alloc .size _ZTIN6thrust6system6detail9bad_allocE, 24 .type _ZZN6thrust6system12hip_categoryEvE6result,@object # @_ZZN6thrust6system12hip_categoryEvE6result .section .bss._ZZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system12hip_categoryEvE6result,comdat .weak _ZZN6thrust6system12hip_categoryEvE6result .p2align 3, 0x0 _ZZN6thrust6system12hip_categoryEvE6result: .zero 8 .size _ZZN6thrust6system12hip_categoryEvE6result, 8 .type _ZGVZN6thrust6system12hip_categoryEvE6result,@object # @_ZGVZN6thrust6system12hip_categoryEvE6result .section .bss._ZGVZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system12hip_categoryEvE6result,comdat .weak _ZGVZN6thrust6system12hip_categoryEvE6result .p2align 3, 0x0 _ZGVZN6thrust6system12hip_categoryEvE6result: .quad 0 # 0x0 .size _ZGVZN6thrust6system12hip_categoryEvE6result, 8 .type _ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE .section .rodata._ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat .weak _ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE .p2align 3, 0x0 _ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE: .quad 0 .quad _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE .quad _ZN6thrust6system14error_categoryD2Ev .quad _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev .quad _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv .quad _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi .quad _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .quad _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .quad _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei .size _ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 72 .type _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE .section .rodata._ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat .weak _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE: .asciz "N6thrust6system11hip_rocprim6detail18hip_error_categoryE" .size _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 57 .type _ZTSN6thrust6system14error_categoryE,@object # @_ZTSN6thrust6system14error_categoryE .section .rodata._ZTSN6thrust6system14error_categoryE,"aG",@progbits,_ZTSN6thrust6system14error_categoryE,comdat .weak _ZTSN6thrust6system14error_categoryE _ZTSN6thrust6system14error_categoryE: .asciz "N6thrust6system14error_categoryE" .size _ZTSN6thrust6system14error_categoryE, 33 .type _ZTIN6thrust6system14error_categoryE,@object # @_ZTIN6thrust6system14error_categoryE .section .rodata._ZTIN6thrust6system14error_categoryE,"aG",@progbits,_ZTIN6thrust6system14error_categoryE,comdat .weak _ZTIN6thrust6system14error_categoryE .p2align 3, 0x0 _ZTIN6thrust6system14error_categoryE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust6system14error_categoryE .size _ZTIN6thrust6system14error_categoryE, 16 .type _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE .section .rodata._ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat .weak _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE .p2align 3, 0x0 _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE .quad _ZTIN6thrust6system14error_categoryE .size _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 24 .type _ZTVN6thrust6system14error_categoryE,@object # @_ZTVN6thrust6system14error_categoryE .section .rodata._ZTVN6thrust6system14error_categoryE,"aG",@progbits,_ZTVN6thrust6system14error_categoryE,comdat .weak _ZTVN6thrust6system14error_categoryE .p2align 3, 0x0 _ZTVN6thrust6system14error_categoryE: .quad 0 .quad _ZTIN6thrust6system14error_categoryE .quad _ZN6thrust6system14error_categoryD2Ev .quad _ZN6thrust6system14error_categoryD0Ev .quad __cxa_pure_virtual .quad _ZNK6thrust6system14error_category23default_error_conditionEi .quad _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .quad _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .quad __cxa_pure_virtual .size _ZTVN6thrust6system14error_categoryE, 72 .type .L.str.1,@object # @.str.1 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.1: .asciz "hip" .size .L.str.1, 4 .type _ZZN6thrust6system15system_categoryEvE6result,@object # @_ZZN6thrust6system15system_categoryEvE6result .section .bss._ZZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system15system_categoryEvE6result,comdat .weak _ZZN6thrust6system15system_categoryEvE6result .p2align 3, 0x0 _ZZN6thrust6system15system_categoryEvE6result: .zero 8 .size _ZZN6thrust6system15system_categoryEvE6result, 8 .type _ZGVZN6thrust6system15system_categoryEvE6result,@object # @_ZGVZN6thrust6system15system_categoryEvE6result .section .bss._ZGVZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system15system_categoryEvE6result,comdat .weak _ZGVZN6thrust6system15system_categoryEvE6result .p2align 3, 0x0 _ZGVZN6thrust6system15system_categoryEvE6result: .quad 0 # 0x0 .size _ZGVZN6thrust6system15system_categoryEvE6result, 8 .type _ZTVN6thrust6system6detail21system_error_categoryE,@object # @_ZTVN6thrust6system6detail21system_error_categoryE .section .rodata._ZTVN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail21system_error_categoryE,comdat .weak _ZTVN6thrust6system6detail21system_error_categoryE .p2align 3, 0x0 _ZTVN6thrust6system6detail21system_error_categoryE: .quad 0 .quad _ZTIN6thrust6system6detail21system_error_categoryE .quad _ZN6thrust6system14error_categoryD2Ev .quad _ZN6thrust6system6detail21system_error_categoryD0Ev .quad _ZNK6thrust6system6detail21system_error_category4nameEv .quad _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi .quad _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .quad _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .quad _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei .size _ZTVN6thrust6system6detail21system_error_categoryE, 72 .type _ZTSN6thrust6system6detail21system_error_categoryE,@object # @_ZTSN6thrust6system6detail21system_error_categoryE .section .rodata._ZTSN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail21system_error_categoryE,comdat .weak _ZTSN6thrust6system6detail21system_error_categoryE _ZTSN6thrust6system6detail21system_error_categoryE: .asciz "N6thrust6system6detail21system_error_categoryE" .size _ZTSN6thrust6system6detail21system_error_categoryE, 47 .type _ZTIN6thrust6system6detail21system_error_categoryE,@object # @_ZTIN6thrust6system6detail21system_error_categoryE .section .rodata._ZTIN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail21system_error_categoryE,comdat .weak _ZTIN6thrust6system6detail21system_error_categoryE .p2align 3, 0x0 _ZTIN6thrust6system6detail21system_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system6detail21system_error_categoryE .quad _ZTIN6thrust6system14error_categoryE .size _ZTIN6thrust6system6detail21system_error_categoryE, 24 .type .L.str.2,@object # @.str.2 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.2: .asciz "system" .size .L.str.2, 7 .type _ZZN6thrust6system16generic_categoryEvE6result,@object # @_ZZN6thrust6system16generic_categoryEvE6result .section .bss._ZZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system16generic_categoryEvE6result,comdat .weak _ZZN6thrust6system16generic_categoryEvE6result .p2align 3, 0x0 _ZZN6thrust6system16generic_categoryEvE6result: .zero 8 .size _ZZN6thrust6system16generic_categoryEvE6result, 8 .type _ZGVZN6thrust6system16generic_categoryEvE6result,@object # @_ZGVZN6thrust6system16generic_categoryEvE6result .section .bss._ZGVZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system16generic_categoryEvE6result,comdat .weak _ZGVZN6thrust6system16generic_categoryEvE6result .p2align 3, 0x0 _ZGVZN6thrust6system16generic_categoryEvE6result: .quad 0 # 0x0 .size _ZGVZN6thrust6system16generic_categoryEvE6result, 8 .type _ZTVN6thrust6system6detail22generic_error_categoryE,@object # @_ZTVN6thrust6system6detail22generic_error_categoryE .section .rodata._ZTVN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail22generic_error_categoryE,comdat .weak _ZTVN6thrust6system6detail22generic_error_categoryE .p2align 3, 0x0 _ZTVN6thrust6system6detail22generic_error_categoryE: .quad 0 .quad _ZTIN6thrust6system6detail22generic_error_categoryE .quad _ZN6thrust6system14error_categoryD2Ev .quad _ZN6thrust6system6detail22generic_error_categoryD0Ev .quad _ZNK6thrust6system6detail22generic_error_category4nameEv .quad _ZNK6thrust6system14error_category23default_error_conditionEi .quad _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .quad _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .quad _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei .size _ZTVN6thrust6system6detail22generic_error_categoryE, 72 .type _ZTSN6thrust6system6detail22generic_error_categoryE,@object # @_ZTSN6thrust6system6detail22generic_error_categoryE .section .rodata._ZTSN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail22generic_error_categoryE,comdat .weak _ZTSN6thrust6system6detail22generic_error_categoryE _ZTSN6thrust6system6detail22generic_error_categoryE: .asciz "N6thrust6system6detail22generic_error_categoryE" .size _ZTSN6thrust6system6detail22generic_error_categoryE, 48 .type _ZTIN6thrust6system6detail22generic_error_categoryE,@object # @_ZTIN6thrust6system6detail22generic_error_categoryE .section .rodata._ZTIN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail22generic_error_categoryE,comdat .weak _ZTIN6thrust6system6detail22generic_error_categoryE .p2align 3, 0x0 _ZTIN6thrust6system6detail22generic_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system6detail22generic_error_categoryE .quad _ZTIN6thrust6system14error_categoryE .size _ZTIN6thrust6system6detail22generic_error_categoryE, 24 .type .L.str.3,@object # @.str.3 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.3: .asciz "generic" .size .L.str.3, 8 .type _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .section .bss._ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat .weak _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .p2align 3, 0x0 _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11: .zero 32 .size _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 32 .type _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .section .bss._ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat .weak _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .p2align 3, 0x0 _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11: .quad 0 # 0x0 .size _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 8 .type .L.str.4,@object # @.str.4 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.4: .asciz "Unknown error" .size .L.str.4, 14 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "unknown error" .size .L.str.5, 14 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "hipErrorUnknown" .size .L.str.6, 16 .type .L.str.7,@object # @.str.7 .L.str.7: .asciz ": " .size .L.str.7, 3 .type _ZTVN6thrust6system6detail9bad_allocE,@object # @_ZTVN6thrust6system6detail9bad_allocE .section .rodata._ZTVN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTVN6thrust6system6detail9bad_allocE,comdat .weak _ZTVN6thrust6system6detail9bad_allocE .p2align 3, 0x0 _ZTVN6thrust6system6detail9bad_allocE: .quad 0 .quad _ZTIN6thrust6system6detail9bad_allocE .quad _ZN6thrust6system6detail9bad_allocD2Ev .quad _ZN6thrust6system6detail9bad_allocD0Ev .quad _ZNK6thrust6system6detail9bad_alloc4whatEv .size _ZTVN6thrust6system6detail9bad_allocE, 40 .type .L.str.9,@object # @.str.9 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.9: .asciz "HIP free failed" .size .L.str.9, 16 .type _ZTSN6thrust6system12system_errorE,@object # @_ZTSN6thrust6system12system_errorE .section .rodata._ZTSN6thrust6system12system_errorE,"aG",@progbits,_ZTSN6thrust6system12system_errorE,comdat .weak _ZTSN6thrust6system12system_errorE _ZTSN6thrust6system12system_errorE: .asciz "N6thrust6system12system_errorE" .size _ZTSN6thrust6system12system_errorE, 31 .type _ZTIN6thrust6system12system_errorE,@object # @_ZTIN6thrust6system12system_errorE .section .rodata._ZTIN6thrust6system12system_errorE,"aG",@progbits,_ZTIN6thrust6system12system_errorE,comdat .weak _ZTIN6thrust6system12system_errorE .p2align 3, 0x0 _ZTIN6thrust6system12system_errorE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system12system_errorE .quad _ZTISt13runtime_error .size _ZTIN6thrust6system12system_errorE, 24 .type _ZTVN6thrust6system12system_errorE,@object # @_ZTVN6thrust6system12system_errorE .section .rodata._ZTVN6thrust6system12system_errorE,"aG",@progbits,_ZTVN6thrust6system12system_errorE,comdat .weak _ZTVN6thrust6system12system_errorE .p2align 3, 0x0 _ZTVN6thrust6system12system_errorE: .quad 0 .quad _ZTIN6thrust6system12system_errorE .quad _ZN6thrust6system12system_errorD2Ev .quad _ZN6thrust6system12system_errorD0Ev .quad _ZNK6thrust6system12system_error4whatEv .size _ZTVN6thrust6system12system_errorE, 40 .type .L.str.11,@object # @.str.11 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.11: .asciz "__copy::trivial_device_copy H->D: failed" .size .L.str.11, 41 .type .L.str.12,@object # @.str.12 .L.str.12: .asciz "reduce failed on 1st step" .size .L.str.12, 26 .type .L.str.13,@object # @.str.13 .L.str.13: .asciz "reduce failed on 2nd step" .size .L.str.13, 26 .type .L.str.14,@object # @.str.14 .L.str.14: .asciz "block_size " .size .L.str.14, 12 .type .L.str.15,@object # @.str.15 .L.str.15: .asciz "number of blocks " .size .L.str.15, 18 .type .L.str.16,@object # @.str.16 .L.str.16: .asciz "number of blocks limit " .size .L.str.16, 24 .type .L.str.17,@object # @.str.17 .L.str.17: .asciz "items_per_block " .size .L.str.17, 17 .type _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,@object # @_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .section .rodata._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,"aG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,comdat .weak _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .p2align 3, 0x0 _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_: .quad _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .size _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, 8 .type .L.str.18,@object # @.str.18 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.18: .asciz "block_reduce_kernel" .size .L.str.18, 20 .type .L.str.19,@object # @.str.19 .L.str.19: .asciz "(" .size .L.str.19, 2 .type .L.str.20,@object # @.str.20 .L.str.20: .asciz ")" .size .L.str.20, 2 .type .L.str.21,@object # @.str.21 .L.str.21: .asciz " " .size .L.str.21, 2 .type .L.str.22,@object # @.str.22 .L.str.22: .asciz " ms" .size .L.str.22, 4 .type .L.str.23,@object # @.str.23 .L.str.23: .asciz "nested_device_reduce" .size .L.str.23, 21 .type _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,@object # @_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .section .rodata._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,"aG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,comdat .weak _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .p2align 3, 0x0 _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_: .quad _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .size _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, 8 .type _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,@object # @_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache .section .bss._ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,"awG",@nobits,_ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache,comdat .weak _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache .p2align 4, 0x0 _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache: .zero 2048 .size _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache, 2048 .type .L.str.24,@object # @.str.24 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.24: .asciz "gfx803" .size .L.str.24, 7 .type .L.str.25,@object # @.str.25 .L.str.25: .asciz "gfx900" .size .L.str.25, 7 .type .L.str.26,@object # @.str.26 .L.str.26: .asciz "gfx906" .size .L.str.26, 7 .type .L.str.27,@object # @.str.27 .L.str.27: .asciz "gfx908" .size .L.str.27, 7 .type .L.str.28,@object # @.str.28 .L.str.28: .asciz "gfx90a" .size .L.str.28, 7 .type .L.str.29,@object # @.str.29 .L.str.29: .asciz "gfx1030" .size .L.str.29, 8 .type .L.str.30,@object # @.str.30 .L.str.30: .asciz "gfx1100" .size .L.str.30, 8 .type .L.str.31,@object # @.str.31 .L.str.31: .asciz "gfx1102" .size .L.str.31, 8 .type _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,@object # @_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .section .rodata._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,"aG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,comdat .weak _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .p2align 3, 0x0 _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_: .quad _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .size _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, 8 .type _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,@object # @_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .section .rodata._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,"aG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,comdat .weak _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .p2align 3, 0x0 _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_: .quad _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .size _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, 8 .type .L.str.33,@object # @.str.33 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.33: .asciz "temporary_buffer::allocate: get_temporary_buffer failed" .size .L.str.33, 56 .type .L.str.34,@object # @.str.34 .L.str.34: .asciz "device free failed" .size .L.str.34, 19 .type .L.str.35,@object # @.str.35 .L.str.35: .asciz "trivial_device_copy D->H failed" .size .L.str.35, 32 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_" .size .L__unnamed_1, 136 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_" .size .L__unnamed_2, 136 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_" .size .L__unnamed_3, 184 .type .L__unnamed_4,@object # @3 .L__unnamed_4: .asciz "_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_" .size .L__unnamed_4, 184 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __gxx_personality_v0 .addrsig_sym _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .addrsig_sym _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .addrsig_sym _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .addrsig_sym _ZN7rocprim6detail34__device_stub__block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Unwind_Resume .addrsig_sym _ZSt4cout .addrsig_sym _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .addrsig_sym _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .addrsig_sym __dso_handle .addrsig_sym _ZTVN10__cxxabiv120__si_class_type_infoE .addrsig_sym _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE .addrsig_sym _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .addrsig_sym _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .addrsig_sym _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .addrsig_sym _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .addrsig_sym _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .addrsig_sym _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .addrsig_sym _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .addrsig_sym _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .addrsig_sym _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .addrsig_sym _ZTSN6thrust6system6detail9bad_allocE .addrsig_sym _ZTISt9bad_alloc .addrsig_sym _ZTIN6thrust6system6detail9bad_allocE .addrsig_sym _ZZN6thrust6system12hip_categoryEvE6result .addrsig_sym _ZGVZN6thrust6system12hip_categoryEvE6result .addrsig_sym _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE .addrsig_sym _ZTSN6thrust6system14error_categoryE .addrsig_sym _ZTIN6thrust6system14error_categoryE .addrsig_sym _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE .addrsig_sym _ZZN6thrust6system15system_categoryEvE6result .addrsig_sym _ZGVZN6thrust6system15system_categoryEvE6result .addrsig_sym _ZTSN6thrust6system6detail21system_error_categoryE .addrsig_sym _ZTIN6thrust6system6detail21system_error_categoryE .addrsig_sym _ZZN6thrust6system16generic_categoryEvE6result .addrsig_sym _ZGVZN6thrust6system16generic_categoryEvE6result .addrsig_sym _ZTSN6thrust6system6detail22generic_error_categoryE .addrsig_sym _ZTIN6thrust6system6detail22generic_error_categoryE .addrsig_sym _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .addrsig_sym _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .addrsig_sym _ZTSN6thrust6system12system_errorE .addrsig_sym _ZTISt13runtime_error .addrsig_sym _ZTIN6thrust6system12system_errorE .addrsig_sym _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .addrsig_sym _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .addrsig_sym _ZZN7rocprim6detail15get_device_archEiRNS0_11target_archEE10arch_cache .addrsig_sym _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .addrsig_sym _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .section .text._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,comdat .protected _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ ; -- Begin function _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .globl _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .p2align 8 .type _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,@function _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_: ; @_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ ; %bb.0: s_clause 0x1 s_load_b128 s[16:19], s[0:1], 0x0 s_load_b64 s[22:23], s[0:1], 0x10 s_mov_b32 s3, 0 s_lshl_b32 s2, s15, 12 v_lshlrev_b32_e32 v1, 2, v0 s_lshl_b64 s[4:5], s[2:3], 2 s_mov_b32 s21, s3 v_mbcnt_lo_u32_b32 v19, -1, 0 s_mov_b32 s20, s15 s_waitcnt lgkmcnt(0) s_lshr_b64 s[6:7], s[18:19], 12 s_add_u32 s3, s16, s4 s_addc_u32 s4, s17, s5 v_add_co_u32 v17, s3, s3, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v18, null, s4, 0, s3 s_cmp_lg_u64 s[6:7], s[20:21] s_cbranch_scc0 .LBB0_6 ; %bb.1: s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, 0x1000, v17 s_clause 0x1 global_load_b32 v7, v[17:18], off global_load_b32 v8, v[17:18], off offset:1024 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v18, vcc_lo v_add_co_u32 v3, vcc_lo, v17, 0x2000 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v18, vcc_lo s_clause 0x3 global_load_b32 v9, v[17:18], off offset:2048 global_load_b32 v10, v[17:18], off offset:3072 global_load_b32 v11, v[3:4], off offset:-4096 global_load_b32 v12, v[1:2], off offset:1024 v_add_co_u32 v5, vcc_lo, 0x2000, v17 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v18, vcc_lo s_clause 0x3 global_load_b32 v13, v[1:2], off offset:2048 global_load_b32 v14, v[1:2], off offset:3072 global_load_b32 v3, v[3:4], off global_load_b32 v4, v[5:6], off offset:1024 v_add_co_u32 v1, vcc_lo, 0x3000, v17 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v18, vcc_lo s_clause 0x5 global_load_b32 v15, v[5:6], off offset:2048 global_load_b32 v5, v[5:6], off offset:3072 global_load_b32 v6, v[1:2], off global_load_b32 v16, v[1:2], off offset:1024 global_load_b32 v20, v[1:2], off offset:2048 global_load_b32 v1, v[1:2], off offset:3072 s_mov_b32 s3, exec_lo s_waitcnt vmcnt(14) v_add_nc_u32_e32 v2, v8, v7 s_waitcnt vmcnt(12) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v9, v10 s_waitcnt vmcnt(10) v_add3_u32 v2, v2, v11, v12 s_waitcnt vmcnt(8) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v13, v14 s_waitcnt vmcnt(6) v_add3_u32 v2, v2, v3, v4 s_waitcnt vmcnt(4) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v15, v5 s_waitcnt vmcnt(2) v_add3_u32 v2, v2, v6, v16 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v1, v2, v20, v1 v_mov_b32_dpp v2, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v2, v1 v_mov_b32_dpp v2, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_mov_b32_dpp v2, v1 row_shr:4 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_mov_b32_dpp v2, v1 row_shr:8 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) s_waitcnt lgkmcnt(0) v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v2 ds_bpermute_b32 v1, v2, v1 offset:124 v_cmpx_eq_u32_e32 0, v19 s_cbranch_execz .LBB0_3 ; %bb.2: v_lshrrev_b32_e32 v2, 3, v0 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v2, 28, v2 s_waitcnt lgkmcnt(0) ds_store_b32 v2, v1 .LBB0_3: s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e32 8, v0 s_cbranch_execz .LBB0_5 ; %bb.4: v_lshlrev_b32_e32 v1, 2, v19 ds_load_b32 v2, v1 v_or_b32_e32 v1, 28, v1 s_waitcnt lgkmcnt(0) v_mov_b32_dpp v3, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v2, v3, v2 v_mov_b32_dpp v3, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v2, v2, v3 v_mov_b32_dpp v3, v2 row_shr:4 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v2, v2, v3 ds_bpermute_b32 v1, v1, v2 .LBB0_5: ; %Flow s_or_b32 exec_lo, exec_lo, s3 s_mov_b32 s3, 0 s_branch .LBB0_7 .LBB0_6: s_mov_b32 s3, -1 ; implicit-def: $vgpr1 .LBB0_7: ; %Flow16 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s3 s_cbranch_vccz .LBB0_45 ; %bb.8: s_sub_i32 s17, s18, s2 s_mov_b32 s2, exec_lo ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 v_cmpx_gt_u32_e64 s17, v0 s_cbranch_execz .LBB0_10 ; %bb.9: s_waitcnt lgkmcnt(0) global_load_b32 v1, v[17:18], off .LBB0_10: s_or_b32 exec_lo, exec_lo, s2 v_or_b32_e32 v20, 0x100, v0 s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u32_e32 vcc_lo, s17, v20 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB0_12 ; %bb.11: global_load_b32 v2, v[17:18], off offset:1024 .LBB0_12: s_or_b32 exec_lo, exec_lo, s2 v_or_b32_e32 v20, 0x200, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s2, s17, v20 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_14 ; %bb.13: global_load_b32 v3, v[17:18], off offset:2048 .LBB0_14: s_or_b32 exec_lo, exec_lo, s3 v_or_b32_e32 v20, 0x300, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s3, s17, v20 s_and_saveexec_b32 s4, s3 s_cbranch_execz .LBB0_16 ; %bb.15: global_load_b32 v4, v[17:18], off offset:3072 .LBB0_16: s_or_b32 exec_lo, exec_lo, s4 v_or_b32_e32 v20, 0x400, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s4, s17, v20 s_and_saveexec_b32 s6, s4 s_cbranch_execz .LBB0_18 ; %bb.17: v_add_co_u32 v20, s5, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s5, 0, v18, s5 global_load_b32 v5, v[20:21], off .LBB0_18: s_or_b32 exec_lo, exec_lo, s6 v_or_b32_e32 v20, 0x500, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s5, s17, v20 s_and_saveexec_b32 s7, s5 s_cbranch_execz .LBB0_20 ; %bb.19: v_add_co_u32 v20, s6, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s6, 0, v18, s6 global_load_b32 v6, v[20:21], off offset:1024 .LBB0_20: s_or_b32 exec_lo, exec_lo, s7 v_or_b32_e32 v20, 0x600, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s6, s17, v20 s_and_saveexec_b32 s8, s6 s_cbranch_execz .LBB0_22 ; %bb.21: v_add_co_u32 v20, s7, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s7, 0, v18, s7 global_load_b32 v7, v[20:21], off offset:2048 .LBB0_22: s_or_b32 exec_lo, exec_lo, s8 v_or_b32_e32 v20, 0x700, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s7, s17, v20 s_and_saveexec_b32 s9, s7 s_cbranch_execz .LBB0_24 ; %bb.23: v_add_co_u32 v20, s8, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s8, 0, v18, s8 global_load_b32 v8, v[20:21], off offset:3072 .LBB0_24: s_or_b32 exec_lo, exec_lo, s9 v_or_b32_e32 v20, 0x800, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s8, s17, v20 s_and_saveexec_b32 s10, s8 s_cbranch_execz .LBB0_26 ; %bb.25: v_add_co_u32 v20, s9, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s9, 0, v18, s9 global_load_b32 v9, v[20:21], off .LBB0_26: s_or_b32 exec_lo, exec_lo, s10 v_or_b32_e32 v20, 0x900, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s9, s17, v20 s_and_saveexec_b32 s11, s9 s_cbranch_execz .LBB0_28 ; %bb.27: v_add_co_u32 v20, s10, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s10, 0, v18, s10 global_load_b32 v10, v[20:21], off offset:1024 .LBB0_28: s_or_b32 exec_lo, exec_lo, s11 v_or_b32_e32 v20, 0xa00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s10, s17, v20 s_and_saveexec_b32 s12, s10 s_cbranch_execz .LBB0_30 ; %bb.29: v_add_co_u32 v20, s11, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s11, 0, v18, s11 global_load_b32 v11, v[20:21], off offset:2048 .LBB0_30: s_or_b32 exec_lo, exec_lo, s12 v_or_b32_e32 v20, 0xb00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s11, s17, v20 s_and_saveexec_b32 s13, s11 s_cbranch_execz .LBB0_32 ; %bb.31: v_add_co_u32 v20, s12, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s12, 0, v18, s12 global_load_b32 v12, v[20:21], off offset:3072 .LBB0_32: s_or_b32 exec_lo, exec_lo, s13 v_or_b32_e32 v20, 0xc00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s12, s17, v20 s_and_saveexec_b32 s14, s12 s_cbranch_execz .LBB0_34 ; %bb.33: v_add_co_u32 v20, s13, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s13, 0, v18, s13 global_load_b32 v13, v[20:21], off .LBB0_34: s_or_b32 exec_lo, exec_lo, s14 v_or_b32_e32 v20, 0xd00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s13, s17, v20 s_and_saveexec_b32 s15, s13 s_cbranch_execz .LBB0_36 ; %bb.35: v_add_co_u32 v20, s14, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s14, 0, v18, s14 global_load_b32 v14, v[20:21], off offset:1024 .LBB0_36: s_or_b32 exec_lo, exec_lo, s15 v_or_b32_e32 v20, 0xe00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s14, s17, v20 s_and_saveexec_b32 s16, s14 s_cbranch_execz .LBB0_38 ; %bb.37: v_add_co_u32 v20, s15, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s15, 0, v18, s15 global_load_b32 v15, v[20:21], off offset:2048 .LBB0_38: s_or_b32 exec_lo, exec_lo, s16 v_or_b32_e32 v20, 0xf00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s15, s17, v20 s_and_saveexec_b32 s24, s15 s_cbranch_execz .LBB0_40 ; %bb.39: v_add_co_u32 v16, s16, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v17, s16, 0, v18, s16 global_load_b32 v16, v[16:17], off offset:3072 .LBB0_40: ; %_ZN7rocprim25block_load_direct_stripedILj256EPiiLj16EEEvjT0_RAT2__T1_j.exit.i s_or_b32 exec_lo, exec_lo, s24 s_waitcnt vmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cndmask_b32_e64 v3, 0, v3, s2 v_cndmask_b32_e64 v4, 0, v4, s3 v_cmp_ne_u32_e32 vcc_lo, 31, v19 s_min_u32 s2, s17, 0x100 s_waitcnt lgkmcnt(0) v_add_nc_u32_e32 v1, v2, v1 v_cndmask_b32_e64 v2, 0, v5, s4 v_cndmask_b32_e64 v5, 0, v6, s5 v_cndmask_b32_e64 v6, 0, v15, s14 s_mov_b32 s3, exec_lo v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v7, s6 v_cndmask_b32_e64 v4, 0, v8, s7 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_cndmask_b32_e64 v2, 0, v9, s8 v_cndmask_b32_e64 v5, 0, v10, s9 v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v11, s10 v_cndmask_b32_e64 v4, 0, v12, s11 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_cndmask_b32_e64 v2, 0, v13, s12 v_cndmask_b32_e64 v5, 0, v14, s13 v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v16, s15 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v19, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 30, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_lshlrev_b32_e32 v2, 2, v4 v_add_nc_u32_e32 v4, 1, v19 v_cndmask_b32_e64 v5, 0, 1, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v6, v3 v_and_b32_e32 v3, 0xe0, v0 v_lshlrev_b32_e32 v5, 1, v5 ds_bpermute_b32 v2, v2, v1 v_sub_nc_u32_e64 v3, s2, v3 clamp s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_cmp_lt_u32_e32 vcc_lo, v4, v3 v_add_lshl_u32 v4, v5, v19, 2 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v2, 0, v2 :: v_dual_add_nc_u32 v5, 2, v19 v_cmp_gt_u32_e32 vcc_lo, 28, v19 v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 v_add_nc_u32_e32 v5, 4, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v4, 2, v4 v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 24, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 v_add_nc_u32_e32 v5, 8, v19 v_lshlrev_b32_e32 v4, 3, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 16, v19 v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v4, 4, v4 v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_add_nc_u32_e32 v4, 16, v19 v_cmp_lt_u32_e32 vcc_lo, v4, v3 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_cmpx_eq_u32_e32 0, v19 s_cbranch_execz .LBB0_42 ; %bb.41: v_lshrrev_b32_e32 v2, 3, v0 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v2, 28, v2 ds_store_b32 v2, v1 offset:32 .LBB0_42: s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e32 8, v0 s_cbranch_execz .LBB0_44 ; %bb.43: v_lshlrev_b32_e32 v1, 2, v19 v_and_b32_e32 v2, 7, v19 s_add_i32 s2, s2, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshr_b32 s2, s2, 5 ds_load_b32 v1, v1 offset:32 v_cmp_ne_u32_e32 vcc_lo, 7, v2 v_add_nc_u32_e32 v5, 1, v2 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 6, v2 s_delay_alu instid0(VALU_DEP_2) v_lshlrev_b32_e32 v3, 2, v3 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_gt_u32_e32 vcc_lo, s2, v5 s_waitcnt lgkmcnt(0) ds_bpermute_b32 v3, v3, v1 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v3, 0, v3 :: v_dual_lshlrev_b32 v4, 1, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_lshl_u32 v4, v4, v19, 2 v_cmp_gt_u32_e32 vcc_lo, 4, v2 v_add_nc_u32_e32 v1, v3, v1 v_cndmask_b32_e64 v5, 0, 1, vcc_lo ds_bpermute_b32 v3, v4, v1 v_add_nc_u32_e32 v4, 2, v2 v_add_nc_u32_e32 v2, 4, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cmp_gt_u32_e32 vcc_lo, s2, v4 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v3, 0, v3 :: v_dual_lshlrev_b32 v4, 2, v5 v_cmp_gt_u32_e32 vcc_lo, s2, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v1, v1, v3 v_add_lshl_u32 v3, v4, v19, 2 ds_bpermute_b32 v3, v3, v1 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 .LBB0_44: ; %Flow15 s_or_b32 exec_lo, exec_lo, s3 .LBB0_45: ; %_ZN7rocprim12block_reduceIiLj256ELNS_22block_reduce_algorithmE0ELj1ELj1EE6reduceIN6thrust4plusIiEEEEviRijT_.exit.i s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB0_47 ; %bb.46: s_load_b32 s2, s[0:1], 0x18 s_lshl_b64 s[0:1], s[20:21], 2 v_mov_b32_e32 v0, 0 s_add_u32 s0, s22, s0 s_addc_u32 s1, s23, s1 s_cmp_eq_u64 s[18:19], 0 s_cselect_b32 s3, -1, 0 s_waitcnt lgkmcnt(0) v_cndmask_b32_e64 v1, v1, s2, s3 global_store_b32 v0, v1, s[0:1] .LBB0_47: ; %_ZN7rocprim6detail24block_reduce_kernel_implILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .amdhsa_group_segment_fixed_size 64 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 32 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 22 .amdhsa_next_free_sgpr 25 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,comdat .Lfunc_end0: .size _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, .Lfunc_end0-_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 2452 ; NumSgprs: 27 ; NumVgprs: 22 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 64 bytes/workgroup (compile time only) ; SGPRBlocks: 3 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 27 ; NumVGPRsForWavesPerEU: 22 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,comdat .protected _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ ; -- Begin function _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .globl _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .p2align 8 .type _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,@function _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_: ; @_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ ; %bb.0: s_clause 0x1 s_load_b128 s[16:19], s[0:1], 0x0 s_load_b64 s[22:23], s[0:1], 0x10 s_mov_b32 s3, 0 s_lshl_b32 s2, s15, 12 v_lshlrev_b32_e32 v1, 2, v0 s_lshl_b64 s[4:5], s[2:3], 2 s_mov_b32 s21, s3 v_mbcnt_lo_u32_b32 v19, -1, 0 s_mov_b32 s20, s15 s_waitcnt lgkmcnt(0) s_lshr_b64 s[6:7], s[18:19], 12 s_add_u32 s3, s16, s4 s_addc_u32 s4, s17, s5 v_add_co_u32 v17, s3, s3, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v18, null, s4, 0, s3 s_cmp_lg_u64 s[6:7], s[20:21] s_cbranch_scc0 .LBB1_6 ; %bb.1: s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, 0x1000, v17 s_clause 0x1 global_load_b32 v7, v[17:18], off global_load_b32 v8, v[17:18], off offset:1024 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v18, vcc_lo v_add_co_u32 v3, vcc_lo, v17, 0x2000 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v18, vcc_lo s_clause 0x3 global_load_b32 v9, v[17:18], off offset:2048 global_load_b32 v10, v[17:18], off offset:3072 global_load_b32 v11, v[3:4], off offset:-4096 global_load_b32 v12, v[1:2], off offset:1024 v_add_co_u32 v5, vcc_lo, 0x2000, v17 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v18, vcc_lo s_clause 0x3 global_load_b32 v13, v[1:2], off offset:2048 global_load_b32 v14, v[1:2], off offset:3072 global_load_b32 v3, v[3:4], off global_load_b32 v4, v[5:6], off offset:1024 v_add_co_u32 v1, vcc_lo, 0x3000, v17 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v18, vcc_lo s_clause 0x5 global_load_b32 v15, v[5:6], off offset:2048 global_load_b32 v5, v[5:6], off offset:3072 global_load_b32 v6, v[1:2], off global_load_b32 v16, v[1:2], off offset:1024 global_load_b32 v20, v[1:2], off offset:2048 global_load_b32 v1, v[1:2], off offset:3072 s_mov_b32 s3, exec_lo s_waitcnt vmcnt(14) v_add_nc_u32_e32 v2, v8, v7 s_waitcnt vmcnt(12) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v9, v10 s_waitcnt vmcnt(10) v_add3_u32 v2, v2, v11, v12 s_waitcnt vmcnt(8) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v13, v14 s_waitcnt vmcnt(6) v_add3_u32 v2, v2, v3, v4 s_waitcnt vmcnt(4) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v15, v5 s_waitcnt vmcnt(2) v_add3_u32 v2, v2, v6, v16 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v1, v2, v20, v1 v_mov_b32_dpp v2, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v2, v1 v_mov_b32_dpp v2, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_mov_b32_dpp v2, v1 row_shr:4 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_mov_b32_dpp v2, v1 row_shr:8 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) s_waitcnt lgkmcnt(0) v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v2 ds_bpermute_b32 v1, v2, v1 offset:124 v_cmpx_eq_u32_e32 0, v19 s_cbranch_execz .LBB1_3 ; %bb.2: v_lshrrev_b32_e32 v2, 3, v0 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v2, 28, v2 s_waitcnt lgkmcnt(0) ds_store_b32 v2, v1 .LBB1_3: s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e32 8, v0 s_cbranch_execz .LBB1_5 ; %bb.4: v_lshlrev_b32_e32 v1, 2, v19 ds_load_b32 v2, v1 v_or_b32_e32 v1, 28, v1 s_waitcnt lgkmcnt(0) v_mov_b32_dpp v3, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v2, v3, v2 v_mov_b32_dpp v3, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v2, v2, v3 v_mov_b32_dpp v3, v2 row_shr:4 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v2, v2, v3 ds_bpermute_b32 v1, v1, v2 .LBB1_5: ; %Flow s_or_b32 exec_lo, exec_lo, s3 s_mov_b32 s3, 0 s_branch .LBB1_7 .LBB1_6: s_mov_b32 s3, -1 ; implicit-def: $vgpr1 .LBB1_7: ; %Flow16 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s3 s_cbranch_vccz .LBB1_45 ; %bb.8: s_sub_i32 s17, s18, s2 s_mov_b32 s2, exec_lo ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 v_cmpx_gt_u32_e64 s17, v0 s_cbranch_execz .LBB1_10 ; %bb.9: s_waitcnt lgkmcnt(0) global_load_b32 v1, v[17:18], off .LBB1_10: s_or_b32 exec_lo, exec_lo, s2 v_or_b32_e32 v20, 0x100, v0 s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u32_e32 vcc_lo, s17, v20 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB1_12 ; %bb.11: global_load_b32 v2, v[17:18], off offset:1024 .LBB1_12: s_or_b32 exec_lo, exec_lo, s2 v_or_b32_e32 v20, 0x200, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s2, s17, v20 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB1_14 ; %bb.13: global_load_b32 v3, v[17:18], off offset:2048 .LBB1_14: s_or_b32 exec_lo, exec_lo, s3 v_or_b32_e32 v20, 0x300, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s3, s17, v20 s_and_saveexec_b32 s4, s3 s_cbranch_execz .LBB1_16 ; %bb.15: global_load_b32 v4, v[17:18], off offset:3072 .LBB1_16: s_or_b32 exec_lo, exec_lo, s4 v_or_b32_e32 v20, 0x400, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s4, s17, v20 s_and_saveexec_b32 s6, s4 s_cbranch_execz .LBB1_18 ; %bb.17: v_add_co_u32 v20, s5, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s5, 0, v18, s5 global_load_b32 v5, v[20:21], off .LBB1_18: s_or_b32 exec_lo, exec_lo, s6 v_or_b32_e32 v20, 0x500, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s5, s17, v20 s_and_saveexec_b32 s7, s5 s_cbranch_execz .LBB1_20 ; %bb.19: v_add_co_u32 v20, s6, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s6, 0, v18, s6 global_load_b32 v6, v[20:21], off offset:1024 .LBB1_20: s_or_b32 exec_lo, exec_lo, s7 v_or_b32_e32 v20, 0x600, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s6, s17, v20 s_and_saveexec_b32 s8, s6 s_cbranch_execz .LBB1_22 ; %bb.21: v_add_co_u32 v20, s7, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s7, 0, v18, s7 global_load_b32 v7, v[20:21], off offset:2048 .LBB1_22: s_or_b32 exec_lo, exec_lo, s8 v_or_b32_e32 v20, 0x700, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s7, s17, v20 s_and_saveexec_b32 s9, s7 s_cbranch_execz .LBB1_24 ; %bb.23: v_add_co_u32 v20, s8, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s8, 0, v18, s8 global_load_b32 v8, v[20:21], off offset:3072 .LBB1_24: s_or_b32 exec_lo, exec_lo, s9 v_or_b32_e32 v20, 0x800, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s8, s17, v20 s_and_saveexec_b32 s10, s8 s_cbranch_execz .LBB1_26 ; %bb.25: v_add_co_u32 v20, s9, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s9, 0, v18, s9 global_load_b32 v9, v[20:21], off .LBB1_26: s_or_b32 exec_lo, exec_lo, s10 v_or_b32_e32 v20, 0x900, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s9, s17, v20 s_and_saveexec_b32 s11, s9 s_cbranch_execz .LBB1_28 ; %bb.27: v_add_co_u32 v20, s10, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s10, 0, v18, s10 global_load_b32 v10, v[20:21], off offset:1024 .LBB1_28: s_or_b32 exec_lo, exec_lo, s11 v_or_b32_e32 v20, 0xa00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s10, s17, v20 s_and_saveexec_b32 s12, s10 s_cbranch_execz .LBB1_30 ; %bb.29: v_add_co_u32 v20, s11, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s11, 0, v18, s11 global_load_b32 v11, v[20:21], off offset:2048 .LBB1_30: s_or_b32 exec_lo, exec_lo, s12 v_or_b32_e32 v20, 0xb00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s11, s17, v20 s_and_saveexec_b32 s13, s11 s_cbranch_execz .LBB1_32 ; %bb.31: v_add_co_u32 v20, s12, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s12, 0, v18, s12 global_load_b32 v12, v[20:21], off offset:3072 .LBB1_32: s_or_b32 exec_lo, exec_lo, s13 v_or_b32_e32 v20, 0xc00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s12, s17, v20 s_and_saveexec_b32 s14, s12 s_cbranch_execz .LBB1_34 ; %bb.33: v_add_co_u32 v20, s13, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s13, 0, v18, s13 global_load_b32 v13, v[20:21], off .LBB1_34: s_or_b32 exec_lo, exec_lo, s14 v_or_b32_e32 v20, 0xd00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s13, s17, v20 s_and_saveexec_b32 s15, s13 s_cbranch_execz .LBB1_36 ; %bb.35: v_add_co_u32 v20, s14, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s14, 0, v18, s14 global_load_b32 v14, v[20:21], off offset:1024 .LBB1_36: s_or_b32 exec_lo, exec_lo, s15 v_or_b32_e32 v20, 0xe00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s14, s17, v20 s_and_saveexec_b32 s16, s14 s_cbranch_execz .LBB1_38 ; %bb.37: v_add_co_u32 v20, s15, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s15, 0, v18, s15 global_load_b32 v15, v[20:21], off offset:2048 .LBB1_38: s_or_b32 exec_lo, exec_lo, s16 v_or_b32_e32 v20, 0xf00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s15, s17, v20 s_and_saveexec_b32 s24, s15 s_cbranch_execz .LBB1_40 ; %bb.39: v_add_co_u32 v16, s16, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v17, s16, 0, v18, s16 global_load_b32 v16, v[16:17], off offset:3072 .LBB1_40: ; %_ZN7rocprim25block_load_direct_stripedILj256EPiiLj16EEEvjT0_RAT2__T1_j.exit.i s_or_b32 exec_lo, exec_lo, s24 s_waitcnt vmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cndmask_b32_e64 v3, 0, v3, s2 v_cndmask_b32_e64 v4, 0, v4, s3 v_cmp_ne_u32_e32 vcc_lo, 31, v19 s_min_u32 s2, s17, 0x100 s_waitcnt lgkmcnt(0) v_add_nc_u32_e32 v1, v2, v1 v_cndmask_b32_e64 v2, 0, v5, s4 v_cndmask_b32_e64 v5, 0, v6, s5 v_cndmask_b32_e64 v6, 0, v15, s14 s_mov_b32 s3, exec_lo v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v7, s6 v_cndmask_b32_e64 v4, 0, v8, s7 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_cndmask_b32_e64 v2, 0, v9, s8 v_cndmask_b32_e64 v5, 0, v10, s9 v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v11, s10 v_cndmask_b32_e64 v4, 0, v12, s11 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_cndmask_b32_e64 v2, 0, v13, s12 v_cndmask_b32_e64 v5, 0, v14, s13 v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v16, s15 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v19, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 30, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_lshlrev_b32_e32 v2, 2, v4 v_add_nc_u32_e32 v4, 1, v19 v_cndmask_b32_e64 v5, 0, 1, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v6, v3 v_and_b32_e32 v3, 0xe0, v0 v_lshlrev_b32_e32 v5, 1, v5 ds_bpermute_b32 v2, v2, v1 v_sub_nc_u32_e64 v3, s2, v3 clamp s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_cmp_lt_u32_e32 vcc_lo, v4, v3 v_add_lshl_u32 v4, v5, v19, 2 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v2, 0, v2 :: v_dual_add_nc_u32 v5, 2, v19 v_cmp_gt_u32_e32 vcc_lo, 28, v19 v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 v_add_nc_u32_e32 v5, 4, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v4, 2, v4 v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 24, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 v_add_nc_u32_e32 v5, 8, v19 v_lshlrev_b32_e32 v4, 3, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 16, v19 v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v4, 4, v4 v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_add_nc_u32_e32 v4, 16, v19 v_cmp_lt_u32_e32 vcc_lo, v4, v3 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_cmpx_eq_u32_e32 0, v19 s_cbranch_execz .LBB1_42 ; %bb.41: v_lshrrev_b32_e32 v2, 3, v0 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v2, 28, v2 ds_store_b32 v2, v1 offset:32 .LBB1_42: s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e32 8, v0 s_cbranch_execz .LBB1_44 ; %bb.43: v_lshlrev_b32_e32 v1, 2, v19 v_and_b32_e32 v2, 7, v19 s_add_i32 s2, s2, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshr_b32 s2, s2, 5 ds_load_b32 v1, v1 offset:32 v_cmp_ne_u32_e32 vcc_lo, 7, v2 v_add_nc_u32_e32 v5, 1, v2 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 6, v2 s_delay_alu instid0(VALU_DEP_2) v_lshlrev_b32_e32 v3, 2, v3 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_gt_u32_e32 vcc_lo, s2, v5 s_waitcnt lgkmcnt(0) ds_bpermute_b32 v3, v3, v1 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v3, 0, v3 :: v_dual_lshlrev_b32 v4, 1, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_lshl_u32 v4, v4, v19, 2 v_cmp_gt_u32_e32 vcc_lo, 4, v2 v_add_nc_u32_e32 v1, v3, v1 v_cndmask_b32_e64 v5, 0, 1, vcc_lo ds_bpermute_b32 v3, v4, v1 v_add_nc_u32_e32 v4, 2, v2 v_add_nc_u32_e32 v2, 4, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cmp_gt_u32_e32 vcc_lo, s2, v4 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v3, 0, v3 :: v_dual_lshlrev_b32 v4, 2, v5 v_cmp_gt_u32_e32 vcc_lo, s2, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v1, v1, v3 v_add_lshl_u32 v3, v4, v19, 2 ds_bpermute_b32 v3, v3, v1 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 .LBB1_44: ; %Flow15 s_or_b32 exec_lo, exec_lo, s3 .LBB1_45: ; %_ZN7rocprim12block_reduceIiLj256ELNS_22block_reduce_algorithmE0ELj1ELj1EE6reduceIN6thrust4plusIiEEEEviRijT_.exit.i s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB1_47 ; %bb.46: s_load_b32 s2, s[0:1], 0x18 s_lshl_b64 s[0:1], s[20:21], 2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s0, s22, s0 s_addc_u32 s1, s23, s1 s_cmp_lg_u64 s[18:19], 0 s_cselect_b32 vcc_lo, -1, 0 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v0, 0, v1 :: v_dual_mov_b32 v1, 0 s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v0, s2, v0 global_store_b32 v1, v0, s[0:1] .LBB1_47: ; %_ZN7rocprim6detail24block_reduce_kernel_implILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .amdhsa_group_segment_fixed_size 64 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 32 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 22 .amdhsa_next_free_sgpr 25 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_,comdat .Lfunc_end1: .size _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_, .Lfunc_end1-_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 2460 ; NumSgprs: 27 ; NumVgprs: 22 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 64 bytes/workgroup (compile time only) ; SGPRBlocks: 3 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 27 ; NumVGPRsForWavesPerEU: 22 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,comdat .protected _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ ; -- Begin function _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .globl _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .p2align 8 .type _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,@function _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_: ; @_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ ; %bb.0: s_clause 0x1 s_load_b128 s[16:19], s[0:1], 0x0 s_load_b64 s[22:23], s[0:1], 0x10 s_mov_b32 s3, 0 s_lshl_b32 s2, s15, 12 v_lshlrev_b32_e32 v1, 2, v0 s_lshl_b64 s[4:5], s[2:3], 2 s_mov_b32 s21, s3 v_mbcnt_lo_u32_b32 v19, -1, 0 s_mov_b32 s20, s15 s_waitcnt lgkmcnt(0) s_lshr_b64 s[6:7], s[18:19], 12 s_add_u32 s3, s16, s4 s_addc_u32 s4, s17, s5 v_add_co_u32 v17, s3, s3, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v18, null, s4, 0, s3 s_cmp_lg_u64 s[6:7], s[20:21] s_cbranch_scc0 .LBB2_6 ; %bb.1: s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, 0x1000, v17 s_clause 0x1 global_load_b32 v7, v[17:18], off global_load_b32 v8, v[17:18], off offset:1024 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v18, vcc_lo v_add_co_u32 v3, vcc_lo, v17, 0x2000 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v18, vcc_lo s_clause 0x3 global_load_b32 v9, v[17:18], off offset:2048 global_load_b32 v10, v[17:18], off offset:3072 global_load_b32 v11, v[3:4], off offset:-4096 global_load_b32 v12, v[1:2], off offset:1024 v_add_co_u32 v5, vcc_lo, 0x2000, v17 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v18, vcc_lo s_clause 0x3 global_load_b32 v13, v[1:2], off offset:2048 global_load_b32 v14, v[1:2], off offset:3072 global_load_b32 v3, v[3:4], off global_load_b32 v4, v[5:6], off offset:1024 v_add_co_u32 v1, vcc_lo, 0x3000, v17 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v18, vcc_lo s_clause 0x5 global_load_b32 v15, v[5:6], off offset:2048 global_load_b32 v5, v[5:6], off offset:3072 global_load_b32 v6, v[1:2], off global_load_b32 v16, v[1:2], off offset:1024 global_load_b32 v20, v[1:2], off offset:2048 global_load_b32 v1, v[1:2], off offset:3072 s_mov_b32 s3, exec_lo s_waitcnt vmcnt(14) v_add_nc_u32_e32 v2, v8, v7 s_waitcnt vmcnt(12) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v9, v10 s_waitcnt vmcnt(10) v_add3_u32 v2, v2, v11, v12 s_waitcnt vmcnt(8) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v13, v14 s_waitcnt vmcnt(6) v_add3_u32 v2, v2, v3, v4 s_waitcnt vmcnt(4) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v15, v5 s_waitcnt vmcnt(2) v_add3_u32 v2, v2, v6, v16 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v1, v2, v20, v1 v_mov_b32_dpp v2, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v2, v1 v_mov_b32_dpp v2, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_mov_b32_dpp v2, v1 row_shr:4 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_mov_b32_dpp v2, v1 row_shr:8 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) s_waitcnt lgkmcnt(0) v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v2 ds_bpermute_b32 v1, v2, v1 offset:124 v_cmpx_eq_u32_e32 0, v19 s_cbranch_execz .LBB2_3 ; %bb.2: v_lshrrev_b32_e32 v2, 3, v0 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v2, 28, v2 s_waitcnt lgkmcnt(0) ds_store_b32 v2, v1 .LBB2_3: s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e32 8, v0 s_cbranch_execz .LBB2_5 ; %bb.4: v_lshlrev_b32_e32 v1, 2, v19 ds_load_b32 v2, v1 v_or_b32_e32 v1, 28, v1 s_waitcnt lgkmcnt(0) v_mov_b32_dpp v3, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v2, v3, v2 v_mov_b32_dpp v3, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v2, v2, v3 v_mov_b32_dpp v3, v2 row_shr:4 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v2, v2, v3 ds_bpermute_b32 v1, v1, v2 .LBB2_5: ; %Flow s_or_b32 exec_lo, exec_lo, s3 s_mov_b32 s3, 0 s_branch .LBB2_7 .LBB2_6: s_mov_b32 s3, -1 ; implicit-def: $vgpr1 .LBB2_7: ; %Flow16 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s3 s_cbranch_vccz .LBB2_45 ; %bb.8: s_sub_i32 s17, s18, s2 s_mov_b32 s2, exec_lo ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 v_cmpx_gt_u32_e64 s17, v0 s_cbranch_execz .LBB2_10 ; %bb.9: s_waitcnt lgkmcnt(0) global_load_b32 v1, v[17:18], off .LBB2_10: s_or_b32 exec_lo, exec_lo, s2 v_or_b32_e32 v20, 0x100, v0 s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u32_e32 vcc_lo, s17, v20 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB2_12 ; %bb.11: global_load_b32 v2, v[17:18], off offset:1024 .LBB2_12: s_or_b32 exec_lo, exec_lo, s2 v_or_b32_e32 v20, 0x200, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s2, s17, v20 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB2_14 ; %bb.13: global_load_b32 v3, v[17:18], off offset:2048 .LBB2_14: s_or_b32 exec_lo, exec_lo, s3 v_or_b32_e32 v20, 0x300, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s3, s17, v20 s_and_saveexec_b32 s4, s3 s_cbranch_execz .LBB2_16 ; %bb.15: global_load_b32 v4, v[17:18], off offset:3072 .LBB2_16: s_or_b32 exec_lo, exec_lo, s4 v_or_b32_e32 v20, 0x400, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s4, s17, v20 s_and_saveexec_b32 s6, s4 s_cbranch_execz .LBB2_18 ; %bb.17: v_add_co_u32 v20, s5, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s5, 0, v18, s5 global_load_b32 v5, v[20:21], off .LBB2_18: s_or_b32 exec_lo, exec_lo, s6 v_or_b32_e32 v20, 0x500, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s5, s17, v20 s_and_saveexec_b32 s7, s5 s_cbranch_execz .LBB2_20 ; %bb.19: v_add_co_u32 v20, s6, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s6, 0, v18, s6 global_load_b32 v6, v[20:21], off offset:1024 .LBB2_20: s_or_b32 exec_lo, exec_lo, s7 v_or_b32_e32 v20, 0x600, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s6, s17, v20 s_and_saveexec_b32 s8, s6 s_cbranch_execz .LBB2_22 ; %bb.21: v_add_co_u32 v20, s7, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s7, 0, v18, s7 global_load_b32 v7, v[20:21], off offset:2048 .LBB2_22: s_or_b32 exec_lo, exec_lo, s8 v_or_b32_e32 v20, 0x700, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s7, s17, v20 s_and_saveexec_b32 s9, s7 s_cbranch_execz .LBB2_24 ; %bb.23: v_add_co_u32 v20, s8, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s8, 0, v18, s8 global_load_b32 v8, v[20:21], off offset:3072 .LBB2_24: s_or_b32 exec_lo, exec_lo, s9 v_or_b32_e32 v20, 0x800, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s8, s17, v20 s_and_saveexec_b32 s10, s8 s_cbranch_execz .LBB2_26 ; %bb.25: v_add_co_u32 v20, s9, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s9, 0, v18, s9 global_load_b32 v9, v[20:21], off .LBB2_26: s_or_b32 exec_lo, exec_lo, s10 v_or_b32_e32 v20, 0x900, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s9, s17, v20 s_and_saveexec_b32 s11, s9 s_cbranch_execz .LBB2_28 ; %bb.27: v_add_co_u32 v20, s10, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s10, 0, v18, s10 global_load_b32 v10, v[20:21], off offset:1024 .LBB2_28: s_or_b32 exec_lo, exec_lo, s11 v_or_b32_e32 v20, 0xa00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s10, s17, v20 s_and_saveexec_b32 s12, s10 s_cbranch_execz .LBB2_30 ; %bb.29: v_add_co_u32 v20, s11, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s11, 0, v18, s11 global_load_b32 v11, v[20:21], off offset:2048 .LBB2_30: s_or_b32 exec_lo, exec_lo, s12 v_or_b32_e32 v20, 0xb00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s11, s17, v20 s_and_saveexec_b32 s13, s11 s_cbranch_execz .LBB2_32 ; %bb.31: v_add_co_u32 v20, s12, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s12, 0, v18, s12 global_load_b32 v12, v[20:21], off offset:3072 .LBB2_32: s_or_b32 exec_lo, exec_lo, s13 v_or_b32_e32 v20, 0xc00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s12, s17, v20 s_and_saveexec_b32 s14, s12 s_cbranch_execz .LBB2_34 ; %bb.33: v_add_co_u32 v20, s13, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s13, 0, v18, s13 global_load_b32 v13, v[20:21], off .LBB2_34: s_or_b32 exec_lo, exec_lo, s14 v_or_b32_e32 v20, 0xd00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s13, s17, v20 s_and_saveexec_b32 s15, s13 s_cbranch_execz .LBB2_36 ; %bb.35: v_add_co_u32 v20, s14, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s14, 0, v18, s14 global_load_b32 v14, v[20:21], off offset:1024 .LBB2_36: s_or_b32 exec_lo, exec_lo, s15 v_or_b32_e32 v20, 0xe00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s14, s17, v20 s_and_saveexec_b32 s16, s14 s_cbranch_execz .LBB2_38 ; %bb.37: v_add_co_u32 v20, s15, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s15, 0, v18, s15 global_load_b32 v15, v[20:21], off offset:2048 .LBB2_38: s_or_b32 exec_lo, exec_lo, s16 v_or_b32_e32 v20, 0xf00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s15, s17, v20 s_and_saveexec_b32 s24, s15 s_cbranch_execz .LBB2_40 ; %bb.39: v_add_co_u32 v16, s16, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v17, s16, 0, v18, s16 global_load_b32 v16, v[16:17], off offset:3072 .LBB2_40: ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust6detail15normal_iteratorINS1_10device_ptrIiEEEEiLj16EEEvjT0_RAT2__T1_j.exit.i s_or_b32 exec_lo, exec_lo, s24 s_waitcnt vmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cndmask_b32_e64 v3, 0, v3, s2 v_cndmask_b32_e64 v4, 0, v4, s3 v_cmp_ne_u32_e32 vcc_lo, 31, v19 s_min_u32 s2, s17, 0x100 s_waitcnt lgkmcnt(0) v_add_nc_u32_e32 v1, v2, v1 v_cndmask_b32_e64 v2, 0, v5, s4 v_cndmask_b32_e64 v5, 0, v6, s5 v_cndmask_b32_e64 v6, 0, v15, s14 s_mov_b32 s3, exec_lo v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v7, s6 v_cndmask_b32_e64 v4, 0, v8, s7 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_cndmask_b32_e64 v2, 0, v9, s8 v_cndmask_b32_e64 v5, 0, v10, s9 v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v11, s10 v_cndmask_b32_e64 v4, 0, v12, s11 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_cndmask_b32_e64 v2, 0, v13, s12 v_cndmask_b32_e64 v5, 0, v14, s13 v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v16, s15 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v19, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 30, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_lshlrev_b32_e32 v2, 2, v4 v_add_nc_u32_e32 v4, 1, v19 v_cndmask_b32_e64 v5, 0, 1, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v6, v3 v_and_b32_e32 v3, 0xe0, v0 v_lshlrev_b32_e32 v5, 1, v5 ds_bpermute_b32 v2, v2, v1 v_sub_nc_u32_e64 v3, s2, v3 clamp s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_cmp_lt_u32_e32 vcc_lo, v4, v3 v_add_lshl_u32 v4, v5, v19, 2 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v2, 0, v2 :: v_dual_add_nc_u32 v5, 2, v19 v_cmp_gt_u32_e32 vcc_lo, 28, v19 v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 v_add_nc_u32_e32 v5, 4, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v4, 2, v4 v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 24, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 v_add_nc_u32_e32 v5, 8, v19 v_lshlrev_b32_e32 v4, 3, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 16, v19 v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v4, 4, v4 v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_add_nc_u32_e32 v4, 16, v19 v_cmp_lt_u32_e32 vcc_lo, v4, v3 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_cmpx_eq_u32_e32 0, v19 s_cbranch_execz .LBB2_42 ; %bb.41: v_lshrrev_b32_e32 v2, 3, v0 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v2, 28, v2 ds_store_b32 v2, v1 offset:32 .LBB2_42: s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e32 8, v0 s_cbranch_execz .LBB2_44 ; %bb.43: v_lshlrev_b32_e32 v1, 2, v19 v_and_b32_e32 v2, 7, v19 s_add_i32 s2, s2, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshr_b32 s2, s2, 5 ds_load_b32 v1, v1 offset:32 v_cmp_ne_u32_e32 vcc_lo, 7, v2 v_add_nc_u32_e32 v5, 1, v2 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 6, v2 s_delay_alu instid0(VALU_DEP_2) v_lshlrev_b32_e32 v3, 2, v3 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_gt_u32_e32 vcc_lo, s2, v5 s_waitcnt lgkmcnt(0) ds_bpermute_b32 v3, v3, v1 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v3, 0, v3 :: v_dual_lshlrev_b32 v4, 1, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_lshl_u32 v4, v4, v19, 2 v_cmp_gt_u32_e32 vcc_lo, 4, v2 v_add_nc_u32_e32 v1, v3, v1 v_cndmask_b32_e64 v5, 0, 1, vcc_lo ds_bpermute_b32 v3, v4, v1 v_add_nc_u32_e32 v4, 2, v2 v_add_nc_u32_e32 v2, 4, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cmp_gt_u32_e32 vcc_lo, s2, v4 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v3, 0, v3 :: v_dual_lshlrev_b32 v4, 2, v5 v_cmp_gt_u32_e32 vcc_lo, s2, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v1, v1, v3 v_add_lshl_u32 v3, v4, v19, 2 ds_bpermute_b32 v3, v3, v1 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 .LBB2_44: ; %Flow15 s_or_b32 exec_lo, exec_lo, s3 .LBB2_45: ; %_ZN7rocprim12block_reduceIiLj256ELNS_22block_reduce_algorithmE0ELj1ELj1EE6reduceIN6thrust4plusIiEEEEviRijT_.exit.i s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB2_47 ; %bb.46: s_load_b32 s2, s[0:1], 0x18 s_lshl_b64 s[0:1], s[20:21], 2 v_mov_b32_e32 v0, 0 s_add_u32 s0, s22, s0 s_addc_u32 s1, s23, s1 s_cmp_eq_u64 s[18:19], 0 s_cselect_b32 s3, -1, 0 s_waitcnt lgkmcnt(0) v_cndmask_b32_e64 v1, v1, s2, s3 global_store_b32 v0, v1, s[0:1] .LBB2_47: ; %_ZN7rocprim6detail24block_reduce_kernel_implILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .amdhsa_group_segment_fixed_size 64 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 32 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 22 .amdhsa_next_free_sgpr 25 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,comdat .Lfunc_end2: .size _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, .Lfunc_end2-_ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 2452 ; NumSgprs: 27 ; NumVgprs: 22 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 64 bytes/workgroup (compile time only) ; SGPRBlocks: 3 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 27 ; NumVGPRsForWavesPerEU: 22 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,comdat .protected _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ ; -- Begin function _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .globl _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .p2align 8 .type _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,@function _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_: ; @_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ ; %bb.0: s_clause 0x1 s_load_b128 s[16:19], s[0:1], 0x0 s_load_b64 s[22:23], s[0:1], 0x10 s_mov_b32 s3, 0 s_lshl_b32 s2, s15, 12 v_lshlrev_b32_e32 v1, 2, v0 s_lshl_b64 s[4:5], s[2:3], 2 s_mov_b32 s21, s3 v_mbcnt_lo_u32_b32 v19, -1, 0 s_mov_b32 s20, s15 s_waitcnt lgkmcnt(0) s_lshr_b64 s[6:7], s[18:19], 12 s_add_u32 s3, s16, s4 s_addc_u32 s4, s17, s5 v_add_co_u32 v17, s3, s3, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v18, null, s4, 0, s3 s_cmp_lg_u64 s[6:7], s[20:21] s_cbranch_scc0 .LBB3_6 ; %bb.1: s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, 0x1000, v17 s_clause 0x1 global_load_b32 v7, v[17:18], off global_load_b32 v8, v[17:18], off offset:1024 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v18, vcc_lo v_add_co_u32 v3, vcc_lo, v17, 0x2000 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v18, vcc_lo s_clause 0x3 global_load_b32 v9, v[17:18], off offset:2048 global_load_b32 v10, v[17:18], off offset:3072 global_load_b32 v11, v[3:4], off offset:-4096 global_load_b32 v12, v[1:2], off offset:1024 v_add_co_u32 v5, vcc_lo, 0x2000, v17 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v18, vcc_lo s_clause 0x3 global_load_b32 v13, v[1:2], off offset:2048 global_load_b32 v14, v[1:2], off offset:3072 global_load_b32 v3, v[3:4], off global_load_b32 v4, v[5:6], off offset:1024 v_add_co_u32 v1, vcc_lo, 0x3000, v17 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v18, vcc_lo s_clause 0x5 global_load_b32 v15, v[5:6], off offset:2048 global_load_b32 v5, v[5:6], off offset:3072 global_load_b32 v6, v[1:2], off global_load_b32 v16, v[1:2], off offset:1024 global_load_b32 v20, v[1:2], off offset:2048 global_load_b32 v1, v[1:2], off offset:3072 s_mov_b32 s3, exec_lo s_waitcnt vmcnt(14) v_add_nc_u32_e32 v2, v8, v7 s_waitcnt vmcnt(12) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v9, v10 s_waitcnt vmcnt(10) v_add3_u32 v2, v2, v11, v12 s_waitcnt vmcnt(8) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v13, v14 s_waitcnt vmcnt(6) v_add3_u32 v2, v2, v3, v4 s_waitcnt vmcnt(4) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v2, v2, v15, v5 s_waitcnt vmcnt(2) v_add3_u32 v2, v2, v6, v16 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v1, v2, v20, v1 v_mov_b32_dpp v2, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v2, v1 v_mov_b32_dpp v2, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_mov_b32_dpp v2, v1 row_shr:4 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_mov_b32_dpp v2, v1 row_shr:8 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 ds_swizzle_b32 v2, v1 offset:swizzle(BROADCAST,32,15) s_waitcnt lgkmcnt(0) v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, v1, v2 ds_bpermute_b32 v1, v2, v1 offset:124 v_cmpx_eq_u32_e32 0, v19 s_cbranch_execz .LBB3_3 ; %bb.2: v_lshrrev_b32_e32 v2, 3, v0 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v2, 28, v2 s_waitcnt lgkmcnt(0) ds_store_b32 v2, v1 .LBB3_3: s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e32 8, v0 s_cbranch_execz .LBB3_5 ; %bb.4: v_lshlrev_b32_e32 v1, 2, v19 ds_load_b32 v2, v1 v_or_b32_e32 v1, 28, v1 s_waitcnt lgkmcnt(0) v_mov_b32_dpp v3, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v2, v3, v2 v_mov_b32_dpp v3, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v2, v2, v3 v_mov_b32_dpp v3, v2 row_shr:4 row_mask:0xf bank_mask:0xf s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v2, v2, v3 ds_bpermute_b32 v1, v1, v2 .LBB3_5: ; %Flow s_or_b32 exec_lo, exec_lo, s3 s_mov_b32 s3, 0 s_branch .LBB3_7 .LBB3_6: s_mov_b32 s3, -1 ; implicit-def: $vgpr1 .LBB3_7: ; %Flow16 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s3 s_cbranch_vccz .LBB3_45 ; %bb.8: s_sub_i32 s17, s18, s2 s_mov_b32 s2, exec_lo ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 v_cmpx_gt_u32_e64 s17, v0 s_cbranch_execz .LBB3_10 ; %bb.9: s_waitcnt lgkmcnt(0) global_load_b32 v1, v[17:18], off .LBB3_10: s_or_b32 exec_lo, exec_lo, s2 v_or_b32_e32 v20, 0x100, v0 s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u32_e32 vcc_lo, s17, v20 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB3_12 ; %bb.11: global_load_b32 v2, v[17:18], off offset:1024 .LBB3_12: s_or_b32 exec_lo, exec_lo, s2 v_or_b32_e32 v20, 0x200, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s2, s17, v20 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_14 ; %bb.13: global_load_b32 v3, v[17:18], off offset:2048 .LBB3_14: s_or_b32 exec_lo, exec_lo, s3 v_or_b32_e32 v20, 0x300, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s3, s17, v20 s_and_saveexec_b32 s4, s3 s_cbranch_execz .LBB3_16 ; %bb.15: global_load_b32 v4, v[17:18], off offset:3072 .LBB3_16: s_or_b32 exec_lo, exec_lo, s4 v_or_b32_e32 v20, 0x400, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s4, s17, v20 s_and_saveexec_b32 s6, s4 s_cbranch_execz .LBB3_18 ; %bb.17: v_add_co_u32 v20, s5, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s5, 0, v18, s5 global_load_b32 v5, v[20:21], off .LBB3_18: s_or_b32 exec_lo, exec_lo, s6 v_or_b32_e32 v20, 0x500, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s5, s17, v20 s_and_saveexec_b32 s7, s5 s_cbranch_execz .LBB3_20 ; %bb.19: v_add_co_u32 v20, s6, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s6, 0, v18, s6 global_load_b32 v6, v[20:21], off offset:1024 .LBB3_20: s_or_b32 exec_lo, exec_lo, s7 v_or_b32_e32 v20, 0x600, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s6, s17, v20 s_and_saveexec_b32 s8, s6 s_cbranch_execz .LBB3_22 ; %bb.21: v_add_co_u32 v20, s7, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s7, 0, v18, s7 global_load_b32 v7, v[20:21], off offset:2048 .LBB3_22: s_or_b32 exec_lo, exec_lo, s8 v_or_b32_e32 v20, 0x700, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s7, s17, v20 s_and_saveexec_b32 s9, s7 s_cbranch_execz .LBB3_24 ; %bb.23: v_add_co_u32 v20, s8, 0x1000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s8, 0, v18, s8 global_load_b32 v8, v[20:21], off offset:3072 .LBB3_24: s_or_b32 exec_lo, exec_lo, s9 v_or_b32_e32 v20, 0x800, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s8, s17, v20 s_and_saveexec_b32 s10, s8 s_cbranch_execz .LBB3_26 ; %bb.25: v_add_co_u32 v20, s9, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s9, 0, v18, s9 global_load_b32 v9, v[20:21], off .LBB3_26: s_or_b32 exec_lo, exec_lo, s10 v_or_b32_e32 v20, 0x900, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s9, s17, v20 s_and_saveexec_b32 s11, s9 s_cbranch_execz .LBB3_28 ; %bb.27: v_add_co_u32 v20, s10, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s10, 0, v18, s10 global_load_b32 v10, v[20:21], off offset:1024 .LBB3_28: s_or_b32 exec_lo, exec_lo, s11 v_or_b32_e32 v20, 0xa00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s10, s17, v20 s_and_saveexec_b32 s12, s10 s_cbranch_execz .LBB3_30 ; %bb.29: v_add_co_u32 v20, s11, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s11, 0, v18, s11 global_load_b32 v11, v[20:21], off offset:2048 .LBB3_30: s_or_b32 exec_lo, exec_lo, s12 v_or_b32_e32 v20, 0xb00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s11, s17, v20 s_and_saveexec_b32 s13, s11 s_cbranch_execz .LBB3_32 ; %bb.31: v_add_co_u32 v20, s12, 0x2000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s12, 0, v18, s12 global_load_b32 v12, v[20:21], off offset:3072 .LBB3_32: s_or_b32 exec_lo, exec_lo, s13 v_or_b32_e32 v20, 0xc00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s12, s17, v20 s_and_saveexec_b32 s14, s12 s_cbranch_execz .LBB3_34 ; %bb.33: v_add_co_u32 v20, s13, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s13, 0, v18, s13 global_load_b32 v13, v[20:21], off .LBB3_34: s_or_b32 exec_lo, exec_lo, s14 v_or_b32_e32 v20, 0xd00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s13, s17, v20 s_and_saveexec_b32 s15, s13 s_cbranch_execz .LBB3_36 ; %bb.35: v_add_co_u32 v20, s14, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s14, 0, v18, s14 global_load_b32 v14, v[20:21], off offset:1024 .LBB3_36: s_or_b32 exec_lo, exec_lo, s15 v_or_b32_e32 v20, 0xe00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s14, s17, v20 s_and_saveexec_b32 s16, s14 s_cbranch_execz .LBB3_38 ; %bb.37: v_add_co_u32 v20, s15, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v21, s15, 0, v18, s15 global_load_b32 v15, v[20:21], off offset:2048 .LBB3_38: s_or_b32 exec_lo, exec_lo, s16 v_or_b32_e32 v20, 0xf00, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u32_e64 s15, s17, v20 s_and_saveexec_b32 s24, s15 s_cbranch_execz .LBB3_40 ; %bb.39: v_add_co_u32 v16, s16, 0x3000, v17 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v17, s16, 0, v18, s16 global_load_b32 v16, v[16:17], off offset:3072 .LBB3_40: ; %_ZN7rocprim25block_load_direct_stripedILj256EN6thrust6detail15normal_iteratorINS1_10device_ptrIiEEEEiLj16EEEvjT0_RAT2__T1_j.exit.i s_or_b32 exec_lo, exec_lo, s24 s_waitcnt vmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cndmask_b32_e64 v3, 0, v3, s2 v_cndmask_b32_e64 v4, 0, v4, s3 v_cmp_ne_u32_e32 vcc_lo, 31, v19 s_min_u32 s2, s17, 0x100 s_waitcnt lgkmcnt(0) v_add_nc_u32_e32 v1, v2, v1 v_cndmask_b32_e64 v2, 0, v5, s4 v_cndmask_b32_e64 v5, 0, v6, s5 v_cndmask_b32_e64 v6, 0, v15, s14 s_mov_b32 s3, exec_lo v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v7, s6 v_cndmask_b32_e64 v4, 0, v8, s7 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_cndmask_b32_e64 v2, 0, v9, s8 v_cndmask_b32_e64 v5, 0, v10, s9 v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v11, s10 v_cndmask_b32_e64 v4, 0, v12, s11 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_cndmask_b32_e64 v2, 0, v13, s12 v_cndmask_b32_e64 v5, 0, v14, s13 v_add3_u32 v1, v1, v3, v4 v_cndmask_b32_e64 v3, 0, v16, s15 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v19, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 30, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v2, v5 v_lshlrev_b32_e32 v2, 2, v4 v_add_nc_u32_e32 v4, 1, v19 v_cndmask_b32_e64 v5, 0, 1, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add3_u32 v1, v1, v6, v3 v_and_b32_e32 v3, 0xe0, v0 v_lshlrev_b32_e32 v5, 1, v5 ds_bpermute_b32 v2, v2, v1 v_sub_nc_u32_e64 v3, s2, v3 clamp s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_cmp_lt_u32_e32 vcc_lo, v4, v3 v_add_lshl_u32 v4, v5, v19, 2 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v2, 0, v2 :: v_dual_add_nc_u32 v5, 2, v19 v_cmp_gt_u32_e32 vcc_lo, 28, v19 v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 v_add_nc_u32_e32 v5, 4, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v4, 2, v4 v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 24, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 v_add_nc_u32_e32 v5, 8, v19 v_lshlrev_b32_e32 v4, 3, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 16, v19 v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, v5, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v4, 4, v4 v_add_lshl_u32 v4, v4, v19, 2 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 ds_bpermute_b32 v2, v4, v1 v_add_nc_u32_e32 v4, 16, v19 v_cmp_lt_u32_e32 vcc_lo, v4, v3 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 v_cmpx_eq_u32_e32 0, v19 s_cbranch_execz .LBB3_42 ; %bb.41: v_lshrrev_b32_e32 v2, 3, v0 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v2, 28, v2 ds_store_b32 v2, v1 offset:32 .LBB3_42: s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_u32_e32 8, v0 s_cbranch_execz .LBB3_44 ; %bb.43: v_lshlrev_b32_e32 v1, 2, v19 v_and_b32_e32 v2, 7, v19 s_add_i32 s2, s2, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshr_b32 s2, s2, 5 ds_load_b32 v1, v1 offset:32 v_cmp_ne_u32_e32 vcc_lo, 7, v2 v_add_nc_u32_e32 v5, 1, v2 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v19, vcc_lo v_cmp_gt_u32_e32 vcc_lo, 6, v2 s_delay_alu instid0(VALU_DEP_2) v_lshlrev_b32_e32 v3, 2, v3 v_cndmask_b32_e64 v4, 0, 1, vcc_lo v_cmp_gt_u32_e32 vcc_lo, s2, v5 s_waitcnt lgkmcnt(0) ds_bpermute_b32 v3, v3, v1 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v3, 0, v3 :: v_dual_lshlrev_b32 v4, 1, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_lshl_u32 v4, v4, v19, 2 v_cmp_gt_u32_e32 vcc_lo, 4, v2 v_add_nc_u32_e32 v1, v3, v1 v_cndmask_b32_e64 v5, 0, 1, vcc_lo ds_bpermute_b32 v3, v4, v1 v_add_nc_u32_e32 v4, 2, v2 v_add_nc_u32_e32 v2, 4, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cmp_gt_u32_e32 vcc_lo, s2, v4 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v3, 0, v3 :: v_dual_lshlrev_b32 v4, 2, v5 v_cmp_gt_u32_e32 vcc_lo, s2, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v1, v1, v3 v_add_lshl_u32 v3, v4, v19, 2 ds_bpermute_b32 v3, v3, v1 s_waitcnt lgkmcnt(0) v_cndmask_b32_e32 v2, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v1, v1, v2 .LBB3_44: ; %Flow15 s_or_b32 exec_lo, exec_lo, s3 .LBB3_45: ; %_ZN7rocprim12block_reduceIiLj256ELNS_22block_reduce_algorithmE0ELj1ELj1EE6reduceIN6thrust4plusIiEEEEviRijT_.exit.i s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB3_47 ; %bb.46: s_load_b32 s2, s[0:1], 0x18 s_lshl_b64 s[0:1], s[20:21], 2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s0, s22, s0 s_addc_u32 s1, s23, s1 s_cmp_lg_u64 s[18:19], 0 s_cselect_b32 vcc_lo, -1, 0 s_waitcnt lgkmcnt(0) v_dual_cndmask_b32 v0, 0, v1 :: v_dual_mov_b32 v1, 0 s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v0, s2, v0 global_store_b32 v1, v0, s[0:1] .LBB3_47: ; %_ZN7rocprim6detail24block_reduce_kernel_implILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .amdhsa_group_segment_fixed_size 64 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 32 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 22 .amdhsa_next_free_sgpr 25 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,"axG",@progbits,_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_,comdat .Lfunc_end3: .size _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_, .Lfunc_end3-_ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 2460 ; NumSgprs: 27 ; NumVgprs: 22 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 64 bytes/workgroup (compile time only) ; SGPRBlocks: 3 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 27 ; NumVGPRsForWavesPerEU: 22 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 8 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 1 .value_kind: by_value .group_segment_fixed_size: 64 .kernarg_segment_align: 8 .kernarg_segment_size: 32 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 256 .name: _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .private_segment_fixed_size: 0 .sgpr_count: 27 .sgpr_spill_count: 0 .symbol: _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 22 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 8 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 1 .value_kind: by_value .group_segment_fixed_size: 64 .kernarg_segment_align: 8 .kernarg_segment_size: 32 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 256 .name: _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_ .private_segment_fixed_size: 0 .sgpr_count: 27 .sgpr_spill_count: 0 .symbol: _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiPiS5_iN6thrust4plusIiEEEEvT2_mT3_T4_T5_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 22 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 8 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 1 .value_kind: by_value .group_segment_fixed_size: 64 .kernarg_segment_align: 8 .kernarg_segment_size: 32 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 256 .name: _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .private_segment_fixed_size: 0 .sgpr_count: 27 .sgpr_spill_count: 0 .symbol: _ZN7rocprim6detail19block_reduce_kernelILb0ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 22 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 8 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 1 .value_kind: by_value .group_segment_fixed_size: 64 .kernarg_segment_align: 8 .kernarg_segment_size: 32 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 256 .name: _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_ .private_segment_fixed_size: 0 .sgpr_count: 27 .sgpr_spill_count: 0 .symbol: _ZN7rocprim6detail19block_reduce_kernelILb1ENS0_21wrapped_reduce_configINS_14default_configEiEEiN6thrust6detail15normal_iteratorINS5_10device_ptrIiEEEEPiiNS5_4plusIiEEEEvT2_mT3_T4_T5_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 22 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
a550cf5d07a25404787b10c5d9b16b5756843cda
#include<cuda_runtime.h> #include<device_launch_parameters.h> #include<stdio.h> #include<stdlib.h> #include<string.h> __global__ void q1(int* d_a,int* d_r,int *d_m) { int n = threadIdx.x; for(int i = 0;i<(*d_m);i++) { d_r[n*(*d_m)+i] = d_a[n*(*d_m)+i]; for(int j = 0;j<n;j++) d_r[n*(*d_m)+i] *= d_a[n*(*d_m)+i]; } } int main(void) { int *a,*r,m,n,i; int *d_a,*d_r,*d_m; printf("Enter m,n : "); scanf("%d %d",&m,&n); a = (int*)malloc(m*n*sizeof(int)); r = (int*)malloc(m*n*sizeof(int)); printf("Enter matrix:\n"); for(i=0;i<m*n;i++) { scanf("%d",&a[i]); } cudaMalloc((void **)&d_a,(m*n)*sizeof(int)); cudaMalloc((void **)&d_r,(m*n)*sizeof(int)); cudaMalloc((void **)&d_m,sizeof(int)); cudaMemcpy(d_a,a,(m*n)*sizeof(int),cudaMemcpyHostToDevice); cudaMemcpy(d_r,r,(m*n)*sizeof(int),cudaMemcpyHostToDevice); cudaMemcpy(d_m,&m,sizeof(int),cudaMemcpyHostToDevice); q1<<<1,n>>>(d_a,d_r,d_m); cudaError_t error = cudaGetLastError(); if(error!= cudaSuccess) { printf("%s\n",cudaGetErrorString(error)); } cudaMemcpy(r,d_r,(m*n)*sizeof(int),cudaMemcpyDeviceToHost); printf("Result matrix :\n"); for(i=0;i<m*n;i++) { printf("%d\t",r[i]); if((i+1)%m==0) printf("\n"); } }
.file "tmpxft_002b8d34_00000000-6_q1.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z25__device_stub__Z2q1PiS_S_PiS_S_ .type _Z25__device_stub__Z2q1PiS_S_PiS_S_, @function _Z25__device_stub__Z2q1PiS_S_PiS_S_: .LFB2052: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z2q1PiS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z25__device_stub__Z2q1PiS_S_PiS_S_, .-_Z25__device_stub__Z2q1PiS_S_PiS_S_ .globl _Z2q1PiS_S_ .type _Z2q1PiS_S_, @function _Z2q1PiS_S_: .LFB2053: .cfi_startproc endbr64 jmp _Z25__device_stub__Z2q1PiS_S_PiS_S_ .cfi_endproc .LFE2053: .size _Z2q1PiS_S_, .-_Z2q1PiS_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "Enter m,n : " .LC1: .string "%d %d" .LC2: .string "Enter matrix:\n" .LC3: .string "%d" .LC4: .string "%s\n" .LC5: .string "Result matrix :\n" .LC6: .string "%d\t" .LC7: .string "\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 leaq .LC0(%rip), %rsi movl $2, %edi pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 xorl %r14d, %r14d pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 leaq .LC3(%rip), %r13 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $72, %rsp .cfi_def_cfa_offset 128 movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax movq %rsp, %r12 call __printf_chk@PLT leaq 4(%rsp), %rdx movq %r12, %rsi xorl %eax, %eax leaq .LC1(%rip), %rdi call __isoc23_scanf@PLT movl (%rsp), %ebx imull 4(%rsp), %ebx movslq %ebx, %rbx salq $2, %rbx movq %rbx, %rdi call malloc@PLT movq %rbx, %rdi movq %rax, %rbp call malloc@PLT leaq .LC2(%rip), %rsi movl $2, %edi movq %rbp, %r15 movq %rax, %rbx xorl %eax, %eax call __printf_chk@PLT .L9: movl (%rsp), %esi imull 4(%rsp), %esi cmpl %r14d, %esi jle .L21 movq %r15, %rsi movq %r13, %rdi xorl %eax, %eax incl %r14d call __isoc23_scanf@PLT addq $4, %r15 jmp .L9 .L21: movslq %esi, %rsi leaq 8(%rsp), %rdi salq $2, %rsi call cudaMalloc@PLT movl (%rsp), %esi imull 4(%rsp), %esi leaq 16(%rsp), %rdi movslq %esi, %rsi salq $2, %rsi call cudaMalloc@PLT leaq 24(%rsp), %rdi movl $4, %esi call cudaMalloc@PLT movl (%rsp), %edx imull 4(%rsp), %edx movq %rbp, %rsi movq 8(%rsp), %rdi movl $1, %ecx movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT movl (%rsp), %edx imull 4(%rsp), %edx movq %rbx, %rsi movq 16(%rsp), %rdi movl $1, %ecx movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT movq 24(%rsp), %rdi movl $1, %ecx movq %r12, %rsi movl $4, %edx call cudaMemcpy@PLT movl 4(%rsp), %eax xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rdi movl $1, %esi movq %rdi, 48(%rsp) movl 52(%rsp), %ecx movl %eax, 44(%rsp) movq 44(%rsp), %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L11 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movq 8(%rsp), %rdi call _Z25__device_stub__Z2q1PiS_S_PiS_S_ .L11: call cudaGetLastError@PLT movl %eax, %edi testl %eax, %eax je .L12 call cudaGetErrorString@PLT leaq .LC4(%rip), %rsi movl $2, %edi movq %rax, %rdx xorl %eax, %eax call __printf_chk@PLT .L12: movl (%rsp), %edx imull 4(%rsp), %edx movl $2, %ecx movq %rbx, %rdi movq 16(%rsp), %rsi xorl %ebp, %ebp leaq .LC6(%rip), %r12 movslq %edx, %rdx salq $2, %rdx call cudaMemcpy@PLT leaq .LC5(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L13: movl (%rsp), %eax imull 4(%rsp), %eax cmpl %ebp, %eax jle .L22 movl (%rbx,%rbp,4), %edx movq %r12, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT leal 1(%rbp), %eax cltd idivl (%rsp) testl %edx, %edx jne .L14 leaq .LC7(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L14: incq %rbp jmp .L13 .L22: movq 56(%rsp), %rax subq %fs:40, %rax je .L16 call __stack_chk_fail@PLT .L16: addq $72, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC8: .string "_Z2q1PiS_S_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC8(%rip), %rdx movq %rax, %rdi leaq _Z2q1PiS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z2q1PiS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ MOV R2, c[0x0][0x170] ; /* 0x00005c0000027a02 */ /* 0x000fe20000000f00 */ /*0020*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0030*/ MOV R3, c[0x0][0x174] ; /* 0x00005d0000037a02 */ /* 0x000fca0000000f00 */ /*0040*/ LDG.E R4, [R2.64] ; /* 0x0000000602047981 */ /* 0x000ea4000c1e1900 */ /*0050*/ ISETP.GE.AND P0, PT, R4, 0x1, PT ; /* 0x000000010400780c */ /* 0x004fda0003f06270 */ /*0060*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0070*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0080*/ MOV R7, R4 ; /* 0x0000000400077202 */ /* 0x000fe20000000f00 */ /*0090*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*00a0*/ IADD3 R5, R0, -0x1, RZ ; /* 0xffffffff00057810 */ /* 0x001fc80007ffe0ff */ /*00b0*/ ISETP.GE.U32.AND P0, PT, R5, 0x3, PT ; /* 0x000000030500780c */ /* 0x000fe40003f06070 */ /*00c0*/ LOP3.LUT R5, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300057812 */ /* 0x000fc800078ec0ff */ /*00d0*/ IADD3 R4, -R5, R0, RZ ; /* 0x0000000005047210 */ /* 0x000fe40007ffe1ff */ /*00e0*/ MOV R6, 0x4 ; /* 0x0000000400067802 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD R7, R0, R7, UR4 ; /* 0x0000000400077e24 */ /* 0x000fc8000f8e0207 */ /*0100*/ IMAD.WIDE R8, R7, R6, c[0x0][0x160] ; /* 0x0000580007087625 */ /* 0x000fcc00078e0206 */ /*0110*/ LDG.E R9, [R8.64] ; /* 0x0000000608097981 */ /* 0x000ea2000c1e1900 */ /*0120*/ IMAD.WIDE R10, R7, R6, c[0x0][0x168] ; /* 0x00005a00070a7625 */ /* 0x000fe200078e0206 */ /*0130*/ ISETP.GE.AND P1, PT, R0, 0x1, PT ; /* 0x000000010000780c */ /* 0x000fe20003f26270 */ /*0140*/ BSSY B0, 0x5c0 ; /* 0x0000047000007945 */ /* 0x000fe60003800000 */ /*0150*/ STG.E [R10.64], R9 ; /* 0x000000090a007986 */ /* 0x0041f2000c101906 */ /*0160*/ @!P1 BRA 0x5b0 ; /* 0x0000044000009947 */ /* 0x000fea0003800000 */ /*0170*/ BSSY B1, 0x3f0 ; /* 0x0000027000017945 */ /* 0x000fe20003800000 */ /*0180*/ ISETP.NE.AND P2, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fe20003f45270 */ /*0190*/ @!P0 BRA 0x3e0 ; /* 0x0000024000008947 */ /* 0x000fee0003800000 */ /*01a0*/ MOV R7, R4 ; /* 0x0000000400077202 */ /* 0x000fca0000000f00 */ /*01b0*/ LDG.E R9, [R2.64] ; /* 0x0000000602097981 */ /* 0x001ea4000c1e1900 */ /*01c0*/ IMAD R11, R9, R0, UR4 ; /* 0x00000004090b7e24 */ /* 0x004fc8000f8e0200 */ /*01d0*/ IMAD.WIDE R8, R11, R6, c[0x0][0x160] ; /* 0x000058000b087625 */ /* 0x000fc800078e0206 */ /*01e0*/ IMAD.WIDE R10, R11, R6, c[0x0][0x168] ; /* 0x00005a000b0a7625 */ /* 0x000fe400078e0206 */ /*01f0*/ LDG.E R9, [R8.64] ; /* 0x0000000608097981 */ /* 0x000ea8000c1e1900 */ /*0200*/ LDG.E R12, [R10.64] ; /* 0x000000060a0c7981 */ /* 0x000ea4000c1e1900 */ /*0210*/ IMAD R17, R12, R9, RZ ; /* 0x000000090c117224 */ /* 0x004fca00078e02ff */ /*0220*/ STG.E [R10.64], R17 ; /* 0x000000110a007986 */ /* 0x0001e8000c101906 */ /*0230*/ LDG.E R13, [R2.64] ; /* 0x00000006020d7981 */ /* 0x000ea4000c1e1900 */ /*0240*/ IMAD R15, R13, R0, UR4 ; /* 0x000000040d0f7e24 */ /* 0x004fc8000f8e0200 */ /*0250*/ IMAD.WIDE R12, R15, R6, c[0x0][0x160] ; /* 0x000058000f0c7625 */ /* 0x000fc800078e0206 */ /*0260*/ IMAD.WIDE R14, R15, R6, c[0x0][0x168] ; /* 0x00005a000f0e7625 */ /* 0x000fe400078e0206 */ /*0270*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000ea8000c1e1900 */ /*0280*/ LDG.E R16, [R14.64] ; /* 0x000000060e107981 */ /* 0x000ea4000c1e1900 */ /*0290*/ IMAD R19, R16, R13, RZ ; /* 0x0000000d10137224 */ /* 0x004fca00078e02ff */ /*02a0*/ STG.E [R14.64], R19 ; /* 0x000000130e007986 */ /* 0x0003e8000c101906 */ /*02b0*/ LDG.E R9, [R2.64] ; /* 0x0000000602097981 */ /* 0x000ea4000c1e1900 */ /*02c0*/ IMAD R21, R9, R0, UR4 ; /* 0x0000000409157e24 */ /* 0x004fc8000f8e0200 */ /*02d0*/ IMAD.WIDE R8, R21, R6, c[0x0][0x160] ; /* 0x0000580015087625 */ /* 0x000fc800078e0206 */ /*02e0*/ IMAD.WIDE R10, R21, R6, c[0x0][0x168] ; /* 0x00005a00150a7625 */ /* 0x001fe400078e0206 */ /*02f0*/ LDG.E R9, [R8.64] ; /* 0x0000000608097981 */ /* 0x000ea8000c1e1900 */ /*0300*/ LDG.E R16, [R10.64] ; /* 0x000000060a107981 */ /* 0x000ea4000c1e1900 */ /*0310*/ IMAD R17, R16, R9, RZ ; /* 0x0000000910117224 */ /* 0x004fca00078e02ff */ /*0320*/ STG.E [R10.64], R17 ; /* 0x000000110a007986 */ /* 0x0001e8000c101906 */ /*0330*/ LDG.E R13, [R2.64] ; /* 0x00000006020d7981 */ /* 0x000ea4000c1e1900 */ /*0340*/ IMAD R21, R13, R0, UR4 ; /* 0x000000040d157e24 */ /* 0x004fc8000f8e0200 */ /*0350*/ IMAD.WIDE R12, R21, R6, c[0x0][0x160] ; /* 0x00005800150c7625 */ /* 0x000fc800078e0206 */ /*0360*/ IMAD.WIDE R14, R21, R6, c[0x0][0x168] ; /* 0x00005a00150e7625 */ /* 0x002fe400078e0206 */ /*0370*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000ea8000c1e1900 */ /*0380*/ LDG.E R16, [R14.64] ; /* 0x000000060e107981 */ /* 0x000ea2000c1e1900 */ /*0390*/ IADD3 R7, R7, -0x4, RZ ; /* 0xfffffffc07077810 */ /* 0x000fc80007ffe0ff */ /*03a0*/ ISETP.NE.AND P1, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe20003f25270 */ /*03b0*/ IMAD R19, R16, R13, RZ ; /* 0x0000000d10137224 */ /* 0x004fca00078e02ff */ /*03c0*/ STG.E [R14.64], R19 ; /* 0x000000130e007986 */ /* 0x0001ee000c101906 */ /*03d0*/ @P1 BRA 0x1b0 ; /* 0xfffffdd000001947 */ /* 0x000fea000383ffff */ /*03e0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*03f0*/ @!P2 BRA 0x5b0 ; /* 0x000001b00000a947 */ /* 0x000fea0003800000 */ /*0400*/ LDG.E R7, [R2.64] ; /* 0x0000000602077981 */ /* 0x000ea4000c1e1900 */ /*0410*/ IMAD R7, R7, R0, UR4 ; /* 0x0000000407077e24 */ /* 0x004fc8000f8e0200 */ /*0420*/ IMAD.WIDE R8, R7, R6, c[0x0][0x160] ; /* 0x0000580007087625 */ /* 0x001fc800078e0206 */ /*0430*/ IMAD.WIDE R10, R7, R6, c[0x0][0x168] ; /* 0x00005a00070a7625 */ /* 0x000fe400078e0206 */ /*0440*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */ /* 0x000ea8000c1e1900 */ /*0450*/ LDG.E R7, [R10.64] ; /* 0x000000060a077981 */ /* 0x000ea2000c1e1900 */ /*0460*/ ISETP.NE.AND P1, PT, R5, 0x1, PT ; /* 0x000000010500780c */ /* 0x000fe20003f25270 */ /*0470*/ IMAD R7, R7, R8, RZ ; /* 0x0000000807077224 */ /* 0x004fca00078e02ff */ /*0480*/ STG.E [R10.64], R7 ; /* 0x000000070a007986 */ /* 0x0001ee000c101906 */ /*0490*/ @!P1 BRA 0x5b0 ; /* 0x0000011000009947 */ /* 0x000fea0003800000 */ /*04a0*/ LDG.E R7, [R2.64] ; /* 0x0000000602077981 */ /* 0x001ea4000c1e1900 */ /*04b0*/ IMAD R7, R7, R0, UR4 ; /* 0x0000000407077e24 */ /* 0x004fc8000f8e0200 */ /*04c0*/ IMAD.WIDE R8, R7, R6, c[0x0][0x160] ; /* 0x0000580007087625 */ /* 0x000fc800078e0206 */ /*04d0*/ IMAD.WIDE R10, R7, R6, c[0x0][0x168] ; /* 0x00005a00070a7625 */ /* 0x000fe400078e0206 */ /*04e0*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */ /* 0x000ea8000c1e1900 */ /*04f0*/ LDG.E R7, [R10.64] ; /* 0x000000060a077981 */ /* 0x000ea2000c1e1900 */ /*0500*/ ISETP.NE.AND P1, PT, R5, 0x2, PT ; /* 0x000000020500780c */ /* 0x000fe20003f25270 */ /*0510*/ IMAD R15, R7, R8, RZ ; /* 0x00000008070f7224 */ /* 0x004fca00078e02ff */ /*0520*/ STG.E [R10.64], R15 ; /* 0x0000000f0a007986 */ /* 0x0001ee000c101906 */ /*0530*/ @P1 LDG.E R7, [R2.64] ; /* 0x0000000602071981 */ /* 0x000ea4000c1e1900 */ /*0540*/ @P1 IMAD R7, R7, R0, UR4 ; /* 0x0000000407071e24 */ /* 0x004fc8000f8e0200 */ /*0550*/ @P1 IMAD.WIDE R12, R7, R6, c[0x0][0x160] ; /* 0x00005800070c1625 */ /* 0x000fc800078e0206 */ /*0560*/ @P1 IMAD.WIDE R6, R7, R6, c[0x0][0x168] ; /* 0x00005a0007061625 */ /* 0x000fe400078e0206 */ /*0570*/ @P1 LDG.E R13, [R12.64] ; /* 0x000000060c0d1981 */ /* 0x000ea8000c1e1900 */ /*0580*/ @P1 LDG.E R14, [R6.64] ; /* 0x00000006060e1981 */ /* 0x000ea4000c1e1900 */ /*0590*/ @P1 IMAD R9, R14, R13, RZ ; /* 0x0000000d0e091224 */ /* 0x004fca00078e02ff */ /*05a0*/ @P1 STG.E [R6.64], R9 ; /* 0x0000000906001986 */ /* 0x0001e4000c101906 */ /*05b0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*05c0*/ LDG.E R7, [R2.64] ; /* 0x0000000602077981 */ /* 0x001ea2000c1e1900 */ /*05d0*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fcc000fffe03f */ /*05e0*/ ISETP.LE.AND P1, PT, R7, UR4, PT ; /* 0x0000000407007c0c */ /* 0x004fda000bf23270 */ /*05f0*/ @!P1 BRA 0xe0 ; /* 0xfffffae000009947 */ /* 0x000fea000383ffff */ /*0600*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0610*/ BRA 0x610; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0620*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0630*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0640*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0650*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0660*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0670*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0680*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0690*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include<hip/hip_runtime.h> #include<stdio.h> #include<stdlib.h> #include<string.h> __global__ void q1(int* d_a,int* d_r,int *d_m) { int n = threadIdx.x; for(int i = 0;i<(*d_m);i++) { d_r[n*(*d_m)+i] = d_a[n*(*d_m)+i]; for(int j = 0;j<n;j++) d_r[n*(*d_m)+i] *= d_a[n*(*d_m)+i]; } } int main(void) { int *a,*r,m,n,i; int *d_a,*d_r,*d_m; printf("Enter m,n : "); scanf("%d %d",&m,&n); a = (int*)malloc(m*n*sizeof(int)); r = (int*)malloc(m*n*sizeof(int)); printf("Enter matrix:\n"); for(i=0;i<m*n;i++) { scanf("%d",&a[i]); } hipMalloc((void **)&d_a,(m*n)*sizeof(int)); hipMalloc((void **)&d_r,(m*n)*sizeof(int)); hipMalloc((void **)&d_m,sizeof(int)); hipMemcpy(d_a,a,(m*n)*sizeof(int),hipMemcpyHostToDevice); hipMemcpy(d_r,r,(m*n)*sizeof(int),hipMemcpyHostToDevice); hipMemcpy(d_m,&m,sizeof(int),hipMemcpyHostToDevice); q1<<<1,n>>>(d_a,d_r,d_m); hipError_t error = hipGetLastError(); if(error!= hipSuccess) { printf("%s\n",hipGetErrorString(error)); } hipMemcpy(r,d_r,(m*n)*sizeof(int),hipMemcpyDeviceToHost); printf("Result matrix :\n"); for(i=0;i<m*n;i++) { printf("%d\t",r[i]); if((i+1)%m==0) printf("\n"); } }
.text .file "q1.hip" .globl _Z17__device_stub__q1PiS_S_ # -- Begin function _Z17__device_stub__q1PiS_S_ .type _Z17__device_stub__q1PiS_S_,@function _Z17__device_stub__q1PiS_S_: # @_Z17__device_stub__q1PiS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z2q1PiS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z17__device_stub__q1PiS_S_, .Lfunc_end0-_Z17__device_stub__q1PiS_S_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $40, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $.L.str, %edi xorl %eax, %eax callq printf leaq 12(%rsp), %r15 leaq 8(%rsp), %r12 movl $.L.str.1, %edi movq %r15, %rsi movq %r12, %rdx xorl %eax, %eax callq __isoc23_scanf movslq (%r15), %rax movslq (%r12), %rbx imulq %rax, %rbx shlq $2, %rbx movq %rbx, %rdi callq malloc movq %rax, %r14 movq %rbx, %rdi callq malloc movq %rax, %rbx movl $.Lstr, %edi callq puts@PLT movslq (%r15), %rax movslq (%r12), %rsi imulq %rax, %rsi testl %esi, %esi jle .LBB1_3 # %bb.1: # %.lr.ph.preheader movq %r14, %r15 xorl %r12d, %r12d .LBB1_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl $.L.str.3, %edi movq %r15, %rsi xorl %eax, %eax callq __isoc23_scanf incq %r12 movslq 12(%rsp), %rax movslq 8(%rsp), %rsi imulq %rax, %rsi addq $4, %r15 cmpq %rsi, %r12 jl .LBB1_2 .LBB1_3: # %._crit_edge shlq $2, %rsi leaq 32(%rsp), %r13 movq %r13, %rdi callq hipMalloc leaq 12(%rsp), %r15 movslq (%r15), %rax movslq 8(%rsp), %rsi imulq %rax, %rsi shlq $2, %rsi leaq 16(%rsp), %rbp movq %rbp, %rdi callq hipMalloc leaq 24(%rsp), %r12 movl $4, %esi movq %r12, %rdi callq hipMalloc movq (%r13), %rdi movslq (%r15), %rax movslq 8(%rsp), %rdx imulq %rax, %rdx shlq $2, %rdx movq %r14, %rsi movl $1, %ecx callq hipMemcpy movq (%rbp), %rdi movslq (%r15), %rax movslq 8(%rsp), %rdx imulq %rax, %rdx shlq $2, %rdx movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movq (%r12), %rdi movl $4, %edx movq %r15, %rsi movl $1, %ecx callq hipMemcpy movl 8(%rsp), %edx btsq $32, %rdx movabsq $4294967296, %rdi # imm = 0x100000000 orq $1, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_5 # %bb.4: movq 32(%rsp), %rdi movq 16(%rsp), %rsi movq 24(%rsp), %rdx callq _Z17__device_stub__q1PiS_S_ .LBB1_5: callq hipGetLastError testl %eax, %eax je .LBB1_7 # %bb.6: movl %eax, %edi callq hipGetErrorString movq %rax, %rdi callq puts@PLT .LBB1_7: movq 16(%rsp), %rsi movslq 12(%rsp), %rax movslq 8(%rsp), %rdx imulq %rax, %rdx shlq $2, %rdx movq %rbx, %rdi movl $2, %ecx callq hipMemcpy movl $.Lstr.1, %edi callq puts@PLT movl 8(%rsp), %eax imull 12(%rsp), %eax testl %eax, %eax jle .LBB1_12 # %bb.8: # %.lr.ph27.preheader xorl %r14d, %r14d .LBB1_9: # %.lr.ph27 # =>This Inner Loop Header: Depth=1 movl (%rbx,%r14,4), %esi movl $.L.str.6, %edi xorl %eax, %eax callq printf incq %r14 movl 12(%rsp), %ecx movl %r14d, %eax cltd idivl %ecx testl %edx, %edx jne .LBB1_11 # %bb.10: # in Loop: Header=BB1_9 Depth=1 movl $10, %edi callq putchar@PLT movl 12(%rsp), %ecx .LBB1_11: # in Loop: Header=BB1_9 Depth=1 movslq 8(%rsp), %rax movslq %ecx, %rcx imulq %rax, %rcx cmpq %rcx, %r14 jl .LBB1_9 .LBB1_12: # %._crit_edge28 xorl %eax, %eax addq $40, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z2q1PiS_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z2q1PiS_S_,@object # @_Z2q1PiS_S_ .section .rodata,"a",@progbits .globl _Z2q1PiS_S_ .p2align 3, 0x0 _Z2q1PiS_S_: .quad _Z17__device_stub__q1PiS_S_ .size _Z2q1PiS_S_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Enter m,n : " .size .L.str, 13 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "%d %d" .size .L.str.1, 6 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "%d" .size .L.str.3, 3 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "%d\t" .size .L.str.6, 4 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z2q1PiS_S_" .size .L__unnamed_1, 12 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "Enter matrix:" .size .Lstr, 14 .type .Lstr.1,@object # @str.1 .Lstr.1: .asciz "Result matrix :" .size .Lstr.1, 16 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z17__device_stub__q1PiS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z2q1PiS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z2q1PiS_S_ ; -- Begin function _Z2q1PiS_S_ .globl _Z2q1PiS_S_ .p2align 8 .type _Z2q1PiS_S_,@function _Z2q1PiS_S_: ; @_Z2q1PiS_S_ ; %bb.0: s_load_b64 s[2:3], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_load_b32 s8, s[2:3], 0x0 s_waitcnt lgkmcnt(0) s_cmp_lt_i32 s8, 1 s_cbranch_scc1 .LBB0_6 ; %bb.1: ; %.lr.ph30 s_load_b128 s[4:7], s[0:1], 0x0 v_cmp_ne_u32_e64 s0, 0, v0 v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v1, 0 s_mov_b32 s8, 0 .LBB0_2: ; =>This Loop Header: Depth=1 ; Child Loop BB0_4 Depth 2 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[3:4], null, v2, v0, s[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[2:3], 2, v[3:4] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, s4, v2 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo v_add_co_u32 v2, vcc_lo, s6, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo global_load_b32 v4, v[4:5], off s_waitcnt vmcnt(0) global_store_b32 v[2:3], v4, off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_5 ; %bb.3: ; %.lr.ph.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v2, v0 s_mov_b32 s9, 0 .LBB0_4: ; %.lr.ph ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b32 v5, v1, s[2:3] v_add_nc_u32_e32 v2, -1, v2 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v5, v0, s[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[3:4], 2, v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, s4, v3 v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo v_add_co_u32 v3, vcc_lo, s6, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v2 global_load_b32 v5, v[5:6], off global_load_b32 v6, v[3:4], off s_or_b32 s9, vcc_lo, s9 s_waitcnt vmcnt(0) v_mul_lo_u32 v5, v6, v5 global_store_b32 v[3:4], v5, off s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_4 .LBB0_5: ; %Flow40 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s1 global_load_b32 v2, v1, s[2:3] s_add_i32 s8, s8, 1 s_waitcnt vmcnt(0) v_cmp_ge_i32_e32 vcc_lo, s8, v2 s_cbranch_vccz .LBB0_2 .LBB0_6: ; %._crit_edge31 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z2q1PiS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 24 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 10 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z2q1PiS_S_, .Lfunc_end0-_Z2q1PiS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 316 ; NumSgprs: 12 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 1 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 12 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 24 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z2q1PiS_S_ .private_segment_fixed_size: 0 .sgpr_count: 12 .sgpr_spill_count: 0 .symbol: _Z2q1PiS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
5f6722cb97d174499d3dcce26e5efd64aef7edbb
#include "includes.h" __global__ void calculateDelaysAndPhases(double * gpuDelays, double lo, double sampletime, int fftsamples, int fftchannels, int samplegranularity, float * rotationPhaseInfo, int *sampleShifts, float* fractionalSampleDelays) { size_t ifft = threadIdx.x + blockIdx.x * blockDim.x; size_t iant = blockIdx.y; int numffts = blockDim.x * gridDim.x; double meandelay, deltadelay, netdelaysamples_f, startphase; double d0, d1, d2, a, b; double * interpolator = &(gpuDelays[iant*4]); double filestartoffset = gpuDelays[iant*4+3]; float fractionaldelay; int netdelaysamples; // evaluate the delay for the given FFT of the given antenna // calculate values at the beginning, middle, and end of this FFT d0 = interpolator[0]*ifft*ifft + interpolator[1]*ifft + interpolator[2]; d1 = interpolator[0]*(ifft+0.5)*(ifft+0.5) + interpolator[1]*(ifft+0.5) + interpolator[2]; d2 = interpolator[0]*(ifft+1.0)*(ifft+1.0) + interpolator[1]*(ifft+1.0) + interpolator[2]; // use these to calculate a linear interpolator across the FFT, as well as a mean value a = d2-d0; //this is the delay gradient across this FFT b = d0 + (d1 - (a*0.5 + d0))/3.0; //this is the delay at the start of the FFT meandelay = a*0.5 + b; //this is the delay in the middle of the FFT deltadelay = a / fftsamples; // this is the change in delay per sample across this FFT window netdelaysamples_f = (meandelay - filestartoffset) / sampletime; netdelaysamples = __double2int_rn(netdelaysamples_f/samplegranularity) * samplegranularity; // Save the integer number of sample shifts sampleShifts[iant*numffts + ifft] = netdelaysamples; // Save the fractional delay fractionaldelay = (float)(-(netdelaysamples_f - netdelaysamples)*2*M_PI/fftsamples); // radians per FFT channel fractionalSampleDelays[iant*numffts + ifft] = fractionaldelay; // set the fringe rotation phase for the first sample of a given FFT of a given antenna startphase = b*lo; rotationPhaseInfo[iant*numffts*2 + ifft*2] = (float)(startphase - int(startphase))*2*M_PI; rotationPhaseInfo[iant*numffts*2 + ifft*2 + 1] = (float)(deltadelay * lo)*2*M_PI; }
.file "tmpxft_002e3c61_00000000-6_calculateDelaysAndPhases.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z56__device_stub__Z24calculateDelaysAndPhasesPdddiiiPfPiS0_PdddiiiPfPiS0_ .type _Z56__device_stub__Z24calculateDelaysAndPhasesPdddiiiPfPiS0_PdddiiiPfPiS0_, @function _Z56__device_stub__Z24calculateDelaysAndPhasesPdddiiiPfPiS0_PdddiiiPfPiS0_: .LFB2032: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq 224(%rsp), %rax movq %rdi, 56(%rsp) leaq 80(%rsp), %rdi movl %esi, 36(%rsp) leaq 92(%rsp), %rsi movl %edx, 32(%rsp) leaq 64(%rsp), %rdx movl %ecx, 28(%rsp) leaq 72(%rsp), %rcx movq %r8, 16(%rsp) movq %r9, 8(%rsp) movq %rax, (%rsp) movsd %xmm0, 48(%rsp) movsd %xmm1, 40(%rsp) movq %fs:40, %rax movq %rax, 200(%rsp) xorl %eax, %eax leaq 56(%rsp), %rax movl $1, 88(%rsp) movq %rax, 128(%rsp) leaq 48(%rsp), %rax movq %rax, 136(%rsp) leaq 40(%rsp), %rax movq %rax, 144(%rsp) leaq 36(%rsp), %rax movq %rax, 152(%rsp) leaq 32(%rsp), %rax movq %rax, 160(%rsp) leaq 28(%rsp), %rax movq %rax, 168(%rsp) leaq 16(%rsp), %rax movq %rax, 176(%rsp) leaq 8(%rsp), %rax movq %rax, 184(%rsp) movq %rsp, %rax movq %rax, 192(%rsp) movabsq $4294967297, %rax movq %rax, 80(%rsp) movq %rax, 92(%rsp) movl $1, 100(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 72(%rsp) .cfi_def_cfa_offset 232 leaq _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_(%rip), %rdi pushq 72(%rsp) .cfi_def_cfa_offset 240 movq 108(%rsp), %rcx movl 116(%rsp), %r8d movq 96(%rsp), %rsi movl 104(%rsp), %edx leaq 144(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 232 popq %rdx .cfi_def_cfa_offset 224 .L2: movq 200(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z56__device_stub__Z24calculateDelaysAndPhasesPdddiiiPfPiS0_PdddiiiPfPiS0_, .-_Z56__device_stub__Z24calculateDelaysAndPhasesPdddiiiPfPiS0_PdddiiiPfPiS0_ .globl _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .type _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_, @function _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_: .LFB2033: .cfi_startproc endbr64 jmp _Z56__device_stub__Z24calculateDelaysAndPhasesPdddiiiPfPiS0_PdddiiiPfPiS0_ .cfi_endproc .LFE2033: .size _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_, .-_Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z24calculateDelaysAndPhasesPdddiiiPfPiS0_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */ /* 0x000e220000002600 */ /*0020*/ IMAD.MOV.U32 R7, RZ, RZ, 0x20 ; /* 0x00000020ff077424 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fc60000000a00 */ /*0040*/ IMAD.WIDE.U32 R6, R4, R7, c[0x0][0x160] ; /* 0x0000580004067625 */ /* 0x001fca00078e0007 */ /*0050*/ LDG.E.64 R12, [R6.64] ; /* 0x00000006060c7981 */ /* 0x0000a8000c1e1b00 */ /*0060*/ LDG.E.64 R10, [R6.64+0x8] ; /* 0x00000806060a7981 */ /* 0x0000e8000c1e1b00 */ /*0070*/ LDG.E.64 R2, [R6.64+0x10] ; /* 0x0000100606027981 */ /* 0x000128000c1e1b00 */ /*0080*/ S2R R24, SR_TID.X ; /* 0x0000000000187919 */ /* 0x000e680000002100 */ /*0090*/ S2R R25, SR_CTAID.X ; /* 0x0000000000197919 */ /* 0x000e620000002500 */ /*00a0*/ MUFU.RCP64H R23, 3 ; /* 0x4008000000177908 */ /* 0x000e220000001800 */ /*00b0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x0 ; /* 0x00000000ff087424 */ /* 0x000fc400078e00ff */ /*00c0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x40080000 ; /* 0x40080000ff097424 */ /* 0x000fe200078e00ff */ /*00d0*/ LDG.E.64 R26, [R6.64+0x18] ; /* 0x00001806061a7981 */ /* 0x000162000c1e1b00 */ /*00e0*/ IMAD.MOV.U32 R22, RZ, RZ, 0x1 ; /* 0x00000001ff167424 */ /* 0x000fe200078e00ff */ /*00f0*/ BSSY B0, 0x360 ; /* 0x0000026000007945 */ /* 0x000fea0003800000 */ /*0100*/ DFMA R16, R22, -R8, 1 ; /* 0x3ff000001610742b */ /* 0x001e0c0000000808 */ /*0110*/ DFMA R28, R16, R16, R16 ; /* 0x00000010101c722b */ /* 0x001e220000000010 */ /*0120*/ IMAD R24, R25, c[0x0][0x0], R24 ; /* 0x0000000019187a24 */ /* 0x002fc800078e0218 */ /*0130*/ I2F.F64.U32 R14, R24 ; /* 0x00000018000e7312 */ /* 0x000e620000201800 */ /*0140*/ DFMA R6, R22, R28, R22 ; /* 0x0000001c1606722b */ /* 0x001e0c0000000016 */ /*0150*/ DFMA R8, R6, -R8, 1 ; /* 0x3ff000000608742b */ /* 0x001e0c0000000808 */ /*0160*/ DFMA R6, R6, R8, R6 ; /* 0x000000080606722b */ /* 0x001fc80000000006 */ /*0170*/ DADD R20, R14, 1 ; /* 0x3ff000000e147429 */ /* 0x002e080000000000 */ /*0180*/ DMUL R16, R12, R14 ; /* 0x0000000e0c107228 */ /* 0x004fc80000000000 */ /*0190*/ DMUL R18, R14, R10 ; /* 0x0000000a0e127228 */ /* 0x008e480000000000 */ /*01a0*/ DMUL R22, R10, R20 ; /* 0x000000140a167228 */ /* 0x001fc80000000000 */ /*01b0*/ DFMA R18, R14, R16, R18 ; /* 0x000000100e12722b */ /* 0x002fc80000000012 */ /*01c0*/ DMUL R16, R12, R20 ; /* 0x000000140c107228 */ /* 0x000e080000000000 */ /*01d0*/ DADD R14, R14, 0.5 ; /* 0x3fe000000e0e7429 */ /* 0x000e480000000000 */ /*01e0*/ DFMA R16, R20, R16, R22 ; /* 0x000000101410722b */ /* 0x001e080000000016 */ /*01f0*/ DMUL R12, R12, R14 ; /* 0x0000000e0c0c7228 */ /* 0x002fc80000000000 */ /*0200*/ DMUL R10, R10, R14 ; /* 0x0000000e0a0a7228 */ /* 0x000e480000000000 */ /*0210*/ DADD R18, R18, R2 ; /* 0x0000000012127229 */ /* 0x010fc80000000002 */ /*0220*/ DADD R16, R2, R16 ; /* 0x0000000002107229 */ /* 0x001e080000000010 */ /*0230*/ DFMA R10, R14, R12, R10 ; /* 0x0000000c0e0a722b */ /* 0x002e48000000000a */ /*0240*/ DADD R22, -R18, R16 ; /* 0x0000000012167229 */ /* 0x001e080000000110 */ /*0250*/ DADD R10, R2, R10 ; /* 0x00000000020a7229 */ /* 0x002fc8000000000a */ /*0260*/ DFMA R2, R22, 0.5, R18 ; /* 0x3fe000001602782b */ /* 0x001e0c0000000012 */ /*0270*/ DADD R10, R10, -R2 ; /* 0x000000000a0a7229 */ /* 0x001e0c0000000802 */ /*0280*/ DMUL R2, R10, R6 ; /* 0x000000060a027228 */ /* 0x001e080000000000 */ /*0290*/ FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT ; /* 0x036000000b00780b */ /* 0x000fe40003f2e200 */ /*02a0*/ DFMA R8, R2, -3, R10 ; /* 0xc00800000208782b */ /* 0x001e0c000000000a */ /*02b0*/ DFMA R6, R6, R8, R2 ; /* 0x000000080606722b */ /* 0x001e140000000002 */ /*02c0*/ FFMA R0, RZ, 2.125, R7 ; /* 0x40080000ff007823 */ /* 0x001fca0000000007 */ /*02d0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*02e0*/ @P0 BRA P1, 0x350 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*02f0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e00ff */ /*0300*/ MOV R0, 0x330 ; /* 0x0000033000007802 */ /* 0x000fe20000000f00 */ /*0310*/ IMAD.MOV.U32 R13, RZ, RZ, 0x40080000 ; /* 0x40080000ff0d7424 */ /* 0x000fe400078e00ff */ /*0320*/ CALL.REL.NOINC 0xc40 ; /* 0x0000091000007944 */ /* 0x020fea0003c00000 */ /*0330*/ IMAD.MOV.U32 R6, RZ, RZ, R28 ; /* 0x000000ffff067224 */ /* 0x000fe400078e001c */ /*0340*/ IMAD.MOV.U32 R7, RZ, RZ, R29 ; /* 0x000000ffff077224 */ /* 0x000fe400078e001d */ /*0350*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0360*/ I2F.F64 R20, c[0x0][0x178] ; /* 0x00005e0000147b12 */ /* 0x000e220000201c00 */ /*0370*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */ /* 0x000fe200078e00ff */ /*0380*/ FSETP.GEU.AND P1, PT, |R23|, 6.5827683646048100446e-37, PT ; /* 0x036000001700780b */ /* 0x000fe20003f2e200 */ /*0390*/ DADD R18, R18, R6 ; /* 0x0000000012127229 */ /* 0x000ea20000000006 */ /*03a0*/ BSSY B0, 0x510 ; /* 0x0000016000007945 */ /* 0x000fea0003800000 */ /*03b0*/ DFMA R16, R22, 0.5, R18 ; /* 0x3fe000001610782b */ /* 0x004fe20000000012 */ /*03c0*/ MUFU.RCP64H R3, R21 ; /* 0x0000001500037308 */ /* 0x001e260000001800 */ /*03d0*/ DFMA R8, -R20, R2, 1 ; /* 0x3ff000001408742b */ /* 0x001e0c0000000102 */ /*03e0*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */ /* 0x001e0c0000000008 */ /*03f0*/ DFMA R8, R2, R8, R2 ; /* 0x000000080208722b */ /* 0x001e0c0000000002 */ /*0400*/ DFMA R2, -R20, R8, 1 ; /* 0x3ff000001402742b */ /* 0x001e0c0000000108 */ /*0410*/ DFMA R2, R8, R2, R8 ; /* 0x000000020802722b */ /* 0x001e0c0000000008 */ /*0420*/ DMUL R8, R22, R2 ; /* 0x0000000216087228 */ /* 0x001e0c0000000000 */ /*0430*/ DFMA R10, -R20, R8, R22 ; /* 0x00000008140a722b */ /* 0x001e0c0000000116 */ /*0440*/ DFMA R2, R2, R10, R8 ; /* 0x0000000a0202722b */ /* 0x001e140000000008 */ /*0450*/ FFMA R0, RZ, R21, R3 ; /* 0x00000015ff007223 */ /* 0x001fca0000000003 */ /*0460*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0470*/ @P0 BRA P1, 0x500 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*0480*/ IMAD.MOV.U32 R10, RZ, RZ, R22 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0016 */ /*0490*/ MOV R11, R23 ; /* 0x00000017000b7202 */ /* 0x000fe20000000f00 */ /*04a0*/ IMAD.MOV.U32 R12, RZ, RZ, R20 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0014 */ /*04b0*/ MOV R0, 0x4e0 ; /* 0x000004e000007802 */ /* 0x000fe20000000f00 */ /*04c0*/ IMAD.MOV.U32 R13, RZ, RZ, R21 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e0015 */ /*04d0*/ CALL.REL.NOINC 0xc40 ; /* 0x0000076000007944 */ /* 0x022fea0003c00000 */ /*04e0*/ IMAD.MOV.U32 R2, RZ, RZ, R28 ; /* 0x000000ffff027224 */ /* 0x000fe400078e001c */ /*04f0*/ IMAD.MOV.U32 R3, RZ, RZ, R29 ; /* 0x000000ffff037224 */ /* 0x000fe400078e001d */ /*0500*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0510*/ MUFU.RCP64H R7, c[0x0][0x174] ; /* 0x00005d0000077b08 */ /* 0x000e220000001800 */ /*0520*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff0a7624 */ /* 0x000fe200078e00ff */ /*0530*/ BSSY B0, 0x6a0 ; /* 0x0000016000007945 */ /* 0x000fe20003800000 */ /*0540*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff0b7624 */ /* 0x000fe400078e00ff */ /*0550*/ IMAD.MOV.U32 R6, RZ, RZ, 0x1 ; /* 0x00000001ff067424 */ /* 0x000fcc00078e00ff */ /*0560*/ DFMA R8, R6, -R10, 1 ; /* 0x3ff000000608742b */ /* 0x001e0c000000080a */ /*0570*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */ /* 0x001e0c0000000008 */ /*0580*/ DFMA R8, R6, R8, R6 ; /* 0x000000080608722b */ /* 0x001e0c0000000006 */ /*0590*/ DFMA R6, R8, -R10, 1 ; /* 0x3ff000000806742b */ /* 0x001e08000000080a */ /*05a0*/ DADD R10, -R26, R16 ; /* 0x000000001a0a7229 */ /* 0x020fc80000000110 */ /*05b0*/ DFMA R6, R8, R6, R8 ; /* 0x000000060806722b */ /* 0x001e0c0000000008 */ /*05c0*/ DMUL R16, R10, R6 ; /* 0x000000060a107228 */ /* 0x001e220000000000 */ /*05d0*/ FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT ; /* 0x036000000b00780b */ /* 0x000fca0003f2e200 */ /*05e0*/ DFMA R8, R16, -c[0x0][0x170], R10 ; /* 0x80005c0010087a2b */ /* 0x001e0c000000000a */ /*05f0*/ DFMA R16, R6, R8, R16 ; /* 0x000000080610722b */ /* 0x001e140000000010 */ /*0600*/ FFMA R0, RZ, c[0x0][0x174], R17 ; /* 0x00005d00ff007a23 */ /* 0x001fca0000000011 */ /*0610*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0620*/ @P0 BRA P1, 0x690 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*0630*/ IMAD.MOV.U32 R12, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff0c7624 */ /* 0x000fe200078e00ff */ /*0640*/ MOV R0, 0x670 ; /* 0x0000067000007802 */ /* 0x000fe20000000f00 */ /*0650*/ IMAD.MOV.U32 R13, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff0d7624 */ /* 0x000fe400078e00ff */ /*0660*/ CALL.REL.NOINC 0xc40 ; /* 0x000005d000007944 */ /* 0x002fea0003c00000 */ /*0670*/ MOV R16, R28 ; /* 0x0000001c00107202 */ /* 0x000fe20000000f00 */ /*0680*/ IMAD.MOV.U32 R17, RZ, RZ, R29 ; /* 0x000000ffff117224 */ /* 0x000fe400078e001d */ /*0690*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*06a0*/ I2F.F64 R12, c[0x0][0x180] ; /* 0x00006000000c7b12 */ /* 0x000e220000201c00 */ /*06b0*/ IMAD.MOV.U32 R6, RZ, RZ, 0x1 ; /* 0x00000001ff067424 */ /* 0x000fe200078e00ff */ /*06c0*/ FSETP.GEU.AND P1, PT, |R17|, 6.5827683646048100446e-37, PT ; /* 0x036000001100780b */ /* 0x000fe20003f2e200 */ /*06d0*/ ULDC UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */ /* 0x000fe20000000800 */ /*06e0*/ BSSY B0, 0x840 ; /* 0x0000015000007945 */ /* 0x000fe20003800000 */ /*06f0*/ ULDC UR5, c[0x0][0xc] ; /* 0x0000030000057ab9 */ /* 0x000fe40000000800 */ /*0700*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */ /* 0x000fe2000f8e023f */ /*0710*/ MUFU.RCP64H R7, R13 ; /* 0x0000000d00077308 */ /* 0x001e240000001800 */ /*0720*/ DFMA R8, -R12, R6, 1 ; /* 0x3ff000000c08742b */ /* 0x001e0c0000000106 */ /*0730*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */ /* 0x001e0c0000000008 */ /*0740*/ DFMA R8, R6, R8, R6 ; /* 0x000000080608722b */ /* 0x001e0c0000000006 */ /*0750*/ DFMA R6, -R12, R8, 1 ; /* 0x3ff000000c06742b */ /* 0x001e0c0000000108 */ /*0760*/ DFMA R6, R8, R6, R8 ; /* 0x000000060806722b */ /* 0x001e0c0000000008 */ /*0770*/ DMUL R8, R6, R16 ; /* 0x0000001006087228 */ /* 0x001e0c0000000000 */ /*0780*/ DFMA R10, -R12, R8, R16 ; /* 0x000000080c0a722b */ /* 0x001e0c0000000110 */ /*0790*/ DFMA R6, R6, R10, R8 ; /* 0x0000000a0606722b */ /* 0x001e140000000008 */ /*07a0*/ FFMA R0, RZ, R13, R7 ; /* 0x0000000dff007223 */ /* 0x001fca0000000007 */ /*07b0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*07c0*/ @P0 BRA P1, 0x830 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*07d0*/ IMAD.MOV.U32 R10, RZ, RZ, R16 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0010 */ /*07e0*/ MOV R0, 0x810 ; /* 0x0000081000007802 */ /* 0x000fe20000000f00 */ /*07f0*/ IMAD.MOV.U32 R11, RZ, RZ, R17 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e0011 */ /*0800*/ CALL.REL.NOINC 0xc40 ; /* 0x0000043000007944 */ /* 0x002fea0003c00000 */ /*0810*/ IMAD.MOV.U32 R6, RZ, RZ, R28 ; /* 0x000000ffff067224 */ /* 0x000fe400078e001c */ /*0820*/ IMAD.MOV.U32 R7, RZ, RZ, R29 ; /* 0x000000ffff077224 */ /* 0x000fe400078e001d */ /*0830*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0840*/ F2I.F64 R0, R6 ; /* 0x0000000600007311 */ /* 0x000e220000301100 */ /*0850*/ IMAD.MOV.U32 R10, RZ, RZ, 0x1 ; /* 0x00000001ff0a7424 */ /* 0x000fe200078e00ff */ /*0860*/ USHF.R.S32.HI UR5, URZ, 0x1f, UR4 ; /* 0x0000001f3f057899 */ /* 0x000fe20008011404 */ /*0870*/ IMAD.MOV.U32 R25, RZ, RZ, RZ ; /* 0x000000ffff197224 */ /* 0x000fe200078e00ff */ /*0880*/ BSSY B0, 0xac0 ; /* 0x0000023000007945 */ /* 0x000fe60003800000 */ /*0890*/ IMAD.WIDE.U32 R24, R4, UR4, R24 ; /* 0x0000000404187c25 */ /* 0x000fe2000f8e0018 */ /*08a0*/ MUFU.RCP64H R11, R21 ; /* 0x00000015000b7308 */ /* 0x000ea60000001800 */ /*08b0*/ IMAD R0, R0, c[0x0][0x180], RZ ; /* 0x0000600000007a24 */ /* 0x001fca00078e02ff */ /*08c0*/ I2F.F64 R8, R0 ; /* 0x0000000000087312 */ /* 0x000e220000201c00 */ /*08d0*/ DFMA R12, -R20, R10, 1 ; /* 0x3ff00000140c742b */ /* 0x004e8c000000010a */ /*08e0*/ DFMA R12, R12, R12, R12 ; /* 0x0000000c0c0c722b */ /* 0x004e8c000000000c */ /*08f0*/ DFMA R12, R10, R12, R10 ; /* 0x0000000c0a0c722b */ /* 0x004e88000000000a */ /*0900*/ DADD R8, -R8, R16 ; /* 0x0000000008087229 */ /* 0x0010e40000000110 */ /*0910*/ IMAD R17, R4, UR5, RZ ; /* 0x0000000504117c24 */ /* 0x001fe2000f8e02ff */ /*0920*/ SHF.L.U32 R4, R24, 0x2, RZ ; /* 0x0000000218047819 */ /* 0x000fe200000006ff */ /*0930*/ DFMA R10, -R20, R12, 1 ; /* 0x3ff00000140a742b */ /* 0x004e24000000010c */ /*0940*/ IMAD.IADD R17, R25, 0x1, R17 ; /* 0x0000000119117824 */ /* 0x000fe400078e0211 */ /*0950*/ DMUL R8, R8, -2 ; /* 0xc000000008087828 */ /* 0x008e860000000000 */ /*0960*/ SHF.L.U64.HI R16, R24, 0x2, R17 ; /* 0x0000000218107819 */ /* 0x000fe20000010211 */ /*0970*/ DFMA R14, R12, R10, R12 ; /* 0x0000000a0c0e722b */ /* 0x0011e4000000000c */ /*0980*/ IADD3 R10, P0, R4, c[0x0][0x190], RZ ; /* 0x00006400040a7a10 */ /* 0x001fe40007f1e0ff */ /*0990*/ DMUL R12, R8, c[0x2][0x0] ; /* 0x00800000080c7a28 */ /* 0x004e240000000000 */ /*09a0*/ IADD3.X R11, R16, c[0x0][0x194], RZ, P0, !PT ; /* 0x00006500100b7a10 */ /* 0x000fc800007fe4ff */ /*09b0*/ DMUL R6, R14, R12 ; /* 0x0000000c0e067228 */ /* 0x001e220000000000 */ /*09c0*/ STG.E [R10.64], R0 ; /* 0x000000000a007986 */ /* 0x0005e6000c101906 */ /*09d0*/ FSETP.GEU.AND P1, PT, |R13|, 6.5827683646048100446e-37, PT ; /* 0x036000000d00780b */ /* 0x000fe40003f2e200 */ /*09e0*/ DFMA R8, -R20, R6, R12 ; /* 0x000000061408722b */ /* 0x001e0c000000010c */ /*09f0*/ DFMA R6, R14, R8, R6 ; /* 0x000000080e06722b */ /* 0x001e140000000006 */ /*0a00*/ FFMA R5, RZ, R21, R7 ; /* 0x00000015ff057223 */ /* 0x001fca0000000007 */ /*0a10*/ FSETP.GT.AND P0, PT, |R5|, 1.469367938527859385e-39, PT ; /* 0x001000000500780b */ /* 0x000fda0003f04200 */ /*0a20*/ @P0 BRA P1, 0xab0 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*0a30*/ IMAD.MOV.U32 R10, RZ, RZ, R12 ; /* 0x000000ffff0a7224 */ /* 0x004fe200078e000c */ /*0a40*/ MOV R0, 0xa90 ; /* 0x00000a9000007802 */ /* 0x000fe20000000f00 */ /*0a50*/ IMAD.MOV.U32 R11, RZ, RZ, R13 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e000d */ /*0a60*/ IMAD.MOV.U32 R12, RZ, RZ, R20 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e0014 */ /*0a70*/ IMAD.MOV.U32 R13, RZ, RZ, R21 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e0015 */ /*0a80*/ CALL.REL.NOINC 0xc40 ; /* 0x000001b000007944 */ /* 0x002fea0003c00000 */ /*0a90*/ IMAD.MOV.U32 R6, RZ, RZ, R28 ; /* 0x000000ffff067224 */ /* 0x000fe400078e001c */ /*0aa0*/ IMAD.MOV.U32 R7, RZ, RZ, R29 ; /* 0x000000ffff077224 */ /* 0x000fe400078e001d */ /*0ab0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x004fea0003800000 */ /*0ac0*/ DMUL R18, R18, c[0x0][0x168] ; /* 0x00005a0012127a28 */ /* 0x000e220000000000 */ /*0ad0*/ F2F.F32.F64 R7, R6 ; /* 0x0000000600077310 */ /* 0x000fe60000301000 */ /*0ae0*/ DMUL R10, R2, c[0x0][0x168] ; /* 0x00005a00020a7a28 */ /* 0x000e8a0000000000 */ /*0af0*/ F2I.F64.TRUNC R0, R18 ; /* 0x0000001200007311 */ /* 0x001e30000030d100 */ /*0b00*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */ /* 0x004eb00000301000 */ /*0b10*/ I2F.F64 R8, R0 ; /* 0x0000000000087312 */ /* 0x001e220000201c00 */ /*0b20*/ FADD R15, R10, R10 ; /* 0x0000000a0a0f7221 */ /* 0x004fe20000000000 */ /*0b30*/ IADD3 R10, P0, R4, c[0x0][0x198], RZ ; /* 0x00006600040a7a10 */ /* 0x000fc40007f1e0ff */ /*0b40*/ LEA R4, P1, R24, c[0x0][0x188], 0x3 ; /* 0x0000620018047a11 */ /* 0x000fc800078218ff */ /*0b50*/ F2F.F64.F32 R12, R15 ; /* 0x0000000f000c7310 */ /* 0x000ea20000201800 */ /*0b60*/ IADD3.X R11, R16, c[0x0][0x19c], RZ, P0, !PT ; /* 0x00006700100b7a10 */ /* 0x000fe400007fe4ff */ /*0b70*/ LEA.HI.X R5, R24, c[0x0][0x18c], R17, 0x3, P1 ; /* 0x0000630018057a11 */ /* 0x000fe200008f1c11 */ /*0b80*/ DADD R8, R18, -R8 ; /* 0x0000000012087229 */ /* 0x001e240000000808 */ /*0b90*/ STG.E [R10.64], R7 ; /* 0x000000070a007986 */ /* 0x000ff0000c101906 */ /*0ba0*/ F2F.F32.F64 R8, R8 ; /* 0x0000000800087310 */ /* 0x001e220000301000 */ /*0bb0*/ DMUL R12, R12, c[0x2][0x0] ; /* 0x008000000c0c7a28 */ /* 0x004e940000000000 */ /*0bc0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */ /* 0x004ea20000301000 */ /*0bd0*/ FADD R14, R8, R8 ; /* 0x00000008080e7221 */ /* 0x001fce0000000000 */ /*0be0*/ F2F.F64.F32 R2, R14 ; /* 0x0000000e00027310 */ /* 0x000e220000201800 */ /*0bf0*/ STG.E [R4.64+0x4], R13 ; /* 0x0000040d04007986 */ /* 0x004fe2000c101906 */ /*0c00*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x001e140000000000 */ /*0c10*/ F2F.F32.F64 R3, R2 ; /* 0x0000000200037310 */ /* 0x001e240000301000 */ /*0c20*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x001fe2000c101906 */ /*0c30*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0c40*/ FSETP.GEU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT ; /* 0x001000000d00780b */ /* 0x000fe20003f0e200 */ /*0c50*/ IMAD.MOV.U32 R30, RZ, RZ, 0x1 ; /* 0x00000001ff1e7424 */ /* 0x000fe200078e00ff */ /*0c60*/ FSETP.GEU.AND P2, PT, |R11|, 1.469367938527859385e-39, PT ; /* 0x001000000b00780b */ /* 0x000fe20003f4e200 */ /*0c70*/ BSSY B1, 0x11d0 ; /* 0x0000055000017945 */ /* 0x000fe20003800000 */ /*0c80*/ LOP3.LUT R14, R13, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff0d0e7812 */ /* 0x000fe400078ec0ff */ /*0c90*/ LOP3.LUT R5, R11, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000b057812 */ /* 0x000fe400078ec0ff */ /*0ca0*/ LOP3.LUT R15, R14, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff000000e0f7812 */ /* 0x000fe200078efcff */ /*0cb0*/ IMAD.MOV.U32 R14, RZ, RZ, R12 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e000c */ /*0cc0*/ LOP3.LUT R34, R13, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000d227812 */ /* 0x000fc400078ec0ff */ /*0cd0*/ MOV R8, R10 ; /* 0x0000000a00087202 */ /* 0x000fe20000000f00 */ /*0ce0*/ @!P0 DMUL R14, R12, 8.98846567431157953865e+307 ; /* 0x7fe000000c0e8828 */ /* 0x000e220000000000 */ /*0cf0*/ ISETP.GE.U32.AND P1, PT, R5, R34, PT ; /* 0x000000220500720c */ /* 0x000fe20003f26070 */ /*0d00*/ @!P2 IMAD.MOV.U32 R32, RZ, RZ, RZ ; /* 0x000000ffff20a224 */ /* 0x000fe200078e00ff */ /*0d10*/ @!P2 LOP3.LUT R6, R13, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000d06a812 */ /* 0x000fc600078ec0ff */ /*0d20*/ MUFU.RCP64H R31, R15 ; /* 0x0000000f001f7308 */ /* 0x001e220000001800 */ /*0d30*/ @!P2 ISETP.GE.U32.AND P3, PT, R5, R6, PT ; /* 0x000000060500a20c */ /* 0x000fe20003f66070 */ /*0d40*/ IMAD.MOV.U32 R6, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff067424 */ /* 0x000fe400078e00ff */ /*0d50*/ @!P0 LOP3.LUT R34, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f228812 */ /* 0x000fc600078ec0ff */ /*0d60*/ @!P2 SEL R7, R6.reuse, 0x63400000, !P3 ; /* 0x634000000607a807 */ /* 0x040fe40005800000 */ /*0d70*/ SEL R9, R6, 0x63400000, !P1 ; /* 0x6340000006097807 */ /* 0x000fe40004800000 */ /*0d80*/ @!P2 LOP3.LUT R7, R7, 0x80000000, R11.reuse, 0xf8, !PT ; /* 0x800000000707a812 */ /* 0x100fe400078ef80b */ /*0d90*/ LOP3.LUT R9, R9, 0x800fffff, R11, 0xf8, !PT ; /* 0x800fffff09097812 */ /* 0x000fe400078ef80b */ /*0da0*/ @!P2 LOP3.LUT R33, R7, 0x100000, RZ, 0xfc, !PT ; /* 0x001000000721a812 */ /* 0x000fe200078efcff */ /*0db0*/ DFMA R28, R30, -R14, 1 ; /* 0x3ff000001e1c742b */ /* 0x001e22000000080e */ /*0dc0*/ IMAD.MOV.U32 R7, RZ, RZ, R5 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0005 */ /*0dd0*/ IADD3 R35, R34, -0x1, RZ ; /* 0xffffffff22237810 */ /* 0x000fc60007ffe0ff */ /*0de0*/ @!P2 DFMA R8, R8, 2, -R32 ; /* 0x400000000808a82b */ /* 0x000fc80000000820 */ /*0df0*/ DFMA R28, R28, R28, R28 ; /* 0x0000001c1c1c722b */ /* 0x001e0c000000001c */ /*0e00*/ DFMA R28, R30, R28, R30 ; /* 0x0000001c1e1c722b */ /* 0x001e22000000001e */ /*0e10*/ @!P2 LOP3.LUT R7, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000907a812 */ /* 0x000fc800078ec0ff */ /*0e20*/ IADD3 R32, R7, -0x1, RZ ; /* 0xffffffff07207810 */ /* 0x000fe20007ffe0ff */ /*0e30*/ DFMA R30, R28, -R14, 1 ; /* 0x3ff000001c1e742b */ /* 0x001e06000000080e */ /*0e40*/ ISETP.GT.U32.AND P0, PT, R32, 0x7feffffe, PT ; /* 0x7feffffe2000780c */ /* 0x000fc60003f04070 */ /*0e50*/ DFMA R28, R28, R30, R28 ; /* 0x0000001e1c1c722b */ /* 0x001e22000000001c */ /*0e60*/ ISETP.GT.U32.OR P0, PT, R35, 0x7feffffe, P0 ; /* 0x7feffffe2300780c */ /* 0x000fca0000704470 */ /*0e70*/ DMUL R30, R28, R8 ; /* 0x000000081c1e7228 */ /* 0x001e0c0000000000 */ /*0e80*/ DFMA R32, R30, -R14, R8 ; /* 0x8000000e1e20722b */ /* 0x001e0c0000000008 */ /*0e90*/ DFMA R32, R28, R32, R30 ; /* 0x000000201c20722b */ /* 0x001062000000001e */ /*0ea0*/ @P0 BRA 0x1070 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*0eb0*/ LOP3.LUT R10, R13, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000d0a7812 */ /* 0x000fc800078ec0ff */ /*0ec0*/ ISETP.GE.U32.AND P0, PT, R5.reuse, R10, PT ; /* 0x0000000a0500720c */ /* 0x040fe20003f06070 */ /*0ed0*/ IMAD.IADD R7, R5, 0x1, -R10 ; /* 0x0000000105077824 */ /* 0x000fc600078e0a0a */ /*0ee0*/ SEL R6, R6, 0x63400000, !P0 ; /* 0x6340000006067807 */ /* 0x000fe40004000000 */ /*0ef0*/ IMNMX R7, R7, -0x46a00000, !PT ; /* 0xb960000007077817 */ /* 0x000fc80007800200 */ /*0f00*/ IMNMX R5, R7, 0x46a00000, PT ; /* 0x46a0000007057817 */ /* 0x000fca0003800200 */ /*0f10*/ IMAD.IADD R5, R5, 0x1, -R6 ; /* 0x0000000105057824 */ /* 0x000fe400078e0a06 */ /*0f20*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fc600078e00ff */ /*0f30*/ IADD3 R7, R5, 0x7fe00000, RZ ; /* 0x7fe0000005077810 */ /* 0x000fcc0007ffe0ff */ /*0f40*/ DMUL R28, R32, R6 ; /* 0x00000006201c7228 */ /* 0x003e140000000000 */ /*0f50*/ FSETP.GTU.AND P0, PT, |R29|, 1.469367938527859385e-39, PT ; /* 0x001000001d00780b */ /* 0x001fda0003f0c200 */ /*0f60*/ @P0 BRA 0x11c0 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*0f70*/ DFMA R8, R32, -R14, R8 ; /* 0x8000000e2008722b */ /* 0x000e0c0000000008 */ /*0f80*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x001fc800078e00ff */ /*0f90*/ FSETP.NEU.AND P0, PT, R9.reuse, RZ, PT ; /* 0x000000ff0900720b */ /* 0x040fe40003f0d000 */ /*0fa0*/ LOP3.LUT R13, R9, 0x80000000, R13, 0x48, !PT ; /* 0x80000000090d7812 */ /* 0x000fc800078e480d */ /*0fb0*/ LOP3.LUT R9, R13, R7, RZ, 0xfc, !PT ; /* 0x000000070d097212 */ /* 0x000fce00078efcff */ /*0fc0*/ @!P0 BRA 0x11c0 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*0fd0*/ IMAD.MOV R7, RZ, RZ, -R5 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0a05 */ /*0fe0*/ DMUL.RP R8, R32, R8 ; /* 0x0000000820087228 */ /* 0x000e220000008000 */ /*0ff0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fe200078e00ff */ /*1000*/ IADD3 R5, -R5, -0x43300000, RZ ; /* 0xbcd0000005057810 */ /* 0x000fca0007ffe1ff */ /*1010*/ DFMA R6, R28, -R6, R32 ; /* 0x800000061c06722b */ /* 0x000e460000000020 */ /*1020*/ LOP3.LUT R13, R9, R13, RZ, 0x3c, !PT ; /* 0x0000000d090d7212 */ /* 0x001fce00078e3cff */ /*1030*/ FSETP.NEU.AND P0, PT, |R7|, R5, PT ; /* 0x000000050700720b */ /* 0x002fc80003f0d200 */ /*1040*/ FSEL R28, R8, R28, !P0 ; /* 0x0000001c081c7208 */ /* 0x000fe40004000000 */ /*1050*/ FSEL R29, R13, R29, !P0 ; /* 0x0000001d0d1d7208 */ /* 0x000fe20004000000 */ /*1060*/ BRA 0x11c0 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*1070*/ DSETP.NAN.AND P0, PT, R10, R10, PT ; /* 0x0000000a0a00722a */ /* 0x000e9c0003f08000 */ /*1080*/ @P0 BRA 0x11a0 ; /* 0x0000011000000947 */ /* 0x004fea0003800000 */ /*1090*/ DSETP.NAN.AND P0, PT, R12, R12, PT ; /* 0x0000000c0c00722a */ /* 0x000e9c0003f08000 */ /*10a0*/ @P0 BRA 0x1170 ; /* 0x000000c000000947 */ /* 0x004fea0003800000 */ /*10b0*/ ISETP.NE.AND P0, PT, R7, R34, PT ; /* 0x000000220700720c */ /* 0x000fe20003f05270 */ /*10c0*/ IMAD.MOV.U32 R28, RZ, RZ, 0x0 ; /* 0x00000000ff1c7424 */ /* 0x001fe200078e00ff */ /*10d0*/ MOV R29, 0xfff80000 ; /* 0xfff80000001d7802 */ /* 0x000fd60000000f00 */ /*10e0*/ @!P0 BRA 0x11c0 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*10f0*/ ISETP.NE.AND P0, PT, R7, 0x7ff00000, PT ; /* 0x7ff000000700780c */ /* 0x000fe40003f05270 */ /*1100*/ LOP3.LUT R29, R11, 0x80000000, R13, 0x48, !PT ; /* 0x800000000b1d7812 */ /* 0x000fe400078e480d */ /*1110*/ ISETP.EQ.OR P0, PT, R34, RZ, !P0 ; /* 0x000000ff2200720c */ /* 0x000fda0004702670 */ /*1120*/ @P0 LOP3.LUT R5, R29, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000001d050812 */ /* 0x000fe200078efcff */ /*1130*/ @!P0 IMAD.MOV.U32 R28, RZ, RZ, RZ ; /* 0x000000ffff1c8224 */ /* 0x000fe400078e00ff */ /*1140*/ @P0 IMAD.MOV.U32 R28, RZ, RZ, RZ ; /* 0x000000ffff1c0224 */ /* 0x000fe400078e00ff */ /*1150*/ @P0 IMAD.MOV.U32 R29, RZ, RZ, R5 ; /* 0x000000ffff1d0224 */ /* 0x000fe200078e0005 */ /*1160*/ BRA 0x11c0 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*1170*/ LOP3.LUT R29, R13, 0x80000, RZ, 0xfc, !PT ; /* 0x000800000d1d7812 */ /* 0x001fe200078efcff */ /*1180*/ IMAD.MOV.U32 R28, RZ, RZ, R12 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e000c */ /*1190*/ BRA 0x11c0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*11a0*/ LOP3.LUT R29, R11, 0x80000, RZ, 0xfc, !PT ; /* 0x000800000b1d7812 */ /* 0x001fe200078efcff */ /*11b0*/ IMAD.MOV.U32 R28, RZ, RZ, R10 ; /* 0x000000ffff1c7224 */ /* 0x000fe400078e000a */ /*11c0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*11d0*/ IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff067224 */ /* 0x000fe400078e0000 */ /*11e0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x0 ; /* 0x00000000ff077424 */ /* 0x000fc800078e00ff */ /*11f0*/ RET.REL.NODEC R6 0x0 ; /* 0xffffee0006007950 */ /* 0x000fea0003c3ffff */ /*1200*/ BRA 0x1200; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*12a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*12b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*12c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*12d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*12e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*12f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void calculateDelaysAndPhases(double * gpuDelays, double lo, double sampletime, int fftsamples, int fftchannels, int samplegranularity, float * rotationPhaseInfo, int *sampleShifts, float* fractionalSampleDelays) { size_t ifft = threadIdx.x + blockIdx.x * blockDim.x; size_t iant = blockIdx.y; int numffts = blockDim.x * gridDim.x; double meandelay, deltadelay, netdelaysamples_f, startphase; double d0, d1, d2, a, b; double * interpolator = &(gpuDelays[iant*4]); double filestartoffset = gpuDelays[iant*4+3]; float fractionaldelay; int netdelaysamples; // evaluate the delay for the given FFT of the given antenna // calculate values at the beginning, middle, and end of this FFT d0 = interpolator[0]*ifft*ifft + interpolator[1]*ifft + interpolator[2]; d1 = interpolator[0]*(ifft+0.5)*(ifft+0.5) + interpolator[1]*(ifft+0.5) + interpolator[2]; d2 = interpolator[0]*(ifft+1.0)*(ifft+1.0) + interpolator[1]*(ifft+1.0) + interpolator[2]; // use these to calculate a linear interpolator across the FFT, as well as a mean value a = d2-d0; //this is the delay gradient across this FFT b = d0 + (d1 - (a*0.5 + d0))/3.0; //this is the delay at the start of the FFT meandelay = a*0.5 + b; //this is the delay in the middle of the FFT deltadelay = a / fftsamples; // this is the change in delay per sample across this FFT window netdelaysamples_f = (meandelay - filestartoffset) / sampletime; netdelaysamples = __double2int_rn(netdelaysamples_f/samplegranularity) * samplegranularity; // Save the integer number of sample shifts sampleShifts[iant*numffts + ifft] = netdelaysamples; // Save the fractional delay fractionaldelay = (float)(-(netdelaysamples_f - netdelaysamples)*2*M_PI/fftsamples); // radians per FFT channel fractionalSampleDelays[iant*numffts + ifft] = fractionaldelay; // set the fringe rotation phase for the first sample of a given FFT of a given antenna startphase = b*lo; rotationPhaseInfo[iant*numffts*2 + ifft*2] = (float)(startphase - int(startphase))*2*M_PI; rotationPhaseInfo[iant*numffts*2 + ifft*2 + 1] = (float)(deltadelay * lo)*2*M_PI; }
.text .file "calculateDelaysAndPhases.hip" .globl _Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_ # -- Begin function _Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_ .type _Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_,@function _Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_: # @_Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $192, %rsp .cfi_def_cfa_offset 240 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 72(%rsp), %rax movq %rdi, (%rax) leaq 64(%rsp), %rdi movsd %xmm0, (%rdi) leaq 56(%rsp), %r10 movsd %xmm1, (%r10) leaq 20(%rsp), %r11 movl %esi, (%r11) leaq 16(%rsp), %rsi movl %edx, (%rsi) leaq 12(%rsp), %rdx movl %ecx, (%rdx) leaq 48(%rsp), %rcx movq %r8, (%rcx) leaq 40(%rsp), %r8 movq %r9, (%r8) leaq 112(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %r10, 16(%rbx) movq %r11, 24(%rbx) movq %rsi, 32(%rbx) movq %rdx, 40(%rbx) movq %rcx, 48(%rbx) movq %r8, 56(%rbx) leaq 240(%rsp), %rax movq %rax, 64(%rbx) leaq 96(%rsp), %r14 leaq 80(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z24calculateDelaysAndPhasesPdddiiiPfPiS0_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $208, %rsp .cfi_adjust_cfa_offset -208 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_, .Lfunc_end0-_Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_ .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z24calculateDelaysAndPhasesPdddiiiPfPiS0_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_,@object # @_Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .section .rodata,"a",@progbits .globl _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .p2align 3, 0x0 _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_: .quad _Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_ .size _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z24calculateDelaysAndPhasesPdddiiiPfPiS0_" .size .L__unnamed_1, 43 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z39__device_stub__calculateDelaysAndPhasesPdddiiiPfPiS0_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ ; -- Begin function _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .globl _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .p2align 8 .type _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_,@function _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_: ; @_Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ ; %bb.0: s_load_b32 s2, s[0:1], 0x4c s_mov_b32 s16, s15 s_mov_b32 s17, 0 s_load_b64 s[18:19], s[0:1], 0x10 s_lshl_b64 s[4:5], s[16:17], 5 s_waitcnt lgkmcnt(0) s_and_b32 s3, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s14, s3, v[0:1] s_load_b128 s[12:15], s[0:1], 0x0 v_cvt_f64_u32_e32 v[2:3], v1 s_waitcnt lgkmcnt(0) s_add_u32 s4, s12, s4 s_addc_u32 s5, s13, s5 s_load_b256 s[4:11], s[4:5], 0x0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_add_f64 v[4:5], v[2:3], 1.0 s_waitcnt lgkmcnt(0) v_mul_f64 v[6:7], s[4:5], v[2:3] v_add_f64 v[10:11], v[2:3], 0.5 v_mul_f64 v[8:9], s[4:5], v[4:5] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f64 v[6:7], v[6:7], v[2:3] v_mul_f64 v[12:13], s[4:5], v[10:11] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f64 v[8:9], v[4:5], v[8:9] v_fma_f64 v[2:3], s[6:7], v[2:3], v[6:7] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f64 v[6:7], v[10:11], v[12:13] v_fma_f64 v[4:5], s[6:7], v[4:5], v[8:9] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[2:3], s[8:9], v[2:3] v_fma_f64 v[6:7], s[6:7], v[10:11], v[6:7] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[4:5], s[8:9], v[4:5] v_add_f64 v[6:7], s[8:9], v[6:7] s_clause 0x4 s_load_b32 s2, s[0:1], 0x18 s_load_b32 s12, s[0:1], 0x20 s_load_b128 s[4:7], s[0:1], 0x28 s_load_b64 s[8:9], s[0:1], 0x38 s_load_b32 s0, s[0:1], 0x40 s_waitcnt lgkmcnt(0) s_mul_i32 s0, s0, s3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[4:5], v[4:5], -v[2:3] v_fma_f64 v[8:9], v[4:5], 0.5, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[6:7], v[6:7], -v[8:9] v_div_scale_f64 v[8:9], null, 0x40080000, 0x40080000, v[6:7] v_div_scale_f64 v[14:15], vcc_lo, v[6:7], 0x40080000, v[6:7] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[10:11], v[8:9] s_waitcnt_depctr 0xfff v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0 v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0 v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[12:13], v[14:15], v[10:11] v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13] v_div_fixup_f64 v[6:7], v[8:9], 0x40080000, v[6:7] v_cvt_f64_i32_e32 v[8:9], s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[2:3], v[2:3], v[6:7] v_div_scale_f64 v[10:11], null, v[8:9], v[8:9], v[4:5] v_div_scale_f64 v[22:23], vcc_lo, v[4:5], v[8:9], v[4:5] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[6:7], v[4:5], 0.5, v[2:3] v_rcp_f64_e32 v[14:15], v[10:11] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[6:7], v[6:7], -s[10:11] s_mov_b32 s10, 0x54442d18 s_mov_b32 s11, 0x400921fb s_waitcnt_depctr 0xfff v_fma_f64 v[18:19], -v[10:11], v[14:15], 1.0 v_div_scale_f64 v[12:13], null, s[18:19], s[18:19], v[6:7] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15] v_rcp_f64_e32 v[16:17], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_fma_f64 v[18:19], -v[10:11], v[14:15], 1.0 s_waitcnt_depctr 0xfff v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0 v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15] v_div_scale_f64 v[18:19], s2, v[6:7], s[18:19], v[6:7] v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[20:21], -v[12:13], v[16:17], 1.0 v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17] v_mul_f64 v[20:21], v[22:23], v[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[24:25], v[18:19], v[16:17] v_fma_f64 v[10:11], -v[10:11], v[20:21], v[22:23] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[12:13], -v[12:13], v[24:25], v[18:19] v_div_fmas_f64 v[10:11], v[10:11], v[14:15], v[20:21] s_mov_b32 vcc_lo, s2 v_cvt_f64_i32_e32 v[14:15], s12 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_div_fmas_f64 v[12:13], v[12:13], v[16:17], v[24:25] v_div_fixup_f64 v[4:5], v[10:11], v[8:9], v[4:5] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[6:7], v[12:13], s[18:19], v[6:7] v_mul_f64 v[4:5], v[4:5], s[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f64 v[12:13], null, v[14:15], v[14:15], v[6:7] v_div_scale_f64 v[20:21], vcc_lo, v[6:7], v[14:15], v[6:7] v_rcp_f64_e32 v[16:17], v[12:13] s_waitcnt_depctr 0xfff v_fma_f64 v[18:19], -v[12:13], v[16:17], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17] v_fma_f64 v[18:19], -v[12:13], v[16:17], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17] v_mul_f64 v[18:19], v[20:21], v[16:17] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], -v[12:13], v[18:19], v[20:21] v_div_fmas_f64 v[12:13], v[12:13], v[16:17], v[18:19] v_mul_f64 v[18:19], v[2:3], s[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fixup_f64 v[12:13], v[12:13], v[14:15], v[6:7] v_rndne_f64_e32 v[12:13], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cvt_i32_f64_e32 v0, v[12:13] v_mul_lo_u32 v20, v0, s12 v_cvt_i32_f64_e32 v0, v[18:19] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_f64_i32_e32 v[12:13], v20 v_cvt_f64_i32_e32 v[10:11], v0 v_cvt_f32_f64_e32 v0, v[4:5] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[6:7], v[6:7], -v[12:13] v_fma_f64 v[2:3], v[2:3], s[14:15], -v[10:11] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v0, v0, v0 v_mul_f64 v[6:7], v[6:7], -2.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_f32_f64_e32 v4, v[2:3] v_mul_f64 v[6:7], v[6:7], s[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f64 v[12:13], null, v[8:9], v[8:9], v[6:7] v_div_scale_f64 v[18:19], vcc_lo, v[6:7], v[8:9], v[6:7] v_rcp_f64_e32 v[14:15], v[12:13] s_waitcnt_depctr 0xfff v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] v_mul_f64 v[10:11], v[18:19], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[2:3], -v[12:13], v[10:11], v[18:19] v_add_f32_e32 v12, v4, v4 v_cvt_f64_f32_e32 v[4:5], v0 v_div_fmas_f64 v[2:3], v[2:3], v[14:15], v[10:11] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cvt_f64_f32_e32 v[10:11], v12 v_mul_f64 v[4:5], v[4:5], s[10:11] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_div_fixup_f64 v[6:7], v[2:3], v[8:9], v[6:7] v_mul_f64 v[8:9], v[10:11], s[10:11] v_mov_b32_e32 v2, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_mad_u64_u32 v[10:11], null, s0, s16, v[1:2] v_cvt_f32_f64_e32 v2, v[4:5] s_ashr_i32 s0, s0, 31 v_mov_b32_e32 v0, v11 v_cvt_f32_f64_e32 v12, v[6:7] v_cvt_f32_f64_e32 v1, v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, s0, s16, v[0:1] v_mov_b32_e32 v11, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[3:4], 2, v[10:11] v_lshlrev_b64 v[5:6], 3, v[10:11] v_add_co_u32 v7, vcc_lo, s6, v3 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v8, vcc_lo, s7, v4, vcc_lo v_add_co_u32 v3, vcc_lo, s8, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo v_add_co_u32 v5, vcc_lo, s4, v5 v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo global_store_b32 v[7:8], v20, off global_store_b32 v[3:4], v12, off global_store_b64 v[5:6], v[1:2], off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 320 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 26 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_, .Lfunc_end0-_Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1196 ; NumSgprs: 22 ; NumVgprs: 26 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 3 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 26 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 8 .value_kind: by_value - .offset: 16 .size: 8 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: by_value - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .offset: 64 .size: 4 .value_kind: hidden_block_count_x - .offset: 68 .size: 4 .value_kind: hidden_block_count_y - .offset: 72 .size: 4 .value_kind: hidden_block_count_z - .offset: 76 .size: 2 .value_kind: hidden_group_size_x - .offset: 78 .size: 2 .value_kind: hidden_group_size_y - .offset: 80 .size: 2 .value_kind: hidden_group_size_z - .offset: 82 .size: 2 .value_kind: hidden_remainder_x - .offset: 84 .size: 2 .value_kind: hidden_remainder_y - .offset: 86 .size: 2 .value_kind: hidden_remainder_z - .offset: 104 .size: 8 .value_kind: hidden_global_offset_x - .offset: 112 .size: 8 .value_kind: hidden_global_offset_y - .offset: 120 .size: 8 .value_kind: hidden_global_offset_z - .offset: 128 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 320 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_ .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z24calculateDelaysAndPhasesPdddiiiPfPiS0_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 26 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
062cf1b0564e0edbb1b2fdccc061db0f62d14638
/* This is a automatically generated test. Do not modify */ #include <stdio.h> #include <stdlib.h> #include <math.h> __global__ void compute(float comp, int var_1,float var_2,int var_3,int var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11,float* var_12,float var_13,float var_14,float var_15,float var_16,float var_17,float var_18,float var_19,float var_20,float var_21,float* var_22,float* var_23,float var_24,float var_25,float var_26,float var_27,float var_28,float var_29,float var_30,float var_31,float var_32,float var_33) { for (int i=0; i < var_1; ++i) { if (comp > (var_2 + -1.5747E-35f)) { comp += coshf((+0.0f / +1.3473E-43f)); if (comp >= -1.3494E36f - (-0.0f * (+1.7416E-44f - var_5))) { comp += asinf((var_6 + var_7)); float tmp_1 = -0.0f + (+0.0f * var_8); float tmp_2 = -1.9823E34f / +0.0f - var_9; comp = tmp_2 * tmp_1 + (var_10 * var_11); } for (int i=0; i < var_3; ++i) { var_12[i] = var_13 + var_14 * fabsf((var_15 - var_16 * ldexpf(floorf(tanhf((-1.9774E-35f * var_17 + var_18))), 2))); float tmp_3 = +1.5409E26f; comp = tmp_3 / var_12[i] / -1.2900E-35f + var_19 / (var_20 / (-1.3379E-15f - -1.8224E-35f - var_21)); } for (int i=0; i < var_4; ++i) { var_22[i] = sinhf(acosf(var_24 + +1.4771E-35f)); var_23[i] = +1.8351E-35f * (-1.0405E10f * (var_25 / (var_26 * fmodf((-1.5535E35f + -1.3174E-24f * -1.2706E-41f - (-1.4619E-35f - var_27)), (var_28 + (var_29 - (var_30 / ceilf(+1.0588E-43f)))))))); comp += var_23[i] + var_22[i] + powf(var_31 - (var_32 / -1.1886E34f * -0.0f - (var_33 - +0.0f)), -1.0284E-35f); } } } printf("%.17g\n", comp); } float* initPointer(float v) { float *ret = (float*) malloc(sizeof(float)*10); for(int i=0; i < 10; ++i) ret[i] = v; return ret; } int main(int argc, char** argv) { /* Program variables */ float tmp_1 = atof(argv[1]); int tmp_2 = atoi(argv[2]); float tmp_3 = atof(argv[3]); int tmp_4 = atoi(argv[4]); int tmp_5 = atoi(argv[5]); float tmp_6 = atof(argv[6]); float tmp_7 = atof(argv[7]); float tmp_8 = atof(argv[8]); float tmp_9 = atof(argv[9]); float tmp_10 = atof(argv[10]); float tmp_11 = atof(argv[11]); float tmp_12 = atof(argv[12]); float* tmp_13 = initPointer( atof(argv[13]) ); float tmp_14 = atof(argv[14]); float tmp_15 = atof(argv[15]); float tmp_16 = atof(argv[16]); float tmp_17 = atof(argv[17]); float tmp_18 = atof(argv[18]); float tmp_19 = atof(argv[19]); float tmp_20 = atof(argv[20]); float tmp_21 = atof(argv[21]); float tmp_22 = atof(argv[22]); float* tmp_23 = initPointer( atof(argv[23]) ); float* tmp_24 = initPointer( atof(argv[24]) ); float tmp_25 = atof(argv[25]); float tmp_26 = atof(argv[26]); float tmp_27 = atof(argv[27]); float tmp_28 = atof(argv[28]); float tmp_29 = atof(argv[29]); float tmp_30 = atof(argv[30]); float tmp_31 = atof(argv[31]); float tmp_32 = atof(argv[32]); float tmp_33 = atof(argv[33]); float tmp_34 = atof(argv[34]); compute<<<1,1>>>(tmp_1,tmp_2,tmp_3,tmp_4,tmp_5,tmp_6,tmp_7,tmp_8,tmp_9,tmp_10,tmp_11,tmp_12,tmp_13,tmp_14,tmp_15,tmp_16,tmp_17,tmp_18,tmp_19,tmp_20,tmp_21,tmp_22,tmp_23,tmp_24,tmp_25,tmp_26,tmp_27,tmp_28,tmp_29,tmp_30,tmp_31,tmp_32,tmp_33,tmp_34); cudaDeviceSynchronize(); return 0; }
.file "tmpxft_00299895_00000000-6_test.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z11initPointerf .type _Z11initPointerf, @function _Z11initPointerf: .LFB2027: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl $40, %edi movss %xmm0, 12(%rsp) call malloc@PLT movss 12(%rsp), %xmm0 xorl %edx, %edx .L3: movss %xmm0, (%rax,%rdx,4) incq %rdx cmpq $10, %rdx jne .L3 addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _Z11initPointerf, .-_Z11initPointerf .globl _Z61__device_stub__Z7computefifiifffffffPffffffffffS_S_fffffffffffifiifffffffPffffffffffS_S_ffffffffff .type _Z61__device_stub__Z7computefifiifffffffPffffffffffS_S_fffffffffffifiifffffffPffffffffffS_S_ffffffffff, @function _Z61__device_stub__Z7computefifiifffffffPffffffffffS_S_fffffffffffifiifffffffPffffffffffS_S_ffffffffff: .LFB2053: .cfi_startproc endbr64 subq $440, %rsp .cfi_def_cfa_offset 448 movl %edi, 72(%rsp) leaq 104(%rsp), %rdi movl %esi, 64(%rsp) leaq 116(%rsp), %rsi movl %edx, 60(%rsp) leaq 88(%rsp), %rdx movq %rcx, 24(%rsp) leaq 96(%rsp), %rcx movq %r8, 16(%rsp) movq %r9, 8(%rsp) movss %xmm0, 76(%rsp) movss %xmm1, 68(%rsp) movss %xmm2, 56(%rsp) movss %xmm3, 52(%rsp) movss %xmm4, 48(%rsp) movss %xmm5, 44(%rsp) movss %xmm6, 40(%rsp) movss %xmm7, 36(%rsp) movq %fs:40, %rax movq %rax, 424(%rsp) xorl %eax, %eax leaq 76(%rsp), %rax movq %rax, 152(%rsp) leaq 72(%rsp), %rax movq %rax, 160(%rsp) leaq 68(%rsp), %rax movq %rax, 168(%rsp) leaq 64(%rsp), %rax movq %rax, 176(%rsp) leaq 60(%rsp), %rax movq %rax, 184(%rsp) leaq 56(%rsp), %rax movq %rax, 192(%rsp) leaq 52(%rsp), %rax movq %rax, 200(%rsp) leaq 48(%rsp), %rax movq %rax, 208(%rsp) leaq 44(%rsp), %rax movq %rax, 216(%rsp) leaq 40(%rsp), %rax movq %rax, 224(%rsp) leaq 36(%rsp), %rax movq %rax, 232(%rsp) leaq 448(%rsp), %rax movq %rax, 240(%rsp) leaq 24(%rsp), %rax movq %rax, 248(%rsp) leaq 456(%rsp), %rax movq %rax, 256(%rsp) leaq 464(%rsp), %rax movq %rax, 264(%rsp) leaq 472(%rsp), %rax movq %rax, 272(%rsp) leaq 480(%rsp), %rax movq %rax, 280(%rsp) leaq 488(%rsp), %rax movq %rax, 288(%rsp) leaq 496(%rsp), %rax movq %rax, 296(%rsp) leaq 504(%rsp), %rax movq %rax, 304(%rsp) leaq 512(%rsp), %rax movq %rax, 312(%rsp) leaq 520(%rsp), %rax movq %rax, 320(%rsp) leaq 16(%rsp), %rax movq %rax, 328(%rsp) leaq 8(%rsp), %rax movq %rax, 336(%rsp) leaq 528(%rsp), %rax movq %rax, 344(%rsp) leaq 536(%rsp), %rax movq %rax, 352(%rsp) leaq 544(%rsp), %rax movq %rax, 360(%rsp) leaq 552(%rsp), %rax movq %rax, 368(%rsp) leaq 560(%rsp), %rax movq %rax, 376(%rsp) leaq 568(%rsp), %rax movq %rax, 384(%rsp) leaq 576(%rsp), %rax movq %rax, 392(%rsp) leaq 584(%rsp), %rax movq %rax, 400(%rsp) leaq 592(%rsp), %rax movq %rax, 408(%rsp) leaq 600(%rsp), %rax movq %rax, 416(%rsp) movabsq $4294967297, %rax movq %rax, 104(%rsp) movl $1, 112(%rsp) movq %rax, 116(%rsp) movl $1, 124(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L7 pushq 96(%rsp) .cfi_def_cfa_offset 456 leaq _Z7computefifiifffffffPffffffffffS_S_ffffffffff(%rip), %rdi pushq 96(%rsp) .cfi_def_cfa_offset 464 movq 132(%rsp), %rcx movl 140(%rsp), %r8d movq 120(%rsp), %rsi movl 128(%rsp), %edx leaq 168(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 456 popq %rdx .cfi_def_cfa_offset 448 .L7: movq 424(%rsp), %rax subq %fs:40, %rax je .L9 call __stack_chk_fail@PLT .L9: addq $440, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z61__device_stub__Z7computefifiifffffffPffffffffffS_S_fffffffffffifiifffffffPffffffffffS_S_ffffffffff, .-_Z61__device_stub__Z7computefifiifffffffPffffffffffS_S_fffffffffffifiifffffffPffffffffffS_S_ffffffffff .globl _Z7computefifiifffffffPffffffffffS_S_ffffffffff .type _Z7computefifiifffffffPffffffffffS_S_ffffffffff, @function _Z7computefifiifffffffPffffffffffS_S_ffffffffff: .LFB2054: .cfi_startproc endbr64 jmp _Z61__device_stub__Z7computefifiifffffffPffffffffffS_S_fffffffffffifiifffffffPffffffffffS_S_ffffffffff .cfi_endproc .LFE2054: .size _Z7computefifiifffffffPffffffffffS_S_ffffffffff, .-_Z7computefifiifffffffPffffffffffS_S_ffffffffff .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movq %rsi, %rbx subq $280, %rsp .cfi_def_cfa_offset 336 movq 8(%rsi), %rdi call atof@PLT movq 16(%rbx), %rdi movsd %xmm0, 232(%rsp) call atoi@PLT movq 24(%rbx), %rdi movl %eax, 116(%rsp) call atof@PLT movq 32(%rbx), %rdi movsd %xmm0, 224(%rsp) call atoi@PLT movq 40(%rbx), %rdi movl %eax, %ebp call atoi@PLT movq 48(%rbx), %rdi movl %eax, %r12d call atof@PLT movq 56(%rbx), %rdi movsd %xmm0, 216(%rsp) call atof@PLT movq 64(%rbx), %rdi movsd %xmm0, 208(%rsp) call atof@PLT movq 72(%rbx), %rdi movsd %xmm0, 200(%rsp) call atof@PLT movq 80(%rbx), %rdi movsd %xmm0, 192(%rsp) call atof@PLT movq 88(%rbx), %rdi movsd %xmm0, 184(%rsp) call atof@PLT movq 96(%rbx), %rdi movsd %xmm0, 176(%rsp) call atof@PLT movsd %xmm0, 8(%rsp) movq 104(%rbx), %rdi call atof@PLT cvtsd2ss %xmm0, %xmm0 call _Z11initPointerf movq 112(%rbx), %rdi movq %rax, %r13 call atof@PLT movq 120(%rbx), %rdi movsd %xmm0, 16(%rsp) call atof@PLT movq 128(%rbx), %rdi movsd %xmm0, 24(%rsp) call atof@PLT movq 136(%rbx), %rdi movsd %xmm0, 32(%rsp) call atof@PLT movq 144(%rbx), %rdi movsd %xmm0, 40(%rsp) call atof@PLT movq 152(%rbx), %rdi movsd %xmm0, 48(%rsp) call atof@PLT movq 160(%rbx), %rdi movsd %xmm0, 56(%rsp) call atof@PLT movq 168(%rbx), %rdi movsd %xmm0, 64(%rsp) call atof@PLT movq 176(%rbx), %rdi movsd %xmm0, 72(%rsp) call atof@PLT movq 184(%rbx), %rdi movsd %xmm0, 80(%rsp) call atof@PLT cvtsd2ss %xmm0, %xmm0 call _Z11initPointerf movq 192(%rbx), %rdi movq %rax, %r14 call atof@PLT cvtsd2ss %xmm0, %xmm0 call _Z11initPointerf movq 200(%rbx), %rdi movq %rax, %r15 call atof@PLT movq 208(%rbx), %rdi movsd %xmm0, 88(%rsp) call atof@PLT movq 216(%rbx), %rdi movsd %xmm0, 96(%rsp) call atof@PLT movq 224(%rbx), %rdi movsd %xmm0, 104(%rsp) call atof@PLT movq 232(%rbx), %rdi movsd %xmm0, 168(%rsp) call atof@PLT movq 240(%rbx), %rdi movsd %xmm0, 160(%rsp) call atof@PLT movq 248(%rbx), %rdi movsd %xmm0, 152(%rsp) call atof@PLT movq 256(%rbx), %rdi movsd %xmm0, 144(%rsp) call atof@PLT movq 264(%rbx), %rdi movsd %xmm0, 136(%rsp) call atof@PLT movq 272(%rbx), %rdi movsd %xmm0, 128(%rsp) call atof@PLT xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $4294967297, %rdi movl $1, %esi movsd %xmm0, 120(%rsp) movq %rdi, %rdx call __cudaPushCallConfiguration@PLT movsd 120(%rsp), %xmm14 movsd 128(%rsp), %xmm13 movsd 136(%rsp), %xmm12 testl %eax, %eax movsd 144(%rsp), %xmm11 movsd 152(%rsp), %xmm10 movsd 160(%rsp), %xmm9 movsd 168(%rsp), %xmm8 movsd 176(%rsp), %xmm7 movsd 184(%rsp), %xmm6 movsd 192(%rsp), %xmm5 movsd 200(%rsp), %xmm4 movsd 208(%rsp), %xmm3 movsd 216(%rsp), %xmm2 movsd 224(%rsp), %xmm1 movsd 232(%rsp), %xmm15 jne .L13 subq $160, %rsp .cfi_def_cfa_offset 496 cvtsd2ss %xmm14, %xmm14 cvtsd2ss %xmm13, %xmm13 cvtsd2ss %xmm12, %xmm12 cvtsd2ss %xmm11, %xmm11 movq %r15, %r9 movq %r14, %r8 movq %r13, %rcx movss %xmm14, 152(%rsp) movl %r12d, %edx movl %ebp, %esi cvtsd2ss %xmm10, %xmm10 cvtsd2ss %xmm9, %xmm9 movss %xmm10, 120(%rsp) cvtsd2ss %xmm8, %xmm8 cvtsd2ss %xmm15, %xmm0 movss %xmm9, 112(%rsp) cvtsd2ss %xmm7, %xmm7 cvtsd2ss %xmm6, %xmm6 cvtsd2ss %xmm5, %xmm5 movss %xmm8, 104(%rsp) cvtsd2ss %xmm4, %xmm4 cvtsd2ss %xmm3, %xmm3 cvtsd2ss 264(%rsp), %xmm8 movss %xmm8, 96(%rsp) cvtsd2ss %xmm2, %xmm2 cvtsd2ss %xmm1, %xmm1 cvtsd2ss 256(%rsp), %xmm8 movss %xmm13, 144(%rsp) movss %xmm12, 136(%rsp) movss %xmm11, 128(%rsp) movss %xmm8, 88(%rsp) cvtsd2ss 248(%rsp), %xmm8 movss %xmm8, 80(%rsp) cvtsd2ss 240(%rsp), %xmm8 movss %xmm8, 72(%rsp) cvtsd2ss 232(%rsp), %xmm8 movss %xmm8, 64(%rsp) cvtsd2ss 224(%rsp), %xmm8 movss %xmm8, 56(%rsp) cvtsd2ss 216(%rsp), %xmm8 movss %xmm8, 48(%rsp) cvtsd2ss 208(%rsp), %xmm8 movss %xmm8, 40(%rsp) cvtsd2ss 200(%rsp), %xmm8 movss %xmm8, 32(%rsp) cvtsd2ss 192(%rsp), %xmm8 movss %xmm8, 24(%rsp) cvtsd2ss 184(%rsp), %xmm8 movss %xmm8, 16(%rsp) cvtsd2ss 176(%rsp), %xmm8 movss %xmm8, 8(%rsp) cvtsd2ss 168(%rsp), %xmm8 movl 276(%rsp), %edi movss %xmm8, (%rsp) call _Z61__device_stub__Z7computefifiifffffffPffffffffffS_S_fffffffffffifiifffffffPffffffffffS_S_ffffffffff addq $160, %rsp .cfi_def_cfa_offset 336 .L13: call cudaDeviceSynchronize@PLT addq $280, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z7computefifiifffffffPffffffffffS_S_ffffffffff" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2056: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z7computefifiifffffffPffffffffffS_S_ffffffffff(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2056: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7computefifiifffffffPffffffffffS_S_ffffffffff .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fca00078e00ff */ /*0010*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */ /* 0x000fe20007ffe0ff */ /*0020*/ ULDC UR4, c[0x0][0x20] ; /* 0x0000080000047ab9 */ /* 0x000fe20000000800 */ /*0030*/ MOV R0, c[0x0][0x164] ; /* 0x0000590000007a02 */ /* 0x000fe20000000f00 */ /*0040*/ ULDC UR10, c[0x0][0x24] ; /* 0x00000900000a7ab9 */ /* 0x000fe20000000800 */ /*0050*/ R2UR UR9, R1 ; /* 0x00000000010973c2 */ /* 0x000e2400000e0000 */ /*0060*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */ /* 0x000fe20003f06270 */ /*0070*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff007624 */ /* 0x000fe200078e00ff */ /*0080*/ UIADD3 UR9, UP0, UR9, UR4, URZ ; /* 0x0000000409097290 */ /* 0x001fc8000ff1e03f */ /*0090*/ UIADD3.X UR10, URZ, UR10, URZ, UP0, !UPT ; /* 0x0000000a3f0a7290 */ /* 0x000fce00087fe43f */ /*00a0*/ @!P0 BRA 0x2490 ; /* 0x000023e000008947 */ /* 0x000fea0003800000 */ /*00b0*/ ULDC UR4, c[0x0][0x1f0] ; /* 0x00007c0000047ab9 */ /* 0x000fe20000000800 */ /*00c0*/ MOV R3, 0x6dfa9ae ; /* 0x06dfa9ae00037802 */ /* 0x000fe20000000f00 */ /*00d0*/ IMAD.MOV.U32 R4, RZ, RZ, 0x7812819a ; /* 0x7812819aff047424 */ /* 0x000fe200078e00ff */ /*00e0*/ MOV R5, UR4 ; /* 0x0000000400057c02 */ /* 0x000fc60008000f00 */ /*00f0*/ FFMA R2, -R3, R4, 1 ; /* 0x3f80000003027423 */ /* 0x000fe20000000104 */ /*0100*/ FCHK P0, R5, -1.18859995831559858743e+34 ; /* 0xf812819a05007902 */ /* 0x000e260000000000 */ /*0110*/ FFMA R2, R2, -R3, -8.4132598767310362959e-35 ; /* 0x86dfa9ae02027423 */ /* 0x000fc80000000803 */ /*0120*/ FFMA R3, R2, c[0x0][0x1f0], RZ ; /* 0x00007c0002037a23 */ /* 0x000fc800000000ff */ /*0130*/ FFMA R4, R3, R4, c[0x0][0x1f0] ; /* 0x00007c0003047623 */ /* 0x000fc80000000004 */ /*0140*/ FFMA R10, R2, R4, R3 ; /* 0x00000004020a7223 */ /* 0x000fe20000000003 */ /*0150*/ @!P0 BRA 0x1b0 ; /* 0x0000005000008947 */ /* 0x001fea0003800000 */ /*0160*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x1f0] ; /* 0x00007c00ff037624 */ /* 0x000fe200078e00ff */ /*0170*/ MOV R4, 0xf812819a ; /* 0xf812819a00047802 */ /* 0x000fe40000000f00 */ /*0180*/ MOV R6, 0x1a0 ; /* 0x000001a000067802 */ /* 0x000fe40000000f00 */ /*0190*/ CALL.REL.NOINC 0x25a0 ; /* 0x0000240000007944 */ /* 0x000fea0003c00000 */ /*01a0*/ IMAD.MOV.U32 R10, RZ, RZ, R3 ; /* 0x000000ffff0a7224 */ /* 0x001fe400078e0003 */ /*01b0*/ MOV R4, c[0x0][0x1b8] ; /* 0x00006e0000047a02 */ /* 0x000fe20000000f00 */ /*01c0*/ ULDC UR4, c[0x0][0x1b4] ; /* 0x00006d0000047ab9 */ /* 0x000fe20000000800 */ /*01d0*/ FFMA R10, -RZ, R10, -c[0x0][0x1f4] ; /* 0x80007d00ff0a7623 */ /* 0x000fe2000000010a */ /*01e0*/ IMAD.U32 R7, RZ, RZ, UR4 ; /* 0x00000004ff077e24 */ /* 0x000fe4000f8e00ff */ /*01f0*/ FADD R4, -R4, -1.3378999751329553186e-15 ; /* 0xa6c0cfcc04047421 */ /* 0x000fe20000000100 */ /*0200*/ FADD R9, -R10, c[0x0][0x1ec] ; /* 0x00007b000a097621 */ /* 0x000fc60000000100 */ /*0210*/ MUFU.RCP R3, R4 ; /* 0x0000000400037308 */ /* 0x000e300000001000 */ /*0220*/ FCHK P0, R7, R4 ; /* 0x0000000407007302 */ /* 0x000e620000000000 */ /*0230*/ FFMA R2, -R4, R3, 1 ; /* 0x3f80000004027423 */ /* 0x001fc80000000103 */ /*0240*/ FFMA R2, R3, R2, R3 ; /* 0x0000000203027223 */ /* 0x000fe20000000003 */ /*0250*/ FADD R3, R9, R9 ; /* 0x0000000909037221 */ /* 0x000fc60000000000 */ /*0260*/ FFMA R5, R2, c[0x0][0x1b4], RZ ; /* 0x00006d0002057a23 */ /* 0x000fe400000000ff */ /*0270*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0x3c, !PT ; /* 0x7f80000003037812 */ /* 0x000fe400078e3cff */ /*0280*/ FFMA R6, -R4, R5, c[0x0][0x1b4] ; /* 0x00006d0004067623 */ /* 0x000fe40000000105 */ /*0290*/ LOP3.LUT R8, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03087812 */ /* 0x000fe400078ec0ff */ /*02a0*/ FFMA R5, R2, R6, R5 ; /* 0x0000000602057223 */ /* 0x000fe20000000005 */ /*02b0*/ @!P0 BRA 0x300 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*02c0*/ MOV R3, c[0x0][0x1b4] ; /* 0x00006d0000037a02 */ /* 0x000fe40000000f00 */ /*02d0*/ MOV R6, 0x2f0 ; /* 0x000002f000067802 */ /* 0x000fc40000000f00 */ /*02e0*/ CALL.REL.NOINC 0x25a0 ; /* 0x000022b000007944 */ /* 0x000fea0003c00000 */ /*02f0*/ IMAD.MOV.U32 R5, RZ, RZ, R3 ; /* 0x000000ffff057224 */ /* 0x001fc800078e0003 */ /*0300*/ MUFU.RCP R2, R5 ; /* 0x0000000500027308 */ /* 0x000e220000001000 */ /*0310*/ ULDC UR4, c[0x0][0x1b0] ; /* 0x00006c0000047ab9 */ /* 0x000fe20000000800 */ /*0320*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x1e4] ; /* 0x00007900ff0b7624 */ /* 0x000fe200078e00ff */ /*0330*/ MOV R4, UR4 ; /* 0x0000000400047c02 */ /* 0x000fc60008000f00 */ /*0340*/ FADD R11, R11, -c[0x0][0x1e8] ; /* 0x80007a000b0b7621 */ /* 0x000fe40000000000 */ /*0350*/ FCHK P0, R4, R5 ; /* 0x0000000504007302 */ /* 0x000e640000000000 */ /*0360*/ FADD R11, R11, c[0x0][0x1e0] ; /* 0x000078000b0b7621 */ /* 0x000fe20000000000 */ /*0370*/ FFMA R3, R2, -R5, 1 ; /* 0x3f80000002037423 */ /* 0x001fc80000000805 */ /*0380*/ FFMA R2, R2, R3, R2 ; /* 0x0000000302027223 */ /* 0x000fc80000000002 */ /*0390*/ FFMA R19, R2, c[0x0][0x1b0], RZ ; /* 0x00006c0002137a23 */ /* 0x000fc800000000ff */ /*03a0*/ FFMA R3, R19, -R5, c[0x0][0x1b0] ; /* 0x00006c0013037623 */ /* 0x000fc80000000805 */ /*03b0*/ FFMA R19, R2, R3, R19 ; /* 0x0000000302137223 */ /* 0x000fe20000000013 */ /*03c0*/ @!P0 BRA 0x420 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*03d0*/ MOV R4, R5 ; /* 0x0000000500047202 */ /* 0x000fe20000000f00 */ /*03e0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x1b0] ; /* 0x00006c00ff037624 */ /* 0x000fe200078e00ff */ /*03f0*/ MOV R6, 0x410 ; /* 0x0000041000067802 */ /* 0x000fe40000000f00 */ /*0400*/ CALL.REL.NOINC 0x25a0 ; /* 0x0000219000007944 */ /* 0x000fea0003c00000 */ /*0410*/ MOV R19, R3 ; /* 0x0000000300137202 */ /* 0x001fe40000000f00 */ /*0420*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x1dc] ; /* 0x00007700ff027624 */ /* 0x000fe200078e00ff */ /*0430*/ MOV R6, c[0x0][0x188] ; /* 0x0000620000067a02 */ /* 0x000fe20000000f00 */ /*0440*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff047624 */ /* 0x000fe200078e00ff */ /*0450*/ MOV R14, c[0x0][0x174] ; /* 0x00005d00000e7a02 */ /* 0x000fe20000000f00 */ /*0460*/ FADD R2, R2, 1.4618999907746617371e-35 ; /* 0x059b74b402027421 */ /* 0x000fe20000000000 */ /*0470*/ MOV R3, 0x5d245f3 ; /* 0x05d245f300037802 */ /* 0x000fe20000000f00 */ /*0480*/ FMUL R17, RZ, c[0x0][0x180] ; /* 0x00006000ff117a20 */ /* 0x000fe20000400000 */ /*0490*/ IMAD.MOV.U32 R18, RZ, RZ, c[0x0][0x1a8] ; /* 0x00006a00ff127624 */ /* 0x000fe200078e00ff */ /*04a0*/ FADD R2, R2, -1.55349996750270970454e+35 ; /* 0xf9ef5ac502027421 */ /* 0x000fe20000000000 */ /*04b0*/ FADD R4, -R4, -INF ; /* 0xff80000004047421 */ /* 0x000fe20000000100 */ /*04c0*/ FMUL R6, R6, c[0x0][0x18c] ; /* 0x0000630006067a20 */ /* 0x000fe20000400000 */ /*04d0*/ IMAD.MOV.U32 R15, RZ, RZ, c[0x0][0x1d0] ; /* 0x00007400ff0f7624 */ /* 0x000fe200078e00ff */ /*04e0*/ FADD R14, -R14, 1.6815581571897804851e-44 ; /* 0x0000000c0e0e7421 */ /* 0x000fe20000000100 */ /*04f0*/ FFMA R18, R18, -R3, c[0x0][0x1ac] ; /* 0x00006b0012127623 */ /* 0x000fe20000000803 */ /*0500*/ FFMA R17, R17, R4, R6 ; /* 0x0000000411117223 */ /* 0x000fe20000000006 */ /*0510*/ MOV R26, RZ ; /* 0x000000ff001a7202 */ /* 0x000fe20000000f00 */ /*0520*/ FADD R16, |R11|, -RZ ; /* 0x800000ff0b107221 */ /* 0x000fe20000000200 */ /*0530*/ FADD R15, R15, 1.4771000568254740044e-35 ; /* 0x059d127d0f0f7421 */ /* 0x000fe20000000000 */ /*0540*/ FFMA R14, RZ, R14, -1.34939996133002265884e+36 ; /* 0xfb81f147ff0e7423 */ /* 0x000fe2000000000e */ /*0550*/ LOP3.LUT R13, R2, 0x80000000, RZ, 0xc0, !PT ; /* 0x80000000020d7812 */ /* 0x000fe200078ec0ff */ /*0560*/ ULDC.64 UR14, c[0x0][0x118] ; /* 0x00004600000e7ab9 */ /* 0x000fc40000000a00 */ /*0570*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe200078e00ff */ /*0580*/ IADD3 R26, R26, 0x1, RZ ; /* 0x000000011a1a7810 */ /* 0x000fc60007ffe0ff */ /*0590*/ FADD R3, R2, -1.5746999522829321268e-35 ; /* 0x85a7736902037421 */ /* 0x000fe20000000000 */ /*05a0*/ ISETP.GE.AND P2, PT, R26, c[0x0][0x164], PT ; /* 0x000059001a007a0c */ /* 0x000fc80003f46270 */ /*05b0*/ FSETP.GT.AND P0, PT, R0, R3, PT ; /* 0x000000030000720b */ /* 0x000fda0003f04000 */ /*05c0*/ @!P0 BRA 0x2470 ; /* 0x00001ea000008947 */ /* 0x000fea0003800000 */ /*05d0*/ MOV R2, c[0x0][0x16c] ; /* 0x00005b0000027a02 */ /* 0x000fe20000000f00 */ /*05e0*/ FADD R0, R0, 1 ; /* 0x3f80000000007421 */ /* 0x000fc60000000000 */ /*05f0*/ ISETP.GE.AND P1, PT, R2, 0x1, PT ; /* 0x000000010200780c */ /* 0x000fe40003f26270 */ /*0600*/ FSETP.GE.AND P0, PT, R0, R14, PT ; /* 0x0000000e0000720b */ /* 0x000fc80003f06000 */ /*0610*/ FSEL R0, R0, R17, !P0 ; /* 0x0000001100007208 */ /* 0x000fce0004000000 */ /*0620*/ @!P1 BRA 0x14b0 ; /* 0x00000e8000009947 */ /* 0x000fea0003800000 */ /*0630*/ FMUL R0, |R18|.reuse, 2.8853900432586669922 ; /* 0x4038aa3b12007820 */ /* 0x040fe20000400200 */ /*0640*/ IMAD.MOV.U32 R4, RZ, RZ, 0x3c80f082 ; /* 0x3c80f082ff047424 */ /* 0x000fe200078e00ff */ /*0650*/ FMUL R5, R18.reuse, R18 ; /* 0x0000001212057220 */ /* 0x040fe20000400000 */ /*0660*/ MOV R3, 0x3f800000 ; /* 0x3f80000000037802 */ /* 0x000fe40000000f00 */ /*0670*/ FSETP.GE.AND P0, PT, |R18|.reuse, 9.010913848876953125, PT ; /* 0x41102cb41200780b */ /* 0x040fe20003f06200 */ /*0680*/ MUFU.EX2 R0, R0 ; /* 0x0000000000007308 */ /* 0x000e220000000800 */ /*0690*/ FFMA R4, R5, R4, -0.052303962409496307373 ; /* 0xbd563cae05047423 */ /* 0x000fe20000000004 */ /*06a0*/ FSETP.GE.AND P1, PT, |R18|, 0.60000002384185791016, PT ; /* 0x3f19999a1200780b */ /* 0x000fc60003f26200 */ /*06b0*/ FFMA R4, R4, R5, 0.1331529766321182251 ; /* 0x3e08594104047423 */ /* 0x000fe20000000005 */ /*06c0*/ FADD R2, R0, 1 ; /* 0x3f80000000027421 */ /* 0x001fc60000000000 */ /*06d0*/ FFMA R0, R4, R5, -0.33332768082618713379 ; /* 0xbeaaa9ed04007423 */ /* 0x000fc60000000005 */ /*06e0*/ MUFU.RCP R2, R2 ; /* 0x0000000200027308 */ /* 0x000e240000001000 */ /*06f0*/ FFMA R3, R2, -2, R3 ; /* 0xc000000002037823 */ /* 0x001fe20000000003 */ /*0700*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff027624 */ /* 0x000fc800078e00ff */ /*0710*/ FSEL R3, R3, 1, !P0 ; /* 0x3f80000003037808 */ /* 0x000fc80004000000 */ /*0720*/ LOP3.LUT R22, R3, 0x80000000, R18.reuse, 0xf8, !PT ; /* 0x8000000003167812 */ /* 0x100fe200078ef812 */ /*0730*/ FFMA R3, R0, R5, RZ ; /* 0x0000000500037223 */ /* 0x000fe200000000ff */ /*0740*/ LOP3.LUT R0, R2.reuse, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302007812 */ /* 0x040fe400078ec0ff */ /*0750*/ IADD3 R2, R2, -0x1, RZ ; /* 0xffffffff02027810 */ /* 0x000fe20007ffe0ff */ /*0760*/ @!P1 FFMA R22, R18, R3, R18 ; /* 0x0000000312169223 */ /* 0x000fe20000000012 */ /*0770*/ IADD3 R4, -R0, c[0x0][0x16c], RZ ; /* 0x00005b0000047a10 */ /* 0x000fca0007ffe1ff */ /*0780*/ FRND.FLOOR R22, R22 ; /* 0x0000001600167307 */ /* 0x000e240000205000 */ /*0790*/ FSETP.NEU.AND P0, PT, |R22|.reuse, +INF , PT ; /* 0x7f8000001600780b */ /* 0x041fe20003f0d200 */ /*07a0*/ FADD R23, R22.reuse, R22 ; /* 0x0000001616177221 */ /* 0x040fe20000000000 */ /*07b0*/ FSETP.GT.AND P1, PT, |R22|.reuse, RZ, PT ; /* 0x000000ff1600720b */ /* 0x040fe40003f24200 */ /*07c0*/ FSETP.EQ.OR P0, PT, |R22|.reuse, RZ, !P0 ; /* 0x000000ff1600720b */ /* 0x040fe40004702600 */ /*07d0*/ FSEL R23, R22, R23, P1 ; /* 0x0000001716177208 */ /* 0x000fd60000800000 */ /*07e0*/ @P0 BRA 0xd90 ; /* 0x000005a000000947 */ /* 0x000fea0003800000 */ /*07f0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */ /* 0x000fe40003f06070 */ /*0800*/ MOV R24, RZ ; /* 0x000000ff00187202 */ /* 0x000fd60000000f00 */ /*0810*/ @!P0 BRA 0xc80 ; /* 0x0000046000008947 */ /* 0x000fea0003800000 */ /*0820*/ ISETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe20003f04270 */ /*0830*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x1a4] ; /* 0x00006900ff037624 */ /* 0x000fe200078e00ff */ /*0840*/ FMUL R2, R22, 4 ; /* 0x4080000016027820 */ /* 0x000fe20000400000 */ /*0850*/ MOV R5, c[0x0][0x19c] ; /* 0x0000670000057a02 */ /* 0x000fe20000000f00 */ /*0860*/ IMAD.MOV.U32 R23, RZ, RZ, R4 ; /* 0x000000ffff177224 */ /* 0x000fe200078e0004 */ /*0870*/ MOV R24, RZ ; /* 0x000000ff00187202 */ /* 0x000fe20000000f00 */ /*0880*/ FFMA R2, -R2, R3, c[0x0][0x1a0] ; /* 0x0000680002027623 */ /* 0x000fc80000000103 */ /*0890*/ FFMA R12, |R2|, R5, c[0x0][0x198] ; /* 0x00006600020c7623 */ /* 0x000fc60000000205 */ /*08a0*/ @!P0 BRA 0xbe0 ; /* 0x0000033000008947 */ /* 0x000fea0003800000 */ /*08b0*/ ISETP.GT.AND P1, PT, R23, 0xc, PT ; /* 0x0000000c1700780c */ /* 0x000fe40003f24270 */ /*08c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*08d0*/ @!P1 BRA 0xab0 ; /* 0x000001d000009947 */ /* 0x000fea0003800000 */ /*08e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*08f0*/ IMAD.MOV.U32 R21, RZ, RZ, 0x4 ; /* 0x00000004ff157424 */ /* 0x001fe200078e00ff */ /*0900*/ IADD3 R2, R24.reuse, 0x4, RZ ; /* 0x0000000418027810 */ /* 0x040fe40007ffe0ff */ /*0910*/ IADD3 R4, R24.reuse, 0x8, RZ ; /* 0x0000000818047810 */ /* 0x040fe20007ffe0ff */ /*0920*/ IMAD.WIDE R6, R24.reuse, R21.reuse, c[0x0][0x190] ; /* 0x0000640018067625 */ /* 0x0c0fe200078e0215 */ /*0930*/ IADD3 R20, R24, 0xc, RZ ; /* 0x0000000c18147810 */ /* 0x000fe40007ffe0ff */ /*0940*/ IADD3 R23, R23, -0x10, RZ ; /* 0xfffffff017177810 */ /* 0x000fe20007ffe0ff */ /*0950*/ IMAD.WIDE R2, R2, R21, c[0x0][0x190] ; /* 0x0000640002027625 */ /* 0x000fe200078e0215 */ /*0960*/ STG.E [R6.64], R12 ; /* 0x0000000c06007986 */ /* 0x0001e2000c10190e */ /*0970*/ IADD3 R24, R24, 0x10, RZ ; /* 0x0000001018187810 */ /* 0x000fc40007ffe0ff */ /*0980*/ IMAD.WIDE R4, R4, R21.reuse, c[0x0][0x190] ; /* 0x0000640004047625 */ /* 0x080fe200078e0215 */ /*0990*/ STG.E [R6.64+0x4], R12 ; /* 0x0000040c06007986 */ /* 0x0001e2000c10190e */ /*09a0*/ ISETP.GT.AND P1, PT, R23, 0xc, PT ; /* 0x0000000c1700780c */ /* 0x000fe40003f24270 */ /*09b0*/ IMAD.WIDE R20, R20, R21, c[0x0][0x190] ; /* 0x0000640014147625 */ /* 0x000fe200078e0215 */ /*09c0*/ STG.E [R6.64+0x8], R12 ; /* 0x0000080c06007986 */ /* 0x0001e8000c10190e */ /*09d0*/ STG.E [R6.64+0xc], R12 ; /* 0x00000c0c06007986 */ /* 0x0001e8000c10190e */ /*09e0*/ STG.E [R2.64], R12 ; /* 0x0000000c02007986 */ /* 0x0001e8000c10190e */ /*09f0*/ STG.E [R2.64+0x4], R12 ; /* 0x0000040c02007986 */ /* 0x0001e8000c10190e */ /*0a00*/ STG.E [R2.64+0x8], R12 ; /* 0x0000080c02007986 */ /* 0x0001e8000c10190e */ /*0a10*/ STG.E [R2.64+0xc], R12 ; /* 0x00000c0c02007986 */ /* 0x0001e8000c10190e */ /*0a20*/ STG.E [R4.64], R12 ; /* 0x0000000c04007986 */ /* 0x0001e8000c10190e */ /*0a30*/ STG.E [R4.64+0x4], R12 ; /* 0x0000040c04007986 */ /* 0x0001e8000c10190e */ /*0a40*/ STG.E [R4.64+0x8], R12 ; /* 0x0000080c04007986 */ /* 0x0001e8000c10190e */ /*0a50*/ STG.E [R4.64+0xc], R12 ; /* 0x00000c0c04007986 */ /* 0x0001e8000c10190e */ /*0a60*/ STG.E [R20.64], R12 ; /* 0x0000000c14007986 */ /* 0x0001e8000c10190e */ /*0a70*/ STG.E [R20.64+0x4], R12 ; /* 0x0000040c14007986 */ /* 0x0001e8000c10190e */ /*0a80*/ STG.E [R20.64+0x8], R12 ; /* 0x0000080c14007986 */ /* 0x0001e8000c10190e */ /*0a90*/ STG.E [R20.64+0xc], R12 ; /* 0x00000c0c14007986 */ /* 0x0001e2000c10190e */ /*0aa0*/ @P1 BRA 0x8f0 ; /* 0xfffffe4000001947 */ /* 0x000fea000383ffff */ /*0ab0*/ ISETP.GT.AND P1, PT, R23, 0x4, PT ; /* 0x000000041700780c */ /* 0x000fda0003f24270 */ /*0ac0*/ @!P1 BRA 0xbc0 ; /* 0x000000f000009947 */ /* 0x000fea0003800000 */ /*0ad0*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x001fe40000000f00 */ /*0ae0*/ IADD3 R4, R24.reuse, 0x4, RZ ; /* 0x0000000418047810 */ /* 0x040fe40007ffe0ff */ /*0af0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*0b00*/ IMAD.WIDE R2, R24.reuse, R5.reuse, c[0x0][0x190] ; /* 0x0000640018027625 */ /* 0x0c0fe200078e0205 */ /*0b10*/ IADD3 R23, R23, -0x8, RZ ; /* 0xfffffff817177810 */ /* 0x000fe40007ffe0ff */ /*0b20*/ IADD3 R24, R24, 0x8, RZ ; /* 0x0000000818187810 */ /* 0x000fe20007ffe0ff */ /*0b30*/ IMAD.WIDE R4, R4, R5, c[0x0][0x190] ; /* 0x0000640004047625 */ /* 0x000fe200078e0205 */ /*0b40*/ STG.E [R2.64], R12 ; /* 0x0000000c02007986 */ /* 0x0001e8000c10190e */ /*0b50*/ STG.E [R2.64+0x4], R12 ; /* 0x0000040c02007986 */ /* 0x0001e8000c10190e */ /*0b60*/ STG.E [R2.64+0x8], R12 ; /* 0x0000080c02007986 */ /* 0x0001e8000c10190e */ /*0b70*/ STG.E [R2.64+0xc], R12 ; /* 0x00000c0c02007986 */ /* 0x0001e8000c10190e */ /*0b80*/ STG.E [R4.64], R12 ; /* 0x0000000c04007986 */ /* 0x0001e8000c10190e */ /*0b90*/ STG.E [R4.64+0x4], R12 ; /* 0x0000040c04007986 */ /* 0x0001e8000c10190e */ /*0ba0*/ STG.E [R4.64+0x8], R12 ; /* 0x0000080c04007986 */ /* 0x0001e8000c10190e */ /*0bb0*/ STG.E [R4.64+0xc], R12 ; /* 0x00000c0c04007986 */ /* 0x0001e4000c10190e */ /*0bc0*/ ISETP.NE.OR P0, PT, R23, RZ, P0 ; /* 0x000000ff1700720c */ /* 0x000fda0000705670 */ /*0bd0*/ @!P0 BRA 0xc80 ; /* 0x000000a000008947 */ /* 0x000fea0003800000 */ /*0be0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x001fc800078e00ff */ /*0bf0*/ IMAD.WIDE R2, R24.reuse, R5, c[0x0][0x190] ; /* 0x0000640018027625 */ /* 0x041fe200078e0205 */ /*0c00*/ IADD3 R23, R23, -0x4, RZ ; /* 0xfffffffc17177810 */ /* 0x000fe40007ffe0ff */ /*0c10*/ IADD3 R24, R24, 0x4, RZ ; /* 0x0000000418187810 */ /* 0x000fe40007ffe0ff */ /*0c20*/ STG.E [R2.64], R12 ; /* 0x0000000c02007986 */ /* 0x0001e2000c10190e */ /*0c30*/ ISETP.NE.AND P0, PT, R23, RZ, PT ; /* 0x000000ff1700720c */ /* 0x000fc60003f05270 */ /*0c40*/ STG.E [R2.64+0x4], R12 ; /* 0x0000040c02007986 */ /* 0x0001e8000c10190e */ /*0c50*/ STG.E [R2.64+0x8], R12 ; /* 0x0000080c02007986 */ /* 0x0001e8000c10190e */ /*0c60*/ STG.E [R2.64+0xc], R12 ; /* 0x00000c0c02007986 */ /* 0x0001e4000c10190e */ /*0c70*/ @P0 BRA 0xbf0 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*0c80*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*0c90*/ @!P0 BRA 0x12f0 ; /* 0x0000065000008947 */ /* 0x000fea0003800000 */ /*0ca0*/ MOV R3, c[0x0][0x1a4] ; /* 0x0000690000037a02 */ /* 0x001fe20000000f00 */ /*0cb0*/ FMUL R22, R22, 4 ; /* 0x4080000016167820 */ /* 0x000fe20000400000 */ /*0cc0*/ MOV R12, c[0x0][0x19c] ; /* 0x00006700000c7a02 */ /* 0x000fe20000000f00 */ /*0cd0*/ IMAD.MOV.U32 R25, RZ, RZ, 0x4 ; /* 0x00000004ff197424 */ /* 0x000fe200078e00ff */ /*0ce0*/ ISETP.NE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */ /* 0x000fe20003f05270 */ /*0cf0*/ FFMA R3, -R22, R3, c[0x0][0x1a0] ; /* 0x0000680016037623 */ /* 0x000fe40000000103 */ /*0d00*/ IMAD.WIDE R24, R24, R25, c[0x0][0x190] ; /* 0x0000640018187625 */ /* 0x000fe400078e0219 */ /*0d10*/ FFMA R12, |R3|, R12, c[0x0][0x198] ; /* 0x00006600030c7623 */ /* 0x000fca000000020c */ /*0d20*/ STG.E [R24.64], R12 ; /* 0x0000000c18007986 */ /* 0x0001e6000c10190e */ /*0d30*/ @!P0 BRA 0x12f0 ; /* 0x000005b000008947 */ /* 0x000fea0003800000 */ /*0d40*/ STG.E [R24.64+0x4], R12 ; /* 0x0000040c18007986 */ /* 0x0003e2000c10190e */ /*0d50*/ ISETP.NE.AND P0, PT, R0, 0x2, PT ; /* 0x000000020000780c */ /* 0x000fda0003f05270 */ /*0d60*/ @!P0 BRA 0x12f0 ; /* 0x0000058000008947 */ /* 0x000fea0003800000 */ /*0d70*/ STG.E [R24.64+0x8], R12 ; /* 0x0000080c18007986 */ /* 0x0023e2000c10190e */ /*0d80*/ BRA 0x12f0 ; /* 0x0000056000007947 */ /* 0x000fea0003800000 */ /*0d90*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */ /* 0x000fe20003f06070 */ /*0da0*/ IMAD.MOV.U32 R24, RZ, RZ, RZ ; /* 0x000000ffff187224 */ /* 0x000fd800078e00ff */ /*0db0*/ @!P0 BRA 0x1210 ; /* 0x0000045000008947 */ /* 0x000fea0003800000 */ /*0dc0*/ ISETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe20003f04270 */ /*0dd0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x19c] ; /* 0x00006700ff037624 */ /* 0x000fe200078e00ff */ /*0de0*/ MOV R12, c[0x0][0x1a4] ; /* 0x00006900000c7a02 */ /* 0x000fe20000000f00 */ /*0df0*/ IMAD.MOV.U32 R24, RZ, RZ, RZ ; /* 0x000000ffff187224 */ /* 0x000fe200078e00ff */ /*0e00*/ MOV R22, R4 ; /* 0x0000000400167202 */ /* 0x000fc60000000f00 */ /*0e10*/ FFMA R12, -R23, R12, c[0x0][0x1a0] ; /* 0x00006800170c7623 */ /* 0x000fc8000000010c */ /*0e20*/ FFMA R12, |R12|, R3, c[0x0][0x198] ; /* 0x000066000c0c7623 */ /* 0x000fe40000000203 */ /*0e30*/ @!P0 BRA 0x1170 ; /* 0x0000033000008947 */ /* 0x000fea0003800000 */ /*0e40*/ ISETP.GT.AND P1, PT, R22, 0xc, PT ; /* 0x0000000c1600780c */ /* 0x000fe40003f24270 */ /*0e50*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*0e60*/ @!P1 BRA 0x1040 ; /* 0x000001d000009947 */ /* 0x000fea0003800000 */ /*0e70*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0e80*/ MOV R21, 0x4 ; /* 0x0000000400157802 */ /* 0x001fe40000000f00 */ /*0e90*/ IADD3 R2, R24.reuse, 0x4, RZ ; /* 0x0000000418027810 */ /* 0x040fe40007ffe0ff */ /*0ea0*/ IADD3 R4, R24.reuse, 0x8, RZ ; /* 0x0000000818047810 */ /* 0x040fe20007ffe0ff */ /*0eb0*/ IMAD.WIDE R6, R24.reuse, R21.reuse, c[0x0][0x190] ; /* 0x0000640018067625 */ /* 0x0c0fe200078e0215 */ /*0ec0*/ IADD3 R20, R24, 0xc, RZ ; /* 0x0000000c18147810 */ /* 0x000fe40007ffe0ff */ /*0ed0*/ IADD3 R22, R22, -0x10, RZ ; /* 0xfffffff016167810 */ /* 0x000fe20007ffe0ff */ /*0ee0*/ IMAD.WIDE R2, R2, R21, c[0x0][0x190] ; /* 0x0000640002027625 */ /* 0x000fe200078e0215 */ /*0ef0*/ STG.E [R6.64], R12 ; /* 0x0000000c06007986 */ /* 0x0001e2000c10190e */ /*0f00*/ IADD3 R24, R24, 0x10, RZ ; /* 0x0000001018187810 */ /* 0x000fc40007ffe0ff */ /*0f10*/ IMAD.WIDE R4, R4, R21.reuse, c[0x0][0x190] ; /* 0x0000640004047625 */ /* 0x080fe200078e0215 */ /*0f20*/ STG.E [R6.64+0x4], R12 ; /* 0x0000040c06007986 */ /* 0x0001e2000c10190e */ /*0f30*/ ISETP.GT.AND P1, PT, R22, 0xc, PT ; /* 0x0000000c1600780c */ /* 0x000fe40003f24270 */ /*0f40*/ IMAD.WIDE R20, R20, R21, c[0x0][0x190] ; /* 0x0000640014147625 */ /* 0x000fe200078e0215 */ /*0f50*/ STG.E [R6.64+0x8], R12 ; /* 0x0000080c06007986 */ /* 0x0001e8000c10190e */ /*0f60*/ STG.E [R6.64+0xc], R12 ; /* 0x00000c0c06007986 */ /* 0x0001e8000c10190e */ /*0f70*/ STG.E [R2.64], R12 ; /* 0x0000000c02007986 */ /* 0x0001e8000c10190e */ /*0f80*/ STG.E [R2.64+0x4], R12 ; /* 0x0000040c02007986 */ /* 0x0001e8000c10190e */ /*0f90*/ STG.E [R2.64+0x8], R12 ; /* 0x0000080c02007986 */ /* 0x0001e8000c10190e */ /*0fa0*/ STG.E [R2.64+0xc], R12 ; /* 0x00000c0c02007986 */ /* 0x0001e8000c10190e */ /*0fb0*/ STG.E [R4.64], R12 ; /* 0x0000000c04007986 */ /* 0x0001e8000c10190e */ /*0fc0*/ STG.E [R4.64+0x4], R12 ; /* 0x0000040c04007986 */ /* 0x0001e8000c10190e */ /*0fd0*/ STG.E [R4.64+0x8], R12 ; /* 0x0000080c04007986 */ /* 0x0001e8000c10190e */ /*0fe0*/ STG.E [R4.64+0xc], R12 ; /* 0x00000c0c04007986 */ /* 0x0001e8000c10190e */ /*0ff0*/ STG.E [R20.64], R12 ; /* 0x0000000c14007986 */ /* 0x0001e8000c10190e */ /*1000*/ STG.E [R20.64+0x4], R12 ; /* 0x0000040c14007986 */ /* 0x0001e8000c10190e */ /*1010*/ STG.E [R20.64+0x8], R12 ; /* 0x0000080c14007986 */ /* 0x0001e8000c10190e */ /*1020*/ STG.E [R20.64+0xc], R12 ; /* 0x00000c0c14007986 */ /* 0x0001e2000c10190e */ /*1030*/ @P1 BRA 0xe80 ; /* 0xfffffe4000001947 */ /* 0x000fea000383ffff */ /*1040*/ ISETP.GT.AND P1, PT, R22, 0x4, PT ; /* 0x000000041600780c */ /* 0x000fda0003f24270 */ /*1050*/ @!P1 BRA 0x1150 ; /* 0x000000f000009947 */ /* 0x000fea0003800000 */ /*1060*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x001fe200078e00ff */ /*1070*/ IADD3 R4, R24.reuse, 0x4, RZ ; /* 0x0000000418047810 */ /* 0x040fe40007ffe0ff */ /*1080*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*1090*/ IMAD.WIDE R2, R24, R5.reuse, c[0x0][0x190] ; /* 0x0000640018027625 */ /* 0x080fe200078e0205 */ /*10a0*/ IADD3 R22, R22, -0x8, RZ ; /* 0xfffffff816167810 */ /* 0x000fe40007ffe0ff */ /*10b0*/ IADD3 R24, R24, 0x8, RZ ; /* 0x0000000818187810 */ /* 0x000fe20007ffe0ff */ /*10c0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x190] ; /* 0x0000640004047625 */ /* 0x000fe200078e0205 */ /*10d0*/ STG.E [R2.64], R12 ; /* 0x0000000c02007986 */ /* 0x0001e8000c10190e */ /*10e0*/ STG.E [R2.64+0x4], R12 ; /* 0x0000040c02007986 */ /* 0x0001e8000c10190e */ /*10f0*/ STG.E [R2.64+0x8], R12 ; /* 0x0000080c02007986 */ /* 0x0001e8000c10190e */ /*1100*/ STG.E [R2.64+0xc], R12 ; /* 0x00000c0c02007986 */ /* 0x0001e8000c10190e */ /*1110*/ STG.E [R4.64], R12 ; /* 0x0000000c04007986 */ /* 0x0001e8000c10190e */ /*1120*/ STG.E [R4.64+0x4], R12 ; /* 0x0000040c04007986 */ /* 0x0001e8000c10190e */ /*1130*/ STG.E [R4.64+0x8], R12 ; /* 0x0000080c04007986 */ /* 0x0001e8000c10190e */ /*1140*/ STG.E [R4.64+0xc], R12 ; /* 0x00000c0c04007986 */ /* 0x0001e4000c10190e */ /*1150*/ ISETP.NE.OR P0, PT, R22, RZ, P0 ; /* 0x000000ff1600720c */ /* 0x000fda0000705670 */ /*1160*/ @!P0 BRA 0x1210 ; /* 0x000000a000008947 */ /* 0x000fea0003800000 */ /*1170*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x001fca0000000f00 */ /*1180*/ IMAD.WIDE R2, R24, R5, c[0x0][0x190] ; /* 0x0000640018027625 */ /* 0x001fe200078e0205 */ /*1190*/ IADD3 R22, R22, -0x4, RZ ; /* 0xfffffffc16167810 */ /* 0x000fe40007ffe0ff */ /*11a0*/ IADD3 R24, R24, 0x4, RZ ; /* 0x0000000418187810 */ /* 0x000fe40007ffe0ff */ /*11b0*/ STG.E [R2.64], R12 ; /* 0x0000000c02007986 */ /* 0x0001e2000c10190e */ /*11c0*/ ISETP.NE.AND P0, PT, R22, RZ, PT ; /* 0x000000ff1600720c */ /* 0x000fc60003f05270 */ /*11d0*/ STG.E [R2.64+0x4], R12 ; /* 0x0000040c02007986 */ /* 0x0001e8000c10190e */ /*11e0*/ STG.E [R2.64+0x8], R12 ; /* 0x0000080c02007986 */ /* 0x0001e8000c10190e */ /*11f0*/ STG.E [R2.64+0xc], R12 ; /* 0x00000c0c02007986 */ /* 0x0001e4000c10190e */ /*1200*/ @P0 BRA 0x1180 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*1210*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*1220*/ @!P0 BRA 0x12f0 ; /* 0x000000c000008947 */ /* 0x000fea0003800000 */ /*1230*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x1a4] ; /* 0x00006900ff027624 */ /* 0x001fe200078e00ff */ /*1240*/ MOV R25, 0x4 ; /* 0x0000000400197802 */ /* 0x000fe20000000f00 */ /*1250*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x19c] ; /* 0x00006700ff037624 */ /* 0x000fe200078e00ff */ /*1260*/ ISETP.NE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */ /* 0x000fe20003f05270 */ /*1270*/ FFMA R2, -R23, R2, c[0x0][0x1a0] ; /* 0x0000680017027623 */ /* 0x000fe40000000102 */ /*1280*/ IMAD.WIDE R24, R24, R25, c[0x0][0x190] ; /* 0x0000640018187625 */ /* 0x000fe400078e0219 */ /*1290*/ FFMA R12, |R2|, R3, c[0x0][0x198] ; /* 0x00006600020c7623 */ /* 0x000fca0000000203 */ /*12a0*/ STG.E [R24.64], R12 ; /* 0x0000000c18007986 */ /* 0x0001e6000c10190e */ /*12b0*/ @!P0 BRA 0x12f0 ; /* 0x0000003000008947 */ /* 0x000fea0003800000 */ /*12c0*/ ISETP.NE.AND P0, PT, R0, 0x2, PT ; /* 0x000000020000780c */ /* 0x000fe20003f05270 */ /*12d0*/ STG.E [R24.64+0x4], R12 ; /* 0x0000040c18007986 */ /* 0x0003d8000c10190e */ /*12e0*/ @P0 STG.E [R24.64+0x8], R12 ; /* 0x0000080c18000986 */ /* 0x0003e4000c10190e */ /*12f0*/ MUFU.RCP R3, R12 ; /* 0x0000000c00037308 */ /* 0x003e220000001000 */ /*1300*/ UMOV UR4, 0x6afeeba7 ; /* 0x6afeeba700047882 */ /* 0x000fe40000000000 */ /*1310*/ MOV R5, UR4 ; /* 0x0000000400057c02 */ /* 0x000fca0008000f00 */ /*1320*/ FCHK P0, -R5, R12 ; /* 0x0000000c05007302 */ /* 0x000e620000000100 */ /*1330*/ FFMA R0, -R12, R3, 1 ; /* 0x3f8000000c007423 */ /* 0x001fc80000000103 */ /*1340*/ FFMA R0, R3, R0, R3 ; /* 0x0000000003007223 */ /* 0x000fc80000000003 */ /*1350*/ FFMA R3, R0, -1.54089997455925243248e+26, RZ ; /* 0xeafeeba700037823 */ /* 0x000fc800000000ff */ /*1360*/ FFMA R2, -R12, R3, -1.54089997455925243248e+26 ; /* 0xeafeeba70c027423 */ /* 0x000fc80000000103 */ /*1370*/ FFMA R3, R0, R2, R3 ; /* 0x0000000200037223 */ /* 0x000fe20000000003 */ /*1380*/ @!P0 BRA 0x13d0 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*1390*/ IMAD.MOV.U32 R3, RZ, RZ, -0x15011459 ; /* 0xeafeeba7ff037424 */ /* 0x000fe200078e00ff */ /*13a0*/ MOV R4, R12 ; /* 0x0000000c00047202 */ /* 0x000fe40000000f00 */ /*13b0*/ MOV R6, 0x13d0 ; /* 0x000013d000067802 */ /* 0x000fe40000000f00 */ /*13c0*/ CALL.REL.NOINC 0x25a0 ; /* 0x000011d000007944 */ /* 0x000fea0003c00000 */ /*13d0*/ MOV R0, 0x5892d24 ; /* 0x05892d2400007802 */ /* 0x000fe20000000f00 */ /*13e0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x796ee002 ; /* 0x796ee002ff057424 */ /* 0x000fe200078e00ff */ /*13f0*/ FCHK P0, R3, 1.2900000131787298375e-35 ; /* 0x05892d2403007902 */ /* 0x001e260000000000 */ /*1400*/ FFMA R0, R5, -R0, 1 ; /* 0x3f80000005007423 */ /* 0x000fc80000000800 */ /*1410*/ FFMA R0, R0, R5, 7.75193794086769986434e+34 ; /* 0x796ee00200007423 */ /* 0x000fc80000000005 */ /*1420*/ FFMA R2, R0, R3, RZ ; /* 0x0000000300027223 */ /* 0x000fc800000000ff */ /*1430*/ FFMA R5, R2, -1.2900000131787298375e-35, R3 ; /* 0x85892d2402057823 */ /* 0x000fc80000000003 */ /*1440*/ FFMA R0, R0, R5, R2 ; /* 0x0000000500007223 */ /* 0x000fe20000000002 */ /*1450*/ @!P0 BRA 0x14a0 ; /* 0x0000004000008947 */ /* 0x001fea0003800000 */ /*1460*/ IMAD.MOV.U32 R4, RZ, RZ, 0x5892d24 ; /* 0x05892d24ff047424 */ /* 0x000fe200078e00ff */ /*1470*/ MOV R6, 0x1490 ; /* 0x0000149000067802 */ /* 0x000fe40000000f00 */ /*1480*/ CALL.REL.NOINC 0x25a0 ; /* 0x0000111000007944 */ /* 0x000fea0003c00000 */ /*1490*/ MOV R0, R3 ; /* 0x0000000300007202 */ /* 0x001fca0000000f00 */ /*14a0*/ FADD R0, R0, R19 ; /* 0x0000001300007221 */ /* 0x000fe40000000000 */ /*14b0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff027624 */ /* 0x000fca00078e00ff */ /*14c0*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */ /* 0x000fda0003f06270 */ /*14d0*/ @!P0 BRA 0x2470 ; /* 0x00000f9000008947 */ /* 0x000fea0003800000 */ /*14e0*/ FMUL R2, |R9|.reuse, 16777216 ; /* 0x4b80000009027820 */ /* 0x040fe20000400200 */ /*14f0*/ FSETP.GEU.AND P0, PT, |R9|, 1.175494350822287508e-38, PT ; /* 0x008000000900780b */ /* 0x000fe20003f0e200 */ /*1500*/ IMAD.MOV.U32 R6, RZ, RZ, 0x3f000000 ; /* 0x3f000000ff067424 */ /* 0x000fe200078e00ff */ /*1510*/ MOV R22, 0x3a2c32e4 ; /* 0x3a2c32e400167802 */ /* 0x000fe20000000f00 */ /*1520*/ IMAD.MOV.U32 R24, RZ, RZ, 0x3d10ecef ; /* 0x3d10ecefff187424 */ /* 0x000fe200078e00ff */ /*1530*/ FSEL R2, R2, |R9|, !P0 ; /* 0x4000000902027208 */ /* 0x000fe20004000000 */ /*1540*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*1550*/ FSETP.GT.AND P3, PT, |R15|, 0.56000000238418579102, PT ; /* 0x3f0f5c290f00780b */ /* 0x000fe40003f64200 */ /*1560*/ IADD3 R3, R2, -0x3f3504f3, RZ ; /* 0xc0cafb0d02037810 */ /* 0x000fc80007ffe0ff */ /*1570*/ LOP3.LUT R3, R3, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000003037812 */ /* 0x000fc800078ec0ff */ /*1580*/ IADD3 R2, R2, -R3.reuse, RZ ; /* 0x8000000302027210 */ /* 0x080fe40007ffe0ff */ /*1590*/ I2FP.F32.S32 R5, R3 ; /* 0x0000000300057245 */ /* 0x000fc60000201400 */ /*15a0*/ FADD R7, R2.reuse, 1 ; /* 0x3f80000002077421 */ /* 0x040fe20000000000 */ /*15b0*/ FADD R20, R2, -1 ; /* 0xbf80000002147421 */ /* 0x000fe20000000000 */ /*15c0*/ FSEL R2, RZ, -24, P0 ; /* 0xc1c00000ff027808 */ /* 0x000fe40000000000 */ /*15d0*/ FSETP.NEU.AND P0, PT, |R15|, 1, PT ; /* 0x3f8000000f00780b */ /* 0x000fe20003f0d200 */ /*15e0*/ FADD R4, R20, R20 ; /* 0x0000001414047221 */ /* 0x000fe20000000000 */ /*15f0*/ MUFU.RCP R7, R7 ; /* 0x0000000700077308 */ /* 0x000e260000001000 */ /*1600*/ FMUL R3, R7, R4 ; /* 0x0000000407037220 */ /* 0x001fe20000400000 */ /*1610*/ FFMA R4, -|R15|, R6, 0.5 ; /* 0x3f0000000f047423 */ /* 0x000fe20000000306 */ /*1620*/ FFMA R6, R5, 1.1920928955078125e-07, R2 ; /* 0x3400000005067823 */ /* 0x000fc40000000002 */ /*1630*/ FADD R2, R20, -R3 ; /* 0x8000000314027221 */ /* 0x000fe20000000000 */ /*1640*/ FMUL R21, R3.reuse, R3.reuse ; /* 0x0000000303157220 */ /* 0x0c0fe20000400000 */ /*1650*/ MUFU.RSQ R5, R4 ; /* 0x0000000400057308 */ /* 0x000e240000001400 */ /*1660*/ FADD R23, R2, R2 ; /* 0x0000000202177221 */ /* 0x000fe20000000000 */ /*1670*/ FFMA R2, R3, 1.4426950216293334961, R6 ; /* 0x3fb8aa3b03027823 */ /* 0x000fe20000000006 */ /*1680*/ FFMA R22, R21.reuse, R22, 0.0032181653659790754318 ; /* 0x3b52e7db15167423 */ /* 0x040fe40000000016 */ /*1690*/ FFMA R20, R20, -R3, R23 ; /* 0x8000000314147223 */ /* 0x000fe20000000017 */ /*16a0*/ FADD R6, R6, -R2 ; /* 0x8000000206067221 */ /* 0x000fe20000000000 */ /*16b0*/ FFMA R22, R21, R22, 0.018033718690276145935 ; /* 0x3c93bb7315167423 */ /* 0x000fc40000000016 */ /*16c0*/ FMUL R20, R7, R20 ; /* 0x0000001407147220 */ /* 0x000fe20000400000 */ /*16d0*/ FFMA R7, R3, 1.4426950216293334961, R6 ; /* 0x3fb8aa3b03077823 */ /* 0x000fe20000000006 */ /*16e0*/ FFMA R22, R21, R22, 0.12022458761930465698 ; /* 0x3df6384f15167423 */ /* 0x000fc60000000016 */ /*16f0*/ FFMA R6, R20, 1.4426950216293334961, R7 ; /* 0x3fb8aa3b14067823 */ /* 0x000fe20000000007 */ /*1700*/ FMUL R22, R21, R22 ; /* 0x0000001615167220 */ /* 0x000fe20000400000 */ /*1710*/ FMUL R4, R4, R5 ; /* 0x0000000504047220 */ /* 0x001fe20000400000 */ /*1720*/ FMUL R5, R5, 0.5 ; /* 0x3f00000005057820 */ /* 0x000fe20000400000 */ /*1730*/ FFMA R7, R3, 1.9251366722983220825e-08, R6 ; /* 0x32a55e3403077823 */ /* 0x000fe20000000006 */ /*1740*/ FMUL R6, R22, 3 ; /* 0x4040000016067820 */ /* 0x000fe20000400000 */ /*1750*/ MOV R21, 0x391fcb8e ; /* 0x391fcb8e00157802 */ /* 0x000fe20000000f00 */ /*1760*/ FFMA R5, -R4, R5, 0.5 ; /* 0x3f00000004057423 */ /* 0x000fe40000000105 */ /*1770*/ FFMA R6, R20, R6, R7 ; /* 0x0000000614067223 */ /* 0x000fe40000000007 */ /*1780*/ FFMA R5, R4, R5, R4 ; /* 0x0000000504057223 */ /* 0x000fc40000000004 */ /*1790*/ FFMA R7, R3, R22, R6 ; /* 0x0000001603077223 */ /* 0x000fc60000000006 */ /*17a0*/ FSEL R4, R5, RZ, P0 ; /* 0x000000ff05047208 */ /* 0x000fe20000000000 */ /*17b0*/ FADD R6, R2, R7 ; /* 0x0000000702067221 */ /* 0x000fe20000000000 */ /*17c0*/ FSETP.GT.AND P0, PT, R15, 0.56000000238418579102, PT ; /* 0x3f0f5c290f00780b */ /* 0x000fe40003f04000 */ /*17d0*/ FSEL R4, R4, |R15|, P3 ; /* 0x4000000f04047208 */ /* 0x000fe20001800000 */ /*17e0*/ FMUL R3, R6, -1.0284000016964055158e-35 ; /* 0x855ab76c06037820 */ /* 0x000fe20000400000 */ /*17f0*/ FADD R22, -R2, R6 ; /* 0x0000000602167221 */ /* 0x000fe40000000100 */ /*1800*/ LOP3.LUT R20, R4, 0x80000000, R15, 0xf8, !PT ; /* 0x8000000004147812 */ /* 0x000fe400078ef80f */ /*1810*/ FRND R4, R3 ; /* 0x0000000300047307 */ /* 0x000e220000201000 */ /*1820*/ FADD R22, R7, -R22 ; /* 0x8000001607167221 */ /* 0x000fe20000000000 */ /*1830*/ FFMA R7, R6, -1.0284000016964055158e-35, -R3 ; /* 0x855ab76c06077823 */ /* 0x000fe20000000803 */ /*1840*/ FMUL R5, R20, R20 ; /* 0x0000001414057220 */ /* 0x000fe20000400000 */ /*1850*/ FSETP.GT.AND P5, PT, |R3|, 152, PT ; /* 0x431800000300780b */ /* 0x000fc40003fa4200 */ /*1860*/ FFMA R7, R22, -1.0284000016964055158e-35, R7 ; /* 0x855ab76c16077823 */ /* 0x000fe20000000007 */ /*1870*/ FFMA R2, R5, R24, 0.016980519518256187439 ; /* 0x3c8b1abb05027423 */ /* 0x000fe20000000018 */ /*1880*/ MOV R22, c[0x0][0x1dc] ; /* 0x0000770000167a02 */ /* 0x000fe40000000f00 */ /*1890*/ FSETP.GEU.AND P6, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fe20003fce000 */ /*18a0*/ FFMA R2, R5.reuse, R2, 0.030762933194637298584 ; /* 0x3cfc028c05027423 */ /* 0x040fe40000000002 */ /*18b0*/ FADD R22, R22, 1.4618999907746617371e-35 ; /* 0x059b74b416167421 */ /* 0x000fe40000000000 */ /*18c0*/ FFMA R2, R5, R2, 0.044709417968988418579 ; /* 0x3d37213905027423 */ /* 0x000fe20000000002 */ /*18d0*/ FADD R6, R3, -R4 ; /* 0x8000000403067221 */ /* 0x001fe20000000000 */ /*18e0*/ FSETP.GT.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720b */ /* 0x000fe20003f24000 */ /*18f0*/ FADD R28, R22, -1.55349996750270970454e+35 ; /* 0xf9ef5ac5161c7421 */ /* 0x000fe20000000000 */ /*1900*/ FFMA R2, R5, R2, 0.074989043176174163818 ; /* 0x3d9993db05027423 */ /* 0x000fe20000000002 */ /*1910*/ FADD R6, R7, R6 ; /* 0x0000000607067221 */ /* 0x000fe20000000000 */ /*1920*/ SEL R4, RZ, 0x83000000, P1 ; /* 0x83000000ff047807 */ /* 0x000fe20000800000 */ /*1930*/ FADD R27, |R28|, -RZ ; /* 0x800000ff1c1b7221 */ /* 0x000fe20000000200 */ /*1940*/ FFMA R2, R5, R2, 0.16666707396507263184 ; /* 0x3e2aaac605027423 */ /* 0x000fe20000000002 */ /*1950*/ FFMA R7, R6, R21, 0.0013391353422775864601 ; /* 0x3aaf85ed06077423 */ /* 0x000fe20000000015 */ /*1960*/ IMAD.MOV.U32 R21, RZ, RZ, 0x3fd774eb ; /* 0x3fd774ebff157424 */ /* 0x000fc400078e00ff */ /*1970*/ FMUL R5, R5, R2 ; /* 0x0000000205057220 */ /* 0x000fe20000400000 */ /*1980*/ FFMA R7, R6, R7, 0.0096188392490148544312 ; /* 0x3c1d985606077423 */ /* 0x000fe20000000007 */ /*1990*/ ISETP.GT.U32.AND P1, PT, R27, 0x7f7fffff, PT ; /* 0x7f7fffff1b00780c */ /* 0x000fe40003f24070 */ /*19a0*/ FFMA R20, R20, R5, R20 ; /* 0x0000000514147223 */ /* 0x000fe20000000014 */ /*19b0*/ FFMA R7, R6.reuse, R7, 0.055503588169813156128 ; /* 0x3d6357bb06077423 */ /* 0x040fe20000000007 */ /*19c0*/ F2I.NTZ R5, R3 ; /* 0x0000000300057305 */ /* 0x000e220000203100 */ /*19d0*/ FSETP.LEU.OR P1, PT, |R11|, RZ, P1 ; /* 0x000000ff0b00720b */ /* 0x000fe40000f2b600 */ /*19e0*/ FFMA R7, R6, R7, 0.24022644758224487305 ; /* 0x3e75fdec06077423 */ /* 0x000fe20000000007 */ /*19f0*/ FSEL R2, R20, -R20, P3 ; /* 0x8000001414027208 */ /* 0x000fc60001800000 */ /*1a00*/ FFMA R7, R6, R7, 0.69314718246459960938 ; /* 0x3f31721806077423 */ /* 0x000fe40000000007 */ /*1a10*/ @!P0 FFMA R20, R21, 0.93318945169448852539, R2 ; /* 0x3f6ee58115148823 */ /* 0x000fe20000000002 */ /*1a20*/ IADD3 R2, R4, 0x7f000000, RZ ; /* 0x7f00000004027810 */ /* 0x000fe20007ffe0ff */ /*1a30*/ FFMA R7, R6, R7, 1 ; /* 0x3f80000006077423 */ /* 0x000fe20000000007 */ /*1a40*/ FMUL R6, |R11|, 8388608 ; /* 0x4b0000000b067820 */ /* 0x000fe20000400200 */ /*1a50*/ FSETP.NEU.AND P0, PT, |R9|, +INF , PT ; /* 0x7f8000000900780b */ /* 0x000fe20003f0d200 */ /*1a60*/ @P3 FADD R20, R20, R20 ; /* 0x0000001414143221 */ /* 0x000fe20000000000 */ /*1a70*/ FMUL R2, R7, R2 ; /* 0x0000000207027220 */ /* 0x000fe20000400000 */ /*1a80*/ IMAD R5, R5, 0x800000, -R4 ; /* 0x0080000005057824 */ /* 0x001fe200078e0a04 */ /*1a90*/ LOP3.LUT R3, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff06037812 */ /* 0x000fe200078ec0ff */ /*1aa0*/ FMUL R23, R20, R20 ; /* 0x0000001414177220 */ /* 0x000fe20000400000 */ /*1ab0*/ IADD3 R4, R6, -0xb800000, RZ ; /* 0xf480000006047810 */ /* 0x000fe20007ffe0ff */ /*1ac0*/ FMUL R5, R2, R5 ; /* 0x0000000502057220 */ /* 0x000fe20000400000 */ /*1ad0*/ LOP3.LUT R2, R3, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000003027812 */ /* 0x000fc400078efcff */ /*1ae0*/ LOP3.LUT R4, R4, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000004047812 */ /* 0x000fe400078ec0ff */ /*1af0*/ FSETP.EQ.OR P0, PT, R9, RZ, !P0 ; /* 0x000000ff0900720b */ /* 0x000fe40004702400 */ /*1b00*/ MUFU.RCP R2, R2 ; /* 0x0000000200027308 */ /* 0x000e220000001000 */ /*1b10*/ @P5 FSEL R5, RZ, +INF , !P6 ; /* 0x7f800000ff055808 */ /* 0x000fe40007000000 */ /*1b20*/ IADD3 R4, R27.reuse, -R4, RZ ; /* 0x800000041b047210 */ /* 0x040fe40007ffe0ff */ /*1b30*/ LOP3.LUT R27, R27, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff1b1b7812 */ /* 0x000fe400078ec0ff */ /*1b40*/ LOP3.LUT R24, R6, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000006187812 */ /* 0x000fc400078ec0ff */ /*1b50*/ FSETP.GEU.OR P4, PT, -R10, -c[0x0][0x1ec], P0 ; /* 0x80007b000a007a0b */ /* 0x000fe4000078e500 */ /*1b60*/ FSEL R5, R8, R5, P0 ; /* 0x0000000508057208 */ /* 0x000fe40000000000 */ /*1b70*/ LOP3.LUT R27, R27, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f8000001b1b7812 */ /* 0x000fe400078efcff */ /*1b80*/ LOP3.LUT R25, R4, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000004197812 */ /* 0x000fe400078ec0ff */ /*1b90*/ FSEL R24, R24, +QNAN , !P1 ; /* 0x7fffffff18187808 */ /* 0x000fe40004800000 */ /*1ba0*/ LOP3.LUT R22, R20, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000014167812 */ /* 0x000fc400078ec0ff */ /*1bb0*/ FSEL R21, R5, +QNAN , P4 ; /* 0x7fffffff05157808 */ /* 0x001fe40002000000 */ /*1bc0*/ FSETP.GE.AND P0, PT, |R20|, 1, PT ; /* 0x3f8000001400780b */ /* 0x000fda0003f06200 */ /*1bd0*/ @!P0 BRA 0x1d60 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*1be0*/ FMUL R3, |R20|, 1.4426950216293334961 ; /* 0x3fb8aa3b14037820 */ /* 0x000fc80000400200 */ /*1bf0*/ FRND.TRUNC R5, R3 ; /* 0x0000000300057307 */ /* 0x000064000020d000 */ /*1c00*/ MOV R3, 0x4a000000 ; /* 0x4a00000000037802 */ /* 0x001fe40000000f00 */ /*1c10*/ FSETP.GT.AND P0, PT, |R5|.reuse, 126, PT ; /* 0x42fc00000500780b */ /* 0x042fe40003f04200 */ /*1c20*/ LOP3.LUT R4, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005047812 */ /* 0x000fd600078ec0ff */ /*1c30*/ @P0 LOP3.LUT R5, R4, 0x42fc0000, RZ, 0xfc, !PT ; /* 0x42fc000004050812 */ /* 0x000fca00078efcff */ /*1c40*/ FFMA R4, R5, -0.69314718246459960938, |R20| ; /* 0xbf31721805047823 */ /* 0x000fc80000000414 */ /*1c50*/ FFMA R4, R5.reuse, 1.9046542121259335545e-09, R4 ; /* 0x3102e30805047823 */ /* 0x040fe20000000004 */ /*1c60*/ FADD R5, R5, 12583037 ; /* 0x4b40007d05057421 */ /* 0x000fc60000000000 */ /*1c70*/ FMUL R4, R4, 1.4426950216293334961 ; /* 0x3fb8aa3b04047820 */ /* 0x000fe20000400000 */ /*1c80*/ IMAD.SHL.U32 R5, R5, 0x800000, RZ ; /* 0x0080000005057824 */ /* 0x000fca00078e00ff */ /*1c90*/ MUFU.EX2 R4, R4 ; /* 0x0000000400047308 */ /* 0x000e240000000800 */ /*1ca0*/ FMUL R5, R5, R4 ; /* 0x0000000405057220 */ /* 0x001fc80000400000 */ /*1cb0*/ FMUL R6, R5.reuse, 16777216 ; /* 0x4b80000005067820 */ /* 0x040fe20000400000 */ /*1cc0*/ FSETP.GEU.AND P0, PT, |R5|, 1.175494350822287508e-38, PT ; /* 0x008000000500780b */ /* 0x000fc80003f0e200 */ /*1cd0*/ FSEL R6, R6, R5, !P0 ; /* 0x0000000506067208 */ /* 0x000fe40004000000 */ /*1ce0*/ FSEL R3, R3, 0.125, !P0 ; /* 0x3e00000003037808 */ /* 0x000fe40004000000 */ /*1cf0*/ FSETP.GE.AND P0, PT, |R20|, 90, PT ; /* 0x42b400001400780b */ /* 0x000fe40003f06200 */ /*1d00*/ MUFU.RCP R6, R6 ; /* 0x0000000600067308 */ /* 0x000e240000001000 */ /*1d10*/ FMUL R30, R6, R3 ; /* 0x00000003061e7220 */ /* 0x001fc80000400000 */ /*1d20*/ FFMA R30, R5, 2, -R30 ; /* 0x40000000051e7823 */ /* 0x000fca000000081e */ /*1d30*/ FSEL R3, R30, +INF , !P0 ; /* 0x7f8000001e037808 */ /* 0x000fc80004000000 */ /*1d40*/ LOP3.LUT R3, R22, R3, RZ, 0xfc, !PT ; /* 0x0000000316037212 */ /* 0x000fe200078efcff */ /*1d50*/ BRA 0x1dc0 ; /* 0x0000006000007947 */ /* 0x000fea0003800000 */ /*1d60*/ IMAD.MOV.U32 R4, RZ, RZ, 0x363d0ada ; /* 0x363d0adaff047424 */ /* 0x000fc800078e00ff */ /*1d70*/ FFMA R4, R23, R4, 0.00019836159481201320887 ; /* 0x394fff4917047423 */ /* 0x000fc80000000004 */ /*1d80*/ FFMA R4, R23, R4, 0.0083333496004343032837 ; /* 0x3c08889a17047423 */ /* 0x000fc80000000004 */ /*1d90*/ FFMA R4, R23, R4, 0.16666667163372039795 ; /* 0x3e2aaaab17047423 */ /* 0x000fc80000000004 */ /*1da0*/ FMUL R3, R23, R4 ; /* 0x0000000417037220 */ /* 0x000fc80000400000 */ /*1db0*/ FFMA R3, R20, R3, R20 ; /* 0x0000000314037223 */ /* 0x000fe20000000014 */ /*1dc0*/ UMOV UR5, 0x4 ; /* 0x0000000400057882 */ /* 0x000fe20000000000 */ /*1dd0*/ FSETP.GEU.AND P0, PT, |R28|.reuse, |R11|, PT ; /* 0x4000000b1c00720b */ /* 0x040fe20003f0e200 */ /*1de0*/ ULDC.64 UR6, c[0x0][0x1c0] ; /* 0x0000700000067ab9 */ /* 0x000fe20000000a00 */ /*1df0*/ FADD R6, |R28|, -RZ ; /* 0x800000ff1c067221 */ /* 0x000fe20000000200 */ /*1e00*/ UIMAD.WIDE UR6, UR4, UR5, UR6 ; /* 0x00000005040672a5 */ /* 0x000fe4000f8e0206 */ /*1e10*/ USHF.R.S32.HI UR8, URZ, 0x1f, UR4 ; /* 0x0000001f3f087899 */ /* 0x000fc80008011404 */ /*1e20*/ MOV R4, UR6 ; /* 0x0000000600047c02 */ /* 0x000fe20008000f00 */ /*1e30*/ IMAD.U32 R5, RZ, RZ, UR7 ; /* 0x00000007ff057e24 */ /* 0x000fca000f8e00ff */ /*1e40*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x0001e2000c10190e */ /*1e50*/ @!P0 BRA 0x21f0 ; /* 0x0000039000008947 */ /* 0x000fea0003800000 */ /*1e60*/ FMUL R5, |R11|, 8388608 ; /* 0x4b0000000b057820 */ /* 0x001fca0000400200 */ /*1e70*/ FSETP.GTU.AND P0, PT, |R28|, R5, PT ; /* 0x000000051c00720b */ /* 0x000fda0003f0c200 */ /*1e80*/ @P0 BRA 0x2040 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*1e90*/ FMUL R4, |R11|.reuse, 16777216 ; /* 0x4b8000000b047820 */ /* 0x040fe20000400200 */ /*1ea0*/ FSETP.GEU.AND P0, PT, |R11|, 1.175494350822287508e-38, PT ; /* 0x008000000b00780b */ /* 0x000fe20003f0e200 */ /*1eb0*/ FMUL R3, |R28|, 16777216 ; /* 0x4b8000001c037820 */ /* 0x000fc60000400200 */ /*1ec0*/ FSEL R4, R4, |R11|, !P0 ; /* 0x4000000b04047208 */ /* 0x000fe40004000000 */ /*1ed0*/ FSEL R3, R3, |R28|, !P0 ; /* 0x4000001c03037208 */ /* 0x000fc80004000000 */ /*1ee0*/ MUFU.RCP R4, R4 ; /* 0x0000000400047308 */ /* 0x000e240000001000 */ /*1ef0*/ FMUL R3, R4, R3 ; /* 0x0000000304037220 */ /* 0x001fcc0000400000 */ /*1f00*/ FRND.TRUNC R3, R3 ; /* 0x0000000300037307 */ /* 0x000e24000020d000 */ /*1f10*/ FFMA R6, R3, -|R11|, |R28| ; /* 0xc000000b03067223 */ /* 0x001fca000000041c */ /*1f20*/ ISETP.GE.U32.AND P0, PT, R6, R16, PT ; /* 0x000000100600720c */ /* 0x000fda0003f06070 */ /*1f30*/ @!P0 BRA 0x2020 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*1f40*/ ISETP.GT.U32.AND P0, PT, R6, -0x80000000, PT ; /* 0x800000000600780c */ /* 0x000fda0003f04070 */ /*1f50*/ @P0 BRA 0x1ff0 ; /* 0x0000009000000947 */ /* 0x000fea0003800000 */ /*1f60*/ FADD R5, |R11|, |R11| ; /* 0x4000000b0b057221 */ /* 0x000fe20000000200 */ /*1f70*/ FADD R3, R3, 1 ; /* 0x3f80000003037421 */ /* 0x000fc80000000000 */ /*1f80*/ FSETP.GE.AND P0, PT, R6, R5, PT ; /* 0x000000050600720b */ /* 0x000fda0003f06000 */ /*1f90*/ @!P0 BRA 0x2020 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*1fa0*/ FFMA R6, |R11|, -3, R6 ; /* 0xc04000000b067823 */ /* 0x000fe20000000206 */ /*1fb0*/ FADD R3, R3, 1 ; /* 0x3f80000003037421 */ /* 0x000fc80000000000 */ /*1fc0*/ FSETP.GE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720b */ /* 0x000fda0003f06000 */ /*1fd0*/ @P0 FADD R3, R3, 1 ; /* 0x3f80000003030421 */ /* 0x000fe20000000000 */ /*1fe0*/ BRA 0x2020 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*1ff0*/ FSETP.GEU.AND P0, PT, R6, -|R11|, PT ; /* 0xc000000b0600720b */ /* 0x000fe20003f0e000 */ /*2000*/ FADD R3, R3, -1 ; /* 0xbf80000003037421 */ /* 0x000fd80000000000 */ /*2010*/ @!P0 FADD R3, R3, -1 ; /* 0xbf80000003038421 */ /* 0x000fc80000000000 */ /*2020*/ FFMA R6, R3, -|R11|, |R28| ; /* 0xc000000b03067223 */ /* 0x000fe2000000041c */ /*2030*/ BRA 0x21f0 ; /* 0x000001b000007947 */ /* 0x000fea0003800000 */ /*2040*/ ISETP.NE.AND P0, PT, R25, RZ, PT ; /* 0x000000ff1900720c */ /* 0x000fe40003f05270 */ /*2050*/ MOV R3, R27 ; /* 0x0000001b00037202 */ /* 0x000fd60000000f00 */ /*2060*/ @!P0 BRA 0x21d0 ; /* 0x0000016000008947 */ /* 0x000fea0003800000 */ /*2070*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x1dc] ; /* 0x00007700ff037624 */ /* 0x000fe200078e00ff */ /*2080*/ LOP3.LUT R6, R6, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff06067812 */ /* 0x000fe400078ec0ff */ /*2090*/ LOP3.LUT R5, R5, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff05057812 */ /* 0x000fe200078ec0ff */ /*20a0*/ FADD R3, R3, 1.4618999907746617371e-35 ; /* 0x059b74b403037421 */ /* 0x000fe20000000000 */ /*20b0*/ LOP3.LUT R27, R6, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f800000061b7812 */ /* 0x000fe400078efcff */ /*20c0*/ MOV R4, R25 ; /* 0x0000001900047202 */ /* 0x000fe20000000f00 */ /*20d0*/ FADD R28, R3, -1.55349996750270970454e+35 ; /* 0xf9ef5ac5031c7421 */ /* 0x000fe20000000000 */ /*20e0*/ LOP3.LUT R30, R5, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f800000051e7812 */ /* 0x000fe200078efcff */ /*20f0*/ IMAD.MOV.U32 R3, RZ, RZ, R27 ; /* 0x000000ffff037224 */ /* 0x000fc400078e001b */ /*2100*/ IMNMX.U32 R5, R4, 0xb800000, PT ; /* 0x0b80000004057817 */ /* 0x000fc80003800000 */ /*2110*/ IADD3 R3, R5, R3, RZ ; /* 0x0000000305037210 */ /* 0x000fe20007ffe0ff */ /*2120*/ IMAD.IADD R4, R4, 0x1, -R5 ; /* 0x0000000104047824 */ /* 0x000fc800078e0a05 */ /*2130*/ FFMA R6, R2, R3, -RZ ; /* 0x0000000302067223 */ /* 0x000fe200000008ff */ /*2140*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fc60003f25270 */ /*2150*/ FFMA R7, -R30, R6, R3 ; /* 0x000000061e077223 */ /* 0x000fc80000000103 */ /*2160*/ FFMA R6, R2, R7, R6 ; /* 0x0000000702067223 */ /* 0x000fc80000000006 */ /*2170*/ FFMA R7, -R30, R6, R3 ; /* 0x000000061e077223 */ /* 0x000fc80000000103 */ /*2180*/ FFMA.RZ R7, R2, R7, R6 ; /* 0x0000000702077223 */ /* 0x000fc8000000c006 */ /*2190*/ FRND.TRUNC R6, R7 ; /* 0x0000000700067307 */ /* 0x000e24000020d000 */ /*21a0*/ FFMA R3, -R30, R6, R3 ; /* 0x000000061e037223 */ /* 0x001fca0000000103 */ /*21b0*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */ /* 0x000fda0003f05270 */ /*21c0*/ @P0 BRA P1, 0x2100 ; /* 0xffffff3000000947 */ /* 0x000fea000083ffff */ /*21d0*/ FMUL R3, R3, 1.1920928955078125e-07 ; /* 0x3400000003037820 */ /* 0x000fc80000400000 */ /*21e0*/ FMUL R6, R24, R3 ; /* 0x0000000318067220 */ /* 0x000fca0000400000 */ /*21f0*/ FSETP.GTU.AND P0, PT, |R6|, +INF , PT ; /* 0x7f8000000600780b */ /* 0x000fe20003f0c200 */ /*2200*/ ULDC UR5, c[0x0][0x1d4] ; /* 0x0000750000057ab9 */ /* 0x000fe40000000800 */ /*2210*/ MOV R7, UR5 ; /* 0x0000000500077c02 */ /* 0x000fd40008000f00 */ /*2220*/ @!P0 LOP3.LUT R6, R13, R6, RZ, 0xfc, !PT ; /* 0x000000060d068212 */ /* 0x000fca00078efcff */ /*2230*/ FMUL R6, R6, c[0x0][0x1d8] ; /* 0x0000760006067a20 */ /* 0x000fc80000400000 */ /*2240*/ MUFU.RCP R3, R6 ; /* 0x0000000600037308 */ /* 0x001e300000001000 */ /*2250*/ FCHK P0, R7, R6 ; /* 0x0000000607007302 */ /* 0x000e620000000000 */ /*2260*/ FFMA R4, -R6, R3, 1 ; /* 0x3f80000006047423 */ /* 0x001fc80000000103 */ /*2270*/ FFMA R3, R3, R4, R3 ; /* 0x0000000403037223 */ /* 0x000fc80000000003 */ /*2280*/ FFMA R4, R3, c[0x0][0x1d4], RZ ; /* 0x0000750003047a23 */ /* 0x000fc800000000ff */ /*2290*/ FFMA R5, -R6, R4, c[0x0][0x1d4] ; /* 0x0000750006057623 */ /* 0x000fc80000000104 */ /*22a0*/ FFMA R3, R3, R5, R4 ; /* 0x0000000503037223 */ /* 0x000fe20000000004 */ /*22b0*/ @!P0 BRA 0x2300 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*22c0*/ IMAD.MOV.U32 R4, RZ, RZ, R6 ; /* 0x000000ffff047224 */ /* 0x000fe200078e0006 */ /*22d0*/ MOV R3, c[0x0][0x1d4] ; /* 0x0000750000037a02 */ /* 0x000fe40000000f00 */ /*22e0*/ MOV R6, 0x2300 ; /* 0x0000230000067802 */ /* 0x000fe40000000f00 */ /*22f0*/ CALL.REL.NOINC 0x25a0 ; /* 0x000002a000007944 */ /* 0x000fea0003c00000 */ /*2300*/ ULDC.64 UR12, c[0x0][0x1c8] ; /* 0x00007200000c7ab9 */ /* 0x000fe20000000a00 */ /*2310*/ FMUL R3, R3, -1.04050001920000000000e+10 ; /* 0xd01b0bed03037820 */ /* 0x001fe20000400000 */ /*2320*/ ULEA UR5, UP0, UR4, UR12, 0x2 ; /* 0x0000000c04057291 */ /* 0x000fe2000f80103f */ /*2330*/ IMAD.U32 R6, RZ, RZ, UR6 ; /* 0x00000006ff067e24 */ /* 0x000fe2000f8e00ff */ /*2340*/ MOV R7, UR7 ; /* 0x0000000700077c02 */ /* 0x000fe20008000f00 */ /*2350*/ FMUL R3, R3, 1.8350999321178044478e-35 ; /* 0x05c3242c03037820 */ /* 0x000fe20000400000 */ /*2360*/ ULEA.HI.X UR8, UR4, UR13, UR8, 0x2, UP0 ; /* 0x0000000d04087291 */ /* 0x000fc400080f1408 */ /*2370*/ IMAD.U32 R4, RZ, RZ, UR5 ; /* 0x00000005ff047e24 */ /* 0x000fc8000f8e00ff */ /*2380*/ MOV R5, UR8 ; /* 0x0000000800057c02 */ /* 0x000fca0008000f00 */ /*2390*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x0001e8000c10190e */ /*23a0*/ LDG.E R6, [R6.64] ; /* 0x0000000e06067981 */ /* 0x000ea2000c1e1900 */ /*23b0*/ FSETP.NEU.AND P1, PT, R9.reuse, 1, PT ; /* 0x3f8000000900780b */ /* 0x040fe20003f2d000 */ /*23c0*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fe4000fffe03f */ /*23d0*/ ULDC UR5, c[0x0][0x170] ; /* 0x00005c0000057ab9 */ /* 0x000fe20000000800 */ /*23e0*/ FSETP.LE.OR P0, PT, |R9|, +INF , !P1 ; /* 0x7f8000000900780b */ /* 0x000fe20004f03600 */ /*23f0*/ UISETP.GE.AND UP0, UPT, UR4, UR5, UPT ; /* 0x000000050400728c */ /* 0x000fe2000bf06270 */ /*2400*/ FSEL R29, R21, 1, P1 ; /* 0x3f800000151d7808 */ /* 0x000fd60000800000 */ /*2410*/ @!P0 FADD R29, R9, -1.0284000016964055158e-35 ; /* 0x855ab76c091d8421 */ /* 0x000fe20000000000 */ /*2420*/ PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f008 */ /*2430*/ FADD R30, R3, R6 ; /* 0x00000006031e7221 */ /* 0x004fc80000000000 */ /*2440*/ FADD R29, R30, R29 ; /* 0x0000001d1e1d7221 */ /* 0x000fc80000000000 */ /*2450*/ FADD R0, R29, R0 ; /* 0x000000001d007221 */ /* 0x000fc80000000000 */ /*2460*/ @!P0 BRA 0x1bc0 ; /* 0xfffff75000008947 */ /* 0x001fea000383ffff */ /*2470*/ @P2 CALL.REL.NOINC 0x2490 ; /* 0x0000001000002944 */ /* 0x000fe20003c00000 */ /*2480*/ BRA 0x570 ; /* 0xffffe0e000007947 */ /* 0x000fea000383ffff */ /*2490*/ F2F.F64.F32 R2, R0 ; /* 0x0000000000027310 */ /* 0x000e220000201800 */ /*24a0*/ MOV R8, 0x0 ; /* 0x0000000000087802 */ /* 0x000fe20000000f00 */ /*24b0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*24c0*/ MOV R5, c[0x4][0xc] ; /* 0x0100030000057a02 */ /* 0x000fe20000000f00 */ /*24d0*/ IMAD.U32 R6, RZ, RZ, UR9 ; /* 0x00000009ff067e24 */ /* 0x000fe2000f8e00ff */ /*24e0*/ MOV R7, UR10 ; /* 0x0000000a00077c02 */ /* 0x000fe40008000f00 */ /*24f0*/ LDC.64 R8, c[0x4][R8] ; /* 0x0100000008087b82 */ /* 0x000e620000000a00 */ /*2500*/ STL.64 [R1], R2 ; /* 0x0000000201007387 */ /* 0x0011e80000100a00 */ /*2510*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x001fe20000000000 */ /*2520*/ MOV R11, 0x2590 ; /* 0x00002590000b7802 */ /* 0x000fe40000000f00 */ /*2530*/ MOV R20, 0x2510 ; /* 0x0000251000147802 */ /* 0x000fc40000000f00 */ /*2540*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*2550*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*2560*/ IADD3 R20, P0, P1, -R20, R11, R2 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e102 */ /*2570*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*2580*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */ /* 0x002fea0003c00000 */ /*2590*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*25a0*/ SHF.R.U32.HI R5, RZ, 0x17, R4 ; /* 0x00000017ff057819 */ /* 0x000fe40000011604 */ /*25b0*/ SHF.R.U32.HI R7, RZ, 0x17, R3 ; /* 0x00000017ff077819 */ /* 0x000fe40000011603 */ /*25c0*/ LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff05057812 */ /* 0x000fe400078ec0ff */ /*25d0*/ LOP3.LUT R33, R7, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff07217812 */ /* 0x000fe400078ec0ff */ /*25e0*/ IADD3 R30, R5, -0x1, RZ ; /* 0xffffffff051e7810 */ /* 0x000fe40007ffe0ff */ /*25f0*/ IADD3 R29, R33, -0x1, RZ ; /* 0xffffffff211d7810 */ /* 0x000fc40007ffe0ff */ /*2600*/ ISETP.GT.U32.AND P0, PT, R30, 0xfd, PT ; /* 0x000000fd1e00780c */ /* 0x000fc80003f04070 */ /*2610*/ ISETP.GT.U32.OR P0, PT, R29, 0xfd, P0 ; /* 0x000000fd1d00780c */ /* 0x000fda0000704470 */ /*2620*/ @!P0 IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff078224 */ /* 0x000fe200078e00ff */ /*2630*/ @!P0 BRA 0x27b0 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*2640*/ FSETP.GTU.FTZ.AND P0, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f1c200 */ /*2650*/ FSETP.GTU.FTZ.AND P1, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fc80003f3c200 */ /*2660*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*2670*/ @P0 BRA 0x2b90 ; /* 0x0000051000000947 */ /* 0x000fea0003800000 */ /*2680*/ LOP3.LUT P0, RZ, R4, 0x7fffffff, R3, 0xc8, !PT ; /* 0x7fffffff04ff7812 */ /* 0x000fda000780c803 */ /*2690*/ @!P0 BRA 0x2b70 ; /* 0x000004d000008947 */ /* 0x000fea0003800000 */ /*26a0*/ FSETP.NEU.FTZ.AND P0, PT, |R3|.reuse, +INF , PT ; /* 0x7f8000000300780b */ /* 0x040fe40003f1d200 */ /*26b0*/ FSETP.NEU.FTZ.AND P3, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fe40003f7d200 */ /*26c0*/ FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fd60003f3d200 */ /*26d0*/ @!P3 BRA !P0, 0x2b70 ; /* 0x000004900000b947 */ /* 0x000fea0004000000 */ /*26e0*/ LOP3.LUT P0, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fc8000780c0ff */ /*26f0*/ PLOP3.LUT P0, PT, P3, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0001f00572 */ /*2700*/ @P0 BRA 0x2b50 ; /* 0x0000044000000947 */ /* 0x000fea0003800000 */ /*2710*/ LOP3.LUT P0, RZ, R4, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff04ff7812 */ /* 0x000fc8000780c0ff */ /*2720*/ PLOP3.LUT P0, PT, P1, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f00572 */ /*2730*/ @P0 BRA 0x2b20 ; /* 0x000003e000000947 */ /* 0x000fea0003800000 */ /*2740*/ ISETP.GE.AND P0, PT, R29, RZ, PT ; /* 0x000000ff1d00720c */ /* 0x000fe40003f06270 */ /*2750*/ ISETP.GE.AND P1, PT, R30, RZ, PT ; /* 0x000000ff1e00720c */ /* 0x000fd60003f26270 */ /*2760*/ @P0 MOV R7, RZ ; /* 0x000000ff00070202 */ /* 0x000fe20000000f00 */ /*2770*/ @!P0 IMAD.MOV.U32 R7, RZ, RZ, -0x40 ; /* 0xffffffc0ff078424 */ /* 0x000fe200078e00ff */ /*2780*/ @!P0 FFMA R3, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003038823 */ /* 0x000fe200000000ff */ /*2790*/ @!P1 FFMA R4, R4, 1.84467440737095516160e+19, RZ ; /* 0x5f80000004049823 */ /* 0x000fc600000000ff */ /*27a0*/ @!P1 IADD3 R7, R7, 0x40, RZ ; /* 0x0000004007079810 */ /* 0x000fe40007ffe0ff */ /*27b0*/ LEA R29, R5, 0xc0800000, 0x17 ; /* 0xc0800000051d7811 */ /* 0x000fc800078eb8ff */ /*27c0*/ IADD3 R31, -R29, R4, RZ ; /* 0x000000041d1f7210 */ /* 0x000fe40007ffe1ff */ /*27d0*/ IADD3 R4, R33, -0x7f, RZ ; /* 0xffffff8121047810 */ /* 0x000fe40007ffe0ff */ /*27e0*/ MUFU.RCP R30, R31 ; /* 0x0000001f001e7308 */ /* 0x000e220000001000 */ /*27f0*/ FADD.FTZ R32, -R31, -RZ ; /* 0x800000ff1f207221 */ /* 0x000fe20000010100 */ /*2800*/ IADD3 R34, R4.reuse, 0x7f, -R5 ; /* 0x0000007f04227810 */ /* 0x040fe20007ffe805 */ /*2810*/ IMAD R3, R4, -0x800000, R3 ; /* 0xff80000004037824 */ /* 0x000fc800078e0203 */ /*2820*/ IMAD.IADD R34, R34, 0x1, R7 ; /* 0x0000000122227824 */ /* 0x000fe200078e0207 */ /*2830*/ FFMA R29, R30, R32, 1 ; /* 0x3f8000001e1d7423 */ /* 0x001fc80000000020 */ /*2840*/ FFMA R30, R30, R29, R30 ; /* 0x0000001d1e1e7223 */ /* 0x000fc8000000001e */ /*2850*/ FFMA R29, R3, R30, RZ ; /* 0x0000001e031d7223 */ /* 0x000fc800000000ff */ /*2860*/ FFMA R33, R32, R29, R3 ; /* 0x0000001d20217223 */ /* 0x000fc80000000003 */ /*2870*/ FFMA R29, R30, R33, R29 ; /* 0x000000211e1d7223 */ /* 0x000fc8000000001d */ /*2880*/ FFMA R32, R32, R29, R3 ; /* 0x0000001d20207223 */ /* 0x000fc80000000003 */ /*2890*/ FFMA R3, R30, R32, R29 ; /* 0x000000201e037223 */ /* 0x000fca000000001d */ /*28a0*/ SHF.R.U32.HI R4, RZ, 0x17, R3 ; /* 0x00000017ff047819 */ /* 0x000fc80000011603 */ /*28b0*/ LOP3.LUT R4, R4, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff04047812 */ /* 0x000fc800078ec0ff */ /*28c0*/ IADD3 R7, R4, R34, RZ ; /* 0x0000002204077210 */ /* 0x000fc80007ffe0ff */ /*28d0*/ IADD3 R4, R7, -0x1, RZ ; /* 0xffffffff07047810 */ /* 0x000fc80007ffe0ff */ /*28e0*/ ISETP.GE.U32.AND P0, PT, R4, 0xfe, PT ; /* 0x000000fe0400780c */ /* 0x000fda0003f06070 */ /*28f0*/ @!P0 BRA 0x2b00 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*2900*/ ISETP.GT.AND P0, PT, R7, 0xfe, PT ; /* 0x000000fe0700780c */ /* 0x000fda0003f04270 */ /*2910*/ @P0 BRA 0x2ad0 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*2920*/ ISETP.GE.AND P0, PT, R7, 0x1, PT ; /* 0x000000010700780c */ /* 0x000fda0003f06270 */ /*2930*/ @P0 BRA 0x2ba0 ; /* 0x0000026000000947 */ /* 0x000fea0003800000 */ /*2940*/ ISETP.GE.AND P0, PT, R7, -0x18, PT ; /* 0xffffffe80700780c */ /* 0x000fe40003f06270 */ /*2950*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fd600078ec0ff */ /*2960*/ @!P0 BRA 0x2ba0 ; /* 0x0000023000008947 */ /* 0x000fea0003800000 */ /*2970*/ FFMA.RZ R4, R30, R32.reuse, R29.reuse ; /* 0x000000201e047223 */ /* 0x180fe2000000c01d */ /*2980*/ ISETP.NE.AND P3, PT, R7.reuse, RZ, PT ; /* 0x000000ff0700720c */ /* 0x040fe40003f65270 */ /*2990*/ ISETP.NE.AND P1, PT, R7.reuse, RZ, PT ; /* 0x000000ff0700720c */ /* 0x040fe40003f25270 */ /*29a0*/ LOP3.LUT R5, R4, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff04057812 */ /* 0x000fe200078ec0ff */ /*29b0*/ FFMA.RP R4, R30.reuse, R32.reuse, R29.reuse ; /* 0x000000201e047223 */ /* 0x1c0fe2000000801d */ /*29c0*/ FFMA.RM R29, R30, R32, R29 ; /* 0x000000201e1d7223 */ /* 0x000fe2000000401d */ /*29d0*/ IADD3 R30, R7, 0x20, RZ ; /* 0x00000020071e7810 */ /* 0x000fe20007ffe0ff */ /*29e0*/ IMAD.MOV R7, RZ, RZ, -R7 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0a07 */ /*29f0*/ LOP3.LUT R5, R5, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000005057812 */ /* 0x000fc400078efcff */ /*2a00*/ FSETP.NEU.FTZ.AND P0, PT, R4, R29, PT ; /* 0x0000001d0400720b */ /* 0x000fe40003f1d000 */ /*2a10*/ SHF.L.U32 R30, R5, R30, RZ ; /* 0x0000001e051e7219 */ /* 0x000fe400000006ff */ /*2a20*/ SEL R4, R7, RZ, P3 ; /* 0x000000ff07047207 */ /* 0x000fe40001800000 */ /*2a30*/ ISETP.NE.AND P1, PT, R30, RZ, P1 ; /* 0x000000ff1e00720c */ /* 0x000fe40000f25270 */ /*2a40*/ SHF.R.U32.HI R4, RZ, R4, R5 ; /* 0x00000004ff047219 */ /* 0x000fe40000011605 */ /*2a50*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40000703570 */ /*2a60*/ SHF.R.U32.HI R30, RZ, 0x1, R4 ; /* 0x00000001ff1e7819 */ /* 0x000fe40000011604 */ /*2a70*/ SEL R5, RZ, 0x1, !P0 ; /* 0x00000001ff057807 */ /* 0x000fc80004000000 */ /*2a80*/ LOP3.LUT R5, R5, 0x1, R30, 0xf8, !PT ; /* 0x0000000105057812 */ /* 0x000fc800078ef81e */ /*2a90*/ LOP3.LUT R5, R5, R4, RZ, 0xc0, !PT ; /* 0x0000000405057212 */ /* 0x000fc800078ec0ff */ /*2aa0*/ IADD3 R30, R30, R5, RZ ; /* 0x000000051e1e7210 */ /* 0x000fc80007ffe0ff */ /*2ab0*/ LOP3.LUT R3, R30, R3, RZ, 0xfc, !PT ; /* 0x000000031e037212 */ /* 0x000fe200078efcff */ /*2ac0*/ BRA 0x2ba0 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*2ad0*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fc800078ec0ff */ /*2ae0*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*2af0*/ BRA 0x2ba0 ; /* 0x000000a000007947 */ /* 0x000fea0003800000 */ /*2b00*/ IMAD R3, R34, 0x800000, R3 ; /* 0x0080000022037824 */ /* 0x000fe200078e0203 */ /*2b10*/ BRA 0x2ba0 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*2b20*/ LOP3.LUT R3, R4, 0x80000000, R3, 0x48, !PT ; /* 0x8000000004037812 */ /* 0x000fc800078e4803 */ /*2b30*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*2b40*/ BRA 0x2ba0 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*2b50*/ LOP3.LUT R3, R4, 0x80000000, R3, 0x48, !PT ; /* 0x8000000004037812 */ /* 0x000fe200078e4803 */ /*2b60*/ BRA 0x2ba0 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*2b70*/ MUFU.RSQ R3, -QNAN ; /* 0xffc0000000037908 */ /* 0x000e220000001400 */ /*2b80*/ BRA 0x2ba0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*2b90*/ FADD.FTZ R3, R3, R4 ; /* 0x0000000403037221 */ /* 0x000fe20000010000 */ /*2ba0*/ MOV R4, R6 ; /* 0x0000000600047202 */ /* 0x000fe20000000f00 */ /*2bb0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x0 ; /* 0x00000000ff057424 */ /* 0x000fc800078e00ff */ /*2bc0*/ RET.REL.NODEC R4 0x0 ; /* 0xffffd43004007950 */ /* 0x000fea0003c3ffff */ /*2bd0*/ BRA 0x2bd0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*2be0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2bf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2c00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2c10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2c20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2c30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2c40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2c50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2c60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2c70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
/* This is a automatically generated test. Do not modify */ #include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #include <math.h> __global__ void compute(float comp, int var_1,float var_2,int var_3,int var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11,float* var_12,float var_13,float var_14,float var_15,float var_16,float var_17,float var_18,float var_19,float var_20,float var_21,float* var_22,float* var_23,float var_24,float var_25,float var_26,float var_27,float var_28,float var_29,float var_30,float var_31,float var_32,float var_33) { for (int i=0; i < var_1; ++i) { if (comp > (var_2 + -1.5747E-35f)) { comp += coshf((+0.0f / +1.3473E-43f)); if (comp >= -1.3494E36f - (-0.0f * (+1.7416E-44f - var_5))) { comp += asinf((var_6 + var_7)); float tmp_1 = -0.0f + (+0.0f * var_8); float tmp_2 = -1.9823E34f / +0.0f - var_9; comp = tmp_2 * tmp_1 + (var_10 * var_11); } for (int i=0; i < var_3; ++i) { var_12[i] = var_13 + var_14 * fabsf((var_15 - var_16 * ldexpf(floorf(tanhf((-1.9774E-35f * var_17 + var_18))), 2))); float tmp_3 = +1.5409E26f; comp = tmp_3 / var_12[i] / -1.2900E-35f + var_19 / (var_20 / (-1.3379E-15f - -1.8224E-35f - var_21)); } for (int i=0; i < var_4; ++i) { var_22[i] = sinhf(acosf(var_24 + +1.4771E-35f)); var_23[i] = +1.8351E-35f * (-1.0405E10f * (var_25 / (var_26 * fmodf((-1.5535E35f + -1.3174E-24f * -1.2706E-41f - (-1.4619E-35f - var_27)), (var_28 + (var_29 - (var_30 / ceilf(+1.0588E-43f)))))))); comp += var_23[i] + var_22[i] + powf(var_31 - (var_32 / -1.1886E34f * -0.0f - (var_33 - +0.0f)), -1.0284E-35f); } } } printf("%.17g\n", comp); } float* initPointer(float v) { float *ret = (float*) malloc(sizeof(float)*10); for(int i=0; i < 10; ++i) ret[i] = v; return ret; } int main(int argc, char** argv) { /* Program variables */ float tmp_1 = atof(argv[1]); int tmp_2 = atoi(argv[2]); float tmp_3 = atof(argv[3]); int tmp_4 = atoi(argv[4]); int tmp_5 = atoi(argv[5]); float tmp_6 = atof(argv[6]); float tmp_7 = atof(argv[7]); float tmp_8 = atof(argv[8]); float tmp_9 = atof(argv[9]); float tmp_10 = atof(argv[10]); float tmp_11 = atof(argv[11]); float tmp_12 = atof(argv[12]); float* tmp_13 = initPointer( atof(argv[13]) ); float tmp_14 = atof(argv[14]); float tmp_15 = atof(argv[15]); float tmp_16 = atof(argv[16]); float tmp_17 = atof(argv[17]); float tmp_18 = atof(argv[18]); float tmp_19 = atof(argv[19]); float tmp_20 = atof(argv[20]); float tmp_21 = atof(argv[21]); float tmp_22 = atof(argv[22]); float* tmp_23 = initPointer( atof(argv[23]) ); float* tmp_24 = initPointer( atof(argv[24]) ); float tmp_25 = atof(argv[25]); float tmp_26 = atof(argv[26]); float tmp_27 = atof(argv[27]); float tmp_28 = atof(argv[28]); float tmp_29 = atof(argv[29]); float tmp_30 = atof(argv[30]); float tmp_31 = atof(argv[31]); float tmp_32 = atof(argv[32]); float tmp_33 = atof(argv[33]); float tmp_34 = atof(argv[34]); compute<<<1,1>>>(tmp_1,tmp_2,tmp_3,tmp_4,tmp_5,tmp_6,tmp_7,tmp_8,tmp_9,tmp_10,tmp_11,tmp_12,tmp_13,tmp_14,tmp_15,tmp_16,tmp_17,tmp_18,tmp_19,tmp_20,tmp_21,tmp_22,tmp_23,tmp_24,tmp_25,tmp_26,tmp_27,tmp_28,tmp_29,tmp_30,tmp_31,tmp_32,tmp_33,tmp_34); hipDeviceSynchronize(); return 0; }
.text .file "test.hip" .globl _Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff # -- Begin function _Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff .type _Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff,@function _Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff: # @_Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $408, %rsp # imm = 0x198 .cfi_def_cfa_offset 464 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 leaq 12(%rsp), %rax movss %xmm0, (%rax) leaq 52(%rsp), %r11 movl %edi, (%r11) leaq 48(%rsp), %r10 movss %xmm1, (%r10) leaq 44(%rsp), %r14 movl %esi, (%r14) leaq 40(%rsp), %rdi movl %edx, (%rdi) leaq 36(%rsp), %rsi movss %xmm2, (%rsi) leaq 32(%rsp), %r15 movss %xmm3, (%r15) leaq 28(%rsp), %r12 movss %xmm4, (%r12) leaq 24(%rsp), %r13 movss %xmm5, (%r13) leaq 20(%rsp), %rbp movss %xmm6, (%rbp) leaq 16(%rsp), %rax movss %xmm7, (%rax) leaq 88(%rsp), %rdx movq %rcx, (%rdx) leaq 80(%rsp), %rcx movq %r8, (%rcx) movq %rcx, %r8 leaq 72(%rsp), %rcx movq %r9, (%rcx) leaq 128(%rsp), %rbx leaq 12(%rsp), %r9 movq %r9, (%rbx) movq %r11, 8(%rbx) movq %r10, 16(%rbx) movq %r14, 24(%rbx) movq %rdi, 32(%rbx) movq %rsi, 40(%rbx) movq %r15, 48(%rbx) movq %r12, 56(%rbx) movq %r13, 64(%rbx) movq %rbp, 72(%rbx) movq %rax, 80(%rbx) leaq 464(%rsp), %rax movq %rax, 88(%rbx) movq %rdx, 96(%rbx) leaq 472(%rsp), %rax movq %rax, 104(%rbx) leaq 480(%rsp), %rax movq %rax, 112(%rbx) leaq 488(%rsp), %rax movq %rax, 120(%rbx) leaq 496(%rsp), %rax movq %rax, 128(%rbx) leaq 504(%rsp), %rax movq %rax, 136(%rbx) leaq 512(%rsp), %rax movq %rax, 144(%rbx) leaq 520(%rsp), %rax movq %rax, 152(%rbx) leaq 528(%rsp), %rax movq %rax, 160(%rbx) leaq 536(%rsp), %rax movq %rax, 168(%rbx) movq %r8, 176(%rbx) movq %rcx, 184(%rbx) leaq 544(%rsp), %rax movq %rax, 192(%rbx) leaq 552(%rsp), %rax movq %rax, 200(%rbx) leaq 560(%rsp), %rax movq %rax, 208(%rbx) leaq 568(%rsp), %rax movq %rax, 216(%rbx) leaq 576(%rsp), %rax movq %rax, 224(%rbx) leaq 584(%rsp), %rax movq %rax, 232(%rbx) leaq 592(%rsp), %rax movq %rax, 240(%rbx) leaq 600(%rsp), %rax movq %rax, 248(%rbx) leaq 608(%rsp), %rax movq %rax, 256(%rbx) leaq 616(%rsp), %rax movq %rax, 264(%rbx) leaq 112(%rsp), %r14 leaq 96(%rsp), %r15 leaq 64(%rsp), %r12 leaq 56(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7computefifiifffffffPffffffffffS_S_ffffffffff, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $424, %rsp # imm = 0x1A8 .cfi_adjust_cfa_offset -424 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff, .Lfunc_end0-_Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff .cfi_endproc # -- End function .globl _Z11initPointerf # -- Begin function _Z11initPointerf .type _Z11initPointerf,@function _Z11initPointerf: # @_Z11initPointerf .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movss %xmm0, 4(%rsp) # 4-byte Spill movl $40, %edi callq malloc movss 4(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero xorl %ecx, %ecx .LBB1_1: # =>This Inner Loop Header: Depth=1 movss %xmm0, (%rax,%rcx,4) incq %rcx cmpq $10, %rcx jne .LBB1_1 # %bb.2: popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z11initPointerf, .Lfunc_end1-_Z11initPointerf .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $392, %rsp # imm = 0x188 .cfi_def_cfa_offset 448 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rsi, %r15 movq 8(%rsi), %rdi callq atof movsd %xmm0, 384(%rsp) # 8-byte Spill movq 16(%r15), %rdi callq atoi movl %eax, 260(%rsp) # 4-byte Spill movq 24(%r15), %rdi callq atof movsd %xmm0, 376(%rsp) # 8-byte Spill movq 32(%r15), %rdi callq atoi movl %eax, %ebp movq 40(%r15), %rdi callq atoi movl %eax, %r14d movq 48(%r15), %rdi callq atof movsd %xmm0, 368(%rsp) # 8-byte Spill movq 56(%r15), %rdi callq atof movsd %xmm0, 248(%rsp) # 8-byte Spill movq 64(%r15), %rdi callq atof movsd %xmm0, 240(%rsp) # 8-byte Spill movq 72(%r15), %rdi callq atof movsd %xmm0, 232(%rsp) # 8-byte Spill movq 80(%r15), %rdi callq atof movsd %xmm0, 224(%rsp) # 8-byte Spill movq 88(%r15), %rdi callq atof movsd %xmm0, 360(%rsp) # 8-byte Spill movq 96(%r15), %rdi callq atof movsd %xmm0, 216(%rsp) # 8-byte Spill movq 104(%r15), %rdi callq atof cvtsd2ss %xmm0, %xmm0 movss %xmm0, 160(%rsp) # 4-byte Spill movl $40, %edi callq malloc movss 160(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero movq %rax, %r12 xorl %eax, %eax .LBB2_1: # =>This Inner Loop Header: Depth=1 movss %xmm0, (%r12,%rax,4) incq %rax cmpq $10, %rax jne .LBB2_1 # %bb.2: # %_Z11initPointerf.exit movq 112(%r15), %rdi callq atof movsd %xmm0, 208(%rsp) # 8-byte Spill movq 120(%r15), %rdi callq atof movsd %xmm0, 200(%rsp) # 8-byte Spill movq 128(%r15), %rdi callq atof movsd %xmm0, 192(%rsp) # 8-byte Spill movq 136(%r15), %rdi callq atof movsd %xmm0, 184(%rsp) # 8-byte Spill movq 144(%r15), %rdi callq atof movsd %xmm0, 176(%rsp) # 8-byte Spill movq 152(%r15), %rdi callq atof movsd %xmm0, 168(%rsp) # 8-byte Spill movq 160(%r15), %rdi callq atof movsd %xmm0, 352(%rsp) # 8-byte Spill movq 168(%r15), %rdi callq atof movsd %xmm0, 344(%rsp) # 8-byte Spill movq 176(%r15), %rdi callq atof movsd %xmm0, 336(%rsp) # 8-byte Spill movq 184(%r15), %rdi callq atof cvtsd2ss %xmm0, %xmm0 movss %xmm0, 160(%rsp) # 4-byte Spill movl $40, %edi callq malloc movss 160(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero movq %rax, %r13 xorl %eax, %eax .LBB2_3: # =>This Inner Loop Header: Depth=1 movss %xmm0, (%r13,%rax,4) incq %rax cmpq $10, %rax jne .LBB2_3 # %bb.4: # %_Z11initPointerf.exit72 movq 192(%r15), %rdi callq atof cvtsd2ss %xmm0, %xmm0 movss %xmm0, 160(%rsp) # 4-byte Spill movl $40, %edi callq malloc movss 160(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero movq %rax, %rbx xorl %eax, %eax .LBB2_5: # =>This Inner Loop Header: Depth=1 movss %xmm0, (%rbx,%rax,4) incq %rax cmpq $10, %rax jne .LBB2_5 # %bb.6: # %_Z11initPointerf.exit76 movq 200(%r15), %rdi callq atof movsd %xmm0, 160(%rsp) # 8-byte Spill movq 208(%r15), %rdi callq atof movsd %xmm0, 328(%rsp) # 8-byte Spill movq 216(%r15), %rdi callq atof movsd %xmm0, 320(%rsp) # 8-byte Spill movq 224(%r15), %rdi callq atof movsd %xmm0, 312(%rsp) # 8-byte Spill movq 232(%r15), %rdi callq atof movsd %xmm0, 304(%rsp) # 8-byte Spill movq 240(%r15), %rdi callq atof movsd %xmm0, 296(%rsp) # 8-byte Spill movq 248(%r15), %rdi callq atof movsd %xmm0, 288(%rsp) # 8-byte Spill movq 256(%r15), %rdi callq atof movsd %xmm0, 280(%rsp) # 8-byte Spill movq 264(%r15), %rdi callq atof movsd %xmm0, 272(%rsp) # 8-byte Spill movq 272(%r15), %rdi callq atof movsd %xmm0, 264(%rsp) # 8-byte Spill movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_8 # %bb.7: cvtsd2ss 264(%rsp), %xmm8 # 8-byte Folded Reload cvtsd2ss 272(%rsp), %xmm9 # 8-byte Folded Reload cvtsd2ss 280(%rsp), %xmm10 # 8-byte Folded Reload cvtsd2ss 288(%rsp), %xmm11 # 8-byte Folded Reload cvtsd2ss 296(%rsp), %xmm12 # 8-byte Folded Reload cvtsd2ss 304(%rsp), %xmm13 # 8-byte Folded Reload cvtsd2ss 312(%rsp), %xmm14 # 8-byte Folded Reload cvtsd2ss 320(%rsp), %xmm15 # 8-byte Folded Reload cvtsd2ss 328(%rsp), %xmm3 # 8-byte Folded Reload cvtsd2ss 160(%rsp), %xmm4 # 8-byte Folded Reload cvtsd2ss 336(%rsp), %xmm5 # 8-byte Folded Reload cvtsd2ss 344(%rsp), %xmm6 # 8-byte Folded Reload cvtsd2ss 352(%rsp), %xmm7 # 8-byte Folded Reload xorps %xmm0, %xmm0 cvtsd2ss 168(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 168(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 176(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 176(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 184(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 184(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 192(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 192(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 200(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 200(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 208(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 208(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 216(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 216(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 360(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 160(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 224(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 224(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 232(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 232(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 240(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 240(%rsp) # 4-byte Spill xorps %xmm0, %xmm0 cvtsd2ss 248(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm0, 248(%rsp) # 4-byte Spill cvtsd2ss 368(%rsp), %xmm2 # 8-byte Folded Reload cvtsd2ss 376(%rsp), %xmm1 # 8-byte Folded Reload xorps %xmm0, %xmm0 cvtsd2ss 384(%rsp), %xmm0 # 8-byte Folded Reload movss %xmm8, 152(%rsp) movss %xmm9, 144(%rsp) movss %xmm10, 136(%rsp) movss %xmm11, 128(%rsp) movss %xmm12, 120(%rsp) movss %xmm13, 112(%rsp) movss %xmm14, 104(%rsp) movss %xmm15, 96(%rsp) movss %xmm3, 88(%rsp) movss %xmm4, 80(%rsp) movss %xmm5, 72(%rsp) movss %xmm6, 64(%rsp) movss %xmm7, 56(%rsp) movss 168(%rsp), %xmm3 # 4-byte Reload # xmm3 = mem[0],zero,zero,zero movss %xmm3, 48(%rsp) movss 176(%rsp), %xmm3 # 4-byte Reload # xmm3 = mem[0],zero,zero,zero movss %xmm3, 40(%rsp) movss 184(%rsp), %xmm3 # 4-byte Reload # xmm3 = mem[0],zero,zero,zero movss %xmm3, 32(%rsp) movss 192(%rsp), %xmm3 # 4-byte Reload # xmm3 = mem[0],zero,zero,zero movss %xmm3, 24(%rsp) movss 200(%rsp), %xmm3 # 4-byte Reload # xmm3 = mem[0],zero,zero,zero movss %xmm3, 16(%rsp) movss 208(%rsp), %xmm3 # 4-byte Reload # xmm3 = mem[0],zero,zero,zero movss %xmm3, 8(%rsp) movss 216(%rsp), %xmm3 # 4-byte Reload # xmm3 = mem[0],zero,zero,zero movss %xmm3, (%rsp) movl 260(%rsp), %edi # 4-byte Reload movl %ebp, %esi movl %r14d, %edx movss 248(%rsp), %xmm3 # 4-byte Reload # xmm3 = mem[0],zero,zero,zero movss 240(%rsp), %xmm4 # 4-byte Reload # xmm4 = mem[0],zero,zero,zero movss 232(%rsp), %xmm5 # 4-byte Reload # xmm5 = mem[0],zero,zero,zero movss 224(%rsp), %xmm6 # 4-byte Reload # xmm6 = mem[0],zero,zero,zero movss 160(%rsp), %xmm7 # 4-byte Reload # xmm7 = mem[0],zero,zero,zero movq %r12, %rcx movq %r13, %r8 movq %rbx, %r9 callq _Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff .LBB2_8: callq hipDeviceSynchronize xorl %eax, %eax addq $392, %rsp # imm = 0x188 .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7computefifiifffffffPffffffffffS_S_ffffffffff, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z7computefifiifffffffPffffffffffS_S_ffffffffff,@object # @_Z7computefifiifffffffPffffffffffS_S_ffffffffff .section .rodata,"a",@progbits .globl _Z7computefifiifffffffPffffffffffS_S_ffffffffff .p2align 3, 0x0 _Z7computefifiifffffffPffffffffffS_S_ffffffffff: .quad _Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff .size _Z7computefifiifffffffPffffffffffS_S_ffffffffff, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z7computefifiifffffffPffffffffffS_S_ffffffffff" .size .L__unnamed_1, 48 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__computefifiifffffffPffffffffffS_S_ffffffffff .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7computefifiifffffffPffffffffffS_S_ffffffffff .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7computefifiifffffffPffffffffffS_S_ffffffffff ; -- Begin function _Z7computefifiifffffffPffffffffffS_S_ffffffffff .globl _Z7computefifiifffffffPffffffffffS_S_ffffffffff .p2align 8 .type _Z7computefifiifffffffPffffffffffS_S_ffffffffff,@function _Z7computefifiifffffffPffffffffffS_S_ffffffffff: ; @_Z7computefifiifffffffPffffffffffS_S_ffffffffff ; %bb.0: s_load_b128 s[24:27], s[0:1], 0x0 s_waitcnt lgkmcnt(0) v_mov_b32_e32 v31, s24 s_cmp_lt_i32 s25, 1 s_cbranch_scc1 .LBB0_14 ; %bb.1: ; %.lr.ph103 s_clause 0x4 s_load_b32 s2, s[0:1], 0x58 s_load_b256 s[16:23], s[0:1], 0x38 s_load_b128 s[28:31], s[0:1], 0x60 s_load_b256 s[8:15], s[0:1], 0x70 s_load_b64 s[4:5], s[0:1], 0x90 s_mov_b32 s3, 0x3d1c21a7 s_cmp_gt_i32 s27, 0 s_load_b64 s[36:37], s[0:1], 0x30 s_waitcnt lgkmcnt(0) v_sub_f32_e64 v0, 0xa6c0cfcc, s2 s_mov_b32 s2, 0xf812819a v_add_f32_e64 v18, 0x59b74b4, s11 v_sub_f32_e64 v20, s13, s14 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f32 v1, null, v0, v0, s23 v_div_scale_f32 v4, vcc_lo, s23, v0, s23 v_rcp_f32_e32 v2, v1 s_waitcnt_depctr 0xfff v_fma_f32 v3, -v1, v2, 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v2, v3, v2 v_mul_f32_e32 v3, v4, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v5, -v1, v3, v4 v_fmac_f32_e32 v3, v5, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v1, -v1, v3, v4 v_div_fmas_f32 v1, v1, v2, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_div_fixup_f32 v4, v1, v0, s23 v_add_f32_e64 v0, 0x59d127d, s8 v_div_scale_f32 v1, null, s2, s2, s4 s_mov_b32 s8, 0x3e76c4e1 v_div_scale_f32 v2, null, v4, v4, s22 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_fma_f32 v3, |v0|, -0.5, 0.5 v_mul_f32_e32 v5, v0, v0 v_cmp_gt_f32_e64 s2, |v0|, 0.5 v_rcp_f32_e32 v6, v2 v_div_scale_f32 v11, vcc_lo, s22, v4, s22 v_rcp_f32_e32 v7, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v3, v5, v3, s2 v_sqrt_f32_e32 v12, v3 s_delay_alu instid0(TRANS32_DEP_3) v_fma_f32 v9, -v2, v6, 1.0 v_fmaak_f32 v5, s3, v3, 0x3c5fc5da v_div_scale_f32 v8, s3, s4, 0xf812819a, s4 s_waitcnt_depctr 0xfff v_fma_f32 v10, -v1, v7, 1.0 v_dual_fmac_f32 v6, v9, v6 :: v_dual_fmaak_f32 v5, v3, v5, 0x3d034c3c s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v9, v11, v6 v_fmaak_f32 v5, v3, v5, 0x3d3641b1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v13, -v2, v9, v11 v_fmaak_f32 v5, v3, v5, 0x3d999bc8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v9, v13, v6 v_fmaak_f32 v5, v3, v5, 0x3e2aaaac s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v2, -v2, v9, v11 v_mul_f32_e32 v3, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fmas_f32 v6, v2, v6, v9 v_fmac_f32_e32 v12, v12, v3 v_fmac_f32_e32 v7, v10, v7 s_mov_b32 vcc_lo, s3 s_mov_b32 s3, 0x3ab42872 v_div_fixup_f32 v6, v6, v4, s22 v_add_f32_e32 v2, v12, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v10, v8, v7 :: v_dual_sub_f32 v5, 0x40490fdb, v2 v_fma_f32 v14, -v1, v10, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v10, v14, v7 v_fma_f32 v1, -v1, v10, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_div_fmas_f32 v1, v1, v7, v10 v_cmp_gt_f32_e32 vcc_lo, 0, v0 v_fmac_f32_e32 v0, v0, v3 v_div_fixup_f32 v1, v1, 0xf812819a, s4 v_cndmask_b32_e32 v2, v2, v5, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v0, 0x3fc90fdb, v0 v_fma_f32 v1, 0x80000000, v1, -s5 s_clause 0x1 s_load_b64 s[34:35], s[0:1], 0x10 s_load_b128 s[4:7], s[0:1], 0x20 v_cndmask_b32_e64 v2, v0, v2, s2 s_mov_b32 s2, 0xbbbac73d v_sub_f32_e32 v1, s15, v1 s_cselect_b32 s15, -1, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e64 v3, 0xbf317218, |v2| v_frexp_mant_f32_e64 v0, |v1| s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e64 v7, v3, |v2| v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v0 s_waitcnt lgkmcnt(0) s_cmp_gt_i32 s34, 0 v_cndmask_b32_e64 v5, 0, 1, vcc_lo s_cselect_b32 s11, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_ldexp_f32 v0, v0, v5 v_sub_f32_e32 v5, v7, v3 v_dual_add_f32 v7, 0x3f317218, v7 :: v_dual_add_f32 v8, 1.0, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e64 v5, |v2|, v5 v_dual_add_f32 v12, -1.0, v8 :: v_dual_sub_f32 v5, v5, v7 v_add_f32_e32 v7, -1.0, v0 v_rcp_f32_e32 v9, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_sub_f32 v0, v0, v12 :: v_dual_add_f32 v5, 0x3102e308, v5 v_add_f32_e32 v11, v3, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f32_e32 v14, 0x3fb8aa3b, v11 v_sub_f32_e32 v3, v3, v11 v_rndne_f32_e32 v12, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v3, v5, v3 v_fmamk_f32 v5, v12, 0xbf317200, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v14, 0x35bfbc00, v12 :: v_dual_add_f32 v15, v3, v5 v_sub_f32_e32 v17, v15, v14 v_sub_f32_e32 v5, v5, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v15, v15, v17 v_add_f32_e32 v3, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v5, v15, v14 v_sub_f32_e64 v15, 0xff800000, s5 v_add_f32_e32 v5, v3, v5 v_mul_f32_e64 v3, s6, s7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v14, v17, v5 v_dual_mul_f32 v10, v7, v9 :: v_dual_sub_f32 v17, v17, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v13, v8, v10 v_fma_f32 v8, v10, v8, -v13 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fmac_f32_e32 v8, v10, v0 v_add_f32_e64 v0, 0x85a77369, s26 v_add_f32_e32 v11, v13, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v16, v7, v11 v_sub_f32_e32 v13, v11, v13 v_sub_f32_e32 v7, v7, v16 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_sub_f32_e32 v8, v13, v8 v_mul_f32_e32 v13, 0x2ea39ef3, v12 v_cvt_i32_f32_e32 v12, v12 v_sub_f32_e32 v7, v7, v11 v_mul_f32_e64 v11, s4, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v7, v8, v7 v_fmac_f32_e32 v3, v11, v15 v_sub_f32_e64 v8, 12, s35 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v7, v16, v7 :: v_dual_sub_f32 v16, v14, v13 v_mul_f32_e32 v7, v9, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_mov_b32 v9, s21 :: v_dual_sub_f32 v14, v14, v16 v_add_f32_e32 v19, v10, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_fmamk_f32 v9, s20, 0x85d245f3, v9 v_dual_sub_f32 v13, v14, v13 :: v_dual_add_f32 v14, 0xf9ef5ac5, v18 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v10, v19, v10 v_add_f32_e64 v18, |v9|, |v9| s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_frexp_mant_f32_e64 v27, |v14| v_frexp_exp_i32_f32_e32 v23, v14 v_sub_f32_e32 v7, v7, v10 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_mul_f32 v32, 0x3fb8aa3b, v18 :: v_dual_add_f32 v17, v5, v17 v_readfirstlane_b32 s4, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v10, v17, v13 v_add_f32_e32 v15, v16, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_mov_b32 v31, s24 :: v_dual_mul_f32 v22, v15, v15 v_sub_f32_e32 v16, v16, v15 v_fma_f32 v25, v15, v15, -v22 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f32_e32 v10, v10, v16 v_fmaak_f32 v16, s3, v15, 0x3c091de6 v_add_f32_e32 v26, v10, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmaak_f32 v16, v15, v16, 0x3d2aadcc v_fmac_f32_e32 v25, v15, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmaak_f32 v16, v15, v16, 0x3e2aaa47 v_add_f32_e32 v30, v22, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmaak_f32 v16, v15, v16, 0x3efffffc v_sub_f32_e32 v22, v30, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v33, v16, v30 v_sub_f32_e32 v22, v25, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f32 v25, v30, v16, -v33 v_rndne_f32_e32 v30, v32 v_dual_fmaak_f32 v5, 0, v8, 0xfb81f147 :: v_dual_mul_f32 v8, v19, v19 v_dual_fmac_f32 v25, v22, v16 :: v_dual_sub_f32 v16, v32, v30 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v11, v19, v19, -v8 v_dual_add_f32 v36, v33, v25 :: v_dual_add_f32 v13, v7, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v11, v19, v13 v_add_f32_e32 v21, v8, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fmaak_f32 v24, s8, v21, 0x3e91f4c4 v_sub_f32_e32 v8, v21, v8 v_fmaak_f32 v24, v21, v24, 0x3ecccdef s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v8, v11, v8 v_mul_f32_e32 v26, v21, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v11, v21, v24, -v26 v_fmac_f32_e32 v11, v8, v24 v_fma_f32 v24, 0x3fb8aa3b, v18, -v32 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v35, v26, v11 :: v_dual_fmac_f32 v24, 0x32a5705f, v18 v_sub_f32_e32 v22, v35, v26 v_dual_add_f32 v26, 0x3f2aaaaa, v35 :: v_dual_add_f32 v17, s12, v20 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f32_e32 v16, v16, v24 v_bfi_b32 v20, 0x7fffffff, 0, v14 v_sub_f32_e32 v11, v11, v22 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_add_f32 v22, 0xbf2aaaaa, v26 :: v_dual_mul_f32 v13, v9, v9 v_exp_f32_e32 v16, v16 v_cmp_gt_f32_e64 s14, |v14|, |v17| v_frexp_exp_i32_f32_e32 v28, v17 s_delay_alu instid0(VALU_DEP_3) v_sub_f32_e32 v22, v35, v22 v_fmaak_f32 v34, s2, v13, 0x3ca908c9 v_mul_f32_e32 v32, v19, v21 v_add_f32_e32 v37, v15, v36 v_cmp_ngt_f32_e64 s2, 0xc2ce8ed0, v18 v_frexp_mant_f32_e64 v29, |v17| v_fmaak_f32 v34, v13, v34, 0xbd5c1c4e v_fma_f32 v24, v21, v19, -v32 v_sub_f32_e32 v15, v37, v15 v_cmp_o_f32_e64 s3, v17, v17 v_cmp_class_f32_e64 s12, v14, 0x1f8 v_readfirstlane_b32 s5, v28 v_fmac_f32_e32 v24, v21, v7 v_ldexp_f32 v7, v7, 1 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_fmac_f32_e32 v24, v8, v19 v_add_f32_e32 v11, 0x31739010, v11 v_sub_f32_e32 v8, v36, v15 v_ldexp_f32 v19, v19, 1 v_fmaak_f32 v15, v13, v34, 0x3e088382 v_dual_add_f32 v11, v11, v22 :: v_dual_add_f32 v22, v32, v24 v_sub_f32_e32 v33, v36, v33 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_sub_f32_e32 v21, v25, v33 v_cvt_i32_f32_e32 v25, v30 v_sub_f32_e32 v30, v22, v32 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v10, v10, v21 v_ldexp_f32 v16, v16, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v24, v24, v30 v_add_f32_e32 v8, v10, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v16, 0, v16, s2 v_cmp_nlt_f32_e64 s2, 0x42b17218, v18 v_fmaak_f32 v10, v13, v15, 0xbeaaaa99 v_add_f32_e32 v25, v37, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e64 v10, |v9|, v10 v_add_f32_e32 v32, 1.0, v25 v_dual_sub_f32 v18, v25, v37 :: v_dual_add_f32 v21, v26, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v10, v13, v10, |v9| v_dual_sub_f32 v8, v8, v18 :: v_dual_sub_f32 v15, v26, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v26, v22, v21 :: v_dual_add_f32 v11, v11, v15 v_fma_f32 v15, v22, v21, -v26 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_fmac_f32_e32 v15, v22, v11 v_cndmask_b32_e64 v11, 0x7f800000, v16, s2 v_frexp_exp_i32_f32_e32 v16, v1 v_add_f32_e32 v22, -1.0, v32 v_cmp_eq_f32_e64 s2, 0, v17 v_add_f32_e32 v11, 1.0, v11 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_subrev_co_ci_u32_e32 v16, vcc_lo, 0, v16, vcc_lo v_sub_f32_e32 v18, v25, v22 v_cmp_gt_f32_e64 vcc_lo, 0x3f200000, |v9| s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_rcp_f32_e32 v11, v11 v_cvt_f32_i32_e32 v16, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v8, v8, v18 v_add_f32_e32 v25, v32, v8 s_waitcnt_depctr 0xfff v_fma_f32 v11, v11, -2.0, 1.0 v_dual_fmac_f32 v15, v24, v21 :: v_dual_mul_f32 v24, 0x3f317218, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_cndmask_b32 v10, v11, v10 :: v_dual_add_f32 v21, v26, v15 v_cmp_eq_f32_e64 vcc_lo, |v14|, |v17| v_add_f32_e32 v18, v19, v21 v_sub_f32_e32 v22, v21, v26 v_fma_f32 v26, 0x3f317218, v16, -v24 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v19, v18, v19 v_dual_sub_f32 v15, v15, v22 :: v_dual_fmamk_f32 v16, v16, 0xb102e308, v26 v_ldexp_f32 v22, v25, v12 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v19, v21, v19 v_add_f32_e32 v15, v7, v15 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v13, v24, v16 v_rcp_f32_e32 v21, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f32_e32 v15, v15, v19 v_sub_f32_e32 v19, v25, v32 v_add_f32_e32 v25, v18, v15 s_waitcnt_depctr 0xfff v_dual_sub_f32 v8, v8, v19 :: v_dual_mul_f32 v19, v22, v21 v_sub_f32_e32 v18, v25, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_ldexp_f32 v26, v8, v12 v_bfi_b32 v8, 0x7fffffff, v10, v9 v_sub_f32_e32 v10, v13, v24 v_fma_f32 v12, v21, v22, -v19 v_floor_f32_e32 v8, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_sub_f32 v10, v16, v10 :: v_dual_add_f32 v11, v13, v25 v_fmac_f32_e32 v12, v21, v26 v_and_b32_e32 v7, 0x80000000, v14 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_ldexp_f32 v8, v8, 2 v_sub_f32_e32 v9, v11, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v16, v19, v12 v_fma_f32 v8, -v8, s19, s18 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_sub_f32_e32 v24, v11, v9 v_sub_f32_e32 v9, v25, v9 v_fma_f32 v8, |v8|, s17, s16 s_sub_i32 s16, s4, s5 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_sub_f32_e32 v13, v13, v24 s_cmp_gt_i32 s16, 12 s_cselect_b32 s17, -1, 0 s_and_b32 s3, s12, s3 v_add_f32_e32 v9, v9, v13 v_sub_f32_e32 v13, v16, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_sub_f32 v12, v13, v12 :: v_dual_sub_f32 v15, v15, v18 v_sub_f32_e32 v18, 1.0, v16 v_dual_add_f32 v24, v10, v15 :: v_dual_sub_f32 v19, 1.0, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v25, v24, v10 v_add_f32_e32 v9, v24, v9 v_dual_sub_f32 v13, v19, v16 :: v_dual_sub_f32 v16, v24, v25 v_div_scale_f32 v24, null, v8, v8, 0xeafeeba7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f32_e32 v13, v12, v13 v_sub_f32_e32 v12, v15, v25 v_dual_sub_f32 v10, v10, v16 :: v_dual_add_f32 v19, v11, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_rcp_f32_e32 v15, v24 v_add_f32_e32 v16, v18, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_add_f32 v12, v12, v10 :: v_dual_sub_f32 v11, v19, v11 v_ldexp_f32 v10, v27, 12 v_sub_f32_e32 v25, v9, v11 v_cndmask_b32_e32 v9, v14, v20, vcc_lo v_cmp_eq_f32_e32 vcc_lo, 1.0, v1 v_mul_f32_e32 v14, v21, v16 s_delay_alu instid0(TRANS32_DEP_1) v_fma_f32 v20, -v24, v15, 1.0 v_add_f32_e32 v17, v12, v25 v_ldexp_f32 v12, v29, 1 v_cndmask_b32_e64 v27, 0x855ab76c, 1.0, vcc_lo v_mul_f32_e32 v23, v22, v14 v_div_scale_f32 v29, vcc_lo, 0xeafeeba7, v8, 0xeafeeba7 v_add_f32_e32 v25, v19, v17 v_fmac_f32_e32 v15, v20, v15 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f32 v30, v14, v22, -v23 v_add_nc_u32_e32 v11, -1, v28 v_dual_sub_f32 v19, v25, v19 :: v_dual_mul_f32 v32, v27, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fmac_f32_e32 v30, v14, v26 v_mul_f32_e32 v20, v29, v15 v_sub_f32_e32 v17, v17, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f32 v19, v27, v25, -v32 v_add_f32_e32 v25, v23, v30 v_cmp_class_f32_e64 s4, v32, 0x204 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fmac_f32_e32 v19, v27, v17 v_fma_f32 v17, -v24, v20, v29 v_sub_f32_e32 v28, v16, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v4, v32, v19 v_dual_fmac_f32 v20, v17, v15 :: v_dual_sub_f32 v17, v18, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v16, v16, v28 v_cndmask_b32_e64 v18, v4, v32, s4 v_sub_f32_e32 v4, v4, v32 s_delay_alu instid0(VALU_DEP_4) v_fma_f32 v24, -v24, v20, v29 v_add_f32_e32 v13, v13, v17 v_sub_f32_e32 v17, v25, v23 v_cmp_eq_f32_e64 s4, 0x42b17218, v18 v_sub_f32_e32 v4, v19, v4 v_cmp_neq_f32_e64 s8, 0x7f800000, |v18| s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_sub_f32 v16, v16, v25 :: v_dual_sub_f32 v17, v17, v30 v_cndmask_b32_e64 v23, 0, 0x37000000, s4 v_cmp_eq_f32_e64 s4, 0, v1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v4, 0, v4, s8 v_dual_add_f32 v13, v13, v16 :: v_dual_sub_f32 v16, v18, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_add_f32_e32 v4, v23, v4 v_div_fmas_f32 v15, v24, v15, v20 v_add_f32_e32 v20, v21, v14 v_add_f32_e32 v13, v17, v13 v_mul_f32_e32 v17, 0x3fb8aa3b, v16 v_cmp_gt_f32_e32 vcc_lo, 0, v27 v_div_fixup_f32 v15, v15, v8, 0xeafeeba7 v_sub_f32_e32 v25, v20, v21 v_add_f32_e32 v13, v28, v13 v_fma_f32 v28, 0x3fb8aa3b, v16, -v17 v_rndne_f32_e32 v29, v17 v_div_scale_f32 v24, null, 0x5892d24, 0x5892d24, v15 v_sub_f32_e32 v14, v14, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_mul_f32 v13, v21, v13 :: v_dual_fmac_f32 v28, 0x32a5705f, v16 v_rcp_f32_e32 v30, v24 v_sub_f32_e32 v17, v17, v29 v_trunc_f32_e32 v21, v27 s_delay_alu instid0(VALU_DEP_3) v_add_f32_e32 v13, v14, v13 v_mul_f32_e32 v25, 0.5, v27 v_cmp_ngt_f32_e64 s8, 0xc2ce8ed0, v16 v_add_f32_e32 v14, v17, v28 v_cmp_eq_f32_e64 s5, v21, v27 v_add_f32_e32 v27, v20, v13 v_trunc_f32_e32 v17, v25 v_fma_f32 v21, -v24, v30, 1.0 v_exp_f32_e32 v14, v14 v_div_scale_f32 v28, s6, v15, 0x5892d24, v15 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_neq_f32_e64 s7, v17, v25 v_fmac_f32_e32 v30, v21, v30 v_cvt_i32_f32_e32 v21, v29 v_ldexp_f32 v29, v27, -2 v_sub_f32_e32 v18, v27, v20 s_and_b32 s7, s5, s7 v_mul_f32_e32 v17, v28, v30 s_delay_alu instid0(TRANS32_DEP_1) v_ldexp_f32 v14, v14, v21 v_sub_f32_e32 v19, v22, v29 v_sub_f32_e32 v13, v13, v18 v_cndmask_b32_e64 v18, 1.0, v1, s7 v_cndmask_b32_e64 v21, 0, v1, s7 v_cndmask_b32_e64 v14, 0, v14, s8 v_sub_f32_e32 v20, v22, v19 v_cmp_nlt_f32_e64 s8, 0x42b17218, v16 v_ldexp_f32 v13, v13, -2 v_cmp_class_f32_e64 s7, v1, 0x204 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_f32_e32 v16, v20, v29 v_cndmask_b32_e64 v14, 0x7f800000, v14, s8 v_fma_f32 v20, -v24, v17, v28 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v16, v26, v16 v_fma_f32 v4, v14, v4, v14 v_cmp_eq_f32_e64 s8, 0x7f800000, v14 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v17, v20, v30 v_sub_f32_e32 v13, v16, v13 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v4, v4, v14, s8 v_fma_f32 v16, -v24, v17, v28 s_xor_b32 s8, s4, vcc_lo s_mov_b32 vcc_lo, s6 v_add_f32_e32 v13, v19, v13 v_bfi_b32 v4, 0x7fffffff, v4, v18 v_div_fmas_f32 v16, v16, v30, v17 v_cmp_nlt_f32_e64 vcc_lo, 0x42b2d4fc, |v2| v_cndmask_b32_e64 v14, 0x7f800000, 0, s8 s_mov_b32 s8, 0 v_cndmask_b32_e64 v18, 0x7fc00000, v4, s5 v_cmp_gt_f32_e64 s5, 0x39800000, |v2| v_cndmask_b32_e32 v13, 0x7f800000, v13, vcc_lo v_cmp_gt_f32_e32 vcc_lo, 0, v1 v_bfi_b32 v14, 0x7fffffff, v14, v21 v_div_fixup_f32 v15, v16, 0x5892d24, v15 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v13, v13, |v2|, s5 v_cndmask_b32_e32 v4, v4, v18, vcc_lo s_or_b32 vcc_lo, s4, s7 v_add_f32_e32 v6, v6, v15 s_mov_b32 s5, 0 v_bfi_b32 v2, 0x7fffffff, v13, v2 v_cndmask_b32_e32 v14, v4, v14, vcc_lo v_rcp_f32_e32 v4, v12 v_cmp_o_f32_e32 vcc_lo, v1, v1 v_mov_b32_e32 v13, 0 s_delay_alu instid0(VALU_DEP_3) v_cndmask_b32_e32 v1, 0x7fc00000, v14, vcc_lo .LBB0_2: ; =>This Loop Header: Depth=1 ; Child Loop BB0_4 Depth 2 ; Child Loop BB0_8 Depth 2 ; Child Loop BB0_10 Depth 3 v_cmp_ngt_f32_e32 vcc_lo, v31, v0 s_cbranch_vccnz .LBB0_13 ; %bb.3: ; in Loop: Header=BB0_2 Depth=1 v_add_f32_e32 v14, 1.0, v31 s_and_not1_b32 vcc_lo, exec_lo, s15 s_mov_b64 s[6:7], s[36:37] s_mov_b32 s12, s27 s_delay_alu instid0(VALU_DEP_1) v_cmp_nge_f32_e64 s4, v14, v5 s_cbranch_vccnz .LBB0_5 .LBB0_4: ; %.lr.ph ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_add_i32 s12, s12, -1 v_mov_b32_e32 v31, v6 global_store_b32 v13, v8, s[6:7] s_add_u32 s6, s6, 4 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s12, 0 s_cbranch_scc0 .LBB0_4 s_branch .LBB0_6 .LBB0_5: ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(VALU_DEP_1) v_cndmask_b32_e64 v31, v3, v14, s4 .LBB0_6: ; %.preheader76 ; in Loop: Header=BB0_2 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s11 s_cbranch_vccnz .LBB0_13 ; %bb.7: ; %.lr.ph100.preheader ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s4, 0 .LBB0_8: ; %.lr.ph100 ; Parent Loop BB0_2 Depth=1 ; => This Loop Header: Depth=2 ; Child Loop BB0_10 Depth 3 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[12:13], s[4:5], 2 v_mov_b32_e32 v14, v9 s_add_u32 s6, s28, s12 s_addc_u32 s7, s29, s13 s_and_not1_b32 vcc_lo, exec_lo, s14 global_store_b32 v13, v2, s[6:7] s_cbranch_vccnz .LBB0_12 ; %bb.9: ; in Loop: Header=BB0_8 Depth=2 v_mov_b32_e32 v14, v10 s_and_not1_b32 vcc_lo, exec_lo, s17 s_mov_b32 s18, s16 s_cbranch_vccnz .LBB0_11 .LBB0_10: ; %.preheader.i.i ; Parent Loop BB0_2 Depth=1 ; Parent Loop BB0_8 Depth=2 ; => This Inner Loop Header: Depth=3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_mul_f32_e32 v15, v4, v14 s_mov_b32 s19, s18 s_add_i32 s18, s18, -12 s_cmp_gt_u32 s19, 24 v_rndne_f32_e32 v15, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v14, -v15, v12, v14 v_cmp_gt_f32_e32 vcc_lo, 0, v14 v_cndmask_b32_e32 v15, 0x80000000, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v14, v14, v15 v_ldexp_f32 v14, v14, 12 s_cbranch_scc1 .LBB0_10 .LBB0_11: ; %.loopexit.i.i ; in Loop: Header=BB0_8 Depth=2 s_add_i32 s18, s18, -11 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_ldexp_f32 v14, v14, s18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v15, v4, v14 v_rndne_f32_e32 v15, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v14, -v15, v12, v14 v_cmp_gt_f32_e32 vcc_lo, 0, v14 v_cndmask_b32_e32 v15, 0x80000000, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v14, v14, v15 v_ldexp_f32 v14, v14, v11 s_delay_alu instid0(VALU_DEP_1) v_xor_b32_e32 v14, v7, v14 .LBB0_12: ; %_ZL5fmodfff.exit ; in Loop: Header=BB0_8 Depth=2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_cndmask_b32_e64 v14, v14, 0x7fc00000, s2 s_add_u32 s12, s30, s12 s_addc_u32 s13, s31, s13 s_add_i32 s4, s4, 1 s_cmp_lg_u32 s4, s34 v_cndmask_b32_e64 v14, 0x7fc00000, v14, s3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v14, s10, v14 v_div_scale_f32 v15, null, v14, v14, s9 v_div_scale_f32 v18, vcc_lo, s9, v14, s9 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v16, v15 s_waitcnt_depctr 0xfff v_fma_f32 v17, -v15, v16, 1.0 v_fmac_f32_e32 v16, v17, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v17, v18, v16 v_fma_f32 v19, -v15, v17, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v17, v19, v16 v_fma_f32 v15, -v15, v17, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v15, v15, v16, v17 v_div_fixup_f32 v14, v15, v14, s9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v14, 0xd01b0bed, v14 v_mul_f32_e32 v15, 0x5c3242c, v14 global_store_b32 v13, v15, s[12:13] global_load_b32 v15, v13, s[6:7] s_waitcnt vmcnt(0) v_fmac_f32_e32 v15, 0x5c3242c, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v14, v1, v15 v_add_f32_e32 v31, v31, v14 s_cbranch_scc1 .LBB0_8 .LBB0_13: ; %.loopexit ; in Loop: Header=BB0_2 Depth=1 s_add_i32 s8, s8, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s8, s25 s_cbranch_scc0 .LBB0_2 .LBB0_14: ; %._crit_edge s_load_b64 s[2:3], s[0:1], 0xe8 v_mbcnt_lo_u32_b32 v28, -1, 0 v_mov_b32_e32 v6, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v28 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v4 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_20 ; %bb.15: v_mov_b32_e32 v0, 0 s_mov_b32 s4, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[8:9], v0, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[1:2], v0, s[2:3] offset:40 global_load_b64 v[5:6], v0, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v2, v2, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v3, v1, 24 v_mul_lo_u32 v2, v2, 24 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v2, v3, v2 s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v5, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo global_load_b64 v[6:7], v[1:2], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[6:7], v[8:9] s_cbranch_execz .LBB0_19 ; %bb.16: ; %.preheader3.i.i.i.preheader s_mov_b32 s5, 0 .LBB0_17: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[1:2], v0, s[2:3] offset:40 global_load_b64 v[10:11], v0, s[2:3] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v7, v2, v9 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11] v_mov_b32_e32 v1, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2] v_mov_b32_e32 v6, v2 global_load_b64 v[6:7], v[5:6], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_17 ; %bb.18: ; %Flow513 s_or_b32 exec_lo, exec_lo, s5 .LBB0_19: ; %Flow515 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_20: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v5, 0 v_readfirstlane_b32 s4, v6 v_readfirstlane_b32 s5, v7 s_mov_b32 s10, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[8:9], v5, s[2:3] offset:40 global_load_b128 v[0:3], v5, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_22 ; %bb.21: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v10, vcc_lo, v0, s9 v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1 global_store_b128 v[10:11], v[6:9], off offset:8 .LBB0_22: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[6:7], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v2, s6 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v2, v6 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5 v_mov_b32_e32 v6, v5 v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15 v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14 s_clause 0x3 global_store_b128 v[8:9], v[4:7], off global_store_b128 v[8:9], v[10:13], off offset:16 global_store_b128 v[8:9], v[10:13], off offset:32 global_store_b128 v[8:9], v[10:13], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_30 ; %bb.23: v_mov_b32_e32 v10, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[2:3], v10, s[2:3] offset:40 v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5 s_waitcnt vmcnt(0) v_and_b32_e32 v3, s5, v3 v_and_b32_e32 v2, s4, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v4, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v4, v3 v_add_co_u32 v6, vcc_lo, v0, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo global_store_b64 v[6:7], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[4:5], v[13:14] s_cbranch_execz .LBB0_26 ; %bb.24: ; %.preheader1.i.i.i.preheader s_mov_b32 s10, 0 .LBB0_25: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_25 .LBB0_26: ; %Flow511 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v5, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v4, s10, 0 global_load_b64 v[2:3], v5, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_28 ; %bb.27: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[2:3], v[4:5], off offset:8 .LBB0_28: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[4:5], v[2:3], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_cbranch_vccnz .LBB0_30 ; %bb.29: global_load_b32 v2, v[2:3], off offset:24 v_mov_b32_e32 v3, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v2 s_waitcnt_vscnt null, 0x0 global_store_b64 v[4:5], v[2:3], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_30: ; %Flow512 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v0, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_31: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_33 ; %bb.32: ; in Loop: Header=BB0_31 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_33: ; in Loop: Header=BB0_31 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_35 ; %bb.34: ; in Loop: Header=BB0_31 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_36 .LBB0_35: ; in Loop: Header=BB0_31 Depth=1 s_mov_b32 s1, -1 .LBB0_36: ; %Flow506 ; in Loop: Header=BB0_31 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_31 ; %bb.37: global_load_b64 v[0:1], v[8:9], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_41 ; %bb.38: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_41 ; %bb.39: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_40: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_40 .LBB0_41: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[4:5] s_add_u32 s4, s4, .str@rel32@lo+4 s_addc_u32 s5, s5, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[4:5], 0 s_cbranch_scc0 .LBB0_127 ; %bb.42: s_waitcnt vmcnt(0) v_dual_mov_b32 v3, v1 :: v_dual_and_b32 v32, 2, v0 v_dual_mov_b32 v30, 0 :: v_dual_mov_b32 v7, 1 v_and_b32_e32 v2, -3, v0 v_mov_b32_e32 v6, 2 s_mov_b64 s[6:7], 7 .LBB0_43: ; =>This Loop Header: Depth=1 ; Child Loop BB0_46 Depth 2 ; Child Loop BB0_53 Depth 2 ; Child Loop BB0_61 Depth 2 ; Child Loop BB0_69 Depth 2 ; Child Loop BB0_77 Depth 2 ; Child Loop BB0_85 Depth 2 ; Child Loop BB0_93 Depth 2 ; Child Loop BB0_101 Depth 2 ; Child Loop BB0_109 Depth 2 ; Child Loop BB0_115 Depth 2 ; Child Loop BB0_124 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[6:7], 56 ; implicit-def: $vgpr10_vgpr11 ; implicit-def: $sgpr15 s_and_b32 s0, s0, exec_lo s_cselect_b32 s8, s6, 56 s_cselect_b32 s9, s7, 0 s_cmp_gt_u32 s8, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_48 ; %bb.44: ; in Loop: Header=BB0_43 Depth=1 v_mov_b32_e32 v10, 0 v_mov_b32_e32 v11, 0 s_cmp_eq_u32 s8, 0 s_cbranch_scc1 .LBB0_47 ; %bb.45: ; %.preheader31.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_lshl_b64 s[0:1], s[8:9], 3 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[4:5] .LBB0_46: ; %.preheader31.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v4, v30, s[12:13] s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s0, s10 v_or_b32_e32 v10, v4, v10 v_or_b32_e32 v11, v5, v11 s_cbranch_scc1 .LBB0_46 .LBB0_47: ; %Flow482 ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s15, 0 .LBB0_48: ; %Flow484 ; in Loop: Header=BB0_43 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[4:5] s_cbranch_vccnz .LBB0_50 ; %bb.49: ; in Loop: Header=BB0_43 Depth=1 global_load_b64 v[10:11], v30, s[4:5] s_add_i32 s15, s8, -8 s_add_u32 s0, s4, 8 s_addc_u32 s1, s5, 0 .LBB0_50: ; %.loopexit32.i ; in Loop: Header=BB0_43 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_55 ; %bb.51: ; in Loop: Header=BB0_43 Depth=1 v_mov_b32_e32 v12, 0 v_mov_b32_e32 v13, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_54 ; %bb.52: ; %.preheader29.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_53: ; %.preheader29.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v12, v4, v12 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v13, v5, v13 s_cbranch_scc1 .LBB0_53 .LBB0_54: ; %Flow477 ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_56 .LBB0_55: ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $sgpr14 .LBB0_56: ; %Flow479 ; in Loop: Header=BB0_43 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_58 ; %bb.57: ; in Loop: Header=BB0_43 Depth=1 global_load_b64 v[12:13], v30, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_58: ; %.loopexit30.i ; in Loop: Header=BB0_43 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_63 ; %bb.59: ; in Loop: Header=BB0_43 Depth=1 v_mov_b32_e32 v14, 0 v_mov_b32_e32 v15, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_62 ; %bb.60: ; %.preheader27.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_61: ; %.preheader27.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v14, v4, v14 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v15, v5, v15 s_cbranch_scc1 .LBB0_61 .LBB0_62: ; %Flow472 ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_64 .LBB0_63: ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_64: ; %Flow474 ; in Loop: Header=BB0_43 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_66 ; %bb.65: ; in Loop: Header=BB0_43 Depth=1 global_load_b64 v[14:15], v30, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_66: ; %.loopexit28.i ; in Loop: Header=BB0_43 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_71 ; %bb.67: ; in Loop: Header=BB0_43 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_70 ; %bb.68: ; %.preheader25.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_69: ; %.preheader25.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v16, v4, v16 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v17, v5, v17 s_cbranch_scc1 .LBB0_69 .LBB0_70: ; %Flow467 ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_72 .LBB0_71: ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr14 .LBB0_72: ; %Flow469 ; in Loop: Header=BB0_43 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_74 ; %bb.73: ; in Loop: Header=BB0_43 Depth=1 global_load_b64 v[16:17], v30, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_74: ; %.loopexit26.i ; in Loop: Header=BB0_43 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_79 ; %bb.75: ; in Loop: Header=BB0_43 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_78 ; %bb.76: ; %.preheader23.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_77: ; %.preheader23.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v18, v4, v18 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v19, v5, v19 s_cbranch_scc1 .LBB0_77 .LBB0_78: ; %Flow462 ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_80 .LBB0_79: ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_80: ; %Flow464 ; in Loop: Header=BB0_43 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_82 ; %bb.81: ; in Loop: Header=BB0_43 Depth=1 global_load_b64 v[18:19], v30, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_82: ; %.loopexit24.i ; in Loop: Header=BB0_43 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_87 ; %bb.83: ; in Loop: Header=BB0_43 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_86 ; %bb.84: ; %.preheader21.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_85: ; %.preheader21.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v20, v4, v20 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v21, v5, v21 s_cbranch_scc1 .LBB0_85 .LBB0_86: ; %Flow457 ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_88 .LBB0_87: ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr20_vgpr21 ; implicit-def: $sgpr14 .LBB0_88: ; %Flow459 ; in Loop: Header=BB0_43 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_90 ; %bb.89: ; in Loop: Header=BB0_43 Depth=1 global_load_b64 v[20:21], v30, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_90: ; %.loopexit22.i ; in Loop: Header=BB0_43 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_95 ; %bb.91: ; in Loop: Header=BB0_43 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_94 ; %bb.92: ; %.preheader.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[0:1] .LBB0_93: ; %.preheader.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v4, v30, s[12:13] s_add_i32 s14, s14, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 0 v_or_b32_e32 v22, v4, v22 v_or_b32_e32 v23, v5, v23 s_cbranch_scc1 .LBB0_93 .LBB0_94: ; %Flow452 ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, 0 s_branch .LBB0_96 .LBB0_95: ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s10, -1 .LBB0_96: ; %Flow454 ; in Loop: Header=BB0_43 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_98 ; %bb.97: ; in Loop: Header=BB0_43 Depth=1 global_load_b64 v[22:23], v30, s[0:1] .LBB0_98: ; %.loopexit.i ; in Loop: Header=BB0_43 Depth=1 s_waitcnt vmcnt(0) v_dual_mov_b32 v29, v28 :: v_dual_mov_b32 v4, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v29 v_mov_b32_e32 v5, 0 v_cmp_eq_u32_e64 s0, s0, v29 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_104 ; %bb.99: ; in Loop: Header=BB0_43 Depth=1 global_load_b64 v[26:27], v30, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v30, s[2:3] offset:40 global_load_b64 v[8:9], v30, s[2:3] s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v5, v5, v27 v_and_b32_e32 v4, v4, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v5, v5, 24 v_mul_hi_u32 v24, v4, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v24, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[24:25], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v30, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[4:5], v[26:27] s_cbranch_execz .LBB0_103 ; %bb.100: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s11, 0 .LBB0_101: ; %.preheader3.i.i19.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v30, s[2:3] offset:40 global_load_b64 v[24:25], v30, s[2:3] v_dual_mov_b32 v27, v5 :: v_dual_mov_b32 v26, v4 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v26 s_waitcnt vmcnt(0) v_mad_u64_u32 v[4:5], null, v8, 24, v[24:25] v_and_b32_e32 v24, v9, v27 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v24, 24, v[5:6] v_mov_b32_e32 v5, v8 global_load_b64 v[24:25], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v30, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[26:27] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_101 ; %bb.102: ; %Flow447 ; in Loop: Header=BB0_43 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_103: ; %Flow449 ; in Loop: Header=BB0_43 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 .LBB0_104: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_43 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[8:9], v30, s[2:3] offset:40 global_load_b128 v[24:27], v30, s[2:3] v_readfirstlane_b32 s10, v4 v_readfirstlane_b32 s11, v5 s_mov_b32 s16, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s12, v8 v_readfirstlane_b32 s13, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[10:11], s[12:13] s_mul_i32 s1, s13, 24 s_mul_hi_u32 s14, s12, 24 s_mul_i32 s15, s12, 24 s_and_saveexec_b32 s17, s0 s_cbranch_execz .LBB0_106 ; %bb.105: ; in Loop: Header=BB0_43 Depth=1 v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, v30 s_add_i32 s16, s14, s1 s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v24, s15 v_add_co_ci_u32_e32 v9, vcc_lo, s16, v25, vcc_lo global_store_b128 v[8:9], v[4:7], off offset:8 .LBB0_106: ; in Loop: Header=BB0_43 Depth=1 s_or_b32 exec_lo, exec_lo, s17 v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56 v_or_b32_e32 v4, 0, v3 v_or_b32_e32 v5, v2, v32 s_lshl_b64 s[12:13], s[12:13], 12 s_lshl_b32 s16, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s16, s16, 28 v_dual_cndmask_b32 v9, v4, v3 :: v_dual_cndmask_b32 v4, v5, v2 v_lshlrev_b64 v[2:3], 6, v[29:30] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v26, s12 v_add_co_ci_u32_e32 v27, vcc_lo, s13, v27, vcc_lo s_and_b32 s16, s16, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v26, vcc_lo, v5, v2 v_and_or_b32 v8, 0xffffff1f, v4, s16 v_add_co_ci_u32_e32 v27, vcc_lo, v27, v3, vcc_lo s_clause 0x3 global_store_b128 v[26:27], v[8:11], off global_store_b128 v[26:27], v[12:15], off offset:16 global_store_b128 v[26:27], v[16:19], off offset:32 global_store_b128 v[26:27], v[20:23], off offset:48 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_114 ; %bb.107: ; in Loop: Header=BB0_43 Depth=1 s_clause 0x1 global_load_b64 v[12:13], v30, s[2:3] offset:32 glc global_load_b64 v[2:3], v30, s[2:3] offset:40 v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v2 v_readfirstlane_b32 s17, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[10:11] s_mul_i32 s13, s17, 24 s_mul_hi_u32 s17, s16, 24 s_mul_i32 s16, s16, 24 s_add_i32 s17, s17, s13 v_add_co_u32 v8, vcc_lo, v24, s16 v_add_co_ci_u32_e32 v9, vcc_lo, s17, v25, vcc_lo s_mov_b32 s13, exec_lo global_store_b64 v[8:9], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v30, v[10:13], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[4:5], v[12:13] s_cbranch_execz .LBB0_110 ; %bb.108: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s16, 0 .LBB0_109: ; %.preheader1.i.i17.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11 s_sleep 1 global_store_b64 v[8:9], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v30, v[2:5], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_or_b32 s16, vcc_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s16 s_cbranch_execnz .LBB0_109 .LBB0_110: ; %Flow445 ; in Loop: Header=BB0_43 Depth=1 s_or_b32 exec_lo, exec_lo, s13 global_load_b64 v[2:3], v30, s[2:3] offset:16 s_mov_b32 s16, exec_lo s_mov_b32 s13, exec_lo v_mbcnt_lo_u32_b32 v4, s16, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_112 ; %bb.111: ; in Loop: Header=BB0_43 Depth=1 s_bcnt1_i32_b32 s16, s16 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v29, s16 s_waitcnt vmcnt(0) global_atomic_add_u64 v[2:3], v[29:30], off offset:8 .LBB0_112: ; in Loop: Header=BB0_43 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_waitcnt vmcnt(0) global_load_b64 v[4:5], v[2:3], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_cbranch_vccnz .LBB0_114 ; %bb.113: ; in Loop: Header=BB0_43 Depth=1 global_load_b32 v29, v[2:3], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s13, v29 s_waitcnt_vscnt null, 0x0 global_store_b64 v[4:5], v[29:30], off s_and_b32 m0, s13, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_114: ; %Flow446 ; in Loop: Header=BB0_43 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_add_i32 s14, s14, s1 v_add_co_u32 v2, vcc_lo, v24, s15 v_add_co_ci_u32_e32 v3, vcc_lo, s14, v25, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v2, 20 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo .LBB0_115: ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v4, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_117 ; %bb.116: ; in Loop: Header=BB0_115 Depth=2 global_load_b32 v4, v[2:3], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v4, 1, v4 .LBB0_117: ; in Loop: Header=BB0_115 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v4 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_119 ; %bb.118: ; in Loop: Header=BB0_115 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_120 .LBB0_119: ; in Loop: Header=BB0_115 Depth=2 s_mov_b32 s1, -1 .LBB0_120: ; %Flow440 ; in Loop: Header=BB0_115 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_115 ; %bb.121: ; in Loop: Header=BB0_43 Depth=1 global_load_b128 v[2:5], v[26:27], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_125 ; %bb.122: ; in Loop: Header=BB0_43 Depth=1 s_clause 0x2 global_load_b64 v[4:5], v30, s[2:3] offset:40 global_load_b64 v[12:13], v30, s[2:3] offset:24 glc global_load_b64 v[10:11], v30, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v14, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v9, v9, v15 :: v_dual_cndmask_b32 v8, v8, v14 v_and_b32_e32 v5, v9, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v4, v8, v4 v_mul_hi_u32 v14, v4, 24 v_mul_lo_u32 v4, v4, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v4, vcc_lo, v10, v4 v_mov_b32_e32 v10, v12 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v5, v14, v5 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[4:5], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v30, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_125 ; %bb.123: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_43 Depth=1 s_mov_b32 s0, 0 .LBB0_124: ; %.preheader.i.i16.i ; Parent Loop BB0_43 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[4:5], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v30, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_124 .LBB0_125: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_43 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s6, s6, s8 s_subb_u32 s7, s7, s9 s_add_u32 s4, s4, s8 s_addc_u32 s5, s5, s9 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc1 .LBB0_43 ; %bb.126: ; %Flow485 s_mov_b32 s0, 0 s_branch .LBB0_128 .LBB0_127: s_mov_b32 s0, -1 ; implicit-def: $vgpr2_vgpr3 .LBB0_128: ; %Flow500 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_157 ; %bb.129: s_waitcnt vmcnt(0) v_mov_b32_e32 v2, v28 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v2 v_cmp_eq_u32_e64 s0, s0, v2 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_135 ; %bb.130: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_134 ; %bb.131: ; %.preheader3.i.i.i68.preheader s_mov_b32 s5, 0 .LBB0_132: ; %.preheader3.i.i.i68 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_132 ; %bb.133: ; %Flow497 s_or_b32 exec_lo, exec_lo, s5 .LBB0_134: ; %Flow499 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_135: ; %.loopexit4.i.i.i63 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_137 ; %bb.136: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v3 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_137: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v2, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1f, v0, 32 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo v_mov_b32_e32 v2, v3 v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15 v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_145 ; %bb.138: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s4 v_mov_b32_e32 v12, s5 s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v8, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_141 ; %bb.139: ; %.preheader1.i.i.i66.preheader s_mov_b32 s10, 0 .LBB0_140: ; %.preheader1.i.i.i66 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_140 .LBB0_141: ; %Flow495 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_143 ; %bb.142: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_143: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_145 ; %bb.144: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_145: ; %Flow496 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_146: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_148 ; %bb.147: ; in Loop: Header=BB0_146 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_148: ; in Loop: Header=BB0_146 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_150 ; %bb.149: ; in Loop: Header=BB0_146 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_151 .LBB0_150: ; in Loop: Header=BB0_146 Depth=1 s_mov_b32 s1, -1 .LBB0_151: ; %Flow490 ; in Loop: Header=BB0_146 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_146 ; %bb.152: global_load_b128 v[2:5], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_156 ; %bb.153: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[0:1], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] v_dual_cndmask_b32 v5, v5, v12 :: v_dual_cndmask_b32 v4, v4, v11 v_and_b32_e32 v1, v5, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v4, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v6, v0 v_mov_b32_e32 v6, v9 v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo v_mov_b32_e32 v7, v10 global_store_b64 v[0:1], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v8, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_156 ; %bb.154: ; %.preheader.i.i.i65.preheader s_mov_b32 s0, 0 .LBB0_155: ; %.preheader.i.i.i65 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[6:7] v_dual_mov_b32 v6, v9 :: v_dual_mov_b32 v7, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_155 .LBB0_156: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_157: ; %__ockl_printf_append_string_n.exit ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v28 s_waitcnt vmcnt(0) v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v28 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_163 ; %bb.158: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[7:8], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[5:6], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v0, v0, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v9, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v9, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v5, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo global_load_b64 v[5:6], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[7:8] s_cbranch_execz .LBB0_162 ; %bb.159: ; %.preheader3.i.i.i75.preheader s_mov_b32 s5, 0 .LBB0_160: ; %.preheader3.i.i.i75 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v7, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v5, 24, v[9:10] v_and_b32_e32 v9, v6, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v9, 24, v[1:2] v_mov_b32_e32 v1, v5 global_load_b64 v[5:6], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[7:8] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_160 ; %bb.161: ; %Flow433 s_or_b32 exec_lo, exec_lo, s5 .LBB0_162: ; %Flow435 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_163: ; %.loopexit4.i.i.i69 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v29, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[4:5], v29, s[2:3] offset:40 global_load_b128 v[6:9], v29, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v4 v_readfirstlane_b32 s7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_165 ; %bb.164: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, v29 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v7, vcc_lo v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 global_store_b128 v[0:1], v[10:13], off offset:8 .LBB0_165: s_or_b32 exec_lo, exec_lo, s11 v_cvt_f64_f32_e32 v[4:5], v31 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[28:29] s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v8, s6 v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v8, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v2, 0xffffff1d, v2, 34 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13 v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15 s_clause 0x3 global_store_b128 v[0:1], v[2:5], off global_store_b128 v[0:1], v[8:11], off offset:16 global_store_b128 v[0:1], v[8:11], off offset:32 global_store_b128 v[0:1], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_173 ; %bb.166: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v4, vcc_lo, v6, s10 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v7, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[4:5], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_169 ; %bb.167: ; %.preheader1.i.i.i73.preheader s_mov_b32 s10, 0 .LBB0_168: ; %.preheader1.i.i.i73 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_168 .LBB0_169: ; %Flow431 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_171 ; %bb.170: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_171: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_173 ; %bb.172: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_173: ; %Flow432 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_174: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_176 ; %bb.175: ; in Loop: Header=BB0_174 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_176: ; in Loop: Header=BB0_174 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_178 ; %bb.177: ; in Loop: Header=BB0_174 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_179 .LBB0_178: ; in Loop: Header=BB0_174 Depth=1 s_mov_b32 s1, -1 .LBB0_179: ; %Flow426 ; in Loop: Header=BB0_174 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_174 ; %bb.180: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_184 ; %bb.181: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_184 ; %bb.182: ; %.preheader.i.i.i72.preheader s_mov_b32 s0, 0 .LBB0_183: ; %.preheader.i.i.i72 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_183 .LBB0_184: ; %__ockl_printf_append_args.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7computefifiifffffffPffffffffffS_S_ffffffffff .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 408 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 38 .amdhsa_next_free_sgpr 38 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7computefifiifffffffPffffffffffS_S_ffffffffff, .Lfunc_end0-_Z7computefifiifffffffPffffffffffS_S_ffffffffff ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 10300 ; NumSgprs: 40 ; NumVgprs: 38 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 40 ; NumVGPRsForWavesPerEU: 38 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "%.17g\n" .size .str, 7 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 4 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: by_value - .offset: 20 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: by_value - .offset: 36 .size: 4 .value_kind: by_value - .offset: 40 .size: 4 .value_kind: by_value - .offset: 44 .size: 4 .value_kind: by_value - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .offset: 56 .size: 4 .value_kind: by_value - .offset: 60 .size: 4 .value_kind: by_value - .offset: 64 .size: 4 .value_kind: by_value - .offset: 68 .size: 4 .value_kind: by_value - .offset: 72 .size: 4 .value_kind: by_value - .offset: 76 .size: 4 .value_kind: by_value - .offset: 80 .size: 4 .value_kind: by_value - .offset: 84 .size: 4 .value_kind: by_value - .offset: 88 .size: 4 .value_kind: by_value - .address_space: global .offset: 96 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 104 .size: 8 .value_kind: global_buffer - .offset: 112 .size: 4 .value_kind: by_value - .offset: 116 .size: 4 .value_kind: by_value - .offset: 120 .size: 4 .value_kind: by_value - .offset: 124 .size: 4 .value_kind: by_value - .offset: 128 .size: 4 .value_kind: by_value - .offset: 132 .size: 4 .value_kind: by_value - .offset: 136 .size: 4 .value_kind: by_value - .offset: 140 .size: 4 .value_kind: by_value - .offset: 144 .size: 4 .value_kind: by_value - .offset: 148 .size: 4 .value_kind: by_value - .offset: 152 .size: 4 .value_kind: hidden_block_count_x - .offset: 156 .size: 4 .value_kind: hidden_block_count_y - .offset: 160 .size: 4 .value_kind: hidden_block_count_z - .offset: 164 .size: 2 .value_kind: hidden_group_size_x - .offset: 166 .size: 2 .value_kind: hidden_group_size_y - .offset: 168 .size: 2 .value_kind: hidden_group_size_z - .offset: 170 .size: 2 .value_kind: hidden_remainder_x - .offset: 172 .size: 2 .value_kind: hidden_remainder_y - .offset: 174 .size: 2 .value_kind: hidden_remainder_z - .offset: 192 .size: 8 .value_kind: hidden_global_offset_x - .offset: 200 .size: 8 .value_kind: hidden_global_offset_y - .offset: 208 .size: 8 .value_kind: hidden_global_offset_z - .offset: 216 .size: 2 .value_kind: hidden_grid_dims - .offset: 232 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 408 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7computefifiifffffffPffffffffffS_S_ffffffffff .private_segment_fixed_size: 0 .sgpr_count: 40 .sgpr_spill_count: 0 .symbol: _Z7computefifiifffffffPffffffffffS_S_ffffffffff.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 38 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
cfcfd831f0b8acbd041ccf214c8e957dd233a166
/** * Copyright 1993-2012 NVIDIA Corporation. All rights reserved. * * Please refer to the NVIDIA end user license agreement (EULA) associated * with this source code for terms and conditions that govern your use of * this software. Any use, reproduction, disclosure, or distribution of * this software and related documentation outside the terms of the EULA * is strictly prohibited. */ #include <stdio.h> #include <stdlib.h> #include <sys/time.h> static const int WORK_SIZE = 256; /** * This macro checks return value of the CUDA runtime call and exits * the application if the call failed. */ #define CUDA_CHECK_RETURN(value) { \ cudaError_t _m_cudaStat = value; \ if (_m_cudaStat != cudaSuccess) { \ fprintf(stderr, "Error %s at line %d in file %s\n", \ cudaGetErrorString(_m_cudaStat), __LINE__, __FILE__); \ exit(1); \ } } __device__ unsigned int bitreverse(unsigned int number) { number = ((0xf0f0f0f0 & number) >> 4) | ((0x0f0f0f0f & number) << 4); number = ((0xcccccccc & number) >> 2) | ((0x33333333 & number) << 2); number = ((0xaaaaaaaa & number) >> 1) | ((0x55555555 & number) << 1); return number; } /** * CUDA kernel function that reverses the order of bits in each element of the array. */ __global__ void bitreverse(void *data) { unsigned int *idata = (unsigned int*) data; idata[threadIdx.x] = bitreverse(idata[threadIdx.x]); } __global__ void add(int *a, int *b, int *c) { //c[blockIdx.x] = a[blockIdx.x] + b[blockIdx.x]; int index = threadIdx.x + blockIdx.x * blockDim.x; c[index] = a[index] + b[index]; } /** * Host function that prepares data array and passes it to the CUDA kernel. */ #define THREADS_PER_BLOCK 1024 int main(int argc, char *argv[]) { struct timeval t0; struct timeval t1; int N = atoi(argv[1]); int *a, *b, *c; // host copies of a, b, c int *d_a, *d_b, *d_c; // device copies of a, b, c int size = N * sizeof(int); // Allocate space for device copies of a, b, c cudaMalloc((void **)&d_a, size); cudaMalloc((void **)&d_b, size); cudaMalloc((void **)&d_c, size); // Setup input values a = (int *)malloc(size); b = (int *)malloc(size); c = (int *)malloc(size); int i = 0; for(i = 0; i < N; i++) { a[i] = i;//rand() % 100; b[i] = i;//rand() % 100; } gettimeofday(&t0,0); // Copy inputs to device cudaMemcpy(d_a, a, size, cudaMemcpyHostToDevice); cudaMemcpy(d_b, b, size, cudaMemcpyHostToDevice); // Launch add() kernel on GPU with N blocks add<<<N/THREADS_PER_BLOCK,THREADS_PER_BLOCK>>>(d_a, d_b, d_c); // Copy result back to host cudaMemcpy(c, d_c, size, cudaMemcpyDeviceToHost); gettimeofday(&t1,0); double time_spent = (t1.tv_sec-t0.tv_sec) + (double)(t1.tv_usec-t0.tv_usec)/1000000; for(i = 0; i < N; i++) { printf("%d\n",c[i]); } printf("\nTime Spent GPU: %f\n\n",time_spent); // Cleanup cudaFree(d_a); cudaFree(d_b); cudaFree(d_c); // CPU Part gettimeofday(&t0,0); for(i = 0; i < N; i++) { c[i] = a[i]+b[i]; } gettimeofday(&t1,0); time_spent = (t1.tv_sec-t0.tv_sec) + (double)(t1.tv_usec-t0.tv_usec)/1000000; printf("\nTime Spent CPU: %f\n\n",time_spent); return 0; }
.file "tmpxft_00316cd7_00000000-6_B01.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z10bitreversej .type _Z10bitreversej, @function _Z10bitreversej: .LFB2027: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2027: .size _Z10bitreversej, .-_Z10bitreversej .globl _Z30__device_stub__Z10bitreversePvPv .type _Z30__device_stub__Z10bitreversePvPv, @function _Z30__device_stub__Z10bitreversePvPv: .LFB2053: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L4 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq _Z10bitreversePv(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L4: movq 88(%rsp), %rax subq %fs:40, %rax je .L6 call __stack_chk_fail@PLT .L6: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z30__device_stub__Z10bitreversePvPv, .-_Z30__device_stub__Z10bitreversePvPv .globl _Z10bitreversePv .type _Z10bitreversePv, @function _Z10bitreversePv: .LFB2054: .cfi_startproc endbr64 jmp _Z30__device_stub__Z10bitreversePvPv .cfi_endproc .LFE2054: .size _Z10bitreversePv, .-_Z10bitreversePv .globl _Z26__device_stub__Z3addPiS_S_PiS_S_ .type _Z26__device_stub__Z3addPiS_S_PiS_S_, @function _Z26__device_stub__Z3addPiS_S_PiS_S_: .LFB2055: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L10 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z3addPiS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L10: movq 120(%rsp), %rax subq %fs:40, %rax je .L12 call __stack_chk_fail@PLT .L12: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2055: .size _Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_ .globl _Z3addPiS_S_ .type _Z3addPiS_S_, @function _Z3addPiS_S_: .LFB2056: .cfi_startproc endbr64 jmp _Z26__device_stub__Z3addPiS_S_PiS_S_ .cfi_endproc .LFE2056: .size _Z3addPiS_S_, .-_Z3addPiS_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC1: .string "%d\n" .LC2: .string "\nTime Spent GPU: %f\n\n" .LC3: .string "\nTime Spent CPU: %f\n\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $120, %rsp .cfi_def_cfa_offset 176 movq 8(%rsi), %rdi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax call atoi@PLT leaq 32(%rsp), %rdi leal 0(,%rax,4), %r15d movl %eax, %ebx movslq %r15d, %r15 movq %r15, %rsi call cudaMalloc@PLT leaq 40(%rsp), %rdi movq %r15, %rsi call cudaMalloc@PLT movq %r15, %rsi leaq 48(%rsp), %rdi call cudaMalloc@PLT movq %r15, %rdi call malloc@PLT movq %r15, %rdi movq %rax, %rbp call malloc@PLT movq %r15, %rdi movq %rax, %r12 call malloc@PLT movq %rax, %r13 xorl %eax, %eax .L16: cmpl %eax, %ebx jle .L25 movl %eax, 0(%rbp,%rax,4) movl %eax, (%r12,%rax,4) incq %rax jmp .L16 .L25: leaq 72(%rsp), %rax xorl %esi, %esi movq %rax, %rdi movq %rax, 8(%rsp) call gettimeofday@PLT movq 32(%rsp), %rdi movq %r15, %rdx movq %rbp, %rsi movl $1, %ecx call cudaMemcpy@PLT movq 40(%rsp), %rdi movq %r15, %rdx movq %r12, %rsi movl $1, %ecx call cudaMemcpy@PLT movl %ebx, %eax movl $1024, %esi xorl %r9d, %r9d cltd movl $4194305, %ecx xorl %r8d, %r8d movl $1, 96(%rsp) idivl %esi salq $10, %rcx movq %rcx, 88(%rsp) movq %rcx, %rdx movl $1, %ecx movl %eax, 60(%rsp) movabsq $4294967297, %rax movq %rax, 64(%rsp) movq 60(%rsp), %rdi movl 68(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L18 movq 48(%rsp), %rdx movq 40(%rsp), %rsi movq 32(%rsp), %rdi call _Z26__device_stub__Z3addPiS_S_PiS_S_ .L18: movq 48(%rsp), %rsi movq %r15, %rdx movl $2, %ecx movq %r13, %rdi xorl %r14d, %r14d leaq .LC1(%rip), %r15 call cudaMemcpy@PLT leaq 88(%rsp), %rax xorl %esi, %esi movq %rax, %rdi movq %rax, 16(%rsp) call gettimeofday@PLT movq 96(%rsp), %rax subq 80(%rsp), %rax cvtsi2sdq %rax, %xmm0 movq 88(%rsp), %rax subq 72(%rsp), %rax divsd .LC0(%rip), %xmm0 cvtsi2sdq %rax, %xmm1 addsd %xmm1, %xmm0 .L19: cmpl %r14d, %ebx jle .L26 movl 0(%r13,%r14,4), %edx movq %r15, %rsi movl $2, %edi xorl %eax, %eax movsd %xmm0, 24(%rsp) incq %r14 call __printf_chk@PLT movsd 24(%rsp), %xmm0 jmp .L19 .L26: leaq .LC2(%rip), %rsi movl $2, %edi movb $1, %al call __printf_chk@PLT movq 32(%rsp), %rdi call cudaFree@PLT movq 40(%rsp), %rdi call cudaFree@PLT movq 48(%rsp), %rdi call cudaFree@PLT movq 8(%rsp), %rdi xorl %esi, %esi call gettimeofday@PLT xorl %eax, %eax .L21: cmpl %eax, %ebx jle .L27 movl (%r12,%rax,4), %edx addl 0(%rbp,%rax,4), %edx movl %edx, 0(%r13,%rax,4) incq %rax jmp .L21 .L27: movq 16(%rsp), %rdi xorl %esi, %esi call gettimeofday@PLT movq 96(%rsp), %rax subq 80(%rsp), %rax leaq .LC3(%rip), %rsi cvtsi2sdq %rax, %xmm0 movq 88(%rsp), %rax subq 72(%rsp), %rax divsd .LC0(%rip), %xmm0 cvtsi2sdq %rax, %xmm1 movl $2, %edi movb $1, %al addsd %xmm1, %xmm0 call __printf_chk@PLT movq 104(%rsp), %rax subq %fs:40, %rax je .L23 call __stack_chk_fail@PLT .L23: addq $120, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .section .rodata.str1.1 .LC4: .string "_Z3addPiS_S_" .LC5: .string "_Z10bitreversePv" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2058: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z3addPiS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC5(%rip), %rdx orl $-1, %r8d leaq _Z10bitreversePv(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2058: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC0: .long 0 .long 1093567616 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z3addPiS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */ /* 0x000e220000002100 */ /*0020*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0050*/ IMAD R6, R3, c[0x0][0x0], R6 ; /* 0x0000000003067a24 */ /* 0x001fc800078e0206 */ /*0060*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x000fc800078e0207 */ /*0070*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x0c0fe400078e0207 */ /*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*0090*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea2000c1e1900 */ /*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00b0*/ IADD3 R9, R2, R5, RZ ; /* 0x0000000502097210 */ /* 0x004fca0007ffe0ff */ /*00c0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z10bitreversePv .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */ /* 0x000e220000002100 */ /*0020*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0040*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x001fca00078e0003 */ /*0050*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea4000c1e1900 */ /*0060*/ IMAD.SHL.U32 R4, R0.reuse, 0x10, RZ ; /* 0x0000001000047824 */ /* 0x044fe200078e00ff */ /*0070*/ LOP3.LUT R0, R0, 0xf0f0f0f0, RZ, 0xc0, !PT ; /* 0xf0f0f0f000007812 */ /* 0x000fc800078ec0ff */ /*0080*/ LOP3.LUT R5, R4, 0xf0f0f0f0, RZ, 0xc0, !PT ; /* 0xf0f0f0f004057812 */ /* 0x000fc800078ec0ff */ /*0090*/ LEA.HI R0, R0, R5, RZ, 0x1c ; /* 0x0000000500007211 */ /* 0x000fca00078fe0ff */ /*00a0*/ IMAD.SHL.U32 R4, R0.reuse, 0x4, RZ ; /* 0x0000000400047824 */ /* 0x040fe200078e00ff */ /*00b0*/ LOP3.LUT R0, R0, 0xcccccccc, RZ, 0xc0, !PT ; /* 0xcccccccc00007812 */ /* 0x000fc800078ec0ff */ /*00c0*/ LOP3.LUT R5, R4, 0xcccccccc, RZ, 0xc0, !PT ; /* 0xcccccccc04057812 */ /* 0x000fc800078ec0ff */ /*00d0*/ LEA.HI R0, R0, R5, RZ, 0x1e ; /* 0x0000000500007211 */ /* 0x000fca00078ff0ff */ /*00e0*/ IMAD.SHL.U32 R4, R0.reuse, 0x2, RZ ; /* 0x0000000200047824 */ /* 0x040fe200078e00ff */ /*00f0*/ LOP3.LUT R0, R0, 0xaaaaaaaa, RZ, 0xc0, !PT ; /* 0xaaaaaaaa00007812 */ /* 0x000fc800078ec0ff */ /*0100*/ LOP3.LUT R5, R4, 0xaaaaaaaa, RZ, 0xc0, !PT ; /* 0xaaaaaaaa04057812 */ /* 0x000fc800078ec0ff */ /*0110*/ LEA.HI R5, R0, R5, RZ, 0x1f ; /* 0x0000000500057211 */ /* 0x000fca00078ff8ff */ /*0120*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*0130*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0140*/ BRA 0x140; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
/** * Copyright 1993-2012 NVIDIA Corporation. All rights reserved. * * Please refer to the NVIDIA end user license agreement (EULA) associated * with this source code for terms and conditions that govern your use of * this software. Any use, reproduction, disclosure, or distribution of * this software and related documentation outside the terms of the EULA * is strictly prohibited. */ #include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #include <sys/time.h> static const int WORK_SIZE = 256; /** * This macro checks return value of the CUDA runtime call and exits * the application if the call failed. */ #define CUDA_CHECK_RETURN(value) { \ hipError_t _m_cudaStat = value; \ if (_m_cudaStat != hipSuccess) { \ fprintf(stderr, "Error %s at line %d in file %s\n", \ hipGetErrorString(_m_cudaStat), __LINE__, __FILE__); \ exit(1); \ } } __device__ unsigned int bitreverse(unsigned int number) { number = ((0xf0f0f0f0 & number) >> 4) | ((0x0f0f0f0f & number) << 4); number = ((0xcccccccc & number) >> 2) | ((0x33333333 & number) << 2); number = ((0xaaaaaaaa & number) >> 1) | ((0x55555555 & number) << 1); return number; } /** * CUDA kernel function that reverses the order of bits in each element of the array. */ __global__ void bitreverse(void *data) { unsigned int *idata = (unsigned int*) data; idata[threadIdx.x] = bitreverse(idata[threadIdx.x]); } __global__ void add(int *a, int *b, int *c) { //c[blockIdx.x] = a[blockIdx.x] + b[blockIdx.x]; int index = threadIdx.x + blockIdx.x * blockDim.x; c[index] = a[index] + b[index]; } /** * Host function that prepares data array and passes it to the CUDA kernel. */ #define THREADS_PER_BLOCK 1024 int main(int argc, char *argv[]) { struct timeval t0; struct timeval t1; int N = atoi(argv[1]); int *a, *b, *c; // host copies of a, b, c int *d_a, *d_b, *d_c; // device copies of a, b, c int size = N * sizeof(int); // Allocate space for device copies of a, b, c hipMalloc((void **)&d_a, size); hipMalloc((void **)&d_b, size); hipMalloc((void **)&d_c, size); // Setup input values a = (int *)malloc(size); b = (int *)malloc(size); c = (int *)malloc(size); int i = 0; for(i = 0; i < N; i++) { a[i] = i;//rand() % 100; b[i] = i;//rand() % 100; } gettimeofday(&t0,0); // Copy inputs to device hipMemcpy(d_a, a, size, hipMemcpyHostToDevice); hipMemcpy(d_b, b, size, hipMemcpyHostToDevice); // Launch add() kernel on GPU with N blocks add<<<N/THREADS_PER_BLOCK,THREADS_PER_BLOCK>>>(d_a, d_b, d_c); // Copy result back to host hipMemcpy(c, d_c, size, hipMemcpyDeviceToHost); gettimeofday(&t1,0); double time_spent = (t1.tv_sec-t0.tv_sec) + (double)(t1.tv_usec-t0.tv_usec)/1000000; for(i = 0; i < N; i++) { printf("%d\n",c[i]); } printf("\nTime Spent GPU: %f\n\n",time_spent); // Cleanup hipFree(d_a); hipFree(d_b); hipFree(d_c); // CPU Part gettimeofday(&t0,0); for(i = 0; i < N; i++) { c[i] = a[i]+b[i]; } gettimeofday(&t1,0); time_spent = (t1.tv_sec-t0.tv_sec) + (double)(t1.tv_usec-t0.tv_usec)/1000000; printf("\nTime Spent CPU: %f\n\n",time_spent); return 0; }
.text .file "B01.hip" .globl _Z25__device_stub__bitreversePv # -- Begin function _Z25__device_stub__bitreversePv .type _Z25__device_stub__bitreversePv,@function _Z25__device_stub__bitreversePv: # @_Z25__device_stub__bitreversePv .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10bitreversePv, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z25__device_stub__bitreversePv, .Lfunc_end0-_Z25__device_stub__bitreversePv .cfi_endproc # -- End function .globl _Z18__device_stub__addPiS_S_ # -- Begin function _Z18__device_stub__addPiS_S_ .type _Z18__device_stub__addPiS_S_,@function _Z18__device_stub__addPiS_S_: # @_Z18__device_stub__addPiS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z3addPiS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z18__device_stub__addPiS_S_, .Lfunc_end1-_Z18__device_stub__addPiS_S_ .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI2_0: .quad 0x412e848000000000 # double 1.0E+6 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $72, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq 8(%rsi), %rdi callq atoi movl %eax, %ebx leal (,%rbx,4), %eax movslq %eax, %r13 leaq 24(%rsp), %rdi movq %r13, %rsi callq hipMalloc leaq 16(%rsp), %rdi movq %r13, %rsi callq hipMalloc leaq 8(%rsp), %rdi movq %r13, %rsi callq hipMalloc movq %r13, %rdi callq malloc movq %rax, %r14 movq %r13, %rdi callq malloc movq %rax, %r15 movq %r13, %rdi callq malloc movq %rax, %r12 movl %ebx, %ebp testl %ebx, %ebx jle .LBB2_3 # %bb.1: # %.lr.ph.preheader xorl %eax, %eax .LBB2_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl %eax, (%r14,%rax,4) movl %eax, (%r15,%rax,4) incq %rax cmpq %rax, %rbp jne .LBB2_2 .LBB2_3: # %._crit_edge leaq 32(%rsp), %rdi xorl %esi, %esi callq gettimeofday movq 24(%rsp), %rdi movq %r14, %rsi movq %r13, %rdx movl $1, %ecx callq hipMemcpy movq 16(%rsp), %rdi movq %r15, %rsi movq %r13, %rdx movl $1, %ecx callq hipMemcpy leal 1023(%rbx), %edi testl %ebx, %ebx cmovnsl %ebx, %edi sarl $10, %edi btsq $32, %rdi movabsq $4294967296, %rdx # imm = 0x100000000 orq $1024, %rdx # imm = 0x400 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_5 # %bb.4: movq 24(%rsp), %rdi movq 16(%rsp), %rsi movq 8(%rsp), %rdx callq _Z18__device_stub__addPiS_S_ .LBB2_5: movq 8(%rsp), %rsi movq %r12, %rdi movq %r13, %rdx movl $2, %ecx callq hipMemcpy leaq 56(%rsp), %r13 movq %r13, %rdi xorl %esi, %esi callq gettimeofday movq (%r13), %rax movq 8(%r13), %rcx subq 32(%rsp), %rax subq 40(%rsp), %rcx cvtsi2sd %rax, %xmm1 cvtsi2sd %rcx, %xmm0 divsd .LCPI2_0(%rip), %xmm0 addsd %xmm1, %xmm0 testl %ebx, %ebx jle .LBB2_11 # %bb.6: # %.lr.ph48.preheader movsd %xmm0, 48(%rsp) # 8-byte Spill xorl %r13d, %r13d .LBB2_7: # %.lr.ph48 # =>This Inner Loop Header: Depth=1 movl (%r12,%r13,4), %esi movl $.L.str, %edi xorl %eax, %eax callq printf incq %r13 cmpq %r13, %rbp jne .LBB2_7 # %bb.8: # %._crit_edge49 movl $.L.str.1, %edi movsd 48(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero movb $1, %al callq printf movq 24(%rsp), %rdi callq hipFree movq 16(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree leaq 32(%rsp), %rdi xorl %esi, %esi callq gettimeofday testl %ebx, %ebx jle .LBB2_12 # %bb.9: # %.lr.ph52.preheader xorl %eax, %eax .LBB2_10: # %.lr.ph52 # =>This Inner Loop Header: Depth=1 movl (%r15,%rax,4), %ecx addl (%r14,%rax,4), %ecx movl %ecx, (%r12,%rax,4) incq %rax cmpq %rax, %rbp jne .LBB2_10 jmp .LBB2_12 .LBB2_11: # %._crit_edge53.critedge movl $.L.str.1, %edi movb $1, %al callq printf movq 24(%rsp), %rdi callq hipFree movq 16(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree leaq 32(%rsp), %rdi xorl %esi, %esi callq gettimeofday .LBB2_12: # %._crit_edge53 leaq 56(%rsp), %rbx movq %rbx, %rdi xorl %esi, %esi callq gettimeofday movq (%rbx), %rax movq 8(%rbx), %rcx subq 32(%rsp), %rax xorps %xmm1, %xmm1 cvtsi2sd %rax, %xmm1 subq 40(%rsp), %rcx xorps %xmm0, %xmm0 cvtsi2sd %rcx, %xmm0 divsd .LCPI2_0(%rip), %xmm0 addsd %xmm1, %xmm0 movl $.L.str.2, %edi movb $1, %al callq printf xorl %eax, %eax addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10bitreversePv, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z3addPiS_S_, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z10bitreversePv,@object # @_Z10bitreversePv .section .rodata,"a",@progbits .globl _Z10bitreversePv .p2align 3, 0x0 _Z10bitreversePv: .quad _Z25__device_stub__bitreversePv .size _Z10bitreversePv, 8 .type _Z3addPiS_S_,@object # @_Z3addPiS_S_ .globl _Z3addPiS_S_ .p2align 3, 0x0 _Z3addPiS_S_: .quad _Z18__device_stub__addPiS_S_ .size _Z3addPiS_S_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%d\n" .size .L.str, 4 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "\nTime Spent GPU: %f\n\n" .size .L.str.1, 23 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "\nTime Spent CPU: %f\n\n" .size .L.str.2, 23 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z10bitreversePv" .size .L__unnamed_1, 17 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z3addPiS_S_" .size .L__unnamed_2, 13 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__bitreversePv .addrsig_sym _Z18__device_stub__addPiS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z10bitreversePv .addrsig_sym _Z3addPiS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10bitreversePv ; -- Begin function _Z10bitreversePv .globl _Z10bitreversePv .p2align 8 .type _Z10bitreversePv,@function _Z10bitreversePv: ; @_Z10bitreversePv ; %bb.0: s_load_b64 s[0:1], s[0:1], 0x0 v_lshlrev_b32_e32 v0, 2, v0 s_waitcnt lgkmcnt(0) global_load_b32 v1, v0, s[0:1] s_waitcnt vmcnt(0) v_lshrrev_b32_e32 v2, 4, v1 v_lshlrev_b32_e32 v1, 4, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_bfi_b32 v1, 0xf0f0f0f, v2, v1 v_lshrrev_b32_e32 v2, 2, v1 v_lshlrev_b32_e32 v1, 2, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_bfi_b32 v1, 0x33333333, v2, v1 v_lshrrev_b32_e32 v2, 1, v1 v_lshlrev_b32_e32 v1, 1, v1 s_delay_alu instid0(VALU_DEP_1) v_bfi_b32 v1, 0x55555555, v2, v1 global_store_b32 v0, v1, s[0:1] s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10bitreversePv .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 8 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 3 .amdhsa_next_free_sgpr 2 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10bitreversePv, .Lfunc_end0-_Z10bitreversePv ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 120 ; NumSgprs: 2 ; NumVgprs: 3 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 2 ; NumVGPRsForWavesPerEU: 3 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z3addPiS_S_ ; -- Begin function _Z3addPiS_S_ .globl _Z3addPiS_S_ .p2align 8 .type _Z3addPiS_S_,@function _Z3addPiS_S_: ; @_Z3addPiS_S_ ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x24 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_nc_u32_e32 v2, v3, v2 global_store_b32 v[0:1], v2, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z3addPiS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z3addPiS_S_, .Lfunc_end1-_Z3addPiS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 152 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 8 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10bitreversePv .private_segment_fixed_size: 0 .sgpr_count: 2 .sgpr_spill_count: 0 .symbol: _Z10bitreversePv.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 3 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z3addPiS_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z3addPiS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
4e6ff1ded9377ff1ccf16c2e9da1d202ea58a27c
extern "C" __device__ float vxd(const float m,float Vy, float w, float ZpTei, float Xr, float Kvx) { if (Vy > 0) { return ((m * Vy * w - Xr + ZpTei) * Kvx); } else { return ((m * Vy * w * 1.09f - Xr + ZpTei) * Kvx);//Vx*1.061 ;N0=3;k11=580.91f Ubuntu //return ((m * Vy * w - Xr + ZpTei) * Kvx); }//*1.1045; k11=5.91f windows ; 1.09; k11=580.91f } extern "C" __device__ float vyd(const float m,float Vx, float w, float ZpYri, float Yr, float Kvy) { if (Vx > 0) { return ((Yr - ZpYri - m * Vx * w * 1.0165f) * Kvy);//Vx*1.0179 //return ((Yr - ZpYri - m * Vx * w) * Kvy); } else {//*1.0165; k11=5.91f windows return ((Yr - ZpYri - m * Vx * w) * Kvy); } } extern "C" __device__ float wd(const float lr,float Mr, float ZpYri, float Yr, float Kw) { return ((Mr + lr * ZpYri) * Kw); } extern "C" __global__ void modelCalc(float* VX, float* VY, float* ww, float* X, float* Y, float* W, float* Xobs, float* Yobs, float T, float L, float B,float m,float lr,float Vx, float Vy, float v,float w, const int size,const int nShips) { int j = blockDim.x * blockIdx.x + threadIdx.x; if (j<nShips){ float k11, k22, k66, k26; const float delta = 0.7f;// float c1, c2, c3, m1, m2;// .. float w_ = 0.0f;// approx float betta_d = 0.0f;// (rad) float Cxr, Cyr, Cmr;// Cxr, , // float L1=B,T1=L/2;//, ???????????????????? const float p = 1000.0f;// float Xr, Yr, Mr;// float ZpTei = 0;// =R+Xa float Jz;// Gz float ZpYri;// const float a66 = 0.31f;// //float Ramp = 0.0f;// const float lyamdaR = 1.4f;// c 335 //0.5--1.4 //1 const float deltaR = 0.349f;// - 20% //0.349f // float Va;// float Yri, Ysi;// const float Ar = 6.0f;// //5 const float D = 1.5f;// //2 const float Cta = 10.0f, Ctt = 50.0f;//c 334 //Cta<=20, 0.5--30, Ctt<=20, 1--50 UP!!! //Ctt =30 float Kvx, Kvy, Kw;// const float No = 3.0f;// ////3 const float Re = 5000000.0f;// >5E8 float K_betta; float fit; const float xk = 1.0f; const float bettar = 0.9f; const float fik = 0.95f; float ld_;// c228 float betta_D;// float fiD;//c 338 float CyD1; float CyD; float A0;// float xD;//c 339 float viv = 0.0f;// 27 ch3_2 float Rmatr[3][3]={cosf(viv),-sinf(viv),0.0f,sinf(viv),cosf(viv),0.0f,0.0f,0.0f,1.0f}; //------------------------------------------------------------ //c 330 5.91- , 580.91 - k11 = (580.91f * (float) pow(B / L, 2.0f) + 7.76f * (B / L) - 0.259f) / (48.4f - 6.89f * (B / T) + 1.47f * (float) pow(B / T, 2.0f) - 0.0475f * (float) pow(B / T, 3.0f)); k22 = ((0.722f + 0.224f * delta) * (1.022f - (float) pow(B / L, 2.0f))) / (0.264f + 0.368f * (B / T)); k66 = (2.0f * T / B) * (2.59f + 0.781f * delta) * (0.357f - 1.77f * (float) pow(B / L, 2.0f)); k26 = k22; //k26=0; //c 323 c1 = 3.14f * (T / L) * (float) pow((0.63f / delta), (5.0f / 2.0f)) * (float) pow(L / (6.0f * B), (1.0f / 3.0f)) - 0.032f; c2 = -2.0f * k11 * delta * (B / L); c3 = 1.35f * (float) pow(T / B, (1.0f / 2.0f)) * (float) pow((0.63f / delta), (3.0f / 2.0f)) - 0.029f; m1 = 1.67f * (T / L) - 0.56f * delta + 0.43f; m2 = -0.44f * (T / L) - 0.0375f; // System.out.printf("c1=%f\tc2=%f\tc3=%f\tm1=%f\tm2=%f\n", c1, c2, c3, m1, m2); Jz = (m * (float) pow(L, 2.0f) / 12.4f) * (0.463f + 0.574f * (float) pow(delta, a66) + (float) pow(B / L, 2.0f));//c 330 Kvx = 1 / (m * (1 + k11)); Kvy = 1 / (m * (1 + k22)); Kw = 1 / (Jz * (1 + k66));//????? m //---------------------------------------------------------------- float k1, k2, k3, k4; float q1, q2, q3, q4; float z1, z2, z3, z4; float j1, j2, j3, j4; //t = 0.0f; // int t = 0; float h = 1.0f; for (int i = 0; i < size; i++) { //16550 v = (float) sqrt((float) pow(Vx, 2.0f) + (float) pow(Vy, 2.0f)); //assert(Vx==0); if (Vx != 0) { //c 353 ????????????????????????? w_ = w * L / v;//?????????????????????? betta_d = -(float) atan(Vy / Vx);//c 350 } else { w_ = w * L / v; //betta_d = 0; betta_d = -(float) atan(Vy / Vx);//c 350 } Cxr = 0.01f * (1.0f + 170.0f * (T / L));// c 119 Cyr = c1 * betta_d + c2 * w_ + c3 * betta_d * abs(betta_d);//c 323 Cmr = m1 * betta_d + m2 * w_; Xr = Cxr * L * T * (float) pow(v, 2.0f) * p / 2.0f;//c 320 Yr = Cyr * L * T * (float) pow(v, 2.0f) * p / 2.0f; Mr = Cmr * L * T * (float) pow(v, 2.0f) * p / 2.0f; K_betta = 0.43f * (float) pow(Ctt, -0.6f); fit = (float) pow(1.0f + Ctt, 0.508f); //IMPORTANT!!! deltaR Yri = 3.14f * (deltaR - K_betta * xk * (betta_d + lr * w_)) * p * Ar * (float) pow(v * fik * fit, 2.0f) / (1.0f + 2.2f / (float) pow(lyamdaR, 2.0f / 3.0f)); ld_ = 0.77f - 0.125f * (float) sqrt(Ctt) / (1.65f * (float) sqrt(Ctt) - 1.0f); betta_D = 1.22f - 0.0563f * (float) sqrt(Ctt) / (1.65f * (float) sqrt(Ctt) - 1.0f); fiD = 0.5f * ((float) sqrt(1.0f + 2.0f * Ctt / betta_D) + 1.0f); CyD1 = 12.0f * ld_ / (1.0f + 1.56f * ld_); CyD = CyD1 + 2.0f * betta_D * (float) pow(fiD, 2.0f); xD = xk * (CyD1 + 2.0f * betta_D * fiD) / (CyD1 + 2.0f * betta_D * (float) pow(fiD, 2.0f)); A0 = 3.14f * (float) pow(D, 2.0f) / 4.0f; Ysi = CyD * (xD - 0.02f * xk) * (betta_d + lr * w_) * (p / 2.0f) * A0 * (float) pow(v, 2.0f) * (float) pow(fik, 2.0f); ZpTei = 1000000.0f * (9.740f * (float) pow(No, 2.0f) - 2.23f * v); ////9.740f ZpYri = 2.0f * (Yri - Ysi);//2 k1 = h * vxd(m,Vy, w, ZpTei, Xr, Kvx); q1 = h * vyd(m,Vx, w, ZpYri, Yr, Kvy); z1 = h * wd(lr,Mr, ZpTei, Yr, Kw); k2 = h * vxd(m,Vy + q1 / 2.0f, w + z1 / 2.0f, ZpTei, Xr, Kvx); q2 = h * vyd(m,Vx + k1 / 2.0f, w + z1 / 2.0f, ZpYri, Yr, Kvy); z2 = h * wd(lr,Mr, ZpYri, Yr, Kw); k3 = h * vxd(m,Vy + q2 / 2.0f, w + z2 / 2.0f, ZpTei, Xr, Kvx); q3 = h * vyd(m,Vx + k2 / 2.0f, w + z2 / 2.0f, ZpYri, Yr, Kvy); z3 = h * wd(lr,Mr, ZpYri, Yr, Kw); k4 = h * vxd(m,Vy + q3, w + z3, ZpTei, Xr, Kvx); q4 = h * vyd(m,Vx + k3, w + z3, ZpYri, Yr, Kvy); z4 = h * wd(lr,Mr, ZpYri, Yr, Kw); Vx = Vx + (1.0f / 6.0f) * (k1 + 2.0f * k2 + 2.0f * k3 + k4); //VX[t] = Vx / 1.24f; VX[t] = Vx; Vy = Vy + (1.0f / 6.0f) * (q1 + 2.0f * q2 + 2.0f * q3 + q4); VY[t] = Vy; w = w + (1.0f / 6.0f) * (z1 + 2.0f * z2 + 2.0f * z3 + z4); ww[t] = w; //--- ----------------------------------------- k1 = h * vxd(m,Vy, w, ZpTei, Xr, Kvx); q1 = h * vyd(m,Vx, w, ZpYri, Yr, Kvy); z1 = h * wd(lr,Mr, ZpTei, Yr, Kw); k2 = h * vxd(m,Vy + q1 / 2.0f, w + z1 / 2.0f, ZpTei, Xr, Kvx); q2 = h * vyd(m,Vx + k1 / 2.0f, w + z1 / 2.0f, ZpYri, Yr, Kvy); z2 = h * wd(lr,Mr, ZpYri, Yr, Kw); k3 = h * vxd(m,Vy + q2 / 2.0f, w + z2 / 2.0f, ZpTei, Xr, Kvx); q3 = h * vyd(m,Vx + k2 / 2.0f, w + z2 / 2.0f, ZpYri, Yr, Kvy); z3 = h * wd(lr,Mr, ZpYri, Yr, Kw); k4 = h * vxd(m,Vy + q3, w + z3, ZpTei, Xr, Kvx); q4 = h * vyd(m,Vx + k3, w + z3, ZpYri, Yr, Kvy); z4 = h * wd(lr,Mr, ZpYri, Yr, Kw); X[t] = Vx + (1.0f / 6.0f) * (k1 + 2.0f * k2 + 2.0f * k3 + k4); Y[t] = Vy + (1.0f / 6.0f) * (q1 + 2.0f * q2 + 2.0f * q3 + q4); W[t] = w + (1.0f / 6.0f) * (z1 + 2.0f * z2 + 2.0f * z3 + z4); // viv = W[t]; //------- Rmatr[0][0] = (float)cos(viv); Rmatr[0][1] = -(float)sin(viv); Rmatr[1][0] = (float)sin(viv); Rmatr[1][1] = (float)cos(viv); Xobs[t] = Rmatr[0][0] * X[t] + Rmatr[0][1] * Y[t]; Yobs[t] = Rmatr[1][0] * X[t] + Rmatr[1][1] * Y[t]; //---------- t++; } } }
.file "tmpxft_002cf325_00000000-6_modelCalc.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2013: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2013: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl vxd .type vxd, @function vxd: .LFB2008: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2008: .size vxd, .-vxd .globl vyd .type vyd, @function vyd: .LFB2155: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2155: .size vyd, .-vyd .globl wd .type wd, @function wd: .LFB2010: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2010: .size wd, .-wd .globl _Z53__device_stub__Z9modelCalcPfS_S_S_S_S_S_S_fffffffffiiPfS_S_S_S_S_S_S_fffffffffii .type _Z53__device_stub__Z9modelCalcPfS_S_S_S_S_S_S_fffffffffiiPfS_S_S_S_S_S_S_fffffffffii, @function _Z53__device_stub__Z9modelCalcPfS_S_S_S_S_S_S_fffffffffiiPfS_S_S_S_S_S_S_fffffffffii: .LFB2035: .cfi_startproc endbr64 subq $328, %rsp .cfi_def_cfa_offset 336 movq 336(%rsp), %rax movq %rdi, 88(%rsp) leaq 112(%rsp), %rdi movq %rsi, 80(%rsp) leaq 124(%rsp), %rsi movq %rax, 40(%rsp) movq 344(%rsp), %rax movq %rdx, 72(%rsp) leaq 96(%rsp), %rdx movq %rcx, 64(%rsp) leaq 104(%rsp), %rcx movq %r8, 56(%rsp) movq %r9, 48(%rsp) movq %rax, 32(%rsp) movss %xmm0, 28(%rsp) movss %xmm1, 24(%rsp) movss %xmm2, 20(%rsp) movss %xmm3, 16(%rsp) movss %xmm4, 12(%rsp) movss %xmm5, 8(%rsp) movss %xmm6, 4(%rsp) movss %xmm7, (%rsp) movq %fs:40, %rax movq %rax, 312(%rsp) xorl %eax, %eax leaq 88(%rsp), %rax movq %rax, 160(%rsp) leaq 80(%rsp), %rax movq %rax, 168(%rsp) leaq 72(%rsp), %rax movq %rax, 176(%rsp) leaq 64(%rsp), %rax movq %rax, 184(%rsp) leaq 56(%rsp), %rax movq %rax, 192(%rsp) leaq 48(%rsp), %rax movq %rax, 200(%rsp) leaq 40(%rsp), %rax movq %rax, 208(%rsp) leaq 32(%rsp), %rax movq %rax, 216(%rsp) leaq 28(%rsp), %rax movq %rax, 224(%rsp) leaq 24(%rsp), %rax movq %rax, 232(%rsp) leaq 20(%rsp), %rax movq %rax, 240(%rsp) leaq 16(%rsp), %rax movq %rax, 248(%rsp) leaq 12(%rsp), %rax movq %rax, 256(%rsp) leaq 8(%rsp), %rax movq %rax, 264(%rsp) leaq 4(%rsp), %rax movq %rax, 272(%rsp) movq %rsp, %rax movq %rax, 280(%rsp) leaq 352(%rsp), %rax movq %rax, 288(%rsp) leaq 360(%rsp), %rax movq %rax, 296(%rsp) leaq 368(%rsp), %rax movq %rax, 304(%rsp) movabsq $4294967297, %rax movq %rax, 112(%rsp) movl $1, 120(%rsp) movq %rax, 124(%rsp) movl $1, 132(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L8 pushq 104(%rsp) .cfi_def_cfa_offset 344 leaq modelCalc(%rip), %rdi pushq 104(%rsp) .cfi_def_cfa_offset 352 movq 140(%rsp), %rcx movl 148(%rsp), %r8d movq 128(%rsp), %rsi movl 136(%rsp), %edx leaq 176(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 344 popq %rdx .cfi_def_cfa_offset 336 .L8: movq 312(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $328, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2035: .size _Z53__device_stub__Z9modelCalcPfS_S_S_S_S_S_S_fffffffffiiPfS_S_S_S_S_S_S_fffffffffii, .-_Z53__device_stub__Z9modelCalcPfS_S_S_S_S_S_S_fffffffffiiPfS_S_S_S_S_S_S_fffffffffii .globl modelCalc .type modelCalc, @function modelCalc: .LFB2036: .cfi_startproc endbr64 jmp _Z53__device_stub__Z9modelCalcPfS_S_S_S_S_S_S_fffffffffiiPfS_S_S_S_S_S_S_fffffffffii .cfi_endproc .LFE2036: .size modelCalc, .-modelCalc .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "modelCalc" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2038: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq modelCalc(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2038: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : modelCalc .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fc60000000f00 */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ IADD3 R1, R1, -0x20, RZ ; /* 0xffffffe001017810 */ /* 0x000fc60007ffe0ff */ /*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0040*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0050*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x1c8], PT ; /* 0x0000720000007a0c */ /* 0x000fda0003f06270 */ /*0060*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0070*/ MUFU.RCP R17, c[0x0][0x1a4] ; /* 0x0000690000117b08 */ /* 0x000e220000001000 */ /*0080*/ ULDC UR4, c[0x0][0x1a8] ; /* 0x00006a0000047ab9 */ /* 0x000fe20000000800 */ /*0090*/ MOV R2, c[0x0][0x1a4] ; /* 0x0000690000027a02 */ /* 0x000fe40000000f00 */ /*00a0*/ MOV R3, UR4 ; /* 0x0000000400037c02 */ /* 0x000fe40008000f00 */ /*00b0*/ MOV R4, c[0x0][0x1b4] ; /* 0x00006d0000047a02 */ /* 0x000fe40000000f00 */ /*00c0*/ FCHK P0, R3, c[0x0][0x1a4] ; /* 0x0000690003007b02 */ /* 0x000e620000000000 */ /*00d0*/ MOV R5, c[0x0][0x1b8] ; /* 0x00006e0000057a02 */ /* 0x000fe40000000f00 */ /*00e0*/ MOV R6, c[0x0][0x1c0] ; /* 0x0000700000067a02 */ /* 0x000fe20000000f00 */ /*00f0*/ FFMA R0, R17, -R2, 1 ; /* 0x3f80000011007423 */ /* 0x001fc80000000802 */ /*0100*/ FFMA R17, R17, R0, R17 ; /* 0x0000000011117223 */ /* 0x000fc80000000011 */ /*0110*/ FFMA R0, R17, c[0x0][0x1a8], RZ ; /* 0x00006a0011007a23 */ /* 0x000fc800000000ff */ /*0120*/ FFMA R2, R0, -R2, c[0x0][0x1a8] ; /* 0x00006a0000027623 */ /* 0x000fc80000000802 */ /*0130*/ FFMA R17, R17, R2, R0 ; /* 0x0000000211117223 */ /* 0x000fe20000000000 */ /*0140*/ @!P0 BRA 0x1a0 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*0150*/ MOV R0, c[0x0][0x1a8] ; /* 0x00006a0000007a02 */ /* 0x000fe40000000f00 */ /*0160*/ MOV R3, c[0x0][0x1a4] ; /* 0x0000690000037a02 */ /* 0x000fe40000000f00 */ /*0170*/ MOV R2, 0x190 ; /* 0x0000019000027802 */ /* 0x000fe40000000f00 */ /*0180*/ CALL.REL.NOINC 0x8050 ; /* 0x00007ec000007944 */ /* 0x000fea0003c00000 */ /*0190*/ MOV R17, R0 ; /* 0x0000000000117202 */ /* 0x001fca0000000f00 */ /*01a0*/ FMUL R0, |R17|.reuse, 16777216 ; /* 0x4b80000011007820 */ /* 0x040fe20000400200 */ /*01b0*/ FSETP.GEU.AND P0, PT, |R17|, 1.175494350822287508e-38, PT ; /* 0x008000001100780b */ /* 0x000fe40003f0e200 */ /*01c0*/ MOV R10, 0x3a2c32e4 ; /* 0x3a2c32e4000a7802 */ /* 0x000fe40000000f00 */ /*01d0*/ FSEL R0, R0, |R17|, !P0 ; /* 0x4000001100007208 */ /* 0x000fc40004000000 */ /*01e0*/ FSETP.NEU.AND P2, PT, R17, 1, PT ; /* 0x3f8000001100780b */ /* 0x000fe40003f4d000 */ /*01f0*/ IADD3 R2, R0, -0x3f3504f3, RZ ; /* 0xc0cafb0d00027810 */ /* 0x000fe40007ffe0ff */ /*0200*/ MOV R12, 0x3f800000 ; /* 0x3f800000000c7802 */ /* 0x000fe40000000f00 */ /*0210*/ LOP3.LUT R3, R2, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000002037812 */ /* 0x000fc800078ec0ff */ /*0220*/ IADD3 R0, R0, -R3.reuse, RZ ; /* 0x8000000300007210 */ /* 0x080fe40007ffe0ff */ /*0230*/ I2FP.F32.S32 R3, R3 ; /* 0x0000000300037245 */ /* 0x000fc60000201400 */ /*0240*/ FADD R7, R0.reuse, 1 ; /* 0x3f80000000077421 */ /* 0x040fe20000000000 */ /*0250*/ FADD R2, R0, -1 ; /* 0xbf80000000027421 */ /* 0x000fe20000000000 */ /*0260*/ FSEL R0, RZ, -24, P0 ; /* 0xc1c00000ff007808 */ /* 0x000fc60000000000 */ /*0270*/ FADD R8, R2, R2 ; /* 0x0000000202087221 */ /* 0x000fe20000000000 */ /*0280*/ MUFU.RCP R7, R7 ; /* 0x0000000700077308 */ /* 0x000e220000001000 */ /*0290*/ FFMA R0, R3, 1.1920928955078125e-07, R0 ; /* 0x3400000003007823 */ /* 0x000fe40000000000 */ /*02a0*/ FMUL R9, R7, R8 ; /* 0x0000000807097220 */ /* 0x001fc80000400000 */ /*02b0*/ FADD R8, R2, -R9 ; /* 0x8000000902087221 */ /* 0x000fe20000000000 */ /*02c0*/ FMUL R3, R9.reuse, R9.reuse ; /* 0x0000000909037220 */ /* 0x0c0fe20000400000 */ /*02d0*/ FFMA R13, R9, 1.4426950216293334961, R0 ; /* 0x3fb8aa3b090d7823 */ /* 0x000fe40000000000 */ /*02e0*/ FADD R11, R8, R8 ; /* 0x00000008080b7221 */ /* 0x000fe20000000000 */ /*02f0*/ FFMA R8, R3.reuse, R10, 0.0032181653659790754318 ; /* 0x3b52e7db03087423 */ /* 0x040fe2000000000a */ /*0300*/ FADD R0, R0, -R13 ; /* 0x8000000d00007221 */ /* 0x000fe40000000000 */ /*0310*/ FFMA R2, R2, -R9, R11 ; /* 0x8000000902027223 */ /* 0x000fe2000000000b */ /*0320*/ FFMA R8, R3, R8, 0.018033718690276145935 ; /* 0x3c93bb7303087423 */ /* 0x000fe20000000008 */ /*0330*/ FFMA R11, R9, 1.4426950216293334961, R0 ; /* 0x3fb8aa3b090b7823 */ /* 0x000fc40000000000 */ /*0340*/ FMUL R2, R7, R2 ; /* 0x0000000207027220 */ /* 0x000fe20000400000 */ /*0350*/ FFMA R8, R3, R8, 0.12022458761930465698 ; /* 0x3df6384f03087423 */ /* 0x000fc60000000008 */ /*0360*/ FFMA R0, R2, 1.4426950216293334961, R11 ; /* 0x3fb8aa3b02007823 */ /* 0x000fe2000000000b */ /*0370*/ FMUL R8, R3, R8 ; /* 0x0000000803087220 */ /* 0x000fc60000400000 */ /*0380*/ FFMA R3, R9, 1.9251366722983220825e-08, R0 ; /* 0x32a55e3409037823 */ /* 0x000fe20000000000 */ /*0390*/ FMUL R0, R8, 3 ; /* 0x4040000008007820 */ /* 0x000fc80000400000 */ /*03a0*/ FFMA R3, R2, R0, R3 ; /* 0x0000000002037223 */ /* 0x000fc80000000003 */ /*03b0*/ FFMA R8, R9, R8, R3 ; /* 0x0000000809087223 */ /* 0x000fe20000000003 */ /*03c0*/ MOV R9, 0x391fcb8e ; /* 0x391fcb8e00097802 */ /* 0x000fc60000000f00 */ /*03d0*/ FADD R0, R13, R8 ; /* 0x000000080d007221 */ /* 0x000fc80000000000 */ /*03e0*/ FMUL R3, R0, 2 ; /* 0x4000000000037820 */ /* 0x000fe20000400000 */ /*03f0*/ FADD R13, -R13, R0 ; /* 0x000000000d0d7221 */ /* 0x000fc60000000100 */ /*0400*/ FRND R2, R3 ; /* 0x0000000300027307 */ /* 0x000e220000201000 */ /*0410*/ FADD R13, R8, -R13 ; /* 0x8000000d080d7221 */ /* 0x000fe20000000000 */ /*0420*/ FFMA R0, R0, 2, -R3 ; /* 0x4000000000007823 */ /* 0x000fe20000000803 */ /*0430*/ FSETP.GEU.AND P1, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fc60003f2e000 */ /*0440*/ FFMA R0, R13, 2, R0 ; /* 0x400000000d007823 */ /* 0x000fe40000000000 */ /*0450*/ F2I.NTZ R8, R3 ; /* 0x0000000300087305 */ /* 0x000e620000203100 */ /*0460*/ FADD R7, R3, -R2 ; /* 0x8000000203077221 */ /* 0x001fe20000000000 */ /*0470*/ FSETP.GT.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720b */ /* 0x000fc60003f04000 */ /*0480*/ FADD R0, R0, R7 ; /* 0x0000000700007221 */ /* 0x000fc80000000000 */ /*0490*/ FFMA R7, R0.reuse, R9, 0.0013391353422775864601 ; /* 0x3aaf85ed00077423 */ /* 0x040fe20000000009 */ /*04a0*/ SEL R9, RZ, 0x83000000, P0 ; /* 0x83000000ff097807 */ /* 0x000fe40000000000 */ /*04b0*/ FSETP.GT.AND P0, PT, |R3|, 152, PT ; /* 0x431800000300780b */ /* 0x000fe20003f04200 */ /*04c0*/ FFMA R7, R0, R7, 0.0096188392490148544312 ; /* 0x3c1d985600077423 */ /* 0x000fe20000000007 */ /*04d0*/ IADD3 R2, R9, 0x7f000000, RZ ; /* 0x7f00000009027810 */ /* 0x000fe40007ffe0ff */ /*04e0*/ LEA R9, R8, -R9, 0x17 ; /* 0x8000000908097211 */ /* 0x002fe200078eb8ff */ /*04f0*/ FFMA R7, R0, R7, 0.055503588169813156128 ; /* 0x3d6357bb00077423 */ /* 0x000fe20000000007 */ /*0500*/ MOV R3, 0x3f800000 ; /* 0x3f80000000037802 */ /* 0x000fc60000000f00 */ /*0510*/ FFMA R7, R0, R7, 0.24022644758224487305 ; /* 0x3e75fdec00077423 */ /* 0x000fc80000000007 */ /*0520*/ FFMA R7, R0, R7, 0.69314718246459960938 ; /* 0x3f31721800077423 */ /* 0x000fc80000000007 */ /*0530*/ FFMA R7, R0, R7, 1 ; /* 0x3f80000000077423 */ /* 0x000fc80000000007 */ /*0540*/ FMUL R2, R7, R2 ; /* 0x0000000207027220 */ /* 0x000fe20000400000 */ /*0550*/ MOV R7, 0x3f800000 ; /* 0x3f80000000077802 */ /* 0x000fc60000000f00 */ /*0560*/ FMUL R2, R2, R9 ; /* 0x0000000902027220 */ /* 0x000fe20000400000 */ /*0570*/ @P0 FSEL R2, RZ, +INF , !P1 ; /* 0x7f800000ff020808 */ /* 0x000fe20004800000 */ /*0580*/ @!P2 BRA 0x670 ; /* 0x000000e00000a947 */ /* 0x000fea0003800000 */ /*0590*/ FSETP.GTU.AND P0, PT, |R17|, +INF , PT ; /* 0x7f8000001100780b */ /* 0x000fda0003f0c200 */ /*05a0*/ @P0 BRA 0x660 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*05b0*/ FSETP.NEU.AND P0, PT, |R17|, +INF , PT ; /* 0x7f8000001100780b */ /* 0x000fc80003f0d200 */ /*05c0*/ FSETP.EQ.OR P0, PT, R17, RZ, !P0 ; /* 0x000000ff1100720b */ /* 0x000fda0004702400 */ /*05d0*/ @P0 BRA 0x630 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*05e0*/ FSETP.GEU.AND P0, PT, R17, RZ, PT ; /* 0x000000ff1100720b */ /* 0x000fe40003f0e000 */ /*05f0*/ MOV R12, R2 ; /* 0x00000002000c7202 */ /* 0x000fd60000000f00 */ /*0600*/ @P0 BRA 0x670 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*0610*/ MOV R12, R2 ; /* 0x00000002000c7202 */ /* 0x000fe20000000f00 */ /*0620*/ BRA 0x670 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*0630*/ FADD R12, R17, R17 ; /* 0x00000011110c7221 */ /* 0x000fca0000000000 */ /*0640*/ LOP3.LUT R12, R12, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0c0c7812 */ /* 0x000fe200078ec0ff */ /*0650*/ BRA 0x670 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0660*/ FADD R12, R17, 2 ; /* 0x40000000110c7421 */ /* 0x000fe40000000000 */ /*0670*/ MUFU.RCP R10, c[0x0][0x1a0] ; /* 0x00006800000a7b08 */ /* 0x000e220000001000 */ /*0680*/ MOV R2, c[0x0][0x1a8] ; /* 0x00006a0000027a02 */ /* 0x000fe20000000f00 */ /*0690*/ FMUL R8, R12, 580.90997314453125 ; /* 0x44113a3d0c087820 */ /* 0x000fc80000400000 */ /*06a0*/ FFMA R8, R17, 7.7600002288818359375, R8 ; /* 0x40f851ec11087823 */ /* 0x000fe40000000008 */ /*06b0*/ FCHK P0, R2, c[0x0][0x1a0] ; /* 0x0000680002007b02 */ /* 0x000e620000000000 */ /*06c0*/ FFMA R3, R10, -c[0x0][0x1a0], R3 ; /* 0x800068000a037a23 */ /* 0x001fc80000000003 */ /*06d0*/ FFMA R10, R10, R3, R10 ; /* 0x000000030a0a7223 */ /* 0x000fc8000000000a */ /*06e0*/ FFMA R3, R10, c[0x0][0x1a8], RZ ; /* 0x00006a000a037a23 */ /* 0x000fc800000000ff */ /*06f0*/ FFMA R0, R3, -c[0x0][0x1a0], R2 ; /* 0x8000680003007a23 */ /* 0x000fc80000000002 */ /*0700*/ FFMA R10, R10, R0, R3 ; /* 0x000000000a0a7223 */ /* 0x000fe20000000003 */ /*0710*/ @!P0 BRA 0x770 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*0720*/ MOV R0, c[0x0][0x1a8] ; /* 0x00006a0000007a02 */ /* 0x000fe40000000f00 */ /*0730*/ MOV R3, c[0x0][0x1a0] ; /* 0x0000680000037a02 */ /* 0x000fe40000000f00 */ /*0740*/ MOV R2, 0x760 ; /* 0x0000076000027802 */ /* 0x000fe40000000f00 */ /*0750*/ CALL.REL.NOINC 0x8050 ; /* 0x000078f000007944 */ /* 0x000fea0003c00000 */ /*0760*/ MOV R10, R0 ; /* 0x00000000000a7202 */ /* 0x001fca0000000f00 */ /*0770*/ FMUL R3, |R10|.reuse, 16777216 ; /* 0x4b8000000a037820 */ /* 0x040fe20000400200 */ /*0780*/ FSETP.GEU.AND P0, PT, |R10|, 1.175494350822287508e-38, PT ; /* 0x008000000a00780b */ /* 0x000fe40003f0e200 */ /*0790*/ MOV R19, 0x3a2c32e4 ; /* 0x3a2c32e400137802 */ /* 0x000fe40000000f00 */ /*07a0*/ FSEL R3, R3, |R10|, !P0 ; /* 0x4000000a03037208 */ /* 0x000fc40004000000 */ /*07b0*/ FSETP.NEU.AND P1, PT, R10, 1, PT ; /* 0x3f8000000a00780b */ /* 0x000fe40003f2d000 */ /*07c0*/ IADD3 R0, R3, -0x3f3504f3, RZ ; /* 0xc0cafb0d03007810 */ /* 0x000fc80007ffe0ff */ /*07d0*/ LOP3.LUT R2, R0, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000000027812 */ /* 0x000fe400078ec0ff */ /*07e0*/ FSEL R0, RZ, -24, P0 ; /* 0xc1c00000ff007808 */ /* 0x000fe40000000000 */ /*07f0*/ IADD3 R3, R3, -R2, RZ ; /* 0x8000000203037210 */ /* 0x000fca0007ffe0ff */ /*0800*/ FADD R11, R3.reuse, 1 ; /* 0x3f800000030b7421 */ /* 0x040fe20000000000 */ /*0810*/ FADD R9, R3, -1 ; /* 0xbf80000003097421 */ /* 0x000fe20000000000 */ /*0820*/ I2FP.F32.S32 R3, R2 ; /* 0x0000000200037245 */ /* 0x000fc60000201400 */ /*0830*/ FADD R14, R9, R9 ; /* 0x00000009090e7221 */ /* 0x000fe20000000000 */ /*0840*/ MUFU.RCP R11, R11 ; /* 0x0000000b000b7308 */ /* 0x000e220000001000 */ /*0850*/ FFMA R0, R3, 1.1920928955078125e-07, R0 ; /* 0x3400000003007823 */ /* 0x000fe40000000000 */ /*0860*/ FMUL R13, R11, R14 ; /* 0x0000000e0b0d7220 */ /* 0x001fc80000400000 */ /*0870*/ FADD R3, R9, -R13 ; /* 0x8000000d09037221 */ /* 0x000fe20000000000 */ /*0880*/ FMUL R2, R13.reuse, R13 ; /* 0x0000000d0d027220 */ /* 0x040fe20000400000 */ /*0890*/ FFMA R15, R13, 1.4426950216293334961, R0 ; /* 0x3fb8aa3b0d0f7823 */ /* 0x000fe40000000000 */ /*08a0*/ FADD R14, R3, R3 ; /* 0x00000003030e7221 */ /* 0x000fe20000000000 */ /*08b0*/ FFMA R3, R2, R19, 0.0032181653659790754318 ; /* 0x3b52e7db02037423 */ /* 0x000fe20000000013 */ /*08c0*/ FADD R0, R0, -R15 ; /* 0x8000000f00007221 */ /* 0x000fe20000000000 */ /*08d0*/ MOV R19, 0x391fcb8e ; /* 0x391fcb8e00137802 */ /* 0x000fe20000000f00 */ /*08e0*/ FFMA R14, R9, -R13, R14 ; /* 0x8000000d090e7223 */ /* 0x000fe2000000000e */ /*08f0*/ FFMA R3, R2, R3, 0.018033718690276145935 ; /* 0x3c93bb7302037423 */ /* 0x000fe20000000003 */ /*0900*/ FFMA R9, R13, 1.4426950216293334961, R0 ; /* 0x3fb8aa3b0d097823 */ /* 0x000fc40000000000 */ /*0910*/ FMUL R14, R11, R14 ; /* 0x0000000e0b0e7220 */ /* 0x000fe20000400000 */ /*0920*/ FFMA R3, R2, R3, 0.12022458761930465698 ; /* 0x3df6384f02037423 */ /* 0x000fc60000000003 */ /*0930*/ FFMA R0, R14, 1.4426950216293334961, R9 ; /* 0x3fb8aa3b0e007823 */ /* 0x000fe20000000009 */ /*0940*/ FMUL R2, R2, R3 ; /* 0x0000000302027220 */ /* 0x000fc60000400000 */ /*0950*/ FFMA R3, R13, 1.9251366722983220825e-08, R0 ; /* 0x32a55e340d037823 */ /* 0x000fe20000000000 */ /*0960*/ FMUL R0, R2, 3 ; /* 0x4040000002007820 */ /* 0x000fc80000400000 */ /*0970*/ FFMA R3, R14, R0, R3 ; /* 0x000000000e037223 */ /* 0x000fc80000000003 */ /*0980*/ FFMA R2, R13, R2, R3 ; /* 0x000000020d027223 */ /* 0x000fc80000000003 */ /*0990*/ FADD R13, R15, R2 ; /* 0x000000020f0d7221 */ /* 0x000fc80000000000 */ /*09a0*/ FMUL R0, R13, 2 ; /* 0x400000000d007820 */ /* 0x000fe20000400000 */ /*09b0*/ FADD R15, -R15, R13 ; /* 0x0000000d0f0f7221 */ /* 0x000fc60000000100 */ /*09c0*/ FRND R3, R0 ; /* 0x0000000000037307 */ /* 0x000e220000201000 */ /*09d0*/ FADD R15, R2, -R15 ; /* 0x8000000f020f7221 */ /* 0x000fe20000000000 */ /*09e0*/ FFMA R2, R13, 2, -R0 ; /* 0x400000000d027823 */ /* 0x000fe20000000800 */ /*09f0*/ FSETP.GEU.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720b */ /* 0x000fc60003f4e000 */ /*0a00*/ FFMA R2, R15, 2, R2 ; /* 0x400000000f027823 */ /* 0x000fe40000000002 */ /*0a10*/ F2I.NTZ R11, R0 ; /* 0x00000000000b7305 */ /* 0x000e620000203100 */ /*0a20*/ FADD R9, R0, -R3 ; /* 0x8000000300097221 */ /* 0x001fe20000000000 */ /*0a30*/ FSETP.GT.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fc60003f04000 */ /*0a40*/ FADD R2, R2, R9 ; /* 0x0000000902027221 */ /* 0x000fe20000000000 */ /*0a50*/ SEL R14, RZ, 0x83000000, P0 ; /* 0x83000000ff0e7807 */ /* 0x000fe40000000000 */ /*0a60*/ FSETP.GT.AND P0, PT, |R0|, 152, PT ; /* 0x431800000000780b */ /* 0x000fe20003f04200 */ /*0a70*/ FFMA R9, R2, R19, 0.0013391353422775864601 ; /* 0x3aaf85ed02097423 */ /* 0x000fe20000000013 */ /*0a80*/ IADD3 R16, R14, 0x7f000000, RZ ; /* 0x7f0000000e107810 */ /* 0x000fe40007ffe0ff */ /*0a90*/ LEA R14, R11, -R14, 0x17 ; /* 0x8000000e0b0e7211 */ /* 0x002fe200078eb8ff */ /*0aa0*/ FFMA R9, R2, R9, 0.0096188392490148544312 ; /* 0x3c1d985602097423 */ /* 0x000fc80000000009 */ /*0ab0*/ FFMA R9, R2, R9, 0.055503588169813156128 ; /* 0x3d6357bb02097423 */ /* 0x000fc80000000009 */ /*0ac0*/ FFMA R9, R2, R9, 0.24022644758224487305 ; /* 0x3e75fdec02097423 */ /* 0x000fc80000000009 */ /*0ad0*/ FFMA R9, R2, R9, 0.69314718246459960938 ; /* 0x3f31721802097423 */ /* 0x000fc80000000009 */ /*0ae0*/ FFMA R9, R2, R9, 1 ; /* 0x3f80000002097423 */ /* 0x000fc80000000009 */ /*0af0*/ FMUL R9, R9, R16 ; /* 0x0000001009097220 */ /* 0x000fc80000400000 */ /*0b00*/ FMUL R9, R9, R14 ; /* 0x0000000e09097220 */ /* 0x000fe20000400000 */ /*0b10*/ @P0 FSEL R9, RZ, +INF , !P2 ; /* 0x7f800000ff090808 */ /* 0x000fe20005000000 */ /*0b20*/ @!P1 BRA 0xc10 ; /* 0x000000e000009947 */ /* 0x000fea0003800000 */ /*0b30*/ FSETP.GTU.AND P0, PT, |R10|, +INF , PT ; /* 0x7f8000000a00780b */ /* 0x000fda0003f0c200 */ /*0b40*/ @P0 BRA 0xc00 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*0b50*/ FSETP.NEU.AND P0, PT, |R10|, +INF , PT ; /* 0x7f8000000a00780b */ /* 0x000fc80003f0d200 */ /*0b60*/ FSETP.EQ.OR P0, PT, R10, RZ, !P0 ; /* 0x000000ff0a00720b */ /* 0x000fda0004702400 */ /*0b70*/ @P0 BRA 0xbd0 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*0b80*/ FSETP.GEU.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720b */ /* 0x000fe40003f0e000 */ /*0b90*/ MOV R7, R9 ; /* 0x0000000900077202 */ /* 0x000fd60000000f00 */ /*0ba0*/ @P0 BRA 0xc10 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*0bb0*/ MOV R7, R9 ; /* 0x0000000900077202 */ /* 0x000fe20000000f00 */ /*0bc0*/ BRA 0xc10 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*0bd0*/ FADD R7, R10, R10 ; /* 0x0000000a0a077221 */ /* 0x000fca0000000000 */ /*0be0*/ LOP3.LUT R7, R7, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff07077812 */ /* 0x000fe200078ec0ff */ /*0bf0*/ BRA 0xc10 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0c00*/ FADD R7, R10, 2 ; /* 0x400000000a077421 */ /* 0x000fe20000000000 */ /*0c10*/ FMUL R2, R13, 3 ; /* 0x404000000d027820 */ /* 0x000fc80000400000 */ /*0c20*/ FRND R3, R2 ; /* 0x0000000200037307 */ /* 0x000e220000201000 */ /*0c30*/ FFMA R0, R13, 3, -R2 ; /* 0x404000000d007823 */ /* 0x000fe20000000802 */ /*0c40*/ FSETP.GEU.AND P2, PT, R2, RZ, PT ; /* 0x000000ff0200720b */ /* 0x000fc60003f4e000 */ /*0c50*/ FFMA R0, R15, 3, R0 ; /* 0x404000000f007823 */ /* 0x000fc60000000000 */ /*0c60*/ F2I.NTZ R11, R2 ; /* 0x00000002000b7305 */ /* 0x000e620000203100 */ /*0c70*/ FADD R9, R2, -R3 ; /* 0x8000000302097221 */ /* 0x001fe20000000000 */ /*0c80*/ FSETP.GT.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fe40003f04000 */ /*0c90*/ MOV R3, 0x40dc7ae1 ; /* 0x40dc7ae100037802 */ /* 0x000fe20000000f00 */ /*0ca0*/ FADD R0, R0, R9 ; /* 0x0000000900007221 */ /* 0x000fe20000000000 */ /*0cb0*/ SEL R14, RZ, 0x83000000, P0 ; /* 0x83000000ff0e7807 */ /* 0x000fe40000000000 */ /*0cc0*/ FSETP.GT.AND P0, PT, |R2|, 152, PT ; /* 0x431800000200780b */ /* 0x000fe20003f04200 */ /*0cd0*/ FFMA R9, R0, R19, 0.0013391353422775864601 ; /* 0x3aaf85ed00097423 */ /* 0x000fe20000000013 */ /*0ce0*/ IADD3 R16, R14, 0x7f000000, RZ ; /* 0x7f0000000e107810 */ /* 0x000fc40007ffe0ff */ /*0cf0*/ LEA R14, R11, -R14, 0x17 ; /* 0x8000000e0b0e7211 */ /* 0x002fe200078eb8ff */ /*0d00*/ FFMA R9, R0, R9, 0.0096188392490148544312 ; /* 0x3c1d985600097423 */ /* 0x000fc80000000009 */ /*0d10*/ FFMA R9, R0, R9, 0.055503588169813156128 ; /* 0x3d6357bb00097423 */ /* 0x000fc80000000009 */ /*0d20*/ FFMA R9, R0, R9, 0.24022644758224487305 ; /* 0x3e75fdec00097423 */ /* 0x000fc80000000009 */ /*0d30*/ FFMA R9, R0, R9, 0.69314718246459960938 ; /* 0x3f31721800097423 */ /* 0x000fc80000000009 */ /*0d40*/ FFMA R9, R0, R9, 1 ; /* 0x3f80000000097423 */ /* 0x000fe20000000009 */ /*0d50*/ FFMA R0, R10, -R3, 48.40000152587890625 ; /* 0x4241999a0a007423 */ /* 0x000fc60000000803 */ /*0d60*/ FMUL R9, R9, R16 ; /* 0x0000001009097220 */ /* 0x000fe20000400000 */ /*0d70*/ FFMA R3, R7, 1.4700000286102294922, R0 ; /* 0x3fbc28f607037823 */ /* 0x000fe20000000000 */ /*0d80*/ MOV R7, 0x3f800000 ; /* 0x3f80000000077802 */ /* 0x000fe40000000f00 */ /*0d90*/ FMUL R9, R9, R14 ; /* 0x0000000e09097220 */ /* 0x000fe20000400000 */ /*0da0*/ MOV R0, 0x3f800000 ; /* 0x3f80000000007802 */ /* 0x000fe40000000f00 */ /*0db0*/ @P0 FSEL R9, RZ, +INF , !P2 ; /* 0x7f800000ff090808 */ /* 0x000fe20005000000 */ /*0dc0*/ @!P1 BRA 0xea0 ; /* 0x000000d000009947 */ /* 0x000fea0003800000 */ /*0dd0*/ FSETP.GTU.AND P0, PT, |R10|, +INF , PT ; /* 0x7f8000000a00780b */ /* 0x000fda0003f0c200 */ /*0de0*/ @P0 BRA 0xe90 ; /* 0x000000a000000947 */ /* 0x000fea0003800000 */ /*0df0*/ FSETP.NEU.AND P0, PT, |R10|, +INF , PT ; /* 0x7f8000000a00780b */ /* 0x000fc80003f0d200 */ /*0e00*/ FSETP.EQ.OR P0, PT, R10, RZ, !P0 ; /* 0x000000ff0a00720b */ /* 0x000fda0004702400 */ /*0e10*/ @P0 BRA 0xe70 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*0e20*/ FSETP.GEU.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720b */ /* 0x000fe40003f0e000 */ /*0e30*/ MOV R0, R9 ; /* 0x0000000900007202 */ /* 0x000fd60000000f00 */ /*0e40*/ @P0 BRA 0xea0 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*0e50*/ FADD R0, -R9, -RZ ; /* 0x800000ff09007221 */ /* 0x000fe20000000100 */ /*0e60*/ BRA 0xea0 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*0e70*/ FADD R0, R10, R10 ; /* 0x0000000a0a007221 */ /* 0x000fe20000000000 */ /*0e80*/ BRA 0xea0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0e90*/ FADD R0, R10, 3 ; /* 0x404000000a007421 */ /* 0x000fc80000000000 */ /*0ea0*/ FFMA R9, R0, -0.047499999403953552246, R3 ; /* 0xbd428f5c00097823 */ /* 0x000fe20000000003 */ /*0eb0*/ FADD R0, R8, -0.25900000333786010742 ; /* 0xbe849ba608007421 */ /* 0x000fc60000000000 */ /*0ec0*/ MUFU.RCP R2, R9 ; /* 0x0000000900027308 */ /* 0x000e300000001000 */ /*0ed0*/ FCHK P0, R0, R9 ; /* 0x0000000900007302 */ /* 0x000e620000000000 */ /*0ee0*/ FFMA R3, -R9, R2, 1 ; /* 0x3f80000009037423 */ /* 0x001fc80000000102 */ /*0ef0*/ FFMA R3, R2, R3, R2 ; /* 0x0000000302037223 */ /* 0x000fc80000000002 */ /*0f00*/ FFMA R2, R0, R3, RZ ; /* 0x0000000300027223 */ /* 0x000fc800000000ff */ /*0f10*/ FFMA R15, -R9, R2, R0 ; /* 0x00000002090f7223 */ /* 0x000fc80000000100 */ /*0f20*/ FFMA R15, R3, R15, R2 ; /* 0x0000000f030f7223 */ /* 0x000fe20000000002 */ /*0f30*/ @!P0 BRA 0xf80 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*0f40*/ MOV R3, R9 ; /* 0x0000000900037202 */ /* 0x000fe40000000f00 */ /*0f50*/ MOV R2, 0xf70 ; /* 0x00000f7000027802 */ /* 0x000fe40000000f00 */ /*0f60*/ CALL.REL.NOINC 0x8050 ; /* 0x000070e000007944 */ /* 0x000fea0003c00000 */ /*0f70*/ MOV R15, R0 ; /* 0x00000000000f7202 */ /* 0x001fe40000000f00 */ /*0f80*/ MUFU.RCP R0, c[0x0][0x1a4] ; /* 0x0000690000007b08 */ /* 0x000e220000001000 */ /*0f90*/ MOV R9, c[0x0][0x1a0] ; /* 0x0000680000097a02 */ /* 0x000fe40000000f00 */ /*0fa0*/ MOV R19, 0x3f800000 ; /* 0x3f80000000137802 */ /* 0x000fe40000000f00 */ /*0fb0*/ MOV R3, 0x3ebc6a7f ; /* 0x3ebc6a7f00037802 */ /* 0x000fc60000000f00 */ /*0fc0*/ FCHK P0, R9, c[0x0][0x1a4] ; /* 0x0000690009007b02 */ /* 0x000e640000000000 */ /*0fd0*/ FFMA R10, R10, R3, 0.26399999856948852539 ; /* 0x3e872b020a0a7423 */ /* 0x000fe20000000003 */ /*0fe0*/ FFMA R19, R0, -c[0x0][0x1a4], R19 ; /* 0x8000690000137a23 */ /* 0x001fc80000000013 */ /*0ff0*/ FFMA R19, R0, R19, R0 ; /* 0x0000001300137223 */ /* 0x000fc80000000000 */ /*1000*/ FFMA R0, R19, c[0x0][0x1a0], RZ ; /* 0x0000680013007a23 */ /* 0x000fc800000000ff */ /*1010*/ FFMA R2, R0, -c[0x0][0x1a4], R9 ; /* 0x8000690000027a23 */ /* 0x000fc80000000009 */ /*1020*/ FFMA R19, R19, R2, R0 ; /* 0x0000000213137223 */ /* 0x000fe20000000000 */ /*1030*/ @!P0 BRA 0x1090 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*1040*/ MOV R0, c[0x0][0x1a0] ; /* 0x0000680000007a02 */ /* 0x000fe40000000f00 */ /*1050*/ MOV R3, c[0x0][0x1a4] ; /* 0x0000690000037a02 */ /* 0x000fe40000000f00 */ /*1060*/ MOV R2, 0x1080 ; /* 0x0000108000027802 */ /* 0x000fe40000000f00 */ /*1070*/ CALL.REL.NOINC 0x8050 ; /* 0x00006fd000007944 */ /* 0x000fea0003c00000 */ /*1080*/ MOV R19, R0 ; /* 0x0000000000137202 */ /* 0x001fe40000000f00 */ /*1090*/ MOV R13, c[0x0][0x1a8] ; /* 0x00006a00000d7a02 */ /* 0x000fe20000000f00 */ /*10a0*/ FFMA R18, RZ, 1.1920928955078125e-07, RZ ; /* 0x34000000ff127823 */ /* 0x000fe200000000ff */ /*10b0*/ MOV R21, 0x3c358a3e ; /* 0x3c358a3e00157802 */ /* 0x000fe20000000f00 */ /*10c0*/ ULDC UR4, c[0x0][0x1a4] ; /* 0x0000690000047ab9 */ /* 0x000fe20000000800 */ /*10d0*/ MOV R11, 0x3dd79430 ; /* 0x3dd79430000b7802 */ /* 0x000fe20000000f00 */ /*10e0*/ FMUL R13, R13, 6 ; /* 0x40c000000d0d7820 */ /* 0x000fe20000400000 */ /*10f0*/ MOV R2, 0x3a2c32e4 ; /* 0x3a2c32e400027802 */ /* 0x000fc40000000f00 */ /*1100*/ MOV R0, 0x3dccccc8 ; /* 0x3dccccc800007802 */ /* 0x000fe20000000f00 */ /*1110*/ FFMA R3, -R11.reuse, 1.4426950216293334961, R18 ; /* 0x3fb8aa3b0b037823 */ /* 0x040fe20000000112 */ /*1120*/ MUFU.RCP R14, R13 ; /* 0x0000000d000e7308 */ /* 0x000e220000001000 */ /*1130*/ FFMA R2, R2, R21, 0.0032181653659790754318 ; /* 0x3b52e7db02027423 */ /* 0x000fe20000000015 */ /*1140*/ MOV R16, UR4 ; /* 0x0000000400107c02 */ /* 0x000fe20008000f00 */ /*1150*/ FFMA R0, -R0, R11, 0.010526299476623535156 ; /* 0x3c2c768000007423 */ /* 0x000fe2000000010b */ /*1160*/ FADD R8, R18, -R3 ; /* 0x8000000312087221 */ /* 0x000fe20000000000 */ /*1170*/ FFMA R2, R2, R21.reuse, 0.018033718690276145935 ; /* 0x3c93bb7302027423 */ /* 0x080fe40000000015 */ /*1180*/ FMUL R0, R0, 0.52631574869155883789 ; /* 0x3f06bca100007820 */ /* 0x000fe20000400000 */ /*1190*/ FFMA R9, -R11, 1.4426950216293334961, R8 ; /* 0x3fb8aa3b0b097823 */ /* 0x000fe20000000108 */ /*11a0*/ FFMA R2, R2, R21, 0.12022458761930465698 ; /* 0x3df6384f02027423 */ /* 0x000fe20000000015 */ /*11b0*/ FCHK P0, R16, R13 ; /* 0x0000000d10007302 */ /* 0x000e640000000000 */ /*11c0*/ FFMA R9, R0, 1.4426950216293334961, R9 ; /* 0x3fb8aa3b00097823 */ /* 0x000fe20000000009 */ /*11d0*/ FMUL R2, R2, 0.011080322787165641785 ; /* 0x3c358a3e02027820 */ /* 0x000fc60000400000 */ /*11e0*/ FFMA R9, -R11, 1.9251366722983220825e-08, R9 ; /* 0x32a55e340b097823 */ /* 0x000fe20000000109 */ /*11f0*/ FMUL R8, R2, 3 ; /* 0x4040000002087820 */ /* 0x000fe20000400000 */ /*1200*/ FFMA R11, -R13, R14, 1 ; /* 0x3f8000000d0b7423 */ /* 0x001fc6000000010e */ /*1210*/ FFMA R9, R0, R8, R9 ; /* 0x0000000800097223 */ /* 0x000fe20000000009 */ /*1220*/ FFMA R0, R14, R11, R14 ; /* 0x0000000b0e007223 */ /* 0x000fc6000000000e */ /*1230*/ FFMA R2, R2, -0.10526311397552490234, R9 ; /* 0xbdd7943002027823 */ /* 0x000fe20000000009 */ /*1240*/ FFMA R9, R0, c[0x0][0x1a4], RZ ; /* 0x0000690000097a23 */ /* 0x000fc600000000ff */ /*1250*/ FADD R11, R3, R2 ; /* 0x00000002030b7221 */ /* 0x000fe20000000000 */ /*1260*/ FFMA R8, -R13, R9, c[0x0][0x1a4] ; /* 0x000069000d087623 */ /* 0x000fc60000000109 */ /*1270*/ FADD R3, -R3, R11 ; /* 0x0000000b03037221 */ /* 0x000fe20000000100 */ /*1280*/ FFMA R0, R0, R8, R9 ; /* 0x0000000800007223 */ /* 0x000fc60000000009 */ /*1290*/ FADD R8, R2, -R3 ; /* 0x8000000302087221 */ /* 0x000fe20000000000 */ /*12a0*/ @!P0 BRA 0x12f0 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*12b0*/ MOV R3, R13 ; /* 0x0000000d00037202 */ /* 0x000fe40000000f00 */ /*12c0*/ MOV R0, c[0x0][0x1a4] ; /* 0x0000690000007a02 */ /* 0x000fe40000000f00 */ /*12d0*/ MOV R2, 0x12f0 ; /* 0x000012f000027802 */ /* 0x000fe40000000f00 */ /*12e0*/ CALL.REL.NOINC 0x8050 ; /* 0x00006d6000007944 */ /* 0x000fea0003c00000 */ /*12f0*/ FSETP.NEU.AND P0, PT, R0, 1, PT ; /* 0x3f8000000000780b */ /* 0x001fda0003f0d000 */ /*1300*/ @!P0 BRA 0x1780 ; /* 0x0000047000008947 */ /* 0x000fea0003800000 */ /*1310*/ FSETP.GTU.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fda0003f0c200 */ /*1320*/ @P0 BRA 0x1770 ; /* 0x0000044000000947 */ /* 0x000fea0003800000 */ /*1330*/ FSETP.NEU.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fc80003f0d200 */ /*1340*/ FSETP.EQ.OR P0, PT, R0, RZ, !P0 ; /* 0x000000ff0000720b */ /* 0x000fda0004702400 */ /*1350*/ @P0 BRA 0x1740 ; /* 0x000003e000000947 */ /* 0x000fea0003800000 */ /*1360*/ FMUL R3, |R0|.reuse, 16777216 ; /* 0x4b80000000037820 */ /* 0x040fe20000400200 */ /*1370*/ FSETP.GEU.AND P0, PT, |R0|.reuse, 1.175494350822287508e-38, PT ; /* 0x008000000000780b */ /* 0x040fe40003f0e200 */ /*1380*/ MOV R16, 0x3a2c32e4 ; /* 0x3a2c32e400107802 */ /* 0x000fe40000000f00 */ /*1390*/ FSEL R3, R3, |R0|, !P0 ; /* 0x4000000003037208 */ /* 0x000fe40004000000 */ /*13a0*/ FSETP.GEU.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720b */ /* 0x000fe40003f4e000 */ /*13b0*/ IADD3 R2, R3, -0x3f3504f3, RZ ; /* 0xc0cafb0d03027810 */ /* 0x000fc80007ffe0ff */ /*13c0*/ LOP3.LUT R2, R2, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000002027812 */ /* 0x000fc800078ec0ff */ /*13d0*/ IADD3 R3, R3, -R2.reuse, RZ ; /* 0x8000000203037210 */ /* 0x080fe40007ffe0ff */ /*13e0*/ I2FP.F32.S32 R2, R2 ; /* 0x0000000200027245 */ /* 0x000fc60000201400 */ /*13f0*/ FADD R9, R3.reuse, 1 ; /* 0x3f80000003097421 */ /* 0x040fe20000000000 */ /*1400*/ FADD R7, R3, -1 ; /* 0xbf80000003077421 */ /* 0x000fe20000000000 */ /*1410*/ FSEL R3, RZ, -24, P0 ; /* 0xc1c00000ff037808 */ /* 0x000fc60000000000 */ /*1420*/ FADD R14, R7, R7 ; /* 0x00000007070e7221 */ /* 0x000fe20000000000 */ /*1430*/ MUFU.RCP R9, R9 ; /* 0x0000000900097308 */ /* 0x000e220000001000 */ /*1440*/ FFMA R2, R2, 1.1920928955078125e-07, R3 ; /* 0x3400000002027823 */ /* 0x000fe40000000003 */ /*1450*/ FMUL R13, R9, R14 ; /* 0x0000000e090d7220 */ /* 0x001fc80000400000 */ /*1460*/ FADD R14, R7, -R13 ; /* 0x8000000d070e7221 */ /* 0x000fe20000000000 */ /*1470*/ FMUL R3, R13.reuse, R13.reuse ; /* 0x0000000d0d037220 */ /* 0x0c0fe20000400000 */ /*1480*/ FFMA R21, R13, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b0d157823 */ /* 0x000fe40000000002 */ /*1490*/ FADD R14, R14, R14 ; /* 0x0000000e0e0e7221 */ /* 0x000fe20000000000 */ /*14a0*/ FFMA R16, R3, R16, 0.0032181653659790754318 ; /* 0x3b52e7db03107423 */ /* 0x000fe20000000010 */ /*14b0*/ FADD R2, R2, -R21 ; /* 0x8000001502027221 */ /* 0x000fe40000000000 */ /*14c0*/ FFMA R14, R7, -R13, R14 ; /* 0x8000000d070e7223 */ /* 0x000fe2000000000e */ /*14d0*/ FFMA R16, R3, R16, 0.018033718690276145935 ; /* 0x3c93bb7303107423 */ /* 0x000fe20000000010 */ /*14e0*/ FFMA R7, R13, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b0d077823 */ /* 0x000fc40000000002 */ /*14f0*/ FMUL R14, R9, R14 ; /* 0x0000000e090e7220 */ /* 0x000fe20000400000 */ /*1500*/ FFMA R16, R3, R16, 0.12022458761930465698 ; /* 0x3df6384f03107423 */ /* 0x000fc60000000010 */ /*1510*/ FFMA R2, R14, 1.4426950216293334961, R7 ; /* 0x3fb8aa3b0e027823 */ /* 0x000fe20000000007 */ /*1520*/ FMUL R16, R3, R16 ; /* 0x0000001003107220 */ /* 0x000fc60000400000 */ /*1530*/ FFMA R7, R13, 1.9251366722983220825e-08, R2 ; /* 0x32a55e340d077823 */ /* 0x000fe20000000002 */ /*1540*/ FMUL R3, R16, 3 ; /* 0x4040000010037820 */ /* 0x000fc80000400000 */ /*1550*/ FFMA R3, R14, R3, R7 ; /* 0x000000030e037223 */ /* 0x000fe20000000007 */ /*1560*/ MOV R7, 0x391fcb8e ; /* 0x391fcb8e00077802 */ /* 0x000fc60000000f00 */ /*1570*/ FFMA R16, R13, R16, R3 ; /* 0x000000100d107223 */ /* 0x000fc80000000003 */ /*1580*/ FADD R2, R21, R16 ; /* 0x0000001015027221 */ /* 0x000fc80000000000 */ /*1590*/ FMUL R3, R2, 0.3333333432674407959 ; /* 0x3eaaaaab02037820 */ /* 0x000fe20000400000 */ /*15a0*/ FADD R21, -R21, R2 ; /* 0x0000000215157221 */ /* 0x000fc60000000100 */ /*15b0*/ FRND R14, R3 ; /* 0x00000003000e7307 */ /* 0x000e220000201000 */ /*15c0*/ FADD R21, R16, -R21 ; /* 0x8000001510157221 */ /* 0x000fe20000000000 */ /*15d0*/ FFMA R2, R2, 0.3333333432674407959, -R3 ; /* 0x3eaaaaab02027823 */ /* 0x000fe20000000803 */ /*15e0*/ FSETP.GT.AND P1, PT, |R3|, 152, PT ; /* 0x431800000300780b */ /* 0x000fc60003f24200 */ /*15f0*/ FFMA R21, R21, 0.3333333432674407959, R2 ; /* 0x3eaaaaab15157823 */ /* 0x000fe40000000002 */ /*1600*/ F2I.NTZ R16, R3 ; /* 0x0000000300107305 */ /* 0x000e620000203100 */ /*1610*/ FADD R2, R3, -R14 ; /* 0x8000000e03027221 */ /* 0x001fe20000000000 */ /*1620*/ FSETP.GT.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720b */ /* 0x000fc60003f04000 */ /*1630*/ FADD R2, R2, R21 ; /* 0x0000001502027221 */ /* 0x000fc80000000000 */ /*1640*/ FFMA R7, R2, R7, 0.0013391353422775864601 ; /* 0x3aaf85ed02077423 */ /* 0x000fc80000000007 */ /*1650*/ FFMA R7, R2, R7, 0.0096188392490148544312 ; /* 0x3c1d985602077423 */ /* 0x000fc80000000007 */ /*1660*/ FFMA R7, R2, R7, 0.055503588169813156128 ; /* 0x3d6357bb02077423 */ /* 0x000fc80000000007 */ /*1670*/ FFMA R9, R2.reuse, R7, 0.24022644758224487305 ; /* 0x3e75fdec02097423 */ /* 0x040fe20000000007 */ /*1680*/ SEL R7, RZ, 0x83000000, P0 ; /* 0x83000000ff077807 */ /* 0x000fe40000000000 */ /*1690*/ FSETP.GEU.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fe20003f0e000 */ /*16a0*/ FFMA R13, R2, R9, 0.69314718246459960938 ; /* 0x3f317218020d7423 */ /* 0x000fe20000000009 */ /*16b0*/ IADD3 R9, R7, 0x7f000000, RZ ; /* 0x7f00000007097810 */ /* 0x000fe40007ffe0ff */ /*16c0*/ LEA R16, R16, -R7, 0x17 ; /* 0x8000000710107211 */ /* 0x002fe200078eb8ff */ /*16d0*/ FFMA R2, R2, R13, 1 ; /* 0x3f80000002027423 */ /* 0x000fe2000000000d */ /*16e0*/ FSEL R7, RZ, +INF , !P0 ; /* 0x7f800000ff077808 */ /* 0x000fc60004000000 */ /*16f0*/ FMUL R9, R9, R2 ; /* 0x0000000209097220 */ /* 0x000fc80000400000 */ /*1700*/ @!P1 FMUL R7, R16, R9 ; /* 0x0000000910079220 */ /* 0x000fe20000400000 */ /*1710*/ @P2 BRA 0x1780 ; /* 0x0000006000002947 */ /* 0x000fea0003800000 */ /*1720*/ MOV R7, 0x7fffffff ; /* 0x7fffffff00077802 */ /* 0x000fe20000000f00 */ /*1730*/ BRA 0x1780 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*1740*/ FADD R0, R0, R0 ; /* 0x0000000000007221 */ /* 0x000fca0000000000 */ /*1750*/ LOP3.LUT R7, R0, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff00077812 */ /* 0x000fe200078ec0ff */ /*1760*/ BRA 0x1780 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1770*/ FADD R7, R0, 0.3333333432674407959 ; /* 0x3eaaaaab00077421 */ /* 0x000fe20000000000 */ /*1780*/ FMUL R2, R11.reuse, 2.5 ; /* 0x402000000b027820 */ /* 0x040fe20000400000 */ /*1790*/ MOV R14, 0x391fcb8e ; /* 0x391fcb8e000e7802 */ /* 0x000fe20000000f00 */ /*17a0*/ MUFU.RCP R13, c[0x0][0x1a8] ; /* 0x00006a00000d7b08 */ /* 0x000e220000001000 */ /*17b0*/ ULDC UR4, c[0x0][0x1a0] ; /* 0x0000680000047ab9 */ /* 0x000fe20000000800 */ /*17c0*/ FFMA R9, R11, 2.5, -R2 ; /* 0x402000000b097823 */ /* 0x000fe20000000802 */ /*17d0*/ MOV R22, c[0x0][0x1a8] ; /* 0x00006a0000167a02 */ /* 0x000fe40000000f00 */ /*17e0*/ FSETP.GT.AND P1, PT, |R2|, 152, PT ; /* 0x431800000200780b */ /* 0x000fe20003f24200 */ /*17f0*/ FFMA R9, R8, 2.5, R9 ; /* 0x4020000008097823 */ /* 0x000fe40000000009 */ /*1800*/ FRND R3, R2 ; /* 0x0000000200037307 */ /* 0x000e620000201000 */ /*1810*/ FFMA R20, R13, -R22, 1 ; /* 0x3f8000000d147423 */ /* 0x001fe20000000816 */ /*1820*/ FADD R0, R2, -R3 ; /* 0x8000000302007221 */ /* 0x002fe20000000000 */ /*1830*/ FSETP.GT.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fc60003f04000 */ /*1840*/ FADD R9, R0, R9 ; /* 0x0000000900097221 */ /* 0x000fe20000000000 */ /*1850*/ SEL R3, RZ, 0x83000000, P0 ; /* 0x83000000ff037807 */ /* 0x000fe40000000000 */ /*1860*/ FSETP.GEU.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720b */ /* 0x000fe20003f0e000 */ /*1870*/ FFMA R0, R9.reuse, R14, 0.0013391353422775864601 ; /* 0x3aaf85ed09007423 */ /* 0x040fe4000000000e */ /*1880*/ F2I.NTZ R14, R2 ; /* 0x00000002000e7305 */ /* 0x0000640000203100 */ /*1890*/ FFMA R0, R9, R0, 0.0096188392490148544312 ; /* 0x3c1d985609007423 */ /* 0x000fc80000000000 */ /*18a0*/ FFMA R0, R9, R0, 0.055503588169813156128 ; /* 0x3d6357bb09007423 */ /* 0x000fe20000000000 */ /*18b0*/ IADD3 R2, R3, 0x7f000000, RZ ; /* 0x7f00000003027810 */ /* 0x001fc60007ffe0ff */ /*18c0*/ FFMA R0, R9, R0, 0.24022644758224487305 ; /* 0x3e75fdec09007423 */ /* 0x000fc80000000000 */ /*18d0*/ FFMA R16, R9, R0, 0.69314718246459960938 ; /* 0x3f31721809107423 */ /* 0x000fe20000000000 */ /*18e0*/ FFMA R0, R13, R20, R13 ; /* 0x000000140d007223 */ /* 0x000fe2000000000d */ /*18f0*/ LEA R14, R14, -R3, 0x17 ; /* 0x800000030e0e7211 */ /* 0x002fe400078eb8ff */ /*1900*/ FFMA R9, R9, R16, 1 ; /* 0x3f80000009097423 */ /* 0x000fe20000000010 */ /*1910*/ MOV R16, UR4 ; /* 0x0000000400107c02 */ /* 0x000fe20008000f00 */ /*1920*/ FFMA R13, R0, c[0x0][0x1a0], RZ ; /* 0x00006800000d7a23 */ /* 0x000fe200000000ff */ /*1930*/ FSEL R3, RZ, +INF , !P0 ; /* 0x7f800000ff037808 */ /* 0x000fe20004000000 */ /*1940*/ FMUL R9, R2, R9 ; /* 0x0000000902097220 */ /* 0x000fe20000400000 */ /*1950*/ FCHK P0, R16, c[0x0][0x1a8] ; /* 0x00006a0010007b02 */ /* 0x000e220000000000 */ /*1960*/ FMUL R2, R19, 3.1400001049041748047 ; /* 0x4048f5c313027820 */ /* 0x000fc40000400000 */ /*1970*/ @!P1 FMUL R3, R14, R9 ; /* 0x000000090e039220 */ /* 0x000fe20000400000 */ /*1980*/ FFMA R9, R13, -R22, c[0x0][0x1a0] ; /* 0x000068000d097623 */ /* 0x000fc60000000816 */ /*1990*/ FMUL R2, R3, R2 ; /* 0x0000000203027220 */ /* 0x000fe20000400000 */ /*19a0*/ FFMA R0, R0, R9, R13 ; /* 0x0000000900007223 */ /* 0x000fe2000000000d */ /*19b0*/ MOV R9, 0x3f800000 ; /* 0x3f80000000097802 */ /* 0x000fe40000000f00 */ /*19c0*/ FFMA R7, R2, R7, -0.032000001519918441772 ; /* 0xbd03126f02077423 */ /* 0x000fe20000000007 */ /*19d0*/ @!P0 BRA 0x1a20 ; /* 0x0000004000008947 */ /* 0x001fea0003800000 */ /*19e0*/ MOV R0, c[0x0][0x1a0] ; /* 0x0000680000007a02 */ /* 0x000fe40000000f00 */ /*19f0*/ MOV R3, c[0x0][0x1a8] ; /* 0x00006a0000037a02 */ /* 0x000fe40000000f00 */ /*1a00*/ MOV R2, 0x1a20 ; /* 0x00001a2000027802 */ /* 0x000fe40000000f00 */ /*1a10*/ CALL.REL.NOINC 0x8050 ; /* 0x0000663000007944 */ /* 0x000fea0003c00000 */ /*1a20*/ FSETP.NEU.AND P0, PT, R0, 1, PT ; /* 0x3f8000000000780b */ /* 0x001fe40003f0d000 */ /*1a30*/ MOV R2, 0x3f800000 ; /* 0x3f80000000027802 */ /* 0x000fd60000000f00 */ /*1a40*/ @!P0 BRA 0x1ec0 ; /* 0x0000047000008947 */ /* 0x000fea0003800000 */ /*1a50*/ FSETP.GTU.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fda0003f0c200 */ /*1a60*/ @P0 BRA 0x1eb0 ; /* 0x0000044000000947 */ /* 0x000fea0003800000 */ /*1a70*/ FSETP.NEU.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fc80003f0d200 */ /*1a80*/ FSETP.EQ.OR P0, PT, R0, RZ, !P0 ; /* 0x000000ff0000720b */ /* 0x000fda0004702400 */ /*1a90*/ @P0 BRA 0x1e80 ; /* 0x000003e000000947 */ /* 0x000fea0003800000 */ /*1aa0*/ FMUL R3, |R0|.reuse, 16777216 ; /* 0x4b80000000037820 */ /* 0x040fe20000400200 */ /*1ab0*/ FSETP.GEU.AND P0, PT, |R0|.reuse, 1.175494350822287508e-38, PT ; /* 0x008000000000780b */ /* 0x040fe40003f0e200 */ /*1ac0*/ MOV R20, 0x3a2c32e4 ; /* 0x3a2c32e400147802 */ /* 0x000fe40000000f00 */ /*1ad0*/ FSEL R3, R3, |R0|, !P0 ; /* 0x4000000003037208 */ /* 0x000fe40004000000 */ /*1ae0*/ FSETP.GEU.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720b */ /* 0x000fe40003f4e000 */ /*1af0*/ IADD3 R2, R3, -0x3f3504f3, RZ ; /* 0xc0cafb0d03027810 */ /* 0x000fc80007ffe0ff */ /*1b00*/ LOP3.LUT R2, R2, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000002027812 */ /* 0x000fc800078ec0ff */ /*1b10*/ IADD3 R3, R3, -R2.reuse, RZ ; /* 0x8000000203037210 */ /* 0x080fe40007ffe0ff */ /*1b20*/ I2FP.F32.S32 R2, R2 ; /* 0x0000000200027245 */ /* 0x000fc60000201400 */ /*1b30*/ FADD R14, R3.reuse, 1 ; /* 0x3f800000030e7421 */ /* 0x040fe20000000000 */ /*1b40*/ FADD R13, R3, -1 ; /* 0xbf800000030d7421 */ /* 0x000fe20000000000 */ /*1b50*/ FSEL R3, RZ, -24, P0 ; /* 0xc1c00000ff037808 */ /* 0x000fc60000000000 */ /*1b60*/ FADD R21, R13, R13 ; /* 0x0000000d0d157221 */ /* 0x000fe20000000000 */ /*1b70*/ MUFU.RCP R14, R14 ; /* 0x0000000e000e7308 */ /* 0x000e220000001000 */ /*1b80*/ FFMA R2, R2, 1.1920928955078125e-07, R3 ; /* 0x3400000002027823 */ /* 0x000fe40000000003 */ /*1b90*/ FMUL R21, R14, R21 ; /* 0x000000150e157220 */ /* 0x001fc80000400000 */ /*1ba0*/ FADD R16, R13, -R21 ; /* 0x800000150d107221 */ /* 0x000fe20000000000 */ /*1bb0*/ FMUL R3, R21.reuse, R21.reuse ; /* 0x0000001515037220 */ /* 0x0c0fe20000400000 */ /*1bc0*/ FFMA R23, R21, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b15177823 */ /* 0x000fe40000000002 */ /*1bd0*/ FADD R16, R16, R16 ; /* 0x0000001010107221 */ /* 0x000fe20000000000 */ /*1be0*/ FFMA R20, R3, R20, 0.0032181653659790754318 ; /* 0x3b52e7db03147423 */ /* 0x000fe20000000014 */ /*1bf0*/ FADD R2, R2, -R23 ; /* 0x8000001702027221 */ /* 0x000fe40000000000 */ /*1c00*/ FFMA R13, R13, -R21, R16 ; /* 0x800000150d0d7223 */ /* 0x000fe20000000010 */ /*1c10*/ FFMA R20, R3, R20, 0.018033718690276145935 ; /* 0x3c93bb7303147423 */ /* 0x000fe20000000014 */ /*1c20*/ FFMA R2, R21, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b15027823 */ /* 0x000fc40000000002 */ /*1c30*/ FMUL R13, R14, R13 ; /* 0x0000000d0e0d7220 */ /* 0x000fe20000400000 */ /*1c40*/ FFMA R20, R3, R20, 0.12022458761930465698 ; /* 0x3df6384f03147423 */ /* 0x000fc60000000014 */ /*1c50*/ FFMA R2, R13, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b0d027823 */ /* 0x000fe20000000002 */ /*1c60*/ FMUL R20, R3, R20 ; /* 0x0000001403147220 */ /* 0x000fc60000400000 */ /*1c70*/ FFMA R14, R21, 1.9251366722983220825e-08, R2 ; /* 0x32a55e34150e7823 */ /* 0x000fe20000000002 */ /*1c80*/ FMUL R2, R20, 3 ; /* 0x4040000014027820 */ /* 0x000fc80000400000 */ /*1c90*/ FFMA R13, R13, R2, R14 ; /* 0x000000020d0d7223 */ /* 0x000fc8000000000e */ /*1ca0*/ FFMA R20, R21, R20, R13 ; /* 0x0000001415147223 */ /* 0x000fe2000000000d */ /*1cb0*/ MOV R13, 0x391fcb8e ; /* 0x391fcb8e000d7802 */ /* 0x000fc60000000f00 */ /*1cc0*/ FADD R2, R23, R20 ; /* 0x0000001417027221 */ /* 0x000fc80000000000 */ /*1cd0*/ FMUL R3, R2, 0.5 ; /* 0x3f00000002037820 */ /* 0x000fe20000400000 */ /*1ce0*/ FADD R23, -R23, R2 ; /* 0x0000000217177221 */ /* 0x000fc60000000100 */ /*1cf0*/ FRND R14, R3 ; /* 0x00000003000e7307 */ /* 0x000e220000201000 */ /*1d00*/ FADD R23, R20, -R23 ; /* 0x8000001714177221 */ /* 0x000fe20000000000 */ /*1d10*/ FFMA R2, R2, 0.5, -R3 ; /* 0x3f00000002027823 */ /* 0x000fe20000000803 */ /*1d20*/ FSETP.GT.AND P1, PT, |R3|, 152, PT ; /* 0x431800000300780b */ /* 0x000fc60003f24200 */ /*1d30*/ FFMA R23, R23, 0.5, R2 ; /* 0x3f00000017177823 */ /* 0x000fe40000000002 */ /*1d40*/ F2I.NTZ R16, R3 ; /* 0x0000000300107305 */ /* 0x000e620000203100 */ /*1d50*/ FADD R2, R3, -R14 ; /* 0x8000000e03027221 */ /* 0x001fe20000000000 */ /*1d60*/ FSETP.GT.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720b */ /* 0x000fc60003f04000 */ /*1d70*/ FADD R2, R2, R23 ; /* 0x0000001702027221 */ /* 0x000fc80000000000 */ /*1d80*/ FFMA R13, R2, R13, 0.0013391353422775864601 ; /* 0x3aaf85ed020d7423 */ /* 0x000fc8000000000d */ /*1d90*/ FFMA R13, R2, R13, 0.0096188392490148544312 ; /* 0x3c1d9856020d7423 */ /* 0x000fc8000000000d */ /*1da0*/ FFMA R13, R2, R13, 0.055503588169813156128 ; /* 0x3d6357bb020d7423 */ /* 0x000fc8000000000d */ /*1db0*/ FFMA R21, R2.reuse, R13, 0.24022644758224487305 ; /* 0x3e75fdec02157423 */ /* 0x040fe2000000000d */ /*1dc0*/ SEL R13, RZ, 0x83000000, P0 ; /* 0x83000000ff0d7807 */ /* 0x000fe40000000000 */ /*1dd0*/ FSETP.GEU.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fe20003f0e000 */ /*1de0*/ FFMA R21, R2, R21, 0.69314718246459960938 ; /* 0x3f31721802157423 */ /* 0x000fe20000000015 */ /*1df0*/ IADD3 R14, R13, 0x7f000000, RZ ; /* 0x7f0000000d0e7810 */ /* 0x000fe40007ffe0ff */ /*1e00*/ LEA R16, R16, -R13, 0x17 ; /* 0x8000000d10107211 */ /* 0x002fe200078eb8ff */ /*1e10*/ FFMA R21, R2, R21, 1 ; /* 0x3f80000002157423 */ /* 0x000fe20000000015 */ /*1e20*/ FSEL R2, RZ, +INF , !P0 ; /* 0x7f800000ff027808 */ /* 0x000fc60004000000 */ /*1e30*/ FMUL R21, R14, R21 ; /* 0x000000150e157220 */ /* 0x000fc80000400000 */ /*1e40*/ @!P1 FMUL R2, R16, R21 ; /* 0x0000001510029220 */ /* 0x000fe20000400000 */ /*1e50*/ @P2 BRA 0x1ec0 ; /* 0x0000006000002947 */ /* 0x000fea0003800000 */ /*1e60*/ MOV R2, 0x7fffffff ; /* 0x7fffffff00027802 */ /* 0x000fe20000000f00 */ /*1e70*/ BRA 0x1ec0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*1e80*/ FADD R0, R0, R0 ; /* 0x0000000000007221 */ /* 0x000fca0000000000 */ /*1e90*/ LOP3.LUT R2, R0, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff00027812 */ /* 0x000fe200078ec0ff */ /*1ea0*/ BRA 0x1ec0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1eb0*/ FADD R2, R0, 0.5 ; /* 0x3f00000000027421 */ /* 0x000fe20000000000 */ /*1ec0*/ MOV R0, c[0x0][0x1a4] ; /* 0x0000690000007a02 */ /* 0x000fe40000000f00 */ /*1ed0*/ MOV R23, 0x3a2c32e4 ; /* 0x3a2c32e400177802 */ /* 0x000fe40000000f00 */ /*1ee0*/ FSETP.GEU.AND P0, PT, |R0|.reuse, 1.175494350822287508e-38, PT ; /* 0x008000000000780b */ /* 0x040fe20003f0e200 */ /*1ef0*/ FMUL R3, |R0|, 16777216 ; /* 0x4b80000000037820 */ /* 0x000fca0000400200 */ /*1f00*/ FSEL R3, R3, |c[0x0][0x1a4]|, !P0 ; /* 0x4000690003037a08 */ /* 0x000fc80004000000 */ /*1f10*/ IADD3 R13, R3, -0x3f3504f3, RZ ; /* 0xc0cafb0d030d7810 */ /* 0x000fc80007ffe0ff */ /*1f20*/ LOP3.LUT R14, R13, 0xff800000, RZ, 0xc0, !PT ; /* 0xff8000000d0e7812 */ /* 0x000fc800078ec0ff */ /*1f30*/ IADD3 R3, R3, -R14.reuse, RZ ; /* 0x8000000e03037210 */ /* 0x080fe40007ffe0ff */ /*1f40*/ I2FP.F32.S32 R14, R14 ; /* 0x0000000e000e7245 */ /* 0x000fc60000201400 */ /*1f50*/ FADD R16, R3.reuse, 1 ; /* 0x3f80000003107421 */ /* 0x040fe20000000000 */ /*1f60*/ FADD R13, R3, -1 ; /* 0xbf800000030d7421 */ /* 0x000fe20000000000 */ /*1f70*/ FSEL R3, RZ, -24, P0 ; /* 0xc1c00000ff037808 */ /* 0x000fc60000000000 */ /*1f80*/ FADD R21, R13, R13 ; /* 0x0000000d0d157221 */ /* 0x000fe20000000000 */ /*1f90*/ MUFU.RCP R16, R16 ; /* 0x0000001000107308 */ /* 0x000e220000001000 */ /*1fa0*/ FFMA R3, R14, 1.1920928955078125e-07, R3 ; /* 0x340000000e037823 */ /* 0x000fe40000000003 */ /*1fb0*/ FMUL R20, R16, R21 ; /* 0x0000001510147220 */ /* 0x001fc80000400000 */ /*1fc0*/ FADD R21, R13, -R20 ; /* 0x800000140d157221 */ /* 0x000fe20000000000 */ /*1fd0*/ FMUL R14, R20.reuse, R20.reuse ; /* 0x00000014140e7220 */ /* 0x0c0fe20000400000 */ /*1fe0*/ FFMA R24, R20, 1.4426950216293334961, R3 ; /* 0x3fb8aa3b14187823 */ /* 0x000fe40000000003 */ /*1ff0*/ FADD R22, R21, R21 ; /* 0x0000001515167221 */ /* 0x000fe20000000000 */ /*2000*/ FFMA R21, R14.reuse, R23, 0.0032181653659790754318 ; /* 0x3b52e7db0e157423 */ /* 0x040fe20000000017 */ /*2010*/ FADD R3, R3, -R24 ; /* 0x8000001803037221 */ /* 0x000fe20000000000 */ /*2020*/ MOV R23, 0x391fcb8e ; /* 0x391fcb8e00177802 */ /* 0x000fe20000000f00 */ /*2030*/ FFMA R13, R13, -R20, R22 ; /* 0x800000140d0d7223 */ /* 0x000fe20000000016 */ /*2040*/ FFMA R21, R14, R21, 0.018033718690276145935 ; /* 0x3c93bb730e157423 */ /* 0x000fe20000000015 */ /*2050*/ FFMA R22, R20, 1.4426950216293334961, R3 ; /* 0x3fb8aa3b14167823 */ /* 0x000fc40000000003 */ /*2060*/ FMUL R13, R16, R13 ; /* 0x0000000d100d7220 */ /* 0x000fe20000400000 */ /*2070*/ FFMA R21, R14, R21, 0.12022458761930465698 ; /* 0x3df6384f0e157423 */ /* 0x000fc60000000015 */ /*2080*/ FFMA R3, R13, 1.4426950216293334961, R22 ; /* 0x3fb8aa3b0d037823 */ /* 0x000fe20000000016 */ /*2090*/ FMUL R21, R14, R21 ; /* 0x000000150e157220 */ /* 0x000fc60000400000 */ /*20a0*/ FFMA R14, R20, 1.9251366722983220825e-08, R3 ; /* 0x32a55e34140e7823 */ /* 0x000fe20000000003 */ /*20b0*/ FMUL R3, R21, 3 ; /* 0x4040000015037820 */ /* 0x000fc80000400000 */ /*20c0*/ FFMA R3, R13, R3, R14 ; /* 0x000000030d037223 */ /* 0x000fe2000000000e */ /*20d0*/ FMUL R14, R11, 1.5 ; /* 0x3fc000000b0e7820 */ /* 0x000fc60000400000 */ /*20e0*/ FFMA R21, R20, R21, R3 ; /* 0x0000001514157223 */ /* 0x000fe20000000003 */ /*20f0*/ FRND R13, R14 ; /* 0x0000000e000d7307 */ /* 0x000e220000201000 */ /*2100*/ FFMA R11, R11, 1.5, -R14 ; /* 0x3fc000000b0b7823 */ /* 0x000fe2000000080e */ /*2110*/ FSETP.GEU.AND P2, PT, R14, RZ, PT ; /* 0x000000ff0e00720b */ /* 0x000fe20003f4e000 */ /*2120*/ FADD R20, R24, R21 ; /* 0x0000001518147221 */ /* 0x000fe40000000000 */ /*2130*/ FFMA R11, R8, 1.5, R11 ; /* 0x3fc00000080b7823 */ /* 0x000fe4000000000b */ /*2140*/ FMUL R3, R20, 2 ; /* 0x4000000014037820 */ /* 0x000fe20000400000 */ /*2150*/ FADD R24, -R24, R20 ; /* 0x0000001418187221 */ /* 0x000fc60000000100 */ /*2160*/ FRND R16, R3 ; /* 0x0000000300107307 */ /* 0x000e620000201000 */ /*2170*/ FADD R24, R21, -R24 ; /* 0x8000001815187221 */ /* 0x000fe20000000000 */ /*2180*/ FFMA R21, R20, 2, -R3 ; /* 0x4000000014157823 */ /* 0x000fe20000000803 */ /*2190*/ FSETP.GEU.AND P3, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fe20003f6e000 */ /*21a0*/ FADD R8, R14, -R13 ; /* 0x8000000d0e087221 */ /* 0x001fe40000000000 */ /*21b0*/ FFMA R21, R24, 2, R21 ; /* 0x4000000018157823 */ /* 0x000fe20000000015 */ /*21c0*/ FSETP.GT.AND P0, PT, R13, RZ, PT ; /* 0x000000ff0d00720b */ /* 0x000fe20003f04000 */ /*21d0*/ F2I.NTZ R20, R14 ; /* 0x0000000e00147305 */ /* 0x000e220000203100 */ /*21e0*/ FADD R8, R11, R8 ; /* 0x000000080b087221 */ /* 0x000fe40000000000 */ /*21f0*/ SEL R13, RZ, 0x83000000, P0 ; /* 0x83000000ff0d7807 */ /* 0x000fc40000000000 */ /*2200*/ FFMA R11, R8, R23, 0.0013391353422775864601 ; /* 0x3aaf85ed080b7423 */ /* 0x000fe20000000017 */ /*2210*/ FSETP.GT.AND P0, PT, |R14|, 152, PT ; /* 0x431800000e00780b */ /* 0x000fe20003f04200 */ /*2220*/ FADD R22, R3, -R16 ; /* 0x8000001003167221 */ /* 0x002fe40000000000 */ /*2230*/ FFMA R11, R8, R11, 0.0096188392490148544312 ; /* 0x3c1d9856080b7423 */ /* 0x000fe2000000000b */ /*2240*/ FSETP.GT.AND P1, PT, R16, RZ, PT ; /* 0x000000ff1000720b */ /* 0x000fe20003f24000 */ /*2250*/ FADD R21, R21, R22 ; /* 0x0000001615157221 */ /* 0x000fe40000000000 */ /*2260*/ FFMA R11, R8, R11, 0.055503588169813156128 ; /* 0x3d6357bb080b7423 */ /* 0x000fe2000000000b */ /*2270*/ SEL R16, RZ, 0x83000000, P1 ; /* 0x83000000ff107807 */ /* 0x000fe20000800000 */ /*2280*/ FFMA R22, R21, R23, 0.0013391353422775864601 ; /* 0x3aaf85ed15167423 */ /* 0x000fc40000000017 */ /*2290*/ FFMA R11, R8, R11, 0.24022644758224487305 ; /* 0x3e75fdec080b7423 */ /* 0x000fe2000000000b */ /*22a0*/ F2I.NTZ R23, R3 ; /* 0x0000000300177305 */ /* 0x0002a20000203100 */ /*22b0*/ LEA R20, R20, -R13, 0x17 ; /* 0x8000000d14147211 */ /* 0x001fe200078eb8ff */ /*22c0*/ FFMA R24, R21, R22, 0.0096188392490148544312 ; /* 0x3c1d985615187423 */ /* 0x000fe20000000016 */ /*22d0*/ FFMA R11, R8.reuse, R11, 0.69314718246459960938 ; /* 0x3f317218080b7423 */ /* 0x040fe2000000000b */ /*22e0*/ IADD3 R22, R13, 0x7f000000, RZ ; /* 0x7f0000000d167810 */ /* 0x000fe40007ffe0ff */ /*22f0*/ FFMA R24, R21, R24, 0.055503588169813156128 ; /* 0x3d6357bb15187423 */ /* 0x000fe20000000018 */ /*2300*/ FFMA R11, R8, R11, 1 ; /* 0x3f800000080b7423 */ /* 0x000fe2000000000b */ /*2310*/ FSETP.GT.AND P1, PT, |R3|, 152, PT ; /* 0x431800000300780b */ /* 0x000fe20003f24200 */ /*2320*/ FMUL R3, R2, 1.3500000238418579102 ; /* 0x3faccccd02037820 */ /* 0x002fe20000400000 */ /*2330*/ FFMA R24, R21, R24, 0.24022644758224487305 ; /* 0x3e75fdec15187423 */ /* 0x000fe20000000018 */ /*2340*/ FMUL R11, R11, R22 ; /* 0x000000160b0b7220 */ /* 0x000fe20000400000 */ /*2350*/ MOV R2, 0x3fd5c28f ; /* 0x3fd5c28f00027802 */ /* 0x000fc40000000f00 */ /*2360*/ FFMA R24, R21, R24, 0.69314718246459960938 ; /* 0x3f31721815187423 */ /* 0x000fe20000000018 */ /*2370*/ FMUL R8, R11, R20 ; /* 0x000000140b087220 */ /* 0x000fe20000400000 */ /*2380*/ @P0 FSEL R8, RZ, +INF , !P2 ; /* 0x7f800000ff080808 */ /* 0x000fe40005000000 */ /*2390*/ FSETP.NEU.AND P0, PT, R0, 1, PT ; /* 0x3f8000000000780b */ /* 0x000fe20003f0d000 */ /*23a0*/ FFMA R24, R21, R24, 1 ; /* 0x3f80000015187423 */ /* 0x000fe20000000018 */ /*23b0*/ IADD3 R11, R16, 0x7f000000, RZ ; /* 0x7f000000100b7810 */ /* 0x000fe20007ffe0ff */ /*23c0*/ FFMA R8, R8, R3, -0.028999999165534973145 ; /* 0xbced916808087423 */ /* 0x000fe20000000003 */ /*23d0*/ LEA R16, R23, -R16, 0x17 ; /* 0x8000001017107211 */ /* 0x004fe200078eb8ff */ /*23e0*/ FFMA R21, R19, R2, -0.39199998974800109863 ; /* 0xbec8b43913157423 */ /* 0x000fe40000000002 */ /*23f0*/ FMUL R11, R24, R11 ; /* 0x0000000b180b7220 */ /* 0x000fc80000400000 */ /*2400*/ FMUL R11, R11, R16 ; /* 0x000000100b0b7220 */ /* 0x000fe20000400000 */ /*2410*/ @P1 FSEL R11, RZ, +INF , !P3 ; /* 0x7f800000ff0b1808 */ /* 0x000fe20005800000 */ /*2420*/ @!P0 BRA 0x2510 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*2430*/ FSETP.GTU.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fda0003f0c200 */ /*2440*/ @P0 BRA 0x2500 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*2450*/ FSETP.NEU.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fc80003f0d200 */ /*2460*/ FSETP.EQ.OR P0, PT, RZ, c[0x0][0x1a4], !P0 ; /* 0x00006900ff007a0b */ /* 0x000fda0004702400 */ /*2470*/ @P0 BRA 0x24d0 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*2480*/ FSETP.LEU.AND P0, PT, RZ, c[0x0][0x1a4], PT ; /* 0x00006900ff007a0b */ /* 0x000fe40003f0b000 */ /*2490*/ MOV R9, R11 ; /* 0x0000000b00097202 */ /* 0x000fd60000000f00 */ /*24a0*/ @P0 BRA 0x2510 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*24b0*/ MOV R9, R11 ; /* 0x0000000b00097202 */ /* 0x000fe20000000f00 */ /*24c0*/ BRA 0x2510 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*24d0*/ FADD R0, R0, c[0x0][0x1a4] ; /* 0x0000690000007621 */ /* 0x000fca0000000000 */ /*24e0*/ LOP3.LUT R9, R0, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff00097812 */ /* 0x000fe200078ec0ff */ /*24f0*/ BRA 0x2510 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*2500*/ FADD R9, R0, 2 ; /* 0x4000000000097421 */ /* 0x000fc80000000000 */ /*2510*/ FMUL R0, R9, c[0x0][0x1ac] ; /* 0x00006b0009007a20 */ /* 0x000fe20000400000 */ /*2520*/ MOV R11, 0x3da5294b ; /* 0x3da5294b000b7802 */ /* 0x000fe40000000f00 */ /*2530*/ MOV R2, 0x41466666 ; /* 0x4146666600027802 */ /* 0x000fe20000000f00 */ /*2540*/ FCHK P0, R0, 12.399999618530273438 ; /* 0x4146666600007902 */ /* 0x000e280000000000 */ /*2550*/ FFMA R2, R11, -R2, 1 ; /* 0x3f8000000b027423 */ /* 0x000fc80000000802 */ /*2560*/ FFMA R11, R2, R11, 0.080645166337490081787 ; /* 0x3da5294b020b7423 */ /* 0x000fc8000000000b */ /*2570*/ FFMA R2, R0, R11, RZ ; /* 0x0000000b00027223 */ /* 0x000fc800000000ff */ /*2580*/ FFMA R3, R2, -12.399999618530273438, R0 ; /* 0xc146666602037823 */ /* 0x000fc80000000000 */ /*2590*/ FFMA R11, R11, R3, R2 ; /* 0x000000030b0b7223 */ /* 0x000fe20000000002 */ /*25a0*/ @!P0 BRA 0x25f0 ; /* 0x0000004000008947 */ /* 0x001fea0003800000 */ /*25b0*/ MOV R3, 0x41466666 ; /* 0x4146666600037802 */ /* 0x000fe40000000f00 */ /*25c0*/ MOV R2, 0x25e0 ; /* 0x000025e000027802 */ /* 0x000fe40000000f00 */ /*25d0*/ CALL.REL.NOINC 0x8050 ; /* 0x00005a7000007944 */ /* 0x000fea0003c00000 */ /*25e0*/ MOV R11, R0 ; /* 0x00000000000b7202 */ /* 0x001fe40000000f00 */ /*25f0*/ MOV R0, 0x4b000000 ; /* 0x4b00000000007802 */ /* 0x000fe40000000f00 */ /*2600*/ MOV R23, 0x3de38e37 ; /* 0x3de38e3700177802 */ /* 0x000fe40000000f00 */ /*2610*/ MOV R14, 0x3a2c32e4 ; /* 0x3a2c32e4000e7802 */ /* 0x000fe20000000f00 */ /*2620*/ FFMA R2, -R0, 1.1920928955078125e-07, RZ ; /* 0x3400000000027823 */ /* 0x000fe200000001ff */ /*2630*/ MOV R9, 0x3eaaaaaa ; /* 0x3eaaaaaa00097802 */ /* 0x000fe40000000f00 */ /*2640*/ MOV R13, 0x3ecccccc ; /* 0x3ecccccc000d7802 */ /* 0x000fe20000000f00 */ /*2650*/ FFMA R0, R14, R23, 0.0032181653659790754318 ; /* 0x3b52e7db0e007423 */ /* 0x000fc40000000017 */ /*2660*/ FFMA R3, R9, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b09037823 */ /* 0x000fe40000000002 */ /*2670*/ FFMA R13, R13, -R9, 0.13333332538604736328 ; /* 0x3e0888880d0d7423 */ /* 0x000fe20000000809 */ /*2680*/ FFMA R0, R0, R23.reuse, 0.018033718690276145935 ; /* 0x3c93bb7300007423 */ /* 0x080fe20000000017 */ /*2690*/ FADD R2, R2, -R3 ; /* 0x8000000302027221 */ /* 0x000fe40000000000 */ /*26a0*/ FMUL R13, R13, 0.4166666567325592041 ; /* 0x3ed555550d0d7820 */ /* 0x000fe20000400000 */ /*26b0*/ FFMA R0, R0, R23, 0.12022458761930465698 ; /* 0x3df6384f00007423 */ /* 0x000fe20000000017 */ /*26c0*/ FFMA R2, R9, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b09027823 */ /* 0x000fe20000000002 */ /*26d0*/ MOV R23, 0x391fcb8e ; /* 0x391fcb8e00177802 */ /* 0x000fe40000000f00 */ /*26e0*/ FMUL R14, R0, 0.11111109703779220581 ; /* 0x3de38e37000e7820 */ /* 0x000fe20000400000 */ /*26f0*/ FFMA R2, R13, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b0d027823 */ /* 0x000fc60000000002 */ /*2700*/ FMUL R16, R14, 3 ; /* 0x404000000e107820 */ /* 0x000fe20000400000 */ /*2710*/ FFMA R9, R9, 1.9251366722983220825e-08, R2 ; /* 0x32a55e3409097823 */ /* 0x000fc80000000002 */ /*2720*/ FFMA R9, R13, R16, R9 ; /* 0x000000100d097223 */ /* 0x000fc80000000009 */ /*2730*/ FFMA R0, R14, 0.3333333134651184082, R9 ; /* 0x3eaaaaaa0e007823 */ /* 0x000fc80000000009 */ /*2740*/ FADD R2, R3, R0 ; /* 0x0000000003027221 */ /* 0x000fc80000000000 */ /*2750*/ FMUL R9, R2, 0.31000000238418579102 ; /* 0x3e9eb85202097820 */ /* 0x000fe20000400000 */ /*2760*/ FADD R3, -R3, R2 ; /* 0x0000000203037221 */ /* 0x000fc60000000100 */ /*2770*/ FRND R20, R9 ; /* 0x0000000900147307 */ /* 0x000e220000201000 */ /*2780*/ FADD R3, R0, -R3 ; /* 0x8000000300037221 */ /* 0x000fe20000000000 */ /*2790*/ FFMA R2, R2, 0.31000000238418579102, -R9 ; /* 0x3e9eb85202027823 */ /* 0x000fe20000000809 */ /*27a0*/ FSETP.GEU.AND P1, PT, R9, RZ, PT ; /* 0x000000ff0900720b */ /* 0x000fc60003f2e000 */ /*27b0*/ FFMA R2, R3, 0.31000000238418579102, R2 ; /* 0x3e9eb85203027823 */ /* 0x000fe40000000002 */ /*27c0*/ F2I.NTZ R0, R9 ; /* 0x0000000900007305 */ /* 0x000e620000203100 */ /*27d0*/ FADD R3, R9, -R20 ; /* 0x8000001409037221 */ /* 0x001fe20000000000 */ /*27e0*/ FSETP.GT.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720b */ /* 0x000fc60003f04000 */ /*27f0*/ FADD R2, R2, R3 ; /* 0x0000000302027221 */ /* 0x000fc80000000000 */ /*2800*/ FFMA R3, R2.reuse, R23, 0.0013391353422775864601 ; /* 0x3aaf85ed02037423 */ /* 0x040fe20000000017 */ /*2810*/ SEL R23, RZ, 0x83000000, P0 ; /* 0x83000000ff177807 */ /* 0x000fe40000000000 */ /*2820*/ FSETP.GT.AND P0, PT, |R9|, 152, PT ; /* 0x431800000900780b */ /* 0x000fe20003f04200 */ /*2830*/ FFMA R3, R2, R3, 0.0096188392490148544312 ; /* 0x3c1d985602037423 */ /* 0x000fe20000000003 */ /*2840*/ IADD3 R20, R23, 0x7f000000, RZ ; /* 0x7f00000017147810 */ /* 0x000fe40007ffe0ff */ /*2850*/ LEA R0, R0, -R23, 0x17 ; /* 0x8000001700007211 */ /* 0x002fe200078eb8ff */ /*2860*/ FFMA R3, R2, R3, 0.055503588169813156128 ; /* 0x3d6357bb02037423 */ /* 0x000fc80000000003 */ /*2870*/ FFMA R3, R2, R3, 0.24022644758224487305 ; /* 0x3e75fdec02037423 */ /* 0x000fc80000000003 */ /*2880*/ FFMA R3, R2, R3, 0.69314718246459960938 ; /* 0x3f31721802037423 */ /* 0x000fc80000000003 */ /*2890*/ FFMA R3, R2, R3, 1 ; /* 0x3f80000002037423 */ /* 0x000fe20000000003 */ /*28a0*/ FADD R2, R15, 1 ; /* 0x3f8000000f027421 */ /* 0x000fc60000000000 */ /*28b0*/ FMUL R3, R3, R20 ; /* 0x0000001403037220 */ /* 0x000fe20000400000 */ /*28c0*/ FMUL R20, R2, c[0x0][0x1ac] ; /* 0x00006b0002147a20 */ /* 0x000fc60000400000 */ /*28d0*/ FMUL R0, R3, R0 ; /* 0x0000000003007220 */ /* 0x000fe20000400000 */ /*28e0*/ @P0 FSEL R0, RZ, +INF , !P1 ; /* 0x7f800000ff000808 */ /* 0x000fe40004800000 */ /*28f0*/ IADD3 R2, R20, 0x1800000, RZ ; /* 0x0180000014027810 */ /* 0x000fe40007ffe0ff */ /*2900*/ MOV R3, 0x3f12f1aa ; /* 0x3f12f1aa00037802 */ /* 0x000fe40000000f00 */ /*2910*/ LOP3.LUT R2, R2, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000002027812 */ /* 0x000fc600078ec0ff */ /*2920*/ FFMA R3, R0, R3, 0.4629999995231628418 ; /* 0x3eed0e5600037423 */ /* 0x000fe20000000003 */ /*2930*/ ISETP.GT.U32.AND P0, PT, R2, 0x1ffffff, PT ; /* 0x01ffffff0200780c */ /* 0x000fc60003f04070 */ /*2940*/ FADD R0, R3, R12 ; /* 0x0000000c03007221 */ /* 0x000fc80000000000 */ /*2950*/ FMUL R11, R0, R11 ; /* 0x0000000b000b7220 */ /* 0x000fcc0000400000 */ /*2960*/ @P0 BRA 0x29c0 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*2970*/ MOV R0, R20 ; /* 0x0000001400007202 */ /* 0x000fe40000000f00 */ /*2980*/ MOV R2, 0x29a0 ; /* 0x000029a000027802 */ /* 0x000fe40000000f00 */ /*2990*/ CALL.REL.NOINC 0x7b90 ; /* 0x000051f000007944 */ /* 0x000fea0003c00000 */ /*29a0*/ MOV R9, R0 ; /* 0x0000000000097202 */ /* 0x000fe20000000f00 */ /*29b0*/ BRA 0x2a00 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*29c0*/ MUFU.RCP R9, R20 ; /* 0x0000001400097308 */ /* 0x000e240000001000 */ /*29d0*/ FFMA R0, R20, R9, -1 ; /* 0xbf80000014007423 */ /* 0x001fc80000000009 */ /*29e0*/ FADD.FTZ R0, -R0, -RZ ; /* 0x800000ff00007221 */ /* 0x000fc80000010100 */ /*29f0*/ FFMA R9, R9, R0, R9 ; /* 0x0000000009097223 */ /* 0x000fe20000000009 */ /*2a00*/ MUFU.RCP R3, R10 ; /* 0x0000000a00037308 */ /* 0x000e220000001000 */ /*2a10*/ FADD R0, -R12, 1.0219999551773071289 ; /* 0x3f82d0e50c007421 */ /* 0x000fc80000000100 */ /*2a20*/ FMUL R0, R0, 0.87880003452301025391 ; /* 0x3f60f90a00007820 */ /* 0x000fc80000400000 */ /*2a30*/ FCHK P0, R0, R10 ; /* 0x0000000a00007302 */ /* 0x000e620000000000 */ /*2a40*/ FFMA R2, -R10, R3, 1 ; /* 0x3f8000000a027423 */ /* 0x001fc80000000103 */ /*2a50*/ FFMA R3, R3, R2, R3 ; /* 0x0000000203037223 */ /* 0x000fc80000000003 */ /*2a60*/ FFMA R2, R0, R3, RZ ; /* 0x0000000300027223 */ /* 0x000fc800000000ff */ /*2a70*/ FFMA R20, -R10, R2, R0 ; /* 0x000000020a147223 */ /* 0x000fc80000000100 */ /*2a80*/ FFMA R2, R3, R20, R2 ; /* 0x0000001403027223 */ /* 0x000fe20000000002 */ /*2a90*/ @!P0 BRA 0x2ae0 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*2aa0*/ MOV R3, R10 ; /* 0x0000000a00037202 */ /* 0x000fe40000000f00 */ /*2ab0*/ MOV R2, 0x2ad0 ; /* 0x00002ad000027802 */ /* 0x000fe40000000f00 */ /*2ac0*/ CALL.REL.NOINC 0x8050 ; /* 0x0000558000007944 */ /* 0x000fea0003c00000 */ /*2ad0*/ MOV R2, R0 ; /* 0x0000000000027202 */ /* 0x001fca0000000f00 */ /*2ae0*/ FADD R2, R2, 1 ; /* 0x3f80000002027421 */ /* 0x000fc80000000000 */ /*2af0*/ FMUL R23, R2, c[0x0][0x1ac] ; /* 0x00006b0002177a20 */ /* 0x000fca0000400000 */ /*2b00*/ IADD3 R0, R23, 0x1800000, RZ ; /* 0x0180000017007810 */ /* 0x000fc80007ffe0ff */ /*2b10*/ LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000000007812 */ /* 0x000fc800078ec0ff */ /*2b20*/ ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ; /* 0x01ffffff0000780c */ /* 0x000fda0003f04070 */ /*2b30*/ @P0 BRA 0x2b90 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*2b40*/ MOV R0, R23 ; /* 0x0000001700007202 */ /* 0x000fe40000000f00 */ /*2b50*/ MOV R2, 0x2b70 ; /* 0x00002b7000027802 */ /* 0x000fe40000000f00 */ /*2b60*/ CALL.REL.NOINC 0x7b90 ; /* 0x0000502000007944 */ /* 0x000fea0003c00000 */ /*2b70*/ MOV R10, R0 ; /* 0x00000000000a7202 */ /* 0x000fe20000000f00 */ /*2b80*/ BRA 0x2bd0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*2b90*/ MUFU.RCP R10, R23 ; /* 0x00000017000a7308 */ /* 0x000e240000001000 */ /*2ba0*/ FFMA R0, R23, R10, -1 ; /* 0xbf80000017007423 */ /* 0x001fc8000000000a */ /*2bb0*/ FADD.FTZ R3, -R0, -RZ ; /* 0x800000ff00037221 */ /* 0x000fc80000010100 */ /*2bc0*/ FFMA R10, R10, R3, R10 ; /* 0x000000030a0a7223 */ /* 0x000fe2000000000a */ /*2bd0*/ MUFU.RCP R0, c[0x0][0x1a8] ; /* 0x00006a0000007b08 */ /* 0x000e220000001000 */ /*2be0*/ MOV R3, c[0x0][0x1a0] ; /* 0x0000680000037a02 */ /* 0x000fe40000000f00 */ /*2bf0*/ MOV R23, c[0x0][0x1a8] ; /* 0x00006a0000177a02 */ /* 0x000fe40000000f00 */ /*2c00*/ MOV R25, 0x3fe28f5c ; /* 0x3fe28f5c00197802 */ /* 0x000fe20000000f00 */ /*2c10*/ FADD R3, R3, c[0x0][0x1a0] ; /* 0x0000680003037621 */ /* 0x000fc80000000000 */ /*2c20*/ FCHK P0, R3, c[0x0][0x1a8] ; /* 0x00006a0003007b02 */ /* 0x000e620000000000 */ /*2c30*/ FFMA R12, R12, -R25, 0.35699999332427978516 ; /* 0x3eb6c8b40c0c7423 */ /* 0x000fe20000000819 */ /*2c40*/ FFMA R23, R0, -R23, 1 ; /* 0x3f80000000177423 */ /* 0x001fc80000000817 */ /*2c50*/ FFMA R0, R0, R23, R0 ; /* 0x0000001700007223 */ /* 0x000fc80000000000 */ /*2c60*/ FFMA R2, R0, R3, RZ ; /* 0x0000000300027223 */ /* 0x000fc800000000ff */ /*2c70*/ FFMA R23, R2, -c[0x0][0x1a8], R3 ; /* 0x80006a0002177a23 */ /* 0x000fc80000000003 */ /*2c80*/ FFMA R0, R0, R23, R2 ; /* 0x0000001700007223 */ /* 0x000fe20000000002 */ /*2c90*/ @!P0 BRA 0x2ce0 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*2ca0*/ MOV R0, R3 ; /* 0x0000000300007202 */ /* 0x000fe40000000f00 */ /*2cb0*/ MOV R3, c[0x0][0x1a8] ; /* 0x00006a0000037a02 */ /* 0x000fe40000000f00 */ /*2cc0*/ MOV R2, 0x2ce0 ; /* 0x00002ce000027802 */ /* 0x000fe40000000f00 */ /*2cd0*/ CALL.REL.NOINC 0x8050 ; /* 0x0000537000007944 */ /* 0x000fea0003c00000 */ /*2ce0*/ MOV R2, c[0x0][0x1c4] ; /* 0x0000710000027a02 */ /* 0x000fe20000000f00 */ /*2cf0*/ FMUL R3, R0, 3.1366999149322509766 ; /* 0x4048bfb100037820 */ /* 0x001fc60000400000 */ /*2d00*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */ /* 0x000fe20003f06270 */ /*2d10*/ FFMA R12, R12, R3, 1 ; /* 0x3f8000000c0c7423 */ /* 0x000fc80000000003 */ /*2d20*/ FMUL R23, R11, R12 ; /* 0x0000000c0b177220 */ /* 0x000fd00000400000 */ /*2d30*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*2d40*/ IADD3 R0, R23, 0x1800000, RZ ; /* 0x0180000017007810 */ /* 0x000fe20007ffe0ff */ /*2d50*/ FMUL R15, R15, -2 ; /* 0xc00000000f0f7820 */ /* 0x000fc60000400000 */ /*2d60*/ LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000000007812 */ /* 0x000fc800078ec0ff */ /*2d70*/ ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ; /* 0x01ffffff0000780c */ /* 0x000fe20003f04070 */ /*2d80*/ FMUL R0, R15, 0.69999998807907104492 ; /* 0x3f3333330f007820 */ /* 0x000fc80000400000 */ /*2d90*/ FMUL R11, R0, R17 ; /* 0x00000011000b7220 */ /* 0x000fd00000400000 */ /*2da0*/ @P0 BRA 0x2e00 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*2db0*/ MOV R0, R23 ; /* 0x0000001700007202 */ /* 0x000fe40000000f00 */ /*2dc0*/ MOV R2, 0x2de0 ; /* 0x00002de000027802 */ /* 0x000fe40000000f00 */ /*2dd0*/ CALL.REL.NOINC 0x7b90 ; /* 0x00004db000007944 */ /* 0x000fea0003c00000 */ /*2de0*/ MOV R12, R0 ; /* 0x00000000000c7202 */ /* 0x000fe20000000f00 */ /*2df0*/ BRA 0x2e40 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*2e00*/ MUFU.RCP R12, R23 ; /* 0x00000017000c7308 */ /* 0x000e240000001000 */ /*2e10*/ FFMA R0, R23, R12, -1 ; /* 0xbf80000017007423 */ /* 0x001fc8000000000c */ /*2e20*/ FADD.FTZ R3, -R0, -RZ ; /* 0x800000ff00037221 */ /* 0x000fc80000010100 */ /*2e30*/ FFMA R12, R12, R3, R12 ; /* 0x000000030c0c7223 */ /* 0x000fe2000000000c */ /*2e40*/ MOV R15, 0x3fb8aa3b ; /* 0x3fb8aa3b000f7802 */ /* 0x000fe20000000f00 */ /*2e50*/ UMOV UR4, 0x400ccccd ; /* 0x400ccccd00047882 */ /* 0x000fe20000000000 */ /*2e60*/ MOV R0, 0x4c400000 ; /* 0x4c40000000007802 */ /* 0x000fe40000000f00 */ /*2e70*/ MOV R23, 0x3e7b823f ; /* 0x3e7b823f00177802 */ /* 0x000fe20000000f00 */ /*2e80*/ FFMA R3, R15, 0.3333333134651184082, R18 ; /* 0x3eaaaaaa0f037823 */ /* 0x000fe20000000012 */ /*2e90*/ MOV R27, 0x3eaaaaaa ; /* 0x3eaaaaaa001b7802 */ /* 0x000fe20000000f00 */ /*2ea0*/ FFMA R17, R0, 1.1920928955078125e-07, RZ ; /* 0x3400000000117823 */ /* 0x000fe200000000ff */ /*2eb0*/ MOV R25, 0x3d7718aa ; /* 0x3d7718aa00197802 */ /* 0x000fe20000000f00 */ /*2ec0*/ FADD R2, R18, -R3 ; /* 0x8000000312027221 */ /* 0x000fe20000000000 */ /*2ed0*/ MOV R28, 0x3a2c32e4 ; /* 0x3a2c32e4001c7802 */ /* 0x000fe20000000f00 */ /*2ee0*/ FFMA R0, -R23, 1.4426950216293334961, R17 ; /* 0x3fb8aa3b17007823 */ /* 0x000fe20000000111 */ /*2ef0*/ MOV R26, 0x3d515e49 ; /* 0x3d515e49001a7802 */ /* 0x000fe20000000f00 */ /*2f00*/ FFMA R2, R15, 0.3333333134651184082, R2 ; /* 0x3eaaaaaa0f027823 */ /* 0x000fe20000000002 */ /*2f10*/ MOV R15, 0x3e600000 ; /* 0x3e600000000f7802 */ /* 0x000fe20000000f00 */ /*2f20*/ FADD R20, R17, -R0 ; /* 0x8000000011147221 */ /* 0x000fc40000000000 */ /*2f30*/ FFMA R2, R13, 1.4426950216293334961, R2 ; /* 0x3fb8aa3b0d027823 */ /* 0x000fe40000000002 */ /*2f40*/ FFMA R15, -R15, R23, 0.053728073835372924805 ; /* 0x3d5c11f80f0f7423 */ /* 0x000fe20000000117 */ /*2f50*/ FFMA R20, -R23, 1.4426950216293334961, R20 ; /* 0x3fb8aa3b17147823 */ /* 0x000fe20000000114 */ /*2f60*/ FFMA R22, R27, 1.9251366722983220825e-08, R2 ; /* 0x32a55e341b167823 */ /* 0x000fe20000000002 */ /*2f70*/ FFMA R2, R28, R25.reuse, 0.0032181653659790754318 ; /* 0x3b52e7db1c027423 */ /* 0x080fe20000000019 */ /*2f80*/ FMUL R15, R15, 0.56140351295471191406 ; /* 0x3f0fb8240f0f7820 */ /* 0x000fe20000400000 */ /*2f90*/ MOV R27, 0x3e500000 ; /* 0x3e500000001b7802 */ /* 0x000fe20000000f00 */ /*2fa0*/ FFMA R13, R13, R16, R22 ; /* 0x000000100d0d7223 */ /* 0x000fe20000000016 */ /*2fb0*/ FFMA R2, R2, R25.reuse, 0.018033718690276145935 ; /* 0x3c93bb7302027423 */ /* 0x080fe20000000019 */ /*2fc0*/ FFMA R20, R15, 1.4426950216293334961, R20 ; /* 0x3fb8aa3b0f147823 */ /* 0x000fe20000000014 */ /*2fd0*/ MOV R16, 0x3e678356 ; /* 0x3e67835600107802 */ /* 0x000fe20000000f00 */ /*2fe0*/ FFMA R24, R14, 0.3333333134651184082, R13 ; /* 0x3eaaaaaa0e187823 */ /* 0x000fe2000000000d */ /*2ff0*/ FFMA R2, R2, R25, 0.12022458761930465698 ; /* 0x3df6384f02027423 */ /* 0x000fe20000000019 */ /*3000*/ FFMA R20, -R23, 1.9251366722983220825e-08, R20 ; /* 0x32a55e3417147823 */ /* 0x000fe20000000114 */ /*3010*/ FFMA R23, R28, R26, 0.0032181653659790754318 ; /* 0x3b52e7db1c177423 */ /* 0x000fe2000000001a */ /*3020*/ FFMA R13, -R16, 1.4426950216293334961, R17 ; /* 0x3fb8aa3b100d7823 */ /* 0x000fe20000000111 */ /*3030*/ FMUL R14, R2, 0.060326255857944488525 ; /* 0x3d7718aa020e7820 */ /* 0x000fe20000400000 */ /*3040*/ FFMA R22, -R27, R16, 0.045923888683319091797 ; /* 0x3d3c1ab01b167423 */ /* 0x000fe20000000110 */ /*3050*/ FFMA R23, R23, R26.reuse, 0.018033718690276145935 ; /* 0x3c93bb7317177423 */ /* 0x080fe2000000001a */ /*3060*/ FADD R25, R17, -R13 ; /* 0x8000000d11197221 */ /* 0x000fe20000000000 */ /*3070*/ FADD R27, R3, R24 ; /* 0x00000018031b7221 */ /* 0x000fe20000000000 */ /*3080*/ FMUL R17, R14, 3 ; /* 0x404000000e117820 */ /* 0x000fe20000400000 */ /*3090*/ FMUL R22, R22, 0.5565217137336730957 ; /* 0x3f0e783516167820 */ /* 0x000fe20000400000 */ /*30a0*/ FFMA R25, -R16, 1.4426950216293334961, R25 ; /* 0x3fb8aa3b10197823 */ /* 0x000fe20000000119 */ /*30b0*/ FFMA R23, R23, R26, 0.12022458761930465698 ; /* 0x3df6384f17177423 */ /* 0x000fe2000000001a */ /*30c0*/ FMUL R2, R27, 0.6666666865348815918 ; /* 0x3f2aaaab1b027820 */ /* 0x000fe20000400000 */ /*30d0*/ FFMA R17, R15, R17, R20 ; /* 0x000000110f117223 */ /* 0x000fe20000000014 */ /*30e0*/ FFMA R25, R22, 1.4426950216293334961, R25 ; /* 0x3fb8aa3b16197823 */ /* 0x000fe20000000019 */ /*30f0*/ FMUL R23, R23, 0.05111530795693397522 ; /* 0x3d515e4917177820 */ /* 0x000fe20000400000 */ /*3100*/ FRND R15, R2 ; /* 0x00000002000f7307 */ /* 0x000e220000201000 */ /*3110*/ FFMA R17, R14, -0.2456140369176864624, R17 ; /* 0xbe7b823f0e117823 */ /* 0x000fe20000000011 */ /*3120*/ FFMA R25, -R16, 1.9251366722983220825e-08, R25 ; /* 0x32a55e3410197823 */ /* 0x000fe20000000119 */ /*3130*/ FMUL R14, R23, 3 ; /* 0x40400000170e7820 */ /* 0x000fe20000400000 */ /*3140*/ FADD R3, -R3, R27 ; /* 0x0000001b03037221 */ /* 0x000fe20000000100 */ /*3150*/ FADD R20, R0, R17 ; /* 0x0000001100147221 */ /* 0x000fe20000000000 */ /*3160*/ FFMA R27, R27, 0.6666666865348815918, -R2 ; /* 0x3f2aaaab1b1b7823 */ /* 0x000fe20000000802 */ /*3170*/ FFMA R22, R22, R14, R25 ; /* 0x0000000e16167223 */ /* 0x000fe20000000019 */ /*3180*/ FADD R24, R24, -R3 ; /* 0x8000000318187221 */ /* 0x000fe20000000000 */ /*3190*/ FADD R0, -R0, R20 ; /* 0x0000001400007221 */ /* 0x000fe20000000100 */ /*31a0*/ FMUL R3, R20, -0.60000002384185791016 ; /* 0xbf19999a14037820 */ /* 0x000fe20000400000 */ /*31b0*/ FFMA R22, R23, -0.2260869443416595459, R22 ; /* 0xbe67835617167823 */ /* 0x000fe20000000016 */ /*31c0*/ FFMA R24, R24, 0.6666666865348815918, R27 ; /* 0x3f2aaaab18187823 */ /* 0x000fe2000000001b */ /*31d0*/ FADD R17, R17, -R0 ; /* 0x8000000011117221 */ /* 0x000fe20000000000 */ /*31e0*/ MOV R16, 0x391fcb8e ; /* 0x391fcb8e00107802 */ /* 0x000fe20000000f00 */ /*31f0*/ FADD R23, R13.reuse, R22 ; /* 0x000000160d177221 */ /* 0x040fe20000000000 */ /*3200*/ FADD R25, R2, -R15 ; /* 0x8000000f02197221 */ /* 0x001fe20000000000 */ /*3210*/ FRND R14, R3 ; /* 0x00000003000e7307 */ /* 0x000e220000201000 */ /*3220*/ FFMA R20, R20, -0.60000002384185791016, -R3 ; /* 0xbf19999a14147823 */ /* 0x000fe20000000803 */ /*3230*/ FADD R13, -R13, R23 ; /* 0x000000170d0d7221 */ /* 0x000fe20000000100 */ /*3240*/ FMUL R0, R23, 0.50800001621246337891 ; /* 0x3f020c4a17007820 */ /* 0x000fe20000400000 */ /*3250*/ FADD R25, R24, R25 ; /* 0x0000001918197221 */ /* 0x000fe20000000000 */ /*3260*/ FSETP.GT.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720b */ /* 0x000fe20003f04000 */ /*3270*/ FADD R22, R22, -R13 ; /* 0x8000000d16167221 */ /* 0x000fe20000000000 */ /*3280*/ FFMA R23, R23, 0.50800001621246337891, -R0 ; /* 0x3f020c4a17177823 */ /* 0x000fe20000000800 */ /*3290*/ FRND R13, R0 ; /* 0x00000000000d7307 */ /* 0x000e620000201000 */ /*32a0*/ FFMA R24, R25, R16, 0.0013391353422775864601 ; /* 0x3aaf85ed19187423 */ /* 0x000fe20000000010 */ /*32b0*/ FFMA R17, R17, -0.60000002384185791016, R20 ; /* 0xbf19999a11117823 */ /* 0x000fe20000000014 */ /*32c0*/ FFMA R22, R22, 0.50800001621246337891, R23 ; /* 0x3f020c4a16167823 */ /* 0x000fe20000000017 */ /*32d0*/ SEL R15, RZ, 0x83000000, P0 ; /* 0x83000000ff0f7807 */ /* 0x000fe20000000000 */ /*32e0*/ FFMA R24, R25, R24, 0.0096188392490148544312 ; /* 0x3c1d985619187423 */ /* 0x000fe20000000018 */ /*32f0*/ FSETP.GT.AND P2, PT, |R2|, 152, PT ; /* 0x431800000200780b */ /* 0x000fc40003f44200 */ /*3300*/ F2I.NTZ R26, R2 ; /* 0x00000002001a7305 */ /* 0x000ea20000203100 */ /*3310*/ FFMA R24, R25, R24, 0.055503588169813156128 ; /* 0x3d6357bb19187423 */ /* 0x000fe20000000018 */ /*3320*/ FADD R20, R3, -R14 ; /* 0x8000000e03147221 */ /* 0x001fe20000000000 */ /*3330*/ IADD3 R27, R15, 0x7f000000, RZ ; /* 0x7f0000000f1b7810 */ /* 0x000fe40007ffe0ff */ /*3340*/ FFMA R24, R25, R24, 0.24022644758224487305 ; /* 0x3e75fdec19187423 */ /* 0x000fe20000000018 */ /*3350*/ FADD R17, R17, R20 ; /* 0x0000001411117221 */ /* 0x000fe20000000000 */ /*3360*/ FSETP.GEU.AND P3, PT, R2, RZ, PT ; /* 0x000000ff0200720b */ /* 0x000fe20003f6e000 */ /*3370*/ FADD R23, R0, -R13 ; /* 0x8000000d00177221 */ /* 0x002fe20000000000 */ /*3380*/ FFMA R24, R25, R24, 0.69314718246459960938 ; /* 0x3f31721819187423 */ /* 0x000fe20000000018 */ /*3390*/ FFMA R20, R17, R16, 0.0013391353422775864601 ; /* 0x3aaf85ed11147423 */ /* 0x000fe20000000010 */ /*33a0*/ FSETP.GT.AND P4, PT, R14, RZ, PT ; /* 0x000000ff0e00720b */ /* 0x000fe20003f84000 */ /*33b0*/ FADD R23, R22, R23 ; /* 0x0000001716177221 */ /* 0x000fe20000000000 */ /*33c0*/ FFMA R24, R25, R24, 1 ; /* 0x3f80000019187423 */ /* 0x000fe20000000018 */ /*33d0*/ FFMA R20, R17, R20, 0.0096188392490148544312 ; /* 0x3c1d985611147423 */ /* 0x000fe20000000014 */ /*33e0*/ F2I.NTZ R22, R0 ; /* 0x0000000000167305 */ /* 0x0001e20000203100 */ /*33f0*/ LEA R29, R26, -R15, 0x17 ; /* 0x8000000f1a1d7211 */ /* 0x004fe200078eb8ff */ /*3400*/ FFMA R16, R23, R16, 0.0013391353422775864601 ; /* 0x3aaf85ed17107423 */ /* 0x000fe20000000010 */ /*3410*/ FMUL R24, R24, R27 ; /* 0x0000001b18187220 */ /* 0x000fe20000400000 */ /*3420*/ FFMA R20, R17, R20, 0.055503588169813156128 ; /* 0x3d6357bb11147423 */ /* 0x000fe20000000014 */ /*3430*/ FSETP.GT.AND P5, PT, R13, RZ, PT ; /* 0x000000ff0d00720b */ /* 0x000fe20003fa4000 */ /*3440*/ FFMA R16, R23.reuse, R16, 0.0096188392490148544312 ; /* 0x3c1d985617107423 */ /* 0x040fe20000000010 */ /*3450*/ FMUL R2, R24, R29 ; /* 0x0000001d18027220 */ /* 0x000fe20000400000 */ /*3460*/ @P2 FSEL R2, RZ, +INF , !P3 ; /* 0x7f800000ff022808 */ /* 0x000fe20005800000 */ /*3470*/ F2I.NTZ R15, R3 ; /* 0x00000003000f7305 */ /* 0x000e620000203100 */ /*3480*/ FFMA R16, R23, R16, 0.055503588169813156128 ; /* 0x3d6357bb17107423 */ /* 0x000fe20000000010 */ /*3490*/ FFMA R20, R17, R20, 0.24022644758224487305 ; /* 0x3e75fdec11147423 */ /* 0x000fe20000000014 */ /*34a0*/ FSETP.GT.AND P3, PT, |R0|, 152, PT ; /* 0x431800000000780b */ /* 0x000fc40003f64200 */ /*34b0*/ FFMA R16, R23, R16, 0.24022644758224487305 ; /* 0x3e75fdec17107423 */ /* 0x000fe20000000010 */ /*34c0*/ FSETP.GEU.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720b */ /* 0x000fe20003f4e000 */ /*34d0*/ FFMA R20, R17, R20, 0.69314718246459960938 ; /* 0x3f31721811147423 */ /* 0x000fe20000000014 */ /*34e0*/ MUFU.RCP R25, R2 ; /* 0x0000000200197308 */ /* 0x000ea20000001000 */ /*34f0*/ FFMA R16, R23, R16, 0.69314718246459960938 ; /* 0x3f31721817107423 */ /* 0x000fe20000000010 */ /*3500*/ SEL R0, RZ, 0x83000000, P4 ; /* 0x83000000ff007807 */ /* 0x001fe20002000000 */ /*3510*/ FFMA R20, R17, R20, 1 ; /* 0x3f80000011147423 */ /* 0x000fe20000000014 */ /*3520*/ FSETP.GT.AND P0, PT, |R3|, 152, PT ; /* 0x431800000300780b */ /* 0x000fe20003f04200 */ /*3530*/ FFMA R16, R23, R16, 1 ; /* 0x3f80000017107423 */ /* 0x000fe20000000010 */ /*3540*/ MOV R23, UR4 ; /* 0x0000000400177c02 */ /* 0x000fe40008000f00 */ /*3550*/ FSETP.GEU.AND P1, PT, R3, RZ, PT ; /* 0x000000ff0300720b */ /* 0x000fc40003f2e000 */ /*3560*/ LEA R15, R15, -R0, 0x17 ; /* 0x800000000f0f7211 */ /* 0x002fe200078eb8ff */ /*3570*/ FCHK P4, R23, R2 ; /* 0x0000000217007302 */ /* 0x000e220000080000 */ /*3580*/ IADD3 R3, R0, 0x7f000000, RZ ; /* 0x7f00000000037810 */ /* 0x000fe40007ffe0ff */ /*3590*/ SEL R13, RZ, 0x83000000, P5 ; /* 0x83000000ff0d7807 */ /* 0x000fe20002800000 */ /*35a0*/ FFMA R0, -R2, R25, 1 ; /* 0x3f80000002007423 */ /* 0x004fe20000000119 */ /*35b0*/ MOV R14, 0x432a0000 ; /* 0x432a0000000e7802 */ /* 0x000fe20000000f00 */ /*35c0*/ FMUL R20, R20, R3 ; /* 0x0000000314147220 */ /* 0x000fe20000400000 */ /*35d0*/ LEA R22, R22, -R13, 0x17 ; /* 0x8000000d16167211 */ /* 0x000fe200078eb8ff */ /*35e0*/ FFMA R0, R25, R0, R25 ; /* 0x0000000019007223 */ /* 0x000fe20000000019 */ /*35f0*/ IADD3 R13, R13, 0x7f000000, RZ ; /* 0x7f0000000d0d7810 */ /* 0x000fe20007ffe0ff */ /*3600*/ FFMA R3, R19, R14, 1 ; /* 0x3f80000013037423 */ /* 0x000fc4000000000e */ /*3610*/ FFMA R17, R0, 2.2000000476837158203, RZ ; /* 0x400ccccd00117823 */ /* 0x000fe400000000ff */ /*3620*/ FMUL R3, R3, 0.0099999997764825820923 ; /* 0x3c23d70a03037820 */ /* 0x000fe20000400000 */ /*3630*/ FMUL R13, R16, R13 ; /* 0x0000000d100d7220 */ /* 0x000fe20000400000 */ /*3640*/ FMUL R16, R20, R15 ; /* 0x0000000f14107220 */ /* 0x000fe20000400000 */ /*3650*/ FFMA R14, -R2, R17, 2.2000000476837158203 ; /* 0x400ccccd020e7423 */ /* 0x000fe20000000111 */ /*3660*/ @P0 FSEL R16, RZ, +INF , !P1 ; /* 0x7f800000ff100808 */ /* 0x000fe20004800000 */ /*3670*/ FMUL R3, R3, c[0x0][0x1a4] ; /* 0x0000690003037a20 */ /* 0x000fe20000400000 */ /*3680*/ FMUL R13, R13, R22 ; /* 0x000000160d0d7220 */ /* 0x000fe20000400000 */ /*3690*/ FFMA R17, R0, R14, R17 ; /* 0x0000000e00117223 */ /* 0x000fe20000000011 */ /*36a0*/ MOV R14, RZ ; /* 0x000000ff000e7202 */ /* 0x000fe20000000f00 */ /*36b0*/ FMUL R15, R3, c[0x0][0x1a0] ; /* 0x00006800030f7a20 */ /* 0x000fe20000400000 */ /*36c0*/ @P3 FSEL R13, RZ, +INF , !P2 ; /* 0x7f800000ff0d3808 */ /* 0x000fe20005000000 */ /*36d0*/ FMUL R16, R16, 0.43000000715255737305 ; /* 0x3edc28f610107820 */ /* 0x000fe20000400000 */ /*36e0*/ @!P4 BRA 0x3740 ; /* 0x000000500000c947 */ /* 0x001fea0003800000 */ /*36f0*/ MOV R3, R2 ; /* 0x0000000200037202 */ /* 0x000fe40000000f00 */ /*3700*/ MOV R0, 0x400ccccd ; /* 0x400ccccd00007802 */ /* 0x000fc40000000f00 */ /*3710*/ MOV R2, 0x3730 ; /* 0x0000373000027802 */ /* 0x000fe40000000f00 */ /*3720*/ CALL.REL.NOINC 0x8050 ; /* 0x0000492000007944 */ /* 0x000fea0003c00000 */ /*3730*/ MOV R17, R0 ; /* 0x0000000000117202 */ /* 0x001fe40000000f00 */ /*3740*/ MOV R20, 0x4b800000 ; /* 0x4b80000000147802 */ /* 0x000fe20000000f00 */ /*3750*/ UMOV UR4, 0x4180d016 ; /* 0x4180d01600047882 */ /* 0x000fe20000000000 */ /*3760*/ MOV R23, 0x3d78f133 ; /* 0x3d78f13300177802 */ /* 0x000fe20000000f00 */ /*3770*/ FADD R17, R17, 1 ; /* 0x3f80000011117421 */ /* 0x000fe20000000000 */ /*3780*/ MOV R2, 0x3a2c32e4 ; /* 0x3a2c32e400027802 */ /* 0x000fe20000000f00 */ /*3790*/ FFMA R20, R20, 1.1920928955078125e-07, RZ ; /* 0x3400000014147823 */ /* 0x000fe200000000ff */ /*37a0*/ MOV R25, 0x3e7c7249 ; /* 0x3e7c724900197802 */ /* 0x000fe40000000f00 */ /*37b0*/ MOV R0, 0x3e8ff838 ; /* 0x3e8ff83800007802 */ /* 0x000fe20000000f00 */ /*37c0*/ FFMA R2, R2, R23, 0.0032181653659790754318 ; /* 0x3b52e7db02027423 */ /* 0x000fe40000000017 */ /*37d0*/ FFMA R3, R25, 1.4426950216293334961, R20 ; /* 0x3fb8aa3b19037823 */ /* 0x000fc40000000014 */ /*37e0*/ FFMA R2, R2, R23, 0.018033718690276145935 ; /* 0x3c93bb7302027423 */ /* 0x000fe20000000017 */ /*37f0*/ FFMA R0, R0, -R25, 0.069321841001510620117 ; /* 0x3d8df89c00007423 */ /* 0x000fe20000000819 */ /*3800*/ FADD R22, R20, -R3 ; /* 0x8000000314167221 */ /* 0x000fe40000000000 */ /*3810*/ FFMA R2, R2, R23, 0.12022458761930465698 ; /* 0x3df6384f02027423 */ /* 0x000fe20000000017 */ /*3820*/ FMUL R0, R0, 0.43836757540702819824 ; /* 0x3ee071b700007820 */ /* 0x000fe20000400000 */ /*3830*/ FFMA R23, R25, 1.4426950216293334961, R22 ; /* 0x3fb8aa3b19177823 */ /* 0x000fe40000000016 */ /*3840*/ FMUL R2, R2, 0.060776900500059127808 ; /* 0x3d78f13302027820 */ /* 0x000fe40000400000 */ /*3850*/ FFMA R23, R0, 1.4426950216293334961, R23 ; /* 0x3fb8aa3b00177823 */ /* 0x000fc40000000017 */ /*3860*/ FMUL R22, R2, 3 ; /* 0x4040000002167820 */ /* 0x000fe40000400000 */ /*3870*/ FFMA R23, R25, 1.9251366722983220825e-08, R23 ; /* 0x32a55e3419177823 */ /* 0x000fe20000000017 */ /*3880*/ MOV R25, 0x391fcb8e ; /* 0x391fcb8e00197802 */ /* 0x000fc60000000f00 */ /*3890*/ FFMA R23, R0, R22, R23 ; /* 0x0000001600177223 */ /* 0x000fc80000000017 */ /*38a0*/ FFMA R2, R2, 0.24652971327304840088, R23 ; /* 0x3e7c724902027823 */ /* 0x000fc80000000017 */ /*38b0*/ FADD R0, R3, R2 ; /* 0x0000000203007221 */ /* 0x000fc80000000000 */ /*38c0*/ FMUL R23, R0, 2 ; /* 0x4000000000177820 */ /* 0x000fe20000400000 */ /*38d0*/ FADD R3, -R3, R0 ; /* 0x0000000003037221 */ /* 0x000fc60000000100 */ /*38e0*/ FRND R22, R23 ; /* 0x0000001700167307 */ /* 0x000e220000201000 */ /*38f0*/ FADD R3, R2, -R3 ; /* 0x8000000302037221 */ /* 0x000fe20000000000 */ /*3900*/ FFMA R0, R0, 2, -R23 ; /* 0x4000000000007823 */ /* 0x000fe20000000817 */ /*3910*/ FSETP.GEU.AND P1, PT, R23, RZ, PT ; /* 0x000000ff1700720b */ /* 0x000fc60003f2e000 */ /*3920*/ FFMA R0, R3, 2, R0 ; /* 0x4000000003007823 */ /* 0x000fe40000000000 */ /*3930*/ F2I.NTZ R2, R23 ; /* 0x0000001700027305 */ /* 0x000e620000203100 */ /*3940*/ FADD R3, R23, -R22 ; /* 0x8000001617037221 */ /* 0x001fe20000000000 */ /*3950*/ FSETP.GT.AND P0, PT, R22, RZ, PT ; /* 0x000000ff1600720b */ /* 0x000fc60003f04000 */ /*3960*/ FADD R0, R0, R3 ; /* 0x0000000300007221 */ /* 0x000fc80000000000 */ /*3970*/ FFMA R3, R0.reuse, R25, 0.0013391353422775864601 ; /* 0x3aaf85ed00037423 */ /* 0x040fe20000000019 */ /*3980*/ SEL R25, RZ, 0x83000000, P0 ; /* 0x83000000ff197807 */ /* 0x000fe40000000000 */ /*3990*/ FSETP.GT.AND P0, PT, |R23|, 152, PT ; /* 0x431800001700780b */ /* 0x000fe20003f04200 */ /*39a0*/ FFMA R3, R0, R3, 0.0096188392490148544312 ; /* 0x3c1d985600037423 */ /* 0x000fe20000000003 */ /*39b0*/ IADD3 R22, R25, 0x7f000000, RZ ; /* 0x7f00000019167810 */ /* 0x000fe40007ffe0ff */ /*39c0*/ LEA R2, R2, -R25, 0x17 ; /* 0x8000001902027211 */ /* 0x002fe200078eb8ff */ /*39d0*/ FFMA R3, R0, R3, 0.055503588169813156128 ; /* 0x3d6357bb00037423 */ /* 0x000fe20000000003 */ /*39e0*/ MOV R23, UR4 ; /* 0x0000000400177c02 */ /* 0x000fc60008000f00 */ /*39f0*/ FFMA R3, R0, R3, 0.24022644758224487305 ; /* 0x3e75fdec00037423 */ /* 0x000fc80000000003 */ /*3a00*/ FFMA R3, R0, R3, 0.69314718246459960938 ; /* 0x3f31721800037423 */ /* 0x000fc80000000003 */ /*3a10*/ FFMA R3, R0, R3, 1 ; /* 0x3f80000000037423 */ /* 0x000fc80000000003 */ /*3a20*/ FMUL R3, R3, R22 ; /* 0x0000001603037220 */ /* 0x000fc80000400000 */ /*3a30*/ FMUL R22, R3, R2 ; /* 0x0000000203167220 */ /* 0x000fe20000400000 */ /*3a40*/ MOV R3, 0x40176210 ; /* 0x4017621000037802 */ /* 0x000fe40000000f00 */ /*3a50*/ @P0 FSEL R22, RZ, +INF , !P1 ; /* 0x7f800000ff160808 */ /* 0x000fca0004800000 */ /*3a60*/ FFMA R22, R22, R3, 3.9796950817108154297 ; /* 0x407eb35316167423 */ /* 0x000fc80000000003 */ /*3a70*/ MUFU.RCP R3, R22 ; /* 0x0000001600037308 */ /* 0x000e300000001000 */ /*3a80*/ FCHK P0, R23, R22 ; /* 0x0000001617007302 */ /* 0x000e620000000000 */ /*3a90*/ FFMA R0, -R22, R3, 1 ; /* 0x3f80000016007423 */ /* 0x001fc80000000103 */ /*3aa0*/ FFMA R0, R3, R0, R3 ; /* 0x0000000003007223 */ /* 0x000fc80000000003 */ /*3ab0*/ FFMA R3, R0, 16.101604461669921875, RZ ; /* 0x4180d01600037823 */ /* 0x000fc800000000ff */ /*3ac0*/ FFMA R2, -R22, R3, 16.101604461669921875 ; /* 0x4180d01616027423 */ /* 0x000fc80000000103 */ /*3ad0*/ FFMA R2, R0, R2, R3 ; /* 0x0000000200027223 */ /* 0x000fe20000000003 */ /*3ae0*/ @!P0 BRA 0x3b40 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*3af0*/ MOV R0, 0x4180d016 ; /* 0x4180d01600007802 */ /* 0x000fe40000000f00 */ /*3b00*/ MOV R3, R22 ; /* 0x0000001600037202 */ /* 0x000fe40000000f00 */ /*3b10*/ MOV R2, 0x3b30 ; /* 0x00003b3000027802 */ /* 0x000fe40000000f00 */ /*3b20*/ CALL.REL.NOINC 0x8050 ; /* 0x0000452000007944 */ /* 0x000fea0003c00000 */ /*3b30*/ MOV R2, R0 ; /* 0x0000000000027202 */ /* 0x001fe40000000f00 */ /*3b40*/ MOV R25, 0x3da72f06 ; /* 0x3da72f0600197802 */ /* 0x000fe20000000f00 */ /*3b50*/ FADD R21, R21, 0.43000000715255737305 ; /* 0x3edc28f615157421 */ /* 0x000fe20000000000 */ /*3b60*/ MOV R3, 0x3a2c32e4 ; /* 0x3a2c32e400037802 */ /* 0x000fe20000000f00 */ /*3b70*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*3b80*/ MOV R26, 0x3b2c598e ; /* 0x3b2c598e001a7802 */ /* 0x000fe40000000f00 */ /*3b90*/ MOV R33, 0x3fb8aa3b ; /* 0x3fb8aa3b00217802 */ /* 0x000fe20000000f00 */ /*3ba0*/ FFMA R0, R3.reuse, R25.reuse, 0.0032181653659790754318 ; /* 0x3b52e7db03007423 */ /* 0x0c0fe20000000019 */ /*3bb0*/ MOV R27, 0x3d520d23 ; /* 0x3d520d23001b7802 */ /* 0x000fe20000000f00 */ /*3bc0*/ FFMA R3, R3, R26.reuse, 0.0032181653659790754318 ; /* 0x3b52e7db03037423 */ /* 0x080fe2000000001a */ /*3bd0*/ MOV R24, 0x3d4cccd0 ; /* 0x3d4cccd000187802 */ /* 0x000fe20000000f00 */ /*3be0*/ FFMA R0, R0, R25.reuse, 0.018033718690276145935 ; /* 0x3c93bb7300007423 */ /* 0x080fe20000000019 */ /*3bf0*/ MOV R35, 0x3e800000 ; /* 0x3e80000000237802 */ /* 0x000fe20000000f00 */ /*3c00*/ FFMA R3, R3, R26.reuse, 0.018033718690276145935 ; /* 0x3c93bb7303037423 */ /* 0x080fe2000000001a */ /*3c10*/ FFMA R23, -R27, 1.4426950216293334961, R18 ; /* 0x3fb8aa3b1b177823 */ /* 0x000fe20000000112 */ /*3c20*/ FFMA R25, R0, R25, 0.12022458761930465698 ; /* 0x3df6384f00197423 */ /* 0x000fe20000000019 */ /*3c30*/ MOV R0, 0x4b000000 ; /* 0x4b00000000007802 */ /* 0x000fe20000000f00 */ /*3c40*/ FFMA R26, R3, R26, 0.12022458761930465698 ; /* 0x3df6384f031a7423 */ /* 0x000fe2000000001a */ /*3c50*/ FFMA R3, R33, -0.28571429848670959473, R20 ; /* 0xbe92492521037823 */ /* 0x000fe20000000014 */ /*3c60*/ FFMA R24, -R24, R27, 0.0025640949606895446777 ; /* 0x3b280a6018187423 */ /* 0x000fe2000000011b */ /*3c70*/ FADD R28, R18, -R23 ; /* 0x80000017121c7221 */ /* 0x000fe20000000000 */ /*3c80*/ MOV R18, 0x3e924925 ; /* 0x3e92492500127802 */ /* 0x000fe20000000f00 */ /*3c90*/ FADD R29, R20, -R3 ; /* 0x80000003141d7221 */ /* 0x000fe20000000000 */ /*3ca0*/ FMUL R20, R24, 0.51282048225402832031 ; /* 0x3f03483418147820 */ /* 0x000fe20000400000 */ /*3cb0*/ FFMA R31, -R27, 1.4426950216293334961, R28 ; /* 0x3fb8aa3b1b1f7823 */ /* 0x000fe2000000011c */ /*3cc0*/ FMUL R26, R26, 0.0026298495940864086151 ; /* 0x3b2c598e1a1a7820 */ /* 0x000fe20000400000 */ /*3cd0*/ FFMA R33, R33, -0.28571429848670959473, R29 ; /* 0xbe92492521217823 */ /* 0x000fe2000000001d */ /*3ce0*/ FFMA R29, R0, 1.1920928955078125e-07, RZ ; /* 0x34000000001d7823 */ /* 0x000fe200000000ff */ /*3cf0*/ FFMA R24, -R35, R18, 0.071428596973419189453 ; /* 0x3d92492823187423 */ /* 0x000fe20000000112 */ /*3d00*/ FFMA R28, R20, 1.4426950216293334961, R31 ; /* 0x3fb8aa3b141c7823 */ /* 0x000fe2000000001f */ /*3d10*/ FMUL R25, R25, 0.081632658839225769043 ; /* 0x3da72f0619197820 */ /* 0x000fe20000400000 */ /*3d20*/ FFMA R0, -R18, 1.4426950216293334961, R29 ; /* 0x3fb8aa3b12007823 */ /* 0x000fe2000000011d */ /*3d30*/ FMUL R24, R24, 0.57142859697341918945 ; /* 0x3f12492518187820 */ /* 0x000fe20000400000 */ /*3d40*/ FFMA R27, -R27, 1.9251366722983220825e-08, R28 ; /* 0x32a55e341b1b7823 */ /* 0x000fe2000000011c */ /*3d50*/ FMUL R28, R26, 3 ; /* 0x404000001a1c7820 */ /* 0x000fe20000400000 */ /*3d60*/ FADD R29, R29, -R0 ; /* 0x800000001d1d7221 */ /* 0x000fe20000000000 */ /*3d70*/ FFMA R33, R24, 1.4426950216293334961, R33 ; /* 0x3fb8aa3b18217823 */ /* 0x000fe20000000021 */ /*3d80*/ FMUL R31, R25, 3 ; /* 0x40400000191f7820 */ /* 0x000fe20000400000 */ /*3d90*/ FFMA R27, R20, R28, R27 ; /* 0x0000001c141b7223 */ /* 0x000fe2000000001b */ /*3da0*/ FFMA R29, -R18.reuse, 1.4426950216293334961, R29 ; /* 0x3fb8aa3b121d7823 */ /* 0x040fe2000000011d */ /*3db0*/ FFMA R20, -R18, 1.9251366722983220825e-08, R33 ; /* 0x32a55e3412147823 */ /* 0x000fe20000000121 */ /*3dc0*/ FADD R35, R2, -0.019999999552965164185 ; /* 0xbca3d70a02237421 */ /* 0x000fe20000000000 */ /*3dd0*/ FFMA R26, R26, -0.051282059401273727417, R27 ; /* 0xbd520d231a1a7823 */ /* 0x000fe2000000001b */ /*3de0*/ FFMA R29, R24.reuse, 1.4426950216293334961, R29 ; /* 0x3fb8aa3b181d7823 */ /* 0x040fe2000000001d */ /*3df0*/ FFMA R20, R24, R31, R20 ; /* 0x0000001f18147223 */ /* 0x000fe20000000014 */ /*3e00*/ MOV R32, 0x3ee147ae ; /* 0x3ee147ae00207802 */ /* 0x000fe20000000f00 */ /*3e10*/ FADD R27, R23, R26 ; /* 0x0000001a171b7221 */ /* 0x000fe20000000000 */ /*3e20*/ FFMA R29, -R18, 1.9251366722983220825e-08, R29 ; /* 0x32a55e34121d7823 */ /* 0x000fe2000000011d */ /*3e30*/ FFMA R28, R25, -0.28571429848670959473, R20 ; /* 0xbe924925191c7823 */ /* 0x000fe20000000014 */ /*3e40*/ FMUL R18, R22, R35 ; /* 0x0000002316127220 */ /* 0x000fe20000400000 */ /*3e50*/ FMUL R20, R27, 2 ; /* 0x400000001b147820 */ /* 0x000fe20000400000 */ /*3e60*/ FFMA R24, R24, R31, R29 ; /* 0x0000001f18187223 */ /* 0x000fe2000000001d */ /*3e70*/ FADD R30, R3, R28 ; /* 0x0000001c031e7221 */ /* 0x000fe20000000000 */ /*3e80*/ FADD R35, -R23, R27 ; /* 0x0000001b17237221 */ /* 0x000fe20000000100 */ /*3e90*/ FRND R29, R20 ; /* 0x00000014001d7307 */ /* 0x000e220000201000 */ /*3ea0*/ FFMA R33, R25, -0.28571429848670959473, R24 ; /* 0xbe92492519217823 */ /* 0x000fe20000000018 */ /*3eb0*/ FMUL R25, R30, 2 ; /* 0x400000001e197820 */ /* 0x000fe20000400000 */ /*3ec0*/ FADD R3, -R3, R30 ; /* 0x0000001e03037221 */ /* 0x000fe20000000100 */ /*3ed0*/ FADD R35, R26, -R35 ; /* 0x800000231a237221 */ /* 0x000fe20000000000 */ /*3ee0*/ FADD R31, R0, R33 ; /* 0x00000021001f7221 */ /* 0x000fe20000000000 */ /*3ef0*/ FFMA R22, R27, 2, -R20 ; /* 0x400000001b167823 */ /* 0x000fe20000000814 */ /*3f00*/ FADD R3, R28, -R3 ; /* 0x800000031c037221 */ /* 0x000fe20000000000 */ /*3f10*/ FRND R24, R25 ; /* 0x0000001900187307 */ /* 0x000e620000201000 */ /*3f20*/ FMUL R2, R31, 2 ; /* 0x400000001f027820 */ /* 0x000fe20000400000 */ /*3f30*/ FADD R0, -R0, R31 ; /* 0x0000001f00007221 */ /* 0x000fe20000000100 */ /*3f40*/ FFMA R30, R30, 2, -R25 ; /* 0x400000001e1e7823 */ /* 0x000fe20000000819 */ /*3f50*/ FFMA R35, R35, 2, R22 ; /* 0x4000000023237823 */ /* 0x000fe20000000016 */ /*3f60*/ FFMA R31, R31, 2, -R2 ; /* 0x400000001f1f7823 */ /* 0x000fe20000000802 */ /*3f70*/ FADD R0, R33, -R0 ; /* 0x8000000021007221 */ /* 0x000fe20000000000 */ /*3f80*/ FFMA R3, R3, 2, R30 ; /* 0x4000000003037823 */ /* 0x000fe2000000001e */ /*3f90*/ FRND R23, R2 ; /* 0x0000000200177307 */ /* 0x000ea20000201000 */ /*3fa0*/ FADD R26, R20, -R29 ; /* 0x8000001d141a7221 */ /* 0x001fe20000000000 */ /*3fb0*/ FFMA R22, R0, 2, R31 ; /* 0x4000000000167823 */ /* 0x000fe2000000001f */ /*3fc0*/ MOV R31, 0x391fcb8e ; /* 0x391fcb8e001f7802 */ /* 0x000fe20000000f00 */ /*3fd0*/ FFMA R19, R19, -R32, -0.037500001490116119385 ; /* 0xbd19999a13137423 */ /* 0x000fe20000000820 */ /*3fe0*/ FADD R0, R35, R26 ; /* 0x0000001a23007221 */ /* 0x000fe20000000000 */ /*3ff0*/ FSETP.GT.AND P3, PT, R29, RZ, PT ; /* 0x000000ff1d00720b */ /* 0x000fe20003f64000 */ /*4000*/ FADD R28, R25, -R24 ; /* 0x80000018191c7221 */ /* 0x002fc40000000000 */ /*4010*/ FFMA R29, R0.reuse, R31, 0.0013391353422775864601 ; /* 0x3aaf85ed001d7423 */ /* 0x040fe2000000001f */ /*4020*/ FSETP.GT.AND P0, PT, |R25|, 152, PT ; /* 0x431800001900780b */ /* 0x000fe20003f04200 */ /*4030*/ FADD R3, R3, R28 ; /* 0x0000001c03037221 */ /* 0x000fe40000000000 */ /*4040*/ FFMA R29, R0, R29, 0.0096188392490148544312 ; /* 0x3c1d9856001d7423 */ /* 0x000fe2000000001d */ /*4050*/ FSETP.GEU.AND P1, PT, R25, RZ, PT ; /* 0x000000ff1900720b */ /* 0x000fe20003f2e000 */ /*4060*/ FADD R27, R2, -R23 ; /* 0x80000017021b7221 */ /* 0x004fe20000000000 */ /*4070*/ FFMA R26, R3.reuse, R31, 0.0013391353422775864601 ; /* 0x3aaf85ed031a7423 */ /* 0x040fe2000000001f */ /*4080*/ FFMA R29, R0, R29, 0.055503588169813156128 ; /* 0x3d6357bb001d7423 */ /* 0x000fe2000000001d */ /*4090*/ F2I.NTZ R25, R25 ; /* 0x0000001900197305 */ /* 0x000e220000203100 */ /*40a0*/ FADD R22, R22, R27 ; /* 0x0000001b16167221 */ /* 0x000fe20000000000 */ /*40b0*/ FFMA R26, R3.reuse, R26, 0.0096188392490148544312 ; /* 0x3c1d9856031a7423 */ /* 0x040fe2000000001a */ /*40c0*/ FFMA R29, R0, R29, 0.24022644758224487305 ; /* 0x3e75fdec001d7423 */ /* 0x000fe2000000001d */ /*40d0*/ FSETP.GT.AND P4, PT, R24, RZ, PT ; /* 0x000000ff1800720b */ /* 0x000fe20003f84000 */ /*40e0*/ FFMA R27, R22, R31, 0.0013391353422775864601 ; /* 0x3aaf85ed161b7423 */ /* 0x000fe2000000001f */ /*40f0*/ FFMA R26, R3.reuse, R26, 0.055503588169813156128 ; /* 0x3d6357bb031a7423 */ /* 0x040fe2000000001a */ /*4100*/ FFMA R29, R0, R29, 0.69314718246459960938 ; /* 0x3f317218001d7423 */ /* 0x000fe2000000001d */ /*4110*/ F2I.NTZ R24, R2 ; /* 0x0000000200187305 */ /* 0x000e620000203100 */ /*4120*/ FFMA R27, R22, R27, 0.0096188392490148544312 ; /* 0x3c1d9856161b7423 */ /* 0x000fe2000000001b */ /*4130*/ FFMA R26, R3, R26, 0.24022644758224487305 ; /* 0x3e75fdec031a7423 */ /* 0x000fe2000000001a */ /*4140*/ FSETP.GT.AND P2, PT, R23, RZ, PT ; /* 0x000000ff1700720b */ /* 0x000fe20003f44000 */ /*4150*/ FFMA R29, R0, R29, 1 ; /* 0x3f800000001d7423 */ /* 0x000fe2000000001d */ /*4160*/ FFMA R27, R22.reuse, R27, 0.055503588169813156128 ; /* 0x3d6357bb161b7423 */ /* 0x040fe2000000001b */ /*4170*/ FFMA R28, R3.reuse, R26, 0.69314718246459960938 ; /* 0x3f317218031c7423 */ /* 0x040fe2000000001a */ /*4180*/ SEL R0, RZ, 0x83000000, P4 ; /* 0x83000000ff007807 */ /* 0x000fe20002000000 */ /*4190*/ F2I.NTZ R26, R20 ; /* 0x00000014001a7305 */ /* 0x000ea20000203100 */ /*41a0*/ FFMA R27, R22, R27, 0.24022644758224487305 ; /* 0x3e75fdec161b7423 */ /* 0x000fe2000000001b */ /*41b0*/ FFMA R28, R3, R28, 1 ; /* 0x3f800000031c7423 */ /* 0x000fe2000000001c */ /*41c0*/ SEL R3, RZ, 0x83000000, P2 ; /* 0x83000000ff037807 */ /* 0x000fc40001000000 */ /*41d0*/ FFMA R27, R22, R27, 0.69314718246459960938 ; /* 0x3f317218161b7423 */ /* 0x000fe2000000001b */ /*41e0*/ FSETP.GT.AND P2, PT, |R2|, 152, PT ; /* 0x431800000200780b */ /* 0x000fe40003f44200 */ /*41f0*/ LEA R30, R25, -R0, 0x17 ; /* 0x80000000191e7211 */ /* 0x001fe200078eb8ff */ /*4200*/ FFMA R27, R22, R27, 1 ; /* 0x3f800000161b7423 */ /* 0x000fe2000000001b */ /*4210*/ IADD3 R25, R0, 0x7f000000, RZ ; /* 0x7f00000000197810 */ /* 0x000fe40007ffe0ff */ /*4220*/ IADD3 R0, R3, 0x7f000000, RZ ; /* 0x7f00000003007810 */ /* 0x000fe40007ffe0ff */ /*4230*/ SEL R31, RZ, 0x83000000, P3 ; /* 0x83000000ff1f7807 */ /* 0x000fe20001800000 */ /*4240*/ FMUL R25, R28, R25 ; /* 0x000000191c197220 */ /* 0x000fe20000400000 */ /*4250*/ FSETP.GT.AND P3, PT, |R20|, 152, PT ; /* 0x431800001400780b */ /* 0x000fe20003f64200 */ /*4260*/ FMUL R0, R27, R0 ; /* 0x000000001b007220 */ /* 0x000fe20000400000 */ /*4270*/ LEA R23, R24, -R3, 0x17 ; /* 0x8000000318177211 */ /* 0x002fe200078eb8ff */ /*4280*/ FMUL R25, R25, R30 ; /* 0x0000001e19197220 */ /* 0x000fe20000400000 */ /*4290*/ IADD3 R22, R31, 0x7f000000, RZ ; /* 0x7f0000001f167810 */ /* 0x000fc40007ffe0ff */ /*42a0*/ FSETP.GEU.AND P4, PT, R2, RZ, PT ; /* 0x000000ff0200720b */ /* 0x000fe20003f8e000 */ /*42b0*/ FMUL R23, R0, R23 ; /* 0x0000001700177220 */ /* 0x000fe20000400000 */ /*42c0*/ LEA R31, R26, -R31, 0x17 ; /* 0x8000001f1a1f7211 */ /* 0x004fe200078eb8ff */ /*42d0*/ FMUL R22, R29, R22 ; /* 0x000000161d167220 */ /* 0x000fe20000400000 */ /*42e0*/ @P0 FSEL R25, RZ, +INF , !P1 ; /* 0x7f800000ff190808 */ /* 0x000fe40004800000 */ /*42f0*/ @P2 FSEL R23, RZ, +INF , !P4 ; /* 0x7f800000ff172808 */ /* 0x000fe40006000000 */ /*4300*/ FSETP.GEU.AND P5, PT, R20, RZ, PT ; /* 0x000000ff1400720b */ /* 0x000fe20003fae000 */ /*4310*/ FMUL R20, R22, R31 ; /* 0x0000001f16147220 */ /* 0x000fe20000400000 */ /*4320*/ FMUL R22, R25, 9.7399997711181640625 ; /* 0x411bd70a19167820 */ /* 0x000fe20000400000 */ /*4330*/ FMUL.D4 R23, R23, 3.1400001049041748047 ; /* 0x4048f5c317177820 */ /* 0x000fe20000200000 */ /*4340*/ @P3 FSEL R20, RZ, +INF , !P5 ; /* 0x7f800000ff143808 */ /* 0x000fc40006800000 */ /*4350*/ FMUL R3, |R4|.reuse, 16777216 ; /* 0x4b80000004037820 */ /* 0x041fe20000400200 */ /*4360*/ FSETP.GEU.AND P0, PT, |R4|, 1.175494350822287508e-38, PT ; /* 0x008000000400780b */ /* 0x000fc40003f0e200 */ /*4370*/ FSETP.NEU.AND P2, PT, R4, 1, PT ; /* 0x3f8000000400780b */ /* 0x000fe40003f4d000 */ /*4380*/ FSEL R3, R3, |R4|, !P0 ; /* 0x4000000403037208 */ /* 0x000fe40004000000 */ /*4390*/ FSEL R2, RZ, -24, P0 ; /* 0xc1c00000ff027808 */ /* 0x000fe40000000000 */ /*43a0*/ IADD3 R0, R3, -0x3f3504f3, RZ ; /* 0xc0cafb0d03007810 */ /* 0x000fc80007ffe0ff */ /*43b0*/ LOP3.LUT R0, R0, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000000007812 */ /* 0x000fc800078ec0ff */ /*43c0*/ IADD3 R3, R3, -R0, RZ ; /* 0x8000000003037210 */ /* 0x000fca0007ffe0ff */ /*43d0*/ FADD R25, R3.reuse, 1 ; /* 0x3f80000003197421 */ /* 0x040fe20000000000 */ /*43e0*/ FADD R24, R3, -1 ; /* 0xbf80000003187421 */ /* 0x000fe20000000000 */ /*43f0*/ I2FP.F32.S32 R3, R0 ; /* 0x0000000000037245 */ /* 0x000fe40000201400 */ /*4400*/ MOV R0, 0x3a2c32e4 ; /* 0x3a2c32e400007802 */ /* 0x000fe20000000f00 */ /*4410*/ FADD R26, R24, R24 ; /* 0x00000018181a7221 */ /* 0x000fe20000000000 */ /*4420*/ MUFU.RCP R25, R25 ; /* 0x0000001900197308 */ /* 0x000e220000001000 */ /*4430*/ FFMA R3, R3, 1.1920928955078125e-07, R2 ; /* 0x3400000003037823 */ /* 0x000fe40000000002 */ /*4440*/ FMUL R26, R25, R26 ; /* 0x0000001a191a7220 */ /* 0x001fc80000400000 */ /*4450*/ FADD R28, R24, -R26 ; /* 0x8000001a181c7221 */ /* 0x000fe20000000000 */ /*4460*/ FMUL R27, R26.reuse, R26 ; /* 0x0000001a1a1b7220 */ /* 0x040fe20000400000 */ /*4470*/ FFMA R2, R26, 1.4426950216293334961, R3 ; /* 0x3fb8aa3b1a027823 */ /* 0x000fe40000000003 */ /*4480*/ FADD R29, R28, R28 ; /* 0x0000001c1c1d7221 */ /* 0x000fe20000000000 */ /*4490*/ FFMA R28, R27, R0, 0.0032181653659790754318 ; /* 0x3b52e7db1b1c7423 */ /* 0x000fe20000000000 */ /*44a0*/ FADD R3, R3, -R2 ; /* 0x8000000203037221 */ /* 0x000fe40000000000 */ /*44b0*/ FFMA R24, R24, -R26, R29 ; /* 0x8000001a18187223 */ /* 0x000fe2000000001d */ /*44c0*/ FFMA R28, R27, R28, 0.018033718690276145935 ; /* 0x3c93bb731b1c7423 */ /* 0x000fe2000000001c */ /*44d0*/ FFMA R3, R26, 1.4426950216293334961, R3 ; /* 0x3fb8aa3b1a037823 */ /* 0x000fc40000000003 */ /*44e0*/ FMUL R24, R25, R24 ; /* 0x0000001819187220 */ /* 0x000fe20000400000 */ /*44f0*/ FFMA R28, R27, R28, 0.12022458761930465698 ; /* 0x3df6384f1b1c7423 */ /* 0x000fc6000000001c */ /*4500*/ FFMA R3, R24, 1.4426950216293334961, R3 ; /* 0x3fb8aa3b18037823 */ /* 0x000fe20000000003 */ /*4510*/ FMUL R27, R27, R28 ; /* 0x0000001c1b1b7220 */ /* 0x000fc60000400000 */ /*4520*/ FFMA R3, R26, 1.9251366722983220825e-08, R3 ; /* 0x32a55e341a037823 */ /* 0x000fe20000000003 */ /*4530*/ FMUL R25, R27, 3 ; /* 0x404000001b197820 */ /* 0x000fc80000400000 */ /*4540*/ FFMA R24, R24, R25, R3 ; /* 0x0000001918187223 */ /* 0x000fc80000000003 */ /*4550*/ FFMA R27, R26, R27, R24 ; /* 0x0000001b1a1b7223 */ /* 0x000fc80000000018 */ /*4560*/ FADD R3, R2, R27 ; /* 0x0000001b02037221 */ /* 0x000fc80000000000 */ /*4570*/ FMUL R24, R3, 2 ; /* 0x4000000003187820 */ /* 0x000fe20000400000 */ /*4580*/ FADD R2, -R2, R3 ; /* 0x0000000302027221 */ /* 0x000fc60000000100 */ /*4590*/ FRND R25, R24 ; /* 0x0000001800197307 */ /* 0x000e220000201000 */ /*45a0*/ FADD R2, R27, -R2 ; /* 0x800000021b027221 */ /* 0x000fe20000000000 */ /*45b0*/ FFMA R3, R3, 2, -R24 ; /* 0x4000000003037823 */ /* 0x000fe20000000818 */ /*45c0*/ FSETP.GEU.AND P1, PT, R24, RZ, PT ; /* 0x000000ff1800720b */ /* 0x000fc60003f2e000 */ /*45d0*/ FFMA R3, R2, 2, R3 ; /* 0x4000000002037823 */ /* 0x000fe20000000003 */ /*45e0*/ MOV R2, 0x391fcb8e ; /* 0x391fcb8e00027802 */ /* 0x000fe20000000f00 */ /*45f0*/ F2I.NTZ R27, R24 ; /* 0x00000018001b7305 */ /* 0x000e620000203100 */ /*4600*/ FADD R26, R24, -R25 ; /* 0x80000019181a7221 */ /* 0x001fe20000000000 */ /*4610*/ FSETP.GT.AND P0, PT, R25, RZ, PT ; /* 0x000000ff1900720b */ /* 0x000fc60003f04000 */ /*4620*/ FADD R3, R3, R26 ; /* 0x0000001a03037221 */ /* 0x000fe20000000000 */ /*4630*/ SEL R28, RZ, 0x83000000, P0 ; /* 0x83000000ff1c7807 */ /* 0x000fe40000000000 */ /*4640*/ FSETP.GT.AND P0, PT, |R24|, 152, PT ; /* 0x431800001800780b */ /* 0x000fe20003f04200 */ /*4650*/ FFMA R26, R3, R2, 0.0013391353422775864601 ; /* 0x3aaf85ed031a7423 */ /* 0x000fe20000000002 */ /*4660*/ IADD3 R25, R28, 0x7f000000, RZ ; /* 0x7f0000001c197810 */ /* 0x000fe40007ffe0ff */ /*4670*/ LEA R28, R27, -R28, 0x17 ; /* 0x8000001c1b1c7211 */ /* 0x002fe200078eb8ff */ /*4680*/ FFMA R26, R3, R26, 0.0096188392490148544312 ; /* 0x3c1d9856031a7423 */ /* 0x000fe2000000001a */ /*4690*/ MOV R24, 0x3f800000 ; /* 0x3f80000000187802 */ /* 0x000fc60000000f00 */ /*46a0*/ FFMA R26, R3, R26, 0.055503588169813156128 ; /* 0x3d6357bb031a7423 */ /* 0x000fc8000000001a */ /*46b0*/ FFMA R26, R3, R26, 0.24022644758224487305 ; /* 0x3e75fdec031a7423 */ /* 0x000fc8000000001a */ /*46c0*/ FFMA R26, R3, R26, 0.69314718246459960938 ; /* 0x3f317218031a7423 */ /* 0x000fc8000000001a */ /*46d0*/ FFMA R26, R3, R26, 1 ; /* 0x3f800000031a7423 */ /* 0x000fe2000000001a */ /*46e0*/ MOV R3, 0x3f800000 ; /* 0x3f80000000037802 */ /* 0x000fc60000000f00 */ /*46f0*/ FMUL R25, R26, R25 ; /* 0x000000191a197220 */ /* 0x000fc80000400000 */ /*4700*/ FMUL R25, R25, R28 ; /* 0x0000001c19197220 */ /* 0x000fe20000400000 */ /*4710*/ @P0 FSEL R25, RZ, +INF , !P1 ; /* 0x7f800000ff190808 */ /* 0x000fe20004800000 */ /*4720*/ @!P2 BRA 0x4810 ; /* 0x000000e00000a947 */ /* 0x000fea0003800000 */ /*4730*/ FSETP.GTU.AND P0, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fda0003f0c200 */ /*4740*/ @P0 BRA 0x4800 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*4750*/ FSETP.NEU.AND P0, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fc80003f0d200 */ /*4760*/ FSETP.EQ.OR P0, PT, R4, RZ, !P0 ; /* 0x000000ff0400720b */ /* 0x000fda0004702400 */ /*4770*/ @P0 BRA 0x47d0 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*4780*/ FSETP.GEU.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720b */ /* 0x000fe40003f0e000 */ /*4790*/ MOV R24, R25 ; /* 0x0000001900187202 */ /* 0x000fd60000000f00 */ /*47a0*/ @P0 BRA 0x4810 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*47b0*/ MOV R24, R25 ; /* 0x0000001900187202 */ /* 0x000fe20000000f00 */ /*47c0*/ BRA 0x4810 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*47d0*/ FADD R24, R4, R4 ; /* 0x0000000404187221 */ /* 0x000fca0000000000 */ /*47e0*/ LOP3.LUT R24, R24, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff18187812 */ /* 0x000fe200078ec0ff */ /*47f0*/ BRA 0x4810 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*4800*/ FADD R24, R4, 2 ; /* 0x4000000004187421 */ /* 0x000fe20000000000 */ /*4810*/ FMUL R26, |R5|.reuse, 16777216 ; /* 0x4b800000051a7820 */ /* 0x040fe20000400200 */ /*4820*/ FSETP.GEU.AND P0, PT, |R5|.reuse, 1.175494350822287508e-38, PT ; /* 0x008000000500780b */ /* 0x040fe40003f0e200 */ /*4830*/ FSETP.NEU.AND P2, PT, R5, 1, PT ; /* 0x3f8000000500780b */ /* 0x000fe40003f4d000 */ /*4840*/ FSEL R26, R26, |R5|, !P0 ; /* 0x400000051a1a7208 */ /* 0x000fc80004000000 */ /*4850*/ IADD3 R25, R26, -0x3f3504f3, RZ ; /* 0xc0cafb0d1a197810 */ /* 0x000fc80007ffe0ff */ /*4860*/ LOP3.LUT R25, R25, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000019197812 */ /* 0x000fc800078ec0ff */ /*4870*/ IADD3 R26, R26, -R25.reuse, RZ ; /* 0x800000191a1a7210 */ /* 0x080fe40007ffe0ff */ /*4880*/ I2FP.F32.S32 R27, R25 ; /* 0x00000019001b7245 */ /* 0x000fc60000201400 */ /*4890*/ FADD R29, R26.reuse, 1 ; /* 0x3f8000001a1d7421 */ /* 0x040fe20000000000 */ /*48a0*/ FADD R30, R26, -1 ; /* 0xbf8000001a1e7421 */ /* 0x000fe20000000000 */ /*48b0*/ FSEL R26, RZ, -24, P0 ; /* 0xc1c00000ff1a7808 */ /* 0x000fc60000000000 */ /*48c0*/ FADD R28, R30, R30 ; /* 0x0000001e1e1c7221 */ /* 0x000fe20000000000 */ /*48d0*/ MUFU.RCP R29, R29 ; /* 0x0000001d001d7308 */ /* 0x000e260000001000 */ /*48e0*/ FMUL R25, R29, R28 ; /* 0x0000001c1d197220 */ /* 0x001fe20000400000 */ /*48f0*/ FFMA R28, R27, 1.1920928955078125e-07, R26 ; /* 0x340000001b1c7823 */ /* 0x000fc6000000001a */ /*4900*/ FADD R31, R30, -R25 ; /* 0x800000191e1f7221 */ /* 0x000fe20000000000 */ /*4910*/ FMUL R27, R25.reuse, R25.reuse ; /* 0x00000019191b7220 */ /* 0x0c0fe20000400000 */ /*4920*/ FFMA R26, R25, 1.4426950216293334961, R28 ; /* 0x3fb8aa3b191a7823 */ /* 0x000fe4000000001c */ /*4930*/ FADD R31, R31, R31 ; /* 0x0000001f1f1f7221 */ /* 0x000fe20000000000 */ /*4940*/ FFMA R0, R27.reuse, R0, 0.0032181653659790754318 ; /* 0x3b52e7db1b007423 */ /* 0x040fe20000000000 */ /*4950*/ FADD R28, R28, -R26 ; /* 0x8000001a1c1c7221 */ /* 0x000fe40000000000 */ /*4960*/ FFMA R30, R30, -R25, R31 ; /* 0x800000191e1e7223 */ /* 0x000fe2000000001f */ /*4970*/ FFMA R0, R27, R0, 0.018033718690276145935 ; /* 0x3c93bb731b007423 */ /* 0x000fe20000000000 */ /*4980*/ FFMA R31, R25, 1.4426950216293334961, R28 ; /* 0x3fb8aa3b191f7823 */ /* 0x000fc4000000001c */ /*4990*/ FMUL R30, R29, R30 ; /* 0x0000001e1d1e7220 */ /* 0x000fe20000400000 */ /*49a0*/ FFMA R0, R27, R0, 0.12022458761930465698 ; /* 0x3df6384f1b007423 */ /* 0x000fc60000000000 */ /*49b0*/ FFMA R28, R30, 1.4426950216293334961, R31 ; /* 0x3fb8aa3b1e1c7823 */ /* 0x000fe2000000001f */ /*49c0*/ FMUL R0, R27, R0 ; /* 0x000000001b007220 */ /* 0x000fc60000400000 */ /*49d0*/ FFMA R27, R25, 1.9251366722983220825e-08, R28 ; /* 0x32a55e34191b7823 */ /* 0x000fe2000000001c */ /*49e0*/ FMUL R28, R0, 3 ; /* 0x40400000001c7820 */ /* 0x000fc80000400000 */ /*49f0*/ FFMA R27, R30, R28, R27 ; /* 0x0000001c1e1b7223 */ /* 0x000fc8000000001b */ /*4a00*/ FFMA R27, R25, R0, R27 ; /* 0x00000000191b7223 */ /* 0x000fc8000000001b */ /*4a10*/ FADD R25, R26, R27 ; /* 0x0000001b1a197221 */ /* 0x000fc80000000000 */ /*4a20*/ FMUL R0, R25, 2 ; /* 0x4000000019007820 */ /* 0x000fe20000400000 */ /*4a30*/ FADD R26, -R26, R25 ; /* 0x000000191a1a7221 */ /* 0x000fc60000000100 */ /*4a40*/ FRND R29, R0 ; /* 0x00000000001d7307 */ /* 0x000e220000201000 */ /*4a50*/ FADD R26, R27, -R26 ; /* 0x8000001a1b1a7221 */ /* 0x000fe20000000000 */ /*4a60*/ FFMA R25, R25, 2, -R0 ; /* 0x4000000019197823 */ /* 0x000fe20000000800 */ /*4a70*/ FSETP.GEU.AND P1, PT, R0, RZ, PT ; /* 0x000000ff0000720b */ /* 0x000fc60003f2e000 */ /*4a80*/ FFMA R25, R26, 2, R25 ; /* 0x400000001a197823 */ /* 0x000fe20000000019 */ /*4a90*/ FADD R26, R0, -R29 ; /* 0x8000001d001a7221 */ /* 0x001fe20000000000 */ /*4aa0*/ FSETP.GT.AND P0, PT, R29, RZ, PT ; /* 0x000000ff1d00720b */ /* 0x000fc60003f04000 */ /*4ab0*/ FADD R25, R25, R26 ; /* 0x0000001a19197221 */ /* 0x000fe20000000000 */ /*4ac0*/ SEL R27, RZ, 0x83000000, P0 ; /* 0x83000000ff1b7807 */ /* 0x000fe20000000000 */ /*4ad0*/ F2I.NTZ R26, R0 ; /* 0x00000000001a7305 */ /* 0x000e220000203100 */ /*4ae0*/ FSETP.GT.AND P0, PT, |R0|, 152, PT ; /* 0x431800000000780b */ /* 0x000fe20003f04200 */ /*4af0*/ FFMA R2, R25, R2, 0.0013391353422775864601 ; /* 0x3aaf85ed19027423 */ /* 0x000fe20000000002 */ /*4b00*/ IADD3 R29, R27, 0x7f000000, RZ ; /* 0x7f0000001b1d7810 */ /* 0x000fc60007ffe0ff */ /*4b10*/ FFMA R2, R25, R2, 0.0096188392490148544312 ; /* 0x3c1d985619027423 */ /* 0x000fc80000000002 */ /*4b20*/ FFMA R2, R25, R2, 0.055503588169813156128 ; /* 0x3d6357bb19027423 */ /* 0x000fc80000000002 */ /*4b30*/ FFMA R2, R25, R2, 0.24022644758224487305 ; /* 0x3e75fdec19027423 */ /* 0x000fe20000000002 */ /*4b40*/ LEA R27, R26, -R27, 0x17 ; /* 0x8000001b1a1b7211 */ /* 0x001fc600078eb8ff */ /*4b50*/ FFMA R2, R25, R2, 0.69314718246459960938 ; /* 0x3f31721819027423 */ /* 0x000fc80000000002 */ /*4b60*/ FFMA R2, R25, R2, 1 ; /* 0x3f80000019027423 */ /* 0x000fc80000000002 */ /*4b70*/ FMUL R2, R2, R29 ; /* 0x0000001d02027220 */ /* 0x000fc80000400000 */ /*4b80*/ FMUL R2, R2, R27 ; /* 0x0000001b02027220 */ /* 0x000fe20000400000 */ /*4b90*/ @P0 FSEL R2, RZ, +INF , !P1 ; /* 0x7f800000ff020808 */ /* 0x000fe20004800000 */ /*4ba0*/ @!P2 BRA 0x4c90 ; /* 0x000000e00000a947 */ /* 0x000fea0003800000 */ /*4bb0*/ FSETP.GTU.AND P0, PT, |R5|, +INF , PT ; /* 0x7f8000000500780b */ /* 0x000fda0003f0c200 */ /*4bc0*/ @P0 BRA 0x4c80 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*4bd0*/ FSETP.NEU.AND P0, PT, |R5|, +INF , PT ; /* 0x7f8000000500780b */ /* 0x000fc80003f0d200 */ /*4be0*/ FSETP.EQ.OR P0, PT, R5, RZ, !P0 ; /* 0x000000ff0500720b */ /* 0x000fda0004702400 */ /*4bf0*/ @P0 BRA 0x4c50 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*4c00*/ FSETP.GEU.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720b */ /* 0x000fe40003f0e000 */ /*4c10*/ MOV R3, R2 ; /* 0x0000000200037202 */ /* 0x000fd60000000f00 */ /*4c20*/ @P0 BRA 0x4c90 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*4c30*/ MOV R3, R2 ; /* 0x0000000200037202 */ /* 0x000fe20000000f00 */ /*4c40*/ BRA 0x4c90 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*4c50*/ FADD R3, R5, R5 ; /* 0x0000000505037221 */ /* 0x000fca0000000000 */ /*4c60*/ LOP3.LUT R3, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03037812 */ /* 0x000fe200078ec0ff */ /*4c70*/ BRA 0x4c90 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*4c80*/ FADD R3, R5, 2 ; /* 0x4000000005037421 */ /* 0x000fc80000000000 */ /*4c90*/ FADD R0, R24, R3 ; /* 0x0000000318007221 */ /* 0x000fc80000000000 */ /*4ca0*/ MUFU.RSQ R3, R0 ; /* 0x0000000000037308 */ /* 0x0000620000001400 */ /*4cb0*/ IADD3 R2, R0, -0xd000000, RZ ; /* 0xf300000000027810 */ /* 0x000fc80007ffe0ff */ /*4cc0*/ ISETP.GT.U32.AND P0, PT, R2, 0x727fffff, PT ; /* 0x727fffff0200780c */ /* 0x000fda0003f04070 */ /*4cd0*/ @!P0 BRA 0x4d10 ; /* 0x0000003000008947 */ /* 0x000fea0003800000 */ /*4ce0*/ MOV R24, 0x4d00 ; /* 0x00004d0000187802 */ /* 0x003fe40000000f00 */ /*4cf0*/ CALL.REL.NOINC 0x7ed0 ; /* 0x000031d000007944 */ /* 0x000fea0003c00000 */ /*4d00*/ BRA 0x4d50 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*4d10*/ FMUL.FTZ R25, R0, R3 ; /* 0x0000000300197220 */ /* 0x003fe20000410000 */ /*4d20*/ FMUL.FTZ R2, R3, 0.5 ; /* 0x3f00000003027820 */ /* 0x000fc60000410000 */ /*4d30*/ FFMA R0, -R25, R25, R0 ; /* 0x0000001919007223 */ /* 0x000fc80000000100 */ /*4d40*/ FFMA R25, R0, R2, R25 ; /* 0x0000000200197223 */ /* 0x000fc80000000019 */ /*4d50*/ MUFU.RCP R2, R25 ; /* 0x0000001900027308 */ /* 0x000e220000001000 */ /*4d60*/ FMUL R0, R6, c[0x0][0x1a4] ; /* 0x0000690006007a20 */ /* 0x000fce0000400000 */ /*4d70*/ FCHK P0, R0, R25 ; /* 0x0000001900007302 */ /* 0x000e620000000000 */ /*4d80*/ FFMA R3, R2, -R25, 1 ; /* 0x3f80000002037423 */ /* 0x001fc80000000819 */ /*4d90*/ FFMA R3, R2, R3, R2 ; /* 0x0000000302037223 */ /* 0x000fc80000000002 */ /*4da0*/ FFMA R30, R0, R3, RZ ; /* 0x00000003001e7223 */ /* 0x000fc800000000ff */ /*4db0*/ FFMA R2, R30, -R25, R0 ; /* 0x800000191e027223 */ /* 0x000fc80000000000 */ /*4dc0*/ FFMA R30, R3, R2, R30 ; /* 0x00000002031e7223 */ /* 0x000fe2000000001e */ /*4dd0*/ @!P0 BRA 0x4e20 ; /* 0x0000004000008947 */ /* 0x002fea0003800000 */ /*4de0*/ MOV R3, R25 ; /* 0x0000001900037202 */ /* 0x000fe40000000f00 */ /*4df0*/ MOV R2, 0x4e10 ; /* 0x00004e1000027802 */ /* 0x000fe40000000f00 */ /*4e00*/ CALL.REL.NOINC 0x8050 ; /* 0x0000324000007944 */ /* 0x000fea0003c00000 */ /*4e10*/ MOV R30, R0 ; /* 0x00000000001e7202 */ /* 0x001fe40000000f00 */ /*4e20*/ MUFU.RCP R3, R4 ; /* 0x0000000400037308 */ /* 0x000e300000001000 */ /*4e30*/ FCHK P0, R5, R4 ; /* 0x0000000405007302 */ /* 0x000e620000000000 */ /*4e40*/ FFMA R0, R3, -R4, 1 ; /* 0x3f80000003007423 */ /* 0x001fc80000000804 */ /*4e50*/ FFMA R0, R3, R0, R3 ; /* 0x0000000003007223 */ /* 0x000fc80000000003 */ /*4e60*/ FFMA R2, R0, R5, RZ ; /* 0x0000000500027223 */ /* 0x000fc800000000ff */ /*4e70*/ FFMA R3, R2, -R4, R5 ; /* 0x8000000402037223 */ /* 0x000fc80000000005 */ /*4e80*/ FFMA R3, R0, R3, R2 ; /* 0x0000000300037223 */ /* 0x000fe20000000002 */ /*4e90*/ @!P0 BRA 0x4ef0 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*4ea0*/ MOV R0, R5 ; /* 0x0000000500007202 */ /* 0x000fe40000000f00 */ /*4eb0*/ MOV R3, R4 ; /* 0x0000000400037202 */ /* 0x000fe40000000f00 */ /*4ec0*/ MOV R2, 0x4ee0 ; /* 0x00004ee000027802 */ /* 0x000fe40000000f00 */ /*4ed0*/ CALL.REL.NOINC 0x8050 ; /* 0x0000317000007944 */ /* 0x000fea0003c00000 */ /*4ee0*/ MOV R3, R0 ; /* 0x0000000000037202 */ /* 0x001fe40000000f00 */ /*4ef0*/ FMUL R0, |R25|.reuse, 16777216 ; /* 0x4b80000019007820 */ /* 0x040fe20000400200 */ /*4f00*/ FSETP.GEU.AND P0, PT, |R25|, 1.175494350822287508e-38, PT ; /* 0x008000001900780b */ /* 0x000fe40003f0e200 */ /*4f10*/ FSETP.GT.AND P1, PT, |R3|, 1, PT ; /* 0x3f8000000300780b */ /* 0x000fe40003f24200 */ /*4f20*/ FSEL R0, R0, |R25|, !P0 ; /* 0x4000001900007208 */ /* 0x000fc40004000000 */ /*4f30*/ FSETP.GTU.AND P2, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f4c200 */ /*4f40*/ IADD3 R2, R0, -0x3f3504f3, RZ ; /* 0xc0cafb0d00027810 */ /* 0x000fc80007ffe0ff */ /*4f50*/ LOP3.LUT R27, R2, 0xff800000, RZ, 0xc0, !PT ; /* 0xff800000021b7812 */ /* 0x000fe400078ec0ff */ /*4f60*/ FSEL R2, RZ, -24, P0 ; /* 0xc1c00000ff027808 */ /* 0x000fe40000000000 */ /*4f70*/ IADD3 R0, R0, -R27.reuse, RZ ; /* 0x8000001b00007210 */ /* 0x080fe40007ffe0ff */ /*4f80*/ I2FP.F32.S32 R27, R27 ; /* 0x0000001b001b7245 */ /* 0x000fe40000201400 */ /*4f90*/ @P1 MOV R34, 0x3f6ee581 ; /* 0x3f6ee58100221802 */ /* 0x000fe20000000f00 */ /*4fa0*/ FADD R26, R0.reuse, 1 ; /* 0x3f800000001a7421 */ /* 0x040fe20000000000 */ /*4fb0*/ FADD R29, R0, -1 ; /* 0xbf800000001d7421 */ /* 0x000fe20000000000 */ /*4fc0*/ MOV R0, 0x3a2c32e4 ; /* 0x3a2c32e400007802 */ /* 0x000fe20000000f00 */ /*4fd0*/ FFMA R27, R27, 1.1920928955078125e-07, R2 ; /* 0x340000001b1b7823 */ /* 0x000fc40000000002 */ /*4fe0*/ FADD R31, R29, R29 ; /* 0x0000001d1d1f7221 */ /* 0x000fe20000000000 */ /*4ff0*/ MUFU.RCP R26, R26 ; /* 0x0000001a001a7308 */ /* 0x000e260000001000 */ /*5000*/ FMUL R24, R26, R31 ; /* 0x0000001f1a187220 */ /* 0x001fc80000400000 */ /*5010*/ FADD R28, R29, -R24 ; /* 0x800000181d1c7221 */ /* 0x000fe20000000000 */ /*5020*/ FMUL R31, R24.reuse, R24 ; /* 0x00000018181f7220 */ /* 0x040fe20000400000 */ /*5030*/ FFMA R2, R24, 1.4426950216293334961, R27 ; /* 0x3fb8aa3b18027823 */ /* 0x000fe4000000001b */ /*5040*/ FADD R28, R28, R28 ; /* 0x0000001c1c1c7221 */ /* 0x000fe20000000000 */ /*5050*/ FFMA R32, R31, R0, 0.0032181653659790754318 ; /* 0x3b52e7db1f207423 */ /* 0x000fe20000000000 */ /*5060*/ FADD R27, R27, -R2 ; /* 0x800000021b1b7221 */ /* 0x000fe40000000000 */ /*5070*/ FFMA R29, R29, -R24, R28 ; /* 0x800000181d1d7223 */ /* 0x000fe2000000001c */ /*5080*/ FFMA R32, R31, R32, 0.018033718690276145935 ; /* 0x3c93bb731f207423 */ /* 0x000fe20000000020 */ /*5090*/ FFMA R28, R24, 1.4426950216293334961, R27 ; /* 0x3fb8aa3b181c7823 */ /* 0x000fc4000000001b */ /*50a0*/ FMUL R29, R26, R29 ; /* 0x0000001d1a1d7220 */ /* 0x000fe20000400000 */ /*50b0*/ FFMA R32, R31, R32, 0.12022458761930465698 ; /* 0x3df6384f1f207423 */ /* 0x000fe20000000020 */ /*50c0*/ MUFU.RCP R26, |R3| ; /* 0x40000003001a7308 */ /* 0x000e240000001000 */ /*50d0*/ FFMA R27, R29, 1.4426950216293334961, R28 ; /* 0x3fb8aa3b1d1b7823 */ /* 0x000fe2000000001c */ /*50e0*/ FMUL R31, R31, R32 ; /* 0x000000201f1f7220 */ /* 0x000fc60000400000 */ /*50f0*/ FFMA R28, R24, 1.9251366722983220825e-08, R27 ; /* 0x32a55e34181c7823 */ /* 0x000fe2000000001b */ /*5100*/ FMUL R27, R31, 3 ; /* 0x404000001f1b7820 */ /* 0x000fc80000400000 */ /*5110*/ FFMA R27, R29, R27, R28 ; /* 0x0000001b1d1b7223 */ /* 0x000fe2000000001c */ /*5120*/ MOV R29, 0x3b2090aa ; /* 0x3b2090aa001d7802 */ /* 0x000fc60000000f00 */ /*5130*/ FFMA R31, R24, R31, R27 ; /* 0x0000001f181f7223 */ /* 0x000fe2000000001b */ /*5140*/ FSEL R26, R26, |R3|, P1 ; /* 0x400000031a1a7208 */ /* 0x001fc60000800000 */ /*5150*/ FADD R33, R2, R31 ; /* 0x0000001f02217221 */ /* 0x000fe40000000000 */ /*5160*/ FMUL R28, R26, R26 ; /* 0x0000001a1a1c7220 */ /* 0x000fe40000400000 */ /*5170*/ FMUL R24, R33, 2 ; /* 0x4000000021187820 */ /* 0x000fe20000400000 */ /*5180*/ FADD R2, -R2, R33 ; /* 0x0000002102027221 */ /* 0x000fe20000000100 */ /*5190*/ FFMA R29, R28.reuse, R29, -0.014396979473531246185 ; /* 0xbc6be14f1c1d7423 */ /* 0x040fe4000000001d */ /*51a0*/ FRND R27, R24 ; /* 0x00000018001b7307 */ /* 0x000e220000201000 */ /*51b0*/ FADD R2, R31, -R2 ; /* 0x800000021f027221 */ /* 0x000fe20000000000 */ /*51c0*/ FFMA R29, R28, R29, 0.039849750697612762451 ; /* 0x3d23397e1c1d7423 */ /* 0x000fe2000000001d */ /*51d0*/ FFMA R33, R33, 2, -R24 ; /* 0x4000000021217823 */ /* 0x000fc60000000818 */ /*51e0*/ FFMA R29, R28, R29, -0.072529748082160949707 ; /* 0xbd948a7a1c1d7423 */ /* 0x000fe2000000001d */ /*51f0*/ FFMA R33, R2, 2, R33 ; /* 0x4000000002217823 */ /* 0x000fe20000000021 */ /*5200*/ MOV R2, 0x391fcb8e ; /* 0x391fcb8e00027802 */ /* 0x000fe40000000f00 */ /*5210*/ FFMA R29, R28, R29, 0.10518480092287063599 ; /* 0x3dd76b211c1d7423 */ /* 0x000fc8000000001d */ /*5220*/ FFMA R29, R28, R29, -0.14171802997589111328 ; /* 0xbe111e881c1d7423 */ /* 0x000fe2000000001d */ /*5230*/ FADD R32, R24, -R27 ; /* 0x8000001b18207221 */ /* 0x001fe20000000000 */ /*5240*/ FSETP.GT.AND P0, PT, R27, RZ, PT ; /* 0x000000ff1b00720b */ /* 0x000fe40003f04000 */ /*5250*/ FFMA R29, R28, R29, 0.19988775253295898438 ; /* 0x3e4caf601c1d7423 */ /* 0x000fe2000000001d */ /*5260*/ FADD R33, R33, R32 ; /* 0x0000002021217221 */ /* 0x000fc60000000000 */ /*5270*/ FFMA R29, R28, R29, -0.33332940936088562012 ; /* 0xbeaaaa271c1d7423 */ /* 0x000fe2000000001d */ /*5280*/ FFMA R32, R33, R2, 0.0013391353422775864601 ; /* 0x3aaf85ed21207423 */ /* 0x000fc60000000002 */ /*5290*/ FMUL R29, R28, R29 ; /* 0x0000001d1c1d7220 */ /* 0x000fe20000400000 */ /*52a0*/ FFMA R32, R33, R32, 0.0096188392490148544312 ; /* 0x3c1d985621207423 */ /* 0x000fe20000000020 */ /*52b0*/ F2I.NTZ R28, R24 ; /* 0x00000018001c7305 */ /* 0x000e240000203100 */ /*52c0*/ FFMA R31, R26, R29, R26 ; /* 0x0000001d1a1f7223 */ /* 0x000fe2000000001a */ /*52d0*/ LOP3.LUT R26, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x80000000031a7812 */ /* 0x000fe200078ec0ff */ /*52e0*/ FFMA R32, R33.reuse, R32, 0.055503588169813156128 ; /* 0x3d6357bb21207423 */ /* 0x040fe20000000020 */ /*52f0*/ SEL R3, RZ, 0x83000000, P0 ; /* 0x83000000ff037807 */ /* 0x000fe20000000000 */ /*5300*/ @P1 FFMA R31, R34, 1.6832555532455444336, -R31 ; /* 0x3fd774eb221f1823 */ /* 0x000fe2000000081f */ /*5310*/ FSETP.GT.AND P0, PT, |R24|, 152, PT ; /* 0x431800001800780b */ /* 0x000fe20003f04200 */ /*5320*/ FFMA R32, R33, R32, 0.24022644758224487305 ; /* 0x3e75fdec21207423 */ /* 0x000fe20000000020 */ /*5330*/ IADD3 R27, R3, 0x7f000000, RZ ; /* 0x7f000000031b7810 */ /* 0x000fc40007ffe0ff */ /*5340*/ @!P2 LOP3.LUT R31, R26, R31, RZ, 0xfc, !PT ; /* 0x0000001f1a1fa212 */ /* 0x000fe200078efcff */ /*5350*/ FFMA R32, R33, R32, 0.69314718246459960938 ; /* 0x3f31721821207423 */ /* 0x000fe20000000020 */ /*5360*/ FSETP.NEU.AND P2, PT, R25, 1, PT ; /* 0x3f8000001900780b */ /* 0x000fe40003f4d000 */ /*5370*/ FSETP.GEU.AND P1, PT, R24, RZ, PT ; /* 0x000000ff1800720b */ /* 0x000fe20003f2e000 */ /*5380*/ FFMA R32, R33, R32, 1 ; /* 0x3f80000021207423 */ /* 0x000fe20000000020 */ /*5390*/ LEA R28, R28, -R3, 0x17 ; /* 0x800000031c1c7211 */ /* 0x001fe200078eb8ff */ /*53a0*/ FMUL R26, R7, R31.reuse ; /* 0x0000001f071a7220 */ /* 0x080fe20000400000 */ /*53b0*/ FMUL R3, R8, R31 ; /* 0x0000001f08037220 */ /* 0x000fe20000400000 */ /*53c0*/ FMUL R27, R32, R27 ; /* 0x0000001b201b7220 */ /* 0x000fe40000400000 */ /*53d0*/ FFMA R24, R11, R30, -R26 ; /* 0x0000001e0b187223 */ /* 0x000fe2000000081a */ /*53e0*/ MOV R26, 0x3f800000 ; /* 0x3f800000001a7802 */ /* 0x000fe20000000f00 */ /*53f0*/ FMUL R29, R27, R28 ; /* 0x0000001c1b1d7220 */ /* 0x000fe20000400000 */ /*5400*/ FMUL R28, R21, R31 ; /* 0x0000001f151c7220 */ /* 0x000fe20000400000 */ /*5410*/ FFMA R24, -|R31|, R3, R24 ; /* 0x000000031f187223 */ /* 0x000fe20000000318 */ /*5420*/ MOV R3, 0x3f800000 ; /* 0x3f80000000037802 */ /* 0x000fc40000000f00 */ /*5430*/ FFMA R27, R19, R30, -R28 ; /* 0x0000001e131b7223 */ /* 0x000fe2000000081c */ /*5440*/ @P0 FSEL R29, RZ, +INF , !P1 ; /* 0x7f800000ff1d0808 */ /* 0x000fe20004800000 */ /*5450*/ @!P2 BRA 0x5540 ; /* 0x000000e00000a947 */ /* 0x000fea0003800000 */ /*5460*/ FSETP.GTU.AND P0, PT, |R25|, +INF , PT ; /* 0x7f8000001900780b */ /* 0x000fda0003f0c200 */ /*5470*/ @P0 BRA 0x5530 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*5480*/ FSETP.NEU.AND P0, PT, |R25|, +INF , PT ; /* 0x7f8000001900780b */ /* 0x000fc80003f0d200 */ /*5490*/ FSETP.EQ.OR P0, PT, R25, RZ, !P0 ; /* 0x000000ff1900720b */ /* 0x000fda0004702400 */ /*54a0*/ @P0 BRA 0x5500 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*54b0*/ FSETP.GEU.AND P0, PT, R25, RZ, PT ; /* 0x000000ff1900720b */ /* 0x000fe40003f0e000 */ /*54c0*/ MOV R26, R29 ; /* 0x0000001d001a7202 */ /* 0x000fd60000000f00 */ /*54d0*/ @P0 BRA 0x5540 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*54e0*/ MOV R26, R29 ; /* 0x0000001d001a7202 */ /* 0x000fe20000000f00 */ /*54f0*/ BRA 0x5540 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*5500*/ FADD R26, R25, R25 ; /* 0x00000019191a7221 */ /* 0x000fca0000000000 */ /*5510*/ LOP3.LUT R26, R26, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff1a1a7812 */ /* 0x000fe200078ec0ff */ /*5520*/ BRA 0x5540 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*5530*/ FADD R26, R25, 2 ; /* 0x40000000191a7421 */ /* 0x000fe20000000000 */ /*5540*/ FMUL R28, R25, 0.94999998807907104492 ; /* 0x3f733333191c7820 */ /* 0x000fe20000400000 */ /*5550*/ FFMA R31, R30, c[0x0][0x1b0], -R31 ; /* 0x00006c001e1f7a23 */ /* 0x000fc6000000081f */ /*5560*/ FMUL R28, R13, R28 ; /* 0x0000001c0d1c7220 */ /* 0x000fc80000400000 */ /*5570*/ FMUL R29, |R28|.reuse, 16777216 ; /* 0x4b8000001c1d7820 */ /* 0x040fe20000400200 */ /*5580*/ FSETP.GEU.AND P0, PT, |R28|.reuse, 1.175494350822287508e-38, PT ; /* 0x008000001c00780b */ /* 0x040fe40003f0e200 */ /*5590*/ FSETP.NEU.AND P2, PT, R28, 1, PT ; /* 0x3f8000001c00780b */ /* 0x000fe40003f4d000 */ /*55a0*/ FSEL R29, R29, |R28|, !P0 ; /* 0x4000001c1d1d7208 */ /* 0x000fc80004000000 */ /*55b0*/ IADD3 R32, R29, -0x3f3504f3, RZ ; /* 0xc0cafb0d1d207810 */ /* 0x000fc80007ffe0ff */ /*55c0*/ LOP3.LUT R32, R32, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000020207812 */ /* 0x000fc800078ec0ff */ /*55d0*/ IADD3 R33, R29, -R32.reuse, RZ ; /* 0x800000201d217210 */ /* 0x080fe40007ffe0ff */ /*55e0*/ I2FP.F32.S32 R34, R32 ; /* 0x0000002000227245 */ /* 0x000fc60000201400 */ /*55f0*/ FADD R29, R33.reuse, 1 ; /* 0x3f800000211d7421 */ /* 0x040fe20000000000 */ /*5600*/ FADD R39, R33, -1 ; /* 0xbf80000021277421 */ /* 0x000fe20000000000 */ /*5610*/ FSEL R33, RZ, -24, P0 ; /* 0xc1c00000ff217808 */ /* 0x000fc60000000000 */ /*5620*/ FADD R36, R39, R39 ; /* 0x0000002727247221 */ /* 0x000fe20000000000 */ /*5630*/ MUFU.RCP R29, R29 ; /* 0x0000001d001d7308 */ /* 0x000e220000001000 */ /*5640*/ FFMA R37, R34, 1.1920928955078125e-07, R33 ; /* 0x3400000022257823 */ /* 0x000fe40000000021 */ /*5650*/ FMUL R32, R29, R36 ; /* 0x000000241d207220 */ /* 0x001fc80000400000 */ /*5660*/ FADD R34, R39, -R32 ; /* 0x8000002027227221 */ /* 0x000fe20000000000 */ /*5670*/ FMUL R35, R32.reuse, R32 ; /* 0x0000002020237220 */ /* 0x040fe20000400000 */ /*5680*/ FFMA R33, R32, 1.4426950216293334961, R37 ; /* 0x3fb8aa3b20217823 */ /* 0x000fe40000000025 */ /*5690*/ FADD R34, R34, R34 ; /* 0x0000002222227221 */ /* 0x000fe20000000000 */ /*56a0*/ FFMA R0, R35, R0, 0.0032181653659790754318 ; /* 0x3b52e7db23007423 */ /* 0x000fe20000000000 */ /*56b0*/ FADD R37, R37, -R33 ; /* 0x8000002125257221 */ /* 0x000fe40000000000 */ /*56c0*/ FFMA R34, R39, -R32, R34 ; /* 0x8000002027227223 */ /* 0x000fe20000000022 */ /*56d0*/ FFMA R0, R35, R0, 0.018033718690276145935 ; /* 0x3c93bb7323007423 */ /* 0x000fe20000000000 */ /*56e0*/ FFMA R37, R32, 1.4426950216293334961, R37 ; /* 0x3fb8aa3b20257823 */ /* 0x000fc40000000025 */ /*56f0*/ FMUL R34, R29, R34 ; /* 0x000000221d227220 */ /* 0x000fe20000400000 */ /*5700*/ FFMA R0, R35, R0, 0.12022458761930465698 ; /* 0x3df6384f23007423 */ /* 0x000fc60000000000 */ /*5710*/ FFMA R37, R34, 1.4426950216293334961, R37 ; /* 0x3fb8aa3b22257823 */ /* 0x000fe20000000025 */ /*5720*/ FMUL R35, R35, R0 ; /* 0x0000000023237220 */ /* 0x000fc60000400000 */ /*5730*/ FFMA R37, R32, 1.9251366722983220825e-08, R37 ; /* 0x32a55e3420257823 */ /* 0x000fe20000000025 */ /*5740*/ FMUL R0, R35, 3 ; /* 0x4040000023007820 */ /* 0x000fc80000400000 */ /*5750*/ FFMA R0, R34, R0, R37 ; /* 0x0000000022007223 */ /* 0x000fc80000000025 */ /*5760*/ FFMA R32, R32, R35, R0 ; /* 0x0000002320207223 */ /* 0x000fc80000000000 */ /*5770*/ FADD R29, R33, R32 ; /* 0x00000020211d7221 */ /* 0x000fc80000000000 */ /*5780*/ FMUL R0, R29, 2 ; /* 0x400000001d007820 */ /* 0x000fe20000400000 */ /*5790*/ FADD R33, -R33, R29 ; /* 0x0000001d21217221 */ /* 0x000fc60000000100 */ /*57a0*/ FRND R35, R0 ; /* 0x0000000000237307 */ /* 0x000e220000201000 */ /*57b0*/ FADD R33, R32, -R33 ; /* 0x8000002120217221 */ /* 0x000fe20000000000 */ /*57c0*/ FFMA R32, R29, 2, -R0 ; /* 0x400000001d207823 */ /* 0x000fe20000000800 */ /*57d0*/ FSETP.GEU.AND P1, PT, R0, RZ, PT ; /* 0x000000ff0000720b */ /* 0x000fc60003f2e000 */ /*57e0*/ FFMA R32, R33, 2, R32 ; /* 0x4000000021207823 */ /* 0x000fe20000000020 */ /*57f0*/ FADD R29, R0, -R35 ; /* 0x80000023001d7221 */ /* 0x001fe20000000000 */ /*5800*/ FSETP.GT.AND P0, PT, R35, RZ, PT ; /* 0x000000ff2300720b */ /* 0x000fc60003f04000 */ /*5810*/ FADD R29, R32, R29 ; /* 0x0000001d201d7221 */ /* 0x000fe20000000000 */ /*5820*/ SEL R33, RZ, 0x83000000, P0 ; /* 0x83000000ff217807 */ /* 0x000fe20000000000 */ /*5830*/ F2I.NTZ R32, R0 ; /* 0x0000000000207305 */ /* 0x000e220000203100 */ /*5840*/ FSETP.GT.AND P0, PT, |R0|, 152, PT ; /* 0x431800000000780b */ /* 0x000fe20003f04200 */ /*5850*/ FFMA R2, R29, R2, 0.0013391353422775864601 ; /* 0x3aaf85ed1d027423 */ /* 0x000fe20000000002 */ /*5860*/ IADD3 R35, R33, 0x7f000000, RZ ; /* 0x7f00000021237810 */ /* 0x000fc60007ffe0ff */ /*5870*/ FFMA R2, R29, R2, 0.0096188392490148544312 ; /* 0x3c1d98561d027423 */ /* 0x000fc80000000002 */ /*5880*/ FFMA R2, R29, R2, 0.055503588169813156128 ; /* 0x3d6357bb1d027423 */ /* 0x000fc80000000002 */ /*5890*/ FFMA R2, R29, R2, 0.24022644758224487305 ; /* 0x3e75fdec1d027423 */ /* 0x000fe20000000002 */ /*58a0*/ LEA R33, R32, -R33, 0x17 ; /* 0x8000002120217211 */ /* 0x001fc600078eb8ff */ /*58b0*/ FFMA R2, R29, R2, 0.69314718246459960938 ; /* 0x3f3172181d027423 */ /* 0x000fc80000000002 */ /*58c0*/ FFMA R2, R29, R2, 1 ; /* 0x3f8000001d027423 */ /* 0x000fc80000000002 */ /*58d0*/ FMUL R2, R2, R35 ; /* 0x0000002302027220 */ /* 0x000fc80000400000 */ /*58e0*/ FMUL R2, R2, R33 ; /* 0x0000002102027220 */ /* 0x000fe20000400000 */ /*58f0*/ @P0 FSEL R2, RZ, +INF , !P1 ; /* 0x7f800000ff020808 */ /* 0x000fe20004800000 */ /*5900*/ @!P2 BRA 0x59f0 ; /* 0x000000e00000a947 */ /* 0x000fea0003800000 */ /*5910*/ FSETP.GTU.AND P0, PT, |R28|, +INF , PT ; /* 0x7f8000001c00780b */ /* 0x000fda0003f0c200 */ /*5920*/ @P0 BRA 0x59e0 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*5930*/ FSETP.NEU.AND P0, PT, |R28|, +INF , PT ; /* 0x7f8000001c00780b */ /* 0x000fc80003f0d200 */ /*5940*/ FSETP.EQ.OR P0, PT, R28, RZ, !P0 ; /* 0x000000ff1c00720b */ /* 0x000fda0004702400 */ /*5950*/ @P0 BRA 0x59b0 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*5960*/ FSETP.GEU.AND P0, PT, R28, RZ, PT ; /* 0x000000ff1c00720b */ /* 0x000fe40003f0e000 */ /*5970*/ MOV R3, R2 ; /* 0x0000000200037202 */ /* 0x000fd60000000f00 */ /*5980*/ @P0 BRA 0x59f0 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*5990*/ MOV R3, R2 ; /* 0x0000000200037202 */ /* 0x000fe20000000f00 */ /*59a0*/ BRA 0x59f0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*59b0*/ FADD R3, R28, R28 ; /* 0x0000001c1c037221 */ /* 0x000fca0000000000 */ /*59c0*/ LOP3.LUT R3, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03037812 */ /* 0x000fe200078ec0ff */ /*59d0*/ BRA 0x59f0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*59e0*/ FADD R3, R28, 2 ; /* 0x400000001c037421 */ /* 0x000fe20000000000 */ /*59f0*/ FFMA R0, R16, -R31, 0.34900000691413879395 ; /* 0x3eb2b02110007423 */ /* 0x000fe2000000081f */ /*5a00*/ MUFU.RCP R2, R17 ; /* 0x0000001100027308 */ /* 0x000e220000001000 */ /*5a10*/ FMUL R27, R27, c[0x0][0x1a4] ; /* 0x000069001b1b7a20 */ /* 0x000fe20000400000 */ /*5a20*/ FMUL R30, R15, R26.reuse ; /* 0x0000001a0f1e7220 */ /* 0x080fe20000400000 */ /*5a30*/ FMUL R0, R0, 3.1400001049041748047 ; /* 0x4048f5c300007820 */ /* 0x000fe40000400000 */ /*5a40*/ FMUL R27, R27, c[0x0][0x1a0] ; /* 0x000068001b1b7a20 */ /* 0x000fe20000400000 */ /*5a50*/ FMUL R30, R30, 1000 ; /* 0x447a00001e1e7820 */ /* 0x000fe20000400000 */ /*5a60*/ FMUL R0, R0, 1000 ; /* 0x447a000000007820 */ /* 0x000fe40000400000 */ /*5a70*/ FMUL R27, R27, R26 ; /* 0x0000001a1b1b7220 */ /* 0x000fc40000400000 */ /*5a80*/ FMUL R0, R0, 6 ; /* 0x40c0000000007820 */ /* 0x000fc80000400000 */ /*5a90*/ FMUL R0, R0, R3 ; /* 0x0000000300007220 */ /* 0x000fe20000400000 */ /*5aa0*/ FFMA R29, -R17, R2, 1 ; /* 0x3f800000111d7423 */ /* 0x001fc60000000102 */ /*5ab0*/ FCHK P0, R0, R17 ; /* 0x0000001100007302 */ /* 0x000e220000000000 */ /*5ac0*/ FFMA R29, R2, R29, R2 ; /* 0x0000001d021d7223 */ /* 0x000fc80000000002 */ /*5ad0*/ FFMA R2, R0, R29, RZ ; /* 0x0000001d00027223 */ /* 0x000fc800000000ff */ /*5ae0*/ FFMA R3, -R17, R2, R0 ; /* 0x0000000211037223 */ /* 0x000fc80000000100 */ /*5af0*/ FFMA R3, R29, R3, R2 ; /* 0x000000031d037223 */ /* 0x000fe20000000002 */ /*5b00*/ FMUL R29, R27, 1000 ; /* 0x447a00001b1d7820 */ /* 0x000fe20000400000 */ /*5b10*/ @!P0 BRA 0x5b60 ; /* 0x0000004000008947 */ /* 0x001fea0003800000 */ /*5b20*/ MOV R3, R17 ; /* 0x0000001100037202 */ /* 0x000fe40000000f00 */ /*5b30*/ MOV R2, 0x5b50 ; /* 0x00005b5000027802 */ /* 0x000fe40000000f00 */ /*5b40*/ CALL.REL.NOINC 0x8050 ; /* 0x0000250000007944 */ /* 0x000fea0003c00000 */ /*5b50*/ MOV R3, R0 ; /* 0x0000000000037202 */ /* 0x001fe40000000f00 */ /*5b60*/ FMUL R31, R18, R31 ; /* 0x0000001f121f7220 */ /* 0x000fe20000400000 */ /*5b70*/ FMUL R24, R24, c[0x0][0x1a4] ; /* 0x0000690018187a20 */ /* 0x000fe20000400000 */ /*5b80*/ FSETP.GT.AND P1, PT, R4.reuse, RZ, PT ; /* 0x000000ff0400720b */ /* 0x040fe20003f24000 */ /*5b90*/ FMUL R33, R4, c[0x0][0x1ac] ; /* 0x00006b0004217a20 */ /* 0x000fe20000400000 */ /*5ba0*/ FMUL R0, R31, -500 ; /* 0xc3fa00001f007820 */ /* 0x000fe20000400000 */ /*5bb0*/ FMUL R31, R24, c[0x0][0x1a0] ; /* 0x00006800181f7a20 */ /* 0x000fe20000400000 */ /*5bc0*/ FSETP.GT.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720b */ /* 0x000fe20003f04000 */ /*5bd0*/ FMUL R33, R33, R6 ; /* 0x0000000621217220 */ /* 0x000fe20000400000 */ /*5be0*/ FMUL R27, R23, R0 ; /* 0x00000000171b7220 */ /* 0x000fe20000400000 */ /*5bf0*/ FMUL R31, R31, R26 ; /* 0x0000001a1f1f7220 */ /* 0x000fe20000400000 */ /*5c00*/ FFMA R2, R25, -2.2300000190734863281, R22 ; /* 0xc00eb85219027823 */ /* 0x000fc40000000016 */ /*5c10*/ FMUL R27, R27, R26 ; /* 0x0000001a1b1b7220 */ /* 0x000fe20000400000 */ /*5c20*/ FMUL R0, R31, 1000 ; /* 0x447a00001f007820 */ /* 0x000fe20000400000 */ /*5c30*/ FMUL R2, R2, 1000000 ; /* 0x4974240002027820 */ /* 0x000fe20000400000 */ /*5c40*/ @P1 FMUL R33, R33, 1.0164999961853027344 ; /* 0x3f821cac21211820 */ /* 0x000fe20000400000 */ /*5c50*/ FFMA R3, R20, R27, R3 ; /* 0x0000001b14037223 */ /* 0x000fe20000000003 */ /*5c60*/ FMUL R27, R5, c[0x0][0x1ac] ; /* 0x00006b00051b7a20 */ /* 0x000fe20000400000 */ /*5c70*/ FMUL R26, R2, c[0x0][0x1b0] ; /* 0x00006c00021a7a20 */ /* 0x000fe40000400000 */ /*5c80*/ FADD R3, R3, R3 ; /* 0x0000000303037221 */ /* 0x000fe20000000000 */ /*5c90*/ FMUL R27, R27, R6 ; /* 0x000000061b1b7220 */ /* 0x000fe20000400000 */ /*5ca0*/ FFMA R25, R29, 0.5, R26 ; /* 0x3f0000001d197823 */ /* 0x000fc4000000001a */ /*5cb0*/ FFMA R0, R0, 0.5, -R3 ; /* 0x3f00000000007823 */ /* 0x000fe20000000803 */ /*5cc0*/ @!P0 FMUL R27, R27, 1.0900000333786010742 ; /* 0x3f8b851f1b1b8820 */ /* 0x000fe20000400000 */ /*5cd0*/ FMUL R25, R25, R12 ; /* 0x0000000c19197220 */ /* 0x000fe40000400000 */ /*5ce0*/ FADD R33, R0, -R33 ; /* 0x8000002100217221 */ /* 0x000fe20000000000 */ /*5cf0*/ FFMA R27, R30, -0.5, R27 ; /* 0xbf0000001e1b7823 */ /* 0x000fc6000000001b */ /*5d00*/ FMUL R24, R33, R10 ; /* 0x0000000a21187220 */ /* 0x000fe20000400000 */ /*5d10*/ FADD R26, R2, R27 ; /* 0x0000001b021a7221 */ /* 0x000fc60000000000 */ /*5d20*/ FFMA R28, R24, 0.5, R5 ; /* 0x3f000000181c7823 */ /* 0x000fe20000000005 */ /*5d30*/ FMUL R27, R26, R9 ; /* 0x000000091a1b7220 */ /* 0x000fe20000400000 */ /*5d40*/ FFMA R26, R25, 0.5, R6 ; /* 0x3f000000191a7823 */ /* 0x000fe40000000006 */ /*5d50*/ FMUL R31, R28.reuse, c[0x0][0x1ac] ; /* 0x00006b001c1f7a20 */ /* 0x040fe20000400000 */ /*5d60*/ FSETP.GT.AND P0, PT, R28, RZ, PT ; /* 0x000000ff1c00720b */ /* 0x000fe20003f04000 */ /*5d70*/ FFMA R32, R27, 0.5, R4 ; /* 0x3f0000001b207823 */ /* 0x000fe20000000004 */ /*5d80*/ FMUL R28, R3, c[0x0][0x1b0] ; /* 0x00006c00031c7a20 */ /* 0x000fe20000400000 */ /*5d90*/ FMUL R31, R26, R31 ; /* 0x0000001f1a1f7220 */ /* 0x000fe40000400000 */ /*5da0*/ FMUL R33, R32.reuse, c[0x0][0x1ac] ; /* 0x00006b0020217a20 */ /* 0x040fe20000400000 */ /*5db0*/ FSETP.GT.AND P1, PT, R32, RZ, PT ; /* 0x000000ff2000720b */ /* 0x000fe20003f24000 */ /*5dc0*/ FFMA R3, R29, 0.5, R28 ; /* 0x3f0000001d037823 */ /* 0x000fc4000000001c */ /*5dd0*/ FMUL R33, R26, R33 ; /* 0x000000211a217220 */ /* 0x000fe40000400000 */ /*5de0*/ FMUL R3, R3, R12 ; /* 0x0000000c03037220 */ /* 0x000fe40000400000 */ /*5df0*/ @!P0 FMUL R31, R31, 1.0900000333786010742 ; /* 0x3f8b851f1f1f8820 */ /* 0x000fc80000400000 */ /*5e00*/ FFMA R31, R30, -0.5, R31 ; /* 0xbf0000001e1f7823 */ /* 0x000fe4000000001f */ /*5e10*/ @P1 FMUL R33, R33, 1.0164999961853027344 ; /* 0x3f821cac21211820 */ /* 0x000fe40000400000 */ /*5e20*/ FADD R26, R2, R31 ; /* 0x0000001f021a7221 */ /* 0x000fe20000000000 */ /*5e30*/ FFMA R31, R3, 0.5, R6.reuse ; /* 0x3f000000031f7823 */ /* 0x100fe20000000006 */ /*5e40*/ FADD R33, R0, -R33 ; /* 0x8000002100217221 */ /* 0x000fe40000000000 */ /*5e50*/ FMUL R26, R26, R9 ; /* 0x000000091a1a7220 */ /* 0x000fe40000400000 */ /*5e60*/ FMUL R28, R33, R10 ; /* 0x0000000a211c7220 */ /* 0x000fe20000400000 */ /*5e70*/ FADD R33, R3, R6 ; /* 0x0000000603217221 */ /* 0x000fe20000000000 */ /*5e80*/ FFMA R32, R26.reuse, 0.5, R4 ; /* 0x3f0000001a207823 */ /* 0x040fe20000000004 */ /*5e90*/ FFMA R26, R26, 2, R27 ; /* 0x400000001a1a7823 */ /* 0x000fe2000000001b */ /*5ea0*/ FFMA R29, R28.reuse, 0.5, R5 ; /* 0x3f0000001c1d7823 */ /* 0x040fe20000000005 */ /*5eb0*/ FFMA R27, R28, 2, R24 ; /* 0x400000001c1b7823 */ /* 0x000fe20000000018 */ /*5ec0*/ FMUL R34, R32.reuse, c[0x0][0x1ac] ; /* 0x00006b0020227a20 */ /* 0x040fe20000400000 */ /*5ed0*/ FSETP.GT.AND P1, PT, R32, RZ, PT ; /* 0x000000ff2000720b */ /* 0x000fe20003f24000 */ /*5ee0*/ FMUL R32, R29.reuse, c[0x0][0x1ac] ; /* 0x00006b001d207a20 */ /* 0x040fe20000400000 */ /*5ef0*/ FSETP.GT.AND P0, PT, R29, RZ, PT ; /* 0x000000ff1d00720b */ /* 0x000fe20003f04000 */ /*5f00*/ FMUL R29, R31, R34 ; /* 0x000000221f1d7220 */ /* 0x000fc40000400000 */ /*5f10*/ FMUL R31, R31, R32 ; /* 0x000000201f1f7220 */ /* 0x000fd00000400000 */ /*5f20*/ @P1 FMUL R29, R29, 1.0164999961853027344 ; /* 0x3f821cac1d1d1820 */ /* 0x000fe40000400000 */ /*5f30*/ @!P0 FMUL R31, R31, 1.0900000333786010742 ; /* 0x3f8b851f1f1f8820 */ /* 0x000fe40000400000 */ /*5f40*/ FADD R29, R0, -R29 ; /* 0x8000001d001d7221 */ /* 0x000fe40000000000 */ /*5f50*/ FFMA R31, R30, -0.5, R31 ; /* 0xbf0000001e1f7823 */ /* 0x000fe4000000001f */ /*5f60*/ FMUL R32, R29, R10 ; /* 0x0000000a1d207220 */ /* 0x000fe40000400000 */ /*5f70*/ FADD R34, R2, R31 ; /* 0x0000001f02227221 */ /* 0x000fc40000000000 */ /*5f80*/ FADD R31, R32, R5 ; /* 0x00000005201f7221 */ /* 0x000fe20000000000 */ /*5f90*/ FSETP.GT.AND P0, PT, R5, -R32, PT ; /* 0x800000200500720b */ /* 0x000fe20003f04000 */ /*5fa0*/ FMUL R29, R34, R9 ; /* 0x00000009221d7220 */ /* 0x000fe20000400000 */ /*5fb0*/ FFMA R32, R32, 2, R27 ; /* 0x4000000020207823 */ /* 0x000fe2000000001b */ /*5fc0*/ FMUL R34, R31, c[0x0][0x1ac] ; /* 0x00006b001f227a20 */ /* 0x000fe40000400000 */ /*5fd0*/ FADD R35, R29, R4 ; /* 0x000000041d237221 */ /* 0x000fe20000000000 */ /*5fe0*/ FSETP.GT.AND P1, PT, R4, -R29, PT ; /* 0x8000001d0400720b */ /* 0x000fe20003f24000 */ /*5ff0*/ FMUL R31, R33, R34 ; /* 0x00000022211f7220 */ /* 0x000fe20000400000 */ /*6000*/ FFMA R29, R29, 2, R26 ; /* 0x400000001d1d7823 */ /* 0x000fe2000000001a */ /*6010*/ FMUL R34, R35, c[0x0][0x1ac] ; /* 0x00006b0023227a20 */ /* 0x000fe20000400000 */ /*6020*/ FFMA R26, R3, 2, R25 ; /* 0x40000000031a7823 */ /* 0x000fc60000000019 */ /*6030*/ @!P0 FMUL R31, R31, 1.0900000333786010742 ; /* 0x3f8b851f1f1f8820 */ /* 0x000fe20000400000 */ /*6040*/ FMUL R33, R33, R34 ; /* 0x0000002221217220 */ /* 0x000fe20000400000 */ /*6050*/ FFMA R26, R3, 2, R26 ; /* 0x40000000031a7823 */ /* 0x000fe4000000001a */ /*6060*/ FFMA R31, R30, -0.5, R31 ; /* 0xbf0000001e1f7823 */ /* 0x000fe4000000001f */ /*6070*/ @P1 FMUL R33, R33, 1.0164999961853027344 ; /* 0x3f821cac21211820 */ /* 0x000fe20000400000 */ /*6080*/ FADD R27, R3, R26 ; /* 0x0000001a031b7221 */ /* 0x000fe20000000000 */ /*6090*/ FADD R24, R2, R31 ; /* 0x0000001f02187221 */ /* 0x000fe40000000000 */ /*60a0*/ FADD R33, R0, -R33 ; /* 0x8000002100217221 */ /* 0x000fe20000000000 */ /*60b0*/ FFMA R6, R27, 0.16666667163372039795, R6 ; /* 0x3e2aaaab1b067823 */ /* 0x000fe20000000006 */ /*60c0*/ FFMA R29, R24, R9, R29 ; /* 0x00000009181d7223 */ /* 0x000fc4000000001d */ /*60d0*/ FFMA R32, R33, R10, R32 ; /* 0x0000000a21207223 */ /* 0x000fe20000000020 */ /*60e0*/ FFMA R25, R25, 0.5, R6 ; /* 0x3f00000019197823 */ /* 0x000fe20000000006 */ /*60f0*/ FFMA R4, R29, 0.16666667163372039795, R4 ; /* 0x3e2aaaab1d047823 */ /* 0x000fe40000000004 */ /*6100*/ FFMA R5, R32, 0.16666667163372039795, R5 ; /* 0x3e2aaaab20057823 */ /* 0x000fe40000000005 */ /*6110*/ FMUL R31, R4.reuse, c[0x0][0x1ac] ; /* 0x00006b00041f7a20 */ /* 0x040fe20000400000 */ /*6120*/ FSETP.GT.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720b */ /* 0x000fe20003f24000 */ /*6130*/ FMUL R29, R5.reuse, c[0x0][0x1ac] ; /* 0x00006b00051d7a20 */ /* 0x040fe20000400000 */ /*6140*/ FSETP.GT.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720b */ /* 0x000fe20003f04000 */ /*6150*/ FMUL R31, R6, R31 ; /* 0x0000001f061f7220 */ /* 0x000fc40000400000 */ /*6160*/ FMUL R29, R6, R29 ; /* 0x0000001d061d7220 */ /* 0x000fd00000400000 */ /*6170*/ @P1 FMUL R31, R31, 1.0164999961853027344 ; /* 0x3f821cac1f1f1820 */ /* 0x000fe40000400000 */ /*6180*/ @!P0 FMUL R29, R29, 1.0900000333786010742 ; /* 0x3f8b851f1d1d8820 */ /* 0x000fe40000400000 */ /*6190*/ FADD R31, R0, -R31 ; /* 0x8000001f001f7221 */ /* 0x000fe40000000000 */ /*61a0*/ FFMA R29, R30, -0.5, R29 ; /* 0xbf0000001e1d7823 */ /* 0x000fe4000000001d */ /*61b0*/ FMUL R24, R31, R10 ; /* 0x0000000a1f187220 */ /* 0x000fe40000400000 */ /*61c0*/ FADD R26, R2, R29 ; /* 0x0000001d021a7221 */ /* 0x000fc40000000000 */ /*61d0*/ FFMA R28, R24, 0.5, R5 ; /* 0x3f000000181c7823 */ /* 0x000fe40000000005 */ /*61e0*/ FMUL R29, R26, R9 ; /* 0x000000091a1d7220 */ /* 0x000fc60000400000 */ /*61f0*/ FSETP.GT.AND P0, PT, R28.reuse, RZ, PT ; /* 0x000000ff1c00720b */ /* 0x040fe20003f04000 */ /*6200*/ FFMA R26, R29, 0.5, R4 ; /* 0x3f0000001d1a7823 */ /* 0x000fe20000000004 */ /*6210*/ FMUL R28, R28, c[0x0][0x1ac] ; /* 0x00006b001c1c7a20 */ /* 0x000fc80000400000 */ /*6220*/ FSETP.GT.AND P1, PT, R26.reuse, RZ, PT ; /* 0x000000ff1a00720b */ /* 0x040fe20003f24000 */ /*6230*/ FMUL R31, R25, R28 ; /* 0x0000001c191f7220 */ /* 0x000fe20000400000 */ /*6240*/ FMUL R26, R26, c[0x0][0x1ac] ; /* 0x00006b001a1a7a20 */ /* 0x000fe20000400000 */ /*6250*/ FFMA R28, R3, 0.5, R6 ; /* 0x3f000000031c7823 */ /* 0x000fc60000000006 */ /*6260*/ FMUL R25, R25, R26 ; /* 0x0000001a19197220 */ /* 0x000fe20000400000 */ /*6270*/ @!P0 FMUL R31, R31, 1.0900000333786010742 ; /* 0x3f8b851f1f1f8820 */ /* 0x000fc80000400000 */ /*6280*/ FFMA R31, R30, -0.5, R31 ; /* 0xbf0000001e1f7823 */ /* 0x000fe4000000001f */ /*6290*/ @P1 FMUL R25, R25, 1.0164999961853027344 ; /* 0x3f821cac19191820 */ /* 0x000fe40000400000 */ /*62a0*/ FADD R26, R2, R31 ; /* 0x0000001f021a7221 */ /* 0x000fe40000000000 */ /*62b0*/ FADD R31, R0, -R25 ; /* 0x80000019001f7221 */ /* 0x000fe40000000000 */ /*62c0*/ FMUL R25, R26, R9 ; /* 0x000000091a197220 */ /* 0x000fe40000400000 */ /*62d0*/ FMUL R31, R31, R10 ; /* 0x0000000a1f1f7220 */ /* 0x000fc40000400000 */ /*62e0*/ FFMA R32, R25.reuse, 0.5, R4 ; /* 0x3f00000019207823 */ /* 0x040fe20000000004 */ /*62f0*/ FFMA R34, R25, 2, R29 ; /* 0x4000000019227823 */ /* 0x000fe2000000001d */ /*6300*/ FFMA R26, R31, 0.5, R5 ; /* 0x3f0000001f1a7823 */ /* 0x000fe40000000005 */ /*6310*/ FMUL R35, R32.reuse, c[0x0][0x1ac] ; /* 0x00006b0020237a20 */ /* 0x040fe20000400000 */ /*6320*/ FSETP.GT.AND P1, PT, R32, RZ, PT ; /* 0x000000ff2000720b */ /* 0x000fe20003f24000 */ /*6330*/ FMUL R33, R26.reuse, c[0x0][0x1ac] ; /* 0x00006b001a217a20 */ /* 0x040fe20000400000 */ /*6340*/ FSETP.GT.AND P0, PT, R26, RZ, PT ; /* 0x000000ff1a00720b */ /* 0x000fe20003f04000 */ /*6350*/ FMUL R35, R28.reuse, R35 ; /* 0x000000231c237220 */ /* 0x040fe40000400000 */ /*6360*/ FMUL R33, R28, R33 ; /* 0x000000211c217220 */ /* 0x000fd00000400000 */ /*6370*/ @P1 FMUL R35, R35, 1.0164999961853027344 ; /* 0x3f821cac23231820 */ /* 0x000fe40000400000 */ /*6380*/ @!P0 FMUL R33, R33, 1.0900000333786010742 ; /* 0x3f8b851f21218820 */ /* 0x000fe40000400000 */ /*6390*/ FADD R35, R0, -R35 ; /* 0x8000002300237221 */ /* 0x000fe40000000000 */ /*63a0*/ FFMA R33, R30, -0.5, R33 ; /* 0xbf0000001e217823 */ /* 0x000fe40000000021 */ /*63b0*/ FMUL R26, R35, R10 ; /* 0x0000000a231a7220 */ /* 0x000fe40000400000 */ /*63c0*/ FADD R28, R2, R33 ; /* 0x00000021021c7221 */ /* 0x000fc40000000000 */ /*63d0*/ FADD R32, R5.reuse, R26 ; /* 0x0000001a05207221 */ /* 0x040fe20000000000 */ /*63e0*/ FSETP.GT.AND P0, PT, R5, -R26, PT ; /* 0x8000001a0500720b */ /* 0x000fe20003f04000 */ /*63f0*/ FMUL R35, R28, R9 ; /* 0x000000091c237220 */ /* 0x000fe20000400000 */ /*6400*/ FADD R28, R3, R6 ; /* 0x00000006031c7221 */ /* 0x000fe20000000000 */ /*6410*/ FMUL R33, R32, c[0x0][0x1ac] ; /* 0x00006b0020217a20 */ /* 0x000fe20000400000 */ /*6420*/ FFMA R3, R31, 2, R24 ; /* 0x400000001f037823 */ /* 0x000fe20000000018 */ /*6430*/ FADD R24, R4.reuse, R35 ; /* 0x0000002304187221 */ /* 0x040fe20000000000 */ /*6440*/ FSETP.GT.AND P1, PT, R4, -R35, PT ; /* 0x800000230400720b */ /* 0x000fe20003f24000 */ /*6450*/ FMUL R31, R28, R33 ; /* 0x000000211c1f7220 */ /* 0x000fe20000400000 */ /*6460*/ FFMA R32, R27, 0.16666667163372039795, R6 ; /* 0x3e2aaaab1b207823 */ /* 0x000fe20000000006 */ /*6470*/ FMUL R25, R24, c[0x0][0x1ac] ; /* 0x00006b0018197a20 */ /* 0x000fe20000400000 */ /*6480*/ MOV R33, 0x4 ; /* 0x0000000400217802 */ /* 0x000fe20000000f00 */ /*6490*/ FFMA R27, R35, 2, R34 ; /* 0x40000000231b7823 */ /* 0x000fe20000000022 */ /*64a0*/ FMUL R36, R32, 0.63661974668502807617 ; /* 0x3f22f98320247820 */ /* 0x000fe20000400000 */ /*64b0*/ @!P0 FMUL R31, R31, 1.0900000333786010742 ; /* 0x3f8b851f1f1f8820 */ /* 0x000fe20000400000 */ /*64c0*/ FMUL R25, R28, R25 ; /* 0x000000191c197220 */ /* 0x000fe20000400000 */ /*64d0*/ FFMA R26, R26, 2, R3 ; /* 0x400000001a1a7823 */ /* 0x000fe20000000003 */ /*64e0*/ IMAD.WIDE R34, R14, R33.reuse, c[0x0][0x160] ; /* 0x000058000e227625 */ /* 0x080fe200078e0221 */ /*64f0*/ FFMA R31, R30, -0.5, R31 ; /* 0xbf0000001e1f7823 */ /* 0x000fe2000000001f */ /*6500*/ F2I.NTZ R36, R36 ; /* 0x0000002400247305 */ /* 0x000e220000203100 */ /*6510*/ @P1 FMUL R25, R25, 1.0164999961853027344 ; /* 0x3f821cac19191820 */ /* 0x000fe20000400000 */ /*6520*/ IMAD.WIDE R28, R14, R33.reuse, c[0x0][0x168] ; /* 0x00005a000e1c7625 */ /* 0x080fe200078e0221 */ /*6530*/ FADD R2, R2, R31 ; /* 0x0000001f02027221 */ /* 0x000fe20000000000 */ /*6540*/ STG.E [R34.64], R4 ; /* 0x0000000422007986 */ /* 0x000fe2000c101904 */ /*6550*/ FADD R25, R0, -R25 ; /* 0x8000001900197221 */ /* 0x000fe20000000000 */ /*6560*/ IMAD.WIDE R30, R14, R33, c[0x0][0x170] ; /* 0x00005c000e1e7625 */ /* 0x000fe200078e0221 */ /*6570*/ FFMA R3, R2, R9, R27 ; /* 0x0000000902037223 */ /* 0x000fe2000000001b */ /*6580*/ STG.E [R28.64], R5 ; /* 0x000000051c007986 */ /* 0x0001e2000c101904 */ /*6590*/ FFMA R0, R25, R10, R26 ; /* 0x0000000a19007223 */ /* 0x000fe2000000001a */ /*65a0*/ IMAD.WIDE R26, R14, R33.reuse, c[0x0][0x178] ; /* 0x00005e000e1a7625 */ /* 0x080fe200078e0221 */ /*65b0*/ FFMA R37, R3, 0.16666667163372039795, R4 ; /* 0x3e2aaaab03257823 */ /* 0x000fe20000000004 */ /*65c0*/ STG.E [R30.64], R6 ; /* 0x000000061e007986 */ /* 0x0003e2000c101904 */ /*65d0*/ FFMA R39, R0, 0.16666667163372039795, R5 ; /* 0x3e2aaaab00277823 */ /* 0x000fe20000000005 */ /*65e0*/ IMAD.WIDE R24, R14, R33.reuse, c[0x0][0x180] ; /* 0x000060000e187625 */ /* 0x080fe200078e0221 */ /*65f0*/ FSETP.GE.AND P0, PT, |R32|, 105615, PT ; /* 0x47ce47802000780b */ /* 0x000fe20003f06200 */ /*6600*/ STG.E [R26.64], R37 ; /* 0x000000251a007986 */ /* 0x0003e4000c101904 */ /*6610*/ IMAD.WIDE R2, R14, R33, c[0x0][0x188] ; /* 0x000062000e027625 */ /* 0x000fc400078e0221 */ /*6620*/ STG.E [R24.64], R39 ; /* 0x0000002718007986 */ /* 0x0003e2000c101904 */ /*6630*/ I2FP.F32.S32 R29, R36 ; /* 0x00000024001d7245 */ /* 0x001fc60000201400 */ /*6640*/ STG.E [R2.64], R32 ; /* 0x0000002002007986 */ /* 0x0003e4000c101904 */ /*6650*/ FFMA R0, R29, -1.5707962512969970703, R32 ; /* 0xbfc90fda1d007823 */ /* 0x000fc80000000020 */ /*6660*/ FFMA R0, R29, -7.5497894158615963534e-08, R0 ; /* 0xb3a221681d007823 */ /* 0x000fc80000000000 */ /*6670*/ FFMA R28, R29, -5.3903029534742383927e-15, R0 ; /* 0xa7c234c51d1c7823 */ /* 0x000fe20000000000 */ /*6680*/ MOV R29, R36 ; /* 0x00000024001d7202 */ /* 0x000fc80000000f00 */ /*6690*/ MOV R0, R28 ; /* 0x0000001c00007202 */ /* 0x000fe20000000f00 */ /*66a0*/ @!P0 BRA 0x6a80 ; /* 0x000003d000008947 */ /* 0x000fea0003800000 */ /*66b0*/ FSETP.NEU.AND P1, PT, |R32|, +INF , PT ; /* 0x7f8000002000780b */ /* 0x002fda0003f2d200 */ /*66c0*/ @!P1 BRA 0x6a60 ; /* 0x0000039000009947 */ /* 0x000fea0003800000 */ /*66d0*/ SHF.R.U32.HI R0, RZ, 0x17, R32 ; /* 0x00000017ff007819 */ /* 0x000fe20000011620 */ /*66e0*/ CS2R R26, SRZ ; /* 0x00000000001a7805 */ /* 0x000fe2000001ff00 */ /*66f0*/ SHF.L.U32 R2, R32, 0x8, RZ ; /* 0x0000000820027819 */ /* 0x000fe200000006ff */ /*6700*/ ULDC.64 UR6, c[0x4][0x0] ; /* 0x0100000000067ab9 */ /* 0x000fe20000000a00 */ /*6710*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fe400078ec0ff */ /*6720*/ MOV R35, RZ ; /* 0x000000ff00237202 */ /* 0x000fe40000000f00 */ /*6730*/ IADD3 R30, R0, -0x80, RZ ; /* 0xffffff80001e7810 */ /* 0x000fe40007ffe0ff */ /*6740*/ MOV R0, R1 ; /* 0x0000000100007202 */ /* 0x000fc40000000f00 */ /*6750*/ LOP3.LUT R37, R2, 0x80000000, RZ, 0xfc, !PT ; /* 0x8000000002257812 */ /* 0x000fe400078efcff */ /*6760*/ SHF.R.U32.HI R34, RZ, 0x5, R30 ; /* 0x00000005ff227819 */ /* 0x000fe4000001161e */ /*6770*/ MOV R2, UR6 ; /* 0x0000000600027c02 */ /* 0x000fe40008000f00 */ /*6780*/ MOV R3, UR7 ; /* 0x0000000700037c02 */ /* 0x000fca0008000f00 */ /*6790*/ LDG.E.CONSTANT R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e9900 */ /*67a0*/ IADD3 R27, R27, 0x1, RZ ; /* 0x000000011b1b7810 */ /* 0x000fe20007ffe0ff */ /*67b0*/ UIADD3 UR6, UP0, UR6, 0x4, URZ ; /* 0x0000000406067890 */ /* 0x000fc6000ff1e03f */ /*67c0*/ ISETP.NE.AND P1, PT, R27, 0x6, PT ; /* 0x000000061b00780c */ /* 0x000fe20003f25270 */ /*67d0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*67e0*/ IMAD.WIDE.U32 R24, R2, R37, RZ ; /* 0x0000002502187225 */ /* 0x004fca00078e00ff */ /*67f0*/ IADD3 R31, P2, R24, R26, RZ ; /* 0x0000001a181f7210 */ /* 0x000fc80007f5e0ff */ /*6800*/ IADD3.X R26, R25, R35, RZ, P2, !PT ; /* 0x00000023191a7210 */ /* 0x000fe200017fe4ff */ /*6810*/ STL [R0], R31 ; /* 0x0000001f00007387 */ /* 0x0001e40000100800 */ /*6820*/ IADD3 R0, R0, 0x4, RZ ; /* 0x0000000400007810 */ /* 0x001fe20007ffe0ff */ /*6830*/ @P1 BRA 0x6770 ; /* 0xffffff3000001947 */ /* 0x000fea000383ffff */ /*6840*/ LOP3.LUT P1, R27, R30, 0x1f, RZ, 0xc0, !PT ; /* 0x0000001f1e1b7812 */ /* 0x000fe2000782c0ff */ /*6850*/ STL [R1+0x18], R26 ; /* 0x0000181a01007387 */ /* 0x0001e20000100800 */ /*6860*/ IADD3 R2, -R34.reuse, 0x4, RZ ; /* 0x0000000422027810 */ /* 0x040fe40007ffe1ff */ /*6870*/ IADD3 R0, -R34, 0x6, RZ ; /* 0x0000000622007810 */ /* 0x000fc80007ffe1ff */ /*6880*/ LEA R30, R0, R1, 0x2 ; /* 0x00000001001e7211 */ /* 0x000fca00078e10ff */ /*6890*/ @P1 LEA R31, R2, R1, 0x2 ; /* 0x00000001021f1211 */ /* 0x000fe200078e10ff */ /*68a0*/ LDL R0, [R30] ; /* 0x000000001e007983 */ /* 0x000ea80000100800 */ /*68b0*/ @P1 LDL R25, [R31] ; /* 0x000000001f191983 */ /* 0x000ee80000100800 */ /*68c0*/ LDL R3, [R30+-0x4] ; /* 0xfffffc001e037983 */ /* 0x000f220000100800 */ /*68d0*/ @P1 IADD3 R2, -R27, 0x20, RZ ; /* 0x000000201b021810 */ /* 0x000fc40007ffe1ff */ /*68e0*/ LOP3.LUT P2, R26, R32, 0x80000000, RZ, 0xc0, !PT ; /* 0x80000000201a7812 */ /* 0x001fe4000784c0ff */ /*68f0*/ @P1 SHF.R.U32.HI R24, RZ, R2.reuse, R25 ; /* 0x00000002ff181219 */ /* 0x088fe40000011619 */ /*6900*/ @P1 SHF.L.U32 R25, R0, R27.reuse, RZ ; /* 0x0000001b00191219 */ /* 0x084fe400000006ff */ /*6910*/ @P1 SHF.R.U32.HI R2, RZ, R2, R3 ; /* 0x00000002ff021219 */ /* 0x010fe40000011603 */ /*6920*/ @P1 SHF.L.U32 R27, R3, R27, RZ ; /* 0x0000001b031b1219 */ /* 0x000fe400000006ff */ /*6930*/ @P1 IADD3 R0, R2, R25, RZ ; /* 0x0000001902001210 */ /* 0x000fc40007ffe0ff */ /*6940*/ @P1 IADD3 R3, R24, R27, RZ ; /* 0x0000001b18031210 */ /* 0x000fc80007ffe0ff */ /*6950*/ SHF.L.U32.HI R24, R3, 0x2, R0 ; /* 0x0000000203187819 */ /* 0x000fc80000010600 */ /*6960*/ SHF.R.U32.HI R27, RZ, 0x1f, R24 ; /* 0x0000001fff1b7819 */ /* 0x000fc80000011618 */ /*6970*/ ISETP.NE.AND P1, PT, R27, RZ, PT ; /* 0x000000ff1b00720c */ /* 0x000fe40003f25270 */ /*6980*/ SHF.L.U32 R2, R3, 0x2, RZ ; /* 0x0000000203027819 */ /* 0x000fd600000006ff */ /*6990*/ @P1 LOP3.LUT R24, RZ, R24, RZ, 0x33, !PT ; /* 0x00000018ff181212 */ /* 0x000fe400078e33ff */ /*69a0*/ @P1 LOP3.LUT R2, RZ, R2, RZ, 0x33, !PT ; /* 0x00000002ff021212 */ /* 0x000fe400078e33ff */ /*69b0*/ MOV R3, R24 ; /* 0x0000001800037202 */ /* 0x000fcc0000000f00 */ /*69c0*/ I2F.F64.S64 R2, R2 ; /* 0x0000000200027312 */ /* 0x000e240000301c00 */ /*69d0*/ DMUL R24, R2, c[0x2][0x0] ; /* 0x0080000002187a28 */ /* 0x001e220000000000 */ /*69e0*/ LEA.HI R36, R0, R27, RZ, 0x2 ; /* 0x0000001b00247211 */ /* 0x000fd200078f10ff */ /*69f0*/ F2F.F32.F64 R24, R24 ; /* 0x0000001800187310 */ /* 0x001e220000301000 */ /*6a00*/ @P1 LOP3.LUT R26, R26, 0x80000000, RZ, 0x3c, !PT ; /* 0x800000001a1a1812 */ /* 0x000fe400078e3cff */ /*6a10*/ IADD3 R0, -R36, RZ, RZ ; /* 0x000000ff24007210 */ /* 0x000fe40007ffe1ff */ /*6a20*/ ISETP.NE.AND P1, PT, R26, RZ, PT ; /* 0x000000ff1a00720c */ /* 0x000fe40003f25270 */ /*6a30*/ @P2 MOV R36, R0 ; /* 0x0000000000242202 */ /* 0x000fe40000000f00 */ /*6a40*/ FSEL R0, R24, -R24, !P1 ; /* 0x8000001818007208 */ /* 0x001fe20004800000 */ /*6a50*/ BRA 0x6a80 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*6a60*/ FMUL R0, RZ, R32 ; /* 0x00000020ff007220 */ /* 0x000fe20000400000 */ /*6a70*/ MOV R36, RZ ; /* 0x000000ff00247202 */ /* 0x000fc80000000f00 */ /*6a80*/ IADD3 R25, R36, 0x1, RZ ; /* 0x0000000124197810 */ /* 0x002fe20007ffe0ff */ /*6a90*/ FMUL R26, R0, R0 ; /* 0x00000000001a7220 */ /* 0x000fe20000400000 */ /*6aa0*/ MOV R30, 0x3c0885e4 ; /* 0x3c0885e4001e7802 */ /* 0x000fc40000000f00 */ /*6ab0*/ LOP3.LUT P2, RZ, R25.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000119ff7812 */ /* 0x040fe4000784c0ff */ /*6ac0*/ MOV R2, 0xb94d4153 ; /* 0xb94d415300027802 */ /* 0x000fe40000000f00 */ /*6ad0*/ MOV R31, 0x3e2aaaa8 ; /* 0x3e2aaaa8001f7802 */ /* 0x000fe40000000f00 */ /*6ae0*/ FSEL R3, R30, 0.041666727513074874878, !P2 ; /* 0x3d2aaabb1e037808 */ /* 0x000fe40005000000 */ /*6af0*/ LOP3.LUT P1, RZ, R25, 0x2, RZ, 0xc0, !PT ; /* 0x0000000219ff7812 */ /* 0x000fe4000782c0ff */ /*6b00*/ FSEL R0, R0, 1, !P2 ; /* 0x3f80000000007808 */ /* 0x000fc40005000000 */ /*6b10*/ FSEL R25, -R31, -0.4999999701976776123, !P2 ; /* 0xbeffffff1f197808 */ /* 0x000fe40005000100 */ /*6b20*/ @P2 MOV R24, 0x37cbac00 ; /* 0x37cbac0000182802 */ /* 0x000fe40000000f00 */ /*6b30*/ MOV R27, R28 ; /* 0x0000001c001b7202 */ /* 0x000fc60000000f00 */ /*6b40*/ @P2 FFMA R2, R26, R24, -0.0013887860113754868507 ; /* 0xbab607ed1a022423 */ /* 0x000fc80000000018 */ /*6b50*/ FFMA R2, R26, R2, R3 ; /* 0x000000021a027223 */ /* 0x000fe20000000003 */ /*6b60*/ FFMA R3, R0, R26, RZ ; /* 0x0000001a00037223 */ /* 0x000fc600000000ff */ /*6b70*/ FFMA R25, R26, R2, R25 ; /* 0x000000021a197223 */ /* 0x000fe20000000019 */ /*6b80*/ MOV R26, R29 ; /* 0x0000001d001a7202 */ /* 0x000fc60000000f00 */ /*6b90*/ FFMA R0, R25, R3, R0 ; /* 0x0000000319007223 */ /* 0x000fc80000000000 */ /*6ba0*/ @P1 FFMA R0, R0, -1, RZ ; /* 0xbf80000000001823 */ /* 0x000fe200000000ff */ /*6bb0*/ @!P0 BRA 0x6f90 ; /* 0x000003d000008947 */ /* 0x000fea0003800000 */ /*6bc0*/ FSETP.NEU.AND P1, PT, |R32|, +INF , PT ; /* 0x7f8000002000780b */ /* 0x000fda0003f2d200 */ /*6bd0*/ @!P1 BRA 0x6f70 ; /* 0x0000039000009947 */ /* 0x000fea0003800000 */ /*6be0*/ SHF.R.U32.HI R2, RZ, 0x17, R32 ; /* 0x00000017ff027819 */ /* 0x000fe20000011620 */ /*6bf0*/ CS2R R24, SRZ ; /* 0x0000000000187805 */ /* 0x000fe2000001ff00 */ /*6c00*/ SHF.L.U32 R39, R32, 0x8, RZ ; /* 0x0000000820277819 */ /* 0x000fe400000006ff */ /*6c10*/ LOP3.LUT R2, R2, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff02027812 */ /* 0x000fe400078ec0ff */ /*6c20*/ MOV R34, RZ ; /* 0x000000ff00227202 */ /* 0x000fe40000000f00 */ /*6c30*/ IADD3 R38, R2, -0x80, RZ ; /* 0xffffff8002267810 */ /* 0x000fe40007ffe0ff */ /*6c40*/ MOV R37, RZ ; /* 0x000000ff00257202 */ /* 0x000fc40000000f00 */ /*6c50*/ LOP3.LUT R39, R39, 0x80000000, RZ, 0xfc, !PT ; /* 0x8000000027277812 */ /* 0x000fe400078efcff */ /*6c60*/ SHF.R.U32.HI R35, RZ, 0x5, R38 ; /* 0x00000005ff237819 */ /* 0x000fe40000011626 */ /*6c70*/ SHF.L.U32 R36, R24.reuse, 0x2, RZ ; /* 0x0000000218247819 */ /* 0x041fe400000006ff */ /*6c80*/ SHF.L.U64.HI R3, R24, 0x2, R25 ; /* 0x0000000218037819 */ /* 0x000fe40000010219 */ /*6c90*/ IADD3 R2, P1, R36, c[0x4][0x0], RZ ; /* 0x0100000024027a10 */ /* 0x000fc80007f3e0ff */ /*6ca0*/ IADD3.X R3, R3, c[0x4][0x4], RZ, P1, !PT ; /* 0x0100010003037a10 */ /* 0x000fca0000ffe4ff */ /*6cb0*/ LDG.E.CONSTANT R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e9900 */ /*6cc0*/ IADD3 R36, R1, R36, RZ ; /* 0x0000002401247210 */ /* 0x000fe40007ffe0ff */ /*6cd0*/ IADD3 R24, R24, 0x1, RZ ; /* 0x0000000118187810 */ /* 0x000fc80007ffe0ff */ /*6ce0*/ ISETP.NE.AND P1, PT, R24, 0x6, PT ; /* 0x000000061800780c */ /* 0x000fe40003f25270 */ /*6cf0*/ SHF.R.S32.HI R25, RZ, 0x1f, R24 ; /* 0x0000001fff197819 */ /* 0x000fe20000011418 */ /*6d00*/ IMAD.WIDE.U32 R26, R2, R39, RZ ; /* 0x00000027021a7225 */ /* 0x004fca00078e00ff */ /*6d10*/ IADD3 R41, P2, R26, R34, RZ ; /* 0x000000221a297210 */ /* 0x000fc80007f5e0ff */ /*6d20*/ IADD3.X R34, R27, R37, RZ, P2, !PT ; /* 0x000000251b227210 */ /* 0x000fe200017fe4ff */ /*6d30*/ STL [R36], R41 ; /* 0x0000002924007387 */ /* 0x0001e20000100800 */ /*6d40*/ @P1 BRA 0x6c70 ; /* 0xffffff2000001947 */ /* 0x000fea000383ffff */ /*6d50*/ LOP3.LUT P1, R27, R38, 0x1f, RZ, 0xc0, !PT ; /* 0x0000001f261b7812 */ /* 0x000fe2000782c0ff */ /*6d60*/ STL [R1+0x18], R34 ; /* 0x0000182201007387 */ /* 0x0003e20000100800 */ /*6d70*/ IADD3 R36, -R35.reuse, 0x4, RZ ; /* 0x0000000423247810 */ /* 0x041fe40007ffe1ff */ /*6d80*/ IADD3 R2, -R35, 0x6, RZ ; /* 0x0000000623027810 */ /* 0x000fc80007ffe1ff */ /*6d90*/ LEA R35, R2, R1, 0x2 ; /* 0x0000000102237211 */ /* 0x000fca00078e10ff */ /*6da0*/ @P1 LEA R36, R36, R1, 0x2 ; /* 0x0000000124241211 */ /* 0x000fe200078e10ff */ /*6db0*/ LDL R26, [R35] ; /* 0x00000000231a7983 */ /* 0x000ea80000100800 */ /*6dc0*/ @P1 LDL R25, [R36] ; /* 0x0000000024191983 */ /* 0x000ee80000100800 */ /*6dd0*/ LDL R3, [R35+-0x4] ; /* 0xfffffc0023037983 */ /* 0x000f220000100800 */ /*6de0*/ @P1 IADD3 R2, -R27, 0x20, RZ ; /* 0x000000201b021810 */ /* 0x000fc40007ffe1ff */ /*6df0*/ LOP3.LUT P2, R34, R32, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000020227812 */ /* 0x002fe4000784c0ff */ /*6e00*/ @P1 SHF.R.U32.HI R24, RZ, R2.reuse, R25 ; /* 0x00000002ff181219 */ /* 0x088fe40000011619 */ /*6e10*/ @P1 SHF.L.U32 R25, R26, R27.reuse, RZ ; /* 0x0000001b1a191219 */ /* 0x084fe400000006ff */ /*6e20*/ @P1 SHF.R.U32.HI R2, RZ, R2, R3 ; /* 0x00000002ff021219 */ /* 0x010fe40000011603 */ /*6e30*/ @P1 SHF.L.U32 R27, R3, R27, RZ ; /* 0x0000001b031b1219 */ /* 0x000fe400000006ff */ /*6e40*/ @P1 IADD3 R26, R2, R25, RZ ; /* 0x00000019021a1210 */ /* 0x000fc40007ffe0ff */ /*6e50*/ @P1 IADD3 R3, R24, R27, RZ ; /* 0x0000001b18031210 */ /* 0x000fc80007ffe0ff */ /*6e60*/ SHF.L.U32.HI R24, R3, 0x2, R26 ; /* 0x0000000203187819 */ /* 0x000fc8000001061a */ /*6e70*/ SHF.R.U32.HI R27, RZ, 0x1f, R24 ; /* 0x0000001fff1b7819 */ /* 0x000fc80000011618 */ /*6e80*/ ISETP.NE.AND P1, PT, R27, RZ, PT ; /* 0x000000ff1b00720c */ /* 0x000fe40003f25270 */ /*6e90*/ SHF.L.U32 R2, R3, 0x2, RZ ; /* 0x0000000203027819 */ /* 0x000fd600000006ff */ /*6ea0*/ @P1 LOP3.LUT R24, RZ, R24, RZ, 0x33, !PT ; /* 0x00000018ff181212 */ /* 0x000fe400078e33ff */ /*6eb0*/ @P1 LOP3.LUT R2, RZ, R2, RZ, 0x33, !PT ; /* 0x00000002ff021212 */ /* 0x000fe400078e33ff */ /*6ec0*/ MOV R3, R24 ; /* 0x0000001800037202 */ /* 0x000fcc0000000f00 */ /*6ed0*/ I2F.F64.S64 R2, R2 ; /* 0x0000000200027312 */ /* 0x000e240000301c00 */ /*6ee0*/ DMUL R24, R2, c[0x2][0x0] ; /* 0x0080000002187a28 */ /* 0x001e220000000000 */ /*6ef0*/ LEA.HI R26, R26, R27, RZ, 0x2 ; /* 0x0000001b1a1a7211 */ /* 0x000fd200078f10ff */ /*6f00*/ F2F.F32.F64 R24, R24 ; /* 0x0000001800187310 */ /* 0x001e220000301000 */ /*6f10*/ @P1 LOP3.LUT R34, R34, 0x80000000, RZ, 0x3c, !PT ; /* 0x8000000022221812 */ /* 0x000fe400078e3cff */ /*6f20*/ IADD3 R27, -R26, RZ, RZ ; /* 0x000000ff1a1b7210 */ /* 0x000fe40007ffe1ff */ /*6f30*/ ISETP.NE.AND P1, PT, R34, RZ, PT ; /* 0x000000ff2200720c */ /* 0x000fe40003f25270 */ /*6f40*/ @P2 MOV R26, R27 ; /* 0x0000001b001a2202 */ /* 0x000fe40000000f00 */ /*6f50*/ FSEL R27, R24, -R24, !P1 ; /* 0x80000018181b7208 */ /* 0x001fe20004800000 */ /*6f60*/ BRA 0x6f90 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*6f70*/ FMUL R27, RZ, R32 ; /* 0x00000020ff1b7220 */ /* 0x000fe20000400000 */ /*6f80*/ MOV R26, RZ ; /* 0x000000ff001a7202 */ /* 0x000fc80000000f00 */ /*6f90*/ LOP3.LUT P2, RZ, R26, 0x1, RZ, 0xc0, !PT ; /* 0x000000011aff7812 */ /* 0x000fe2000784c0ff */ /*6fa0*/ FMUL R24, R27, R27 ; /* 0x0000001b1b187220 */ /* 0x000fe20000400000 */ /*6fb0*/ MOV R2, 0xb94d4153 ; /* 0xb94d415300027802 */ /* 0x000fc40000000f00 */ /*6fc0*/ FSEL R3, R30, 0.041666727513074874878, !P2 ; /* 0x3d2aaabb1e037808 */ /* 0x000fe40005000000 */ /*6fd0*/ LOP3.LUT P1, RZ, R26, 0x2, RZ, 0xc0, !PT ; /* 0x000000021aff7812 */ /* 0x000fe4000782c0ff */ /*6fe0*/ FSEL R34, R27, 1, !P2 ; /* 0x3f8000001b227808 */ /* 0x000fe40005000000 */ /*6ff0*/ MOV R26, R29 ; /* 0x0000001d001a7202 */ /* 0x000fe40000000f00 */ /*7000*/ MOV R27, R28 ; /* 0x0000001c001b7202 */ /* 0x000fe40000000f00 */ /*7010*/ @P2 MOV R25, 0x37cbac00 ; /* 0x37cbac0000192802 */ /* 0x000fca0000000f00 */ /*7020*/ @P2 FFMA R2, R24, R25, -0.0013887860113754868507 ; /* 0xbab607ed18022423 */ /* 0x000fe20000000019 */ /*7030*/ FSEL R25, -R31, -0.4999999701976776123, !P2 ; /* 0xbeffffff1f197808 */ /* 0x000fc60005000100 */ /*7040*/ FFMA R2, R24, R2, R3 ; /* 0x0000000218027223 */ /* 0x000fe20000000003 */ /*7050*/ FFMA R3, R34, R24, RZ ; /* 0x0000001822037223 */ /* 0x000fc600000000ff */ /*7060*/ FFMA R25, R24, R2, R25 ; /* 0x0000000218197223 */ /* 0x000fc80000000019 */ /*7070*/ FFMA R34, R25, R3, R34 ; /* 0x0000000319227223 */ /* 0x000fc80000000022 */ /*7080*/ @P1 FFMA R34, R34, -1, RZ ; /* 0xbf80000022221823 */ /* 0x000fe200000000ff */ /*7090*/ @!P0 BRA 0x7470 ; /* 0x000003d000008947 */ /* 0x000fea0003800000 */ /*70a0*/ FSETP.NEU.AND P1, PT, |R32|, +INF , PT ; /* 0x7f8000002000780b */ /* 0x000fda0003f2d200 */ /*70b0*/ @!P1 BRA 0x7450 ; /* 0x0000039000009947 */ /* 0x000fea0003800000 */ /*70c0*/ SHF.R.U32.HI R2, RZ, 0x17, R32 ; /* 0x00000017ff027819 */ /* 0x000fe20000011620 */ /*70d0*/ CS2R R24, SRZ ; /* 0x0000000000187805 */ /* 0x000fe2000001ff00 */ /*70e0*/ SHF.L.U32 R40, R32, 0x8, RZ ; /* 0x0000000820287819 */ /* 0x000fe400000006ff */ /*70f0*/ LOP3.LUT R2, R2, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff02027812 */ /* 0x000fe400078ec0ff */ /*7100*/ MOV R35, RZ ; /* 0x000000ff00237202 */ /* 0x000fe40000000f00 */ /*7110*/ IADD3 R37, R2, -0x80, RZ ; /* 0xffffff8002257810 */ /* 0x000fe40007ffe0ff */ /*7120*/ MOV R39, RZ ; /* 0x000000ff00277202 */ /* 0x000fc40000000f00 */ /*7130*/ LOP3.LUT R40, R40, 0x80000000, RZ, 0xfc, !PT ; /* 0x8000000028287812 */ /* 0x000fe400078efcff */ /*7140*/ SHF.R.U32.HI R38, RZ, 0x5, R37 ; /* 0x00000005ff267819 */ /* 0x000fe40000011625 */ /*7150*/ SHF.L.U32 R36, R24.reuse, 0x2, RZ ; /* 0x0000000218247819 */ /* 0x041fe400000006ff */ /*7160*/ SHF.L.U64.HI R3, R24, 0x2, R25 ; /* 0x0000000218037819 */ /* 0x000fe40000010219 */ /*7170*/ IADD3 R2, P1, R36, c[0x4][0x0], RZ ; /* 0x0100000024027a10 */ /* 0x000fc80007f3e0ff */ /*7180*/ IADD3.X R3, R3, c[0x4][0x4], RZ, P1, !PT ; /* 0x0100010003037a10 */ /* 0x000fcc0000ffe4ff */ /*7190*/ LDG.E.CONSTANT R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e9900 */ /*71a0*/ IADD3 R36, R1, R36, RZ ; /* 0x0000002401247210 */ /* 0x000fe40007ffe0ff */ /*71b0*/ IADD3 R24, R24, 0x1, RZ ; /* 0x0000000118187810 */ /* 0x000fc80007ffe0ff */ /*71c0*/ ISETP.NE.AND P1, PT, R24, 0x6, PT ; /* 0x000000061800780c */ /* 0x000fe40003f25270 */ /*71d0*/ SHF.R.S32.HI R25, RZ, 0x1f, R24 ; /* 0x0000001fff197819 */ /* 0x000fe20000011418 */ /*71e0*/ IMAD.WIDE.U32 R26, R3, R40, RZ ; /* 0x00000028031a7225 */ /* 0x004fca00078e00ff */ /*71f0*/ IADD3 R41, P2, R26, R35, RZ ; /* 0x000000231a297210 */ /* 0x000fc80007f5e0ff */ /*7200*/ IADD3.X R35, R27, R39, RZ, P2, !PT ; /* 0x000000271b237210 */ /* 0x000fe200017fe4ff */ /*7210*/ STL [R36], R41 ; /* 0x0000002924007387 */ /* 0x0001e20000100800 */ /*7220*/ @P1 BRA 0x7150 ; /* 0xffffff2000001947 */ /* 0x000fea000383ffff */ /*7230*/ LOP3.LUT P1, R27, R37, 0x1f, RZ, 0xc0, !PT ; /* 0x0000001f251b7812 */ /* 0x000fe2000782c0ff */ /*7240*/ STL [R1+0x18], R35 ; /* 0x0000182301007387 */ /* 0x0003e20000100800 */ /*7250*/ IADD3 R36, -R38.reuse, 0x4, RZ ; /* 0x0000000426247810 */ /* 0x041fe40007ffe1ff */ /*7260*/ IADD3 R38, -R38, 0x6, RZ ; /* 0x0000000626267810 */ /* 0x000fc80007ffe1ff */ /*7270*/ LEA R38, R38, R1, 0x2 ; /* 0x0000000126267211 */ /* 0x000fca00078e10ff */ /*7280*/ @P1 LEA R36, R36, R1, 0x2 ; /* 0x0000000124241211 */ /* 0x000fe200078e10ff */ /*7290*/ LDL R26, [R38] ; /* 0x00000000261a7983 */ /* 0x000ea80000100800 */ /*72a0*/ @P1 LDL R25, [R36] ; /* 0x0000000024191983 */ /* 0x000ee80000100800 */ /*72b0*/ LDL R3, [R38+-0x4] ; /* 0xfffffc0026037983 */ /* 0x000f220000100800 */ /*72c0*/ @P1 IADD3 R2, -R27, 0x20, RZ ; /* 0x000000201b021810 */ /* 0x000fc40007ffe1ff */ /*72d0*/ LOP3.LUT P2, R35, R32, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000020237812 */ /* 0x002fe4000784c0ff */ /*72e0*/ @P1 SHF.R.U32.HI R24, RZ, R2.reuse, R25 ; /* 0x00000002ff181219 */ /* 0x088fe40000011619 */ /*72f0*/ @P1 SHF.L.U32 R25, R26, R27.reuse, RZ ; /* 0x0000001b1a191219 */ /* 0x084fe400000006ff */ /*7300*/ @P1 SHF.R.U32.HI R2, RZ, R2, R3 ; /* 0x00000002ff021219 */ /* 0x010fe40000011603 */ /*7310*/ @P1 SHF.L.U32 R27, R3, R27, RZ ; /* 0x0000001b031b1219 */ /* 0x000fe400000006ff */ /*7320*/ @P1 IADD3 R26, R2, R25, RZ ; /* 0x00000019021a1210 */ /* 0x000fc40007ffe0ff */ /*7330*/ @P1 IADD3 R3, R24, R27, RZ ; /* 0x0000001b18031210 */ /* 0x000fc80007ffe0ff */ /*7340*/ SHF.L.U32.HI R24, R3, 0x2, R26 ; /* 0x0000000203187819 */ /* 0x000fc8000001061a */ /*7350*/ SHF.R.U32.HI R27, RZ, 0x1f, R24 ; /* 0x0000001fff1b7819 */ /* 0x000fc80000011618 */ /*7360*/ ISETP.NE.AND P1, PT, R27, RZ, PT ; /* 0x000000ff1b00720c */ /* 0x000fe40003f25270 */ /*7370*/ SHF.L.U32 R2, R3, 0x2, RZ ; /* 0x0000000203027819 */ /* 0x000fd600000006ff */ /*7380*/ @P1 LOP3.LUT R24, RZ, R24, RZ, 0x33, !PT ; /* 0x00000018ff181212 */ /* 0x000fe400078e33ff */ /*7390*/ @P1 LOP3.LUT R2, RZ, R2, RZ, 0x33, !PT ; /* 0x00000002ff021212 */ /* 0x000fe400078e33ff */ /*73a0*/ MOV R3, R24 ; /* 0x0000001800037202 */ /* 0x000fcc0000000f00 */ /*73b0*/ I2F.F64.S64 R2, R2 ; /* 0x0000000200027312 */ /* 0x000e240000301c00 */ /*73c0*/ DMUL R24, R2, c[0x2][0x0] ; /* 0x0080000002187a28 */ /* 0x001e220000000000 */ /*73d0*/ LEA.HI R26, R26, R27, RZ, 0x2 ; /* 0x0000001b1a1a7211 */ /* 0x000fd200078f10ff */ /*73e0*/ F2F.F32.F64 R24, R24 ; /* 0x0000001800187310 */ /* 0x001e220000301000 */ /*73f0*/ @P1 LOP3.LUT R35, R35, 0x80000000, RZ, 0x3c, !PT ; /* 0x8000000023231812 */ /* 0x000fe400078e3cff */ /*7400*/ IADD3 R27, -R26, RZ, RZ ; /* 0x000000ff1a1b7210 */ /* 0x000fe40007ffe1ff */ /*7410*/ ISETP.NE.AND P1, PT, R35, RZ, PT ; /* 0x000000ff2300720c */ /* 0x000fe40003f25270 */ /*7420*/ @P2 MOV R26, R27 ; /* 0x0000001b001a2202 */ /* 0x000fe40000000f00 */ /*7430*/ FSEL R27, R24, -R24, !P1 ; /* 0x80000018181b7208 */ /* 0x001fe20004800000 */ /*7440*/ BRA 0x7470 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*7450*/ FMUL R27, RZ, R32 ; /* 0x00000020ff1b7220 */ /* 0x000fe20000400000 */ /*7460*/ MOV R26, RZ ; /* 0x000000ff001a7202 */ /* 0x000fc80000000f00 */ /*7470*/ LOP3.LUT P2, RZ, R26, 0x1, RZ, 0xc0, !PT ; /* 0x000000011aff7812 */ /* 0x000fe2000784c0ff */ /*7480*/ FMUL R24, R27, R27 ; /* 0x0000001b1b187220 */ /* 0x000fe20000400000 */ /*7490*/ MOV R2, 0xb94d4153 ; /* 0xb94d415300027802 */ /* 0x000fc40000000f00 */ /*74a0*/ FSEL R3, R30, 0.041666727513074874878, !P2 ; /* 0x3d2aaabb1e037808 */ /* 0x000fe40005000000 */ /*74b0*/ LOP3.LUT P1, RZ, R26, 0x2, RZ, 0xc0, !PT ; /* 0x000000021aff7812 */ /* 0x000fe4000782c0ff */ /*74c0*/ FSEL R35, R27, 1, !P2 ; /* 0x3f8000001b237808 */ /* 0x000fca0005000000 */ /*74d0*/ @P2 MOV R25, 0x37cbac00 ; /* 0x37cbac0000192802 */ /* 0x000fca0000000f00 */ /*74e0*/ @P2 FFMA R2, R24, R25, -0.0013887860113754868507 ; /* 0xbab607ed18022423 */ /* 0x000fe20000000019 */ /*74f0*/ FSEL R25, -R31, -0.4999999701976776123, !P2 ; /* 0xbeffffff1f197808 */ /* 0x000fc60005000100 */ /*7500*/ FFMA R2, R24, R2, R3 ; /* 0x0000000218027223 */ /* 0x000fe20000000003 */ /*7510*/ FFMA R3, R35, R24, RZ ; /* 0x0000001823037223 */ /* 0x000fc600000000ff */ /*7520*/ FFMA R2, R24, R2, R25 ; /* 0x0000000218027223 */ /* 0x000fc80000000019 */ /*7530*/ FFMA R35, R2, R3, R35 ; /* 0x0000000302237223 */ /* 0x000fc80000000023 */ /*7540*/ @P1 FFMA R35, R35, -1, RZ ; /* 0xbf80000023231823 */ /* 0x000fe200000000ff */ /*7550*/ @!P0 BRA 0x7920 ; /* 0x000003c000008947 */ /* 0x000fea0003800000 */ /*7560*/ FSETP.NEU.AND P0, PT, |R32|, +INF , PT ; /* 0x7f8000002000780b */ /* 0x000fda0003f0d200 */ /*7570*/ @!P0 BRA 0x7900 ; /* 0x0000038000008947 */ /* 0x000fea0003800000 */ /*7580*/ SHF.R.U32.HI R2, RZ, 0x17, R32 ; /* 0x00000017ff027819 */ /* 0x000fe20000011620 */ /*7590*/ CS2R R24, SRZ ; /* 0x0000000000187805 */ /* 0x000fe2000001ff00 */ /*75a0*/ SHF.L.U32 R39, R32, 0x8, RZ ; /* 0x0000000820277819 */ /* 0x000fe400000006ff */ /*75b0*/ LOP3.LUT R2, R2, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff02027812 */ /* 0x000fe400078ec0ff */ /*75c0*/ MOV R28, RZ ; /* 0x000000ff001c7202 */ /* 0x000fe40000000f00 */ /*75d0*/ IADD3 R38, R2, -0x80, RZ ; /* 0xffffff8002267810 */ /* 0x000fe40007ffe0ff */ /*75e0*/ MOV R37, RZ ; /* 0x000000ff00257202 */ /* 0x000fc40000000f00 */ /*75f0*/ LOP3.LUT R39, R39, 0x80000000, RZ, 0xfc, !PT ; /* 0x8000000027277812 */ /* 0x000fe400078efcff */ /*7600*/ SHF.R.U32.HI R29, RZ, 0x5, R38 ; /* 0x00000005ff1d7819 */ /* 0x000fe40000011626 */ /*7610*/ SHF.L.U32 R36, R24.reuse, 0x2, RZ ; /* 0x0000000218247819 */ /* 0x041fe400000006ff */ /*7620*/ SHF.L.U64.HI R3, R24, 0x2, R25 ; /* 0x0000000218037819 */ /* 0x000fe40000010219 */ /*7630*/ IADD3 R2, P0, R36, c[0x4][0x0], RZ ; /* 0x0100000024027a10 */ /* 0x000fc80007f1e0ff */ /*7640*/ IADD3.X R3, R3, c[0x4][0x4], RZ, P0, !PT ; /* 0x0100010003037a10 */ /* 0x000fca00007fe4ff */ /*7650*/ LDG.E.CONSTANT R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e9900 */ /*7660*/ IADD3 R36, R1, R36, RZ ; /* 0x0000002401247210 */ /* 0x000fe40007ffe0ff */ /*7670*/ IADD3 R24, R24, 0x1, RZ ; /* 0x0000000118187810 */ /* 0x000fc80007ffe0ff */ /*7680*/ ISETP.NE.AND P0, PT, R24, 0x6, PT ; /* 0x000000061800780c */ /* 0x000fe40003f05270 */ /*7690*/ SHF.R.S32.HI R25, RZ, 0x1f, R24 ; /* 0x0000001fff197819 */ /* 0x000fe20000011418 */ /*76a0*/ IMAD.WIDE.U32 R26, R2, R39, RZ ; /* 0x00000027021a7225 */ /* 0x004fca00078e00ff */ /*76b0*/ IADD3 R41, P1, R26, R28, RZ ; /* 0x0000001c1a297210 */ /* 0x000fc80007f3e0ff */ /*76c0*/ IADD3.X R28, R27, R37, RZ, P1, !PT ; /* 0x000000251b1c7210 */ /* 0x000fe20000ffe4ff */ /*76d0*/ STL [R36], R41 ; /* 0x0000002924007387 */ /* 0x0001e20000100800 */ /*76e0*/ @P0 BRA 0x7610 ; /* 0xffffff2000000947 */ /* 0x000fea000383ffff */ /*76f0*/ LOP3.LUT P0, R26, R38, 0x1f, RZ, 0xc0, !PT ; /* 0x0000001f261a7812 */ /* 0x000fe2000780c0ff */ /*7700*/ STL [R1+0x18], R28 ; /* 0x0000181c01007387 */ /* 0x0003e20000100800 */ /*7710*/ IADD3 R36, -R29.reuse, 0x4, RZ ; /* 0x000000041d247810 */ /* 0x041fe40007ffe1ff */ /*7720*/ IADD3 R2, -R29, 0x6, RZ ; /* 0x000000061d027810 */ /* 0x000fc80007ffe1ff */ /*7730*/ LEA R27, R2, R1, 0x2 ; /* 0x00000001021b7211 */ /* 0x000fca00078e10ff */ /*7740*/ @P0 LEA R36, R36, R1, 0x2 ; /* 0x0000000124240211 */ /* 0x000fe200078e10ff */ /*7750*/ LDL R29, [R27] ; /* 0x000000001b1d7983 */ /* 0x000ea80000100800 */ /*7760*/ @P0 LDL R24, [R36] ; /* 0x0000000024180983 */ /* 0x000ee80000100800 */ /*7770*/ LDL R2, [R27+-0x4] ; /* 0xfffffc001b027983 */ /* 0x000f220000100800 */ /*7780*/ @P0 IADD3 R3, -R26, 0x20, RZ ; /* 0x000000201a030810 */ /* 0x000fc40007ffe1ff */ /*7790*/ LOP3.LUT P1, R32, R32, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000020207812 */ /* 0x000fe4000782c0ff */ /*77a0*/ @P0 SHF.R.U32.HI R25, RZ, R3.reuse, R24 ; /* 0x00000003ff190219 */ /* 0x088fe40000011618 */ /*77b0*/ @P0 SHF.L.U32 R24, R29, R26.reuse, RZ ; /* 0x0000001a1d180219 */ /* 0x084fe400000006ff */ /*77c0*/ @P0 SHF.R.U32.HI R3, RZ, R3, R2 ; /* 0x00000003ff030219 */ /* 0x010fe40000011602 */ /*77d0*/ @P0 SHF.L.U32 R26, R2, R26, RZ ; /* 0x0000001a021a0219 */ /* 0x000fe400000006ff */ /*77e0*/ @P0 IADD3 R29, R3, R24, RZ ; /* 0x00000018031d0210 */ /* 0x000fc40007ffe0ff */ /*77f0*/ @P0 IADD3 R2, R25, R26, RZ ; /* 0x0000001a19020210 */ /* 0x000fc80007ffe0ff */ /*7800*/ SHF.L.U32.HI R3, R2, 0x2, R29 ; /* 0x0000000202037819 */ /* 0x000fc8000001061d */ /*7810*/ SHF.R.U32.HI R26, RZ, 0x1f, R3 ; /* 0x0000001fff1a7819 */ /* 0x000fc80000011603 */ /*7820*/ ISETP.NE.AND P0, PT, R26, RZ, PT ; /* 0x000000ff1a00720c */ /* 0x000fe40003f05270 */ /*7830*/ SHF.L.U32 R2, R2, 0x2, RZ ; /* 0x0000000202027819 */ /* 0x000fd600000006ff */ /*7840*/ @P0 LOP3.LUT R3, RZ, R3, RZ, 0x33, !PT ; /* 0x00000003ff030212 */ /* 0x000fe400078e33ff */ /*7850*/ @P0 LOP3.LUT R2, RZ, R2, RZ, 0x33, !PT ; /* 0x00000002ff020212 */ /* 0x000fcc00078e33ff */ /*7860*/ I2F.F64.S64 R2, R2 ; /* 0x0000000200027312 */ /* 0x000e240000301c00 */ /*7870*/ DMUL R24, R2, c[0x2][0x0] ; /* 0x0080000002187a28 */ /* 0x001e220000000000 */ /*7880*/ @P0 LOP3.LUT R32, R32, 0x80000000, RZ, 0x3c, !PT ; /* 0x8000000020200812 */ /* 0x000fd200078e3cff */ /*7890*/ F2F.F32.F64 R24, R24 ; /* 0x0000001800187310 */ /* 0x001e620000301000 */ /*78a0*/ LEA.HI R29, R29, R26, RZ, 0x2 ; /* 0x0000001a1d1d7211 */ /* 0x000fe400078f10ff */ /*78b0*/ ISETP.NE.AND P0, PT, R32, RZ, PT ; /* 0x000000ff2000720c */ /* 0x000fe40003f05270 */ /*78c0*/ IADD3 R26, -R29, RZ, RZ ; /* 0x000000ff1d1a7210 */ /* 0x000fc80007ffe1ff */ /*78d0*/ @P1 MOV R29, R26 ; /* 0x0000001a001d1202 */ /* 0x000fe40000000f00 */ /*78e0*/ FSEL R28, R24, -R24, !P0 ; /* 0x80000018181c7208 */ /* 0x002fe20004000000 */ /*78f0*/ BRA 0x7920 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*7900*/ FMUL R28, RZ, R32 ; /* 0x00000020ff1c7220 */ /* 0x000fe20000400000 */ /*7910*/ MOV R29, RZ ; /* 0x000000ff001d7202 */ /* 0x000fe40000000f00 */ /*7920*/ IMAD.WIDE R24, R14, R33, c[0x0][0x180] ; /* 0x000060000e187625 */ /* 0x000fc800078e0221 */ /*7930*/ IMAD.WIDE R2, R14.reuse, R33, c[0x0][0x178] ; /* 0x00005e000e027625 */ /* 0x040fe200078e0221 */ /*7940*/ LDG.E R27, [R24.64] ; /* 0x00000004181b7981 */ /* 0x000ea8000c1e1900 */ /*7950*/ LDG.E R37, [R2.64] ; /* 0x0000000402257981 */ /* 0x000ee2000c1e1900 */ /*7960*/ SHF.R.S32.HI R39, RZ, 0x1f, R14 ; /* 0x0000001fff277819 */ /* 0x000fe4000001140e */ /*7970*/ SHF.L.U32 R33, R14.reuse, 0x2, RZ ; /* 0x000000020e217819 */ /* 0x040fe400000006ff */ /*7980*/ SHF.L.U64.HI R32, R14, 0x2, R39 ; /* 0x000000020e207819 */ /* 0x000fc40000010227 */ /*7990*/ IADD3 R26, P0, R33, c[0x0][0x190], RZ ; /* 0x00006400211a7a10 */ /* 0x000fe40007f1e0ff */ /*79a0*/ IADD3 R36, R29, 0x1, RZ ; /* 0x000000011d247810 */ /* 0x000fc80007ffe0ff */ /*79b0*/ LOP3.LUT P1, RZ, R36, 0x1, RZ, 0xc0, !PT ; /* 0x0000000124ff7812 */ /* 0x000fe2000782c0ff */ /*79c0*/ FMUL R34, R27, R34 ; /* 0x000000221b227220 */ /* 0x004fe20000400000 */ /*79d0*/ IADD3.X R27, R32, c[0x0][0x194], RZ, P0, !PT ; /* 0x00006500201b7a10 */ /* 0x000fc600007fe4ff */ /*79e0*/ FFMA R37, R37, R0, -R34 ; /* 0x0000000025257223 */ /* 0x008fca0000000822 */ /*79f0*/ STG.E [R26.64], R37 ; /* 0x000000251a007986 */ /* 0x0001e8000c101904 */ /*7a00*/ LDG.E R39, [R24.64] ; /* 0x0000000418277981 */ /* 0x0002a8000c1e1900 */ /*7a10*/ LDG.E R34, [R2.64] ; /* 0x0000000402227981 */ /* 0x000722000c1e1900 */ /*7a20*/ @P1 MOV R38, 0x37cbac00 ; /* 0x37cbac0000261802 */ /* 0x000fe20000000f00 */ /*7a30*/ FMUL R41, R28, R28 ; /* 0x0000001c1c297220 */ /* 0x000fe20000400000 */ /*7a40*/ MOV R0, 0xb94d4153 ; /* 0xb94d415300007802 */ /* 0x000fc40000000f00 */ /*7a50*/ FSEL R29, R30, 0.041666727513074874878, !P1 ; /* 0x3d2aaabb1e1d7808 */ /* 0x000fe20004800000 */ /*7a60*/ @P1 FFMA R0, R41, R38, -0.0013887860113754868507 ; /* 0xbab607ed29001423 */ /* 0x000fe20000000026 */ /*7a70*/ LOP3.LUT P0, RZ, R36, 0x2, RZ, 0xc0, !PT ; /* 0x0000000224ff7812 */ /* 0x000fe4000780c0ff */ /*7a80*/ FSEL R24, -R31, -0.4999999701976776123, !P1 ; /* 0xbeffffff1f187808 */ /* 0x002fe20004800100 */ /*7a90*/ FFMA R29, R41.reuse, R0, R29 ; /* 0x00000000291d7223 */ /* 0x040fe2000000001d */ /*7aa0*/ FSEL R0, R28, 1, !P1 ; /* 0x3f8000001c007808 */ /* 0x000fe40004800000 */ /*7ab0*/ IADD3 R14, R14, 0x1, RZ ; /* 0x000000010e0e7810 */ /* 0x000fe20007ffe0ff */ /*7ac0*/ FFMA R29, R41, R29, R24 ; /* 0x0000001d291d7223 */ /* 0x000fe40000000018 */ /*7ad0*/ FFMA R2, R0, R41, RZ ; /* 0x0000002900027223 */ /* 0x008fc800000000ff */ /*7ae0*/ FFMA R0, R29, R2, R0 ; /* 0x000000021d007223 */ /* 0x000fc80000000000 */ /*7af0*/ @P0 FFMA R0, R0, -1, RZ ; /* 0xbf80000000000823 */ /* 0x000fe200000000ff */ /*7b00*/ IADD3 R2, P0, R33, c[0x0][0x198], RZ ; /* 0x0000660021027a10 */ /* 0x000fc80007f1e0ff */ /*7b10*/ IADD3.X R3, R32, c[0x0][0x19c], RZ, P0, !PT ; /* 0x0000670020037a10 */ /* 0x000fe400007fe4ff */ /*7b20*/ ISETP.GE.AND P0, PT, R14, c[0x0][0x1c4], PT ; /* 0x000071000e007a0c */ /* 0x000fe20003f06270 */ /*7b30*/ FMUL R39, R39, R0 ; /* 0x0000000027277220 */ /* 0x004fc80000400000 */ /*7b40*/ FFMA R39, R34, R35, R39 ; /* 0x0000002322277223 */ /* 0x010fca0000000027 */ /*7b50*/ STG.E [R2.64], R39 ; /* 0x0000002702007986 */ /* 0x0001e6000c101904 */ /*7b60*/ @P0 CALL.REL.NOINC 0x7b80 ; /* 0x0000001000000944 */ /* 0x000fe20003c00000 */ /*7b70*/ BRA 0x4350 ; /* 0xffffc7d000007947 */ /* 0x000fea000383ffff */ /*7b80*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*7b90*/ SHF.L.U32 R3, R0, 0x1, RZ ; /* 0x0000000100037819 */ /* 0x000fc800000006ff */ /*7ba0*/ SHF.R.U32.HI R24, RZ, 0x18, R3 ; /* 0x00000018ff187819 */ /* 0x000fc80000011603 */ /*7bb0*/ ISETP.NE.U32.AND P0, PT, R24, RZ, PT ; /* 0x000000ff1800720c */ /* 0x000fda0003f05070 */ /*7bc0*/ @P0 BRA 0x7c80 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*7bd0*/ SHF.L.U32 R3, R0, 0x1, RZ ; /* 0x0000000100037819 */ /* 0x000fc800000006ff */ /*7be0*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */ /* 0x000fda0003f05270 */ /*7bf0*/ @!P0 MUFU.RCP R3, R0 ; /* 0x0000000000038308 */ /* 0x0000620000001000 */ /*7c00*/ @!P0 BRA 0x7ea0 ; /* 0x0000029000008947 */ /* 0x000fea0003800000 */ /*7c10*/ FFMA R20, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000147823 */ /* 0x000fc800000000ff */ /*7c20*/ MUFU.RCP R3, R20 ; /* 0x0000001400037308 */ /* 0x002e640000001000 */ /*7c30*/ FFMA R0, R20, R3, -1 ; /* 0xbf80000014007423 */ /* 0x003fc80000000003 */ /*7c40*/ FADD.FTZ R0, -R0, -RZ ; /* 0x800000ff00007221 */ /* 0x000fc80000010100 */ /*7c50*/ FFMA R0, R3, R0, R3 ; /* 0x0000000003007223 */ /* 0x000fc80000000003 */ /*7c60*/ FFMA R3, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000037823 */ /* 0x000fe200000000ff */ /*7c70*/ BRA 0x7ea0 ; /* 0x0000022000007947 */ /* 0x000fea0003800000 */ /*7c80*/ IADD3 R26, R24, -0xfd, RZ ; /* 0xffffff03181a7810 */ /* 0x000fc80007ffe0ff */ /*7c90*/ ISETP.GT.U32.AND P0, PT, R26, 0x1, PT ; /* 0x000000011a00780c */ /* 0x000fda0003f04070 */ /*7ca0*/ @P0 BRA 0x7e90 ; /* 0x000001e000000947 */ /* 0x000fea0003800000 */ /*7cb0*/ LOP3.LUT R3, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00037812 */ /* 0x000fe400078ec0ff */ /*7cc0*/ MOV R25, 0x3 ; /* 0x0000000300197802 */ /* 0x000fe40000000f00 */ /*7cd0*/ LOP3.LUT R3, R3, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000003037812 */ /* 0x000fe400078efcff */ /*7ce0*/ SHF.L.U32 R25, R25, R26, RZ ; /* 0x0000001a19197219 */ /* 0x000fe400000006ff */ /*7cf0*/ MUFU.RCP R20, R3 ; /* 0x0000000300147308 */ /* 0x000e240000001000 */ /*7d00*/ FFMA R22, R3, R20, -1 ; /* 0xbf80000003167423 */ /* 0x001fc80000000014 */ /*7d10*/ FADD.FTZ R23, -R22, -RZ ; /* 0x800000ff16177221 */ /* 0x000fc80000010100 */ /*7d20*/ FFMA.RM R22, R20.reuse, R23.reuse, R20.reuse ; /* 0x0000001714167223 */ /* 0x1c0fe20000004014 */ /*7d30*/ FFMA.RP R23, R20, R23, R20 ; /* 0x0000001714177223 */ /* 0x000fc80000008014 */ /*7d40*/ LOP3.LUT R20, R22.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff16147812 */ /* 0x040fe400078ec0ff */ /*7d50*/ FSETP.NEU.FTZ.AND P0, PT, R22, R23, PT ; /* 0x000000171600720b */ /* 0x000fe40003f1d000 */ /*7d60*/ LOP3.LUT R20, R20, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000014147812 */ /* 0x000fe400078efcff */ /*7d70*/ SEL R22, RZ, 0xffffffff, !P0 ; /* 0xffffffffff167807 */ /* 0x000fe40004000000 */ /*7d80*/ LOP3.LUT R25, R25, R20, RZ, 0xc0, !PT ; /* 0x0000001419197212 */ /* 0x000fe400078ec0ff */ /*7d90*/ IADD3 R3, -R22, RZ, RZ ; /* 0x000000ff16037210 */ /* 0x000fc40007ffe1ff */ /*7da0*/ SHF.R.U32.HI R25, RZ, R26.reuse, R25 ; /* 0x0000001aff197219 */ /* 0x080fe40000011619 */ /*7db0*/ LOP3.LUT P1, RZ, R3, R26, R20, 0xf8, !PT ; /* 0x0000001a03ff7212 */ /* 0x000fe4000782f814 */ /*7dc0*/ LOP3.LUT P0, RZ, R25.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000119ff7812 */ /* 0x040fe4000780c0ff */ /*7dd0*/ LOP3.LUT P2, RZ, R25, 0x2, RZ, 0xc0, !PT ; /* 0x0000000219ff7812 */ /* 0x000fc8000784c0ff */ /*7de0*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40000703c20 */ /*7df0*/ LOP3.LUT P1, RZ, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00ff7812 */ /* 0x000fe4000782c0ff */ /*7e00*/ SEL R3, RZ, 0x1, !P0 ; /* 0x00000001ff037807 */ /* 0x000fc80004000000 */ /*7e10*/ IADD3 R3, -R3, RZ, RZ ; /* 0x000000ff03037210 */ /* 0x000fc80007ffe1ff */ /*7e20*/ ISETP.GE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */ /* 0x000fe40003f06270 */ /*7e30*/ IADD3 R3, R24, -0xfc, RZ ; /* 0xffffff0418037810 */ /* 0x000fc80007ffe0ff */ /*7e40*/ SHF.R.U32.HI R3, RZ, R3, R20 ; /* 0x00000003ff037219 */ /* 0x000fce0000011614 */ /*7e50*/ @!P0 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103038810 */ /* 0x000fc80007ffe0ff */ /*7e60*/ @!P1 SHF.L.U32 R3, R3, 0x1, RZ ; /* 0x0000000103039819 */ /* 0x000fc800000006ff */ /*7e70*/ LOP3.LUT R3, R3, 0x80000000, R0, 0xf8, !PT ; /* 0x8000000003037812 */ /* 0x000fe200078ef800 */ /*7e80*/ BRA 0x7ea0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*7e90*/ MUFU.RCP R3, R0 ; /* 0x0000000000037308 */ /* 0x0000640000001000 */ /*7ea0*/ MOV R0, R3 ; /* 0x0000000300007202 */ /* 0x003fe40000000f00 */ /*7eb0*/ MOV R3, 0x0 ; /* 0x0000000000037802 */ /* 0x000fc80000000f00 */ /*7ec0*/ RET.REL.NODEC R2 0x0 ; /* 0xffff813002007950 */ /* 0x000fea0003c3ffff */ /*7ed0*/ LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff00ff7812 */ /* 0x000fda000780c0ff */ /*7ee0*/ @!P0 MOV R2, R0 ; /* 0x0000000000028202 */ /* 0x000fe20000000f00 */ /*7ef0*/ @!P0 BRA 0x8010 ; /* 0x0000011000008947 */ /* 0x000fea0003800000 */ /*7f00*/ FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720b */ /* 0x000fda0003f1e000 */ /*7f10*/ @!P0 MOV R2, 0x7fffffff ; /* 0x7fffffff00028802 */ /* 0x000fe20000000f00 */ /*7f20*/ @!P0 BRA 0x8010 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*7f30*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fda0003f1c200 */ /*7f40*/ @P0 FADD.FTZ R2, R0, 1 ; /* 0x3f80000000020421 */ /* 0x000fe20000010000 */ /*7f50*/ @P0 BRA 0x8010 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*7f60*/ FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fda0003f1d200 */ /*7f70*/ @!P0 MOV R2, R0 ; /* 0x0000000000028202 */ /* 0x000fe20000000f00 */ /*7f80*/ @!P0 BRA 0x8010 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*7f90*/ FFMA R0, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000007823 */ /* 0x000fc800000000ff */ /*7fa0*/ MUFU.RSQ R3, R0 ; /* 0x0000000000037308 */ /* 0x000e240000001400 */ /*7fb0*/ FMUL.FTZ R25, R0, R3 ; /* 0x0000000300197220 */ /* 0x001fe20000410000 */ /*7fc0*/ FMUL.FTZ R3, R3, 0.5 ; /* 0x3f00000003037820 */ /* 0x000fc60000410000 */ /*7fd0*/ FADD.FTZ R2, -R25, -RZ ; /* 0x800000ff19027221 */ /* 0x000fc80000010100 */ /*7fe0*/ FFMA R2, R25, R2, R0 ; /* 0x0000000219027223 */ /* 0x000fc80000000000 */ /*7ff0*/ FFMA R2, R2, R3, R25 ; /* 0x0000000302027223 */ /* 0x000fc80000000019 */ /*8000*/ FMUL.FTZ R2, R2, 2.3283064365386962891e-10 ; /* 0x2f80000002027820 */ /* 0x000fca0000410000 */ /*8010*/ MOV R25, R2 ; /* 0x0000000200197202 */ /* 0x000fe40000000f00 */ /*8020*/ MOV R2, R24 ; /* 0x0000001800027202 */ /* 0x000fe40000000f00 */ /*8030*/ MOV R3, 0x0 ; /* 0x0000000000037802 */ /* 0x000fc80000000f00 */ /*8040*/ RET.REL.NODEC R2 0x0 ; /* 0xffff7fb002007950 */ /* 0x000fea0003c3ffff */ /*8050*/ SHF.R.U32.HI R27, RZ, 0x17, R3 ; /* 0x00000017ff1b7819 */ /* 0x000fe40000011603 */ /*8060*/ SHF.R.U32.HI R32, RZ, 0x17, R0 ; /* 0x00000017ff207819 */ /* 0x000fe40000011600 */ /*8070*/ LOP3.LUT R27, R27, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff1b1b7812 */ /* 0x000fe400078ec0ff */ /*8080*/ LOP3.LUT R32, R32, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff20207812 */ /* 0x000fe400078ec0ff */ /*8090*/ IADD3 R33, R27, -0x1, RZ ; /* 0xffffffff1b217810 */ /* 0x000fe40007ffe0ff */ /*80a0*/ IADD3 R34, R32, -0x1, RZ ; /* 0xffffffff20227810 */ /* 0x000fc40007ffe0ff */ /*80b0*/ ISETP.GT.U32.AND P0, PT, R33, 0xfd, PT ; /* 0x000000fd2100780c */ /* 0x000fc80003f04070 */ /*80c0*/ ISETP.GT.U32.OR P0, PT, R34, 0xfd, P0 ; /* 0x000000fd2200780c */ /* 0x000fda0000704470 */ /*80d0*/ @!P0 MOV R28, RZ ; /* 0x000000ff001c8202 */ /* 0x000fe20000000f00 */ /*80e0*/ @!P0 BRA 0x8260 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*80f0*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fe40003f1c200 */ /*8100*/ FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fc80003f3c200 */ /*8110*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*8120*/ @P0 BRA 0x8640 ; /* 0x0000051000000947 */ /* 0x000fea0003800000 */ /*8130*/ LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fda000780c800 */ /*8140*/ @!P0 BRA 0x8620 ; /* 0x000004d000008947 */ /* 0x000fea0003800000 */ /*8150*/ FSETP.NEU.FTZ.AND P0, PT, |R0|.reuse, +INF , PT ; /* 0x7f8000000000780b */ /* 0x040fe40003f1d200 */ /*8160*/ FSETP.NEU.FTZ.AND P2, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f5d200 */ /*8170*/ FSETP.NEU.FTZ.AND P1, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fd60003f3d200 */ /*8180*/ @!P2 BRA !P0, 0x8620 ; /* 0x000004900000a947 */ /* 0x000fea0004000000 */ /*8190*/ LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff00ff7812 */ /* 0x000fc8000780c0ff */ /*81a0*/ PLOP3.LUT P0, PT, P2, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0001700572 */ /*81b0*/ @P0 BRA 0x8600 ; /* 0x0000044000000947 */ /* 0x000fea0003800000 */ /*81c0*/ LOP3.LUT P0, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fc8000780c0ff */ /*81d0*/ PLOP3.LUT P0, PT, P1, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f00572 */ /*81e0*/ @P0 BRA 0x85d0 ; /* 0x000003e000000947 */ /* 0x000fea0003800000 */ /*81f0*/ ISETP.GE.AND P0, PT, R34, RZ, PT ; /* 0x000000ff2200720c */ /* 0x000fe40003f06270 */ /*8200*/ ISETP.GE.AND P1, PT, R33, RZ, PT ; /* 0x000000ff2100720c */ /* 0x000fd60003f26270 */ /*8210*/ @P0 MOV R28, RZ ; /* 0x000000ff001c0202 */ /* 0x000fe20000000f00 */ /*8220*/ @!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000008823 */ /* 0x000fe200000000ff */ /*8230*/ @!P0 MOV R28, 0xffffffc0 ; /* 0xffffffc0001c8802 */ /* 0x000fe20000000f00 */ /*8240*/ @!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003039823 */ /* 0x000fc600000000ff */ /*8250*/ @!P1 IADD3 R28, R28, 0x40, RZ ; /* 0x000000401c1c9810 */ /* 0x000fe40007ffe0ff */ /*8260*/ LEA R36, R27, 0xc0800000, 0x17 ; /* 0xc08000001b247811 */ /* 0x000fe400078eb8ff */ /*8270*/ IADD3 R32, R32, -0x7f, RZ ; /* 0xffffff8120207810 */ /* 0x000fe40007ffe0ff */ /*8280*/ IADD3 R36, -R36, R3, RZ ; /* 0x0000000324247210 */ /* 0x000fc60007ffe1ff */ /*8290*/ IMAD R0, R32, -0x800000, R0 ; /* 0xff80000020007824 */ /* 0x000fe200078e0200 */ /*82a0*/ MUFU.RCP R34, R36 ; /* 0x0000002400227308 */ /* 0x000e220000001000 */ /*82b0*/ FADD.FTZ R3, -R36, -RZ ; /* 0x800000ff24037221 */ /* 0x000fc80000010100 */ /*82c0*/ FFMA R33, R34, R3, 1 ; /* 0x3f80000022217423 */ /* 0x001fc80000000003 */ /*82d0*/ FFMA R33, R34, R33, R34 ; /* 0x0000002122217223 */ /* 0x000fc80000000022 */ /*82e0*/ FFMA R34, R0, R33, RZ ; /* 0x0000002100227223 */ /* 0x000fc800000000ff */ /*82f0*/ FFMA R35, R3, R34, R0 ; /* 0x0000002203237223 */ /* 0x000fc80000000000 */ /*8300*/ FFMA R34, R33, R35, R34 ; /* 0x0000002321227223 */ /* 0x000fe20000000022 */ /*8310*/ IADD3 R35, R32, 0x7f, -R27 ; /* 0x0000007f20237810 */ /* 0x000fc60007ffe81b */ /*8320*/ FFMA R3, R3, R34, R0 ; /* 0x0000002203037223 */ /* 0x000fe20000000000 */ /*8330*/ IADD3 R35, R35, R28, RZ ; /* 0x0000001c23237210 */ /* 0x000fc60007ffe0ff */ /*8340*/ FFMA R0, R33, R3, R34 ; /* 0x0000000321007223 */ /* 0x000fca0000000022 */ /*8350*/ SHF.R.U32.HI R27, RZ, 0x17, R0 ; /* 0x00000017ff1b7819 */ /* 0x000fc80000011600 */ /*8360*/ LOP3.LUT R28, R27, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff1b1c7812 */ /* 0x000fc800078ec0ff */ /*8370*/ IADD3 R27, R28, R35, RZ ; /* 0x000000231c1b7210 */ /* 0x000fc80007ffe0ff */ /*8380*/ IADD3 R28, R27, -0x1, RZ ; /* 0xffffffff1b1c7810 */ /* 0x000fc80007ffe0ff */ /*8390*/ ISETP.GE.U32.AND P0, PT, R28, 0xfe, PT ; /* 0x000000fe1c00780c */ /* 0x000fda0003f06070 */ /*83a0*/ @!P0 BRA 0x85b0 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*83b0*/ ISETP.GT.AND P0, PT, R27, 0xfe, PT ; /* 0x000000fe1b00780c */ /* 0x000fda0003f04270 */ /*83c0*/ @P0 BRA 0x8580 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*83d0*/ ISETP.GE.AND P0, PT, R27, 0x1, PT ; /* 0x000000011b00780c */ /* 0x000fda0003f06270 */ /*83e0*/ @P0 BRA 0x8650 ; /* 0x0000026000000947 */ /* 0x000fea0003800000 */ /*83f0*/ ISETP.GE.AND P0, PT, R27, -0x18, PT ; /* 0xffffffe81b00780c */ /* 0x000fe40003f06270 */ /*8400*/ LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000000007812 */ /* 0x000fd600078ec0ff */ /*8410*/ @!P0 BRA 0x8650 ; /* 0x0000023000008947 */ /* 0x000fea0003800000 */ /*8420*/ FFMA.RZ R28, R33.reuse, R3.reuse, R34.reuse ; /* 0x00000003211c7223 */ /* 0x1c0fe2000000c022 */ /*8430*/ FFMA.RP R32, R33.reuse, R3.reuse, R34.reuse ; /* 0x0000000321207223 */ /* 0x1c0fe20000008022 */ /*8440*/ FFMA.RM R3, R33, R3, R34 ; /* 0x0000000321037223 */ /* 0x000fe20000004022 */ /*8450*/ IADD3 R33, R27.reuse, 0x20, RZ ; /* 0x000000201b217810 */ /* 0x040fe40007ffe0ff */ /*8460*/ LOP3.LUT R28, R28, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff1c1c7812 */ /* 0x000fe400078ec0ff */ /*8470*/ ISETP.NE.AND P2, PT, R27.reuse, RZ, PT ; /* 0x000000ff1b00720c */ /* 0x040fe40003f45270 */ /*8480*/ LOP3.LUT R28, R28, 0x800000, RZ, 0xfc, !PT ; /* 0x008000001c1c7812 */ /* 0x000fe400078efcff */ /*8490*/ ISETP.NE.AND P1, PT, R27, RZ, PT ; /* 0x000000ff1b00720c */ /* 0x000fc40003f25270 */ /*84a0*/ IADD3 R27, -R27, RZ, RZ ; /* 0x000000ff1b1b7210 */ /* 0x000fe40007ffe1ff */ /*84b0*/ SHF.L.U32 R33, R28, R33, RZ ; /* 0x000000211c217219 */ /* 0x000fe400000006ff */ /*84c0*/ FSETP.NEU.FTZ.AND P0, PT, R32, R3, PT ; /* 0x000000032000720b */ /* 0x000fe40003f1d000 */ /*84d0*/ SEL R27, R27, RZ, P2 ; /* 0x000000ff1b1b7207 */ /* 0x000fe40001000000 */ /*84e0*/ ISETP.NE.AND P1, PT, R33, RZ, P1 ; /* 0x000000ff2100720c */ /* 0x000fe40000f25270 */ /*84f0*/ SHF.R.U32.HI R28, RZ, R27, R28 ; /* 0x0000001bff1c7219 */ /* 0x000fc4000001161c */ /*8500*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40000703570 */ /*8510*/ SHF.R.U32.HI R27, RZ, 0x1, R28 ; /* 0x00000001ff1b7819 */ /* 0x000fe4000001161c */ /*8520*/ SEL R32, RZ, 0x1, !P0 ; /* 0x00000001ff207807 */ /* 0x000fc80004000000 */ /*8530*/ LOP3.LUT R3, R32, 0x1, R27, 0xf8, !PT ; /* 0x0000000120037812 */ /* 0x000fc800078ef81b */ /*8540*/ LOP3.LUT R28, R3, R28, RZ, 0xc0, !PT ; /* 0x0000001c031c7212 */ /* 0x000fc800078ec0ff */ /*8550*/ IADD3 R27, R27, R28, RZ ; /* 0x0000001c1b1b7210 */ /* 0x000fc80007ffe0ff */ /*8560*/ LOP3.LUT R0, R27, R0, RZ, 0xfc, !PT ; /* 0x000000001b007212 */ /* 0x000fe200078efcff */ /*8570*/ BRA 0x8650 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*8580*/ LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000000007812 */ /* 0x000fc800078ec0ff */ /*8590*/ LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000000007812 */ /* 0x000fe200078efcff */ /*85a0*/ BRA 0x8650 ; /* 0x000000a000007947 */ /* 0x000fea0003800000 */ /*85b0*/ LEA R0, R35, R0, 0x17 ; /* 0x0000000023007211 */ /* 0x000fe200078eb8ff */ /*85c0*/ BRA 0x8650 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*85d0*/ LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ; /* 0x8000000003007812 */ /* 0x000fc800078e4800 */ /*85e0*/ LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000000007812 */ /* 0x000fe200078efcff */ /*85f0*/ BRA 0x8650 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*8600*/ LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ; /* 0x8000000003007812 */ /* 0x000fe200078e4800 */ /*8610*/ BRA 0x8650 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*8620*/ MUFU.RSQ R0, -QNAN ; /* 0xffc0000000007908 */ /* 0x000e220000001400 */ /*8630*/ BRA 0x8650 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*8640*/ FADD.FTZ R0, R0, R3 ; /* 0x0000000300007221 */ /* 0x000fe20000010000 */ /*8650*/ MOV R3, 0x0 ; /* 0x0000000000037802 */ /* 0x000fc80000000f00 */ /*8660*/ RET.REL.NODEC R2 0x0 ; /* 0xffff799002007950 */ /* 0x000fea0003c3ffff */ /*8670*/ BRA 0x8670; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*8680*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*8690*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*86a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*86b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*86c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*86d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*86e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*86f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> extern "C" __device__ float vxd(const float m,float Vy, float w, float ZpTei, float Xr, float Kvx) { if (Vy > 0) { return ((m * Vy * w - Xr + ZpTei) * Kvx); } else { return ((m * Vy * w * 1.09f - Xr + ZpTei) * Kvx);//Vx*1.061 ;N0=3;k11=580.91f Ubuntu //return ((m * Vy * w - Xr + ZpTei) * Kvx); }//*1.1045; k11=5.91f windows ; 1.09; k11=580.91f } extern "C" __device__ float vyd(const float m,float Vx, float w, float ZpYri, float Yr, float Kvy) { if (Vx > 0) { return ((Yr - ZpYri - m * Vx * w * 1.0165f) * Kvy);//Vx*1.0179 //return ((Yr - ZpYri - m * Vx * w) * Kvy); } else {//*1.0165; k11=5.91f windows return ((Yr - ZpYri - m * Vx * w) * Kvy); } } extern "C" __device__ float wd(const float lr,float Mr, float ZpYri, float Yr, float Kw) { return ((Mr + lr * ZpYri) * Kw); } extern "C" __global__ void modelCalc(float* VX, float* VY, float* ww, float* X, float* Y, float* W, float* Xobs, float* Yobs, float T, float L, float B,float m,float lr,float Vx, float Vy, float v,float w, const int size,const int nShips) { int j = blockDim.x * blockIdx.x + threadIdx.x; if (j<nShips){ float k11, k22, k66, k26; const float delta = 0.7f;// float c1, c2, c3, m1, m2;// .. float w_ = 0.0f;// approx float betta_d = 0.0f;// (rad) float Cxr, Cyr, Cmr;// Cxr, , // float L1=B,T1=L/2;//, ???????????????????? const float p = 1000.0f;// float Xr, Yr, Mr;// float ZpTei = 0;// =R+Xa float Jz;// Gz float ZpYri;// const float a66 = 0.31f;// //float Ramp = 0.0f;// const float lyamdaR = 1.4f;// c 335 //0.5--1.4 //1 const float deltaR = 0.349f;// - 20% //0.349f // float Va;// float Yri, Ysi;// const float Ar = 6.0f;// //5 const float D = 1.5f;// //2 const float Cta = 10.0f, Ctt = 50.0f;//c 334 //Cta<=20, 0.5--30, Ctt<=20, 1--50 UP!!! //Ctt =30 float Kvx, Kvy, Kw;// const float No = 3.0f;// ////3 const float Re = 5000000.0f;// >5E8 float K_betta; float fit; const float xk = 1.0f; const float bettar = 0.9f; const float fik = 0.95f; float ld_;// c228 float betta_D;// float fiD;//c 338 float CyD1; float CyD; float A0;// float xD;//c 339 float viv = 0.0f;// 27 ch3_2 float Rmatr[3][3]={cosf(viv),-sinf(viv),0.0f,sinf(viv),cosf(viv),0.0f,0.0f,0.0f,1.0f}; //------------------------------------------------------------ //c 330 5.91- , 580.91 - k11 = (580.91f * (float) pow(B / L, 2.0f) + 7.76f * (B / L) - 0.259f) / (48.4f - 6.89f * (B / T) + 1.47f * (float) pow(B / T, 2.0f) - 0.0475f * (float) pow(B / T, 3.0f)); k22 = ((0.722f + 0.224f * delta) * (1.022f - (float) pow(B / L, 2.0f))) / (0.264f + 0.368f * (B / T)); k66 = (2.0f * T / B) * (2.59f + 0.781f * delta) * (0.357f - 1.77f * (float) pow(B / L, 2.0f)); k26 = k22; //k26=0; //c 323 c1 = 3.14f * (T / L) * (float) pow((0.63f / delta), (5.0f / 2.0f)) * (float) pow(L / (6.0f * B), (1.0f / 3.0f)) - 0.032f; c2 = -2.0f * k11 * delta * (B / L); c3 = 1.35f * (float) pow(T / B, (1.0f / 2.0f)) * (float) pow((0.63f / delta), (3.0f / 2.0f)) - 0.029f; m1 = 1.67f * (T / L) - 0.56f * delta + 0.43f; m2 = -0.44f * (T / L) - 0.0375f; // System.out.printf("c1=%f\tc2=%f\tc3=%f\tm1=%f\tm2=%f\n", c1, c2, c3, m1, m2); Jz = (m * (float) pow(L, 2.0f) / 12.4f) * (0.463f + 0.574f * (float) pow(delta, a66) + (float) pow(B / L, 2.0f));//c 330 Kvx = 1 / (m * (1 + k11)); Kvy = 1 / (m * (1 + k22)); Kw = 1 / (Jz * (1 + k66));//????? m //---------------------------------------------------------------- float k1, k2, k3, k4; float q1, q2, q3, q4; float z1, z2, z3, z4; float j1, j2, j3, j4; //t = 0.0f; // int t = 0; float h = 1.0f; for (int i = 0; i < size; i++) { //16550 v = (float) sqrt((float) pow(Vx, 2.0f) + (float) pow(Vy, 2.0f)); //assert(Vx==0); if (Vx != 0) { //c 353 ????????????????????????? w_ = w * L / v;//?????????????????????? betta_d = -(float) atan(Vy / Vx);//c 350 } else { w_ = w * L / v; //betta_d = 0; betta_d = -(float) atan(Vy / Vx);//c 350 } Cxr = 0.01f * (1.0f + 170.0f * (T / L));// c 119 Cyr = c1 * betta_d + c2 * w_ + c3 * betta_d * abs(betta_d);//c 323 Cmr = m1 * betta_d + m2 * w_; Xr = Cxr * L * T * (float) pow(v, 2.0f) * p / 2.0f;//c 320 Yr = Cyr * L * T * (float) pow(v, 2.0f) * p / 2.0f; Mr = Cmr * L * T * (float) pow(v, 2.0f) * p / 2.0f; K_betta = 0.43f * (float) pow(Ctt, -0.6f); fit = (float) pow(1.0f + Ctt, 0.508f); //IMPORTANT!!! deltaR Yri = 3.14f * (deltaR - K_betta * xk * (betta_d + lr * w_)) * p * Ar * (float) pow(v * fik * fit, 2.0f) / (1.0f + 2.2f / (float) pow(lyamdaR, 2.0f / 3.0f)); ld_ = 0.77f - 0.125f * (float) sqrt(Ctt) / (1.65f * (float) sqrt(Ctt) - 1.0f); betta_D = 1.22f - 0.0563f * (float) sqrt(Ctt) / (1.65f * (float) sqrt(Ctt) - 1.0f); fiD = 0.5f * ((float) sqrt(1.0f + 2.0f * Ctt / betta_D) + 1.0f); CyD1 = 12.0f * ld_ / (1.0f + 1.56f * ld_); CyD = CyD1 + 2.0f * betta_D * (float) pow(fiD, 2.0f); xD = xk * (CyD1 + 2.0f * betta_D * fiD) / (CyD1 + 2.0f * betta_D * (float) pow(fiD, 2.0f)); A0 = 3.14f * (float) pow(D, 2.0f) / 4.0f; Ysi = CyD * (xD - 0.02f * xk) * (betta_d + lr * w_) * (p / 2.0f) * A0 * (float) pow(v, 2.0f) * (float) pow(fik, 2.0f); ZpTei = 1000000.0f * (9.740f * (float) pow(No, 2.0f) - 2.23f * v); ////9.740f ZpYri = 2.0f * (Yri - Ysi);//2 k1 = h * vxd(m,Vy, w, ZpTei, Xr, Kvx); q1 = h * vyd(m,Vx, w, ZpYri, Yr, Kvy); z1 = h * wd(lr,Mr, ZpTei, Yr, Kw); k2 = h * vxd(m,Vy + q1 / 2.0f, w + z1 / 2.0f, ZpTei, Xr, Kvx); q2 = h * vyd(m,Vx + k1 / 2.0f, w + z1 / 2.0f, ZpYri, Yr, Kvy); z2 = h * wd(lr,Mr, ZpYri, Yr, Kw); k3 = h * vxd(m,Vy + q2 / 2.0f, w + z2 / 2.0f, ZpTei, Xr, Kvx); q3 = h * vyd(m,Vx + k2 / 2.0f, w + z2 / 2.0f, ZpYri, Yr, Kvy); z3 = h * wd(lr,Mr, ZpYri, Yr, Kw); k4 = h * vxd(m,Vy + q3, w + z3, ZpTei, Xr, Kvx); q4 = h * vyd(m,Vx + k3, w + z3, ZpYri, Yr, Kvy); z4 = h * wd(lr,Mr, ZpYri, Yr, Kw); Vx = Vx + (1.0f / 6.0f) * (k1 + 2.0f * k2 + 2.0f * k3 + k4); //VX[t] = Vx / 1.24f; VX[t] = Vx; Vy = Vy + (1.0f / 6.0f) * (q1 + 2.0f * q2 + 2.0f * q3 + q4); VY[t] = Vy; w = w + (1.0f / 6.0f) * (z1 + 2.0f * z2 + 2.0f * z3 + z4); ww[t] = w; //--- ----------------------------------------- k1 = h * vxd(m,Vy, w, ZpTei, Xr, Kvx); q1 = h * vyd(m,Vx, w, ZpYri, Yr, Kvy); z1 = h * wd(lr,Mr, ZpTei, Yr, Kw); k2 = h * vxd(m,Vy + q1 / 2.0f, w + z1 / 2.0f, ZpTei, Xr, Kvx); q2 = h * vyd(m,Vx + k1 / 2.0f, w + z1 / 2.0f, ZpYri, Yr, Kvy); z2 = h * wd(lr,Mr, ZpYri, Yr, Kw); k3 = h * vxd(m,Vy + q2 / 2.0f, w + z2 / 2.0f, ZpTei, Xr, Kvx); q3 = h * vyd(m,Vx + k2 / 2.0f, w + z2 / 2.0f, ZpYri, Yr, Kvy); z3 = h * wd(lr,Mr, ZpYri, Yr, Kw); k4 = h * vxd(m,Vy + q3, w + z3, ZpTei, Xr, Kvx); q4 = h * vyd(m,Vx + k3, w + z3, ZpYri, Yr, Kvy); z4 = h * wd(lr,Mr, ZpYri, Yr, Kw); X[t] = Vx + (1.0f / 6.0f) * (k1 + 2.0f * k2 + 2.0f * k3 + k4); Y[t] = Vy + (1.0f / 6.0f) * (q1 + 2.0f * q2 + 2.0f * q3 + q4); W[t] = w + (1.0f / 6.0f) * (z1 + 2.0f * z2 + 2.0f * z3 + z4); // viv = W[t]; //------- Rmatr[0][0] = (float)cos(viv); Rmatr[0][1] = -(float)sin(viv); Rmatr[1][0] = (float)sin(viv); Rmatr[1][1] = (float)cos(viv); Xobs[t] = Rmatr[0][0] * X[t] + Rmatr[0][1] * Y[t]; Yobs[t] = Rmatr[1][0] * X[t] + Rmatr[1][1] * Y[t]; //---------- t++; } } }
.text .file "modelCalc.hip" .globl __device_stub__modelCalc # -- Begin function __device_stub__modelCalc .type __device_stub__modelCalc,@function __device_stub__modelCalc: # @__device_stub__modelCalc .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $280, %rsp # imm = 0x118 .cfi_def_cfa_offset 336 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 leaq 88(%rsp), %rax movq %rdi, (%rax) leaq 80(%rsp), %rdi movq %rsi, (%rdi) leaq 72(%rsp), %rsi movq %rdx, (%rsi) leaq 64(%rsp), %rdx movq %rcx, (%rdx) leaq 56(%rsp), %rcx movq %r8, (%rcx) leaq 48(%rsp), %r8 movq %r9, (%r8) leaq 28(%rsp), %r9 movss %xmm0, (%r9) leaq 24(%rsp), %r10 movss %xmm1, (%r10) leaq 20(%rsp), %r11 movss %xmm2, (%r11) leaq 16(%rsp), %r14 movss %xmm3, (%r14) leaq 12(%rsp), %r15 movss %xmm4, (%r15) leaq 8(%rsp), %r12 movss %xmm5, (%r12) leaq 4(%rsp), %r13 movss %xmm6, (%r13) movq %rsp, %rbp movss %xmm7, (%rbp) leaq 128(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 336(%rsp), %rax movq %rax, 48(%rbx) leaq 344(%rsp), %rax movq %rax, 56(%rbx) movq %r9, 64(%rbx) movq %r10, 72(%rbx) movq %r11, 80(%rbx) movq %r14, 88(%rbx) movq %r15, 96(%rbx) movq %r12, 104(%rbx) movq %r13, 112(%rbx) movq %rbp, 120(%rbx) leaq 352(%rsp), %rax movq %rax, 128(%rbx) leaq 360(%rsp), %rax movq %rax, 136(%rbx) leaq 368(%rsp), %rax movq %rax, 144(%rbx) leaq 112(%rsp), %r14 leaq 96(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $modelCalc, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $296, %rsp # imm = 0x128 .cfi_adjust_cfa_offset -296 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size __device_stub__modelCalc, .Lfunc_end0-__device_stub__modelCalc .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $modelCalc, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type modelCalc,@object # @modelCalc .section .rodata,"a",@progbits .globl modelCalc .p2align 3, 0x0 modelCalc: .quad __device_stub__modelCalc .size modelCalc, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "modelCalc" .size .L__unnamed_1, 10 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __device_stub__modelCalc .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym modelCalc .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected modelCalc ; -- Begin function modelCalc .globl modelCalc .p2align 8 .type modelCalc,@function modelCalc: ; @modelCalc ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x7c s_load_b128 s[36:39], s[0:1], 0x60 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s38, v1 s_cbranch_execz .LBB0_23 ; %bb.1: s_cmp_lt_i32 s37, 1 s_cbranch_scc1 .LBB0_23 ; %bb.2: ; %.lr.ph s_load_b256 s[24:31], s[0:1], 0x40 s_mov_b32 s7, 0xc0dc7ae1 s_waitcnt lgkmcnt(0) s_mov_b32 s31, 0x3e76c4e1 s_mov_b32 s13, 0x3ebc6a7f v_div_scale_f32 v1, null, s25, s25, s26 v_div_scale_f32 v5, null, s24, s24, s26 v_div_scale_f32 v8, vcc_lo, s26, s25, s26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f32_e32 v6, v1 v_rcp_f32_e32 v7, v5 v_div_scale_f32 v9, s3, s26, s24, s26 v_div_scale_f32 v3, null, s25, s25, s24 s_waitcnt_depctr 0xfff v_fma_f32 v0, -v1, v6, 1.0 v_fma_f32 v2, -v5, v7, 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_fmac_f32 v6, v0, v6 :: v_dual_fmac_f32 v7, v2, v7 v_add_f32_e64 v0, s24, s24 v_dual_mul_f32 v10, v8, v6 :: v_dual_mul_f32 v11, v9, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_div_scale_f32 v14, null, s26, s26, v0 v_div_scale_f32 v15, s5, v0, s26, v0 v_fma_f32 v2, -v1, v10, v8 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v4, -v5, v11, v9 v_dual_fmac_f32 v10, v2, v6 :: v_dual_fmac_f32 v11, v4, v7 v_mul_f32_e64 v2, 0x40c00000, s26 v_div_scale_f32 v4, s2, s24, s25, s24 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f32 v1, -v1, v10, v8 v_fma_f32 v5, -v5, v11, v9 v_frexp_mant_f32_e64 v8, |s25| v_div_scale_f32 v16, null, v2, v2, s25 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_div_fmas_f32 v1, v1, v6, v10 s_mov_b32 vcc_lo, s3 v_cmp_gt_f32_e64 s4, 0x3f2aaaab, v8 v_div_fmas_f32 v7, v5, v7, v11 v_rcp_f32_e32 v10, v3 v_div_fixup_f32 v1, v1, s25, s26 v_div_scale_f32 v5, null, s26, s26, s24 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_div_fixup_f32 v7, v7, s24, s26 v_cndmask_b32_e64 v19, 0, 1, s4 v_frexp_mant_f32_e64 v9, |v1| v_div_scale_f32 v17, s6, s25, v2, s25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_frexp_mant_f32_e64 v11, |v7| v_ldexp_f32 v8, v8, v19 s_delay_alu instid0(VALU_DEP_4) v_cmp_gt_f32_e64 s8, 0x3f2aaaab, v9 v_fma_f32 v22, -v3, v10, 1.0 v_cmp_eq_f32_e32 vcc_lo, 1.0, v1 v_cmp_gt_f32_e64 s9, 0x3f2aaaab, v11 v_cmp_eq_f32_e64 s10, 1.0, v7 v_cndmask_b32_e64 v12, 0, 1, s8 v_frexp_exp_i32_f32_e32 v39, v7 v_div_scale_f32 v6, s3, s24, s26, s24 v_cndmask_b32_e64 v13, 0, 1, s9 s_delay_alu instid0(VALU_DEP_4) v_ldexp_f32 v18, v9, v12 v_rcp_f32_e32 v9, v5 v_add_f32_e32 v25, -1.0, v8 v_rcp_f32_e32 v12, v14 v_ldexp_f32 v13, v11, v13 v_add_f32_e32 v26, -1.0, v18 v_add_f32_e32 v20, 1.0, v18 v_add_f32_e32 v28, 1.0, v8 v_rcp_f32_e32 v11, v16 v_add_f32_e32 v21, 1.0, v13 v_add_f32_e32 v27, -1.0, v13 v_rcp_f32_e32 v19, v20 v_fma_f32 v23, -v5, v9, 1.0 v_fma_f32 v29, -v14, v12, 1.0 v_rcp_f32_e32 v24, v21 v_fmac_f32_e32 v10, v22, v10 v_subrev_co_ci_u32_e64 v39, s9, 0, v39, s9 v_add_f32_e32 v33, -1.0, v21 v_fma_f32 v22, -v16, v11, 1.0 v_cndmask_b32_e64 v49, 0x40400000, 1.0, s10 s_delay_alu instid0(TRANS32_DEP_2) | instskip(SKIP_2) | instid1(TRANS32_DEP_1) v_mul_f32_e32 v30, v26, v19 v_cmp_class_f32_e64 s14, v1, 0x204 v_fmac_f32_e32 v9, v23, v9 v_mul_f32_e32 v31, v27, v24 v_add_f32_e32 v32, -1.0, v20 v_dual_mul_f32 v34, v20, v30 :: v_dual_sub_f32 v13, v13, v33 v_cmp_class_f32_e64 s15, v7, 0x204 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_mul_f32 v35, v21, v31 :: v_dual_sub_f32 v18, v18, v32 v_fma_f32 v20, v30, v20, -v34 v_rcp_f32_e32 v32, v28 v_add_f32_e32 v33, -1.0, v28 s_delay_alu instid0(VALU_DEP_3) v_fma_f32 v23, v31, v21, -v35 v_fmac_f32_e32 v12, v29, v12 v_fmac_f32_e32 v20, v30, v18 v_mul_f32_e32 v21, v4, v10 v_fmac_f32_e32 v11, v22, v11 v_fmac_f32_e32 v23, v31, v13 v_sub_f32_e32 v8, v8, v33 v_add_f32_e32 v18, v34, v20 v_dual_mul_f32 v36, v25, v32 :: v_dual_mul_f32 v13, v6, v9 v_mul_f32_e32 v22, v15, v12 v_add_f32_e32 v29, v35, v23 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_sub_f32 v33, v26, v18 :: v_dual_mul_f32 v38, v28, v36 v_dual_sub_f32 v34, v18, v34 :: v_dual_sub_f32 v37, v27, v29 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_sub_f32 v35, v29, v35 :: v_dual_sub_f32 v26, v26, v33 v_fma_f32 v28, v36, v28, -v38 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_sub_f32 v20, v34, v20 :: v_dual_sub_f32 v27, v27, v37 v_sub_f32_e32 v18, v26, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_sub_f32_e32 v26, v27, v29 v_fma_f32 v27, -v3, v21, v4 v_fmac_f32_e32 v28, v36, v8 v_add_f32_e32 v8, v20, v18 v_frexp_exp_i32_f32_e32 v29, v1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_dual_fmac_f32 v21, v27, v10 :: v_dual_add_f32 v20, v38, v28 v_sub_f32_e32 v34, v35, v23 v_add_f32_e32 v8, v33, v8 v_cndmask_b32_e64 v27, 2.0, 1.0, vcc_lo v_subrev_co_ci_u32_e64 v29, s8, 0, v29, s8 v_sub_f32_e32 v33, v20, v38 v_add_f32_e32 v18, v34, v26 v_cndmask_b32_e64 v38, 2.0, 1.0, s10 v_cmp_eq_f32_e32 vcc_lo, 0, v1 v_mul_f32_e32 v23, v17, v11 v_fma_f32 v26, -v14, v22, v15 v_add_f32_e32 v18, v37, v18 v_trunc_f32_e32 v46, v38 v_fmaak_f32 v37, s7, v7, 0x4241999a v_cmp_eq_f32_e64 s7, 0, v7 v_fmac_f32_e32 v22, v26, v12 v_mul_f32_e32 v18, v24, v18 v_cmp_eq_f32_e64 s9, v46, v38 v_fma_f32 v3, -v3, v21, v4 v_cndmask_b32_e64 v44, 0x7f800000, 0, s7 v_fma_f32 v15, -v14, v22, v15 v_dual_add_f32 v35, v31, v18 :: v_dual_sub_f32 v34, v25, v20 v_dual_sub_f32 v28, v33, v28 :: v_dual_mul_f32 v47, 0.5, v38 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v31, v35, v31 v_dual_sub_f32 v25, v25, v34 :: v_dual_sub_f32 v18, v18, v31 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_dual_sub_f32 v20, v25, v20 :: v_dual_add_f32 v43, v18, v18 v_mul_f32_e32 v8, v19, v8 v_cndmask_b32_e64 v19, 0x7f800000, 0, vcc_lo s_or_b32 vcc_lo, vcc_lo, s14 v_add_f32_e32 v24, v30, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v30, v24, v30 v_sub_f32_e32 v8, v8, v30 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v30, v35, v35 :: v_dual_add_f32 v41, v8, v8 v_fma_f32 v42, v35, v35, -v30 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fmac_f32_e32 v42, v35, v43 v_dual_mul_f32 v40, v24, v24 :: v_dual_mul_f32 v43, 0.5, v27 v_add_f32_e32 v33, v30, v42 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v31, v24, v24, -v40 v_mul_f32_e32 v55, v35, v33 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fmac_f32_e32 v31, v24, v41 v_trunc_f32_e32 v41, v27 v_fma_f32 v59, v33, v35, -v55 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v45, v40, v31 v_cmp_eq_f32_e64 s8, v41, v27 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fmaak_f32 v48, s31, v45, 0x3e91f4c4 v_dual_sub_f32 v40, v45, v40 :: v_dual_mul_f32 v53, v24, v45 v_fmaak_f32 v48, v45, v48, 0x3ecccdef s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v25, v31, v40 v_fma_f32 v57, v45, v24, -v53 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v51, v45, v48 v_fma_f32 v31, v45, v48, -v51 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v31, v25, v48 v_fmac_f32_e32 v57, v45, v8 v_ldexp_f32 v8, v8, 1 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_dual_add_f32 v46, v51, v31 :: v_dual_fmac_f32 v57, v25, v24 v_cvt_f32_i32_e32 v25, v29 v_ldexp_f32 v24, v24, 1 v_dual_sub_f32 v51, v46, v51 :: v_dual_fmaak_f32 v50, s31, v33, 0x3e91f4c4 v_add_f32_e32 v56, 0x3f2aaaaa, v46 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_sub_f32 v30, v33, v30 :: v_dual_sub_f32 v31, v31, v51 v_fmaak_f32 v41, v33, v50, 0x3ecccdef s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_add_f32 v51, 0xbf2aaaaa, v56 :: v_dual_sub_f32 v30, v42, v30 v_dual_mul_f32 v48, 0.5, v49 :: v_dual_fmac_f32 v59, v33, v18 v_mul_f32_e32 v52, v33, v41 v_trunc_f32_e32 v50, v43 v_add_f32_e32 v31, 0x31739010, v31 v_trunc_f32_e32 v42, v47 v_fmac_f32_e32 v59, v30, v35 v_fma_f32 v40, v33, v41, -v52 v_add_f32_e32 v33, v53, v57 v_cmp_neq_f32_e64 s10, v50, v43 v_ldexp_f32 v35, v35, 1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_add_f32 v43, v55, v59 :: v_dual_fmac_f32 v40, v30, v41 v_sub_f32_e32 v50, v33, v53 v_cmp_neq_f32_e64 s11, v42, v47 v_ldexp_f32 v18, v18, 1 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_dual_sub_f32 v53, v43, v55 :: v_dual_add_f32 v54, v52, v40 v_trunc_f32_e32 v41, v49 s_and_b32 s10, s8, s10 v_sub_f32_e32 v52, v54, v52 v_add_f32_e32 v58, 0x3f2aaaaa, v54 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_eq_f32_e64 s12, v41, v49 v_sub_f32_e32 v40, v40, v52 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v52, 0xbf2aaaaa, v58 v_add_f32_e32 v40, 0x31739010, v40 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v45, v54, v52 v_dual_sub_f32 v46, v46, v51 :: v_dual_add_f32 v29, v40, v45 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_add_f32 v31, v31, v46 :: v_dual_add_f32 v20, v28, v20 v_sub_f32_e32 v28, v59, v53 v_add_f32_e32 v30, v56, v31 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v45, v56, v30 v_dual_mul_f32 v46, v33, v30 :: v_dual_add_f32 v31, v31, v45 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v45, v33, v30, -v46 v_dual_add_f32 v40, v58, v29 :: v_dual_fmac_f32 v45, v33, v31 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v51, v58, v40 v_dual_mul_f32 v52, v43, v40 :: v_dual_add_f32 v29, v29, v51 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v51, v43, v40, -v52 v_fmac_f32_e32 v51, v43, v29 v_cvt_f32_i32_e32 v29, v39 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v51, v28, v40 v_mul_f32_e32 v31, 0x3f317218, v29 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v39, v52, v51 :: v_dual_sub_f32 v50, v57, v50 v_fmac_f32_e32 v45, v50, v30 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_sub_f32 v43, v39, v52 :: v_dual_add_f32 v28, v46, v45 v_dual_sub_f32 v43, v51, v43 :: v_dual_add_f32 v20, v34, v20 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_sub_f32_e32 v42, v28, v46 v_add_f32_e32 v46, v35, v39 v_dual_sub_f32 v35, v46, v35 :: v_dual_mul_f32 v30, 0x3f317218, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f32 v33, 0x3f317218, v25, -v30 v_add_f32_e32 v40, v24, v28 v_dual_add_f32 v18, v18, v43 :: v_dual_fmac_f32 v33, 0xb102e308, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v25, v39, v35 v_add_f32_e32 v18, v18, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v24, v40, v24 v_sub_f32_e32 v24, v28, v24 v_fma_f32 v28, 0x3f317218, v29, -v31 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fmac_f32_e32 v28, 0xb102e308, v29 v_trunc_f32_e32 v29, v48 v_dual_add_f32 v35, v31, v28 :: v_dual_sub_f32 v42, v45, v42 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_sub_f32 v31, v35, v31 :: v_dual_add_f32 v8, v8, v42 v_cndmask_b32_e64 v42, 1.0, v1, s10 v_sub_f32_e32 v28, v28, v31 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v8, v8, v24 v_dual_add_f32 v24, v30, v33 :: v_dual_add_f32 v25, v40, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v30, v24, v30 v_add_f32_e32 v41, v24, v25 v_add_f32_e32 v39, v46, v18 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_sub_f32_e32 v30, v33, v30 v_sub_f32_e32 v33, v25, v40 v_add_f32_e32 v43, v35, v39 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_sub_f32 v31, v43, v35 :: v_dual_sub_f32 v8, v8, v33 v_sub_f32_e32 v33, v43, v31 v_sub_f32_e32 v31, v39, v31 v_sub_f32_e32 v45, v41, v24 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v33, v35, v33 v_sub_f32_e32 v25, v25, v45 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_add_f32_e32 v31, v31, v33 v_sub_f32_e32 v46, v39, v46 v_cndmask_b32_e64 v33, 0, v1, s10 s_and_b32 s10, s9, s11 v_cmp_neq_f32_e64 s11, v29, v48 v_sub_f32_e32 v18, v18, v46 v_sub_f32_e32 v40, v41, v45 v_bfi_b32 v19, 0x7fffffff, v19, v33 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v24, v24, v40 v_dual_add_f32 v24, v25, v24 :: v_dual_add_f32 v25, v28, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v35, v25, v28 v_add_f32_e32 v31, v25, v31 v_dual_sub_f32 v25, v25, v35 :: v_dual_add_f32 v40, v30, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v25, v28, v25 v_sub_f32_e32 v34, v40, v30 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_sub_f32_e32 v39, v40, v34 v_add_f32_e32 v24, v40, v24 v_sub_f32_e32 v8, v8, v34 v_add_f32_e32 v34, v43, v31 v_add_f32_e32 v40, v41, v24 v_sub_f32_e32 v30, v30, v39 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_sub_f32 v28, v34, v43 :: v_dual_sub_f32 v39, v40, v41 v_sub_f32_e32 v18, v18, v35 v_dual_add_f32 v18, v18, v25 :: v_dual_sub_f32 v25, v31, v28 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v18, v18, v25 v_add_f32_e32 v29, v34, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_dual_mul_f32 v35, v38, v29 :: v_dual_sub_f32 v24, v24, v39 v_dual_mul_f32 v39, v49, v29 :: v_dual_add_f32 v8, v8, v30 v_cndmask_b32_e64 v30, 1.0, v7, s10 v_add_f32_e32 v8, v8, v24 v_cndmask_b32_e64 v24, 0, v7, s10 s_and_b32 s10, s12, s11 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v28, 1.0, v7, s10 v_add_f32_e32 v25, v40, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_bfi_b32 v24, 0x7fffffff, v44, v24 v_dual_mul_f32 v33, v27, v25 :: v_dual_mul_f32 v20, v32, v20 v_sub_f32_e32 v32, v25, v40 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v25, v27, v25, -v33 v_dual_add_f32 v31, v36, v20 :: v_dual_sub_f32 v34, v29, v34 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_sub_f32_e32 v8, v8, v32 v_cmp_class_f32_e64 s11, v33, 0x204 v_sub_f32_e32 v32, v31, v36 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_sub_f32_e32 v18, v18, v34 v_fma_f32 v34, v38, v29, -v35 v_fma_f32 v29, v49, v29, -v39 v_fmac_f32_e32 v25, v27, v8 v_mul_f32_e32 v8, v31, v31 v_fmac_f32_e32 v34, v38, v18 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v29, v49, v18 v_add_f32_e32 v18, v33, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v36, v35, v34 v_add_f32_e32 v38, v39, v29 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_sub_f32_e32 v40, v18, v33 v_cndmask_b32_e64 v18, v18, v33, s11 v_cmp_class_f32_e64 s11, v35, 0x204 v_sub_f32_e32 v33, v36, v35 v_sub_f32_e32 v25, v25, v40 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v35, v36, v35, s11 v_cmp_class_f32_e64 s11, v39, 0x204 v_sub_f32_e32 v33, v34, v33 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v36, v38, v39, s11 v_cmp_eq_f32_e64 s11, 0x42b17218, v18 v_sub_f32_e32 v38, v38, v39 v_cndmask_b32_e64 v41, 0, 0x37000000, s11 v_cmp_eq_f32_e64 s11, 0x42b17218, v35 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_sub_f32 v29, v29, v38 :: v_dual_sub_f32 v46, v18, v41 v_cndmask_b32_e64 v43, 0, 0x37000000, s11 v_cmp_eq_f32_e64 s11, 0x42b17218, v36 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f32_e32 v47, 0x3fb8aa3b, v46 v_sub_f32_e32 v39, v35, v43 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v45, 0, 0x37000000, s11 v_cmp_neq_f32_e64 s11, 0x7f800000, |v18| v_fma_f32 v48, 0x3fb8aa3b, v46, -v47 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f32_e32 v34, 0x3fb8aa3b, v39 v_sub_f32_e32 v40, v36, v45 s_delay_alu instid0(VALU_DEP_4) v_cndmask_b32_e64 v18, 0, v25, s11 v_cmp_neq_f32_e64 s11, 0x7f800000, |v35| v_rndne_f32_e32 v49, v47 v_fma_f32 v50, 0x3fb8aa3b, v39, -v34 v_rndne_f32_e32 v51, v34 v_fmac_f32_e32 v48, 0x32a5705f, v46 v_cndmask_b32_e64 v33, 0, v33, s11 v_cmp_neq_f32_e64 s11, 0x7f800000, |v36| v_dual_sub_f32 v47, v47, v49 :: v_dual_fmac_f32 v50, 0x32a5705f, v39 v_sub_f32_e32 v34, v34, v51 v_cvt_i32_f32_e32 v36, v49 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v29, 0, v29, s11 v_add_f32_e32 v25, v47, v48 v_cmp_ngt_f32_e64 s11, 0xc2ce8ed0, v46 v_add_f32_e32 v34, v34, v50 v_add_f32_e32 v18, v41, v18 v_add_f32_e32 v29, v45, v29 v_sub_f32_e32 v27, v20, v32 v_mul_f32_e32 v38, 0x3fb8aa3b, v40 v_exp_f32_e32 v25, v25 v_exp_f32_e32 v34, v34 v_fma_f32 v20, v31, v31, -v8 v_add_f32_e32 v32, v27, v27 v_fma_f32 v52, 0x3fb8aa3b, v40, -v38 v_rndne_f32_e32 v53, v38 v_add_f32_e32 v33, v43, v33 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v20, v31, v32 v_fmac_f32_e32 v52, 0x32a5705f, v40 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_sub_f32_e32 v38, v38, v53 v_ldexp_f32 v25, v25, v36 v_cvt_i32_f32_e32 v41, v53 v_cndmask_b32_e64 v36, 0, v7, s10 v_add_f32_e32 v38, v38, v52 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v25, 0, v25, s11 v_cmp_ngt_f32_e64 s11, 0xc2ce8ed0, v39 v_exp_f32_e32 v35, v38 v_cvt_i32_f32_e32 v38, v51 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_ldexp_f32 v34, v34, v38 s_waitcnt_depctr 0xfff v_ldexp_f32 v35, v35, v41 v_cndmask_b32_e64 v34, 0, v34, s11 v_cmp_ngt_f32_e64 s11, 0xc2ce8ed0, v40 v_cndmask_b32_e64 v35, 0, v35, s11 v_cmp_nlt_f32_e64 s11, 0x42b17218, v46 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v25, 0x7f800000, v25, s11 v_cmp_nlt_f32_e64 s11, 0x42b17218, v39 v_fma_f32 v18, v25, v18, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v34, 0x7f800000, v34, s11 v_cmp_nlt_f32_e64 s11, 0x42b17218, v40 v_cmp_eq_f32_e64 s10, 0x7f800000, v25 v_fma_f32 v32, v34, v33, v34 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v35, 0x7f800000, v35, s11 v_cndmask_b32_e64 v18, v18, v25, s10 v_cmp_eq_f32_e64 s10, 0x7f800000, v34 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v29, v35, v29, v35 v_bfi_b32 v18, 0x7fffffff, v18, v42 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v25, v32, v34, s10 v_cmp_eq_f32_e64 s10, 0x7f800000, v35 v_add_f32_e32 v32, v8, v20 v_cndmask_b32_e64 v33, 0x7fc00000, v18, s8 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_bfi_b32 v25, 0x7fffffff, v25, v30 v_cndmask_b32_e64 v29, v29, v35, s10 v_cmp_gt_f32_e64 s8, 0, v7 v_bfi_b32 v30, 0x7fffffff, v44, v36 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v34, 0x7fc00000, v25, s9 v_bfi_b32 v28, 0x7fffffff, v29, v28 v_cmp_gt_f32_e64 s9, 0, v1 v_fmaak_f32 v29, s31, v32, 0x3e91f4c4 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v35, 0x7fc00000, v28, s12 v_cndmask_b32_e64 v18, v18, v33, s9 v_sub_f32_e32 v33, v32, v8 v_cndmask_b32_e64 v8, v25, v34, s8 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v25, v28, v35, s8 v_cndmask_b32_e32 v18, v18, v19, vcc_lo s_or_b32 vcc_lo, s7, s15 v_mul_f32_e32 v35, v31, v32 v_cndmask_b32_e32 v19, v8, v24, vcc_lo v_cndmask_b32_e32 v25, v25, v30, vcc_lo v_cmp_o_f32_e32 vcc_lo, v1, v1 v_fmaak_f32 v24, v32, v29, 0x3ecccdef v_sub_f32_e32 v29, v20, v33 v_fma_f32 v39, v32, v31, -v35 v_cndmask_b32_e32 v8, 0x7fc00000, v18, vcc_lo v_mul_f32_e32 v18, 0x3fbc28f6, v19 v_cmp_u_f32_e32 vcc_lo, v7, v7 v_dual_mul_f32 v28, v32, v24 :: v_dual_mul_f32 v19, 0x3d428f5c, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_mul_f32_e32 v25, 0x44113a3d, v8 v_sub_f32_e32 v33, 0x3f82d0e5, v8 v_cndmask_b32_e64 v18, v18, 0x7fc00000, vcc_lo v_fma_f32 v30, v32, v24, -v28 v_cndmask_b32_e64 v20, v19, 0x7fc00000, vcc_lo v_fmamk_f32 v19, v1, 0x40f851ec, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_fmaak_f32 v7, s13, v7, 0x3e872b02 :: v_dual_add_f32 v18, v37, v18 v_fmac_f32_e32 v30, v29, v24 v_fma_f32 v25, -v16, v23, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v19, 0xbe849ba6, v19 v_dual_fmac_f32 v39, v32, v27 :: v_dual_sub_f32 v20, v18, v20 v_mul_f32_e32 v18, 0x3f60f90a, v33 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_add_f32 v24, v28, v30 :: v_dual_fmac_f32 v23, v25, v11 v_fmac_f32_e32 v39, v29, v31 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_div_scale_f32 v33, null, v20, v20, v19 v_div_scale_f32 v34, null, v7, v7, v18 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v28, v24, v28 v_rcp_f32_e32 v36, v33 v_add_f32_e32 v37, 0x3f2aaaaa, v24 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_rcp_f32_e32 v38, v34 v_fma_f32 v16, -v16, v23, v17 v_sub_f32_e32 v28, v30, v28 v_div_scale_f32 v30, vcc_lo, v19, v20, v19 v_dual_add_f32 v26, 0xbf2aaaaa, v37 :: v_dual_add_f32 v29, v35, v39 v_add_f32_e32 v4, 0x31739010, v28 s_delay_alu instid0(TRANS32_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f32 v28, -v33, v36, 1.0 s_load_b512 s[8:23], s[0:1], 0x0 v_sub_f32_e32 v24, v24, v26 s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v26, -v34, v38, 1.0 v_fmac_f32_e32 v36, v28, v36 v_div_scale_f32 v28, s7, v18, v7, v18 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fmac_f32_e32 v38, v26, v38 v_add_f32_e32 v4, v4, v24 v_dual_mul_f32 v24, v30, v36 :: v_dual_mul_f32 v25, v28, v38 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v26, v37, v4 v_fma_f32 v14, -v33, v24, v30 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v32, -v34, v25, v28 v_dual_sub_f32 v17, v37, v26 :: v_dual_fmac_f32 v24, v14, v36 v_mul_f32_e32 v37, v29, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fmac_f32_e32 v25, v32, v38 v_add_f32_e32 v17, v4, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_fma_f32 v4, -v33, v24, v30 v_sub_f32_e32 v32, v29, v35 v_fma_f32 v30, v29, v26, -v37 v_fma_f32 v28, -v34, v25, v28 v_div_fmas_f32 v14, v4, v36, v24 s_mov_b32 vcc_lo, s7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fmac_f32_e32 v30, v29, v17 v_div_fmas_f32 v4, v28, v38, v25 s_mov_b32 vcc_lo, s5 v_ldexp_f32 v17, v27, 1 v_div_fmas_f32 v12, v15, v12, v22 s_mov_b32 vcc_lo, s2 v_fma_f32 v15, -v5, v13, v6 v_div_fmas_f32 v10, v3, v10, v21 s_mov_b32 vcc_lo, s6 v_div_fixup_f32 v0, v12, s26, v0 v_div_fmas_f32 v3, v16, v11, v23 v_frexp_exp_i32_f32_e32 v11, s25 v_fmac_f32_e32 v13, v15, v9 v_sub_f32_e32 v16, v39, v32 v_div_fixup_f32 v10, v10, s25, s24 v_div_fixup_f32 v3, v3, v2, s25 v_subrev_co_ci_u32_e64 v2, vcc_lo, 0, v11, s4 s_mov_b32 vcc_lo, s3 v_fmac_f32_e32 v30, v16, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_frexp_mant_f32_e64 v11, |v3| v_cvt_f32_i32_e32 v15, v2 v_fma_f32 v2, -v5, v13, v6 v_ldexp_f32 v5, v31, 1 v_add_f32_e32 v6, v37, v30 v_cmp_gt_f32_e64 s2, 0x3f2aaaab, v11 v_cmp_eq_f32_e64 s3, s25, 1.0 v_div_fmas_f32 v2, v2, v9, v13 v_mul_f32_e32 v9, 0x3f317218, v15 v_add_f32_e32 v13, v5, v6 v_cndmask_b32_e64 v16, 0, 1, s2 v_cmp_eq_f32_e64 s7, s25, 0 v_div_fixup_f32 v2, v2, s26, s24 v_fma_f32 v23, 0x3f317218, v15, -v9 v_sub_f32_e32 v5, v13, v5 v_ldexp_f32 v11, v11, v16 v_sub_f32_e32 v16, v6, v37 v_frexp_mant_f32_e64 v22, |v2| v_fmac_f32_e32 v23, 0xb102e308, v15 v_sub_f32_e32 v5, v6, v5 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_add_f32 v21, 1.0, v11 :: v_dual_sub_f32 v16, v30, v16 v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v22 v_add_f32_e32 v15, -1.0, v11 v_cmp_class_f32_e64 s6, s25, 0x204 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_rcp_f32_e32 v6, v21 v_add_f32_e32 v16, v17, v16 v_cndmask_b32_e64 v17, 0, 1, vcc_lo v_add_f32_e32 v26, -1.0, v21 s_mov_b32 s26, 0xb94c1982 v_add_f32_e32 v5, v16, v5 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_ldexp_f32 v16, v22, v17 v_add_f32_e32 v17, v9, v23 v_sub_f32_e32 v11, v11, v26 v_div_fixup_f32 v4, v4, v7, v18 v_dual_add_f32 v24, v13, v5 :: v_dual_add_f32 v25, 1.0, v16 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_sub_f32_e32 v9, v17, v9 v_div_fixup_f32 v14, v14, v20, v19 v_dual_mul_f32 v18, 0x4048bfb1, v0 :: v_dual_sub_f32 v13, v24, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_rcp_f32_e32 v29, v25 v_dual_add_f32 v28, v17, v24 :: v_dual_sub_f32 v9, v23, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_add_f32 v4, 1.0, v4 :: v_dual_sub_f32 v5, v5, v13 v_add_f32_e32 v30, -1.0, v16 v_sub_f32_e32 v26, v28, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_add_f32_e32 v31, v9, v5 s_waitcnt_depctr 0xfff v_dual_mul_f32 v13, v30, v29 :: v_dual_mul_f32 v22, v15, v6 v_sub_f32_e32 v23, v24, v26 v_mul_f32_e32 v27, v21, v22 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v21, v22, v21, -v27 v_fmac_f32_e32 v21, v22, v11 v_sub_f32_e32 v11, v28, v26 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_sub_f32_e32 v11, v17, v11 v_add_f32_e32 v17, -1.0, v25 v_dual_add_f32 v11, v23, v11 :: v_dual_sub_f32 v16, v16, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v11, v31, v11 :: v_dual_mul_f32 v26, v25, v13 v_fma_f32 v17, v13, v25, -v26 v_sub_f32_e32 v25, v31, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_fmac_f32 v17, v13, v16 :: v_dual_add_f32 v24, v27, v21 v_sub_f32_e32 v5, v5, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v23, v24, v27 v_sub_f32_e32 v16, v23, v21 v_sub_f32_e32 v21, v31, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_sub_f32 v32, v15, v24 :: v_dual_sub_f32 v9, v9, v21 v_sub_f32_e32 v15, v15, v32 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v5, v5, v9 v_sub_f32_e32 v15, v15, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v15, v16, v15 v_add_f32_e32 v15, v32, v15 v_add_f32_e32 v23, v28, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v16, v23, v28 v_dual_sub_f32 v9, v11, v16 :: v_dual_mul_f32 v6, v6, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v5, v5, v9 v_add_f32_e32 v15, v22, v6 v_add_f32_e32 v24, v26, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v11, v24, v26 v_sub_f32_e32 v9, v11, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_sub_f32_e32 v17, v15, v22 v_sub_f32_e32 v21, v30, v24 v_cndmask_b32_e64 v22, 0x7f800000, 0, s7 v_sub_f32_e32 v6, v6, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v16, v30, v21 v_add_f32_e32 v25, v6, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v11, v16, v24 v_cndmask_b32_e64 v16, 2.0, 1.0, s3 v_add_f32_e32 v9, v9, v11 v_add_f32_e32 v11, v23, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f32_e32 v9, v21, v9 v_mul_f32_e32 v21, v15, v15 v_mul_f32_e32 v9, v29, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v17, v11, v23 v_fma_f32 v24, v15, v15, -v21 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_mul_f32 v23, v16, v11 :: v_dual_add_f32 v26, v13, v9 v_sub_f32_e32 v5, v5, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fmac_f32_e32 v24, v15, v25 v_fma_f32 v11, v16, v11, -v23 v_trunc_f32_e32 v17, v16 v_cmp_class_f32_e64 s4, v23, 0x204 s_delay_alu instid0(VALU_DEP_3) v_fmac_f32_e32 v11, v16, v5 v_sub_f32_e32 v5, v26, v13 v_add_f32_e32 v13, v21, v24 v_cmp_eq_f32_e64 s3, v17, v16 v_mul_f32_e32 v27, v26, v26 v_add_f32_e32 v17, v23, v11 v_sub_f32_e32 v5, v9, v5 v_fmaak_f32 v9, s31, v13, 0x3e91f4c4 v_sub_f32_e32 v21, v13, v21 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v28, v17, v23, s4 v_sub_f32_e32 v17, v17, v23 v_fmaak_f32 v9, v13, v9, 0x3ecccdef s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_f32_e32 v21, v24, v21 v_cmp_eq_f32_e64 s5, 0x42b17218, v28 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_f32_e32 v11, v11, v17 v_mul_f32_e32 v23, v13, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v29, 0, 0x37000000, s5 v_cmp_neq_f32_e64 s5, 0x7f800000, |v28| v_fma_f32 v24, v13, v9, -v23 v_mul_f32_e32 v25, 0.5, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v11, 0, v11, s5 v_fmac_f32_e32 v24, v21, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_trunc_f32_e32 v16, v25 v_cmp_class_f32_e64 s5, v3, 0x204 v_cmp_neq_f32_e64 s4, v16, v25 v_fma_f32 v16, v26, v26, -v27 v_add_f32_e32 v25, v5, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fmac_f32_e32 v16, v26, v25 v_mul_f32_e32 v34, v15, v13 v_sub_f32_e32 v25, v28, v29 v_add_f32_e32 v17, v27, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v35, v13, v15, -v34 v_mul_f32_e32 v30, 0x3fb8aa3b, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_dual_fmaak_f32 v28, s31, v17, 0x3e91f4c4 :: v_dual_fmac_f32 v35, v13, v6 v_mul_f32_e32 v13, v26, v17 v_ldexp_f32 v6, v6, 1 v_add_f32_e32 v11, v29, v11 v_fmaak_f32 v28, v17, v28, 0x3ecccdef v_add_f32_e32 v29, v23, v24 v_sub_f32_e32 v27, v17, v27 v_fma_f32 v9, 0x3fb8aa3b, v25, -v30 v_rndne_f32_e32 v31, v30 v_mul_f32_e32 v32, v17, v28 v_sub_f32_e32 v23, v29, v23 v_dual_add_f32 v33, 0x3f2aaaaa, v29 :: v_dual_sub_f32 v16, v16, v27 v_fmac_f32_e32 v9, 0x32a5705f, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v27, v17, v28, -v32 v_dual_sub_f32 v23, v24, v23 :: v_dual_add_f32 v24, 0xbf2aaaaa, v33 v_sub_f32_e32 v30, v30, v31 v_fmac_f32_e32 v35, v21, v15 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v27, v16, v28 v_dual_add_f32 v23, 0x31739010, v23 :: v_dual_sub_f32 v24, v29, v24 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f32_e32 v9, v30, v9 v_fma_f32 v21, v17, v26, -v13 v_add_f32_e32 v28, v32, v27 v_ldexp_f32 v15, v15, 1 v_add_f32_e32 v23, v23, v24 v_exp_f32_e32 v9, v9 v_cvt_i32_f32_e32 v31, v31 v_sub_f32_e32 v24, v28, v32 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_add_f32 v29, 0x3f2aaaaa, v28 :: v_dual_add_f32 v30, v33, v23 v_dual_add_f32 v32, v34, v35 :: v_dual_fmac_f32 v21, v17, v5 v_dual_sub_f32 v17, v27, v24 :: v_dual_add_f32 v24, 0xbf2aaaaa, v29 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v27, v33, v30 v_mul_f32_e32 v33, v32, v30 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_sub_f32 v34, v32, v34 :: v_dual_add_f32 v17, 0x31739010, v17 v_dual_sub_f32 v24, v28, v24 :: v_dual_add_f32 v23, v23, v27 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_fma_f32 v27, v32, v30, -v33 v_frexp_exp_i32_f32_e32 v28, v3 v_fmac_f32_e32 v21, v16, v26 v_dual_sub_f32 v16, v35, v34 :: v_dual_add_f32 v17, v17, v24 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v27, v32, v23 v_subrev_co_ci_u32_e64 v23, s2, 0, v28, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v28, v13, v21 v_dual_add_f32 v24, v29, v17 :: v_dual_fmac_f32 v27, v16, v30 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cvt_f32_i32_e32 v16, v23 v_ldexp_f32 v9, v9, v31 v_sub_f32_e32 v13, v28, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_sub_f32_e32 v23, v29, v24 v_dual_mul_f32 v29, v28, v24 :: v_dual_add_f32 v30, v33, v27 v_dual_mul_f32 v32, 0x3f317218, v16 :: v_dual_sub_f32 v13, v21, v13 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v17, v17, v23 v_fma_f32 v23, v28, v24, -v29 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_dual_add_f32 v34, v15, v30 :: v_dual_sub_f32 v33, v30, v33 v_frexp_exp_i32_f32_e32 v21, v2 v_ldexp_f32 v5, v5, 1 v_fmac_f32_e32 v23, v28, v17 s_delay_alu instid0(VALU_DEP_4) v_sub_f32_e32 v15, v34, v15 v_sub_f32_e32 v17, v27, v33 v_fma_f32 v27, 0x3f317218, v16, -v32 s_and_b32 s2, s3, s4 v_fmac_f32_e32 v23, v13, v24 v_sub_f32_e32 v13, v30, v15 v_add_f32_e32 v6, v6, v17 v_subrev_co_ci_u32_e32 v15, vcc_lo, 0, v21, vcc_lo v_fmac_f32_e32 v27, 0xb102e308, v16 v_ldexp_f32 v16, v26, 1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_add_f32 v6, v6, v13 :: v_dual_add_f32 v13, v29, v23 v_cvt_f32_i32_e32 v15, v15 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f32_e32 v17, v32, v27 v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v25 v_dual_add_f32 v21, v34, v6 :: v_dual_add_f32 v24, v16, v13 v_sub_f32_e32 v26, v13, v29 v_mul_f32_e32 v28, 0x3f317218, v15 v_sub_f32_e32 v30, v17, v32 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_add_f32 v29, v17, v21 :: v_dual_sub_f32 v16, v24, v16 v_sub_f32_e32 v23, v23, v26 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f32 v26, 0x3f317218, v15, -v28 v_cndmask_b32_e32 v9, 0, v9, vcc_lo v_sub_f32_e32 v31, v29, v17 v_sub_f32_e32 v13, v13, v16 v_add_f32_e32 v5, v5, v23 v_sub_f32_e32 v16, v21, v34 v_fmac_f32_e32 v26, 0xb102e308, v15 v_sub_f32_e32 v15, v29, v31 v_sub_f32_e32 v23, v27, v30 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_dual_add_f32 v5, v5, v13 :: v_dual_sub_f32 v6, v6, v16 v_sub_f32_e32 v13, v21, v31 v_dual_sub_f32 v15, v17, v15 :: v_dual_add_f32 v16, v28, v26 v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f32_e32 v17, v23, v6 v_cndmask_b32_e64 v27, 1.0, s25, s2 v_add_f32_e32 v13, v13, v15 v_add_f32_e32 v15, v24, v5 v_cndmask_b32_e32 v9, 0x7f800000, v9, vcc_lo v_sub_f32_e32 v21, v17, v23 v_cmp_eq_f32_e32 vcc_lo, 1.0, v3 v_add_f32_e32 v13, v17, v13 v_dual_add_f32 v25, v16, v15 :: v_dual_sub_f32 v24, v15, v24 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_sub_f32_e32 v17, v17, v21 v_sub_f32_e32 v6, v6, v21 v_add_f32_e32 v30, v29, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_sub_f32_e32 v31, v25, v16 v_sub_f32_e32 v5, v5, v24 v_sub_f32_e32 v17, v23, v17 v_sub_f32_e32 v23, v16, v28 v_dual_sub_f32 v21, v30, v29 :: v_dual_sub_f32 v28, v25, v31 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_sub_f32 v15, v15, v31 :: v_dual_add_f32 v6, v6, v17 v_sub_f32_e32 v17, v26, v23 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_sub_f32 v13, v13, v21 :: v_dual_sub_f32 v16, v16, v28 v_fma_f32 v11, v9, v11, v9 v_add_f32_e32 v21, v17, v5 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_add_f32_e32 v6, v6, v13 v_cndmask_b32_e64 v13, 0x3eaaaaab, 1.0, vcc_lo v_add_f32_e32 v15, v15, v16 v_cmp_eq_f32_e32 vcc_lo, 0x7f800000, v9 v_dual_add_f32 v16, v30, v6 :: v_dual_add_f32 v15, v21, v15 v_cndmask_b32_e32 v9, v11, v9, vcc_lo v_sub_f32_e32 v11, v21, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_sub_f32 v23, v16, v30 :: v_dual_mul_f32 v24, v13, v16 v_add_f32_e32 v26, v25, v15 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_bfi_b32 v9, 0x7fffffff, v9, v27 v_sub_f32_e32 v21, v21, v11 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_sub_f32_e32 v6, v6, v23 v_fma_f32 v16, v13, v16, -v24 v_sub_f32_e32 v5, v5, v11 v_cmp_lt_f32_e64 vcc_lo, s25, 0 v_sub_f32_e32 v11, v17, v21 v_dual_sub_f32 v17, v26, v25 :: v_dual_fmac_f32 v16, v13, v6 v_cndmask_b32_e64 v6, 0x7fc00000, v9, s3 v_cndmask_b32_e64 v21, 0, s25, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v5, v5, v11 v_sub_f32_e32 v11, v15, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_dual_add_f32 v17, v24, v16 :: v_dual_cndmask_b32 v6, v9, v6 v_cmp_class_f32_e64 vcc_lo, v24, 0x204 v_bfi_b32 v15, 0x7fffffff, v22, v21 v_add_f32_e32 v5, v5, v11 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v9, v17, v24, vcc_lo s_or_b32 vcc_lo, s7, s6 v_dual_sub_f32 v17, v17, v24 :: v_dual_cndmask_b32 v6, v6, v15 v_cmp_eq_f32_e32 vcc_lo, 1.0, v2 v_add_f32_e32 v15, v26, v5 v_cmp_neq_f32_e64 s2, 0x7f800000, |v9| s_mov_b32 s6, 0xbd2870c1 s_mov_b32 s7, 0xc00eb852 v_cndmask_b32_e64 v11, 0.5, 1.0, vcc_lo v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v9 v_sub_f32_e32 v22, v15, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mul_f32_e32 v23, v11, v15 v_cndmask_b32_e64 v21, 0, 0x37000000, vcc_lo v_sub_f32_e32 v5, v5, v22 v_cmp_o_f32_e64 vcc_lo, s25, s25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f32 v15, v11, v15, -v23 v_dual_sub_f32 v25, v9, v21 :: v_dual_cndmask_b32 v6, 0x7fc00000, v6 v_cmp_class_f32_e64 vcc_lo, v23, 0x204 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fmac_f32_e32 v15, v11, v5 v_dual_mul_f32 v22, 0x3fb8aa3b, v25 :: v_dual_mov_b32 v5, 1.0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f32_e32 v6, s27, v6 v_add_f32_e32 v30, v23, v15 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f32 v27, 0x3fb8aa3b, v25, -v22 v_rndne_f32_e32 v28, v22 v_div_scale_f32 v26, null, 0x41466666, 0x41466666, v6 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_cndmask_b32 v20, v30, v23 :: v_dual_fmac_f32 v27, 0x32a5705f, v25 v_sub_f32_e32 v19, v22, v28 v_cvt_i32_f32_e32 v24, v28 v_mul_f32_e32 v22, 0.5, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v20 v_rcp_f32_e32 v29, v26 v_add_f32_e32 v7, v19, v27 v_fmamk_f32 v5, v10, 0x432a0000, v5 v_cndmask_b32_e64 v12, 0, 0x37000000, vcc_lo v_exp_f32_e32 v0, v7 v_trunc_f32_e32 v7, v13 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f32_e32 v5, 0x3c23d70a, v5 v_sub_f32_e32 v19, v20, v12 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cmp_eq_f32_e32 vcc_lo, v7, v13 v_sub_f32_e32 v7, v16, v17 v_mul_f32_e32 v13, 0x3fb8aa3b, v19 v_trunc_f32_e32 v16, v22 s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) v_ldexp_f32 v0, v0, v24 v_cndmask_b32_e64 v7, 0, v7, s2 v_cmp_ngt_f32_e64 s2, 0xc2ce8ed0, v25 v_fma_f32 v9, 0x3fb8aa3b, v19, -v13 v_rndne_f32_e32 v17, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v7, v21, v7 v_cndmask_b32_e64 v0, 0, v0, s2 v_cmp_nlt_f32_e64 s2, 0x42b17218, v25 v_fmac_f32_e32 v9, 0x32a5705f, v19 v_sub_f32_e32 v13, v13, v17 v_cvt_i32_f32_e32 v17, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v0, 0x7f800000, v0, s2 v_cmp_neq_f32_e64 s2, v16, v22 v_dual_add_f32 v9, v13, v9 :: v_dual_mul_f32 v16, 0x4048f5c3, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f32 v7, v0, v7, v0 v_cmp_eq_f32_e64 s3, 0x7f800000, v0 s_and_b32 s2, vcc_lo, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_exp_f32_e32 v9, v9 v_cndmask_b32_e64 v13, 1.0, v3, s2 v_cndmask_b32_e64 v0, v7, v0, s3 v_sub_f32_e32 v7, v30, v23 v_cmp_eq_f32_e64 s3, 0, v3 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_bfi_b32 v0, 0x7fffffff, v0, v13 v_mul_f32_e32 v13, 0x3f44b810, v16 v_sub_f32_e32 v7, v15, v7 s_delay_alu instid0(TRANS32_DEP_1) v_ldexp_f32 v9, v9, v17 v_cndmask_b32_e64 v21, 0x7f800000, 0, s3 v_cndmask_b32_e32 v16, 0x7fc00000, v0, vcc_lo v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v20| v_cndmask_b32_e64 v15, 0, v3, s2 v_trunc_f32_e32 v17, v11 s_or_b32 s3, s3, s5 s_mov_b32 s5, 0x3b2d2a58 v_cndmask_b32_e32 v7, 0, v7, vcc_lo v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v19 v_bfi_b32 v15, 0x7fffffff, v21, v15 v_cmp_eq_f32_e64 s2, v17, v11 s_delay_alu instid0(VALU_DEP_4) v_add_f32_e32 v7, v12, v7 v_cndmask_b32_e32 v9, 0, v9, vcc_lo v_cmp_gt_f32_e32 vcc_lo, 0, v3 v_mul_f32_e32 v12, 0.5, v11 v_cndmask_b32_e32 v0, v0, v16, vcc_lo v_fma_f32 v16, -v26, v29, 1.0 v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_trunc_f32_e32 v19, v12 v_cndmask_b32_e64 v0, v0, v15, s3 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_fmac_f32_e32 v29, v16, v29 v_cndmask_b32_e32 v9, 0x7f800000, v9, vcc_lo v_div_scale_f32 v16, vcc_lo, v6, 0x41466666, v6 v_cmp_neq_f32_e64 s4, v19, v12 v_mul_f32_e32 v15, s27, v4 v_fma_f32 v7, v9, v7, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mul_f32_e32 v11, v16, v29 v_cmp_eq_f32_e64 s3, 0x7f800000, v9 v_cndmask_b32_e64 v7, v7, v9, s3 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f32 v9, -v26, v11, v16 s_and_b32 s3, s2, s4 v_cmp_o_f32_e64 s4, v3, v3 v_cndmask_b32_e64 v12, 1.0, v2, s3 v_fmac_f32_e32 v11, v9, v29 v_add_f32_e32 v9, v14, v14 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v0, 0x7fc00000, v0, s4 v_bfi_b32 v3, 0x7fffffff, v7, v12 v_add_f32_e32 v14, 1.0, v14 v_fma_f32 v12, -v26, v11, v16 s_mov_b32 s4, 0xbfe28f5c v_fmaak_f32 v0, v13, v0, 0xbd03126f v_fmaak_f32 v7, s4, v8, 0x3eb6c8b4 v_cndmask_b32_e64 v13, 0x7fc00000, v3, s2 v_div_fmas_f32 v11, v12, v29, v11 v_mul_f32_e32 v12, s27, v14 v_cmp_gt_f32_e32 vcc_lo, 0, v2 v_add_f32_e32 v8, 0x3f7a172e, v8 v_cmp_class_f32_e64 s2, v2, 0x204 v_div_fixup_f32 v6, v11, 0x41466666, v6 v_div_scale_f32 v11, null, v12, v12, 1.0 v_cndmask_b32_e32 v3, v3, v13, vcc_lo v_cmp_eq_f32_e32 vcc_lo, 0, v2 s_delay_alu instid0(VALU_DEP_4) v_mul_f32_e32 v4, v6, v8 v_fma_f32 v6, v18, v7, 1.0 v_rcp_f32_e32 v14, v11 v_cndmask_b32_e64 v7, 0, v2, s3 v_cndmask_b32_e64 v13, 0x7f800000, 0, vcc_lo v_div_scale_f32 v8, null, v15, v15, 1.0 v_mul_f32_e32 v16, v4, v6 s_or_b32 vcc_lo, vcc_lo, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_bfi_b32 v4, 0x7fffffff, v13, v7 v_rcp_f32_e32 v7, v8 v_mul_f32_e32 v9, 0x3f333333, v9 v_div_scale_f32 v13, null, v16, v16, 1.0 v_fma_f32 v6, -v11, v14, 1.0 v_cndmask_b32_e32 v3, v3, v4, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f32_e32 v1, v1, v9 v_rcp_f32_e32 v4, v13 s_mov_b32 s3, 0x3f5a939f v_fmac_f32_e32 v14, v6, v14 v_div_scale_f32 v6, vcc_lo, 1.0, v12, 1.0 v_fma_f32 v9, -v8, v7, 1.0 v_mul_f32_e32 v3, 0x3faccccd, v3 s_mov_b32 s4, 0x3fd5c28f s_delay_alu instid0(VALU_DEP_3) v_mul_f32_e32 v17, v6, v14 v_fmaak_f32 v19, s4, v10, 0xbec8b439 v_fmac_f32_e32 v7, v9, v7 v_div_scale_f32 v9, s2, 1.0, v15, 1.0 v_fma_f32 v18, -v13, v4, 1.0 v_fmaak_f32 v3, s3, v3, 0xbced9168 v_fma_f32 v20, -v11, v17, v6 s_delay_alu instid0(VALU_DEP_4) v_mul_f32_e32 v21, v9, v7 v_cmp_o_f32_e64 s4, v2, v2 v_fmac_f32_e32 v4, v18, v4 v_div_scale_f32 v18, s3, 1.0, v16, 1.0 v_fmac_f32_e32 v17, v20, v14 v_fma_f32 v20, -v8, v21, v9 v_cndmask_b32_e64 v2, 0x7fc00000, v3, s4 s_delay_alu instid0(VALU_DEP_4) v_mul_f32_e32 v22, v18, v4 s_mov_b32 s4, 0xbee147ae v_fma_f32 v6, -v11, v17, v6 v_fmac_f32_e32 v21, v20, v7 v_add_f32_e32 v3, 0x3edc28f6, v19 v_fma_f32 v11, -v13, v22, v18 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_div_fmas_f32 v6, v6, v14, v17 v_fma_f32 v8, -v8, v21, v9 s_mov_b32 vcc_lo, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_fmac_f32 v22, v11, v4 :: v_dual_mul_f32 v9, s25, v5 v_div_fixup_f32 v5, v6, v12, 1.0 v_mov_b32_e32 v12, 0 v_div_fmas_f32 v7, v8, v7, v21 s_delay_alu instid0(VALU_DEP_4) v_fma_f32 v8, -v13, v22, v18 s_mov_b32 vcc_lo, s3 v_mov_b32_e32 v11, s29 s_mov_b32 s29, 0x37d75334 v_div_fixup_f32 v6, v7, v15, 1.0 v_div_fmas_f32 v8, v8, v4, v22 v_fmaak_f32 v4, s4, v10, 0xbd19999a v_mov_b32_e32 v10, s30 s_delay_alu instid0(VALU_DEP_3) v_div_fixup_f32 v7, v8, v16, 1.0 v_dual_mul_f32 v8, s24, v9 :: v_dual_mov_b32 v9, s36 .LBB0_3: ; =>This Inner Loop Header: Depth=1 v_frexp_mant_f32_e64 v13, |v11| s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_frexp_mant_f32_e64 v14, |v10| v_frexp_exp_i32_f32_e32 v28, v10 v_cmp_class_f32_e64 s30, v11, 0x204 v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cmp_gt_f32_e64 s0, 0x3f2aaaab, v14 v_cndmask_b32_e64 v15, 0, 1, vcc_lo v_cndmask_b32_e64 v16, 0, 1, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ldexp_f32 v13, v13, v15 v_ldexp_f32 v14, v14, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_add_f32 v15, 1.0, v13 :: v_dual_add_f32 v16, 1.0, v14 v_dual_add_f32 v19, -1.0, v13 :: v_dual_add_f32 v20, -1.0, v14 v_rcp_f32_e32 v17, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_rcp_f32_e32 v18, v16 s_waitcnt_depctr 0xfff v_dual_mul_f32 v21, v19, v17 :: v_dual_mul_f32 v22, v20, v18 v_add_f32_e32 v23, -1.0, v15 v_dual_add_f32 v25, -1.0, v16 :: v_dual_mul_f32 v24, v15, v21 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_mul_f32 v26, v16, v22 :: v_dual_sub_f32 v13, v13, v23 v_sub_f32_e32 v14, v14, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v15, v21, v15, -v24 v_fma_f32 v16, v22, v16, -v26 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_fmac_f32 v15, v21, v13 :: v_dual_fmac_f32 v16, v22, v14 v_dual_add_f32 v13, v24, v15 :: v_dual_add_f32 v14, v26, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_sub_f32 v23, v19, v13 :: v_dual_sub_f32 v24, v13, v24 v_sub_f32_e32 v26, v14, v26 v_sub_f32_e32 v25, v20, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_sub_f32 v19, v19, v23 :: v_dual_sub_f32 v16, v26, v16 v_sub_f32_e32 v15, v24, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v13, v19, v13 v_add_f32_e32 v13, v15, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v13, v23, v13 v_mul_f32_e32 v13, v17, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v15, v21, v13 v_dual_sub_f32 v20, v20, v25 :: v_dual_mul_f32 v19, v15, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v14, v20, v14 v_add_f32_e32 v14, v16, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v14, v25, v14 v_mul_f32_e32 v14, v18, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v16, v22, v14 v_dual_sub_f32 v18, v16, v22 :: v_dual_sub_f32 v17, v15, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_sub_f32 v14, v14, v18 :: v_dual_sub_f32 v13, v13, v17 v_fma_f32 v18, v15, v15, -v19 v_dual_add_f32 v22, v14, v14 :: v_dual_mul_f32 v17, v16, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v20, v13, v13 v_fma_f32 v21, v16, v16, -v17 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_fmac_f32 v18, v15, v20 :: v_dual_fmac_f32 v21, v16, v22 v_add_f32_e32 v22, v17, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v20, v19, v18 :: v_dual_sub_f32 v17, v22, v17 v_dual_fmaak_f32 v23, s31, v20, 0x3e91f4c4 :: v_dual_fmaak_f32 v24, s31, v22, 0x3e91f4c4 v_sub_f32_e32 v19, v20, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v17, v21, v17 v_dual_fmaak_f32 v23, v20, v23, 0x3ecccdef :: v_dual_fmaak_f32 v24, v22, v24, 0x3ecccdef s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v18, v18, v19 v_dual_mul_f32 v25, v20, v23 :: v_dual_mul_f32 v26, v22, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v19, v20, v23, -v25 v_fma_f32 v21, v22, v24, -v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v19, v18, v23 v_fmac_f32_e32 v21, v17, v24 v_mul_f32_e32 v24, v15, v20 v_frexp_exp_i32_f32_e32 v23, v11 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v27, v25, v19 v_fma_f32 v31, v20, v15, -v24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_add_f32_e32 v32, 0x3f2aaaaa, v27 v_add_f32_e32 v30, v26, v21 v_sub_f32_e32 v25, v27, v25 v_fmac_f32_e32 v31, v20, v13 v_ldexp_f32 v13, v13, 1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_f32_e32 v26, v30, v26 v_dual_add_f32 v34, 0x3f2aaaaa, v30 :: v_dual_sub_f32 v19, v19, v25 v_add_f32_e32 v25, 0xbf2aaaaa, v32 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_dual_fmac_f32 v31, v18, v15 :: v_dual_sub_f32 v20, v21, v26 v_mul_f32_e32 v29, v16, v22 v_add_f32_e32 v21, 0xbf2aaaaa, v34 v_add_f32_e32 v19, 0x31739010, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_sub_f32 v25, v27, v25 :: v_dual_add_f32 v18, 0x31739010, v20 v_fma_f32 v33, v22, v16, -v29 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_sub_f32_e32 v20, v30, v21 v_subrev_co_ci_u32_e32 v21, vcc_lo, 0, v23, vcc_lo v_ldexp_f32 v15, v15, 1 v_fmac_f32_e32 v33, v22, v14 v_subrev_co_ci_u32_e64 v22, vcc_lo, 0, v28, s0 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cvt_f32_i32_e32 v21, v21 v_ldexp_f32 v14, v14, 1 v_fmac_f32_e32 v33, v17, v16 v_dual_add_f32 v17, v18, v20 :: v_dual_add_f32 v18, v24, v31 v_ldexp_f32 v16, v16, 1 v_cmp_eq_f32_e32 vcc_lo, 1.0, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_f32_e32 v24, v18, v24 v_add_f32_e32 v23, v34, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v19, v19, v25 :: v_dual_sub_f32 v28, v34, v23 v_add_f32_e32 v20, v32, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v26, v32, v20 v_mul_f32_e32 v27, v18, v20 v_add_f32_e32 v19, v19, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v26, v18, v20, -v27 v_dual_fmac_f32 v26, v18, v19 :: v_dual_add_f32 v25, v29, v33 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v29, v25, v29 v_sub_f32_e32 v18, v33, v29 v_sub_f32_e32 v24, v31, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fmac_f32_e32 v26, v24, v20 v_mul_f32_e32 v30, v25, v23 v_add_f32_e32 v17, v17, v28 v_fma_f32 v28, v25, v23, -v30 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fmac_f32_e32 v28, v25, v17 v_add_f32_e32 v20, v27, v26 v_cvt_f32_i32_e32 v17, v22 v_dual_fmac_f32 v28, v18, v23 :: v_dual_mul_f32 v19, 0x3f317218, v21 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_add_f32 v24, v15, v20 :: v_dual_sub_f32 v25, v20, v27 v_mul_f32_e32 v18, 0x3f317218, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v22, v30, v28 v_fma_f32 v23, 0x3f317218, v21, -v19 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v27, v16, v22 v_dual_sub_f32 v29, v22, v30 :: v_dual_sub_f32 v16, v27, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_sub_f32_e32 v16, v22, v16 v_sub_f32_e32 v25, v26, v25 v_sub_f32_e32 v26, v28, v29 v_sub_f32_e32 v15, v24, v15 v_fma_f32 v28, 0x3f317218, v17, -v18 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_add_f32 v14, v14, v26 :: v_dual_fmac_f32 v23, 0xb102e308, v21 v_dual_sub_f32 v15, v20, v15 :: v_dual_fmac_f32 v28, 0xb102e308, v17 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v14, v14, v16 v_add_f32_e32 v16, v18, v28 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_add_f32 v20, v27, v14 :: v_dual_add_f32 v13, v13, v25 v_sub_f32_e32 v18, v16, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_dual_add_f32 v22, v16, v20 :: v_dual_add_f32 v13, v13, v15 v_add_f32_e32 v15, v19, v23 v_sub_f32_e32 v26, v20, v27 v_dual_sub_f32 v18, v28, v18 :: v_dual_sub_f32 v25, v22, v16 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v17, v24, v13 v_dual_sub_f32 v19, v15, v19 :: v_dual_sub_f32 v14, v14, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v27, v22, v25 v_add_f32_e32 v21, v15, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v19, v23, v19 v_dual_sub_f32 v23, v17, v24 :: v_dual_sub_f32 v16, v16, v27 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v24, v21, v15 v_dual_sub_f32 v20, v20, v25 :: v_dual_sub_f32 v13, v13, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v23, v21, v24 v_dual_sub_f32 v17, v17, v24 :: v_dual_add_f32 v24, v18, v14 v_dual_add_f32 v16, v20, v16 :: v_dual_sub_f32 v15, v15, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_add_f32 v23, v19, v13 :: v_dual_sub_f32 v20, v24, v18 v_dual_add_f32 v16, v24, v16 :: v_dual_add_f32 v15, v17, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_sub_f32 v17, v23, v19 :: v_dual_sub_f32 v14, v14, v20 v_add_f32_e32 v25, v22, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v15, v23, v15 v_sub_f32_e32 v23, v23, v17 v_sub_f32_e32 v13, v13, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_sub_f32 v17, v24, v20 :: v_dual_sub_f32 v20, v25, v22 v_dual_add_f32 v24, v21, v15 :: v_dual_sub_f32 v17, v18, v17 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_sub_f32 v16, v16, v20 :: v_dual_sub_f32 v19, v19, v23 v_sub_f32_e32 v18, v24, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v14, v14, v17 :: v_dual_sub_f32 v15, v15, v18 v_dual_add_f32 v14, v14, v16 :: v_dual_add_f32 v13, v13, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add_f32_e32 v13, v13, v15 v_cndmask_b32_e64 v15, 2.0, 1.0, vcc_lo v_cmp_eq_f32_e32 vcc_lo, 1.0, v10 v_add_f32_e32 v16, v24, v13 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_mul_f32_e32 v30, 0.5, v15 v_cndmask_b32_e64 v18, 2.0, 1.0, vcc_lo v_trunc_f32_e32 v29, v15 v_sub_f32_e32 v19, v16, v24 v_mul_f32_e32 v20, v15, v16 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_trunc_f32_e32 v32, v18 v_cmp_eq_f32_e64 s0, v29, v15 v_mul_f32_e32 v35, 0.5, v18 v_sub_f32_e32 v13, v13, v19 v_fma_f32 v16, v15, v16, -v20 v_add_f32_e32 v17, v25, v14 v_cmp_class_f32_e64 vcc_lo, v20, 0x204 v_trunc_f32_e32 v29, v30 v_cmp_eq_f32_e64 s1, v32, v18 v_fmac_f32_e32 v16, v15, v13 v_sub_f32_e32 v21, v17, v25 v_mul_f32_e32 v22, v18, v17 v_cmp_neq_f32_e64 s2, v29, v30 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v14, v14, v21 v_fma_f32 v17, v18, v17, -v22 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) s_and_b32 s2, s0, s2 v_fmac_f32_e32 v17, v18, v14 v_trunc_f32_e32 v18, v35 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v14, v22, v17 :: v_dual_add_f32 v13, v20, v16 v_cndmask_b32_e32 v19, v13, v20, vcc_lo v_cmp_class_f32_e64 vcc_lo, v22, 0x204 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v21, v14, v22, vcc_lo v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v19 v_dual_sub_f32 v14, v14, v22 :: v_dual_sub_f32 v13, v13, v20 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v23, 0, 0x37000000, vcc_lo v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v21 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_sub_f32_e32 v13, v16, v13 v_cndmask_b32_e64 v24, 0, 0x37000000, vcc_lo v_cmp_eq_f32_e32 vcc_lo, 0, v11 v_dual_sub_f32 v26, v21, v24 :: v_dual_sub_f32 v25, v19, v23 v_sub_f32_e32 v14, v17, v14 v_cndmask_b32_e64 v27, 0x7f800000, 0, vcc_lo s_or_b32 vcc_lo, vcc_lo, s30 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v31, 0x3fb8aa3b, v26 :: v_dual_mul_f32 v28, 0x3fb8aa3b, v25 v_fma_f32 v36, 0x3fb8aa3b, v26, -v31 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f32 v33, 0x3fb8aa3b, v25, -v28 v_rndne_f32_e32 v34, v28 v_rndne_f32_e32 v37, v31 v_dual_fmac_f32 v36, 0x32a5705f, v26 :: v_dual_fmac_f32 v33, 0x32a5705f, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_dual_sub_f32 v28, v28, v34 :: v_dual_sub_f32 v15, v31, v37 v_cvt_i32_f32_e32 v16, v34 v_cvt_i32_f32_e32 v17, v37 v_dual_add_f32 v28, v28, v33 :: v_dual_add_f32 v15, v15, v36 v_cmp_neq_f32_e64 s3, 0x7f800000, |v19| s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_exp_f32_e32 v20, v28 v_exp_f32_e32 v15, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v13, 0, v13, s3 v_cmp_neq_f32_e64 s3, 0x7f800000, |v21| v_add_f32_e32 v13, v23, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(TRANS32_DEP_2) v_cndmask_b32_e64 v14, 0, v14, s3 v_cmp_ngt_f32_e64 s3, 0xc2ce8ed0, v25 v_ldexp_f32 v16, v20, v16 s_delay_alu instid0(TRANS32_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_ldexp_f32 v15, v15, v17 v_cndmask_b32_e64 v17, 1.0, v11, s2 v_add_f32_e32 v14, v24, v14 v_cndmask_b32_e64 v16, 0, v16, s3 v_cmp_ngt_f32_e64 s3, 0xc2ce8ed0, v26 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v15, 0, v15, s3 v_cmp_nlt_f32_e64 s3, 0x42b17218, v25 v_cndmask_b32_e64 v16, 0x7f800000, v16, s3 v_cmp_nlt_f32_e64 s3, 0x42b17218, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v13, v16, v13, v16 v_cndmask_b32_e64 v15, 0x7f800000, v15, s3 v_cmp_eq_f32_e64 s4, 0x7f800000, v16 v_cmp_neq_f32_e64 s3, v18, v35 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v14, v15, v14, v15 v_cndmask_b32_e64 v13, v13, v16, s4 v_cmp_eq_f32_e64 s4, 0x7f800000, v15 s_delay_alu instid0(VALU_DEP_4) s_and_b32 s3, s1, s3 v_cndmask_b32_e64 v16, 0, v11, s2 v_cndmask_b32_e64 v18, 1.0, v10, s3 v_bfi_b32 v13, 0x7fffffff, v13, v17 v_cndmask_b32_e64 v14, v14, v15, s4 v_cmp_eq_f32_e64 s4, 0, v10 v_cndmask_b32_e64 v17, 0, v10, s3 v_cmp_class_f32_e64 s2, v10, 0x204 v_bfi_b32 v16, 0x7fffffff, v27, v16 v_bfi_b32 v14, 0x7fffffff, v14, v18 v_cndmask_b32_e64 v18, 0x7fc00000, v13, s0 v_cmp_gt_f32_e64 s0, 0, v11 v_cndmask_b32_e64 v15, 0x7f800000, 0, s4 s_mov_b32 s3, -1 v_cndmask_b32_e64 v19, 0x7fc00000, v14, s1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v13, v13, v18, s0 v_cmp_gt_f32_e64 s0, 0, v10 v_bfi_b32 v15, 0x7fffffff, v15, v17 v_cndmask_b32_e32 v13, v13, v16, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v14, v14, v19, s0 s_or_b32 vcc_lo, s4, s2 v_cndmask_b32_e32 v14, v14, v15, vcc_lo v_cmp_o_f32_e32 vcc_lo, v11, v11 v_cndmask_b32_e32 v13, 0x7fc00000, v13, vcc_lo v_cmp_o_f32_e32 vcc_lo, v10, v10 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v14, 0x7fc00000, v14, vcc_lo v_add_f32_e32 v13, v14, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f32_e32 v14, 0x4f800000, v13 v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v13 v_cndmask_b32_e32 v13, v13, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_sqrt_f32_e32 v14, v13 s_waitcnt_depctr 0xfff v_add_nc_u32_e32 v15, -1, v14 v_add_nc_u32_e32 v16, 1, v14 v_fma_f32 v17, -v15, v14, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v18, -v16, v14, v13 v_cmp_ge_f32_e64 s0, 0, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v14, v14, v15, s0 v_cmp_lt_f32_e64 s0, 0, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v14, v14, v16, s0 v_mul_f32_e32 v15, 0x37800000, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v14, v14, v15, vcc_lo v_cmp_class_f32_e64 vcc_lo, v13, 0x260 v_cndmask_b32_e32 v13, v14, v13, vcc_lo v_div_scale_f32 v25, vcc_lo, v10, v11, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v14, 0x3f733333, v13 v_mul_f32_e32 v14, 0x40ebd402, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_frexp_mant_f32_e64 v15, |v14| v_frexp_exp_i32_f32_e32 v34, v14 v_cmp_class_f32_e64 s2, v14, 0x204 v_cmp_gt_f32_e64 s1, 0x3f2aaaab, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v16, 0, 1, s1 v_subrev_co_ci_u32_e64 v34, s1, 0, v34, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ldexp_f32 v15, v15, v16 v_add_f32_e32 v16, 1.0, v15 v_add_f32_e32 v18, -1.0, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_rcp_f32_e32 v17, v16 v_add_f32_e32 v20, -1.0, v16 v_sub_f32_e32 v15, v15, v20 s_waitcnt_depctr 0xfff v_mul_f32_e32 v19, v18, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v21, v16, v19 v_fma_f32 v16, v19, v16, -v21 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v16, v19, v15 v_add_f32_e32 v15, v21, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v22, v18, v15 v_dual_sub_f32 v18, v18, v22 :: v_dual_sub_f32 v21, v15, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_sub_f32 v15, v18, v15 :: v_dual_sub_f32 v16, v21, v16 v_div_scale_f32 v18, null, v11, v11, v10 v_add_f32_e32 v15, v16, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_rcp_f32_e32 v16, v18 v_add_f32_e32 v15, v22, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mul_f32_e32 v15, v17, v15 s_waitcnt_depctr 0xfff v_fma_f32 v17, -v18, v16, 1.0 v_fmac_f32_e32 v16, v17, v16 v_add_f32_e32 v26, v19, v15 v_frexp_mant_f32_e64 v20, |v13| s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v28, v25, v16 v_cmp_gt_f32_e64 s0, 0x3f2aaaab, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v23, 0, 1, s0 v_ldexp_f32 v20, v20, v23 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f32_e32 v21, 1.0, v20 v_add_f32_e32 v22, -1.0, v20 v_rcp_f32_e32 v23, v21 v_add_f32_e32 v17, -1.0, v21 v_sub_f32_e32 v19, v26, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v17, v20, v17 v_sub_f32_e32 v15, v15, v19 v_fma_f32 v19, -v18, v28, v25 s_waitcnt_depctr 0xfff v_mul_f32_e32 v24, v22, v23 v_fmac_f32_e32 v28, v19, v16 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v27, v21, v24 v_fma_f32 v18, -v18, v28, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v20, v24, v21, -v27 v_div_fmas_f32 v16, v18, v16, v28 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v20, v24, v17 v_div_fixup_f32 v16, v16, v11, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v19, v27, v20 v_cmp_gt_f32_e64 vcc_lo, |v16|, 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v25, v22, v19 v_sub_f32_e32 v18, v19, v27 v_sub_f32_e32 v22, v22, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v18, v18, v20 v_sub_f32_e32 v19, v22, v19 v_rcp_f32_e64 v22, |v16| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v18, v18, v19 v_add_f32_e32 v18, v25, v18 s_waitcnt_depctr 0xfff v_cndmask_b32_e64 v22, |v16|, v22, vcc_lo v_xor_b32_e32 v16, 0x80000000, v16 v_mul_f32_e32 v18, v23, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v23, v24, v18 v_dual_mul_f32 v21, v26, v26 :: v_dual_sub_f32 v24, v23, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f32 v17, v26, v26, -v21 v_add_f32_e32 v29, v15, v15 v_dual_mul_f32 v31, v23, v23 :: v_dual_sub_f32 v18, v18, v24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v17, v26, v29 v_fma_f32 v32, v23, v23, -v31 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f32_e32 v33, v18, v18 v_add_f32_e32 v29, v21, v17 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v32, v23, v33 v_sub_f32_e32 v19, v29, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_mul_f32 v30, v26, v29 :: v_dual_sub_f32 v17, v17, v19 v_fmaak_f32 v27, s31, v29, 0x3e91f4c4 v_fma_f32 v24, v29, v26, -v30 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v20, v29, v27, 0x3ecccdef v_mul_f32_e32 v21, v29, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v19, v29, v20, -v21 v_dual_fmac_f32 v19, v17, v20 :: v_dual_mul_f32 v20, v22, v22 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v25, v21, v19 v_fmaak_f32 v27, s5, v20, 0xbc7a590c s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_sub_f32_e32 v21, v25, v21 v_add_f32_e32 v28, 0x3f2aaaaa, v25 v_fmac_f32_e32 v24, v29, v15 v_ldexp_f32 v15, v15, 1 v_sub_f32_e32 v19, v19, v21 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_add_f32 v21, 0xbf2aaaaa, v28 :: v_dual_fmac_f32 v24, v17, v26 v_add_f32_e32 v19, 0x31739010, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_sub_f32_e32 v21, v25, v21 v_fmaak_f32 v25, v20, v27, 0x3d29fb3f v_add_f32_e32 v27, v30, v24 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v19, v19, v21 v_dual_fmaak_f32 v21, v20, v25, 0xbd97d4d7 :: v_dual_sub_f32 v30, v27, v30 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v25, v28, v19 v_fmaak_f32 v21, v20, v21, 0x3dd931b2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v24, v24, v30 v_sub_f32_e32 v28, v28, v25 v_mul_f32_e32 v33, v27, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fmaak_f32 v21, v20, v21, 0xbe1160e6 v_add_f32_e32 v19, v19, v28 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v28, v27, v25, -v33 v_fmac_f32_e32 v28, v27, v19 v_cvt_f32_i32_e32 v19, v34 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fmac_f32_e32 v28, v24, v25 v_ldexp_f32 v25, v26, 1 v_mul_f32_e32 v24, 0x3f317218, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f32_e32 v26, v33, v28 v_add_f32_e32 v17, v31, v32 v_fma_f32 v34, 0x3f317218, v19, -v24 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_add_f32 v36, v25, v26 :: v_dual_sub_f32 v33, v26, v33 v_sub_f32_e32 v31, v17, v31 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_fmac_f32 v34, 0xb102e308, v19 :: v_dual_sub_f32 v25, v36, v25 v_sub_f32_e32 v28, v28, v33 v_mul_f32_e32 v33, v23, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_f32_e32 v27, v32, v31 v_sub_f32_e32 v25, v26, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v15, v15, v28 v_fma_f32 v26, v17, v23, -v33 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_dual_add_f32 v15, v15, v25 :: v_dual_fmac_f32 v26, v17, v18 v_ldexp_f32 v18, v18, 1 v_fmaak_f32 v21, v20, v21, 0x3e4cb8bf v_add_f32_e32 v25, v36, v15 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_fmaak_f32 v29, s31, v17, 0x3e91f4c4 :: v_dual_fmac_f32 v26, v27, v23 v_ldexp_f32 v23, v23, 1 v_sub_f32_e32 v36, v25, v36 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmaak_f32 v29, v17, v29, 0x3ecccdef v_sub_f32_e32 v15, v15, v36 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v35, v17, v29 v_fma_f32 v30, v17, v29, -v35 v_fmaak_f32 v17, v20, v21, 0xbeaaaa62 v_add_f32_e32 v21, v24, v34 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v17, v20, v17 :: v_dual_sub_f32 v20, v21, v24 v_fmac_f32_e32 v22, v22, v17 v_fmac_f32_e32 v30, v27, v29 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_add_f32 v27, v21, v25 :: v_dual_sub_f32 v20, v34, v20 v_add_f32_e32 v32, v35, v30 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_sub_f32 v34, v27, v21 :: v_dual_sub_f32 v35, v32, v35 v_add_f32_e32 v37, 0x3f2aaaaa, v32 v_dual_sub_f32 v25, v25, v34 :: v_dual_sub_f32 v30, v30, v35 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v35, 0xbf2aaaaa, v37 v_dual_add_f32 v19, 0x31739010, v30 :: v_dual_sub_f32 v28, v32, v35 v_frexp_exp_i32_f32_e32 v30, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_add_f32 v19, v19, v28 :: v_dual_add_f32 v28, v33, v26 v_dual_add_f32 v24, v37, v19 :: v_dual_sub_f32 v33, v28, v33 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v32, v37, v24 v_dual_mul_f32 v35, v28, v24 :: v_dual_sub_f32 v26, v26, v33 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f32_e32 v19, v19, v32 v_sub_f32_e32 v32, v27, v34 v_fma_f32 v37, v28, v24, -v35 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v21, v21, v32 v_fmac_f32_e32 v37, v28, v19 v_subrev_co_ci_u32_e64 v19, s0, 0, v30, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_add_f32 v28, v20, v15 :: v_dual_add_f32 v21, v25, v21 v_fmac_f32_e32 v37, v26, v24 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cvt_f32_i32_e32 v17, v19 v_mul_f32_e32 v29, s27, v10 v_sub_f32_e32 v19, v28, v20 v_add_f32_e32 v21, v28, v21 v_add_f32_e32 v24, v35, v37 v_cmp_eq_f32_e64 s0, 1.0, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_mul_f32 v29, v9, v29 :: v_dual_sub_f32 v26, v28, v19 v_add_f32_e32 v28, v27, v21 v_mul_f32_e32 v31, s25, v9 v_sub_f32_e32 v15, v15, v19 v_sub_f32_e32 v30, v24, v35 v_sub_f32_e32 v19, v20, v26 v_sub_f32_e32 v20, v28, v27 v_add_f32_e32 v32, v23, v24 v_div_scale_f32 v27, null, v13, v13, v31 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v15, v15, v19 v_dual_sub_f32 v19, v21, v20 :: v_dual_sub_f32 v20, 0x3fc90fdb, v22 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_sub_f32 v26, v37, v30 :: v_dual_sub_f32 v23, v32, v23 v_add_f32_e32 v15, v15, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v19, v22, v20, vcc_lo v_dual_add_f32 v18, v18, v26 :: v_dual_sub_f32 v23, v24, v23 v_cmp_eq_f32_e32 vcc_lo, 1.0, v14 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_bfi_b32 v16, 0x7fffffff, v19, v16 v_mul_f32_e32 v25, 0x3f317218, v17 v_cndmask_b32_e64 v20, 2.0, 1.0, vcc_lo v_fma_f32 v21, 0x3f317218, v17, -v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fmac_f32_e32 v21, 0xb102e308, v17 v_add_f32_e32 v17, v18, v23 v_add_f32_e32 v18, v28, v15 v_add_f32_e32 v22, v25, v21 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_add_f32 v23, v32, v17 :: v_dual_sub_f32 v24, v18, v28 v_mul_f32_e32 v26, v20, v18 v_dual_add_f32 v28, v22, v23 :: v_dual_sub_f32 v15, v15, v24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f32 v18, v20, v18, -v26 v_dual_sub_f32 v24, v22, v25 :: v_dual_sub_f32 v25, v23, v32 v_sub_f32_e32 v30, v28, v22 v_cmp_class_f32_e64 vcc_lo, v26, 0x204 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_fmac_f32 v18, v20, v15 :: v_dual_sub_f32 v15, v21, v24 v_sub_f32_e32 v17, v17, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_sub_f32_e32 v21, v28, v30 v_rcp_f32_e32 v32, v27 v_add_f32_e32 v25, v26, v18 v_sub_f32_e32 v23, v23, v30 v_add_f32_e32 v30, v15, v17 v_sub_f32_e32 v21, v22, v21 v_mul_f32_e32 v24, v2, v16 v_cndmask_b32_e32 v22, v25, v26, vcc_lo v_sub_f32_e32 v25, v25, v26 v_sub_f32_e32 v35, v30, v15 v_add_f32_e32 v21, v23, v21 v_fma_f32 v34, -v27, v32, 1.0 v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v22 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_sub_f32 v18, v18, v25 :: v_dual_sub_f32 v17, v17, v35 v_add_f32_e32 v21, v30, v21 v_sub_f32_e32 v30, v30, v35 v_cndmask_b32_e64 v23, 0, 0x37000000, vcc_lo v_div_scale_f32 v36, vcc_lo, v31, v13, v31 v_fmac_f32_e32 v32, v34, v32 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_dual_add_f32 v34, v28, v21 :: v_dual_sub_f32 v37, v22, v23 v_sub_f32_e32 v15, v15, v30 v_cndmask_b32_e64 v35, 2.0, 1.0, s0 v_mul_f32_e32 v38, v36, v32 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_f32_e32 v28, v34, v28 v_dual_mul_f32 v30, 0x3fb8aa3b, v37 :: v_dual_add_f32 v15, v17, v15 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v40, -v27, v38, v36 v_sub_f32_e32 v21, v21, v28 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_fma_f32 v17, 0x3fb8aa3b, v37, -v30 v_rndne_f32_e32 v39, v30 v_mul_f32_e32 v28, 0.5, v20 v_dual_fmac_f32 v38, v40, v32 :: v_dual_add_f32 v15, v15, v21 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_dual_fmac_f32 v17, 0x32a5705f, v37 :: v_dual_sub_f32 v30, v30, v39 v_trunc_f32_e32 v21, v20 v_cvt_i32_f32_e32 v26, v39 v_trunc_f32_e32 v41, v28 v_add_f32_e32 v17, v30, v17 v_add_f32_e32 v30, v34, v15 v_cmp_eq_f32_e64 s0, v21, v20 v_fma_f32 v20, -v27, v38, v36 v_cmp_neq_f32_e64 s1, v41, v28 v_exp_f32_e32 v17, v17 v_sub_f32_e32 v21, v30, v34 v_mul_f32_e32 v27, v35, v30 v_div_fmas_f32 v20, v20, v32, v38 v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v22| s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_f32_e32 v15, v15, v21 v_fma_f32 v21, v35, v30, -v27 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(TRANS32_DEP_1) v_div_fixup_f32 v20, v20, v13, v31 v_cndmask_b32_e32 v18, 0, v18, vcc_lo v_ldexp_f32 v17, v17, v26 v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v37 v_fmac_f32_e32 v21, v35, v15 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_add_f32 v15, v23, v18 :: v_dual_mul_f32 v18, v1, v20 v_cndmask_b32_e32 v17, 0, v17, vcc_lo v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v37 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v22, v27, v21 v_fma_f32 v18, v0, v16, -v18 s_delay_alu instid0(VALU_DEP_4) v_cndmask_b32_e32 v17, 0x7f800000, v17, vcc_lo s_and_b32 vcc_lo, s0, s1 v_cmp_class_f32_e64 s1, v27, 0x204 v_cndmask_b32_e32 v23, 1.0, v14, vcc_lo v_cndmask_b32_e32 v30, 0, v14, vcc_lo v_fma_f32 v15, v17, v15, v17 v_cmp_gt_f32_e32 vcc_lo, 0, v14 v_cndmask_b32_e64 v25, v22, v27, s1 v_cmp_eq_f32_e64 s1, 0x7f800000, v17 v_sub_f32_e32 v22, v22, v27 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v15, v15, v17, s1 v_cmp_eq_f32_e64 s1, 0x42b17218, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v21, v21, v22 v_bfi_b32 v15, 0x7fffffff, v15, v23 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v17, 0, 0x37000000, s1 v_cmp_eq_f32_e64 s1, 0, v14 v_cndmask_b32_e64 v31, 0x7fc00000, v15, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_f32_e32 v28, v25, v17 v_cndmask_b32_e64 v26, 0x7f800000, 0, s1 v_cmp_neq_f32_e64 s0, 0x7f800000, |v25| s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_cndmask_b32 v15, v15, v31 :: v_dual_mul_f32 v32, 0x3fb8aa3b, v28 v_bfi_b32 v26, 0x7fffffff, v26, v30 s_or_b32 vcc_lo, s1, s2 v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v28 v_cndmask_b32_e64 v21, 0, v21, s0 v_fma_f32 v30, 0x3fb8aa3b, v28, -v32 v_rndne_f32_e32 v31, v32 v_cndmask_b32_e32 v15, v15, v26, vcc_lo v_cmp_o_f32_e32 vcc_lo, v14, v14 v_cmp_nlt_f32_e64 s2, 0x42b17218, v28 v_fmac_f32_e32 v30, 0x32a5705f, v28 v_sub_f32_e32 v26, v32, v31 v_cvt_i32_f32_e32 v31, v31 v_cndmask_b32_e32 v14, 0x7fc00000, v15, vcc_lo v_trunc_f32_e32 v32, v35 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_dual_add_f32 v17, v17, v21 :: v_dual_add_f32 v26, v26, v30 v_mul_f32_e32 v30, 0.5, v35 v_fma_f32 v18, v24, |v19|, v18 v_cmp_eq_f32_e64 s0, v32, v35 v_cmp_eq_f32_e32 vcc_lo, 0, v13 v_exp_f32_e32 v26, v26 v_trunc_f32_e32 v34, v30 v_dual_mul_f32 v18, s25, v18 :: v_dual_mul_f32 v33, v3, v16 v_dual_fmac_f32 v16, s28, v20 :: v_dual_mul_f32 v15, s27, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_mul_f32 v18, s24, v18 :: v_dual_fmac_f32 v33, v4, v20 v_fmaak_f32 v23, s6, v16, 0x3eb2b021 s_waitcnt_depctr 0xfff v_ldexp_f32 v26, v26, v31 v_dual_mul_f32 v16, 0xc16c7922, v16 :: v_dual_mul_f32 v15, v9, v15 v_dual_mul_f32 v20, s25, v33 :: v_dual_mul_f32 v23, 0x4048f5c3, v23 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v25, 0, v26, s1 v_cmp_neq_f32_e64 s1, v34, v30 v_mul_f32_e32 v16, 0x43fa0000, v16 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_mul_f32 v20, s24, v20 :: v_dual_mul_f32 v23, 0x447a0000, v23 v_cndmask_b32_e64 v25, 0x7f800000, v25, s2 s_delay_alu instid0(VALU_DEP_4) s_and_b32 s0, s0, s1 v_cmp_class_f32_e64 s1, v13, 0x204 v_cndmask_b32_e64 v28, 0, v13, s0 v_mul_f32_e32 v23, 0x40c00000, v23 v_fma_f32 v17, v25, v17, v25 v_mul_f32_e32 v16, 0x3fe2147b, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_mul_f32_e32 v14, v14, v23 v_cndmask_b32_e64 v23, 0x7f800000, 0, vcc_lo s_or_b32 vcc_lo, vcc_lo, s1 v_div_scale_f32 v27, null, 0x40308216, 0x40308216, v14 v_div_scale_f32 v26, s2, v14, 0x40308216, v14 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_bfi_b32 v23, 0x7fffffff, v23, v28 v_rcp_f32_e32 v22, v27 s_waitcnt_depctr 0xfff v_fma_f32 v21, -v27, v22, 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fmac_f32_e32 v22, v21, v22 v_cndmask_b32_e64 v21, 1.0, v13, s0 v_cmp_eq_f32_e64 s0, 0x7f800000, v25 v_mul_f32_e32 v30, v26, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v17, v17, v25, s0 v_fma_f32 v25, -v27, v30, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_bfi_b32 v17, 0x7fffffff, v17, v21 v_dual_mul_f32 v21, 0x3f821cac, v15 :: v_dual_fmac_f32 v30, v25, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v17, v17, v23, vcc_lo v_cmp_o_f32_e32 vcc_lo, v13, v13 v_fma_f32 v19, -v27, v30, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v17, 0x7fc00000, v17, vcc_lo s_mov_b32 vcc_lo, s2 ; implicit-def: $sgpr2 v_div_fmas_f32 v19, v19, v22, v30 v_cmp_lt_f32_e32 vcc_lo, 0, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_mul_f32_e32 v16, v17, v16 v_mul_f32_e32 v18, v17, v18 v_div_fixup_f32 v14, v19, 0x40308216, v14 v_mul_f32_e32 v19, 0x3f8b851f, v29 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f32_e32 v18, 0x447a0000, v18 v_fmac_f32_e32 v14, 0x3f670a3d, v16 s_delay_alu instid0(VALU_DEP_3) v_cndmask_b32_e32 v16, v19, v29, vcc_lo v_mul_f32_e32 v19, v8, v17 v_mul_f32_e32 v17, v17, v20 v_cmp_lt_f32_e32 vcc_lo, 0, v11 v_add_f32_e32 v14, v14, v14 v_fmaak_f32 v20, s7, v13, 0x42af51eb v_mul_f32_e32 v19, 0x447a0000, v19 v_mul_f32_e32 v13, 0x447a0000, v17 v_cndmask_b32_e32 v15, v15, v21, vcc_lo v_fma_f32 v17, v18, 0.5, -v14 v_mul_f32_e32 v18, 0x49742400, v20 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_fmac_f32 v16, -0.5, v19 :: v_dual_mul_f32 v13, 0.5, v13 v_dual_sub_f32 v15, v17, v15 :: v_dual_fmac_f32 v16, 0x49742400, v20 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f32 v18, s28, v18, v13 v_fmac_f32_e32 v13, s28, v14 v_dual_mul_f32 v15, v6, v15 :: v_dual_mul_f32 v16, v5, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v18, v7, v18 v_fma_f32 v21, 0.5, v15, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v22, 0.5, v16, v11 v_fma_f32 v23, 0.5, v18, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f32_e32 v24, s27, v21 v_cmp_lt_f32_e32 vcc_lo, 0, v21 v_dual_mul_f32 v25, s27, v22 :: v_dual_mul_f32 v24, v23, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v23, v25, v23 v_mul_f32_e32 v25, 0x3f8b851f, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_mul_f32 v26, 0x3f821cac, v23 :: v_dual_cndmask_b32 v21, v25, v24 v_cmp_lt_f32_e32 vcc_lo, 0, v22 v_dual_fmac_f32 v21, -0.5, v19 :: v_dual_cndmask_b32 v22, v23, v26 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_fmac_f32 v21, 0x49742400, v20 :: v_dual_sub_f32 v22, v17, v22 v_dual_mul_f32 v21, v5, v21 :: v_dual_mul_f32 v14, v6, v22 v_mul_f32_e32 v22, v7, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v24, 0.5, v21, v11 v_fma_f32 v23, 0.5, v14, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f32 v25, 0.5, v22, v9 v_dual_fmac_f32 v15, 2.0, v14 :: v_dual_fmac_f32 v16, 2.0, v21 v_dual_mul_f32 v27, s27, v24 :: v_dual_mul_f32 v26, s27, v23 v_cmp_lt_f32_e32 vcc_lo, 0, v23 v_fma_f32 v21, 2.0, v22, v18 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f32_e32 v26, v25, v26 v_mul_f32_e32 v25, v25, v27 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fmac_f32_e32 v21, 2.0, v22 v_mul_f32_e32 v27, 0x3f8b851f, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f32_e32 v28, 0x3f821cac, v25 v_fmac_f32_e32 v21, v7, v13 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_cndmask_b32_e32 v23, v27, v26, vcc_lo v_cmp_lt_f32_e32 vcc_lo, 0, v24 v_fma_f32 v27, v7, v13, v9 v_fmac_f32_e32 v9, 0x3e2aaaab, v21 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_fmac_f32 v23, -0.5, v19 :: v_dual_cndmask_b32 v24, v25, v28 v_fma_f32 v18, 0.5, v18, v9 v_fma_f32 v22, 0.5, v22, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v23, 0x49742400, v20 v_sub_f32_e32 v24, v17, v24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v26, v5, v23, v11 v_fma_f32 v25, v6, v24, v10 v_dual_mul_f32 v24, v6, v24 :: v_dual_mul_f32 v23, v5, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_mul_f32 v29, s27, v26 :: v_dual_mul_f32 v28, s27, v25 v_cmp_lt_f32_e32 vcc_lo, 0, v25 v_dual_fmac_f32 v15, 2.0, v24 :: v_dual_fmac_f32 v16, 2.0, v23 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f32_e32 v28, v27, v28 v_mul_f32_e32 v27, v27, v29 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v29, 0x3f8b851f, v28 v_dual_mul_f32 v14, 0x3f821cac, v27 :: v_dual_cndmask_b32 v25, v29, v28 v_cmp_lt_f32_e32 vcc_lo, 0, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_fmac_f32 v25, -0.5, v19 :: v_dual_cndmask_b32 v14, v27, v14 v_dual_fmac_f32 v25, 0x49742400, v20 :: v_dual_sub_f32 v14, v17, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_fmac_f32 v16, v5, v25 :: v_dual_fmac_f32 v15, v6, v14 v_dual_fmac_f32 v11, 0x3e2aaaab, v16 :: v_dual_fmac_f32 v10, 0x3e2aaaab, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_mul_f32 v15, s27, v11 :: v_dual_mul_f32 v14, s27, v10 v_cmp_lt_f32_e32 vcc_lo, 0, v10 v_mul_f32_e32 v15, v9, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v14, v9, v14 :: v_dual_mul_f32 v23, 0x3f821cac, v15 v_mul_f32_e32 v16, 0x3f8b851f, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v14, v16, v14, vcc_lo v_cmp_lt_f32_e32 vcc_lo, 0, v11 v_fmac_f32_e32 v14, -0.5, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v15, v15, v23 :: v_dual_fmac_f32 v14, 0x49742400, v20 v_sub_f32_e32 v15, v17, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v16, v5, v14 :: v_dual_mul_f32 v15, v6, v15 v_fma_f32 v23, 0.5, v16, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v14, 0.5, v15, v10 v_dual_mul_f32 v25, s27, v23 :: v_dual_mul_f32 v24, s27, v14 v_cmp_lt_f32_e32 vcc_lo, 0, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v24, v18, v24 v_dual_mul_f32 v18, v18, v25 :: v_dual_mul_f32 v25, 0x3f8b851f, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v26, 0x3f821cac, v18 v_cndmask_b32_e32 v14, v25, v24, vcc_lo v_cmp_lt_f32_e32 vcc_lo, 0, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v14, -0.5, v19 v_cndmask_b32_e32 v18, v18, v26, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v14, 0x49742400, v20 v_sub_f32_e32 v18, v17, v18 v_fma_f32 v13, v7, v13, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f32_e32 v14, v5, v14 v_mul_f32_e32 v18, v6, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v24, 0.5, v14, v11 v_fma_f32 v23, 0.5, v18, v10 v_fmac_f32_e32 v15, 2.0, v18 v_fmac_f32_e32 v16, 2.0, v14 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_dual_mul_f32 v26, s27, v24 :: v_dual_mul_f32 v25, s27, v23 v_cmp_lt_f32_e32 vcc_lo, 0, v23 v_mul_f32_e32 v25, v22, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v22, v22, v26 v_mul_f32_e32 v26, 0x3f8b851f, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v27, 0x3f821cac, v22 v_cndmask_b32_e32 v23, v26, v25, vcc_lo v_cmp_lt_f32_e32 vcc_lo, 0, v24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v23, -0.5, v19 v_dual_cndmask_b32 v22, v22, v27 :: v_dual_fmac_f32 v23, 0x49742400, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_f32_e32 v22, v17, v22 v_fma_f32 v25, v5, v23, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v24, v6, v22, v10 v_dual_mul_f32 v14, v5, v23 :: v_dual_mul_f32 v27, s27, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mul_f32_e32 v26, s27, v24 v_cmp_lt_f32_e32 vcc_lo, 0, v24 v_fmac_f32_e32 v16, 2.0, v14 ; implicit-def: $vgpr14 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f32_e32 v26, v13, v26 v_mul_f32_e32 v13, v13, v27 v_mul_f32_e32 v27, 0x3f8b851f, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v18, 0x3f821cac, v13 v_cndmask_b32_e32 v24, v27, v26, vcc_lo v_cmp_lt_f32_e32 vcc_lo, 0, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v24, -0.5, v19 v_cndmask_b32_e32 v18, v13, v18, vcc_lo v_mul_f32_e32 v19, v6, v22 v_fmamk_f32 v13, v21, 0x3e2aaaab, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_fmac_f32 v24, 0x49742400, v20 :: v_dual_sub_f32 v17, v17, v18 v_fmac_f32_e32 v15, 2.0, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_readfirstlane_b32 s0, v13 v_cmp_ngt_f32_e64 s1, 0x48000000, |v13| v_dual_fmac_f32 v16, v5, v24 :: v_dual_fmac_f32 v15, v6, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) s_bitset0_b32 s0, 31 s_and_b32 vcc_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) v_dual_fmamk_f32 v16, v16, 0x3e2aaaab, v11 :: v_dual_fmamk_f32 v15, v15, 0x3e2aaaab, v10 s_waitcnt lgkmcnt(0) s_clause 0x5 global_store_b32 v12, v11, s[8:9] global_store_b32 v12, v10, s[10:11] global_store_b32 v12, v9, s[12:13] global_store_b32 v12, v16, s[14:15] global_store_b32 v12, v15, s[16:17] global_store_b32 v12, v13, s[18:19] s_cbranch_vccz .LBB0_5 ; %bb.4: ; in Loop: Header=BB0_3 Depth=1 s_and_b32 s2, s0, 0x7fffff s_lshr_b32 s3, s0, 23 s_bitset1_b32 s2, 23 s_addk_i32 s3, 0xff88 s_mul_hi_u32 s4, s2, 0xfe5163ab s_mul_i32 s30, s2, 0x3c439041 s_mul_hi_u32 s33, s2, 0x3c439041 s_add_u32 s4, s4, s30 s_addc_u32 s30, 0, s33 s_mul_i32 s33, s2, 0xdb629599 s_mul_hi_u32 s34, s2, 0xdb629599 s_add_u32 s30, s30, s33 s_addc_u32 s33, 0, s34 s_mul_i32 s34, s2, 0xf534ddc0 s_mul_hi_u32 s35, s2, 0xf534ddc0 s_add_u32 s33, s33, s34 s_addc_u32 s34, 0, s35 s_mul_i32 s35, s2, 0xfc2757d1 s_mul_hi_u32 s36, s2, 0xfc2757d1 s_add_u32 s34, s34, s35 s_addc_u32 s35, 0, s36 s_mul_i32 s36, s2, 0x4e441529 s_mul_hi_u32 s38, s2, 0x4e441529 s_add_u32 s35, s35, s36 s_addc_u32 s36, 0, s38 s_cmp_gt_u32 s3, 63 s_mul_i32 s38, s2, 0xfe5163ab s_mul_hi_u32 s39, s2, 0xa2f9836e s_mul_i32 s2, s2, 0xa2f9836e s_cselect_b32 s40, s30, s34 s_cselect_b32 s4, s4, s33 s_cselect_b32 s30, s38, s30 s_add_u32 s2, s36, s2 s_addc_u32 s36, 0, s39 s_cmp_gt_u32 s3, 63 s_cselect_b32 s38, 0xffffffc0, 0 s_cselect_b32 s33, s33, s35 s_cselect_b32 s2, s34, s2 s_cselect_b32 s34, s35, s36 s_add_i32 s38, s38, s3 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_gt_u32 s38, 31 s_cselect_b32 s3, 0xffffffe0, 0 s_cselect_b32 s35, s33, s2 s_cselect_b32 s2, s2, s34 s_cselect_b32 s33, s40, s33 s_cselect_b32 s34, s4, s40 s_cselect_b32 s4, s30, s4 s_add_i32 s3, s3, s38 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_gt_u32 s3, 31 s_cselect_b32 s30, 0xffffffe0, 0 s_cselect_b32 s2, s35, s2 s_cselect_b32 s35, s33, s35 s_cselect_b32 s33, s34, s33 s_cselect_b32 s4, s4, s34 s_add_i32 s30, s30, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_sub_i32 s3, 32, s30 s_cmp_eq_u32 s30, 0 v_mov_b32_e32 v14, s3 s_cselect_b32 s30, -1, 0 v_alignbit_b32 v15, s2, s35, v14 v_alignbit_b32 v16, s35, s33, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s3, v15 v_cndmask_b32_e64 v15, v16, s35, s30 s_delay_alu instid0(VALU_DEP_2) s_cselect_b32 s2, s2, s3 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_alignbit_b32 v16, s2, v15, 30 s_bfe_u32 s3, s2, 0x1001d s_delay_alu instid0(SALU_CYCLE_1) s_sub_i32 s34, 0, s3 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_xor_b32_e32 v16, s34, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_clz_i32_u32_e32 v17, v16 v_min_u32_e32 v17, 32, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_lshlrev_b32_e32 v19, 23, v17 v_alignbit_b32 v14, s33, s4, v14 v_sub_nc_u32_e32 v18, 31, v17 v_cndmask_b32_e64 v14, v14, s33, s30 s_delay_alu instid0(VALU_DEP_1) v_alignbit_b32 v15, v15, v14, 30 v_alignbit_b32 v14, v14, s4, 30 s_lshr_b32 s4, s2, 29 s_lshr_b32 s2, s2, 30 s_lshl_b32 s4, s4, 31 v_xor_b32_e32 v15, s34, v15 v_xor_b32_e32 v14, s34, v14 s_or_b32 s30, s4, 0.5 s_add_i32 s2, s3, s2 v_sub_nc_u32_e32 v19, s30, v19 v_alignbit_b32 v16, v16, v15, v18 v_alignbit_b32 v14, v15, v14, v18 s_mov_b32 s3, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_alignbit_b32 v15, v16, v14, 9 v_lshrrev_b32_e32 v16, 9, v16 v_clz_i32_u32_e32 v18, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_min_u32_e32 v18, 32, v18 v_sub_nc_u32_e32 v20, 31, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_alignbit_b32 v14, v15, v14, v20 v_or_b32_e32 v15, v16, v19 v_add_nc_u32_e32 v17, v18, v17 v_lshrrev_b32_e32 v14, 9, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v17, 0x3fc90fda, v15 :: v_dual_lshlrev_b32 v16, 23, v17 v_sub_nc_u32_e32 v14, v14, v16 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v16, 0x3fc90fda, v15, -v17 v_add_nc_u32_e32 v14, 0x33000000, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v16, 0x33a22168, v15 v_or_b32_e32 v14, s4, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v16, 0x3fc90fda, v14 v_add_f32_e32 v14, v17, v16 .LBB0_5: ; %Flow526 ; in Loop: Header=BB0_3 Depth=1 v_mov_b32_e32 v15, s2 s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB0_7 ; %bb.6: ; in Loop: Header=BB0_3 Depth=1 v_mul_f32_e64 v14, 0x3f22f983, |v13| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f32_e32 v15, v14 v_fma_f32 v14, 0xbfc90fda, v15, |v13| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v14, 0xb3a22168, v15 v_fmac_f32_e32 v14, 0xa7c234c4, v15 v_cvt_i32_f32_e32 v15, v15 .LBB0_7: ; %_ZL3cosf.exit ; in Loop: Header=BB0_3 Depth=1 s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB0_9 ; %bb.8: ; in Loop: Header=BB0_3 Depth=1 s_and_b32 s2, s0, 0x7fffff s_lshr_b32 s3, s0, 23 s_bitset1_b32 s2, 23 s_addk_i32 s3, 0xff88 s_mul_hi_u32 s4, s2, 0xfe5163ab s_mul_i32 s30, s2, 0x3c439041 s_mul_hi_u32 s33, s2, 0x3c439041 s_add_u32 s4, s4, s30 s_addc_u32 s30, 0, s33 s_mul_i32 s33, s2, 0xdb629599 s_mul_hi_u32 s34, s2, 0xdb629599 s_add_u32 s30, s30, s33 s_addc_u32 s33, 0, s34 s_mul_i32 s34, s2, 0xf534ddc0 s_mul_hi_u32 s35, s2, 0xf534ddc0 s_add_u32 s33, s33, s34 s_addc_u32 s34, 0, s35 s_mul_i32 s35, s2, 0xfc2757d1 s_mul_hi_u32 s36, s2, 0xfc2757d1 s_add_u32 s34, s34, s35 s_addc_u32 s35, 0, s36 s_mul_i32 s36, s2, 0x4e441529 s_mul_hi_u32 s38, s2, 0x4e441529 s_add_u32 s35, s35, s36 s_addc_u32 s36, 0, s38 s_cmp_gt_u32 s3, 63 s_mul_i32 s38, s2, 0xfe5163ab s_mul_hi_u32 s39, s2, 0xa2f9836e s_mul_i32 s2, s2, 0xa2f9836e s_cselect_b32 s40, s30, s34 s_cselect_b32 s4, s4, s33 s_cselect_b32 s30, s38, s30 s_add_u32 s2, s36, s2 s_addc_u32 s36, 0, s39 s_cmp_gt_u32 s3, 63 s_cselect_b32 s38, 0xffffffc0, 0 s_cselect_b32 s33, s33, s35 s_cselect_b32 s2, s34, s2 s_cselect_b32 s34, s35, s36 s_add_i32 s38, s38, s3 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_gt_u32 s38, 31 s_cselect_b32 s3, 0xffffffe0, 0 s_cselect_b32 s35, s33, s2 s_cselect_b32 s2, s2, s34 s_cselect_b32 s33, s40, s33 s_cselect_b32 s34, s4, s40 s_cselect_b32 s4, s30, s4 s_add_i32 s3, s3, s38 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_gt_u32 s3, 31 s_cselect_b32 s30, 0xffffffe0, 0 s_cselect_b32 s2, s35, s2 s_cselect_b32 s35, s33, s35 s_cselect_b32 s33, s34, s33 s_cselect_b32 s4, s4, s34 s_add_i32 s30, s30, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_sub_i32 s3, 32, s30 s_cmp_eq_u32 s30, 0 v_mov_b32_e32 v16, s3 s_cselect_b32 s30, -1, 0 v_alignbit_b32 v17, s2, s35, v16 v_alignbit_b32 v18, s35, s33, v16 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s3, v17 v_cndmask_b32_e64 v17, v18, s35, s30 s_delay_alu instid0(VALU_DEP_2) s_cselect_b32 s2, s2, s3 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_alignbit_b32 v18, s2, v17, 30 s_bfe_u32 s3, s2, 0x1001d s_delay_alu instid0(SALU_CYCLE_1) s_sub_i32 s34, 0, s3 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_xor_b32_e32 v18, s34, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_clz_i32_u32_e32 v19, v18 v_min_u32_e32 v19, 32, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_lshlrev_b32_e32 v21, 23, v19 v_alignbit_b32 v16, s33, s4, v16 v_sub_nc_u32_e32 v20, 31, v19 v_cndmask_b32_e64 v16, v16, s33, s30 s_delay_alu instid0(VALU_DEP_1) v_alignbit_b32 v17, v17, v16, 30 v_alignbit_b32 v16, v16, s4, 30 s_lshr_b32 s4, s2, 29 s_lshr_b32 s2, s2, 30 s_lshl_b32 s4, s4, 31 v_xor_b32_e32 v17, s34, v17 v_xor_b32_e32 v16, s34, v16 s_or_b32 s30, s4, 0.5 s_add_i32 s3, s3, s2 v_sub_nc_u32_e32 v21, s30, v21 v_alignbit_b32 v18, v18, v17, v20 v_alignbit_b32 v16, v17, v16, v20 s_mov_b32 s2, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_alignbit_b32 v17, v18, v16, 9 v_lshrrev_b32_e32 v18, 9, v18 v_clz_i32_u32_e32 v20, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_min_u32_e32 v20, 32, v20 v_sub_nc_u32_e32 v22, 31, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_alignbit_b32 v16, v17, v16, v22 v_or_b32_e32 v17, v18, v21 v_add_nc_u32_e32 v19, v20, v19 v_lshrrev_b32_e32 v16, 9, v16 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v19, 0x3fc90fda, v17 :: v_dual_lshlrev_b32 v18, 23, v19 v_sub_nc_u32_e32 v16, v16, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v18, 0x3fc90fda, v17, -v19 v_add_nc_u32_e32 v16, 0x33000000, v16 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v18, 0x33a22168, v17 v_or_b32_e32 v16, s4, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v18, 0x3fc90fda, v16 v_add_f32_e32 v16, v19, v18 s_branch .LBB0_10 .LBB0_9: ; in Loop: Header=BB0_3 Depth=1 s_mov_b32 s2, -1 ; implicit-def: $sgpr3 ; implicit-def: $vgpr16 .LBB0_10: ; %Flow525 ; in Loop: Header=BB0_3 Depth=1 v_mov_b32_e32 v17, s3 s_and_not1_b32 vcc_lo, exec_lo, s2 s_cbranch_vccnz .LBB0_12 ; %bb.11: ; in Loop: Header=BB0_3 Depth=1 v_mul_f32_e64 v16, 0x3f22f983, |v13| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f32_e32 v17, v16 v_fma_f32 v16, 0xbfc90fda, v17, |v13| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v16, 0xb3a22168, v17 v_fmac_f32_e32 v16, 0xa7c234c4, v17 v_cvt_i32_f32_e32 v17, v17 .LBB0_12: ; %_ZL3sinf.exit ; in Loop: Header=BB0_3 Depth=1 s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB0_14 ; %bb.13: ; in Loop: Header=BB0_3 Depth=1 s_and_b32 s2, s0, 0x7fffff s_lshr_b32 s3, s0, 23 s_bitset1_b32 s2, 23 s_addk_i32 s3, 0xff88 s_mul_hi_u32 s4, s2, 0xfe5163ab s_mul_i32 s30, s2, 0x3c439041 s_mul_hi_u32 s33, s2, 0x3c439041 s_add_u32 s4, s4, s30 s_addc_u32 s30, 0, s33 s_mul_i32 s33, s2, 0xdb629599 s_mul_hi_u32 s34, s2, 0xdb629599 s_add_u32 s30, s30, s33 s_addc_u32 s33, 0, s34 s_mul_i32 s34, s2, 0xf534ddc0 s_mul_hi_u32 s35, s2, 0xf534ddc0 s_add_u32 s33, s33, s34 s_addc_u32 s34, 0, s35 s_mul_i32 s35, s2, 0xfc2757d1 s_mul_hi_u32 s36, s2, 0xfc2757d1 s_add_u32 s34, s34, s35 s_addc_u32 s35, 0, s36 s_mul_i32 s36, s2, 0x4e441529 s_mul_hi_u32 s38, s2, 0x4e441529 s_add_u32 s35, s35, s36 s_addc_u32 s36, 0, s38 s_cmp_gt_u32 s3, 63 s_mul_i32 s38, s2, 0xfe5163ab s_mul_hi_u32 s39, s2, 0xa2f9836e s_mul_i32 s2, s2, 0xa2f9836e s_cselect_b32 s40, s30, s34 s_cselect_b32 s4, s4, s33 s_cselect_b32 s30, s38, s30 s_add_u32 s2, s36, s2 s_addc_u32 s36, 0, s39 s_cmp_gt_u32 s3, 63 s_cselect_b32 s38, 0xffffffc0, 0 s_cselect_b32 s33, s33, s35 s_cselect_b32 s2, s34, s2 s_cselect_b32 s34, s35, s36 s_add_i32 s38, s38, s3 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_gt_u32 s38, 31 s_cselect_b32 s3, 0xffffffe0, 0 s_cselect_b32 s35, s33, s2 s_cselect_b32 s2, s2, s34 s_cselect_b32 s33, s40, s33 s_cselect_b32 s34, s4, s40 s_cselect_b32 s4, s30, s4 s_add_i32 s3, s3, s38 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_gt_u32 s3, 31 s_cselect_b32 s30, 0xffffffe0, 0 s_cselect_b32 s2, s35, s2 s_cselect_b32 s35, s33, s35 s_cselect_b32 s33, s34, s33 s_cselect_b32 s4, s4, s34 s_add_i32 s30, s30, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_sub_i32 s3, 32, s30 s_cmp_eq_u32 s30, 0 v_mov_b32_e32 v18, s3 s_cselect_b32 s30, -1, 0 v_alignbit_b32 v19, s2, s35, v18 v_alignbit_b32 v20, s35, s33, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s3, v19 v_cndmask_b32_e64 v19, v20, s35, s30 s_delay_alu instid0(VALU_DEP_2) s_cselect_b32 s2, s2, s3 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_alignbit_b32 v20, s2, v19, 30 s_bfe_u32 s3, s2, 0x1001d s_delay_alu instid0(SALU_CYCLE_1) s_sub_i32 s34, 0, s3 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_xor_b32_e32 v20, s34, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_clz_i32_u32_e32 v21, v20 v_min_u32_e32 v21, 32, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_lshlrev_b32_e32 v23, 23, v21 v_alignbit_b32 v18, s33, s4, v18 v_sub_nc_u32_e32 v22, 31, v21 v_cndmask_b32_e64 v18, v18, s33, s30 s_delay_alu instid0(VALU_DEP_1) v_alignbit_b32 v19, v19, v18, 30 v_alignbit_b32 v18, v18, s4, 30 s_lshr_b32 s4, s2, 29 s_lshr_b32 s2, s2, 30 s_lshl_b32 s4, s4, 31 v_xor_b32_e32 v19, s34, v19 v_xor_b32_e32 v18, s34, v18 s_or_b32 s30, s4, 0.5 s_add_i32 s3, s3, s2 v_sub_nc_u32_e32 v23, s30, v23 v_alignbit_b32 v20, v20, v19, v22 v_alignbit_b32 v18, v19, v18, v22 s_mov_b32 s2, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_alignbit_b32 v19, v20, v18, 9 v_lshrrev_b32_e32 v20, 9, v20 v_clz_i32_u32_e32 v22, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_min_u32_e32 v22, 32, v22 v_sub_nc_u32_e32 v24, 31, v22 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_alignbit_b32 v18, v19, v18, v24 v_or_b32_e32 v19, v20, v23 v_add_nc_u32_e32 v21, v22, v21 v_lshrrev_b32_e32 v18, 9, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v21, 0x3fc90fda, v19 :: v_dual_lshlrev_b32 v20, 23, v21 v_sub_nc_u32_e32 v18, v18, v20 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v20, 0x3fc90fda, v19, -v21 v_add_nc_u32_e32 v18, 0x33000000, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v20, 0x33a22168, v19 v_or_b32_e32 v18, s4, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v20, 0x3fc90fda, v18 v_add_f32_e32 v18, v21, v20 s_branch .LBB0_15 .LBB0_14: ; in Loop: Header=BB0_3 Depth=1 s_mov_b32 s2, -1 ; implicit-def: $sgpr3 ; implicit-def: $vgpr18 .LBB0_15: ; %Flow524 ; in Loop: Header=BB0_3 Depth=1 v_mov_b32_e32 v19, s3 s_and_not1_b32 vcc_lo, exec_lo, s2 s_cbranch_vccnz .LBB0_17 ; %bb.16: ; in Loop: Header=BB0_3 Depth=1 v_mul_f32_e64 v18, 0x3f22f983, |v13| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f32_e32 v19, v18 v_fma_f32 v18, 0xbfc90fda, v19, |v13| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v18, 0xb3a22168, v19 v_fmac_f32_e32 v18, 0xa7c234c4, v19 v_cvt_i32_f32_e32 v19, v19 .LBB0_17: ; %_ZL3sinf.exit390 ; in Loop: Header=BB0_3 Depth=1 s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB0_19 ; %bb.18: ; in Loop: Header=BB0_3 Depth=1 s_and_b32 s1, s0, 0x7fffff s_lshr_b32 s2, s0, 23 s_bitset1_b32 s1, 23 s_addk_i32 s2, 0xff88 s_mul_hi_u32 s3, s1, 0xfe5163ab s_mul_i32 s4, s1, 0x3c439041 s_mul_hi_u32 s30, s1, 0x3c439041 s_add_u32 s3, s3, s4 s_addc_u32 s4, 0, s30 s_mul_i32 s30, s1, 0xdb629599 s_mul_hi_u32 s33, s1, 0xdb629599 s_add_u32 s4, s4, s30 s_addc_u32 s30, 0, s33 s_mul_i32 s33, s1, 0xf534ddc0 s_mul_hi_u32 s34, s1, 0xf534ddc0 s_add_u32 s30, s30, s33 s_addc_u32 s33, 0, s34 s_mul_i32 s34, s1, 0xfc2757d1 s_mul_hi_u32 s35, s1, 0xfc2757d1 s_add_u32 s33, s33, s34 s_addc_u32 s34, 0, s35 s_mul_i32 s35, s1, 0x4e441529 s_mul_hi_u32 s36, s1, 0x4e441529 s_add_u32 s34, s34, s35 s_addc_u32 s35, 0, s36 s_cmp_gt_u32 s2, 63 s_mul_i32 s36, s1, 0xfe5163ab s_mul_hi_u32 s38, s1, 0xa2f9836e s_mul_i32 s1, s1, 0xa2f9836e s_cselect_b32 s39, s4, s33 s_cselect_b32 s3, s3, s30 s_cselect_b32 s4, s36, s4 s_add_u32 s1, s35, s1 s_addc_u32 s35, 0, s38 s_cmp_gt_u32 s2, 63 s_cselect_b32 s36, 0xffffffc0, 0 s_cselect_b32 s30, s30, s34 s_cselect_b32 s1, s33, s1 s_cselect_b32 s33, s34, s35 s_add_i32 s36, s36, s2 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_gt_u32 s36, 31 s_cselect_b32 s2, 0xffffffe0, 0 s_cselect_b32 s34, s30, s1 s_cselect_b32 s1, s1, s33 s_cselect_b32 s30, s39, s30 s_cselect_b32 s33, s3, s39 s_cselect_b32 s3, s4, s3 s_add_i32 s2, s2, s36 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_gt_u32 s2, 31 s_cselect_b32 s4, 0xffffffe0, 0 s_cselect_b32 s1, s34, s1 s_cselect_b32 s34, s30, s34 s_cselect_b32 s30, s33, s30 s_cselect_b32 s3, s3, s33 s_add_i32 s4, s4, s2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) s_sub_i32 s2, 32, s4 s_cmp_eq_u32 s4, 0 v_mov_b32_e32 v20, s2 s_cselect_b32 s4, -1, 0 v_alignbit_b32 v21, s1, s34, v20 v_alignbit_b32 v22, s34, s30, v20 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s2, v21 v_cndmask_b32_e64 v21, v22, s34, s4 s_delay_alu instid0(VALU_DEP_2) s_cselect_b32 s1, s1, s2 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_alignbit_b32 v22, s1, v21, 30 s_bfe_u32 s2, s1, 0x1001d s_delay_alu instid0(SALU_CYCLE_1) s_sub_i32 s33, 0, s2 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_xor_b32_e32 v22, s33, v22 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_clz_i32_u32_e32 v23, v22 v_min_u32_e32 v23, 32, v23 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_lshlrev_b32_e32 v25, 23, v23 v_alignbit_b32 v20, s30, s3, v20 v_sub_nc_u32_e32 v24, 31, v23 v_cndmask_b32_e64 v20, v20, s30, s4 s_delay_alu instid0(VALU_DEP_1) v_alignbit_b32 v21, v21, v20, 30 v_alignbit_b32 v20, v20, s3, 30 s_lshr_b32 s3, s1, 29 s_lshr_b32 s1, s1, 30 s_lshl_b32 s3, s3, 31 v_xor_b32_e32 v21, s33, v21 v_xor_b32_e32 v20, s33, v20 s_or_b32 s4, s3, 0.5 s_add_i32 s2, s2, s1 v_sub_nc_u32_e32 v25, s4, v25 v_alignbit_b32 v22, v22, v21, v24 v_alignbit_b32 v20, v21, v20, v24 s_mov_b32 s1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_alignbit_b32 v21, v22, v20, 9 v_lshrrev_b32_e32 v22, 9, v22 v_clz_i32_u32_e32 v24, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_min_u32_e32 v24, 32, v24 v_sub_nc_u32_e32 v26, 31, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_alignbit_b32 v20, v21, v20, v26 v_or_b32_e32 v21, v22, v25 v_add_nc_u32_e32 v23, v24, v23 v_lshrrev_b32_e32 v20, 9, v20 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v23, 0x3fc90fda, v21 :: v_dual_lshlrev_b32 v22, 23, v23 v_sub_nc_u32_e32 v20, v20, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v22, 0x3fc90fda, v21, -v23 v_add_nc_u32_e32 v20, 0x33000000, v20 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v22, 0x33a22168, v21 v_or_b32_e32 v20, s3, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v22, 0x3fc90fda, v20 v_add_f32_e32 v20, v23, v22 s_branch .LBB0_20 .LBB0_19: ; in Loop: Header=BB0_3 Depth=1 s_mov_b32 s1, -1 ; implicit-def: $sgpr2 ; implicit-def: $vgpr20 .LBB0_20: ; %Flow ; in Loop: Header=BB0_3 Depth=1 v_mov_b32_e32 v21, s2 s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_22 ; %bb.21: ; in Loop: Header=BB0_3 Depth=1 v_mul_f32_e64 v20, 0x3f22f983, |v13| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f32_e32 v21, v20 v_fma_f32 v20, 0xbfc90fda, v21, |v13| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v20, 0xb3a22168, v21 v_fmac_f32_e32 v20, 0xa7c234c4, v21 v_cvt_i32_f32_e32 v21, v21 .LBB0_22: ; %_ZL3cosf.exit396 ; in Loop: Header=BB0_3 Depth=1 s_clause 0x1 global_load_b32 v22, v12, s[16:17] global_load_b32 v23, v12, s[14:15] v_dual_mul_f32 v24, v18, v18 :: v_dual_and_b32 v25, 1, v19 v_dual_mul_f32 v26, v16, v16 :: v_dual_lshlrev_b32 v19, 30, v19 v_dual_mul_f32 v28, v14, v14 :: v_dual_and_b32 v27, 1, v17 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_fmaak_f32 v30, s26, v24, 0x3c0881c4 :: v_dual_lshlrev_b32 v17, 30, v17 v_dual_fmaak_f32 v32, s26, v26, 0x3c0881c4 :: v_dual_and_b32 v29, 1, v15 v_cmp_eq_u32_e32 vcc_lo, 0, v25 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_fmaak_f32 v34, s26, v28, 0x3c0881c4 :: v_dual_lshlrev_b32 v15, 30, v15 v_fmaak_f32 v30, v24, v30, 0xbe2aaa9d s_delay_alu instid0(VALU_DEP_4) v_fmaak_f32 v32, v26, v32, 0xbe2aaa9d v_fmaak_f32 v31, s29, v24, 0xbab64f3b v_and_b32_e32 v19, 0x80000000, v19 v_fmaak_f32 v34, v28, v34, 0xbe2aaa9d v_mul_f32_e32 v30, v24, v30 v_dual_mul_f32 v32, v26, v32 :: v_dual_fmaak_f32 v33, s29, v26, 0xbab64f3b v_fmaak_f32 v35, s29, v28, 0xbab64f3b v_xor_b32_e32 v19, s0, v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v18, v18, v30 v_dual_fmac_f32 v16, v16, v32 :: v_dual_fmaak_f32 v33, v26, v33, 0x3d2aabf7 v_and_b32_e32 v15, 0x80000000, v15 s_add_u32 s8, s8, 4 s_addc_u32 s9, s9, 0 s_add_u32 s10, s10, 4 v_fmaak_f32 v33, v26, v33, 0xbf000004 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 4 s_addc_u32 s13, s13, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f32 v26, v26, v33, 1.0 v_fmaak_f32 v31, v24, v31, 0x3d2aabf7 v_fmaak_f32 v31, v24, v31, 0xbf000004 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v24, v24, v31, 1.0 v_cndmask_b32_e32 v18, v24, v18, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v27 s_delay_alu instid0(VALU_DEP_2) v_xor_b32_e32 v18, v19, v18 v_dual_cndmask_b32 v16, v26, v16 :: v_dual_and_b32 v19, 1, v21 v_lshlrev_b32_e32 v21, 30, v21 v_dual_mul_f32 v34, v28, v34 :: v_dual_and_b32 v17, 0x80000000, v17 v_fmaak_f32 v35, v28, v35, 0x3d2aabf7 v_cmp_eq_u32_e32 vcc_lo, 0, v29 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_xor_b32_e32 v17, s0, v17 v_fmac_f32_e32 v14, v14, v34 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fmaak_f32 v30, v28, v35, 0xbf000004 v_cmp_eq_u32_e64 s0, 0, v19 v_xor_b32_e32 v16, v17, v16 v_xor_b32_e32 v17, v18, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f32 v24, v28, v30, 1.0 v_xor_b32_e32 v16, v16, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v14, -v14, v24, vcc_lo v_cmp_class_f32_e64 vcc_lo, v13, 0x1f8 v_xor_b32_e32 v13, v15, v14 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v15, 0x7fc00000, v16, vcc_lo v_dual_mul_f32 v16, v20, v20 :: v_dual_cndmask_b32 v13, 0x7fc00000, v13 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mul_f32_e32 v15, v15, v22 s_waitcnt vmcnt(0) v_fma_f32 v13, v13, v23, -v15 global_store_b32 v12, v13, s[20:21] s_clause 0x1 global_load_b32 v13, v12, s[16:17] global_load_b32 v15, v12, s[14:15] v_cndmask_b32_e32 v14, 0x7fc00000, v17, vcc_lo v_fmaak_f32 v17, s26, v16, 0x3c0881c4 s_add_u32 s14, s14, 4 s_addc_u32 s15, s15, 0 s_add_u32 s16, s16, 4 s_addc_u32 s17, s17, 0 v_fmaak_f32 v17, v16, v17, 0xbe2aaa9d v_fmaak_f32 v18, s29, v16, 0xbab64f3b s_add_u32 s18, s18, 4 s_addc_u32 s19, s19, 0 s_add_u32 s20, s20, 4 v_mul_f32_e32 v17, v16, v17 v_fmaak_f32 v18, v16, v18, 0x3d2aabf7 s_addc_u32 s21, s21, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v20, v20, v17 v_fmaak_f32 v18, v16, v18, 0xbf000004 v_and_b32_e32 v17, 0x80000000, v21 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v16, v16, v18, 1.0 v_cndmask_b32_e64 v16, -v20, v16, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_xor_b32_e32 v16, v17, v16 v_cndmask_b32_e32 v16, 0x7fc00000, v16, vcc_lo s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mul_f32_e32 v13, v13, v16 s_waitcnt vmcnt(0) v_fmac_f32_e32 v13, v14, v15 global_store_b32 v12, v13, s[22:23] s_add_u32 s22, s22, 4 s_addc_u32 s23, s23, 0 s_add_i32 s37, s37, -1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s37, 0 s_cbranch_scc1 .LBB0_3 .LBB0_23: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel modelCalc .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 368 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 60 .amdhsa_next_free_sgpr 41 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size modelCalc, .Lfunc_end0-modelCalc ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 16464 ; NumSgprs: 43 ; NumVgprs: 60 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 5 ; VGPRBlocks: 7 ; NumSGPRsForWavesPerEU: 43 ; NumVGPRsForWavesPerEU: 60 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .offset: 64 .size: 4 .value_kind: by_value - .offset: 68 .size: 4 .value_kind: by_value - .offset: 72 .size: 4 .value_kind: by_value - .offset: 76 .size: 4 .value_kind: by_value - .offset: 80 .size: 4 .value_kind: by_value - .offset: 84 .size: 4 .value_kind: by_value - .offset: 88 .size: 4 .value_kind: by_value - .offset: 92 .size: 4 .value_kind: by_value - .offset: 96 .size: 4 .value_kind: by_value - .offset: 100 .size: 4 .value_kind: by_value - .offset: 104 .size: 4 .value_kind: by_value - .offset: 112 .size: 4 .value_kind: hidden_block_count_x - .offset: 116 .size: 4 .value_kind: hidden_block_count_y - .offset: 120 .size: 4 .value_kind: hidden_block_count_z - .offset: 124 .size: 2 .value_kind: hidden_group_size_x - .offset: 126 .size: 2 .value_kind: hidden_group_size_y - .offset: 128 .size: 2 .value_kind: hidden_group_size_z - .offset: 130 .size: 2 .value_kind: hidden_remainder_x - .offset: 132 .size: 2 .value_kind: hidden_remainder_y - .offset: 134 .size: 2 .value_kind: hidden_remainder_z - .offset: 152 .size: 8 .value_kind: hidden_global_offset_x - .offset: 160 .size: 8 .value_kind: hidden_global_offset_y - .offset: 168 .size: 8 .value_kind: hidden_global_offset_z - .offset: 176 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 368 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: modelCalc .private_segment_fixed_size: 0 .sgpr_count: 43 .sgpr_spill_count: 0 .symbol: modelCalc.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 60 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
cc2e6c4df01dc778839fcfa8878f9fbaf1a2b4bd
__global__ void mapping(double *point_cloud, const double *img1, const double *img2, const double *img3, const double *img4, const double *T, const double *P1, const double *P2, const double *P3, const double *P4, const double *ratiox, const double *ratioy, const double *ratioz, const int *img_width, const int *img_height) { int idx = blockIdx.x*blockDim.x + threadIdx.x; int idy = blockIdx.y*blockDim.y + threadIdx.y; int idz = threadIdx.z; int width = gridDim.x*blockDim.x; int height = gridDim.y*blockDim.y; int index = idz*width*height + idx*height + idy; //grid to coordinates double mx = idx*ratiox[0]; double my = idy*ratioy[0]; double mz = idz*ratioz[0]; //world coordinates double x = T[0]*mx + T[4]*my + T[8]*mz + T[12]; double y = T[1]*mx + T[5]*my + T[9]*mz + T[13]; double z = mz; //image coordinates double u1 = P1[0]*x + P1[3]*y + P1[6]*z + P1[9]; double v1 = P1[1]*x + P1[4]*y + P1[7]*z + P1[10]; double norm1 = P1[2]*x + P1[5]*y + P1[8]*z + P1[11]; u1/=norm1; v1/=norm1; double u2 = P2[0]*x + P2[3]*y + P2[6]*z + P2[9]; double v2 = P2[1]*x + P2[4]*y + P2[7]*z + P2[10]; double norm2 = P2[2]*x + P2[5]*y + P2[8]*z + P2[11]; u2/=norm2; v2/=norm2; double u3 = P3[0]*x + P3[3]*y + P3[6]*z + P3[9]; double v3 = P3[1]*x + P3[4]*y + P3[7]*z + P3[10]; double norm3 = P3[2]*x + P3[5]*y + P3[8]*z + P3[11]; u3/=norm3; v3/=norm3; double u4 = P4[0]*x + P4[3]*y + P4[6]*z + P4[9]; double v4 = P4[1]*x + P4[4]*y + P4[7]*z + P4[10]; double norm4 = P4[2]*x + P4[5]*y + P4[8]*z + P4[11]; u4/=norm4; v4/=norm4; int u11 = (u1); int u22 = (u2); int u33 = (u3); int u44 = (u4); int v11 = (v1); int v22 = (v2); int v33 = (v3); int v44 = (v4); int final_width = img_width[0]; int final_height = img_height[0]; int seen_record[4] = {0}; //decide the point cloud if((u11>0)&&(u11<final_width)&&(v11>0)&&(v11<final_height)) seen_record[0] = 1; if((u22>0)&&(u22<final_width)&&(v22>0)&&(v22<final_height)) seen_record[1] = 1; if((u33>0)&&(u33<final_width)&&(v33>0)&&(v33<final_height)) seen_record[2] = 1; if((u44>0)&&(u44<final_width)&&(v44>0)&&(v44<final_height)) seen_record[3] = 1; int sum = 0; if((seen_record[0]==1)&&(img1[u11*final_height+v11]!=0)) ++sum; if((seen_record[1]==1)&&(img2[u22*final_height+v22]!=0)) ++sum; if((seen_record[2]==1)&&(img3[u33*final_height+v33]!=0)) ++sum; if((seen_record[3]==1)&&(img4[u44*final_height+v44]!=0)) ++sum; point_cloud[index] = 0; if(sum>=3) { point_cloud[index] = 1; } }
.file "tmpxft_00346ebc_00000000-6_visual_hull_test.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z68__device_stub__Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_PdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .type _Z68__device_stub__Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_PdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, @function _Z68__device_stub__Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_PdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_: .LFB2032: .cfi_startproc endbr64 subq $328, %rsp .cfi_def_cfa_offset 336 movq 336(%rsp), %rax movq %rdi, 120(%rsp) leaq 144(%rsp), %rdi movq %rsi, 112(%rsp) leaq 156(%rsp), %rsi movq %rax, 72(%rsp) movq 344(%rsp), %rax movq %rdx, 104(%rsp) leaq 128(%rsp), %rdx movq %rax, 64(%rsp) movq 352(%rsp), %rax movq %rcx, 96(%rsp) leaq 136(%rsp), %rcx movq %rax, 56(%rsp) movq 360(%rsp), %rax movq %r8, 88(%rsp) movq %rax, 48(%rsp) movq 368(%rsp), %rax movq %r9, 80(%rsp) movq %rax, 40(%rsp) movq 376(%rsp), %rax movq %rax, 32(%rsp) movq 384(%rsp), %rax movq %rax, 24(%rsp) movq 392(%rsp), %rax movq %rax, 16(%rsp) movq 400(%rsp), %rax movq %rax, 8(%rsp) movq %fs:40, %rax movq %rax, 312(%rsp) xorl %eax, %eax leaq 120(%rsp), %rax movq %rax, 192(%rsp) leaq 112(%rsp), %rax movq %rax, 200(%rsp) leaq 104(%rsp), %rax movq %rax, 208(%rsp) leaq 96(%rsp), %rax movq %rax, 216(%rsp) leaq 88(%rsp), %rax movq %rax, 224(%rsp) leaq 80(%rsp), %rax movq %rax, 232(%rsp) leaq 72(%rsp), %rax movq %rax, 240(%rsp) leaq 64(%rsp), %rax movq %rax, 248(%rsp) leaq 56(%rsp), %rax movq %rax, 256(%rsp) leaq 48(%rsp), %rax movq %rax, 264(%rsp) leaq 40(%rsp), %rax movq %rax, 272(%rsp) leaq 32(%rsp), %rax movq %rax, 280(%rsp) leaq 24(%rsp), %rax movq %rax, 288(%rsp) leaq 16(%rsp), %rax movq %rax, 296(%rsp) leaq 8(%rsp), %rax movq %rax, 304(%rsp) movabsq $4294967297, %rax movq %rax, 144(%rsp) movl $1, 152(%rsp) movq %rax, 156(%rsp) movl $1, 164(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 136(%rsp) .cfi_def_cfa_offset 344 leaq _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_(%rip), %rdi pushq 136(%rsp) .cfi_def_cfa_offset 352 movq 172(%rsp), %rcx movl 180(%rsp), %r8d movq 160(%rsp), %rsi movl 168(%rsp), %edx leaq 208(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 344 popq %rdx .cfi_def_cfa_offset 336 .L2: movq 312(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $328, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z68__device_stub__Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_PdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, .-_Z68__device_stub__Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_PdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .globl _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .type _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, @function _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_: .LFB2033: .cfi_startproc endbr64 jmp _Z68__device_stub__Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_PdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .cfi_endproc .LFE2033: .size _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, .-_Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x1b8] ; /* 0x00006e00ff0a7624 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x1bc] ; /* 0x00006f00ff0b7624 */ /* 0x000fcc00078e00ff */ /*0040*/ LDG.E.64 R10, [R10.64] ; /* 0x000000080a0a7981 */ /* 0x000ea2000c1e1b00 */ /*0050*/ IMAD.MOV.U32 R18, RZ, RZ, c[0x0][0x188] ; /* 0x00006200ff127624 */ /* 0x000fe400078e00ff */ /*0060*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x0][0x18c] ; /* 0x00006300ff137624 */ /* 0x000fca00078e00ff */ /*0070*/ LDG.E.64 R8, [R18.64+0x20] ; /* 0x0000200812087981 */ /* 0x0004e8000c1e1b00 */ /*0080*/ LDG.E.64 R4, [R18.64+0x28] ; /* 0x0000280812047981 */ /* 0x000522000c1e1b00 */ /*0090*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x1b0] ; /* 0x00006c00ff067624 */ /* 0x000fe200078e00ff */ /*00a0*/ MOV R7, c[0x0][0x1b4] ; /* 0x00006d0000077a02 */ /* 0x000fe40000000f00 */ /*00b0*/ LDG.E.64 R40, [R18.64] ; /* 0x0000000812287981 */ /* 0x000568000c1e1b00 */ /*00c0*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000806067981 */ /* 0x000f68000c1e1b00 */ /*00d0*/ LDG.E.64 R42, [R18.64+0x8] ; /* 0x00000808122a7981 */ /* 0x000562000c1e1b00 */ /*00e0*/ IMAD.MOV.U32 R24, RZ, RZ, c[0x0][0x1c0] ; /* 0x00007000ff187624 */ /* 0x000fc400078e00ff */ /*00f0*/ IMAD.MOV.U32 R25, RZ, RZ, c[0x0][0x1c4] ; /* 0x00007100ff197624 */ /* 0x000fe200078e00ff */ /*0100*/ LDG.E.64 R14, [R18.64+0x48] ; /* 0x00004808120e7981 */ /* 0x000562000c1e1b00 */ /*0110*/ IMAD.MOV.U32 R44, RZ, RZ, c[0x0][0x190] ; /* 0x00006400ff2c7624 */ /* 0x000fe400078e00ff */ /*0120*/ IMAD.MOV.U32 R45, RZ, RZ, c[0x0][0x194] ; /* 0x00006500ff2d7624 */ /* 0x000fe200078e00ff */ /*0130*/ LDG.E.64 R38, [R18.64+0x40] ; /* 0x0000400812267981 */ /* 0x000568000c1e1b00 */ /*0140*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000f68000c1e1b00 */ /*0150*/ LDG.E.64 R36, [R18.64+0x68] ; /* 0x0000680812247981 */ /* 0x000568000c1e1b00 */ /*0160*/ LDG.E.64 R22, [R18.64+0x60] ; /* 0x0000600812167981 */ /* 0x000568000c1e1b00 */ /*0170*/ LDG.E.64 R2, [R44.64+0x28] ; /* 0x000028082c027981 */ /* 0x000f68000c1e1b00 */ /*0180*/ S2R R16, SR_CTAID.Y ; /* 0x0000000000107919 */ /* 0x000e280000002600 */ /*0190*/ S2R R13, SR_TID.Y ; /* 0x00000000000d7919 */ /* 0x000e280000002200 */ /*01a0*/ LDG.E.64 R34, [R44.64+0x10] ; /* 0x000010082c227981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R32, [R44.64+0x40] ; /* 0x000040082c207981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R30, [R44.64+0x58] ; /* 0x000058082c1e7981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ S2R R17, SR_CTAID.X ; /* 0x0000000000117919 */ /* 0x000e680000002500 */ /*01e0*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e620000002100 */ /*01f0*/ IMAD R16, R16, c[0x0][0x4], R13 ; /* 0x0000010010107a24 */ /* 0x001fc600078e020d */ /*0200*/ LDG.E.64 R20, [R44.64] ; /* 0x000000082c147981 */ /* 0x000f62000c1e1b00 */ /*0210*/ I2F.F64 R12, R16 ; /* 0x00000010000c7312 */ /* 0x000ea60000201c00 */ /*0220*/ LDG.E.64 R26, [R44.64+0x30] ; /* 0x000030082c1a7981 */ /* 0x000f68000c1e1b00 */ /*0230*/ LDG.E.64 R28, [R44.64+0x48] ; /* 0x000048082c1c7981 */ /* 0x000f62000c1e1b00 */ /*0240*/ IMAD R17, R17, c[0x0][0x0], R0 ; /* 0x0000000011117a24 */ /* 0x002fe200078e0200 */ /*0250*/ DMUL R18, R12, R10 ; /* 0x0000000a0c127228 */ /* 0x0040c40000000000 */ /*0260*/ LDG.E.64 R10, [R44.64+0x18] ; /* 0x000018082c0a7981 */ /* 0x001ea2000c1e1b00 */ /*0270*/ I2F.F64 R12, R17 ; /* 0x00000011000c7312 */ /* 0x000f660000201c00 */ /*0280*/ DMUL R8, R18, R8 ; /* 0x0000000812087228 */ /* 0x008fc80000000000 */ /*0290*/ DMUL R4, R18, R4 ; /* 0x0000000412047228 */ /* 0x0101e40000000000 */ /*02a0*/ S2R R18, SR_TID.Z ; /* 0x0000000000127919 */ /* 0x001e240000002300 */ /*02b0*/ DMUL R6, R12, R6 ; /* 0x000000060c067228 */ /* 0x0202e40000000000 */ /*02c0*/ LDG.E.64 R12, [R44.64+0x50] ; /* 0x000050082c0c7981 */ /* 0x002f28000c1e1b00 */ /*02d0*/ DFMA R40, R6, R40, R8 ; /* 0x000000280628722b */ /* 0x008fc80000000008 */ /*02e0*/ DFMA R42, R6, R42, R4 ; /* 0x0000002a062a722b */ /* 0x0003e40000000004 */ /*02f0*/ LDG.E.64 R4, [R44.64+0x20] ; /* 0x000020082c047981 */ /* 0x002ee8000c1e1b00 */ /*0300*/ LDG.E.64 R6, [R44.64+0x8] ; /* 0x000008082c067981 */ /* 0x000f62000c1e1b00 */ /*0310*/ I2F.F64 R8, R18 ; /* 0x0000001200087312 */ /* 0x001e240000201c00 */ /*0320*/ DMUL R24, R8, R24 ; /* 0x0000001808187228 */ /* 0x0010640000000000 */ /*0330*/ LDG.E.64 R8, [R44.64+0x38] ; /* 0x000038082c087981 */ /* 0x001f28000c1e1b00 */ /*0340*/ DFMA R14, R24, R14, R42 ; /* 0x0000000e180e722b */ /* 0x002e08000000002a */ /*0350*/ DFMA R38, R24, R38, R40 ; /* 0x000000261826722b */ /* 0x000e480000000028 */ /*0360*/ DADD R14, R14, R36 ; /* 0x000000000e0e7229 */ /* 0x001e080000000024 */ /*0370*/ DADD R22, R38, R22 ; /* 0x0000000026167229 */ /* 0x002fc80000000016 */ /*0380*/ DMUL R2, R14, R2 ; /* 0x000000020e027228 */ /* 0x001e0c0000000000 */ /*0390*/ DFMA R2, R22, R34, R2 ; /* 0x000000221602722b */ /* 0x001e0c0000000002 */ /*03a0*/ DFMA R2, R24, R32, R2 ; /* 0x000000201802722b */ /* 0x001e0c0000000002 */ /*03b0*/ DADD R2, R2, R30 ; /* 0x0000000002027229 */ /* 0x001e0c000000001e */ /*03c0*/ MUFU.RCP64H R31, R3 ; /* 0x00000003001f7308 */ /* 0x001e220000001800 */ /*03d0*/ IMAD.MOV.U32 R30, RZ, RZ, 0x1 ; /* 0x00000001ff1e7424 */ /* 0x000fcc00078e00ff */ /*03e0*/ DFMA R32, -R2, R30, 1 ; /* 0x3ff000000220742b */ /* 0x001e0c000000011e */ /*03f0*/ DFMA R32, R32, R32, R32 ; /* 0x000000202020722b */ /* 0x001e0c0000000020 */ /*0400*/ DFMA R32, R30, R32, R30 ; /* 0x000000201e20722b */ /* 0x001fe2000000001e */ /*0410*/ BSSY B0, 0x5a0 ; /* 0x0000018000007945 */ /* 0x000fe60003800000 */ /*0420*/ DMUL R10, R14, R10 ; /* 0x0000000a0e0a7228 */ /* 0x004e0c0000000000 */ /*0430*/ DFMA R10, R22, R20, R10 ; /* 0x00000014160a722b */ /* 0x001e08000000000a */ /*0440*/ DFMA R20, -R2, R32, 1 ; /* 0x3ff000000214742b */ /* 0x000e480000000120 */ /*0450*/ DFMA R10, R24, R26, R10 ; /* 0x0000001a180a722b */ /* 0x001e08000000000a */ /*0460*/ DFMA R20, R32, R20, R32 ; /* 0x000000142014722b */ /* 0x002fc80000000020 */ /*0470*/ DADD R30, R10, R28 ; /* 0x000000000a1e7229 */ /* 0x001e0c000000001c */ /*0480*/ DMUL R10, R30, R20 ; /* 0x000000141e0a7228 */ /* 0x001e0c0000000000 */ /*0490*/ DFMA R26, -R2, R10, R30 ; /* 0x0000000a021a722b */ /* 0x001e0c000000011e */ /*04a0*/ DFMA R10, R20, R26, R10 ; /* 0x0000001a140a722b */ /* 0x001e08000000000a */ /*04b0*/ DMUL R4, R14, R4 ; /* 0x000000040e047228 */ /* 0x008f620000000000 */ /*04c0*/ FSETP.GEU.AND P1, PT, |R31|, 6.5827683646048100446e-37, PT ; /* 0x036000001f00780b */ /* 0x000fca0003f2e200 */ /*04d0*/ FFMA R0, RZ, R3, R11 ; /* 0x00000003ff007223 */ /* 0x001fe2000000000b */ /*04e0*/ DFMA R4, R22, R6, R4 ; /* 0x000000061604722b */ /* 0x020f080000000004 */ /*04f0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fe40003f04200 */ /*0500*/ DFMA R4, R24, R8, R4 ; /* 0x000000081804722b */ /* 0x010e0c0000000004 */ /*0510*/ DADD R4, R4, R12 ; /* 0x0000000004047229 */ /* 0x00104a000000000c */ /*0520*/ @P0 BRA P1, 0x590 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*0530*/ MOV R28, R2 ; /* 0x00000002001c7202 */ /* 0x003fe20000000f00 */ /*0540*/ IMAD.MOV.U32 R29, RZ, RZ, R3 ; /* 0x000000ffff1d7224 */ /* 0x000fe200078e0003 */ /*0550*/ MOV R0, 0x570 ; /* 0x0000057000007802 */ /* 0x000fe40000000f00 */ /*0560*/ CALL.REL.NOINC 0x18f0 ; /* 0x0000138000007944 */ /* 0x000fea0003c00000 */ /*0570*/ IMAD.MOV.U32 R10, RZ, RZ, R42 ; /* 0x000000ffff0a7224 */ /* 0x000fe400078e002a */ /*0580*/ IMAD.MOV.U32 R11, RZ, RZ, R43 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e002b */ /*0590*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x003fea0003800000 */ /*05a0*/ MUFU.RCP64H R7, R3 ; /* 0x0000000300077308 */ /* 0x000e220000001800 */ /*05b0*/ IMAD.MOV.U32 R6, RZ, RZ, 0x1 ; /* 0x00000001ff067424 */ /* 0x000fe200078e00ff */ /*05c0*/ FSETP.GEU.AND P1, PT, |R5|, 6.5827683646048100446e-37, PT ; /* 0x036000000500780b */ /* 0x000fe20003f2e200 */ /*05d0*/ BSSY B0, 0x720 ; /* 0x0000014000007945 */ /* 0x000fe80003800000 */ /*05e0*/ DFMA R8, -R2, R6, 1 ; /* 0x3ff000000208742b */ /* 0x001e0c0000000106 */ /*05f0*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */ /* 0x001e0c0000000008 */ /*0600*/ DFMA R8, R6, R8, R6 ; /* 0x000000080608722b */ /* 0x001e0c0000000006 */ /*0610*/ DFMA R6, -R2, R8, 1 ; /* 0x3ff000000206742b */ /* 0x001e0c0000000108 */ /*0620*/ DFMA R12, R8, R6, R8 ; /* 0x00000006080c722b */ /* 0x001e0c0000000008 */ /*0630*/ DMUL R8, R4, R12 ; /* 0x0000000c04087228 */ /* 0x001e0c0000000000 */ /*0640*/ DFMA R6, -R2, R8, R4 ; /* 0x000000080206722b */ /* 0x001e0c0000000104 */ /*0650*/ DFMA R8, R12, R6, R8 ; /* 0x000000060c08722b */ /* 0x001e140000000008 */ /*0660*/ FFMA R0, RZ, R3, R9 ; /* 0x00000003ff007223 */ /* 0x001fca0000000009 */ /*0670*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0680*/ @P0 BRA P1, 0x710 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*0690*/ IMAD.MOV.U32 R30, RZ, RZ, R4 ; /* 0x000000ffff1e7224 */ /* 0x000fe200078e0004 */ /*06a0*/ MOV R31, R5 ; /* 0x00000005001f7202 */ /* 0x000fe20000000f00 */ /*06b0*/ IMAD.MOV.U32 R28, RZ, RZ, R2 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e0002 */ /*06c0*/ MOV R0, 0x6f0 ; /* 0x000006f000007802 */ /* 0x000fe20000000f00 */ /*06d0*/ IMAD.MOV.U32 R29, RZ, RZ, R3 ; /* 0x000000ffff1d7224 */ /* 0x000fe400078e0003 */ /*06e0*/ CALL.REL.NOINC 0x18f0 ; /* 0x0000120000007944 */ /* 0x000fea0003c00000 */ /*06f0*/ IMAD.MOV.U32 R8, RZ, RZ, R42 ; /* 0x000000ffff087224 */ /* 0x000fe400078e002a */ /*0700*/ IMAD.MOV.U32 R9, RZ, RZ, R43 ; /* 0x000000ffff097224 */ /* 0x000fe400078e002b */ /*0710*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0720*/ IMAD.MOV.U32 R36, RZ, RZ, c[0x0][0x198] ; /* 0x00006600ff247624 */ /* 0x000fe200078e00ff */ /*0730*/ MOV R37, c[0x0][0x19c] ; /* 0x0000670000257a02 */ /* 0x000fca0000000f00 */ /*0740*/ LDG.E.64 R40, [R36.64+0x28] ; /* 0x0000280824287981 */ /* 0x000ea8000c1e1b00 */ /*0750*/ LDG.E.64 R38, [R36.64+0x10] ; /* 0x0000100824267981 */ /* 0x000ee8000c1e1b00 */ /*0760*/ LDG.E.64 R34, [R36.64+0x40] ; /* 0x0000400824227981 */ /* 0x000f28000c1e1b00 */ /*0770*/ LDG.E.64 R2, [R36.64+0x58] ; /* 0x0000580824027981 */ /* 0x000f68000c1e1b00 */ /*0780*/ LDG.E.64 R32, [R36.64+0x18] ; /* 0x0000180824207981 */ /* 0x000f68000c1e1b00 */ /*0790*/ LDG.E.64 R30, [R36.64] ; /* 0x00000008241e7981 */ /* 0x000f68000c1e1b00 */ /*07a0*/ LDG.E.64 R28, [R36.64+0x30] ; /* 0x00003008241c7981 */ /* 0x000f68000c1e1b00 */ /*07b0*/ LDG.E.64 R6, [R36.64+0x48] ; /* 0x0000480824067981 */ /* 0x000f68000c1e1b00 */ /*07c0*/ LDG.E.64 R4, [R36.64+0x20] ; /* 0x0000200824047981 */ /* 0x000f68000c1e1b00 */ /*07d0*/ LDG.E.64 R20, [R36.64+0x8] ; /* 0x0000080824147981 */ /* 0x000f68000c1e1b00 */ /*07e0*/ LDG.E.64 R12, [R36.64+0x38] ; /* 0x00003808240c7981 */ /* 0x000f68000c1e1b00 */ /*07f0*/ LDG.E.64 R26, [R36.64+0x50] ; /* 0x00005008241a7981 */ /* 0x000f62000c1e1b00 */ /*0800*/ BSSY B0, 0xa20 ; /* 0x0000021000007945 */ /* 0x000fe20003800000 */ /*0810*/ DMUL R40, R14, R40 ; /* 0x000000280e287228 */ /* 0x004ecc0000000000 */ /*0820*/ DFMA R38, R22, R38, R40 ; /* 0x000000261626722b */ /* 0x008f0c0000000028 */ /*0830*/ DFMA R34, R24, R34, R38 ; /* 0x000000221822722b */ /* 0x010e080000000026 */ /*0840*/ DMUL R32, R14, R32 ; /* 0x000000200e207228 */ /* 0x020e480000000000 */ /*0850*/ DADD R2, R34, R2 ; /* 0x0000000022027229 */ /* 0x0010a40000000002 */ /*0860*/ IMAD.MOV.U32 R34, RZ, RZ, 0x1 ; /* 0x00000001ff227424 */ /* 0x001fe400078e00ff */ /*0870*/ DFMA R30, R22, R30, R32 ; /* 0x0000001e161e722b */ /* 0x002e240000000020 */ /*0880*/ MUFU.RCP64H R35, R3 ; /* 0x0000000300237308 */ /* 0x004e680000001800 */ /*0890*/ DFMA R30, R24, R28, R30 ; /* 0x0000001c181e722b */ /* 0x001e08000000001e */ /*08a0*/ DMUL R4, R14, R4 ; /* 0x000000040e047228 */ /* 0x000e880000000000 */ /*08b0*/ DADD R30, R30, R6 ; /* 0x000000001e1e7229 */ /* 0x001e080000000006 */ /*08c0*/ DFMA R38, -R2, R34, 1 ; /* 0x3ff000000226742b */ /* 0x002e480000000122 */ /*08d0*/ DFMA R4, R22, R20, R4 ; /* 0x000000141604722b */ /* 0x004ea40000000004 */ /*08e0*/ FSETP.GEU.AND P1, PT, |R31|, 6.5827683646048100446e-37, PT ; /* 0x036000001f00780b */ /* 0x001fe40003f2e200 */ /*08f0*/ DFMA R38, R38, R38, R38 ; /* 0x000000262626722b */ /* 0x002e080000000026 */ /*0900*/ DFMA R12, R24, R12, R4 ; /* 0x0000000c180c722b */ /* 0x004e480000000004 */ /*0910*/ DFMA R38, R34, R38, R34 ; /* 0x000000262226722b */ /* 0x001e080000000022 */ /*0920*/ DADD R12, R12, R26 ; /* 0x000000000c0c7229 */ /* 0x002fc8000000001a */ /*0930*/ DFMA R28, -R2, R38, 1 ; /* 0x3ff00000021c742b */ /* 0x001e0c0000000126 */ /*0940*/ DFMA R28, R38, R28, R38 ; /* 0x0000001c261c722b */ /* 0x001e0c0000000026 */ /*0950*/ DMUL R6, R30, R28 ; /* 0x0000001c1e067228 */ /* 0x001e0c0000000000 */ /*0960*/ DFMA R32, -R2, R6, R30 ; /* 0x000000060220722b */ /* 0x001e0c000000011e */ /*0970*/ DFMA R6, R28, R32, R6 ; /* 0x000000201c06722b */ /* 0x001e140000000006 */ /*0980*/ FFMA R0, RZ, R3, R7 ; /* 0x00000003ff007223 */ /* 0x001fca0000000007 */ /*0990*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*09a0*/ @P0 BRA P1, 0xa10 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*09b0*/ IMAD.MOV.U32 R28, RZ, RZ, R2 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e0002 */ /*09c0*/ MOV R0, 0x9f0 ; /* 0x000009f000007802 */ /* 0x000fe20000000f00 */ /*09d0*/ IMAD.MOV.U32 R29, RZ, RZ, R3 ; /* 0x000000ffff1d7224 */ /* 0x000fe400078e0003 */ /*09e0*/ CALL.REL.NOINC 0x18f0 ; /* 0x00000f0000007944 */ /* 0x000fea0003c00000 */ /*09f0*/ IMAD.MOV.U32 R6, RZ, RZ, R42 ; /* 0x000000ffff067224 */ /* 0x000fe400078e002a */ /*0a00*/ IMAD.MOV.U32 R7, RZ, RZ, R43 ; /* 0x000000ffff077224 */ /* 0x000fe400078e002b */ /*0a10*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0a20*/ MUFU.RCP64H R5, R3 ; /* 0x0000000300057308 */ /* 0x000e220000001800 */ /*0a30*/ MOV R4, 0x1 ; /* 0x0000000100047802 */ /* 0x000fe20000000f00 */ /*0a40*/ BSSY B0, 0xba0 ; /* 0x0000015000007945 */ /* 0x000fe20003800000 */ /*0a50*/ FSETP.GEU.AND P1, PT, |R13|, 6.5827683646048100446e-37, PT ; /* 0x036000000d00780b */ /* 0x000fc80003f2e200 */ /*0a60*/ DFMA R20, -R2, R4, 1 ; /* 0x3ff000000214742b */ /* 0x001e0c0000000104 */ /*0a70*/ DFMA R20, R20, R20, R20 ; /* 0x000000141414722b */ /* 0x001e0c0000000014 */ /*0a80*/ DFMA R20, R4, R20, R4 ; /* 0x000000140414722b */ /* 0x001e0c0000000004 */ /*0a90*/ DFMA R4, -R2, R20, 1 ; /* 0x3ff000000204742b */ /* 0x001e0c0000000114 */ /*0aa0*/ DFMA R26, R20, R4, R20 ; /* 0x00000004141a722b */ /* 0x001e0c0000000014 */ /*0ab0*/ DMUL R4, R12, R26 ; /* 0x0000001a0c047228 */ /* 0x001e0c0000000000 */ /*0ac0*/ DFMA R20, -R2, R4, R12 ; /* 0x000000040214722b */ /* 0x001e0c000000010c */ /*0ad0*/ DFMA R4, R26, R20, R4 ; /* 0x000000141a04722b */ /* 0x001e140000000004 */ /*0ae0*/ FFMA R0, RZ, R3, R5 ; /* 0x00000003ff007223 */ /* 0x001fca0000000005 */ /*0af0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0b00*/ @P0 BRA P1, 0xb90 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*0b10*/ IMAD.MOV.U32 R30, RZ, RZ, R12 ; /* 0x000000ffff1e7224 */ /* 0x000fe200078e000c */ /*0b20*/ MOV R0, 0xb70 ; /* 0x00000b7000007802 */ /* 0x000fe20000000f00 */ /*0b30*/ IMAD.MOV.U32 R31, RZ, RZ, R13 ; /* 0x000000ffff1f7224 */ /* 0x000fe400078e000d */ /*0b40*/ IMAD.MOV.U32 R28, RZ, RZ, R2 ; /* 0x000000ffff1c7224 */ /* 0x000fe400078e0002 */ /*0b50*/ IMAD.MOV.U32 R29, RZ, RZ, R3 ; /* 0x000000ffff1d7224 */ /* 0x000fe400078e0003 */ /*0b60*/ CALL.REL.NOINC 0x18f0 ; /* 0x00000d8000007944 */ /* 0x000fea0003c00000 */ /*0b70*/ IMAD.MOV.U32 R4, RZ, RZ, R42 ; /* 0x000000ffff047224 */ /* 0x000fe200078e002a */ /*0b80*/ MOV R5, R43 ; /* 0x0000002b00057202 */ /* 0x000fe40000000f00 */ /*0b90*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0ba0*/ IMAD.MOV.U32 R44, RZ, RZ, c[0x0][0x1a0] ; /* 0x00006800ff2c7624 */ /* 0x000fe400078e00ff */ /*0bb0*/ IMAD.MOV.U32 R45, RZ, RZ, c[0x0][0x1a4] ; /* 0x00006900ff2d7624 */ /* 0x000fca00078e00ff */ /*0bc0*/ LDG.E.64 R34, [R44.64+0x28] ; /* 0x000028082c227981 */ /* 0x000ea8000c1e1b00 */ /*0bd0*/ LDG.E.64 R38, [R44.64+0x10] ; /* 0x000010082c267981 */ /* 0x000ee8000c1e1b00 */ /*0be0*/ LDG.E.64 R40, [R44.64+0x40] ; /* 0x000040082c287981 */ /* 0x000f28000c1e1b00 */ /*0bf0*/ LDG.E.64 R42, [R44.64+0x58] ; /* 0x000058082c2a7981 */ /* 0x000f68000c1e1b00 */ /*0c00*/ LDG.E.64 R2, [R44.64+0x18] ; /* 0x000018082c027981 */ /* 0x000f68000c1e1b00 */ /*0c10*/ LDG.E.64 R28, [R44.64] ; /* 0x000000082c1c7981 */ /* 0x000f68000c1e1b00 */ /*0c20*/ LDG.E.64 R30, [R44.64+0x30] ; /* 0x000030082c1e7981 */ /* 0x000f68000c1e1b00 */ /*0c30*/ LDG.E.64 R32, [R44.64+0x48] ; /* 0x000048082c207981 */ /* 0x000f68000c1e1b00 */ /*0c40*/ LDG.E.64 R12, [R44.64+0x20] ; /* 0x000020082c0c7981 */ /* 0x000f68000c1e1b00 */ /*0c50*/ LDG.E.64 R20, [R44.64+0x8] ; /* 0x000008082c147981 */ /* 0x000f68000c1e1b00 */ /*0c60*/ LDG.E.64 R26, [R44.64+0x38] ; /* 0x000038082c1a7981 */ /* 0x000f68000c1e1b00 */ /*0c70*/ LDG.E.64 R36, [R44.64+0x50] ; /* 0x000050082c247981 */ /* 0x000f62000c1e1b00 */ /*0c80*/ BSSY B0, 0xea0 ; /* 0x0000021000007945 */ /* 0x000fe20003800000 */ /*0c90*/ DMUL R34, R14, R34 ; /* 0x000000220e227228 */ /* 0x004ecc0000000000 */ /*0ca0*/ DFMA R34, R22, R38, R34 ; /* 0x000000261622722b */ /* 0x008f0c0000000022 */ /*0cb0*/ DFMA R34, R24, R40, R34 ; /* 0x000000281822722b */ /* 0x010e080000000022 */ /*0cc0*/ DMUL R2, R14, R2 ; /* 0x000000020e027228 */ /* 0x020e480000000000 */ /*0cd0*/ DADD R38, R34, R42 ; /* 0x0000000022267229 */ /* 0x0010a4000000002a */ /*0ce0*/ IMAD.MOV.U32 R34, RZ, RZ, 0x1 ; /* 0x00000001ff227424 */ /* 0x001fe400078e00ff */ /*0cf0*/ DFMA R2, R22, R28, R2 ; /* 0x0000001c1602722b */ /* 0x002e240000000002 */ /*0d00*/ MUFU.RCP64H R35, R39 ; /* 0x0000002700237308 */ /* 0x004e680000001800 */ /*0d10*/ DFMA R30, R24, R30, R2 ; /* 0x0000001e181e722b */ /* 0x001e080000000002 */ /*0d20*/ DMUL R12, R14, R12 ; /* 0x0000000c0e0c7228 */ /* 0x000e880000000000 */ /*0d30*/ DADD R30, R30, R32 ; /* 0x000000001e1e7229 */ /* 0x001e080000000020 */ /*0d40*/ DFMA R40, -R38, R34, 1 ; /* 0x3ff000002628742b */ /* 0x002e480000000122 */ /*0d50*/ DFMA R12, R22, R20, R12 ; /* 0x00000014160c722b */ /* 0x004ea4000000000c */ /*0d60*/ FSETP.GEU.AND P1, PT, |R31|, 6.5827683646048100446e-37, PT ; /* 0x036000001f00780b */ /* 0x001fe40003f2e200 */ /*0d70*/ DFMA R40, R40, R40, R40 ; /* 0x000000282828722b */ /* 0x002e080000000028 */ /*0d80*/ DFMA R12, R24, R26, R12 ; /* 0x0000001a180c722b */ /* 0x004e48000000000c */ /*0d90*/ DFMA R40, R34, R40, R34 ; /* 0x000000282228722b */ /* 0x001e080000000022 */ /*0da0*/ DADD R36, R12, R36 ; /* 0x000000000c247229 */ /* 0x002fc80000000024 */ /*0db0*/ DFMA R2, -R38, R40, 1 ; /* 0x3ff000002602742b */ /* 0x001e0c0000000128 */ /*0dc0*/ DFMA R2, R40, R2, R40 ; /* 0x000000022802722b */ /* 0x001e0c0000000028 */ /*0dd0*/ DMUL R28, R30, R2 ; /* 0x000000021e1c7228 */ /* 0x001e0c0000000000 */ /*0de0*/ DFMA R32, -R38, R28, R30 ; /* 0x0000001c2620722b */ /* 0x001e0c000000011e */ /*0df0*/ DFMA R2, R2, R32, R28 ; /* 0x000000200202722b */ /* 0x001e14000000001c */ /*0e00*/ FFMA R0, RZ, R39, R3 ; /* 0x00000027ff007223 */ /* 0x001fca0000000003 */ /*0e10*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0e20*/ @P0 BRA P1, 0xe90 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*0e30*/ IMAD.MOV.U32 R28, RZ, RZ, R38 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e0026 */ /*0e40*/ MOV R0, 0xe70 ; /* 0x00000e7000007802 */ /* 0x000fe20000000f00 */ /*0e50*/ IMAD.MOV.U32 R29, RZ, RZ, R39 ; /* 0x000000ffff1d7224 */ /* 0x000fe400078e0027 */ /*0e60*/ CALL.REL.NOINC 0x18f0 ; /* 0x00000a8000007944 */ /* 0x000fea0003c00000 */ /*0e70*/ MOV R2, R42 ; /* 0x0000002a00027202 */ /* 0x000fe20000000f00 */ /*0e80*/ IMAD.MOV.U32 R3, RZ, RZ, R43 ; /* 0x000000ffff037224 */ /* 0x000fe400078e002b */ /*0e90*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0ea0*/ MUFU.RCP64H R13, R39 ; /* 0x00000027000d7308 */ /* 0x000e220000001800 */ /*0eb0*/ IMAD.MOV.U32 R12, RZ, RZ, 0x1 ; /* 0x00000001ff0c7424 */ /* 0x000fe200078e00ff */ /*0ec0*/ FSETP.GEU.AND P1, PT, |R37|, 6.5827683646048100446e-37, PT ; /* 0x036000002500780b */ /* 0x000fe20003f2e200 */ /*0ed0*/ BSSY B0, 0x1020 ; /* 0x0000014000007945 */ /* 0x000fe80003800000 */ /*0ee0*/ DFMA R20, -R38, R12, 1 ; /* 0x3ff000002614742b */ /* 0x001e0c000000010c */ /*0ef0*/ DFMA R20, R20, R20, R20 ; /* 0x000000141414722b */ /* 0x001e0c0000000014 */ /*0f00*/ DFMA R20, R12, R20, R12 ; /* 0x000000140c14722b */ /* 0x001e0c000000000c */ /*0f10*/ DFMA R12, -R38, R20, 1 ; /* 0x3ff00000260c742b */ /* 0x001e0c0000000114 */ /*0f20*/ DFMA R26, R20, R12, R20 ; /* 0x0000000c141a722b */ /* 0x001e0c0000000014 */ /*0f30*/ DMUL R12, R36, R26 ; /* 0x0000001a240c7228 */ /* 0x001e0c0000000000 */ /*0f40*/ DFMA R20, -R38, R12, R36 ; /* 0x0000000c2614722b */ /* 0x001e0c0000000124 */ /*0f50*/ DFMA R12, R26, R20, R12 ; /* 0x000000141a0c722b */ /* 0x001e14000000000c */ /*0f60*/ FFMA R0, RZ, R39, R13 ; /* 0x00000027ff007223 */ /* 0x001fca000000000d */ /*0f70*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0f80*/ @P0 BRA P1, 0x1010 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*0f90*/ IMAD.MOV.U32 R30, RZ, RZ, R36 ; /* 0x000000ffff1e7224 */ /* 0x000fe200078e0024 */ /*0fa0*/ MOV R29, R39 ; /* 0x00000027001d7202 */ /* 0x000fe20000000f00 */ /*0fb0*/ IMAD.MOV.U32 R31, RZ, RZ, R37 ; /* 0x000000ffff1f7224 */ /* 0x000fe200078e0025 */ /*0fc0*/ MOV R0, 0xff0 ; /* 0x00000ff000007802 */ /* 0x000fe20000000f00 */ /*0fd0*/ IMAD.MOV.U32 R28, RZ, RZ, R38 ; /* 0x000000ffff1c7224 */ /* 0x000fe400078e0026 */ /*0fe0*/ CALL.REL.NOINC 0x18f0 ; /* 0x0000090000007944 */ /* 0x000fea0003c00000 */ /*0ff0*/ IMAD.MOV.U32 R12, RZ, RZ, R42 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e002a */ /*1000*/ IMAD.MOV.U32 R13, RZ, RZ, R43 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e002b */ /*1010*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1020*/ IMAD.MOV.U32 R44, RZ, RZ, c[0x0][0x1a8] ; /* 0x00006a00ff2c7624 */ /* 0x000fe400078e00ff */ /*1030*/ IMAD.MOV.U32 R45, RZ, RZ, c[0x0][0x1ac] ; /* 0x00006b00ff2d7624 */ /* 0x000fca00078e00ff */ /*1040*/ LDG.E.64 R26, [R44.64+0x28] ; /* 0x000028082c1a7981 */ /* 0x000ea8000c1e1b00 */ /*1050*/ LDG.E.64 R20, [R44.64+0x10] ; /* 0x000010082c147981 */ /* 0x000ee8000c1e1b00 */ /*1060*/ LDG.E.64 R42, [R44.64+0x40] ; /* 0x000040082c2a7981 */ /* 0x000f28000c1e1b00 */ /*1070*/ LDG.E.64 R36, [R44.64+0x58] ; /* 0x000058082c247981 */ /* 0x000f68000c1e1b00 */ /*1080*/ LDG.E.64 R38, [R44.64+0x18] ; /* 0x000018082c267981 */ /* 0x000f68000c1e1b00 */ /*1090*/ LDG.E.64 R30, [R44.64] ; /* 0x000000082c1e7981 */ /* 0x000f68000c1e1b00 */ /*10a0*/ LDG.E.64 R40, [R44.64+0x30] ; /* 0x000030082c287981 */ /* 0x000f68000c1e1b00 */ /*10b0*/ LDG.E.64 R32, [R44.64+0x48] ; /* 0x000048082c207981 */ /* 0x000f68000c1e1b00 */ /*10c0*/ LDG.E.64 R34, [R44.64+0x20] ; /* 0x000020082c227981 */ /* 0x000f68000c1e1b00 */ /*10d0*/ LDG.E.64 R28, [R44.64+0x50] ; /* 0x000050082c1c7981 */ /* 0x000f62000c1e1b00 */ /*10e0*/ DMUL R26, R14, R26 ; /* 0x0000001a0e1a7228 */ /* 0x004ecc0000000000 */ /*10f0*/ DFMA R26, R22, R20, R26 ; /* 0x00000014161a722b */ /* 0x008124000000001a */ /*1100*/ LDG.E.64 R20, [R44.64+0x8] ; /* 0x000008082c147981 */ /* 0x001ea8000c1e1b00 */ /*1110*/ DFMA R42, R24, R42, R26 ; /* 0x0000002a182a722b */ /* 0x010148000000001a */ /*1120*/ LDG.E.64 R26, [R44.64+0x38] ; /* 0x000038082c1a7981 */ /* 0x001ee4000c1e1b00 */ /*1130*/ DADD R36, R42, R36 ; /* 0x000000002a247229 */ /* 0x020e0c0000000024 */ /*1140*/ MUFU.RCP64H R43, R37 ; /* 0x00000025002b7308 */ /* 0x001e220000001800 */ /*1150*/ DMUL R38, R14, R38 ; /* 0x000000260e267228 */ /* 0x000e620000000000 */ /*1160*/ IMAD.MOV.U32 R42, RZ, RZ, 0x1 ; /* 0x00000001ff2a7424 */ /* 0x000fca00078e00ff */ /*1170*/ DFMA R30, R22, R30, R38 ; /* 0x0000001e161e722b */ /* 0x002fc80000000026 */ /*1180*/ DFMA R38, -R36, R42, 1 ; /* 0x3ff000002426742b */ /* 0x001e0c000000012a */ /*1190*/ DFMA R38, R38, R38, R38 ; /* 0x000000262626722b */ /* 0x001e0c0000000026 */ /*11a0*/ DFMA R42, R42, R38, R42 ; /* 0x000000262a2a722b */ /* 0x001e08000000002a */ /*11b0*/ DFMA R30, R24, R40, R30 ; /* 0x00000028181e722b */ /* 0x000e48000000001e */ /*11c0*/ DFMA R38, -R36, R42, 1 ; /* 0x3ff000002426742b */ /* 0x001e08000000012a */ /*11d0*/ DADD R30, R30, R32 ; /* 0x000000001e1e7229 */ /* 0x002fc80000000020 */ /*11e0*/ DFMA R38, R42, R38, R42 ; /* 0x000000262a26722b */ /* 0x001e0c000000002a */ /*11f0*/ DMUL R32, R30, R38 ; /* 0x000000261e207228 */ /* 0x001e0c0000000000 */ /*1200*/ DFMA R40, -R36, R32, R30 ; /* 0x000000202428722b */ /* 0x001e08000000011e */ /*1210*/ DMUL R34, R14, R34 ; /* 0x000000220e227228 */ /* 0x000fc80000000000 */ /*1220*/ DFMA R14, R38, R40, R32 ; /* 0x00000028260e722b */ /* 0x001e220000000020 */ /*1230*/ FSETP.GEU.AND P1, PT, |R31|, 6.5827683646048100446e-37, PT ; /* 0x036000001f00780b */ /* 0x000fd20003f2e200 */ /*1240*/ FFMA R0, RZ, R37, R15 ; /* 0x00000025ff007223 */ /* 0x001fca000000000f */ /*1250*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fe20003f04200 */ /*1260*/ BSSY B0, 0x1320 ; /* 0x000000b000007945 */ /* 0x000fe20003800000 */ /*1270*/ DFMA R20, R22, R20, R34 ; /* 0x000000141614722b */ /* 0x004ecc0000000022 */ /*1280*/ DFMA R20, R24, R26, R20 ; /* 0x0000001a1814722b */ /* 0x008e0c0000000014 */ /*1290*/ DADD R22, R20, R28 ; /* 0x0000000014167229 */ /* 0x001062000000001c */ /*12a0*/ @P0 BRA P1, 0x1310 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*12b0*/ MOV R28, R36 ; /* 0x00000024001c7202 */ /* 0x001fe20000000f00 */ /*12c0*/ IMAD.MOV.U32 R29, RZ, RZ, R37 ; /* 0x000000ffff1d7224 */ /* 0x000fe200078e0025 */ /*12d0*/ MOV R0, 0x12f0 ; /* 0x000012f000007802 */ /* 0x000fc60000000f00 */ /*12e0*/ CALL.REL.NOINC 0x18f0 ; /* 0x0000060000007944 */ /* 0x002fea0003c00000 */ /*12f0*/ IMAD.MOV.U32 R14, RZ, RZ, R42 ; /* 0x000000ffff0e7224 */ /* 0x000fe400078e002a */ /*1300*/ IMAD.MOV.U32 R15, RZ, RZ, R43 ; /* 0x000000ffff0f7224 */ /* 0x000fe400078e002b */ /*1310*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1320*/ MUFU.RCP64H R21, R37 ; /* 0x0000002500157308 */ /* 0x001e220000001800 */ /*1330*/ IMAD.MOV.U32 R20, RZ, RZ, 0x1 ; /* 0x00000001ff147424 */ /* 0x000fe200078e00ff */ /*1340*/ FSETP.GEU.AND P1, PT, |R23|, 6.5827683646048100446e-37, PT ; /* 0x036000001700780b */ /* 0x002fe20003f2e200 */ /*1350*/ BSSY B0, 0x14a0 ; /* 0x0000014000007945 */ /* 0x000fe80003800000 */ /*1360*/ DFMA R24, -R36, R20, 1 ; /* 0x3ff000002418742b */ /* 0x001e0c0000000114 */ /*1370*/ DFMA R24, R24, R24, R24 ; /* 0x000000181818722b */ /* 0x001e0c0000000018 */ /*1380*/ DFMA R24, R20, R24, R20 ; /* 0x000000181418722b */ /* 0x001e0c0000000014 */ /*1390*/ DFMA R20, -R36, R24, 1 ; /* 0x3ff000002414742b */ /* 0x001e0c0000000118 */ /*13a0*/ DFMA R26, R24, R20, R24 ; /* 0x00000014181a722b */ /* 0x001e0c0000000018 */ /*13b0*/ DMUL R20, R22, R26 ; /* 0x0000001a16147228 */ /* 0x001e0c0000000000 */ /*13c0*/ DFMA R24, -R36, R20, R22 ; /* 0x000000142418722b */ /* 0x001e0c0000000116 */ /*13d0*/ DFMA R20, R26, R24, R20 ; /* 0x000000181a14722b */ /* 0x001e140000000014 */ /*13e0*/ FFMA R0, RZ, R37, R21 ; /* 0x00000025ff007223 */ /* 0x001fca0000000015 */ /*13f0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*1400*/ @P0 BRA P1, 0x1490 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*1410*/ IMAD.MOV.U32 R30, RZ, RZ, R22 ; /* 0x000000ffff1e7224 */ /* 0x000fe200078e0016 */ /*1420*/ MOV R31, R23 ; /* 0x00000017001f7202 */ /* 0x000fe20000000f00 */ /*1430*/ IMAD.MOV.U32 R28, RZ, RZ, R36 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e0024 */ /*1440*/ MOV R0, 0x1470 ; /* 0x0000147000007802 */ /* 0x000fe20000000f00 */ /*1450*/ IMAD.MOV.U32 R29, RZ, RZ, R37 ; /* 0x000000ffff1d7224 */ /* 0x000fe400078e0025 */ /*1460*/ CALL.REL.NOINC 0x18f0 ; /* 0x0000048000007944 */ /* 0x000fea0003c00000 */ /*1470*/ IMAD.MOV.U32 R20, RZ, RZ, R42 ; /* 0x000000ffff147224 */ /* 0x000fe400078e002a */ /*1480*/ IMAD.MOV.U32 R21, RZ, RZ, R43 ; /* 0x000000ffff157224 */ /* 0x000fe400078e002b */ /*1490*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*14a0*/ IMAD.MOV.U32 R22, RZ, RZ, c[0x0][0x1c8] ; /* 0x00007200ff167624 */ /* 0x000fe200078e00ff */ /*14b0*/ MOV R23, c[0x0][0x1cc] ; /* 0x0000730000177a02 */ /* 0x000fe20000000f00 */ /*14c0*/ IMAD.MOV.U32 R24, RZ, RZ, c[0x0][0x1d0] ; /* 0x00007400ff187624 */ /* 0x000fe400078e00ff */ /*14d0*/ IMAD.MOV.U32 R25, RZ, RZ, c[0x0][0x1d4] ; /* 0x00007500ff197624 */ /* 0x000fe200078e00ff */ /*14e0*/ F2I.F64.TRUNC R11, R10 ; /* 0x0000000a000b7311 */ /* 0x000e22000030d100 */ /*14f0*/ LDG.E R22, [R22.64] ; /* 0x0000000816167981 */ /* 0x000e2e000c1e1900 */ /*1500*/ F2I.F64.TRUNC R7, R6 ; /* 0x0000000600077311 */ /* 0x000e62000030d100 */ /*1510*/ LDG.E R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000eae000c1e1900 */ /*1520*/ F2I.F64.TRUNC R3, R2 ; /* 0x0000000200037311 */ /* 0x000ef0000030d100 */ /*1530*/ F2I.F64.TRUNC R15, R14 ; /* 0x0000000e000f7311 */ /* 0x000f30000030d100 */ /*1540*/ F2I.F64.TRUNC R9, R8 ; /* 0x0000000800097311 */ /* 0x000f70000030d100 */ /*1550*/ F2I.F64.TRUNC R5, R4 ; /* 0x0000000400057311 */ /* 0x000e30000030d100 */ /*1560*/ F2I.F64.TRUNC R19, R12 ; /* 0x0000000c00137311 */ /* 0x000230000030d100 */ /*1570*/ F2I.F64.TRUNC R21, R20 ; /* 0x0000001400157311 */ /* 0x000e22000030d100 */ /*1580*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*1590*/ ULDC UR4, c[0x0][0xc] ; /* 0x0000030000047ab9 */ /* 0x000fe20000000800 */ /*15a0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x8 ; /* 0x00000008ff0d7424 */ /* 0x002fe200078e00ff */ /*15b0*/ ULDC.64 UR6, c[0x0][0x0] ; /* 0x0000000000067ab9 */ /* 0x000fe20000000a00 */ /*15c0*/ ISETP.GE.AND P0, PT, R11, R22, PT ; /* 0x000000160b00720c */ /* 0x001fc40003f06270 */ /*15d0*/ ISETP.GE.AND P1, PT, R7, R22.reuse, PT ; /* 0x000000160700720c */ /* 0x080fe40003f26270 */ /*15e0*/ ISETP.GE.AND P2, PT, R3, R22.reuse, PT ; /* 0x000000160300720c */ /* 0x088fe40003f46270 */ /*15f0*/ ISETP.LT.OR P0, PT, R11, 0x1, P0 ; /* 0x000000010b00780c */ /* 0x000fe40000701670 */ /*1600*/ ISETP.LT.OR P1, PT, R7, 0x1, P1 ; /* 0x000000010700780c */ /* 0x000fe40000f21670 */ /*1610*/ ISETP.GE.AND P3, PT, R15, R22, PT ; /* 0x000000160f00720c */ /* 0x010fe40003f66270 */ /*1620*/ ISETP.LT.OR P2, PT, R3, 0x1, P2 ; /* 0x000000010300780c */ /* 0x000fc40001741670 */ /*1630*/ ISETP.LT.OR P0, PT, R9, 0x1, P0 ; /* 0x000000010900780c */ /* 0x020fe40000701670 */ /*1640*/ ISETP.LT.OR P1, PT, R5, 0x1, P1 ; /* 0x000000010500780c */ /* 0x000fe40000f21670 */ /*1650*/ ISETP.LT.OR P3, PT, R15, 0x1, P3 ; /* 0x000000010f00780c */ /* 0x000fe40001f61670 */ /*1660*/ ISETP.LT.OR P2, PT, R19, 0x1, P2 ; /* 0x000000011300780c */ /* 0x000fe40001741670 */ /*1670*/ ISETP.GE.OR P0, PT, R9, R24.reuse, P0 ; /* 0x000000180900720c */ /* 0x084fe40000706670 */ /*1680*/ ISETP.GE.OR P1, PT, R5, R24, P1 ; /* 0x000000180500720c */ /* 0x000fc40000f26670 */ /*1690*/ ISETP.LT.OR P3, PT, R21, 0x1, P3 ; /* 0x000000011500780c */ /* 0x000fe40001f61670 */ /*16a0*/ ISETP.GE.OR P2, PT, R19, R24.reuse, P2 ; /* 0x000000181300720c */ /* 0x080fe40001746670 */ /*16b0*/ ISETP.GE.OR P3, PT, R21, R24, P3 ; /* 0x000000181500720c */ /* 0x000fca0001f66670 */ /*16c0*/ @!P0 IMAD R2, R11, R24.reuse, R9 ; /* 0x000000180b028224 */ /* 0x080fe400078e0209 */ /*16d0*/ @!P1 IMAD R4, R7, R24, R5 ; /* 0x0000001807049224 */ /* 0x000fc800078e0205 */ /*16e0*/ @!P2 IMAD R6, R3, R24, R19 ; /* 0x000000180306a224 */ /* 0x000fe400078e0213 */ /*16f0*/ @!P0 IMAD.WIDE R2, R2, R13, c[0x0][0x168] ; /* 0x00005a0002028625 */ /* 0x000fc800078e020d */ /*1700*/ @!P1 IMAD.WIDE R4, R4, R13.reuse, c[0x0][0x170] ; /* 0x00005c0004049625 */ /* 0x080fe400078e020d */ /*1710*/ @!P0 LDG.E.64 R2, [R2.64] ; /* 0x0000000802028981 */ /* 0x000ea4000c1e1b00 */ /*1720*/ @!P3 IMAD R8, R15, R24, R21 ; /* 0x000000180f08b224 */ /* 0x000fe400078e0215 */ /*1730*/ @!P2 IMAD.WIDE R6, R6, R13.reuse, c[0x0][0x178] ; /* 0x00005e000606a625 */ /* 0x080fe200078e020d */ /*1740*/ @!P1 LDG.E.64 R4, [R4.64] ; /* 0x0000000804049981 */ /* 0x000ee6000c1e1b00 */ /*1750*/ @!P3 IMAD.WIDE R8, R8, R13, c[0x0][0x180] ; /* 0x000060000808b625 */ /* 0x000fc400078e020d */ /*1760*/ @!P2 LDG.E.64 R6, [R6.64] ; /* 0x000000080606a981 */ /* 0x000f28000c1e1b00 */ /*1770*/ @!P3 LDG.E.64 R8, [R8.64] ; /* 0x000000080808b981 */ /* 0x000f62000c1e1b00 */ /*1780*/ IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e00ff */ /*1790*/ UIMAD UR4, UR4, UR6, URZ ; /* 0x00000006040472a4 */ /* 0x000fe4000f8e023f */ /*17a0*/ ULDC UR5, c[0x0][0x10] ; /* 0x0000040000057ab9 */ /* 0x000fe40000000800 */ /*17b0*/ UIMAD UR5, UR5, UR7, URZ ; /* 0x00000007050572a4 */ /* 0x000fc4000f8e023f */ /*17c0*/ IMAD R17, R18, UR4, R17 ; /* 0x0000000412117c24 */ /* 0x000fe2000f8e0211 */ /*17d0*/ @!P0 DSETP.NEU.AND P6, PT, R2, RZ, PT ; /* 0x000000ff0200822a */ /* 0x004e080003fcd000 */ /*17e0*/ @!P1 DSETP.NEU.AND P5, PT, R4, RZ, PT ; /* 0x000000ff0400922a */ /* 0x008e640003fad000 */ /*17f0*/ @!P0 SEL R11, RZ, 0x1, !P6 ; /* 0x00000001ff0b8807 */ /* 0x001fe40007000000 */ /*1800*/ @!P2 DSETP.NEU.AND P4, PT, R6, RZ, PT ; /* 0x000000ff0600a22a */ /* 0x010e220003f8d000 */ /*1810*/ CS2R R2, SRZ ; /* 0x0000000000027805 */ /* 0x000fe2000001ff00 */ /*1820*/ @!P1 SEL R0, RZ, 0x1, !P5 ; /* 0x00000001ff009807 */ /* 0x002fe40006800000 */ /*1830*/ @!P3 DSETP.NEU.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800b22a */ /* 0x020e640003f0d000 */ /*1840*/ @!P2 SEL R3, RZ, 0x1, !P4 ; /* 0x00000001ff03a807 */ /* 0x001fc80006000000 */ /*1850*/ @!P3 SEL R2, RZ, 0x1, !P0 ; /* 0x00000001ff02b807 */ /* 0x002fe40004000000 */ /*1860*/ IADD3 R3, R3, R0, R11 ; /* 0x0000000003037210 */ /* 0x000fc80007ffe00b */ /*1870*/ IADD3 R2, R3, R2, RZ ; /* 0x0000000203027210 */ /* 0x000fc80007ffe0ff */ /*1880*/ ISETP.GT.U32.AND P0, PT, R2, 0x2, PT ; /* 0x000000020200780c */ /* 0x000fe20003f04070 */ /*1890*/ IMAD R2, R17, UR5, R16 ; /* 0x0000000511027c24 */ /* 0x000fe4000f8e0210 */ /*18a0*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */ /* 0x000fe200078e00ff */ /*18b0*/ FSEL R5, RZ, 1.875, !P0 ; /* 0x3ff00000ff057808 */ /* 0x000fe20004000000 */ /*18c0*/ IMAD.WIDE R2, R2, R13, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fca00078e020d */ /*18d0*/ STG.E.64 [R2.64], R4 ; /* 0x0000000402007986 */ /* 0x000fe2000c101b08 */ /*18e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*18f0*/ FSETP.GEU.AND P0, PT, |R29|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000001d00780b */ /* 0x040fe20003f0e200 */ /*1900*/ IMAD.MOV.U32 R34, RZ, RZ, 0x1 ; /* 0x00000001ff227424 */ /* 0x000fe200078e00ff */ /*1910*/ LOP3.LUT R26, R29, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff1d1a7812 */ /* 0x000fe200078ec0ff */ /*1920*/ IMAD.MOV.U32 R32, RZ, RZ, R30 ; /* 0x000000ffff207224 */ /* 0x000fe200078e001e */ /*1930*/ FSETP.GEU.AND P2, PT, |R31|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000001f00780b */ /* 0x040fe20003f4e200 */ /*1940*/ BSSY B1, 0x1e80 ; /* 0x0000053000017945 */ /* 0x000fe20003800000 */ /*1950*/ LOP3.LUT R27, R26, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff000001a1b7812 */ /* 0x000fe200078efcff */ /*1960*/ IMAD.MOV.U32 R26, RZ, RZ, R28 ; /* 0x000000ffff1a7224 */ /* 0x000fe200078e001c */ /*1970*/ LOP3.LUT R19, R31, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001f137812 */ /* 0x000fe400078ec0ff */ /*1980*/ LOP3.LUT R40, R29, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001d287812 */ /* 0x000fc600078ec0ff */ /*1990*/ @!P0 DMUL R26, R28, 8.98846567431157953865e+307 ; /* 0x7fe000001c1a8828 */ /* 0x000e220000000000 */ /*19a0*/ ISETP.GE.U32.AND P1, PT, R19, R40, PT ; /* 0x000000281300720c */ /* 0x000fc60003f26070 */ /*19b0*/ @!P2 LOP3.LUT R20, R29, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001d14a812 */ /* 0x000fe400078ec0ff */ /*19c0*/ MUFU.RCP64H R35, R27 ; /* 0x0000001b00237308 */ /* 0x001e220000001800 */ /*19d0*/ @!P2 MOV R44, RZ ; /* 0x000000ff002ca202 */ /* 0x000fe40000000f00 */ /*19e0*/ @!P2 ISETP.GE.U32.AND P3, PT, R19, R20, PT ; /* 0x000000141300a20c */ /* 0x000fe20003f66070 */ /*19f0*/ IMAD.MOV.U32 R20, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff147424 */ /* 0x000fe200078e00ff */ /*1a00*/ @!P0 LOP3.LUT R40, R27, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001b288812 */ /* 0x000fc800078ec0ff */ /*1a10*/ @!P2 SEL R21, R20.reuse, 0x63400000, !P3 ; /* 0x634000001415a807 */ /* 0x040fe40005800000 */ /*1a20*/ SEL R33, R20, 0x63400000, !P1 ; /* 0x6340000014217807 */ /* 0x000fe40004800000 */ /*1a30*/ @!P2 LOP3.LUT R21, R21, 0x80000000, R31.reuse, 0xf8, !PT ; /* 0x800000001515a812 */ /* 0x100fe400078ef81f */ /*1a40*/ LOP3.LUT R33, R33, 0x800fffff, R31, 0xf8, !PT ; /* 0x800fffff21217812 */ /* 0x000fe200078ef81f */ /*1a50*/ DFMA R42, R34, -R26, 1 ; /* 0x3ff00000222a742b */ /* 0x001e22000000081a */ /*1a60*/ @!P2 LOP3.LUT R45, R21, 0x100000, RZ, 0xfc, !PT ; /* 0x00100000152da812 */ /* 0x000fe200078efcff */ /*1a70*/ IMAD.MOV.U32 R21, RZ, RZ, R19 ; /* 0x000000ffff157224 */ /* 0x000fc800078e0013 */ /*1a80*/ DFMA R42, R42, R42, R42 ; /* 0x0000002a2a2a722b */ /* 0x001e08000000002a */ /*1a90*/ @!P2 DFMA R32, R32, 2, -R44 ; /* 0x400000002020a82b */ /* 0x000fc8000000082c */ /*1aa0*/ DFMA R42, R34, R42, R34 ; /* 0x0000002a222a722b */ /* 0x001e0c0000000022 */ /*1ab0*/ DFMA R34, R42, -R26, 1 ; /* 0x3ff000002a22742b */ /* 0x001e22000000081a */ /*1ac0*/ @!P2 LOP3.LUT R21, R33, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000002115a812 */ /* 0x000fca00078ec0ff */ /*1ad0*/ DFMA R42, R42, R34, R42 ; /* 0x000000222a2a722b */ /* 0x001064000000002a */ /*1ae0*/ IADD3 R34, R21, -0x1, RZ ; /* 0xffffffff15227810 */ /* 0x001fe40007ffe0ff */ /*1af0*/ IADD3 R35, R40, -0x1, RZ ; /* 0xffffffff28237810 */ /* 0x000fe40007ffe0ff */ /*1b00*/ ISETP.GT.U32.AND P0, PT, R34, 0x7feffffe, PT ; /* 0x7feffffe2200780c */ /* 0x000fe20003f04070 */ /*1b10*/ DMUL R44, R42, R32 ; /* 0x000000202a2c7228 */ /* 0x002e060000000000 */ /*1b20*/ ISETP.GT.U32.OR P0, PT, R35, 0x7feffffe, P0 ; /* 0x7feffffe2300780c */ /* 0x000fc60000704470 */ /*1b30*/ DFMA R46, R44, -R26, R32 ; /* 0x8000001a2c2e722b */ /* 0x001e0c0000000020 */ /*1b40*/ DFMA R34, R42, R46, R44 ; /* 0x0000002e2a22722b */ /* 0x001048000000002c */ /*1b50*/ @P0 BRA 0x1d20 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*1b60*/ LOP3.LUT R30, R29, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001d1e7812 */ /* 0x003fc800078ec0ff */ /*1b70*/ ISETP.GE.U32.AND P0, PT, R19.reuse, R30, PT ; /* 0x0000001e1300720c */ /* 0x040fe20003f06070 */ /*1b80*/ IMAD.IADD R21, R19, 0x1, -R30 ; /* 0x0000000113157824 */ /* 0x000fe400078e0a1e */ /*1b90*/ IMAD.MOV.U32 R30, RZ, RZ, RZ ; /* 0x000000ffff1e7224 */ /* 0x000fe200078e00ff */ /*1ba0*/ SEL R20, R20, 0x63400000, !P0 ; /* 0x6340000014147807 */ /* 0x000fe40004000000 */ /*1bb0*/ IMNMX R21, R21, -0x46a00000, !PT ; /* 0xb960000015157817 */ /* 0x000fc80007800200 */ /*1bc0*/ IMNMX R21, R21, 0x46a00000, PT ; /* 0x46a0000015157817 */ /* 0x000fca0003800200 */ /*1bd0*/ IMAD.IADD R20, R21, 0x1, -R20 ; /* 0x0000000115147824 */ /* 0x000fca00078e0a14 */ /*1be0*/ IADD3 R31, R20, 0x7fe00000, RZ ; /* 0x7fe00000141f7810 */ /* 0x000fcc0007ffe0ff */ /*1bf0*/ DMUL R42, R34, R30 ; /* 0x0000001e222a7228 */ /* 0x000e140000000000 */ /*1c00*/ FSETP.GTU.AND P0, PT, |R43|, 1.469367938527859385e-39, PT ; /* 0x001000002b00780b */ /* 0x001fda0003f0c200 */ /*1c10*/ @P0 BRA 0x1e70 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*1c20*/ DFMA R26, R34, -R26, R32 ; /* 0x8000001a221a722b */ /* 0x000e220000000020 */ /*1c30*/ IMAD.MOV.U32 R30, RZ, RZ, RZ ; /* 0x000000ffff1e7224 */ /* 0x000fd200078e00ff */ /*1c40*/ FSETP.NEU.AND P0, PT, R27.reuse, RZ, PT ; /* 0x000000ff1b00720b */ /* 0x041fe40003f0d000 */ /*1c50*/ LOP3.LUT R28, R27, 0x80000000, R29, 0x48, !PT ; /* 0x800000001b1c7812 */ /* 0x000fc800078e481d */ /*1c60*/ LOP3.LUT R31, R28, R31, RZ, 0xfc, !PT ; /* 0x0000001f1c1f7212 */ /* 0x000fce00078efcff */ /*1c70*/ @!P0 BRA 0x1e70 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*1c80*/ IADD3 R27, -R20.reuse, RZ, RZ ; /* 0x000000ff141b7210 */ /* 0x040fe20007ffe1ff */ /*1c90*/ IMAD.MOV.U32 R26, RZ, RZ, RZ ; /* 0x000000ffff1a7224 */ /* 0x000fe200078e00ff */ /*1ca0*/ IADD3 R20, -R20, -0x43300000, RZ ; /* 0xbcd0000014147810 */ /* 0x000fca0007ffe1ff */ /*1cb0*/ DFMA R26, R42, -R26, R34 ; /* 0x8000001a2a1a722b */ /* 0x000e080000000022 */ /*1cc0*/ DMUL.RP R34, R34, R30 ; /* 0x0000001e22227228 */ /* 0x000e4c0000008000 */ /*1cd0*/ FSETP.NEU.AND P0, PT, |R27|, R20, PT ; /* 0x000000141b00720b */ /* 0x001fc80003f0d200 */ /*1ce0*/ LOP3.LUT R19, R35, R28, RZ, 0x3c, !PT ; /* 0x0000001c23137212 */ /* 0x002fe400078e3cff */ /*1cf0*/ FSEL R42, R34, R42, !P0 ; /* 0x0000002a222a7208 */ /* 0x000fe40004000000 */ /*1d00*/ FSEL R43, R19, R43, !P0 ; /* 0x0000002b132b7208 */ /* 0x000fe20004000000 */ /*1d10*/ BRA 0x1e70 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*1d20*/ DSETP.NAN.AND P0, PT, R30, R30, PT ; /* 0x0000001e1e00722a */ /* 0x003e1c0003f08000 */ /*1d30*/ @P0 BRA 0x1e50 ; /* 0x0000011000000947 */ /* 0x001fea0003800000 */ /*1d40*/ DSETP.NAN.AND P0, PT, R28, R28, PT ; /* 0x0000001c1c00722a */ /* 0x000e1c0003f08000 */ /*1d50*/ @P0 BRA 0x1e20 ; /* 0x000000c000000947 */ /* 0x001fea0003800000 */ /*1d60*/ ISETP.NE.AND P0, PT, R21, R40, PT ; /* 0x000000281500720c */ /* 0x000fe20003f05270 */ /*1d70*/ IMAD.MOV.U32 R42, RZ, RZ, 0x0 ; /* 0x00000000ff2a7424 */ /* 0x000fe400078e00ff */ /*1d80*/ IMAD.MOV.U32 R43, RZ, RZ, -0x80000 ; /* 0xfff80000ff2b7424 */ /* 0x000fd400078e00ff */ /*1d90*/ @!P0 BRA 0x1e70 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*1da0*/ ISETP.NE.AND P0, PT, R21, 0x7ff00000, PT ; /* 0x7ff000001500780c */ /* 0x000fe40003f05270 */ /*1db0*/ LOP3.LUT R43, R31, 0x80000000, R29, 0x48, !PT ; /* 0x800000001f2b7812 */ /* 0x000fe400078e481d */ /*1dc0*/ ISETP.EQ.OR P0, PT, R40, RZ, !P0 ; /* 0x000000ff2800720c */ /* 0x000fda0004702670 */ /*1dd0*/ @P0 LOP3.LUT R19, R43, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000002b130812 */ /* 0x000fe200078efcff */ /*1de0*/ @!P0 IMAD.MOV.U32 R42, RZ, RZ, RZ ; /* 0x000000ffff2a8224 */ /* 0x000fe400078e00ff */ /*1df0*/ @P0 IMAD.MOV.U32 R42, RZ, RZ, RZ ; /* 0x000000ffff2a0224 */ /* 0x000fe200078e00ff */ /*1e00*/ @P0 MOV R43, R19 ; /* 0x00000013002b0202 */ /* 0x000fe20000000f00 */ /*1e10*/ BRA 0x1e70 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*1e20*/ LOP3.LUT R43, R29, 0x80000, RZ, 0xfc, !PT ; /* 0x000800001d2b7812 */ /* 0x000fe200078efcff */ /*1e30*/ IMAD.MOV.U32 R42, RZ, RZ, R28 ; /* 0x000000ffff2a7224 */ /* 0x000fe200078e001c */ /*1e40*/ BRA 0x1e70 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*1e50*/ LOP3.LUT R43, R31, 0x80000, RZ, 0xfc, !PT ; /* 0x000800001f2b7812 */ /* 0x000fe200078efcff */ /*1e60*/ IMAD.MOV.U32 R42, RZ, RZ, R30 ; /* 0x000000ffff2a7224 */ /* 0x000fe400078e001e */ /*1e70*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1e80*/ IMAD.MOV.U32 R20, RZ, RZ, R0 ; /* 0x000000ffff147224 */ /* 0x000fe400078e0000 */ /*1e90*/ IMAD.MOV.U32 R21, RZ, RZ, 0x0 ; /* 0x00000000ff157424 */ /* 0x000fc800078e00ff */ /*1ea0*/ RET.REL.NODEC R20 0x0 ; /* 0xffffe15014007950 */ /* 0x000fea0003c3ffff */ /*1eb0*/ BRA 0x1eb0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1ec0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ed0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ee0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ef0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1f00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1f10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1f20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1f30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1f40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1f50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1f60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1f70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> __global__ void mapping(double *point_cloud, const double *img1, const double *img2, const double *img3, const double *img4, const double *T, const double *P1, const double *P2, const double *P3, const double *P4, const double *ratiox, const double *ratioy, const double *ratioz, const int *img_width, const int *img_height) { int idx = blockIdx.x*blockDim.x + threadIdx.x; int idy = blockIdx.y*blockDim.y + threadIdx.y; int idz = threadIdx.z; int width = gridDim.x*blockDim.x; int height = gridDim.y*blockDim.y; int index = idz*width*height + idx*height + idy; //grid to coordinates double mx = idx*ratiox[0]; double my = idy*ratioy[0]; double mz = idz*ratioz[0]; //world coordinates double x = T[0]*mx + T[4]*my + T[8]*mz + T[12]; double y = T[1]*mx + T[5]*my + T[9]*mz + T[13]; double z = mz; //image coordinates double u1 = P1[0]*x + P1[3]*y + P1[6]*z + P1[9]; double v1 = P1[1]*x + P1[4]*y + P1[7]*z + P1[10]; double norm1 = P1[2]*x + P1[5]*y + P1[8]*z + P1[11]; u1/=norm1; v1/=norm1; double u2 = P2[0]*x + P2[3]*y + P2[6]*z + P2[9]; double v2 = P2[1]*x + P2[4]*y + P2[7]*z + P2[10]; double norm2 = P2[2]*x + P2[5]*y + P2[8]*z + P2[11]; u2/=norm2; v2/=norm2; double u3 = P3[0]*x + P3[3]*y + P3[6]*z + P3[9]; double v3 = P3[1]*x + P3[4]*y + P3[7]*z + P3[10]; double norm3 = P3[2]*x + P3[5]*y + P3[8]*z + P3[11]; u3/=norm3; v3/=norm3; double u4 = P4[0]*x + P4[3]*y + P4[6]*z + P4[9]; double v4 = P4[1]*x + P4[4]*y + P4[7]*z + P4[10]; double norm4 = P4[2]*x + P4[5]*y + P4[8]*z + P4[11]; u4/=norm4; v4/=norm4; int u11 = (u1); int u22 = (u2); int u33 = (u3); int u44 = (u4); int v11 = (v1); int v22 = (v2); int v33 = (v3); int v44 = (v4); int final_width = img_width[0]; int final_height = img_height[0]; int seen_record[4] = {0}; //decide the point cloud if((u11>0)&&(u11<final_width)&&(v11>0)&&(v11<final_height)) seen_record[0] = 1; if((u22>0)&&(u22<final_width)&&(v22>0)&&(v22<final_height)) seen_record[1] = 1; if((u33>0)&&(u33<final_width)&&(v33>0)&&(v33<final_height)) seen_record[2] = 1; if((u44>0)&&(u44<final_width)&&(v44>0)&&(v44<final_height)) seen_record[3] = 1; int sum = 0; if((seen_record[0]==1)&&(img1[u11*final_height+v11]!=0)) ++sum; if((seen_record[1]==1)&&(img2[u22*final_height+v22]!=0)) ++sum; if((seen_record[2]==1)&&(img3[u33*final_height+v33]!=0)) ++sum; if((seen_record[3]==1)&&(img4[u44*final_height+v44]!=0)) ++sum; point_cloud[index] = 0; if(sum>=3) { point_cloud[index] = 1; } }
.text .file "visual_hull_test.hip" .globl _Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ # -- Begin function _Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .type _Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_,@function _Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_: # @_Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $224, %rsp .cfi_def_cfa_offset 272 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 272(%rsp), %rax movq %rax, 48(%rbx) leaq 280(%rsp), %rax movq %rax, 56(%rbx) leaq 288(%rsp), %rax movq %rax, 64(%rbx) leaq 296(%rsp), %rax movq %rax, 72(%rbx) leaq 304(%rsp), %rax movq %rax, 80(%rbx) leaq 312(%rsp), %rax movq %rax, 88(%rbx) leaq 320(%rsp), %rax movq %rax, 96(%rbx) leaq 328(%rsp), %rax movq %rax, 104(%rbx) leaq 336(%rsp), %rax movq %rax, 112(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $240, %rsp .cfi_adjust_cfa_offset -240 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, .Lfunc_end0-_Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_,@object # @_Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .section .rodata,"a",@progbits .globl _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .p2align 3, 0x0 _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_: .quad _Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .size _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_" .size .L__unnamed_1, 55 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ ; -- Begin function _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .globl _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .p2align 8 .type _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_,@function _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_: ; @_Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ ; %bb.0: s_load_b32 s2, s[0:1], 0x84 v_bfe_u32 v3, v0, 10, 10 s_load_b256 s[68:75], s[0:1], 0x40 v_and_b32_e32 v6, 0x3ff, v0 v_bfe_u32 v9, v0, 20, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s33, s2, 0xffff v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_load_b64 s[20:21], s[74:75], 0x0 v_mad_u64_u32 v[2:3], null, s14, s33, v[6:7] s_load_b512 s[4:19], s[0:1], 0x0 s_load_b64 s[34:35], s[72:73], 0x0 s_waitcnt lgkmcnt(0) s_load_b128 s[28:31], s[14:15], 0x20 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_f64_i32_e32 v[4:5], v1 v_cvt_f64_i32_e32 v[6:7], v2 s_load_b128 s[36:39], s[14:15], 0x40 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mul_f64 v[10:11], s[20:21], v[4:5] s_load_b256 s[20:27], s[0:1], 0x60 v_cvt_f64_i32_e32 v[3:4], v9 v_mul_f64 v[5:6], s[34:35], v[6:7] s_waitcnt lgkmcnt(0) s_load_b64 s[20:21], s[20:21], 0x0 s_load_b128 s[40:43], s[14:15], 0x0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_mul_f64 v[7:8], v[10:11], s[30:31] v_mul_f64 v[10:11], s[28:29], v[10:11] s_waitcnt lgkmcnt(0) v_mul_f64 v[3:4], s[20:21], v[3:4] s_load_b128 s[28:31], s[14:15], 0x60 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[7:8], v[5:6], s[42:43], v[7:8] v_fma_f64 v[5:6], v[5:6], s[40:41], v[10:11] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[7:8], v[3:4], s[38:39], v[7:8] v_fma_f64 v[5:6], v[3:4], s[36:37], v[5:6] s_load_b512 s[36:51], s[16:17], 0x0 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[7:8], s[30:31], v[7:8] v_add_f64 v[5:6], s[28:29], v[5:6] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mul_f64 v[10:11], s[42:43], v[7:8] v_mul_f64 v[12:13], v[7:8], s[46:47] v_mul_f64 v[14:15], v[7:8], s[44:45] v_fma_f64 v[10:11], v[5:6], s[36:37], v[10:11] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[12:13], v[5:6], s[40:41], v[12:13] v_fma_f64 v[14:15], v[5:6], s[38:39], v[14:15] s_load_b256 s[36:43], s[16:17], 0x40 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[10:11], v[3:4], s[48:49], v[10:11] s_waitcnt lgkmcnt(0) v_fma_f64 v[12:13], v[3:4], s[36:37], v[12:13] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[14:15], v[3:4], s[50:51], v[14:15] v_add_f64 v[10:11], s[38:39], v[10:11] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[12:13], s[42:43], v[12:13] v_add_f64 v[14:15], s[40:41], v[14:15] s_load_b32 s35, s[22:23], 0x0 s_load_b32 s34, s[24:25], 0x0 s_load_b64 s[14:15], s[0:1], 0x78 s_clause 0x1 s_load_b512 s[52:67], s[18:19], 0x0 s_load_b256 s[84:91], s[18:19], 0x40 s_clause 0x1 s_load_b512 s[36:51], s[68:69], 0x0 s_load_b256 s[76:83], s[68:69], 0x40 s_clause 0x1 s_load_b512 s[16:31], s[70:71], 0x0 s_load_b256 s[68:75], s[70:71], 0x40 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_scale_f64 v[16:17], null, v[12:13], v[12:13], v[10:11] v_div_scale_f64 v[18:19], null, v[12:13], v[12:13], v[14:15] v_div_scale_f64 v[28:29], vcc_lo, v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[20:21], v[16:17] v_rcp_f64_e32 v[22:23], v[18:19] s_waitcnt_depctr 0xfff v_fma_f64 v[24:25], -v[16:17], v[20:21], 1.0 v_fma_f64 v[26:27], -v[18:19], v[22:23], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21] v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[24:25], -v[16:17], v[20:21], 1.0 v_fma_f64 v[26:27], -v[18:19], v[22:23], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[20:21], v[20:21], v[24:25], v[20:21] v_div_scale_f64 v[24:25], s2, v[14:15], v[12:13], v[14:15] v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[26:27], v[28:29], v[20:21] v_mul_f64 v[30:31], v[24:25], v[22:23] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[16:17], -v[16:17], v[26:27], v[28:29] v_fma_f64 v[18:19], -v[18:19], v[30:31], v[24:25] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[16:17], v[16:17], v[20:21], v[26:27] s_mov_b32 vcc_lo, s2 v_div_fmas_f64 v[18:19], v[18:19], v[22:23], v[30:31] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[10:11], v[16:17], v[12:13], v[10:11] v_div_fixup_f64 v[12:13], v[18:19], v[12:13], v[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cvt_i32_f64_e32 v11, v[10:11] v_mov_b32_e32 v10, 0 v_cvt_i32_f64_e32 v0, v[12:13] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cmp_lt_i32_e32 vcc_lo, 0, v11 s_waitcnt lgkmcnt(0) v_cmp_gt_i32_e64 s0, s35, v11 v_cmp_lt_i32_e64 s1, 0, v0 v_cmp_gt_i32_e64 s2, s34, v0 s_delay_alu instid0(VALU_DEP_3) s_and_b32 s0, vcc_lo, s0 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s1 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_b32 s1, s0, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s0, s1 s_cbranch_execz .LBB0_4 ; %bb.1: v_mad_u64_u32 v[12:13], null, s34, v11, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v13, 31, v12 v_lshlrev_b64 v[10:11], 3, v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, s6, v10 v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo global_load_b64 v[10:11], v[10:11], off s_waitcnt vmcnt(0) v_cmp_neq_f64_e32 vcc_lo, 0, v[10:11] v_mov_b32_e32 v10, 0 s_and_saveexec_b32 s1, vcc_lo ; %bb.2: v_mov_b32_e32 v10, 1 ; %bb.3: ; %Flow280 s_or_b32 exec_lo, exec_lo, s1 .LBB0_4: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) s_or_b32 exec_lo, exec_lo, s0 v_mul_f64 v[11:12], v[7:8], s[58:59] v_mul_f64 v[13:14], v[7:8], s[62:63] v_mul_f64 v[15:16], v[7:8], s[60:61] v_fma_f64 v[11:12], v[5:6], s[52:53], v[11:12] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[13:14], v[5:6], s[56:57], v[13:14] v_fma_f64 v[15:16], v[5:6], s[54:55], v[15:16] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[11:12], v[3:4], s[64:65], v[11:12] v_fma_f64 v[13:14], v[3:4], s[84:85], v[13:14] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[15:16], v[3:4], s[66:67], v[15:16] v_add_f64 v[11:12], s[86:87], v[11:12] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[13:14], s[90:91], v[13:14] v_add_f64 v[15:16], s[88:89], v[15:16] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_scale_f64 v[17:18], null, v[13:14], v[13:14], v[11:12] v_div_scale_f64 v[19:20], null, v[13:14], v[13:14], v[15:16] v_div_scale_f64 v[29:30], vcc_lo, v[11:12], v[13:14], v[11:12] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[21:22], v[17:18] v_rcp_f64_e32 v[23:24], v[19:20] s_waitcnt_depctr 0xfff v_fma_f64 v[25:26], -v[17:18], v[21:22], 1.0 v_fma_f64 v[27:28], -v[19:20], v[23:24], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[21:22], v[21:22], v[25:26], v[21:22] v_fma_f64 v[23:24], v[23:24], v[27:28], v[23:24] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[25:26], -v[17:18], v[21:22], 1.0 v_fma_f64 v[27:28], -v[19:20], v[23:24], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[21:22], v[21:22], v[25:26], v[21:22] v_div_scale_f64 v[25:26], s0, v[15:16], v[13:14], v[15:16] v_fma_f64 v[23:24], v[23:24], v[27:28], v[23:24] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[27:28], v[29:30], v[21:22] v_mul_f64 v[31:32], v[25:26], v[23:24] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[17:18], -v[17:18], v[27:28], v[29:30] v_fma_f64 v[19:20], -v[19:20], v[31:32], v[25:26] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[17:18], v[17:18], v[21:22], v[27:28] s_mov_b32 vcc_lo, s0 v_div_fmas_f64 v[19:20], v[19:20], v[23:24], v[31:32] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[11:12], v[17:18], v[13:14], v[11:12] v_div_fixup_f64 v[13:14], v[19:20], v[13:14], v[15:16] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_i32_f64_e32 v11, v[11:12] v_cvt_i32_f64_e32 v0, v[13:14] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cmp_lt_i32_e32 vcc_lo, 0, v11 v_cmp_gt_i32_e64 s0, s35, v11 v_cmp_lt_i32_e64 s1, 0, v0 v_cmp_gt_i32_e64 s2, s34, v0 s_delay_alu instid0(VALU_DEP_3) s_and_b32 s0, vcc_lo, s0 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s1 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_b32 s1, s0, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s0, s1 s_cbranch_execz .LBB0_8 ; %bb.5: v_mad_u64_u32 v[12:13], null, s34, v11, v[0:1] s_mov_b32 s1, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v13, 31, v12 v_lshlrev_b64 v[11:12], 3, v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, s8, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo global_load_b64 v[11:12], v[11:12], off s_waitcnt vmcnt(0) v_cmpx_neq_f64_e32 0, v[11:12] ; %bb.6: v_add_nc_u32_e32 v10, 1, v10 ; %bb.7: ; %Flow279 s_or_b32 exec_lo, exec_lo, s1 .LBB0_8: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) s_or_b32 exec_lo, exec_lo, s0 v_mul_f64 v[11:12], v[7:8], s[42:43] v_mul_f64 v[13:14], v[7:8], s[46:47] v_mul_f64 v[15:16], v[7:8], s[44:45] v_fma_f64 v[11:12], v[5:6], s[36:37], v[11:12] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[13:14], v[5:6], s[40:41], v[13:14] v_fma_f64 v[15:16], v[5:6], s[38:39], v[15:16] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[11:12], v[3:4], s[48:49], v[11:12] v_fma_f64 v[13:14], v[3:4], s[76:77], v[13:14] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[15:16], v[3:4], s[50:51], v[15:16] v_add_f64 v[11:12], s[78:79], v[11:12] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[13:14], s[82:83], v[13:14] v_add_f64 v[15:16], s[80:81], v[15:16] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_scale_f64 v[17:18], null, v[13:14], v[13:14], v[11:12] v_div_scale_f64 v[19:20], null, v[13:14], v[13:14], v[15:16] v_div_scale_f64 v[29:30], vcc_lo, v[11:12], v[13:14], v[11:12] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[21:22], v[17:18] v_rcp_f64_e32 v[23:24], v[19:20] s_waitcnt_depctr 0xfff v_fma_f64 v[25:26], -v[17:18], v[21:22], 1.0 v_fma_f64 v[27:28], -v[19:20], v[23:24], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[21:22], v[21:22], v[25:26], v[21:22] v_fma_f64 v[23:24], v[23:24], v[27:28], v[23:24] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[25:26], -v[17:18], v[21:22], 1.0 v_fma_f64 v[27:28], -v[19:20], v[23:24], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[21:22], v[21:22], v[25:26], v[21:22] v_div_scale_f64 v[25:26], s0, v[15:16], v[13:14], v[15:16] v_fma_f64 v[23:24], v[23:24], v[27:28], v[23:24] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[27:28], v[29:30], v[21:22] v_mul_f64 v[31:32], v[25:26], v[23:24] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[17:18], -v[17:18], v[27:28], v[29:30] v_fma_f64 v[19:20], -v[19:20], v[31:32], v[25:26] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[17:18], v[17:18], v[21:22], v[27:28] s_mov_b32 vcc_lo, s0 v_div_fmas_f64 v[19:20], v[19:20], v[23:24], v[31:32] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[11:12], v[17:18], v[13:14], v[11:12] v_div_fixup_f64 v[13:14], v[19:20], v[13:14], v[15:16] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_i32_f64_e32 v11, v[11:12] v_cvt_i32_f64_e32 v0, v[13:14] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cmp_lt_i32_e32 vcc_lo, 0, v11 v_cmp_gt_i32_e64 s0, s35, v11 v_cmp_lt_i32_e64 s1, 0, v0 v_cmp_gt_i32_e64 s2, s34, v0 s_delay_alu instid0(VALU_DEP_3) s_and_b32 s0, vcc_lo, s0 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s1 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_b32 s1, s0, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s0, s1 s_cbranch_execz .LBB0_12 ; %bb.9: v_mad_u64_u32 v[12:13], null, s34, v11, v[0:1] s_mov_b32 s1, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v13, 31, v12 v_lshlrev_b64 v[11:12], 3, v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, s10, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s11, v12, vcc_lo global_load_b64 v[11:12], v[11:12], off s_waitcnt vmcnt(0) v_cmpx_neq_f64_e32 0, v[11:12] ; %bb.10: v_add_nc_u32_e32 v10, 1, v10 ; %bb.11: ; %Flow278 s_or_b32 exec_lo, exec_lo, s1 .LBB0_12: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) s_or_b32 exec_lo, exec_lo, s0 v_mul_f64 v[11:12], v[7:8], s[22:23] v_mul_f64 v[13:14], v[7:8], s[26:27] v_mul_f64 v[7:8], v[7:8], s[24:25] v_fma_f64 v[11:12], v[5:6], s[16:17], v[11:12] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[13:14], v[5:6], s[20:21], v[13:14] v_fma_f64 v[5:6], v[5:6], s[18:19], v[7:8] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[7:8], v[3:4], s[28:29], v[11:12] v_fma_f64 v[11:12], v[3:4], s[68:69], v[13:14] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[3:4], s[30:31], v[5:6] v_add_f64 v[5:6], s[70:71], v[7:8] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[7:8], s[74:75], v[11:12] v_add_f64 v[3:4], s[72:73], v[3:4] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_scale_f64 v[11:12], null, v[7:8], v[7:8], v[5:6] v_div_scale_f64 v[13:14], null, v[7:8], v[7:8], v[3:4] v_div_scale_f64 v[23:24], vcc_lo, v[5:6], v[7:8], v[5:6] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[15:16], v[11:12] v_rcp_f64_e32 v[17:18], v[13:14] s_waitcnt_depctr 0xfff v_fma_f64 v[19:20], -v[11:12], v[15:16], 1.0 v_fma_f64 v[21:22], -v[13:14], v[17:18], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[15:16], v[15:16], v[19:20], v[15:16] v_fma_f64 v[17:18], v[17:18], v[21:22], v[17:18] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[19:20], -v[11:12], v[15:16], 1.0 v_fma_f64 v[21:22], -v[13:14], v[17:18], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[15:16], v[15:16], v[19:20], v[15:16] v_div_scale_f64 v[19:20], s0, v[3:4], v[7:8], v[3:4] v_fma_f64 v[17:18], v[17:18], v[21:22], v[17:18] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[21:22], v[23:24], v[15:16] v_mul_f64 v[25:26], v[19:20], v[17:18] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[11:12], -v[11:12], v[21:22], v[23:24] v_fma_f64 v[13:14], -v[13:14], v[25:26], v[19:20] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[11:12], v[11:12], v[15:16], v[21:22] s_mov_b32 vcc_lo, s0 v_div_fmas_f64 v[13:14], v[13:14], v[17:18], v[25:26] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[5:6], v[11:12], v[7:8], v[5:6] v_div_fixup_f64 v[7:8], v[13:14], v[7:8], v[3:4] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_i32_f64_e32 v3, v[5:6] v_cvt_i32_f64_e32 v0, v[7:8] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cmp_lt_i32_e32 vcc_lo, 0, v3 v_cmp_gt_i32_e64 s0, s35, v3 v_cmp_lt_i32_e64 s1, 0, v0 v_cmp_gt_i32_e64 s2, s34, v0 s_delay_alu instid0(VALU_DEP_3) s_and_b32 s0, vcc_lo, s0 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s1 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_b32 s1, s0, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s0, s1 s_cbranch_execz .LBB0_16 ; %bb.13: v_mad_u64_u32 v[4:5], null, s34, v3, v[0:1] s_mov_b32 s1, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v5, 31, v4 v_lshlrev_b64 v[3:4], 3, v[4:5] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s12, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s13, v4, vcc_lo global_load_b64 v[3:4], v[3:4], off s_waitcnt vmcnt(0) v_cmpx_neq_f64_e32 0, v[3:4] ; %bb.14: v_add_nc_u32_e32 v10, 1, v10 ; %bb.15: ; %Flow s_or_b32 exec_lo, exec_lo, s1 .LBB0_16: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) s_or_b32 exec_lo, exec_lo, s0 v_mul_lo_u32 v0, s14, v9 s_mul_i32 s0, s15, s3 v_cmp_lt_u32_e32 vcc_lo, 2, v10 v_mad_u64_u32 v[3:4], null, v0, s33, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mad_u64_u32 v[4:5], null, s0, v3, v[1:2] v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo v_mov_b32_e32 v2, 0 v_ashrrev_i32_e32 v5, 31, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[4:5] v_add_co_u32 v0, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 376 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 2 .amdhsa_next_free_vgpr 33 .amdhsa_next_free_sgpr 92 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_, .Lfunc_end0-_Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 2428 ; NumSgprs: 94 ; NumVgprs: 33 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 11 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 94 ; NumVGPRsForWavesPerEU: 33 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 64 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 72 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 80 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 88 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 96 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 104 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 112 .size: 8 .value_kind: global_buffer - .offset: 120 .size: 4 .value_kind: hidden_block_count_x - .offset: 124 .size: 4 .value_kind: hidden_block_count_y - .offset: 128 .size: 4 .value_kind: hidden_block_count_z - .offset: 132 .size: 2 .value_kind: hidden_group_size_x - .offset: 134 .size: 2 .value_kind: hidden_group_size_y - .offset: 136 .size: 2 .value_kind: hidden_group_size_z - .offset: 138 .size: 2 .value_kind: hidden_remainder_x - .offset: 140 .size: 2 .value_kind: hidden_remainder_y - .offset: 142 .size: 2 .value_kind: hidden_remainder_z - .offset: 160 .size: 8 .value_kind: hidden_global_offset_x - .offset: 168 .size: 8 .value_kind: hidden_global_offset_y - .offset: 176 .size: 8 .value_kind: hidden_global_offset_z - .offset: 184 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 376 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_ .private_segment_fixed_size: 0 .sgpr_count: 94 .sgpr_spill_count: 0 .symbol: _Z7mappingPdPKdS1_S1_S1_S1_S1_S1_S1_S1_S1_S1_S1_PKiS3_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 33 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
5f65d443bf3bfb5e99315760fad2606b935fe928
#include "includes.h" using namespace std; // parameter describing the size of matrix A const int rows = 4096; const int cols = 4096; const int BLOCK_SIZE = 16; // transpose shared kernel // transpose kernel __global__ void transpose_naive(float* a, float*b) { int x = blockIdx.x * blockDim.x + threadIdx.x; int y = blockIdx.y * blockDim.y + threadIdx.y; int width = gridDim.x * blockDim.x; int height = gridDim.y * blockDim.y; // perform transpose if (x < height && y < width) { b[x*height + y] = a[y*width + x]; } }
.file "tmpxft_002afe7c_00000000-6_transpose_naive.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z37__device_stub__Z15transpose_naivePfS_PfS_ .type _Z37__device_stub__Z15transpose_naivePfS_PfS_, @function _Z37__device_stub__Z15transpose_naivePfS_PfS_: .LFB2032: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z15transpose_naivePfS_(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L2: movq 104(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z37__device_stub__Z15transpose_naivePfS_PfS_, .-_Z37__device_stub__Z15transpose_naivePfS_PfS_ .globl _Z15transpose_naivePfS_ .type _Z15transpose_naivePfS_, @function _Z15transpose_naivePfS_: .LFB2033: .cfi_startproc endbr64 jmp _Z37__device_stub__Z15transpose_naivePfS_PfS_ .cfi_endproc .LFE2033: .size _Z15transpose_naivePfS_, .-_Z15transpose_naivePfS_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z15transpose_naivePfS_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z15transpose_naivePfS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z15transpose_naivePfS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e220000002600 */ /*0020*/ ULDC UR4, c[0x0][0xc] ; /* 0x0000030000047ab9 */ /* 0x000fe40000000800 */ /*0030*/ ULDC.64 UR6, c[0x0][0x0] ; /* 0x0000000000067ab9 */ /* 0x000fe20000000a00 */ /*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */ /* 0x000e220000002200 */ /*0050*/ UIMAD UR4, UR4, UR6, URZ ; /* 0x00000006040472a4 */ /* 0x000fe4000f8e023f */ /*0060*/ ULDC UR5, c[0x0][0x10] ; /* 0x0000040000057ab9 */ /* 0x000fe20000000800 */ /*0070*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e620000002500 */ /*0080*/ UIMAD UR5, UR5, UR7, URZ ; /* 0x00000007050572a4 */ /* 0x000fc6000f8e023f */ /*0090*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e620000002100 */ /*00a0*/ IMAD R5, R5, c[0x0][0x4], R2 ; /* 0x0000010005057a24 */ /* 0x001fca00078e0202 */ /*00b0*/ ISETP.GE.AND P0, PT, R5, UR4, PT ; /* 0x0000000405007c0c */ /* 0x000fe2000bf06270 */ /*00c0*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x002fca00078e0203 */ /*00d0*/ ISETP.GE.OR P0, PT, R0, UR5, P0 ; /* 0x0000000500007c0c */ /* 0x000fda0008706670 */ /*00e0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00f0*/ MOV R4, 0x4 ; /* 0x0000000400047802 */ /* 0x000fe20000000f00 */ /*0100*/ IMAD R2, R5, UR4, R0 ; /* 0x0000000405027c24 */ /* 0x000fe2000f8e0200 */ /*0110*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fc60000000a00 */ /*0120*/ IMAD.WIDE R2, R2, R4, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fcc00078e0204 */ /*0130*/ LDG.E R3, [R2.64] ; /* 0x0000000602037981 */ /* 0x000ea2000c1e1900 */ /*0140*/ IMAD R5, R0, UR5, R5 ; /* 0x0000000500057c24 */ /* 0x000fc8000f8e0205 */ /*0150*/ IMAD.WIDE R4, R5, R4, c[0x0][0x168] ; /* 0x00005a0005047625 */ /* 0x000fca00078e0204 */ /*0160*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x004fe2000c101906 */ /*0170*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0180*/ BRA 0x180; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" using namespace std; // parameter describing the size of matrix A const int rows = 4096; const int cols = 4096; const int BLOCK_SIZE = 16; // transpose shared kernel // transpose kernel __global__ void transpose_naive(float* a, float*b) { int x = blockIdx.x * blockDim.x + threadIdx.x; int y = blockIdx.y * blockDim.y + threadIdx.y; int width = gridDim.x * blockDim.x; int height = gridDim.y * blockDim.y; // perform transpose if (x < height && y < width) { b[x*height + y] = a[y*width + x]; } }
.text .file "transpose_naive.hip" .globl _Z30__device_stub__transpose_naivePfS_ # -- Begin function _Z30__device_stub__transpose_naivePfS_ .type _Z30__device_stub__transpose_naivePfS_,@function _Z30__device_stub__transpose_naivePfS_: # @_Z30__device_stub__transpose_naivePfS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z15transpose_naivePfS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z30__device_stub__transpose_naivePfS_, .Lfunc_end0-_Z30__device_stub__transpose_naivePfS_ .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z15transpose_naivePfS_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z15transpose_naivePfS_,@object # @_Z15transpose_naivePfS_ .section .rodata,"a",@progbits .globl _Z15transpose_naivePfS_ .p2align 3, 0x0 _Z15transpose_naivePfS_: .quad _Z30__device_stub__transpose_naivePfS_ .size _Z15transpose_naivePfS_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z15transpose_naivePfS_" .size .L__unnamed_1, 24 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z30__device_stub__transpose_naivePfS_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z15transpose_naivePfS_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z15transpose_naivePfS_ ; -- Begin function _Z15transpose_naivePfS_ .globl _Z15transpose_naivePfS_ .p2align 8 .type _Z15transpose_naivePfS_,@function _Z15transpose_naivePfS_: ; @_Z15transpose_naivePfS_ ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x1c s_load_b64 s[2:3], s[0:1], 0x10 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s5, s4, 16 s_and_b32 s4, s4, 0xffff s_mul_i32 s3, s3, s5 v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4] s_mul_i32 s4, s2, s4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s3, v0 v_cmp_gt_i32_e64 s2, s4, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[8:11], s[0:1], 0x0 v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v3, 31, v2 v_lshlrev_b64 v[2:3], 2, v[2:3] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s8, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo global_load_b32 v4, v[2:3], off v_mad_u64_u32 v[2:3], null, s3, v0, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v3, 31, v2 v_lshlrev_b64 v[0:1], 2, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, s10, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo s_waitcnt vmcnt(0) global_store_b32 v[0:1], v4, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z15transpose_naivePfS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 5 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z15transpose_naivePfS_, .Lfunc_end0-_Z15transpose_naivePfS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 232 ; NumSgprs: 18 ; NumVgprs: 5 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 5 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z15transpose_naivePfS_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z15transpose_naivePfS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 5 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
8a1a18388e4cba2bfa4dd0aba4976a3558a8f711
#include <stdio.h> template <typename T> struct SinFunctor { __host__ __device__ T operator()(const T& x) const { return sinf(x); } }; template <typename T> struct CosFunctor { __host__ __device__ T operator()(const T& x) const { return cosf(x); } }; struct OrderFunctor { const float num_oscilators; OrderFunctor(float _num_oscilators) : num_oscilators(_num_oscilators) {} __host__ __device__ float operator()(const float& x, const float& y) const { return sqrtf(powf(x, 2)+powf(y, 2))/num_oscilators; } }; __global__ void kernel_heuns(int num_oscilators, int num_couplings, float *phases_new, float *phases_old, float *omegas,float *couplings, float dt, int *indices, int *ptr) { int i_thread = blockIdx.x * blockDim.x + threadIdx.x; int stride = blockDim.x * gridDim.x; for (int index =i_thread; index < num_oscilators*num_couplings; index += stride){ float findex = (float)index; float fnum_oscilators = (float)num_oscilators; float fi_section = (findex+1)/fnum_oscilators-1; fi_section=ceil(fi_section); int i_section = (int)fi_section; //int i_section = (int)ceil(((float)index+1)/(float)num_oscilators-1); int i_node = index - i_section*num_oscilators; float coupling = couplings[i_section]; float phase = phases_old[index]; float omega = omegas[i_node]; int i_nei = 0; float f = 0; float f_tild = 0; float phase_tild = 0.; for( int i_ptr = ptr[i_node]; i_ptr < ptr[i_node+1]; i_ptr = i_ptr + 1 ) { i_nei = indices[i_ptr]+ i_section*num_oscilators; f += coupling*sinf( phases_old[i_nei] -phase); }; f = f + omega; phase_tild = phase + dt*f; for( int i_ptr = ptr[i_node]; i_ptr < ptr[i_node+1]; i_ptr = i_ptr + 1 ) { i_nei = indices[i_ptr]+ i_section*num_oscilators; f_tild += coupling*sinf( phases_old[i_nei] - phase_tild); }; f_tild = f_tild + omega; phases_new[index] = phase + dt*(f+f_tild)/2.; } }
.file "tmpxft_00333205_00000000-6_kernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2035: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2035: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z46__device_stub__Z12kernel_heunsiiPfS_S_S_fPiS0_iiPfS_S_S_fPiS0_ .type _Z46__device_stub__Z12kernel_heunsiiPfS_S_S_fPiS0_iiPfS_S_S_fPiS0_, @function _Z46__device_stub__Z12kernel_heunsiiPfS_S_S_fPiS0_iiPfS_S_S_fPiS0_: .LFB2057: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq 224(%rsp), %rax movl %edi, 60(%rsp) leaq 80(%rsp), %rdi movl %esi, 56(%rsp) leaq 92(%rsp), %rsi movq %rax, 8(%rsp) movq 232(%rsp), %rax movq %rdx, 48(%rsp) leaq 64(%rsp), %rdx movq %rcx, 40(%rsp) leaq 72(%rsp), %rcx movq %r8, 32(%rsp) movq %r9, 24(%rsp) movq %rax, (%rsp) movss %xmm0, 20(%rsp) movq %fs:40, %rax movq %rax, 200(%rsp) xorl %eax, %eax leaq 60(%rsp), %rax movl $1, 88(%rsp) movq %rax, 128(%rsp) leaq 56(%rsp), %rax movq %rax, 136(%rsp) leaq 48(%rsp), %rax movq %rax, 144(%rsp) leaq 40(%rsp), %rax movq %rax, 152(%rsp) leaq 32(%rsp), %rax movq %rax, 160(%rsp) leaq 24(%rsp), %rax movq %rax, 168(%rsp) leaq 20(%rsp), %rax movq %rax, 176(%rsp) leaq 8(%rsp), %rax movq %rax, 184(%rsp) movq %rsp, %rax movq %rax, 192(%rsp) movabsq $4294967297, %rax movq %rax, 80(%rsp) movq %rax, 92(%rsp) movl $1, 100(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 72(%rsp) .cfi_def_cfa_offset 232 leaq _Z12kernel_heunsiiPfS_S_S_fPiS0_(%rip), %rdi pushq 72(%rsp) .cfi_def_cfa_offset 240 movq 108(%rsp), %rcx movl 116(%rsp), %r8d movq 96(%rsp), %rsi movl 104(%rsp), %edx leaq 144(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 232 popq %rdx .cfi_def_cfa_offset 224 .L2: movq 200(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2057: .size _Z46__device_stub__Z12kernel_heunsiiPfS_S_S_fPiS0_iiPfS_S_S_fPiS0_, .-_Z46__device_stub__Z12kernel_heunsiiPfS_S_S_fPiS0_iiPfS_S_S_fPiS0_ .globl _Z12kernel_heunsiiPfS_S_S_fPiS0_ .type _Z12kernel_heunsiiPfS_S_S_fPiS0_, @function _Z12kernel_heunsiiPfS_S_S_fPiS0_: .LFB2058: .cfi_startproc endbr64 jmp _Z46__device_stub__Z12kernel_heunsiiPfS_S_S_fPiS0_iiPfS_S_S_fPiS0_ .cfi_endproc .LFE2058: .size _Z12kernel_heunsiiPfS_S_S_fPiS0_, .-_Z12kernel_heunsiiPfS_S_S_fPiS0_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z12kernel_heunsiiPfS_S_S_fPiS0_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2060: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z12kernel_heunsiiPfS_S_S_fPiS0_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2060: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z12kernel_heunsiiPfS_S_S_fPiS0_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fc600078e00ff */ /*0010*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IADD3 R1, R1, -0x20, RZ ; /* 0xffffffe001017810 */ /* 0x000fe20007ffe0ff */ /*0040*/ UIMAD UR5, UR5, UR4, URZ ; /* 0x00000004050572a4 */ /* 0x000fe2000f8e023f */ /*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0060*/ IMAD R8, R8, c[0x0][0x0], R3 ; /* 0x0000000008087a24 */ /* 0x001fca00078e0203 */ /*0070*/ ISETP.GE.AND P0, PT, R8, UR5, PT ; /* 0x0000000508007c0c */ /* 0x000fda000bf06270 */ /*0080*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0090*/ I2FP.F32.S32 R9, c[0x0][0x160] ; /* 0x0000580000097a45 */ /* 0x000fe20000201400 */ /*00a0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fc60000000a00 */ /*00b0*/ MUFU.RCP R2, R9 ; /* 0x0000000900027308 */ /* 0x001e220000001000 */ /*00c0*/ I2FP.F32.S32 R0, R8 ; /* 0x0000000800007245 */ /* 0x000fe20000201400 */ /*00d0*/ BSSY B0, 0x1a0 ; /* 0x000000c000007945 */ /* 0x000fe80003800000 */ /*00e0*/ FADD R0, R0, 1 ; /* 0x3f80000000007421 */ /* 0x000fc80000000000 */ /*00f0*/ FCHK P0, R0, R9 ; /* 0x0000000900007302 */ /* 0x000e620000000000 */ /*0100*/ FFMA R3, -R9, R2, 1 ; /* 0x3f80000009037423 */ /* 0x001fc80000000102 */ /*0110*/ FFMA R3, R2, R3, R2 ; /* 0x0000000302037223 */ /* 0x000fc80000000002 */ /*0120*/ FFMA R2, R0, R3, RZ ; /* 0x0000000300027223 */ /* 0x000fc800000000ff */ /*0130*/ FFMA R4, -R9, R2, R0 ; /* 0x0000000209047223 */ /* 0x000fc80000000100 */ /*0140*/ FFMA R2, R3, R4, R2 ; /* 0x0000000403027223 */ /* 0x000fe20000000002 */ /*0150*/ @!P0 BRA 0x190 ; /* 0x0000003000008947 */ /* 0x002fea0003800000 */ /*0160*/ MOV R2, 0x180 ; /* 0x0000018000027802 */ /* 0x000fe40000000f00 */ /*0170*/ CALL.REL.NOINC 0x10b0 ; /* 0x00000f3000007944 */ /* 0x000fea0003c00000 */ /*0180*/ IMAD.MOV.U32 R2, RZ, RZ, R5 ; /* 0x000000ffff027224 */ /* 0x001fe400078e0005 */ /*0190*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*01a0*/ FADD R17, R2, -1 ; /* 0xbf80000002117421 */ /* 0x000fe20000000000 */ /*01b0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */ /* 0x000fca00078e00ff */ /*01c0*/ F2I.CEIL.NTZ R17, R17 ; /* 0x0000001100117305 */ /* 0x000e24000020b100 */ /*01d0*/ IMAD.MOV R3, RZ, RZ, -R17 ; /* 0x000000ffff037224 */ /* 0x001fc800078e0a11 */ /*01e0*/ IMAD R6, R3, c[0x0][0x160], R8 ; /* 0x0000580003067a24 */ /* 0x000fc800078e0208 */ /*01f0*/ IMAD.WIDE R18, R6.reuse, R7, c[0x0][0x198] ; /* 0x0000660006127625 */ /* 0x040fe200078e0207 */ /*0200*/ IADD3 R20, R6, 0x1, RZ ; /* 0x0000000106147810 */ /* 0x000fc80007ffe0ff */ /*0210*/ LDG.E R16, [R18.64] ; /* 0x0000000612107981 */ /* 0x0000a2000c1e1900 */ /*0220*/ IMAD.WIDE R20, R20, R7, c[0x0][0x198] ; /* 0x0000660014147625 */ /* 0x000fca00078e0207 */ /*0230*/ LDG.E R15, [R20.64] ; /* 0x00000006140f7981 */ /* 0x000ea2000c1e1900 */ /*0240*/ IMAD.WIDE R4, R8, R7, c[0x0][0x170] ; /* 0x00005c0008047625 */ /* 0x000fc800078e0207 */ /*0250*/ IMAD.WIDE R2, R17, R7.reuse, c[0x0][0x180] ; /* 0x0000600011027625 */ /* 0x080fe200078e0207 */ /*0260*/ LDG.E R14, [R4.64] ; /* 0x00000006040e7981 */ /* 0x000366000c1e1900 */ /*0270*/ IMAD.WIDE R6, R6, R7, c[0x0][0x178] ; /* 0x00005e0006067625 */ /* 0x000fe200078e0207 */ /*0280*/ LDG.E R12, [R2.64] ; /* 0x00000006020c7981 */ /* 0x000368000c1e1900 */ /*0290*/ LDG.E R10, [R6.64] ; /* 0x00000006060a7981 */ /* 0x000362000c1e1900 */ /*02a0*/ BSSY B0, 0x940 ; /* 0x0000069000007945 */ /* 0x000fe20003800000 */ /*02b0*/ SHF.R.S32.HI R13, RZ, 0x1f, R8 ; /* 0x0000001fff0d7819 */ /* 0x000fe20000011408 */ /*02c0*/ IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b7224 */ /* 0x000fc400078e00ff */ /*02d0*/ IMAD.MOV.U32 R19, RZ, RZ, RZ ; /* 0x000000ffff137224 */ /* 0x001fe200078e00ff */ /*02e0*/ ISETP.GE.AND P0, PT, R16, R15, PT ; /* 0x0000000f1000720c */ /* 0x004fda0003f06270 */ /*02f0*/ @P0 BRA 0x930 ; /* 0x0000063000000947 */ /* 0x000fea0003800000 */ /*0300*/ IMAD.MOV.U32 R19, RZ, RZ, RZ ; /* 0x000000ffff137224 */ /* 0x002fe400078e00ff */ /*0310*/ IMAD.MOV.U32 R18, RZ, RZ, R16 ; /* 0x000000ffff127224 */ /* 0x000fe400078e0010 */ /*0320*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*0330*/ IMAD.WIDE R2, R18, R5, c[0x0][0x190] ; /* 0x0000640012027625 */ /* 0x000fcc00078e0205 */ /*0340*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000ea4000c1e1900 */ /*0350*/ IMAD R4, R17, c[0x0][0x160], R2 ; /* 0x0000580011047a24 */ /* 0x004fc800078e0202 */ /*0360*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x000fcc00078e0205 */ /*0370*/ LDG.E R5, [R4.64] ; /* 0x0000000604057981 */ /* 0x000ea2000c1e1900 */ /*0380*/ IADD3 R18, R18, 0x1, RZ ; /* 0x0000000112127810 */ /* 0x000fe20007ffe0ff */ /*0390*/ BSSY B1, 0x810 ; /* 0x0000047000017945 */ /* 0x000fe60003800000 */ /*03a0*/ ISETP.GE.AND P1, PT, R18, R15, PT ; /* 0x0000000f1200720c */ /* 0x000fe20003f26270 */ /*03b0*/ FADD R20, -R14, R5 ; /* 0x000000050e147221 */ /* 0x024fc80000000100 */ /*03c0*/ FMUL R0, R20.reuse, 0.63661974668502807617 ; /* 0x3f22f98314007820 */ /* 0x040fe20000400000 */ /*03d0*/ FSETP.GE.AND P2, PT, |R20|, 105615, PT ; /* 0x47ce47801400780b */ /* 0x000fca0003f46200 */ /*03e0*/ F2I.NTZ R0, R0 ; /* 0x0000000000007305 */ /* 0x000e240000203100 */ /*03f0*/ I2FP.F32.S32 R7, R0 ; /* 0x0000000000077245 */ /* 0x001fca0000201400 */ /*0400*/ FFMA R6, R7, -1.5707962512969970703, R20 ; /* 0xbfc90fda07067823 */ /* 0x000fc80000000014 */ /*0410*/ FFMA R6, R7, -7.5497894158615963534e-08, R6 ; /* 0xb3a2216807067823 */ /* 0x000fc80000000006 */ /*0420*/ FFMA R6, R7, -5.3903029534742383927e-15, R6 ; /* 0xa7c234c507067823 */ /* 0x000fe20000000006 */ /*0430*/ @!P2 BRA 0x800 ; /* 0x000003c00000a947 */ /* 0x000fea0003800000 */ /*0440*/ FSETP.NEU.AND P2, PT, |R20|, +INF , PT ; /* 0x7f8000001400780b */ /* 0x000fda0003f4d200 */ /*0450*/ @!P2 BRA 0x7e0 ; /* 0x000003800000a947 */ /* 0x000fea0003800000 */ /*0460*/ SHF.R.U32.HI R0, RZ, 0x17, R20 ; /* 0x00000017ff007819 */ /* 0x000fe20000011614 */ /*0470*/ IMAD.SHL.U32 R2, R20, 0x100, RZ ; /* 0x0000010014027824 */ /* 0x000fe200078e00ff */ /*0480*/ CS2R R6, SRZ ; /* 0x0000000000067805 */ /* 0x000fe2000001ff00 */ /*0490*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*04a0*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fe200078ec0ff */ /*04b0*/ ULDC.64 UR8, c[0x4][0x0] ; /* 0x0100000000087ab9 */ /* 0x000fe20000000a00 */ /*04c0*/ LOP3.LUT R23, R2, 0x80000000, RZ, 0xfc, !PT ; /* 0x8000000002177812 */ /* 0x000fe400078efcff */ /*04d0*/ IADD3 R22, R0, -0x80, RZ ; /* 0xffffff8000167810 */ /* 0x000fe20007ffe0ff */ /*04e0*/ IMAD.MOV.U32 R0, RZ, RZ, R1 ; /* 0x000000ffff007224 */ /* 0x000fc600078e0001 */ /*04f0*/ SHF.R.U32.HI R24, RZ, 0x5, R22 ; /* 0x00000005ff187819 */ /* 0x000fe40000011616 */ /*0500*/ IMAD.U32 R4, RZ, RZ, UR8 ; /* 0x00000008ff047e24 */ /* 0x000fe4000f8e00ff */ /*0510*/ IMAD.U32 R5, RZ, RZ, UR9 ; /* 0x00000009ff057e24 */ /* 0x000fca000f8e00ff */ /*0520*/ LDG.E.CONSTANT R2, [R4.64] ; /* 0x0000000604027981 */ /* 0x000ea2000c1e9900 */ /*0530*/ IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107077810 */ /* 0x000fe20007ffe0ff */ /*0540*/ UIADD3 UR8, UP0, UR8, 0x4, URZ ; /* 0x0000000408087890 */ /* 0x000fc6000ff1e03f */ /*0550*/ ISETP.NE.AND P2, PT, R7, 0x6, PT ; /* 0x000000060700780c */ /* 0x000fe20003f45270 */ /*0560*/ UIADD3.X UR9, URZ, UR9, URZ, UP0, !UPT ; /* 0x000000093f097290 */ /* 0x000fe200087fe43f */ /*0570*/ IMAD.WIDE.U32 R2, R2, R23, RZ ; /* 0x0000001702027225 */ /* 0x004fca00078e00ff */ /*0580*/ IADD3 R21, P3, R2, R6, RZ ; /* 0x0000000602157210 */ /* 0x000fc80007f7e0ff */ /*0590*/ IADD3.X R6, R3, UR4, RZ, P3, !PT ; /* 0x0000000403067c10 */ /* 0x000fe20009ffe4ff */ /*05a0*/ STL [R0], R21 ; /* 0x0000001500007387 */ /* 0x0001e40000100800 */ /*05b0*/ IADD3 R0, R0, 0x4, RZ ; /* 0x0000000400007810 */ /* 0x001fe20007ffe0ff */ /*05c0*/ @P2 BRA 0x500 ; /* 0xffffff3000002947 */ /* 0x000fea000383ffff */ /*05d0*/ LOP3.LUT P2, R7, R22, 0x1f, RZ, 0xc0, !PT ; /* 0x0000001f16077812 */ /* 0x000fe2000784c0ff */ /*05e0*/ STL [R1+0x18], R6 ; /* 0x0000180601007387 */ /* 0x0001e20000100800 */ /*05f0*/ IADD3 R22, -R24.reuse, 0x4, RZ ; /* 0x0000000418167810 */ /* 0x040fe40007ffe1ff */ /*0600*/ IADD3 R0, -R24, 0x6, RZ ; /* 0x0000000618007810 */ /* 0x000fca0007ffe1ff */ /*0610*/ IMAD R21, R0, 0x4, R1 ; /* 0x0000000400157824 */ /* 0x000fc800078e0201 */ /*0620*/ @P2 IMAD R22, R22, 0x4, R1 ; /* 0x0000000416162824 */ /* 0x000fe200078e0201 */ /*0630*/ LDL R0, [R21] ; /* 0x0000000015007983 */ /* 0x000ea80000100800 */ /*0640*/ @P2 LDL R5, [R22] ; /* 0x0000000016052983 */ /* 0x000ee80000100800 */ /*0650*/ LDL R3, [R21+-0x4] ; /* 0xfffffc0015037983 */ /* 0x000f220000100800 */ /*0660*/ @P2 IADD3 R2, -R7, 0x20, RZ ; /* 0x0000002007022810 */ /* 0x000fc80007ffe1ff */ /*0670*/ @P2 SHF.R.U32.HI R4, RZ, R2.reuse, R5 ; /* 0x00000002ff042219 */ /* 0x088fe40000011605 */ /*0680*/ @P2 SHF.L.U32 R5, R0, R7.reuse, RZ ; /* 0x0000000700052219 */ /* 0x084fe400000006ff */ /*0690*/ @P2 SHF.R.U32.HI R2, RZ, R2, R3 ; /* 0x00000002ff022219 */ /* 0x010fe40000011603 */ /*06a0*/ @P2 SHF.L.U32 R7, R3, R7, RZ ; /* 0x0000000703072219 */ /* 0x000fc600000006ff */ /*06b0*/ @P2 IMAD.IADD R0, R2, 0x1, R5 ; /* 0x0000000102002824 */ /* 0x000fe400078e0205 */ /*06c0*/ @P2 IMAD.IADD R3, R4, 0x1, R7 ; /* 0x0000000104032824 */ /* 0x000fca00078e0207 */ /*06d0*/ SHF.L.U32.HI R5, R3, 0x2, R0 ; /* 0x0000000203057819 */ /* 0x000fc80000010600 */ /*06e0*/ SHF.R.U32.HI R7, RZ, 0x1f, R5 ; /* 0x0000001fff077819 */ /* 0x000fc80000011605 */ /*06f0*/ ISETP.NE.AND P3, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe20003f65270 */ /*0700*/ IMAD.SHL.U32 R4, R3, 0x4, RZ ; /* 0x0000000403047824 */ /* 0x000fd800078e00ff */ /*0710*/ @P3 LOP3.LUT R5, RZ, R5, RZ, 0x33, !PT ; /* 0x00000005ff053212 */ /* 0x000fe400078e33ff */ /*0720*/ @P3 LOP3.LUT R4, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff043212 */ /* 0x000fc800078e33ff */ /*0730*/ I2F.F64.S64 R2, R4 ; /* 0x0000000400027312 */ /* 0x000e620000301c00 */ /*0740*/ LOP3.LUT P2, R20, R20, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000014147812 */ /* 0x000fe2000784c0ff */ /*0750*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x002e620000000000 */ /*0760*/ LEA.HI R0, R0, R7, RZ, 0x2 ; /* 0x0000000700007211 */ /* 0x000fd200078f10ff */ /*0770*/ F2F.F32.F64 R2, R2 ; /* 0x0000000200027310 */ /* 0x002e620000301000 */ /*0780*/ @P3 LOP3.LUT R20, R20, 0x80000000, RZ, 0x3c, !PT ; /* 0x8000000014143812 */ /* 0x000fe200078e3cff */ /*0790*/ IMAD.MOV R6, RZ, RZ, -R0 ; /* 0x000000ffff067224 */ /* 0x001fc600078e0a00 */ /*07a0*/ ISETP.NE.AND P3, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fe20003f65270 */ /*07b0*/ @P2 IMAD.MOV.U32 R0, RZ, RZ, R6 ; /* 0x000000ffff002224 */ /* 0x000fc600078e0006 */ /*07c0*/ FSEL R6, R2, -R2, !P3 ; /* 0x8000000202067208 */ /* 0x002fe20005800000 */ /*07d0*/ BRA 0x800 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*07e0*/ FMUL R6, RZ, R20 ; /* 0x00000014ff067220 */ /* 0x000fe20000400000 */ /*07f0*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe400078e00ff */ /*0800*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0810*/ LOP3.LUT P3, RZ, R0, 0x1, RZ, 0xc0, !PT ; /* 0x0000000100ff7812 */ /* 0x000fe2000786c0ff */ /*0820*/ IMAD.MOV.U32 R3, RZ, RZ, 0x3c0885e4 ; /* 0x3c0885e4ff037424 */ /* 0x000fe200078e00ff */ /*0830*/ FMUL R7, R6, R6 ; /* 0x0000000606077220 */ /* 0x000fe20000400000 */ /*0840*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3e2aaaa8 ; /* 0x3e2aaaa8ff057424 */ /* 0x000fe200078e00ff */ /*0850*/ LOP3.LUT P2, RZ, R0, 0x2, RZ, 0xc0, !PT ; /* 0x0000000200ff7812 */ /* 0x000fe2000784c0ff */ /*0860*/ IMAD.MOV.U32 R2, RZ, RZ, -0x46b2bead ; /* 0xb94d4153ff027424 */ /* 0x000fe200078e00ff */ /*0870*/ FSEL R3, R3, 0.041666727513074874878, !P3 ; /* 0x3d2aaabb03037808 */ /* 0x000fe40005800000 */ /*0880*/ FSEL R0, R6, 1, !P3 ; /* 0x3f80000006007808 */ /* 0x000fc40005800000 */ /*0890*/ FSEL R5, -R5, -0.4999999701976776123, !P3 ; /* 0xbeffffff05057808 */ /* 0x000fc60005800100 */ /*08a0*/ @P3 IMAD.MOV.U32 R4, RZ, RZ, 0x37cbac00 ; /* 0x37cbac00ff043424 */ /* 0x000fc800078e00ff */ /*08b0*/ @P3 FFMA R2, R7, R4, -0.0013887860113754868507 ; /* 0xbab607ed07023423 */ /* 0x000fc80000000004 */ /*08c0*/ FFMA R2, R7, R2, R3 ; /* 0x0000000207027223 */ /* 0x000fe20000000003 */ /*08d0*/ FFMA R3, R0, R7, RZ ; /* 0x0000000700037223 */ /* 0x000fc600000000ff */ /*08e0*/ FFMA R5, R7, R2, R5 ; /* 0x0000000207057223 */ /* 0x000fc80000000005 */ /*08f0*/ FFMA R0, R5, R3, R0 ; /* 0x0000000305007223 */ /* 0x000fc80000000000 */ /*0900*/ @P2 FFMA R0, R0, -1, RZ ; /* 0xbf80000000002823 */ /* 0x000fc800000000ff */ /*0910*/ FFMA R19, R12, R0, R19 ; /* 0x000000000c137223 */ /* 0x000fe20000000013 */ /*0920*/ @!P1 BRA 0x320 ; /* 0xfffff9f000009947 */ /* 0x000fea000383ffff */ /*0930*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x002fea0003800000 */ /*0940*/ BSSY B0, 0xfb0 ; /* 0x0000066000007945 */ /* 0x000fe20003800000 */ /*0950*/ FADD R19, R10, R19 ; /* 0x000000130a137221 */ /* 0x020fe20000000000 */ /*0960*/ @P0 BRA 0xfa0 ; /* 0x0000063000000947 */ /* 0x000fea0003800000 */ /*0970*/ FFMA R18, R19, c[0x0][0x188], R14 ; /* 0x0000620013127a23 */ /* 0x000fe2000000000e */ /*0980*/ IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e00ff */ /*0990*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*09a0*/ IMAD.WIDE R2, R16, R5, c[0x0][0x190] ; /* 0x0000640010027625 */ /* 0x000fcc00078e0205 */ /*09b0*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000ea4000c1e1900 */ /*09c0*/ IMAD R4, R17, c[0x0][0x160], R2 ; /* 0x0000580011047a24 */ /* 0x004fc800078e0202 */ /*09d0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x000fcc00078e0205 */ /*09e0*/ LDG.E R5, [R4.64] ; /* 0x0000000604057981 */ /* 0x000ea2000c1e1900 */ /*09f0*/ IADD3 R16, R16, 0x1, RZ ; /* 0x0000000110107810 */ /* 0x000fe20007ffe0ff */ /*0a00*/ BSSY B1, 0xe80 ; /* 0x0000047000017945 */ /* 0x000fe60003800000 */ /*0a10*/ ISETP.GE.AND P0, PT, R16, R15, PT ; /* 0x0000000f1000720c */ /* 0x000fe20003f06270 */ /*0a20*/ FADD R20, -R18, R5 ; /* 0x0000000512147221 */ /* 0x004fc80000000100 */ /*0a30*/ FMUL R0, R20.reuse, 0.63661974668502807617 ; /* 0x3f22f98314007820 */ /* 0x040fe20000400000 */ /*0a40*/ FSETP.GE.AND P1, PT, |R20|, 105615, PT ; /* 0x47ce47801400780b */ /* 0x000fca0003f26200 */ /*0a50*/ F2I.NTZ R0, R0 ; /* 0x0000000000007305 */ /* 0x000e240000203100 */ /*0a60*/ I2FP.F32.S32 R7, R0 ; /* 0x0000000000077245 */ /* 0x001fca0000201400 */ /*0a70*/ FFMA R6, R7, -1.5707962512969970703, R20 ; /* 0xbfc90fda07067823 */ /* 0x000fc80000000014 */ /*0a80*/ FFMA R6, R7, -7.5497894158615963534e-08, R6 ; /* 0xb3a2216807067823 */ /* 0x000fc80000000006 */ /*0a90*/ FFMA R6, R7, -5.3903029534742383927e-15, R6 ; /* 0xa7c234c507067823 */ /* 0x000fe20000000006 */ /*0aa0*/ @!P1 BRA 0xe70 ; /* 0x000003c000009947 */ /* 0x000fea0003800000 */ /*0ab0*/ FSETP.NEU.AND P1, PT, |R20|, +INF , PT ; /* 0x7f8000001400780b */ /* 0x000fda0003f2d200 */ /*0ac0*/ @!P1 BRA 0xe50 ; /* 0x0000038000009947 */ /* 0x000fea0003800000 */ /*0ad0*/ SHF.R.U32.HI R0, RZ, 0x17, R20 ; /* 0x00000017ff007819 */ /* 0x000fe20000011614 */ /*0ae0*/ IMAD.SHL.U32 R4, R20, 0x100, RZ ; /* 0x0000010014047824 */ /* 0x000fe200078e00ff */ /*0af0*/ CS2R R2, SRZ ; /* 0x0000000000027805 */ /* 0x000fe2000001ff00 */ /*0b00*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fe200078e00ff */ /*0b10*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fe200078ec0ff */ /*0b20*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*0b30*/ LOP3.LUT R25, R4, 0x80000000, RZ, 0xfc, !PT ; /* 0x8000000004197812 */ /* 0x000fe400078efcff */ /*0b40*/ IADD3 R21, R0, -0x80, RZ ; /* 0xffffff8000157810 */ /* 0x000fc80007ffe0ff */ /*0b50*/ SHF.R.U32.HI R24, RZ, 0x5, R21 ; /* 0x00000005ff187819 */ /* 0x000fe40000011615 */ /*0b60*/ IMAD.SHL.U32 R0, R2.reuse, 0x4, RZ ; /* 0x0000000402007824 */ /* 0x041fe200078e00ff */ /*0b70*/ SHF.L.U64.HI R3, R2, 0x2, R3 ; /* 0x0000000202037819 */ /* 0x000fc80000010203 */ /*0b80*/ IADD3 R22, P1, R0, c[0x4][0x0], RZ ; /* 0x0100000000167a10 */ /* 0x000fc80007f3e0ff */ /*0b90*/ IADD3.X R23, R3, c[0x4][0x4], RZ, P1, !PT ; /* 0x0100010003177a10 */ /* 0x000fca0000ffe4ff */ /*0ba0*/ LDG.E.CONSTANT R4, [R22.64] ; /* 0x0000000616047981 */ /* 0x000ea2000c1e9900 */ /*0bb0*/ IMAD.IADD R0, R1, 0x1, R0 ; /* 0x0000000101007824 */ /* 0x000fe200078e0200 */ /*0bc0*/ IADD3 R2, R2, 0x1, RZ ; /* 0x0000000102027810 */ /* 0x000fc80007ffe0ff */ /*0bd0*/ ISETP.NE.AND P1, PT, R2, 0x6, PT ; /* 0x000000060200780c */ /* 0x000fe40003f25270 */ /*0be0*/ SHF.R.S32.HI R3, RZ, 0x1f, R2 ; /* 0x0000001fff037819 */ /* 0x000fe20000011402 */ /*0bf0*/ IMAD.WIDE.U32 R4, R4, R25, RZ ; /* 0x0000001904047225 */ /* 0x004fca00078e00ff */ /*0c00*/ IADD3 R7, P2, R4, R6, RZ ; /* 0x0000000604077210 */ /* 0x000fc80007f5e0ff */ /*0c10*/ IADD3.X R6, R5, UR4, RZ, P2, !PT ; /* 0x0000000405067c10 */ /* 0x000fe200097fe4ff */ /*0c20*/ STL [R0], R7 ; /* 0x0000000700007387 */ /* 0x0001e20000100800 */ /*0c30*/ @P1 BRA 0xb60 ; /* 0xffffff2000001947 */ /* 0x000fea000383ffff */ /*0c40*/ LOP3.LUT P1, R7, R21, 0x1f, RZ, 0xc0, !PT ; /* 0x0000001f15077812 */ /* 0x001fe2000782c0ff */ /*0c50*/ STL [R1+0x18], R6 ; /* 0x0000180601007387 */ /* 0x0001e20000100800 */ /*0c60*/ IADD3 R22, -R24.reuse, 0x4, RZ ; /* 0x0000000418167810 */ /* 0x040fe40007ffe1ff */ /*0c70*/ IADD3 R0, -R24, 0x6, RZ ; /* 0x0000000618007810 */ /* 0x000fca0007ffe1ff */ /*0c80*/ IMAD R21, R0, 0x4, R1 ; /* 0x0000000400157824 */ /* 0x000fc800078e0201 */ /*0c90*/ @P1 IMAD R22, R22, 0x4, R1 ; /* 0x0000000416161824 */ /* 0x000fe200078e0201 */ /*0ca0*/ LDL R0, [R21] ; /* 0x0000000015007983 */ /* 0x000ea80000100800 */ /*0cb0*/ @P1 LDL R5, [R22] ; /* 0x0000000016051983 */ /* 0x000ee80000100800 */ /*0cc0*/ LDL R3, [R21+-0x4] ; /* 0xfffffc0015037983 */ /* 0x000f220000100800 */ /*0cd0*/ @P1 IADD3 R2, -R7, 0x20, RZ ; /* 0x0000002007021810 */ /* 0x000fc40007ffe1ff */ /*0ce0*/ LOP3.LUT P2, R20, R20, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000014147812 */ /* 0x000fe4000784c0ff */ /*0cf0*/ @P1 SHF.R.U32.HI R4, RZ, R2.reuse, R5 ; /* 0x00000002ff041219 */ /* 0x088fe40000011605 */ /*0d00*/ @P1 SHF.L.U32 R5, R0, R7.reuse, RZ ; /* 0x0000000700051219 */ /* 0x084fe400000006ff */ /*0d10*/ @P1 SHF.R.U32.HI R2, RZ, R2, R3 ; /* 0x00000002ff021219 */ /* 0x010fe40000011603 */ /*0d20*/ @P1 SHF.L.U32 R7, R3, R7, RZ ; /* 0x0000000703071219 */ /* 0x000fc600000006ff */ /*0d30*/ @P1 IMAD.IADD R0, R2, 0x1, R5 ; /* 0x0000000102001824 */ /* 0x000fe400078e0205 */ /*0d40*/ @P1 IMAD.IADD R3, R4, 0x1, R7 ; /* 0x0000000104031824 */ /* 0x000fca00078e0207 */ /*0d50*/ SHF.L.U32.HI R5, R3, 0x2, R0 ; /* 0x0000000203057819 */ /* 0x000fc80000010600 */ /*0d60*/ SHF.R.U32.HI R7, RZ, 0x1f, R5 ; /* 0x0000001fff077819 */ /* 0x000fc80000011605 */ /*0d70*/ ISETP.NE.AND P1, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe20003f25270 */ /*0d80*/ IMAD.SHL.U32 R4, R3, 0x4, RZ ; /* 0x0000000403047824 */ /* 0x000fd800078e00ff */ /*0d90*/ @P1 LOP3.LUT R5, RZ, R5, RZ, 0x33, !PT ; /* 0x00000005ff051212 */ /* 0x000fe400078e33ff */ /*0da0*/ @P1 LOP3.LUT R4, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff041212 */ /* 0x000fc800078e33ff */ /*0db0*/ I2F.F64.S64 R2, R4 ; /* 0x0000000400027312 */ /* 0x000e640000301c00 */ /*0dc0*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x002e620000000000 */ /*0dd0*/ LEA.HI R0, R0, R7, RZ, 0x2 ; /* 0x0000000700007211 */ /* 0x000fd200078f10ff */ /*0de0*/ F2F.F32.F64 R2, R2 ; /* 0x0000000200027310 */ /* 0x002e620000301000 */ /*0df0*/ @P1 LOP3.LUT R20, R20, 0x80000000, RZ, 0x3c, !PT ; /* 0x8000000014141812 */ /* 0x000fe200078e3cff */ /*0e00*/ IMAD.MOV R6, RZ, RZ, -R0 ; /* 0x000000ffff067224 */ /* 0x001fc600078e0a00 */ /*0e10*/ ISETP.NE.AND P1, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fe20003f25270 */ /*0e20*/ @P2 IMAD.MOV.U32 R0, RZ, RZ, R6 ; /* 0x000000ffff002224 */ /* 0x000fc600078e0006 */ /*0e30*/ FSEL R6, R2, -R2, !P1 ; /* 0x8000000202067208 */ /* 0x002fe20004800000 */ /*0e40*/ BRA 0xe70 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*0e50*/ FMUL R6, RZ, R20 ; /* 0x00000014ff067220 */ /* 0x000fe20000400000 */ /*0e60*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe400078e00ff */ /*0e70*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0e80*/ LOP3.LUT P2, RZ, R0, 0x1, RZ, 0xc0, !PT ; /* 0x0000000100ff7812 */ /* 0x000fe2000784c0ff */ /*0e90*/ IMAD.MOV.U32 R3, RZ, RZ, 0x3c0885e4 ; /* 0x3c0885e4ff037424 */ /* 0x000fe200078e00ff */ /*0ea0*/ FMUL R4, R6, R6 ; /* 0x0000000606047220 */ /* 0x000fe20000400000 */ /*0eb0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x3e2aaaa8 ; /* 0x3e2aaaa8ff077424 */ /* 0x000fe200078e00ff */ /*0ec0*/ LOP3.LUT P1, RZ, R0, 0x2, RZ, 0xc0, !PT ; /* 0x0000000200ff7812 */ /* 0x000fe2000782c0ff */ /*0ed0*/ IMAD.MOV.U32 R2, RZ, RZ, -0x46b2bead ; /* 0xb94d4153ff027424 */ /* 0x000fe200078e00ff */ /*0ee0*/ FSEL R3, R3, 0.041666727513074874878, !P2 ; /* 0x3d2aaabb03037808 */ /* 0x000fe40005000000 */ /*0ef0*/ FSEL R0, R6, 1, !P2 ; /* 0x3f80000006007808 */ /* 0x000fca0005000000 */ /*0f00*/ @P2 IMAD.MOV.U32 R5, RZ, RZ, 0x37cbac00 ; /* 0x37cbac00ff052424 */ /* 0x000fc800078e00ff */ /*0f10*/ @P2 FFMA R2, R4, R5, -0.0013887860113754868507 ; /* 0xbab607ed04022423 */ /* 0x000fe20000000005 */ /*0f20*/ FSEL R5, -R7, -0.4999999701976776123, !P2 ; /* 0xbeffffff07057808 */ /* 0x000fc60005000100 */ /*0f30*/ FFMA R2, R4, R2, R3 ; /* 0x0000000204027223 */ /* 0x000fe20000000003 */ /*0f40*/ FFMA R3, R0, R4, RZ ; /* 0x0000000400037223 */ /* 0x000fc600000000ff */ /*0f50*/ FFMA R5, R4, R2, R5 ; /* 0x0000000204057223 */ /* 0x000fc80000000005 */ /*0f60*/ FFMA R0, R5, R3, R0 ; /* 0x0000000305007223 */ /* 0x000fc80000000000 */ /*0f70*/ @P1 FFMA R0, R0, -1, RZ ; /* 0xbf80000000001823 */ /* 0x000fc800000000ff */ /*0f80*/ FFMA R11, R12, R0, R11 ; /* 0x000000000c0b7223 */ /* 0x000fe2000000000b */ /*0f90*/ @!P0 BRA 0x990 ; /* 0xfffff9f000008947 */ /* 0x000fea000383ffff */ /*0fa0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0fb0*/ FADD R10, R10, R11 ; /* 0x0000000b0a0a7221 */ /* 0x000fe20000000000 */ /*0fc0*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */ /* 0x000fe20000201800 */ /*0fd0*/ LEA R4, P0, R8.reuse, c[0x0][0x168], 0x2 ; /* 0x00005a0008047a11 */ /* 0x040fe200078010ff */ /*0fe0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff077624 */ /* 0x000fe200078e00ff */ /*0ff0*/ FADD R10, R19, R10 ; /* 0x0000000a130a7221 */ /* 0x000fe40000000000 */ /*1000*/ LEA.HI.X R5, R8, c[0x0][0x16c], R13, 0x2, P0 ; /* 0x00005b0008057a11 */ /* 0x000fe200000f140d */ /*1010*/ IMAD R8, R7, c[0x0][0xc], R8 ; /* 0x0000030007087a24 */ /* 0x000fe200078e0208 */ /*1020*/ FMUL R10, R10, c[0x0][0x188] ; /* 0x000062000a0a7a20 */ /* 0x000fc80000400000 */ /*1030*/ F2F.F64.F32 R2, R10 ; /* 0x0000000a00027310 */ /* 0x000e220000201800 */ /*1040*/ ISETP.GE.AND P0, PT, R8, UR5, PT ; /* 0x0000000508007c0c */ /* 0x000fe2000bf06270 */ /*1050*/ DFMA R2, R2, 0.5, R14 ; /* 0x3fe000000202782b */ /* 0x001e14000000000e */ /*1060*/ F2F.F32.F64 R3, R2 ; /* 0x0000000200037310 */ /* 0x001e240000301000 */ /*1070*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x0011e2000c101906 */ /*1080*/ @P0 CALL.REL.NOINC 0x10a0 ; /* 0x0000001000000944 */ /* 0x000fe20003c00000 */ /*1090*/ BRA 0xb0 ; /* 0xfffff01000007947 */ /* 0x000fea000383ffff */ /*10a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*10b0*/ SHF.R.U32.HI R4, RZ, 0x17, R9.reuse ; /* 0x00000017ff047819 */ /* 0x100fe20000011609 */ /*10c0*/ BSSY B1, 0x1720 ; /* 0x0000065000017945 */ /* 0x000fe20003800000 */ /*10d0*/ SHF.R.U32.HI R3, RZ, 0x17, R0.reuse ; /* 0x00000017ff037819 */ /* 0x100fe20000011600 */ /*10e0*/ IMAD.MOV.U32 R5, RZ, RZ, R0 ; /* 0x000000ffff057224 */ /* 0x000fe200078e0000 */ /*10f0*/ LOP3.LUT R4, R4, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff04047812 */ /* 0x000fe200078ec0ff */ /*1100*/ IMAD.MOV.U32 R6, RZ, RZ, R9 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0009 */ /*1110*/ LOP3.LUT R12, R3, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff030c7812 */ /* 0x000fe400078ec0ff */ /*1120*/ IADD3 R10, R4, -0x1, RZ ; /* 0xffffffff040a7810 */ /* 0x000fc40007ffe0ff */ /*1130*/ IADD3 R11, R12, -0x1, RZ ; /* 0xffffffff0c0b7810 */ /* 0x000fe40007ffe0ff */ /*1140*/ ISETP.GT.U32.AND P0, PT, R10, 0xfd, PT ; /* 0x000000fd0a00780c */ /* 0x000fc80003f04070 */ /*1150*/ ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ; /* 0x000000fd0b00780c */ /* 0x000fda0000704470 */ /*1160*/ @!P0 IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff078224 */ /* 0x000fe200078e00ff */ /*1170*/ @!P0 BRA 0x1300 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*1180*/ FSETP.GTU.FTZ.AND P1, PT, |R9|, +INF , PT ; /* 0x7f8000000900780b */ /* 0x000fe20003f3c200 */ /*1190*/ IMAD.MOV.U32 R3, RZ, RZ, R9 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0009 */ /*11a0*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fc80003f1c200 */ /*11b0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*11c0*/ @P0 BRA 0x1700 ; /* 0x0000053000000947 */ /* 0x000fea0003800000 */ /*11d0*/ LOP3.LUT P0, RZ, R6, 0x7fffffff, R5, 0xc8, !PT ; /* 0x7fffffff06ff7812 */ /* 0x000fda000780c805 */ /*11e0*/ @!P0 BRA 0x16e0 ; /* 0x000004f000008947 */ /* 0x000fea0003800000 */ /*11f0*/ FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ; /* 0x7f8000000000780b */ /* 0x040fe40003f5d200 */ /*1200*/ FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f3d200 */ /*1210*/ FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fd60003f1d200 */ /*1220*/ @!P1 BRA !P2, 0x16e0 ; /* 0x000004b000009947 */ /* 0x000fea0005000000 */ /*1230*/ LOP3.LUT P2, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff05ff7812 */ /* 0x000fc8000784c0ff */ /*1240*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*1250*/ @P1 BRA 0x16c0 ; /* 0x0000046000001947 */ /* 0x000fea0003800000 */ /*1260*/ LOP3.LUT P1, RZ, R6, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff06ff7812 */ /* 0x000fc8000782c0ff */ /*1270*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*1280*/ @P0 BRA 0x1690 ; /* 0x0000040000000947 */ /* 0x000fea0003800000 */ /*1290*/ ISETP.GE.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe40003f06270 */ /*12a0*/ ISETP.GE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fd60003f26270 */ /*12b0*/ @P0 IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff070224 */ /* 0x000fe200078e00ff */ /*12c0*/ @!P0 FFMA R5, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000058823 */ /* 0x000fe200000000ff */ /*12d0*/ @!P0 IMAD.MOV.U32 R7, RZ, RZ, -0x40 ; /* 0xffffffc0ff078424 */ /* 0x000fe200078e00ff */ /*12e0*/ @!P1 FFMA R6, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003069823 */ /* 0x000fc800000000ff */ /*12f0*/ @!P1 IADD3 R7, R7, 0x40, RZ ; /* 0x0000004007079810 */ /* 0x000fe40007ffe0ff */ /*1300*/ LEA R3, R4, 0xc0800000, 0x17 ; /* 0xc080000004037811 */ /* 0x000fe200078eb8ff */ /*1310*/ BSSY B2, 0x1680 ; /* 0x0000036000027945 */ /* 0x000fe80003800000 */ /*1320*/ IMAD.IADD R6, R6, 0x1, -R3 ; /* 0x0000000106067824 */ /* 0x000fe200078e0a03 */ /*1330*/ IADD3 R3, R12, -0x7f, RZ ; /* 0xffffff810c037810 */ /* 0x000fc60007ffe0ff */ /*1340*/ MUFU.RCP R10, R6 ; /* 0x00000006000a7308 */ /* 0x000e220000001000 */ /*1350*/ FADD.FTZ R11, -R6, -RZ ; /* 0x800000ff060b7221 */ /* 0x000fe20000010100 */ /*1360*/ IMAD R0, R3.reuse, -0x800000, R5 ; /* 0xff80000003007824 */ /* 0x040fe200078e0205 */ /*1370*/ IADD3 R4, R3, 0x7f, -R4 ; /* 0x0000007f03047810 */ /* 0x000fca0007ffe804 */ /*1380*/ IMAD.IADD R4, R4, 0x1, R7 ; /* 0x0000000104047824 */ /* 0x000fe200078e0207 */ /*1390*/ FFMA R13, R10, R11, 1 ; /* 0x3f8000000a0d7423 */ /* 0x001fc8000000000b */ /*13a0*/ FFMA R12, R10, R13, R10 ; /* 0x0000000d0a0c7223 */ /* 0x000fc8000000000a */ /*13b0*/ FFMA R5, R0, R12, RZ ; /* 0x0000000c00057223 */ /* 0x000fc800000000ff */ /*13c0*/ FFMA R10, R11, R5, R0 ; /* 0x000000050b0a7223 */ /* 0x000fc80000000000 */ /*13d0*/ FFMA R13, R12, R10, R5 ; /* 0x0000000a0c0d7223 */ /* 0x000fc80000000005 */ /*13e0*/ FFMA R10, R11, R13, R0 ; /* 0x0000000d0b0a7223 */ /* 0x000fc80000000000 */ /*13f0*/ FFMA R5, R12, R10, R13 ; /* 0x0000000a0c057223 */ /* 0x000fca000000000d */ /*1400*/ SHF.R.U32.HI R0, RZ, 0x17, R5 ; /* 0x00000017ff007819 */ /* 0x000fc80000011605 */ /*1410*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fca00078ec0ff */ /*1420*/ IMAD.IADD R6, R0, 0x1, R4 ; /* 0x0000000100067824 */ /* 0x000fca00078e0204 */ /*1430*/ IADD3 R0, R6, -0x1, RZ ; /* 0xffffffff06007810 */ /* 0x000fc80007ffe0ff */ /*1440*/ ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ; /* 0x000000fe0000780c */ /* 0x000fda0003f06070 */ /*1450*/ @!P0 BRA 0x1660 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*1460*/ ISETP.GT.AND P0, PT, R6, 0xfe, PT ; /* 0x000000fe0600780c */ /* 0x000fda0003f04270 */ /*1470*/ @P0 BRA 0x1630 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*1480*/ ISETP.GE.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */ /* 0x000fda0003f06270 */ /*1490*/ @P0 BRA 0x1670 ; /* 0x000001d000000947 */ /* 0x000fea0003800000 */ /*14a0*/ ISETP.GE.AND P0, PT, R6, -0x18, PT ; /* 0xffffffe80600780c */ /* 0x000fe40003f06270 */ /*14b0*/ LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005057812 */ /* 0x000fd600078ec0ff */ /*14c0*/ @!P0 BRA 0x1670 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*14d0*/ FFMA.RZ R0, R12, R10.reuse, R13.reuse ; /* 0x0000000a0c007223 */ /* 0x180fe2000000c00d */ /*14e0*/ IADD3 R7, R6, 0x20, RZ ; /* 0x0000002006077810 */ /* 0x000fe20007ffe0ff */ /*14f0*/ FFMA.RM R3, R12, R10.reuse, R13.reuse ; /* 0x0000000a0c037223 */ /* 0x180fe2000000400d */ /*1500*/ ISETP.NE.AND P2, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f45270 */ /*1510*/ LOP3.LUT R4, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00047812 */ /* 0x000fe200078ec0ff */ /*1520*/ FFMA.RP R0, R12, R10, R13 ; /* 0x0000000a0c007223 */ /* 0x000fe2000000800d */ /*1530*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe20003f25270 */ /*1540*/ IMAD.MOV R6, RZ, RZ, -R6 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0a06 */ /*1550*/ LOP3.LUT R4, R4, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000004047812 */ /* 0x000fe400078efcff */ /*1560*/ FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ; /* 0x000000030000720b */ /* 0x000fc40003f1d000 */ /*1570*/ SHF.L.U32 R7, R4, R7, RZ ; /* 0x0000000704077219 */ /* 0x000fe400000006ff */ /*1580*/ SEL R3, R6, RZ, P2 ; /* 0x000000ff06037207 */ /* 0x000fe40001000000 */ /*1590*/ ISETP.NE.AND P1, PT, R7, RZ, P1 ; /* 0x000000ff0700720c */ /* 0x000fe40000f25270 */ /*15a0*/ SHF.R.U32.HI R3, RZ, R3, R4 ; /* 0x00000003ff037219 */ /* 0x000fe40000011604 */ /*15b0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40000703570 */ /*15c0*/ SHF.R.U32.HI R7, RZ, 0x1, R3 ; /* 0x00000001ff077819 */ /* 0x000fc40000011603 */ /*15d0*/ SEL R0, RZ, 0x1, !P0 ; /* 0x00000001ff007807 */ /* 0x000fc80004000000 */ /*15e0*/ LOP3.LUT R0, R0, 0x1, R7, 0xf8, !PT ; /* 0x0000000100007812 */ /* 0x000fc800078ef807 */ /*15f0*/ LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ; /* 0x0000000300007212 */ /* 0x000fca00078ec0ff */ /*1600*/ IMAD.IADD R0, R7, 0x1, R0 ; /* 0x0000000107007824 */ /* 0x000fca00078e0200 */ /*1610*/ LOP3.LUT R5, R0, R5, RZ, 0xfc, !PT ; /* 0x0000000500057212 */ /* 0x000fe200078efcff */ /*1620*/ BRA 0x1670 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*1630*/ LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005057812 */ /* 0x000fc800078ec0ff */ /*1640*/ LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000005057812 */ /* 0x000fe200078efcff */ /*1650*/ BRA 0x1670 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1660*/ IMAD R5, R4, 0x800000, R5 ; /* 0x0080000004057824 */ /* 0x000fe400078e0205 */ /*1670*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1680*/ BRA 0x1710 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*1690*/ LOP3.LUT R5, R6, 0x80000000, R5, 0x48, !PT ; /* 0x8000000006057812 */ /* 0x000fc800078e4805 */ /*16a0*/ LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000005057812 */ /* 0x000fe200078efcff */ /*16b0*/ BRA 0x1710 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*16c0*/ LOP3.LUT R5, R6, 0x80000000, R5, 0x48, !PT ; /* 0x8000000006057812 */ /* 0x000fe200078e4805 */ /*16d0*/ BRA 0x1710 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*16e0*/ MUFU.RSQ R5, -QNAN ; /* 0xffc0000000057908 */ /* 0x000e220000001400 */ /*16f0*/ BRA 0x1710 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1700*/ FADD.FTZ R5, R0, R3 ; /* 0x0000000300057221 */ /* 0x000fe40000010000 */ /*1710*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1720*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fc800078e00ff */ /*1730*/ RET.REL.NODEC R2 0x0 ; /* 0xffffe8c002007950 */ /* 0x000fea0003c3ffff */ /*1740*/ BRA 0x1740; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1750*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1760*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1770*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1780*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1790*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*17a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*17b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*17c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*17d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*17e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*17f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> template <typename T> struct SinFunctor { __host__ __device__ T operator()(const T& x) const { return sinf(x); } }; template <typename T> struct CosFunctor { __host__ __device__ T operator()(const T& x) const { return cosf(x); } }; struct OrderFunctor { const float num_oscilators; OrderFunctor(float _num_oscilators) : num_oscilators(_num_oscilators) {} __host__ __device__ float operator()(const float& x, const float& y) const { return sqrtf(powf(x, 2)+powf(y, 2))/num_oscilators; } }; __global__ void kernel_heuns(int num_oscilators, int num_couplings, float *phases_new, float *phases_old, float *omegas,float *couplings, float dt, int *indices, int *ptr) { int i_thread = blockIdx.x * blockDim.x + threadIdx.x; int stride = blockDim.x * gridDim.x; for (int index =i_thread; index < num_oscilators*num_couplings; index += stride){ float findex = (float)index; float fnum_oscilators = (float)num_oscilators; float fi_section = (findex+1)/fnum_oscilators-1; fi_section=ceil(fi_section); int i_section = (int)fi_section; //int i_section = (int)ceil(((float)index+1)/(float)num_oscilators-1); int i_node = index - i_section*num_oscilators; float coupling = couplings[i_section]; float phase = phases_old[index]; float omega = omegas[i_node]; int i_nei = 0; float f = 0; float f_tild = 0; float phase_tild = 0.; for( int i_ptr = ptr[i_node]; i_ptr < ptr[i_node+1]; i_ptr = i_ptr + 1 ) { i_nei = indices[i_ptr]+ i_section*num_oscilators; f += coupling*sinf( phases_old[i_nei] -phase); }; f = f + omega; phase_tild = phase + dt*f; for( int i_ptr = ptr[i_node]; i_ptr < ptr[i_node+1]; i_ptr = i_ptr + 1 ) { i_nei = indices[i_ptr]+ i_section*num_oscilators; f_tild += coupling*sinf( phases_old[i_nei] - phase_tild); }; f_tild = f_tild + omega; phases_new[index] = phase + dt*(f+f_tild)/2.; } }
.text .file "kernel.hip" .globl _Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_ # -- Begin function _Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_ .type _Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_,@function _Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_: # @_Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $176, %rsp .cfi_def_cfa_offset 224 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 8(%rsp), %rdi movl %esi, (%rdi) leaq 56(%rsp), %rsi movq %rdx, (%rsi) leaq 48(%rsp), %rdx movq %rcx, (%rdx) leaq 40(%rsp), %rcx movq %r8, (%rcx) leaq 32(%rsp), %r8 movq %r9, (%r8) leaq 4(%rsp), %r9 movss %xmm0, (%r9) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) movq %r9, 48(%rbx) leaq 224(%rsp), %rax movq %rax, 56(%rbx) leaq 232(%rsp), %rax movq %rax, 64(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z12kernel_heunsiiPfS_S_S_fPiS0_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $192, %rsp .cfi_adjust_cfa_offset -192 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_, .Lfunc_end0-_Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_ .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z12kernel_heunsiiPfS_S_S_fPiS0_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z12kernel_heunsiiPfS_S_S_fPiS0_,@object # @_Z12kernel_heunsiiPfS_S_S_fPiS0_ .section .rodata,"a",@progbits .globl _Z12kernel_heunsiiPfS_S_S_fPiS0_ .p2align 3, 0x0 _Z12kernel_heunsiiPfS_S_S_fPiS0_: .quad _Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_ .size _Z12kernel_heunsiiPfS_S_S_fPiS0_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z12kernel_heunsiiPfS_S_S_fPiS0_" .size .L__unnamed_1, 33 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z27__device_stub__kernel_heunsiiPfS_S_S_fPiS0_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z12kernel_heunsiiPfS_S_S_fPiS0_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z12kernel_heunsiiPfS_S_S_fPiS0_ ; -- Begin function _Z12kernel_heunsiiPfS_S_S_fPiS0_ .globl _Z12kernel_heunsiiPfS_S_S_fPiS0_ .p2align 8 .type _Z12kernel_heunsiiPfS_S_S_fPiS0_,@function _Z12kernel_heunsiiPfS_S_S_fPiS0_: ; @_Z12kernel_heunsiiPfS_S_S_fPiS0_ ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x4c s_load_b64 s[16:17], s[0:1], 0x0 s_add_u32 s2, s0, 64 s_addc_u32 s3, s1, 0 s_waitcnt lgkmcnt(0) s_and_b32 s21, s4, 0xffff s_mul_i32 s17, s17, s16 v_mad_u64_u32 v[1:2], null, s15, s21, v[0:1] s_mov_b32 s4, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_i32_e64 s17, v1 s_cbranch_execz .LBB0_19 ; %bb.1: ; %.lr.ph95 s_load_b32 s2, s[2:3], 0x0 s_clause 0x2 s_load_b256 s[4:11], s[0:1], 0x8 s_load_b32 s3, s[0:1], 0x28 s_load_b128 s[12:15], s[0:1], 0x30 v_cvt_f32_i32_e32 v0, s16 v_mov_b32_e32 v3, 0 s_mov_b32 s18, 0 s_mov_b32 s19, 0x7fffff s_mov_b32 s20, 0xb94c1982 s_mov_b32 s22, 0x37d75334 s_waitcnt lgkmcnt(0) s_mul_i32 s21, s2, s21 .LBB0_2: ; =>This Loop Header: Depth=1 ; Child Loop BB0_4 Depth 2 ; Child Loop BB0_12 Depth 2 v_cvt_f32_i32_e32 v2, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v2, 1.0, v2 v_div_scale_f32 v4, null, v0, v0, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v5, v4 s_waitcnt_depctr 0xfff v_fma_f32 v6, -v4, v5, 1.0 v_fmac_f32_e32 v5, v6, v5 v_div_scale_f32 v7, vcc_lo, v2, v0, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v6, v7, v5 v_fma_f32 v8, -v4, v6, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v6, v8, v5 v_fma_f32 v4, -v4, v6, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v4, v4, v5, v6 v_div_fixup_f32 v2, v4, v0, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f32_e32 v2, -1.0, v2 v_ceil_f32_e32 v2, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cvt_i32_f32_e32 v6, v2 v_ashrrev_i32_e32 v2, 31, v1 v_mul_lo_u32 v12, v6, s16 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], 2, v[1:2] v_ashrrev_i32_e32 v7, 31, v6 v_lshlrev_b64 v[6:7], 2, v[6:7] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_nc_u32_e32 v8, v1, v12 v_add_co_u32 v10, vcc_lo, s6, v4 v_add_co_ci_u32_e32 v11, vcc_lo, s7, v5, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v9, 31, v8 v_lshlrev_b64 v[8:9], 2, v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v13, vcc_lo, s14, v8 v_add_co_ci_u32_e32 v14, vcc_lo, s15, v9, vcc_lo v_add_co_u32 v15, vcc_lo, s10, v6 v_add_co_ci_u32_e32 v16, vcc_lo, s11, v7, vcc_lo v_add_co_u32 v8, vcc_lo, s8, v8 global_load_b64 v[6:7], v[13:14], off v_add_co_ci_u32_e32 v9, vcc_lo, s9, v9, vcc_lo global_load_b32 v13, v[10:11], off global_load_b32 v15, v[15:16], off global_load_b32 v14, v[8:9], off v_mov_b32_e32 v8, v3 s_waitcnt vmcnt(3) v_cmp_lt_i32_e32 vcc_lo, v6, v7 v_ashrrev_i32_e32 v9, 31, v6 s_and_saveexec_b32 s23, vcc_lo s_cbranch_execz .LBB0_10 ; %bb.3: ; %.lr.ph.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v8, v6 v_mov_b32_e32 v16, v6 s_mov_b32 s24, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[10:11], 2, v[8:9] v_mov_b32_e32 v8, 0 v_add_co_u32 v10, s0, s12, v10 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v11, s0, s13, v11, s0 .LBB0_4: ; %.lr.ph ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b32 v2, v[10:11], off ; implicit-def: $vgpr19 s_mov_b32 s1, exec_lo s_waitcnt vmcnt(0) v_add_nc_u32_e32 v17, v2, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v18, 31, v17 v_lshlrev_b64 v[17:18], 2, v[17:18] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v17, s0, s6, v17 v_add_co_ci_u32_e64 v18, s0, s7, v18, s0 global_load_b32 v2, v[17:18], off s_waitcnt vmcnt(0) v_sub_f32_e32 v17, v2, v13 ; implicit-def: $vgpr2 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v18, 0x7fffffff, v17 v_cmpx_ngt_f32_e64 0x48000000, |v17| s_xor_b32 s25, exec_lo, s1 s_cbranch_execz .LBB0_6 ; %bb.5: ; in Loop: Header=BB0_4 Depth=2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_and_or_b32 v27, v18, s19, 0x800000 v_lshrrev_b32_e32 v24, 23, v18 v_mad_u64_u32 v[19:20], null, 0xfe5163ab, v27, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v25, 0xffffff88, v24 v_cmp_lt_u32_e64 s0, 63, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mov_b32_e32 v2, v20 v_cndmask_b32_e64 v26, 0, 0xffffffc0, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[20:21], null, 0x3c439041, v27, v[2:3] v_add_nc_u32_e32 v26, v26, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mov_b32_e32 v2, v21 v_cmp_lt_u32_e64 s1, 31, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[21:22], null, 0xdb629599, v27, v[2:3] v_cndmask_b32_e64 v28, 0, 0xffffffe0, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v28, v28, v26 v_mov_b32_e32 v2, v22 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v19, v21, v19, s0 v_cmp_lt_u32_e64 s2, 31, v28 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[22:23], null, 0xf534ddc0, v27, v[2:3] v_mov_b32_e32 v2, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v20, v22, v20, s0 v_mad_u64_u32 v[23:24], null, 0xfc2757d1, v27, v[2:3] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v19, v20, v19, s1 v_mov_b32_e32 v2, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[24:25], null, 0x4e441529, v27, v[2:3] v_mov_b32_e32 v2, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_mad_u64_u32 v[25:26], null, 0xa2f9836e, v27, v[2:3] v_cndmask_b32_e64 v2, 0, 0xffffffe0, s2 v_cndmask_b32_e64 v27, v24, v22, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_nc_u32_e32 v2, v2, v28 v_cndmask_b32_e64 v25, v25, v23, s0 v_cndmask_b32_e64 v24, v26, v24, s0 v_cndmask_b32_e64 v23, v23, v21, s0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_sub_nc_u32_e32 v26, 32, v2 v_cndmask_b32_e64 v22, v25, v27, s1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v24, v24, v25, s1 v_cndmask_b32_e64 v25, v27, v23, s1 v_cndmask_b32_e64 v23, v23, v20, s1 v_cmp_eq_u32_e64 s0, 0, v2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v24, v24, v22, s2 v_cndmask_b32_e64 v22, v22, v25, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v25, v25, v23, s2 v_cndmask_b32_e64 v19, v23, v19, s2 v_alignbit_b32 v27, v24, v22, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_alignbit_b32 v21, v22, v25, v26 v_cndmask_b32_e64 v2, v27, v24, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v20, v21, v22, s0 v_alignbit_b32 v24, v25, v19, v26 v_bfe_u32 v21, v2, 29, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_alignbit_b32 v22, v2, v20, 30 v_cndmask_b32_e64 v24, v24, v25, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_nc_u32_e32 v23, 0, v21 v_alignbit_b32 v20, v20, v24, 30 v_alignbit_b32 v19, v24, v19, 30 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_xor_b32_e32 v22, v22, v23 v_xor_b32_e32 v20, v20, v23 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_xor_b32_e32 v19, v19, v23 v_lshrrev_b32_e32 v23, 29, v2 v_clz_i32_u32_e32 v25, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b32_e32 v23, 31, v23 v_min_u32_e32 v25, 32, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_or_b32_e32 v26, 0.5, v23 v_sub_nc_u32_e32 v24, 31, v25 v_lshlrev_b32_e32 v27, 23, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_alignbit_b32 v22, v22, v20, v24 v_alignbit_b32 v19, v20, v19, v24 v_sub_nc_u32_e32 v26, v26, v27 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_alignbit_b32 v20, v22, v19, 9 v_lshrrev_b32_e32 v22, 9, v22 v_clz_i32_u32_e32 v24, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_min_u32_e32 v24, 32, v24 v_sub_nc_u32_e32 v28, 31, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_alignbit_b32 v19, v20, v19, v28 v_or_b32_e32 v20, v22, v26 v_add_lshl_u32 v22, v24, v25, 23 v_lshrrev_b32_e32 v19, 9, v19 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v24, 0x3fc90fda, v20 v_sub_nc_u32_e32 v19, v19, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v22, 0x3fc90fda, v20, -v24 v_add_nc_u32_e32 v19, 0x33000000, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v22, 0x33a22168, v20 v_or_b32_e32 v19, v19, v23 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fmac_f32_e32 v22, 0x3fc90fda, v19 v_lshrrev_b32_e32 v19, 30, v2 v_dual_add_f32 v2, v24, v22 :: v_dual_add_nc_u32 v19, v21, v19 .LBB0_6: ; %Flow138 ; in Loop: Header=BB0_4 Depth=2 s_and_not1_saveexec_b32 s0, s25 ; %bb.7: ; in Loop: Header=BB0_4 Depth=2 v_mul_f32_e64 v2, 0x3f22f983, |v17| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f32_e32 v19, v2 v_fma_f32 v2, 0xbfc90fda, v19, |v17| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v2, 0xb3a22168, v19 v_fmac_f32_e32 v2, 0xa7c234c4, v19 v_cvt_i32_f32_e32 v19, v19 ; %bb.8: ; %_ZL4sinff.exit ; in Loop: Header=BB0_4 Depth=2 s_or_b32 exec_lo, exec_lo, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_dual_mul_f32 v20, v2, v2 :: v_dual_and_b32 v23, 1, v19 v_xor_b32_e32 v18, v18, v17 v_add_co_u32 v10, s1, v10, 4 v_fmaak_f32 v21, s20, v20, 0x3c0881c4 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cmp_eq_u32_e64 s0, 0, v23 v_add_co_ci_u32_e64 v11, s1, 0, v11, s1 v_dual_fmaak_f32 v21, v20, v21, 0xbe2aaa9d :: v_dual_add_nc_u32 v16, 1, v16 v_dual_fmaak_f32 v22, s22, v20, 0xbab64f3b :: v_dual_lshlrev_b32 v19, 30, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v21, v20, v21 v_fmaak_f32 v22, v20, v22, 0x3d2aabf7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_fmac_f32 v2, v2, v21 :: v_dual_and_b32 v19, 0x80000000, v19 v_fmaak_f32 v22, v20, v22, 0xbf000004 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v20, v20, v22, 1.0 v_cndmask_b32_e64 v2, v20, v2, s0 v_cmp_class_f32_e64 s0, v17, 0x1f8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_xor3_b32 v2, v18, v19, v2 v_cndmask_b32_e64 v2, 0x7fc00000, v2, s0 v_cmp_ge_i32_e64 s0, v16, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v8, v15, v2 s_or_b32 s24, s0, s24 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s24 s_cbranch_execnz .LBB0_4 ; %bb.9: ; %Flow139 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s24 .LBB0_10: ; %Flow140 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s23 s_waitcnt vmcnt(0) v_dual_add_f32 v10, v14, v8 :: v_dual_mov_b32 v11, 0 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB0_18 ; %bb.11: ; %.lr.ph90.preheader ; in Loop: Header=BB0_2 Depth=1 v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v11, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f32 v16, s3, v10, v13 s_mov_b32 s23, 0 v_lshlrev_b64 v[8:9], 2, v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, s12, v8 v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo .LBB0_12: ; %.lr.ph90 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b32 v2, v[8:9], off ; implicit-def: $vgpr19 s_mov_b32 s1, exec_lo s_waitcnt vmcnt(0) v_add_nc_u32_e32 v17, v2, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v18, 31, v17 v_lshlrev_b64 v[17:18], 2, v[17:18] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v17, vcc_lo, s6, v17 v_add_co_ci_u32_e32 v18, vcc_lo, s7, v18, vcc_lo global_load_b32 v2, v[17:18], off s_waitcnt vmcnt(0) v_sub_f32_e32 v17, v2, v16 ; implicit-def: $vgpr2 s_delay_alu instid0(VALU_DEP_1) v_and_b32_e32 v18, 0x7fffffff, v17 v_cmpx_ngt_f32_e64 0x48000000, |v17| s_xor_b32 s24, exec_lo, s1 s_cbranch_execz .LBB0_14 ; %bb.13: ; in Loop: Header=BB0_12 Depth=2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_and_or_b32 v27, v18, s19, 0x800000 v_lshrrev_b32_e32 v24, 23, v18 v_mad_u64_u32 v[19:20], null, 0xfe5163ab, v27, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v25, 0xffffff88, v24 v_cmp_lt_u32_e32 vcc_lo, 63, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mov_b32_e32 v2, v20 v_cndmask_b32_e64 v26, 0, 0xffffffc0, vcc_lo v_mad_u64_u32 v[20:21], null, 0x3c439041, v27, v[2:3] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v26, v26, v25 v_mov_b32_e32 v2, v21 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_lt_u32_e64 s0, 31, v26 v_mad_u64_u32 v[21:22], null, 0xdb629599, v27, v[2:3] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, 0, 0xffffffe0, s0 v_add_nc_u32_e32 v28, v28, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_mov_b32 v2, v22 :: v_dual_cndmask_b32 v19, v21, v19 v_cmp_lt_u32_e64 s1, 31, v28 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[22:23], null, 0xf534ddc0, v27, v[2:3] v_mov_b32_e32 v2, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v20, v22, v20, vcc_lo v_mad_u64_u32 v[23:24], null, 0xfc2757d1, v27, v[2:3] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v19, v20, v19, s0 v_mov_b32_e32 v2, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[24:25], null, 0x4e441529, v27, v[2:3] v_mov_b32_e32 v2, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[25:26], null, 0xa2f9836e, v27, v[2:3] v_cndmask_b32_e64 v2, 0, 0xffffffe0, s1 v_dual_cndmask_b32 v27, v24, v22 :: v_dual_add_nc_u32 v2, v2, v28 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_cndmask_b32 v25, v25, v23 :: v_dual_cndmask_b32 v24, v26, v24 v_cndmask_b32_e32 v23, v23, v21, vcc_lo v_sub_nc_u32_e32 v26, 32, v2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v22, v25, v27, s0 v_cndmask_b32_e64 v24, v24, v25, s0 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v25, v27, v23, s0 v_cndmask_b32_e64 v23, v23, v20, s0 v_cmp_eq_u32_e32 vcc_lo, 0, v2 v_cndmask_b32_e64 v24, v24, v22, s1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v22, v22, v25, s1 v_cndmask_b32_e64 v25, v25, v23, s1 v_cndmask_b32_e64 v19, v23, v19, s1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_alignbit_b32 v27, v24, v22, v26 v_alignbit_b32 v21, v22, v25, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v2, v27, v24, vcc_lo v_cndmask_b32_e32 v20, v21, v22, vcc_lo v_alignbit_b32 v24, v25, v19, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_bfe_u32 v21, v2, 29, 1 v_alignbit_b32 v22, v2, v20, 30 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v24, v24, v25, vcc_lo v_sub_nc_u32_e32 v23, 0, v21 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_alignbit_b32 v20, v20, v24, 30 v_alignbit_b32 v19, v24, v19, 30 v_xor_b32_e32 v22, v22, v23 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_xor_b32_e32 v20, v20, v23 v_xor_b32_e32 v19, v19, v23 v_lshrrev_b32_e32 v23, 29, v2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_clz_i32_u32_e32 v25, v22 v_lshlrev_b32_e32 v23, 31, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_min_u32_e32 v25, 32, v25 v_or_b32_e32 v26, 0.5, v23 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_nc_u32_e32 v24, 31, v25 v_lshlrev_b32_e32 v27, 23, v25 v_alignbit_b32 v22, v22, v20, v24 v_alignbit_b32 v19, v20, v19, v24 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_nc_u32_e32 v26, v26, v27 v_alignbit_b32 v20, v22, v19, 9 v_lshrrev_b32_e32 v22, 9, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_clz_i32_u32_e32 v24, v20 v_min_u32_e32 v24, 32, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v28, 31, v24 v_alignbit_b32 v19, v20, v19, v28 v_or_b32_e32 v20, v22, v26 v_add_lshl_u32 v22, v24, v25, 23 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshrrev_b32_e32 v19, 9, v19 v_mul_f32_e32 v24, 0x3fc90fda, v20 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_nc_u32_e32 v19, v19, v22 v_fma_f32 v22, 0x3fc90fda, v20, -v24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v19, 0x33000000, v19 v_fmac_f32_e32 v22, 0x33a22168, v20 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_or_b32_e32 v19, v19, v23 v_fmac_f32_e32 v22, 0x3fc90fda, v19 v_lshrrev_b32_e32 v19, 30, v2 s_delay_alu instid0(VALU_DEP_1) v_dual_add_f32 v2, v24, v22 :: v_dual_add_nc_u32 v19, v21, v19 .LBB0_14: ; %Flow ; in Loop: Header=BB0_12 Depth=2 s_and_not1_saveexec_b32 s0, s24 ; %bb.15: ; in Loop: Header=BB0_12 Depth=2 v_mul_f32_e64 v2, 0x3f22f983, |v17| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f32_e32 v19, v2 v_fma_f32 v2, 0xbfc90fda, v19, |v17| s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v2, 0xb3a22168, v19 v_fmac_f32_e32 v2, 0xa7c234c4, v19 v_cvt_i32_f32_e32 v19, v19 ; %bb.16: ; %_ZL4sinff.exit80 ; in Loop: Header=BB0_12 Depth=2 s_or_b32 exec_lo, exec_lo, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_dual_mul_f32 v20, v2, v2 :: v_dual_and_b32 v23, 1, v19 v_xor_b32_e32 v18, v18, v17 v_add_co_u32 v8, s0, v8, 4 v_dual_fmaak_f32 v21, s20, v20, 0x3c0881c4 :: v_dual_add_nc_u32 v6, 1, v6 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cmp_eq_u32_e32 vcc_lo, 0, v23 v_add_co_ci_u32_e64 v9, s0, 0, v9, s0 v_fmaak_f32 v21, v20, v21, 0xbe2aaa9d v_dual_fmaak_f32 v22, s22, v20, 0xbab64f3b :: v_dual_lshlrev_b32 v19, 30, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f32_e32 v21, v20, v21 v_fmaak_f32 v22, v20, v22, 0x3d2aabf7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_fmac_f32 v2, v2, v21 :: v_dual_and_b32 v19, 0x80000000, v19 v_fmaak_f32 v22, v20, v22, 0xbf000004 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v20, v20, v22, 1.0 v_cndmask_b32_e32 v2, v20, v2, vcc_lo v_cmp_class_f32_e64 vcc_lo, v17, 0x1f8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_xor3_b32 v2, v18, v19, v2 v_cndmask_b32_e32 v2, 0x7fc00000, v2, vcc_lo v_cmp_ge_i32_e32 vcc_lo, v6, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_fmac_f32_e32 v11, v15, v2 s_or_b32 s23, vcc_lo, s23 s_and_not1_b32 exec_lo, exec_lo, s23 s_cbranch_execnz .LBB0_12 ; %bb.17: ; %Flow136 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s23 .LBB0_18: ; %Flow137 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s2 v_dual_add_f32 v2, v14, v11 :: v_dual_add_nc_u32 v1, s21, v1 v_cvt_f64_f32_e32 v[6:7], v13 v_add_co_u32 v4, s0, s4, v4 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f32_e32 v2, v10, v2 v_cmp_le_i32_e32 vcc_lo, s17, v1 v_add_co_ci_u32_e64 v5, s0, s5, v5, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mul_f32_e32 v2, s3, v2 s_or_b32 s18, vcc_lo, s18 v_cvt_f64_f32_e32 v[8:9], v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[6:7], v[8:9], 0.5, v[6:7] v_cvt_f32_f64_e32 v2, v[6:7] global_store_b32 v[4:5], v2, off s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB0_2 .LBB0_19: ; %Flow142 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z12kernel_heunsiiPfS_S_S_fPiS0_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 320 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 29 .amdhsa_next_free_sgpr 26 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z12kernel_heunsiiPfS_S_S_fPiS0_, .Lfunc_end0-_Z12kernel_heunsiiPfS_S_S_fPiS0_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 2812 ; NumSgprs: 28 ; NumVgprs: 29 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 3 ; VGPRBlocks: 3 ; NumSGPRsForWavesPerEU: 28 ; NumVGPRsForWavesPerEU: 29 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 4 .size: 4 .value_kind: by_value - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .offset: 40 .size: 4 .value_kind: by_value - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .offset: 64 .size: 4 .value_kind: hidden_block_count_x - .offset: 68 .size: 4 .value_kind: hidden_block_count_y - .offset: 72 .size: 4 .value_kind: hidden_block_count_z - .offset: 76 .size: 2 .value_kind: hidden_group_size_x - .offset: 78 .size: 2 .value_kind: hidden_group_size_y - .offset: 80 .size: 2 .value_kind: hidden_group_size_z - .offset: 82 .size: 2 .value_kind: hidden_remainder_x - .offset: 84 .size: 2 .value_kind: hidden_remainder_y - .offset: 86 .size: 2 .value_kind: hidden_remainder_z - .offset: 104 .size: 8 .value_kind: hidden_global_offset_x - .offset: 112 .size: 8 .value_kind: hidden_global_offset_y - .offset: 120 .size: 8 .value_kind: hidden_global_offset_z - .offset: 128 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 320 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z12kernel_heunsiiPfS_S_S_fPiS0_ .private_segment_fixed_size: 0 .sgpr_count: 28 .sgpr_spill_count: 0 .symbol: _Z12kernel_heunsiiPfS_S_S_fPiS0_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 29 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
73b2ca3a93be00eda891abd20354e4ce42f28900
#include <float.h> #include <math.h> #include <stdio.h> __global__ void calculateAreas(const int recs, const double w, const int offset, double *areas) { const int index = threadIdx.x + offset; if (index >= recs) return; const double x = index * w; double h = 1 - x * x; //Detect a 0 by accounting for roundoff error. h = h < DBL_EPSILON ? 0 : sqrt(h); areas[index] = w * h; } void calculateArea(const int recs, double *area) { double *areas = (double*) malloc(recs * sizeof(double)); if (areas == NULL) { fprintf(stderr, "malloc failed!\n"); return; } double *w_areas; cudaError_t err = cudaMalloc((void**) &w_areas, (recs * sizeof(double))); if (err != cudaSuccess) { fprintf(stderr, "cudaMalloc failed: %s\n", cudaGetErrorString(err)); return; } const int threadCount = 512, loops = ceil((double) recs / threadCount); const double width = 1.0 / recs; for (int c = 0; c < loops; ++c) { //kernel<<<blocks, threads>>> calculateAreas<<<1, threadCount>>>(recs, width, c * threadCount, w_areas); } err = cudaMemcpy(areas, w_areas, recs * sizeof(double), cudaMemcpyDeviceToHost); if (err != cudaSuccess) { fprintf(stderr, "cudaMemcpy failed: %s\n", cudaGetErrorString(err)); return; } *area = 0; for (int c = 0; c < recs; ++c) { *area += areas[c]; } *area *= 4; cudaFree(w_areas); free(areas); }
.file "tmpxft_002fec59_00000000-6_1-calc-pi-cuda.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z37__device_stub__Z14calculateAreasidiPdidiPd .type _Z37__device_stub__Z14calculateAreasidiPdidiPd, @function _Z37__device_stub__Z14calculateAreasidiPdidiPd: .LFB2052: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movl %edi, 28(%rsp) leaq 48(%rsp), %rcx leaq 56(%rsp), %rdi movl %esi, 24(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movsd %xmm0, 16(%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 28(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 24(%rsp), %rax movq %rax, 120(%rsp) leaq 8(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z14calculateAreasidiPd(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z37__device_stub__Z14calculateAreasidiPdidiPd, .-_Z37__device_stub__Z14calculateAreasidiPdidiPd .globl _Z14calculateAreasidiPd .type _Z14calculateAreasidiPd, @function _Z14calculateAreasidiPd: .LFB2053: .cfi_startproc endbr64 jmp _Z37__device_stub__Z14calculateAreasidiPdidiPd .cfi_endproc .LFE2053: .size _Z14calculateAreasidiPd, .-_Z14calculateAreasidiPd .section .rodata.str1.1,"aMS",@progbits,1 .LC1: .string "malloc failed!\n" .LC2: .string "cudaMalloc failed: %s\n" .LC5: .string "cudaMemcpy failed: %s\n" .text .globl _Z13calculateAreaiPd .type _Z13calculateAreaiPd, @function _Z13calculateAreaiPd: .LFB2027: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rsi, %r13 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movl %edi, %ebp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $72, %rsp .cfi_def_cfa_offset 128 movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax movslq %edi, %rax salq $3, %rax movq %rax, %rdi movq %rax, (%rsp) call malloc@PLT testq %rax, %rax jne .L9 movq 56(%rsp), %rax subq %fs:40, %rax jne .L24 movq stderr(%rip), %rdi addq $72, %rsp .cfi_remember_state .cfi_def_cfa_offset 56 leaq .LC1(%rip), %rdx xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 movl $2, %esi popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp __fprintf_chk@PLT .L9: .cfi_restore_state movq (%rsp), %rsi leaq 24(%rsp), %rdi movq %rax, %rbx call cudaMalloc@PLT movl %eax, %edi testl %eax, %eax je .L11 call cudaGetErrorString@PLT leaq .LC2(%rip), %rdx movq %rax, %rcx jmp .L22 .L11: cvtsi2sdl %ebp, %xmm1 xorl %r12d, %r12d movabsq $4294967808, %r15 movaps %xmm1, %xmm0 movsd %xmm1, 8(%rsp) mulsd .LC3(%rip), %xmm0 call ceil@PLT movsd 8(%rsp), %xmm1 cvttsd2sil %xmm0, %r14d movsd .LC4(%rip), %xmm0 divsd %xmm1, %xmm0 movsd %xmm0, 8(%rsp) .L13: cmpl %r14d, %r12d jge .L25 xorl %r9d, %r9d xorl %r8d, %r8d movq %r15, %rdx movl $1, %ecx movabsq $4294967297, %rdi movl $1, %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L14 movl %r12d, %esi movq 24(%rsp), %rdx movsd 8(%rsp), %xmm0 movl %ebp, %edi sall $9, %esi call _Z37__device_stub__Z14calculateAreasidiPdidiPd .L14: incl %r12d jmp .L13 .L25: movq (%rsp), %rdx movq 24(%rsp), %rsi movq %rbx, %rdi movl $2, %ecx call cudaMemcpy@PLT movl %eax, %edi testl %eax, %eax je .L20 call cudaGetErrorString@PLT leaq .LC5(%rip), %rdx movq %rax, %rcx .L22: movq stderr(%rip), %rdi xorl %eax, %eax movl $2, %esi call __fprintf_chk@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L19 jmp .L24 .L20: xorl %eax, %eax xorps %xmm0, %xmm0 .L16: cmpl %eax, %ebp jle .L26 addsd (%rbx,%rax,8), %xmm0 incq %rax jmp .L16 .L26: mulsd .LC6(%rip), %xmm0 movq 24(%rsp), %rdi movsd %xmm0, 0(%r13) call cudaFree@PLT movq 56(%rsp), %rax subq %fs:40, %rax jne .L24 addq $72, %rsp .cfi_remember_state .cfi_def_cfa_offset 56 movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp free@PLT .L24: .cfi_restore_state call __stack_chk_fail@PLT .L19: addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _Z13calculateAreaiPd, .-_Z13calculateAreaiPd .section .rodata.str1.1 .LC7: .string "_Z14calculateAreasidiPd" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC7(%rip), %rdx movq %rax, %rdi leaq _Z14calculateAreasidiPd(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC3: .long 0 .long 1063256064 .align 8 .LC4: .long 0 .long 1072693248 .align 8 .LC6: .long 0 .long 1074790400 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z14calculateAreasidiPd .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e240000002100 */ /*0020*/ IADD3 R0, R0, c[0x0][0x170], RZ ; /* 0x00005c0000007a10 */ /* 0x001fc80007ffe0ff */ /*0030*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x160], PT ; /* 0x0000580000007a0c */ /* 0x000fda0003f06270 */ /*0040*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0050*/ I2F.F64 R2, R0 ; /* 0x0000000000027312 */ /* 0x000e220000201c00 */ /*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0070*/ BSSY B0, 0x240 ; /* 0x000001c000007945 */ /* 0x000fe20003800000 */ /*0080*/ DMUL R2, R2, c[0x0][0x168] ; /* 0x00005a0002027a28 */ /* 0x001e0c0000000000 */ /*0090*/ DFMA R4, -R2, R2, 1 ; /* 0x3ff000000204742b */ /* 0x0010640000000102 */ /*00a0*/ CS2R R2, SRZ ; /* 0x0000000000027805 */ /* 0x001fc8000001ff00 */ /*00b0*/ DSETP.GEU.AND P0, PT, R4, 2.2204460492503130808e-16, PT ; /* 0x3cb000000400742a */ /* 0x002e1c0003f0e000 */ /*00c0*/ @!P0 BRA 0x230 ; /* 0x0000016000008947 */ /* 0x001fea0003800000 */ /*00d0*/ MUFU.RSQ64H R7, R5 ; /* 0x0000000500077308 */ /* 0x000e220000001c00 */ /*00e0*/ IADD3 R6, R5, -0x3500000, RZ ; /* 0xfcb0000005067810 */ /* 0x000fe20007ffe0ff */ /*00f0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x0 ; /* 0x00000000ff087424 */ /* 0x000fe200078e00ff */ /*0100*/ BSSY B1, 0x230 ; /* 0x0000012000017945 */ /* 0x000fe20003800000 */ /*0110*/ IMAD.MOV.U32 R9, RZ, RZ, 0x3fd80000 ; /* 0x3fd80000ff097424 */ /* 0x000fe200078e00ff */ /*0120*/ ISETP.GE.U32.AND P0, PT, R6, 0x7ca00000, PT ; /* 0x7ca000000600780c */ /* 0x000fe40003f06070 */ /*0130*/ DMUL R2, R6, R6 ; /* 0x0000000606027228 */ /* 0x001e0c0000000000 */ /*0140*/ DFMA R2, R4, -R2, 1 ; /* 0x3ff000000402742b */ /* 0x001e0c0000000802 */ /*0150*/ DFMA R8, R2, R8, 0.5 ; /* 0x3fe000000208742b */ /* 0x001fc80000000008 */ /*0160*/ DMUL R2, R6, R2 ; /* 0x0000000206027228 */ /* 0x000e0c0000000000 */ /*0170*/ DFMA R8, R8, R2, R6 ; /* 0x000000020808722b */ /* 0x001e0c0000000006 */ /*0180*/ DMUL R10, R4, R8 ; /* 0x00000008040a7228 */ /* 0x001e080000000000 */ /*0190*/ IADD3 R15, R9, -0x100000, RZ ; /* 0xfff00000090f7810 */ /* 0x000fe20007ffe0ff */ /*01a0*/ IMAD.MOV.U32 R14, RZ, RZ, R8 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e0008 */ /*01b0*/ DFMA R12, R10, -R10, R4 ; /* 0x8000000a0a0c722b */ /* 0x001e0c0000000004 */ /*01c0*/ DFMA R2, R12, R14, R10 ; /* 0x0000000e0c02722b */ /* 0x001062000000000a */ /*01d0*/ @!P0 BRA 0x220 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*01e0*/ MOV R2, 0x200 ; /* 0x0000020000027802 */ /* 0x002fca0000000f00 */ /*01f0*/ CALL.REL.NOINC 0x290 ; /* 0x0000009000007944 */ /* 0x001fea0003c00000 */ /*0200*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */ /* 0x002fe400078e0006 */ /*0210*/ IMAD.MOV.U32 R3, RZ, RZ, R7 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0007 */ /*0220*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0230*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0240*/ IMAD.MOV.U32 R7, RZ, RZ, 0x8 ; /* 0x00000008ff077424 */ /* 0x000fe200078e00ff */ /*0250*/ DMUL R4, R2, c[0x0][0x168] ; /* 0x00005a0002047a28 */ /* 0x0030460000000000 */ /*0260*/ IMAD.WIDE R2, R0, R7, c[0x0][0x178] ; /* 0x00005e0000027625 */ /* 0x001fca00078e0207 */ /*0270*/ STG.E.64 [R2.64], R4 ; /* 0x0000000402007986 */ /* 0x002fe2000c101b04 */ /*0280*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0290*/ ISETP.GE.U32.AND P0, PT, R6, -0x3400000, PT ; /* 0xfcc000000600780c */ /* 0x000fe20003f06070 */ /*02a0*/ BSSY B2, 0x4f0 ; /* 0x0000024000027945 */ /* 0x000fe20003800000 */ /*02b0*/ MOV R9, R15 ; /* 0x0000000f00097202 */ /* 0x000fd60000000f00 */ /*02c0*/ @!P0 BRA 0x350 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*02d0*/ DFMA.RM R8, R12, R8, R10 ; /* 0x000000080c08722b */ /* 0x000e14000000400a */ /*02e0*/ IADD3 R6, P0, R8, 0x1, RZ ; /* 0x0000000108067810 */ /* 0x001fca0007f1e0ff */ /*02f0*/ IMAD.X R7, RZ, RZ, R9, P0 ; /* 0x000000ffff077224 */ /* 0x000fcc00000e0609 */ /*0300*/ DFMA.RP R4, -R8, R6, R4 ; /* 0x000000060804722b */ /* 0x000e0c0000008104 */ /*0310*/ DSETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400722a */ /* 0x001e0c0003f04000 */ /*0320*/ FSEL R6, R6, R8, P0 ; /* 0x0000000806067208 */ /* 0x001fe40000000000 */ /*0330*/ FSEL R7, R7, R9, P0 ; /* 0x0000000907077208 */ /* 0x000fe20000000000 */ /*0340*/ BRA 0x4e0 ; /* 0x0000019000007947 */ /* 0x000fea0003800000 */ /*0350*/ DSETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400722a */ /* 0x000e1c0003f05000 */ /*0360*/ @!P0 BRA 0x4d0 ; /* 0x0000016000008947 */ /* 0x001fea0003800000 */ /*0370*/ ISETP.GE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fda0003f06270 */ /*0380*/ @!P0 IMAD.MOV.U32 R6, RZ, RZ, 0x0 ; /* 0x00000000ff068424 */ /* 0x000fe400078e00ff */ /*0390*/ @!P0 IMAD.MOV.U32 R7, RZ, RZ, -0x80000 ; /* 0xfff80000ff078424 */ /* 0x000fe200078e00ff */ /*03a0*/ @!P0 BRA 0x4e0 ; /* 0x0000013000008947 */ /* 0x000fea0003800000 */ /*03b0*/ ISETP.GT.AND P0, PT, R5, 0x7fefffff, PT ; /* 0x7fefffff0500780c */ /* 0x000fda0003f04270 */ /*03c0*/ @P0 BRA 0x4d0 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*03d0*/ DMUL R4, R4, 8.11296384146066816958e+31 ; /* 0x4690000004047828 */ /* 0x000e220000000000 */ /*03e0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fe200078e00ff */ /*03f0*/ MOV R10, 0x0 ; /* 0x00000000000a7802 */ /* 0x000fe20000000f00 */ /*0400*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3fd80000 ; /* 0x3fd80000ff0b7424 */ /* 0x000fc600078e00ff */ /*0410*/ MUFU.RSQ64H R7, R5 ; /* 0x0000000500077308 */ /* 0x001e240000001c00 */ /*0420*/ DMUL R8, R6, R6 ; /* 0x0000000606087228 */ /* 0x001e0c0000000000 */ /*0430*/ DFMA R8, R4, -R8, 1 ; /* 0x3ff000000408742b */ /* 0x001e0c0000000808 */ /*0440*/ DFMA R10, R8, R10, 0.5 ; /* 0x3fe00000080a742b */ /* 0x001fc8000000000a */ /*0450*/ DMUL R8, R6, R8 ; /* 0x0000000806087228 */ /* 0x000e0c0000000000 */ /*0460*/ DFMA R8, R10, R8, R6 ; /* 0x000000080a08722b */ /* 0x001e0c0000000006 */ /*0470*/ DMUL R6, R4, R8 ; /* 0x0000000804067228 */ /* 0x0010480000000000 */ /*0480*/ IADD3 R9, R9, -0x100000, RZ ; /* 0xfff0000009097810 */ /* 0x001fe40007ffe0ff */ /*0490*/ DFMA R10, R6, -R6, R4 ; /* 0x80000006060a722b */ /* 0x002e0c0000000004 */ /*04a0*/ DFMA R6, R8, R10, R6 ; /* 0x0000000a0806722b */ /* 0x001e140000000006 */ /*04b0*/ IADD3 R7, R7, -0x3500000, RZ ; /* 0xfcb0000007077810 */ /* 0x001fe20007ffe0ff */ /*04c0*/ BRA 0x4e0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*04d0*/ DADD R6, R4, R4 ; /* 0x0000000004067229 */ /* 0x00004c0000000004 */ /*04e0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*04f0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fc800078e00ff */ /*0500*/ RET.REL.NODEC R2 0x0 ; /* 0xfffffaf002007950 */ /* 0x000fea0003c3ffff */ /*0510*/ BRA 0x510; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0580*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0590*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*05f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <float.h> #include <math.h> #include <stdio.h> __global__ void calculateAreas(const int recs, const double w, const int offset, double *areas) { const int index = threadIdx.x + offset; if (index >= recs) return; const double x = index * w; double h = 1 - x * x; //Detect a 0 by accounting for roundoff error. h = h < DBL_EPSILON ? 0 : sqrt(h); areas[index] = w * h; } void calculateArea(const int recs, double *area) { double *areas = (double*) malloc(recs * sizeof(double)); if (areas == NULL) { fprintf(stderr, "malloc failed!\n"); return; } double *w_areas; hipError_t err = hipMalloc((void**) &w_areas, (recs * sizeof(double))); if (err != hipSuccess) { fprintf(stderr, "hipMalloc failed: %s\n", hipGetErrorString(err)); return; } const int threadCount = 512, loops = ceil((double) recs / threadCount); const double width = 1.0 / recs; for (int c = 0; c < loops; ++c) { //kernel<<<blocks, threads>>> calculateAreas<<<1, threadCount>>>(recs, width, c * threadCount, w_areas); } err = hipMemcpy(areas, w_areas, recs * sizeof(double), hipMemcpyDeviceToHost); if (err != hipSuccess) { fprintf(stderr, "hipMemcpy failed: %s\n", hipGetErrorString(err)); return; } *area = 0; for (int c = 0; c < recs; ++c) { *area += areas[c]; } *area *= 4; hipFree(w_areas); free(areas); }
.text .file "1-calc-pi-cuda.hip" .globl _Z29__device_stub__calculateAreasidiPd # -- Begin function _Z29__device_stub__calculateAreasidiPd .type _Z29__device_stub__calculateAreasidiPd,@function _Z29__device_stub__calculateAreasidiPd: # @_Z29__device_stub__calculateAreasidiPd .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 40(%rsp), %rcx movsd %xmm0, (%rcx) leaq 8(%rsp), %rdi movl %esi, (%rdi) leaq 32(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rdi, 16(%rbx) movq %rsi, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z14calculateAreasidiPd, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z29__device_stub__calculateAreasidiPd, .Lfunc_end0-_Z29__device_stub__calculateAreasidiPd .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _Z13calculateAreaiPd .LCPI1_0: .quad 0x3f60000000000000 # double 0.001953125 .LCPI1_1: .quad 0x3ff0000000000000 # double 1 .LCPI1_2: .quad 0x4010000000000000 # double 4 .text .globl _Z13calculateAreaiPd .type _Z13calculateAreaiPd,@function _Z13calculateAreaiPd: # @_Z13calculateAreaiPd .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $40, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rsi, %rbx movl %edi, %ebp movslq %edi, %r15 shlq $3, %r15 movq %r15, %rdi callq malloc testq %rax, %rax je .LBB1_18 # %bb.1: movq %rax, %r14 leaq 16(%rsp), %rdi movq %r15, %rsi callq hipMalloc testl %eax, %eax jne .LBB1_2 # %bb.4: movq %r15, 32(%rsp) # 8-byte Spill movq %rbx, 24(%rsp) # 8-byte Spill cvtsi2sd %ebp, %xmm1 movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero movsd %xmm1, 8(%rsp) # 8-byte Spill mulsd %xmm1, %xmm0 callq ceil@PLT cvttsd2si %xmm0, %r15d testl %r15d, %r15d jle .LBB1_9 # %bb.5: # %.lr.ph.preheader movsd .LCPI1_1(%rip), %xmm0 # xmm0 = mem[0],zero divsd 8(%rsp), %xmm0 # 8-byte Folded Reload movsd %xmm0, 8(%rsp) # 8-byte Spill xorl %r12d, %r12d movabsq $4294967297, %r13 # imm = 0x100000001 leaq 511(%r13), %rbx .LBB1_6: # %.lr.ph # =>This Inner Loop Header: Depth=1 movq %r13, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_8 # %bb.7: # in Loop: Header=BB1_6 Depth=1 movq 16(%rsp), %rdx movl %ebp, %edi movsd 8(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero movl %r12d, %esi callq _Z29__device_stub__calculateAreasidiPd .LBB1_8: # in Loop: Header=BB1_6 Depth=1 addl $512, %r12d # imm = 0x200 decl %r15d jne .LBB1_6 .LBB1_9: # %._crit_edge movq 16(%rsp), %rsi movq %r14, %rdi movq 32(%rsp), %rdx # 8-byte Reload movl $2, %ecx callq hipMemcpy testl %eax, %eax jne .LBB1_10 # %bb.11: testl %ebp, %ebp jle .LBB1_12 # %bb.16: # %.lr.ph39 movl %ebp, %eax xorpd %xmm0, %xmm0 xorl %ecx, %ecx movq 24(%rsp), %rdx # 8-byte Reload .LBB1_17: # =>This Inner Loop Header: Depth=1 addsd (%r14,%rcx,8), %xmm0 incq %rcx cmpq %rcx, %rax jne .LBB1_17 # %bb.13: # %._crit_edge40 mulsd .LCPI1_2(%rip), %xmm0 jmp .LBB1_14 .LBB1_12: xorpd %xmm0, %xmm0 movq 24(%rsp), %rdx # 8-byte Reload .LBB1_14: movsd %xmm0, (%rdx) movq 16(%rsp), %rdi callq hipFree movq %r14, %rdi callq free .LBB1_15: addq $40, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB1_18: .cfi_def_cfa_offset 96 movq stderr(%rip), %rcx movl $.L.str, %edi movl $15, %esi movl $1, %edx addq $40, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp fwrite@PLT # TAILCALL .LBB1_2: .cfi_def_cfa_offset 96 movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.1, %esi jmp .LBB1_3 .LBB1_10: movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.2, %esi .LBB1_3: movq %rbx, %rdi movq %rax, %rdx xorl %eax, %eax callq fprintf jmp .LBB1_15 .Lfunc_end1: .size _Z13calculateAreaiPd, .Lfunc_end1-_Z13calculateAreaiPd .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z14calculateAreasidiPd, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z14calculateAreasidiPd,@object # @_Z14calculateAreasidiPd .section .rodata,"a",@progbits .globl _Z14calculateAreasidiPd .p2align 3, 0x0 _Z14calculateAreasidiPd: .quad _Z29__device_stub__calculateAreasidiPd .size _Z14calculateAreasidiPd, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "malloc failed!\n" .size .L.str, 16 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "hipMalloc failed: %s\n" .size .L.str.1, 22 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "hipMemcpy failed: %s\n" .size .L.str.2, 22 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z14calculateAreasidiPd" .size .L__unnamed_1, 24 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z29__device_stub__calculateAreasidiPd .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z14calculateAreasidiPd .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z14calculateAreasidiPd ; -- Begin function _Z14calculateAreasidiPd .globl _Z14calculateAreasidiPd .p2align 8 .type _Z14calculateAreasidiPd,@function _Z14calculateAreasidiPd: ; @_Z14calculateAreasidiPd ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x10 s_load_b32 s3, s[0:1], 0x0 s_waitcnt lgkmcnt(0) v_add_nc_u32_e32 v0, s2, v0 s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_i32_e64 s3, v0 s_cbranch_execz .LBB0_2 ; %bb.1: v_cvt_f64_i32_e32 v[1:2], v0 s_clause 0x1 s_load_b64 s[2:3], s[0:1], 0x8 s_load_b64 s[0:1], s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[1:2], v[1:2], s[2:3] v_fma_f64 v[1:2], -v[1:2], v[1:2], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[1:2] v_cndmask_b32_e64 v3, 0, 1, vcc_lo v_lshlrev_b32_e32 v3, 8, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ldexp_f64 v[3:4], v[1:2], v3 v_rsq_f64_e32 v[5:6], v[3:4] s_waitcnt_depctr 0xfff v_mul_f64 v[7:8], v[3:4], v[5:6] v_mul_f64 v[5:6], v[5:6], 0.5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[9:10], -v[5:6], v[7:8], 0.5 v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8] v_fma_f64 v[5:6], v[5:6], v[9:10], v[5:6] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[9:10], -v[7:8], v[7:8], v[3:4] v_fma_f64 v[7:8], v[9:10], v[5:6], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[9:10], -v[7:8], v[7:8], v[3:4] v_fma_f64 v[5:6], v[9:10], v[5:6], v[7:8] v_cndmask_b32_e64 v7, 0, 0xffffff80, vcc_lo v_cmp_class_f64_e64 vcc_lo, v[3:4], 0x260 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ldexp_f64 v[5:6], v[5:6], v7 v_dual_cndmask_b32 v4, v6, v4 :: v_dual_cndmask_b32 v3, v5, v3 v_cmp_ngt_f64_e32 vcc_lo, 0x3cb00000, v[1:2] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v2, 0, v4 :: v_dual_cndmask_b32 v1, 0, v3 v_mul_f64 v[2:3], v[1:2], s[2:3] v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z14calculateAreasidiPd .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 32 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 4 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z14calculateAreasidiPd, .Lfunc_end0-_Z14calculateAreasidiPd ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 348 ; NumSgprs: 6 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 6 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 8 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: by_value - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 32 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z14calculateAreasidiPd .private_segment_fixed_size: 0 .sgpr_count: 6 .sgpr_spill_count: 0 .symbol: _Z14calculateAreasidiPd.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
b34f78be88e645ee5749f57183ba99c78b343e39
__global__ void subtract_and_square(float *dest, float *a, float *b, int n) { // const int index = threadIdx.x * (threadIdx.y + 1); // dest[index] = ( a[index] - b[index] ) * ( a[index] - b[index] ); int index = blockDim.x * blockIdx.x + threadIdx.x; if (index < n) dest[index] = ( a[index] - b[index] ) * ( a[index] - b[index] ); }
.file "tmpxft_0038749e_00000000-6_sas.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z44__device_stub__Z19subtract_and_squarePfS_S_iPfS_S_i .type _Z44__device_stub__Z19subtract_and_squarePfS_S_iPfS_S_i, @function _Z44__device_stub__Z19subtract_and_squarePfS_S_iPfS_S_i: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z19subtract_and_squarePfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z44__device_stub__Z19subtract_and_squarePfS_S_iPfS_S_i, .-_Z44__device_stub__Z19subtract_and_squarePfS_S_iPfS_S_i .globl _Z19subtract_and_squarePfS_S_i .type _Z19subtract_and_squarePfS_S_i, @function _Z19subtract_and_squarePfS_S_i: .LFB2033: .cfi_startproc endbr64 jmp _Z44__device_stub__Z19subtract_and_squarePfS_S_iPfS_S_i .cfi_endproc .LFE2033: .size _Z19subtract_and_squarePfS_S_i, .-_Z19subtract_and_squarePfS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z19subtract_and_squarePfS_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z19subtract_and_squarePfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z19subtract_and_squarePfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x170] ; /* 0x00005c0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ FADD R0, -R4, R3 ; /* 0x0000000304007221 */ /* 0x004fc80000000100 */ /*00e0*/ FMUL R9, R0, R0 ; /* 0x0000000000097220 */ /* 0x000fca0000400000 */ /*00f0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*0100*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0110*/ BRA 0x110; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> __global__ void subtract_and_square(float *dest, float *a, float *b, int n) { // const int index = threadIdx.x * (threadIdx.y + 1); // dest[index] = ( a[index] - b[index] ) * ( a[index] - b[index] ); int index = blockDim.x * blockIdx.x + threadIdx.x; if (index < n) dest[index] = ( a[index] - b[index] ) * ( a[index] - b[index] ); }
.text .file "sas.hip" .globl _Z34__device_stub__subtract_and_squarePfS_S_i # -- Begin function _Z34__device_stub__subtract_and_squarePfS_S_i .type _Z34__device_stub__subtract_and_squarePfS_S_i,@function _Z34__device_stub__subtract_and_squarePfS_S_i: # @_Z34__device_stub__subtract_and_squarePfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z19subtract_and_squarePfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z34__device_stub__subtract_and_squarePfS_S_i, .Lfunc_end0-_Z34__device_stub__subtract_and_squarePfS_S_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z19subtract_and_squarePfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z19subtract_and_squarePfS_S_i,@object # @_Z19subtract_and_squarePfS_S_i .section .rodata,"a",@progbits .globl _Z19subtract_and_squarePfS_S_i .p2align 3, 0x0 _Z19subtract_and_squarePfS_S_i: .quad _Z34__device_stub__subtract_and_squarePfS_S_i .size _Z19subtract_and_squarePfS_S_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z19subtract_and_squarePfS_S_i" .size .L__unnamed_1, 31 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z34__device_stub__subtract_and_squarePfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z19subtract_and_squarePfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z19subtract_and_squarePfS_S_i ; -- Begin function _Z19subtract_and_squarePfS_S_i .globl _Z19subtract_and_squarePfS_S_i .p2align 8 .type _Z19subtract_and_squarePfS_S_i,@function _Z19subtract_and_squarePfS_S_i: ; @_Z19subtract_and_squarePfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s4, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo s_waitcnt vmcnt(0) v_sub_f32_e32 v2, v2, v3 s_delay_alu instid0(VALU_DEP_1) v_mul_f32_e32 v2, v2, v2 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z19subtract_and_squarePfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z19subtract_and_squarePfS_S_i, .Lfunc_end0-_Z19subtract_and_squarePfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 192 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z19subtract_and_squarePfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z19subtract_and_squarePfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
885df060f9c2bd7d7b9e74f8e6aacdb9e0883f64
#include <cuda.h> template<typename T> __device__ __forceinline__ T ldg(const T* ptr) { #if __CUDA_ARCH__ >= 350 return __ldg(ptr); #else return *ptr; #endif } extern "C" __global__ void transpose_constY( int nx , int ny , int nz , float * in , float * out // XYZ -> ZYX ) { int kx = blockIdx.x*blockDim.x + threadIdx.x; int ky = blockIdx.y*blockDim.y + threadIdx.y; if (kx < nx && ky < ny) { // input is ordered by {X,Y,Z} // output is ordered by {Z,Y,X} // out[z*num_y*num_x + y*num_x + x] := in[x*num_y*num_z + y*num_z + z] //float * in_xy = &in[kx*ny*nz + ky*nz]; int k_0 = kx + ky*nx; int k_1 = kx*ny*nz + ky*nz; int i = 0; for (; i < nz; i++, k_0+=ny*nx, k_1++) { out[k_0] = ldg(&in[k_1]); } } }
.file "tmpxft_00254ebe_00000000-6_cu_transpose.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2011: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2011: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z41__device_stub__Z16transpose_constYiiiPfS_iiiPfS_ .type _Z41__device_stub__Z16transpose_constYiiiPfS_iiiPfS_, @function _Z41__device_stub__Z16transpose_constYiiiPfS_iiiPfS_: .LFB2033: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movl %edi, 28(%rsp) leaq 48(%rsp), %rdi movl %esi, 24(%rsp) leaq 60(%rsp), %rsi movl %edx, 20(%rsp) leaq 32(%rsp), %rdx movq %rcx, 8(%rsp) leaq 40(%rsp), %rcx movq %r8, (%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 28(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 24(%rsp), %rax movq %rax, 104(%rsp) leaq 20(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 168 leaq transpose_constY(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 176 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2033: .size _Z41__device_stub__Z16transpose_constYiiiPfS_iiiPfS_, .-_Z41__device_stub__Z16transpose_constYiiiPfS_iiiPfS_ .globl transpose_constY .type transpose_constY, @function transpose_constY: .LFB2034: .cfi_startproc endbr64 jmp _Z41__device_stub__Z16transpose_constYiiiPfS_iiiPfS_ .cfi_endproc .LFE2034: .size transpose_constY, .-transpose_constY .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "transpose_constY" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2036: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq transpose_constY(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2036: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : transpose_constY .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002600 */ /*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */ /* 0x000e280000002200 */ /*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e680000002500 */ /*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e620000002100 */ /*0050*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */ /* 0x001fca00078e0202 */ /*0060*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x164], PT ; /* 0x0000590003007a0c */ /* 0x000fe20003f06270 */ /*0070*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */ /* 0x002fca00078e0205 */ /*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x160], P0 ; /* 0x0000580000007a0c */ /* 0x000fda0000706670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fca00078e00ff */ /*00b0*/ ISETP.GE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */ /* 0x000fda0003f06270 */ /*00c0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*00d0*/ IADD3 R4, R2, -0x1, RZ ; /* 0xffffffff02047810 */ /* 0x000fe20007ffe0ff */ /*00e0*/ IMAD R14, R3, c[0x0][0x160], R0 ; /* 0x00005800030e7a24 */ /* 0x000fe200078e0200 */ /*00f0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0100*/ IMAD R0, R0, c[0x0][0x164], R3 ; /* 0x0000590000007a24 */ /* 0x000fe200078e0203 */ /*0110*/ ISETP.GE.U32.AND P0, PT, R4, 0x3, PT ; /* 0x000000030400780c */ /* 0x000fe40003f06070 */ /*0120*/ MOV R3, c[0x0][0x164] ; /* 0x0000590000037a02 */ /* 0x000fe20000000f00 */ /*0130*/ IMAD R0, R0, c[0x0][0x168], RZ ; /* 0x00005a0000007a24 */ /* 0x000fe200078e02ff */ /*0140*/ LOP3.LUT R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */ /* 0x000fc600078ec0ff */ /*0150*/ IMAD R3, R3, c[0x0][0x160], RZ ; /* 0x0000580003037a24 */ /* 0x000fcc00078e02ff */ /*0160*/ @!P0 BRA 0x970 ; /* 0x0000080000008947 */ /* 0x000fea0003800000 */ /*0170*/ IADD3 R4, -R2, c[0x0][0x168], RZ ; /* 0x00005a0002047a10 */ /* 0x000fe20007ffe1ff */ /*0180*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc600078e00ff */ /*0190*/ ISETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe20003f04270 */ /*01a0*/ IMAD.WIDE R12, R0, R5, c[0x0][0x170] ; /* 0x00005c00000c7625 */ /* 0x000fd800078e0205 */ /*01b0*/ @!P0 BRA 0x830 ; /* 0x0000067000008947 */ /* 0x000fea0003800000 */ /*01c0*/ ISETP.GT.AND P1, PT, R4, 0xc, PT ; /* 0x0000000c0400780c */ /* 0x000fe40003f24270 */ /*01d0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*01e0*/ @!P1 BRA 0x5e0 ; /* 0x000003f000009947 */ /* 0x000fea0003800000 */ /*01f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0200*/ LDG.E.CONSTANT R24, [R12.64] ; /* 0x000000040c187981 */ /* 0x0020a8000c1e9900 */ /*0210*/ LDG.E.CONSTANT R31, [R12.64+0x4] ; /* 0x000004040c1f7981 */ /* 0x0000e8000c1e9900 */ /*0220*/ LDG.E.CONSTANT R26, [R12.64+0x8] ; /* 0x000008040c1a7981 */ /* 0x000128000c1e9900 */ /*0230*/ LDG.E.CONSTANT R29, [R12.64+0xc] ; /* 0x00000c040c1d7981 */ /* 0x000168000c1e9900 */ /*0240*/ LDG.E.CONSTANT R23, [R12.64+0x10] ; /* 0x000010040c177981 */ /* 0x000168000c1e9900 */ /*0250*/ LDG.E.CONSTANT R25, [R12.64+0x14] ; /* 0x000014040c197981 */ /* 0x000168000c1e9900 */ /*0260*/ LDG.E.CONSTANT R27, [R12.64+0x18] ; /* 0x000018040c1b7981 */ /* 0x000168000c1e9900 */ /*0270*/ LDG.E.CONSTANT R36, [R12.64+0x1c] ; /* 0x00001c040c247981 */ /* 0x000168000c1e9900 */ /*0280*/ LDG.E.CONSTANT R37, [R12.64+0x20] ; /* 0x000020040c257981 */ /* 0x000168000c1e9900 */ /*0290*/ LDG.E.CONSTANT R33, [R12.64+0x24] ; /* 0x000024040c217981 */ /* 0x000168000c1e9900 */ /*02a0*/ LDG.E.CONSTANT R11, [R12.64+0x28] ; /* 0x000028040c0b7981 */ /* 0x000168000c1e9900 */ /*02b0*/ LDG.E.CONSTANT R10, [R12.64+0x2c] ; /* 0x00002c040c0a7981 */ /* 0x000168000c1e9900 */ /*02c0*/ LDG.E.CONSTANT R9, [R12.64+0x30] ; /* 0x000030040c097981 */ /* 0x000168000c1e9900 */ /*02d0*/ LDG.E.CONSTANT R8, [R12.64+0x34] ; /* 0x000034040c087981 */ /* 0x000168000c1e9900 */ /*02e0*/ LDG.E.CONSTANT R7, [R12.64+0x38] ; /* 0x000038040c077981 */ /* 0x000168000c1e9900 */ /*02f0*/ LDG.E.CONSTANT R6, [R12.64+0x3c] ; /* 0x00003c040c067981 */ /* 0x000162000c1e9900 */ /*0300*/ IMAD.WIDE R18, R14, R5, c[0x0][0x178] ; /* 0x00005e000e127625 */ /* 0x000fe200078e0205 */ /*0310*/ IADD3 R14, R3, R14, R3 ; /* 0x0000000e030e7210 */ /* 0x000fc40007ffe003 */ /*0320*/ IADD3 R4, R4, -0x10, RZ ; /* 0xfffffff004047810 */ /* 0x000fe40007ffe0ff */ /*0330*/ IADD3 R20, R3.reuse, R14, R3 ; /* 0x0000000e03147210 */ /* 0x040fe20007ffe003 */ /*0340*/ IMAD.WIDE R14, R3.reuse, 0x4, R18 ; /* 0x00000004030e7825 */ /* 0x040fe200078e0212 */ /*0350*/ ISETP.GT.AND P1, PT, R4, 0xc, PT ; /* 0x0000000c0400780c */ /* 0x000fe40003f24270 */ /*0360*/ IADD3 R22, R3.reuse, R20, R3.reuse ; /* 0x0000001403167210 */ /* 0x140fe20007ffe003 */ /*0370*/ IMAD.WIDE R20, R20, R5, c[0x0][0x178] ; /* 0x00005e0014147625 */ /* 0x000fe200078e0205 */ /*0380*/ IADD3 R12, P2, R12, 0x40, RZ ; /* 0x000000400c0c7810 */ /* 0x001fe40007f5e0ff */ /*0390*/ IADD3 R22, R3.reuse, R22, R3 ; /* 0x0000001603167210 */ /* 0x040fe20007ffe003 */ /*03a0*/ IMAD.WIDE R16, R3, 0x4, R14 ; /* 0x0000000403107825 */ /* 0x000fe200078e020e */ /*03b0*/ IADD3 R0, R0, 0x10, RZ ; /* 0x0000001000007810 */ /* 0x000fc40007ffe0ff */ /*03c0*/ IADD3 R32, R3.reuse, R22, R3 ; /* 0x0000001603207210 */ /* 0x040fe20007ffe003 */ /*03d0*/ IMAD.WIDE R34, R3, 0x4, R20 ; /* 0x0000000403227825 */ /* 0x000fc600078e0214 */ /*03e0*/ IADD3 R32, R3, R32, R3 ; /* 0x0000002003207210 */ /* 0x000fe20007ffe003 */ /*03f0*/ IMAD.X R13, RZ, RZ, R13, P2 ; /* 0x000000ffff0d7224 */ /* 0x000fe200010e060d */ /*0400*/ STG.E [R18.64], R24 ; /* 0x0000001812007986 */ /* 0x004fe8000c101904 */ /*0410*/ STG.E [R14.64], R31 ; /* 0x0000001f0e007986 */ /* 0x0081e8000c101904 */ /*0420*/ STG.E [R16.64], R26 ; /* 0x0000001a10007986 */ /* 0x0103e2000c101904 */ /*0430*/ IMAD.WIDE R14, R22, R5, c[0x0][0x178] ; /* 0x00005e00160e7625 */ /* 0x001fc800078e0205 */ /*0440*/ IMAD.WIDE R30, R3, 0x4, R16 ; /* 0x00000004031e7825 */ /* 0x000fc800078e0210 */ /*0450*/ IMAD.WIDE R16, R32, R5, c[0x0][0x178] ; /* 0x00005e0020107625 */ /* 0x002fe200078e0205 */ /*0460*/ STG.E [R30.64], R29 ; /* 0x0000001d1e007986 */ /* 0x0201e6000c101904 */ /*0470*/ IMAD.WIDE R18, R3.reuse, 0x4, R14 ; /* 0x0000000403127825 */ /* 0x040fe200078e020e */ /*0480*/ STG.E [R20.64], R23 ; /* 0x0000001714007986 */ /* 0x0003e8000c101904 */ /*0490*/ STG.E [R34.64], R25 ; /* 0x0000001922007986 */ /* 0x0005e2000c101904 */ /*04a0*/ IMAD.WIDE R28, R3, 0x4, R34 ; /* 0x00000004031c7825 */ /* 0x001fc800078e0222 */ /*04b0*/ IMAD.WIDE R20, R3.reuse, 0x4, R16 ; /* 0x0000000403147825 */ /* 0x042fe200078e0210 */ /*04c0*/ STG.E [R28.64], R27 ; /* 0x0000001b1c007986 */ /* 0x0001e6000c101904 */ /*04d0*/ IMAD.WIDE R24, R3, 0x4, R18 ; /* 0x0000000403187825 */ /* 0x004fc800078e0212 */ /*04e0*/ IMAD.WIDE R22, R3, 0x4, R28 ; /* 0x0000000403167825 */ /* 0x000fc800078e021c */ /*04f0*/ IMAD.WIDE R30, R3.reuse, 0x4, R24 ; /* 0x00000004031e7825 */ /* 0x040fe200078e0218 */ /*0500*/ STG.E [R22.64], R36 ; /* 0x0000002416007986 */ /* 0x000fe6000c101904 */ /*0510*/ IMAD.WIDE R26, R3.reuse, 0x4, R20 ; /* 0x00000004031a7825 */ /* 0x041fe200078e0214 */ /*0520*/ STG.E [R14.64], R37 ; /* 0x000000250e007986 */ /* 0x0001e8000c101904 */ /*0530*/ STG.E [R18.64], R33 ; /* 0x0000002112007986 */ /* 0x0003e2000c101904 */ /*0540*/ IMAD.WIDE R34, R3, 0x4, R26 ; /* 0x0000000403227825 */ /* 0x000fc600078e021a */ /*0550*/ STG.E [R24.64], R11 ; /* 0x0000000b18007986 */ /* 0x0003e8000c101904 */ /*0560*/ STG.E [R30.64], R10 ; /* 0x0000000a1e007986 */ /* 0x0003e2000c101904 */ /*0570*/ IADD3 R14, R3, R32, R3 ; /* 0x00000020030e7210 */ /* 0x001fc60007ffe003 */ /*0580*/ STG.E [R16.64], R9 ; /* 0x0000000910007986 */ /* 0x0003e2000c101904 */ /*0590*/ IADD3 R14, R3, R14, R3 ; /* 0x0000000e030e7210 */ /* 0x000fc60007ffe003 */ /*05a0*/ STG.E [R20.64], R8 ; /* 0x0000000814007986 */ /* 0x0003e8000c101904 */ /*05b0*/ STG.E [R26.64], R7 ; /* 0x000000071a007986 */ /* 0x0003e8000c101904 */ /*05c0*/ STG.E [R34.64], R6 ; /* 0x0000000622007986 */ /* 0x0003e2000c101904 */ /*05d0*/ @P1 BRA 0x200 ; /* 0xfffffc2000001947 */ /* 0x000fea000383ffff */ /*05e0*/ ISETP.GT.AND P1, PT, R4, 0x4, PT ; /* 0x000000040400780c */ /* 0x000fda0003f24270 */ /*05f0*/ @!P1 BRA 0x810 ; /* 0x0000021000009947 */ /* 0x000fea0003800000 */ /*0600*/ LDG.E.CONSTANT R25, [R12.64] ; /* 0x000000040c197981 */ /* 0x0020a8000c1e9900 */ /*0610*/ LDG.E.CONSTANT R27, [R12.64+0x4] ; /* 0x000004040c1b7981 */ /* 0x0000e8000c1e9900 */ /*0620*/ LDG.E.CONSTANT R29, [R12.64+0x8] ; /* 0x000008040c1d7981 */ /* 0x000128000c1e9900 */ /*0630*/ LDG.E.CONSTANT R31, [R12.64+0xc] ; /* 0x00000c040c1f7981 */ /* 0x000168000c1e9900 */ /*0640*/ LDG.E.CONSTANT R33, [R12.64+0x10] ; /* 0x000010040c217981 */ /* 0x000168000c1e9900 */ /*0650*/ LDG.E.CONSTANT R35, [R12.64+0x14] ; /* 0x000014040c237981 */ /* 0x000168000c1e9900 */ /*0660*/ LDG.E.CONSTANT R37, [R12.64+0x18] ; /* 0x000018040c257981 */ /* 0x000168000c1e9900 */ /*0670*/ LDG.E.CONSTANT R26, [R12.64+0x1c] ; /* 0x00001c040c1a7981 */ /* 0x000162000c1e9900 */ /*0680*/ IADD3 R6, R3, R14, R3 ; /* 0x0000000e03067210 */ /* 0x000fe20007ffe003 */ /*0690*/ IMAD.WIDE R16, R14, R5, c[0x0][0x178] ; /* 0x00005e000e107625 */ /* 0x000fe200078e0205 */ /*06a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*06b0*/ IADD3 R24, R3.reuse, R6, R3 ; /* 0x0000000603187210 */ /* 0x040fe40007ffe003 */ /*06c0*/ IADD3 R0, R0, 0x8, RZ ; /* 0x0000000800007810 */ /* 0x000fe20007ffe0ff */ /*06d0*/ IMAD.WIDE R18, R3.reuse, 0x4, R16 ; /* 0x0000000403127825 */ /* 0x040fe200078e0210 */ /*06e0*/ IADD3 R4, R4, -0x8, RZ ; /* 0xfffffff804047810 */ /* 0x000fe40007ffe0ff */ /*06f0*/ IADD3 R12, P1, R12, 0x20, RZ ; /* 0x000000200c0c7810 */ /* 0x001fe20007f3e0ff */ /*0700*/ IMAD.WIDE R6, R24, R5, c[0x0][0x178] ; /* 0x00005e0018067625 */ /* 0x000fe200078e0205 */ /*0710*/ IADD3 R24, R3.reuse, R24, R3 ; /* 0x0000001803187210 */ /* 0x040fe40007ffe003 */ /*0720*/ IADD3.X R13, RZ, R13, RZ, P1, !PT ; /* 0x0000000dff0d7210 */ /* 0x000fe20000ffe4ff */ /*0730*/ IMAD.WIDE R20, R3, 0x4, R18 ; /* 0x0000000403147825 */ /* 0x000fc800078e0212 */ /*0740*/ IMAD.WIDE R8, R3, 0x4, R6 ; /* 0x0000000403087825 */ /* 0x000fc800078e0206 */ /*0750*/ IMAD.WIDE R14, R3, 0x4, R20 ; /* 0x00000004030e7825 */ /* 0x000fc800078e0214 */ /*0760*/ IMAD.WIDE R10, R3, 0x4, R8 ; /* 0x00000004030a7825 */ /* 0x000fcc00078e0208 */ /*0770*/ IMAD.WIDE R22, R3.reuse, 0x4, R10 ; /* 0x0000000403167825 */ /* 0x040fe200078e020a */ /*0780*/ STG.E [R16.64], R25 ; /* 0x0000001910007986 */ /* 0x004fe8000c101904 */ /*0790*/ STG.E [R18.64], R27 ; /* 0x0000001b12007986 */ /* 0x008fe8000c101904 */ /*07a0*/ STG.E [R20.64], R29 ; /* 0x0000001d14007986 */ /* 0x010fe8000c101904 */ /*07b0*/ STG.E [R14.64], R31 ; /* 0x0000001f0e007986 */ /* 0x0201e8000c101904 */ /*07c0*/ STG.E [R6.64], R33 ; /* 0x0000002106007986 */ /* 0x0003e8000c101904 */ /*07d0*/ STG.E [R8.64], R35 ; /* 0x0000002308007986 */ /* 0x0003e8000c101904 */ /*07e0*/ STG.E [R10.64], R37 ; /* 0x000000250a007986 */ /* 0x0003e2000c101904 */ /*07f0*/ IADD3 R14, R3, R24, R3 ; /* 0x00000018030e7210 */ /* 0x001fc60007ffe003 */ /*0800*/ STG.E [R22.64], R26 ; /* 0x0000001a16007986 */ /* 0x0003e8000c101904 */ /*0810*/ ISETP.NE.OR P0, PT, R4, RZ, P0 ; /* 0x000000ff0400720c */ /* 0x000fda0000705670 */ /*0820*/ @!P0 BRA 0x970 ; /* 0x0000014000008947 */ /* 0x000fea0003800000 */ /*0830*/ LDG.E.CONSTANT R15, [R12.64] ; /* 0x000000040c0f7981 */ /* 0x0000a8000c1e9900 */ /*0840*/ LDG.E.CONSTANT R19, [R12.64+0x4] ; /* 0x000004040c137981 */ /* 0x0020e8000c1e9900 */ /*0850*/ LDG.E.CONSTANT R21, [R12.64+0x8] ; /* 0x000008040c157981 */ /* 0x000128000c1e9900 */ /*0860*/ LDG.E.CONSTANT R23, [R12.64+0xc] ; /* 0x00000c040c177981 */ /* 0x000162000c1e9900 */ /*0870*/ IMAD.WIDE R6, R14, R5, c[0x0][0x178] ; /* 0x00005e000e067625 */ /* 0x000fe200078e0205 */ /*0880*/ IADD3 R4, R4, -0x4, RZ ; /* 0xfffffffc04047810 */ /* 0x000fc40007ffe0ff */ /*0890*/ IADD3 R14, R3.reuse, R14, R3 ; /* 0x0000000e030e7210 */ /* 0x040fe40007ffe003 */ /*08a0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe20003f05270 */ /*08b0*/ IMAD.WIDE R8, R3.reuse, 0x4, R6 ; /* 0x0000000403087825 */ /* 0x040fe200078e0206 */ /*08c0*/ IADD3 R0, R0, 0x4, RZ ; /* 0x0000000400007810 */ /* 0x000fe40007ffe0ff */ /*08d0*/ IADD3 R12, P1, R12, 0x10, RZ ; /* 0x000000100c0c7810 */ /* 0x001fe40007f3e0ff */ /*08e0*/ IADD3 R14, R3.reuse, R14, R3 ; /* 0x0000000e030e7210 */ /* 0x040fe20007ffe003 */ /*08f0*/ IMAD.WIDE R10, R3, 0x4, R8 ; /* 0x00000004030a7825 */ /* 0x000fc800078e0208 */ /*0900*/ IMAD.X R13, RZ, RZ, R13, P1 ; /* 0x000000ffff0d7224 */ /* 0x000fe400008e060d */ /*0910*/ IMAD.WIDE R16, R3, 0x4, R10 ; /* 0x0000000403107825 */ /* 0x000fe200078e020a */ /*0920*/ STG.E [R6.64], R15 ; /* 0x0000000f06007986 */ /* 0x0041e8000c101904 */ /*0930*/ STG.E [R8.64], R19 ; /* 0x0000001308007986 */ /* 0x0081e8000c101904 */ /*0940*/ STG.E [R10.64], R21 ; /* 0x000000150a007986 */ /* 0x0101e8000c101904 */ /*0950*/ STG.E [R16.64], R23 ; /* 0x0000001710007986 */ /* 0x0201e4000c101904 */ /*0960*/ @P0 BRA 0x830 ; /* 0xfffffec000000947 */ /* 0x001fea000383ffff */ /*0970*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fda0003f05270 */ /*0980*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0990*/ IMAD.MOV.U32 R15, RZ, RZ, 0x4 ; /* 0x00000004ff0f7424 */ /* 0x000fc800078e00ff */ /*09a0*/ IMAD.WIDE R4, R0, R15, c[0x0][0x170] ; /* 0x00005c0000047625 */ /* 0x000fc800078e020f */ /*09b0*/ IMAD.WIDE R14, R14, R15, c[0x0][0x178] ; /* 0x00005e000e0e7625 */ /* 0x000fe200078e020f */ /*09c0*/ MOV R7, R5 ; /* 0x0000000500077202 */ /* 0x002fca0000000f00 */ /*09d0*/ IMAD.MOV.U32 R5, RZ, RZ, R7 ; /* 0x000000ffff057224 */ /* 0x000fcc00078e0007 */ /*09e0*/ LDG.E.CONSTANT R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x0000a2000c1e9900 */ /*09f0*/ IADD3 R2, R2, -0x1, RZ ; /* 0xffffffff02027810 */ /* 0x000fc80007ffe0ff */ /*0a00*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fe40003f05270 */ /*0a10*/ IADD3 R4, P1, R4, 0x4, RZ ; /* 0x0000000404047810 */ /* 0x001fc80007f3e0ff */ /*0a20*/ IADD3.X R7, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff077210 */ /* 0x000fe20000ffe4ff */ /*0a30*/ STG.E [R14.64], R5 ; /* 0x000000050e007986 */ /* 0x0041e4000c101904 */ /*0a40*/ IMAD.WIDE R14, R3, 0x4, R14 ; /* 0x00000004030e7825 */ /* 0x001fc800078e020e */ /*0a50*/ @P0 BRA 0x9d0 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*0a60*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0a70*/ BRA 0xa70; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0a80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0aa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ab0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ac0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ad0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ae0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0af0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> template<typename T> __device__ __forceinline__ T ldg(const T* ptr) { #if __CUDA_ARCH__ >= 350 return __ldg(ptr); #else return *ptr; #endif } extern "C" __global__ void transpose_constY( int nx , int ny , int nz , float * in , float * out // XYZ -> ZYX ) { int kx = blockIdx.x*blockDim.x + threadIdx.x; int ky = blockIdx.y*blockDim.y + threadIdx.y; if (kx < nx && ky < ny) { // input is ordered by {X,Y,Z} // output is ordered by {Z,Y,X} // out[z*num_y*num_x + y*num_x + x] := in[x*num_y*num_z + y*num_z + z] //float * in_xy = &in[kx*ny*nz + ky*nz]; int k_0 = kx + ky*nx; int k_1 = kx*ny*nz + ky*nz; int i = 0; for (; i < nz; i++, k_0+=ny*nx, k_1++) { out[k_0] = ldg(&in[k_1]); } } }
.text .file "cu_transpose.hip" .globl __device_stub__transpose_constY # -- Begin function __device_stub__transpose_constY .type __device_stub__transpose_constY,@function __device_stub__transpose_constY: # @__device_stub__transpose_constY .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 8(%rsp), %rdi movl %esi, (%rdi) leaq 4(%rsp), %rsi movl %edx, (%rsi) leaq 40(%rsp), %rdx movq %rcx, (%rdx) leaq 32(%rsp), %rcx movq %r8, (%rcx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $transpose_constY, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size __device_stub__transpose_constY, .Lfunc_end0-__device_stub__transpose_constY .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $transpose_constY, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type transpose_constY,@object # @transpose_constY .section .rodata,"a",@progbits .globl transpose_constY .p2align 3, 0x0 transpose_constY: .quad __device_stub__transpose_constY .size transpose_constY, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "transpose_constY" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __device_stub__transpose_constY .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym transpose_constY .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected transpose_constY ; -- Begin function transpose_constY .globl transpose_constY .p2align 8 .type transpose_constY,@function transpose_constY: ; @transpose_constY ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b128 s[4:7], s[0:1], 0x0 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s4, v0 v_cmp_gt_i32_e64 s2, s5, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_cmp_gt_i32 s6, 0 s_cselect_b32 s3, -1, 0 s_and_b32 s2, s2, s3 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_3 ; %bb.1: ; %.lr.ph v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2] s_load_b128 s[0:3], s[0:1], 0x10 v_mad_u64_u32 v[4:5], null, v1, s4, v[0:1] s_mul_i32 s4, s5, s4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_ashr_i32 s5, s4, 31 v_mul_lo_u32 v2, v2, s6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v5, 31, v4 v_ashrrev_i32_e32 v3, 31, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[0:1], 2, v[2:3] v_lshlrev_b64 v[2:3], 2, v[4:5] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, s2, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo s_lshl_b64 s[0:1], s[4:5], 2 .LBB0_2: ; =>This Inner Loop Header: Depth=1 global_load_b32 v4, v[0:1], off v_add_co_u32 v0, vcc_lo, v0, 4 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo s_add_i32 s6, s6, -1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s6, 0 s_waitcnt vmcnt(0) global_store_b32 v[2:3], v4, off v_add_co_u32 v2, vcc_lo, v2, s0 v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo s_cbranch_scc1 .LBB0_2 .LBB0_3: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel transpose_constY .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size transpose_constY, .Lfunc_end0-transpose_constY ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 308 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 4 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: transpose_constY .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: transpose_constY.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
81d954f2bbb5b0ae351bccb1cb24204dbac17b8d
#include <stdio.h> #include <stdlib.h> #include <iostream> #include <math.h> #include <cuda.h> #include <cuda_runtime.h> #include <sys/time.h> #define NPB_VERSION "3.3.1" using namespace std; #define min(x,y) (x) <= (y) ? (x) : (y) #define max(x,y) (x) >= (y) ? (x) : (y) // block sizes for CUDA kernels #define NORM_BLOCK 32 #define SOLVE_BLOCK 32 #define ERHS_BLOCK 32 // timer constants #define t_total 0 #define t_rhsx 1 #define t_rhsy 2 #define t_rhsz 3 #define t_rhs 4 #define t_xsolve 5 #define t_ysolve 6 #define t_zsolve 7 #define t_rdis1 8 #define t_rdis2 9 #define t_txinvr 10 #define t_pinvr 11 #define t_ninvr 12 #define t_tzetar 13 #define t_add 14 #define t_last 15 //--------------------------------------------------------------------- // diffusion coefficients //--------------------------------------------------------------------- #define dx1 0.75 #define dx2 0.75 #define dx3 0.75 #define dx4 0.75 #define dx5 0.75 #define dy1 0.75 #define dy2 0.75 #define dy3 0.75 #define dy4 0.75 #define dy5 0.75 #define dz1 1.0 #define dz2 1.0 #define dz3 1.0 #define dz4 1.0 #define dz5 1.0 //#define dxmax max(dx3,dx4) //#define dymax max(dy2,dy4) //#define dzmax max(dz2,dz3) #define dxmax dx3 #define dymax dy2 #define dzmax dz2 //--------------------------------------------------------------------- // fourth difference dissipation //--------------------------------------------------------------------- #define dssp (max(max(dx1,dy1),dz1)*.25) #define c4dssp (4.0*dssp) #define c5dssp (5.0*dssp) #define c1 1.4 #define c2 0.4 #define c3 0.1 #define c4 1.0 #define c5 1.4 #define c1c2 (c1*c2) #define c1c5 (c1*c5) #define c3c4 (c3*c4) #define c1345 (c1c5*c3c4) #define conz1 (1.0-c1c5) #define c2iv 2.5 #define con43 (4.0/3.0) #define con16 (1.0/6.0) // macros to linearize multidimensional array accesses #define fu(m,i,j,k) fu[(i)+nx*((j)+ny*((k)+nz*(m)))] #define forcing(m,i,j,k) forcing[(i)+nx*((j)+ny*((k)+nz*(m)))] #define rhs(m,i,j,k) rhs[m+(i)*5+(j)*5*nx+(k)*5*nx*ny] #define rho_i(i,j,k) rho_i[i+(j)*nx+(k)*nx*ny] #define us(i,j,k) us[i+(j)*nx+(k)*nx*ny] #define vs(i,j,k) vs[i+(j)*nx+(k)*nx*ny] #define ws(i,j,k) ws[i+(j)*nx+(k)*nx*ny] #define square(i,j,k) square[i+(j)*nx+(k)*nx*ny] #define qs(i,j,k) qs[i+(j)*nx+(k)*nx*ny] #define speed(i,j,k) speed[i+(j)*nx+(k)*nx*ny] static void inline HandleError( cudaError_t err, const char *file, int line ) { if (err != cudaSuccess) { printf( "%s in %s at line %d\n", cudaGetErrorString( err ), file, line ); exit( EXIT_FAILURE ); } } #define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ )) __constant__ double tx1, tx2, tx3, ty1, ty2, ty3, tz1, tz2, tz3; __constant__ double bt, dt, dtdssp; __constant__ double dnxm1, dnym1, dnzm1; __constant__ double dtx1, dttx2, dty1, dtty2, dtz1, dttz2, c2dttx1, c2dtty1, c2dttz1; __constant__ double comz1, comz4, comz5, comz6, c3c4tx3, c3c4ty3, c3c4tz3; __constant__ double xxcon1, xxcon2, xxcon3, xxcon4, xxcon5, dx1tx1, dx2tx1, dx3tx1, dx4tx1, dx5tx1; __constant__ double yycon1, yycon2, yycon3, yycon4, yycon5, dy1ty1, dy2ty1, dy3ty1, dy4ty1, dy5ty1; __constant__ double zzcon1, zzcon2, zzcon3, zzcon4, zzcon5, dz1tz1, dz2tz1, dz3tz1, dz4tz1, dz5tz1; __constant__ double ce[13][5]; //--------------------------------------------------------------------- // exact_rhs computation //--------------------------------------------------------------------- __device__ static void exact_solution_kernel (const double xi, const double eta, const double zta, double *dtemp) { for (int m = 0; m < 5; m++) dtemp[m] = ce[0][m] + xi*(ce[1][m] + xi*(ce[4][m] + xi*(ce[7][m] + xi*ce[10][m]))) + eta*(ce[2][m] + eta*(ce[5][m] + eta*(ce[8][m] + eta*ce[11][m])))+ zta*(ce[3][m] + zta*(ce[6][m] + zta*(ce[9][m] + zta*ce[12][m]))); } __global__ static void exact_rhs_kernel_init (double *forcing, const int nx, const int ny, const int nz) { int i, j, k, m; k = blockIdx.y; j = blockIdx.x; i = threadIdx.x; for (m = 0; m < 5; m++) forcing(m,i,j,k) = (double)0.0; } __global__ static void exact_rhs_kernel_x (double *forcing, const int nx, const int ny, const int nz) { int i, j, k, m; double xi, eta, zta, dtemp[5], dtpp; double ue[5][5], buf[3][5], cuf[3], q[3]; k = blockIdx.x*blockDim.x+threadIdx.x+1; j = blockIdx.y*blockDim.y+threadIdx.y+1; if (k >= nz-1 || j >= ny-1) return; zta = (double)k * dnzm1; eta = (double)j * dnym1; //--------------------------------------------------------------------- // xi-direction flux differences //--------------------------------------------------------------------- for (i = 0; i < 3; i++) { xi = (double)i * dnxm1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[i+1][m] = dtemp[m]; dtpp = 1.0/dtemp[0]; for (m = 1; m < 5; m++) buf[i][m] = dtpp*dtemp[m]; cuf[i] = buf[i][1] * buf[i][1]; buf[i][0] = cuf[i] + buf[i][2] * buf[i][2] + buf[i][3] * buf[i][3]; q[i] = 0.5 * (buf[i][1]*ue[i+1][1] + buf[i][2]*ue[i+1][2] + buf[i][3]*ue[i+1][3]); } for (i = 1; i < nx-1; i++) { if (i+2 < nx) { xi = (double)(i+2) * dnxm1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[4][m] = dtemp[m]; } dtemp[0] = 0.0 - tx2*(ue[3][1]-ue[1][1])+ dx1tx1*(ue[3][0]-2.0*ue[2][0]+ue[1][0]); dtemp[1] = 0.0 - tx2*((ue[3][1]*buf[2][1]+c2*(ue[3][4]-q[2]))-(ue[1][1]*buf[0][1]+c2*(ue[1][4]-q[0])))+xxcon1*(buf[2][1]-2.0*buf[1][1]+buf[0][1])+dx2tx1*(ue[3][1]-2.0*ue[2][1]+ue[1][1]); dtemp[2] = 0.0 - tx2*(ue[3][2]*buf[2][1]-ue[1][2]*buf[0][1])+xxcon2*(buf[2][2]-2.0*buf[1][2]+buf[0][2])+dx3tx1*(ue[3][2]-2.0*ue[2][2]+ue[1][2]); dtemp[3] = 0.0 - tx2*(ue[3][3]*buf[2][1]-ue[1][3]*buf[0][1])+xxcon2*(buf[2][3]-2.0*buf[1][3]+buf[0][3])+dx4tx1*(ue[3][3]-2.0*ue[2][3]+ue[1][3]); dtemp[4] = 0.0 - tx2*(buf[2][1]*(c1*ue[3][4]-c2*q[2])-buf[0][1]*(c1*ue[1][4]-c2*q[0]))+0.5*xxcon3*(buf[2][0]-2.0*buf[1][0]+buf[0][0])+xxcon4*(cuf[2]-2.0*cuf[1]+cuf[0])+ xxcon5*(buf[2][4]-2.0*buf[1][4]+buf[0][4])+dx5tx1*(ue[3][4]-2.0*ue[2][4]+ ue[1][4]); //--------------------------------------------------------------------- // Fourth-order dissipation //--------------------------------------------------------------------- if (i == 1) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(5.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (i == 2) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(-4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (i >= 3 && i < nx-3) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(ue[0][m] - 4.0*ue[1][m]+6.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (i == nx-3) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(ue[0][m] - 4.0*ue[1][m] +6.0*ue[2][m] - 4.0*ue[3][m]); } else if (i == nx-2) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(ue[0][m] - 4.0*ue[1][m] + 5.0*ue[2][m]); } for (m = 0; m < 5; m++) { ue[0][m] = ue[1][m]; ue[1][m] = ue[2][m]; ue[2][m] = ue[3][m]; ue[3][m] = ue[4][m]; buf[0][m] = buf[1][m]; buf[1][m] = buf[2][m]; } cuf[0] = cuf[1]; cuf[1] = cuf[2]; q[0] = q[1]; q[1] = q[2]; if (i < nx-2) { dtpp = 1.0/ue[3][0]; for (m = 1; m < 5; m++) buf[2][m] = dtpp*ue[3][m]; cuf[2] = buf[2][1] * buf[2][1]; buf[2][0] = cuf[2] + buf[2][2] * buf[2][2] + buf[2][3] * buf[2][3]; q[2] = 0.5 * (buf[2][1]*ue[3][1] + buf[2][2]*ue[3][2] + buf[2][3]*ue[3][3]); } } } __global__ static void exact_rhs_kernel_y (double *forcing, const int nx, const int ny, const int nz) { int i, j, k, m; double xi, eta, zta, dtemp[5], dtpp; double ue[5][5], buf[3][5], cuf[3], q[3]; k = blockIdx.x*blockDim.x+threadIdx.x+1; i = blockIdx.y*blockDim.y+threadIdx.y+1; if (k >= nz-1 || i >= nx-1) return; zta = (double)k * dnzm1; xi = (double)i * dnxm1; //--------------------------------------------------------------------- // eta-direction flux differences //--------------------------------------------------------------------- for (j = 0; j < 3; j++) { eta = (double)j * dnym1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[j+1][m] = dtemp[m]; dtpp = 1.0/dtemp[0]; for (m = 1; m < 5; m++) buf[j][m] = dtpp * dtemp[m]; cuf[j] = buf[j][2] * buf[j][2]; buf[j][0] = cuf[j] + buf[j][1] * buf[j][1] + buf[j][3] * buf[j][3]; q[j] = 0.5*(buf[j][1]*ue[j+1][1] + buf[j][2]*ue[j+1][2] + buf[j][3]*ue[j+1][3]); } for (j = 1; j < ny-1; j++) { if (j+2 < ny) { eta = (double)(j+2) * dnym1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[4][m] = dtemp[m]; } dtemp[0] = forcing(0,i,j,k) - ty2*(ue[3][2]-ue[1][2])+ dy1ty1*(ue[3][0]-2.0*ue[2][0]+ue[1][0]); dtemp[1] = forcing(1,i,j,k) - ty2*(ue[3][1]*buf[2][2]-ue[1][1]*buf[0][2])+yycon2*(buf[2][1]-2.0*buf[1][1]+buf[0][1])+dy2ty1*(ue[3][1]-2.0*ue[2][1]+ ue[1][1]); dtemp[2] = forcing(2,i,j,k) - ty2*((ue[3][2]*buf[2][2]+c2*(ue[3][4]-q[2]))-(ue[1][2]*buf[0][2]+c2*(ue[1][4]-q[0])))+yycon1*(buf[2][2]-2.0*buf[1][2]+buf[0][2])+dy3ty1*( ue[3][2]-2.0*ue[2][2] +ue[1][2]); dtemp[3] = forcing(3,i,j,k) - ty2*(ue[3][3]*buf[2][2]-ue[1][3]*buf[0][2])+yycon2*(buf[2][3]-2.0*buf[1][3]+buf[0][3])+dy4ty1*( ue[3][3]-2.0*ue[2][3]+ ue[1][3]); dtemp[4] = forcing(4,i,j,k) - ty2*(buf[2][2]*(c1*ue[3][4]-c2*q[2])-buf[0][2]*(c1*ue[1][4]-c2*q[0]))+0.5*yycon3*(buf[2][0]-2.0*buf[1][0]+buf[0][0])+yycon4*(cuf[2]-2.0*cuf[1]+cuf[0])+ yycon5*(buf[2][4]-2.0*buf[1][4]+buf[0][4])+dy5ty1*(ue[3][4]-2.0*ue[2][4]+ue[1][4]); //--------------------------------------------------------------------- // Fourth-order dissipation //--------------------------------------------------------------------- if (j == 1) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp * (5.0*ue[2][m] - 4.0*ue[3][m] +ue[4][m]); } else if (j == 2) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp * (-4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (j >= 3 && j < ny-3) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(ue[0][m] - 4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (j == ny-3) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp * (ue[0][m] - 4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m]); } else if (j == ny-2) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp * (ue[0][m] - 4.0*ue[1][m] + 5.0*ue[2][m]); } for (m = 0; m < 5; m++) { ue[0][m] = ue[1][m]; ue[1][m] = ue[2][m]; ue[2][m] = ue[3][m]; ue[3][m] = ue[4][m]; buf[0][m] = buf[1][m]; buf[1][m] = buf[2][m]; } cuf[0] = cuf[1]; cuf[1] = cuf[2]; q[0] = q[1]; q[1] = q[2]; if (j < ny-2) { dtpp = 1.0/ue[3][0]; for (m = 1; m < 5; m++) buf[2][m] = dtpp * ue[3][m]; cuf[2] = buf[2][2] * buf[2][2]; buf[2][0] = cuf[2] + buf[2][1] * buf[2][1] + buf[2][3] * buf[2][3]; q[2] = 0.5*(buf[2][1]*ue[3][1] + buf[2][2]*ue[3][2] + buf[2][3]*ue[3][3]); } } } __global__ static void exact_rhs_kernel_z (double *forcing, const int nx, const int ny, const int nz) { int i, j, k, m; double xi, eta, zta, dtpp, dtemp[5]; double ue[5][5], buf[3][5], cuf[3], q[3]; j = blockIdx.x*blockDim.x+threadIdx.x+1; i = blockIdx.y*blockDim.y+threadIdx.y+1; if (j >= ny-1 || i >= nx-1) return; eta = (double)j * dnym1; xi = (double)i * dnxm1; //--------------------------------------------------------------------- // zeta-direction flux differences //--------------------------------------------------------------------- for (k = 0; k < 3; k++) { zta = (double)k * dnzm1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[k+1][m] = dtemp[m]; dtpp = 1.0/dtemp[0]; for (m = 1; m < 5; m++) buf[k][m] = dtpp * dtemp[m]; cuf[k] = buf[k][3] * buf[k][3]; buf[k][0] = cuf[k] + buf[k][1] * buf[k][1] + buf[k][2] * buf[k][2]; q[k] = 0.5*(buf[k][1]*ue[k+1][1] + buf[k][2]*ue[k+1][2] + buf[k][3]*ue[k+1][3]); } for (k = 1; k < nz-1; k++) { if (k+2 < nz) { zta = (double)(k+2) * dnzm1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[4][m] = dtemp[m]; } dtemp[0] = forcing(0,i,j,k) - tz2*(ue[3][3]-ue[1][3])+dz1tz1*(ue[3][0]-2.0*ue[2][0]+ue[1][0]); dtemp[1] = forcing(1,i,j,k) - tz2*(ue[3][1]*buf[2][3]-ue[1][1]*buf[0][3])+zzcon2*(buf[2][1]-2.0*buf[1][1]+buf[0][1])+dz2tz1*(ue[3][1]-2.0*ue[2][1]+ue[1][1]); dtemp[2] = forcing(2,i,j,k) - tz2*(ue[3][2]*buf[2][3]-ue[1][2]*buf[0][3])+zzcon2*(buf[2][2]-2.0*buf[1][2]+buf[0][2])+dz3tz1*(ue[3][2]-2.0*ue[2][2]+ue[1][2]); dtemp[3] = forcing(3,i,j,k) - tz2*((ue[3][3]*buf[2][3]+c2*(ue[3][4]-q[2]))-(ue[1][3]*buf[0][3]+c2*(ue[1][4]-q[0])))+zzcon1*(buf[2][3]-2.0*buf[1][3]+buf[0][3])+dz4tz1*(ue[3][3]-2.0*ue[2][3] +ue[1][3]); dtemp[4] = forcing(4,i,j,k) - tz2*(buf[2][3]*(c1*ue[3][4]-c2*q[2])-buf[0][3]*(c1*ue[1][4]-c2*q[0]))+0.5*zzcon3*(buf[2][0]-2.0*buf[1][0]+buf[0][0])+ zzcon4*(cuf[2]-2.0*cuf[1]+cuf[0])+zzcon5*(buf[2][4]-2.0*buf[1][4]+buf[0][4])+dz5tz1*(ue[3][4]-2.0*ue[2][4]+ue[1][4]); //--------------------------------------------------------------------- // Fourth-order dissipation //--------------------------------------------------------------------- if (k == 1) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(5.0*ue[2][m]-4.0*ue[3][m]+ue[4][m]); } else if (k == 2) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(-4.0*ue[1][m]+6.0*ue[2][m]-4.0*ue[3][m]+ue[4][m]); } else if (k >= 3 && k < nz-3) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(ue[0][m]-4.0*ue[1][m]+6.0*ue[2][m]-4.0*ue[3][m]+ue[4][m]); } else if (k == nz-3) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(ue[0][m]-4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m]); } else if (k == nz-2) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(ue[0][m]-4.0*ue[1][m]+5.0*ue[2][m]); } //--------------------------------------------------------------------- // now change the sign of the forcing function, //--------------------------------------------------------------------- for (m = 0; m < 5; m++) forcing(m,i,j,k) = -1.0 * dtemp[m]; for (m = 0; m < 5; m++) { ue[0][m] = ue[1][m]; ue[1][m] = ue[2][m]; ue[2][m] = ue[3][m]; ue[3][m] = ue[4][m]; buf[0][m] = buf[1][m]; buf[1][m] = buf[2][m]; } cuf[0] = cuf[1]; cuf[1] = cuf[2]; q[0] = q[1]; q[1] = q[2]; if (k < nz-2) { dtpp = 1.0/ue[3][0]; for (m = 1; m < 5; m++) buf[2][m] = dtpp * ue[3][m]; cuf[2] = buf[2][3] * buf[2][3]; buf[2][0] = cuf[2] + buf[2][1] * buf[2][1] + buf[2][2] * buf[2][2]; q[2] = 0.5*(buf[2][1]*ue[3][1] + buf[2][2]*ue[3][2] + buf[2][3]*ue[3][3]); } } } void exact_rhs (double* forcing, int nx, int ny, int nz) { dim3 gridinit(ny,nz); exact_rhs_kernel_init<<<gridinit,nx>>>(forcing, nx, ny, nz); int yblock = min(ERHS_BLOCK,ny); int ygrid = (ny+yblock-1)/yblock; int zblock_y = min(ERHS_BLOCK/yblock,nz); int zgrid_y = (nz+zblock_y-1)/zblock_y; dim3 grid_x(zgrid_y,ygrid), block_x(zblock_y,yblock); exact_rhs_kernel_x<<<grid_x,block_x>>>(forcing, nx, ny, nz); int xblock = min(ERHS_BLOCK,nx); int xgrid = (nx+xblock-1)/xblock; int zblock_x = min(ERHS_BLOCK/xblock,nz); int zgrid_x = (nz+zblock_x-1)/zblock_x; dim3 grid_y(zgrid_x,xgrid), block_y(zblock_x,xblock); exact_rhs_kernel_y<<<grid_y,block_y>>>(forcing, nx, ny, nz); int yblock_x = min(ERHS_BLOCK/xblock,ny); int ygrid_x = (ny+yblock_x-1)/yblock_x; dim3 grid_z(ygrid_x,xgrid), block_z(yblock_x,xblock); exact_rhs_kernel_z<<<grid_z,block_z>>>(forcing, nx, ny, nz); } //--------------------------------------------------------------------- // initialize_kernel //--------------------------------------------------------------------- __global__ static void initialize_kernel (double *fu, const int nx, const int ny, const int nz) { int i, j, k, m; double xi, eta, zta, temp[5]; double Pface11[5], Pface12[5], Pface21[5], Pface22[5], Pface31[5], Pface32[5]; double zero, one; k = blockIdx.x; j = blockIdx.y; i = threadIdx.x; //--------------------------------------------------------------------- // to compute the whole thing with a simple loop. Make sure those // values are nonzero by initializing the whole thing here. //--------------------------------------------------------------------- fu(0,i,j,k) = (double)1.0; fu(1,i,j,k) = (double)0.0; fu(2,i,j,k) = (double)0.0; fu(3,i,j,k) = (double)0.0; fu(4,i,j,k) = (double)1.0; zero = (double)0.0; one = (double)1.0; //--------------------------------------------------------------------- // first store the "interpolated" values everywhere on the zone //--------------------------------------------------------------------- zta = (double)k * dnzm1; eta = (double)j * dnym1; xi = (double)i * dnxm1; exact_solution_kernel (zero, eta, zta, Pface11); exact_solution_kernel (one, eta, zta, Pface12); exact_solution_kernel (xi, zero, zta, Pface21); exact_solution_kernel (xi, one, zta, Pface22); exact_solution_kernel (xi, eta, zero, Pface31); exact_solution_kernel (xi, eta, one, Pface32); for (m = 0; m < 5; m++) { double Pxi = xi * Pface12[m] + (1.0-xi)*Pface11[m]; double Peta = eta * Pface22[m] + (1.0-eta)*Pface21[m]; double Pzeta = zta * Pface32[m] + (1.0-zta)*Pface31[m]; fu(m,i,j,k) = Pxi + Peta + Pzeta - Pxi*Peta - Pxi*Pzeta - Peta*Pzeta + Pxi*Peta*Pzeta; } //--------------------------------------------------------------------- // now store the exact values on the boundaries //--------------------------------------------------------------------- //--------------------------------------------------------------------- // west face //--------------------------------------------------------------------- xi = (double)0.0; if (i == 0) { zta = (double)k * dnzm1; eta = (double)j * dnym1; exact_solution_kernel (xi, eta, zta, temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // east face //--------------------------------------------------------------------- xi = (double)1.0; if (i == nx-1) { zta = (double)k * dnzm1; eta = (double)j * dnym1; exact_solution_kernel (xi, eta, zta, temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // south face //--------------------------------------------------------------------- eta = (double)0.0; if (j == 0) { zta = (double)k * dnzm1; xi = (double)i * dnxm1; exact_solution_kernel (xi,eta,zta,temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // north face //--------------------------------------------------------------------- eta = (double)1.0; if (j == ny-1) { zta = (double)k * dnzm1; xi = (double)i * dnxm1; exact_solution_kernel (xi,eta,zta,temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // bottom face //--------------------------------------------------------------------- zta = (double)0.0; if (k == 0) { eta = (double)j * dnym1; xi = (double)i * dnxm1; exact_solution_kernel (xi, eta, zta, temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // top face //--------------------------------------------------------------------- zta = (double)1.0; if (k == nz-1) { eta = (double)j * dnym1; xi = (double)i * dnxm1; exact_solution_kernel (xi, eta, zta, temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } } //--------------------------------------------------------------------- // adi: compute_rhs //--------------------------------------------------------------------- __global__ static void compute_rhs_kernel_1 (double *rho_i, double *us, double *vs, double *ws, double *speed, double *qs, double *square, double *fu, const int nx, const int ny, const int nz) { int i, j, k; k = blockIdx.y; j = blockIdx.x; i = threadIdx.x; //--------------------------------------------------------------------- // compute the reciprocal of density, and the kinetic energy, // and the speed of sound. //--------------------------------------------------------------------- double rho_nv = 1.0/fu(0,i,j,k); double square_ijk; rho_i(i,j,k) = rho_nv; us(i,j,k) = fu(1,i,j,k) * rho_nv; vs(i,j,k) = fu(2,i,j,k) * rho_nv; ws(i,j,k) = fu(3,i,j,k) * rho_nv; square_ijk = 0.5*(fu(1,i,j,k)*fu(1,i,j,k) + fu(2,i,j,k)*fu(2,i,j,k) + fu(3,i,j,k)*fu(3,i,j,k)) * rho_nv; square(i,j,k) = 0.5*(fu(1,i,j,k)*fu(1,i,j,k) + fu(2,i,j,k)*fu(2,i,j,k) + fu(3,i,j,k)*fu(3,i,j,k)) * rho_nv; qs(i,j,k) = square_ijk * rho_nv; //--------------------------------------------------------------------- // (don't need speed and ainx until the lhs computation) //--------------------------------------------------------------------- speed(i,j,k) = sqrt(c1c2*rho_nv*(fu(4,i,j,k) - square_ijk)); } __global__ static void compute_rhs_kernel_2 (double *rho_i, double *us, double *vs, double *ws, double *qs, double *square, double *rhs, double *forcing, double *fu, int nx, const int ny, const int nz) { int i, j, k, m; k = blockIdx.y; j = blockIdx.x; i = threadIdx.x; double rtmp[5]; //--------------------------------------------------------------------- // copy the exact forcing term to the right hand side; because // this forcing term is known, we can store it on the whole zone // including the boundary //--------------------------------------------------------------------- for (m = 0; m < 5; m++) rtmp[m] = forcing(m,i,j,k); //--------------------------------------------------------------------- // compute xi-direction fluxes //--------------------------------------------------------------------- if (k >= 1 && k < nz-1 && j >= 1 && j < ny-1 && i >= 1 && i < nx-1) { double uijk = us(i,j,k); double up1 = us(i+1,j,k); double um1 = us(i-1,j,k); rtmp[0] = rtmp[0] + dx1tx1*(fu(0,i+1,j,k) - 2.0*fu(0,i,j,k) + fu(0,i-1,j,k)) - tx2*(fu(1,i+1,j,k)-fu(1,i-1,j,k)); rtmp[1] = rtmp[1] + dx2tx1*(fu(1,i+1,j,k) - 2.0*fu(1,i,j,k) + fu(1,i-1,j,k)) + xxcon2*con43*(up1-2.0*uijk+um1) - tx2*(fu(1,i+1,j,k)*up1 - fu(1,i-1,j,k)*um1 + (fu(4,i+1,j,k)-square(i+1,j,k)-fu(4,i-1,j,k)+square(i-1,j,k))*c2); rtmp[2] = rtmp[2] + dx3tx1*(fu(2,i+1,j,k) - 2.0*fu(2,i,j,k) + fu(2,i-1,j,k)) + xxcon2*(vs(i+1,j,k)-2.0*vs(i,j,k)+vs(i-1,j,k)) - tx2*(fu(2,i+1,j,k)*up1 - fu(2,i-1,j,k)*um1); rtmp[3] = rtmp[3] + dx4tx1*(fu(3,i+1,j,k) - 2.0*fu(3,i,j,k) + fu(3,i-1,j,k)) + xxcon2*(ws(i+1,j,k)-2.0*ws(i,j,k)+ws(i-1,j,k)) - tx2*(fu(3,i+1,j,k)*up1 - fu(3,i-1,j,k)*um1); rtmp[4] = rtmp[4] + dx5tx1*(fu(4,i+1,j,k) - 2.0*fu(4,i,j,k) + fu(4,i-1,j,k)) + xxcon3*(qs(i+1,j,k)-2.0*qs(i,j,k)+qs(i-1,j,k))+ xxcon4*(up1*up1-2.0*uijk*uijk+um1*um1) + xxcon5*(fu(4,i+1,j,k)*rho_i(i+1,j,k) - 2.0*fu(4,i,j,k)*rho_i(i,j,k) + fu(4,i-1,j,k)*rho_i(i-1,j,k)) - tx2*((c1*fu(4,i+1,j,k) - c2*square(i+1,j,k))*up1 - (c1*fu(4,i-1,j,k) - c2*square(i-1,j,k))*um1 ); //--------------------------------------------------------------------- // add fourth order xi-direction dissipation //--------------------------------------------------------------------- if (i == 1) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * (5.0*fu(m,i,j,k)-4.0*fu(m,i+1,j,k)+fu(m,i+2,j,k)); } else if (i == 2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * (-4.0*fu(m,i-1,j,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i+1,j,k)+fu(m,i+2,j,k)); } else if (i >= 3 && i < nx-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * ( fu(m,i-2,j,k)-4.0*fu(m,i-1,j,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i+1,j,k)+fu(m,i+2,j,k)); } else if (i == nx-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * (fu(m,i-2,j,k)-4.0*fu(m,i-1,j,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i+1,j,k) ); } else if (i == nx-2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * (fu(m,i-2,j,k)-4.0*fu(m,i-1,j,k) + 5.0*fu(m,i,j,k)); } //--------------------------------------------------------------------- // compute eta-direction fluxes //--------------------------------------------------------------------- double vijk = vs(i,j,k); double vp1 = vs(i,j+1,k); double vm1 = vs(i,j-1,k); rtmp[0] = rtmp[0] + dy1ty1*(fu(0,i,j+1,k) - 2.0*fu(0,i,j,k) + fu(0,i,j-1,k)) - ty2*(fu(2,i,j+1,k)-fu(2,i,j-1,k)); rtmp[1] = rtmp[1] + dy2ty1*(fu(1,i,j+1,k) - 2.0*fu(1,i,j,k) + fu(1,i,j-1,k)) + yycon2*(us(i,j+1,k)-2.0*us(i,j,k)+us(i,j-1,k)) - ty2*(fu(1,i,j+1,k)*vp1-fu(1,i,j-1,k)*vm1); rtmp[2] = rtmp[2] + dy3ty1*(fu(2,i,j+1,k) - 2.0*fu(2,i,j,k) + fu(2,i,j-1,k)) + yycon2*con43*(vp1-2.0*vijk+vm1) - ty2*(fu(2,i,j+1,k)*vp1-fu(2,i,j-1,k)*vm1+(fu(4,i,j+1,k)-square(i,j+1,k)-fu(4,i,j-1,k)+square(i,j-1,k))*c2); rtmp[3] = rtmp[3] + dy4ty1*(fu(3,i,j+1,k) - 2.0*fu(3,i,j,k) + fu(3,i,j-1,k)) + yycon2*(ws(i,j+1,k)-2.0*ws(i,j,k)+ws(i,j-1,k))-ty2*(fu(3,i,j+1,k)*vp1-fu(3,i,j-1,k)*vm1); rtmp[4] = rtmp[4] + dy5ty1*(fu(4,i,j+1,k) - 2.0*fu(4,i,j,k) + fu(4,i,j-1,k)) + yycon3*(qs(i,j+1,k)-2.0*qs(i,j,k)+qs(i,j-1,k)) + yycon4*(vp1*vp1-2.0*vijk*vijk+vm1*vm1) + yycon5*(fu(4,i,j+1,k)*rho_i(i,j+1,k)-2.0*fu(4,i,j,k)*rho_i(i,j,k)+fu(4,i,j-1,k)*rho_i(i,j-1,k)) - ty2*((c1*fu(4,i,j+1,k)-c2*square(i,j+1,k))*vp1 - (c1*fu(4,i,j-1,k)-c2*square(i,j-1,k))*vm1); //--------------------------------------------------------------------- // add fourth order eta-direction dissipation //--------------------------------------------------------------------- if (j == 1) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(5.0*fu(m,i,j,k)-4.0*fu(m,i,j+1,k)+fu(m,i,j+2,k)); } else if (j == 2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(-4.0*fu(m,i,j-1,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j+1,k)+fu(m,i,j+2,k)); } else if (j >= 3 && j < ny-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j-2,k)-4.0*fu(m,i,j-1,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j+1,k)+fu(m,i,j+2,k)); } else if (j == ny-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j-2,k)-4.0*fu(m,i,j-1,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j+1,k)); } else if (j == ny-2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j-2,k)-4.0*fu(m,i,j-1,k)+5.0*fu(m,i,j,k)); } //--------------------------------------------------------------------- // compute zeta-direction fluxes //--------------------------------------------------------------------- double wijk = ws(i,j,k); double wp1 = ws(i,j,k+1); double wm1 = ws(i,j,k-1); rtmp[0] = rtmp[0] + dz1tz1*(fu(0,i,j,k+1)-2.0*fu(0,i,j,k)+fu(0,i,j,k-1)) - tz2*(fu(3,i,j,k+1)-fu(3,i,j,k-1)); rtmp[1] = rtmp[1] + dz2tz1*(fu(1,i,j,k+1)-2.0*fu(1,i,j,k)+fu(1,i,j,k-1)) + zzcon2*(us(i,j,k+1)-2.0*us(i,j,k)+us(i,j,k-1)) - tz2*(fu(1,i,j,k+1)*wp1-fu(1,i,j,k-1)*wm1); rtmp[2] = rtmp[2] + dz3tz1*(fu(2,i,j,k+1)-2.0*fu(2,i,j,k)+fu(2,i,j,k-1)) + zzcon2*(vs(i,j,k+1)-2.0*vs(i,j,k)+vs(i,j,k-1)) - tz2*(fu(2,i,j,k+1)*wp1-fu(2,i,j,k-1)*wm1); rtmp[3] = rtmp[3] + dz4tz1*(fu(3,i,j,k+1)-2.0*fu(3,i,j,k)+fu(3,i,j,k-1)) + zzcon2*con43*(wp1-2.0*wijk+wm1) - tz2*(fu(3,i,j,k+1)*wp1-fu(3,i,j,k-1)*wm1+(fu(4,i,j,k+1)-square(i,j,k+1)-fu(4,i,j,k-1)+square(i,j,k-1))*c2); rtmp[4] = rtmp[4] + dz5tz1*(fu(4,i,j,k+1)-2.0*fu(4,i,j,k)+fu(4,i,j,k-1)) + zzcon3*(qs(i,j,k+1)-2.0*qs(i,j,k)+qs(i,j,k-1)) + zzcon4*(wp1*wp1-2.0*wijk*wijk+wm1*wm1) + zzcon5*(fu(4,i,j,k+1)*rho_i(i,j,k+1)-2.0*fu(4,i,j,k)*rho_i(i,j,k)+fu(4,i,j,k-1)*rho_i(i,j,k-1)) - tz2*((c1*fu(4,i,j,k+1)-c2*square(i,j,k+1))*wp1-(c1*fu(4,i,j,k-1)-c2*square(i,j,k-1))*wm1); //--------------------------------------------------------------------- // add fourth order zeta-direction dissipation //--------------------------------------------------------------------- if (k == 1) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(5.0*fu(m,i,j,k)-4.0*fu(m,i,j,k+1)+fu(m,i,j,k+2)); } else if (k == 2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(-4.0*fu(m,i,j,k-1)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j,k+1)+fu(m,i,j,k+2)); } else if (k >= 3 && k < nz-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j,k-2)-4.0*fu(m,i,j,k-1)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j,k+1)+fu(m,i,j,k+2)); } else if (k == nz-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j,k-2)-4.0*fu(m,i,j,k-1)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j,k+1)); } else if (k == nz-2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j,k-2)-4.0*fu(m,i,j,k-1)+5.0*fu(m,i,j,k)); } for (m = 0; m < 5; m++) rtmp[m] *= dt; } for (m = 0; m < 5; m++) rhs(m,i,j,k) = rtmp[m]; } //--------------------------------------------------------------------- // adi: txinvr //--------------------------------------------------------------------- __global__ static void txinvr_kernel ( double *rho_i, double *us, double *vs, double *ws, double *speed, double *qs, double *rhs, const int nx, const int ny, const int nz) { int i, j, k; k = blockIdx.y+1; j = blockIdx.x+1; i = threadIdx.x+1; double ru1 = rho_i(i,j,k); double uu = us(i,j,k); double vv = vs(i,j,k); double ww = ws(i,j,k); double ap = speed(i,j,k); double ac2inv = 1.0/( ap*ap ); double r1 = rhs(0,i,j,k); double r2 = rhs(1,i,j,k); double r3 = rhs(2,i,j,k); double r4 = rhs(3,i,j,k); double r5 = rhs(4,i,j,k); double t1 = c2*ac2inv*(qs(i,j,k)*r1 - uu*r2 - vv*r3 - ww*r4 + r5); double t2 = bt * ru1 * ( uu * r1 - r2 ); double t3 = ( bt * ru1 * ap ) * t1; rhs(0,i,j,k) = r1 - t1; rhs(1,i,j,k) = -ru1*(ww*r1-r4); rhs(2,i,j,k) = ru1*(vv*r1-r3); rhs(3,i,j,k) = -t2+t3; rhs(4,i,j,k) = t2+t3; } //--------------------------------------------------------------------- // adi: x_solve //--------------------------------------------------------------------- #define lhs(m,i,j,k) lhs[(j-1)+(ny-2)*((k-1)+(nz-2)*((i)+nx*(m-3)))] #define lhsp(m,i,j,k) lhs[(j-1)+(ny-2)*((k-1)+(nz-2)*((i)+nx*(m+4)))] #define lhsm(m,i,j,k) lhs[(j-1)+(ny-2)*((k-1)+(nz-2)*((i)+nx*(m-3+2)))] #define rtmp(m,i,j,k) rstmp[(j)+ny*((k)+nz*((i)+nx*(m)))] __global__ static void x_solve_kernel (double *rho_i, double *us, double *speed, double *rhs, double *lhs, double *rstmp, const int nx, const int ny, const int nz) { int i, j, k, m; double rhon[3], cv[3], _ls[3][5], _lp[3][5], _rs[3][5], fac1; double zero; k = blockIdx.x*blockDim.x+threadIdx.x+1; j = blockIdx.y*blockDim.y+threadIdx.y+1; if (k >= nz-1 || j >= ny-1) return; //--------------------------------------------------------------------- // Computes the left hand side for the three x-factors //--------------------------------------------------------------------- //--------------------------------------------------------------------- // zap the whole left hand side for starters //--------------------------------------------------------------------- _ls[0][0] = (double)0.0; _ls[0][1] = (double)0.0; _ls[0][2] = (double)1.0; _ls[0][3] = (double)0.0; _ls[0][4] = (double)0.0; lhsp(0,0,j,k) = (double)0.0; lhsp(1,0,j,k) = (double)0.0; lhsp(2,0,j,k) = (double)1.0; lhsp(3,0,j,k) = (double)0.0; lhsp(4,0,j,k) = (double)0.0; zero = (double)0.0; //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //-------------------------------------------------------------------- for (i = 0; i < 3; i++) { fac1 = c3c4*rho_i(i,j,k); //rhon[i] = max(max(max(dx2+con43*fac1, dx5+c1c5*fac1), dxmax+fac1), zero+dx1); if (dx2+con43*fac1>dx5+c1c5*fac1) rhon[i] = dx2+con43*fac1; else rhon[i] = dx5+c1c5*fac1; if (rhon[i]<dxmax+fac1) rhon[i] = dxmax+fac1; if (rhon[i]<zero+dx1) rhon[i] = zero+dx1; cv[i] = us(i,j,k); } _ls[1][0] = (double)0.0; _ls[1][1] = - dttx2 * cv[0] - dtx1 * rhon[0]; _ls[1][2] = 1.0 + c2dttx1 * rhon[1]; _ls[1][3] = dttx2 * cv[2] - dtx1 * rhon[2]; _ls[1][4] = (double)0.0; _ls[1][2] += comz5; _ls[1][3] -= comz4; _ls[1][4] += comz1; for (m = 0; m < 5; m++) lhsp(m,1,j,k) = _ls[1][m]; rhon[0] = rhon[1]; rhon[1] = rhon[2]; cv[0] = cv[1]; cv[1] = cv[2]; for (m = 0; m < 3; m++) { _rs[0][m] = rhs(m,0,j,k); _rs[1][m] = rhs(m,1,j,k); } //--------------------------------------------------------------------- // perform the Thomas algorithm; first, FORWARD ELIMINATION //--------------------------------------------------------------------- for (i = 0; i < nx-2; i++) { //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- if (i+2 == nx-1) { _ls[2][0] = (double)0.0; _ls[2][1] = (double)0.0; _ls[2][2] = (double)1.0; _ls[2][3] = (double)0.0; _ls[2][4] = (double)0.0; lhsp(0,i+2,j,k) = (double)0.0; lhsp(1,i+2,j,k) = (double)0.0; lhsp(2,i+2,j,k) = (double)1.0; lhsp(3,i+2,j,k) = (double)0.0; lhsp(4,i+2,j,k) = (double)0.0; } else { fac1 = c3c4*rho_i(i+3,j,k); //rhon[2] = max(max(max(dx2+con43*fac1, dx5+c1c5*fac1), dxmax+fac1), zero+dx1); if (dx2+con43*fac1>dx5+c1c5*fac1) rhon[2] = dx2+con43*fac1; else rhon[2] = dx5+c1c5*fac1; if (rhon[2]<dxmax+fac1) rhon[2] = dxmax+fac1; if (rhon[2]<zero+dx1) rhon[2] = zero+dx1; cv[2] = us(i+3,j,k); _ls[2][0] = (double)0.0; _ls[2][1] = - dttx2 * cv[0] - dtx1 * rhon[0]; _ls[2][2] = 1.0 + c2dttx1 * rhon[1]; _ls[2][3] = dttx2 * cv[2] - dtx1 * rhon[2]; _ls[2][4] = (double)0.0; //--------------------------------------------------------------------- // add fourth order dissipation //--------------------------------------------------------------------- if (i+2 == 2) { _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (i+2 >= 3 && i+2 < nx-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (i+2 == nx-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; } else if (i+2 == nx-2) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz5; } //--------------------------------------------------------------------- // store computed lhs for later reuse //--------------------------------------------------------------------- for (m = 0; m < 5; m++) lhsp(m,i+2,j,k) = _ls[2][m]; rhon[0] = rhon[1]; rhon[1] = rhon[2]; cv[0] = cv[1]; cv[1] = cv[2]; } //--------------------------------------------------------------------- // load rhs values for current iteration //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[2][m] = rhs(m,i+2,j,k); //--------------------------------------------------------------------- // perform current iteration //--------------------------------------------------------------------- fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- lhs(3,i,j,k) = _ls[0][3]; lhs(4,i,j,k) = _ls[0][4]; for (m = 0; m < 5; m++) { _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } for (m = 0; m < 3; m++) { rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } } //--------------------------------------------------------------------- // The last two rows in this zone are a bit different, // since they do not have two more rows available for the // elimination of off-diagonal entries //--------------------------------------------------------------------- i = nx-2; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // scale the last row immediately //--------------------------------------------------------------------- fac1 = 1.0/_ls[1][2]; for (m = 0; m < 3; m++) _rs[1][m] *= fac1; lhs(3,nx-2,j,k) = _ls[0][3]; lhs(4,nx-2,j,k) = _ls[0][4]; //--------------------------------------------------------------------- // subsequently, fill the other factors u+c, u-c //--------------------------------------------------------------------- for (i = 0; i < 3; i++) cv[i] = speed(i,j,k); for (m = 0; m < 5; m++) { _ls[0][m] = lhsp(m,0,j,k); _lp[0][m] = lhsp(m,0,j,k); _ls[1][m] = lhsp(m,1,j,k); _lp[1][m] = lhsp(m,1,j,k); } _lp[1][1] -= dttx2 * cv[0]; _lp[1][3] += dttx2 * cv[2]; _ls[1][1] += dttx2 * cv[0]; _ls[1][3] -= dttx2 * cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; _rs[0][3] = rhs(3,0,j,k); _rs[0][4] = rhs(4,0,j,k); _rs[1][3] = rhs(3,1,j,k); _rs[1][4] = rhs(4,1,j,k); //--------------------------------------------------------------------- // do the u+c and the u-c factors //--------------------------------------------------------------------- for (i = 0; i < nx-2; i++) { //--------------------------------------------------------------------- // first, fill the other factors u+c, u-c //--------------------------------------------------------------------- for (m = 0; m < 5; m++) { _ls[2][m] = lhsp(m,i+2,j,k); _lp[2][m] = lhsp(m,i+2,j,k); } _rs[2][3] = rhs(3,i+2,j,k); _rs[2][4] = rhs(4,i+2,j,k); if (i+2 < nx-1) { cv[2] = speed(i+3,j,k); _lp[2][1] -= dttx2 * cv[0]; _lp[2][3] += dttx2 * cv[2]; _ls[2][1] += dttx2 * cv[0]; _ls[2][3] -= dttx2 * cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; } m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1]*_lp[0][3]; _lp[1][3] -= _lp[1][1]*_lp[0][4]; _rs[1][m] -= _lp[1][1]*_rs[0][m]; _lp[2][1] -= _lp[2][0]*_lp[0][3]; _lp[2][2] -= _lp[2][0]*_lp[0][4]; _rs[2][m] -= _lp[2][0]*_rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1]*_ls[0][3]; _ls[1][3] -= _ls[1][1]*_ls[0][4]; _rs[1][m] -= _ls[1][1]*_rs[0][m]; _ls[2][1] -= _ls[2][0]*_ls[0][3]; _ls[2][2] -= _ls[2][0]*_ls[0][4]; _rs[2][m] -= _ls[2][0]*_rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- for (m = 3; m < 5; m++) { lhsp(m,i,j,k) = _lp[0][m]; lhsm(m,i,j,k) = _ls[0][m]; rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } for (m = 0; m < 5; m++) { _lp[0][m] = _lp[1][m]; _lp[1][m] = _lp[2][m]; _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } } //--------------------------------------------------------------------- // And again the last two rows separately //--------------------------------------------------------------------- i = nx-2; m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1]*_lp[0][3]; _lp[1][3] -= _lp[1][1]*_lp[0][4]; _rs[1][m] -= _lp[1][1]*_rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1]*_ls[0][3]; _ls[1][3] -= _ls[1][1]*_ls[0][4]; _rs[1][m] -= _ls[1][1]*_rs[0][m]; //--------------------------------------------------------------------- // Scale the last row immediately //--------------------------------------------------------------------- _rs[1][3] /= _lp[1][2]; _rs[1][4] /= _ls[1][2]; //--------------------------------------------------------------------- // BACKSUBSTITUTION //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] -= lhs(3,nx-2,j,k)*_rs[1][m]; _rs[0][3] -= _lp[0][3]*_rs[1][3]; _rs[0][4] -= _ls[0][3]*_rs[1][4]; for (m = 0; m < 5; m++) { _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } for (i = nx-3; i >= 0; i--) { //--------------------------------------------------------------------- // The first three factors //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] = rtmp(m,i,j,k) - lhs(3,i,j,k)*_rs[1][m] - lhs(4,i,j,k)*_rs[2][m]; //--------------------------------------------------------------------- // And the remaining two //--------------------------------------------------------------------- _rs[0][3] = rtmp(3,i,j,k) - lhsp(3,i,j,k)*_rs[1][3] - lhsp(4,i,j,k)*_rs[2][3]; _rs[0][4] = rtmp(4,i,j,k) - lhsm(3,i,j,k)*_rs[1][4] - lhsm(4,i,j,k)*_rs[2][4]; if (i+2 < nx-1) { //--------------------------------------------------------------------- // Do the block-diagonal inversion //--------------------------------------------------------------------- double r1 = _rs[2][0]; double r2 = _rs[2][1]; double r3 = _rs[2][2]; double r4 = _rs[2][3]; double r5 = _rs[2][4]; double t1 = bt * r3; double t2 = 0.5 * (r4+r5); _rs[2][0] = -r2; _rs[2][1] = r1; _rs[2][2] = bt * ( r4 - r5 ); _rs[2][3] = -t1 + t2; _rs[2][4] = t1 + t2; } for (m = 0; m < 5; m++) { rhs(m,i+2,j,k) = _rs[2][m]; _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } } //--------------------------------------------------------------------- // Do the block-diagonal inversion //--------------------------------------------------------------------- double tf1 = bt * _rs[2][2]; double tf2 = 0.5 * (_rs[2][3]+_rs[2][4]); rhs(0,1,j,k) = -_rs[2][1]; rhs(1,1,j,k) = _rs[2][0]; rhs(2,1,j,k) = bt * ( _rs[2][3] - _rs[2][4] ); rhs(3,1,j,k) = -tf1 + tf2; rhs(4,1,j,k) = tf1 + tf2; for (m = 0; m < 5; m++) rhs(m,0,j,k) = _rs[1][m]; } #undef lhs #undef lhsp #undef lhsm #undef rtmp //--------------------------------------------------------------------- // adi: y_solve //--------------------------------------------------------------------- #define lhs(m,i,j,k) lhs[(i-1)+(nx-2)*((k-1)+(nz-2)*((j)+ny*(m-3)))] #define lhsp(m,i,j,k) lhs[(i-1)+(nx-2)*((k-1)+(nz-2)*((j)+ny*(m+4)))] #define lhsm(m,i,j,k) lhs[(i-1)+(nx-2)*((k-1)+(nz-2)*((j)+ny*(m-3+2)))] #define rtmp(m,i,j,k) rstmp[(i)+nx*((k)+nz*((j)+ny*(m)))] __global__ static void y_solve_kernel (double *rho_i, double *vs, double *speed, double *rhs, double *lhs, double *rstmp, const int nx, const int ny, const int nz) { int i, j, k, m; double rhoq[3], cv[3], _ls[3][5], _lp[3][5], _rs[3][5], fac1; double zero; k = blockIdx.x*blockDim.x+threadIdx.x+1; i = blockIdx.y*blockDim.y+threadIdx.y+1; if (k >= nz-1 || i >= nx-1) return; //--------------------------------------------------------------------- // Computes the left hand side for the three y-factors //--------------------------------------------------------------------- //--------------------------------------------------------------------- // zap the whole left hand side for starters //--------------------------------------------------------------------- _ls[0][0] = (double)0.0; _ls[0][1] = (double)0.0; _ls[0][2] = (double)1.0; _ls[0][3] = (double)0.0; _ls[0][4] = (double)0.0; lhsp(0,i,0,k) = (double)0.0; lhsp(1,i,0,k) = (double)0.0; lhsp(2,i,0,k) = (double)1.0; lhsp(3,i,0,k) = (double)0.0; lhsp(4,i,0,k) = (double)0.0; zero = (double)0.0; //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- for (j = 0; j < 3; j++) { fac1 = c3c4*rho_i(i,j,k); //rhoq[j] = max(max(max(dy3+con43*fac1, dy5+c1c5*fac1), dymax+fac1), zero+dy1); if (dy3+con43*fac1>dy5+c1c5*fac1) rhoq[j] = dy3+con43*fac1; else rhoq[j] = dy5+c1c5*fac1; if (rhoq[j]<dymax+fac1) rhoq[j] = dymax+fac1; if (rhoq[j]<zero+dy1) rhoq[j] = zero+dy1; cv[j] = vs(i,j,k); } _ls[1][0] = (double)0.0; _ls[1][1] = -dtty2*cv[0]-dty1 * rhoq[0]; _ls[1][2] = 1.0 + c2dtty1 * rhoq[1]; _ls[1][3] = dtty2*cv[2]-dty1 * rhoq[2]; _ls[1][4] = (double)0.0; _ls[1][2] += comz5; _ls[1][3] -= comz4; _ls[1][4] += comz1; for (m = 0; m < 5; m++) lhsp(m,i,1,k) = _ls[1][m]; rhoq[0] = rhoq[1]; rhoq[1] = rhoq[2]; cv[0] = cv[1]; cv[1] = cv[2]; for (m = 0; m < 3; m++) { _rs[0][m] = rhs(m,i,0,k); _rs[1][m] = rhs(m,i,1,k); } //--------------------------------------------------------------------- // FORWARD ELIMINATION //--------------------------------------------------------------------- for (j = 0; j < ny-2; j++) { //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- if (j+2 == ny-1) { _ls[2][0] = (double)0.0; _ls[2][1] = (double)0.0; _ls[2][2] = (double)1.0; _ls[2][3] = (double)0.0; _ls[2][4] = (double)0.0; lhsp(0,i,j+2,k) = (double)0.0; lhsp(1,i,j+2,k) = (double)0.0; lhsp(2,i,j+2,k) = (double)1.0; lhsp(3,i,j+2,k) = (double)0.0; lhsp(4,i,j+2,k) = (double)0.0; } else { fac1 = c3c4*rho_i(i,j+3,k); //rhoq[2] = max(max(max(dy3+con43*fac1, dy5+c1c5*fac1), dymax+fac1), zero+dy1); if (dy3+con43*fac1>dy5+c1c5*fac1) rhoq[2] = dy3+con43*fac1; else rhoq[2] = dy5+c1c5*fac1; if (rhoq[2]<dymax+fac1) rhoq[2] = dymax+fac1; if (rhoq[2]<zero+dy1) rhoq[2] = zero+dy1; cv[2] = vs(i,j+3,k); _ls[2][0] = (double)0.0; _ls[2][1] = -dtty2*cv[0]-dty1 * rhoq[0]; _ls[2][2] = 1.0 + c2dtty1 * rhoq[1]; _ls[2][3] = dtty2*cv[2]-dty1 * rhoq[2]; _ls[2][4] = (double)0.0; //--------------------------------------------------------------------- // add fourth order dissipation //--------------------------------------------------------------------- if (j+2 == 2) { _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (j+2 >= 3 && j+2 < ny-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (j+2 == ny-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; } else if (j+2 == ny-2) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz5; } //--------------------------------------------------------------------- // store computed lhs for later reuse //--------------------------------------------------------------------- for (m = 0; m < 5; m++) lhsp(m,i,j+2,k) = _ls[2][m]; rhoq[0] = rhoq[1]; rhoq[1] = rhoq[2]; cv[0] = cv[1]; cv[1] = cv[2]; } //--------------------------------------------------------------------- // load rhs values for current iteration //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[2][m] = rhs(m,i,j+2,k); //--------------------------------------------------------------------- // perform current iteration //--------------------------------------------------------------------- fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- lhs(3,i,j,k) = _ls[0][3]; lhs(4,i,j,k) = _ls[0][4]; for (m = 0; m < 5; m++) { _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } for (m = 0; m < 3; m++) { rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } } //--------------------------------------------------------------------- // The last two rows in this zone are a bit different, // since they do not have two more rows available for the // elimination of off-diagonal entries //--------------------------------------------------------------------- j = ny-2; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // scale the last row immediately //--------------------------------------------------------------------- fac1 = 1.0/_ls[1][2]; for (m = 0; m < 3; m++) _rs[1][m] *= fac1; lhs(3,i,ny-2,k) = _ls[0][3]; lhs(4,i,ny-2,k) = _ls[0][4]; //--------------------------------------------------------------------- // do the u+c and the u-c factors //--------------------------------------------------------------------- for (j = 0; j < 3; j++) cv[j] = speed(i,j,k); for (m = 0; m < 5; m++) { _ls[0][m] = lhsp(m,i,0,k); _lp[0][m] = lhsp(m,i,0,k); _ls[1][m] = lhsp(m,i,1,k); _lp[1][m] = lhsp(m,i,1,k); } _lp[1][1] -= dtty2*cv[0]; _lp[1][3] += dtty2*cv[2]; _ls[1][1] += dtty2*cv[0]; _ls[1][3] -= dtty2*cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; _rs[0][3] = rhs(3,i,0,k); _rs[0][4] = rhs(4,i,0,k); _rs[1][3] = rhs(3,i,1,k); _rs[1][4] = rhs(4,i,1,k); for (j = 0; j < ny-2; j++) { for (m = 0; m < 5; m++) { _ls[2][m] = lhsp(m,i,j+2,k); _lp[2][m] = lhsp(m,i,j+2,k); } _rs[2][3] = rhs(3,i,j+2,k); _rs[2][4] = rhs(4,i,j+2,k); if (j+2 < ny-1) { cv[2] = speed(i,j+3,k); _lp[2][1] -= dtty2*cv[0]; _lp[2][3] += dtty2*cv[2]; _ls[2][1] += dtty2*cv[0]; _ls[2][3] -= dtty2*cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; } fac1 = 1.0/_lp[0][2]; m = 3; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1] * _lp[0][3]; _lp[1][3] -= _lp[1][1] * _lp[0][4]; _rs[1][m] -= _lp[1][1] * _rs[0][m]; _lp[2][1] -= _lp[2][0] * _lp[0][3]; _lp[2][2] -= _lp[2][0] * _lp[0][4]; _rs[2][m] -= _lp[2][0] * _rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- for (m = 3; m < 5; m++) { lhsp(m,i,j,k) = _lp[0][m]; lhsm(m,i,j,k) = _ls[0][m]; rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } for (m = 0; m < 5; m++) { _lp[0][m] = _lp[1][m]; _lp[1][m] = _lp[2][m]; _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } } //--------------------------------------------------------------------- // And again the last two rows separately //--------------------------------------------------------------------- j = ny-2; m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1] * _lp[0][3]; _lp[1][3] -= _lp[1][1] * _lp[0][4]; _rs[1][m] -= _lp[1][1] * _rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // Scale the last row immediately //--------------------------------------------------------------------- _rs[1][3] /= _lp[1][2]; _rs[1][4] /= _ls[1][2]; //--------------------------------------------------------------------- // BACKSUBSTITUTION //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] -= lhs(3,i,ny-2,k) * _rs[1][m]; _rs[0][3] -= _lp[0][3] * _rs[1][3]; _rs[0][4] -= _ls[0][3] * _rs[1][4]; for (m = 0; m < 5; m++) { _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } for (j = ny-3; j >= 0; j--) { //--------------------------------------------------------------------- // The first three factors //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] = rtmp(m,i,j,k) - lhs(3,i,j,k)*_rs[1][m] - lhs(4,i,j,k)*_rs[2][m]; //--------------------------------------------------------------------- // And the remaining two //--------------------------------------------------------------------- _rs[0][3] = rtmp(3,i,j,k) - lhsp(3,i,j,k)*_rs[1][3] - lhsp(4,i,j,k)*_rs[2][3]; _rs[0][4] = rtmp(4,i,j,k) - lhsm(3,i,j,k)*_rs[1][4] - lhsm(4,i,j,k)*_rs[2][4]; if (j+2 < ny-1) { //--------------------------------------------------------------------- // block-diagonal matrix-vector multiplication //--------------------------------------------------------------------- double r1 = _rs[2][0]; double r2 = _rs[2][1]; double r3 = _rs[2][2]; double r4 = _rs[2][3]; double r5 = _rs[2][4]; double t1 = bt * r1; double t2 = 0.5 * ( r4 + r5 ); _rs[2][0] = bt * ( r4 - r5 ); _rs[2][1] = -r3; _rs[2][2] = r2; _rs[2][3] = -t1 + t2; _rs[2][4] = t1 + t2; } for (m = 0; m < 5; m++) { rhs(m,i,j+2,k) = _rs[2][m]; _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } } //--------------------------------------------------------------------- // block-diagonal matrix-vector multiplication //--------------------------------------------------------------------- double tf1 = bt * _rs[2][0]; double tf2 = 0.5 * ( _rs[2][3] + _rs[2][4] ); rhs(0,i,1,k) = bt * ( _rs[2][3] - _rs[2][4] ); rhs(1,i,1,k) = -_rs[2][2]; rhs(2,i,1,k) = _rs[2][1]; rhs(3,i,1,k) = -tf1 + tf2; rhs(4,i,1,k) = tf1 + tf2; for (m = 0; m < 5; m++) rhs(m,i,0,k) = _rs[1][m]; } #undef lhs #undef lhsp #undef lhsm #undef rtmp //--------------------------------------------------------------------- // adi: z_solve //--------------------------------------------------------------------- #define lhs(m,i,j,k) lhs[(i-1)+(nx-2)*((j-1)+(ny-2)*((k)+nz*(m-3)))] #define lhsp(m,i,j,k) lhs[(i-1)+(nx-2)*((j-1)+(ny-2)*((k)+nz*(m+4)))] #define lhsm(m,i,j,k) lhs[(i-1)+(nx-2)*((j-1)+(ny-2)*((k)+nz*(m-3+2)))] #define rtmp(m,i,j,k) rstmp[(i)+nx*((j)+ny*((k)+nz*(m)))] __global__ static void z_solve_kernel (double *rho_i, double *us, double *vs, double *ws, double *speed, double *qs, double *fu, double *rhs, double *lhs, double *rstmp, const int nx, const int ny, const int nz) { int i, j, k, m; double rhos[3], cv[3], _ls[3][5], _lp[3][5], _rs[3][5], fac1; double zero; j = blockIdx.x*blockDim.x+threadIdx.x+1; i = blockIdx.y*blockDim.y+threadIdx.y+1; if (j >= ny-1 || i >= nx-1) return; //--------------------------------------------------------------------- // Computes the left hand side for the three z-factors //--------------------------------------------------------------------- //--------------------------------------------------------------------- // zap the whole left hand side for starters //--------------------------------------------------------------------- _ls[0][0] = (double)0.0; _ls[0][1] = (double)0.0; _ls[0][2] = (double)1.0; _ls[0][3] = (double)0.0; _ls[0][4] = (double)0.0; lhsp(0,i,j,0) = (double)0.0; lhsp(1,i,j,0) = (double)0.0; lhsp(2,i,j,0) = (double)1.0; lhsp(3,i,j,0) = (double)0.0; lhsp(4,i,j,0) = (double)0.0; zero = (double)0.0; //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- for (k = 0; k < 3; k++) { fac1 = c3c4*rho_i(i,j,k); //rhos[k] = max(max(max(dz4+con43*fac1, dz5+c1c5*fac1), dzmax+fac1), zero+dz1); if (dz4+con43*fac1>dz5+c1c5*fac1) rhos[k] = dz4+con43*fac1; else rhos[k] = dz5+c1c5*fac1; if (rhos[k]<dzmax+fac1) rhos[k] = dzmax+fac1; if (rhos[k]<zero+dz1) rhos[k] = zero+dz1; cv[k] = ws(i,j,k); } _ls[1][0] = (double)0.0; _ls[1][1] = -dttz2*cv[0] - dtz1*rhos[0]; _ls[1][2] = 1.0 + c2dttz1 * rhos[1]; _ls[1][3] = dttz2*cv[2] - dtz1*rhos[2]; _ls[1][4]= (double)0.0; _ls[1][2] += comz5; _ls[1][3] -= comz4; _ls[1][4] += comz1; for (m = 0; m < 5; m++) lhsp(m,i,j,1) = _ls[1][m]; rhos[0] = rhos[1]; rhos[1] = rhos[2]; cv[0] = cv[1]; cv[1] = cv[2]; for (m = 0; m < 3; m++) { _rs[0][m] = rhs(m,i,j,0); _rs[1][m] = rhs(m,i,j,1); } //--------------------------------------------------------------------- // FORWARD ELIMINATION //--------------------------------------------------------------------- for (k = 0; k < nz-2; k++) { //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- if (k+2 == nz-1) { _ls[2][0] = (double)0.0; _ls[2][1] = (double)0.0; _ls[2][2] = (double)1.0; _ls[2][3] = (double)0.0; _ls[2][4] = (double)0.0; lhsp(0,i,j,k+2) = (double)0.0; lhsp(1,i,j,k+2) = (double)0.0; lhsp(2,i,j,k+2) = (double)1.0; lhsp(3,i,j,k+2) = (double)0.0; lhsp(4,i,j,k+2) = (double)0.0; } else { fac1 = c3c4*rho_i(i,j,k+3); //rhos[2] = max(max(max(dz4+con43*fac1, dz5+c1c5*fac1), dzmax+fac1), zero+dz1); if (dz4+con43*fac1>dz5+c1c5*fac1) rhos[2] = dz4+con43*fac1; else rhos[2] = dz5+c1c5*fac1; if (rhos[2]<dzmax+fac1) rhos[2] = dzmax+fac1; if (rhos[2]<zero+dz1) rhos[2] = zero+dz1; cv[2] = ws(i,j,k+3); _ls[2][0] = (double)0.0; _ls[2][1] = -dttz2*cv[0] - dtz1*rhos[0]; _ls[2][2] = 1.0 + c2dttz1 * rhos[1]; _ls[2][3] = dttz2*cv[2] - dtz1*rhos[2]; _ls[2][4] = (double)0.0; //--------------------------------------------------------------------- // add fourth order dissipation //--------------------------------------------------------------------- if (k+2 == 2) { _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (k+2 >= 3 && k+2 < nz-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (k+2 == nz-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; } else if (k+2 == nz-2) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz5; } //--------------------------------------------------------------------- // store computed lhs for later reuse //--------------------------------------------------------------------- for (m = 0; m < 5; m++) lhsp(m,i,j,k+2) = _ls[2][m]; rhos[0] = rhos[1]; rhos[1] = rhos[2]; cv[0] = cv[1]; cv[1] = cv[2]; } //--------------------------------------------------------------------- // load rhs values for current iteration //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[2][m] = rhs(m,i,j,k+2); //--------------------------------------------------------------------- // perform current iteration //--------------------------------------------------------------------- fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- lhs(3,i,j,k) = _ls[0][3]; lhs(4,i,j,k) = _ls[0][4]; for (m = 0; m < 5; m++) { _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } for (m = 0; m < 3; m++) { rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } } //--------------------------------------------------------------------- // The last two rows in this zone are a bit different, // since they do not have two more rows available for the // elimination of off-diagonal entries //--------------------------------------------------------------------- k = nz-2; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // scale the last row immediately //--------------------------------------------------------------------- fac1 = 1.0/_ls[1][2]; for (m = 0; m < 3; m++) _rs[1][m] *= fac1; lhs(3,i,j,k) = _ls[0][3]; lhs(4,i,j,k) = _ls[0][4]; //--------------------------------------------------------------------- // subsequently, fill the other factors u+c, u-c //--------------------------------------------------------------------- for (k = 0; k < 3; k++) cv[k] = speed(i,j,k); for (m = 0; m < 5; m++) { _ls[0][m] = lhsp(m,i,j,0); _lp[0][m] = lhsp(m,i,j,0); _ls[1][m] = lhsp(m,i,j,1); _lp[1][m] = lhsp(m,i,j,1); } _lp[1][1] -= dttz2*cv[0]; _lp[1][3] += dttz2*cv[2]; _ls[1][1] += dttz2*cv[0]; _ls[1][3] -= dttz2*cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; _rs[0][3] = rhs(3,i,j,0); _rs[0][4] = rhs(4,i,j,0); _rs[1][3] = rhs(3,i,j,1); _rs[1][4] = rhs(4,i,j,1); //--------------------------------------------------------------------- // do the u+c and the u-c factors //--------------------------------------------------------------------- for (k = 0; k < nz-2; k++) { //--------------------------------------------------------------------- // first, fill the other factors u+c, u-c //--------------------------------------------------------------------- for (m = 0; m < 5; m++) { _ls[2][m] = lhsp(m,i,j,k+2); _lp[2][m] = lhsp(m,i,j,k+2); } _rs[2][3] = rhs(3,i,j,k+2); _rs[2][4] = rhs(4,i,j,k+2); if (k+2 < nz-1) { cv[2] = speed(i,j,k+3); _lp[2][1] -= dttz2*cv[0]; _lp[2][3] += dttz2*cv[2]; _ls[2][1] += dttz2*cv[0]; _ls[2][3] -= dttz2*cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; } m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1] * _lp[0][3]; _lp[1][3] -= _lp[1][1] * _lp[0][4]; _rs[1][m] -= _lp[1][1] * _rs[0][m]; _lp[2][1] -= _lp[2][0] * _lp[0][3]; _lp[2][2] -= _lp[2][0] * _lp[0][4]; _rs[2][m] -= _lp[2][0] * _rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- for (m = 3; m < 5; m++) { lhsp(m,i,j,k) = _lp[0][m]; lhsm(m,i,j,k) = _ls[0][m]; rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } for (m = 0; m < 5; m++) { _lp[0][m] = _lp[1][m]; _lp[1][m] = _lp[2][m]; _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } } //--------------------------------------------------------------------- // And again the last two rows separately //--------------------------------------------------------------------- k = nz-2; m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1] * _lp[0][3]; _lp[1][3] -= _lp[1][1] * _lp[0][4]; _rs[1][m] -= _lp[1][1] * _rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // Scale the last row immediately some of this is overkill // if this is the last cell //--------------------------------------------------------------------- _rs[1][3] /= _lp[1][2]; _rs[1][4] /= _ls[1][2]; //--------------------------------------------------------------------- // BACKSUBSTITUTION //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] -= lhs(3,i,j,nz-2) * _rs[1][m]; _rs[0][3] -= _lp[0][3] * _rs[1][3]; _rs[0][4] -= _ls[0][3] * _rs[1][4]; for (m = 0; m < 5; m++) { _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } for (k = nz-3; k >= 0; k--) { //--------------------------------------------------------------------- // The first three factors //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] = rtmp(m,i,j,k) - lhs(3,i,j,k)*_rs[1][m] - lhs(4,i,j,k)*_rs[2][m]; //--------------------------------------------------------------------- // And the remaining two //--------------------------------------------------------------------- _rs[0][3] = rtmp(3,i,j,k) - lhsp(3,i,j,k)*_rs[1][3] - lhsp(4,i,j,k)*_rs[2][3]; _rs[0][4] = rtmp(4,i,j,k) - lhsm(3,i,j,k)*_rs[1][4] - lhsm(4,i,j,k)*_rs[2][4]; if (k+2 < nz-1) { //--------------------------------------------------------------------- // block-diagonal matrix-vector multiplication tzetar //--------------------------------------------------------------------- double xvel = us(i,j,k+2); double yvel = vs(i,j,k+2); double zvel = ws(i,j,k+2); double ac = speed(i,j,k+2); double uzik1 = fu(0,i,j,k+2); double t1 = (bt*uzik1)/ac * (_rs[2][3] + _rs[2][4]); double t2 = _rs[2][2] + t1; double t3 = bt*uzik1 * (_rs[2][3] - _rs[2][4]); _rs[2][4] = uzik1*(-xvel*_rs[2][1] + yvel*_rs[2][0]) + qs(i,j,k+2)*t2 + c2iv*(ac*ac)*t1 + zvel*t3; _rs[2][3] = zvel*t2 + t3; _rs[2][2] = uzik1*_rs[2][0] + yvel*t2; _rs[2][1] = -uzik1*_rs[2][1] + xvel*t2; _rs[2][0] = t2; } for (m = 0; m < 5; m++) { rhs(m,i,j,k+2) = _rs[2][m]; _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } } //--------------------------------------------------------------------- // block-diagonal matrix-vector multiplication tzetar //--------------------------------------------------------------------- double xfvel = us(i,j,1); double yfvel = vs(i,j,1); double zfvel = ws(i,j,1); double afc = speed(i,j,1); double ufzik1 = fu(0,i,j,1); double tf1 = (bt*ufzik1)/afc * (_rs[2][3] + _rs[2][4]); double tf2 = _rs[2][2] + tf1; double tf3 = bt*ufzik1 * (_rs[2][3] - _rs[2][4]); rhs(4,i,j,1) = ufzik1*(-xfvel*_rs[2][1] + yfvel*_rs[2][0]) + qs(i,j,1)*tf2 + c2iv*(afc*afc)*tf1 + zfvel*tf3; rhs(3,i,j,1) = zfvel*tf2 + tf3; rhs(2,i,j,1) = ufzik1*_rs[2][0] + yfvel*tf2; rhs(1,i,j,1) = -ufzik1*_rs[2][1] + xfvel*tf2; rhs(0,i,j,1) = tf2; for (m = 0; m < 5; m++) rhs(m,i,j,0) = _rs[1][m]; } #undef lhs #undef lhsp #undef lhsm #undef rtmp //--------------------------------------------------------------------- // addition of update to the vector u //--------------------------------------------------------------------- __global__ static void add_kernel (double *fu, double *rhs, const int nx, const int ny, const int nz) { int i, j, k, m; k = blockIdx.y+1; j = blockIdx.x+1; i = threadIdx.x+1; m = threadIdx.y; fu(m,i,j,k) += rhs(m,i,j,k); } //--------------------------------------------------------------------- // adi //--------------------------------------------------------------------- void adi(bool singlestep, int nx, int ny, int nz, int niter, double* rho_i, double* us, double* vs, double* ws, double* speed, double* qs, double* square, double* rhs, double* lhs, double* forcing, double* fu, double* rstmp) { HANDLE_ERROR(cudaDeviceSynchronize()); int itmax = singlestep ? 1 : niter; int xblock, xgrid, yblock, ygrid, zblock, zgrid; for (int step = 1; step <= itmax; step++) { if (step % 20 == 0 || step == 1 && !singlestep) printf(" Time step %4d\n", step); //compute_rhs(); dim3 grid1(ny,nz); compute_rhs_kernel_1<<<grid1,nx>>>(rho_i, us, vs, ws, speed, qs, square, fu, nx, ny, nz); compute_rhs_kernel_2<<<grid1,nx>>>(rho_i, us, vs, ws, qs, square, rhs, forcing, fu, nx, ny, nz); //txinvr(); dim3 grid2(ny-2,nz-2); txinvr_kernel<<<grid2,nx-2>>> (rho_i, us, vs, ws, speed, qs, rhs, nx, ny, nz); //x_solve(); yblock = min(SOLVE_BLOCK,ny); ygrid = (ny+yblock-1)/yblock; zblock = min(SOLVE_BLOCK/yblock,nz); zgrid = (nz+zblock-1)/zblock; dim3 grid3(zgrid,ygrid), block3(zblock,yblock); x_solve_kernel<<<grid3,block3>>>(rho_i, us, speed, rhs, lhs, rstmp, nx, ny, nz); //y_solve(); xblock = min(SOLVE_BLOCK,nx); xgrid = (nx+xblock-1)/xblock; zblock = min(SOLVE_BLOCK/xblock,nz); zgrid = (nz+zblock-1)/zblock; dim3 grid4(zgrid,xgrid), block4(zblock,xblock); y_solve_kernel<<<grid4,block4>>>(rho_i, vs, speed, rhs, lhs, rstmp, nx, ny, nz); //z_solve(); xblock = min(SOLVE_BLOCK,nx); xgrid = (nx+xblock-1)/xblock; yblock = min(SOLVE_BLOCK/xblock,ny); ygrid = (ny+yblock-1)/yblock; dim3 grid5(ygrid,xgrid), block5(yblock,xblock); z_solve_kernel<<<grid5,block5>>>(rho_i, us, vs, ws, speed, qs, fu, rhs, lhs, rstmp, nx, ny, nz); //add(); dim3 grid6(ny-2,nz-2); dim3 block6(nx-2,5); add_kernel<<<grid6,block6>>>(fu, rhs, nx, ny, nz); } HANDLE_ERROR(cudaDeviceSynchronize()); } //--------------------------------------------------------------------- // defaults from parameters //--------------------------------------------------------------------- void read_input(char benchclass, double* dd_td, int* nx, int* ny, int* nz, int* niter) { FILE *file; if ((file = fopen("inputsp.data", "rt")) != NULL) { char line[1024]; printf(" Reading from input file inputsp.data\n"); fgets(line, sizeof(line)-1, file); sscanf(line, "%i", niter); fgets(line, sizeof(line)-1, file); sscanf(line, "%lf", dd_td); fgets(line, sizeof(line)-1, file); sscanf(line, "%i %i %i", nx, ny, nz); fclose(file); } else { // printf(" No input file inputsp.data. Using compiled defaults\n"); int problem_size; switch (benchclass) { case 's': case 'S': problem_size = 12; *dd_td = 0.015; *niter = 100; break; case 'w': case 'W': problem_size = 36; *dd_td = 0.0015; *niter = 400; break; case 'a': case 'A': problem_size = 64; *dd_td = 0.0015; *niter = 400; break; case 'b': case 'B': problem_size = 102; *dd_td = 0.001; *niter = 400; break; case 'c': case 'C': problem_size = 162; *dd_td = 0.00067; *niter = 400; break; case 'd': case 'D': problem_size = 408; *dd_td = 0.00030; *niter = 500; break; case 'e': case 'E': problem_size = 1020; *dd_td = 0.0001; *niter = 500; break; default: printf("setparams: Internal error: invalid class %c\n", benchclass); exit(EXIT_FAILURE); } *nx = *ny = *nz = problem_size; } printf("\n\n NAS Parallel Benchmarks (NPB3.3-CUDA) - SP Benchmark\n\n"); printf(" Size: %4dx%4dx%4d\n", *nx, *ny, *nz); printf(" Iterations: %4d dt_d: %10.6F\n", *niter, *dd_td); printf("\n"); } int main(int argc, char **argv) { char benchclass = argc > 1 ? argv[1][0] : 'S'; struct timeval start_t; struct timeval end_t; struct timeval skt_t; struct timeval ske_t; int niter; int nx, ny, nz; double hdd; double dd_d; double *fu, *forcing, *rhs, *rho_i, *us, *vs, *ws, *qs, *speed, *square, *lhs, *rstmp; //double* rmsbuf; //double xce[5], xcr[5]; char CUDAname[256]; int CUDAmp, CUDAclock, CUDAmemclock, CUDAl2cache; size_t CUDAmem; //--------------------------------------------------------------------- // read input data //--------------------------------------------------------------------- read_input(benchclass, &hdd, &nx, &ny, &nz, &niter); dd_d = hdd; //--------------------------------------------------------------------- // allocate CUDA device memory //--------------------------------------------------------------------- int gridsize = nx*ny*nz; int facesize = max(max(nx*ny, nx*nz), ny*nz); gettimeofday(&start_t, NULL); HANDLE_ERROR(cudaMalloc((void **)&fu, 5*gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&forcing, 5*gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&rhs, 5*gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&rho_i, gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&us, gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&vs, gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&ws, gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&qs, gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&speed, gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&square, gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&lhs, 9*gridsize*sizeof(double))); HANDLE_ERROR(cudaMalloc((void **)&rstmp, 5*gridsize*sizeof(double))); //HANDLE_ERROR(cudaMalloc((void **)&rmsbuf, 5*facesize*sizeof(double))); double ce_d[13][5]; ce_d[0][0] = (double)2.0; ce_d[1][0] = (double)0.0; ce_d[2][0] = (double)0.0; ce_d[3][0] = (double)4.0; ce_d[4][0] = (double)5.0; ce_d[5][0] = (double)3.0; ce_d[6][0] = (double)0.5; ce_d[7][0] = (double)0.02; ce_d[8][0] = (double)0.01; ce_d[9][0] = (double)0.03; ce_d[10][0] = (double)0.5; ce_d[11][0] = (double)0.4; ce_d[12][0] = (double)0.3; ce_d[0][1] = (double)1.0; ce_d[1][1] = (double)0.0; ce_d[2][1] = (double)0.0; ce_d[3][1] = (double)0.0; ce_d[4][1] = (double)1.0; ce_d[5][1] = (double)2.0; ce_d[6][1] = (double)3.0; ce_d[7][1] = (double)0.01; ce_d[8][1] = (double)0.03; ce_d[9][1] = (double)0.02; ce_d[10][1] = (double)0.4; ce_d[11][1] = (double)0.3; ce_d[12][1] = (double)0.5; ce_d[0][2] = (double)2.0; ce_d[1][2] = (double)2.0; ce_d[2][2] = (double)0.0; ce_d[3][2] = (double)0.0; ce_d[4][2] = (double)0.0; ce_d[5][2] = (double)2.0; ce_d[6][2] = (double)3.0; ce_d[7][2] = (double)0.04; ce_d[8][2] = (double)0.03; ce_d[9][2] = (double)0.05; ce_d[10][2] = (double)0.3; ce_d[11][2] = (double)0.5; ce_d[12][2] = (double)0.4; ce_d[0][3] = (double)2.0; ce_d[1][3] = (double)2.0; ce_d[2][3] = (double)0.0; ce_d[3][3] = (double)0.0; ce_d[4][3] = (double)0.0; ce_d[5][3] = (double)2.0; ce_d[6][3] = (double)3.0; ce_d[7][3] = (double)0.03; ce_d[8][3] = (double)0.05; ce_d[9][3] = (double)0.04; ce_d[10][3] = (double)0.2; ce_d[11][3] = (double)0.1; ce_d[12][3] = (double)0.3; ce_d[0][4] = (double)5.0; ce_d[1][4] = (double)4.0; ce_d[2][4] = (double)3.0; ce_d[3][4] = (double)2.0; ce_d[4][4] = (double)0.1; ce_d[5][4] = (double)0.4; ce_d[6][4] = (double)0.3; ce_d[7][4] = (double)0.05; ce_d[8][4] = (double)0.04; ce_d[9][4] = (double)0.03; ce_d[10][4] = (double)0.1; ce_d[11][4] = (double)0.3; ce_d[12][4] = (double)0.2; double bt_d = sqrt(0.5); double dnxm1_d = 1.0/((double)nx-1.0); double dnym1_d = 1.0/((double)ny-1.0); double dnzm1_d = 1.0/((double)nz-1.0); double tx1_d = 1.0 / (dnxm1_d * dnxm1_d); double tx2_d = 1.0 / (2.0 * dnxm1_d); double tx3_d = 1.0 / dnxm1_d; double ty1_d = 1.0 / (dnym1_d * dnym1_d); double ty2_d = 1.0 / (2.0 * dnym1_d); double ty3_d = 1.0 / dnym1_d; double tz1_d = 1.0 / (dnzm1_d * dnzm1_d); double tz2_d = 1.0 / (2.0 * dnzm1_d); double tz3_d = 1.0 / dnzm1_d; double dtx1_d = dd_d*tx1_d; double dttx2_d = dd_d*tx2_d; double dty1_d = dd_d*ty1_d; double dtty2_d = dd_d*ty2_d; double dtz1_d = dd_d*tz1_d; double dttz2_d = dd_d*tz2_d; double c2dttx1_d = 2.0*dtx1_d; double c2dtty1_d = 2.0*dty1_d; double c2dttz1_d = 2.0*dtz1_d; double dtdssp_d = dd_d*dssp; double comz1_d = dtdssp_d; double comz4_d = 4.0*dtdssp_d; double comz5_d = 5.0*dtdssp_d; double comz6_d = 6.0*dtdssp_d; double c3c4tx3_d = c3c4*tx3_d; double c3c4ty3_d = c3c4*ty3_d; double c3c4tz3_d = c3c4*tz3_d; double dx1tx1_d = dx1*tx1_d; double dx2tx1_d = dx2*tx1_d; double dx3tx1_d = dx3*tx1_d; double dx4tx1_d = dx4*tx1_d; double dx5tx1_d = dx5*tx1_d; double dy1ty1_d = dy1*ty1_d; double dy2ty1_d = dy2*ty1_d; double dy3ty1_d = dy3*ty1_d; double dy4ty1_d = dy4*ty1_d; double dy5ty1_d = dy5*ty1_d; double dz1tz1_d = dz1*tz1_d; double dz2tz1_d = dz2*tz1_d; double dz3tz1_d = dz3*tz1_d; double dz4tz1_d = dz4*tz1_d; double dz5tz1_d = dz5*tz1_d; double xxcon1_d = c3c4tx3_d*con43*tx3_d; double xxcon2_d = c3c4tx3_d*tx3_d; double xxcon3_d = c3c4tx3_d*conz1*tx3_d; double xxcon4_d = c3c4tx3_d*con16*tx3_d; double xxcon5_d = c3c4tx3_d*c1c5*tx3_d; double yycon1_d = c3c4ty3_d*con43*ty3_d; double yycon2_d = c3c4ty3_d*ty3_d; double yycon3_d = c3c4ty3_d*conz1*ty3_d; double yycon4_d = c3c4ty3_d*con16*ty3_d; double yycon5_d = c3c4ty3_d*c1c5*ty3_d; double zzcon1_d = c3c4tz3_d*con43*tz3_d; double zzcon2_d = c3c4tz3_d*tz3_d; double zzcon3_d = c3c4tz3_d*conz1*tz3_d; double zzcon4_d = c3c4tz3_d*con16*tz3_d; double zzcon5_d = c3c4tz3_d*c1c5*tz3_d; HANDLE_ERROR (cudaMemcpyToSymbol (&ce, &ce_d, 13*5*sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&bt, &bt_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dnxm1, &dnxm1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dnym1, &dnym1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dnzm1, &dnzm1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&tx1, &tx1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&tx2, &tx2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&tx3, &tx3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&ty1, &ty1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&ty2, &ty2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&ty3, &ty3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&tz1, &tz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&tz2, &tz2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&tz3, &tz3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dtx1, &dtx1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dttx2, &dttx2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dty1, &dty1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dtty2, &dtty2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dtz1, &dtz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dttz2, &dttz2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&c2dttx1, &c2dttx1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&c2dtty1, &c2dtty1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&c2dttz1, &c2dttz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dt, &dd_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dtdssp, &dtdssp_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&comz1, &comz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&comz4, &comz4_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&comz5, &comz5_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&comz6, &comz6_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&c3c4tx3, &c3c4tx3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&c3c4ty3, &c3c4ty3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&c3c4tz3, &c3c4tz3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dx1tx1, &dx1tx1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dx2tx1, &dx2tx1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dx3tx1, &dx3tx1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dx4tx1, &dx4tx1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dx5tx1, &dx5tx1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dy1ty1, &dy1ty1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dy2ty1, &dy2ty1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dy3ty1, &dy3ty1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dy4ty1, &dy4ty1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dy5ty1, &dy5ty1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dz1tz1, &dz1tz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dz2tz1, &dz2tz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dz3tz1, &dz3tz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dz4tz1, &dz4tz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&dz5tz1, &dz5tz1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&xxcon1, &xxcon1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&xxcon2, &xxcon2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&xxcon3, &xxcon3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&xxcon4, &xxcon4_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&xxcon5, &xxcon5_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&yycon1, &yycon1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&yycon2, &yycon2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&yycon3, &yycon3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&yycon4, &yycon4_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&yycon5, &yycon5_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&zzcon1, &zzcon1_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&zzcon2, &zzcon2_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&zzcon3, &zzcon3_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&zzcon4, &zzcon4_d, sizeof(double))); HANDLE_ERROR (cudaMemcpyToSymbol (&zzcon5, &zzcon5_d, sizeof(double))); gettimeofday(&skt_t, NULL); exact_rhs(forcing, nx, ny, nz); //sp->initialize(); dim3 grid(nz,ny); initialize_kernel<<<grid,nx>>> (fu, nx, ny, nz); //--------------------------------------------------------------------- // do one time step to touch all code, and reinitialize //--------------------------------------------------------------------- adi(true, nx, ny, nz, niter, rho_i, us, vs, ws, speed, qs, square, rhs, lhs, forcing, fu, rstmp); //sp->initialize(); initialize_kernel<<<grid,nx>>> (fu, nx, ny, nz); //--------------------------------------------------------------------- // main time stepping loop //--------------------------------------------------------------------- //sp->adi(false); adi(false, nx, ny, nz, niter, rho_i, us, vs, ws, speed, qs, square, rhs, lhs, forcing, fu, rstmp); gettimeofday(&ske_t, NULL); gettimeofday(&end_t, NULL); std::cout << "time: "<<((end_t.tv_sec-start_t.tv_sec)+(end_t.tv_usec-start_t.tv_usec)*1e-6) << std::endl; std::cout << "kernel: "<<((ske_t.tv_sec-skt_t.tv_sec)+(ske_t.tv_usec-skt_t.tv_usec)*1e-6) << std::endl; //std::cout << (sdkGetAverageTimerValue(&timer)/1000.0) / iterations << " seconds per iteration" << std::endl; //--------------------------------------------------------------------- // verification test //--------------------------------------------------------------------- //char verifyclass; //bool verified; //--------------------------------------------------------------------- // More timers //--------------------------------------------------------------------- //sp->print_timers(); //delete sp; return EXIT_SUCCESS; }
.file "tmpxft_00216792_00000000-6_sp_double.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3643: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3643: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "/home/ubuntu/Datasets/stackv2/train-structured/raydongpub/GPU-FPtuner/master/orig_application/sp_double.cu" .LC1: .string "%s in %s at line %d\n" .text .type _ZL11HandleError9cudaErrorPKci.constprop.0, @function _ZL11HandleError9cudaErrorPKci.constprop.0: .LFB4323: .cfi_startproc testl %edi, %edi je .L2 subq $24, %rsp .cfi_def_cfa_offset 32 movl %esi, 12(%rsp) call cudaGetErrorString@PLT movl 12(%rsp), %r8d movl $2, %edi leaq .LC0(%rip), %rcx movq %rax, %rdx leaq .LC1(%rip), %rsi xorl %eax, %eax call __printf_chk@PLT movl $1, %edi call exit@PLT .L2: .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE4323: .size _ZL11HandleError9cudaErrorPKci.constprop.0, .-_ZL11HandleError9cudaErrorPKci.constprop.0 .type _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0: .LFB4325: .cfi_startproc jmp cudaLaunchKernel@PLT .cfi_endproc .LFE4325: .size _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 .type _ZL40__device_stub__Z17initialize_kernelPdiiiPdiii, @function _ZL40__device_stub__Z17initialize_kernelPdiiiPdiii: .LFB3673: .cfi_startproc subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movl %esi, 20(%rsp) leaq 60(%rsp), %rsi movl %edx, 16(%rsp) leaq 32(%rsp), %rdx movl %ecx, 12(%rsp) leaq 40(%rsp), %rcx movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 72(%rsp) leaq 20(%rsp), %rax movq %rax, 80(%rsp) leaq 16(%rsp), %rax movq %rax, 88(%rsp) leaq 12(%rsp), %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L9 pushq 40(%rsp) .cfi_def_cfa_offset 136 leaq _ZL17initialize_kernelPdiii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 144 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 88(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L9: movq 104(%rsp), %rax subq %fs:40, %rax je .L11 call __stack_chk_fail@PLT .L11: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3673: .size _ZL40__device_stub__Z17initialize_kernelPdiiiPdiii, .-_ZL40__device_stub__Z17initialize_kernelPdiiiPdiii .type _ZL17initialize_kernelPdiii, @function _ZL17initialize_kernelPdiii: .LFB3674: .cfi_startproc endbr64 jmp _ZL40__device_stub__Z17initialize_kernelPdiiiPdiii .cfi_endproc .LFE3674: .size _ZL17initialize_kernelPdiii, .-_ZL17initialize_kernelPdiii .type _ZL35__device_stub__Z10add_kernelPdS_iiiPdS_iii, @function _ZL35__device_stub__Z10add_kernelPdS_iiiPdS_iii: .LFB3687: .cfi_startproc subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movl %edx, 12(%rsp) leaq 40(%rsp), %rdx movl %ecx, 8(%rsp) leaq 48(%rsp), %rcx movl %r8d, 4(%rsp) movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 80(%rsp) leaq 16(%rsp), %rax movq %rax, 88(%rsp) leaq 12(%rsp), %rax movq %rax, 96(%rsp) leaq 8(%rsp), %rax movq %rax, 104(%rsp) leaq 4(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L14 pushq 48(%rsp) .cfi_def_cfa_offset 152 leaq _ZL10add_kernelPdS_iii(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 160 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 96(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L14: movq 120(%rsp), %rax subq %fs:40, %rax je .L16 call __stack_chk_fail@PLT .L16: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3687: .size _ZL35__device_stub__Z10add_kernelPdS_iiiPdS_iii, .-_ZL35__device_stub__Z10add_kernelPdS_iiiPdS_iii .type _ZL10add_kernelPdS_iii, @function _ZL10add_kernelPdS_iii: .LFB3688: .cfi_startproc endbr64 jmp _ZL35__device_stub__Z10add_kernelPdS_iiiPdS_iii .cfi_endproc .LFE3688: .size _ZL10add_kernelPdS_iii, .-_ZL10add_kernelPdS_iii .type _ZL55__device_stub__Z14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_S_iii, @function _ZL55__device_stub__Z14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_S_iii: .LFB3685: .cfi_startproc subq $248, %rsp .cfi_def_cfa_offset 256 movq 256(%rsp), %rax movq %rdi, 72(%rsp) leaq 104(%rsp), %rdi movq %rsi, 64(%rsp) leaq 116(%rsp), %rsi movq %rax, 24(%rsp) movq 264(%rsp), %rax movq %rdx, 56(%rsp) leaq 88(%rsp), %rdx movq %rax, 16(%rsp) movq 272(%rsp), %rax movq %rcx, 48(%rsp) leaq 96(%rsp), %rcx movq %rax, 8(%rsp) movq 280(%rsp), %rax movq %r8, 40(%rsp) movq %r9, 32(%rsp) movq %rax, (%rsp) movq %fs:40, %rax movq %rax, 232(%rsp) xorl %eax, %eax leaq 72(%rsp), %rax movq %rax, 128(%rsp) leaq 64(%rsp), %rax movq %rax, 136(%rsp) leaq 56(%rsp), %rax movq %rax, 144(%rsp) leaq 48(%rsp), %rax movq %rax, 152(%rsp) leaq 40(%rsp), %rax movq %rax, 160(%rsp) leaq 32(%rsp), %rax movq %rax, 168(%rsp) leaq 24(%rsp), %rax movq %rax, 176(%rsp) leaq 16(%rsp), %rax movq %rax, 184(%rsp) leaq 8(%rsp), %rax movq %rax, 192(%rsp) movq %rsp, %rax movq %rax, 200(%rsp) leaq 288(%rsp), %rax movq %rax, 208(%rsp) leaq 296(%rsp), %rax movq %rax, 216(%rsp) leaq 304(%rsp), %rax movq %rax, 224(%rsp) movabsq $4294967297, %rax movq %rax, 104(%rsp) movl $1, 112(%rsp) movq %rax, 116(%rsp) movl $1, 124(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L19 pushq 96(%rsp) .cfi_def_cfa_offset 264 leaq _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii(%rip), %rdi pushq 96(%rsp) .cfi_def_cfa_offset 272 movq 132(%rsp), %rcx movl 140(%rsp), %r8d movq 120(%rsp), %rsi movl 128(%rsp), %edx leaq 144(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 264 popq %rdx .cfi_def_cfa_offset 256 .L19: movq 232(%rsp), %rax subq %fs:40, %rax je .L21 call __stack_chk_fail@PLT .L21: addq $248, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3685: .size _ZL55__device_stub__Z14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_S_iii, .-_ZL55__device_stub__Z14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_S_iii .type _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii, @function _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii: .LFB3686: .cfi_startproc endbr64 jmp _ZL55__device_stub__Z14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_S_iii .cfi_endproc .LFE3686: .size _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii, .-_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .type _ZL47__device_stub__Z14y_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii, @function _ZL47__device_stub__Z14y_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii: .LFB3683: .cfi_startproc subq $184, %rsp .cfi_def_cfa_offset 192 movq %rdi, 40(%rsp) leaq 72(%rsp), %rdi movq %rsi, 32(%rsp) leaq 84(%rsp), %rsi movq %rdx, 24(%rsp) leaq 56(%rsp), %rdx movq %rcx, 16(%rsp) leaq 64(%rsp), %rcx movq %r8, 8(%rsp) movq %r9, (%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 80(%rsp) movq %rax, 96(%rsp) leaq 32(%rsp), %rax movq %rax, 104(%rsp) leaq 24(%rsp), %rax movq %rax, 112(%rsp) leaq 16(%rsp), %rax movq %rax, 120(%rsp) leaq 8(%rsp), %rax movq %rax, 128(%rsp) movq %rsp, %rax movq %rax, 136(%rsp) leaq 192(%rsp), %rax movq %rax, 144(%rsp) leaq 200(%rsp), %rax movq %rax, 152(%rsp) leaq 208(%rsp), %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L24 pushq 64(%rsp) .cfi_def_cfa_offset 200 leaq _ZL14y_solve_kernelPdS_S_S_S_S_iii(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 208 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 112(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L24: movq 168(%rsp), %rax subq %fs:40, %rax je .L26 call __stack_chk_fail@PLT .L26: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3683: .size _ZL47__device_stub__Z14y_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii, .-_ZL47__device_stub__Z14y_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii .type _ZL14y_solve_kernelPdS_S_S_S_S_iii, @function _ZL14y_solve_kernelPdS_S_S_S_S_iii: .LFB3684: .cfi_startproc endbr64 jmp _ZL47__device_stub__Z14y_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii .cfi_endproc .LFE3684: .size _ZL14y_solve_kernelPdS_S_S_S_S_iii, .-_ZL14y_solve_kernelPdS_S_S_S_S_iii .type _ZL47__device_stub__Z14x_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii, @function _ZL47__device_stub__Z14x_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii: .LFB3681: .cfi_startproc subq $184, %rsp .cfi_def_cfa_offset 192 movq %rdi, 40(%rsp) leaq 72(%rsp), %rdi movq %rsi, 32(%rsp) leaq 84(%rsp), %rsi movq %rdx, 24(%rsp) leaq 56(%rsp), %rdx movq %rcx, 16(%rsp) leaq 64(%rsp), %rcx movq %r8, 8(%rsp) movq %r9, (%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 80(%rsp) movq %rax, 96(%rsp) leaq 32(%rsp), %rax movq %rax, 104(%rsp) leaq 24(%rsp), %rax movq %rax, 112(%rsp) leaq 16(%rsp), %rax movq %rax, 120(%rsp) leaq 8(%rsp), %rax movq %rax, 128(%rsp) movq %rsp, %rax movq %rax, 136(%rsp) leaq 192(%rsp), %rax movq %rax, 144(%rsp) leaq 200(%rsp), %rax movq %rax, 152(%rsp) leaq 208(%rsp), %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L29 pushq 64(%rsp) .cfi_def_cfa_offset 200 leaq _ZL14x_solve_kernelPdS_S_S_S_S_iii(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 208 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 112(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L29: movq 168(%rsp), %rax subq %fs:40, %rax je .L31 call __stack_chk_fail@PLT .L31: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3681: .size _ZL47__device_stub__Z14x_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii, .-_ZL47__device_stub__Z14x_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii .type _ZL14x_solve_kernelPdS_S_S_S_S_iii, @function _ZL14x_solve_kernelPdS_S_S_S_S_iii: .LFB3682: .cfi_startproc endbr64 jmp _ZL47__device_stub__Z14x_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii .cfi_endproc .LFE3682: .size _ZL14x_solve_kernelPdS_S_S_S_S_iii, .-_ZL14x_solve_kernelPdS_S_S_S_S_iii .type _ZL48__device_stub__Z13txinvr_kernelPdS_S_S_S_S_S_iiiPdS_S_S_S_S_S_iii, @function _ZL48__device_stub__Z13txinvr_kernelPdS_S_S_S_S_S_iiiPdS_S_S_S_S_S_iii: .LFB3679: .cfi_startproc subq $200, %rsp .cfi_def_cfa_offset 208 movq 208(%rsp), %rax movq %rdi, 56(%rsp) leaq 80(%rsp), %rdi movq %rsi, 48(%rsp) leaq 92(%rsp), %rsi movq %rdx, 40(%rsp) leaq 64(%rsp), %rdx movq %rcx, 32(%rsp) leaq 72(%rsp), %rcx movq %r8, 24(%rsp) movq %r9, 16(%rsp) movq %rax, 8(%rsp) movq %fs:40, %rax movq %rax, 184(%rsp) xorl %eax, %eax leaq 56(%rsp), %rax movl $1, 88(%rsp) movq %rax, 104(%rsp) leaq 48(%rsp), %rax movq %rax, 112(%rsp) leaq 40(%rsp), %rax movq %rax, 120(%rsp) leaq 32(%rsp), %rax movq %rax, 128(%rsp) leaq 24(%rsp), %rax movq %rax, 136(%rsp) leaq 16(%rsp), %rax movq %rax, 144(%rsp) leaq 8(%rsp), %rax movq %rax, 152(%rsp) leaq 216(%rsp), %rax movq %rax, 160(%rsp) leaq 224(%rsp), %rax movq %rax, 168(%rsp) leaq 232(%rsp), %rax movq %rax, 176(%rsp) movabsq $4294967297, %rax movq %rax, 80(%rsp) movq %rax, 92(%rsp) movl $1, 100(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L34 pushq 72(%rsp) .cfi_def_cfa_offset 216 leaq _ZL13txinvr_kernelPdS_S_S_S_S_S_iii(%rip), %rdi pushq 72(%rsp) .cfi_def_cfa_offset 224 movq 108(%rsp), %rcx movl 116(%rsp), %r8d movq 96(%rsp), %rsi movl 104(%rsp), %edx leaq 120(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 216 popq %rdx .cfi_def_cfa_offset 208 .L34: movq 184(%rsp), %rax subq %fs:40, %rax je .L36 call __stack_chk_fail@PLT .L36: addq $200, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3679: .size _ZL48__device_stub__Z13txinvr_kernelPdS_S_S_S_S_S_iiiPdS_S_S_S_S_S_iii, .-_ZL48__device_stub__Z13txinvr_kernelPdS_S_S_S_S_S_iiiPdS_S_S_S_S_S_iii .type _ZL13txinvr_kernelPdS_S_S_S_S_S_iii, @function _ZL13txinvr_kernelPdS_S_S_S_S_S_iii: .LFB3680: .cfi_startproc endbr64 jmp _ZL48__device_stub__Z13txinvr_kernelPdS_S_S_S_S_S_iiiPdS_S_S_S_S_S_iii .cfi_endproc .LFE3680: .size _ZL13txinvr_kernelPdS_S_S_S_S_S_iii, .-_ZL13txinvr_kernelPdS_S_S_S_S_S_iii .type _ZL59__device_stub__Z20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_iii, @function _ZL59__device_stub__Z20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_iii: .LFB3677: .cfi_startproc subq $232, %rsp .cfi_def_cfa_offset 240 movq 240(%rsp), %rax movq %rdi, 72(%rsp) leaq 96(%rsp), %rdi movq %rsi, 64(%rsp) leaq 108(%rsp), %rsi movq %rax, 24(%rsp) movq 248(%rsp), %rax movq %rdx, 56(%rsp) leaq 80(%rsp), %rdx movq %rax, 16(%rsp) movq 256(%rsp), %rax movq %rcx, 48(%rsp) leaq 88(%rsp), %rcx movq %r8, 40(%rsp) movq %r9, 32(%rsp) movq %rax, 8(%rsp) movq %fs:40, %rax movq %rax, 216(%rsp) xorl %eax, %eax leaq 72(%rsp), %rax movl $1, 104(%rsp) movq %rax, 120(%rsp) leaq 64(%rsp), %rax movq %rax, 128(%rsp) leaq 56(%rsp), %rax movq %rax, 136(%rsp) leaq 48(%rsp), %rax movq %rax, 144(%rsp) leaq 40(%rsp), %rax movq %rax, 152(%rsp) leaq 32(%rsp), %rax movq %rax, 160(%rsp) leaq 24(%rsp), %rax movq %rax, 168(%rsp) leaq 16(%rsp), %rax movq %rax, 176(%rsp) leaq 8(%rsp), %rax movq %rax, 184(%rsp) leaq 264(%rsp), %rax movq %rax, 192(%rsp) leaq 272(%rsp), %rax movq %rax, 200(%rsp) leaq 280(%rsp), %rax movq %rax, 208(%rsp) movabsq $4294967297, %rax movq %rax, 96(%rsp) movq %rax, 108(%rsp) movl $1, 116(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L39 pushq 88(%rsp) .cfi_def_cfa_offset 248 leaq _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii(%rip), %rdi pushq 88(%rsp) .cfi_def_cfa_offset 256 movq 124(%rsp), %rcx movl 132(%rsp), %r8d movq 112(%rsp), %rsi movl 120(%rsp), %edx leaq 136(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 248 popq %rdx .cfi_def_cfa_offset 240 .L39: movq 216(%rsp), %rax subq %fs:40, %rax je .L41 call __stack_chk_fail@PLT .L41: addq $232, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3677: .size _ZL59__device_stub__Z20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_iii, .-_ZL59__device_stub__Z20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_iii .type _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii, @function _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii: .LFB3678: .cfi_startproc endbr64 jmp _ZL59__device_stub__Z20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_iii .cfi_endproc .LFE3678: .size _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii, .-_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .type _ZL57__device_stub__Z20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_iii, @function _ZL57__device_stub__Z20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_iii: .LFB3675: .cfi_startproc subq $216, %rsp .cfi_def_cfa_offset 224 movq 224(%rsp), %rax movq %rdi, 56(%rsp) leaq 88(%rsp), %rdi movq %rsi, 48(%rsp) leaq 100(%rsp), %rsi movq %rax, 8(%rsp) movq 232(%rsp), %rax movq %rdx, 40(%rsp) leaq 72(%rsp), %rdx movq %rcx, 32(%rsp) leaq 80(%rsp), %rcx movq %r8, 24(%rsp) movq %r9, 16(%rsp) movq %rax, (%rsp) movq %fs:40, %rax movq %rax, 200(%rsp) xorl %eax, %eax leaq 56(%rsp), %rax movl $1, 96(%rsp) movq %rax, 112(%rsp) leaq 48(%rsp), %rax movq %rax, 120(%rsp) leaq 40(%rsp), %rax movq %rax, 128(%rsp) leaq 32(%rsp), %rax movq %rax, 136(%rsp) leaq 24(%rsp), %rax movq %rax, 144(%rsp) leaq 16(%rsp), %rax movq %rax, 152(%rsp) leaq 8(%rsp), %rax movq %rax, 160(%rsp) movq %rsp, %rax movq %rax, 168(%rsp) leaq 240(%rsp), %rax movq %rax, 176(%rsp) leaq 248(%rsp), %rax movq %rax, 184(%rsp) leaq 256(%rsp), %rax movq %rax, 192(%rsp) movabsq $4294967297, %rax movq %rax, 88(%rsp) movq %rax, 100(%rsp) movl $1, 108(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L44 pushq 80(%rsp) .cfi_def_cfa_offset 232 leaq _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii(%rip), %rdi pushq 80(%rsp) .cfi_def_cfa_offset 240 movq 116(%rsp), %rcx movl 124(%rsp), %r8d movq 104(%rsp), %rsi movl 112(%rsp), %edx leaq 128(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 232 popq %rdx .cfi_def_cfa_offset 224 .L44: movq 200(%rsp), %rax subq %fs:40, %rax je .L46 call __stack_chk_fail@PLT .L46: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3675: .size _ZL57__device_stub__Z20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_iii, .-_ZL57__device_stub__Z20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_iii .type _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii, @function _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii: .LFB3676: .cfi_startproc endbr64 jmp _ZL57__device_stub__Z20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_iii .cfi_endproc .LFE3676: .size _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii, .-_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .type _ZL41__device_stub__Z18exact_rhs_kernel_zPdiiiPdiii, @function _ZL41__device_stub__Z18exact_rhs_kernel_zPdiiiPdiii: .LFB3671: .cfi_startproc subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movl %esi, 20(%rsp) leaq 60(%rsp), %rsi movl %edx, 16(%rsp) leaq 32(%rsp), %rdx movl %ecx, 12(%rsp) leaq 40(%rsp), %rcx movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 72(%rsp) leaq 20(%rsp), %rax movq %rax, 80(%rsp) leaq 16(%rsp), %rax movq %rax, 88(%rsp) leaq 12(%rsp), %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L49 pushq 40(%rsp) .cfi_def_cfa_offset 136 leaq _ZL18exact_rhs_kernel_zPdiii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 144 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 88(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L49: movq 104(%rsp), %rax subq %fs:40, %rax je .L51 call __stack_chk_fail@PLT .L51: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3671: .size _ZL41__device_stub__Z18exact_rhs_kernel_zPdiiiPdiii, .-_ZL41__device_stub__Z18exact_rhs_kernel_zPdiiiPdiii .type _ZL18exact_rhs_kernel_zPdiii, @function _ZL18exact_rhs_kernel_zPdiii: .LFB3672: .cfi_startproc endbr64 jmp _ZL41__device_stub__Z18exact_rhs_kernel_zPdiiiPdiii .cfi_endproc .LFE3672: .size _ZL18exact_rhs_kernel_zPdiii, .-_ZL18exact_rhs_kernel_zPdiii .type _ZL41__device_stub__Z18exact_rhs_kernel_yPdiiiPdiii, @function _ZL41__device_stub__Z18exact_rhs_kernel_yPdiiiPdiii: .LFB3669: .cfi_startproc subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movl %esi, 20(%rsp) leaq 60(%rsp), %rsi movl %edx, 16(%rsp) leaq 32(%rsp), %rdx movl %ecx, 12(%rsp) leaq 40(%rsp), %rcx movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 72(%rsp) leaq 20(%rsp), %rax movq %rax, 80(%rsp) leaq 16(%rsp), %rax movq %rax, 88(%rsp) leaq 12(%rsp), %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L54 pushq 40(%rsp) .cfi_def_cfa_offset 136 leaq _ZL18exact_rhs_kernel_yPdiii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 144 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 88(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L54: movq 104(%rsp), %rax subq %fs:40, %rax je .L56 call __stack_chk_fail@PLT .L56: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3669: .size _ZL41__device_stub__Z18exact_rhs_kernel_yPdiiiPdiii, .-_ZL41__device_stub__Z18exact_rhs_kernel_yPdiiiPdiii .type _ZL18exact_rhs_kernel_yPdiii, @function _ZL18exact_rhs_kernel_yPdiii: .LFB3670: .cfi_startproc endbr64 jmp _ZL41__device_stub__Z18exact_rhs_kernel_yPdiiiPdiii .cfi_endproc .LFE3670: .size _ZL18exact_rhs_kernel_yPdiii, .-_ZL18exact_rhs_kernel_yPdiii .type _ZL41__device_stub__Z18exact_rhs_kernel_xPdiiiPdiii, @function _ZL41__device_stub__Z18exact_rhs_kernel_xPdiiiPdiii: .LFB3667: .cfi_startproc subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movl %esi, 20(%rsp) leaq 60(%rsp), %rsi movl %edx, 16(%rsp) leaq 32(%rsp), %rdx movl %ecx, 12(%rsp) leaq 40(%rsp), %rcx movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 72(%rsp) leaq 20(%rsp), %rax movq %rax, 80(%rsp) leaq 16(%rsp), %rax movq %rax, 88(%rsp) leaq 12(%rsp), %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L59 pushq 40(%rsp) .cfi_def_cfa_offset 136 leaq _ZL18exact_rhs_kernel_xPdiii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 144 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 88(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L59: movq 104(%rsp), %rax subq %fs:40, %rax je .L61 call __stack_chk_fail@PLT .L61: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3667: .size _ZL41__device_stub__Z18exact_rhs_kernel_xPdiiiPdiii, .-_ZL41__device_stub__Z18exact_rhs_kernel_xPdiiiPdiii .type _ZL18exact_rhs_kernel_xPdiii, @function _ZL18exact_rhs_kernel_xPdiii: .LFB3668: .cfi_startproc endbr64 jmp _ZL41__device_stub__Z18exact_rhs_kernel_xPdiiiPdiii .cfi_endproc .LFE3668: .size _ZL18exact_rhs_kernel_xPdiii, .-_ZL18exact_rhs_kernel_xPdiii .type _ZL44__device_stub__Z21exact_rhs_kernel_initPdiiiPdiii, @function _ZL44__device_stub__Z21exact_rhs_kernel_initPdiiiPdiii: .LFB3665: .cfi_startproc subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movl %esi, 20(%rsp) leaq 60(%rsp), %rsi movl %edx, 16(%rsp) leaq 32(%rsp), %rdx movl %ecx, 12(%rsp) leaq 40(%rsp), %rcx movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 72(%rsp) leaq 20(%rsp), %rax movq %rax, 80(%rsp) leaq 16(%rsp), %rax movq %rax, 88(%rsp) leaq 12(%rsp), %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L64 pushq 40(%rsp) .cfi_def_cfa_offset 136 leaq _ZL21exact_rhs_kernel_initPdiii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 144 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 88(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L64: movq 104(%rsp), %rax subq %fs:40, %rax je .L66 call __stack_chk_fail@PLT .L66: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3665: .size _ZL44__device_stub__Z21exact_rhs_kernel_initPdiiiPdiii, .-_ZL44__device_stub__Z21exact_rhs_kernel_initPdiiiPdiii .type _ZL21exact_rhs_kernel_initPdiii, @function _ZL21exact_rhs_kernel_initPdiii: .LFB3666: .cfi_startproc endbr64 jmp _ZL44__device_stub__Z21exact_rhs_kernel_initPdiiiPdiii .cfi_endproc .LFE3666: .size _ZL21exact_rhs_kernel_initPdiii, .-_ZL21exact_rhs_kernel_initPdiii .globl _Z9exact_rhsPdiii .type _Z9exact_rhsPdiii, @function _Z9exact_rhsPdiii: .LFB3637: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rax pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movl %esi, %r13d pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movl %ecx, %ebp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %edx, %ebx subq $120, %rsp .cfi_def_cfa_offset 176 movl %edx, 28(%rsp) movl %ecx, 32(%rsp) movl %esi, 100(%rsp) movl $1, %esi movq %rax, 104(%rsp) movl 108(%rsp), %ecx movq %rdi, 8(%rsp) movq 100(%rsp), %rdx movq 28(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L70 movq 8(%rsp), %rdi movl %ebp, %ecx movl %ebx, %edx movl %r13d, %esi call _ZL44__device_stub__Z21exact_rhs_kernel_initPdiiiPdiii .L70: movl $32, %esi movl $32, %eax cmpl %esi, %ebx cmovle %ebx, %esi cltd idivl %esi movl %esi, 56(%rsp) cmpl %ebp, %eax cmovg %ebp, %eax xorl %r9d, %r9d xorl %r8d, %r8d movl %eax, %ecx leal -1(%rax,%rbp), %eax cltd movl %ecx, 52(%rsp) idivl %ecx movl $1, %ecx movl %eax, 40(%rsp) leal -1(%rsi,%rbx), %eax cltd idivl %esi movq 52(%rsp), %rdx movl $1, %esi movl %eax, 44(%rsp) movq 40(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L71 movq 8(%rsp), %rdi movl %ebp, %ecx movl %ebx, %edx movl %r13d, %esi call _ZL41__device_stub__Z18exact_rhs_kernel_xPdiiiPdiii .L71: movl $32, %r10d movl $32, %eax movl %ebp, %ecx movl $1, %esi cmpl %r10d, %r13d cmovle %r13d, %r10d cltd idivl %r10d movl %r10d, 80(%rsp) movl %r10d, %r14d cmpl %ebp, %eax movl %eax, %r12d cmovle %eax, %ecx leal -1(%r10,%r13), %eax xorl %r9d, %r9d xorl %r8d, %r8d cltd idivl %r10d movl %ecx, 76(%rsp) movl %eax, %r15d leal -1(%rcx,%rbp), %eax cltd movl %r15d, 68(%rsp) idivl %ecx movq 76(%rsp), %rdx movl $1, %ecx movl %eax, 64(%rsp) movq 64(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L72 movq 8(%rsp), %rdi movl %ebp, %ecx movl %ebx, %edx movl %r13d, %esi call _ZL41__device_stub__Z18exact_rhs_kernel_yPdiiiPdiii .L72: cmpl %ebx, %r12d movl %r15d, 92(%rsp) movl $1, %ecx movl $1, %esi cmovg %ebx, %r12d movl %r14d, 104(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movl $1, 108(%rsp) leal -1(%r12,%rbx), %eax movl %r12d, 100(%rsp) cltd idivl %r12d movq 100(%rsp), %rdx movl %eax, 88(%rsp) movq 88(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L69 movq 8(%rsp), %rdi addq $120, %rsp .cfi_remember_state .cfi_def_cfa_offset 56 movl %ebp, %ecx movl %ebx, %edx movl %r13d, %esi popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp _ZL41__device_stub__Z18exact_rhs_kernel_zPdiiiPdiii .L69: .cfi_restore_state addq $120, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3637: .size _Z9exact_rhsPdiii, .-_Z9exact_rhsPdiii .section .rodata.str1.1 .LC2: .string " Time step %4d\n" .text .globl _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ .type _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_, @function _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_: .LFB3638: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movl %edi, %r13d pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movl %esi, %r12d pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movl %ecx, %ebp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %edx, %ebx subq $248, %rsp .cfi_def_cfa_offset 304 movq 304(%rsp), %rax movl %r8d, 52(%rsp) movq %r9, (%rsp) movq 352(%rsp), %r15 movq %rax, 8(%rsp) movq 312(%rsp), %rax movq %rax, 16(%rsp) movq 320(%rsp), %rax movq %rax, 32(%rsp) movq 328(%rsp), %rax movq %rax, 24(%rsp) movq 336(%rsp), %rax movq %rax, 40(%rsp) movq 344(%rsp), %rax movq %rax, 72(%rsp) movq 360(%rsp), %rax movq %rax, 56(%rsp) movq 368(%rsp), %rax movq %rax, 96(%rsp) movq 384(%rsp), %rax movb %dil, 107(%rsp) movq 376(%rsp), %r14 movq %rax, 64(%rsp) call cudaDeviceSynchronize@PLT movl $1793, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 testb %r13b, %r13b movl $1, %eax cmove 52(%rsp), %eax movl $1, 48(%rsp) movl %eax, 52(%rsp) .L77: movl 52(%rsp), %edi cmpl %edi, 48(%rsp) jg .L98 movl 48(%rsp), %eax movl $20, %ecx cltd idivl %ecx testl %edx, %edx je .L78 cmpl $1, 48(%rsp) jne .L79 cmpb $1, 107(%rsp) je .L79 .L78: movl 48(%rsp), %edx leaq .LC2(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L79: movl %ebx, 120(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %esi movabsq $4294967297, %rax movl %ebp, 124(%rsp) movq 120(%rsp), %rdi movq %rax, 232(%rsp) movl 236(%rsp), %ecx movl %r12d, 228(%rsp) movq 228(%rsp), %rdx movl $1, 128(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L80 pushq %rsi .cfi_def_cfa_offset 312 pushq %rbp .cfi_def_cfa_offset 320 pushq %rbx .cfi_def_cfa_offset 328 pushq %r12 .cfi_def_cfa_offset 336 pushq %r14 .cfi_def_cfa_offset 344 pushq 112(%rsp) .cfi_def_cfa_offset 352 movq 88(%rsp), %r9 movq 72(%rsp), %r8 movq 80(%rsp), %rcx movq 64(%rsp), %rdx movq 56(%rsp), %rsi movq 48(%rsp), %rdi call _ZL57__device_stub__Z20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_iii addq $48, %rsp .cfi_def_cfa_offset 304 .L80: movabsq $4294967297, %rax movq 120(%rsp), %rdi xorl %r9d, %r9d xorl %r8d, %r8d movq %rax, 232(%rsp) movl 128(%rsp), %esi movl %r12d, 228(%rsp) movl 236(%rsp), %ecx movq 228(%rsp), %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 pushq %rbp .cfi_def_cfa_offset 312 pushq %rbx .cfi_def_cfa_offset 320 pushq %r12 .cfi_def_cfa_offset 328 pushq %r14 .cfi_def_cfa_offset 336 pushq 128(%rsp) .cfi_def_cfa_offset 344 pushq %r15 .cfi_def_cfa_offset 352 movq 120(%rsp), %r9 movq 88(%rsp), %r8 movq 80(%rsp), %rcx movq 64(%rsp), %rdx movq 56(%rsp), %rsi movq 48(%rsp), %rdi call _ZL59__device_stub__Z20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_iii addq $48, %rsp .cfi_def_cfa_offset 304 .L81: leal -2(%rbp), %eax xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %esi movl %eax, 80(%rsp) leal -2(%rbx), %eax movl %eax, 132(%rsp) movl %eax, 88(%rsp) movl 80(%rsp), %eax movl %eax, 136(%rsp) leal -2(%r12), %eax movq 132(%rsp), %rdi movl %eax, 228(%rsp) movl %eax, 92(%rsp) movabsq $4294967297, %rax movq %rax, 232(%rsp) movl 236(%rsp), %ecx movq 228(%rsp), %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L82 pushq %rbp .cfi_def_cfa_offset 312 pushq %rbx .cfi_def_cfa_offset 320 pushq %r12 .cfi_def_cfa_offset 328 pushq %r15 .cfi_def_cfa_offset 336 movq 72(%rsp), %r9 movq 56(%rsp), %r8 movq 64(%rsp), %rcx movq 48(%rsp), %rdx movq 40(%rsp), %rsi movq 32(%rsp), %rdi call _ZL48__device_stub__Z13txinvr_kernelPdS_S_S_S_S_S_iiiPdS_S_S_S_S_S_iii addq $32, %rsp .cfi_def_cfa_offset 304 .L82: movl $32, %esi movl $32, %eax cmpl %esi, %ebx cmovle %ebx, %esi cltd idivl %esi movl %esi, 160(%rsp) cmpl %ebp, %eax cmovg %ebp, %eax xorl %r9d, %r9d xorl %r8d, %r8d movl %eax, %ecx leal -1(%rax,%rbp), %eax cltd movl %ecx, 156(%rsp) idivl %ecx movl $1, %ecx movl %eax, 144(%rsp) leal -1(%rsi,%rbx), %eax cltd idivl %esi movq 156(%rsp), %rdx movl $1, %esi movl %eax, 148(%rsp) movq 144(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L83 pushq %rcx .cfi_def_cfa_offset 312 movq %r15, %rcx pushq %rbp .cfi_def_cfa_offset 320 pushq %rbx .cfi_def_cfa_offset 328 pushq %r12 .cfi_def_cfa_offset 336 movq 96(%rsp), %r9 movq 88(%rsp), %r8 movq 56(%rsp), %rdx movq 40(%rsp), %rsi movq 32(%rsp), %rdi call _ZL47__device_stub__Z14x_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii addq $32, %rsp .cfi_def_cfa_offset 304 .L83: movl $32, %r10d movl $32, %eax movl %ebp, %ecx movl $1, %esi cmpl %r10d, %r12d cmovle %r12d, %r10d cltd idivl %r10d movl %r10d, 184(%rsp) movl %r10d, 108(%rsp) cmpl %ebp, %eax movl %eax, %r13d cmovle %eax, %ecx leal -1(%r10,%r12), %eax xorl %r9d, %r9d xorl %r8d, %r8d cltd idivl %r10d movl %ecx, 180(%rsp) movl %eax, 84(%rsp) leal -1(%rcx,%rbp), %eax cltd idivl %ecx movq 180(%rsp), %rdx movl $1, %ecx movl %eax, 168(%rsp) movl 84(%rsp), %eax movl %eax, 172(%rsp) movq 168(%rsp), %rdi call __cudaPushCallConfiguration@PLT movl 108(%rsp), %r10d testl %eax, %eax jne .L84 pushq %rdx .cfi_def_cfa_offset 312 movq %r15, %rcx pushq %rbp .cfi_def_cfa_offset 320 pushq %rbx .cfi_def_cfa_offset 328 pushq %r12 .cfi_def_cfa_offset 336 movq 96(%rsp), %r9 movq 88(%rsp), %r8 movq 56(%rsp), %rdx movq 48(%rsp), %rsi movq 32(%rsp), %rdi call _ZL47__device_stub__Z14y_solve_kernelPdS_S_S_S_S_iiiPdS_S_S_S_S_iii movl 140(%rsp), %r10d addq $32, %rsp .cfi_def_cfa_offset 304 .L84: cmpl %ebx, %r13d movl $1, %ecx movl $1, %esi movl %r10d, 208(%rsp) cmovg %ebx, %r13d xorl %r9d, %r9d xorl %r8d, %r8d leal -1(%r13,%rbx), %eax movl %r13d, 204(%rsp) cltd idivl %r13d movq 204(%rsp), %rdx movl %eax, 192(%rsp) movl 84(%rsp), %eax movl %eax, 196(%rsp) movq 192(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L85 pushq %rax .cfi_def_cfa_offset 312 pushq %rbp .cfi_def_cfa_offset 320 pushq %rbx .cfi_def_cfa_offset 328 pushq %r12 .cfi_def_cfa_offset 336 pushq 96(%rsp) .cfi_def_cfa_offset 344 pushq 96(%rsp) .cfi_def_cfa_offset 352 pushq %r15 .cfi_def_cfa_offset 360 pushq %r14 .cfi_def_cfa_offset 368 movq 104(%rsp), %r9 movq 88(%rsp), %r8 movq 96(%rsp), %rcx movq 80(%rsp), %rdx movq 72(%rsp), %rsi movq 64(%rsp), %rdi call _ZL55__device_stub__Z14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iiiPdS_S_S_S_S_S_S_S_S_iii addq $64, %rsp .cfi_def_cfa_offset 304 .L85: movl 88(%rsp), %eax xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %esi movl %eax, 216(%rsp) movl 80(%rsp), %eax movl %eax, 220(%rsp) movl 92(%rsp), %eax movq 216(%rsp), %rdi movl %eax, 228(%rsp) movabsq $4294967301, %rax movq %rax, 232(%rsp) movl 236(%rsp), %ecx movq 228(%rsp), %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L86 movl %ebp, %r8d movl %ebx, %ecx movl %r12d, %edx movq %r15, %rsi movq %r14, %rdi call _ZL35__device_stub__Z10add_kernelPdS_iiiPdS_iii .L86: incl 48(%rsp) jmp .L77 .L98: call cudaDeviceSynchronize@PLT addq $248, %rsp .cfi_def_cfa_offset 56 movl $1841, %esi popq %rbx .cfi_def_cfa_offset 48 movl %eax, %edi popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp _ZL11HandleError9cudaErrorPKci.constprop.0 .cfi_endproc .LFE3638: .size _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_, .-_Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ .section .rodata.str1.1 .LC9: .string "rt" .LC10: .string "inputsp.data" .LC11: .string " Reading from input file inputsp.data\n" .LC12: .string "%i" .LC13: .string "%lf" .LC14: .string "%i %i %i" .LC15: .string "setparams: Internal error: invalid class %c\n" .LC16: .string "\n\n NAS Parallel Benchmarks (NPB3.3-CUDA) - SP Benchmark\n\n" .LC17: .string " Size: %4dx%4dx%4d\n" .LC18: .string " Iterations: %4d dt_d: %10.6F\n" .LC19: .string "\n" .text .globl _Z10read_inputcPdPiS0_S0_S0_ .type _Z10read_inputcPdPiS0_S0_S0_, @function _Z10read_inputcPdPiS0_S0_S0_: .LFB3639: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movq %r8, %r15 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movq %rcx, %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rdx, %r13 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movq %rsi, %r12 leaq .LC9(%rip), %rsi pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movq %r9, %rbp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $1064, %rsp .cfi_def_cfa_offset 1120 movl %edi, 8(%rsp) leaq .LC10(%rip), %rdi movq %fs:40, %rax movq %rax, 1048(%rsp) xorl %eax, %eax call fopen@PLT movl 8(%rsp), %r10d testq %rax, %rax je .L100 movq %rax, %rbx leaq .LC11(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT leaq 24(%rsp), %rax movq %rbx, %rcx movl $1023, %edx movl $1024, %esi movq %rax, %rdi movq %rax, 8(%rsp) call __fgets_chk@PLT movq 8(%rsp), %rdi movq %rbp, %rdx xorl %eax, %eax leaq .LC12(%rip), %rsi call __isoc23_sscanf@PLT movq 8(%rsp), %rdi movq %rbx, %rcx movl $1023, %edx movl $1024, %esi call __fgets_chk@PLT movq 8(%rsp), %rdi movq %r12, %rdx xorl %eax, %eax leaq .LC13(%rip), %rsi call __isoc23_sscanf@PLT movq 8(%rsp), %rdi movq %rbx, %rcx movl $1023, %edx movl $1024, %esi call __fgets_chk@PLT movq 8(%rsp), %rdi movq %r15, %r8 movq %r14, %rcx movq %r13, %rdx leaq .LC14(%rip), %rsi xorl %eax, %eax call __isoc23_sscanf@PLT movq %rbx, %rdi call fclose@PLT jmp .L101 .L100: cmpb $101, %r10b jg .L102 cmpb $82, %r10b jg .L103 leal -65(%r10), %eax cmpb $4, %al jbe .L125 jmp .L104 .L103: leal -83(%r10), %eax cmpb $18, %al ja .L104 leaq .L107(%rip), %rdx movzbl %al, %eax movslq (%rdx,%rax,4), %rax addq %rdx, %rax notrack jmp *%rax .section .rodata .align 4 .align 4 .L107: .long .L123-.L107 .long .L104-.L107 .long .L104-.L107 .long .L104-.L107 .long .L124-.L107 .long .L104-.L107 .long .L104-.L107 .long .L104-.L107 .long .L104-.L107 .long .L104-.L107 .long .L104-.L107 .long .L104-.L107 .long .L104-.L107 .long .L104-.L107 .long .L111-.L107 .long .L110-.L107 .long .L109-.L107 .long .L108-.L107 .long .L122-.L107 .text .L125: subl $66, %r10d cmpb $3, %r10b ja .L111 leaq .L115(%rip), %rdx movzbl %r10b, %r10d movslq (%rdx,%r10,4), %rax addq %rdx, %rax notrack jmp *%rax .section .rodata .align 4 .align 4 .L115: .long .L110-.L115 .long .L109-.L115 .long .L108-.L115 .long .L122-.L115 .text .L102: cmpb $115, %r10b je .L123 cmpb $119, %r10b je .L124 jmp .L104 .L111: movsd .LC4(%rip), %xmm0 movl $400, %edx movl $64, %eax jmp .L113 .L110: movsd .LC5(%rip), %xmm0 movl $400, %edx movl $102, %eax jmp .L113 .L109: movsd .LC6(%rip), %xmm0 movl $400, %edx movl $162, %eax jmp .L113 .L108: movsd .LC7(%rip), %xmm0 movl $500, %edx movl $408, %eax jmp .L113 .L104: movl $2, %edi movsbl %r10b, %edx leaq .LC15(%rip), %rsi xorl %eax, %eax call __printf_chk@PLT movl $1, %edi call exit@PLT .L122: movsd .LC8(%rip), %xmm0 movl $500, %edx movl $1020, %eax jmp .L113 .L123: movsd .LC3(%rip), %xmm0 movl $100, %edx movl $12, %eax jmp .L113 .L124: movsd .LC4(%rip), %xmm0 movl $400, %edx movl $36, %eax .L113: movsd %xmm0, (%r12) movl %edx, 0(%rbp) movl %eax, (%r15) movl %eax, (%r14) movl %eax, 0(%r13) .L101: leaq .LC16(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl 0(%r13), %edx movl (%r15), %r8d xorl %eax, %eax movl (%r14), %ecx leaq .LC17(%rip), %rsi movl $2, %edi call __printf_chk@PLT movsd (%r12), %xmm0 movl 0(%rbp), %edx movb $1, %al leaq .LC18(%rip), %rsi movl $2, %edi call __printf_chk@PLT movq 1048(%rsp), %rax subq %fs:40, %rax je .L119 call __stack_chk_fail@PLT .L119: addq $1064, %rsp .cfi_def_cfa_offset 56 leaq .LC19(%rip), %rsi movl $2, %edi xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp __printf_chk@PLT .cfi_endproc .LFE3639: .size _Z10read_inputcPdPiS0_S0_S0_, .-_Z10read_inputcPdPiS0_S0_S0_ .section .rodata.str1.1 .LC44: .string "time: " .LC46: .string "kernel: " .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB3640: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movl %edi, %eax movl $83, %edi pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $1216, %rsp .cfi_def_cfa_offset 1248 movq %fs:40, %rdx movq %rdx, 1208(%rsp) xorl %edx, %edx decl %eax jle .L128 movq 8(%rsi), %rax movsbl (%rax), %edi .L128: movq %rsp, %r9 leaq 8(%rsp), %rcx leaq 4(%rsp), %rdx leaq 12(%rsp), %r8 leaq 16(%rsp), %rsi call _Z10read_inputcPdPiS0_S0_S0_ movl 4(%rsp), %ebx xorl %esi, %esi imull 8(%rsp), %ebx imull 12(%rsp), %ebx movsd 16(%rsp), %xmm0 leaq 624(%rsp), %rdi movsd %xmm0, 24(%rsp) call gettimeofday@PLT leal (%rbx,%rbx,4), %r12d leaq 32(%rsp), %rdi movslq %ebx, %rbp movslq %r12d, %r12 salq $3, %rbp salq $3, %r12 movq %r12, %rsi call cudaMalloc@PLT movl $1927, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 40(%rsp), %rdi movq %r12, %rsi call cudaMalloc@PLT movl $1928, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 48(%rsp), %rdi movq %r12, %rsi call cudaMalloc@PLT movl $1929, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 56(%rsp), %rdi movq %rbp, %rsi call cudaMalloc@PLT movl $1930, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 64(%rsp), %rdi movq %rbp, %rsi call cudaMalloc@PLT movl $1931, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 72(%rsp), %rdi movq %rbp, %rsi call cudaMalloc@PLT movl $1932, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 80(%rsp), %rdi movq %rbp, %rsi call cudaMalloc@PLT movl $1933, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 88(%rsp), %rdi movq %rbp, %rsi call cudaMalloc@PLT movl $1934, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 96(%rsp), %rdi movq %rbp, %rsi call cudaMalloc@PLT movl $1935, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 104(%rsp), %rdi movq %rbp, %rsi call cudaMalloc@PLT movl $1936, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leal (%rbx,%rbx,8), %esi leaq 112(%rsp), %rdi movslq %esi, %rsi leaq 672(%rsp), %rbx salq $3, %rsi call cudaMalloc@PLT movl $1937, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 leaq 120(%rsp), %rdi movq %r12, %rsi call cudaMalloc@PLT movl $1938, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 movsd .LC31(%rip), %xmm1 xorl %ecx, %ecx movsd .LC20(%rip), %xmm2 movsd .LC30(%rip), %xmm3 movsd .LC24(%rip), %xmm5 movq $0x000000000, 728(%rsp) movl $1, %r8d movsd .LC25(%rip), %xmm0 movaps %xmm1, %xmm14 movaps %xmm1, %xmm13 movsd .LC28(%rip), %xmm4 movsd .LC29(%rip), %xmm6 movl $520, %edx movq %rbx, %rdi movsd .LC22(%rip), %xmm10 movsd .LC26(%rip), %xmm7 movsd .LC23(%rip), %xmm9 movsd %xmm2, 688(%rsp) leaq 688(%rsp), %rsi movsd .LC27(%rip), %xmm8 movsd %xmm10, 808(%rsp) movsd %xmm9, 848(%rsp) movsd %xmm5, 888(%rsp) movsd %xmm0, 928(%rsp) movsd %xmm7, 968(%rsp) movsd %xmm8, 1008(%rsp) movsd %xmm4, 1048(%rsp) movsd %xmm0, 1088(%rsp) movsd %xmm6, 1128(%rsp) movsd %xmm3, 1168(%rsp) movsd %xmm1, 696(%rsp) movsd %xmm1, 856(%rsp) movsd %xmm2, 896(%rsp) movsd %xmm5, 936(%rsp) movsd %xmm8, 976(%rsp) movq $0x000000000, 768(%rsp) movq $0x000000000, 736(%rsp) movq $0x000000000, 776(%rsp) movq $0x000000000, 816(%rsp) movsd %xmm4, 1016(%rsp) movsd .LC33(%rip), %xmm8 movsd .LC34(%rip), %xmm11 movsd %xmm7, 1056(%rsp) movsd .LC32(%rip), %xmm7 movsd %xmm0, 1176(%rsp) movsd %xmm0, 1144(%rsp) movsd .LC35(%rip), %xmm0 movsd %xmm6, 1096(%rsp) movsd %xmm3, 1136(%rsp) movsd %xmm2, 704(%rsp) movsd %xmm2, 744(%rsp) movsd %xmm2, 904(%rsp) movsd %xmm5, 944(%rsp) movsd %xmm7, 984(%rsp) movsd %xmm4, 1024(%rsp) movsd %xmm8, 1064(%rsp) movsd %xmm3, 1104(%rsp) movsd %xmm6, 1184(%rsp) movsd %xmm2, 712(%rsp) movsd %xmm2, 752(%rsp) movsd %xmm2, 912(%rsp) movsd %xmm5, 952(%rsp) movsd %xmm4, 992(%rsp) movsd %xmm8, 1032(%rsp) movsd %xmm7, 1072(%rsp) movsd %xmm11, 1112(%rsp) movq $0x000000000, 784(%rsp) movq $0x000000000, 824(%rsp) movq $0x000000000, 864(%rsp) movq $0x000000000, 792(%rsp) movq $0x000000000, 832(%rsp) movq $0x000000000, 872(%rsp) movsd %xmm0, 1152(%rsp) movq .LC36(%rip), %rax movsd %xmm2, 840(%rsp) cvtsi2sdl 4(%rsp), %xmm2 movsd %xmm4, 1080(%rsp) movaps %xmm1, %xmm4 movsd %xmm3, 1192(%rsp) movsd %xmm3, 960(%rsp) subsd %xmm1, %xmm2 movsd %xmm3, 1160(%rsp) movaps %xmm1, %xmm3 movsd %xmm5, 800(%rsp) cvtsi2sdl 12(%rsp), %xmm5 movsd %xmm6, 920(%rsp) divsd %xmm2, %xmm4 cvtsi2sdl 8(%rsp), %xmm2 movsd %xmm11, 1200(%rsp) movaps %xmm1, %xmm11 movsd %xmm7, 1040(%rsp) movaps %xmm1, %xmm7 subsd %xmm1, %xmm5 movsd %xmm8, 1000(%rsp) movaps %xmm1, %xmm8 movq %rax, 128(%rsp) leaq _ZL2ce(%rip), %rax movsd %xmm9, 720(%rsp) subsd %xmm1, %xmm2 movsd %xmm10, 760(%rsp) movsd %xmm0, 880(%rsp) movsd %xmm0, 1120(%rsp) divsd %xmm2, %xmm3 movaps %xmm1, %xmm2 movsd %xmm4, 136(%rsp) movaps %xmm4, %xmm6 mulsd %xmm4, %xmm6 divsd %xmm5, %xmm2 movaps %xmm1, %xmm5 movsd %xmm3, 144(%rsp) divsd %xmm6, %xmm5 movaps %xmm4, %xmm6 addsd %xmm4, %xmm6 movsd %xmm2, 152(%rsp) divsd %xmm6, %xmm11 movaps %xmm3, %xmm6 mulsd %xmm3, %xmm6 movsd %xmm5, 160(%rsp) movaps %xmm5, %xmm12 divsd %xmm4, %xmm7 movaps %xmm1, %xmm4 movsd %xmm11, 168(%rsp) divsd %xmm6, %xmm4 movaps %xmm3, %xmm6 addsd %xmm3, %xmm6 movsd %xmm7, 176(%rsp) divsd %xmm6, %xmm14 movaps %xmm1, %xmm6 movsd %xmm4, 184(%rsp) divsd %xmm3, %xmm6 movaps %xmm2, %xmm3 mulsd %xmm2, %xmm3 movsd %xmm14, 192(%rsp) divsd %xmm3, %xmm8 movaps %xmm2, %xmm3 addsd %xmm2, %xmm3 movsd %xmm6, 200(%rsp) divsd %xmm2, %xmm1 movsd 24(%rsp), %xmm2 mulsd %xmm2, %xmm12 mulsd %xmm2, %xmm11 mulsd %xmm2, %xmm14 movsd %xmm8, 208(%rsp) divsd %xmm3, %xmm13 movaps %xmm8, %xmm3 mulsd %xmm2, %xmm3 movsd %xmm1, 224(%rsp) movsd %xmm13, 216(%rsp) mulsd %xmm2, %xmm13 movsd %xmm12, 232(%rsp) addsd %xmm12, %xmm12 movsd %xmm11, 240(%rsp) movaps %xmm4, %xmm11 movsd %xmm3, 264(%rsp) mulsd %xmm2, %xmm11 addsd %xmm3, %xmm3 mulsd .LC37(%rip), %xmm2 movsd %xmm14, 256(%rsp) movsd %xmm13, 272(%rsp) movsd %xmm3, 296(%rsp) movaps %xmm7, %xmm3 movsd %xmm12, 280(%rsp) mulsd %xmm0, %xmm3 movsd %xmm11, 248(%rsp) addsd %xmm11, %xmm11 movsd %xmm2, 304(%rsp) mulsd %xmm2, %xmm9 movsd %xmm2, 312(%rsp) mulsd %xmm2, %xmm10 mulsd .LC38(%rip), %xmm2 movsd %xmm11, 288(%rsp) movsd %xmm3, 344(%rsp) movsd %xmm8, 448(%rsp) movsd %xmm9, 328(%rsp) movsd .LC39(%rip), %xmm9 movsd %xmm10, 320(%rsp) movsd %xmm2, 336(%rsp) movaps %xmm6, %xmm2 movsd %xmm8, 456(%rsp) mulsd %xmm0, %xmm2 movsd %xmm8, 464(%rsp) mulsd %xmm1, %xmm0 mulsd %xmm9, %xmm5 mulsd %xmm9, %xmm4 movsd %xmm2, 352(%rsp) movsd %xmm0, 360(%rsp) movsd %xmm5, 368(%rsp) movsd %xmm5, 376(%rsp) movsd %xmm5, 384(%rsp) movsd %xmm5, 392(%rsp) movsd %xmm5, 400(%rsp) movsd %xmm4, 408(%rsp) movsd %xmm4, 416(%rsp) movsd %xmm4, 424(%rsp) movsd %xmm4, 432(%rsp) movsd %xmm4, 440(%rsp) movaps %xmm3, %xmm4 movsd %xmm8, 472(%rsp) movsd .LC40(%rip), %xmm9 movsd .LC41(%rip), %xmm5 movsd %xmm8, 480(%rsp) movaps %xmm3, %xmm8 mulsd %xmm9, %xmm4 movq %rax, 672(%rsp) mulsd %xmm7, %xmm4 movsd %xmm4, 488(%rsp) movaps %xmm7, %xmm4 mulsd %xmm3, %xmm4 movsd %xmm4, 496(%rsp) movaps %xmm3, %xmm4 mulsd %xmm5, %xmm4 mulsd %xmm7, %xmm4 movsd %xmm4, 504(%rsp) movsd .LC42(%rip), %xmm4 mulsd %xmm4, %xmm8 mulsd %xmm7, %xmm8 movsd %xmm8, 512(%rsp) movsd .LC43(%rip), %xmm8 mulsd %xmm8, %xmm3 mulsd %xmm7, %xmm3 movsd %xmm3, 520(%rsp) movaps %xmm2, %xmm3 mulsd %xmm9, %xmm3 mulsd %xmm0, %xmm9 mulsd %xmm6, %xmm3 mulsd %xmm1, %xmm9 movsd %xmm3, 528(%rsp) movaps %xmm6, %xmm3 movsd %xmm9, 568(%rsp) mulsd %xmm2, %xmm3 movsd %xmm3, 536(%rsp) movaps %xmm2, %xmm3 mulsd %xmm5, %xmm3 mulsd %xmm0, %xmm5 mulsd %xmm6, %xmm3 mulsd %xmm1, %xmm5 movsd %xmm3, 544(%rsp) movaps %xmm2, %xmm3 movsd %xmm5, 584(%rsp) mulsd %xmm8, %xmm2 mulsd %xmm4, %xmm3 mulsd %xmm0, %xmm4 mulsd %xmm6, %xmm2 mulsd %xmm6, %xmm3 mulsd %xmm1, %xmm4 movsd %xmm2, 560(%rsp) movaps %xmm1, %xmm2 movsd %xmm3, 552(%rsp) mulsd %xmm0, %xmm2 movsd %xmm4, 592(%rsp) mulsd %xmm8, %xmm0 movsd %xmm2, 576(%rsp) mulsd %xmm1, %xmm0 movsd %xmm0, 600(%rsp) call cudaMemcpyToSymbol@PLT movl $2088, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL2bt(%rip), %rax leaq 128(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2089, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5dnxm1(%rip), %rax leaq 136(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2090, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5dnym1(%rip), %rax leaq 144(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2091, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5dnzm1(%rip), %rax leaq 152(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2092, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL3tx1(%rip), %rax leaq 160(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2093, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL3tx2(%rip), %rax leaq 168(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2094, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL3tx3(%rip), %rax leaq 176(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2095, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL3ty1(%rip), %rax leaq 184(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2096, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL3ty2(%rip), %rax leaq 192(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2097, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 movl $1, %r8d xorl %ecx, %ecx movq %rbx, %rdi movl $8, %edx leaq _ZL3ty3(%rip), %rax leaq 200(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2098, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL3tz1(%rip), %rax leaq 208(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2099, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL3tz2(%rip), %rax leaq 216(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2100, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL3tz3(%rip), %rax leaq 224(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2101, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL4dtx1(%rip), %rax leaq 232(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2102, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5dttx2(%rip), %rax leaq 240(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2103, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL4dty1(%rip), %rax leaq 248(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2104, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5dtty2(%rip), %rax leaq 256(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2105, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL4dtz1(%rip), %rax leaq 264(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2106, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5dttz2(%rip), %rax leaq 272(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2107, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL7c2dttx1(%rip), %rax leaq 280(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2108, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 movl $1, %r8d xorl %ecx, %ecx movq %rbx, %rdi movl $8, %edx leaq _ZL7c2dtty1(%rip), %rax leaq 288(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2109, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL7c2dttz1(%rip), %rax leaq 296(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2110, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL2dt(%rip), %rax leaq 24(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2111, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dtdssp(%rip), %rax leaq 304(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2112, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5comz1(%rip), %rax leaq 312(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2113, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5comz4(%rip), %rax leaq 320(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2114, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5comz5(%rip), %rax leaq 328(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2115, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL5comz6(%rip), %rax leaq 336(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2116, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL7c3c4tx3(%rip), %rax leaq 344(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2117, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL7c3c4ty3(%rip), %rax leaq 352(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2118, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 movl $1, %r8d xorl %ecx, %ecx movq %rbx, %rdi movl $8, %edx leaq _ZL7c3c4tz3(%rip), %rax leaq 360(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2119, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dx1tx1(%rip), %rax leaq 368(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2120, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dx2tx1(%rip), %rax leaq 376(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2121, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dx3tx1(%rip), %rax leaq 384(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2122, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dx4tx1(%rip), %rax leaq 392(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2123, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dx5tx1(%rip), %rax leaq 400(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2124, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dy1ty1(%rip), %rax leaq 408(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2125, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dy2ty1(%rip), %rax leaq 416(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2126, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dy3ty1(%rip), %rax leaq 424(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2127, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dy4ty1(%rip), %rax leaq 432(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2128, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dy5ty1(%rip), %rax leaq 440(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2129, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 movl $1, %r8d xorl %ecx, %ecx movq %rbx, %rdi movl $8, %edx leaq _ZL6dz1tz1(%rip), %rax leaq 448(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2130, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dz2tz1(%rip), %rax leaq 456(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2131, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dz3tz1(%rip), %rax leaq 464(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2132, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dz4tz1(%rip), %rax leaq 472(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2133, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6dz5tz1(%rip), %rax leaq 480(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2134, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6xxcon1(%rip), %rax leaq 488(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2135, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6xxcon2(%rip), %rax leaq 496(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2136, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6xxcon3(%rip), %rax leaq 504(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2137, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6xxcon4(%rip), %rax leaq 512(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2138, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6xxcon5(%rip), %rax leaq 520(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2139, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6yycon1(%rip), %rax leaq 528(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2140, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 movl $1, %r8d xorl %ecx, %ecx movq %rbx, %rdi movl $8, %edx leaq _ZL6yycon2(%rip), %rax leaq 536(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2141, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6yycon3(%rip), %rax leaq 544(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2142, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6yycon4(%rip), %rax leaq 552(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2143, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6yycon5(%rip), %rax leaq 560(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2144, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6zzcon1(%rip), %rax leaq 568(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2145, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6zzcon2(%rip), %rax leaq 576(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2146, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6zzcon3(%rip), %rax leaq 584(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2147, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %ecx, %ecx movl $1, %r8d movq %rbx, %rdi movl $8, %edx leaq _ZL6zzcon4(%rip), %rax leaq 592(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2148, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 movl $1, %r8d xorl %ecx, %ecx movq %rbx, %rdi movl $8, %edx leaq _ZL6zzcon5(%rip), %rax leaq 600(%rsp), %rsi movq %rax, 672(%rsp) call cudaMemcpyToSymbol@PLT movl $2149, %esi movl %eax, %edi call _ZL11HandleError9cudaErrorPKci.constprop.0 xorl %esi, %esi leaq 656(%rsp), %rdi call gettimeofday@PLT movl 12(%rsp), %ecx movl 8(%rsp), %edx movl 4(%rsp), %esi movq 40(%rsp), %rdi call _Z9exact_rhsPdiii movl 12(%rsp), %eax xorl %r9d, %r9d xorl %r8d, %r8d movl $1, 620(%rsp) movl $1, %esi movl %eax, 612(%rsp) movl 8(%rsp), %eax movl %eax, 616(%rsp) movl 4(%rsp), %eax movq 612(%rsp), %rdi movl %eax, 672(%rsp) movabsq $4294967297, %rax movq %rax, 676(%rsp) movl 680(%rsp), %ecx movq 672(%rsp), %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L129 movl 12(%rsp), %ecx movl 8(%rsp), %edx movl 4(%rsp), %esi movq 32(%rsp), %rdi call _ZL40__device_stub__Z17initialize_kernelPdiiiPdiii .L129: pushq %rdx .cfi_def_cfa_offset 1256 movl $1, %edi pushq 128(%rsp) .cfi_def_cfa_offset 1264 pushq 48(%rsp) .cfi_def_cfa_offset 1272 pushq 64(%rsp) .cfi_def_cfa_offset 1280 pushq 144(%rsp) .cfi_def_cfa_offset 1288 pushq 88(%rsp) .cfi_def_cfa_offset 1296 pushq 152(%rsp) .cfi_def_cfa_offset 1304 pushq 144(%rsp) .cfi_def_cfa_offset 1312 pushq 160(%rsp) .cfi_def_cfa_offset 1320 pushq 152(%rsp) .cfi_def_cfa_offset 1328 pushq 152(%rsp) .cfi_def_cfa_offset 1336 pushq 152(%rsp) .cfi_def_cfa_offset 1344 movq 152(%rsp), %r9 movl 96(%rsp), %r8d movl 108(%rsp), %ecx movl 104(%rsp), %edx movl 100(%rsp), %esi call _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ movl 100(%rsp), %eax xorl %r9d, %r9d xorl %r8d, %r8d movl %eax, 768(%rsp) movabsq $4294967297, %rax movq %rax, 772(%rsp) movl 776(%rsp), %ecx addq $96, %rsp .cfi_def_cfa_offset 1248 movq 672(%rsp), %rdx movq 612(%rsp), %rdi movl 620(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L130 movl 12(%rsp), %ecx movl 8(%rsp), %edx movl 4(%rsp), %esi movq 32(%rsp), %rdi call _ZL40__device_stub__Z17initialize_kernelPdiiiPdiii .L130: pushq %rax .cfi_def_cfa_offset 1256 xorl %edi, %edi leaq _ZSt4cout(%rip), %rbx pushq 128(%rsp) .cfi_def_cfa_offset 1264 pushq 48(%rsp) .cfi_def_cfa_offset 1272 pushq 64(%rsp) .cfi_def_cfa_offset 1280 pushq 144(%rsp) .cfi_def_cfa_offset 1288 pushq 88(%rsp) .cfi_def_cfa_offset 1296 pushq 152(%rsp) .cfi_def_cfa_offset 1304 pushq 144(%rsp) .cfi_def_cfa_offset 1312 pushq 160(%rsp) .cfi_def_cfa_offset 1320 pushq 152(%rsp) .cfi_def_cfa_offset 1328 pushq 152(%rsp) .cfi_def_cfa_offset 1336 pushq 152(%rsp) .cfi_def_cfa_offset 1344 movq 152(%rsp), %r9 movl 96(%rsp), %r8d movl 108(%rsp), %ecx movl 104(%rsp), %edx movl 100(%rsp), %esi call _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ addq $96, %rsp .cfi_def_cfa_offset 1248 xorl %esi, %esi leaq 672(%rsp), %rdi call gettimeofday@PLT xorl %esi, %esi leaq 640(%rsp), %rdi call gettimeofday@PLT leaq .LC44(%rip), %rsi movq %rbx, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq 648(%rsp), %rax subq 632(%rsp), %rax cvtsi2sdq %rax, %xmm0 movq 640(%rsp), %rax mulsd .LC45(%rip), %xmm0 subq 624(%rsp), %rax cvtsi2sdq %rax, %xmm1 addsd %xmm1, %xmm0 call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT leaq .LC46(%rip), %rsi movq %rbx, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq 680(%rsp), %rax subq 664(%rsp), %rax cvtsi2sdq %rax, %xmm0 movq 672(%rsp), %rax mulsd .LC45(%rip), %xmm0 subq 656(%rsp), %rax cvtsi2sdq %rax, %xmm1 addsd %xmm1, %xmm0 call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movq 1208(%rsp), %rax subq %fs:40, %rax je .L131 call __stack_chk_fail@PLT .L131: addq $1216, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3640: .size main, .-main .section .rodata.str1.1 .LC47: .string "_Z10add_kernelPdS_iii" .LC48: .string "_Z14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii" .LC49: .string "_Z14y_solve_kernelPdS_S_S_S_S_iii" .LC50: .string "_Z14x_solve_kernelPdS_S_S_S_S_iii" .LC51: .string "_Z13txinvr_kernelPdS_S_S_S_S_S_iii" .LC52: .string "_Z20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii" .LC53: .string "_Z20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii" .LC54: .string "_Z17initialize_kernelPdiii" .LC55: .string "_Z18exact_rhs_kernel_zPdiii" .LC56: .string "_Z18exact_rhs_kernel_yPdiii" .LC57: .string "_Z18exact_rhs_kernel_xPdiii" .LC58: .string "_Z21exact_rhs_kernel_initPdiii" .LC59: .string "tx1" .LC60: .string "tx2" .LC61: .string "tx3" .LC62: .string "ty1" .LC63: .string "ty2" .LC64: .string "ty3" .LC65: .string "tz1" .LC66: .string "tz2" .LC67: .string "tz3" .LC68: .string "bt" .LC69: .string "dt" .LC70: .string "dtdssp" .LC71: .string "dnxm1" .LC72: .string "dnym1" .LC73: .string "dnzm1" .LC74: .string "dtx1" .LC75: .string "dttx2" .LC76: .string "dty1" .LC77: .string "dtty2" .LC78: .string "dtz1" .LC79: .string "dttz2" .LC80: .string "c2dttx1" .LC81: .string "c2dtty1" .LC82: .string "c2dttz1" .LC83: .string "comz1" .LC84: .string "comz4" .LC85: .string "comz5" .LC86: .string "comz6" .LC87: .string "c3c4tx3" .LC88: .string "c3c4ty3" .LC89: .string "c3c4tz3" .LC90: .string "xxcon1" .LC91: .string "xxcon2" .LC92: .string "xxcon3" .LC93: .string "xxcon4" .LC94: .string "xxcon5" .LC95: .string "dx1tx1" .LC96: .string "dx2tx1" .LC97: .string "dx3tx1" .LC98: .string "dx4tx1" .LC99: .string "dx5tx1" .LC100: .string "yycon1" .LC101: .string "yycon2" .LC102: .string "yycon3" .LC103: .string "yycon4" .LC104: .string "yycon5" .LC105: .string "dy1ty1" .LC106: .string "dy2ty1" .LC107: .string "dy3ty1" .LC108: .string "dy4ty1" .LC109: .string "dy5ty1" .LC110: .string "zzcon1" .LC111: .string "zzcon2" .LC112: .string "zzcon3" .LC113: .string "zzcon4" .LC114: .string "zzcon5" .LC115: .string "dz1tz1" .LC116: .string "dz2tz1" .LC117: .string "dz3tz1" .LC118: .string "dz4tz1" .LC119: .string "dz5tz1" .LC120: .string "ce" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3690: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC47(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _ZL10add_kernelPdS_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC48(%rip), %rdx movq %rbx, %rdi leaq _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC49(%rip), %rdx movq %rbx, %rdi leaq _ZL14y_solve_kernelPdS_S_S_S_S_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC50(%rip), %rdx movq %rbx, %rdi leaq _ZL14x_solve_kernelPdS_S_S_S_S_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC51(%rip), %rdx movq %rbx, %rdi leaq _ZL13txinvr_kernelPdS_S_S_S_S_S_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC52(%rip), %rdx movq %rbx, %rdi leaq _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC53(%rip), %rdx movq %rbx, %rdi leaq _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC54(%rip), %rdx movq %rbx, %rdi leaq _ZL17initialize_kernelPdiii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi leaq .LC55(%rip), %rdx pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 32 leaq _ZL18exact_rhs_kernel_zPdiii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC56(%rip), %rdx movq %rbx, %rdi leaq _ZL18exact_rhs_kernel_yPdiii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC57(%rip), %rdx movq %rbx, %rdi leaq _ZL18exact_rhs_kernel_xPdiii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC58(%rip), %rdx movq %rbx, %rdi leaq _ZL21exact_rhs_kernel_initPdiii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r8d, %r8d movq %rbx, %rdi pushq $0 .cfi_def_cfa_offset 24 leaq .LC59(%rip), %rdx movl $8, %r9d leaq _ZL3tx1(%rip), %rsi pushq $1 .cfi_def_cfa_offset 32 movq %rdx, %rcx call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC60(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL3tx2(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC61(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL3tx3(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC62(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL3ty1(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC63(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL3ty2(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC64(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL3ty3(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC65(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL3tz1(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC66(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL3tz2(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC67(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL3tz3(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC68(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL2bt(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC69(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL2dt(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC70(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dtdssp(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC71(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5dnxm1(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC72(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5dnym1(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC73(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5dnzm1(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC74(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL4dtx1(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC75(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5dttx2(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC76(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL4dty1(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC77(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5dtty2(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC78(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL4dtz1(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC79(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5dttz2(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC80(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL7c2dttx1(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC81(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL7c2dtty1(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC82(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL7c2dttz1(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC83(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5comz1(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC84(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5comz4(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC85(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5comz5(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC86(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL5comz6(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC87(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL7c3c4tx3(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC88(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL7c3c4ty3(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC89(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL7c3c4tz3(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC90(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6xxcon1(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC91(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6xxcon2(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC92(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6xxcon3(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC93(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6xxcon4(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC94(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6xxcon5(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC95(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dx1tx1(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC96(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dx2tx1(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC97(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dx3tx1(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC98(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL6dx4tx1(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC99(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dx5tx1(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC100(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6yycon1(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC101(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6yycon2(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC102(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6yycon3(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC103(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6yycon4(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC104(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6yycon5(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC105(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dy1ty1(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC106(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dy2ty1(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC107(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dy3ty1(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC108(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dy4ty1(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC109(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6dy5ty1(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC110(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6zzcon1(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC111(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6zzcon2(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC112(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6zzcon3(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC113(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL6zzcon4(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC114(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL6zzcon5(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC115(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL6dz1tz1(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC116(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL6dz2tz1(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC117(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL6dz3tz1(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC118(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL6dz4tz1(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC119(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $8, %r9d leaq _ZL6dz5tz1(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $1 .cfi_def_cfa_offset 32 leaq .LC120(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $520, %r9d leaq _ZL2ce(%rip), %rsi call __cudaRegisterVar@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3690: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .local _ZL2ce .comm _ZL2ce,520,32 .local _ZL6dz5tz1 .comm _ZL6dz5tz1,8,8 .local _ZL6dz4tz1 .comm _ZL6dz4tz1,8,8 .local _ZL6dz3tz1 .comm _ZL6dz3tz1,8,8 .local _ZL6dz2tz1 .comm _ZL6dz2tz1,8,8 .local _ZL6dz1tz1 .comm _ZL6dz1tz1,8,8 .local _ZL6zzcon5 .comm _ZL6zzcon5,8,8 .local _ZL6zzcon4 .comm _ZL6zzcon4,8,8 .local _ZL6zzcon3 .comm _ZL6zzcon3,8,8 .local _ZL6zzcon2 .comm _ZL6zzcon2,8,8 .local _ZL6zzcon1 .comm _ZL6zzcon1,8,8 .local _ZL6dy5ty1 .comm _ZL6dy5ty1,8,8 .local _ZL6dy4ty1 .comm _ZL6dy4ty1,8,8 .local _ZL6dy3ty1 .comm _ZL6dy3ty1,8,8 .local _ZL6dy2ty1 .comm _ZL6dy2ty1,8,8 .local _ZL6dy1ty1 .comm _ZL6dy1ty1,8,8 .local _ZL6yycon5 .comm _ZL6yycon5,8,8 .local _ZL6yycon4 .comm _ZL6yycon4,8,8 .local _ZL6yycon3 .comm _ZL6yycon3,8,8 .local _ZL6yycon2 .comm _ZL6yycon2,8,8 .local _ZL6yycon1 .comm _ZL6yycon1,8,8 .local _ZL6dx5tx1 .comm _ZL6dx5tx1,8,8 .local _ZL6dx4tx1 .comm _ZL6dx4tx1,8,8 .local _ZL6dx3tx1 .comm _ZL6dx3tx1,8,8 .local _ZL6dx2tx1 .comm _ZL6dx2tx1,8,8 .local _ZL6dx1tx1 .comm _ZL6dx1tx1,8,8 .local _ZL6xxcon5 .comm _ZL6xxcon5,8,8 .local _ZL6xxcon4 .comm _ZL6xxcon4,8,8 .local _ZL6xxcon3 .comm _ZL6xxcon3,8,8 .local _ZL6xxcon2 .comm _ZL6xxcon2,8,8 .local _ZL6xxcon1 .comm _ZL6xxcon1,8,8 .local _ZL7c3c4tz3 .comm _ZL7c3c4tz3,8,8 .local _ZL7c3c4ty3 .comm _ZL7c3c4ty3,8,8 .local _ZL7c3c4tx3 .comm _ZL7c3c4tx3,8,8 .local _ZL5comz6 .comm _ZL5comz6,8,8 .local _ZL5comz5 .comm _ZL5comz5,8,8 .local _ZL5comz4 .comm _ZL5comz4,8,8 .local _ZL5comz1 .comm _ZL5comz1,8,8 .local _ZL7c2dttz1 .comm _ZL7c2dttz1,8,8 .local _ZL7c2dtty1 .comm _ZL7c2dtty1,8,8 .local _ZL7c2dttx1 .comm _ZL7c2dttx1,8,8 .local _ZL5dttz2 .comm _ZL5dttz2,8,8 .local _ZL4dtz1 .comm _ZL4dtz1,8,8 .local _ZL5dtty2 .comm _ZL5dtty2,8,8 .local _ZL4dty1 .comm _ZL4dty1,8,8 .local _ZL5dttx2 .comm _ZL5dttx2,8,8 .local _ZL4dtx1 .comm _ZL4dtx1,8,8 .local _ZL5dnzm1 .comm _ZL5dnzm1,8,8 .local _ZL5dnym1 .comm _ZL5dnym1,8,8 .local _ZL5dnxm1 .comm _ZL5dnxm1,8,8 .local _ZL6dtdssp .comm _ZL6dtdssp,8,8 .local _ZL2dt .comm _ZL2dt,8,8 .local _ZL2bt .comm _ZL2bt,8,8 .local _ZL3tz3 .comm _ZL3tz3,8,8 .local _ZL3tz2 .comm _ZL3tz2,8,8 .local _ZL3tz1 .comm _ZL3tz1,8,8 .local _ZL3ty3 .comm _ZL3ty3,8,8 .local _ZL3ty2 .comm _ZL3ty2,8,8 .local _ZL3ty1 .comm _ZL3ty1,8,8 .local _ZL3tx3 .comm _ZL3tx3,8,8 .local _ZL3tx2 .comm _ZL3tx2,8,8 .local _ZL3tx1 .comm _ZL3tx1,8,8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC3: .long -343597384 .long 1066317905 .align 8 .LC4: .long -1133871366 .long 1062769524 .align 8 .LC5: .long -755914244 .long 1062232653 .align 8 .LC6: .long 189665756 .long 1061549150 .align 8 .LC7: .long 810889825 .long 1060350250 .align 8 .LC8: .long -350469331 .long 1058682594 .align 8 .LC20: .long 0 .long 1073741824 .align 8 .LC22: .long 0 .long 1074790400 .align 8 .LC23: .long 0 .long 1075052544 .align 8 .LC24: .long 0 .long 1074266112 .align 8 .LC25: .long 0 .long 1071644672 .align 8 .LC26: .long 1202590843 .long 1066695393 .align 8 .LC27: .long 1202590843 .long 1065646817 .align 8 .LC28: .long -343597384 .long 1067366481 .align 8 .LC29: .long -1717986918 .long 1071225241 .align 8 .LC30: .long 858993459 .long 1070805811 .align 8 .LC31: .long 0 .long 1072693248 .align 8 .LC32: .long 1202590843 .long 1067743969 .align 8 .LC33: .long -1717986918 .long 1068079513 .align 8 .LC34: .long -1717986918 .long 1070176665 .align 8 .LC35: .long -1717986918 .long 1069128089 .align 8 .LC36: .long 1719614413 .long 1072079006 .align 8 .LC37: .long 0 .long 1070596096 .align 8 .LC38: .long 0 .long 1075314688 .align 8 .LC39: .long 0 .long 1072168960 .align 8 .LC40: .long 1431655765 .long 1073042773 .align 8 .LC41: .long -343597386 .long -1074874287 .align 8 .LC42: .long 1431655765 .long 1069897045 .align 8 .LC43: .long -171798693 .long 1073699880 .align 8 .LC45: .long -1598689907 .long 1051772663 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10add_kernelPdS_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e220000002600 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e680000002500 */ /*0040*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000ea80000002100 */ /*0050*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */ /* 0x000ee20000002200 */ /*0060*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x001fe40007ffe0ff */ /*0070*/ IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103037810 */ /* 0x002fca0007ffe0ff */ /*0080*/ IMAD R2, R0, c[0x0][0x174], R3 ; /* 0x00005d0000027a24 */ /* 0x000fe400078e0203 */ /*0090*/ IMAD R0, R7, c[0x0][0x178], R0 ; /* 0x00005e0007007a24 */ /* 0x008fe400078e0200 */ /*00a0*/ IMAD R2, R2, c[0x0][0x170], R5 ; /* 0x00005c0002027a24 */ /* 0x004fe400078e0205 */ /*00b0*/ IMAD R0, R0, c[0x0][0x174], R3 ; /* 0x00005d0000007a24 */ /* 0x000fe200078e0203 */ /*00c0*/ MOV R3, 0x8 ; /* 0x0000000800037802 */ /* 0x000fe40000000f00 */ /*00d0*/ IADD3 R2, R2, 0x1, RZ ; /* 0x0000000102027810 */ /* 0x000fe20007ffe0ff */ /*00e0*/ IMAD R0, R0, c[0x0][0x170], R5 ; /* 0x00005c0000007a24 */ /* 0x000fc800078e0205 */ /*00f0*/ IMAD R2, R2, 0x5, R7 ; /* 0x0000000502027824 */ /* 0x000fe400078e0207 */ /*0100*/ IMAD.WIDE R4, R0, R3, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x000fc800078e0203 */ /*0110*/ IMAD.WIDE R2, R2, R3, c[0x0][0x168] ; /* 0x00005a0002027625 */ /* 0x000fe200078e0203 */ /*0120*/ LDG.E.64 R6, [R4.64+0x8] ; /* 0x0000080404067981 */ /* 0x000eaa000c1e1b00 */ /*0130*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea4000c1e1b00 */ /*0140*/ DADD R6, R2, R6 ; /* 0x0000000002067229 */ /* 0x004e0e0000000006 */ /*0150*/ STG.E.64 [R4.64+0x8], R6 ; /* 0x0000080604007986 */ /* 0x001fe2000c101b04 */ /*0160*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0170*/ BRA 0x170; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e220000002500 */ /*0020*/ UMOV UR5, 0x1 ; /* 0x0000000100057882 */ /* 0x000fe40000000000 */ /*0030*/ ULDC.64 UR6, c[0x0][0x1b0] ; /* 0x00006c0000067ab9 */ /* 0x000fe20000000a00 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e220000002100 */ /*0050*/ UIADD3 UR4, -UR5, UR7, URZ ; /* 0x0000000705047290 */ /* 0x000fe4000fffe13f */ /*0060*/ UIADD3 UR5, -UR5, UR6, URZ ; /* 0x0000000605057290 */ /* 0x000fe2000fffe13f */ /*0070*/ S2R R70, SR_CTAID.Y ; /* 0x0000000000467919 */ /* 0x000e680000002600 */ /*0080*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e620000002200 */ /*0090*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */ /* 0x001fca00078e0203 */ /*00a0*/ IADD3 R7, R2, 0x1, RZ ; /* 0x0000000102077810 */ /* 0x000fe20007ffe0ff */ /*00b0*/ IMAD R70, R70, c[0x0][0x4], R5 ; /* 0x0000010046467a24 */ /* 0x002fc600078e0205 */ /*00c0*/ ISETP.GE.AND P0, PT, R7, UR4, PT ; /* 0x0000000407007c0c */ /* 0x000fe4000bf06270 */ /*00d0*/ IADD3 R13, R70, 0x1, RZ ; /* 0x00000001460d7810 */ /* 0x000fc80007ffe0ff */ /*00e0*/ ISETP.GE.OR P0, PT, R13, UR5, P0 ; /* 0x000000050d007c0c */ /* 0x000fda0008706670 */ /*00f0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0100*/ IMAD.MOV.U32 R73, RZ, RZ, 0x2 ; /* 0x00000002ff497424 */ /* 0x000fe200078e00ff */ /*0110*/ MOV R0, c[0x0][0x1b8] ; /* 0x00006e0000007a02 */ /* 0x000fe20000000f00 */ /*0120*/ IMAD.MOV.U32 R66, RZ, RZ, 0x8 ; /* 0x00000008ff427424 */ /* 0x000fe200078e00ff */ /*0130*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fe20000000a00 */ /*0140*/ IMAD R4, R7, c[0x0][0x1b0], RZ ; /* 0x00006c0007047a24 */ /* 0x000fe200078e02ff */ /*0150*/ IADD3 R39, -R73.reuse, c[0x0][0x1b4], RZ ; /* 0x00006d0049277a10 */ /* 0x040fe20007ffe1ff */ /*0160*/ IMAD.SHL.U32 R8, R0, 0x4, RZ ; /* 0x0000000400087824 */ /* 0x000fe200078e00ff */ /*0170*/ IADD3 R73, -R73, c[0x0][0x1b0], RZ ; /* 0x00006c0049497a10 */ /* 0x000fe20007ffe1ff */ /*0180*/ IMAD.MOV.U32 R10, RZ, RZ, 0x0 ; /* 0x00000000ff0a7424 */ /* 0x000fe200078e00ff */ /*0190*/ IADD3 R63, R13, R4.reuse, RZ ; /* 0x000000040d3f7210 */ /* 0x080fe20007ffe0ff */ /*01a0*/ IMAD R6, R8, R39, R2 ; /* 0x0000002708067224 */ /* 0x000fe200078e0202 */ /*01b0*/ IADD3 R37, R70, R4, RZ ; /* 0x0000000446257210 */ /* 0x000fe20007ffe0ff */ /*01c0*/ IMAD R38, R39, c[0x0][0x1b8], RZ ; /* 0x00006e0027267a24 */ /* 0x000fc400078e02ff */ /*01d0*/ IMAD R15, R73.reuse, R6, R70 ; /* 0x00000006490f7224 */ /* 0x040fe400078e0246 */ /*01e0*/ IMAD R3, R73, R38, RZ ; /* 0x0000002649037224 */ /* 0x000fe400078e02ff */ /*01f0*/ IMAD.WIDE R14, R15, R66, c[0x0][0x1a0] ; /* 0x000068000f0e7625 */ /* 0x000fc800078e0242 */ /*0200*/ IMAD.MOV.U32 R41, RZ, RZ, c[0x0][0x1b4] ; /* 0x00006d00ff297624 */ /* 0x000fe200078e00ff */ /*0210*/ STG.E.64 [R14.64], RZ ; /* 0x000000ff0e007986 */ /* 0x000fe2000c101b08 */ /*0220*/ IMAD.WIDE R16, R3, 0x8, R14 ; /* 0x0000000803107825 */ /* 0x000fc800078e020e */ /*0230*/ IMAD.WIDE R26, R63, R66, c[0x0][0x160] ; /* 0x000058003f1a7625 */ /* 0x000fe200078e0242 */ /*0240*/ STG.E.64 [R16.64], RZ ; /* 0x000000ff10007986 */ /* 0x0001e6000c101b08 */ /*0250*/ IMAD.WIDE R18, R3, 0x8, R16 ; /* 0x0000000803127825 */ /* 0x000fc800078e0210 */ /*0260*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff0b7424 */ /* 0x000fe400078e00ff */ /*0270*/ IMAD.WIDE R20, R3, 0x8, R18 ; /* 0x0000000803147825 */ /* 0x000fc600078e0212 */ /*0280*/ STG.E.64 [R18.64], R10 ; /* 0x0000000a12007986 */ /* 0x0003e2000c101b08 */ /*0290*/ IMAD R5, R41, c[0x0][0x1b0], RZ ; /* 0x00006c0029057a24 */ /* 0x000fe400078e02ff */ /*02a0*/ IMAD.WIDE R22, R3, 0x8, R20 ; /* 0x0000000803167825 */ /* 0x000fe200078e0214 */ /*02b0*/ STG.E.64 [R20.64], RZ ; /* 0x000000ff14007986 */ /* 0x0005e6000c101b08 */ /*02c0*/ IMAD.WIDE R24, R37, R66, c[0x0][0x160] ; /* 0x0000580025187625 */ /* 0x000fe200078e0242 */ /*02d0*/ STG.E.64 [R22.64], RZ ; /* 0x000000ff16007986 */ /* 0x0007e6000c101b08 */ /*02e0*/ IMAD.WIDE R26, R5.reuse, 0x8, R26 ; /* 0x00000008051a7825 */ /* 0x040fe200078e021a */ /*02f0*/ LDG.E.64 R28, [R24.64+0x8] ; /* 0x00000808181c7981 */ /* 0x0008aa000c1e1b00 */ /*0300*/ IMAD.WIDE R16, R5, 0x8, R26 ; /* 0x0000000805107825 */ /* 0x001fca00078e021a */ /*0310*/ LDG.E.64 R30, [R16.64] ; /* 0x00000008101e7981 */ /* 0x0000e2000c1e1b00 */ /*0320*/ IMAD.WIDE R26, R5, 0x8, R24 ; /* 0x00000008051a7825 */ /* 0x000fcc00078e0218 */ /*0330*/ LDG.E.64 R26, [R26.64+0x8] ; /* 0x000008081a1a7981 */ /* 0x000ee2000c1e1b00 */ /*0340*/ IMAD.WIDE R14, R63, R66, c[0x0][0x178] ; /* 0x00005e003f0e7625 */ /* 0x000fc800078e0242 */ /*0350*/ IMAD.WIDE R18, R37, R66, c[0x0][0x178] ; /* 0x00005e0025127625 */ /* 0x002fc800078e0242 */ /*0360*/ IMAD.WIDE R14, R5.reuse, 0x8, R14 ; /* 0x00000008050e7825 */ /* 0x040fe200078e020e */ /*0370*/ LDG.E.64 R24, [R18.64+0x8] ; /* 0x0000080812187981 */ /* 0x01032a000c1e1b00 */ /*0380*/ IMAD.WIDE R60, R5, 0x8, R14 ; /* 0x00000008053c7825 */ /* 0x000fcc00078e020e */ /*0390*/ LDG.E.64 R60, [R60.64] ; /* 0x000000083c3c7981 */ /* 0x000f22000c1e1b00 */ /*03a0*/ IMAD.IADD R6, R39, 0x1, R6 ; /* 0x0000000127067824 */ /* 0x000fe200078e0206 */ /*03b0*/ MOV R9, 0x7 ; /* 0x0000000700097802 */ /* 0x000fe20000000f00 */ /*03c0*/ IMAD.WIDE R18, R5, 0x8, R18 ; /* 0x0000000805127825 */ /* 0x002fe200078e0212 */ /*03d0*/ DADD R84, RZ, c[0x3][0xc0] ; /* 0x00c03000ff547629 */ /* 0x000fc80000000000 */ /*03e0*/ LDG.E.64 R80, [R18.64+0x8] ; /* 0x0000080812507981 */ /* 0x000362000c1e1b00 */ /*03f0*/ DMUL R28, R28, c[0x2][0x0] ; /* 0x008000001c1c7a28 */ /* 0x004e8c0000000000 */ /*0400*/ DFMA R14, R28, c[0x2][0x8], R10 ; /* 0x008002001c0e7a2b */ /* 0x004fc8000000000a */ /*0410*/ DFMA R16, R28, c[0x2][0x10], R10 ; /* 0x008004001c107a2b */ /* 0x001e08000000000a */ /*0420*/ DMUL R30, R30, c[0x2][0x0] ; /* 0x008000001e1e7a28 */ /* 0x008e880000000000 */ /*0430*/ DSETP.GT.AND P0, PT, R14, R16, PT ; /* 0x000000100e00722a */ /* 0x001e080003f04000 */ /*0440*/ DFMA R20, R30.reuse, c[0x2][0x8], R10.reuse ; /* 0x008002001e147a2b */ /* 0x144fe4000000000a */ /*0450*/ FSEL R32, R14, R16, P0 ; /* 0x000000100e207208 */ /* 0x001fe40000000000 */ /*0460*/ DFMA R22, R30, c[0x2][0x10], R10 ; /* 0x008004001e167a2b */ /* 0x000e22000000000a */ /*0470*/ FSEL R33, R15, R17, P0 ; /* 0x000000110f217208 */ /* 0x000fc60000000000 */ /*0480*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x000e880000000000 */ /*0490*/ DSETP.GT.AND P0, PT, R20, R22, PT ; /* 0x000000161400722a */ /* 0x001e080003f04000 */ /*04a0*/ DFMA R14, R26.reuse, c[0x2][0x8], R10.reuse ; /* 0x008002001a0e7a2b */ /* 0x144fe4000000000a */ /*04b0*/ FSEL R20, R20, R22, P0 ; /* 0x0000001614147208 */ /* 0x001fe40000000000 */ /*04c0*/ DFMA R16, R26, c[0x2][0x10], R10 ; /* 0x008004001a107a2b */ /* 0x000e22000000000a */ /*04d0*/ FSEL R21, R21, R23, P0 ; /* 0x0000001715157208 */ /* 0x000fc60000000000 */ /*04e0*/ DADD R30, R30, 1 ; /* 0x3ff000001e1e7429 */ /* 0x000e880000000000 */ /*04f0*/ DADD R28, R28, 1 ; /* 0x3ff000001c1c7429 */ /* 0x000fc80000000000 */ /*0500*/ DSETP.GT.AND P0, PT, R14, R16, PT ; /* 0x000000100e00722a */ /* 0x001e080003f04000 */ /*0510*/ DSETP.GEU.AND P2, PT, R20, R30, PT ; /* 0x0000001e1400722a */ /* 0x004ea40003f4e000 */ /*0520*/ FSEL R14, R14, R16, P0 ; /* 0x000000100e0e7208 */ /* 0x001fe40000000000 */ /*0530*/ DSETP.GEU.AND P1, PT, R32, R28, PT ; /* 0x0000001c2000722a */ /* 0x000e220003f2e000 */ /*0540*/ FSEL R15, R15, R17, P0 ; /* 0x000000110f0f7208 */ /* 0x000fe40000000000 */ /*0550*/ FSEL R16, R30, R20, !P2 ; /* 0x000000141e107208 */ /* 0x004fe20005000000 */ /*0560*/ DADD R26, R26, 1 ; /* 0x3ff000001a1a7429 */ /* 0x000ea20000000000 */ /*0570*/ FSEL R17, R31, R21, !P2 ; /* 0x000000151f117208 */ /* 0x000fe40005000000 */ /*0580*/ FSEL R22, R28, R32, !P1 ; /* 0x000000201c167208 */ /* 0x001fc40004800000 */ /*0590*/ FSEL R23, R29, R33, !P1 ; /* 0x000000211d177208 */ /* 0x000fe20004800000 */ /*05a0*/ DSETP.GEU.AND P1, PT, R14, R26, PT ; /* 0x0000001a0e00722a */ /* 0x004e080003f2e000 */ /*05b0*/ DSETP.GEU.AND P2, PT, R16, 1, PT ; /* 0x3ff000001000742a */ /* 0x000ea40003f4e000 */ /*05c0*/ FSEL R14, R26, R14, !P1 ; /* 0x0000000e1a0e7208 */ /* 0x001fe40004800000 */ /*05d0*/ DSETP.GEU.AND P0, PT, R22, 1, PT ; /* 0x3ff000001600742a */ /* 0x000e220003f0e000 */ /*05e0*/ FSEL R15, R27, R15, !P1 ; /* 0x0000000f1b0f7208 */ /* 0x000fe40004800000 */ /*05f0*/ FSEL R79, R17, 1.875, P2 ; /* 0x3ff00000114f7808 */ /* 0x004fe20001000000 */ /*0600*/ IMAD R17, R73, R6, R70 ; /* 0x0000000649117224 */ /* 0x000fe200078e0246 */ /*0610*/ FSEL R78, R16, RZ, P2 ; /* 0x000000ff104e7208 */ /* 0x000fe20001000000 */ /*0620*/ IMAD R6, R0, R9, c[0x0][0x1b8] ; /* 0x00006e0000067624 */ /* 0x000fe200078e0209 */ /*0630*/ FSEL R28, R22, RZ, P0 ; /* 0x000000ff161c7208 */ /* 0x001fe20000000000 */ /*0640*/ IMAD.WIDE R16, R17, R66, c[0x0][0x1a0] ; /* 0x0000680011107625 */ /* 0x000fe200078e0242 */ /*0650*/ FSEL R29, R23, 1.875, P0 ; /* 0x3ff00000171d7808 */ /* 0x000fe20000000000 */ /*0660*/ DSETP.GEU.AND P0, PT, R14, 1, PT ; /* 0x3ff000000e00742a */ /* 0x000e220003f0e000 */ /*0670*/ IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106067810 */ /* 0x000fc60007ffe0ff */ /*0680*/ IMAD.WIDE R22, R3, 0x8, R16 ; /* 0x0000000803167825 */ /* 0x000fe200078e0210 */ /*0690*/ DMUL R28, R28, c[0x3][0x98] ; /* 0x00c026001c1c7a28 */ /* 0x000f220000000000 */ /*06a0*/ FSEL R82, R14, RZ, P0 ; /* 0x000000ff0e527208 */ /* 0x001fe40000000000 */ /*06b0*/ FSEL R83, R15, 1.875, P0 ; /* 0x3ff000000f537808 */ /* 0x000fe20000000000 */ /*06c0*/ DMUL R14, R78, c[0x3][0x98] ; /* 0x00c026004e0e7a28 */ /* 0x000e220000000000 */ /*06d0*/ IMAD R21, R63, 0x5, RZ ; /* 0x000000053f157824 */ /* 0x000fe400078e02ff */ /*06e0*/ IMAD R6, R39, R6, R2 ; /* 0x0000000627067224 */ /* 0x000fe200078e0202 */ /*06f0*/ DFMA R28, -R24, c[0x3][0xa0], -R28 ; /* 0x00c02800181c7a2b */ /* 0x010fe2000000091c */ /*0700*/ IMAD.WIDE R42, R3, 0x8, R22 ; /* 0x00000008032a7825 */ /* 0x000fc600078e0216 */ /*0710*/ DFMA R10, R82, c[0x3][0xb8], R10 ; /* 0x00c02e00520a7a2b */ /* 0x000e88000000000a */ /*0720*/ DFMA R14, R60, c[0x3][0xa0], -R14 ; /* 0x00c028003c0e7a2b */ /* 0x001e22000000080e */ /*0730*/ IMAD.WIDE R20, R21, R66, c[0x0][0x198] ; /* 0x0000660015147625 */ /* 0x000fc600078e0242 */ /*0740*/ DADD R34, R10, c[0x3][0xd0] ; /* 0x00c034000a227629 */ /* 0x004ea20000000000 */ /*0750*/ IMAD R65, R73, R6, R70 ; /* 0x0000000649417224 */ /* 0x000fe400078e0246 */ /*0760*/ IMAD R6, R5, 0x5, RZ ; /* 0x0000000505067824 */ /* 0x000fe200078e02ff */ /*0770*/ DADD R10, R14, -c[0x3][0xc8] ; /* 0x80c032000e0a7629 */ /* 0x001e220000000000 */ /*0780*/ IMAD.WIDE R44, R3, 0x8, R42 ; /* 0x00000008032c7825 */ /* 0x000fe200078e022a */ /*0790*/ STG.E.64 [R16.64], RZ ; /* 0x000000ff10007986 */ /* 0x0007e6000c101b08 */ /*07a0*/ IMAD.WIDE R64, R65, R66, c[0x0][0x1a0] ; /* 0x0000680041407625 */ /* 0x000fe200078e0242 */ /*07b0*/ STG.E.64 [R22.64], R28 ; /* 0x0000001c16007986 */ /* 0x0009e6000c101b08 */ /*07c0*/ IMAD.WIDE R46, R6, 0x8, R20 ; /* 0x00000008062e7825 */ /* 0x000fe200078e0214 */ /*07d0*/ STG.E.64 [R42.64], R34 ; /* 0x000000222a007986 */ /* 0x0045e8000c101b08 */ /*07e0*/ STG.E.64 [R44.64], R10 ; /* 0x0000000a2c007986 */ /* 0x0015e8000c101b08 */ /*07f0*/ STG.E.64 [R64.64], R84 ; /* 0x0000005440007986 */ /* 0x0005e8000c101b08 */ /*0800*/ LDG.E.64 R18, [R46.64] ; /* 0x000000082e127981 */ /* 0x002568000c1e1b00 */ /*0810*/ LDG.E.64 R16, [R46.64+0x8] ; /* 0x000008082e107981 */ /* 0x008568000c1e1b00 */ /*0820*/ LDG.E.64 R14, [R46.64+0x10] ; /* 0x000010082e0e7981 */ /* 0x000568000c1e1b00 */ /*0830*/ LDG.E.64 R32, [R20.64] ; /* 0x0000000814207981 */ /* 0x000568000c1e1b00 */ /*0840*/ LDG.E.64 R24, [R20.64+0x8] ; /* 0x0000080814187981 */ /* 0x000568000c1e1b00 */ /*0850*/ LDG.E.64 R26, [R20.64+0x10] ; /* 0x00001008141a7981 */ /* 0x000562000c1e1b00 */ /*0860*/ ISETP.GE.AND P0, PT, R0, 0x3, PT ; /* 0x000000030000780c */ /* 0x000fc40003f06270 */ /*0870*/ IADD3 R7, R7, c[0x0][0x1b4], RZ ; /* 0x00006d0007077a10 */ /* 0x000fca0007ffe0ff */ /*0880*/ IMAD R13, R7, c[0x0][0x1b0], R13 ; /* 0x00006c00070d7a24 */ /* 0x000fe200078e020d */ /*0890*/ CS2R R30, SRZ ; /* 0x00000000001e7805 */ /* 0x000fe2000001ff00 */ /*08a0*/ IMAD.MOV.U32 R100, RZ, RZ, 0x0 ; /* 0x00000000ff647424 */ /* 0x000fe200078e00ff */ /*08b0*/ CS2R R22, SRZ ; /* 0x0000000000167805 */ /* 0x010fe2000001ff00 */ /*08c0*/ IMAD.MOV.U32 R101, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff657424 */ /* 0x000fe200078e00ff */ /*08d0*/ IADD3 R9, R0, -0x2, RZ ; /* 0xfffffffe00097810 */ /* 0x000fe40007ffe0ff */ /*08e0*/ SHF.R.S32.HI R62, RZ, 0x1f, R63 ; /* 0x0000001fff3e7819 */ /* 0x000fe4000001143f */ /*08f0*/ SHF.R.S32.HI R12, RZ, 0x1f, R13 ; /* 0x0000001fff0c7819 */ /* 0x000fe2000001140d */ /*0900*/ @!P0 BRA 0x1550 ; /* 0x00000c4000008947 */ /* 0x000fea0003800000 */ /*0910*/ IADD3 R22, R8, c[0x0][0x1b8], RZ ; /* 0x00006e0008167a10 */ /* 0x004fe20007ffe0ff */ /*0920*/ IMAD.MOV.U32 R36, RZ, RZ, 0x5 ; /* 0x00000005ff247424 */ /* 0x000fe200078e00ff */ /*0930*/ LEA R67, R41, R2, 0x1 ; /* 0x0000000229437211 */ /* 0x000fe200078e08ff */ /*0940*/ IMAD.IADD R69, R2, 0x1, R38 ; /* 0x0000000102457824 */ /* 0x000fe200078e0226 */ /*0950*/ IADD3 R22, R22, -0x1, RZ ; /* 0xffffffff16167810 */ /* 0x000fe20007ffe0ff */ /*0960*/ IMAD R68, R73, R39, RZ ; /* 0x0000002749447224 */ /* 0x000fe200078e02ff */ /*0970*/ ULDC UR4, c[0x0][0x1b8] ; /* 0x00006e0000047ab9 */ /* 0x000fe20000000800 */ /*0980*/ IMAD R67, R67, R36, 0x5 ; /* 0x0000000543437424 */ /* 0x000fe200078e0224 */ /*0990*/ UIADD3 UR4, -UR4, URZ, URZ ; /* 0x0000003f04047290 */ /* 0x000fe2000fffe13f */ /*09a0*/ IMAD R22, R39, R22, R2.reuse ; /* 0x0000001627167224 */ /* 0x100fe200078e0202 */ /*09b0*/ IADD3 R72, R0.reuse, -0x3, RZ ; /* 0xfffffffd00487810 */ /* 0x040fe20007ffe0ff */ /*09c0*/ IMAD R75, R41, 0x3, R2 ; /* 0x00000003294b7824 */ /* 0x000fe200078e0202 */ /*09d0*/ IADD3 R74, R0, -0x5, RZ ; /* 0xfffffffb004a7810 */ /* 0x000fe20007ffe0ff */ /*09e0*/ IMAD R23, R73, R22, R70 ; /* 0x0000001649177224 */ /* 0x000fe200078e0246 */ /*09f0*/ IADD3 R22, R8, 0x2, RZ ; /* 0x0000000208167810 */ /* 0x000fe20007ffe0ff */ /*0a00*/ IMAD R30, R70, 0x5, RZ ; /* 0x00000005461e7824 */ /* 0x000fe200078e02ff */ /*0a10*/ IADD3 R8, R37, 0x1, RZ ; /* 0x0000000125087810 */ /* 0x000fe20007ffe0ff */ /*0a20*/ IMAD.WIDE R36, R23, R66, c[0x0][0x1a0] ; /* 0x0000680017247625 */ /* 0x000fe200078e0242 */ /*0a30*/ MOV R100, 0x0 ; /* 0x0000000000647802 */ /* 0x000fe20000000f00 */ /*0a40*/ CS2R R42, SRZ ; /* 0x00000000002a7805 */ /* 0x000fe2000001ff00 */ /*0a50*/ MOV R47, R85 ; /* 0x00000055002f7202 */ /* 0x000fe20000000f00 */ /*0a60*/ IMAD R22, R39, R22, R2 ; /* 0x0000001627167224 */ /* 0x000fe200078e0202 */ /*0a70*/ IADD3 R75, R75, 0x1, RZ ; /* 0x000000014b4b7810 */ /* 0x000fe20007ffe0ff */ /*0a80*/ IMAD.WIDE R38, R3, 0x8, R36 ; /* 0x0000000803267825 */ /* 0x000fc800078e0224 */ /*0a90*/ IMAD R76, R0, c[0x0][0x1b4], RZ ; /* 0x00006d00004c7a24 */ /* 0x000fe400078e02ff */ /*0aa0*/ IMAD.WIDE R40, R3, 0x8, R38 ; /* 0x0000000803287825 */ /* 0x000fc800078e0226 */ /*0ab0*/ IMAD R69, R73, R69, R70 ; /* 0x0000004549457224 */ /* 0x000fe400078e0246 */ /*0ac0*/ IMAD.WIDE R44, R3, 0x8, R40 ; /* 0x00000008032c7825 */ /* 0x000fc800078e0228 */ /*0ad0*/ IMAD R71, R73, R22, R70 ; /* 0x0000001649477224 */ /* 0x000fe400078e0246 */ /*0ae0*/ IMAD R67, R67, c[0x0][0x1b0], R30 ; /* 0x00006c0043437a24 */ /* 0x000fe200078e021e */ /*0af0*/ CS2R R22, SRZ ; /* 0x0000000000167805 */ /* 0x000fe2000001ff00 */ /*0b00*/ IMAD R73, R2, R73, R70 ; /* 0x0000004902497224 */ /* 0x000fe400078e0246 */ /*0b10*/ IMAD.MOV.U32 R101, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff657424 */ /* 0x000fe400078e00ff */ /*0b20*/ IMAD.MOV.U32 R46, RZ, RZ, R84 ; /* 0x000000ffff2e7224 */ /* 0x000fe400078e0054 */ /*0b30*/ IMAD R76, R76, c[0x0][0x1b0], RZ ; /* 0x00006c004c4c7a24 */ /* 0x000fc400078e02ff */ /*0b40*/ IMAD.WIDE R48, R3, 0x8, R44 ; /* 0x0000000803307825 */ /* 0x000fc800078e022c */ /*0b50*/ IMAD.U32 R77, RZ, RZ, UR4 ; /* 0x00000004ff4d7e24 */ /* 0x000fe2000f8e00ff */ /*0b60*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe40008000000 */ /*0b70*/ IADD3 R0, R74, -UR4, RZ ; /* 0x800000044a007c10 */ /* 0x000fe2000fffe0ff */ /*0b80*/ IMAD.MOV.U32 R30, RZ, RZ, R46 ; /* 0x000000ffff1e7224 */ /* 0x000fe200078e002e */ /*0b90*/ MOV R31, R47 ; /* 0x0000002f001f7202 */ /* 0x000fe40000000f00 */ /*0ba0*/ ISETP.NE.AND P0, PT, R0, -0x2, PT ; /* 0xfffffffe0000780c */ /* 0x000fda0003f05270 */ /*0bb0*/ @!P0 BRA 0x10d0 ; /* 0x0000051000008947 */ /* 0x009fea0003800000 */ /*0bc0*/ IMAD.MOV.U32 R89, RZ, RZ, 0x8 ; /* 0x00000008ff597424 */ /* 0x000fe400078e00ff */ /*0bd0*/ IMAD R58, R75, c[0x0][0x1b0], R70 ; /* 0x00006c004b3a7a24 */ /* 0x000fc800078e0246 */ /*0be0*/ IMAD.WIDE R46, R58, R89, c[0x0][0x160] ; /* 0x000058003a2e7625 */ /* 0x000fcc00078e0259 */ /*0bf0*/ LDG.E.64 R46, [R46.64+0x8] ; /* 0x000008082e2e7981 */ /* 0x000ea2000c1e1b00 */ /*0c00*/ IMAD.WIDE R58, R58, R89, c[0x0][0x178] ; /* 0x00005e003a3a7625 */ /* 0x000fcc00078e0259 */ /*0c10*/ LDG.E.64 R58, [R58.64+0x8] ; /* 0x000008083a3a7981 */ /* 0x000ee2000c1e1b00 */ /*0c20*/ IMAD.MOV.U32 R52, RZ, RZ, 0x0 ; /* 0x00000000ff347424 */ /* 0x000fe200078e00ff */ /*0c30*/ MOV R53, 0x3ff00000 ; /* 0x3ff0000000357802 */ /* 0x000fe20000000f00 */ /*0c40*/ DMUL R50, R46, c[0x2][0x0] ; /* 0x008000002e327a28 */ /* 0x004e0c0000000000 */ /*0c50*/ DFMA R54, R50, c[0x2][0x8], R52 ; /* 0x0080020032367a2b */ /* 0x001fc80000000034 */ /*0c60*/ DFMA R56, R50, c[0x2][0x10], R52 ; /* 0x0080040032387a2b */ /* 0x000e080000000034 */ /*0c70*/ DADD R50, R50, 1 ; /* 0x3ff0000032327429 */ /* 0x000fc80000000000 */ /*0c80*/ DSETP.GT.AND P0, PT, R54, R56, PT ; /* 0x000000383600722a */ /* 0x001e080003f04000 */ /*0c90*/ DFMA R52, R78, c[0x3][0xb8], R52 ; /* 0x00c02e004e347a2b */ /* 0x000fe40000000034 */ /*0ca0*/ FSEL R54, R54, R56, P0 ; /* 0x0000003836367208 */ /* 0x001fe40000000000 */ /*0cb0*/ FSEL R55, R55, R57, P0 ; /* 0x0000003937377208 */ /* 0x000fcc0000000000 */ /*0cc0*/ DSETP.GEU.AND P0, PT, R54, R50, PT ; /* 0x000000323600722a */ /* 0x000e0c0003f0e000 */ /*0cd0*/ FSEL R46, R50, R54, !P0 ; /* 0x00000036322e7208 */ /* 0x001fe40004000000 */ /*0ce0*/ FSEL R47, R51, R55, !P0 ; /* 0x00000037332f7208 */ /* 0x000fe20004000000 */ /*0cf0*/ DMUL R50, R82, c[0x3][0x98] ; /* 0x00c0260052327a28 */ /* 0x000e0a0000000000 */ /*0d00*/ DSETP.GEU.AND P0, PT, R46, 1, PT ; /* 0x3ff000002e00742a */ /* 0x000e480003f0e000 */ /*0d10*/ DFMA R50, -R80, c[0x3][0xa0], -R50 ; /* 0x00c0280050327a2b */ /* 0x021fe40000000932 */ /*0d20*/ FSEL R86, R46, RZ, P0 ; /* 0x000000ff2e567208 */ /* 0x002fe40000000000 */ /*0d30*/ FSEL R87, R47, 1.875, P0 ; /* 0x3ff000002f577808 */ /* 0x000fe40000000000 */ /*0d40*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */ /* 0x000fc8000bf05270 */ /*0d50*/ DMUL R54, R86, c[0x3][0x98] ; /* 0x00c0260056367a28 */ /* 0x000ecc0000000000 */ /*0d60*/ DFMA R54, R58, c[0x3][0xa0], -R54 ; /* 0x00c028003a367a2b */ /* 0x0080460000000836 */ /*0d70*/ @!P0 BRA 0xf40 ; /* 0x000001c000008947 */ /* 0x000fea0003800000 */ /*0d80*/ UIADD3 UR5, UR4, 0x2, URZ ; /* 0x0000000204057890 */ /* 0x003fcc000fffe03f */ /*0d90*/ ISETP.LE.AND P0, PT, R72, UR5, PT ; /* 0x0000000548007c0c */ /* 0x000fda000bf03270 */ /*0da0*/ @!P0 BRA 0xec0 ; /* 0x0000011000008947 */ /* 0x000fea0003800000 */ /*0db0*/ ISETP.NE.AND P0, PT, R77, -0x5, PT ; /* 0xfffffffb4d00780c */ /* 0x000fe20003f05270 */ /*0dc0*/ CS2R R46, SRZ ; /* 0x00000000002e7805 */ /* 0x000fd8000001ff00 */ /*0dd0*/ @!P0 BRA 0xe60 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*0de0*/ ISETP.NE.AND P0, PT, R0, -0x1, PT ; /* 0xffffffff0000780c */ /* 0x000fe20003f05270 */ /*0df0*/ CS2R R56, SRZ ; /* 0x0000000000387805 */ /* 0x000fd8000001ff00 */ /*0e00*/ @P0 BRA 0xfa0 ; /* 0x0000019000000947 */ /* 0x000fea0003800000 */ /*0e10*/ DADD R50, R50, -c[0x3][0xc8] ; /* 0x80c0320032327629 */ /* 0x000e220000000000 */ /*0e20*/ IMAD.MOV.U32 R56, RZ, RZ, R84 ; /* 0x000000ffff387224 */ /* 0x000fe400078e0054 */ /*0e30*/ IMAD.MOV.U32 R57, RZ, RZ, R85 ; /* 0x000000ffff397224 */ /* 0x000fe200078e0055 */ /*0e40*/ DADD R52, R52, c[0x3][0xd0] ; /* 0x00c0340034347629 */ /* 0x000e620000000000 */ /*0e50*/ BRA 0xfa0 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*0e60*/ DADD R50, R50, -c[0x3][0xc8] ; /* 0x80c0320032327629 */ /* 0x000e220000000000 */ /*0e70*/ MOV R56, R84 ; /* 0x0000005400387202 */ /* 0x000fe20000000f00 */ /*0e80*/ IMAD.MOV.U32 R57, RZ, RZ, R85 ; /* 0x000000ffff397224 */ /* 0x000fe400078e0055 */ /*0e90*/ DADD R52, R52, c[0x3][0xd8] ; /* 0x00c0360034347629 */ /* 0x000e480000000000 */ /*0ea0*/ DADD R54, R54, -c[0x3][0xc8] ; /* 0x80c0320036367629 */ /* 0x000ea20000000000 */ /*0eb0*/ BRA 0xfa0 ; /* 0x000000e000007947 */ /* 0x000fea0003800000 */ /*0ec0*/ DADD R50, R50, -c[0x3][0xc8] ; /* 0x80c0320032327629 */ /* 0x000e220000000000 */ /*0ed0*/ IMAD.MOV.U32 R46, RZ, RZ, R84.reuse ; /* 0x000000ffff2e7224 */ /* 0x100fe200078e0054 */ /*0ee0*/ MOV R47, R85.reuse ; /* 0x00000055002f7202 */ /* 0x080fe20000000f00 */ /*0ef0*/ IMAD.MOV.U32 R56, RZ, RZ, R84 ; /* 0x000000ffff387224 */ /* 0x000fe200078e0054 */ /*0f00*/ DADD R52, R52, c[0x3][0xd8] ; /* 0x00c0360034347629 */ /* 0x000e620000000000 */ /*0f10*/ MOV R57, R85 ; /* 0x0000005500397202 */ /* 0x000fc60000000f00 */ /*0f20*/ DADD R54, R54, -c[0x3][0xc8] ; /* 0x80c0320036367629 */ /* 0x000ea20000000000 */ /*0f30*/ BRA 0xfa0 ; /* 0x0000006000007947 */ /* 0x000fea0003800000 */ /*0f40*/ DADD R50, R50, -c[0x3][0xc8] ; /* 0x80c0320032327629 */ /* 0x003e220000000000 */ /*0f50*/ CS2R R56, SRZ ; /* 0x0000000000387805 */ /* 0x000fe2000001ff00 */ /*0f60*/ IMAD.MOV.U32 R46, RZ, RZ, R84 ; /* 0x000000ffff2e7224 */ /* 0x000fe200078e0054 */ /*0f70*/ MOV R47, R85 ; /* 0x00000055002f7202 */ /* 0x000fe20000000f00 */ /*0f80*/ DADD R52, R52, c[0x3][0xd8] ; /* 0x00c0360034347629 */ /* 0x000e480000000000 */ /*0f90*/ DADD R54, R54, -c[0x3][0xc8] ; /* 0x80c0320036367629 */ /* 0x000e880000000000 */ /*0fa0*/ IMAD.WIDE R88, R71, R89, c[0x0][0x1a0] ; /* 0x0000680047587625 */ /* 0x003fe200078e0259 */ /*0fb0*/ MOV R81, R61 ; /* 0x0000003d00517202 */ /* 0x000fe40000000f00 */ /*0fc0*/ MOV R83, R79 ; /* 0x0000004f00537202 */ /* 0x000fe20000000f00 */ /*0fd0*/ IMAD.MOV.U32 R80, RZ, RZ, R60 ; /* 0x000000ffff507224 */ /* 0x000fe200078e003c */ /*0fe0*/ STG.E.64 [R88.64], R56 ; /* 0x0000003858007986 */ /* 0x0001e2000c101b08 */ /*0ff0*/ IMAD.WIDE R90, R3.reuse, 0x8, R88 ; /* 0x00000008035a7825 */ /* 0x040fe200078e0258 */ /*1000*/ MOV R61, R59 ; /* 0x0000003b003d7202 */ /* 0x000fe40000000f00 */ /*1010*/ MOV R79, R87 ; /* 0x00000057004f7202 */ /* 0x000fe20000000f00 */ /*1020*/ IMAD.MOV.U32 R82, RZ, RZ, R78 ; /* 0x000000ffff527224 */ /* 0x000fe200078e004e */ /*1030*/ STG.E.64 [R90.64], R50 ; /* 0x000000325a007986 */ /* 0x0001e2000c101b08 */ /*1040*/ IMAD.WIDE R92, R3, 0x8, R90 ; /* 0x00000008035c7825 */ /* 0x000fc800078e025a */ /*1050*/ IMAD.MOV.U32 R60, RZ, RZ, R58 ; /* 0x000000ffff3c7224 */ /* 0x000fe200078e003a */ /*1060*/ STG.E.64 [R92.64], R52 ; /* 0x000000345c007986 */ /* 0x0001e2000c101b08 */ /*1070*/ IMAD.WIDE R94, R3, 0x8, R92 ; /* 0x00000008035e7825 */ /* 0x000fc800078e025c */ /*1080*/ IMAD.MOV.U32 R78, RZ, RZ, R86 ; /* 0x000000ffff4e7224 */ /* 0x000fe200078e0056 */ /*1090*/ STG.E.64 [R94.64], R54 ; /* 0x000000365e007986 */ /* 0x0041e2000c101b08 */ /*10a0*/ IMAD.WIDE R96, R3, 0x8, R94 ; /* 0x0000000803607825 */ /* 0x000fca00078e025e */ /*10b0*/ STG.E.64 [R96.64], R46 ; /* 0x0000002e60007986 */ /* 0x0001e2000c101b08 */ /*10c0*/ BRA 0x11a0 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*10d0*/ IMAD.MOV.U32 R58, RZ, RZ, 0x0 ; /* 0x00000000ff3a7424 */ /* 0x000fe200078e00ff */ /*10e0*/ MOV R59, 0x3ff00000 ; /* 0x3ff00000003b7802 */ /* 0x000fe20000000f00 */ /*10f0*/ STG.E.64 [R36.64], RZ ; /* 0x000000ff24007986 */ /* 0x0001e2000c101b08 */ /*1100*/ CS2R R46, SRZ ; /* 0x00000000002e7805 */ /* 0x000fe2000001ff00 */ /*1110*/ IMAD.MOV.U32 R52, RZ, RZ, 0x0 ; /* 0x00000000ff347424 */ /* 0x000fe200078e00ff */ /*1120*/ MOV R53, 0x3ff00000 ; /* 0x3ff0000000357802 */ /* 0x000fe20000000f00 */ /*1130*/ STG.E.64 [R38.64], RZ ; /* 0x000000ff26007986 */ /* 0x0001e2000c101b08 */ /*1140*/ CS2R R54, SRZ ; /* 0x0000000000367805 */ /* 0x000fe2000001ff00 */ /*1150*/ CS2R R50, SRZ ; /* 0x0000000000327805 */ /* 0x000fe2000001ff00 */ /*1160*/ CS2R R56, SRZ ; /* 0x0000000000387805 */ /* 0x000fe2000001ff00 */ /*1170*/ STG.E.64 [R40.64], R58 ; /* 0x0000003a28007986 */ /* 0x0001e8000c101b08 */ /*1180*/ STG.E.64 [R44.64], RZ ; /* 0x000000ff2c007986 */ /* 0x0001e8000c101b08 */ /*1190*/ STG.E.64 [R48.64], RZ ; /* 0x000000ff30007986 */ /* 0x0001e4000c101b08 */ /*11a0*/ MUFU.RCP64H R59, R101 ; /* 0x00000065003b7308 */ /* 0x001e220000001800 */ /*11b0*/ IADD3 R58, R101, 0x300402, RZ ; /* 0x00300402653a7810 */ /* 0x000fe20007ffe0ff */ /*11c0*/ BSSY B0, 0x12b0 ; /* 0x000000e000007945 */ /* 0x000fe60003800000 */ /*11d0*/ FSETP.GEU.AND P0, PT, |R58|, 5.8789094863358348022e-39, PT ; /* 0x004004023a00780b */ /* 0x000fc40003f0e200 */ /*11e0*/ DFMA R86, R58, -R100, 1 ; /* 0x3ff000003a56742b */ /* 0x001e0c0000000864 */ /*11f0*/ DFMA R86, R86, R86, R86 ; /* 0x000000565656722b */ /* 0x001e0c0000000056 */ /*1200*/ DFMA R86, R58, R86, R58 ; /* 0x000000563a56722b */ /* 0x001064000000003a */ /*1210*/ IMAD.MOV.U32 R58, RZ, RZ, 0x8 ; /* 0x00000008ff3a7424 */ /* 0x001fc800078e00ff */ /*1220*/ DFMA R104, R86, -R100, 1 ; /* 0x3ff000005668742b */ /* 0x002e220000000864 */ /*1230*/ IMAD.WIDE R58, R67, R58, c[0x0][0x198] ; /* 0x00006600433a7625 */ /* 0x000fca00078e023a */ /*1240*/ DFMA R104, R86, R104, R86 ; /* 0x000000685668722b */ /* 0x0010620000000056 */ /*1250*/ @P0 BRA 0x12a0 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*1260*/ LOP3.LUT R107, R101, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff656b7812 */ /* 0x000fe400078ec0ff */ /*1270*/ MOV R0, 0x12a0 ; /* 0x000012a000007802 */ /* 0x000fe40000000f00 */ /*1280*/ IADD3 R107, R107, -0x100000, RZ ; /* 0xfff000006b6b7810 */ /* 0x000fe40007ffe0ff */ /*1290*/ CALL.REL.NOINC 0x3dd0 ; /* 0x00002b3000007944 */ /* 0x023fea0003c00000 */ /*12a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*12b0*/ LDG.E.64 R86, [R58.64+0x28] ; /* 0x000028083a567981 */ /* 0x0010a8000c1e1b00 */ /*12c0*/ LDG.E.64 R88, [R58.64+0x30] ; /* 0x000030083a587981 */ /* 0x0000e8000c1e1b00 */ /*12d0*/ LDG.E.64 R92, [R58.64+0x38] ; /* 0x000038083a5c7981 */ /* 0x000122000c1e1b00 */ /*12e0*/ DMUL R42, R104.reuse, R42 ; /* 0x0000002a682a7228 */ /* 0x042e620000000000 */ /*12f0*/ IMAD.WIDE R98, R73, R66.reuse, c[0x0][0x1a0] ; /* 0x0000680049627625 */ /* 0x080fe200078e0242 */ /*1300*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fe2000fffe03f */ /*1310*/ IADD3 R71, R68, R71, RZ ; /* 0x0000004744477210 */ /* 0x000fe20007ffe0ff */ /*1320*/ DMUL R90, R104, R22 ; /* 0x00000016685a7228 */ /* 0x000e220000000000 */ /*1330*/ IADD3 R77, R77, 0x1, RZ ; /* 0x000000014d4d7810 */ /* 0x000fe20007ffe0ff */ /*1340*/ IMAD.IADD R70, R5, 0x1, R70 ; /* 0x0000000105467824 */ /* 0x000fe200078e0246 */ /*1350*/ IADD3 R67, R6, R67, RZ ; /* 0x0000004306437210 */ /* 0x000fe20007ffe0ff */ /*1360*/ DFMA R22, R42, -R28, R10 ; /* 0x8000001c2a16722b */ /* 0x0023e2000000000a */ /*1370*/ ISETP.LE.AND P0, PT, R9, UR4, PT ; /* 0x0000000409007c0c */ /* 0x000fe2000bf03270 */ /*1380*/ IMAD.WIDE R10, R8, R66, c[0x0][0x1a8] ; /* 0x00006a00080a7625 */ /* 0x002fe200078e0242 */ /*1390*/ STG.E.64 [R98.64], R90 ; /* 0x0000005a62007986 */ /* 0x001fe2000c101b08 */ /*13a0*/ DMUL R96, R104, R32 ; /* 0x0000002068607228 */ /* 0x020e220000000000 */ /*13b0*/ IADD3 R73, R68, R73, RZ ; /* 0x0000004944497210 */ /* 0x000fe20007ffe0ff */ /*13c0*/ IMAD.IADD R8, R5, 0x1, R8 ; /* 0x0000000105087824 */ /* 0x000fc400078e0208 */ /*13d0*/ DMUL R94, R104, R24 ; /* 0x00000018685e7228 */ /* 0x000e620000000000 */ /*13e0*/ IMAD.WIDE R58, R76, 0x8, R10 ; /* 0x000000084c3a7825 */ /* 0x000fc600078e020a */ /*13f0*/ DMUL R104, R104, R26 ; /* 0x0000001a68687228 */ /* 0x000e080000000000 */ /*1400*/ DFMA R100, R90, -R28, R34 ; /* 0x8000001c5a64722b */ /* 0x000e080000000022 */ /*1410*/ DFMA R32, R96, -R28, R18 ; /* 0x8000001c6020722b */ /* 0x001e080000000012 */ /*1420*/ DFMA R24, R94, -R28, R16 ; /* 0x8000001c5e18722b */ /* 0x002e480000000010 */ /*1430*/ DFMA R26, R104, -R28, R14 ; /* 0x8000001c681a722b */ /* 0x000e08000000000e */ /*1440*/ DFMA R28, R90, -R56.reuse, R50 ; /* 0x800000385a1c722b */ /* 0x0800240000000032 */ /*1450*/ IMAD.WIDE R50, R69, R66, c[0x0][0x1a0] ; /* 0x0000680045327625 */ /* 0x001fe400078e0242 */ /*1460*/ DFMA R34, R42, -R56.reuse, R52 ; /* 0x800000382a22722b */ /* 0x0800240000000034 */ /*1470*/ IMAD.WIDE R52, R76, 0x8, R58 ; /* 0x000000084c347825 */ /* 0x001fe200078e023a */ /*1480*/ STG.E.64 [R50.64], R42 ; /* 0x0000002a32007986 */ /* 0x0001e6000c101b08 */ /*1490*/ IMAD.IADD R69, R68, 0x1, R69 ; /* 0x0000000144457824 */ /* 0x000fe200078e0245 */ /*14a0*/ STG.E.64 [R10.64], R96 ; /* 0x000000600a007986 */ /* 0x0003e8000c101b08 */ /*14b0*/ STG.E.64 [R58.64], R94 ; /* 0x0000005e3a007986 */ /* 0x0005e8000c101b08 */ /*14c0*/ STG.E.64 [R52.64], R104 ; /* 0x0000006834007986 */ /* 0x0005e2000c101b08 */ /*14d0*/ MOV R42, R30 ; /* 0x0000001e002a7202 */ /* 0x001fe20000000f00 */ /*14e0*/ IMAD.MOV.U32 R43, RZ, RZ, R31 ; /* 0x000000ffff2b7224 */ /* 0x000fe200078e001f */ /*14f0*/ MOV R10, R54 ; /* 0x00000036000a7202 */ /* 0x002fe20000000f00 */ /*1500*/ IMAD.MOV.U32 R11, RZ, RZ, R55 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e0037 */ /*1510*/ DFMA R18, R96, -R56, R86 ; /* 0x800000386012722b */ /* 0x0040480000000056 */ /*1520*/ DFMA R16, R94, -R56, R88 ; /* 0x800000385e10722b */ /* 0x0080880000000058 */ /*1530*/ DFMA R14, R104, -R56, R92 ; /* 0x80000038680e722b */ /* 0x0100e2000000005c */ /*1540*/ @!P0 BRA 0xb70 ; /* 0xfffff62000008947 */ /* 0x006fea000383ffff */ /*1550*/ MUFU.RCP64H R11, R101 ; /* 0x00000065000b7308 */ /* 0x004e620000001800 */ /*1560*/ S2R R8, SR_TID.Y ; /* 0x0000000000087919 */ /* 0x000ea20000002200 */ /*1570*/ IADD3 R10, R101, 0x300402, RZ ; /* 0x00300402650a7810 */ /* 0x000fe20007ffe0ff */ /*1580*/ UMOV UR4, 0x2 ; /* 0x0000000200047882 */ /* 0x000fe20000000000 */ /*1590*/ MOV R0, c[0x0][0x1b8] ; /* 0x00006e0000007a02 */ /* 0x000fe20000000f00 */ /*15a0*/ S2R R41, SR_CTAID.Y ; /* 0x0000000000297919 */ /* 0x000ea20000002600 */ /*15b0*/ ULDC.64 UR6, c[0x0][0x1b0] ; /* 0x00006c0000067ab9 */ /* 0x000fe20000000a00 */ /*15c0*/ FSETP.GEU.AND P1, PT, |R10|, 5.8789094863358348022e-39, PT ; /* 0x004004020a00780b */ /* 0x000fe20003f2e200 */ /*15d0*/ UIADD3 UR5, -UR4, UR7, URZ ; /* 0x0000000704057290 */ /* 0x000fe2000fffe13f */ /*15e0*/ IMAD R39, R0.reuse, 0x5, RZ ; /* 0x0000000500277824 */ /* 0x040fe200078e02ff */ /*15f0*/ UIADD3 UR4, -UR4, UR6, URZ ; /* 0x0000000604047290 */ /* 0x000fe2000fffe13f */ /*1600*/ BSSY B0, 0x1760 ; /* 0x0000015000007945 */ /* 0x000fe20003800000 */ /*1610*/ ISETP.GE.AND P0, PT, R0, 0x3, PT ; /* 0x000000030000780c */ /* 0x000fe20003f06270 */ /*1620*/ IMAD.WIDE R54, R6, 0x8, R20 ; /* 0x0000000806367825 */ /* 0x000fe200078e0214 */ /*1630*/ DFMA R36, R10, -R100, 1 ; /* 0x3ff000000a24742b */ /* 0x002e460000000864 */ /*1640*/ IMAD R39, R39, UR5, R2 ; /* 0x0000000527277c24 */ /* 0x000fc6000f8e0202 */ /*1650*/ DFMA R36, R36, R36, R36 ; /* 0x000000242424722b */ /* 0x002e640000000024 */ /*1660*/ IADD3 R39, R39, UR5, RZ ; /* 0x0000000527277c10 */ /* 0x000fc8000fffe0ff */ /*1670*/ DFMA R36, R10, R36, R10 ; /* 0x000000240a24722b */ /* 0x002e62000000000a */ /*1680*/ IMAD R8, R41, c[0x0][0x4], R8 ; /* 0x0000010029087a24 */ /* 0x004fe400078e0208 */ /*1690*/ IMAD.MOV.U32 R41, RZ, RZ, 0x5 ; /* 0x00000005ff297424 */ /* 0x000fe400078e00ff */ /*16a0*/ IMAD R39, R39, UR4, R8 ; /* 0x0000000427277c24 */ /* 0x000fe2000f8e0208 */ /*16b0*/ DFMA R10, R36, -R100, 1 ; /* 0x3ff00000240a742b */ /* 0x002e620000000864 */ /*16c0*/ IADD3 R53, R8, 0x1, RZ ; /* 0x0000000108357810 */ /* 0x000fe40007ffe0ff */ /*16d0*/ IMAD.WIDE R66, R39, R66, c[0x0][0x1a0] ; /* 0x0000680027427625 */ /* 0x000fc600078e0242 */ /*16e0*/ DFMA R104, R36, R10, R36 ; /* 0x0000000a2468722b */ /* 0x0030640000000024 */ /*16f0*/ IMAD R11, R8, R41, 0x5 ; /* 0x00000005080b7424 */ /* 0x001fe200078e0229 */ /*1700*/ @P1 BRA 0x1750 ; /* 0x0000004000001947 */ /* 0x000fea0003800000 */ /*1710*/ LOP3.LUT R107, R101, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff656b7812 */ /* 0x002fe400078ec0ff */ /*1720*/ MOV R0, 0x1750 ; /* 0x0000175000007802 */ /* 0x000fe40000000f00 */ /*1730*/ IADD3 R107, R107, -0x100000, RZ ; /* 0xfff000006b6b7810 */ /* 0x000fe40007ffe0ff */ /*1740*/ CALL.REL.NOINC 0x3dd0 ; /* 0x0000268000007944 */ /* 0x028fea0003c00000 */ /*1750*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x002fea0003800000 */ /*1760*/ DMUL R36, R104.reuse, R22 ; /* 0x0000001668247228 */ /* 0x040e220000000000 */ /*1770*/ BSSY B0, 0x1900 ; /* 0x0000018000007945 */ /* 0x000fe60003800000 */ /*1780*/ DMUL R38, R104, R30 ; /* 0x0000001e68267228 */ /* 0x000fc80000000000 */ /*1790*/ DFMA R100, R36, -R28, R34 ; /* 0x8000001c2464722b */ /* 0x001e080000000022 */ /*17a0*/ DMUL R22, R104.reuse, R32 ; /* 0x0000002068167228 */ /* 0x060e640000000000 */ /*17b0*/ MUFU.RCP64H R35, R101 ; /* 0x0000006500237308 */ /* 0x001e240000001800 */ /*17c0*/ DMUL R24, R104.reuse, R24 ; /* 0x0000001868187228 */ /* 0x040ea40000000000 */ /*17d0*/ IADD3 R34, R101, 0x300402, RZ ; /* 0x0030040265227810 */ /* 0x000fe40007ffe0ff */ /*17e0*/ DMUL R26, R104, R26 ; /* 0x0000001a681a7228 */ /* 0x000f240000000000 */ /*17f0*/ FSETP.GEU.AND P1, PT, |R34|, 5.8789094863358348022e-39, PT ; /* 0x004004022200780b */ /* 0x000fc40003f2e200 */ /*1800*/ DFMA R18, R22, -R28, R18 ; /* 0x8000001c1612722b */ /* 0x002fc80000000012 */ /*1810*/ DFMA R16, R24, -R28, R16 ; /* 0x8000001c1810722b */ /* 0x004fc80000000010 */ /*1820*/ DFMA R40, -R100, R34, 1 ; /* 0x3ff000006428742b */ /* 0x001e080000000122 */ /*1830*/ DFMA R14, R26, -R28, R14 ; /* 0x8000001c1a0e722b */ /* 0x018fc8000000000e */ /*1840*/ DFMA R40, R40, R40, R40 ; /* 0x000000282828722b */ /* 0x001e0c0000000028 */ /*1850*/ DFMA R40, R34, R40, R34 ; /* 0x000000282228722b */ /* 0x0010640000000022 */ /*1860*/ MOV R35, c[0x0][0x1b8] ; /* 0x00006e0000237a02 */ /* 0x001fc80000000f00 */ /*1870*/ DFMA R30, -R100, R40, 1 ; /* 0x3ff00000641e742b */ /* 0x002e220000000128 */ /*1880*/ IMAD R35, R35, 0x7, RZ ; /* 0x0000000723237824 */ /* 0x000fca00078e02ff */ /*1890*/ DFMA R104, R40, R30, R40 ; /* 0x0000001e2868722b */ /* 0x0010620000000028 */ /*18a0*/ @P1 BRA 0x18f0 ; /* 0x0000004000001947 */ /* 0x000fea0003800000 */ /*18b0*/ LOP3.LUT R107, R101, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff656b7812 */ /* 0x000fe400078ec0ff */ /*18c0*/ MOV R0, 0x18f0 ; /* 0x000018f000007802 */ /* 0x000fe40000000f00 */ /*18d0*/ IADD3 R107, R107, -0x100000, RZ ; /* 0xfff000006b6b7810 */ /* 0x000fe40007ffe0ff */ /*18e0*/ CALL.REL.NOINC 0x3dd0 ; /* 0x000024e000007944 */ /* 0x003fea0003c00000 */ /*18f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1900*/ IADD3 R31, R9.reuse, c[0x0][0x1b8], RZ ; /* 0x00006e00091f7a10 */ /* 0x041fe20007ffe0ff */ /*1910*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x1b8] ; /* 0x00006e00ff007624 */ /* 0x000fe200078e00ff */ /*1920*/ MOV R74, 0x8 ; /* 0x00000008004a7802 */ /* 0x000fe20000000f00 */ /*1930*/ IMAD R29, R9, UR5, R2.reuse ; /* 0x00000005091d7c24 */ /* 0x100fe2000f8e0202 */ /*1940*/ LEA R56, P1, R63, c[0x0][0x180], 0x3 ; /* 0x000060003f387a11 */ /* 0x000fe200078218ff */ /*1950*/ IMAD R31, R31, UR5, R2 ; /* 0x000000051f1f7c24 */ /* 0x000fc4000f8e0202 */ /*1960*/ IMAD R33, R0, 0x6, RZ ; /* 0x0000000600217824 */ /* 0x000fe200078e02ff */ /*1970*/ LEA.HI.X R57, R63, c[0x0][0x184], R62, 0x3, P1 ; /* 0x000061003f397a11 */ /* 0x000fe200008f1c3e */ /*1980*/ IMAD R31, R31, UR4, R8 ; /* 0x000000041f1f7c24 */ /* 0x000fe4000f8e0208 */ /*1990*/ IMAD R33, R33, UR5, R2 ; /* 0x0000000521217c24 */ /* 0x000fe4000f8e0202 */ /*19a0*/ IMAD.WIDE R40, R31, R74, c[0x0][0x1a0] ; /* 0x000068001f287625 */ /* 0x000fc800078e024a */ /*19b0*/ IMAD R31, R35, UR5, R2 ; /* 0x00000005231f7c24 */ /* 0x000fe4000f8e0202 */ /*19c0*/ IMAD R29, R29, UR4, R8.reuse ; /* 0x000000041d1d7c24 */ /* 0x100fe4000f8e0208 */ /*19d0*/ IMAD R35, R31, UR4, R8.reuse ; /* 0x000000041f237c24 */ /* 0x100fe4000f8e0208 */ /*19e0*/ IMAD R31, R33, UR4, R8 ; /* 0x00000004211f7c24 */ /* 0x000fe4000f8e0208 */ /*19f0*/ IMAD.WIDE R28, R29, R74, c[0x0][0x1a0] ; /* 0x000068001d1c7625 */ /* 0x000fc800078e024a */ /*1a00*/ IMAD.WIDE R30, R31, R74.reuse, c[0x0][0x1a0] ; /* 0x000068001f1e7625 */ /* 0x080fe200078e024a */ /*1a10*/ STG.E.64 [R28.64], R36 ; /* 0x000000241c007986 */ /* 0x000fe6000c101b08 */ /*1a20*/ IMAD.WIDE R32, R35, R74, c[0x0][0x1a0] ; /* 0x0000680023207625 */ /* 0x000fe200078e024a */ /*1a30*/ STG.E.64 [R40.64], R38 ; /* 0x0000002628007986 */ /* 0x0001e6000c101b08 */ /*1a40*/ IMAD.WIDE R62, R3, 0x8, R66 ; /* 0x00000008033e7825 */ /* 0x000fe200078e0242 */ /*1a50*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000838387981 */ /* 0x000ea8000c1e1b00 */ /*1a60*/ LDG.E.64 R58, [R66.64] ; /* 0x00000008423a7981 */ /* 0x000ea8000c1e1b00 */ /*1a70*/ LDG.E.64 R30, [R30.64] ; /* 0x000000081e1e7981 */ /* 0x000ee8000c1e1b00 */ /*1a80*/ LDG.E.64 R32, [R32.64] ; /* 0x0000000820207981 */ /* 0x000f28000c1e1b00 */ /*1a90*/ LDG.E.64 R34, [R62.64] ; /* 0x000000083e227981 */ /* 0x000f28000c1e1b00 */ /*1aa0*/ LDG.E.64 R40, [R20.64+0x18] ; /* 0x0000180814287981 */ /* 0x001168000c1e1b00 */ /*1ab0*/ LDG.E.64 R42, [R20.64+0x20] ; /* 0x00002008142a7981 */ /* 0x000162000c1e1b00 */ /*1ac0*/ IMAD.SHL.U32 R10, R13, 0x8, RZ ; /* 0x000000080d0a7824 */ /* 0x000fe200078e00ff */ /*1ad0*/ DMUL R48, R14, R104 ; /* 0x000000680e307228 */ /* 0x0022040000000000 */ /*1ae0*/ IADD3 R14, R7, c[0x0][0x1b4], RZ ; /* 0x00006d00070e7a10 */ /* 0x002fe20007ffe0ff */ /*1af0*/ LDG.E.64 R36, [R54.64+0x18] ; /* 0x0000180836247981 */ /* 0x000362000c1e1b00 */ /*1b00*/ SHF.L.U64.HI R12, R13, 0x3, R12 ; /* 0x000000030d0c7819 */ /* 0x000fe4000001020c */ /*1b10*/ IADD3 R52, P1, R10, c[0x0][0x180], RZ ; /* 0x000060000a347a10 */ /* 0x000fe20007f3e0ff */ /*1b20*/ LDG.E.64 R38, [R54.64+0x20] ; /* 0x0000200836267981 */ /* 0x000362000c1e1b00 */ /*1b30*/ DMUL R44, R18, R104.reuse ; /* 0x00000068122c7228 */ /* 0x080e220000000000 */ /*1b40*/ IMAD R13, R14, c[0x0][0x1b0], R53 ; /* 0x00006c000e0d7a24 */ /* 0x000fe200078e0235 */ /*1b50*/ IADD3.X R53, R12, c[0x0][0x184], RZ, P1, !PT ; /* 0x000061000c357a10 */ /* 0x000fe40000ffe4ff */ /*1b60*/ DMUL R46, R16, R104 ; /* 0x00000068102e7228 */ /* 0x000e080000000000 */ /*1b70*/ DFMA R50, -R56, c[0x3][0xa0], R58 ; /* 0x00c0280038327a2b */ /* 0x004e88000000013a */ /*1b80*/ DFMA R54, R56, c[0x3][0xa0], R58 ; /* 0x00c0280038367a2b */ /* 0x002664000000003a */ /*1b90*/ MOV R56, R30 ; /* 0x0000001e00387202 */ /* 0x008fe20000000f00 */ /*1ba0*/ IMAD.MOV.U32 R57, RZ, RZ, R31 ; /* 0x000000ffff397224 */ /* 0x000fe200078e001f */ /*1bb0*/ MOV R58, R32 ; /* 0x00000020003a7202 */ /* 0x010fe20000000f00 */ /*1bc0*/ IMAD.MOV.U32 R59, RZ, RZ, R33 ; /* 0x000000ffff3b7224 */ /* 0x000fe200078e0021 */ /*1bd0*/ MOV R60, R34 ; /* 0x00000022003c7202 */ /* 0x000fe20000000f00 */ /*1be0*/ IMAD.MOV.U32 R61, RZ, RZ, R35 ; /* 0x000000ffff3d7224 */ /* 0x000fe200078e0023 */ /*1bf0*/ @!P0 BRA 0x2750 ; /* 0x00000b5000008947 */ /* 0x000fea0003800000 */ /*1c00*/ MOV R14, 0x2 ; /* 0x00000002000e7802 */ /* 0x007fe20000000f00 */ /*1c10*/ IMAD.WIDE R72, R3, 0x8, R62 ; /* 0x0000000803487825 */ /* 0x000fe200078e023e */ /*1c20*/ LDG.E.64 R64, [R64.64] ; /* 0x0000000840407981 */ /* 0x000f64000c1e1b00 */ /*1c30*/ IADD3 R56, -R14.reuse, c[0x0][0x1b4], RZ ; /* 0x00006d000e387a10 */ /* 0x040fe20007ffe1ff */ /*1c40*/ IMAD.WIDE R62, R13, R74, c[0x0][0x180] ; /* 0x000060000d3e7625 */ /* 0x000fe200078e024a */ /*1c50*/ IADD3 R59, -R14, c[0x0][0x1b0], RZ ; /* 0x00006c000e3b7a10 */ /* 0x000fe20007ffe1ff */ /*1c60*/ LDG.E.64 R72, [R72.64] ; /* 0x0000000848487981 */ /* 0x000ea4000c1e1b00 */ /*1c70*/ IMAD.SHL.U32 R13, R0, 0x8, RZ ; /* 0x00000008000d7824 */ /* 0x000fc400078e00ff */ /*1c80*/ LDG.E.64 R62, [R62.64] ; /* 0x000000083e3e7981 */ /* 0x000ea4000c1e1b00 */ /*1c90*/ IMAD R13, R56, R13, R2 ; /* 0x0000000d380d7224 */ /* 0x000fe400078e0202 */ /*1ca0*/ LDG.E.64 R66, [R52.64] ; /* 0x0000000834427981 */ /* 0x000164000c1e1b00 */ /*1cb0*/ IMAD R13, R59, R13, R8 ; /* 0x0000000d3b0d7224 */ /* 0x000fc800078e0208 */ /*1cc0*/ IMAD.WIDE R68, R13, R74, c[0x0][0x1a0] ; /* 0x000068000d447625 */ /* 0x000fcc00078e024a */ /*1cd0*/ LDG.E.64 R68, [R68.64] ; /* 0x0000000844447981 */ /* 0x000f68000c1e1b00 */ /*1ce0*/ S2R R19, SR_TID.X ; /* 0x0000000000137919 */ /* 0x000e680000002100 */ /*1cf0*/ S2R R57, SR_CTAID.X ; /* 0x0000000000397919 */ /* 0x000ee20000002500 */ /*1d00*/ IMAD R16, R0, c[0x0][0x1b4], RZ ; /* 0x00006d0000107a24 */ /* 0x000fe200078e02ff */ /*1d10*/ MOV R17, 0x3 ; /* 0x0000000300117802 */ /* 0x000fe20000000f00 */ /*1d20*/ IMAD R58, R56, c[0x0][0x1b8], RZ ; /* 0x00006e00383a7a24 */ /* 0x000fc400078e02ff */ /*1d30*/ IMAD.MOV.U32 R60, RZ, RZ, c[0x0][0x1b4] ; /* 0x00006d00ff3c7624 */ /* 0x000fe200078e00ff */ /*1d40*/ LEA R13, R0, 0x2, 0x2 ; /* 0x00000002000d7811 */ /* 0x000fc600078e10ff */ /*1d50*/ IMAD R17, R60.reuse, R17, -0x6 ; /* 0xfffffffa3c117424 */ /* 0x040fe400078e0211 */ /*1d60*/ IMAD R75, R60, 0x3, R2.reuse ; /* 0x000000033c4b7824 */ /* 0x100fe400078e0202 */ /*1d70*/ IMAD R17, R17, c[0x0][0x1b8], R2 ; /* 0x00006e0011117a24 */ /* 0x000fe400078e0202 */ /*1d80*/ IMAD R15, R16.reuse, 0x3, R19.reuse ; /* 0x00000003100f7824 */ /* 0x142fe200078e0213 */ /*1d90*/ LEA R16, R16, R19.reuse, 0x2 ; /* 0x0000001310107211 */ /* 0x080fe200078e10ff */ /*1da0*/ IMAD R14, R58.reuse, 0x2, R19.reuse ; /* 0x000000023a0e7824 */ /* 0x140fe200078e0213 */ /*1db0*/ LEA R18, R58.reuse, R19, 0x3 ; /* 0x000000133a127211 */ /* 0x040fe200078e18ff */ /*1dc0*/ IMAD R19, R58, 0x7, R19 ; /* 0x000000073a137824 */ /* 0x000fc400078e0213 */ /*1dd0*/ IMAD R70, R57.reuse, c[0x0][0x0], R15 ; /* 0x0000000039467a24 */ /* 0x048fe400078e020f */ /*1de0*/ IMAD R15, R56, R13, R2 ; /* 0x0000000d380f7224 */ /* 0x000fe400078e0202 */ /*1df0*/ IMAD R71, R57.reuse, c[0x0][0x0], R16 ; /* 0x0000000039477a24 */ /* 0x040fe400078e0210 */ /*1e00*/ IMAD R18, R57.reuse, c[0x0][0x0], R18 ; /* 0x0000000039127a24 */ /* 0x040fe400078e0212 */ /*1e10*/ IMAD R16, R57.reuse, c[0x0][0x0], R14 ; /* 0x0000000039107a24 */ /* 0x040fe400078e020e */ /*1e20*/ IMAD R19, R57, c[0x0][0x0], R19 ; /* 0x0000000039137a24 */ /* 0x000fc400078e0213 */ /*1e30*/ IMAD R14, R59.reuse, R15, R8.reuse ; /* 0x0000000f3b0e7224 */ /* 0x140fe400078e0208 */ /*1e40*/ IMAD R15, R59.reuse, R17, RZ ; /* 0x000000113b0f7224 */ /* 0x040fe400078e02ff */ /*1e50*/ IMAD R17, R59, R18, RZ ; /* 0x000000123b117224 */ /* 0x000fe200078e02ff */ /*1e60*/ IADD3 R81, R75, 0x1, RZ ; /* 0x000000014b517810 */ /* 0x000fe20007ffe0ff */ /*1e70*/ IMAD R18, R59, R19, RZ ; /* 0x000000133b127224 */ /* 0x000fe200078e02ff */ /*1e80*/ IADD3 R19, R0, -0x1, RZ ; /* 0xffffffff00137810 */ /* 0x000fe20007ffe0ff */ /*1e90*/ IMAD R0, R4, 0x5, R11 ; /* 0x0000000504007824 */ /* 0x000fe200078e020b */ /*1ea0*/ IADD3 R75, R70, 0x1, RZ ; /* 0x00000001464b7810 */ /* 0x000fe40007ffe0ff */ /*1eb0*/ IADD3 R77, R71, 0x1, RZ ; /* 0x00000001474d7810 */ /* 0x000fe20007ffe0ff */ /*1ec0*/ IMAD R110, R81, c[0x0][0x1b0], R8.reuse ; /* 0x00006c00516e7a24 */ /* 0x100fe200078e0208 */ /*1ed0*/ IADD3 R79, R0, 0x3, RZ ; /* 0x00000003004f7810 */ /* 0x000fe20007ffe0ff */ /*1ee0*/ IMAD R112, R75, c[0x0][0x1b0], R8 ; /* 0x00006c004b707a24 */ /* 0x000fc400078e0208 */ /*1ef0*/ IMAD R77, R77, c[0x0][0x1b0], R8.reuse ; /* 0x00006c004d4d7a24 */ /* 0x100fe200078e0208 */ /*1f00*/ MOV R60, R34 ; /* 0x00000022003c7202 */ /* 0x000fe20000000f00 */ /*1f10*/ IMAD R13, R59.reuse, R56, RZ ; /* 0x000000383b0d7224 */ /* 0x040fe200078e02ff */ /*1f20*/ MOV R58, R32 ; /* 0x00000020003a7202 */ /* 0x000fe20000000f00 */ /*1f30*/ IMAD R16, R59, R16, RZ ; /* 0x000000103b107224 */ /* 0x000fe200078e02ff */ /*1f40*/ MOV R56, R30 ; /* 0x0000001e00387202 */ /* 0x000fe20000000f00 */ /*1f50*/ IMAD R109, R5, 0xa, RZ ; /* 0x0000000a056d7824 */ /* 0x000fe200078e02ff */ /*1f60*/ IADD3 R110, R110, 0x1, RZ ; /* 0x000000016e6e7810 */ /* 0x000fe20007ffe0ff */ /*1f70*/ IMAD.MOV.U32 R108, RZ, RZ, R8 ; /* 0x000000ffff6c7224 */ /* 0x000fe200078e0008 */ /*1f80*/ IADD3 R112, R112, 0x1, RZ ; /* 0x0000000170707810 */ /* 0x000fe20007ffe0ff */ /*1f90*/ IMAD.MOV.U32 R61, RZ, RZ, R35 ; /* 0x000000ffff3d7224 */ /* 0x000fe200078e0023 */ /*1fa0*/ IADD3 R114, R77, 0x1, RZ ; /* 0x000000014d727810 */ /* 0x000fe20007ffe0ff */ /*1fb0*/ IMAD.MOV.U32 R59, RZ, RZ, R33 ; /* 0x000000ffff3b7224 */ /* 0x000fc400078e0021 */ /*1fc0*/ IMAD.MOV.U32 R57, RZ, RZ, R31 ; /* 0x000000ffff397224 */ /* 0x000fe400078e001f */ /*1fd0*/ IMAD.WIDE R74, R79, R74, c[0x0][0x198] ; /* 0x000066004f4a7625 */ /* 0x000fe200078e024a */ /*1fe0*/ UMOV UR4, 0x2 ; /* 0x0000000200047882 */ /* 0x000fe20000000000 */ /*1ff0*/ DFMA R70, R62, c[0x3][0xa0], R72 ; /* 0x00c028003e467a2b */ /* 0x0040480000000048 */ /*2000*/ DFMA R72, -R62, c[0x3][0xa0], R72 ; /* 0x00c028003e487a2b */ /* 0x0020880000000148 */ /*2010*/ MOV R97, 0x8 ; /* 0x0000000800617802 */ /* 0x000fe40000000f00 */ /*2020*/ ISETP.LE.AND P0, PT, R19, UR4, PT ; /* 0x0000000413007c0c */ /* 0x000fc6000bf03270 */ /*2030*/ IMAD.WIDE R86, R14, R97, c[0x0][0x1a0] ; /* 0x000068000e567625 */ /* 0x000fcc00078e0261 */ /*2040*/ IMAD.WIDE R76, R3.reuse, 0x8, R86 ; /* 0x00000008034c7825 */ /* 0x040fe200078e0256 */ /*2050*/ MOV R81, R65 ; /* 0x0000004100517202 */ /* 0x020fe20000000f00 */ /*2060*/ LDG.E.64 R86, [R86.64] ; /* 0x0000000856567981 */ /* 0x000f68000c1e1b00 */ /*2070*/ IMAD.WIDE R88, R3.reuse, 0x8, R76 ; /* 0x0000000803587825 */ /* 0x040fe400078e024c */ /*2080*/ LDG.E.64 R76, [R76.64] ; /* 0x000000084c4c7981 */ /* 0x000ee8000c1e1b00 */ /*2090*/ IMAD.WIDE R90, R3, 0x8, R88 ; /* 0x00000008035a7825 */ /* 0x000fc400078e0258 */ /*20a0*/ LDG.E.64 R88, [R88.64] ; /* 0x0000000858587981 */ /* 0x000f64000c1e1b00 */ /*20b0*/ @!P0 IMAD.WIDE R96, R110, R97, c[0x0][0x180] ; /* 0x000060006e608625 */ /* 0x000fe400078e0261 */ /*20c0*/ LDG.E.64 R78, [R90.64] ; /* 0x000000085a4e7981 */ /* 0x000324000c1e1b00 */ /*20d0*/ IMAD.MOV.U32 R80, RZ, RZ, R64 ; /* 0x000000ffff507224 */ /* 0x000fe400078e0040 */ /*20e0*/ @!P0 LDG.E.64 R96, [R96.64] ; /* 0x0000000860608981 */ /* 0x004ea2000c1e1b00 */ /*20f0*/ IMAD.WIDE R64, R3, 0x8, R90 ; /* 0x0000000803407825 */ /* 0x000fc800078e025a */ /*2100*/ IMAD.WIDE R98, R109, 0x8, R74 ; /* 0x000000086d627825 */ /* 0x000fe400078e024a */ /*2110*/ LDG.E.64 R64, [R64.64] ; /* 0x0000000840407981 */ /* 0x000f68000c1e1b00 */ /*2120*/ LDG.E.64 R82, [R98.64] ; /* 0x0000000862527981 */ /* 0x000168000c1e1b00 */ /*2130*/ LDG.E.64 R84, [R98.64+0x8] ; /* 0x0000080862547981 */ /* 0x000162000c1e1b00 */ /*2140*/ MUFU.RCP64H R95, R57 ; /* 0x00000039005f7308 */ /* 0x000e620000001800 */ /*2150*/ IADD3 R94, R57, 0x300402, RZ ; /* 0x00300402395e7810 */ /* 0x000fcc0007ffe0ff */ /*2160*/ DFMA R90, R94, -R56, 1 ; /* 0x3ff000005e5a742b */ /* 0x002e4c0000000838 */ /*2170*/ DFMA R92, R90, R90, R90 ; /* 0x0000005a5a5c722b */ /* 0x002e4c000000005a */ /*2180*/ DFMA R92, R94, R92, R94 ; /* 0x0000005c5e5c722b */ /* 0x002e62000000005e */ /*2190*/ FSETP.GEU.AND P1, PT, |R94|, 5.8789094863358348022e-39, PT ; /* 0x004004025e00780b */ /* 0x000fca0003f2e200 */ /*21a0*/ DFMA R104, R92, -R56, 1 ; /* 0x3ff000005c68742b */ /* 0x002e4c0000000838 */ /*21b0*/ DFMA R104, R92, R104, R92 ; /* 0x000000685c68722b */ /* 0x002862000000005c */ /*21c0*/ BSSY B0, 0x2310 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*21d0*/ IMAD.MOV.U32 R90, RZ, RZ, R76 ; /* 0x000000ffff5a7224 */ /* 0x008fe200078e004c */ /*21e0*/ MOV R91, R77 ; /* 0x0000004d005b7202 */ /* 0x000fe20000000f00 */ /*21f0*/ IMAD.MOV.U32 R92, RZ, RZ, R78 ; /* 0x000000ffff5c7224 */ /* 0x010fe200078e004e */ /*2200*/ MOV R93, R79 ; /* 0x0000004f005d7202 */ /* 0x000fc80000000f00 */ /*2210*/ @!P0 DFMA R76, -R66, c[0x3][0xa0], R90 ; /* 0x00c02800424c8a2b */ /* 0x000ec8000000015a */ /*2220*/ @!P0 DFMA R90, R66, c[0x3][0xa0], R90 ; /* 0x00c02800425a8a2b */ /* 0x000824000000005a */ /*2230*/ @!P0 IMAD.MOV.U32 R66, RZ, RZ, R62 ; /* 0x000000ffff428224 */ /* 0x010fe400078e003e */ /*2240*/ @!P0 DFMA R78, R96.reuse, c[0x3][0xa0], R92.reuse ; /* 0x00c02800604e8a2b */ /* 0x144522000000005c */ /*2250*/ @!P0 MOV R67, R63 ; /* 0x0000003f00438202 */ /* 0x000fe20000000f00 */ /*2260*/ @!P0 IMAD.MOV.U32 R62, RZ, RZ, R96 ; /* 0x000000ffff3e8224 */ /* 0x001fe400078e0060 */ /*2270*/ @!P0 DFMA R92, -R96, c[0x3][0xa0], R92 ; /* 0x00c02800605c8a2b */ /* 0x000422000000015c */ /*2280*/ @!P0 MOV R63, R97 ; /* 0x00000061003f8202 */ /* 0x000fe20000000f00 */ /*2290*/ @P1 BRA 0x2300 ; /* 0x0000006000001947 */ /* 0x000fea0003800000 */ /*22a0*/ LOP3.LUT R107, R57, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff396b7812 */ /* 0x01ffe200078ec0ff */ /*22b0*/ IMAD.MOV.U32 R100, RZ, RZ, R56 ; /* 0x000000ffff647224 */ /* 0x000fe200078e0038 */ /*22c0*/ MOV R101, R57 ; /* 0x0000003900657202 */ /* 0x000fc40000000f00 */ /*22d0*/ IADD3 R107, R107, -0x100000, RZ ; /* 0xfff000006b6b7810 */ /* 0x000fe40007ffe0ff */ /*22e0*/ MOV R0, 0x2300 ; /* 0x0000230000007802 */ /* 0x000fe40000000f00 */ /*22f0*/ CALL.REL.NOINC 0x3dd0 ; /* 0x00001ad000007944 */ /* 0x020fea0003c00000 */ /*2300*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x01ffea0003800000 */ /*2310*/ MUFU.RCP64H R103, R31 ; /* 0x0000001f00677308 */ /* 0x000e220000001800 */ /*2320*/ IADD3 R102, R31, 0x300402, RZ ; /* 0x003004021f667810 */ /* 0x000fe20007ffe0ff */ /*2330*/ DMUL R94, R104.reuse, R58 ; /* 0x0000003a685e7228 */ /* 0x040fe20000000000 */ /*2340*/ BSSY B0, 0x24b0 ; /* 0x0000016000007945 */ /* 0x000fe40003800000 */ /*2350*/ FSETP.GEU.AND P0, PT, |R102|, 5.8789094863358348022e-39, PT ; /* 0x004004026600780b */ /* 0x000fe20003f0e200 */ /*2360*/ DMUL R96, R104, R40 ; /* 0x0000002868607228 */ /* 0x000e480000000000 */ /*2370*/ DMUL R98, R104, R68 ; /* 0x0000004468627228 */ /* 0x000e880000000000 */ /*2380*/ DFMA R40, R96, -R50, R36 ; /* 0x800000326028722b */ /* 0x002fc80000000024 */ /*2390*/ DFMA R56, R102, -R30, 1 ; /* 0x3ff000006638742b */ /* 0x001e08000000081e */ /*23a0*/ DFMA R58, R98, -R50, R70 ; /* 0x80000032623a722b */ /* 0x004fc80000000046 */ /*23b0*/ DFMA R100, R56, R56, R56 ; /* 0x000000383864722b */ /* 0x001e080000000038 */ /*23c0*/ DFMA R56, R94, -R50, R60 ; /* 0x800000325e38722b */ /* 0x000fc8000000003c */ /*23d0*/ DFMA R100, R102, R100, R102 ; /* 0x000000646664722b */ /* 0x001e080000000066 */ /*23e0*/ DFMA R50, -R86, R94, R76 ; /* 0x0000005e5632722b */ /* 0x020fc8000000014c */ /*23f0*/ DFMA R60, R100, -R30, 1 ; /* 0x3ff00000643c742b */ /* 0x001e08000000081e */ /*2400*/ DFMA R36, -R86, R96, R82 ; /* 0x000000605624722b */ /* 0x0002880000000152 */ /*2410*/ DFMA R104, R100, R60, R100 ; /* 0x0000003c6468722b */ /* 0x0012080000000064 */ /*2420*/ DFMA R60, -R86, R98, R88 ; /* 0x00000062563c722b */ /* 0x0002e20000000158 */ /*2430*/ @P0 BRA 0x24a0 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*2440*/ LOP3.LUT R107, R31, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff1f6b7812 */ /* 0x005fe200078ec0ff */ /*2450*/ IMAD.MOV.U32 R100, RZ, RZ, R30 ; /* 0x000000ffff647224 */ /* 0x002fe200078e001e */ /*2460*/ MOV R101, R31 ; /* 0x0000001f00657202 */ /* 0x000fe40000000f00 */ /*2470*/ IADD3 R107, R107, -0x100000, RZ ; /* 0xfff000006b6b7810 */ /* 0x000fe40007ffe0ff */ /*2480*/ MOV R0, 0x24a0 ; /* 0x000024a000007802 */ /* 0x000fe40000000f00 */ /*2490*/ CALL.REL.NOINC 0x3dd0 ; /* 0x0000193000007944 */ /* 0x008fea0003c00000 */ /*24a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x005fea0003800000 */ /*24b0*/ DMUL R68, R104.reuse, R68 ; /* 0x0000004468447228 */ /* 0x042e220000000000 */ /*24c0*/ MOV R101, 0x8 ; /* 0x0000000800657802 */ /* 0x000fe20000000f00 */ /*24d0*/ IMAD.IADD R0, R18, 0x1, R108.reuse ; /* 0x0000000112007824 */ /* 0x100fe200078e026c */ /*24e0*/ UIADD3 UR5, UR4, -0x1, URZ ; /* 0xffffffff04057890 */ /* 0x000fe2000fffe03f */ /*24f0*/ DMUL R70, R104, R32 ; /* 0x0000002068467228 */ /* 0x000e620000000000 */ /*2500*/ IMAD.IADD R102, R16, 0x1, R108.reuse ; /* 0x0000000110667824 */ /* 0x100fe200078e026c */ /*2510*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fe2000fffe03f */ /*2520*/ IMAD.IADD R82, R15, 0x1, R108 ; /* 0x000000010f527824 */ /* 0x000fe200078e026c */ /*2530*/ DFMA R32, R68, -R54, R72 ; /* 0x800000364420722b */ /* 0x0011e20000000048 */ /*2540*/ IMAD.WIDE R102, R102, R101, c[0x0][0x1a0] ; /* 0x0000680066667625 */ /* 0x000fe200078e0265 */ /*2550*/ IADD3 R72, R17, R108, RZ ; /* 0x0000006c11487210 */ /* 0x001fc40007ffe0ff */ /*2560*/ DFMA R30, R70, -R54, R34 ; /* 0x80000036461e722b */ /* 0x0021e20000000022 */ /*2570*/ IMAD.WIDE R76, R112, R101.reuse, c[0x0][0x1a8] ; /* 0x00006a00704c7625 */ /* 0x080fe200078e0265 */ /*2580*/ ISETP.LE.AND P0, PT, R9, UR5, PT ; /* 0x0000000509007c0c */ /* 0x000fe4000bf03270 */ /*2590*/ DMUL R104, R104, R42 ; /* 0x0000002a68687228 */ /* 0x000e620000000000 */ /*25a0*/ IMAD.WIDE R34, R0, R101, c[0x0][0x1a0] ; /* 0x0000680000227625 */ /* 0x001fe200078e0265 */ /*25b0*/ IADD3 R14, R13, R14, RZ ; /* 0x0000000e0d0e7210 */ /* 0x000fe40007ffe0ff */ /*25c0*/ IADD3 R109, R6, R109, RZ ; /* 0x0000006d066d7210 */ /* 0x000fe20007ffe0ff */ /*25d0*/ IMAD.WIDE R72, R72, R101.reuse, c[0x0][0x1a0] ; /* 0x0000680048487625 */ /* 0x080fe200078e0265 */ /*25e0*/ STG.E.64 [R34.64], R94 ; /* 0x0000005e22007986 */ /* 0x0001e2000c101b08 */ /*25f0*/ DFMA R42, R104, -R54, R38 ; /* 0x80000036682a722b */ /* 0x002e620000000026 */ /*2600*/ IADD3 R112, R5, R112, RZ ; /* 0x0000007005707210 */ /* 0x000fe20007ffe0ff */ /*2610*/ IMAD.WIDE R82, R82, R101, c[0x0][0x1a0] ; /* 0x0000680052527625 */ /* 0x000fe200078e0265 */ /*2620*/ STG.E.64 [R102.64], R70 ; /* 0x0000004666007986 */ /* 0x0005e2000c101b08 */ /*2630*/ DFMA R38, -R86, R104, R84 ; /* 0x000000685626722b */ /* 0x000f040000000154 */ /*2640*/ IMAD.WIDE R100, R114, R101, c[0x0][0x1a8] ; /* 0x00006a0072647625 */ /* 0x000fe200078e0265 */ /*2650*/ STG.E.64 [R76.64], R96 ; /* 0x000000604c007986 */ /* 0x000fe2000c101b08 */ /*2660*/ DFMA R54, -R86.reuse, R70, R90 ; /* 0x000000465636722b */ /* 0x0404e4000000015a */ /*2670*/ IMAD.IADD R110, R5, 0x1, R110 ; /* 0x00000001056e7824 */ /* 0x000fe200078e026e */ /*2680*/ STG.E.64 [R72.64], R98 ; /* 0x0000006248007986 */ /* 0x000be2000c101b08 */ /*2690*/ IMAD.IADD R108, R13, 0x1, R108 ; /* 0x000000010d6c7824 */ /* 0x000fe200078e026c */ /*26a0*/ DFMA R34, -R86, R68, R88 ; /* 0x000000445622722b */ /* 0x0010220000000158 */ /*26b0*/ IMAD.IADD R114, R5, 0x1, R114 ; /* 0x0000000105727824 */ /* 0x000fe200078e0272 */ /*26c0*/ STG.E.64 [R82.64], R68 ; /* 0x0000004452007986 */ /* 0x0001e2000c101b08 */ /*26d0*/ IMAD.MOV.U32 R70, RZ, RZ, R78 ; /* 0x000000ffff467224 */ /* 0x004fe200078e004e */ /*26e0*/ MOV R71, R79 ; /* 0x0000004f00477202 */ /* 0x000fc40000000f00 */ /*26f0*/ STG.E.64 [R100.64], R104 ; /* 0x0000006864007986 */ /* 0x0005e2000c101b08 */ /*2700*/ IMAD.MOV.U32 R72, RZ, RZ, R92 ; /* 0x000000ffff487224 */ /* 0x020fe200078e005c */ /*2710*/ MOV R73, R93 ; /* 0x0000005d00497202 */ /* 0x000fe40000000f00 */ /*2720*/ MOV R68, R80 ; /* 0x0000005000447202 */ /* 0x001fe20000000f00 */ /*2730*/ IMAD.MOV.U32 R69, RZ, RZ, R81 ; /* 0x000000ffff457224 */ /* 0x000fe200078e0051 */ /*2740*/ @!P0 BRA 0x2010 ; /* 0xfffff8c000008947 */ /* 0x01afea000383ffff */ /*2750*/ MUFU.RCP64H R15, R57 ; /* 0x00000039000f7308 */ /* 0x007e220000001800 */ /*2760*/ IADD3 R14, R57, 0x300402, RZ ; /* 0x00300402390e7810 */ /* 0x000fe20007ffe0ff */ /*2770*/ BSSY B0, 0x2860 ; /* 0x000000e000007945 */ /* 0x000fe60003800000 */ /*2780*/ FSETP.GEU.AND P0, PT, |R14|, 5.8789094863358348022e-39, PT ; /* 0x004004020e00780b */ /* 0x000fc40003f0e200 */ /*2790*/ DFMA R16, R14, -R56, 1 ; /* 0x3ff000000e10742b */ /* 0x001e0c0000000838 */ /*27a0*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */ /* 0x001e0c0000000010 */ /*27b0*/ DFMA R16, R14, R16, R14 ; /* 0x000000100e10722b */ /* 0x001e0c000000000e */ /*27c0*/ DFMA R18, R16, -R56, 1 ; /* 0x3ff000001012742b */ /* 0x001e0c0000000838 */ /*27d0*/ DFMA R104, R16, R18, R16 ; /* 0x000000121068722b */ /* 0x0010620000000010 */ /*27e0*/ @P0 BRA 0x2850 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*27f0*/ LOP3.LUT R107, R57, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff396b7812 */ /* 0x000fe200078ec0ff */ /*2800*/ IMAD.MOV.U32 R101, RZ, RZ, R57 ; /* 0x000000ffff657224 */ /* 0x000fe200078e0039 */ /*2810*/ MOV R100, R56 ; /* 0x0000003800647202 */ /* 0x000fe40000000f00 */ /*2820*/ IADD3 R107, R107, -0x100000, RZ ; /* 0xfff000006b6b7810 */ /* 0x000fe40007ffe0ff */ /*2830*/ MOV R0, 0x2850 ; /* 0x0000285000007802 */ /* 0x000fe40000000f00 */ /*2840*/ CALL.REL.NOINC 0x3dd0 ; /* 0x0000158000007944 */ /* 0x023fea0003c00000 */ /*2850*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2860*/ MUFU.RCP64H R15, R31 ; /* 0x0000001f000f7308 */ /* 0x000ea20000001800 */ /*2870*/ IADD3 R14, R31, 0x300402, RZ ; /* 0x003004021f0e7810 */ /* 0x000fe20007ffe0ff */ /*2880*/ DMUL R18, R104.reuse, R58 ; /* 0x0000003a68127228 */ /* 0x043fe20000000000 */ /*2890*/ BSSY B0, 0x29b0 ; /* 0x0000011000007945 */ /* 0x000fe40003800000 */ /*28a0*/ FSETP.GEU.AND P0, PT, |R14|, 5.8789094863358348022e-39, PT ; /* 0x004004020e00780b */ /* 0x000fe20003f0e200 */ /*28b0*/ DMUL R40, R104, R40 ; /* 0x0000002868287228 */ /* 0x020e0c0000000000 */ /*28c0*/ DFMA R36, R40, -R50, R36 ; /* 0x800000322824722b */ /* 0x001fc80000000024 */ /*28d0*/ DFMA R16, R14, -R30, 1 ; /* 0x3ff000000e10742b */ /* 0x004e0c000000081e */ /*28e0*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */ /* 0x001e0c0000000010 */ /*28f0*/ DFMA R56, R14, R16, R14 ; /* 0x000000100e38722b */ /* 0x001e08000000000e */ /*2900*/ DFMA R16, R18, -R50, R60 ; /* 0x800000321210722b */ /* 0x000fc8000000003c */ /*2910*/ DFMA R58, R56, -R30, 1 ; /* 0x3ff00000383a742b */ /* 0x001e0c000000081e */ /*2920*/ DFMA R104, R56, R58, R56 ; /* 0x0000003a3868722b */ /* 0x0010620000000038 */ /*2930*/ @P0 BRA 0x29a0 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*2940*/ LOP3.LUT R107, R31, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff1f6b7812 */ /* 0x000fe200078ec0ff */ /*2950*/ IMAD.MOV.U32 R101, RZ, RZ, R31 ; /* 0x000000ffff657224 */ /* 0x000fe200078e001f */ /*2960*/ MOV R100, R30 ; /* 0x0000001e00647202 */ /* 0x000fe40000000f00 */ /*2970*/ IADD3 R107, R107, -0x100000, RZ ; /* 0xfff000006b6b7810 */ /* 0x000fe40007ffe0ff */ /*2980*/ MOV R0, 0x29a0 ; /* 0x000029a000007802 */ /* 0x000fe40000000f00 */ /*2990*/ CALL.REL.NOINC 0x3dd0 ; /* 0x0000143000007944 */ /* 0x003fea0003c00000 */ /*29a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*29b0*/ MUFU.RCP64H R15, R17 ; /* 0x00000011000f7308 */ /* 0x000ea20000001800 */ /*29c0*/ MOV R14, 0x1 ; /* 0x00000001000e7802 */ /* 0x000fe20000000f00 */ /*29d0*/ DMUL R32, R104.reuse, R32 ; /* 0x0000002068207228 */ /* 0x042e620000000000 */ /*29e0*/ FSETP.GEU.AND P1, PT, |R37|, 6.5827683646048100446e-37, PT ; /* 0x036000002500780b */ /* 0x000fe20003f2e200 */ /*29f0*/ BSSY B0, 0x2b70 ; /* 0x0000017000007945 */ /* 0x000fe40003800000 */ /*2a00*/ DMUL R42, R104, R42 ; /* 0x0000002a682a7228 */ /* 0x000ec80000000000 */ /*2a10*/ DFMA R56, R32, -R54, R34 ; /* 0x800000362038722b */ /* 0x003fc80000000022 */ /*2a20*/ DFMA R38, R42, -R54, R38 ; /* 0x800000362a26722b */ /* 0x008fc80000000026 */ /*2a30*/ DFMA R30, -R16, R14, 1 ; /* 0x3ff00000101e742b */ /* 0x004e0c000000010e */ /*2a40*/ DFMA R30, R30, R30, R30 ; /* 0x0000001e1e1e722b */ /* 0x001e0c000000001e */ /*2a50*/ DFMA R30, R14, R30, R14 ; /* 0x0000001e0e1e722b */ /* 0x001e0c000000000e */ /*2a60*/ DFMA R14, -R16, R30, 1 ; /* 0x3ff00000100e742b */ /* 0x001e0c000000011e */ /*2a70*/ DFMA R14, R30, R14, R30 ; /* 0x0000000e1e0e722b */ /* 0x001e0c000000001e */ /*2a80*/ DMUL R30, R36, R14 ; /* 0x0000000e241e7228 */ /* 0x001e0c0000000000 */ /*2a90*/ DFMA R50, -R16, R30, R36 ; /* 0x0000001e1032722b */ /* 0x001e0c0000000124 */ /*2aa0*/ DFMA R14, R14, R50, R30 ; /* 0x000000320e0e722b */ /* 0x001e14000000001e */ /*2ab0*/ FFMA R0, RZ, R17, R15 ; /* 0x00000011ff007223 */ /* 0x001fca000000000f */ /*2ac0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*2ad0*/ @P0 BRA P1, 0x2b60 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*2ae0*/ IMAD.MOV.U32 R34, RZ, RZ, R36 ; /* 0x000000ffff227224 */ /* 0x000fe200078e0024 */ /*2af0*/ MOV R35, R37 ; /* 0x0000002500237202 */ /* 0x000fe20000000f00 */ /*2b00*/ IMAD.MOV.U32 R14, RZ, RZ, R16 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e0010 */ /*2b10*/ MOV R15, R17 ; /* 0x00000011000f7202 */ /* 0x000fe40000000f00 */ /*2b20*/ MOV R0, 0x2b40 ; /* 0x00002b4000007802 */ /* 0x000fe40000000f00 */ /*2b30*/ CALL.REL.NOINC 0x4060 ; /* 0x0000152000007944 */ /* 0x000fea0003c00000 */ /*2b40*/ IMAD.MOV.U32 R14, RZ, RZ, R16 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e0010 */ /*2b50*/ MOV R15, R17 ; /* 0x00000011000f7202 */ /* 0x000fe40000000f00 */ /*2b60*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2b70*/ MUFU.RCP64H R17, R57 ; /* 0x0000003900117308 */ /* 0x000e220000001800 */ /*2b80*/ IMAD.MOV.U32 R16, RZ, RZ, 0x1 ; /* 0x00000001ff107424 */ /* 0x000fe200078e00ff */ /*2b90*/ FSETP.GEU.AND P1, PT, |R39|, 6.5827683646048100446e-37, PT ; /* 0x036000002700780b */ /* 0x000fe20003f2e200 */ /*2ba0*/ BSSY B0, 0x2cf0 ; /* 0x0000014000007945 */ /* 0x000fe80003800000 */ /*2bb0*/ DFMA R30, -R56, R16, 1 ; /* 0x3ff00000381e742b */ /* 0x001e0c0000000110 */ /*2bc0*/ DFMA R30, R30, R30, R30 ; /* 0x0000001e1e1e722b */ /* 0x001e0c000000001e */ /*2bd0*/ DFMA R30, R16, R30, R16 ; /* 0x0000001e101e722b */ /* 0x001e0c0000000010 */ /*2be0*/ DFMA R16, -R56, R30, 1 ; /* 0x3ff000003810742b */ /* 0x001e0c000000011e */ /*2bf0*/ DFMA R16, R30, R16, R30 ; /* 0x000000101e10722b */ /* 0x001e0c000000001e */ /*2c00*/ DMUL R30, R38, R16 ; /* 0x00000010261e7228 */ /* 0x001e0c0000000000 */ /*2c10*/ DFMA R34, -R56, R30, R38 ; /* 0x0000001e3822722b */ /* 0x001e0c0000000126 */ /*2c20*/ DFMA R16, R16, R34, R30 ; /* 0x000000221010722b */ /* 0x001064000000001e */ /*2c30*/ MOV R30, R14 ; /* 0x0000000e001e7202 */ /* 0x001fe20000000f00 */ /*2c40*/ IMAD.MOV.U32 R31, RZ, RZ, R15 ; /* 0x000000ffff1f7224 */ /* 0x000fce00078e000f */ /*2c50*/ FFMA R0, RZ, R57, R17 ; /* 0x00000039ff007223 */ /* 0x002fca0000000011 */ /*2c60*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*2c70*/ @P0 BRA P1, 0x2ce0 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*2c80*/ MOV R34, R38 ; /* 0x0000002600227202 */ /* 0x000fe20000000f00 */ /*2c90*/ IMAD.MOV.U32 R35, RZ, RZ, R39 ; /* 0x000000ffff237224 */ /* 0x000fe200078e0027 */ /*2ca0*/ MOV R14, R56 ; /* 0x00000038000e7202 */ /* 0x000fe20000000f00 */ /*2cb0*/ IMAD.MOV.U32 R15, RZ, RZ, R57 ; /* 0x000000ffff0f7224 */ /* 0x000fe200078e0039 */ /*2cc0*/ MOV R0, 0x2ce0 ; /* 0x00002ce000007802 */ /* 0x000fe40000000f00 */ /*2cd0*/ CALL.REL.NOINC 0x4060 ; /* 0x0000138000007944 */ /* 0x000fea0003c00000 */ /*2ce0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2cf0*/ LDG.E.64 R28, [R28.64] ; /* 0x000000081c1c7981 */ /* 0x000ea2000c1e1b00 */ /*2d00*/ MOV R14, c[0x0][0x1b8] ; /* 0x00006e00000e7a02 */ /* 0x000fe20000000f00 */ /*2d10*/ DFMA R18, -R18, R30, R40 ; /* 0x0000001e1212722b */ /* 0x0000620000000128 */ /*2d20*/ IMAD.MOV.U32 R38, RZ, RZ, R16 ; /* 0x000000ffff267224 */ /* 0x000fe200078e0010 */ /*2d30*/ MOV R39, R17 ; /* 0x0000001100277202 */ /* 0x000fe40000000f00 */ /*2d40*/ ISETP.GT.AND P0, PT, R14, 0x2, PT ; /* 0x000000020e00780c */ /* 0x000fe20003f04270 */ /*2d50*/ DFMA R32, -R32, R16, R42 ; /* 0x000000102020722b */ /* 0x0000c8000000012a */ /*2d60*/ DFMA R22, R44, -R28, R22 ; /* 0x8000001c2c16722b */ /* 0x0040880000000016 */ /*2d70*/ DFMA R24, R46, -R28, R24 ; /* 0x8000001c2e18722b */ /* 0x0001080000000018 */ /*2d80*/ DFMA R26, R48, -R28, R26 ; /* 0x8000001c301a722b */ /* 0x000022000000001a */ /*2d90*/ @!P0 BRA 0x3920 ; /* 0x00000b8000008947 */ /* 0x000fea0003800000 */ /*2da0*/ MOV R75, 0x5 ; /* 0x00000005004b7802 */ /* 0x01efe20000000f00 */ /*2db0*/ IMAD.IADD R0, R8, 0x1, R4 ; /* 0x0000000108007824 */ /* 0x000fe200078e0204 */ /*2dc0*/ UMOV UR5, 0x2 ; /* 0x0000000200057882 */ /* 0x000fe20000000000 */ /*2dd0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x5 ; /* 0x00000005ff0d7424 */ /* 0x000fe200078e00ff */ /*2de0*/ ULDC.64 UR6, c[0x0][0x1b0] ; /* 0x00006c0000067ab9 */ /* 0x000fe20000000a00 */ /*2df0*/ MOV R15, 0x9 ; /* 0x00000009000f7802 */ /* 0x000fe20000000f00 */ /*2e00*/ IMAD R75, R0, R75, 0x5 ; /* 0x00000005004b7424 */ /* 0x000fe200078e024b */ /*2e10*/ UIADD3 UR6, -UR5, UR6, URZ ; /* 0x0000000605067290 */ /* 0x000fe2000fffe13f */ /*2e20*/ IMAD R0, R14.reuse, R13, -0x5 ; /* 0xfffffffb0e007424 */ /* 0x040fe200078e020d */ /*2e30*/ UIADD3 UR5, -UR5, UR7, URZ ; /* 0x0000000705057290 */ /* 0x000fe2000fffe13f */ /*2e40*/ IADD3 R79, R14.reuse, -0x3, RZ ; /* 0xfffffffd0e4f7810 */ /* 0x040fe20007ffe0ff */ /*2e50*/ IMAD R15, R14.reuse, R15, -0x3 ; /* 0xfffffffd0e0f7424 */ /* 0x040fe200078e020f */ /*2e60*/ LEA R13, R14.reuse, 0xfffffffd, 0x3 ; /* 0xfffffffd0e0d7811 */ /* 0x040fe200078e18ff */ /*2e70*/ IMAD R75, R5, R0, R75 ; /* 0x00000000054b7224 */ /* 0x000fe200078e024b */ /*2e80*/ IADD3 R77, R14, -0x1, RZ ; /* 0xffffffff0e4d7810 */ /* 0x000fe20007ffe0ff */ /*2e90*/ IMAD R0, R79.reuse, c[0x0][0x1b4], R2.reuse ; /* 0x00006d004f007a24 */ /* 0x140fe200078e0202 */ /*2ea0*/ UMOV UR4, 0x2 ; /* 0x0000000200047882 */ /* 0x000fe20000000000 */ /*2eb0*/ IMAD R79, R79, UR5, R2.reuse ; /* 0x000000054f4f7c24 */ /* 0x100fe2000f8e0202 */ /*2ec0*/ UIADD3 UR4, UR4, -UR7, URZ ; /* 0x8000000704047290 */ /* 0x000fe2000fffe03f */ /*2ed0*/ IMAD R81, R13, UR5, R2.reuse ; /* 0x000000050d517c24 */ /* 0x100fe2000f8e0202 */ /*2ee0*/ IADD3 R13, R0, 0x1, RZ ; /* 0x00000001000d7810 */ /* 0x000fe20007ffe0ff */ /*2ef0*/ IMAD R83, R15, UR5, R2.reuse ; /* 0x000000050f537c24 */ /* 0x100fe2000f8e0202 */ /*2f00*/ MOV R42, R38 ; /* 0x00000026002a7202 */ /* 0x001fe20000000f00 */ /*2f10*/ IMAD R2, R77, c[0x0][0x1b4], R2 ; /* 0x00006d004d027a24 */ /* 0x000fe200078e0202 */ /*2f20*/ MOV R40, R30 ; /* 0x0000001e00287202 */ /* 0x000fe20000000f00 */ /*2f30*/ IMAD R13, R13, c[0x0][0x1b0], R8.reuse ; /* 0x00006c000d0d7a24 */ /* 0x100fe200078e0208 */ /*2f40*/ MOV R29, R49 ; /* 0x00000031001d7202 */ /* 0x000fe20000000f00 */ /*2f50*/ IMAD R78, R14, c[0x0][0x1b4], RZ ; /* 0x00006d000e4e7a24 */ /* 0x000fe200078e02ff */ /*2f60*/ IADD3 R15, R2, 0x1, RZ ; /* 0x00000001020f7810 */ /* 0x000fe20007ffe0ff */ /*2f70*/ IMAD.MOV.U32 R43, RZ, RZ, R39 ; /* 0x000000ffff2b7224 */ /* 0x000fe200078e0027 */ /*2f80*/ MOV R57, R47 ; /* 0x0000002f00397202 */ /* 0x000fe20000000f00 */ /*2f90*/ IMAD.MOV.U32 R41, RZ, RZ, R31 ; /* 0x000000ffff297224 */ /* 0x000fe200078e001f */ /*2fa0*/ MOV R55, R45 ; /* 0x0000002d00377202 */ /* 0x000fe20000000f00 */ /*2fb0*/ IMAD R15, R15, c[0x0][0x1b0], R8 ; /* 0x00006c000f0f7a24 */ /* 0x000fe200078e0208 */ /*2fc0*/ IADD3 R80, R13, 0x1, RZ ; /* 0x000000010d507810 */ /* 0x000fe20007ffe0ff */ /*2fd0*/ IMAD.MOV.U32 R28, RZ, RZ, R48 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e0030 */ /*2fe0*/ UIMAD UR4, UR6, UR4, URZ ; /* 0x00000004060472a4 */ /* 0x000fe2000f8e023f */ /*2ff0*/ IMAD.MOV.U32 R56, RZ, RZ, R46 ; /* 0x000000ffff387224 */ /* 0x000fe200078e002e */ /*3000*/ IADD3 R85, R15, 0x1, RZ ; /* 0x000000010f557810 */ /* 0x000fe20007ffe0ff */ /*3010*/ IMAD.MOV.U32 R54, RZ, RZ, R44 ; /* 0x000000ffff367224 */ /* 0x000fc400078e002c */ /*3020*/ IMAD.MOV.U32 R76, RZ, RZ, R8 ; /* 0x000000ffff4c7224 */ /* 0x000fe400078e0008 */ /*3030*/ IMAD R78, R78, c[0x0][0x1b0], RZ ; /* 0x00006c004e4e7a24 */ /* 0x000fe400078e02ff */ /*3040*/ IMAD R79, R79, UR6, RZ ; /* 0x000000064f4f7c24 */ /* 0x000fe4000f8e02ff */ /*3050*/ IMAD R81, R81, UR6, RZ ; /* 0x0000000651517c24 */ /* 0x000fe4000f8e02ff */ /*3060*/ IMAD R83, R83, UR6, RZ ; /* 0x0000000653537c24 */ /* 0x000fe4000f8e02ff */ /*3070*/ MOV R2, 0x8 ; /* 0x0000000800027802 */ /* 0x000fe20000000f00 */ /*3080*/ IMAD.IADD R15, R79, 0x1, R76.reuse ; /* 0x000000014f0f7824 */ /* 0x100fe200078e024c */ /*3090*/ IADD3 R47, R81, R76, RZ ; /* 0x0000004c512f7210 */ /* 0x000fe20007ffe0ff */ /*30a0*/ IMAD.IADD R49, R83, 0x1, R76 ; /* 0x0000000153317824 */ /* 0x000fc400078e024c */ /*30b0*/ IMAD.WIDE R30, R80, R2, c[0x0][0x1a8] ; /* 0x00006a00501e7625 */ /* 0x000fc800078e0202 */ /*30c0*/ IMAD.WIDE R14, R15, R2, c[0x0][0x1a0] ; /* 0x000068000f0e7625 */ /* 0x000fc800078e0202 */ /*30d0*/ IMAD.WIDE R36, R78.reuse, 0x8, R30 ; /* 0x000000084e247825 */ /* 0x040fe400078e021e */ /*30e0*/ LDG.E.64 R30, [R30.64] ; /* 0x000000081e1e7981 */ /* 0x000ea4000c1e1b00 */ /*30f0*/ IMAD.WIDE R16, R3, 0x8, R14 ; /* 0x0000000803107825 */ /* 0x000fe400078e020e */ /*3100*/ LDG.E.64 R14, [R14.64] ; /* 0x000000080e0e7981 */ /* 0x000ea4000c1e1b00 */ /*3110*/ IMAD.WIDE R38, R78.reuse, 0x8, R36 ; /* 0x000000084e267825 */ /* 0x040fe400078e0224 */ /*3120*/ LDG.E.64 R36, [R36.64] ; /* 0x0000000824247981 */ /* 0x000ee8000c1e1b00 */ /*3130*/ IMAD.WIDE R44, R78, 0x8, R38 ; /* 0x000000084e2c7825 */ /* 0x000fe200078e0226 */ /*3140*/ LDG.E.64 R34, [R16.64] ; /* 0x0000000810227981 */ /* 0x000f26000c1e1b00 */ /*3150*/ IMAD.WIDE R46, R47, R2, c[0x0][0x1a0] ; /* 0x000068002f2e7625 */ /* 0x000fe200078e0202 */ /*3160*/ LDG.E.64 R38, [R38.64] ; /* 0x0000000826267981 */ /* 0x000f66000c1e1b00 */ /*3170*/ IMAD.WIDE R58, R3, 0x8, R16 ; /* 0x00000008033a7825 */ /* 0x000fc400078e0210 */ /*3180*/ LDG.E.64 R46, [R46.64] ; /* 0x000000082e2e7981 */ /* 0x000f24000c1e1b00 */ /*3190*/ IMAD.WIDE R50, R78, 0x8, R44 ; /* 0x000000084e327825 */ /* 0x000fe400078e022c */ /*31a0*/ LDG.E.64 R44, [R44.64] ; /* 0x000000082c2c7981 */ /* 0x000f24000c1e1b00 */ /*31b0*/ IMAD.WIDE R48, R49, R2, c[0x0][0x1a0] ; /* 0x0000680031307625 */ /* 0x000fe400078e0202 */ /*31c0*/ LDG.E.64 R60, [R58.64] ; /* 0x000000083a3c7981 */ /* 0x000f24000c1e1b00 */ /*31d0*/ IMAD.WIDE R62, R3, 0x8, R58 ; /* 0x00000008033e7825 */ /* 0x000fc400078e023a */ /*31e0*/ LDG.E.64 R50, [R50.64] ; /* 0x0000000832327981 */ /* 0x000f28000c1e1b00 */ /*31f0*/ LDG.E.64 R48, [R48.64] ; /* 0x0000000830307981 */ /* 0x000f28000c1e1b00 */ /*3200*/ LDG.E.64 R62, [R62.64] ; /* 0x000000083e3e7981 */ /* 0x000f22000c1e1b00 */ /*3210*/ IADD3 R0, R9, 0x1, RZ ; /* 0x0000000109007810 */ /* 0x000fc80007ffe0ff */ /*3220*/ ISETP.GE.AND P0, PT, R0, R77, PT ; /* 0x0000004d0000720c */ /* 0x000fe20003f06270 */ /*3230*/ DFMA R30, -R14, R22, R30 ; /* 0x000000160e1e722b */ /* 0x004f08000000011e */ /*3240*/ DFMA R36, -R14, R24, R36 ; /* 0x000000180e24722b */ /* 0x008e080000000124 */ /*3250*/ DFMA R38, -R14, R26, R38 ; /* 0x0000001a0e26722b */ /* 0x020e480000000126 */ /*3260*/ DFMA R14, R54, -R34, R30 ; /* 0x80000022360e722b */ /* 0x010fc8000000001e */ /*3270*/ DFMA R44, -R46, R18, R44 ; /* 0x000000122e2c722b */ /* 0x000e88000000012c */ /*3280*/ DFMA R50, -R60, R32, R50 ; /* 0x000000203c32722b */ /* 0x000ec80000000132 */ /*3290*/ DFMA R36, R56, -R34, R36 ; /* 0x800000223824722b */ /* 0x001e080000000024 */ /*32a0*/ DFMA R34, R28, -R34, R38 ; /* 0x800000221c22722b */ /* 0x002e480000000026 */ /*32b0*/ DFMA R16, R40, -R48, R44 ; /* 0x800000302810722b */ /* 0x004508000000002c */ /*32c0*/ DFMA R50, R42, -R62, R50 ; /* 0x8000003e2a32722b */ /* 0x008ee20000000032 */ /*32d0*/ MOV R44, R22 ; /* 0x00000016002c7202 */ /* 0x004fe20000000f00 */ /*32e0*/ IMAD.MOV.U32 R45, RZ, RZ, R23 ; /* 0x000000ffff2d7224 */ /* 0x000fe200078e0017 */ /*32f0*/ MOV R46, R24 ; /* 0x00000018002e7202 */ /* 0x000fe20000000f00 */ /*3300*/ IMAD.MOV.U32 R47, RZ, RZ, R25 ; /* 0x000000ffff2f7224 */ /* 0x000fe200078e0019 */ /*3310*/ MOV R48, R26 ; /* 0x0000001a00307202 */ /* 0x000fe20000000f00 */ /*3320*/ IMAD.MOV.U32 R49, RZ, RZ, R27 ; /* 0x000000ffff317224 */ /* 0x000fe200078e001b */ /*3330*/ MOV R38, R32 ; /* 0x0000002000267202 */ /* 0x000fe20000000f00 */ /*3340*/ IMAD.MOV.U32 R39, RZ, RZ, R33 ; /* 0x000000ffff277224 */ /* 0x000fe200078e0021 */ /*3350*/ MOV R30, R18 ; /* 0x00000012001e7202 */ /* 0x000fe20000000f00 */ /*3360*/ IMAD.MOV.U32 R31, RZ, RZ, R19 ; /* 0x000000ffff1f7224 */ /* 0x000fe200078e0013 */ /*3370*/ MOV R22, R14 ; /* 0x0000000e00167202 */ /* 0x000fe20000000f00 */ /*3380*/ IMAD.MOV.U32 R23, RZ, RZ, R15 ; /* 0x000000ffff177224 */ /* 0x000fe200078e000f */ /*3390*/ MOV R24, R36 ; /* 0x0000002400187202 */ /* 0x001fe20000000f00 */ /*33a0*/ IMAD.MOV.U32 R25, RZ, RZ, R37 ; /* 0x000000ffff197224 */ /* 0x000fe200078e0025 */ /*33b0*/ MOV R26, R34 ; /* 0x00000022001a7202 */ /* 0x002fe20000000f00 */ /*33c0*/ IMAD.MOV.U32 R27, RZ, RZ, R35 ; /* 0x000000ffff1b7224 */ /* 0x000fe200078e0023 */ /*33d0*/ MOV R18, R16 ; /* 0x0000001000127202 */ /* 0x010fe20000000f00 */ /*33e0*/ IMAD.MOV.U32 R19, RZ, RZ, R17 ; /* 0x000000ffff137224 */ /* 0x000fe200078e0011 */ /*33f0*/ MOV R32, R50 ; /* 0x0000003200207202 */ /* 0x008fe20000000f00 */ /*3400*/ IMAD.MOV.U32 R33, RZ, RZ, R51 ; /* 0x000000ffff217224 */ /* 0x000fe200078e0033 */ /*3410*/ @P0 BRA 0x37b0 ; /* 0x0000039000000947 */ /* 0x000fea0003800000 */ /*3420*/ IMAD.WIDE R58, R85, R2, c[0x0][0x180] ; /* 0x00006000553a7625 */ /* 0x000fcc00078e0202 */ /*3430*/ LDG.E.64 R58, [R58.64] ; /* 0x000000083a3a7981 */ /* 0x000ea2000c1e1b00 */ /*3440*/ IMAD.WIDE R60, R85, R2, c[0x0][0x190] ; /* 0x00006400553c7625 */ /* 0x000fcc00078e0202 */ /*3450*/ LDG.E.64 R60, [R60.64] ; /* 0x000000083c3c7981 */ /* 0x000ee2000c1e1b00 */ /*3460*/ MOV R14, 0x1 ; /* 0x00000001000e7802 */ /* 0x000fe20000000f00 */ /*3470*/ BSSY B0, 0x3620 ; /* 0x000001a000007945 */ /* 0x000fe20003800000 */ /*3480*/ IMAD.WIDE R64, R85, R2, c[0x0][0x168] ; /* 0x00005a0055407625 */ /* 0x000fc800078e0202 */ /*3490*/ IMAD.WIDE R66, R85, R2, c[0x0][0x170] ; /* 0x00005c0055427625 */ /* 0x000fc800078e0202 */ /*34a0*/ IMAD.WIDE R68, R85, R2, c[0x0][0x178] ; /* 0x00005e0055447625 */ /* 0x000fe200078e0202 */ /*34b0*/ MUFU.RCP64H R15, R59 ; /* 0x0000003b000f7308 */ /* 0x004e220000001800 */ /*34c0*/ DMUL R62, R60, c[0x3][0x48] ; /* 0x00c012003c3e7a28 */ /* 0x008e480000000000 */ /*34d0*/ DFMA R16, -R58, R14, 1 ; /* 0x3ff000003a10742b */ /* 0x001e0c000000010e */ /*34e0*/ FSETP.GEU.AND P1, PT, |R63|, 6.5827683646048100446e-37, PT ; /* 0x036000003f00780b */ /* 0x002fe20003f2e200 */ /*34f0*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */ /* 0x001e0c0000000010 */ /*3500*/ DFMA R16, R14, R16, R14 ; /* 0x000000100e10722b */ /* 0x001e0c000000000e */ /*3510*/ DFMA R14, -R58, R16, 1 ; /* 0x3ff000003a0e742b */ /* 0x001e0c0000000110 */ /*3520*/ DFMA R14, R16, R14, R16 ; /* 0x0000000e100e722b */ /* 0x001e0c0000000010 */ /*3530*/ DMUL R16, R62, R14 ; /* 0x0000000e3e107228 */ /* 0x001e0c0000000000 */ /*3540*/ DFMA R34, -R58, R16, R62 ; /* 0x000000103a22722b */ /* 0x001e0c000000013e */ /*3550*/ DFMA R14, R14, R34, R16 ; /* 0x000000220e0e722b */ /* 0x001e140000000010 */ /*3560*/ FFMA R0, RZ, R59, R15 ; /* 0x0000003bff007223 */ /* 0x001fca000000000f */ /*3570*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*3580*/ @P0 BRA P1, 0x3610 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*3590*/ IMAD.MOV.U32 R34, RZ, RZ, R62 ; /* 0x000000ffff227224 */ /* 0x000fe200078e003e */ /*35a0*/ MOV R35, R63 ; /* 0x0000003f00237202 */ /* 0x000fe20000000f00 */ /*35b0*/ IMAD.MOV.U32 R14, RZ, RZ, R58 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e003a */ /*35c0*/ MOV R15, R59 ; /* 0x0000003b000f7202 */ /* 0x000fe40000000f00 */ /*35d0*/ MOV R0, 0x35f0 ; /* 0x000035f000007802 */ /* 0x000fe40000000f00 */ /*35e0*/ CALL.REL.NOINC 0x4060 ; /* 0x00000a7000007944 */ /* 0x000fea0003c00000 */ /*35f0*/ IMAD.MOV.U32 R14, RZ, RZ, R16 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e0010 */ /*3600*/ MOV R15, R17 ; /* 0x00000011000f7202 */ /* 0x000fe40000000f00 */ /*3610*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*3620*/ LDG.E.64 R64, [R64.64] ; /* 0x0000000840407981 */ /* 0x000ea8000c1e1b00 */ /*3630*/ LDG.E.64 R66, [R66.64] ; /* 0x0000000842427981 */ /* 0x000ee2000c1e1b00 */ /*3640*/ IMAD.WIDE R50, R85, R2, c[0x0][0x188] ; /* 0x0000620055327625 */ /* 0x000fc600078e0202 */ /*3650*/ LDG.E.64 R68, [R68.64] ; /* 0x0000000844447981 */ /* 0x000f28000c1e1b00 */ /*3660*/ LDG.E.64 R50, [R50.64] ; /* 0x0000000832327981 */ /* 0x000f62000c1e1b00 */ /*3670*/ DADD R16, R42, R40 ; /* 0x000000002a107229 */ /* 0x000e0c0000000028 */ /*3680*/ DMUL R16, R16, R14 ; /* 0x0000000e10107228 */ /* 0x001e080000000000 */ /*3690*/ DMUL R58, R58, R58 ; /* 0x0000003a3a3a7228 */ /* 0x000e480000000000 */ /*36a0*/ DADD R14, R28, R16 ; /* 0x000000001c0e7229 */ /* 0x001fc80000000010 */ /*36b0*/ DADD R34, -R42, R40 ; /* 0x000000002a227229 */ /* 0x000e080000000128 */ /*36c0*/ DMUL R58, R58, 2.5 ; /* 0x400400003a3a7828 */ /* 0x002fc80000000000 */ /*36d0*/ DMUL R28, R54, R60 ; /* 0x0000003c361c7228 */ /* 0x000fc80000000000 */ /*36e0*/ DMUL R34, R62, R34 ; /* 0x000000223e227228 */ /* 0x001fc80000000000 */ /*36f0*/ DMUL R36, R56, R64 ; /* 0x0000004038247228 */ /* 0x004ecc0000000000 */ /*3700*/ DFMA R36, R54, R66, -R36 ; /* 0x000000423624722b */ /* 0x008e0c0000000824 */ /*3710*/ DMUL R36, R60, R36 ; /* 0x000000243c247228 */ /* 0x001f4c0000000000 */ /*3720*/ DFMA R36, R14, R50, R36 ; /* 0x000000320e24722b */ /* 0x020e080000000024 */ /*3730*/ DMUL R56, R56, R60 ; /* 0x0000003c38387228 */ /* 0x000e480000000000 */ /*3740*/ DFMA R36, R16, R58, R36 ; /* 0x0000003a1024722b */ /* 0x001e220000000024 */ /*3750*/ IMAD.MOV.U32 R54, RZ, RZ, R14 ; /* 0x000000ffff367224 */ /* 0x000fe200078e000e */ /*3760*/ MOV R55, R15 ; /* 0x0000000f00377202 */ /* 0x000fe40000000f00 */ /*3770*/ DFMA R56, R14, R64, -R56 ; /* 0x000000400e38722b */ /* 0x0022880000000838 */ /*3780*/ DFMA R28, R14, R66, R28 ; /* 0x000000420e1c722b */ /* 0x0002c8000000001c */ /*3790*/ DFMA R40, R14, R68, R34 ; /* 0x000000440e28722b */ /* 0x0103080000000022 */ /*37a0*/ DFMA R42, R34, R68, R36 ; /* 0x00000044222a722b */ /* 0x0012080000000024 */ /*37b0*/ IADD3 R9, R9, -0x1, RZ ; /* 0xffffffff09097810 */ /* 0x01cfe20007ffe0ff */ /*37c0*/ IMAD.WIDE R14, R75, R2, c[0x0][0x198] ; /* 0x000066004b0e7625 */ /* 0x002fe200078e0202 */ /*37d0*/ IADD3 R85, -R5, R85, RZ ; /* 0x0000005505557210 */ /* 0x000fe40007ffe1ff */ /*37e0*/ ISETP.GT.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f04270 */ /*37f0*/ IMAD.IADD R80, R80, 0x1, -R5 ; /* 0x0000000150507824 */ /* 0x000fe200078e0a05 */ /*3800*/ STG.E.64 [R14.64], R54 ; /* 0x000000360e007986 */ /* 0x0003e2000c101b08 */ /*3810*/ IADD3 R76, R76, UR4, RZ ; /* 0x000000044c4c7c10 */ /* 0x000fe2000fffe0ff */ /*3820*/ IMAD.IADD R75, R75, 0x1, -R6 ; /* 0x000000014b4b7824 */ /* 0x000fe400078e0a06 */ /*3830*/ STG.E.64 [R14.64+0x8], R56 ; /* 0x000008380e007986 */ /* 0x0005e8000c101b08 */ /*3840*/ STG.E.64 [R14.64+0x10], R28 ; /* 0x0000101c0e007986 */ /* 0x0007e8000c101b08 */ /*3850*/ STG.E.64 [R14.64+0x18], R40 ; /* 0x000018280e007986 */ /* 0x0009e2000c101b08 */ /*3860*/ MOV R54, R44 ; /* 0x0000002c00367202 */ /* 0x002fe20000000f00 */ /*3870*/ IMAD.MOV.U32 R55, RZ, RZ, R45 ; /* 0x000000ffff377224 */ /* 0x000fc400078e002d */ /*3880*/ STG.E.64 [R14.64+0x20], R42 ; /* 0x0000202a0e007986 */ /* 0x0011e2000c101b08 */ /*3890*/ MOV R56, R46 ; /* 0x0000002e00387202 */ /* 0x004fe20000000f00 */ /*38a0*/ IMAD.MOV.U32 R57, RZ, RZ, R47 ; /* 0x000000ffff397224 */ /* 0x000fe200078e002f */ /*38b0*/ MOV R28, R48 ; /* 0x00000030001c7202 */ /* 0x008fe20000000f00 */ /*38c0*/ IMAD.MOV.U32 R29, RZ, RZ, R49 ; /* 0x000000ffff1d7224 */ /* 0x000fe200078e0031 */ /*38d0*/ MOV R40, R30 ; /* 0x0000001e00287202 */ /* 0x010fe20000000f00 */ /*38e0*/ IMAD.MOV.U32 R41, RZ, RZ, R31 ; /* 0x000000ffff297224 */ /* 0x000fe200078e001f */ /*38f0*/ MOV R42, R38 ; /* 0x00000026002a7202 */ /* 0x001fe20000000f00 */ /*3900*/ IMAD.MOV.U32 R43, RZ, RZ, R39 ; /* 0x000000ffff2b7224 */ /* 0x000fe200078e0027 */ /*3910*/ @P0 BRA 0x3070 ; /* 0xfffff75000000947 */ /* 0x000fea000383ffff */ /*3920*/ LDG.E.64 R52, [R52.64] ; /* 0x0000000834347981 */ /* 0x01eea2000c1e1b00 */ /*3930*/ IADD3 R28, P0, R10, c[0x0][0x190], RZ ; /* 0x000064000a1c7a10 */ /* 0x001fc80007f1e0ff */ /*3940*/ IADD3.X R29, R12, c[0x0][0x194], RZ, P0, !PT ; /* 0x000065000c1d7a10 */ /* 0x000fcc00007fe4ff */ /*3950*/ LDG.E.64 R28, [R28.64] ; /* 0x000000081c1c7981 */ /* 0x000ee2000c1e1b00 */ /*3960*/ MOV R2, 0x1 ; /* 0x0000000100027802 */ /* 0x000fe20000000f00 */ /*3970*/ BSSY B0, 0x3b00 ; /* 0x0000018000007945 */ /* 0x000fe20003800000 */ /*3980*/ IMAD.WIDE R40, R6, 0x8, R20 ; /* 0x0000000806287825 */ /* 0x000fe200078e0214 */ /*3990*/ MUFU.RCP64H R3, R53 ; /* 0x0000003500037308 */ /* 0x004e220000001800 */ /*39a0*/ DMUL R42, R28, c[0x3][0x48] ; /* 0x00c012001c2a7a28 */ /* 0x008e480000000000 */ /*39b0*/ DFMA R14, -R52, R2, 1 ; /* 0x3ff00000340e742b */ /* 0x001e0c0000000102 */ /*39c0*/ FSETP.GEU.AND P1, PT, |R43|, 6.5827683646048100446e-37, PT ; /* 0x036000002b00780b */ /* 0x002fe20003f2e200 */ /*39d0*/ DFMA R14, R14, R14, R14 ; /* 0x0000000e0e0e722b */ /* 0x001e0c000000000e */ /*39e0*/ DFMA R14, R2, R14, R2 ; /* 0x0000000e020e722b */ /* 0x001e0c0000000002 */ /*39f0*/ DFMA R2, -R52, R14, 1 ; /* 0x3ff000003402742b */ /* 0x001e0c000000010e */ /*3a00*/ DFMA R2, R14, R2, R14 ; /* 0x000000020e02722b */ /* 0x001e0c000000000e */ /*3a10*/ DMUL R14, R42, R2 ; /* 0x000000022a0e7228 */ /* 0x001e0c0000000000 */ /*3a20*/ DFMA R16, -R52, R14, R42 ; /* 0x0000000e3410722b */ /* 0x001e0c000000012a */ /*3a30*/ DFMA R2, R2, R16, R14 ; /* 0x000000100202722b */ /* 0x001e14000000000e */ /*3a40*/ FFMA R0, RZ, R53, R3 ; /* 0x00000035ff007223 */ /* 0x001fca0000000003 */ /*3a50*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*3a60*/ @P0 BRA P1, 0x3af0 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*3a70*/ IMAD.MOV.U32 R34, RZ, RZ, R42 ; /* 0x000000ffff227224 */ /* 0x000fe200078e002a */ /*3a80*/ MOV R35, R43 ; /* 0x0000002b00237202 */ /* 0x000fe20000000f00 */ /*3a90*/ IMAD.MOV.U32 R14, RZ, RZ, R52 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e0034 */ /*3aa0*/ MOV R15, R53 ; /* 0x00000035000f7202 */ /* 0x000fe40000000f00 */ /*3ab0*/ MOV R0, 0x3ad0 ; /* 0x00003ad000007802 */ /* 0x000fe40000000f00 */ /*3ac0*/ CALL.REL.NOINC 0x4060 ; /* 0x0000059000007944 */ /* 0x000fea0003c00000 */ /*3ad0*/ IMAD.MOV.U32 R2, RZ, RZ, R16 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0010 */ /*3ae0*/ MOV R3, R17 ; /* 0x0000001100037202 */ /* 0x000fe40000000f00 */ /*3af0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*3b00*/ IADD3 R14, P0, R10.reuse, c[0x0][0x168], RZ ; /* 0x00005a000a0e7a10 */ /* 0x040fe40007f1e0ff */ /*3b10*/ IADD3 R34, P1, R10, c[0x0][0x170], RZ ; /* 0x00005c000a227a10 */ /* 0x000fe40007f3e0ff */ /*3b20*/ IADD3.X R15, R12, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b000c0f7a10 */ /* 0x000fc400007fe4ff */ /*3b30*/ IADD3.X R35, R12, c[0x0][0x174], RZ, P1, !PT ; /* 0x00005d000c237a10 */ /* 0x000fc80000ffe4ff */ /*3b40*/ LDG.E.64 R14, [R14.64] ; /* 0x000000080e0e7981 */ /* 0x000ea2000c1e1b00 */ /*3b50*/ IADD3 R36, P0, R10, c[0x0][0x188], RZ ; /* 0x000062000a247a10 */ /* 0x000fc60007f1e0ff */ /*3b60*/ LDG.E.64 R34, [R34.64] ; /* 0x0000000822227981 */ /* 0x000ee2000c1e1b00 */ /*3b70*/ IADD3.X R37, R12, c[0x0][0x18c], RZ, P0, !PT ; /* 0x000063000c257a10 */ /* 0x000fe200007fe4ff */ /*3b80*/ IMAD.MOV.U32 R55, RZ, RZ, 0x8 ; /* 0x00000008ff377424 */ /* 0x000fe400078e00ff */ /*3b90*/ IMAD R50, R7, c[0x0][0x1b0], R8 ; /* 0x00006c0007327a24 */ /* 0x000fc600078e0208 */ /*3ba0*/ LDG.E.64 R36, [R36.64] ; /* 0x0000000824247981 */ /* 0x000f22000c1e1b00 */ /*3bb0*/ IMAD.WIDE R50, R50, R55, c[0x0][0x178] ; /* 0x00005e0032327625 */ /* 0x000fcc00078e0237 */ /*3bc0*/ LDG.E.64 R50, [R50.64+0x8] ; /* 0x0000080832327981 */ /* 0x000f62000c1e1b00 */ /*3bd0*/ DADD R8, R38, R30 ; /* 0x0000000026087229 */ /* 0x000e22000000001e */ /*3be0*/ IMAD R11, R4, 0x5, R11 ; /* 0x00000005040b7824 */ /* 0x000fc600078e020b */ /*3bf0*/ DMUL R52, R52, R52 ; /* 0x0000003434347228 */ /* 0x000fe40000000000 */ /*3c00*/ IADD3 R6, R6, R11, RZ ; /* 0x0000000b06067210 */ /* 0x000fe40007ffe0ff */ /*3c10*/ DMUL R8, R8, R2 ; /* 0x0000000208087228 */ /* 0x001e060000000000 */ /*3c20*/ IMAD.WIDE R6, R6, R55, c[0x0][0x198] ; /* 0x0000660006067625 */ /* 0x000fe200078e0237 */ /*3c30*/ DADD R12, -R38, R30 ; /* 0x00000000260c7229 */ /* 0x000e48000000011e */ /*3c40*/ DADD R2, R8, R48 ; /* 0x0000000008027229 */ /* 0x001fc80000000030 */ /*3c50*/ DMUL R52, R52, 2.5 ; /* 0x4004000034347828 */ /* 0x000fc80000000000 */ /*3c60*/ DMUL R12, R42, R12 ; /* 0x0000000c2a0c7228 */ /* 0x002fc80000000000 */ /*3c70*/ DMUL R30, R28, R44 ; /* 0x0000002c1c1e7228 */ /* 0x000fc80000000000 */ /*3c80*/ DMUL R38, R28, R46 ; /* 0x0000002e1c267228 */ /* 0x000e080000000000 */ /*3c90*/ DMUL R16, R14, R46 ; /* 0x0000002e0e107228 */ /* 0x004ec80000000000 */ /*3ca0*/ DFMA R38, R2, R14, -R38 ; /* 0x0000000e0226722b */ /* 0x001e080000000826 */ /*3cb0*/ DFMA R16, R34, R44, -R16 ; /* 0x0000002c2210722b */ /* 0x008e460000000810 */ /*3cc0*/ STG.E.64 [R40.64+0x8], R38 ; /* 0x0000082628007986 */ /* 0x001fe2000c101b08 */ /*3cd0*/ DFMA R30, R2, R34, R30 ; /* 0x00000022021e722b */ /* 0x000e08000000001e */ /*3ce0*/ DMUL R16, R28, R16 ; /* 0x000000101c107228 */ /* 0x002f060000000000 */ /*3cf0*/ STG.E.64 [R40.64+0x10], R30 ; /* 0x0000101e28007986 */ /* 0x001fe2000c101b08 */ /*3d00*/ DFMA R4, R2, R50, R12 ; /* 0x000000320204722b */ /* 0x020e08000000000c */ /*3d10*/ DFMA R16, R2, R36, R16 ; /* 0x000000240210722b */ /* 0x010e460000000010 */ /*3d20*/ STG.E.64 [R40.64+0x18], R4 ; /* 0x0000180428007986 */ /* 0x001fe6000c101b08 */ /*3d30*/ DFMA R16, R8, R52, R16 ; /* 0x000000340810722b */ /* 0x002e0c0000000010 */ /*3d40*/ DFMA R16, R12, R50, R16 ; /* 0x000000320c10722b */ /* 0x001e0e0000000010 */ /*3d50*/ STG.E.64 [R40.64+0x20], R16 ; /* 0x0000201028007986 */ /* 0x001fe8000c101b08 */ /*3d60*/ STG.E.64 [R6.64], R2 ; /* 0x0000000206007986 */ /* 0x000fe8000c101b08 */ /*3d70*/ STG.E.64 [R20.64], R22 ; /* 0x0000001614007986 */ /* 0x000fe8000c101b08 */ /*3d80*/ STG.E.64 [R20.64+0x8], R24 ; /* 0x0000081814007986 */ /* 0x000fe8000c101b08 */ /*3d90*/ STG.E.64 [R20.64+0x10], R26 ; /* 0x0000101a14007986 */ /* 0x000fe8000c101b08 */ /*3da0*/ STG.E.64 [R20.64+0x18], R18 ; /* 0x0000181214007986 */ /* 0x000fe8000c101b08 */ /*3db0*/ STG.E.64 [R20.64+0x20], R32 ; /* 0x0000202014007986 */ /* 0x000fe2000c101b08 */ /*3dc0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*3dd0*/ DSETP.GTU.AND P1, PT, |R100|, +INF , PT ; /* 0x7ff000006400742a */ /* 0x000e220003f2c200 */ /*3de0*/ BSSY B1, 0x4030 ; /* 0x0000024000017945 */ /* 0x000fda0003800000 */ /*3df0*/ @P1 BRA 0x4000 ; /* 0x0000020000001947 */ /* 0x001fea0003800000 */ /*3e00*/ LOP3.LUT R102, R101, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff65667812 */ /* 0x000fc800078ec0ff */ /*3e10*/ IADD3 R103, R102, -0x1, RZ ; /* 0xffffffff66677810 */ /* 0x000fc80007ffe0ff */ /*3e20*/ ISETP.GE.U32.AND P1, PT, R103, 0x7fefffff, PT ; /* 0x7fefffff6700780c */ /* 0x000fda0003f26070 */ /*3e30*/ @P1 LOP3.LUT R105, R101, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff0000065691812 */ /* 0x000fe200078e3cff */ /*3e40*/ @P1 IMAD.MOV.U32 R104, RZ, RZ, RZ ; /* 0x000000ffff681224 */ /* 0x000fe200078e00ff */ /*3e50*/ @P1 BRA 0x4020 ; /* 0x000001c000001947 */ /* 0x000fea0003800000 */ /*3e60*/ ISETP.GE.U32.AND P1, PT, R102, 0x1000001, PT ; /* 0x010000016600780c */ /* 0x000fda0003f26070 */ /*3e70*/ @!P1 BRA 0x3f60 ; /* 0x000000e000009947 */ /* 0x000fea0003800000 */ /*3e80*/ IADD3 R103, R101, -0x3fe00000, RZ ; /* 0xc020000065677810 */ /* 0x000fe20007ffe0ff */ /*3e90*/ IMAD.MOV.U32 R104, RZ, RZ, R107 ; /* 0x000000ffff687224 */ /* 0x000fe200078e006b */ /*3ea0*/ MOV R102, R100 ; /* 0x0000006400667202 */ /* 0x000fe40000000f00 */ /*3eb0*/ MUFU.RCP64H R105, R103 ; /* 0x0000006700697308 */ /* 0x000e280000001800 */ /*3ec0*/ DFMA R106, -R102, R104, 1 ; /* 0x3ff00000666a742b */ /* 0x001e0c0000000168 */ /*3ed0*/ DFMA R106, R106, R106, R106 ; /* 0x0000006a6a6a722b */ /* 0x001e0c000000006a */ /*3ee0*/ DFMA R106, R104, R106, R104 ; /* 0x0000006a686a722b */ /* 0x001e0c0000000068 */ /*3ef0*/ DFMA R104, -R102, R106, 1 ; /* 0x3ff000006668742b */ /* 0x001e0c000000016a */ /*3f00*/ DFMA R104, R106, R104, R106 ; /* 0x000000686a68722b */ /* 0x001e0c000000006a */ /*3f10*/ DMUL R104, R104, 2.2250738585072013831e-308 ; /* 0x0010000068687828 */ /* 0x001e0c0000000000 */ /*3f20*/ DFMA R100, -R100, R104, 1 ; /* 0x3ff000006464742b */ /* 0x001e0c0000000168 */ /*3f30*/ DFMA R100, R100, R100, R100 ; /* 0x000000646464722b */ /* 0x001e0c0000000064 */ /*3f40*/ DFMA R104, R104, R100, R104 ; /* 0x000000646868722b */ /* 0x0010620000000068 */ /*3f50*/ BRA 0x4020 ; /* 0x000000c000007947 */ /* 0x000fea0003800000 */ /*3f60*/ DMUL R100, R100, 8.11296384146066816958e+31 ; /* 0x4690000064647828 */ /* 0x000e220000000000 */ /*3f70*/ MOV R102, R107 ; /* 0x0000006b00667202 */ /* 0x000fca0000000f00 */ /*3f80*/ MUFU.RCP64H R103, R101 ; /* 0x0000006500677308 */ /* 0x001e240000001800 */ /*3f90*/ DFMA R104, -R100, R102, 1 ; /* 0x3ff000006468742b */ /* 0x001e0c0000000166 */ /*3fa0*/ DFMA R104, R104, R104, R104 ; /* 0x000000686868722b */ /* 0x001e0c0000000068 */ /*3fb0*/ DFMA R104, R102, R104, R102 ; /* 0x000000686668722b */ /* 0x001e0c0000000066 */ /*3fc0*/ DFMA R102, -R100, R104, 1 ; /* 0x3ff000006466742b */ /* 0x001e0c0000000168 */ /*3fd0*/ DFMA R102, R104, R102, R104 ; /* 0x000000666866722b */ /* 0x001e0c0000000068 */ /*3fe0*/ DMUL R104, R102, 8.11296384146066816958e+31 ; /* 0x4690000066687828 */ /* 0x0010620000000000 */ /*3ff0*/ BRA 0x4020 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*4000*/ LOP3.LUT R105, R101, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000065697812 */ /* 0x000fe200078efcff */ /*4010*/ IMAD.MOV.U32 R104, RZ, RZ, R100 ; /* 0x000000ffff687224 */ /* 0x000fe400078e0064 */ /*4020*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*4030*/ MOV R100, R0 ; /* 0x0000000000647202 */ /* 0x001fe20000000f00 */ /*4040*/ IMAD.MOV.U32 R101, RZ, RZ, 0x0 ; /* 0x00000000ff657424 */ /* 0x000fc800078e00ff */ /*4050*/ RET.REL.NODEC R100 0x0 ; /* 0xffffbfa064007950 */ /* 0x000fea0003c3ffff */ /*4060*/ FSETP.GEU.AND P0, PT, |R15|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000f00780b */ /* 0x040fe20003f0e200 */ /*4070*/ IMAD.MOV.U32 R74, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff4a7424 */ /* 0x000fe200078e00ff */ /*4080*/ LOP3.LUT R16, R15, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff0f107812 */ /* 0x000fe200078ec0ff */ /*4090*/ BSSY B1, 0x45f0 ; /* 0x0000055000017945 */ /* 0x000fe20003800000 */ /*40a0*/ FSETP.GEU.AND P2, PT, |R35|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000002300780b */ /* 0x040fe40003f4e200 */ /*40b0*/ LOP3.LUT R17, R16, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000010117812 */ /* 0x000fe400078efcff */ /*40c0*/ MOV R16, R14 ; /* 0x0000000e00107202 */ /* 0x000fe40000000f00 */ /*40d0*/ LOP3.LUT R13, R35, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000230d7812 */ /* 0x000fc400078ec0ff */ /*40e0*/ LOP3.LUT R82, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f527812 */ /* 0x000fe200078ec0ff */ /*40f0*/ @!P0 DMUL R16, R14, 8.98846567431157953865e+307 ; /* 0x7fe000000e108828 */ /* 0x000e220000000000 */ /*4100*/ MOV R50, 0x1 ; /* 0x0000000100327802 */ /* 0x000fe20000000f00 */ /*4110*/ IMAD.MOV.U32 R87, RZ, RZ, R13 ; /* 0x000000ffff577224 */ /* 0x000fe200078e000d */ /*4120*/ ISETP.GE.U32.AND P1, PT, R13, R82, PT ; /* 0x000000520d00720c */ /* 0x000fe40003f26070 */ /*4130*/ @!P2 LOP3.LUT R36, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f24a812 */ /* 0x000fe200078ec0ff */ /*4140*/ MUFU.RCP64H R51, R17 ; /* 0x0000001100337308 */ /* 0x001e220000001800 */ /*4150*/ SEL R37, R74, 0x63400000, !P1 ; /* 0x634000004a257807 */ /* 0x000fe40004800000 */ /*4160*/ @!P2 ISETP.GE.U32.AND P3, PT, R13, R36, PT ; /* 0x000000240d00a20c */ /* 0x000fe20003f66070 */ /*4170*/ IMAD.MOV.U32 R36, RZ, RZ, R34 ; /* 0x000000ffff247224 */ /* 0x000fe200078e0022 */ /*4180*/ LOP3.LUT R37, R37, 0x800fffff, R35, 0xf8, !PT ; /* 0x800fffff25257812 */ /* 0x000fc400078ef823 */ /*4190*/ @!P2 SEL R71, R74, 0x63400000, !P3 ; /* 0x634000004a47a807 */ /* 0x000fe40005800000 */ /*41a0*/ @!P2 MOV R70, RZ ; /* 0x000000ff0046a202 */ /* 0x000fe40000000f00 */ /*41b0*/ @!P2 LOP3.LUT R71, R71, 0x80000000, R35, 0xf8, !PT ; /* 0x800000004747a812 */ /* 0x000fe400078ef823 */ /*41c0*/ @!P0 LOP3.LUT R82, R17, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000011528812 */ /* 0x000fe400078ec0ff */ /*41d0*/ @!P2 LOP3.LUT R71, R71, 0x100000, RZ, 0xfc, !PT ; /* 0x001000004747a812 */ /* 0x000fe200078efcff */ /*41e0*/ DFMA R72, R50, -R16, 1 ; /* 0x3ff000003248742b */ /* 0x001e220000000810 */ /*41f0*/ IADD3 R84, R82, -0x1, RZ ; /* 0xffffffff52547810 */ /* 0x000fc80007ffe0ff */ /*4200*/ @!P2 DFMA R36, R36, 2, -R70 ; /* 0x400000002424a82b */ /* 0x000fc80000000846 */ /*4210*/ DFMA R72, R72, R72, R72 ; /* 0x000000484848722b */ /* 0x001e0c0000000048 */ /*4220*/ DFMA R72, R50, R72, R50 ; /* 0x000000483248722b */ /* 0x001e220000000032 */ /*4230*/ @!P2 LOP3.LUT R87, R37, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000002557a812 */ /* 0x000fca00078ec0ff */ /*4240*/ DFMA R50, R72, -R16, 1 ; /* 0x3ff000004832742b */ /* 0x001e0c0000000810 */ /*4250*/ DFMA R50, R72, R50, R72 ; /* 0x000000324832722b */ /* 0x0010640000000048 */ /*4260*/ IADD3 R72, R87, -0x1, RZ ; /* 0xffffffff57487810 */ /* 0x001fc80007ffe0ff */ /*4270*/ ISETP.GT.U32.AND P0, PT, R72, 0x7feffffe, PT ; /* 0x7feffffe4800780c */ /* 0x000fe20003f04070 */ /*4280*/ DMUL R70, R50, R36 ; /* 0x0000002432467228 */ /* 0x002e060000000000 */ /*4290*/ ISETP.GT.U32.OR P0, PT, R84, 0x7feffffe, P0 ; /* 0x7feffffe5400780c */ /* 0x000fc60000704470 */ /*42a0*/ DFMA R72, R70, -R16, R36 ; /* 0x800000104648722b */ /* 0x001e0c0000000024 */ /*42b0*/ DFMA R50, R50, R72, R70 ; /* 0x000000483232722b */ /* 0x0010480000000046 */ /*42c0*/ @P0 BRA 0x4490 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*42d0*/ LOP3.LUT R70, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f467812 */ /* 0x003fc800078ec0ff */ /*42e0*/ IADD3 R34, R13.reuse, -R70.reuse, RZ ; /* 0x800000460d227210 */ /* 0x0c0fe40007ffe0ff */ /*42f0*/ ISETP.GE.U32.AND P0, PT, R13, R70, PT ; /* 0x000000460d00720c */ /* 0x000fe40003f06070 */ /*4300*/ IMNMX R34, R34, -0x46a00000, !PT ; /* 0xb960000022227817 */ /* 0x000fe40007800200 */ /*4310*/ SEL R13, R74, 0x63400000, !P0 ; /* 0x634000004a0d7807 */ /* 0x000fe40004000000 */ /*4320*/ IMNMX R34, R34, 0x46a00000, PT ; /* 0x46a0000022227817 */ /* 0x000fca0003800200 */ /*4330*/ IMAD.IADD R72, R34, 0x1, -R13 ; /* 0x0000000122487824 */ /* 0x000fe200078e0a0d */ /*4340*/ MOV R34, RZ ; /* 0x000000ff00227202 */ /* 0x000fc80000000f00 */ /*4350*/ IADD3 R35, R72, 0x7fe00000, RZ ; /* 0x7fe0000048237810 */ /* 0x000fcc0007ffe0ff */ /*4360*/ DMUL R70, R50, R34 ; /* 0x0000002232467228 */ /* 0x000e140000000000 */ /*4370*/ FSETP.GTU.AND P0, PT, |R71|, 1.469367938527859385e-39, PT ; /* 0x001000004700780b */ /* 0x001fda0003f0c200 */ /*4380*/ @P0 BRA 0x45e0 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*4390*/ DFMA R16, R50, -R16, R36 ; /* 0x800000103210722b */ /* 0x000e220000000024 */ /*43a0*/ IMAD.MOV.U32 R34, RZ, RZ, RZ ; /* 0x000000ffff227224 */ /* 0x000fd200078e00ff */ /*43b0*/ FSETP.NEU.AND P0, PT, R17.reuse, RZ, PT ; /* 0x000000ff1100720b */ /* 0x041fe40003f0d000 */ /*43c0*/ LOP3.LUT R13, R17, 0x80000000, R15, 0x48, !PT ; /* 0x80000000110d7812 */ /* 0x000fc800078e480f */ /*43d0*/ LOP3.LUT R35, R13, R35, RZ, 0xfc, !PT ; /* 0x000000230d237212 */ /* 0x000fce00078efcff */ /*43e0*/ @!P0 BRA 0x45e0 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*43f0*/ IADD3 R15, -R72, RZ, RZ ; /* 0x000000ff480f7210 */ /* 0x000fe20007ffe1ff */ /*4400*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e00ff */ /*4410*/ DMUL.RP R34, R50, R34 ; /* 0x0000002232227228 */ /* 0x000e0a0000008000 */ /*4420*/ DFMA R14, R70, -R14, R50 ; /* 0x8000000e460e722b */ /* 0x000e4a0000000032 */ /*4430*/ LOP3.LUT R13, R35, R13, RZ, 0x3c, !PT ; /* 0x0000000d230d7212 */ /* 0x001fe400078e3cff */ /*4440*/ IADD3 R14, -R72, -0x43300000, RZ ; /* 0xbcd00000480e7810 */ /* 0x002fc80007ffe1ff */ /*4450*/ FSETP.NEU.AND P0, PT, |R15|, R14, PT ; /* 0x0000000e0f00720b */ /* 0x000fc80003f0d200 */ /*4460*/ FSEL R70, R34, R70, !P0 ; /* 0x0000004622467208 */ /* 0x000fe40004000000 */ /*4470*/ FSEL R71, R13, R71, !P0 ; /* 0x000000470d477208 */ /* 0x000fe20004000000 */ /*4480*/ BRA 0x45e0 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*4490*/ DSETP.NAN.AND P0, PT, R34, R34, PT ; /* 0x000000222200722a */ /* 0x003e1c0003f08000 */ /*44a0*/ @P0 BRA 0x45c0 ; /* 0x0000011000000947 */ /* 0x001fea0003800000 */ /*44b0*/ DSETP.NAN.AND P0, PT, R14, R14, PT ; /* 0x0000000e0e00722a */ /* 0x000e1c0003f08000 */ /*44c0*/ @P0 BRA 0x4590 ; /* 0x000000c000000947 */ /* 0x001fea0003800000 */ /*44d0*/ ISETP.NE.AND P0, PT, R87, R82, PT ; /* 0x000000525700720c */ /* 0x000fe20003f05270 */ /*44e0*/ IMAD.MOV.U32 R71, RZ, RZ, -0x80000 ; /* 0xfff80000ff477424 */ /* 0x000fe200078e00ff */ /*44f0*/ MOV R70, 0x0 ; /* 0x0000000000467802 */ /* 0x000fd60000000f00 */ /*4500*/ @!P0 BRA 0x45e0 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*4510*/ ISETP.NE.AND P0, PT, R87, 0x7ff00000, PT ; /* 0x7ff000005700780c */ /* 0x000fe40003f05270 */ /*4520*/ LOP3.LUT R71, R35, 0x80000000, R15, 0x48, !PT ; /* 0x8000000023477812 */ /* 0x000fe400078e480f */ /*4530*/ ISETP.EQ.OR P0, PT, R82, RZ, !P0 ; /* 0x000000ff5200720c */ /* 0x000fda0004702670 */ /*4540*/ @P0 LOP3.LUT R13, R71, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff00000470d0812 */ /* 0x000fe400078efcff */ /*4550*/ @!P0 MOV R70, RZ ; /* 0x000000ff00468202 */ /* 0x000fe20000000f00 */ /*4560*/ @P0 IMAD.MOV.U32 R70, RZ, RZ, RZ ; /* 0x000000ffff460224 */ /* 0x000fe200078e00ff */ /*4570*/ @P0 MOV R71, R13 ; /* 0x0000000d00470202 */ /* 0x000fe20000000f00 */ /*4580*/ BRA 0x45e0 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*4590*/ LOP3.LUT R71, R15, 0x80000, RZ, 0xfc, !PT ; /* 0x000800000f477812 */ /* 0x000fe200078efcff */ /*45a0*/ IMAD.MOV.U32 R70, RZ, RZ, R14 ; /* 0x000000ffff467224 */ /* 0x000fe200078e000e */ /*45b0*/ BRA 0x45e0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*45c0*/ LOP3.LUT R71, R35, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000023477812 */ /* 0x000fe400078efcff */ /*45d0*/ MOV R70, R34 ; /* 0x0000002200467202 */ /* 0x000fe40000000f00 */ /*45e0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*45f0*/ IMAD.MOV.U32 R14, RZ, RZ, R0 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e0000 */ /*4600*/ MOV R15, 0x0 ; /* 0x00000000000f7802 */ /* 0x000fe20000000f00 */ /*4610*/ IMAD.MOV.U32 R16, RZ, RZ, R70 ; /* 0x000000ffff107224 */ /* 0x000fe200078e0046 */ /*4620*/ MOV R17, R71 ; /* 0x0000004700117202 */ /* 0x000fc40000000f00 */ /*4630*/ RET.REL.NODEC R14 0x0 ; /* 0xffffb9c00e007950 */ /* 0x000fea0003c3ffff */ /*4640*/ BRA 0x4640; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*4650*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4660*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4670*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4680*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4690*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*46a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*46b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*46c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*46d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*46e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*46f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z14y_solve_kernelPdS_S_S_S_S_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */ /* 0x000e220000002500 */ /*0020*/ UMOV UR5, 0x1 ; /* 0x0000000100057882 */ /* 0x000fe40000000000 */ /*0030*/ ULDC UR4, c[0x0][0x198] ; /* 0x0000660000047ab9 */ /* 0x000fe20000000800 */ /*0040*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0050*/ UIADD3 UR4, -UR5, UR4, URZ ; /* 0x0000000405047290 */ /* 0x000fe4000fffe13f */ /*0060*/ ULDC UR6, c[0x0][0x190] ; /* 0x0000640000067ab9 */ /* 0x000fe20000000800 */ /*0070*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e620000002600 */ /*0080*/ UIADD3 UR5, -UR5, UR6, URZ ; /* 0x0000000605057290 */ /* 0x000fc6000fffe13f */ /*0090*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e620000002200 */ /*00a0*/ IMAD R5, R5, c[0x0][0x0], R0 ; /* 0x0000000005057a24 */ /* 0x001fca00078e0200 */ /*00b0*/ IADD3 R19, R5, 0x1, RZ ; /* 0x0000000105137810 */ /* 0x000fe20007ffe0ff */ /*00c0*/ IMAD R2, R2, c[0x0][0x4], R3 ; /* 0x0000010002027a24 */ /* 0x002fc600078e0203 */ /*00d0*/ ISETP.GE.AND P0, PT, R19, UR4, PT ; /* 0x0000000413007c0c */ /* 0x000fe4000bf06270 */ /*00e0*/ IADD3 R0, R2, 0x1, RZ ; /* 0x0000000102007810 */ /* 0x000fc80007ffe0ff */ /*00f0*/ ISETP.GE.OR P0, PT, R0, UR5, P0 ; /* 0x0000000500007c0c */ /* 0x000fda0008706670 */ /*0100*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0110*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x194] ; /* 0x00006500ff007624 */ /* 0x000fe200078e00ff */ /*0120*/ MOV R17, 0x2 ; /* 0x0000000200117802 */ /* 0x000fe20000000f00 */ /*0130*/ IMAD.MOV.U32 R73, RZ, RZ, 0x8 ; /* 0x00000008ff497424 */ /* 0x000fe200078e00ff */ /*0140*/ MOV R8, 0x0 ; /* 0x0000000000087802 */ /* 0x000fe20000000f00 */ /*0150*/ IMAD R7, R19, c[0x0][0x194], RZ ; /* 0x0000650013077a24 */ /* 0x000fe200078e02ff */ /*0160*/ IADD3 R72, -R17, c[0x0][0x198], RZ ; /* 0x0000660011487a10 */ /* 0x000fe20007ffe1ff */ /*0170*/ IMAD.MOV.U32 R9, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff097424 */ /* 0x000fe200078e00ff */ /*0180*/ SHF.L.U32 R36, R0, 0x2, RZ ; /* 0x0000000200247819 */ /* 0x000fe200000006ff */ /*0190*/ IMAD R4, R7, c[0x0][0x190], R2 ; /* 0x0000640007047a24 */ /* 0x000fe200078e0202 */ /*01a0*/ IADD3 R17, -R17, c[0x0][0x190], RZ ; /* 0x0000640011117a10 */ /* 0x000fe20007ffe1ff */ /*01b0*/ IMAD R18, R72, c[0x0][0x194], RZ ; /* 0x0000650048127a24 */ /* 0x000fe200078e02ff */ /*01c0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*01d0*/ IMAD R37, R36, R72, R5 ; /* 0x0000004824257224 */ /* 0x000fc400078e0205 */ /*01e0*/ IMAD R3, R17.reuse, R18, RZ ; /* 0x0000001211037224 */ /* 0x040fe400078e02ff */ /*01f0*/ IMAD R10, R17, R37, R2 ; /* 0x00000025110a7224 */ /* 0x000fe400078e0202 */ /*0200*/ IMAD.WIDE R24, R4, R73, c[0x0][0x160] ; /* 0x0000580004187625 */ /* 0x000fc800078e0249 */ /*0210*/ IMAD.WIDE R10, R10, R73, c[0x0][0x180] ; /* 0x000060000a0a7625 */ /* 0x000fca00078e0249 */ /*0220*/ STG.E.64 [R10.64], RZ ; /* 0x000000ff0a007986 */ /* 0x0001e2000c101b06 */ /*0230*/ IMAD.WIDE R12, R3, 0x8, R10 ; /* 0x00000008030c7825 */ /* 0x000fca00078e020a */ /*0240*/ STG.E.64 [R12.64], RZ ; /* 0x000000ff0c007986 */ /* 0x0003e2000c101b06 */ /*0250*/ IMAD.WIDE R14, R3, 0x8, R12 ; /* 0x00000008030e7825 */ /* 0x000fca00078e020c */ /*0260*/ STG.E.64 [R14.64], R8 ; /* 0x000000080e007986 */ /* 0x000fe2000c101b06 */ /*0270*/ IMAD.WIDE R20, R3, 0x8, R14 ; /* 0x0000000803147825 */ /* 0x000fca00078e020e */ /*0280*/ STG.E.64 [R20.64], RZ ; /* 0x000000ff14007986 */ /* 0x000fe2000c101b06 */ /*0290*/ IMAD.WIDE R22, R3, 0x8, R20 ; /* 0x0000000803167825 */ /* 0x000fca00078e0214 */ /*02a0*/ STG.E.64 [R22.64], RZ ; /* 0x000000ff16007986 */ /* 0x0005e8000c101b06 */ /*02b0*/ LDG.E.64 R28, [R24.64+0x8] ; /* 0x00000806181c7981 */ /* 0x000ee2000c1e1b00 */ /*02c0*/ IADD3 R6, R4, 0x1, RZ ; /* 0x0000000104067810 */ /* 0x000fe20007ffe0ff */ /*02d0*/ IMAD.WIDE R30, R73, c[0x0][0x190], R24 ; /* 0x00006400491e7a25 */ /* 0x000fc800078e0218 */ /*02e0*/ IMAD.WIDE R26, R6, R73, c[0x0][0x160] ; /* 0x00005800061a7625 */ /* 0x000fe400078e0249 */ /*02f0*/ LDG.E.64 R30, [R30.64+0x8] ; /* 0x000008061e1e7981 */ /* 0x000f28000c1e1b00 */ /*0300*/ IMAD.WIDE R26, R73, c[0x0][0x190], R26 ; /* 0x00006400491a7a25 */ /* 0x000fcc00078e021a */ /*0310*/ IMAD.WIDE R26, R73, c[0x0][0x190], R26 ; /* 0x00006400491a7a25 */ /* 0x000fcc00078e021a */ /*0320*/ LDG.E.64 R26, [R26.64] ; /* 0x000000061a1a7981 */ /* 0x000f22000c1e1b00 */ /*0330*/ IMAD.WIDE R10, R4, R73, c[0x0][0x168] ; /* 0x00005a00040a7625 */ /* 0x001fc800078e0249 */ /*0340*/ IMAD.WIDE R12, R6, R73, c[0x0][0x168] ; /* 0x00005a00060c7625 */ /* 0x002fe200078e0249 */ /*0350*/ LDG.E.64 R32, [R10.64+0x8] ; /* 0x000008060a207981 */ /* 0x00012a000c1e1b00 */ /*0360*/ IMAD.WIDE R12, R73, c[0x0][0x190], R12 ; /* 0x00006400490c7a25 */ /* 0x000fcc00078e020c */ /*0370*/ IMAD.WIDE R34, R73, c[0x0][0x190], R12 ; /* 0x0000640049227a25 */ /* 0x000fcc00078e020c */ /*0380*/ LDG.E.64 R34, [R34.64] ; /* 0x0000000622227981 */ /* 0x000f22000c1e1b00 */ /*0390*/ MOV R22, 0x0 ; /* 0x0000000000167802 */ /* 0x004fe20000000f00 */ /*03a0*/ IMAD.MOV.U32 R23, RZ, RZ, 0x3fe80000 ; /* 0x3fe80000ff177424 */ /* 0x000fe200078e00ff */ /*03b0*/ IADD3 R37, R72, R37, RZ ; /* 0x0000002548257210 */ /* 0x000fe20007ffe0ff */ /*03c0*/ IMAD.MOV.U32 R42, RZ, RZ, 0x5 ; /* 0x00000005ff2a7424 */ /* 0x000fc800078e00ff */ /*03d0*/ IMAD R16, R2, R42, 0x5 ; /* 0x0000000502107424 */ /* 0x000fe400078e022a */ /*03e0*/ IMAD.WIDE R10, R73, c[0x0][0x190], R10 ; /* 0x00006400490a7a25 */ /* 0x001fe200078e020a */ /*03f0*/ DADD R86, RZ, c[0x3][0xc0] ; /* 0x00c03000ff567629 */ /* 0x000fc80000000000 */ /*0400*/ DMUL R28, R28, c[0x2][0x0] ; /* 0x008000001c1c7a28 */ /* 0x008e0c0000000000 */ /*0410*/ DFMA R12, R28, c[0x2][0x8], R22 ; /* 0x008002001c0c7a2b */ /* 0x001fc80000000016 */ /*0420*/ DFMA R14, R28, c[0x2][0x10], R22 ; /* 0x008004001c0e7a2b */ /* 0x000e0c0000000016 */ /*0430*/ DSETP.GT.AND P0, PT, R12, R14, PT ; /* 0x0000000e0c00722a */ /* 0x001e080003f04000 */ /*0440*/ DADD R28, R28, 0.75 ; /* 0x3fe800001c1c7429 */ /* 0x000e640000000000 */ /*0450*/ FSEL R12, R12, R14, P0 ; /* 0x0000000e0c0c7208 */ /* 0x001fe40000000000 */ /*0460*/ FSEL R13, R13, R15, P0 ; /* 0x0000000f0d0d7208 */ /* 0x000fe20000000000 */ /*0470*/ DMUL R30, R30, c[0x2][0x0] ; /* 0x008000001e1e7a28 */ /* 0x010fca0000000000 */ /*0480*/ DSETP.GEU.AND P0, PT, R12, R28, PT ; /* 0x0000001c0c00722a */ /* 0x002e080003f0e000 */ /*0490*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x000e640000000000 */ /*04a0*/ FSEL R24, R28, R12, !P0 ; /* 0x0000000c1c187208 */ /* 0x001fe40004000000 */ /*04b0*/ FSEL R25, R29, R13, !P0 ; /* 0x0000000d1d197208 */ /* 0x000fe20004000000 */ /*04c0*/ DFMA R12, R30, c[0x2][0x8], R22 ; /* 0x008002001e0c7a2b */ /* 0x000fc80000000016 */ /*04d0*/ DFMA R14, R30, c[0x2][0x10], R22 ; /* 0x008004001e0e7a2b */ /* 0x000e080000000016 */ /*04e0*/ DFMA R20, R26, c[0x2][0x8], R22 ; /* 0x008002001a147a2b */ /* 0x002fc80000000016 */ /*04f0*/ DFMA R22, R26, c[0x2][0x10], R22 ; /* 0x008004001a167a2b */ /* 0x000e480000000016 */ /*0500*/ DSETP.GT.AND P1, PT, R12, R14, PT ; /* 0x0000000e0c00722a */ /* 0x001e080003f24000 */ /*0510*/ DSETP.GT.AND P2, PT, R20, R22, PT ; /* 0x000000161400722a */ /* 0x002e640003f44000 */ /*0520*/ FSEL R12, R12, R14, P1 ; /* 0x0000000e0c0c7208 */ /* 0x001fe40000800000 */ /*0530*/ DADD R30, R30, 0.75 ; /* 0x3fe800001e1e7429 */ /* 0x000e220000000000 */ /*0540*/ FSEL R13, R13, R15, P1 ; /* 0x0000000f0d0d7208 */ /* 0x000fe40000800000 */ /*0550*/ FSEL R14, R20, R22, P2 ; /* 0x00000016140e7208 */ /* 0x002fe20001000000 */ /*0560*/ DADD R26, R26, 0.75 ; /* 0x3fe800001a1a7429 */ /* 0x000e620000000000 */ /*0570*/ FSEL R15, R21, R23, P2 ; /* 0x00000017150f7208 */ /* 0x000fc60001000000 */ /*0580*/ DSETP.GEU.AND P1, PT, R12, R30, PT ; /* 0x0000001e0c00722a */ /* 0x001e080003f2e000 */ /*0590*/ DSETP.GEU.AND P0, PT, R24, 0.75, PT ; /* 0x3fe800001800742a */ /* 0x000e880003f0e000 */ /*05a0*/ DSETP.GEU.AND P2, PT, R14, R26, PT ; /* 0x0000001a0e00722a */ /* 0x002e620003f4e000 */ /*05b0*/ FSEL R22, R30, R12, !P1 ; /* 0x0000000c1e167208 */ /* 0x001fe40004800000 */ /*05c0*/ FSEL R23, R31, R13, !P1 ; /* 0x0000000d1f177208 */ /* 0x000fe40004800000 */ /*05d0*/ FSEL R20, R24, RZ, P0 ; /* 0x000000ff18147208 */ /* 0x004fe20000000000 */ /*05e0*/ LDG.E.64 R30, [R10.64+0x8] ; /* 0x000008060a1e7981 */ /* 0x000162000c1e1b00 */ /*05f0*/ FSEL R21, R25, 1.8125, P0 ; /* 0x3fe8000019157808 */ /* 0x000fe40000000000 */ /*0600*/ FSEL R24, R26, R14, !P2 ; /* 0x0000000e1a187208 */ /* 0x002fe40005000000 */ /*0610*/ FSEL R25, R27, R15, !P2 ; /* 0x0000000f1b197208 */ /* 0x000fe20005000000 */ /*0620*/ DSETP.GEU.AND P0, PT, R22, 0.75, PT ; /* 0x3fe800001600742a */ /* 0x000e480003f0e000 */ /*0630*/ DMUL R14, R20, c[0x3][0x88] ; /* 0x00c02200140e7a28 */ /* 0x0004c80000000000 */ /*0640*/ DSETP.GEU.AND P1, PT, R24, 0.75, PT ; /* 0x3fe800001800742a */ /* 0x000f220003f2e000 */ /*0650*/ FSEL R28, R22, RZ, P0 ; /* 0x000000ff161c7208 */ /* 0x002fe20000000000 */ /*0660*/ IMAD R22, R17, R37, R2 ; /* 0x0000002511167224 */ /* 0x000fe200078e0202 */ /*0670*/ MOV R21, 0x7 ; /* 0x0000000700157802 */ /* 0x004fe20000000f00 */ /*0680*/ DFMA R14, -R32, c[0x3][0x90], -R14 ; /* 0x00c02400200e7a2b */ /* 0x0089e2000000090e */ /*0690*/ FSEL R29, R23, 1.8125, P0 ; /* 0x3fe80000171d7808 */ /* 0x000fe20000000000 */ /*06a0*/ IMAD R13, R19, c[0x0][0x190], RZ ; /* 0x00006400130d7a24 */ /* 0x000fe200078e02ff */ /*06b0*/ FSEL R32, R24, RZ, P1 ; /* 0x000000ff18207208 */ /* 0x010fe40000800000 */ /*06c0*/ FSEL R33, R25, 1.8125, P1 ; /* 0x3fe8000019217808 */ /* 0x000fe20000800000 */ /*06d0*/ IMAD.WIDE R22, R22, R73, c[0x0][0x180] ; /* 0x0000600016167625 */ /* 0x000fe200078e0249 */ /*06e0*/ DFMA R8, R28, c[0x3][0xb0], R8 ; /* 0x00c02c001c087a2b */ /* 0x000fc60000000008 */ /*06f0*/ IMAD R4, R0, R21, c[0x0][0x194] ; /* 0x0000650000047624 */ /* 0x000fe400078e0215 */ /*0700*/ IMAD R21, R13.reuse, c[0x0][0x194], RZ ; /* 0x000065000d157a24 */ /* 0x040fe400078e02ff */ /*0710*/ IMAD R27, R13, R0, c[0x0][0x190] ; /* 0x000064000d1b7624 */ /* 0x000fe200078e0200 */ /*0720*/ DMUL R12, R32, c[0x3][0x88] ; /* 0x00c02200200c7a28 */ /* 0x000e620000000000 */ /*0730*/ IADD3 R4, R4, 0x1, RZ ; /* 0x0000000104047810 */ /* 0x000fe20007ffe0ff */ /*0740*/ IMAD.WIDE R24, R3, 0x8, R22 ; /* 0x0000000803187825 */ /* 0x000fc800078e0216 */ /*0750*/ IMAD R70, R21, 0x5, R16.reuse ; /* 0x0000000515467824 */ /* 0x100fe200078e0210 */ /*0760*/ DFMA R12, R34, c[0x3][0x90], -R12 ; /* 0x00c02400220c7a2b */ /* 0x002e62000000080c */ /*0770*/ IMAD R16, R27, 0x5, R16 ; /* 0x000000051b107824 */ /* 0x000fe400078e0210 */ /*0780*/ IMAD R4, R72, R4, R5 ; /* 0x0000000448047224 */ /* 0x000fe200078e0205 */ /*0790*/ DADD R20, R8, c[0x3][0xd0] ; /* 0x00c0340008147629 */ /* 0x0004e40000000000 */ /*07a0*/ IMAD.WIDE R8, R3, 0x8, R24 ; /* 0x0000000803087825 */ /* 0x004fe200078e0218 */ /*07b0*/ IADD3 R68, R16, 0x1, RZ ; /* 0x0000000110447810 */ /* 0x000fe20007ffe0ff */ /*07c0*/ DADD R38, R12, -c[0x3][0xc8] ; /* 0x80c032000c267629 */ /* 0x0022a40000000000 */ /*07d0*/ IMAD R4, R17, R4, R2 ; /* 0x0000000411047224 */ /* 0x000fc400078e0202 */ /*07e0*/ IMAD.WIDE R40, R3, 0x8, R8 ; /* 0x0000000803287825 */ /* 0x000fe200078e0208 */ /*07f0*/ STG.E.64 [R22.64], RZ ; /* 0x000000ff16007986 */ /* 0x000fe6000c101b06 */ /*0800*/ IMAD.WIDE R26, R4, R73.reuse, c[0x0][0x180] ; /* 0x00006000041a7625 */ /* 0x080fe200078e0249 */ /*0810*/ STG.E.64 [R24.64], R14 ; /* 0x0000000e18007986 */ /* 0x000fe6000c101b06 */ /*0820*/ IMAD.WIDE R12, R16, R73.reuse, c[0x0][0x178] ; /* 0x00005e00100c7625 */ /* 0x082fe200078e0249 */ /*0830*/ STG.E.64 [R8.64], R20 ; /* 0x0000001408007986 */ /* 0x0083e6000c101b06 */ /*0840*/ IMAD.WIDE R70, R70, R73.reuse, c[0x0][0x178] ; /* 0x00005e0046467625 */ /* 0x080fe200078e0249 */ /*0850*/ STG.E.64 [R40.64], R38 ; /* 0x0000002628007986 */ /* 0x0045e6000c101b06 */ /*0860*/ IMAD.WIDE R68, R68, R73, c[0x0][0x178] ; /* 0x00005e0044447625 */ /* 0x000fe200078e0249 */ /*0870*/ STG.E.64 [R26.64], R86 ; /* 0x000000561a007986 */ /* 0x0005e8000c101b06 */ /*0880*/ LDG.E.64 R12, [R12.64] ; /* 0x000000060c0c7981 */ /* 0x000f68000c1e1b00 */ /*0890*/ LDG.E.64 R66, [R70.64] ; /* 0x0000000646427981 */ /* 0x000568000c1e1b00 */ /*08a0*/ LDG.E.64 R64, [R70.64+0x8] ; /* 0x0000080646407981 */ /* 0x000568000c1e1b00 */ /*08b0*/ LDG.E.64 R10, [R68.64] ; /* 0x00000006440a7981 */ /* 0x001568000c1e1b00 */ /*08c0*/ LDG.E.64 R62, [R70.64+0x10] ; /* 0x00001006463e7981 */ /* 0x000568000c1e1b00 */ /*08d0*/ LDG.E.64 R8, [R68.64+0x8] ; /* 0x0000080644087981 */ /* 0x002562000c1e1b00 */ /*08e0*/ ISETP.GE.AND P0, PT, R0.reuse, 0x3, PT ; /* 0x000000030000780c */ /* 0x040fe20003f06270 */ /*08f0*/ CS2R R84, SRZ ; /* 0x0000000000547805 */ /* 0x000fe2000001ff00 */ /*0900*/ IMAD.MOV.U32 R24, RZ, RZ, 0x0 ; /* 0x00000000ff187424 */ /* 0x000fe200078e00ff */ /*0910*/ MOV R25, 0x3ff00000 ; /* 0x3ff0000000197802 */ /* 0x000fe20000000f00 */ /*0920*/ CS2R R22, SRZ ; /* 0x0000000000167805 */ /* 0x000fe2000001ff00 */ /*0930*/ IADD3 R4, R0, -0x2, RZ ; /* 0xfffffffe00047810 */ /* 0x000fd00007ffe0ff */ /*0940*/ @!P0 BRA 0x1600 ; /* 0x00000cb000008947 */ /* 0x000fea0003800000 */ /*0950*/ IADD3 R16, R36, c[0x0][0x194], RZ ; /* 0x0000650024107a10 */ /* 0x004fe20007ffe0ff */ /*0960*/ IMAD R23, R7, R42, 0xa ; /* 0x0000000a07177424 */ /* 0x000fe200078e022a */ /*0970*/ MOV R37, R39 ; /* 0x0000002700257202 */ /* 0x000fe20000000f00 */ /*0980*/ IMAD R24, R2, 0x5, RZ ; /* 0x0000000502187824 */ /* 0x000fe200078e02ff */ /*0990*/ IADD3 R22, R16, -0x1, RZ ; /* 0xffffffff10167810 */ /* 0x000fe20007ffe0ff */ /*09a0*/ IMAD.IADD R18, R5, 0x1, R18 ; /* 0x0000000105127824 */ /* 0x000fe200078e0212 */ /*09b0*/ ULDC UR4, c[0x0][0x194] ; /* 0x0000650000047ab9 */ /* 0x000fe20000000800 */ /*09c0*/ IMAD R16, R23, c[0x0][0x190], R24 ; /* 0x0000640017107a24 */ /* 0x000fe200078e0218 */ /*09d0*/ IADD3 R23, R36, 0x2, RZ ; /* 0x0000000224177810 */ /* 0x000fe20007ffe0ff */ /*09e0*/ IMAD R22, R72, R22, R5.reuse ; /* 0x0000001648167224 */ /* 0x100fe200078e0205 */ /*09f0*/ UIADD3 UR4, -UR4, URZ, URZ ; /* 0x0000003f04047290 */ /* 0x000fe2000fffe13f */ /*0a00*/ IMAD.MOV.U32 R36, RZ, RZ, R38 ; /* 0x000000ffff247224 */ /* 0x000fe200078e0026 */ /*0a10*/ IADD3 R77, R0.reuse, -0x3, RZ ; /* 0xfffffffd004d7810 */ /* 0x040fe20007ffe0ff */ /*0a20*/ IMAD R22, R17, R22, R2 ; /* 0x0000001611167224 */ /* 0x000fe200078e0202 */ /*0a30*/ IADD3 R78, R0, -0x5, RZ ; /* 0xfffffffb004e7810 */ /* 0x000fe20007ffe0ff */ /*0a40*/ IMAD R23, R72, R23, R5 ; /* 0x0000001748177224 */ /* 0x000fe200078e0205 */ /*0a50*/ MOV R24, 0x0 ; /* 0x0000000000187802 */ /* 0x000fe20000000f00 */ /*0a60*/ IMAD.WIDE R38, R22, R73, c[0x0][0x180] ; /* 0x0000600016267625 */ /* 0x000fe200078e0249 */ /*0a70*/ CS2R R44, SRZ ; /* 0x00000000002c7805 */ /* 0x000fe2000001ff00 */ /*0a80*/ MOV R46, R86 ; /* 0x00000056002e7202 */ /* 0x000fc40000000f00 */ /*0a90*/ IMAD R72, R17, R72, RZ ; /* 0x0000004811487224 */ /* 0x000fe200078e02ff */ /*0aa0*/ MOV R82, UR4 ; /* 0x0000000400527c02 */ /* 0x000fe20008000f00 */ /*0ab0*/ IMAD.WIDE R40, R3, 0x8, R38 ; /* 0x0000000803287825 */ /* 0x000fe200078e0226 */ /*0ac0*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fc60008000000 */ /*0ad0*/ IMAD R74, R17, R18, R2 ; /* 0x00000012114a7224 */ /* 0x000fe400078e0202 */ /*0ae0*/ IMAD.WIDE R42, R3, 0x8, R40 ; /* 0x00000008032a7825 */ /* 0x000fc800078e0228 */ /*0af0*/ IMAD R75, R17, R23, R2.reuse ; /* 0x00000017114b7224 */ /* 0x100fe400078e0202 */ /*0b00*/ IMAD R76, R5, R17, R2 ; /* 0x00000011054c7224 */ /* 0x000fe200078e0202 */ /*0b10*/ IADD3 R17, R7, 0x3, RZ ; /* 0x0000000307117810 */ /* 0x000fe20007ffe0ff */ /*0b20*/ IMAD.WIDE R48, R3, 0x8, R42 ; /* 0x0000000803307825 */ /* 0x000fe200078e022a */ /*0b30*/ CS2R R22, SRZ ; /* 0x0000000000167805 */ /* 0x000fc6000001ff00 */ /*0b40*/ IMAD R19, R19, c[0x0][0x190], R2.reuse ; /* 0x0000640013137a24 */ /* 0x100fe400078e0202 */ /*0b50*/ IMAD R17, R17, c[0x0][0x190], R2 ; /* 0x0000640011117a24 */ /* 0x000fe400078e0202 */ /*0b60*/ IMAD R79, R0, c[0x0][0x198], RZ ; /* 0x00006600004f7a24 */ /* 0x000fe200078e02ff */ /*0b70*/ IADD3 R80, R19, 0x1, RZ ; /* 0x0000000113507810 */ /* 0x000fe20007ffe0ff */ /*0b80*/ IMAD.MOV.U32 R25, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff197424 */ /* 0x000fe200078e00ff */ /*0b90*/ IADD3 R81, R17, 0x1, RZ ; /* 0x0000000111517810 */ /* 0x000fe20007ffe0ff */ /*0ba0*/ IMAD.MOV.U32 R47, RZ, RZ, R87 ; /* 0x000000ffff2f7224 */ /* 0x000fe400078e0057 */ /*0bb0*/ IMAD R79, R79, c[0x0][0x190], RZ ; /* 0x000064004f4f7a24 */ /* 0x000fc400078e02ff */ /*0bc0*/ IMAD.WIDE R50, R3, 0x8, R48 ; /* 0x0000000803327825 */ /* 0x000fc800078e0230 */ /*0bd0*/ IADD3 R0, R78, -UR4, RZ ; /* 0x800000044e007c10 */ /* 0x000fe2000fffe0ff */ /*0be0*/ IMAD.MOV.U32 R84, RZ, RZ, R46 ; /* 0x000000ffff547224 */ /* 0x000fe200078e002e */ /*0bf0*/ MOV R85, R47 ; /* 0x0000002f00557202 */ /* 0x000fe40000000f00 */ /*0c00*/ ISETP.NE.AND P0, PT, R0, -0x2, PT ; /* 0xfffffffe0000780c */ /* 0x000fda0003f05270 */ /*0c10*/ @!P0 BRA 0x1140 ; /* 0x0000052000008947 */ /* 0x000fea0003800000 */ /*0c20*/ IMAD.MOV.U32 R60, RZ, RZ, 0x8 ; /* 0x00000008ff3c7424 */ /* 0x000fc800078e00ff */ /*0c30*/ IMAD.WIDE R46, R81, R60, c[0x0][0x160] ; /* 0x00005800512e7625 */ /* 0x000fcc00078e023c */ /*0c40*/ LDG.E.64 R46, [R46.64] ; /* 0x000000062e2e7981 */ /* 0x000ea2000c1e1b00 */ /*0c50*/ IMAD.WIDE R18, R81, R60, c[0x0][0x168] ; /* 0x00005a0051127625 */ /* 0x000fcc00078e023c */ /*0c60*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000612127981 */ /* 0x000ee2000c1e1b00 */ /*0c70*/ MOV R56, 0x0 ; /* 0x0000000000387802 */ /* 0x000fe20000000f00 */ /*0c80*/ IMAD.MOV.U32 R57, RZ, RZ, 0x3fe80000 ; /* 0x3fe80000ff397424 */ /* 0x000fe200078e00ff */ /*0c90*/ DMUL R52, R46, c[0x2][0x0] ; /* 0x008000002e347a28 */ /* 0x004e0c0000000000 */ /*0ca0*/ DFMA R54, R52, c[0x2][0x8], R56 ; /* 0x0080020034367a2b */ /* 0x001fc80000000038 */ /*0cb0*/ DFMA R56, R52, c[0x2][0x10], R56 ; /* 0x0080040034387a2b */ /* 0x000e080000000038 */ /*0cc0*/ DADD R52, R52, 0.75 ; /* 0x3fe8000034347429 */ /* 0x000fc80000000000 */ /*0cd0*/ DSETP.GT.AND P0, PT, R54, R56, PT ; /* 0x000000383600722a */ /* 0x001e0c0003f04000 */ /*0ce0*/ FSEL R54, R54, R56, P0 ; /* 0x0000003836367208 */ /* 0x001fe40000000000 */ /*0cf0*/ FSEL R55, R55, R57, P0 ; /* 0x0000003937377208 */ /* 0x000fcc0000000000 */ /*0d00*/ DSETP.GEU.AND P0, PT, R54, R52, PT ; /* 0x000000343600722a */ /* 0x000e0c0003f0e000 */ /*0d10*/ FSEL R46, R52, R54, !P0 ; /* 0x00000036342e7208 */ /* 0x001fe40004000000 */ /*0d20*/ FSEL R47, R53, R55, !P0 ; /* 0x00000037352f7208 */ /* 0x000fe20004000000 */ /*0d30*/ DMUL R52, R28, c[0x3][0x88] ; /* 0x00c022001c347a28 */ /* 0x000e220000000000 */ /*0d40*/ MOV R54, 0x0 ; /* 0x0000000000367802 */ /* 0x000fe20000000f00 */ /*0d50*/ IMAD.MOV.U32 R55, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff377424 */ /* 0x000fc600078e00ff */ /*0d60*/ DSETP.GEU.AND P0, PT, R46, 0.75, PT ; /* 0x3fe800002e00742a */ /* 0x000e480003f0e000 */ /*0d70*/ DFMA R52, -R30, c[0x3][0x90], -R52 ; /* 0x00c024001e347a2b */ /* 0x021fe40000000934 */ /*0d80*/ FSEL R96, R46, RZ, P0 ; /* 0x000000ff2e607208 */ /* 0x002fe40000000000 */ /*0d90*/ FSEL R97, R47, 1.8125, P0 ; /* 0x3fe800002f617808 */ /* 0x000fe20000000000 */ /*0da0*/ DFMA R54, R32, c[0x3][0xb0], R54 ; /* 0x00c02c0020367a2b */ /* 0x000fe20000000036 */ /*0db0*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */ /* 0x000fc8000bf05270 */ /*0dc0*/ DMUL R56, R96, c[0x3][0x88] ; /* 0x00c0220060387a28 */ /* 0x000ecc0000000000 */ /*0dd0*/ DFMA R56, R18, c[0x3][0x90], -R56 ; /* 0x00c0240012387a2b */ /* 0x0080460000000838 */ /*0de0*/ @!P0 BRA 0xfb0 ; /* 0x000001c000008947 */ /* 0x000fea0003800000 */ /*0df0*/ UIADD3 UR5, UR4, 0x2, URZ ; /* 0x0000000204057890 */ /* 0x003fcc000fffe03f */ /*0e00*/ ISETP.LE.AND P0, PT, R77, UR5, PT ; /* 0x000000054d007c0c */ /* 0x000fda000bf03270 */ /*0e10*/ @!P0 BRA 0xf30 ; /* 0x0000011000008947 */ /* 0x000fea0003800000 */ /*0e20*/ ISETP.NE.AND P0, PT, R82, -0x5, PT ; /* 0xfffffffb5200780c */ /* 0x000fe20003f05270 */ /*0e30*/ CS2R R46, SRZ ; /* 0x00000000002e7805 */ /* 0x000fd8000001ff00 */ /*0e40*/ @!P0 BRA 0xed0 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*0e50*/ ISETP.NE.AND P0, PT, R0, -0x1, PT ; /* 0xffffffff0000780c */ /* 0x000fe20003f05270 */ /*0e60*/ CS2R R58, SRZ ; /* 0x00000000003a7805 */ /* 0x000fd8000001ff00 */ /*0e70*/ @P0 BRA 0x1010 ; /* 0x0000019000000947 */ /* 0x000fea0003800000 */ /*0e80*/ DADD R52, R52, -c[0x3][0xc8] ; /* 0x80c0320034347629 */ /* 0x000e220000000000 */ /*0e90*/ MOV R58, R86 ; /* 0x00000056003a7202 */ /* 0x000fe20000000f00 */ /*0ea0*/ IMAD.MOV.U32 R59, RZ, RZ, R87 ; /* 0x000000ffff3b7224 */ /* 0x000fe400078e0057 */ /*0eb0*/ DADD R54, R54, c[0x3][0xd0] ; /* 0x00c0340036367629 */ /* 0x000e620000000000 */ /*0ec0*/ BRA 0x1010 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*0ed0*/ DADD R52, R52, -c[0x3][0xc8] ; /* 0x80c0320034347629 */ /* 0x000e220000000000 */ /*0ee0*/ MOV R58, R86 ; /* 0x00000056003a7202 */ /* 0x000fe20000000f00 */ /*0ef0*/ IMAD.MOV.U32 R59, RZ, RZ, R87 ; /* 0x000000ffff3b7224 */ /* 0x000fe400078e0057 */ /*0f00*/ DADD R54, R54, c[0x3][0xd8] ; /* 0x00c0360036367629 */ /* 0x000e480000000000 */ /*0f10*/ DADD R56, R56, -c[0x3][0xc8] ; /* 0x80c0320038387629 */ /* 0x000ea20000000000 */ /*0f20*/ BRA 0x1010 ; /* 0x000000e000007947 */ /* 0x000fea0003800000 */ /*0f30*/ DADD R52, R52, -c[0x3][0xc8] ; /* 0x80c0320034347629 */ /* 0x000e220000000000 */ /*0f40*/ MOV R46, R86.reuse ; /* 0x00000056002e7202 */ /* 0x080fe20000000f00 */ /*0f50*/ IMAD.MOV.U32 R47, RZ, RZ, R87.reuse ; /* 0x000000ffff2f7224 */ /* 0x100fe200078e0057 */ /*0f60*/ MOV R58, R86 ; /* 0x00000056003a7202 */ /* 0x000fe20000000f00 */ /*0f70*/ DADD R54, R54, c[0x3][0xd8] ; /* 0x00c0360036367629 */ /* 0x000e620000000000 */ /*0f80*/ IMAD.MOV.U32 R59, RZ, RZ, R87 ; /* 0x000000ffff3b7224 */ /* 0x000fc600078e0057 */ /*0f90*/ DADD R56, R56, -c[0x3][0xc8] ; /* 0x80c0320038387629 */ /* 0x000ea20000000000 */ /*0fa0*/ BRA 0x1010 ; /* 0x0000006000007947 */ /* 0x000fea0003800000 */ /*0fb0*/ DADD R52, R52, -c[0x3][0xc8] ; /* 0x80c0320034347629 */ /* 0x003e220000000000 */ /*0fc0*/ CS2R R58, SRZ ; /* 0x00000000003a7805 */ /* 0x000fe2000001ff00 */ /*0fd0*/ MOV R46, R86 ; /* 0x00000056002e7202 */ /* 0x000fe20000000f00 */ /*0fe0*/ IMAD.MOV.U32 R47, RZ, RZ, R87 ; /* 0x000000ffff2f7224 */ /* 0x000fe200078e0057 */ /*0ff0*/ DADD R54, R54, c[0x3][0xd8] ; /* 0x00c0360036367629 */ /* 0x000e480000000000 */ /*1000*/ DADD R56, R56, -c[0x3][0xc8] ; /* 0x80c0320038387629 */ /* 0x000e880000000000 */ /*1010*/ IMAD.WIDE R60, R75, R60, c[0x0][0x180] ; /* 0x000060004b3c7625 */ /* 0x003fe200078e023c */ /*1020*/ MOV R30, R34 ; /* 0x00000022001e7202 */ /* 0x000fe40000000f00 */ /*1030*/ MOV R28, R32 ; /* 0x00000020001c7202 */ /* 0x000fe20000000f00 */ /*1040*/ IMAD.MOV.U32 R31, RZ, RZ, R35 ; /* 0x000000ffff1f7224 */ /* 0x000fe200078e0023 */ /*1050*/ STG.E.64 [R60.64], R58 ; /* 0x0000003a3c007986 */ /* 0x0001e2000c101b06 */ /*1060*/ IMAD.WIDE R88, R3.reuse, 0x8, R60 ; /* 0x0000000803587825 */ /* 0x040fe200078e023c */ /*1070*/ MOV R34, R18 ; /* 0x0000001200227202 */ /* 0x000fe40000000f00 */ /*1080*/ MOV R32, R96 ; /* 0x0000006000207202 */ /* 0x000fe20000000f00 */ /*1090*/ IMAD.MOV.U32 R29, RZ, RZ, R33 ; /* 0x000000ffff1d7224 */ /* 0x000fe200078e0021 */ /*10a0*/ STG.E.64 [R88.64], R52 ; /* 0x0000003458007986 */ /* 0x0001e2000c101b06 */ /*10b0*/ IMAD.WIDE R90, R3, 0x8, R88 ; /* 0x00000008035a7825 */ /* 0x000fc800078e0258 */ /*10c0*/ IMAD.MOV.U32 R35, RZ, RZ, R19 ; /* 0x000000ffff237224 */ /* 0x000fe200078e0013 */ /*10d0*/ STG.E.64 [R90.64], R54 ; /* 0x000000365a007986 */ /* 0x0001e2000c101b06 */ /*10e0*/ IMAD.WIDE R92, R3, 0x8, R90 ; /* 0x00000008035c7825 */ /* 0x000fc800078e025a */ /*10f0*/ IMAD.MOV.U32 R33, RZ, RZ, R97 ; /* 0x000000ffff217224 */ /* 0x000fe200078e0061 */ /*1100*/ STG.E.64 [R92.64], R56 ; /* 0x000000385c007986 */ /* 0x0041e2000c101b06 */ /*1110*/ IMAD.WIDE R94, R3, 0x8, R92 ; /* 0x00000008035e7825 */ /* 0x000fca00078e025c */ /*1120*/ STG.E.64 [R94.64], R46 ; /* 0x0000002e5e007986 */ /* 0x0001e2000c101b06 */ /*1130*/ BRA 0x1210 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*1140*/ MOV R18, 0x0 ; /* 0x0000000000127802 */ /* 0x000fe20000000f00 */ /*1150*/ IMAD.MOV.U32 R19, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff137424 */ /* 0x000fe200078e00ff */ /*1160*/ STG.E.64 [R38.64], RZ ; /* 0x000000ff26007986 */ /* 0x0001e2000c101b06 */ /*1170*/ CS2R R46, SRZ ; /* 0x00000000002e7805 */ /* 0x000fe2000001ff00 */ /*1180*/ MOV R54, 0x0 ; /* 0x0000000000367802 */ /* 0x000fe20000000f00 */ /*1190*/ IMAD.MOV.U32 R55, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff377424 */ /* 0x000fe200078e00ff */ /*11a0*/ STG.E.64 [R40.64], RZ ; /* 0x000000ff28007986 */ /* 0x0001e2000c101b06 */ /*11b0*/ CS2R R56, SRZ ; /* 0x0000000000387805 */ /* 0x000fe2000001ff00 */ /*11c0*/ CS2R R52, SRZ ; /* 0x0000000000347805 */ /* 0x000fe2000001ff00 */ /*11d0*/ CS2R R58, SRZ ; /* 0x00000000003a7805 */ /* 0x000fe2000001ff00 */ /*11e0*/ STG.E.64 [R42.64], R18 ; /* 0x000000122a007986 */ /* 0x0001e8000c101b06 */ /*11f0*/ STG.E.64 [R48.64], RZ ; /* 0x000000ff30007986 */ /* 0x0001e8000c101b06 */ /*1200*/ STG.E.64 [R50.64], RZ ; /* 0x000000ff32007986 */ /* 0x0001e4000c101b06 */ /*1210*/ MUFU.RCP64H R19, R25 ; /* 0x0000001900137308 */ /* 0x001e220000001800 */ /*1220*/ IADD3 R18, R25, 0x300402, RZ ; /* 0x0030040219127810 */ /* 0x000fe20007ffe0ff */ /*1230*/ BSSY B0, 0x1350 ; /* 0x0000011000007945 */ /* 0x000fe60003800000 */ /*1240*/ FSETP.GEU.AND P0, PT, |R18|, 5.8789094863358348022e-39, PT ; /* 0x004004021200780b */ /* 0x000fc40003f0e200 */ /*1250*/ DFMA R60, R18, -R24, 1 ; /* 0x3ff00000123c742b */ /* 0x001e0c0000000818 */ /*1260*/ DFMA R60, R60, R60, R60 ; /* 0x0000003c3c3c722b */ /* 0x001e0c000000003c */ /*1270*/ DFMA R60, R18, R60, R18 ; /* 0x0000003c123c722b */ /* 0x001e0c0000000012 */ /*1280*/ DFMA R88, R60, -R24, 1 ; /* 0x3ff000003c58742b */ /* 0x001e0c0000000818 */ /*1290*/ DFMA R92, R60, R88, R60 ; /* 0x000000583c5c722b */ /* 0x001064000000003c */ /*12a0*/ MOV R61, 0x8 ; /* 0x00000008003d7802 */ /* 0x001fca0000000f00 */ /*12b0*/ IMAD.WIDE R60, R16, R61, c[0x0][0x178] ; /* 0x00005e00103c7625 */ /* 0x000fe200078e023d */ /*12c0*/ @P0 BRA 0x1340 ; /* 0x0000007000000947 */ /* 0x000fea0003800000 */ /*12d0*/ LOP3.LUT R18, R25, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff19127812 */ /* 0x002fe200078ec0ff */ /*12e0*/ IMAD.MOV.U32 R17, RZ, RZ, R25 ; /* 0x000000ffff117224 */ /* 0x000fe200078e0019 */ /*12f0*/ MOV R0, 0x1320 ; /* 0x0000132000007802 */ /* 0x000fe40000000f00 */ /*1300*/ IADD3 R18, R18, -0x100000, RZ ; /* 0xfff0000012127810 */ /* 0x000fe40007ffe0ff */ /*1310*/ CALL.REL.NOINC 0x36c0 ; /* 0x000023a000007944 */ /* 0x020fea0003c00000 */ /*1320*/ MOV R92, R18 ; /* 0x00000012005c7202 */ /* 0x000fe20000000f00 */ /*1330*/ IMAD.MOV.U32 R93, RZ, RZ, R19 ; /* 0x000000ffff5d7224 */ /* 0x000fe400078e0013 */ /*1340*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x002fea0003800000 */ /*1350*/ LDG.E.64 R18, [R60.64+0x28] ; /* 0x000028063c127981 */ /* 0x0000a8000c1e1b00 */ /*1360*/ LDG.E.64 R90, [R60.64+0x38] ; /* 0x000038063c5a7981 */ /* 0x0000e8000c1e1b00 */ /*1370*/ LDG.E.64 R88, [R60.64+0x30] ; /* 0x000030063c587981 */ /* 0x000122000c1e1b00 */ /*1380*/ DMUL R96, R92, R44 ; /* 0x0000002c5c607228 */ /* 0x000fc80000000000 */ /*1390*/ DMUL R94, R92, R22 ; /* 0x000000165c5e7228 */ /* 0x000e480000000000 */ /*13a0*/ DMUL R98, R92, R66 ; /* 0x000000425c627228 */ /* 0x020e080000000000 */ /*13b0*/ DMUL R44, R92, R64 ; /* 0x000000405c2c7228 */ /* 0x000e080000000000 */ /*13c0*/ DMUL R92, R92, R62 ; /* 0x0000003e5c5c7228 */ /* 0x000e080000000000 */ /*13d0*/ DFMA R24, R94, -R14, R20 ; /* 0x8000000e5e18722b */ /* 0x002e480000000014 */ /*13e0*/ DFMA R22, R96, -R14, R36 ; /* 0x8000000e6016722b */ /* 0x000e080000000024 */ /*13f0*/ DFMA R66, R98, -R14, R12 ; /* 0x8000000e6242722b */ /* 0x001e08000000000c */ /*1400*/ DFMA R64, R44, -R14, R10 ; /* 0x8000000e2c40722b */ /* 0x000e08000000000a */ /*1410*/ DFMA R62, R92, -R14, R8 ; /* 0x8000000e5c3e722b */ /* 0x000e080000000008 */ /*1420*/ DFMA R14, R94, -R58, R52 ; /* 0x8000003a5e0e722b */ /* 0x0000240000000034 */ /*1430*/ IMAD.WIDE R52, R80, R73, c[0x0][0x188] ; /* 0x0000620050347625 */ /* 0x001fc800078e0249 */ /*1440*/ IMAD.WIDE R8, R76, R73, c[0x0][0x180] ; /* 0x000060004c087625 */ /* 0x000fc800078e0249 */ /*1450*/ IMAD.WIDE R60, R79, 0x8, R52 ; /* 0x000000084f3c7825 */ /* 0x000fe200078e0234 */ /*1460*/ DFMA R20, R96, -R58, R54 ; /* 0x8000003a6014722b */ /* 0x0000060000000036 */ /*1470*/ IMAD.WIDE R36, R74, R73, c[0x0][0x180] ; /* 0x000060004a247625 */ /* 0x000fe200078e0249 */ /*1480*/ STG.E.64 [R8.64], R94 ; /* 0x0000005e08007986 */ /* 0x0003e6000c101b06 */ /*1490*/ IMAD.WIDE R54, R79, 0x8, R60 ; /* 0x000000084f367825 */ /* 0x001fe200078e023c */ /*14a0*/ STG.E.64 [R36.64], R96 ; /* 0x0000006024007986 */ /* 0x0001e2000c101b06 */ /*14b0*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fc6000fffe03f */ /*14c0*/ STG.E.64 [R52.64], R98 ; /* 0x0000006234007986 */ /* 0x000fe8000c101b06 */ /*14d0*/ STG.E.64 [R60.64], R44 ; /* 0x0000002c3c007986 */ /* 0x0001e8000c101b06 */ /*14e0*/ STG.E.64 [R54.64], R92 ; /* 0x0000005c36007986 */ /* 0x0001e2000c101b06 */ /*14f0*/ ISETP.LE.AND P0, PT, R4, UR4, PT ; /* 0x0000000404007c0c */ /* 0x000fe4000bf03270 */ /*1500*/ MOV R9, c[0x0][0x190] ; /* 0x0000640000097a02 */ /* 0x002fe20000000f00 */ /*1510*/ IMAD.IADD R75, R72, 0x1, R75 ; /* 0x00000001484b7824 */ /* 0x000fe200078e024b */ /*1520*/ IADD3 R82, R82, 0x1, RZ ; /* 0x0000000152527810 */ /* 0x000fc60007ffe0ff */ /*1530*/ IMAD R80, R9.reuse, c[0x0][0x198], R80 ; /* 0x0000660009507a24 */ /* 0x040fe400078e0250 */ /*1540*/ IMAD R16, R9, 0x5, R16 ; /* 0x0000000509107824 */ /* 0x000fe200078e0210 */ /*1550*/ IADD3 R81, R81, c[0x0][0x190], RZ ; /* 0x0000640051517a10 */ /* 0x000fe20007ffe0ff */ /*1560*/ IMAD.IADD R74, R72.reuse, 0x1, R74 ; /* 0x00000001484a7824 */ /* 0x040fe200078e024a */ /*1570*/ IADD3 R76, R72, R76, RZ ; /* 0x0000004c484c7210 */ /* 0x000fe20007ffe0ff */ /*1580*/ IMAD.MOV.U32 R37, RZ, RZ, R57 ; /* 0x000000ffff257224 */ /* 0x001fe200078e0039 */ /*1590*/ MOV R36, R56 ; /* 0x0000003800247202 */ /* 0x000fe20000000f00 */ /*15a0*/ DFMA R12, R98, -R58, R18 ; /* 0x8000003a620c722b */ /* 0x004e080000000012 */ /*15b0*/ DFMA R8, R92, -R58, R90 ; /* 0x8000003a5c08722b */ /* 0x008e48000000005a */ /*15c0*/ DFMA R10, R44, -R58, R88 ; /* 0x8000003a2c0a722b */ /* 0x0104e40000000058 */ /*15d0*/ MOV R44, R84 ; /* 0x00000054002c7202 */ /* 0x004fe20000000f00 */ /*15e0*/ IMAD.MOV.U32 R45, RZ, RZ, R85 ; /* 0x000000ffff2d7224 */ /* 0x000fe200078e0055 */ /*15f0*/ @!P0 BRA 0xbd0 ; /* 0xfffff5d000008947 */ /* 0x00bfea000383ffff */ /*1600*/ MUFU.RCP64H R17, R25 ; /* 0x0000001900117308 */ /* 0x004e220000001800 */ /*1610*/ IADD3 R16, R25, 0x300402, RZ ; /* 0x0030040219107810 */ /* 0x000fe20007ffe0ff */ /*1620*/ ULDC UR5, c[0x0][0x198] ; /* 0x0000660000057ab9 */ /* 0x000fe20000000800 */ /*1630*/ MOV R30, c[0x0][0x194] ; /* 0x00006500001e7a02 */ /* 0x020fe20000000f00 */ /*1640*/ UIADD3 UR5, UR5, -0x2, URZ ; /* 0xfffffffe05057890 */ /* 0x000fe2000fffe03f */ /*1650*/ FSETP.GEU.AND P1, PT, |R16|, 5.8789094863358348022e-39, PT ; /* 0x004004021000780b */ /* 0x000fe20003f2e200 */ /*1660*/ ULDC UR4, c[0x0][0x190] ; /* 0x0000640000047ab9 */ /* 0x000fe20000000800 */ /*1670*/ BSSY B0, 0x17d0 ; /* 0x0000015000007945 */ /* 0x000fe20003800000 */ /*1680*/ IMAD R0, R30.reuse, 0x5, RZ ; /* 0x000000051e007824 */ /* 0x040fe200078e02ff */ /*1690*/ UIADD3 UR4, UR4, -0x2, URZ ; /* 0xfffffffe04047890 */ /* 0x000fe2000fffe03f */ /*16a0*/ ISETP.GE.AND P0, PT, R30, 0x3, PT ; /* 0x000000031e00780c */ /* 0x000fc40003f06270 */ /*16b0*/ IMAD R0, R0, UR5, R5 ; /* 0x0000000500007c24 */ /* 0x000fe2000f8e0205 */ /*16c0*/ SHF.R.S32.HI R31, RZ, 0x1f, R6 ; /* 0x0000001fff1f7819 */ /* 0x000fe20000011406 */ /*16d0*/ DFMA R18, R16, -R24, 1 ; /* 0x3ff000001012742b */ /* 0x001e0c0000000818 */ /*16e0*/ DFMA R18, R18, R18, R18 ; /* 0x000000121212722b */ /* 0x001e0c0000000012 */ /*16f0*/ DFMA R18, R16, R18, R16 ; /* 0x000000121012722b */ /* 0x0010640000000010 */ /*1700*/ IADD3 R17, R0, UR5, RZ ; /* 0x0000000500117c10 */ /* 0x001fe4000fffe0ff */ /*1710*/ IADD3 R16, R6, c[0x0][0x190], RZ ; /* 0x0000640006107a10 */ /* 0x000fe40007ffe0ff */ /*1720*/ DFMA R28, R18, -R24, 1 ; /* 0x3ff00000121c742b */ /* 0x002e0c0000000818 */ /*1730*/ DFMA R18, R18, R28, R18 ; /* 0x0000001c1212722b */ /* 0x0010640000000012 */ /*1740*/ IMAD R28, R17, UR4, R2 ; /* 0x00000004111c7c24 */ /* 0x001fc8000f8e0202 */ /*1750*/ IMAD.WIDE R28, R28, R73, c[0x0][0x180] ; /* 0x000060001c1c7625 */ /* 0x000fe200078e0249 */ /*1760*/ @P1 BRA 0x17c0 ; /* 0x0000005000001947 */ /* 0x000fea0003800000 */ /*1770*/ LOP3.LUT R18, R25, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff19127812 */ /* 0x002fe200078ec0ff */ /*1780*/ IMAD.MOV.U32 R17, RZ, RZ, R25 ; /* 0x000000ffff117224 */ /* 0x000fe200078e0019 */ /*1790*/ MOV R0, 0x17c0 ; /* 0x000017c000007802 */ /* 0x000fe40000000f00 */ /*17a0*/ IADD3 R18, R18, -0x100000, RZ ; /* 0xfff0000012127810 */ /* 0x000fe40007ffe0ff */ /*17b0*/ CALL.REL.NOINC 0x36c0 ; /* 0x00001f0000007944 */ /* 0x000fea0003c00000 */ /*17c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x002fea0003800000 */ /*17d0*/ DMUL R22, R18.reuse, R22 ; /* 0x0000001612167228 */ /* 0x040e220000000000 */ /*17e0*/ MOV R30, c[0x0][0x194] ; /* 0x00006500001e7a02 */ /* 0x000fe20000000f00 */ /*17f0*/ BSSY B0, 0x1990 ; /* 0x0000019000007945 */ /* 0x000fe40003800000 */ /*1800*/ DMUL R84, R18, R84 ; /* 0x0000005412547228 */ /* 0x000fe40000000000 */ /*1810*/ IMAD R30, R30, 0x7, RZ ; /* 0x000000071e1e7824 */ /* 0x000fc400078e02ff */ /*1820*/ DFMA R32, R22, -R14, R20 ; /* 0x8000000e1620722b */ /* 0x001e080000000014 */ /*1830*/ DMUL R66, R18.reuse, R66 ; /* 0x0000004212427228 */ /* 0x040e640000000000 */ /*1840*/ MUFU.RCP64H R21, R33 ; /* 0x0000002100157308 */ /* 0x001e240000001800 */ /*1850*/ DMUL R64, R18.reuse, R64 ; /* 0x0000004012407228 */ /* 0x040ea40000000000 */ /*1860*/ IADD3 R20, R33, 0x300402, RZ ; /* 0x0030040221147810 */ /* 0x000fe40007ffe0ff */ /*1870*/ DMUL R62, R18, R62 ; /* 0x0000003e123e7228 */ /* 0x000ee40000000000 */ /*1880*/ FSETP.GEU.AND P1, PT, |R20|, 5.8789094863358348022e-39, PT ; /* 0x004004021400780b */ /* 0x000fc40003f2e200 */ /*1890*/ DFMA R12, R66, -R14, R12 ; /* 0x8000000e420c722b */ /* 0x002fc8000000000c */ /*18a0*/ DFMA R10, R64, -R14, R10 ; /* 0x8000000e400a722b */ /* 0x004fc8000000000a */ /*18b0*/ DFMA R24, -R32, R20, 1 ; /* 0x3ff000002018742b */ /* 0x001e080000000114 */ /*18c0*/ DFMA R8, R62, -R14, R8 ; /* 0x8000000e3e08722b */ /* 0x008fc80000000008 */ /*18d0*/ DFMA R24, R24, R24, R24 ; /* 0x000000181818722b */ /* 0x001e0c0000000018 */ /*18e0*/ DFMA R24, R20, R24, R20 ; /* 0x000000181418722b */ /* 0x001e0c0000000014 */ /*18f0*/ DFMA R18, -R32, R24, 1 ; /* 0x3ff000002012742b */ /* 0x001e0c0000000118 */ /*1900*/ DFMA R18, R24, R18, R24 ; /* 0x000000121812722b */ /* 0x0010620000000018 */ /*1910*/ @P1 BRA 0x1980 ; /* 0x0000006000001947 */ /* 0x000fea0003800000 */ /*1920*/ LOP3.LUT R18, R33, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff21127812 */ /* 0x002fe200078ec0ff */ /*1930*/ IMAD.MOV.U32 R24, RZ, RZ, R32 ; /* 0x000000ffff187224 */ /* 0x001fe200078e0020 */ /*1940*/ MOV R17, R33 ; /* 0x0000002100117202 */ /* 0x000fe40000000f00 */ /*1950*/ IADD3 R18, R18, -0x100000, RZ ; /* 0xfff0000012127810 */ /* 0x000fe40007ffe0ff */ /*1960*/ MOV R0, 0x1980 ; /* 0x0000198000007802 */ /* 0x000fe40000000f00 */ /*1970*/ CALL.REL.NOINC 0x36c0 ; /* 0x00001d4000007944 */ /* 0x000fea0003c00000 */ /*1980*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1990*/ IADD3 R0, R4.reuse, c[0x0][0x194], RZ ; /* 0x0000650004007a10 */ /* 0x040fe20007ffe0ff */ /*19a0*/ IMAD R15, R4, UR5, R5.reuse ; /* 0x00000005040f7c24 */ /* 0x100fe2000f8e0205 */ /*19b0*/ MOV R25, 0x8 ; /* 0x0000000800197802 */ /* 0x001fe20000000f00 */ /*19c0*/ IMAD R21, R30, UR5, R5.reuse ; /* 0x000000051e157c24 */ /* 0x100fe2000f8e0205 */ /*19d0*/ LEA R36, P1, R6, c[0x0][0x170], 0x3 ; /* 0x00005c0006247a11 */ /* 0x000fe200078218ff */ /*19e0*/ IMAD R17, R0, UR5, R5 ; /* 0x0000000500117c24 */ /* 0x000fc4000f8e0205 */ /*19f0*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x194] ; /* 0x00006500ff007624 */ /* 0x000fe200078e00ff */ /*1a00*/ LEA.HI.X R37, R6, c[0x0][0x174], R31, 0x3, P1 ; /* 0x00005d0006257a11 */ /* 0x000fe200008f1c1f */ /*1a10*/ IMAD R14, R17, UR4, R2.reuse ; /* 0x00000004110e7c24 */ /* 0x100fe4000f8e0202 */ /*1a20*/ IMAD R20, R0, 0x6, RZ ; /* 0x0000000600147824 */ /* 0x000fe400078e02ff */ /*1a30*/ IMAD R15, R15, UR4, R2 ; /* 0x000000040f0f7c24 */ /* 0x000fe4000f8e0202 */ /*1a40*/ IMAD R17, R20, UR5, R5 ; /* 0x0000000514117c24 */ /* 0x000fe4000f8e0205 */ /*1a50*/ IMAD.WIDE R60, R15, R25, c[0x0][0x180] ; /* 0x000060000f3c7625 */ /* 0x000fc800078e0219 */ /*1a60*/ IMAD R56, R21, UR4, R2.reuse ; /* 0x0000000415387c24 */ /* 0x100fe2000f8e0202 */ /*1a70*/ STG.E.64 [R60.64], R22 ; /* 0x000000163c007986 */ /* 0x0001e2000c101b06 */ /*1a80*/ IMAD R17, R17, UR4, R2 ; /* 0x0000000411117c24 */ /* 0x000fe4000f8e0202 */ /*1a90*/ IMAD.WIDE R14, R14, R25, c[0x0][0x180] ; /* 0x000060000e0e7625 */ /* 0x000fc800078e0219 */ /*1aa0*/ IMAD.WIDE R56, R56, R25.reuse, c[0x0][0x180] ; /* 0x0000600038387625 */ /* 0x080fe200078e0219 */ /*1ab0*/ STG.E.64 [R14.64], R84 ; /* 0x000000540e007986 */ /* 0x0001e6000c101b06 */ /*1ac0*/ IMAD.WIDE R58, R17, R25, c[0x0][0x180] ; /* 0x00006000113a7625 */ /* 0x000fe200078e0219 */ /*1ad0*/ LDG.E.64 R36, [R36.64] ; /* 0x0000000624247981 */ /* 0x000ea6000c1e1b00 */ /*1ae0*/ IMAD.WIDE R20, R3, 0x8, R28 ; /* 0x0000000803147825 */ /* 0x000fe200078e021c */ /*1af0*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000638387981 */ /* 0x000ee8000c1e1b00 */ /*1b00*/ LDG.E.64 R28, [R28.64] ; /* 0x000000061c1c7981 */ /* 0x000ea8000c1e1b00 */ /*1b10*/ LDG.E.64 R58, [R58.64] ; /* 0x000000063a3a7981 */ /* 0x000f28000c1e1b00 */ /*1b20*/ LDG.E.64 R54, [R20.64] ; /* 0x0000000614367981 */ /* 0x000f28000c1e1b00 */ /*1b30*/ LDG.E.64 R52, [R70.64+0x18] ; /* 0x0000180646347981 */ /* 0x000168000c1e1b00 */ /*1b40*/ LDG.E.64 R50, [R70.64+0x20] ; /* 0x0000200646327981 */ /* 0x000168000c1e1b00 */ /*1b50*/ LDG.E.64 R48, [R68.64+0x10] ; /* 0x0000100644307981 */ /* 0x000168000c1e1b00 */ /*1b60*/ LDG.E.64 R46, [R68.64+0x18] ; /* 0x00001806442e7981 */ /* 0x000162000c1e1b00 */ /*1b70*/ DMUL R44, R12, R18 ; /* 0x000000120c2c7228 */ /* 0x0020480000000000 */ /*1b80*/ DMUL R42, R10, R18 ; /* 0x000000120a2a7228 */ /* 0x0000080000000000 */ /*1b90*/ DMUL R40, R8, R18 ; /* 0x0000001208287228 */ /* 0x0000220000000000 */ /*1ba0*/ IMAD.MOV.U32 R32, RZ, RZ, R56 ; /* 0x000000ffff207224 */ /* 0x008fe200078e0038 */ /*1bb0*/ MOV R33, R57 ; /* 0x0000003900217202 */ /* 0x000fe40000000f00 */ /*1bc0*/ DFMA R38, -R36, c[0x3][0x90], R28 ; /* 0x00c0240024267a2b */ /* 0x0044c8000000011c */ /*1bd0*/ DFMA R36, R36, c[0x3][0x90], R28 ; /* 0x00c0240024247a2b */ /* 0x000422000000001c */ /*1be0*/ IMAD.MOV.U32 R34, RZ, RZ, R58 ; /* 0x000000ffff227224 */ /* 0x010fe200078e003a */ /*1bf0*/ MOV R35, R59 ; /* 0x0000003b00237202 */ /* 0x000fe20000000f00 */ /*1c00*/ IMAD.MOV.U32 R30, RZ, RZ, R54 ; /* 0x000000ffff1e7224 */ /* 0x000fe200078e0036 */ /*1c10*/ MOV R31, R55 ; /* 0x00000037001f7202 */ /* 0x000fe20000000f00 */ /*1c20*/ @!P0 BRA 0x2800 ; /* 0x00000bd000008947 */ /* 0x000fea0003800000 */ /*1c30*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x198] ; /* 0x00006600ff0b7624 */ /* 0x00ffe200078e00ff */ /*1c40*/ SHF.L.U32 R6, R0, 0x3, RZ ; /* 0x0000000300067819 */ /* 0x000fe200000006ff */ /*1c50*/ ULDC UR4, c[0x0][0x190] ; /* 0x0000640000047ab9 */ /* 0x000fe20000000800 */ /*1c60*/ IADD3 R28, R16, c[0x0][0x190], RZ ; /* 0x00006400101c7a10 */ /* 0x000fe20007ffe0ff */ /*1c70*/ IMAD.WIDE R96, R3, 0x8, R20 ; /* 0x0000000803607825 */ /* 0x000fe200078e0214 */ /*1c80*/ IADD3 R18, R11, -0x2, RZ ; /* 0xfffffffe0b127810 */ /* 0x000fe20007ffe0ff */ /*1c90*/ UIADD3 UR4, UR4, -0x2, URZ ; /* 0xfffffffe04047890 */ /* 0x000fe2000fffe03f */ /*1ca0*/ LDG.E.64 R26, [R26.64] ; /* 0x000000061a1a7981 */ /* 0x000f62000c1e1b00 */ /*1cb0*/ IMAD.WIDE R28, R28, R25, c[0x0][0x170] ; /* 0x00005c001c1c7625 */ /* 0x000fc600078e0219 */ /*1cc0*/ LDG.E.64 R96, [R96.64] ; /* 0x0000000660607981 */ /* 0x000ea2000c1e1b00 */ /*1cd0*/ IMAD R9, R18, R6, R5 ; /* 0x0000000612097224 */ /* 0x000fc600078e0205 */ /*1ce0*/ LDG.E.64 R28, [R28.64] ; /* 0x000000061c1c7981 */ /* 0x000ea2000c1e1b00 */ /*1cf0*/ IMAD R9, R9, UR4, R2 ; /* 0x0000000409097c24 */ /* 0x000fc6000f8e0202 */ /*1d00*/ S2R R13, SR_TID.X ; /* 0x00000000000d7919 */ /* 0x000e220000002100 */ /*1d10*/ IMAD.WIDE R20, R9, R25, c[0x0][0x180] ; /* 0x0000600009147625 */ /* 0x000fc600078e0219 */ /*1d20*/ S2R R19, SR_CTAID.X ; /* 0x0000000000137919 */ /* 0x000e620000002500 */ /*1d30*/ IMAD.MOV.U32 R8, RZ, RZ, 0x3 ; /* 0x00000003ff087424 */ /* 0x000fe200078e00ff */ /*1d40*/ MOV R10, 0x5 ; /* 0x00000005000a7802 */ /* 0x000fe20000000f00 */ /*1d50*/ IMAD.MOV.U32 R15, RZ, RZ, 0x5 ; /* 0x00000005ff0f7424 */ /* 0x000fe200078e00ff */ /*1d60*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000614147981 */ /* 0x000f62000c1e1b00 */ /*1d70*/ LEA R6, R0, 0x2, 0x2 ; /* 0x0000000200067811 */ /* 0x000fe200078e10ff */ /*1d80*/ IMAD R8, R11.reuse, R8, -0x6 ; /* 0xfffffffa0b087424 */ /* 0x040fe400078e0208 */ /*1d90*/ IMAD R9, R11, c[0x0][0x194], RZ ; /* 0x000065000b097a24 */ /* 0x000fe400078e02ff */ /*1da0*/ IMAD R12, R7, R10, 0xa ; /* 0x0000000a070c7424 */ /* 0x000fc400078e020a */ /*1db0*/ IMAD R15, R2, R15, 0x8 ; /* 0x00000008020f7424 */ /* 0x000fe400078e020f */ /*1dc0*/ IMAD R11, R18.reuse, R6, R5.reuse ; /* 0x00000006120b7224 */ /* 0x140fe400078e0205 */ /*1dd0*/ IMAD R6, R18, c[0x0][0x194], RZ ; /* 0x0000650012067a24 */ /* 0x000fe400078e02ff */ /*1de0*/ IMAD R10, R8, c[0x0][0x194], R5 ; /* 0x00006500080a7a24 */ /* 0x000fe400078e0205 */ /*1df0*/ IMAD R5, R12, c[0x0][0x190], R15 ; /* 0x000064000c057a24 */ /* 0x000fe200078e020f */ /*1e00*/ LEA R14, R9.reuse, R13.reuse, 0x2 ; /* 0x0000000d090e7211 */ /* 0x0c1fe200078e10ff */ /*1e10*/ IMAD R12, R9, 0x3, R13.reuse ; /* 0x00000003090c7824 */ /* 0x100fe200078e020d */ /*1e20*/ LEA R9, R6.reuse, R13, 0x3 ; /* 0x0000000d06097211 */ /* 0x040fe200078e18ff */ /*1e30*/ IMAD R8, R6, 0x2, R13 ; /* 0x0000000206087824 */ /* 0x000fc400078e020d */ /*1e40*/ IMAD.WIDE R16, R16, R25, c[0x0][0x170] ; /* 0x00005c0010107625 */ /* 0x000fc800078e0219 */ /*1e50*/ IMAD R6, R6, 0x7, R13 ; /* 0x0000000706067824 */ /* 0x000fe200078e020d */ /*1e60*/ LDG.E.64 R22, [R16.64] ; /* 0x0000000610167981 */ /* 0x000162000c1e1b00 */ /*1e70*/ IMAD R13, R19.reuse, c[0x0][0x0], R12 ; /* 0x00000000130d7a24 */ /* 0x042fe400078e020c */ /*1e80*/ IMAD R15, R19, c[0x0][0x0], R14 ; /* 0x00000000130f7a24 */ /* 0x000fc600078e020e */ /*1e90*/ IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d7810 */ /* 0x000fe40007ffe0ff */ /*1ea0*/ IADD3 R15, R15, 0x1, RZ ; /* 0x000000010f0f7810 */ /* 0x000fe40007ffe0ff */ /*1eb0*/ IADD3 R17, R7, 0x3, RZ ; /* 0x0000000307117810 */ /* 0x001fe20007ffe0ff */ /*1ec0*/ IMAD R13, R13, c[0x0][0x190], R2.reuse ; /* 0x000064000d0d7a24 */ /* 0x100fe400078e0202 */ /*1ed0*/ IMAD R15, R15, c[0x0][0x190], R2.reuse ; /* 0x000064000f0f7a24 */ /* 0x100fe400078e0202 */ /*1ee0*/ IMAD R17, R17, c[0x0][0x190], R2 ; /* 0x0000640011117a24 */ /* 0x000fe400078e0202 */ /*1ef0*/ IMAD R12, R19, c[0x0][0x0], R8 ; /* 0x00000000130c7a24 */ /* 0x000fc400078e0208 */ /*1f00*/ IMAD R14, R19.reuse, c[0x0][0x0], R9 ; /* 0x00000000130e7a24 */ /* 0x040fe400078e0209 */ /*1f10*/ IMAD R16, R19, c[0x0][0x0], R6 ; /* 0x0000000013107a24 */ /* 0x000fe200078e0206 */ /*1f20*/ IADD3 R6, R0, -0x1, RZ ; /* 0xffffffff00067810 */ /* 0x000fe20007ffe0ff */ /*1f30*/ IMAD.MOV.U32 R7, RZ, RZ, R2 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0002 */ /*1f40*/ MOV R30, R54 ; /* 0x00000036001e7202 */ /* 0x000fe20000000f00 */ /*1f50*/ IMAD.MOV.U32 R31, RZ, RZ, R55 ; /* 0x000000ffff1f7224 */ /* 0x000fe200078e0037 */ /*1f60*/ MOV R32, R56 ; /* 0x0000003800207202 */ /* 0x000fe20000000f00 */ /*1f70*/ IMAD.MOV.U32 R33, RZ, RZ, R57 ; /* 0x000000ffff217224 */ /* 0x000fe200078e0039 */ /*1f80*/ MOV R34, R58 ; /* 0x0000003a00227202 */ /* 0x000fe20000000f00 */ /*1f90*/ IMAD.MOV.U32 R35, RZ, RZ, R59 ; /* 0x000000ffff237224 */ /* 0x000fe200078e003b */ /*1fa0*/ IADD3 R9, R17, 0x1, RZ ; /* 0x0000000111097810 */ /* 0x000fc40007ffe0ff */ /*1fb0*/ IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d7810 */ /* 0x000fe40007ffe0ff */ /*1fc0*/ IADD3 R15, R15, 0x1, RZ ; /* 0x000000010f0f7810 */ /* 0x000fe20007ffe0ff */ /*1fd0*/ IMAD R8, R18, UR4, RZ ; /* 0x0000000412087c24 */ /* 0x000fe4000f8e02ff */ /*1fe0*/ IMAD R11, R11, UR4, R2 ; /* 0x000000040b0b7c24 */ /* 0x000fe4000f8e0202 */ /*1ff0*/ IMAD R10, R10, UR4, RZ ; /* 0x000000040a0a7c24 */ /* 0x000fe4000f8e02ff */ /*2000*/ IMAD R12, R12, UR4, RZ ; /* 0x000000040c0c7c24 */ /* 0x000fe4000f8e02ff */ /*2010*/ IMAD R14, R14, UR4, RZ ; /* 0x000000040e0e7c24 */ /* 0x000fc4000f8e02ff */ /*2020*/ IMAD R16, R16, UR4, RZ ; /* 0x0000000410107c24 */ /* 0x000fe2000f8e02ff */ /*2030*/ UMOV UR4, 0x2 ; /* 0x0000000200047882 */ /* 0x000fe20000000000 */ /*2040*/ DFMA R98, R28, c[0x3][0x90], R96 ; /* 0x00c024001c627a2b */ /* 0x0040480000000060 */ /*2050*/ DFMA R96, -R28, c[0x3][0x90], R96 ; /* 0x00c024001c607a2b */ /* 0x0020880000000160 */ /*2060*/ MOV R0, 0x8 ; /* 0x0000000800007802 */ /* 0x000fe40000000f00 */ /*2070*/ ISETP.LE.AND P0, PT, R6, UR4, PT ; /* 0x0000000406007c0c */ /* 0x000fc6000bf03270 */ /*2080*/ IMAD.WIDE R84, R11, R0, c[0x0][0x180] ; /* 0x000060000b547625 */ /* 0x000fcc00078e0200 */ /*2090*/ IMAD.WIDE R18, R3, 0x8, R84 ; /* 0x0000000803127825 */ /* 0x000fe200078e0254 */ /*20a0*/ MUFU.RCP64H R75, R35 ; /* 0x00000023004b7308 */ /* 0x000e620000001800 */ /*20b0*/ IADD3 R74, R35, 0x300402, RZ ; /* 0x00300402234a7810 */ /* 0x000fe20007ffe0ff */ /*20c0*/ LDG.E.64 R84, [R84.64] ; /* 0x0000000654547981 */ /* 0x020f66000c1e1b00 */ /*20d0*/ IMAD.WIDE R78, R3.reuse, 0x8, R18 ; /* 0x00000008034e7825 */ /* 0x040fe200078e0212 */ /*20e0*/ LDG.E.64 R94, [R18.64] ; /* 0x00000006125e7981 */ /* 0x0002ea000c1e1b00 */ /*20f0*/ IMAD.WIDE R24, R3, 0x8, R78 ; /* 0x0000000803187825 */ /* 0x000fe200078e024e */ /*2100*/ MOV R87, R27 ; /* 0x0000001b00577202 */ /* 0x000fe20000000f00 */ /*2110*/ LDG.E.64 R78, [R78.64] ; /* 0x000000064e4e7981 */ /* 0x000f64000c1e1b00 */ /*2120*/ @!P0 IMAD.WIDE R72, R9, R0, c[0x0][0x170] ; /* 0x00005c0009488625 */ /* 0x000fc400078e0200 */ /*2130*/ LDG.E.64 R92, [R24.64] ; /* 0x00000006185c7981 */ /* 0x0048a8000c1e1b00 */ /*2140*/ @!P0 LDG.E.64 R72, [R72.64] ; /* 0x0000000648488981 */ /* 0x000ea2000c1e1b00 */ /*2150*/ DFMA R18, R74, -R34, 1 ; /* 0x3ff000004a12742b */ /* 0x002e620000000822 */ /*2160*/ IMAD.MOV.U32 R86, RZ, RZ, R26 ; /* 0x000000ffff567224 */ /* 0x000fe400078e001a */ /*2170*/ IMAD.WIDE R24, R3, 0x8, R24 ; /* 0x0000000803187825 */ /* 0x010fc600078e0218 */ /*2180*/ DFMA R18, R18, R18, R18 ; /* 0x000000121212722b */ /* 0x002e640000000012 */ /*2190*/ LDG.E.64 R26, [R24.64] ; /* 0x00000006181a7981 */ /* 0x000968000c1e1b00 */ /*21a0*/ DFMA R18, R74, R18, R74 ; /* 0x000000124a12722b */ /* 0x002e62000000004a */ /*21b0*/ IMAD.MOV.U32 R90, RZ, RZ, R94 ; /* 0x000000ffff5a7224 */ /* 0x008fe200078e005e */ /*21c0*/ MOV R91, R95 ; /* 0x0000005f005b7202 */ /* 0x000fcc0000000f00 */ /*21d0*/ @!P0 DFMA R94, -R22.reuse, c[0x3][0x90], R90.reuse ; /* 0x00c02400165e8a2b */ /* 0x140fe2000000015a */ /*21e0*/ IMAD.MOV.U32 R88, RZ, RZ, R92 ; /* 0x000000ffff587224 */ /* 0x004fe200078e005c */ /*21f0*/ MOV R89, R93 ; /* 0x0000005d00597202 */ /* 0x000fe40000000f00 */ /*2200*/ @!P0 DFMA R90, R22, c[0x3][0x90], R90 ; /* 0x00c02400165a8a2b */ /* 0x0005e4000000005a */ /*2210*/ @!P0 IMAD.MOV.U32 R22, RZ, RZ, R28 ; /* 0x000000ffff168224 */ /* 0x004fe200078e001c */ /*2220*/ @!P0 MOV R23, R29 ; /* 0x0000001d00178202 */ /* 0x000fe20000000f00 */ /*2230*/ @!P0 IMAD.MOV.U32 R28, RZ, RZ, R72 ; /* 0x000000ffff1c8224 */ /* 0x001fe200078e0048 */ /*2240*/ @!P0 DFMA R92, R72, c[0x3][0x90], R88 ; /* 0x00c02400485c8a2b */ /* 0x000fe20000000058 */ /*2250*/ @!P0 MOV R29, R73 ; /* 0x00000049001d8202 */ /* 0x000fc60000000f00 */ /*2260*/ @!P0 DFMA R88, -R72, c[0x3][0x90], R88 ; /* 0x00c0240048588a2b */ /* 0x000fe20000000158 */ /*2270*/ FSETP.GEU.AND P0, PT, |R74|, 5.8789094863358348022e-39, PT ; /* 0x004004024a00780b */ /* 0x000fc60003f0e200 */ /*2280*/ DFMA R72, R18, -R34, 1 ; /* 0x3ff000001248742b */ /* 0x002e0c0000000822 */ /*2290*/ DFMA R72, R18, R72, R18 ; /* 0x000000481248722b */ /* 0x0010640000000012 */ /*22a0*/ IMAD.WIDE R18, R5, R0, c[0x0][0x178] ; /* 0x00005e0005127625 */ /* 0x001fca00078e0200 */ /*22b0*/ LDG.E.64 R82, [R18.64] ; /* 0x0000000612527981 */ /* 0x000968000c1e1b00 */ /*22c0*/ LDG.E.64 R80, [R18.64+0x8] ; /* 0x0000080612507981 */ /* 0x000962000c1e1b00 */ /*22d0*/ BSSY B0, 0x2380 ; /* 0x000000a000007945 */ /* 0x000fe20003800000 */ /*22e0*/ @P0 BRA 0x2370 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*22f0*/ LOP3.LUT R18, R35, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff23127812 */ /* 0x012fe200078ec0ff */ /*2300*/ IMAD.MOV.U32 R24, RZ, RZ, R34 ; /* 0x000000ffff187224 */ /* 0x000fe200078e0022 */ /*2310*/ MOV R17, R35 ; /* 0x0000002300117202 */ /* 0x000fe40000000f00 */ /*2320*/ IADD3 R18, R18, -0x100000, RZ ; /* 0xfff0000012127810 */ /* 0x000fc40007ffe0ff */ /*2330*/ MOV R0, 0x2350 ; /* 0x0000235000007802 */ /* 0x000fe40000000f00 */ /*2340*/ CALL.REL.NOINC 0x36c0 ; /* 0x0000137000007944 */ /* 0x020fea0003c00000 */ /*2350*/ IMAD.MOV.U32 R72, RZ, RZ, R18 ; /* 0x000000ffff487224 */ /* 0x000fe200078e0012 */ /*2360*/ MOV R73, R19 ; /* 0x0000001300497202 */ /* 0x000fe40000000f00 */ /*2370*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x002fea0003800000 */ /*2380*/ MUFU.RCP64H R19, R59 ; /* 0x0000003b00137308 */ /* 0x010e220000001800 */ /*2390*/ IADD3 R18, R59, 0x300402, RZ ; /* 0x003004023b127810 */ /* 0x000fe20007ffe0ff */ /*23a0*/ DMUL R76, R72.reuse, R32 ; /* 0x00000020484c7228 */ /* 0x040e620000000000 */ /*23b0*/ BSSY B0, 0x2540 ; /* 0x0000018000007945 */ /* 0x000fe40003800000 */ /*23c0*/ FSETP.GEU.AND P0, PT, |R18|, 5.8789094863358348022e-39, PT ; /* 0x004004021200780b */ /* 0x000fe20003f0e200 */ /*23d0*/ DMUL R74, R72, R52 ; /* 0x00000034484a7228 */ /* 0x000fc80000000000 */ /*23e0*/ DMUL R72, R72, R20 ; /* 0x0000001448487228 */ /* 0x000e880000000000 */ /*23f0*/ DFMA R34, R76, -R38, R30 ; /* 0x800000264c22722b */ /* 0x002fc8000000001e */ /*2400*/ DFMA R24, R18, -R58, 1 ; /* 0x3ff000001218742b */ /* 0x001e08000000083a */ /*2410*/ DFMA R32, R72, -R38, R98 ; /* 0x800000264820722b */ /* 0x004fc80000000062 */ /*2420*/ DFMA R24, R24, R24, R24 ; /* 0x000000181818722b */ /* 0x001e080000000018 */ /*2430*/ DFMA R52, R74, -R38, R48 ; /* 0x800000264a34722b */ /* 0x000fc80000000030 */ /*2440*/ DFMA R24, R18, R24, R18 ; /* 0x000000181218722b */ /* 0x001e080000000012 */ /*2450*/ DFMA R38, -R84, R76, R94 ; /* 0x0000004c5426722b */ /* 0x020fc8000000015e */ /*2460*/ DFMA R18, R24, -R58, 1 ; /* 0x3ff000001812742b */ /* 0x001e08000000083a */ /*2470*/ DFMA R48, -R84, R74, R82 ; /* 0x0000004a5430722b */ /* 0x0002880000000152 */ /*2480*/ DFMA R98, R24, R18, R24 ; /* 0x000000121862722b */ /* 0x0012080000000018 */ /*2490*/ DFMA R30, -R84, R72, R78 ; /* 0x00000048541e722b */ /* 0x0002e2000000014e */ /*24a0*/ @P0 BRA 0x2530 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*24b0*/ LOP3.LUT R18, R59, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff3b127812 */ /* 0x007fe200078ec0ff */ /*24c0*/ IMAD.MOV.U32 R24, RZ, RZ, R58 ; /* 0x000000ffff187224 */ /* 0x000fe200078e003a */ /*24d0*/ MOV R17, R59 ; /* 0x0000003b00117202 */ /* 0x000fe40000000f00 */ /*24e0*/ IADD3 R18, R18, -0x100000, RZ ; /* 0xfff0000012127810 */ /* 0x000fe40007ffe0ff */ /*24f0*/ MOV R0, 0x2510 ; /* 0x0000251000007802 */ /* 0x000fe40000000f00 */ /*2500*/ CALL.REL.NOINC 0x36c0 ; /* 0x000011b000007944 */ /* 0x008fea0003c00000 */ /*2510*/ IMAD.MOV.U32 R98, RZ, RZ, R18 ; /* 0x000000ffff627224 */ /* 0x000fe200078e0012 */ /*2520*/ MOV R99, R19 ; /* 0x0000001300637202 */ /* 0x000fe40000000f00 */ /*2530*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x005fea0003800000 */ /*2540*/ UIADD3 UR5, UR4, -0x1, URZ ; /* 0xffffffff04057890 */ /* 0x000fe2000fffe03f */ /*2550*/ MOV R100, 0x8 ; /* 0x0000000800647802 */ /* 0x000fe20000000f00 */ /*2560*/ IMAD.IADD R82, R16, 0x1, R7.reuse ; /* 0x0000000110527824 */ /* 0x102fe200078e0207 */ /*2570*/ DMUL R18, R98.reuse, R20 ; /* 0x0000001462127228 */ /* 0x040fe20000000000 */ /*2580*/ IMAD.IADD R94, R12, 0x1, R7.reuse ; /* 0x000000010c5e7824 */ /* 0x100fe200078e0207 */ /*2590*/ IADD3 R0, R14, R7, RZ ; /* 0x000000070e007210 */ /* 0x000fe20007ffe0ff */ /*25a0*/ IMAD.WIDE R82, R82, R100.reuse, c[0x0][0x180] ; /* 0x0000600052527625 */ /* 0x080fe200078e0264 */ /*25b0*/ ISETP.LE.AND P0, PT, R4, UR5, PT ; /* 0x0000000504007c0c */ /* 0x000fe2000bf03270 */ /*25c0*/ DMUL R24, R98.reuse, R56 ; /* 0x0000003862187228 */ /* 0x040e220000000000 */ /*25d0*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fe2000fffe03f */ /*25e0*/ IMAD.WIDE R94, R94, R100.reuse, c[0x0][0x180] ; /* 0x000060005e5e7625 */ /* 0x080fe200078e0264 */ /*25f0*/ STG.E.64 [R82.64], R76 ; /* 0x0000004c52007986 */ /* 0x0003e2000c101b06 */ /*2600*/ DMUL R20, R98, R50 ; /* 0x0000003262147228 */ /* 0x0005220000000000 */ /*2610*/ IADD3 R11, R8, R11, RZ ; /* 0x0000000b080b7210 */ /* 0x000fe20007ffe0ff */ /*2620*/ IMAD.IADD R17, R10, 0x1, R7 ; /* 0x000000010a117824 */ /* 0x000fe200078e0207 */ /*2630*/ STG.E.64 [R94.64], R24 ; /* 0x000000185e007986 */ /* 0x0011e2000c101b06 */ /*2640*/ IMAD.WIDE R98, R13, R100, c[0x0][0x188] ; /* 0x000062000d627625 */ /* 0x004fe200078e0264 */ /*2650*/ DFMA R58, R24, -R36, R54 ; /* 0x80000024183a722b */ /* 0x000ea20000000036 */ /*2660*/ IADD3 R9, R9, c[0x0][0x190], RZ ; /* 0x0000640009097a10 */ /* 0x000fc40007ffe0ff */ /*2670*/ IMAD.IADD R7, R8, 0x1, R7 ; /* 0x0000000108077824 */ /* 0x000fe200078e0207 */ /*2680*/ DFMA R56, R18, -R36.reuse, R96 ; /* 0x800000241238722b */ /* 0x080ae20000000060 */ /*2690*/ STG.E.64 [R98.64], R74 ; /* 0x0000004a62007986 */ /* 0x0005e2000c101b06 */ /*26a0*/ MOV R96, R88 ; /* 0x0000005800607202 */ /* 0x020fe20000000f00 */ /*26b0*/ IMAD.MOV.U32 R97, RZ, RZ, R89 ; /* 0x000000ffff617224 */ /* 0x000fe200078e0059 */ /*26c0*/ DFMA R50, R20, -R36, R46 ; /* 0x800000241432722b */ /* 0x010f22000000002e */ /*26d0*/ IMAD.WIDE R76, R0, R100.reuse, c[0x0][0x180] ; /* 0x00006000004c7625 */ /* 0x082fe200078e0264 */ /*26e0*/ MOV R0, c[0x0][0x190] ; /* 0x0000640000007a02 */ /* 0x000fe40000000f00 */ /*26f0*/ DFMA R36, -R84.reuse, R24, R90 ; /* 0x000000185424722b */ /* 0x040062000000015a */ /*2700*/ IMAD.WIDE R82, R17, R100.reuse, c[0x0][0x180] ; /* 0x0000600011527625 */ /* 0x080fe200078e0264 */ /*2710*/ STG.E.64 [R76.64], R72 ; /* 0x000000484c007986 */ /* 0x000fe4000c101b06 */ /*2720*/ DFMA R54, -R84.reuse, R18, R78 ; /* 0x000000125436722b */ /* 0x040e62000000014e */ /*2730*/ IMAD.WIDE R24, R15, R100, c[0x0][0x188] ; /* 0x000062000f187625 */ /* 0x001fe200078e0264 */ /*2740*/ STG.E.64 [R82.64], R18 ; /* 0x0000001252007986 */ /* 0x000fe2000c101b06 */ /*2750*/ MOV R99, R93 ; /* 0x0000005d00637202 */ /* 0x004fe20000000f00 */ /*2760*/ DFMA R46, -R84, R20, R80 ; /* 0x00000014542e722b */ /* 0x0000a20000000150 */ /*2770*/ IMAD.MOV.U32 R74, RZ, RZ, c[0x0][0x198] ; /* 0x00006600ff4a7624 */ /* 0x000fe200078e00ff */ /*2780*/ STG.E.64 [R24.64], R20 ; /* 0x0000001418007986 */ /* 0x0001e2000c101b06 */ /*2790*/ IMAD R5, R0, 0x5, R5 ; /* 0x0000000500057824 */ /* 0x000fc400078e0205 */ /*27a0*/ IMAD R13, R74.reuse, c[0x0][0x190], R13 ; /* 0x000064004a0d7a24 */ /* 0x040fe400078e020d */ /*27b0*/ IMAD R15, R74, c[0x0][0x190], R15 ; /* 0x000064004a0f7a24 */ /* 0x000fe400078e020f */ /*27c0*/ IMAD.MOV.U32 R98, RZ, RZ, R92 ; /* 0x000000ffff627224 */ /* 0x000fe200078e005c */ /*27d0*/ MOV R20, R86 ; /* 0x0000005600147202 */ /* 0x001fe20000000f00 */ /*27e0*/ IMAD.MOV.U32 R21, RZ, RZ, R87 ; /* 0x000000ffff157224 */ /* 0x000fe200078e0057 */ /*27f0*/ @!P0 BRA 0x2060 ; /* 0xfffff86000008947 */ /* 0x01efea000383ffff */ /*2800*/ MUFU.RCP64H R7, R35 ; /* 0x0000002300077308 */ /* 0x00fe220000001800 */ /*2810*/ IADD3 R6, R35, 0x300402, RZ ; /* 0x0030040223067810 */ /* 0x000fe20007ffe0ff */ /*2820*/ BSSY B0, 0x2910 ; /* 0x000000e000007945 */ /* 0x000fe60003800000 */ /*2830*/ FSETP.GEU.AND P0, PT, |R6|, 5.8789094863358348022e-39, PT ; /* 0x004004020600780b */ /* 0x000fc40003f0e200 */ /*2840*/ DFMA R8, R6, -R34, 1 ; /* 0x3ff000000608742b */ /* 0x001e0c0000000822 */ /*2850*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */ /* 0x001e0c0000000008 */ /*2860*/ DFMA R8, R6, R8, R6 ; /* 0x000000080608722b */ /* 0x001e0c0000000006 */ /*2870*/ DFMA R10, R8, -R34, 1 ; /* 0x3ff00000080a742b */ /* 0x001e0c0000000822 */ /*2880*/ DFMA R18, R8, R10, R8 ; /* 0x0000000a0812722b */ /* 0x0010620000000008 */ /*2890*/ @P0 BRA 0x2900 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*28a0*/ LOP3.LUT R18, R35, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff23127812 */ /* 0x002fe200078ec0ff */ /*28b0*/ IMAD.MOV.U32 R17, RZ, RZ, R35 ; /* 0x000000ffff117224 */ /* 0x000fe200078e0023 */ /*28c0*/ MOV R24, R34 ; /* 0x0000002200187202 */ /* 0x000fe40000000f00 */ /*28d0*/ IADD3 R18, R18, -0x100000, RZ ; /* 0xfff0000012127810 */ /* 0x000fe40007ffe0ff */ /*28e0*/ MOV R0, 0x2900 ; /* 0x0000290000007802 */ /* 0x000fe40000000f00 */ /*28f0*/ CALL.REL.NOINC 0x36c0 ; /* 0x00000dc000007944 */ /* 0x021fea0003c00000 */ /*2900*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2910*/ MUFU.RCP64H R7, R59 ; /* 0x0000003b00077308 */ /* 0x000ea20000001800 */ /*2920*/ IADD3 R6, R59, 0x300402, RZ ; /* 0x003004023b067810 */ /* 0x000fe20007ffe0ff */ /*2930*/ DMUL R10, R18.reuse, R32 ; /* 0x00000020120a7228 */ /* 0x043fe20000000000 */ /*2940*/ BSSY B0, 0x2a60 ; /* 0x0000011000007945 */ /* 0x000fe40003800000 */ /*2950*/ FSETP.GEU.AND P0, PT, |R6|, 5.8789094863358348022e-39, PT ; /* 0x004004020600780b */ /* 0x000fe20003f0e200 */ /*2960*/ DMUL R52, R18, R52 ; /* 0x0000003412347228 */ /* 0x020fc80000000000 */ /*2970*/ DFMA R8, R6, -R58, 1 ; /* 0x3ff000000608742b */ /* 0x004e0c000000083a */ /*2980*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */ /* 0x001e0c0000000008 */ /*2990*/ DFMA R12, R6, R8, R6 ; /* 0x00000008060c722b */ /* 0x001e080000000006 */ /*29a0*/ DFMA R8, R10, -R38, R30 ; /* 0x800000260a08722b */ /* 0x000fc8000000001e */ /*29b0*/ DFMA R14, R12, -R58, 1 ; /* 0x3ff000000c0e742b */ /* 0x001e08000000083a */ /*29c0*/ DFMA R38, R52, -R38, R48 ; /* 0x800000263426722b */ /* 0x0002880000000030 */ /*29d0*/ DFMA R18, R12, R14, R12 ; /* 0x0000000e0c12722b */ /* 0x001222000000000c */ /*29e0*/ @P0 BRA 0x2a50 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*29f0*/ LOP3.LUT R18, R59, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff3b127812 */ /* 0x005fe200078ec0ff */ /*2a00*/ IMAD.MOV.U32 R17, RZ, RZ, R59 ; /* 0x000000ffff117224 */ /* 0x000fe200078e003b */ /*2a10*/ MOV R24, R58 ; /* 0x0000003a00187202 */ /* 0x000fe40000000f00 */ /*2a20*/ IADD3 R18, R18, -0x100000, RZ ; /* 0xfff0000012127810 */ /* 0x000fe40007ffe0ff */ /*2a30*/ MOV R0, 0x2a50 ; /* 0x00002a5000007802 */ /* 0x000fe40000000f00 */ /*2a40*/ CALL.REL.NOINC 0x36c0 ; /* 0x00000c7000007944 */ /* 0x002fea0003c00000 */ /*2a50*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x004fea0003800000 */ /*2a60*/ MUFU.RCP64H R7, R9 ; /* 0x0000000900077308 */ /* 0x000ea20000001800 */ /*2a70*/ MOV R6, 0x1 ; /* 0x0000000100067802 */ /* 0x000fe20000000f00 */ /*2a80*/ DMUL R56, R18.reuse, R56 ; /* 0x0000003812387228 */ /* 0x041e220000000000 */ /*2a90*/ FSETP.GEU.AND P1, PT, |R39|, 6.5827683646048100446e-37, PT ; /* 0x036000002700780b */ /* 0x000fe20003f2e200 */ /*2aa0*/ BSSY B0, 0x2c00 ; /* 0x0000015000007945 */ /* 0x000fe40003800000 */ /*2ab0*/ DMUL R50, R18, R50 ; /* 0x0000003212327228 */ /* 0x000ec80000000000 */ /*2ac0*/ DFMA R54, R56, -R36, R54 ; /* 0x800000243836722b */ /* 0x001fc80000000036 */ /*2ad0*/ DFMA R36, R50, -R36, R46 ; /* 0x800000243224722b */ /* 0x008fc8000000002e */ /*2ae0*/ DFMA R12, -R8, R6, 1 ; /* 0x3ff00000080c742b */ /* 0x006e0c0000000106 */ /*2af0*/ DFMA R12, R12, R12, R12 ; /* 0x0000000c0c0c722b */ /* 0x001e0c000000000c */ /*2b00*/ DFMA R12, R6, R12, R6 ; /* 0x0000000c060c722b */ /* 0x001e0c0000000006 */ /*2b10*/ DFMA R6, -R8, R12, 1 ; /* 0x3ff000000806742b */ /* 0x001e0c000000010c */ /*2b20*/ DFMA R6, R12, R6, R12 ; /* 0x000000060c06722b */ /* 0x001e0c000000000c */ /*2b30*/ DMUL R12, R38, R6 ; /* 0x00000006260c7228 */ /* 0x001e0c0000000000 */ /*2b40*/ DFMA R14, -R8, R12, R38 ; /* 0x0000000c080e722b */ /* 0x001e0c0000000126 */ /*2b50*/ DFMA R6, R6, R14, R12 ; /* 0x0000000e0606722b */ /* 0x001e14000000000c */ /*2b60*/ FFMA R0, RZ, R9, R7 ; /* 0x00000009ff007223 */ /* 0x001fca0000000007 */ /*2b70*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*2b80*/ @P0 BRA P1, 0x2bf0 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*2b90*/ IMAD.MOV.U32 R20, RZ, RZ, R38 ; /* 0x000000ffff147224 */ /* 0x000fe200078e0026 */ /*2ba0*/ MOV R21, R39 ; /* 0x0000002700157202 */ /* 0x000fe40000000f00 */ /*2bb0*/ MOV R24, 0x2bd0 ; /* 0x00002bd000187802 */ /* 0x000fe40000000f00 */ /*2bc0*/ CALL.REL.NOINC 0x3970 ; /* 0x00000da000007944 */ /* 0x000fea0003c00000 */ /*2bd0*/ IMAD.MOV.U32 R6, RZ, RZ, R8 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0008 */ /*2be0*/ MOV R7, R9 ; /* 0x0000000900077202 */ /* 0x000fe40000000f00 */ /*2bf0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2c00*/ MUFU.RCP64H R9, R55 ; /* 0x0000003700097308 */ /* 0x000e220000001800 */ /*2c10*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */ /* 0x000fe200078e00ff */ /*2c20*/ FSETP.GEU.AND P1, PT, |R37|, 6.5827683646048100446e-37, PT ; /* 0x036000002500780b */ /* 0x000fe20003f2e200 */ /*2c30*/ BSSY B0, 0x2d80 ; /* 0x0000014000007945 */ /* 0x000fe80003800000 */ /*2c40*/ DFMA R12, -R54, R8, 1 ; /* 0x3ff00000360c742b */ /* 0x001e0c0000000108 */ /*2c50*/ DFMA R12, R12, R12, R12 ; /* 0x0000000c0c0c722b */ /* 0x001e0c000000000c */ /*2c60*/ DFMA R12, R8, R12, R8 ; /* 0x0000000c080c722b */ /* 0x001e0c0000000008 */ /*2c70*/ DFMA R8, -R54, R12, 1 ; /* 0x3ff000003608742b */ /* 0x001e0c000000010c */ /*2c80*/ DFMA R8, R12, R8, R12 ; /* 0x000000080c08722b */ /* 0x001e0c000000000c */ /*2c90*/ DMUL R12, R36, R8 ; /* 0x00000008240c7228 */ /* 0x001e0c0000000000 */ /*2ca0*/ DFMA R14, -R54, R12, R36 ; /* 0x0000000c360e722b */ /* 0x001e0c0000000124 */ /*2cb0*/ DFMA R8, R8, R14, R12 ; /* 0x0000000e0808722b */ /* 0x001064000000000c */ /*2cc0*/ MOV R12, R6 ; /* 0x00000006000c7202 */ /* 0x001fe20000000f00 */ /*2cd0*/ IMAD.MOV.U32 R13, RZ, RZ, R7 ; /* 0x000000ffff0d7224 */ /* 0x000fce00078e0007 */ /*2ce0*/ FFMA R0, RZ, R55, R9 ; /* 0x00000037ff007223 */ /* 0x002fca0000000009 */ /*2cf0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*2d00*/ @P0 BRA P1, 0x2d70 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*2d10*/ MOV R20, R36 ; /* 0x0000002400147202 */ /* 0x000fe20000000f00 */ /*2d20*/ IMAD.MOV.U32 R21, RZ, RZ, R37 ; /* 0x000000ffff157224 */ /* 0x000fe200078e0025 */ /*2d30*/ MOV R8, R54 ; /* 0x0000003600087202 */ /* 0x000fe20000000f00 */ /*2d40*/ IMAD.MOV.U32 R9, RZ, RZ, R55 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0037 */ /*2d50*/ MOV R24, 0x2d70 ; /* 0x00002d7000187802 */ /* 0x000fe40000000f00 */ /*2d60*/ CALL.REL.NOINC 0x3970 ; /* 0x00000c0000007944 */ /* 0x000fea0003c00000 */ /*2d70*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2d80*/ LDG.E.64 R60, [R60.64] ; /* 0x000000063c3c7981 */ /* 0x000ea2000c1e1b00 */ /*2d90*/ MOV R0, 0x2 ; /* 0x0000000200007802 */ /* 0x000fe20000000f00 */ /*2da0*/ DFMA R10, -R10, R12, R52 ; /* 0x0000000c0a0a722b */ /* 0x0000460000000134 */ /*2db0*/ ISETP.LT.AND P0, PT, R0, c[0x0][0x194], PT ; /* 0x0000650000007a0c */ /* 0x000fe20003f01270 */ /*2dc0*/ DFMA R6, -R56, R8, R50 ; /* 0x000000083806722b */ /* 0x0000c80000000132 */ /*2dd0*/ DFMA R66, R44, -R60, R66 ; /* 0x8000003c2c42722b */ /* 0x0040880000000042 */ /*2de0*/ DFMA R64, R42, -R60, R64 ; /* 0x8000003c2a40722b */ /* 0x0001080000000040 */ /*2df0*/ DFMA R62, R40, -R60, R62 ; /* 0x8000003c283e722b */ /* 0x000022000000003e */ /*2e00*/ @!P0 BRA 0x35a0 ; /* 0x0000079000008947 */ /* 0x000fea0003800000 */ /*2e10*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x01ee620000002500 */ /*2e20*/ IMAD.MOV.U32 R23, RZ, RZ, c[0x0][0x194] ; /* 0x00006500ff177624 */ /* 0x000fe200078e00ff */ /*2e30*/ MOV R16, c[0x0][0x198] ; /* 0x0000660000107a02 */ /* 0x000fe20000000f00 */ /*2e40*/ IMAD.MOV.U32 R22, RZ, RZ, 0x5 ; /* 0x00000005ff167424 */ /* 0x000fe200078e00ff */ /*2e50*/ S2R R17, SR_TID.X ; /* 0x0000000000117919 */ /* 0x000e620000002100 */ /*2e60*/ ULDC UR4, c[0x0][0x190] ; /* 0x0000640000047ab9 */ /* 0x000fe20000000800 */ /*2e70*/ IADD3 R18, R16, -0x2, RZ ; /* 0xfffffffe10127810 */ /* 0x000fe20007ffe0ff */ /*2e80*/ UIADD3 UR4, UR4, -0x2, URZ ; /* 0xfffffffe04047890 */ /* 0x000fe2000fffe03f */ /*2e90*/ S2R R15, SR_TID.Y ; /* 0x00000000000f7919 */ /* 0x000ea20000002200 */ /*2ea0*/ IADD3 R20, R23, -0x3, RZ ; /* 0xfffffffd17147810 */ /* 0x000fc60007ffe0ff */ /*2eb0*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000ee20000002600 */ /*2ec0*/ IMAD R17, R0, c[0x0][0x0], R17 ; /* 0x0000000000117a24 */ /* 0x002fe400078e0211 */ /*2ed0*/ IMAD R0, R23, c[0x0][0x190], RZ ; /* 0x0000640017007a24 */ /* 0x000fc600078e02ff */ /*2ee0*/ IADD3 R14, R17, 0x1, RZ ; /* 0x00000001110e7810 */ /* 0x000fca0007ffe0ff */ /*2ef0*/ IMAD R0, R14, R0, R15 ; /* 0x000000000e007224 */ /* 0x004fe200078e020f */ /*2f00*/ MOV R15, 0x5 ; /* 0x00000005000f7802 */ /* 0x000fe20000000f00 */ /*2f10*/ IMAD.MOV.U32 R14, RZ, RZ, 0x9 ; /* 0x00000009ff0e7424 */ /* 0x000fe400078e00ff */ /*2f20*/ IMAD R0, R5, c[0x0][0x4], R0 ; /* 0x0000010005007a24 */ /* 0x008fe200078e0200 */ /*2f30*/ LEA R5, R23.reuse, 0xfffffffd, 0x3 ; /* 0xfffffffd17057811 */ /* 0x040fe200078e18ff */ /*2f40*/ IMAD R14, R23, R14, -0x3 ; /* 0xfffffffd170e7424 */ /* 0x000fe400078e020e */ /*2f50*/ IMAD R15, R0, R15, 0x5 ; /* 0x00000005000f7424 */ /* 0x000fe400078e020f */ /*2f60*/ IMAD R19, R18, R5, R17 ; /* 0x0000000512137224 */ /* 0x000fc400078e0211 */ /*2f70*/ IMAD R5, R20, c[0x0][0x198], R17.reuse ; /* 0x0000660014057a24 */ /* 0x100fe400078e0211 */ /*2f80*/ IMAD R21, R18, R14, R17.reuse ; /* 0x0000000e12157224 */ /* 0x100fe400078e0211 */ /*2f90*/ IMAD R0, R23, R22, -0x5 ; /* 0xfffffffb17007424 */ /* 0x000fe400078e0216 */ /*2fa0*/ IMAD R18, R20, R18, R17 ; /* 0x0000001214127224 */ /* 0x000fe200078e0211 */ /*2fb0*/ IADD3 R17, R5, 0x1, RZ ; /* 0x0000000105117810 */ /* 0x000fe20007ffe0ff */ /*2fc0*/ IMAD R0, R0, c[0x0][0x190], R15 ; /* 0x0000640000007a24 */ /* 0x000fe200078e020f */ /*2fd0*/ IADD3 R15, -R16.reuse, 0x2, RZ ; /* 0x00000002100f7810 */ /* 0x040fe20007ffe1ff */ /*2fe0*/ IMAD R14, R16, c[0x0][0x194], RZ ; /* 0x00006500100e7a24 */ /* 0x000fe200078e02ff */ /*2ff0*/ IADD3 R5, R23, -0x1, RZ ; /* 0xffffffff17057810 */ /* 0x000fe20007ffe0ff */ /*3000*/ IMAD R16, R17, c[0x0][0x190], R2 ; /* 0x0000640011107a24 */ /* 0x000fc400078e0202 */ /*3010*/ IMAD R15, R15, UR4, RZ ; /* 0x000000040f0f7c24 */ /* 0x000fe4000f8e02ff */ /*3020*/ IMAD R14, R14, c[0x0][0x190], RZ ; /* 0x000064000e0e7a24 */ /* 0x000fe200078e02ff */ /*3030*/ IADD3 R16, R16, 0x1, RZ ; /* 0x0000000110107810 */ /* 0x000fe20007ffe0ff */ /*3040*/ IMAD R17, R18, UR4, RZ ; /* 0x0000000412117c24 */ /* 0x000fe4000f8e02ff */ /*3050*/ IMAD R19, R19, UR4, RZ ; /* 0x0000000413137c24 */ /* 0x000fe4000f8e02ff */ /*3060*/ IMAD R21, R21, UR4, RZ ; /* 0x0000000415157c24 */ /* 0x000fe4000f8e02ff */ /*3070*/ MOV R53, 0x8 ; /* 0x0000000800357802 */ /* 0x001fe20000000f00 */ /*3080*/ IMAD.IADD R22, R17, 0x1, R2 ; /* 0x0000000111167824 */ /* 0x000fe200078e0202 */ /*3090*/ IADD3 R34, R19, R2, RZ ; /* 0x0000000213227210 */ /* 0x000fc60007ffe0ff */ /*30a0*/ IMAD.WIDE R26, R16, R53, c[0x0][0x188] ; /* 0x00006200101a7625 */ /* 0x000fc800078e0235 */ /*30b0*/ IMAD.WIDE R22, R22, R53, c[0x0][0x180] ; /* 0x0000600016167625 */ /* 0x000fc800078e0235 */ /*30c0*/ IMAD.WIDE R28, R14.reuse, 0x8, R26 ; /* 0x000000080e1c7825 */ /* 0x040fe400078e021a */ /*30d0*/ LDG.E.64 R26, [R26.64] ; /* 0x000000061a1a7981 */ /* 0x000ea4000c1e1b00 */ /*30e0*/ IMAD.WIDE R24, R3, 0x8, R22 ; /* 0x0000000803187825 */ /* 0x000fe400078e0216 */ /*30f0*/ LDG.E.64 R22, [R22.64] ; /* 0x0000000616167981 */ /* 0x000ea4000c1e1b00 */ /*3100*/ IMAD.WIDE R30, R14.reuse, 0x8, R28 ; /* 0x000000080e1e7825 */ /* 0x040fe400078e021c */ /*3110*/ LDG.E.64 R28, [R28.64] ; /* 0x000000061c1c7981 */ /* 0x000ee8000c1e1b00 */ /*3120*/ IMAD.WIDE R32, R14, 0x8, R30 ; /* 0x000000080e207825 */ /* 0x000fc400078e021e */ /*3130*/ LDG.E.64 R30, [R30.64] ; /* 0x000000061e1e7981 */ /* 0x000f24000c1e1b00 */ /*3140*/ IMAD.WIDE R46, R3, 0x8, R24 ; /* 0x00000008032e7825 */ /* 0x000fe400078e0218 */ /*3150*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000618187981 */ /* 0x000f64000c1e1b00 */ /*3160*/ IMAD.WIDE R38, R14, 0x8, R32 ; /* 0x000000080e267825 */ /* 0x000fe400078e0220 */ /*3170*/ LDG.E.64 R48, [R46.64] ; /* 0x000000062e307981 */ /* 0x000164000c1e1b00 */ /*3180*/ IMAD.WIDE R34, R34, R53, c[0x0][0x180] ; /* 0x0000600022227625 */ /* 0x000fc400078e0235 */ /*3190*/ LDG.E.64 R38, [R38.64] ; /* 0x0000000626267981 */ /* 0x000f64000c1e1b00 */ /*31a0*/ IMAD.IADD R36, R21, 0x1, R2 ; /* 0x0000000115247824 */ /* 0x000fe400078e0202 */ /*31b0*/ IMAD.WIDE R50, R3, 0x8, R46 ; /* 0x0000000803327825 */ /* 0x000fe200078e022e */ /*31c0*/ LDG.E.64 R34, [R34.64] ; /* 0x0000000622227981 */ /* 0x000f66000c1e1b00 */ /*31d0*/ IMAD.WIDE R36, R36, R53, c[0x0][0x180] ; /* 0x0000600024247625 */ /* 0x000fe200078e0235 */ /*31e0*/ LDG.E.64 R32, [R32.64] ; /* 0x0000000620207981 */ /* 0x000f68000c1e1b00 */ /*31f0*/ LDG.E.64 R50, [R50.64] ; /* 0x0000000632327981 */ /* 0x000f68000c1e1b00 */ /*3200*/ LDG.E.64 R36, [R36.64] ; /* 0x0000000624247981 */ /* 0x000f62000c1e1b00 */ /*3210*/ IADD3 R18, R4, 0x1, RZ ; /* 0x0000000104127810 */ /* 0x000fc80007ffe0ff */ /*3220*/ ISETP.GE.AND P0, PT, R18, R5, PT ; /* 0x000000051200720c */ /* 0x000fe40003f06270 */ /*3230*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */ /* 0x000fd60007ffe0ff */ /*3240*/ @!P0 DADD R46, -R8, R12 ; /* 0x00000000082e8229 */ /* 0x001fe2000000010c */ /*3250*/ IADD3 R2, R15, R2, RZ ; /* 0x000000020f027210 */ /* 0x000fc60007ffe0ff */ /*3260*/ DFMA R26, -R22, R66, R26 ; /* 0x00000042161a722b */ /* 0x004f48000000011a */ /*3270*/ DFMA R28, -R22, R64, R28 ; /* 0x00000040161c722b */ /* 0x008e08000000011c */ /*3280*/ DFMA R30, -R22, R62, R30 ; /* 0x0000003e161e722b */ /* 0x010e48000000011e */ /*3290*/ DFMA R26, R44, -R24, R26 ; /* 0x800000182c1a722b */ /* 0x020fc8000000001a */ /*32a0*/ DFMA R28, R42, -R24, R28 ; /* 0x800000182a1c722b */ /* 0x001fc8000000001c */ /*32b0*/ DFMA R38, -R48, R6, R38 ; /* 0x000000063026722b */ /* 0x000fc80000000126 */ /*32c0*/ @!P0 DADD R48, -RZ, -R40 ; /* 0x00000000ff308229 */ /* 0x000e080000000928 */ /*32d0*/ DFMA R30, R40, -R24, R30 ; /* 0x80000018281e722b */ /* 0x0023c8000000001e */ /*32e0*/ DFMA R32, -R34, R10, R32 ; /* 0x0000000a2220722b */ /* 0x000e880000000120 */ /*32f0*/ @!P0 DMUL R22, R44, c[0x3][0x48] ; /* 0x00c012002c168a28 */ /* 0x000fc80000000000 */ /*3300*/ @!P0 DADD R24, R8.reuse, R12 ; /* 0x0000000008188229 */ /* 0x040ee2000000000c */ /*3310*/ @!P0 MOV R40, R42 ; /* 0x0000002a00288202 */ /* 0x002fe20000000f00 */ /*3320*/ @!P0 IMAD.MOV.U32 R41, RZ, RZ, R43 ; /* 0x000000ffff298224 */ /* 0x000fe200078e002b */ /*3330*/ @!P0 MOV R42, R48 ; /* 0x00000030002a8202 */ /* 0x001fe20000000f00 */ /*3340*/ DFMA R38, R8, -R50, R38 ; /* 0x800000320826722b */ /* 0x000fe20000000026 */ /*3350*/ @!P0 IMAD.MOV.U32 R43, RZ, RZ, R49 ; /* 0x000000ffff2b8224 */ /* 0x000fc600078e0031 */ /*3360*/ DFMA R32, R12, -R36, R32 ; /* 0x800000240c20722b */ /* 0x0041c80000000020 */ /*3370*/ @!P0 DMUL R44, R46, c[0x3][0x48] ; /* 0x00c012002e2c8a28 */ /* 0x0002880000000000 */ /*3380*/ @!P0 DFMA R12, R24, 0.5, -R22 ; /* 0x3fe00000180c882b */ /* 0x008ec80000000816 */ /*3390*/ @!P0 DFMA R8, R24, 0.5, R22 ; /* 0x3fe000001808882b */ /* 0x000f220000000016 */ /*33a0*/ ISETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe20003f04270 */ /*33b0*/ IMAD.WIDE R34, R0, R53, c[0x0][0x178] ; /* 0x00005e0000227625 */ /* 0x000fe200078e0235 */ /*33c0*/ IADD3 R37, RZ, -c[0x0][0x198], RZ ; /* 0x80006600ff257a10 */ /* 0x001fc60007ffe0ff */ /*33d0*/ IMAD.MOV R47, RZ, RZ, -c[0x0][0x190] ; /* 0x80006400ff2f7624 */ /* 0x002fe200078e02ff */ /*33e0*/ STG.E.64 [R34.64], R44 ; /* 0x0000002c22007986 */ /* 0x0041e2000c101b06 */ /*33f0*/ IMAD R16, R37, c[0x0][0x190], R16 ; /* 0x0000640025107a24 */ /* 0x000fc600078e0210 */ /*3400*/ STG.E.64 [R34.64+0x10], R40 ; /* 0x0000102822007986 */ /* 0x0003e2000c101b06 */ /*3410*/ IMAD R0, R47, 0x5, R0 ; /* 0x000000052f007824 */ /* 0x000fc600078e0200 */ /*3420*/ STG.E.64 [R34.64+0x8], R42 ; /* 0x0000082a22007986 */ /* 0x0005e8000c101b06 */ /*3430*/ STG.E.64 [R34.64+0x18], R12 ; /* 0x0000180c22007986 */ /* 0x0087e2000c101b06 */ /*3440*/ MOV R44, R66 ; /* 0x00000042002c7202 */ /* 0x001fe20000000f00 */ /*3450*/ IMAD.MOV.U32 R45, RZ, RZ, R67 ; /* 0x000000ffff2d7224 */ /* 0x000fe400078e0043 */ /*3460*/ STG.E.64 [R34.64+0x20], R8 ; /* 0x0000200822007986 */ /* 0x0101e2000c101b06 */ /*3470*/ IMAD.MOV.U32 R66, RZ, RZ, R26 ; /* 0x000000ffff427224 */ /* 0x000fe200078e001a */ /*3480*/ MOV R40, R62 ; /* 0x0000003e00287202 */ /* 0x002fe20000000f00 */ /*3490*/ IMAD.MOV.U32 R41, RZ, RZ, R63 ; /* 0x000000ffff297224 */ /* 0x000fe200078e003f */ /*34a0*/ MOV R67, R27 ; /* 0x0000001b00437202 */ /* 0x000fe20000000f00 */ /*34b0*/ IMAD.MOV.U32 R62, RZ, RZ, R30 ; /* 0x000000ffff3e7224 */ /* 0x000fe200078e001e */ /*34c0*/ MOV R42, R64 ; /* 0x00000040002a7202 */ /* 0x004fe20000000f00 */ /*34d0*/ IMAD.MOV.U32 R43, RZ, RZ, R65 ; /* 0x000000ffff2b7224 */ /* 0x000fe200078e0041 */ /*34e0*/ MOV R65, R29 ; /* 0x0000001d00417202 */ /* 0x000fe20000000f00 */ /*34f0*/ IMAD.MOV.U32 R64, RZ, RZ, R28 ; /* 0x000000ffff407224 */ /* 0x000fe200078e001c */ /*3500*/ MOV R12, R10 ; /* 0x0000000a000c7202 */ /* 0x008fe20000000f00 */ /*3510*/ IMAD.MOV.U32 R13, RZ, RZ, R11 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e000b */ /*3520*/ MOV R63, R31 ; /* 0x0000001f003f7202 */ /* 0x000fe20000000f00 */ /*3530*/ IMAD.MOV.U32 R10, RZ, RZ, R32 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0020 */ /*3540*/ MOV R8, R6 ; /* 0x0000000600087202 */ /* 0x001fe20000000f00 */ /*3550*/ IMAD.MOV.U32 R9, RZ, RZ, R7 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0007 */ /*3560*/ MOV R11, R33 ; /* 0x00000021000b7202 */ /* 0x000fe20000000f00 */ /*3570*/ IMAD.MOV.U32 R6, RZ, RZ, R38 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0026 */ /*3580*/ MOV R7, R39 ; /* 0x0000002700077202 */ /* 0x000fe20000000f00 */ /*3590*/ @P0 BRA 0x3070 ; /* 0xfffffad000000947 */ /* 0x000fea000383ffff */ /*35a0*/ DADD R2, R8.reuse, R12.reuse ; /* 0x0000000008027229 */ /* 0x15efe2000000000c */ /*35b0*/ STG.E.64 [R68.64+0x8], R42 ; /* 0x0000082a44007986 */ /* 0x000fe6000c101b06 */ /*35c0*/ DADD R4, -R8, R12 ; /* 0x0000000008047229 */ /* 0x000fc8000000010c */ /*35d0*/ DMUL R8, R44, c[0x3][0x48] ; /* 0x00c012002c087a28 */ /* 0x001e080000000000 */ /*35e0*/ DADD R14, -RZ, -R40 ; /* 0x00000000ff0e7229 */ /* 0x000e480000000928 */ /*35f0*/ DFMA R12, R2, 0.5, -R8 ; /* 0x3fe00000020c782b */ /* 0x001e060000000808 */ /*3600*/ STG.E.64 [R68.64], R14 ; /* 0x0000000e44007986 */ /* 0x002fe2000c101b06 */ /*3610*/ DMUL R4, R4, c[0x3][0x48] ; /* 0x00c0120004047a28 */ /* 0x000e460000000000 */ /*3620*/ STG.E.64 [R68.64+0x10], R12 ; /* 0x0000100c44007986 */ /* 0x001fe2000c101b06 */ /*3630*/ DFMA R2, R2, 0.5, R8 ; /* 0x3fe000000202782b */ /* 0x000e060000000008 */ /*3640*/ STG.E.64 [R68.64+-0x8], R4 ; /* 0xfffff80444007986 */ /* 0x002fe8000c101b06 */ /*3650*/ STG.E.64 [R68.64+0x18], R2 ; /* 0x0000180244007986 */ /* 0x001fe8000c101b06 */ /*3660*/ STG.E.64 [R70.64], R66 ; /* 0x0000004246007986 */ /* 0x000fe8000c101b06 */ /*3670*/ STG.E.64 [R70.64+0x8], R64 ; /* 0x0000084046007986 */ /* 0x000fe8000c101b06 */ /*3680*/ STG.E.64 [R70.64+0x10], R62 ; /* 0x0000103e46007986 */ /* 0x000fe8000c101b06 */ /*3690*/ STG.E.64 [R70.64+0x18], R10 ; /* 0x0000180a46007986 */ /* 0x000fe8000c101b06 */ /*36a0*/ STG.E.64 [R70.64+0x20], R6 ; /* 0x0000200646007986 */ /* 0x000fe2000c101b06 */ /*36b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*36c0*/ IMAD.MOV.U32 R25, RZ, RZ, R17 ; /* 0x000000ffff197224 */ /* 0x000fe200078e0011 */ /*36d0*/ BSSY B1, 0x3920 ; /* 0x0000024000017945 */ /* 0x000fea0003800000 */ /*36e0*/ DSETP.GTU.AND P1, PT, |R24|, +INF , PT ; /* 0x7ff000001800742a */ /* 0x000e1c0003f2c200 */ /*36f0*/ @P1 BRA 0x38f0 ; /* 0x000001f000001947 */ /* 0x001fea0003800000 */ /*3700*/ LOP3.LUT R17, R17, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff11117812 */ /* 0x000fc800078ec0ff */ /*3710*/ IADD3 R19, R17, -0x1, RZ ; /* 0xffffffff11137810 */ /* 0x000fc80007ffe0ff */ /*3720*/ ISETP.GE.U32.AND P1, PT, R19, 0x7fefffff, PT ; /* 0x7fefffff1300780c */ /* 0x000fda0003f26070 */ /*3730*/ @P1 LOP3.LUT R101, R25, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff0000019651812 */ /* 0x000fe400078e3cff */ /*3740*/ @P1 MOV R100, RZ ; /* 0x000000ff00641202 */ /* 0x000fe20000000f00 */ /*3750*/ @P1 BRA 0x3910 ; /* 0x000001b000001947 */ /* 0x000fea0003800000 */ /*3760*/ ISETP.GE.U32.AND P1, PT, R17, 0x1000001, PT ; /* 0x010000011100780c */ /* 0x000fda0003f26070 */ /*3770*/ @!P1 BRA 0x3860 ; /* 0x000000e000009947 */ /* 0x000fea0003800000 */ /*3780*/ IADD3 R19, R25, -0x3fe00000, RZ ; /* 0xc020000019137810 */ /* 0x000fe20007ffe0ff */ /*3790*/ IMAD.MOV.U32 R100, RZ, RZ, R18 ; /* 0x000000ffff647224 */ /* 0x000fe200078e0012 */ /*37a0*/ MOV R18, R24 ; /* 0x0000001800127202 */ /* 0x000fe40000000f00 */ /*37b0*/ MUFU.RCP64H R101, R19 ; /* 0x0000001300657308 */ /* 0x000e280000001800 */ /*37c0*/ DFMA R102, -R18, R100, 1 ; /* 0x3ff000001266742b */ /* 0x001e0c0000000164 */ /*37d0*/ DFMA R102, R102, R102, R102 ; /* 0x000000666666722b */ /* 0x001e0c0000000066 */ /*37e0*/ DFMA R102, R100, R102, R100 ; /* 0x000000666466722b */ /* 0x001e0c0000000064 */ /*37f0*/ DFMA R100, -R18, R102, 1 ; /* 0x3ff000001264742b */ /* 0x001e0c0000000166 */ /*3800*/ DFMA R100, R102, R100, R102 ; /* 0x000000646664722b */ /* 0x001e0c0000000066 */ /*3810*/ DMUL R100, R100, 2.2250738585072013831e-308 ; /* 0x0010000064647828 */ /* 0x001e0c0000000000 */ /*3820*/ DFMA R24, -R24, R100, 1 ; /* 0x3ff000001818742b */ /* 0x001e0c0000000164 */ /*3830*/ DFMA R24, R24, R24, R24 ; /* 0x000000181818722b */ /* 0x001e0c0000000018 */ /*3840*/ DFMA R100, R100, R24, R100 ; /* 0x000000186464722b */ /* 0x0010620000000064 */ /*3850*/ BRA 0x3910 ; /* 0x000000b000007947 */ /* 0x000fea0003800000 */ /*3860*/ DMUL R24, R24, 8.11296384146066816958e+31 ; /* 0x4690000018187828 */ /* 0x000e0c0000000000 */ /*3870*/ MUFU.RCP64H R19, R25 ; /* 0x0000001900137308 */ /* 0x001e240000001800 */ /*3880*/ DFMA R100, -R24, R18, 1 ; /* 0x3ff000001864742b */ /* 0x001e0c0000000112 */ /*3890*/ DFMA R100, R100, R100, R100 ; /* 0x000000646464722b */ /* 0x001e0c0000000064 */ /*38a0*/ DFMA R100, R18, R100, R18 ; /* 0x000000641264722b */ /* 0x001e0c0000000012 */ /*38b0*/ DFMA R18, -R24, R100, 1 ; /* 0x3ff000001812742b */ /* 0x001e0c0000000164 */ /*38c0*/ DFMA R18, R100, R18, R100 ; /* 0x000000126412722b */ /* 0x001e0c0000000064 */ /*38d0*/ DMUL R100, R18, 8.11296384146066816958e+31 ; /* 0x4690000012647828 */ /* 0x0010620000000000 */ /*38e0*/ BRA 0x3910 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*38f0*/ LOP3.LUT R101, R25, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000019657812 */ /* 0x000fe200078efcff */ /*3900*/ IMAD.MOV.U32 R100, RZ, RZ, R24 ; /* 0x000000ffff647224 */ /* 0x000fe400078e0018 */ /*3910*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*3920*/ MOV R24, R0 ; /* 0x0000000000187202 */ /* 0x001fe20000000f00 */ /*3930*/ IMAD.MOV.U32 R25, RZ, RZ, 0x0 ; /* 0x00000000ff197424 */ /* 0x000fe200078e00ff */ /*3940*/ MOV R18, R100 ; /* 0x0000006400127202 */ /* 0x002fe20000000f00 */ /*3950*/ IMAD.MOV.U32 R19, RZ, RZ, R101 ; /* 0x000000ffff137224 */ /* 0x000fe400078e0065 */ /*3960*/ RET.REL.NODEC R24 0x0 ; /* 0xffffc69018007950 */ /* 0x000fea0003c3ffff */ /*3970*/ FSETP.GEU.AND P0, PT, |R9|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000900780b */ /* 0x040fe20003f0e200 */ /*3980*/ IMAD.MOV.U32 R23, RZ, RZ, R9 ; /* 0x000000ffff177224 */ /* 0x000fe200078e0009 */ /*3990*/ LOP3.LUT R6, R9, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff09067812 */ /* 0x000fe200078ec0ff */ /*39a0*/ IMAD.MOV.U32 R25, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff197424 */ /* 0x000fe200078e00ff */ /*39b0*/ MOV R22, R8 ; /* 0x0000000800167202 */ /* 0x000fe20000000f00 */ /*39c0*/ BSSY B1, 0x3f30 ; /* 0x0000056000017945 */ /* 0x000fe20003800000 */ /*39d0*/ LOP3.LUT R7, R6, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000006077812 */ /* 0x000fc400078efcff */ /*39e0*/ MOV R6, R8 ; /* 0x0000000800067202 */ /* 0x000fe40000000f00 */ /*39f0*/ FSETP.GEU.AND P2, PT, |R21|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000001500780b */ /* 0x040fe40003f4e200 */ /*3a00*/ LOP3.LUT R27, R21, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000151b7812 */ /* 0x000fe200078ec0ff */ /*3a10*/ @!P0 DMUL R6, R22, 8.98846567431157953865e+307 ; /* 0x7fe0000016068828 */ /* 0x000e220000000000 */ /*3a20*/ MOV R16, 0x1 ; /* 0x0000000100107802 */ /* 0x000fe40000000f00 */ /*3a30*/ LOP3.LUT R26, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000091a7812 */ /* 0x000fc600078ec0ff */ /*3a40*/ MUFU.RCP64H R17, R7 ; /* 0x0000000700117308 */ /* 0x001e220000001800 */ /*3a50*/ ISETP.GE.U32.AND P1, PT, R27, R26, PT ; /* 0x0000001a1b00720c */ /* 0x000fc60003f26070 */ /*3a60*/ @!P2 LOP3.LUT R0, R23, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001700a812 */ /* 0x000fe400078ec0ff */ /*3a70*/ SEL R5, R25, 0x63400000, !P1 ; /* 0x6340000019057807 */ /* 0x000fe40004800000 */ /*3a80*/ @!P2 ISETP.GE.U32.AND P3, PT, R27, R0, PT ; /* 0x000000001b00a20c */ /* 0x000fe40003f66070 */ /*3a90*/ @!P2 MOV R14, RZ ; /* 0x000000ff000ea202 */ /* 0x000fe40000000f00 */ /*3aa0*/ @!P2 SEL R15, R25, 0x63400000, !P3 ; /* 0x63400000190fa807 */ /* 0x000fe40005800000 */ /*3ab0*/ MOV R0, R26 ; /* 0x0000001a00007202 */ /* 0x000fe20000000f00 */ /*3ac0*/ DFMA R8, R16, -R6, 1 ; /* 0x3ff000001008742b */ /* 0x001e220000000806 */ /*3ad0*/ @!P2 LOP3.LUT R15, R15, 0x80000000, R21, 0xf8, !PT ; /* 0x800000000f0fa812 */ /* 0x000fc400078ef815 */ /*3ae0*/ @!P0 LOP3.LUT R0, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000007008812 */ /* 0x000fe400078ec0ff */ /*3af0*/ @!P2 LOP3.LUT R15, R15, 0x100000, RZ, 0xfc, !PT ; /* 0x001000000f0fa812 */ /* 0x000fe200078efcff */ /*3b00*/ DFMA R18, R8, R8, R8 ; /* 0x000000080812722b */ /* 0x0010620000000008 */ /*3b10*/ IADD3 R26, R0, -0x1, RZ ; /* 0xffffffff001a7810 */ /* 0x000fe20007ffe0ff */ /*3b20*/ IMAD.MOV.U32 R8, RZ, RZ, R20 ; /* 0x000000ffff087224 */ /* 0x001fe200078e0014 */ /*3b30*/ LOP3.LUT R9, R5, 0x800fffff, R21, 0xf8, !PT ; /* 0x800fffff05097812 */ /* 0x000fe200078ef815 */ /*3b40*/ IMAD.MOV.U32 R5, RZ, RZ, R27 ; /* 0x000000ffff057224 */ /* 0x000fe400078e001b */ /*3b50*/ DFMA R18, R16, R18, R16 ; /* 0x000000121012722b */ /* 0x002e080000000010 */ /*3b60*/ @!P2 DFMA R8, R8, 2, -R14 ; /* 0x400000000808a82b */ /* 0x000e48000000080e */ /*3b70*/ DFMA R14, R18, -R6, 1 ; /* 0x3ff00000120e742b */ /* 0x001e0c0000000806 */ /*3b80*/ @!P2 LOP3.LUT R5, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000905a812 */ /* 0x002fe200078ec0ff */ /*3b90*/ DFMA R14, R18, R14, R18 ; /* 0x0000000e120e722b */ /* 0x0010460000000012 */ /*3ba0*/ IADD3 R18, R5, -0x1, RZ ; /* 0xffffffff05127810 */ /* 0x001fc60007ffe0ff */ /*3bb0*/ DMUL R16, R14, R8 ; /* 0x000000080e107228 */ /* 0x002e220000000000 */ /*3bc0*/ ISETP.GT.U32.AND P0, PT, R18, 0x7feffffe, PT ; /* 0x7feffffe1200780c */ /* 0x000fc80003f04070 */ /*3bd0*/ ISETP.GT.U32.OR P0, PT, R26, 0x7feffffe, P0 ; /* 0x7feffffe1a00780c */ /* 0x000fe20000704470 */ /*3be0*/ DFMA R18, R16, -R6, R8 ; /* 0x800000061012722b */ /* 0x001e0c0000000008 */ /*3bf0*/ DFMA R18, R14, R18, R16 ; /* 0x000000120e12722b */ /* 0x00104c0000000010 */ /*3c00*/ @P0 BRA 0x3dd0 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*3c10*/ LOP3.LUT R14, R23, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000170e7812 */ /* 0x003fe200078ec0ff */ /*3c20*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */ /* 0x000fc600078e00ff */ /*3c30*/ ISETP.GE.U32.AND P0, PT, R27.reuse, R14, PT ; /* 0x0000000e1b00720c */ /* 0x040fe20003f06070 */ /*3c40*/ IMAD.IADD R0, R27, 0x1, -R14 ; /* 0x000000011b007824 */ /* 0x000fc600078e0a0e */ /*3c50*/ SEL R25, R25, 0x63400000, !P0 ; /* 0x6340000019197807 */ /* 0x000fe40004000000 */ /*3c60*/ IMNMX R0, R0, -0x46a00000, !PT ; /* 0xb960000000007817 */ /* 0x000fc80007800200 */ /*3c70*/ IMNMX R0, R0, 0x46a00000, PT ; /* 0x46a0000000007817 */ /* 0x000fc80003800200 */ /*3c80*/ IADD3 R0, -R25, R0, RZ ; /* 0x0000000019007210 */ /* 0x000fc80007ffe1ff */ /*3c90*/ IADD3 R17, R0, 0x7fe00000, RZ ; /* 0x7fe0000000117810 */ /* 0x000fcc0007ffe0ff */ /*3ca0*/ DMUL R14, R18, R16 ; /* 0x00000010120e7228 */ /* 0x000e140000000000 */ /*3cb0*/ FSETP.GTU.AND P0, PT, |R15|, 1.469367938527859385e-39, PT ; /* 0x001000000f00780b */ /* 0x001fda0003f0c200 */ /*3cc0*/ @P0 BRA 0x3f20 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*3cd0*/ DFMA R6, R18, -R6, R8 ; /* 0x800000061206722b */ /* 0x000e220000000008 */ /*3ce0*/ MOV R16, RZ ; /* 0x000000ff00107202 */ /* 0x000fd20000000f00 */ /*3cf0*/ FSETP.NEU.AND P0, PT, R7.reuse, RZ, PT ; /* 0x000000ff0700720b */ /* 0x041fe40003f0d000 */ /*3d00*/ LOP3.LUT R23, R7, 0x80000000, R23, 0x48, !PT ; /* 0x8000000007177812 */ /* 0x000fc800078e4817 */ /*3d10*/ LOP3.LUT R17, R23, R17, RZ, 0xfc, !PT ; /* 0x0000001117117212 */ /* 0x000fce00078efcff */ /*3d20*/ @!P0 BRA 0x3f20 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*3d30*/ IMAD.MOV R7, RZ, RZ, -R0 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0a00 */ /*3d40*/ MOV R6, RZ ; /* 0x000000ff00067202 */ /* 0x000fe20000000f00 */ /*3d50*/ DMUL.RP R16, R18, R16 ; /* 0x0000001012107228 */ /* 0x000e220000008000 */ /*3d60*/ IADD3 R5, -R0, -0x43300000, RZ ; /* 0xbcd0000000057810 */ /* 0x000fc80007ffe1ff */ /*3d70*/ DFMA R6, R14, -R6, R18 ; /* 0x800000060e06722b */ /* 0x000e4a0000000012 */ /*3d80*/ LOP3.LUT R23, R17, R23, RZ, 0x3c, !PT ; /* 0x0000001711177212 */ /* 0x001fca00078e3cff */ /*3d90*/ FSETP.NEU.AND P0, PT, |R7|, R5, PT ; /* 0x000000050700720b */ /* 0x002fc80003f0d200 */ /*3da0*/ FSEL R14, R16, R14, !P0 ; /* 0x0000000e100e7208 */ /* 0x000fe40004000000 */ /*3db0*/ FSEL R15, R23, R15, !P0 ; /* 0x0000000f170f7208 */ /* 0x000fe20004000000 */ /*3dc0*/ BRA 0x3f20 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*3dd0*/ DSETP.NAN.AND P0, PT, R20, R20, PT ; /* 0x000000141400722a */ /* 0x003e1c0003f08000 */ /*3de0*/ @P0 BRA 0x3f00 ; /* 0x0000011000000947 */ /* 0x001fea0003800000 */ /*3df0*/ DSETP.NAN.AND P0, PT, R22, R22, PT ; /* 0x000000161600722a */ /* 0x000e1c0003f08000 */ /*3e00*/ @P0 BRA 0x3ed0 ; /* 0x000000c000000947 */ /* 0x001fea0003800000 */ /*3e10*/ ISETP.NE.AND P0, PT, R5, R0, PT ; /* 0x000000000500720c */ /* 0x000fe20003f05270 */ /*3e20*/ IMAD.MOV.U32 R14, RZ, RZ, 0x0 ; /* 0x00000000ff0e7424 */ /* 0x000fe200078e00ff */ /*3e30*/ MOV R15, 0xfff80000 ; /* 0xfff80000000f7802 */ /* 0x000fd60000000f00 */ /*3e40*/ @!P0 BRA 0x3f20 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*3e50*/ ISETP.NE.AND P0, PT, R5, 0x7ff00000, PT ; /* 0x7ff000000500780c */ /* 0x000fe40003f05270 */ /*3e60*/ LOP3.LUT R15, R21, 0x80000000, R23, 0x48, !PT ; /* 0x80000000150f7812 */ /* 0x000fe400078e4817 */ /*3e70*/ ISETP.EQ.OR P0, PT, R0, RZ, !P0 ; /* 0x000000ff0000720c */ /* 0x000fda0004702670 */ /*3e80*/ @P0 LOP3.LUT R0, R15, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000000f000812 */ /* 0x000fe200078efcff */ /*3e90*/ @!P0 IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e8224 */ /* 0x000fe200078e00ff */ /*3ea0*/ @P0 MOV R14, RZ ; /* 0x000000ff000e0202 */ /* 0x000fc60000000f00 */ /*3eb0*/ @P0 IMAD.MOV.U32 R15, RZ, RZ, R0 ; /* 0x000000ffff0f0224 */ /* 0x000fe200078e0000 */ /*3ec0*/ BRA 0x3f20 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*3ed0*/ LOP3.LUT R15, R23, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000170f7812 */ /* 0x000fe400078efcff */ /*3ee0*/ MOV R14, R22 ; /* 0x00000016000e7202 */ /* 0x000fe20000000f00 */ /*3ef0*/ BRA 0x3f20 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*3f00*/ LOP3.LUT R15, R21, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000150f7812 */ /* 0x000fe200078efcff */ /*3f10*/ IMAD.MOV.U32 R14, RZ, RZ, R20 ; /* 0x000000ffff0e7224 */ /* 0x000fe400078e0014 */ /*3f20*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*3f30*/ MOV R6, R24 ; /* 0x0000001800067202 */ /* 0x000fe20000000f00 */ /*3f40*/ IMAD.MOV.U32 R7, RZ, RZ, 0x0 ; /* 0x00000000ff077424 */ /* 0x000fe200078e00ff */ /*3f50*/ MOV R8, R14 ; /* 0x0000000e00087202 */ /* 0x000fe20000000f00 */ /*3f60*/ IMAD.MOV.U32 R9, RZ, RZ, R15 ; /* 0x000000ffff097224 */ /* 0x000fe400078e000f */ /*3f70*/ RET.REL.NODEC R6 0x0 ; /* 0xffffc08006007950 */ /* 0x000fea0003c3ffff */ /*3f80*/ BRA 0x3f80; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*3f90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3fa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3fb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3fc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3fd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3fe0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3ff0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4000*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4010*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4020*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z14x_solve_kernelPdS_S_S_S_S_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e220000002500 */ /*0020*/ UMOV UR5, 0x1 ; /* 0x0000000100057882 */ /* 0x000fe40000000000 */ /*0030*/ ULDC UR4, c[0x0][0x198] ; /* 0x0000660000047ab9 */ /* 0x000fe20000000800 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e220000002100 */ /*0050*/ UIADD3 UR4, -UR5, UR4, URZ ; /* 0x0000000405047290 */ /* 0x000fe4000fffe13f */ /*0060*/ ULDC UR6, c[0x0][0x194] ; /* 0x0000650000067ab9 */ /* 0x000fe20000000800 */ /*0070*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e620000002600 */ /*0080*/ UIADD3 UR5, -UR5, UR6, URZ ; /* 0x0000000605057290 */ /* 0x000fc6000fffe13f */ /*0090*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e620000002200 */ /*00a0*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */ /* 0x001fca00078e0203 */ /*00b0*/ IADD3 R6, R2, 0x1, RZ ; /* 0x0000000102067810 */ /* 0x000fe20007ffe0ff */ /*00c0*/ IMAD R3, R0, c[0x0][0x4], R5 ; /* 0x0000010000037a24 */ /* 0x002fc600078e0205 */ /*00d0*/ ISETP.GE.AND P0, PT, R6, UR4, PT ; /* 0x0000000406007c0c */ /* 0x000fe4000bf06270 */ /*00e0*/ IADD3 R5, R3, 0x1, RZ ; /* 0x0000000103057810 */ /* 0x000fc80007ffe0ff */ /*00f0*/ ISETP.GE.OR P0, PT, R5, UR5, P0 ; /* 0x0000000505007c0c */ /* 0x000fda0008706670 */ /*0100*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0110*/ IMAD.MOV.U32 R0, RZ, RZ, 0x2 ; /* 0x00000002ff007424 */ /* 0x000fe200078e00ff */ /*0120*/ MOV R79, c[0x0][0x190] ; /* 0x00006400004f7a02 */ /* 0x000fe20000000f00 */ /*0130*/ IMAD.MOV.U32 R72, RZ, RZ, 0x8 ; /* 0x00000008ff487424 */ /* 0x000fe200078e00ff */ /*0140*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fe20000000a00 */ /*0150*/ IMAD R6, R6, c[0x0][0x194], RZ ; /* 0x0000650006067a24 */ /* 0x000fe200078e02ff */ /*0160*/ IADD3 R73, -R0.reuse, c[0x0][0x198], RZ ; /* 0x0000660000497a10 */ /* 0x040fe20007ffe1ff */ /*0170*/ IMAD.SHL.U32 R22, R79, 0x4, RZ ; /* 0x000000044f167824 */ /* 0x000fe200078e00ff */ /*0180*/ IADD3 R0, -R0, c[0x0][0x194], RZ ; /* 0x0000650000007a10 */ /* 0x000fe20007ffe1ff */ /*0190*/ IMAD.MOV.U32 R34, RZ, RZ, 0x0 ; /* 0x00000000ff227424 */ /* 0x000fe200078e00ff */ /*01a0*/ IADD3 R9, R5, R6, RZ ; /* 0x0000000605097210 */ /* 0x000fe20007ffe0ff */ /*01b0*/ IMAD R8, R22, R73, R2 ; /* 0x0000004916087224 */ /* 0x000fc400078e0202 */ /*01c0*/ IMAD R23, R73, c[0x0][0x190], RZ ; /* 0x0000640049177a24 */ /* 0x000fe400078e02ff */ /*01d0*/ IMAD R11, R0.reuse, R8, R3 ; /* 0x00000008000b7224 */ /* 0x040fe400078e0203 */ /*01e0*/ IMAD R4, R0, R23, RZ ; /* 0x0000001700047224 */ /* 0x000fe400078e02ff */ /*01f0*/ IMAD.WIDE R10, R11, R72, c[0x0][0x180] ; /* 0x000060000b0a7625 */ /* 0x000fc800078e0248 */ /*0200*/ IMAD R7, R9, c[0x0][0x190], RZ ; /* 0x0000640009077a24 */ /* 0x000fe200078e02ff */ /*0210*/ STG.E.64 [R10.64], RZ ; /* 0x000000ff0a007986 */ /* 0x0001e2000c101b08 */ /*0220*/ IMAD.WIDE R12, R4, 0x8, R10 ; /* 0x00000008040c7825 */ /* 0x000fc800078e020a */ /*0230*/ IMAD.MOV.U32 R35, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff237424 */ /* 0x000fe200078e00ff */ /*0240*/ STG.E.64 [R12.64], RZ ; /* 0x000000ff0c007986 */ /* 0x0003e2000c101b08 */ /*0250*/ IMAD.WIDE R14, R4, 0x8, R12 ; /* 0x00000008040e7825 */ /* 0x000fc800078e020c */ /*0260*/ IMAD.WIDE R20, R7, R72, c[0x0][0x160] ; /* 0x0000580007147625 */ /* 0x000fe200078e0248 */ /*0270*/ STG.E.64 [R14.64], R34 ; /* 0x000000220e007986 */ /* 0x0005e6000c101b08 */ /*0280*/ IMAD.WIDE R16, R4, 0x8, R14 ; /* 0x0000000804107825 */ /* 0x000fca00078e020e */ /*0290*/ STG.E.64 [R16.64], RZ ; /* 0x000000ff10007986 */ /* 0x0007e2000c101b08 */ /*02a0*/ IMAD.WIDE R18, R4, 0x8, R16 ; /* 0x0000000804127825 */ /* 0x000fca00078e0210 */ /*02b0*/ STG.E.64 [R18.64], RZ ; /* 0x000000ff12007986 */ /* 0x0009e8000c101b08 */ /*02c0*/ LDG.E.64 R24, [R20.64] ; /* 0x0000000814187981 */ /* 0x000ea8000c1e1b00 */ /*02d0*/ LDG.E.64 R30, [R20.64+0x10] ; /* 0x00001008141e7981 */ /* 0x000ee8000c1e1b00 */ /*02e0*/ LDG.E.64 R26, [R20.64+0x8] ; /* 0x00000808141a7981 */ /* 0x000ee2000c1e1b00 */ /*02f0*/ IMAD.WIDE R28, R7, R72, c[0x0][0x168] ; /* 0x00005a00071c7625 */ /* 0x000fca00078e0248 */ /*0300*/ LDG.E.64 R32, [R28.64] ; /* 0x000000081c207981 */ /* 0x000ee8000c1e1b00 */ /*0310*/ LDG.E.64 R40, [R28.64+0x10] ; /* 0x000010081c287981 */ /* 0x000ee2000c1e1b00 */ /*0320*/ MOV R36, 0x0 ; /* 0x0000000000247802 */ /* 0x000fe20000000f00 */ /*0330*/ IMAD.MOV.U32 R37, RZ, RZ, 0x3fe80000 ; /* 0x3fe80000ff257424 */ /* 0x000fe400078e00ff */ /*0340*/ IMAD.IADD R8, R73, 0x1, R8 ; /* 0x0000000149087824 */ /* 0x000fe200078e0208 */ /*0350*/ DADD R88, RZ, c[0x3][0xc0] ; /* 0x00c03000ff587629 */ /* 0x000fc80000000000 */ /*0360*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x004e0c0000000000 */ /*0370*/ DFMA R10, R24, c[0x2][0x8], R36 ; /* 0x00800200180a7a2b */ /* 0x001fc80000000024 */ /*0380*/ DFMA R12, R24, c[0x2][0x10], R36 ; /* 0x00800400180c7a2b */ /* 0x002e0c0000000024 */ /*0390*/ DSETP.GT.AND P0, PT, R10, R12, PT ; /* 0x0000000c0a00722a */ /* 0x001e080003f04000 */ /*03a0*/ DADD R24, R24, 0.75 ; /* 0x3fe8000018187429 */ /* 0x000e640000000000 */ /*03b0*/ FSEL R10, R10, R12, P0 ; /* 0x0000000c0a0a7208 */ /* 0x001fe40000000000 */ /*03c0*/ FSEL R11, R11, R13, P0 ; /* 0x0000000d0b0b7208 */ /* 0x000fe20000000000 */ /*03d0*/ DMUL R30, R30, c[0x2][0x0] ; /* 0x008000001e1e7a28 */ /* 0x008e080000000000 */ /*03e0*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x000fc80000000000 */ /*03f0*/ DSETP.GEU.AND P0, PT, R10, R24, PT ; /* 0x000000180a00722a */ /* 0x002f080003f0e000 */ /*0400*/ DFMA R14, R30, c[0x2][0x8], R36 ; /* 0x008002001e0e7a2b */ /* 0x001fc80000000024 */ /*0410*/ DFMA R16, R30, c[0x2][0x10], R36.reuse ; /* 0x008004001e107a2b */ /* 0x100e220000000024 */ /*0420*/ FSEL R18, R24, R10, !P0 ; /* 0x0000000a18127208 */ /* 0x010fe40004000000 */ /*0430*/ FSEL R19, R25, R11, !P0 ; /* 0x0000000b19137208 */ /* 0x000fe20004000000 */ /*0440*/ DFMA R10, R26, c[0x2][0x8], R36 ; /* 0x008002001a0a7a2b */ /* 0x000fc80000000024 */ /*0450*/ DFMA R12, R26, c[0x2][0x10], R36 ; /* 0x008004001a0c7a2b */ /* 0x000e480000000024 */ /*0460*/ DSETP.GT.AND P2, PT, R14, R16, PT ; /* 0x000000100e00722a */ /* 0x001e080003f44000 */ /*0470*/ DSETP.GT.AND P1, PT, R10, R12, PT ; /* 0x0000000c0a00722a */ /* 0x002e640003f24000 */ /*0480*/ FSEL R14, R14, R16, P2 ; /* 0x000000100e0e7208 */ /* 0x001fe40001000000 */ /*0490*/ DADD R30, R30, 0.75 ; /* 0x3fe800001e1e7429 */ /* 0x000e220000000000 */ /*04a0*/ FSEL R15, R15, R17, P2 ; /* 0x000000110f0f7208 */ /* 0x000fe40001000000 */ /*04b0*/ FSEL R10, R10, R12, P1 ; /* 0x0000000c0a0a7208 */ /* 0x002fe20000800000 */ /*04c0*/ DADD R26, R26, 0.75 ; /* 0x3fe800001a1a7429 */ /* 0x000e620000000000 */ /*04d0*/ FSEL R11, R11, R13, P1 ; /* 0x0000000d0b0b7208 */ /* 0x000fc60000800000 */ /*04e0*/ DSETP.GEU.AND P2, PT, R14, R30, PT ; /* 0x0000001e0e00722a */ /* 0x001e080003f4e000 */ /*04f0*/ DSETP.GEU.AND P1, PT, R10, R26, PT ; /* 0x0000001a0a00722a */ /* 0x002e640003f2e000 */ /*0500*/ FSEL R12, R30, R14, !P2 ; /* 0x0000000e1e0c7208 */ /* 0x001fe40005000000 */ /*0510*/ FSEL R13, R31, R15, !P2 ; /* 0x0000000f1f0d7208 */ /* 0x000fe40005000000 */ /*0520*/ FSEL R10, R26, R10, !P1 ; /* 0x0000000a1a0a7208 */ /* 0x002fe40004800000 */ /*0530*/ FSEL R11, R27, R11, !P1 ; /* 0x0000000b1b0b7208 */ /* 0x000fe20004800000 */ /*0540*/ DSETP.GEU.AND P0, PT, R18, 0.75, PT ; /* 0x3fe800001200742a */ /* 0x000e080003f0e000 */ /*0550*/ DSETP.GEU.AND P1, PT, R12, 0.75, PT ; /* 0x3fe800000c00742a */ /* 0x000e640003f2e000 */ /*0560*/ FSEL R16, R18, RZ, P0 ; /* 0x000000ff12107208 */ /* 0x001fe40000000000 */ /*0570*/ FSEL R17, R19, 1.8125, P0 ; /* 0x3fe8000013117808 */ /* 0x000fe40000000000 */ /*0580*/ FSEL R39, R13, 1.8125, P1 ; /* 0x3fe800000d277808 */ /* 0x002fe20000800000 */ /*0590*/ IMAD R13, R0, R8, R3 ; /* 0x00000008000d7224 */ /* 0x000fe200078e0203 */ /*05a0*/ DSETP.GEU.AND P0, PT, R10, 0.75, PT ; /* 0x3fe800000a00742a */ /* 0x000e220003f0e000 */ /*05b0*/ FSEL R38, R12, RZ, P1 ; /* 0x000000ff0c267208 */ /* 0x000fe20000800000 */ /*05c0*/ IMAD R14, R79, 0x7, R79 ; /* 0x000000074f0e7824 */ /* 0x000fc400078e024f */ /*05d0*/ IMAD.WIDE R12, R13, R72, c[0x0][0x180] ; /* 0x000060000d0c7625 */ /* 0x000fe200078e0248 */ /*05e0*/ DMUL R16, R16, c[0x3][0x78] ; /* 0x00c01e0010107a28 */ /* 0x000e620000000000 */ /*05f0*/ FSEL R84, R10, RZ, P0 ; /* 0x000000ff0a547208 */ /* 0x001fe40000000000 */ /*0600*/ FSEL R85, R11, 1.8125, P0 ; /* 0x3fe800000b557808 */ /* 0x000fe20000000000 */ /*0610*/ DMUL R10, R38, c[0x3][0x78] ; /* 0x00c01e00260a7a28 */ /* 0x000e220000000000 */ /*0620*/ IADD3 R14, R14, 0x1, RZ ; /* 0x000000010e0e7810 */ /* 0x000fe20007ffe0ff */ /*0630*/ IMAD.WIDE R18, R4, 0x8, R12 ; /* 0x0000000804127825 */ /* 0x000fe400078e020c */ /*0640*/ DFMA R16, -R32, c[0x3][0x80], -R16 ; /* 0x00c0200020107a2b */ /* 0x002fe40000000910 */ /*0650*/ IMAD R8, R79, 0x5, RZ ; /* 0x000000054f087824 */ /* 0x000fc400078e02ff */ /*0660*/ DFMA R32, R84, c[0x3][0xa8], R34 ; /* 0x00c02a0054207a2b */ /* 0x0002a20000000022 */ /*0670*/ IMAD R14, R73, R14, R2 ; /* 0x0000000e490e7224 */ /* 0x000fe200078e0202 */ /*0680*/ LDG.E.64 R34, [R28.64+0x8] ; /* 0x000008081c227981 */ /* 0x002364000c1e1b00 */ /*0690*/ DFMA R10, R40, c[0x3][0x80], -R10 ; /* 0x00c02000280a7a2b */ /* 0x001e22000000080a */ /*06a0*/ IMAD R5, R5, R8, RZ ; /* 0x0000000805057224 */ /* 0x000fe400078e02ff */ /*06b0*/ IMAD.WIDE R20, R4, 0x8, R18 ; /* 0x0000000804147825 */ /* 0x000fe200078e0212 */ /*06c0*/ DADD R32, R32, c[0x3][0xd0] ; /* 0x00c0340020207629 */ /* 0x004e860000000000 */ /*06d0*/ IMAD R67, R0, R14, R3 ; /* 0x0000000e00437224 */ /* 0x000fe200078e0203 */ /*06e0*/ DADD R42, R10, -c[0x3][0xc8] ; /* 0x80c032000a2a7629 */ /* 0x001e220000000000 */ /*06f0*/ IMAD R5, R8, R6, R5 ; /* 0x0000000608057224 */ /* 0x000fe400078e0205 */ /*0700*/ IMAD.WIDE R36, R4, 0x8, R20 ; /* 0x0000000804247825 */ /* 0x000fe200078e0214 */ /*0710*/ STG.E.64 [R12.64], RZ ; /* 0x000000ff0c007986 */ /* 0x0007e6000c101b08 */ /*0720*/ IMAD.WIDE R66, R67, R72.reuse, c[0x0][0x180] ; /* 0x0000600043427625 */ /* 0x080fe200078e0248 */ /*0730*/ STG.E.64 [R18.64], R16 ; /* 0x0000001012007986 */ /* 0x000fe6000c101b08 */ /*0740*/ IMAD.WIDE R24, R5, R72, c[0x0][0x178] ; /* 0x00005e0005187625 */ /* 0x000fe200078e0248 */ /*0750*/ STG.E.64 [R20.64], R32 ; /* 0x0000002014007986 */ /* 0x0045e8000c101b08 */ /*0760*/ STG.E.64 [R36.64], R42 ; /* 0x0000002a24007986 */ /* 0x0011e8000c101b08 */ /*0770*/ STG.E.64 [R66.64], R88 ; /* 0x0000005842007986 */ /* 0x0001e8000c101b08 */ /*0780*/ LDG.E.64 R26, [R24.64] ; /* 0x00000008181a7981 */ /* 0x000168000c1e1b00 */ /*0790*/ LDG.E.64 R14, [R24.64+0x28] ; /* 0x00002808180e7981 */ /* 0x000168000c1e1b00 */ /*07a0*/ LDG.E.64 R28, [R24.64+0x8] ; /* 0x00000808181c7981 */ /* 0x002168000c1e1b00 */ /*07b0*/ LDG.E.64 R12, [R24.64+0x30] ; /* 0x00003008180c7981 */ /* 0x008168000c1e1b00 */ /*07c0*/ LDG.E.64 R30, [R24.64+0x10] ; /* 0x00001008181e7981 */ /* 0x000168000c1e1b00 */ /*07d0*/ LDG.E.64 R10, [R24.64+0x38] ; /* 0x00003808180a7981 */ /* 0x000162000c1e1b00 */ /*07e0*/ ISETP.GE.AND P0, PT, R79.reuse, 0x3, PT ; /* 0x000000034f00780c */ /* 0x040fe20003f06270 */ /*07f0*/ CS2R R86, SRZ ; /* 0x0000000000567805 */ /* 0x000fe2000001ff00 */ /*0800*/ MOV R20, 0x0 ; /* 0x0000000000147802 */ /* 0x004fe20000000f00 */ /*0810*/ IMAD.MOV.U32 R21, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff157424 */ /* 0x000fe200078e00ff */ /*0820*/ CS2R R18, SRZ ; /* 0x0000000000127805 */ /* 0x000fe2000001ff00 */ /*0830*/ IADD3 R5, R79, -0x2, RZ ; /* 0xfffffffe4f057810 */ /* 0x000fc40007ffe0ff */ /*0840*/ SHF.R.S32.HI R8, RZ, 0x1f, R7 ; /* 0x0000001fff087819 */ /* 0x000fcc0000011407 */ /*0850*/ @!P0 BRA 0x14a0 ; /* 0x00000c4000008947 */ /* 0x000fea0003800000 */ /*0860*/ IADD3 R18, R22, c[0x0][0x190], RZ ; /* 0x0000640016127a10 */ /* 0x001fe20007ffe0ff */ /*0870*/ IMAD.IADD R23, R2, 0x1, R23 ; /* 0x0000000102177824 */ /* 0x000fe200078e0217 */ /*0880*/ IADD3 R22, R22, 0x2, RZ ; /* 0x0000000216167810 */ /* 0x000fe20007ffe0ff */ /*0890*/ IMAD R75, R2, R0, R3.reuse ; /* 0x00000000024b7224 */ /* 0x100fe200078e0203 */ /*08a0*/ IADD3 R18, R18, -0x1, RZ ; /* 0xffffffff12127810 */ /* 0x000fe20007ffe0ff */ /*08b0*/ IMAD R74, R0, R23, R3.reuse ; /* 0x00000017004a7224 */ /* 0x100fe200078e0203 */ /*08c0*/ MOV R82, c[0x0][0x198] ; /* 0x0000660000527a02 */ /* 0x000fe20000000f00 */ /*08d0*/ IMAD R22, R73, R22, R2.reuse ; /* 0x0000001649167224 */ /* 0x100fe200078e0202 */ /*08e0*/ IADD3 R69, R7, 0x3, RZ ; /* 0x0000000307457810 */ /* 0x000fe20007ffe0ff */ /*08f0*/ IMAD R18, R73, R18, R2 ; /* 0x0000001249127224 */ /* 0x000fe200078e0202 */ /*0900*/ IADD3 R77, R79.reuse, -0x3, RZ ; /* 0xfffffffd4f4d7810 */ /* 0x040fe20007ffe0ff */ /*0910*/ IMAD R82, R82, c[0x0][0x194], RZ ; /* 0x0000650052527a24 */ /* 0x000fe200078e02ff */ /*0920*/ IADD3 R78, R79.reuse, -0x5, RZ ; /* 0xfffffffb4f4e7810 */ /* 0x040fe20007ffe0ff */ /*0930*/ IMAD R37, R0, R18, R3 ; /* 0x0000001200257224 */ /* 0x000fe200078e0203 */ /*0940*/ IADD3 R79, -R79, 0x3, RZ ; /* 0x000000034f4f7810 */ /* 0x000fe20007ffe1ff */ /*0950*/ IMAD.WIDE R70, R69, R72, c[0x0][0x168] ; /* 0x00005a0045467625 */ /* 0x000fe200078e0248 */ /*0960*/ CS2R R50, SRZ ; /* 0x0000000000327805 */ /* 0x000fe2000001ff00 */ /*0970*/ MOV R52, R88 ; /* 0x0000005800347202 */ /* 0x000fe20000000f00 */ /*0980*/ CS2R R18, SRZ ; /* 0x0000000000127805 */ /* 0x000fe2000001ff00 */ /*0990*/ IMAD.WIDE R36, R37, R72, c[0x0][0x180] ; /* 0x0000600025247625 */ /* 0x000fe200078e0248 */ /*09a0*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fc60008000000 */ /*09b0*/ IMAD.WIDE R68, R69, R72, c[0x0][0x160] ; /* 0x0000580045447625 */ /* 0x000fc800078e0248 */ /*09c0*/ IMAD.WIDE R44, R4, 0x8, R36 ; /* 0x00000008042c7825 */ /* 0x000fc800078e0224 */ /*09d0*/ IMAD R73, R0, R73, RZ ; /* 0x0000004900497224 */ /* 0x000fe400078e02ff */ /*09e0*/ IMAD.WIDE R46, R4, 0x8, R44 ; /* 0x00000008042e7825 */ /* 0x000fc800078e022c */ /*09f0*/ IMAD R76, R0, R22, R3 ; /* 0x00000016004c7224 */ /* 0x000fe400078e0203 */ /*0a00*/ IMAD.WIDE R48, R4, 0x8, R46 ; /* 0x0000000804307825 */ /* 0x000fc800078e022e */ /*0a10*/ IMAD R80, R7, 0x5, RZ ; /* 0x0000000507507824 */ /* 0x000fe400078e02ff */ /*0a20*/ IMAD.MOV.U32 R20, RZ, RZ, 0x0 ; /* 0x00000000ff147424 */ /* 0x000fe400078e00ff */ /*0a30*/ IMAD.MOV.U32 R21, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff157424 */ /* 0x000fe400078e00ff */ /*0a40*/ IMAD.MOV.U32 R53, RZ, RZ, R89 ; /* 0x000000ffff357224 */ /* 0x000fe400078e0059 */ /*0a50*/ IMAD R81, R82, c[0x0][0x190], RZ ; /* 0x0000640052517a24 */ /* 0x000fe400078e02ff */ /*0a60*/ IMAD.WIDE R54, R4, 0x8, R48 ; /* 0x0000000804367825 */ /* 0x000fc800078e0230 */ /*0a70*/ IADD3 R0, R78, -UR4, RZ ; /* 0x800000044e007c10 */ /* 0x000fe2000fffe0ff */ /*0a80*/ IMAD.MOV.U32 R86, RZ, RZ, R52 ; /* 0x000000ffff567224 */ /* 0x000fe200078e0034 */ /*0a90*/ MOV R87, R53 ; /* 0x0000003500577202 */ /* 0x000fc40000000f00 */ /*0aa0*/ ISETP.NE.AND P0, PT, R0, -0x2, PT ; /* 0xfffffffe0000780c */ /* 0x000fda0003f05270 */ /*0ab0*/ @!P0 BRA 0xfc0 ; /* 0x0000050000008947 */ /* 0x009fea0003800000 */ /*0ac0*/ LDG.E.64 R52, [R68.64] ; /* 0x0000000844347981 */ /* 0x000ea8000c1e1b00 */ /*0ad0*/ LDG.E.64 R22, [R70.64] ; /* 0x0000000846167981 */ /* 0x000ee2000c1e1b00 */ /*0ae0*/ IMAD.MOV.U32 R58, RZ, RZ, 0x0 ; /* 0x00000000ff3a7424 */ /* 0x000fe400078e00ff */ /*0af0*/ IMAD.MOV.U32 R59, RZ, RZ, 0x3fe80000 ; /* 0x3fe80000ff3b7424 */ /* 0x000fe200078e00ff */ /*0b00*/ DMUL R52, R52, c[0x2][0x0] ; /* 0x0080000034347a28 */ /* 0x004e0c0000000000 */ /*0b10*/ DFMA R56, R52, c[0x2][0x8], R58 ; /* 0x0080020034387a2b */ /* 0x001fc8000000003a */ /*0b20*/ DFMA R58, R52, c[0x2][0x10], R58 ; /* 0x00800400343a7a2b */ /* 0x000e08000000003a */ /*0b30*/ DADD R52, R52, 0.75 ; /* 0x3fe8000034347429 */ /* 0x000fc80000000000 */ /*0b40*/ DSETP.GT.AND P0, PT, R56, R58, PT ; /* 0x0000003a3800722a */ /* 0x001e0c0003f04000 */ /*0b50*/ FSEL R56, R56, R58, P0 ; /* 0x0000003a38387208 */ /* 0x001fe40000000000 */ /*0b60*/ FSEL R57, R57, R59, P0 ; /* 0x0000003b39397208 */ /* 0x000fe20000000000 */ /*0b70*/ IMAD.MOV.U32 R59, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff3b7424 */ /* 0x000fe200078e00ff */ /*0b80*/ MOV R58, 0x0 ; /* 0x00000000003a7802 */ /* 0x000fc80000000f00 */ /*0b90*/ DSETP.GEU.AND P0, PT, R56, R52, PT ; /* 0x000000343800722a */ /* 0x000e080003f0e000 */ /*0ba0*/ DFMA R58, R38, c[0x3][0xa8], R58 ; /* 0x00c02a00263a7a2b */ /* 0x000fe4000000003a */ /*0bb0*/ FSEL R52, R52, R56, !P0 ; /* 0x0000003834347208 */ /* 0x001fe40004000000 */ /*0bc0*/ FSEL R53, R53, R57, !P0 ; /* 0x0000003935357208 */ /* 0x000fe20004000000 */ /*0bd0*/ DMUL R56, R84, c[0x3][0x78] ; /* 0x00c01e0054387a28 */ /* 0x000e0a0000000000 */ /*0be0*/ DSETP.GEU.AND P0, PT, R52, 0.75, PT ; /* 0x3fe800003400742a */ /* 0x000e480003f0e000 */ /*0bf0*/ DFMA R56, -R34, c[0x3][0x80], -R56 ; /* 0x00c0200022387a2b */ /* 0x021fe40000000938 */ /*0c00*/ FSEL R64, R52, RZ, P0 ; /* 0x000000ff34407208 */ /* 0x002fe40000000000 */ /*0c10*/ FSEL R65, R53, 1.8125, P0 ; /* 0x3fe8000035417808 */ /* 0x000fe40000000000 */ /*0c20*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */ /* 0x000fc8000bf05270 */ /*0c30*/ DMUL R60, R64, c[0x3][0x78] ; /* 0x00c01e00403c7a28 */ /* 0x000ecc0000000000 */ /*0c40*/ DFMA R60, R22, c[0x3][0x80], -R60 ; /* 0x00c02000163c7a2b */ /* 0x008046000000083c */ /*0c50*/ @!P0 BRA 0xe20 ; /* 0x000001c000008947 */ /* 0x000fea0003800000 */ /*0c60*/ UIADD3 UR5, UR4, 0x2, URZ ; /* 0x0000000204057890 */ /* 0x003fcc000fffe03f */ /*0c70*/ ISETP.LE.AND P0, PT, R77, UR5, PT ; /* 0x000000054d007c0c */ /* 0x000fda000bf03270 */ /*0c80*/ @!P0 BRA 0xda0 ; /* 0x0000011000008947 */ /* 0x000fea0003800000 */ /*0c90*/ ISETP.NE.AND P0, PT, R79, -0x2, PT ; /* 0xfffffffe4f00780c */ /* 0x000fe20003f05270 */ /*0ca0*/ CS2R R52, SRZ ; /* 0x0000000000347805 */ /* 0x000fd8000001ff00 */ /*0cb0*/ @!P0 BRA 0xd40 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*0cc0*/ ISETP.NE.AND P0, PT, R0, -0x1, PT ; /* 0xffffffff0000780c */ /* 0x000fe20003f05270 */ /*0cd0*/ CS2R R62, SRZ ; /* 0x00000000003e7805 */ /* 0x000fd8000001ff00 */ /*0ce0*/ @P0 BRA 0xe80 ; /* 0x0000019000000947 */ /* 0x000fea0003800000 */ /*0cf0*/ DADD R56, R56, -c[0x3][0xc8] ; /* 0x80c0320038387629 */ /* 0x000e220000000000 */ /*0d00*/ IMAD.MOV.U32 R62, RZ, RZ, R88 ; /* 0x000000ffff3e7224 */ /* 0x000fe200078e0058 */ /*0d10*/ MOV R63, R89 ; /* 0x00000059003f7202 */ /* 0x000fe40000000f00 */ /*0d20*/ DADD R58, R58, c[0x3][0xd0] ; /* 0x00c034003a3a7629 */ /* 0x000e620000000000 */ /*0d30*/ BRA 0xe80 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*0d40*/ DADD R56, R56, -c[0x3][0xc8] ; /* 0x80c0320038387629 */ /* 0x000e220000000000 */ /*0d50*/ IMAD.MOV.U32 R62, RZ, RZ, R88 ; /* 0x000000ffff3e7224 */ /* 0x000fe400078e0058 */ /*0d60*/ IMAD.MOV.U32 R63, RZ, RZ, R89 ; /* 0x000000ffff3f7224 */ /* 0x000fe200078e0059 */ /*0d70*/ DADD R58, R58, c[0x3][0xd8] ; /* 0x00c036003a3a7629 */ /* 0x000e480000000000 */ /*0d80*/ DADD R60, R60, -c[0x3][0xc8] ; /* 0x80c032003c3c7629 */ /* 0x000ea20000000000 */ /*0d90*/ BRA 0xe80 ; /* 0x000000e000007947 */ /* 0x000fea0003800000 */ /*0da0*/ DADD R56, R56, -c[0x3][0xc8] ; /* 0x80c0320038387629 */ /* 0x000e220000000000 */ /*0db0*/ MOV R52, R88 ; /* 0x0000005800347202 */ /* 0x000fe20000000f00 */ /*0dc0*/ IMAD.MOV.U32 R53, RZ, RZ, R89 ; /* 0x000000ffff357224 */ /* 0x000fe200078e0059 */ /*0dd0*/ MOV R63, R89 ; /* 0x00000059003f7202 */ /* 0x000fe20000000f00 */ /*0de0*/ DADD R58, R58, c[0x3][0xd8] ; /* 0x00c036003a3a7629 */ /* 0x000e620000000000 */ /*0df0*/ IMAD.MOV.U32 R62, RZ, RZ, R88 ; /* 0x000000ffff3e7224 */ /* 0x000fc600078e0058 */ /*0e00*/ DADD R60, R60, -c[0x3][0xc8] ; /* 0x80c032003c3c7629 */ /* 0x000ea20000000000 */ /*0e10*/ BRA 0xe80 ; /* 0x0000006000007947 */ /* 0x000fea0003800000 */ /*0e20*/ DADD R56, R56, -c[0x3][0xc8] ; /* 0x80c0320038387629 */ /* 0x003e220000000000 */ /*0e30*/ CS2R R62, SRZ ; /* 0x00000000003e7805 */ /* 0x000fe2000001ff00 */ /*0e40*/ IMAD.MOV.U32 R52, RZ, RZ, R88 ; /* 0x000000ffff347224 */ /* 0x000fe400078e0058 */ /*0e50*/ DADD R58, R58, c[0x3][0xd8] ; /* 0x00c036003a3a7629 */ /* 0x000e620000000000 */ /*0e60*/ IMAD.MOV.U32 R53, RZ, RZ, R89 ; /* 0x000000ffff357224 */ /* 0x000fc600078e0059 */ /*0e70*/ DADD R60, R60, -c[0x3][0xc8] ; /* 0x80c032003c3c7629 */ /* 0x000e880000000000 */ /*0e80*/ MOV R91, 0x8 ; /* 0x00000008005b7802 */ /* 0x003fe20000000f00 */ /*0e90*/ IMAD.MOV.U32 R34, RZ, RZ, R40 ; /* 0x000000ffff227224 */ /* 0x000fe200078e0028 */ /*0ea0*/ MOV R84, R38 ; /* 0x0000002600547202 */ /* 0x000fe20000000f00 */ /*0eb0*/ IMAD.MOV.U32 R35, RZ, RZ, R41 ; /* 0x000000ffff237224 */ /* 0x000fe200078e0029 */ /*0ec0*/ MOV R41, R23 ; /* 0x0000001700297202 */ /* 0x000fe20000000f00 */ /*0ed0*/ IMAD.WIDE R90, R76, R91, c[0x0][0x180] ; /* 0x000060004c5a7625 */ /* 0x000fc800078e025b */ /*0ee0*/ IMAD.MOV.U32 R85, RZ, RZ, R39 ; /* 0x000000ffff557224 */ /* 0x000fe200078e0027 */ /*0ef0*/ STG.E.64 [R90.64], R62 ; /* 0x0000003e5a007986 */ /* 0x0001e2000c101b08 */ /*0f00*/ IMAD.WIDE R92, R4, 0x8, R90 ; /* 0x00000008045c7825 */ /* 0x000fc800078e025a */ /*0f10*/ IMAD.MOV.U32 R40, RZ, RZ, R22 ; /* 0x000000ffff287224 */ /* 0x000fe200078e0016 */ /*0f20*/ STG.E.64 [R92.64], R56 ; /* 0x000000385c007986 */ /* 0x0001e2000c101b08 */ /*0f30*/ IMAD.WIDE R94, R4, 0x8, R92 ; /* 0x00000008045e7825 */ /* 0x000fc800078e025c */ /*0f40*/ IMAD.MOV.U32 R38, RZ, RZ, R64 ; /* 0x000000ffff267224 */ /* 0x000fe200078e0040 */ /*0f50*/ STG.E.64 [R94.64], R58 ; /* 0x0000003a5e007986 */ /* 0x0001e2000c101b08 */ /*0f60*/ IMAD.WIDE R96, R4, 0x8, R94 ; /* 0x0000000804607825 */ /* 0x000fc800078e025e */ /*0f70*/ IMAD.MOV.U32 R39, RZ, RZ, R65 ; /* 0x000000ffff277224 */ /* 0x000fe200078e0041 */ /*0f80*/ STG.E.64 [R96.64], R60 ; /* 0x0000003c60007986 */ /* 0x0041e2000c101b08 */ /*0f90*/ IMAD.WIDE R98, R4, 0x8, R96 ; /* 0x0000000804627825 */ /* 0x000fca00078e0260 */ /*0fa0*/ STG.E.64 [R98.64], R52 ; /* 0x0000003462007986 */ /* 0x0001e2000c101b08 */ /*0fb0*/ BRA 0x1090 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*0fc0*/ MOV R22, 0x0 ; /* 0x0000000000167802 */ /* 0x000fe20000000f00 */ /*0fd0*/ IMAD.MOV.U32 R23, RZ, RZ, 0x3ff00000 ; /* 0x3ff00000ff177424 */ /* 0x000fe200078e00ff */ /*0fe0*/ STG.E.64 [R36.64], RZ ; /* 0x000000ff24007986 */ /* 0x0001e2000c101b08 */ /*0ff0*/ CS2R R52, SRZ ; /* 0x0000000000347805 */ /* 0x000fe2000001ff00 */ /*1000*/ IMAD.MOV.U32 R58, RZ, RZ, 0x0 ; /* 0x00000000ff3a7424 */ /* 0x000fe200078e00ff */ /*1010*/ MOV R59, 0x3ff00000 ; /* 0x3ff00000003b7802 */ /* 0x000fe20000000f00 */ /*1020*/ STG.E.64 [R44.64], RZ ; /* 0x000000ff2c007986 */ /* 0x0001e2000c101b08 */ /*1030*/ CS2R R60, SRZ ; /* 0x00000000003c7805 */ /* 0x000fe2000001ff00 */ /*1040*/ CS2R R56, SRZ ; /* 0x0000000000387805 */ /* 0x000fe2000001ff00 */ /*1050*/ CS2R R62, SRZ ; /* 0x00000000003e7805 */ /* 0x000fe2000001ff00 */ /*1060*/ STG.E.64 [R46.64], R22 ; /* 0x000000162e007986 */ /* 0x0001e8000c101b08 */ /*1070*/ STG.E.64 [R48.64], RZ ; /* 0x000000ff30007986 */ /* 0x0001e8000c101b08 */ /*1080*/ STG.E.64 [R54.64], RZ ; /* 0x000000ff36007986 */ /* 0x0001e4000c101b08 */ /*1090*/ MUFU.RCP64H R23, R21 ; /* 0x0000001500177308 */ /* 0x001e220000001800 */ /*10a0*/ IADD3 R22, R21, 0x300402, RZ ; /* 0x0030040215167810 */ /* 0x000fe20007ffe0ff */ /*10b0*/ BSSY B0, 0x11d0 ; /* 0x0000011000007945 */ /* 0x000fe60003800000 */ /*10c0*/ FSETP.GEU.AND P0, PT, |R22|, 5.8789094863358348022e-39, PT ; /* 0x004004021600780b */ /* 0x000fc40003f0e200 */ /*10d0*/ DFMA R64, R22, -R20, 1 ; /* 0x3ff000001640742b */ /* 0x001e0c0000000814 */ /*10e0*/ DFMA R64, R64, R64, R64 ; /* 0x000000404040722b */ /* 0x001e0c0000000040 */ /*10f0*/ DFMA R64, R22, R64, R22 ; /* 0x000000401640722b */ /* 0x0010640000000016 */ /*1100*/ IMAD.MOV.U32 R23, RZ, RZ, 0x8 ; /* 0x00000008ff177424 */ /* 0x001fc800078e00ff */ /*1110*/ DFMA R100, R64, -R20, 1 ; /* 0x3ff000004064742b */ /* 0x002e0c0000000814 */ /*1120*/ DFMA R100, R64, R100, R64 ; /* 0x000000644064722b */ /* 0x0010640000000040 */ /*1130*/ IMAD.WIDE R64, R80, R23, c[0x0][0x178] ; /* 0x00005e0050407625 */ /* 0x001fe200078e0217 */ /*1140*/ @P0 BRA 0x11c0 ; /* 0x0000007000000947 */ /* 0x000fea0003800000 */ /*1150*/ LOP3.LUT R0, R21, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff15007812 */ /* 0x002fe200078ec0ff */ /*1160*/ IMAD.MOV.U32 R22, RZ, RZ, R20 ; /* 0x000000ffff167224 */ /* 0x000fc600078e0014 */ /*1170*/ IADD3 R20, R0, -0x100000, RZ ; /* 0xfff0000000147810 */ /* 0x000fe40007ffe0ff */ /*1180*/ MOV R0, 0x11a0 ; /* 0x000011a000007802 */ /* 0x000fe40000000f00 */ /*1190*/ CALL.REL.NOINC 0x34c0 ; /* 0x0000232000007944 */ /* 0x020fea0003c00000 */ /*11a0*/ MOV R100, R20 ; /* 0x0000001400647202 */ /* 0x000fe20000000f00 */ /*11b0*/ IMAD.MOV.U32 R101, RZ, RZ, R21 ; /* 0x000000ffff657224 */ /* 0x000fe400078e0015 */ /*11c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x002fea0003800000 */ /*11d0*/ LDG.E.64 R22, [R64.64+0x50] ; /* 0x0000500840167981 */ /* 0x0000a8000c1e1b00 */ /*11e0*/ LDG.E.64 R90, [R64.64+0x58] ; /* 0x00005808405a7981 */ /* 0x0000e8000c1e1b00 */ /*11f0*/ LDG.E.64 R94, [R64.64+0x60] ; /* 0x00006008405e7981 */ /* 0x000122000c1e1b00 */ /*1200*/ DMUL R92, R100.reuse, R18 ; /* 0x00000012645c7228 */ /* 0x040e620000000000 */ /*1210*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fe2000fffe03f */ /*1220*/ IADD3 R70, P1, R70, 0x8, RZ ; /* 0x0000000846467810 */ /* 0x000fe20007f3e0ff */ /*1230*/ IMAD.IADD R76, R73, 0x1, R76 ; /* 0x00000001494c7824 */ /* 0x000fe200078e024c */ /*1240*/ DMUL R50, R100, R50 ; /* 0x0000003264327228 */ /* 0x000e220000000000 */ /*1250*/ IADD3 R68, P2, R68, 0x8, RZ ; /* 0x0000000844447810 */ /* 0x000fc40007f5e0ff */ /*1260*/ ISETP.LE.AND P0, PT, R5, UR4, PT ; /* 0x0000000405007c0c */ /* 0x000fe2000bf03270 */ /*1270*/ DMUL R98, R100.reuse, R26 ; /* 0x0000001a64627228 */ /* 0x060e620000000000 */ /*1280*/ IMAD.WIDE R64, R9, R72, c[0x0][0x188] ; /* 0x0000620009407625 */ /* 0x001fe200078e0248 */ /*1290*/ IADD3 R79, R79, 0x1, RZ ; /* 0x000000014f4f7810 */ /* 0x000fe40007ffe0ff */ /*12a0*/ DMUL R96, R100.reuse, R28 ; /* 0x0000001c64607228 */ /* 0x040e220000000000 */ /*12b0*/ IADD3 R80, R80, 0x5, RZ ; /* 0x0000000550507810 */ /* 0x000fe20007ffe0ff */ /*12c0*/ IMAD.X R71, RZ, RZ, R71, P1 ; /* 0x000000ffff477224 */ /* 0x000fe200008e0647 */ /*12d0*/ IADD3 R9, R82, R9, RZ ; /* 0x0000000952097210 */ /* 0x000fe20007ffe0ff */ /*12e0*/ DMUL R100, R100, R30 ; /* 0x0000001e64647228 */ /* 0x000e220000000000 */ /*12f0*/ IMAD.WIDE R102, R81, 0x8, R64 ; /* 0x0000000851667825 */ /* 0x000fc600078e0240 */ /*1300*/ DFMA R20, R92, -R16, R32 ; /* 0x800000105c14722b */ /* 0x002e620000000020 */ /*1310*/ IMAD.X R69, RZ, RZ, R69, P2 ; /* 0x000000ffff457224 */ /* 0x000fc600010e0645 */ /*1320*/ DFMA R18, R50, -R16.reuse, R42 ; /* 0x800000103212722b */ /* 0x080024000000002a */ /*1330*/ IMAD.WIDE R42, R75, R72, c[0x0][0x180] ; /* 0x000060004b2a7625 */ /* 0x001fe200078e0248 */ /*1340*/ IADD3 R75, R73, R75, RZ ; /* 0x0000004b494b7210 */ /* 0x000fe20007ffe0ff */ /*1350*/ DFMA R26, R98, -R16, R14 ; /* 0x80000010621a722b */ /* 0x000e06000000000e */ /*1360*/ STG.E.64 [R42.64], R92 ; /* 0x0000005c2a007986 */ /* 0x0001e2000c101b08 */ /*1370*/ DFMA R28, R96, -R16, R12 ; /* 0x80000010601c722b */ /* 0x000e08000000000c */ /*1380*/ DFMA R30, R100, -R16, R10 ; /* 0x80000010641e722b */ /* 0x000e08000000000a */ /*1390*/ DFMA R16, R92, -R62.reuse, R56 ; /* 0x8000003e5c10722b */ /* 0x0802240000000038 */ /*13a0*/ IMAD.WIDE R56, R74, R72, c[0x0][0x180] ; /* 0x000060004a387625 */ /* 0x002fe400078e0248 */ /*13b0*/ DFMA R32, R50, -R62.reuse, R58 ; /* 0x8000003e3220722b */ /* 0x080224000000003a */ /*13c0*/ IMAD.IADD R74, R73, 0x1, R74 ; /* 0x00000001494a7824 */ /* 0x000fe200078e024a */ /*13d0*/ STG.E.64 [R56.64], R50 ; /* 0x0000003238007986 */ /* 0x0003e2000c101b08 */ /*13e0*/ IMAD.MOV.U32 R42, RZ, RZ, R60 ; /* 0x000000ffff2a7224 */ /* 0x001fe400078e003c */ /*13f0*/ IMAD.MOV.U32 R43, RZ, RZ, R61 ; /* 0x000000ffff2b7224 */ /* 0x000fe200078e003d */ /*1400*/ STG.E.64 [R64.64], R98 ; /* 0x0000006240007986 */ /* 0x0001e8000c101b08 */ /*1410*/ STG.E.64 [R102.64], R96 ; /* 0x0000006066007986 */ /* 0x0001e2000c101b08 */ /*1420*/ IMAD.MOV.U32 R50, RZ, RZ, R86 ; /* 0x000000ffff327224 */ /* 0x002fe200078e0056 */ /*1430*/ MOV R51, R87 ; /* 0x0000005700337202 */ /* 0x000fe20000000f00 */ /*1440*/ DFMA R14, R98, -R62, R22 ; /* 0x8000003e620e722b */ /* 0x0042840000000016 */ /*1450*/ IMAD.WIDE R22, R81, 0x8, R102 ; /* 0x0000000851167825 */ /* 0x002fe400078e0266 */ /*1460*/ DFMA R12, R96, -R62, R90 ; /* 0x8000003e600c722b */ /* 0x008046000000005a */ /*1470*/ STG.E.64 [R22.64], R100 ; /* 0x0000006416007986 */ /* 0x0001e2000c101b08 */ /*1480*/ DFMA R10, R100, -R62, R94 ; /* 0x8000003e640a722b */ /* 0x0100e2000000005e */ /*1490*/ @!P0 BRA 0xa70 ; /* 0xfffff5d000008947 */ /* 0x006fea000383ffff */ /*14a0*/ MUFU.RCP64H R23, R21 ; /* 0x0000001500177308 */ /* 0x001e220000001800 */ /*14b0*/ IADD3 R22, R21, 0x300402, RZ ; /* 0x0030040215167810 */ /* 0x000fe20007ffe0ff */ /*14c0*/ UMOV UR4, 0x2 ; /* 0x0000000200047882 */ /* 0x000fe20000000000 */ /*14d0*/ MOV R9, c[0x0][0x190] ; /* 0x0000640000097a02 */ /* 0x000fe20000000f00 */ /*14e0*/ ULDC UR5, c[0x0][0x198] ; /* 0x0000660000057ab9 */ /* 0x000fe20000000800 */ /*14f0*/ FSETP.GEU.AND P1, PT, |R22|, 5.8789094863358348022e-39, PT ; /* 0x004004021600780b */ /* 0x000fe20003f2e200 */ /*1500*/ UIADD3 UR5, -UR4, UR5, URZ ; /* 0x0000000504057290 */ /* 0x000fe2000fffe13f */ /*1510*/ BSSY B0, 0x1680 ; /* 0x0000016000007945 */ /* 0x000fe20003800000 */ /*1520*/ IMAD R37, R9.reuse, 0x5, RZ ; /* 0x0000000509257824 */ /* 0x040fe200078e02ff */ /*1530*/ ULDC UR6, c[0x0][0x194] ; /* 0x0000650000067ab9 */ /* 0x000fe20000000800 */ /*1540*/ ISETP.GE.AND P0, PT, R9, 0x3, PT ; /* 0x000000030900780c */ /* 0x000fe20003f06270 */ /*1550*/ UIADD3 UR4, -UR4, UR6, URZ ; /* 0x0000000604047290 */ /* 0x000fe2000fffe13f */ /*1560*/ IMAD R0, R37, UR5, R2 ; /* 0x0000000525007c24 */ /* 0x000fe2000f8e0202 */ /*1570*/ DFMA R34, R22, -R20, 1 ; /* 0x3ff000001622742b */ /* 0x021e080000000814 */ /*1580*/ IADD3 R0, R0, UR5, RZ ; /* 0x0000000500007c10 */ /* 0x000fe4000fffe0ff */ /*1590*/ DFMA R34, R34, R34, R34 ; /* 0x000000222222722b */ /* 0x001e060000000022 */ /*15a0*/ IMAD R73, R0, UR4, R3 ; /* 0x0000000400497c24 */ /* 0x000fc8000f8e0203 */ /*15b0*/ IMAD.WIDE R72, R73, R72, c[0x0][0x180] ; /* 0x0000600049487625 */ /* 0x000fe200078e0248 */ /*15c0*/ DFMA R34, R22, R34, R22 ; /* 0x000000221622722b */ /* 0x001e0c0000000016 */ /*15d0*/ DFMA R36, R34, -R20, 1 ; /* 0x3ff000002224742b */ /* 0x001e0c0000000814 */ /*15e0*/ DFMA R34, R34, R36, R34 ; /* 0x000000242222722b */ /* 0x0010620000000022 */ /*15f0*/ @P1 BRA 0x1670 ; /* 0x0000007000001947 */ /* 0x000fea0003800000 */ /*1600*/ LOP3.LUT R0, R21, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff15007812 */ /* 0x000fe200078ec0ff */ /*1610*/ IMAD.MOV.U32 R22, RZ, RZ, R20 ; /* 0x000000ffff167224 */ /* 0x000fc600078e0014 */ /*1620*/ IADD3 R20, R0, -0x100000, RZ ; /* 0xfff0000000147810 */ /* 0x000fe40007ffe0ff */ /*1630*/ MOV R0, 0x1650 ; /* 0x0000165000007802 */ /* 0x000fe40000000f00 */ /*1640*/ CALL.REL.NOINC 0x34c0 ; /* 0x00001e7000007944 */ /* 0x00bfea0003c00000 */ /*1650*/ IMAD.MOV.U32 R34, RZ, RZ, R20 ; /* 0x000000ffff227224 */ /* 0x000fe200078e0014 */ /*1660*/ MOV R35, R21 ; /* 0x0000001500237202 */ /* 0x000fe40000000f00 */ /*1670*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1680*/ DMUL R18, R34.reuse, R18 ; /* 0x0000001222127228 */ /* 0x042e620000000000 */ /*1690*/ BSSY B0, 0x1840 ; /* 0x000001a000007945 */ /* 0x000fe60003800000 */ /*16a0*/ DMUL R26, R34, R26 ; /* 0x0000001a221a7228 */ /* 0x000fc80000000000 */ /*16b0*/ DFMA R36, R18, -R16, R32 ; /* 0x800000101224722b */ /* 0x003e080000000020 */ /*16c0*/ DMUL R28, R34.reuse, R28 ; /* 0x0000001c221c7228 */ /* 0x040e640000000000 */ /*16d0*/ MUFU.RCP64H R21, R37 ; /* 0x0000002500157308 */ /* 0x001e240000001800 */ /*16e0*/ DMUL R30, R34, R30 ; /* 0x0000001e221e7228 */ /* 0x000ea40000000000 */ /*16f0*/ IADD3 R20, R37, 0x300402, RZ ; /* 0x0030040225147810 */ /* 0x000fe40007ffe0ff */ /*1700*/ DFMA R14, R26, -R16, R14 ; /* 0x800000101a0e722b */ /* 0x000fe4000000000e */ /*1710*/ FSETP.GEU.AND P1, PT, |R20|, 5.8789094863358348022e-39, PT ; /* 0x004004021400780b */ /* 0x000fc40003f2e200 */ /*1720*/ DFMA R12, R28, -R16, R12 ; /* 0x800000101c0c722b */ /* 0x002fc8000000000c */ /*1730*/ DFMA R10, R30, -R16, R10 ; /* 0x800000101e0a722b */ /* 0x00c3e4000000000a */ /*1740*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0x190] ; /* 0x00006400ff117624 */ /* 0x002fe400078e00ff */ /*1750*/ DFMA R22, -R36, R20, 1 ; /* 0x3ff000002416742b */ /* 0x001e240000000114 */ /*1760*/ IMAD R17, R17, 0x7, RZ ; /* 0x0000000711117824 */ /* 0x000fe400078e02ff */ /*1770*/ DMUL R86, R34, R86 ; /* 0x0000005622567228 */ /* 0x000fc80000000000 */ /*1780*/ DFMA R22, R22, R22, R22 ; /* 0x000000161616722b */ /* 0x001e0c0000000016 */ /*1790*/ DFMA R22, R20, R22, R20 ; /* 0x000000161416722b */ /* 0x001e0c0000000014 */ /*17a0*/ DFMA R32, -R36, R22, 1 ; /* 0x3ff000002420742b */ /* 0x001e0c0000000116 */ /*17b0*/ DFMA R20, R22, R32, R22 ; /* 0x000000201614722b */ /* 0x0010620000000016 */ /*17c0*/ @P1 BRA 0x1830 ; /* 0x0000006000001947 */ /* 0x000fea0003800000 */ /*17d0*/ LOP3.LUT R20, R37, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff25147812 */ /* 0x002fe200078ec0ff */ /*17e0*/ IMAD.MOV.U32 R22, RZ, RZ, R36 ; /* 0x000000ffff167224 */ /* 0x001fe200078e0024 */ /*17f0*/ MOV R21, R37 ; /* 0x0000002500157202 */ /* 0x000fe40000000f00 */ /*1800*/ IADD3 R20, R20, -0x100000, RZ ; /* 0xfff0000014147810 */ /* 0x000fe40007ffe0ff */ /*1810*/ MOV R0, 0x1830 ; /* 0x0000183000007802 */ /* 0x000fe40000000f00 */ /*1820*/ CALL.REL.NOINC 0x34c0 ; /* 0x00001c9000007944 */ /* 0x000fea0003c00000 */ /*1830*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1840*/ IADD3 R9, R5.reuse, c[0x0][0x190], RZ ; /* 0x0000640005097a10 */ /* 0x040fe20007ffe0ff */ /*1850*/ IMAD R0, R5, UR5, R2 ; /* 0x0000000505007c24 */ /* 0x000fe2000f8e0202 */ /*1860*/ LEA R76, P1, R7, c[0x0][0x170], 0x3 ; /* 0x00005c00074c7a11 */ /* 0x000fe200078218ff */ /*1870*/ IMAD.MOV.U32 R16, RZ, RZ, c[0x0][0x190] ; /* 0x00006400ff107624 */ /* 0x000fc400078e00ff */ /*1880*/ IMAD.MOV.U32 R79, RZ, RZ, 0x8 ; /* 0x00000008ff4f7424 */ /* 0x000fe200078e00ff */ /*1890*/ LEA.HI.X R77, R7, c[0x0][0x174], R8, 0x3, P1 ; /* 0x00005d00074d7a11 */ /* 0x000fe200008f1c08 */ /*18a0*/ IMAD R22, R9, UR5, R2 ; /* 0x0000000509167c24 */ /* 0x001fe4000f8e0202 */ /*18b0*/ IMAD R0, R0, UR4, R3 ; /* 0x0000000400007c24 */ /* 0x000fe4000f8e0203 */ /*18c0*/ IMAD R9, R16, 0x6, RZ ; /* 0x0000000610097824 */ /* 0x000fe400078e02ff */ /*18d0*/ IMAD.WIDE R32, R0, R79, c[0x0][0x180] ; /* 0x0000600000207625 */ /* 0x000fc800078e024f */ /*18e0*/ IMAD R34, R17, UR5, R2.reuse ; /* 0x0000000511227c24 */ /* 0x100fe2000f8e0202 */ /*18f0*/ STG.E.64 [R32.64], R18 ; /* 0x0000001220007986 */ /* 0x0001e2000c101b08 */ /*1900*/ IMAD R0, R9, UR5, R2 ; /* 0x0000000509007c24 */ /* 0x000fe4000f8e0202 */ /*1910*/ IMAD R22, R22, UR4, R3.reuse ; /* 0x0000000416167c24 */ /* 0x100fe4000f8e0203 */ /*1920*/ IMAD R34, R34, UR4, R3.reuse ; /* 0x0000000422227c24 */ /* 0x100fe4000f8e0203 */ /*1930*/ IMAD R0, R0, UR4, R3 ; /* 0x0000000400007c24 */ /* 0x000fe4000f8e0203 */ /*1940*/ IMAD.WIDE R22, R22, R79, c[0x0][0x180] ; /* 0x0000600016167625 */ /* 0x000fc800078e024f */ /*1950*/ IMAD.WIDE R36, R34, R79.reuse, c[0x0][0x180] ; /* 0x0000600022247625 */ /* 0x080fe200078e024f */ /*1960*/ STG.E.64 [R22.64], R86 ; /* 0x0000005616007986 */ /* 0x0001e6000c101b08 */ /*1970*/ IMAD.WIDE R34, R0, R79, c[0x0][0x180] ; /* 0x0000600000227625 */ /* 0x000fe200078e024f */ /*1980*/ LDG.E.64 R56, [R76.64] ; /* 0x000000084c387981 */ /* 0x000ea6000c1e1b00 */ /*1990*/ IMAD.WIDE R8, R4, 0x8, R72 ; /* 0x0000000804087825 */ /* 0x000fe200078e0248 */ /*19a0*/ LDG.E.64 R36, [R36.64] ; /* 0x0000000824247981 */ /* 0x000ee8000c1e1b00 */ /*19b0*/ LDG.E.64 R72, [R72.64] ; /* 0x0000000848487981 */ /* 0x000ea8000c1e1b00 */ /*19c0*/ LDG.E.64 R34, [R34.64] ; /* 0x0000000822227981 */ /* 0x000f28000c1e1b00 */ /*19d0*/ LDG.E.64 R38, [R8.64] ; /* 0x0000000808267981 */ /* 0x000f28000c1e1b00 */ /*19e0*/ LDG.E.64 R40, [R24.64+0x18] ; /* 0x0000180818287981 */ /* 0x000168000c1e1b00 */ /*19f0*/ LDG.E.64 R42, [R24.64+0x20] ; /* 0x00002008182a7981 */ /* 0x000168000c1e1b00 */ /*1a00*/ LDG.E.64 R44, [R24.64+0x40] ; /* 0x00004008182c7981 */ /* 0x000168000c1e1b00 */ /*1a10*/ LDG.E.64 R46, [R24.64+0x48] ; /* 0x00004808182e7981 */ /* 0x000162000c1e1b00 */ /*1a20*/ DMUL R48, R14, R20 ; /* 0x000000140e307228 */ /* 0x0020480000000000 */ /*1a30*/ DMUL R50, R12, R20 ; /* 0x000000140c327228 */ /* 0x0000080000000000 */ /*1a40*/ DMUL R52, R10, R20 ; /* 0x000000140a347228 */ /* 0x0000220000000000 */ /*1a50*/ IMAD.MOV.U32 R60, RZ, RZ, R36 ; /* 0x000000ffff3c7224 */ /* 0x008fe200078e0024 */ /*1a60*/ MOV R61, R37 ; /* 0x00000025003d7202 */ /* 0x000fe40000000f00 */ /*1a70*/ DFMA R54, -R56, c[0x3][0x80], R72 ; /* 0x00c0200038367a2b */ /* 0x0044c80000000148 */ /*1a80*/ DFMA R56, R56, c[0x3][0x80], R72 ; /* 0x00c0200038387a2b */ /* 0x0004220000000048 */ /*1a90*/ MOV R58, R34 ; /* 0x00000022003a7202 */ /* 0x010fe20000000f00 */ /*1aa0*/ IMAD.MOV.U32 R59, RZ, RZ, R35 ; /* 0x000000ffff3b7224 */ /* 0x000fe400078e0023 */ /*1ab0*/ IMAD.MOV.U32 R62, RZ, RZ, R38 ; /* 0x000000ffff3e7224 */ /* 0x000fe400078e0026 */ /*1ac0*/ IMAD.MOV.U32 R63, RZ, RZ, R39 ; /* 0x000000ffff3f7224 */ /* 0x000fe200078e0027 */ /*1ad0*/ @!P0 BRA 0x2650 ; /* 0x00000b7000008947 */ /* 0x000fea0003800000 */ /*1ae0*/ MOV R0, 0x2 ; /* 0x0000000200007802 */ /* 0x00ffe20000000f00 */ /*1af0*/ IMAD.WIDE R74, R4, 0x8, R8 ; /* 0x00000008044a7825 */ /* 0x000fe200078e0208 */ /*1b00*/ LDG.E.64 R64, [R76.64+0x10] ; /* 0x000010084c407981 */ /* 0x000ea4000c1e1b00 */ /*1b10*/ IADD3 R20, -R0, c[0x0][0x198], RZ ; /* 0x0000660000147a10 */ /* 0x000fe20007ffe1ff */ /*1b20*/ IMAD.SHL.U32 R9, R16, 0x8, RZ ; /* 0x0000000810097824 */ /* 0x000fe200078e00ff */ /*1b30*/ IADD3 R23, -R0, c[0x0][0x194], RZ ; /* 0x0000650000177a10 */ /* 0x000fe20007ffe1ff */ /*1b40*/ LDG.E.64 R74, [R74.64] ; /* 0x000000084a4a7981 */ /* 0x000ea4000c1e1b00 */ /*1b50*/ IMAD R0, R20, R9, R2 ; /* 0x0000000914007224 */ /* 0x000fc400078e0202 */ /*1b60*/ LDG.E.64 R66, [R66.64] ; /* 0x0000000842427981 */ /* 0x000f64000c1e1b00 */ /*1b70*/ IMAD R0, R23, R0, R3 ; /* 0x0000000017007224 */ /* 0x000fe400078e0203 */ /*1b80*/ LDG.E.64 R68, [R76.64+0x8] ; /* 0x000008084c447981 */ /* 0x000164000c1e1b00 */ /*1b90*/ IMAD.WIDE R70, R0, R79, c[0x0][0x180] ; /* 0x0000600000467625 */ /* 0x000fcc00078e024f */ /*1ba0*/ LDG.E.64 R70, [R70.64] ; /* 0x0000000846467981 */ /* 0x000f68000c1e1b00 */ /*1bb0*/ S2R R19, SR_TID.X ; /* 0x0000000000137919 */ /* 0x000e680000002100 */ /*1bc0*/ S2R R21, SR_CTAID.X ; /* 0x0000000000157919 */ /* 0x000ee20000002500 */ /*1bd0*/ MOV R15, 0x5 ; /* 0x00000005000f7802 */ /* 0x000fe20000000f00 */ /*1be0*/ IMAD.IADD R0, R3, 0x1, R6 ; /* 0x0000000103007824 */ /* 0x000fe200078e0206 */ /*1bf0*/ MOV R10, c[0x0][0x198] ; /* 0x00006600000a7a02 */ /* 0x000fe20000000f00 */ /*1c00*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3 ; /* 0x00000003ff0b7424 */ /* 0x000fc400078e00ff */ /*1c10*/ IMAD R15, R0, R15, 0x5 ; /* 0x00000005000f7424 */ /* 0x000fe400078e020f */ /*1c20*/ IMAD R0, R10.reuse, c[0x0][0x190], RZ ; /* 0x000064000a007a24 */ /* 0x040fe400078e02ff */ /*1c30*/ IMAD R11, R10, R11, -0x6 ; /* 0xfffffffa0a0b7424 */ /* 0x000fe400078e020b */ /*1c40*/ IMAD R10, R20, c[0x0][0x190], RZ ; /* 0x00006400140a7a24 */ /* 0x000fe200078e02ff */ /*1c50*/ IADD3 R8, R7, 0x3, RZ ; /* 0x0000000307087810 */ /* 0x000fe40007ffe0ff */ /*1c60*/ LEA R7, R16, 0x2, 0x2 ; /* 0x0000000210077811 */ /* 0x000fe200078e10ff */ /*1c70*/ IMAD R12, R0.reuse, 0x3, R19.reuse ; /* 0x00000003000c7824 */ /* 0x142fe200078e0213 */ /*1c80*/ LEA R14, R0, R19.reuse, 0x2 ; /* 0x00000013000e7211 */ /* 0x080fe200078e10ff */ /*1c90*/ IMAD R0, R10.reuse, 0x2, R19 ; /* 0x000000020a007824 */ /* 0x040fe200078e0213 */ /*1ca0*/ LEA R13, R10, R19, 0x3 ; /* 0x000000130a0d7211 */ /* 0x000fe200078e18ff */ /*1cb0*/ IMAD R17, R21, c[0x0][0x0], R12 ; /* 0x0000000015117a24 */ /* 0x008fc400078e020c */ /*1cc0*/ IMAD R18, R21.reuse, c[0x0][0x0], R14 ; /* 0x0000000015127a24 */ /* 0x040fe400078e020e */ /*1cd0*/ IMAD R0, R21, c[0x0][0x0], R0 ; /* 0x0000000015007a24 */ /* 0x000fe400078e0200 */ /*1ce0*/ IMAD R19, R10, 0x7, R19 ; /* 0x000000070a137824 */ /* 0x000fe400078e0213 */ /*1cf0*/ IMAD R10, R20, R7, R2.reuse ; /* 0x00000007140a7224 */ /* 0x100fe400078e0202 */ /*1d00*/ IMAD R7, R23.reuse, R20, RZ ; /* 0x0000001417077224 */ /* 0x040fe200078e02ff */ /*1d10*/ IADD3 R20, R18, 0x1, RZ ; /* 0x0000000112147810 */ /* 0x000fe20007ffe0ff */ /*1d20*/ IMAD R12, R23, R0, RZ ; /* 0x00000000170c7224 */ /* 0x000fe200078e02ff */ /*1d30*/ IADD3 R0, R17, 0x1, RZ ; /* 0x0000000111007810 */ /* 0x000fe20007ffe0ff */ /*1d40*/ IMAD R11, R11, c[0x0][0x190], R2 ; /* 0x000064000b0b7a24 */ /* 0x000fc400078e0202 */ /*1d50*/ IMAD R20, R20, c[0x0][0x194], R3.reuse ; /* 0x0000650014147a24 */ /* 0x100fe400078e0203 */ /*1d60*/ IMAD R0, R0, c[0x0][0x194], R3 ; /* 0x0000650000007a24 */ /* 0x000fe400078e0203 */ /*1d70*/ IMAD R13, R21.reuse, c[0x0][0x0], R13 ; /* 0x00000000150d7a24 */ /* 0x040fe400078e020d */ /*1d80*/ IMAD R14, R21, c[0x0][0x0], R19 ; /* 0x00000000150e7a24 */ /* 0x000fe200078e0213 */ /*1d90*/ MOV R62, R38 ; /* 0x00000026003e7202 */ /* 0x000fe20000000f00 */ /*1da0*/ IMAD R15, R15, R16, 0xd ; /* 0x0000000d0f0f7424 */ /* 0x000fe200078e0210 */ /*1db0*/ IADD3 R16, R16, -0x1, RZ ; /* 0xffffffff10107810 */ /* 0x000fe20007ffe0ff */ /*1dc0*/ IMAD.WIDE R8, R8, R79, c[0x0][0x170] ; /* 0x00005c0008087625 */ /* 0x000fe200078e024f */ /*1dd0*/ MOV R60, R36 ; /* 0x00000024003c7202 */ /* 0x000fc40000000f00 */ /*1de0*/ MOV R58, R34 ; /* 0x00000022003a7202 */ /* 0x000fe20000000f00 */ /*1df0*/ IMAD R10, R23.reuse, R10, R3.reuse ; /* 0x0000000a170a7224 */ /* 0x140fe200078e0203 */ /*1e00*/ IADD3 R17, R0, 0x1, RZ ; /* 0x0000000100117810 */ /* 0x000fe20007ffe0ff */ /*1e10*/ IMAD R11, R23.reuse, R11, RZ ; /* 0x0000000b170b7224 */ /* 0x040fe200078e02ff */ /*1e20*/ IADD3 R19, R20, 0x1, RZ ; /* 0x0000000114137810 */ /* 0x000fe20007ffe0ff */ /*1e30*/ IMAD R13, R23.reuse, R13, RZ ; /* 0x0000000d170d7224 */ /* 0x040fe400078e02ff */ /*1e40*/ IMAD R14, R23, R14, RZ ; /* 0x0000000e170e7224 */ /* 0x000fe400078e02ff */ /*1e50*/ IMAD.MOV.U32 R18, RZ, RZ, R3 ; /* 0x000000ffff127224 */ /* 0x000fe400078e0003 */ /*1e60*/ IMAD.MOV.U32 R63, RZ, RZ, R39 ; /* 0x000000ffff3f7224 */ /* 0x000fc400078e0027 */ /*1e70*/ IMAD.MOV.U32 R61, RZ, RZ, R37 ; /* 0x000000ffff3d7224 */ /* 0x000fe400078e0025 */ /*1e80*/ IMAD.MOV.U32 R59, RZ, RZ, R35 ; /* 0x000000ffff3b7224 */ /* 0x000fe200078e0023 */ /*1e90*/ UMOV UR4, 0x2 ; /* 0x0000000200047882 */ /* 0x000fe20000000000 */ /*1ea0*/ DFMA R72, R64, c[0x3][0x80], R74 ; /* 0x00c0200040487a2b */ /* 0x004048000000004a */ /*1eb0*/ DFMA R74, -R64, c[0x3][0x80], R74 ; /* 0x00c02000404a7a2b */ /* 0x002088000000014a */ /*1ec0*/ MOV R92, 0x8 ; /* 0x00000008005c7802 */ /* 0x000fe40000000f00 */ /*1ed0*/ ISETP.LE.AND P0, PT, R16, UR4, PT ; /* 0x0000000410007c0c */ /* 0x000fc6000bf03270 */ /*1ee0*/ IMAD.WIDE R82, R10, R92, c[0x0][0x180] ; /* 0x000060000a527625 */ /* 0x003fcc00078e025c */ /*1ef0*/ IMAD.WIDE R76, R4.reuse, 0x8, R82 ; /* 0x00000008044c7825 */ /* 0x041fe200078e0252 */ /*1f00*/ MOV R81, R67 ; /* 0x0000004300517202 */ /* 0x020fe20000000f00 */ /*1f10*/ LDG.E.64 R82, [R82.64] ; /* 0x0000000852527981 */ /* 0x000f68000c1e1b00 */ /*1f20*/ IMAD.WIDE R88, R4.reuse, 0x8, R76 ; /* 0x0000000804587825 */ /* 0x040fe200078e024c */ /*1f30*/ @!P0 LDG.E.64 R20, [R8.64] ; /* 0x0000000808148981 */ /* 0x000ee8000c1e1b00 */ /*1f40*/ LDG.E.64 R76, [R76.64] ; /* 0x000000084c4c7981 */ /* 0x000f22000c1e1b00 */ /*1f50*/ IMAD.WIDE R22, R4, 0x8, R88 ; /* 0x0000000804167825 */ /* 0x000fc600078e0258 */ /*1f60*/ LDG.E.64 R88, [R88.64] ; /* 0x0000000858587981 */ /* 0x000f68000c1e1b00 */ /*1f70*/ LDG.E.64 R78, [R22.64] ; /* 0x00000008164e7981 */ /* 0x0040a2000c1e1b00 */ /*1f80*/ IMAD.MOV.U32 R80, RZ, RZ, R66 ; /* 0x000000ffff507224 */ /* 0x000fe400078e0042 */ /*1f90*/ IMAD.WIDE R66, R4, 0x8, R22 ; /* 0x0000000804427825 */ /* 0x000fcc00078e0216 */ /*1fa0*/ LDG.E.64 R66, [R66.64] ; /* 0x0000000842427981 */ /* 0x000f62000c1e1b00 */ /*1fb0*/ MUFU.RCP64H R23, R59 ; /* 0x0000003b00177308 */ /* 0x001e220000001800 */ /*1fc0*/ IADD3 R22, R59, 0x300402, RZ ; /* 0x003004023b167810 */ /* 0x000fe20007ffe0ff */ /*1fd0*/ IMAD.WIDE R92, R15, R92, c[0x0][0x178] ; /* 0x00005e000f5c7625 */ /* 0x000fc600078e025c */ /*1fe0*/ FSETP.GEU.AND P1, PT, |R22|, 5.8789094863358348022e-39, PT ; /* 0x004004021600780b */ /* 0x000fe40003f2e200 */ /*1ff0*/ LDG.E.64 R84, [R92.64] ; /* 0x000000085c547981 */ /* 0x000568000c1e1b00 */ /*2000*/ LDG.E.64 R86, [R92.64+0x8] ; /* 0x000008085c567981 */ /* 0x000562000c1e1b00 */ /*2010*/ DFMA R90, R22, -R58, 1 ; /* 0x3ff00000165a742b */ /* 0x001e0c000000083a */ /*2020*/ DFMA R90, R90, R90, R90 ; /* 0x0000005a5a5a722b */ /* 0x001e0c000000005a */ /*2030*/ DFMA R94, R22, R90, R22 ; /* 0x0000005a165e722b */ /* 0x001e220000000016 */ /*2040*/ BSSY B0, 0x21d0 ; /* 0x0000018000007945 */ /* 0x000fea0003800000 */ /*2050*/ DFMA R96, R94, -R58, 1 ; /* 0x3ff000005e60742b */ /* 0x001e0c000000083a */ /*2060*/ DFMA R98, R94, R96, R94 ; /* 0x000000605e62722b */ /* 0x001e22000000005e */ /*2070*/ IMAD.MOV.U32 R90, RZ, RZ, R76 ; /* 0x000000ffff5a7224 */ /* 0x010fe200078e004c */ /*2080*/ MOV R91, R77 ; /* 0x0000004d005b7202 */ /* 0x000fe20000000f00 */ /*2090*/ IMAD.MOV.U32 R92, RZ, RZ, R78 ; /* 0x000000ffff5c7224 */ /* 0x004fe200078e004e */ /*20a0*/ MOV R93, R79 ; /* 0x0000004f005d7202 */ /* 0x000fc80000000f00 */ /*20b0*/ @!P0 DFMA R76, -R68, c[0x3][0x80], R90 ; /* 0x00c02000444c8a2b */ /* 0x000e48000000015a */ /*20c0*/ @!P0 DFMA R90, R68, c[0x3][0x80], R90 ; /* 0x00c02000445a8a2b */ /* 0x000524000000005a */ /*20d0*/ @!P0 IMAD.MOV.U32 R68, RZ, RZ, R64 ; /* 0x000000ffff448224 */ /* 0x004fe400078e0040 */ /*20e0*/ @!P0 DFMA R78, R20.reuse, c[0x3][0x80], R92.reuse ; /* 0x00c02000144e8a2b */ /* 0x1484e2000000005c */ /*20f0*/ @!P0 MOV R69, R65 ; /* 0x0000004100458202 */ /* 0x000fe20000000f00 */ /*2100*/ @!P0 IMAD.MOV.U32 R64, RZ, RZ, R20 ; /* 0x000000ffff408224 */ /* 0x000fe400078e0014 */ /*2110*/ @!P0 DFMA R92, -R20, c[0x3][0x80], R92 ; /* 0x00c02000145c8a2b */ /* 0x000422000000015c */ /*2120*/ @!P0 MOV R65, R21 ; /* 0x0000001500418202 */ /* 0x000fe20000000f00 */ /*2130*/ @P1 BRA 0x21c0 ; /* 0x0000008000001947 */ /* 0x000fea0003800000 */ /*2140*/ LOP3.LUT R20, R59, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff3b147812 */ /* 0x01ffe200078ec0ff */ /*2150*/ IMAD.MOV.U32 R22, RZ, RZ, R58 ; /* 0x000000ffff167224 */ /* 0x000fe200078e003a */ /*2160*/ MOV R21, R59 ; /* 0x0000003b00157202 */ /* 0x000fc40000000f00 */ /*2170*/ IADD3 R20, R20, -0x100000, RZ ; /* 0xfff0000014147810 */ /* 0x000fe40007ffe0ff */ /*2180*/ MOV R0, 0x21a0 ; /* 0x000021a000007802 */ /* 0x000fe40000000f00 */ /*2190*/ CALL.REL.NOINC 0x34c0 ; /* 0x0000132000007944 */ /* 0x020fea0003c00000 */ /*21a0*/ IMAD.MOV.U32 R98, RZ, RZ, R20 ; /* 0x000000ffff627224 */ /* 0x000fe200078e0014 */ /*21b0*/ MOV R99, R21 ; /* 0x0000001500637202 */ /* 0x000fe40000000f00 */ /*21c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x01ffea0003800000 */ /*21d0*/ MUFU.RCP64H R21, R35 ; /* 0x0000002300157308 */ /* 0x000e220000001800 */ /*21e0*/ IADD3 R20, R35, 0x300402, RZ ; /* 0x0030040223147810 */ /* 0x000fe20007ffe0ff */ /*21f0*/ DMUL R94, R98.reuse, R60 ; /* 0x0000003c625e7228 */ /* 0x040e620000000000 */ /*2200*/ BSSY B0, 0x2390 ; /* 0x0000018000007945 */ /* 0x000fe40003800000 */ /*2210*/ FSETP.GEU.AND P0, PT, |R20|, 5.8789094863358348022e-39, PT ; /* 0x004004021400780b */ /* 0x000fe20003f0e200 */ /*2220*/ DMUL R96, R98, R40 ; /* 0x0000002862607228 */ /* 0x000fc80000000000 */ /*2230*/ DFMA R58, R94, -R54, R62 ; /* 0x800000365e3a722b */ /* 0x002fc8000000003e */ /*2240*/ DMUL R98, R98, R70 ; /* 0x0000004662627228 */ /* 0x000e480000000000 */ /*2250*/ DFMA R22, R20, -R34, 1 ; /* 0x3ff000001416742b */ /* 0x001e080000000822 */ /*2260*/ DFMA R60, R98, -R54, R72 ; /* 0x80000036623c722b */ /* 0x002fc80000000048 */ /*2270*/ DFMA R22, R22, R22, R22 ; /* 0x000000161616722b */ /* 0x001e080000000016 */ /*2280*/ DFMA R40, R96, -R54, R44 ; /* 0x800000366028722b */ /* 0x000fc8000000002c */ /*2290*/ DFMA R22, R20, R22, R20 ; /* 0x000000161416722b */ /* 0x001e080000000014 */ /*22a0*/ DFMA R54, -R82, R94, R76 ; /* 0x0000005e5236722b */ /* 0x020fc8000000014c */ /*22b0*/ DFMA R62, R22, -R34, 1 ; /* 0x3ff00000163e742b */ /* 0x001e080000000822 */ /*22c0*/ DFMA R44, -R82, R96, R84 ; /* 0x00000060522c722b */ /* 0x0002880000000154 */ /*22d0*/ DFMA R22, R22, R62, R22 ; /* 0x0000003e1616722b */ /* 0x0012080000000016 */ /*22e0*/ DFMA R62, -R82, R98, R88 ; /* 0x00000062523e722b */ /* 0x0002e20000000158 */ /*22f0*/ @P0 BRA 0x2380 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*2300*/ LOP3.LUT R20, R35, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff23147812 */ /* 0x005fe200078ec0ff */ /*2310*/ IMAD.MOV.U32 R22, RZ, RZ, R34 ; /* 0x000000ffff167224 */ /* 0x000fe200078e0022 */ /*2320*/ MOV R21, R35 ; /* 0x0000002300157202 */ /* 0x000fe40000000f00 */ /*2330*/ IADD3 R20, R20, -0x100000, RZ ; /* 0xfff0000014147810 */ /* 0x000fe40007ffe0ff */ /*2340*/ MOV R0, 0x2360 ; /* 0x0000236000007802 */ /* 0x000fe40000000f00 */ /*2350*/ CALL.REL.NOINC 0x34c0 ; /* 0x0000116000007944 */ /* 0x00afea0003c00000 */ /*2360*/ IMAD.MOV.U32 R22, RZ, RZ, R20 ; /* 0x000000ffff167224 */ /* 0x000fe200078e0014 */ /*2370*/ MOV R23, R21 ; /* 0x0000001500177202 */ /* 0x000fe40000000f00 */ /*2380*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x005fea0003800000 */ /*2390*/ DMUL R72, R22.reuse, R36 ; /* 0x0000002416487228 */ /* 0x040e220000000000 */ /*23a0*/ MOV R101, 0x8 ; /* 0x0000000800657802 */ /* 0x000fe20000000f00 */ /*23b0*/ IMAD.IADD R0, R14, 0x1, R18.reuse ; /* 0x000000010e007824 */ /* 0x100fe200078e0212 */ /*23c0*/ IADD3 R76, R13, R18, RZ ; /* 0x000000120d4c7210 */ /* 0x000fe20007ffe0ff */ /*23d0*/ DMUL R20, R22.reuse, R70 ; /* 0x0000004616147228 */ /* 0x0405220000000000 */ /*23e0*/ IMAD.IADD R84, R11, 0x1, R18.reuse ; /* 0x000000010b547824 */ /* 0x102fe200078e0212 */ /*23f0*/ UIADD3 UR5, UR4, -0x1, URZ ; /* 0xffffffff04057890 */ /* 0x000fe2000fffe03f */ /*2400*/ IMAD.IADD R70, R12, 0x1, R18 ; /* 0x000000010c467824 */ /* 0x004fe200078e0212 */ /*2410*/ DMUL R22, R22, R42 ; /* 0x0000002a16167228 */ /* 0x000e620000000000 */ /*2420*/ IMAD.WIDE R76, R76, R101.reuse, c[0x0][0x180] ; /* 0x000060004c4c7625 */ /* 0x080fe200078e0265 */ /*2430*/ IADD3 R8, P1, R8, 0x8, RZ ; /* 0x0000000808087810 */ /* 0x000fe20007f3e0ff */ /*2440*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fe2000fffe03f */ /*2450*/ DFMA R34, R72, -R56, R38 ; /* 0x800000384822722b */ /* 0x0010a20000000026 */ /*2460*/ IMAD.WIDE R70, R70, R101, c[0x0][0x180] ; /* 0x0000600046467625 */ /* 0x000fe200078e0265 */ /*2470*/ ISETP.LE.AND P0, PT, R5, UR5, PT ; /* 0x0000000505007c0c */ /* 0x000fc4000bf03270 */ /*2480*/ DFMA R36, R20, -R56.reuse, R74 ; /* 0x800000381424722b */ /* 0x0908e2000000004a */ /*2490*/ IMAD.WIDE R38, R0, R101.reuse, c[0x0][0x180] ; /* 0x0000600000267625 */ /* 0x081fe200078e0265 */ /*24a0*/ MOV R0, c[0x0][0x198] ; /* 0x0000660000007a02 */ /* 0x000fe40000000f00 */ /*24b0*/ DFMA R42, R22, -R56, R46 ; /* 0x80000038162a722b */ /* 0x002e22000000002e */ /*24c0*/ IMAD.WIDE R74, R17, R101.reuse, c[0x0][0x188] ; /* 0x00006200114a7625 */ /* 0x090fe200078e0265 */ /*24d0*/ STG.E.64 [R38.64], R94 ; /* 0x0000005e26007986 */ /* 0x0003e2000c101b08 */ /*24e0*/ IADD3 R15, R15, 0x5, RZ ; /* 0x000000050f0f7810 */ /* 0x000fe20007ffe0ff */ /*24f0*/ DFMA R56, -R82.reuse, R72, R90 ; /* 0x000000485238722b */ /* 0x040822000000015a */ /*2500*/ IMAD.WIDE R84, R84, R101, c[0x0][0x180] ; /* 0x0000600054547625 */ /* 0x000fe200078e0265 */ /*2510*/ STG.E.64 [R70.64], R72 ; /* 0x0000004846007986 */ /* 0x000be2000c101b08 */ /*2520*/ IADD3.X R9, RZ, R9, RZ, P1, !PT ; /* 0x00000009ff097210 */ /* 0x000fe20000ffe4ff */ /*2530*/ DFMA R46, -R82.reuse, R22, R86 ; /* 0x00000016522e722b */ /* 0x0400220000000156 */ /*2540*/ IMAD.WIDE R90, R19, R101, c[0x0][0x188] ; /* 0x00006200135a7625 */ /* 0x010fe200078e0265 */ /*2550*/ STG.E.64 [R74.64], R96 ; /* 0x000000604a007986 */ /* 0x0009e6000c101b08 */ /*2560*/ IMAD R17, R0.reuse, c[0x0][0x194], R17 ; /* 0x0000650000117a24 */ /* 0x040fe200078e0211 */ /*2570*/ STG.E.64 [R76.64], R98 ; /* 0x000000624c007986 */ /* 0x0001e2000c101b08 */ /*2580*/ IMAD R19, R0, c[0x0][0x194], R19 ; /* 0x0000650000137a24 */ /* 0x000fe200078e0213 */ /*2590*/ DFMA R38, -R82, R20, R88 ; /* 0x000000145226722b */ /* 0x0022220000000158 */ /*25a0*/ IMAD.IADD R10, R7.reuse, 0x1, R10 ; /* 0x00000001070a7824 */ /* 0x040fe200078e020a */ /*25b0*/ STG.E.64 [R84.64], R20 ; /* 0x0000001454007986 */ /* 0x0003e2000c101b08 */ /*25c0*/ IMAD.IADD R18, R7, 0x1, R18 ; /* 0x0000000107127824 */ /* 0x000fe200078e0212 */ /*25d0*/ MOV R72, R78 ; /* 0x0000004e00487202 */ /* 0x020fe20000000f00 */ /*25e0*/ IMAD.MOV.U32 R73, RZ, RZ, R79 ; /* 0x000000ffff497224 */ /* 0x000fe200078e004f */ /*25f0*/ STG.E.64 [R90.64], R22 ; /* 0x000000165a007986 */ /* 0x0003e2000c101b08 */ /*2600*/ MOV R70, R80 ; /* 0x0000005000467202 */ /* 0x000fe20000000f00 */ /*2610*/ IMAD.MOV.U32 R71, RZ, RZ, R81 ; /* 0x000000ffff477224 */ /* 0x000fe200078e0051 */ /*2620*/ MOV R74, R92 ; /* 0x0000005c004a7202 */ /* 0x010fe20000000f00 */ /*2630*/ IMAD.MOV.U32 R75, RZ, RZ, R93 ; /* 0x000000ffff4b7224 */ /* 0x000fe200078e005d */ /*2640*/ @!P0 BRA 0x1ec0 ; /* 0xfffff87000008947 */ /* 0x00cfea000383ffff */ /*2650*/ MUFU.RCP64H R9, R59 ; /* 0x0000003b00097308 */ /* 0x00fe220000001800 */ /*2660*/ IADD3 R8, R59, 0x300402, RZ ; /* 0x003004023b087810 */ /* 0x000fe20007ffe0ff */ /*2670*/ BSSY B0, 0x2760 ; /* 0x000000e000007945 */ /* 0x000fe60003800000 */ /*2680*/ FSETP.GEU.AND P0, PT, |R8|, 5.8789094863358348022e-39, PT ; /* 0x004004020800780b */ /* 0x000fc40003f0e200 */ /*2690*/ DFMA R10, R8, -R58, 1 ; /* 0x3ff00000080a742b */ /* 0x001e0c000000083a */ /*26a0*/ DFMA R10, R10, R10, R10 ; /* 0x0000000a0a0a722b */ /* 0x001e0c000000000a */ /*26b0*/ DFMA R10, R8, R10, R8 ; /* 0x0000000a080a722b */ /* 0x001e0c0000000008 */ /*26c0*/ DFMA R12, R10, -R58, 1 ; /* 0x3ff000000a0c742b */ /* 0x001e0c000000083a */ /*26d0*/ DFMA R20, R10, R12, R10 ; /* 0x0000000c0a14722b */ /* 0x001062000000000a */ /*26e0*/ @P0 BRA 0x2750 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*26f0*/ LOP3.LUT R20, R59, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff3b147812 */ /* 0x002fe200078ec0ff */ /*2700*/ IMAD.MOV.U32 R21, RZ, RZ, R59 ; /* 0x000000ffff157224 */ /* 0x000fe200078e003b */ /*2710*/ MOV R22, R58 ; /* 0x0000003a00167202 */ /* 0x000fe40000000f00 */ /*2720*/ IADD3 R20, R20, -0x100000, RZ ; /* 0xfff0000014147810 */ /* 0x000fe40007ffe0ff */ /*2730*/ MOV R0, 0x2750 ; /* 0x0000275000007802 */ /* 0x000fe40000000f00 */ /*2740*/ CALL.REL.NOINC 0x34c0 ; /* 0x00000d7000007944 */ /* 0x021fea0003c00000 */ /*2750*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2760*/ MUFU.RCP64H R9, R35 ; /* 0x0000002300097308 */ /* 0x000ea20000001800 */ /*2770*/ IADD3 R8, R35, 0x300402, RZ ; /* 0x0030040223087810 */ /* 0x000fe20007ffe0ff */ /*2780*/ DMUL R12, R20.reuse, R60 ; /* 0x0000003c140c7228 */ /* 0x043fe20000000000 */ /*2790*/ BSSY B0, 0x28b0 ; /* 0x0000011000007945 */ /* 0x000fe40003800000 */ /*27a0*/ FSETP.GEU.AND P0, PT, |R8|, 5.8789094863358348022e-39, PT ; /* 0x004004020800780b */ /* 0x000fe20003f0e200 */ /*27b0*/ DMUL R40, R20, R40 ; /* 0x0000002814287228 */ /* 0x020e0c0000000000 */ /*27c0*/ DFMA R44, R40, -R54, R44 ; /* 0x80000036282c722b */ /* 0x001fc8000000002c */ /*27d0*/ DFMA R10, R8, -R34, 1 ; /* 0x3ff00000080a742b */ /* 0x004e0c0000000822 */ /*27e0*/ DFMA R10, R10, R10, R10 ; /* 0x0000000a0a0a722b */ /* 0x001e0c000000000a */ /*27f0*/ DFMA R14, R8, R10, R8 ; /* 0x0000000a080e722b */ /* 0x001e080000000008 */ /*2800*/ DFMA R10, R12, -R54, R62 ; /* 0x800000360c0a722b */ /* 0x000fc8000000003e */ /*2810*/ DFMA R16, R14, -R34, 1 ; /* 0x3ff000000e10742b */ /* 0x001e0c0000000822 */ /*2820*/ DFMA R20, R14, R16, R14 ; /* 0x000000100e14722b */ /* 0x001062000000000e */ /*2830*/ @P0 BRA 0x28a0 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*2840*/ LOP3.LUT R20, R35, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff23147812 */ /* 0x002fe200078ec0ff */ /*2850*/ IMAD.MOV.U32 R21, RZ, RZ, R35 ; /* 0x000000ffff157224 */ /* 0x000fe200078e0023 */ /*2860*/ MOV R22, R34 ; /* 0x0000002200167202 */ /* 0x000fe40000000f00 */ /*2870*/ IADD3 R20, R20, -0x100000, RZ ; /* 0xfff0000014147810 */ /* 0x000fe40007ffe0ff */ /*2880*/ MOV R0, 0x28a0 ; /* 0x000028a000007802 */ /* 0x000fe40000000f00 */ /*2890*/ CALL.REL.NOINC 0x34c0 ; /* 0x00000c2000007944 */ /* 0x001fea0003c00000 */ /*28a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*28b0*/ MUFU.RCP64H R9, R11 ; /* 0x0000000b00097308 */ /* 0x000ea20000001800 */ /*28c0*/ MOV R8, 0x1 ; /* 0x0000000100087802 */ /* 0x000fe20000000f00 */ /*28d0*/ DMUL R36, R20.reuse, R36 ; /* 0x0000002414247228 */ /* 0x042e620000000000 */ /*28e0*/ FSETP.GEU.AND P1, PT, |R45|, 6.5827683646048100446e-37, PT ; /* 0x036000002d00780b */ /* 0x000fe20003f2e200 */ /*28f0*/ BSSY B0, 0x2a50 ; /* 0x0000015000007945 */ /* 0x000fe40003800000 */ /*2900*/ DMUL R42, R20, R42 ; /* 0x0000002a142a7228 */ /* 0x000ec80000000000 */ /*2910*/ DFMA R38, R36, -R56, R38 ; /* 0x800000382426722b */ /* 0x002fc80000000026 */ /*2920*/ DFMA R46, R42, -R56, R46 ; /* 0x800000382a2e722b */ /* 0x008fc8000000002e */ /*2930*/ DFMA R14, -R10, R8, 1 ; /* 0x3ff000000a0e742b */ /* 0x005e0c0000000108 */ /*2940*/ DFMA R14, R14, R14, R14 ; /* 0x0000000e0e0e722b */ /* 0x001e0c000000000e */ /*2950*/ DFMA R14, R8, R14, R8 ; /* 0x0000000e080e722b */ /* 0x001e0c0000000008 */ /*2960*/ DFMA R8, -R10, R14, 1 ; /* 0x3ff000000a08742b */ /* 0x001e0c000000010e */ /*2970*/ DFMA R8, R14, R8, R14 ; /* 0x000000080e08722b */ /* 0x001e0c000000000e */ /*2980*/ DMUL R14, R44, R8 ; /* 0x000000082c0e7228 */ /* 0x001e0c0000000000 */ /*2990*/ DFMA R16, -R10, R14, R44 ; /* 0x0000000e0a10722b */ /* 0x001e0c000000012c */ /*29a0*/ DFMA R8, R8, R16, R14 ; /* 0x000000100808722b */ /* 0x001e14000000000e */ /*29b0*/ FFMA R0, RZ, R11, R9 ; /* 0x0000000bff007223 */ /* 0x001fca0000000009 */ /*29c0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*29d0*/ @P0 BRA P1, 0x2a40 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*29e0*/ IMAD.MOV.U32 R22, RZ, RZ, R44 ; /* 0x000000ffff167224 */ /* 0x000fe200078e002c */ /*29f0*/ MOV R23, R45 ; /* 0x0000002d00177202 */ /* 0x000fe40000000f00 */ /*2a00*/ MOV R44, 0x2a20 ; /* 0x00002a20002c7802 */ /* 0x000fe40000000f00 */ /*2a10*/ CALL.REL.NOINC 0x3770 ; /* 0x00000d5000007944 */ /* 0x000fea0003c00000 */ /*2a20*/ IMAD.MOV.U32 R8, RZ, RZ, R10 ; /* 0x000000ffff087224 */ /* 0x000fe200078e000a */ /*2a30*/ MOV R9, R11 ; /* 0x0000000b00097202 */ /* 0x000fe40000000f00 */ /*2a40*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2a50*/ MUFU.RCP64H R11, R39 ; /* 0x00000027000b7308 */ /* 0x000e220000001800 */ /*2a60*/ IMAD.MOV.U32 R10, RZ, RZ, 0x1 ; /* 0x00000001ff0a7424 */ /* 0x000fe200078e00ff */ /*2a70*/ FSETP.GEU.AND P1, PT, |R47|, 6.5827683646048100446e-37, PT ; /* 0x036000002f00780b */ /* 0x000fe20003f2e200 */ /*2a80*/ BSSY B0, 0x2bd0 ; /* 0x0000014000007945 */ /* 0x000fe80003800000 */ /*2a90*/ DFMA R14, -R38, R10, 1 ; /* 0x3ff00000260e742b */ /* 0x001e0c000000010a */ /*2aa0*/ DFMA R14, R14, R14, R14 ; /* 0x0000000e0e0e722b */ /* 0x001e0c000000000e */ /*2ab0*/ DFMA R14, R10, R14, R10 ; /* 0x0000000e0a0e722b */ /* 0x001e0c000000000a */ /*2ac0*/ DFMA R10, -R38, R14, 1 ; /* 0x3ff00000260a742b */ /* 0x001e0c000000010e */ /*2ad0*/ DFMA R10, R14, R10, R14 ; /* 0x0000000a0e0a722b */ /* 0x001e0c000000000e */ /*2ae0*/ DMUL R14, R46, R10 ; /* 0x0000000a2e0e7228 */ /* 0x001e0c0000000000 */ /*2af0*/ DFMA R16, -R38, R14, R46 ; /* 0x0000000e2610722b */ /* 0x001e0c000000012e */ /*2b00*/ DFMA R10, R10, R16, R14 ; /* 0x000000100a0a722b */ /* 0x001064000000000e */ /*2b10*/ MOV R14, R8 ; /* 0x00000008000e7202 */ /* 0x001fe20000000f00 */ /*2b20*/ IMAD.MOV.U32 R15, RZ, RZ, R9 ; /* 0x000000ffff0f7224 */ /* 0x000fce00078e0009 */ /*2b30*/ FFMA R0, RZ, R39, R11 ; /* 0x00000027ff007223 */ /* 0x002fca000000000b */ /*2b40*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*2b50*/ @P0 BRA P1, 0x2bc0 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*2b60*/ MOV R22, R46 ; /* 0x0000002e00167202 */ /* 0x000fe20000000f00 */ /*2b70*/ IMAD.MOV.U32 R23, RZ, RZ, R47 ; /* 0x000000ffff177224 */ /* 0x000fe200078e002f */ /*2b80*/ MOV R10, R38 ; /* 0x00000026000a7202 */ /* 0x000fe20000000f00 */ /*2b90*/ IMAD.MOV.U32 R11, RZ, RZ, R39 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e0027 */ /*2ba0*/ MOV R44, 0x2bc0 ; /* 0x00002bc0002c7802 */ /* 0x000fe40000000f00 */ /*2bb0*/ CALL.REL.NOINC 0x3770 ; /* 0x00000bb000007944 */ /* 0x000fea0003c00000 */ /*2bc0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2bd0*/ LDG.E.64 R32, [R32.64] ; /* 0x0000000820207981 */ /* 0x000ea2000c1e1b00 */ /*2be0*/ MOV R0, 0x2 ; /* 0x0000000200007802 */ /* 0x000fe20000000f00 */ /*2bf0*/ DFMA R12, -R12, R14, R40 ; /* 0x0000000e0c0c722b */ /* 0x0000620000000128 */ /*2c00*/ IMAD.MOV.U32 R20, RZ, RZ, R10 ; /* 0x000000ffff147224 */ /* 0x000fe200078e000a */ /*2c10*/ MOV R21, R11 ; /* 0x0000000b00157202 */ /* 0x000fe40000000f00 */ /*2c20*/ ISETP.LT.AND P0, PT, R0, c[0x0][0x190], PT ; /* 0x0000640000007a0c */ /* 0x000fe20003f01270 */ /*2c30*/ DFMA R8, -R36, R10, R42 ; /* 0x0000000a2408722b */ /* 0x0000c8000000012a */ /*2c40*/ DFMA R26, R48, -R32, R26 ; /* 0x80000020301a722b */ /* 0x004088000000001a */ /*2c50*/ DFMA R28, R50, -R32, R28 ; /* 0x80000020321c722b */ /* 0x000108000000001c */ /*2c60*/ DFMA R30, R52, -R32, R30 ; /* 0x80000020341e722b */ /* 0x000022000000001e */ /*2c70*/ @!P0 BRA 0x33a0 ; /* 0x0000072000008947 */ /* 0x000fea0003800000 */ /*2c80*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0x190] ; /* 0x00006400ff117624 */ /* 0x01efe200078e00ff */ /*2c90*/ MOV R11, c[0x0][0x198] ; /* 0x00006600000b7a02 */ /* 0x001fe20000000f00 */ /*2ca0*/ IMAD.MOV.U32 R10, RZ, RZ, 0x9 ; /* 0x00000009ff0a7424 */ /* 0x000fe200078e00ff */ /*2cb0*/ IADD3 R16, R3, R6, RZ ; /* 0x0000000603107210 */ /* 0x000fe20007ffe0ff */ /*2cc0*/ IMAD.MOV.U32 R19, RZ, RZ, 0x5 ; /* 0x00000005ff137424 */ /* 0x000fe200078e00ff */ /*2cd0*/ IADD3 R7, R11, -0x2, RZ ; /* 0xfffffffe0b077810 */ /* 0x000fe20007ffe0ff */ /*2ce0*/ IMAD R6, R17.reuse, R10, -0x3 ; /* 0xfffffffd11067424 */ /* 0x040fe200078e020a */ /*2cf0*/ LEA R0, R17.reuse, 0xfffffffd, 0x3 ; /* 0xfffffffd11007811 */ /* 0x040fe200078e18ff */ /*2d00*/ IMAD R10, R16, R19, 0xa ; /* 0x0000000a100a7424 */ /* 0x000fe200078e0213 */ /*2d10*/ IADD3 R33, R17, -0x3, RZ ; /* 0xfffffffd11217810 */ /* 0x000fe20007ffe0ff */ /*2d20*/ IMAD R23, R7.reuse, R6, R2.reuse ; /* 0x0000000607177224 */ /* 0x140fe200078e0202 */ /*2d30*/ UMOV UR4, 0x2 ; /* 0x0000000200047882 */ /* 0x000fe20000000000 */ /*2d40*/ IMAD R22, R7, R0, R2.reuse ; /* 0x0000000007167224 */ /* 0x100fe200078e0202 */ /*2d50*/ ULDC UR5, c[0x0][0x194] ; /* 0x0000650000057ab9 */ /* 0x000fe20000000800 */ /*2d60*/ IMAD R19, R33.reuse, R7, R2.reuse ; /* 0x0000000721137224 */ /* 0x140fe200078e0202 */ /*2d70*/ UIADD3 UR4, -UR4, UR5, URZ ; /* 0x0000000504047290 */ /* 0x000fe2000fffe13f */ /*2d80*/ IMAD R2, R33, c[0x0][0x198], R2 ; /* 0x0000660021027a24 */ /* 0x000fe200078e0202 */ /*2d90*/ IADD3 R16, -R11.reuse, 0x2, RZ ; /* 0x000000020b107810 */ /* 0x040fe20007ffe1ff */ /*2da0*/ IMAD R0, R11, c[0x0][0x194], RZ ; /* 0x000065000b007a24 */ /* 0x000fe200078e02ff */ /*2db0*/ MOV R6, R20 ; /* 0x0000001400067202 */ /* 0x000fe20000000f00 */ /*2dc0*/ IMAD.MOV.U32 R7, RZ, RZ, R21 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0015 */ /*2dd0*/ IADD3 R18, R2, 0x1, RZ ; /* 0x0000000102127810 */ /* 0x000fe20007ffe0ff */ /*2de0*/ IMAD R2, R10, R17, -0x5 ; /* 0xfffffffb0a027424 */ /* 0x000fe200078e0211 */ /*2df0*/ IADD3 R10, R17, -0x1, RZ ; /* 0xffffffff110a7810 */ /* 0x000fe20007ffe0ff */ /*2e00*/ IMAD R16, R16, UR4, RZ ; /* 0x0000000410107c24 */ /* 0x000fc4000f8e02ff */ /*2e10*/ IMAD R17, R18, c[0x0][0x194], R3 ; /* 0x0000650012117a24 */ /* 0x000fe400078e0203 */ /*2e20*/ IMAD R11, R0, c[0x0][0x190], RZ ; /* 0x00006400000b7a24 */ /* 0x000fe400078e02ff */ /*2e30*/ IMAD R18, R22, UR4, RZ ; /* 0x0000000416127c24 */ /* 0x000fe2000f8e02ff */ /*2e40*/ IADD3 R17, R17, 0x1, RZ ; /* 0x0000000111117810 */ /* 0x000fe20007ffe0ff */ /*2e50*/ IMAD R60, R19, UR4, RZ ; /* 0x00000004133c7c24 */ /* 0x000fe4000f8e02ff */ /*2e60*/ IMAD R62, R23, UR4, RZ ; /* 0x00000004173e7c24 */ /* 0x000fe4000f8e02ff */ /*2e70*/ MOV R61, 0x8 ; /* 0x00000008003d7802 */ /* 0x000fe20000000f00 */ /*2e80*/ IMAD.IADD R20, R60, 0x1, R3 ; /* 0x000000013c147824 */ /* 0x000fe200078e0203 */ /*2e90*/ IADD3 R42, R18, R3, RZ ; /* 0x00000003122a7210 */ /* 0x000fc60007ffe0ff */ /*2ea0*/ IMAD.WIDE R32, R17, R61, c[0x0][0x188] ; /* 0x0000620011207625 */ /* 0x000fc800078e023d */ /*2eb0*/ IMAD.WIDE R20, R20, R61, c[0x0][0x180] ; /* 0x0000600014147625 */ /* 0x000fc800078e023d */ /*2ec0*/ IMAD.WIDE R36, R11.reuse, 0x8, R32 ; /* 0x000000080b247825 */ /* 0x040fe400078e0220 */ /*2ed0*/ LDG.E.64 R32, [R32.64] ; /* 0x0000000820207981 */ /* 0x000ea4000c1e1b00 */ /*2ee0*/ IMAD.WIDE R22, R4, 0x8, R20 ; /* 0x0000000804167825 */ /* 0x000fe400078e0214 */ /*2ef0*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000814147981 */ /* 0x000ea4000c1e1b00 */ /*2f00*/ IMAD.WIDE R38, R11, 0x8, R36 ; /* 0x000000080b267825 */ /* 0x000fe400078e0224 */ /*2f10*/ LDG.E.64 R36, [R36.64] ; /* 0x0000000824247981 */ /* 0x000ee4000c1e1b00 */ /*2f20*/ IMAD.WIDE R42, R42, R61, c[0x0][0x180] ; /* 0x000060002a2a7625 */ /* 0x000fc400078e023d */ /*2f30*/ LDG.E.64 R34, [R22.64] ; /* 0x0000000816227981 */ /* 0x000124000c1e1b00 */ /*2f40*/ IMAD.WIDE R40, R11.reuse, 0x8, R38 ; /* 0x000000080b287825 */ /* 0x040fe400078e0226 */ /*2f50*/ LDG.E.64 R38, [R38.64] ; /* 0x0000000826267981 */ /* 0x000f64000c1e1b00 */ /*2f60*/ IMAD.WIDE R54, R4, 0x8, R22 ; /* 0x0000000804367825 */ /* 0x000fe400078e0216 */ /*2f70*/ LDG.E.64 R42, [R42.64] ; /* 0x000000082a2a7981 */ /* 0x000f24000c1e1b00 */ /*2f80*/ IMAD.WIDE R46, R11, 0x8, R40 ; /* 0x000000080b2e7825 */ /* 0x000fc400078e0228 */ /*2f90*/ LDG.E.64 R40, [R40.64] ; /* 0x0000000828287981 */ /* 0x000f24000c1e1b00 */ /*2fa0*/ IMAD.IADD R44, R62, 0x1, R3 ; /* 0x000000013e2c7824 */ /* 0x000fe400078e0203 */ /*2fb0*/ LDG.E.64 R56, [R54.64] ; /* 0x0000000836387981 */ /* 0x000f22000c1e1b00 */ /*2fc0*/ IMAD.WIDE R58, R4, 0x8, R54 ; /* 0x00000008043a7825 */ /* 0x000fc600078e0236 */ /*2fd0*/ LDG.E.64 R46, [R46.64] ; /* 0x000000082e2e7981 */ /* 0x000f22000c1e1b00 */ /*2fe0*/ IMAD.WIDE R44, R44, R61, c[0x0][0x180] ; /* 0x000060002c2c7625 */ /* 0x000fc600078e023d */ /*2ff0*/ LDG.E.64 R58, [R58.64] ; /* 0x000000083a3a7981 */ /* 0x000f28000c1e1b00 */ /*3000*/ LDG.E.64 R44, [R44.64] ; /* 0x000000082c2c7981 */ /* 0x000f22000c1e1b00 */ /*3010*/ IADD3 R19, R5, 0x1, RZ ; /* 0x0000000105137810 */ /* 0x000fc80007ffe0ff */ /*3020*/ ISETP.GE.AND P0, PT, R19, R10, PT ; /* 0x0000000a1300720c */ /* 0x000fe40003f06270 */ /*3030*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */ /* 0x000fd60007ffe0ff */ /*3040*/ @!P0 DADD R22, -R6, R14 ; /* 0x0000000006168229 */ /* 0x001fe2000000010e */ /*3050*/ IADD3 R3, R16, R3, RZ ; /* 0x0000000310037210 */ /* 0x000fe20007ffe0ff */ /*3060*/ IMAD.IADD R17, R17, 0x1, -R0 ; /* 0x0000000111117824 */ /* 0x000fe400078e0a00 */ /*3070*/ DFMA R32, -R20, R26, R32 ; /* 0x0000001a1420722b */ /* 0x004fc80000000120 */ /*3080*/ DFMA R36, -R20, R28, R36 ; /* 0x0000001c1424722b */ /* 0x008fc80000000124 */ /*3090*/ DFMA R38, -R20, R30, R38 ; /* 0x0000001e1426722b */ /* 0x020e080000000126 */ /*30a0*/ @!P0 DMUL R20, R52, c[0x3][0x48] ; /* 0x00c0120034148a28 */ /* 0x000fc80000000000 */ /*30b0*/ DFMA R40, -R42, R12, R40 ; /* 0x0000000c2a28722b */ /* 0x010fc80000000128 */ /*30c0*/ @!P0 DADD R42, -RZ, -R50 ; /* 0x00000000ff2a8229 */ /* 0x000e480000000932 */ /*30d0*/ DFMA R38, R52, -R34, R38 ; /* 0x800000223426722b */ /* 0x001fc80000000026 */ /*30e0*/ @!P0 DMUL R52, R22, c[0x3][0x48] ; /* 0x00c0120016348a28 */ /* 0x000fc80000000000 */ /*30f0*/ DFMA R46, -R56, R8, R46 ; /* 0x00000008382e722b */ /* 0x000e08000000012e */ /*3100*/ @!P0 DADD R22, R6, R14 ; /* 0x0000000006168229 */ /* 0x000e88000000000e */ /*3110*/ DFMA R36, R50, -R34.reuse, R36 ; /* 0x800000223224722b */ /* 0x0807e40000000024 */ /*3120*/ @!P0 MOV R50, R48 ; /* 0x0000003000328202 */ /* 0x008fe20000000f00 */ /*3130*/ @!P0 IMAD.MOV.U32 R51, RZ, RZ, R49 ; /* 0x000000ffff338224 */ /* 0x000fe200078e0031 */ /*3140*/ DFMA R32, R48, -R34, R32 ; /* 0x800000223020722b */ /* 0x0003e40000000020 */ /*3150*/ @!P0 MOV R48, R42 ; /* 0x0000002a00308202 */ /* 0x002fe20000000f00 */ /*3160*/ @!P0 IMAD.MOV.U32 R49, RZ, RZ, R43 ; /* 0x000000ffff318224 */ /* 0x000fe200078e002b */ /*3170*/ DFMA R46, R6, -R58, R46 ; /* 0x8000003a062e722b */ /* 0x001e08000000002e */ /*3180*/ DFMA R40, R14, -R44, R40 ; /* 0x8000002c0e28722b */ /* 0x000fc80000000028 */ /*3190*/ @!P0 DFMA R14, R22, 0.5, -R20 ; /* 0x3fe00000160e882b */ /* 0x004e480000000814 */ /*31a0*/ @!P0 DFMA R6, R22, 0.5, R20 ; /* 0x3fe000001606882b */ /* 0x0004e20000000014 */ /*31b0*/ ISETP.GT.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fe20003f04270 */ /*31c0*/ IMAD.WIDE R34, R2, R61, c[0x0][0x178] ; /* 0x00005e0002227625 */ /* 0x000fe200078e023d */ /*31d0*/ MOV R20, R8 ; /* 0x0000000800147202 */ /* 0x004fc60000000f00 */ /*31e0*/ IMAD.MOV.U32 R21, RZ, RZ, R9 ; /* 0x000000ffff157224 */ /* 0x000fe200078e0009 */ /*31f0*/ STG.E.64 [R34.64+0x8], R50 ; /* 0x0000083222007986 */ /* 0x0005e2000c101b08 */ /*3200*/ IADD3 R2, R2, -0x5, RZ ; /* 0xfffffffb02027810 */ /* 0x000fe20007ffe0ff */ /*3210*/ IMAD.MOV.U32 R9, RZ, RZ, R47 ; /* 0x000000ffff097224 */ /* 0x001fe400078e002f */ /*3220*/ STG.E.64 [R34.64], R48 ; /* 0x0000003022007986 */ /* 0x0001e2000c101b08 */ /*3230*/ MOV R8, R46 ; /* 0x0000002e00087202 */ /* 0x000fc60000000f00 */ /*3240*/ STG.E.64 [R34.64+0x10], R52 ; /* 0x0000103422007986 */ /* 0x0009e8000c101b08 */ /*3250*/ STG.E.64 [R34.64+0x18], R14 ; /* 0x0000180e22007986 */ /* 0x0023e2000c101b08 */ /*3260*/ MOV R50, R28 ; /* 0x0000001c00327202 */ /* 0x004fe20000000f00 */ /*3270*/ IMAD.MOV.U32 R51, RZ, RZ, R29 ; /* 0x000000ffff337224 */ /* 0x000fe400078e001d */ /*3280*/ STG.E.64 [R34.64+0x20], R6 ; /* 0x0000200622007986 */ /* 0x0085e2000c101b08 */ /*3290*/ MOV R28, R36 ; /* 0x00000024001c7202 */ /* 0x000fe20000000f00 */ /*32a0*/ IMAD.MOV.U32 R49, RZ, RZ, R27 ; /* 0x000000ffff317224 */ /* 0x001fe200078e001b */ /*32b0*/ MOV R48, R26 ; /* 0x0000001a00307202 */ /* 0x000fe20000000f00 */ /*32c0*/ IMAD.MOV.U32 R27, RZ, RZ, R33 ; /* 0x000000ffff1b7224 */ /* 0x000fe200078e0021 */ /*32d0*/ MOV R26, R32 ; /* 0x00000020001a7202 */ /* 0x000fe20000000f00 */ /*32e0*/ IMAD.MOV.U32 R53, RZ, RZ, R31 ; /* 0x000000ffff357224 */ /* 0x010fe200078e001f */ /*32f0*/ MOV R52, R30 ; /* 0x0000001e00347202 */ /* 0x000fe20000000f00 */ /*3300*/ IMAD.MOV.U32 R29, RZ, RZ, R37 ; /* 0x000000ffff1d7224 */ /* 0x000fe200078e0025 */ /*3310*/ MOV R30, R38 ; /* 0x00000026001e7202 */ /* 0x000fe20000000f00 */ /*3320*/ IMAD.MOV.U32 R15, RZ, RZ, R13 ; /* 0x000000ffff0f7224 */ /* 0x002fe200078e000d */ /*3330*/ MOV R14, R12 ; /* 0x0000000c000e7202 */ /* 0x000fe20000000f00 */ /*3340*/ IMAD.MOV.U32 R31, RZ, RZ, R39 ; /* 0x000000ffff1f7224 */ /* 0x000fe200078e0027 */ /*3350*/ MOV R12, R40 ; /* 0x00000028000c7202 */ /* 0x000fe20000000f00 */ /*3360*/ IMAD.MOV.U32 R13, RZ, RZ, R41 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e0029 */ /*3370*/ MOV R6, R20 ; /* 0x0000001400067202 */ /* 0x004fe20000000f00 */ /*3380*/ IMAD.MOV.U32 R7, RZ, RZ, R21 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0015 */ /*3390*/ @P0 BRA 0x2e70 ; /* 0xfffffad000000947 */ /* 0x000fea000383ffff */ /*33a0*/ DADD R2, R20, R14.reuse ; /* 0x0000000014027229 */ /* 0x11efe2000000000e */ /*33b0*/ STG.E.64 [R24.64+0x30], R48 ; /* 0x0000303018007986 */ /* 0x000fe6000c101b08 */ /*33c0*/ DMUL R6, R52, c[0x3][0x48] ; /* 0x00c0120034067a28 */ /* 0x000e620000000000 */ /*33d0*/ STG.E.64 [R24.64], R26 ; /* 0x0000001a18007986 */ /* 0x000fe6000c101b08 */ /*33e0*/ DADD R4, -R20, R14 ; /* 0x0000000014047229 */ /* 0x000ea2000000010e */ /*33f0*/ STG.E.64 [R24.64+0x8], R28 ; /* 0x0000081c18007986 */ /* 0x000fe6000c101b08 */ /*3400*/ DFMA R10, R2, 0.5, -R6 ; /* 0x3fe00000020a782b */ /* 0x003fe20000000806 */ /*3410*/ STG.E.64 [R24.64+0x10], R30 ; /* 0x0000101e18007986 */ /* 0x000fe6000c101b08 */ /*3420*/ DADD R14, -RZ, -R50 ; /* 0x00000000ff0e7229 */ /* 0x000e220000000932 */ /*3430*/ STG.E.64 [R24.64+0x18], R12 ; /* 0x0000180c18007986 */ /* 0x000fe6000c101b08 */ /*3440*/ DMUL R4, R4, c[0x3][0x48] ; /* 0x00c0120004047a28 */ /* 0x004e620000000000 */ /*3450*/ STG.E.64 [R24.64+0x20], R8 ; /* 0x0000200818007986 */ /* 0x000fe6000c101b08 */ /*3460*/ DFMA R2, R2, 0.5, R6 ; /* 0x3fe000000202782b */ /* 0x000ea20000000006 */ /*3470*/ STG.E.64 [R24.64+0x28], R14 ; /* 0x0000280e18007986 */ /* 0x001fe8000c101b08 */ /*3480*/ STG.E.64 [R24.64+0x38], R4 ; /* 0x0000380418007986 */ /* 0x002fe8000c101b08 */ /*3490*/ STG.E.64 [R24.64+0x40], R10 ; /* 0x0000400a18007986 */ /* 0x000fe8000c101b08 */ /*34a0*/ STG.E.64 [R24.64+0x48], R2 ; /* 0x0000480218007986 */ /* 0x004fe2000c101b08 */ /*34b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*34c0*/ MOV R100, R22 ; /* 0x0000001600647202 */ /* 0x000fe20000000f00 */ /*34d0*/ IMAD.MOV.U32 R101, RZ, RZ, R21 ; /* 0x000000ffff657224 */ /* 0x000fe200078e0015 */ /*34e0*/ BSSY B1, 0x3720 ; /* 0x0000023000017945 */ /* 0x000fea0003800000 */ /*34f0*/ DSETP.GTU.AND P1, PT, |R100|, +INF , PT ; /* 0x7ff000006400742a */ /* 0x000e1c0003f2c200 */ /*3500*/ @P1 BRA 0x36f0 ; /* 0x000001e000001947 */ /* 0x001fea0003800000 */ /*3510*/ LOP3.LUT R21, R21, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff15157812 */ /* 0x000fc800078ec0ff */ /*3520*/ IADD3 R22, R21, -0x1, RZ ; /* 0xffffffff15167810 */ /* 0x000fc80007ffe0ff */ /*3530*/ ISETP.GE.U32.AND P1, PT, R22, 0x7fefffff, PT ; /* 0x7fefffff1600780c */ /* 0x000fda0003f26070 */ /*3540*/ @P1 LOP3.LUT R23, R101, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff0000065171812 */ /* 0x000fe400078e3cff */ /*3550*/ @P1 MOV R22, RZ ; /* 0x000000ff00161202 */ /* 0x000fe20000000f00 */ /*3560*/ @P1 BRA 0x3710 ; /* 0x000001a000001947 */ /* 0x000fea0003800000 */ /*3570*/ ISETP.GE.U32.AND P1, PT, R21, 0x1000001, PT ; /* 0x010000011500780c */ /* 0x000fda0003f26070 */ /*3580*/ @!P1 BRA 0x3660 ; /* 0x000000d000009947 */ /* 0x000fea0003800000 */ /*3590*/ IADD3 R23, R101, -0x3fe00000, RZ ; /* 0xc020000065177810 */ /* 0x000fe20007ffe0ff */ /*35a0*/ IMAD.MOV.U32 R22, RZ, RZ, R100 ; /* 0x000000ffff167224 */ /* 0x000fc600078e0064 */ /*35b0*/ MUFU.RCP64H R21, R23 ; /* 0x0000001700157308 */ /* 0x000e260000001800 */ /*35c0*/ DFMA R102, -R22, R20, 1 ; /* 0x3ff000001666742b */ /* 0x001e0c0000000114 */ /*35d0*/ DFMA R102, R102, R102, R102 ; /* 0x000000666666722b */ /* 0x001e0c0000000066 */ /*35e0*/ DFMA R102, R20, R102, R20 ; /* 0x000000661466722b */ /* 0x001e0c0000000014 */ /*35f0*/ DFMA R20, -R22, R102, 1 ; /* 0x3ff000001614742b */ /* 0x001e0c0000000166 */ /*3600*/ DFMA R20, R102, R20, R102 ; /* 0x000000146614722b */ /* 0x001e0c0000000066 */ /*3610*/ DMUL R20, R20, 2.2250738585072013831e-308 ; /* 0x0010000014147828 */ /* 0x001e0c0000000000 */ /*3620*/ DFMA R100, -R100, R20, 1 ; /* 0x3ff000006464742b */ /* 0x001e0c0000000114 */ /*3630*/ DFMA R100, R100, R100, R100 ; /* 0x000000646464722b */ /* 0x001e0c0000000064 */ /*3640*/ DFMA R22, R20, R100, R20 ; /* 0x000000641416722b */ /* 0x0010620000000014 */ /*3650*/ BRA 0x3710 ; /* 0x000000b000007947 */ /* 0x000fea0003800000 */ /*3660*/ DMUL R100, R100, 8.11296384146066816958e+31 ; /* 0x4690000064647828 */ /* 0x000e0c0000000000 */ /*3670*/ MUFU.RCP64H R21, R101 ; /* 0x0000006500157308 */ /* 0x001e240000001800 */ /*3680*/ DFMA R22, -R100, R20, 1 ; /* 0x3ff000006416742b */ /* 0x001e0c0000000114 */ /*3690*/ DFMA R22, R22, R22, R22 ; /* 0x000000161616722b */ /* 0x001e0c0000000016 */ /*36a0*/ DFMA R22, R20, R22, R20 ; /* 0x000000161416722b */ /* 0x001e0c0000000014 */ /*36b0*/ DFMA R20, -R100, R22, 1 ; /* 0x3ff000006414742b */ /* 0x001e0c0000000116 */ /*36c0*/ DFMA R20, R22, R20, R22 ; /* 0x000000141614722b */ /* 0x001e0c0000000016 */ /*36d0*/ DMUL R22, R20, 8.11296384146066816958e+31 ; /* 0x4690000014167828 */ /* 0x0010620000000000 */ /*36e0*/ BRA 0x3710 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*36f0*/ LOP3.LUT R23, R101, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000065177812 */ /* 0x000fe400078efcff */ /*3700*/ MOV R22, R100 ; /* 0x0000006400167202 */ /* 0x000fe40000000f00 */ /*3710*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*3720*/ IMAD.MOV.U32 R20, RZ, RZ, R22 ; /* 0x000000ffff147224 */ /* 0x003fe200078e0016 */ /*3730*/ MOV R21, R23 ; /* 0x0000001700157202 */ /* 0x000fe20000000f00 */ /*3740*/ IMAD.MOV.U32 R22, RZ, RZ, R0 ; /* 0x000000ffff167224 */ /* 0x000fe200078e0000 */ /*3750*/ MOV R23, 0x0 ; /* 0x0000000000177802 */ /* 0x000fc80000000f00 */ /*3760*/ RET.REL.NODEC R22 0x0 ; /* 0xffffc89016007950 */ /* 0x000fea0003c3ffff */ /*3770*/ FSETP.GEU.AND P0, PT, |R11|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000b00780b */ /* 0x040fe20003f0e200 */ /*3780*/ IMAD.MOV.U32 R34, RZ, RZ, R10.reuse ; /* 0x000000ffff227224 */ /* 0x100fe200078e000a */ /*3790*/ LOP3.LUT R8, R11, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff0b087812 */ /* 0x000fe200078ec0ff */ /*37a0*/ IMAD.MOV.U32 R18, RZ, RZ, 0x1 ; /* 0x00000001ff127424 */ /* 0x000fe200078e00ff */ /*37b0*/ MOV R35, R11 ; /* 0x0000000b00237202 */ /* 0x000fe20000000f00 */ /*37c0*/ BSSY B1, 0x3d30 ; /* 0x0000056000017945 */ /* 0x000fe20003800000 */ /*37d0*/ LOP3.LUT R9, R8, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000008097812 */ /* 0x000fe200078efcff */ /*37e0*/ IMAD.MOV.U32 R8, RZ, RZ, R10 ; /* 0x000000ffff087224 */ /* 0x000fe200078e000a */ /*37f0*/ FSETP.GEU.AND P2, PT, |R23|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000001700780b */ /* 0x040fe40003f4e200 */ /*3800*/ LOP3.LUT R55, R23, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000017377812 */ /* 0x000fc400078ec0ff */ /*3810*/ LOP3.LUT R54, R11, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000b367812 */ /* 0x000fe200078ec0ff */ /*3820*/ @!P0 DMUL R8, R34, 8.98846567431157953865e+307 ; /* 0x7fe0000022088828 */ /* 0x000e220000000000 */ /*3830*/ MOV R45, 0x1ca00000 ; /* 0x1ca00000002d7802 */ /* 0x000fe40000000f00 */ /*3840*/ ISETP.GE.U32.AND P1, PT, R55, R54, PT ; /* 0x000000363700720c */ /* 0x000fc60003f26070 */ /*3850*/ MUFU.RCP64H R19, R9 ; /* 0x0000000900137308 */ /* 0x001e220000001800 */ /*3860*/ SEL R7, R45, 0x63400000, !P1 ; /* 0x634000002d077807 */ /* 0x000fe20004800000 */ /*3870*/ @!P2 IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff10a224 */ /* 0x000fe200078e00ff */ /*3880*/ @!P2 LOP3.LUT R0, R35, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000002300a812 */ /* 0x000fc800078ec0ff */ /*3890*/ @!P2 ISETP.GE.U32.AND P3, PT, R55, R0, PT ; /* 0x000000003700a20c */ /* 0x000fe20003f66070 */ /*38a0*/ IMAD.MOV.U32 R0, RZ, RZ, R54 ; /* 0x000000ffff007224 */ /* 0x000fe200078e0036 */ /*38b0*/ @!P0 LOP3.LUT R0, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000009008812 */ /* 0x000fe400078ec0ff */ /*38c0*/ @!P2 SEL R17, R45, 0x63400000, !P3 ; /* 0x634000002d11a807 */ /* 0x000fe40005800000 */ /*38d0*/ IADD3 R54, R0, -0x1, RZ ; /* 0xffffffff00367810 */ /* 0x000fe40007ffe0ff */ /*38e0*/ @!P2 LOP3.LUT R17, R17, 0x80000000, R23, 0xf8, !PT ; /* 0x800000001111a812 */ /* 0x000fe200078ef817 */ /*38f0*/ DFMA R10, R18, -R8, 1 ; /* 0x3ff00000120a742b */ /* 0x001e060000000808 */ /*3900*/ @!P2 LOP3.LUT R17, R17, 0x100000, RZ, 0xfc, !PT ; /* 0x001000001111a812 */ /* 0x000fc600078efcff */ /*3910*/ DFMA R20, R10, R10, R10 ; /* 0x0000000a0a14722b */ /* 0x001064000000000a */ /*3920*/ LOP3.LUT R11, R7, 0x800fffff, R23, 0xf8, !PT ; /* 0x800fffff070b7812 */ /* 0x001fe400078ef817 */ /*3930*/ MOV R10, R22 ; /* 0x00000016000a7202 */ /* 0x000fe40000000f00 */ /*3940*/ DFMA R20, R18, R20, R18 ; /* 0x000000141214722b */ /* 0x002e220000000012 */ /*3950*/ MOV R7, R55 ; /* 0x0000003700077202 */ /* 0x000fc60000000f00 */ /*3960*/ @!P2 DFMA R10, R10, 2, -R16 ; /* 0x400000000a0aa82b */ /* 0x000e480000000810 */ /*3970*/ DFMA R16, R20, -R8, 1 ; /* 0x3ff000001410742b */ /* 0x001e0c0000000808 */ /*3980*/ @!P2 LOP3.LUT R7, R11, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000b07a812 */ /* 0x002fe200078ec0ff */ /*3990*/ DFMA R16, R20, R16, R20 ; /* 0x000000101410722b */ /* 0x0010460000000014 */ /*39a0*/ IADD3 R20, R7, -0x1, RZ ; /* 0xffffffff07147810 */ /* 0x001fc60007ffe0ff */ /*39b0*/ DMUL R18, R16, R10 ; /* 0x0000000a10127228 */ /* 0x002e220000000000 */ /*39c0*/ ISETP.GT.U32.AND P0, PT, R20, 0x7feffffe, PT ; /* 0x7feffffe1400780c */ /* 0x000fc80003f04070 */ /*39d0*/ ISETP.GT.U32.OR P0, PT, R54, 0x7feffffe, P0 ; /* 0x7feffffe3600780c */ /* 0x000fe20000704470 */ /*39e0*/ DFMA R20, R18, -R8, R10 ; /* 0x800000081214722b */ /* 0x001e0c000000000a */ /*39f0*/ DFMA R20, R16, R20, R18 ; /* 0x000000141014722b */ /* 0x00104c0000000012 */ /*3a00*/ @P0 BRA 0x3bd0 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*3a10*/ LOP3.LUT R16, R35, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000023107812 */ /* 0x003fe400078ec0ff */ /*3a20*/ MOV R18, RZ ; /* 0x000000ff00127202 */ /* 0x000fe40000000f00 */ /*3a30*/ IADD3 R0, R55.reuse, -R16.reuse, RZ ; /* 0x8000001037007210 */ /* 0x0c0fe40007ffe0ff */ /*3a40*/ ISETP.GE.U32.AND P0, PT, R55, R16, PT ; /* 0x000000103700720c */ /* 0x000fe40003f06070 */ /*3a50*/ IMNMX R0, R0, -0x46a00000, !PT ; /* 0xb960000000007817 */ /* 0x000fe40007800200 */ /*3a60*/ SEL R45, R45, 0x63400000, !P0 ; /* 0x634000002d2d7807 */ /* 0x000fc40004000000 */ /*3a70*/ IMNMX R0, R0, 0x46a00000, PT ; /* 0x46a0000000007817 */ /* 0x000fca0003800200 */ /*3a80*/ IMAD.IADD R0, R0, 0x1, -R45 ; /* 0x0000000100007824 */ /* 0x000fca00078e0a2d */ /*3a90*/ IADD3 R19, R0, 0x7fe00000, RZ ; /* 0x7fe0000000137810 */ /* 0x000fcc0007ffe0ff */ /*3aa0*/ DMUL R16, R20, R18 ; /* 0x0000001214107228 */ /* 0x000e140000000000 */ /*3ab0*/ FSETP.GTU.AND P0, PT, |R17|, 1.469367938527859385e-39, PT ; /* 0x001000001100780b */ /* 0x001fda0003f0c200 */ /*3ac0*/ @P0 BRA 0x3d20 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*3ad0*/ DFMA R8, R20, -R8, R10 ; /* 0x800000081408722b */ /* 0x000e22000000000a */ /*3ae0*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ; /* 0x000000ffff127224 */ /* 0x000fd200078e00ff */ /*3af0*/ FSETP.NEU.AND P0, PT, R9.reuse, RZ, PT ; /* 0x000000ff0900720b */ /* 0x041fe40003f0d000 */ /*3b00*/ LOP3.LUT R35, R9, 0x80000000, R35, 0x48, !PT ; /* 0x8000000009237812 */ /* 0x000fc800078e4823 */ /*3b10*/ LOP3.LUT R19, R35, R19, RZ, 0xfc, !PT ; /* 0x0000001323137212 */ /* 0x000fce00078efcff */ /*3b20*/ @!P0 BRA 0x3d20 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*3b30*/ IADD3 R9, -R0.reuse, RZ, RZ ; /* 0x000000ff00097210 */ /* 0x040fe20007ffe1ff */ /*3b40*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x000fe200078e00ff */ /*3b50*/ DMUL.RP R18, R20, R18 ; /* 0x0000001214127228 */ /* 0x000e220000008000 */ /*3b60*/ IADD3 R7, -R0, -0x43300000, RZ ; /* 0xbcd0000000077810 */ /* 0x000fc80007ffe1ff */ /*3b70*/ DFMA R8, R16, -R8, R20 ; /* 0x800000081008722b */ /* 0x000e4a0000000014 */ /*3b80*/ LOP3.LUT R35, R19, R35, RZ, 0x3c, !PT ; /* 0x0000002313237212 */ /* 0x001fca00078e3cff */ /*3b90*/ FSETP.NEU.AND P0, PT, |R9|, R7, PT ; /* 0x000000070900720b */ /* 0x002fc80003f0d200 */ /*3ba0*/ FSEL R16, R18, R16, !P0 ; /* 0x0000001012107208 */ /* 0x000fe40004000000 */ /*3bb0*/ FSEL R17, R35, R17, !P0 ; /* 0x0000001123117208 */ /* 0x000fe20004000000 */ /*3bc0*/ BRA 0x3d20 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*3bd0*/ DSETP.NAN.AND P0, PT, R22, R22, PT ; /* 0x000000161600722a */ /* 0x003e1c0003f08000 */ /*3be0*/ @P0 BRA 0x3d00 ; /* 0x0000011000000947 */ /* 0x001fea0003800000 */ /*3bf0*/ DSETP.NAN.AND P0, PT, R34, R34, PT ; /* 0x000000222200722a */ /* 0x000e1c0003f08000 */ /*3c00*/ @P0 BRA 0x3cd0 ; /* 0x000000c000000947 */ /* 0x001fea0003800000 */ /*3c10*/ ISETP.NE.AND P0, PT, R7, R0, PT ; /* 0x000000000700720c */ /* 0x000fe20003f05270 */ /*3c20*/ IMAD.MOV.U32 R17, RZ, RZ, -0x80000 ; /* 0xfff80000ff117424 */ /* 0x000fe200078e00ff */ /*3c30*/ MOV R16, 0x0 ; /* 0x0000000000107802 */ /* 0x000fd60000000f00 */ /*3c40*/ @!P0 BRA 0x3d20 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*3c50*/ ISETP.NE.AND P0, PT, R7, 0x7ff00000, PT ; /* 0x7ff000000700780c */ /* 0x000fe40003f05270 */ /*3c60*/ LOP3.LUT R17, R23, 0x80000000, R35, 0x48, !PT ; /* 0x8000000017117812 */ /* 0x000fe400078e4823 */ /*3c70*/ ISETP.EQ.OR P0, PT, R0, RZ, !P0 ; /* 0x000000ff0000720c */ /* 0x000fda0004702670 */ /*3c80*/ @P0 LOP3.LUT R0, R17, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff0000011000812 */ /* 0x000fe400078efcff */ /*3c90*/ @!P0 MOV R16, RZ ; /* 0x000000ff00108202 */ /* 0x000fe20000000f00 */ /*3ca0*/ @P0 IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff100224 */ /* 0x000fe200078e00ff */ /*3cb0*/ @P0 MOV R17, R0 ; /* 0x0000000000110202 */ /* 0x000fe20000000f00 */ /*3cc0*/ BRA 0x3d20 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*3cd0*/ LOP3.LUT R17, R35, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000023117812 */ /* 0x000fe200078efcff */ /*3ce0*/ IMAD.MOV.U32 R16, RZ, RZ, R34 ; /* 0x000000ffff107224 */ /* 0x000fe200078e0022 */ /*3cf0*/ BRA 0x3d20 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*3d00*/ LOP3.LUT R17, R23, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000017117812 */ /* 0x000fe400078efcff */ /*3d10*/ MOV R16, R22 ; /* 0x0000001600107202 */ /* 0x000fe40000000f00 */ /*3d20*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*3d30*/ IMAD.MOV.U32 R8, RZ, RZ, R44 ; /* 0x000000ffff087224 */ /* 0x000fe200078e002c */ /*3d40*/ MOV R9, 0x0 ; /* 0x0000000000097802 */ /* 0x000fe20000000f00 */ /*3d50*/ IMAD.MOV.U32 R10, RZ, RZ, R16 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0010 */ /*3d60*/ MOV R11, R17 ; /* 0x00000011000b7202 */ /* 0x000fc40000000f00 */ /*3d70*/ RET.REL.NODEC R8 0x0 ; /* 0xffffc28008007950 */ /* 0x000fea0003c3ffff */ /*3d80*/ BRA 0x3d80; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*3d90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3da0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3db0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3dc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3dd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3de0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3df0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3e00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3e10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3e20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3e30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3e40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3e50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3e60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3e70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z13txinvr_kernelPdS_S_S_S_S_S_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R14, SR_CTAID.Y ; /* 0x00000000000e7919 */ /* 0x000e220000002600 */ /*0020*/ MOV R7, 0x8 ; /* 0x0000000800077802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R12, SR_CTAID.X ; /* 0x00000000000c7919 */ /* 0x000e680000002500 */ /*0050*/ S2R R13, SR_TID.X ; /* 0x00000000000d7919 */ /* 0x000ea20000002100 */ /*0060*/ IADD3 R14, R14, 0x1, RZ ; /* 0x000000010e0e7810 */ /* 0x001fe40007ffe0ff */ /*0070*/ IADD3 R3, R12, 0x1, RZ ; /* 0x000000010c037810 */ /* 0x002fca0007ffe0ff */ /*0080*/ IMAD R0, R14, c[0x0][0x19c], R3 ; /* 0x000067000e007a24 */ /* 0x000fc800078e0203 */ /*0090*/ IMAD R0, R0, c[0x0][0x198], R13 ; /* 0x0000660000007a24 */ /* 0x004fc800078e020d */ /*00a0*/ IMAD.WIDE R8, R0, R7, c[0x0][0x180] ; /* 0x0000600000087625 */ /* 0x000fcc00078e0207 */ /*00b0*/ LDG.E.64 R8, [R8.64+0x8] ; /* 0x0000080408087981 */ /* 0x000ea2000c1e1b00 */ /*00c0*/ IMAD.WIDE R2, R0, R7, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fc800078e0207 */ /*00d0*/ IMAD.WIDE R10, R0.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a00000a7625 */ /* 0x0c0fe400078e0207 */ /*00e0*/ LDG.E.64 R2, [R2.64+0x8] ; /* 0x0000080402027981 */ /* 0x000f64000c1e1b00 */ /*00f0*/ IMAD.WIDE R4, R0.reuse, R7.reuse, c[0x0][0x170] ; /* 0x00005c0000047625 */ /* 0x0c0fe400078e0207 */ /*0100*/ LDG.E.64 R10, [R10.64+0x8] ; /* 0x000008040a0a7981 */ /* 0x000f64000c1e1b00 */ /*0110*/ IMAD.WIDE R6, R0, R7, c[0x0][0x178] ; /* 0x00005e0000067625 */ /* 0x000fe400078e0207 */ /*0120*/ LDG.E.64 R4, [R4.64+0x8] ; /* 0x0000080404047981 */ /* 0x000f68000c1e1b00 */ /*0130*/ LDG.E.64 R6, [R6.64+0x8] ; /* 0x0000080406067981 */ /* 0x000f62000c1e1b00 */ /*0140*/ BSSY B0, 0x240 ; /* 0x000000f000007945 */ /* 0x000fe20003800000 */ /*0150*/ DMUL R20, R8, R8 ; /* 0x0000000808147228 */ /* 0x004e0c0000000000 */ /*0160*/ MUFU.RCP64H R17, R21 ; /* 0x0000001500117308 */ /* 0x001e280000001800 */ /*0170*/ IADD3 R16, R21, 0x300402, RZ ; /* 0x0030040215107810 */ /* 0x000fcc0007ffe0ff */ /*0180*/ DFMA R18, -R20, R16, 1 ; /* 0x3ff000001412742b */ /* 0x001e220000000110 */ /*0190*/ FSETP.GEU.AND P0, PT, |R16|, 5.8789094863358348022e-39, PT ; /* 0x004004021000780b */ /* 0x000fca0003f0e200 */ /*01a0*/ DFMA R18, R18, R18, R18 ; /* 0x000000121212722b */ /* 0x001e0c0000000012 */ /*01b0*/ DFMA R18, R16, R18, R16 ; /* 0x000000121012722b */ /* 0x001e0c0000000010 */ /*01c0*/ DFMA R22, -R20, R18, 1 ; /* 0x3ff000001416742b */ /* 0x001e0c0000000112 */ /*01d0*/ DFMA R16, R18, R22, R18 ; /* 0x000000161210722b */ /* 0x0010620000000012 */ /*01e0*/ @P0 BRA 0x230 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*01f0*/ LOP3.LUT R15, R21, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff150f7812 */ /* 0x000fe400078ec0ff */ /*0200*/ MOV R18, 0x230 ; /* 0x0000023000127802 */ /* 0x001fe40000000f00 */ /*0210*/ IADD3 R22, R15, -0x100000, RZ ; /* 0xfff000000f167810 */ /* 0x000fe40007ffe0ff */ /*0220*/ CALL.REL.NOINC 0x4d0 ; /* 0x000002a000007944 */ /* 0x022fea0003c00000 */ /*0230*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0240*/ IMAD.MOV.U32 R15, RZ, RZ, 0x5 ; /* 0x00000005ff0f7424 */ /* 0x000fe200078e00ff */ /*0250*/ MOV R27, 0x8 ; /* 0x00000008001b7802 */ /* 0x000fe20000000f00 */ /*0260*/ IMAD R14, R14, c[0x0][0x198], RZ ; /* 0x000066000e0e7a24 */ /* 0x000fe400078e02ff */ /*0270*/ IMAD R13, R13, R15.reuse, 0x5 ; /* 0x000000050d0d7424 */ /* 0x080fe400078e020f */ /*0280*/ IMAD R12, R12, R15, 0x5 ; /* 0x000000050c0c7424 */ /* 0x000fc400078e020f */ /*0290*/ IMAD R15, R14, 0x5, RZ ; /* 0x000000050e0f7824 */ /* 0x000fe400078e02ff */ /*02a0*/ IMAD R12, R12, c[0x0][0x198], R13 ; /* 0x000066000c0c7a24 */ /* 0x000fc800078e020d */ /*02b0*/ IMAD R12, R15, c[0x0][0x19c], R12 ; /* 0x000067000f0c7a24 */ /* 0x000fc800078e020c */ /*02c0*/ IMAD.WIDE R12, R12, R27, c[0x0][0x190] ; /* 0x000064000c0c7625 */ /* 0x000fc800078e021b */ /*02d0*/ IMAD.WIDE R26, R0, R27, c[0x0][0x188] ; /* 0x00006200001a7625 */ /* 0x000fe200078e021b */ /*02e0*/ LDG.E.64 R24, [R12.64+0x8] ; /* 0x000008040c187981 */ /* 0x000ea8000c1e1b00 */ /*02f0*/ LDG.E.64 R14, [R12.64] ; /* 0x000000040c0e7981 */ /* 0x000ee8000c1e1b00 */ /*0300*/ LDG.E.64 R26, [R26.64+0x8] ; /* 0x000008041a1a7981 */ /* 0x000ee8000c1e1b00 */ /*0310*/ LDG.E.64 R18, [R12.64+0x10] ; /* 0x000010040c127981 */ /* 0x001f28000c1e1b00 */ /*0320*/ LDG.E.64 R20, [R12.64+0x18] ; /* 0x000018040c147981 */ /* 0x000f28000c1e1b00 */ /*0330*/ LDG.E.64 R22, [R12.64+0x20] ; /* 0x000020040c167981 */ /* 0x000f22000c1e1b00 */ /*0340*/ DMUL R30, R2, c[0x3][0x48] ; /* 0x00c01200021e7a28 */ /* 0x020e080000000000 */ /*0350*/ DMUL R16, R16, c[0x2][0x0] ; /* 0x0080000010107a28 */ /* 0x002fc80000000000 */ /*0360*/ DMUL R8, R8, R30 ; /* 0x0000001e08087228 */ /* 0x001fc80000000000 */ /*0370*/ DMUL R28, R10, R24 ; /* 0x000000180a1c7228 */ /* 0x004ecc0000000000 */ /*0380*/ DFMA R28, R14, R26, -R28 ; /* 0x0000001a0e1c722b */ /* 0x008f0c000000081c */ /*0390*/ DFMA R28, -R4, R18, R28 ; /* 0x00000012041c722b */ /* 0x010e0c000000011c */ /*03a0*/ DFMA R28, -R6, R20, R28 ; /* 0x00000014061c722b */ /* 0x001e08000000011c */ /*03b0*/ DFMA R10, R10, R14, -R24 ; /* 0x0000000e0a0a722b */ /* 0x000e480000000818 */ /*03c0*/ DADD R22, R22, R28 ; /* 0x0000000016167229 */ /* 0x001e08000000001c */ /*03d0*/ DFMA R6, R6, R14, -R20 ; /* 0x0000000e0606722b */ /* 0x000e880000000814 */ /*03e0*/ DFMA R4, R4, R14, -R18 ; /* 0x0000000e0404722b */ /* 0x000ec80000000812 */ /*03f0*/ DMUL R10, R30, R10 ; /* 0x0000000a1e0a7228 */ /* 0x002fc80000000000 */ /*0400*/ DMUL R16, R16, R22 ; /* 0x0000001610107228 */ /* 0x001e080000000000 */ /*0410*/ DMUL R6, R2, R6 ; /* 0x0000000602067228 */ /* 0x004e480000000000 */ /*0420*/ DMUL R4, R2, R4 ; /* 0x0000000402047228 */ /* 0x008e880000000000 */ /*0430*/ DFMA R2, R16, R8, -R10 ; /* 0x000000081002722b */ /* 0x001fc8000000080a */ /*0440*/ DADD R6, -RZ, -R6 ; /* 0x00000000ff067229 */ /* 0x002e080000000906 */ /*0450*/ DADD R14, R14, -R16 ; /* 0x000000000e0e7229 */ /* 0x000e480000000810 */ /*0460*/ DFMA R8, R16, R8, R10 ; /* 0x000000081008722b */ /* 0x000ee2000000000a */ /*0470*/ STG.E.64 [R12.64+0x10], R4 ; /* 0x000010040c007986 */ /* 0x004fe8000c101b04 */ /*0480*/ STG.E.64 [R12.64+0x8], R6 ; /* 0x000008060c007986 */ /* 0x001fe8000c101b04 */ /*0490*/ STG.E.64 [R12.64], R14 ; /* 0x0000000e0c007986 */ /* 0x002fe8000c101b04 */ /*04a0*/ STG.E.64 [R12.64+0x18], R2 ; /* 0x000018020c007986 */ /* 0x000fe8000c101b04 */ /*04b0*/ STG.E.64 [R12.64+0x20], R8 ; /* 0x000020080c007986 */ /* 0x008fe2000c101b04 */ /*04c0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*04d0*/ IMAD.MOV.U32 R16, RZ, RZ, R20 ; /* 0x000000ffff107224 */ /* 0x000fe200078e0014 */ /*04e0*/ MOV R17, R21 ; /* 0x0000001500117202 */ /* 0x000fe20000000f00 */ /*04f0*/ BSSY B1, 0x740 ; /* 0x0000024000017945 */ /* 0x000fea0003800000 */ /*0500*/ DSETP.GTU.AND P0, PT, |R16|, +INF , PT ; /* 0x7ff000001000742a */ /* 0x000e1c0003f0c200 */ /*0510*/ @P0 BRA 0x710 ; /* 0x000001f000000947 */ /* 0x001fea0003800000 */ /*0520*/ LOP3.LUT R15, R21, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff150f7812 */ /* 0x000fc800078ec0ff */ /*0530*/ IADD3 R19, R15, -0x1, RZ ; /* 0xffffffff0f137810 */ /* 0x000fc80007ffe0ff */ /*0540*/ ISETP.GE.U32.AND P0, PT, R19, 0x7fefffff, PT ; /* 0x7fefffff1300780c */ /* 0x000fda0003f06070 */ /*0550*/ @P0 LOP3.LUT R21, R17, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff0000011150812 */ /* 0x000fe200078e3cff */ /*0560*/ @P0 IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff140224 */ /* 0x000fe200078e00ff */ /*0570*/ @P0 BRA 0x730 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*0580*/ ISETP.GE.U32.AND P0, PT, R15, 0x1000001, PT ; /* 0x010000010f00780c */ /* 0x000fda0003f06070 */ /*0590*/ @!P0 BRA 0x670 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*05a0*/ IADD3 R21, R17, -0x3fe00000, RZ ; /* 0xc020000011157810 */ /* 0x000fe40007ffe0ff */ /*05b0*/ MOV R20, R16 ; /* 0x0000001000147202 */ /* 0x000fe40000000f00 */ /*05c0*/ MUFU.RCP64H R23, R21 ; /* 0x0000001500177308 */ /* 0x000e280000001800 */ /*05d0*/ DFMA R24, -R20, R22, 1 ; /* 0x3ff000001418742b */ /* 0x001e0c0000000116 */ /*05e0*/ DFMA R24, R24, R24, R24 ; /* 0x000000181818722b */ /* 0x001e0c0000000018 */ /*05f0*/ DFMA R24, R22, R24, R22 ; /* 0x000000181618722b */ /* 0x001e0c0000000016 */ /*0600*/ DFMA R22, -R20, R24, 1 ; /* 0x3ff000001416742b */ /* 0x001e0c0000000118 */ /*0610*/ DFMA R22, R24, R22, R24 ; /* 0x000000161816722b */ /* 0x001e0c0000000018 */ /*0620*/ DMUL R22, R22, 2.2250738585072013831e-308 ; /* 0x0010000016167828 */ /* 0x001e0c0000000000 */ /*0630*/ DFMA R16, -R16, R22, 1 ; /* 0x3ff000001010742b */ /* 0x001e0c0000000116 */ /*0640*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */ /* 0x001e0c0000000010 */ /*0650*/ DFMA R20, R22, R16, R22 ; /* 0x000000101614722b */ /* 0x0010620000000016 */ /*0660*/ BRA 0x730 ; /* 0x000000c000007947 */ /* 0x000fea0003800000 */ /*0670*/ DMUL R16, R16, 8.11296384146066816958e+31 ; /* 0x4690000010107828 */ /* 0x000e220000000000 */ /*0680*/ IMAD.MOV.U32 R20, RZ, RZ, R22 ; /* 0x000000ffff147224 */ /* 0x000fca00078e0016 */ /*0690*/ MUFU.RCP64H R21, R17 ; /* 0x0000001100157308 */ /* 0x001e240000001800 */ /*06a0*/ DFMA R22, -R16, R20, 1 ; /* 0x3ff000001016742b */ /* 0x001e0c0000000114 */ /*06b0*/ DFMA R22, R22, R22, R22 ; /* 0x000000161616722b */ /* 0x001e0c0000000016 */ /*06c0*/ DFMA R22, R20, R22, R20 ; /* 0x000000161416722b */ /* 0x001e0c0000000014 */ /*06d0*/ DFMA R20, -R16, R22, 1 ; /* 0x3ff000001014742b */ /* 0x001e0c0000000116 */ /*06e0*/ DFMA R20, R22, R20, R22 ; /* 0x000000141614722b */ /* 0x001e0c0000000016 */ /*06f0*/ DMUL R20, R20, 8.11296384146066816958e+31 ; /* 0x4690000014147828 */ /* 0x001e220000000000 */ /*0700*/ BRA 0x730 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*0710*/ LOP3.LUT R21, R17, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000011157812 */ /* 0x000fe400078efcff */ /*0720*/ MOV R20, R16 ; /* 0x0000001000147202 */ /* 0x000fe40000000f00 */ /*0730*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0740*/ IMAD.MOV.U32 R19, RZ, RZ, 0x0 ; /* 0x00000000ff137424 */ /* 0x000fe200078e00ff */ /*0750*/ MOV R17, R21 ; /* 0x0000001500117202 */ /* 0x003fe20000000f00 */ /*0760*/ IMAD.MOV.U32 R16, RZ, RZ, R20 ; /* 0x000000ffff107224 */ /* 0x000fe400078e0014 */ /*0770*/ RET.REL.NODEC R18 0x0 ; /* 0xfffff88012007950 */ /* 0x000fea0003c3ffff */ /*0780*/ BRA 0x780; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0790*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0800*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0810*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0820*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0830*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0840*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0850*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0860*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0870*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e220000002600 */ /*0020*/ MOV R7, c[0x0][0x1b0] ; /* 0x00006c0000077a02 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0040*/ MOV R48, 0x8 ; /* 0x0000000800307802 */ /* 0x000fe20000000f00 */ /*0050*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e640000002500 */ /*0060*/ IMAD R5, R7, c[0x0][0x1ac], RZ ; /* 0x00006b0007057a24 */ /* 0x000fe400078e02ff */ /*0070*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */ /* 0x000ea40000002100 */ /*0080*/ IMAD R5, R5, c[0x0][0x1a8], RZ ; /* 0x00006a0005057a24 */ /* 0x000fc400078e02ff */ /*0090*/ IMAD R10, R0, c[0x0][0x1ac], RZ ; /* 0x00006b00000a7a24 */ /* 0x001fca00078e02ff */ /*00a0*/ IADD3 R4, R10, R3, RZ ; /* 0x000000030a047210 */ /* 0x002fca0007ffe0ff */ /*00b0*/ IMAD R91, R4, c[0x0][0x1a8], RZ ; /* 0x00006a00045b7a24 */ /* 0x000fca00078e02ff */ /*00c0*/ IADD3 R91, R91, R2, RZ ; /* 0x000000025b5b7210 */ /* 0x004fca0007ffe0ff */ /*00d0*/ IMAD.WIDE R64, R91, R48, c[0x0][0x198] ; /* 0x000066005b407625 */ /* 0x000fcc00078e0230 */ /*00e0*/ IMAD.WIDE R12, R5.reuse, 0x8, R64 ; /* 0x00000008050c7825 */ /* 0x040fe400078e0240 */ /*00f0*/ LDG.E.64 R64, [R64.64] ; /* 0x0000000640407981 */ /* 0x000f68000c1e1b00 */ /*0100*/ IMAD.WIDE R38, R5.reuse, 0x8, R12 ; /* 0x0000000805267825 */ /* 0x040fe400078e020c */ /*0110*/ LDG.E.64 R12, [R12.64] ; /* 0x000000060c0c7981 */ /* 0x000f68000c1e1b00 */ /*0120*/ IMAD.WIDE R84, R5, 0x8, R38 ; /* 0x0000000805547825 */ /* 0x000fc400078e0226 */ /*0130*/ LDG.E.64 R38, [R38.64] ; /* 0x0000000626267981 */ /* 0x000f68000c1e1b00 */ /*0140*/ IMAD.WIDE R8, R5, 0x8, R84 ; /* 0x0000000805087825 */ /* 0x000fe400078e0254 */ /*0150*/ LDG.E.64 R84, [R84.64] ; /* 0x0000000654547981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000608087981 */ /* 0x000f62000c1e1b00 */ /*0170*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fc80007ffe0ff */ /*0180*/ ISETP.GE.AND P0, PT, R0.reuse, R7, PT ; /* 0x000000070000720c */ /* 0x040fe40003f06270 */ /*0190*/ MOV R7, 0x1 ; /* 0x0000000100077802 */ /* 0x000fe40000000f00 */ /*01a0*/ ISETP.LT.OR P0, PT, R0, 0x1, P0 ; /* 0x000000010000780c */ /* 0x000fe40000701670 */ /*01b0*/ IADD3 R6, -R7, c[0x0][0x1ac], RZ ; /* 0x00006b0007067a10 */ /* 0x000fe40007ffe1ff */ /*01c0*/ ISETP.LT.OR P0, PT, R3, 0x1, P0 ; /* 0x000000010300780c */ /* 0x000fc80000701670 */ /*01d0*/ ISETP.GE.OR P0, PT, R3, R6, P0 ; /* 0x000000060300720c */ /* 0x000fe40000706670 */ /*01e0*/ IADD3 R7, -R7, c[0x0][0x1a8], RZ ; /* 0x00006a0007077a10 */ /* 0x000fe40007ffe1ff */ /*01f0*/ ISETP.LT.OR P0, PT, R2, 0x1, P0 ; /* 0x000000010200780c */ /* 0x000fc80000701670 */ /*0200*/ ISETP.GE.OR P0, PT, R2, R7, P0 ; /* 0x000000070200720c */ /* 0x000fe20000706670 */ /*0210*/ BSSY B0, 0x4780 ; /* 0x0000456000007945 */ /* 0x000fd80003800000 */ /*0220*/ @P0 BRA 0x4770 ; /* 0x0000454000000947 */ /* 0x000fea0003800000 */ /*0230*/ IADD3 R6, R91.reuse, 0x1, RZ ; /* 0x000000015b067810 */ /* 0x040fe20007ffe0ff */ /*0240*/ IMAD.WIDE R16, R91, R48, c[0x0][0x1a0] ; /* 0x000068005b107625 */ /* 0x000fc800078e0230 */ /*0250*/ IMAD.WIDE R6, R6, R48, c[0x0][0x1a0] ; /* 0x0000680006067625 */ /* 0x000fcc00078e0230 */ /*0260*/ IMAD.WIDE R6, R5, 0x8, R6 ; /* 0x0000000805067825 */ /* 0x000fcc00078e0206 */ /*0270*/ IMAD.WIDE R14, R5, 0x8, R6 ; /* 0x00000008050e7825 */ /* 0x000fc800078e0206 */ /*0280*/ IMAD.WIDE R6, R91, R48, c[0x0][0x170] ; /* 0x00005c005b067625 */ /* 0x000fe200078e0230 */ /*0290*/ LDG.E.64 R26, [R14.64+-0x8] ; /* 0xfffff8060e1a7981 */ /* 0x000ea2000c1e1b00 */ /*02a0*/ IADD3 R11, R0, c[0x0][0x1b0], RZ ; /* 0x00006c00000b7a10 */ /* 0x000fe40007ffe0ff */ /*02b0*/ MOV R32, c[0x0][0x1b0] ; /* 0x00006c0000207a02 */ /* 0x000fe20000000f00 */ /*02c0*/ LDG.E.64 R28, [R6.64] ; /* 0x00000006061c7981 */ /* 0x0000e2000c1e1b00 */ /*02d0*/ IMAD.WIDE R18, R5, 0x8, R16 ; /* 0x0000000805127825 */ /* 0x000fc600078e0210 */ /*02e0*/ LDG.E.64 R20, [R14.64] ; /* 0x000000060e147981 */ /* 0x000f22000c1e1b00 */ /*02f0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0300*/ LEA R32, R32, R11, 0x1 ; /* 0x0000000b20207211 */ /* 0x000fe200078e08ff */ /*0310*/ IMAD R33, R3, c[0x0][0x1a8], R2 ; /* 0x00006a0003217a24 */ /* 0x000fe200078e0202 */ /*0320*/ LDG.E.64 R46, [R6.64+0x8] ; /* 0x00000804062e7981 */ /* 0x000124000c1e1b00 */ /*0330*/ IADD3 R32, R32, c[0x0][0x1b0], RZ ; /* 0x00006c0020207a10 */ /* 0x000fe40007ffe0ff */ /*0340*/ LDG.E.64 R22, [R14.64+-0x10] ; /* 0xfffff0060e167981 */ /* 0x000f22000c1e1b00 */ /*0350*/ IMAD R10, R10, c[0x0][0x1a8], R33 ; /* 0x00006a000a0a7a24 */ /* 0x000fc600078e0221 */ /*0360*/ LDG.E.64 R30, [R18.64] ; /* 0x00000006121e7981 */ /* 0x000f22000c1e1b00 */ /*0370*/ IMAD R33, R32, c[0x0][0x1ac], R3 ; /* 0x00006b0020217a24 */ /* 0x000fc600078e0203 */ /*0380*/ LDG.E.64 R44, [R6.64+-0x8] ; /* 0xfffff804062c7981 */ /* 0x000122000c1e1b00 */ /*0390*/ IMAD.WIDE R10, R10, R48, c[0x0][0x168] ; /* 0x00005a000a0a7625 */ /* 0x000fc600078e0230 */ /*03a0*/ LDG.E.64 R24, [R18.64+0x8] ; /* 0x0000080612187981 */ /* 0x000f22000c1e1b00 */ /*03b0*/ IMAD R33, R33, c[0x0][0x1a8], R2 ; /* 0x00006a0021217a24 */ /* 0x000fe400078e0202 */ /*03c0*/ IMAD.WIDE R50, R91, R48.reuse, c[0x0][0x188] ; /* 0x000062005b327625 */ /* 0x080fe200078e0230 */ /*03d0*/ LDG.E.64 R52, [R18.64+-0x8] ; /* 0xfffff80612347981 */ /* 0x000f28000c1e1b00 */ /*03e0*/ LDG.E.64 R74, [R10.64+-0x8] ; /* 0xfffff8060a4a7981 */ /* 0x000322000c1e1b00 */ /*03f0*/ IMAD.WIDE R48, R33, R48, c[0x0][0x1a0] ; /* 0x0000680021307625 */ /* 0x000fc600078e0230 */ /*0400*/ LDG.E.64 R72, [R10.64] ; /* 0x000000060a487981 */ /* 0x000328000c1e1b00 */ /*0410*/ LDG.E.64 R88, [R10.64+0x8] ; /* 0x000008060a587981 */ /* 0x000328000c1e1b00 */ /*0420*/ LDG.E.64 R42, [R50.64+0x8] ; /* 0x00000806322a7981 */ /* 0x000528000c1e1b00 */ /*0430*/ LDG.E.64 R54, [R48.64+0x8] ; /* 0x0000080630367981 */ /* 0x000128000c1e1b00 */ /*0440*/ LDG.E.64 R56, [R48.64+-0x8] ; /* 0xfffff80630387981 */ /* 0x000328000c1e1b00 */ /*0450*/ LDG.E.64 R40, [R50.64+-0x8] ; /* 0xfffff80632287981 */ /* 0x000522000c1e1b00 */ /*0460*/ IMAD.WIDE R58, R5, 0x8, R14 ; /* 0x00000008053a7825 */ /* 0x000fc600078e020e */ /*0470*/ LDG.E.64 R32, [R48.64] ; /* 0x0000000430207981 */ /* 0x000322000c1e1b00 */ /*0480*/ MOV R6, 0x8 ; /* 0x0000000800067802 */ /* 0x001fc60000000f00 */ /*0490*/ LDG.E.64 R34, [R58.64+-0x8] ; /* 0xfffff8043a227981 */ /* 0x000f24000c1e1b00 */ /*04a0*/ IMAD.WIDE R68, R91, R6, c[0x0][0x178] ; /* 0x00005e005b447625 */ /* 0x000fe400078e0206 */ /*04b0*/ LDG.E.64 R60, [R58.64] ; /* 0x000000043a3c7981 */ /* 0x000f28000c1e1b00 */ /*04c0*/ LDG.E.64 R62, [R58.64+-0x10] ; /* 0xfffff0043a3e7981 */ /* 0x000f28000c1e1b00 */ /*04d0*/ LDG.E.64 R36, [R68.64] ; /* 0x0000000444247981 */ /* 0x000128000c1e1b00 */ /*04e0*/ LDG.E.64 R10, [R68.64+0x8] ; /* 0x00000804440a7981 */ /* 0x002128000c1e1b00 */ /*04f0*/ LDG.E.64 R86, [R68.64+-0x8] ; /* 0xfffff80444567981 */ /* 0x000122000c1e1b00 */ /*0500*/ MOV R78, c[0x3][0x100] ; /* 0x00c04000004e7a02 */ /* 0x000fc40000000f00 */ /*0510*/ MOV R79, c[0x3][0x104] ; /* 0x00c04100004f7a02 */ /* 0x000fcc0000000f00 */ /*0520*/ DMUL R78, R78, c[0x2][0x0] ; /* 0x008000004e4e7a28 */ /* 0x000fe20000000000 */ /*0530*/ IMAD.WIDE R92, R91, R6, c[0x0][0x180] ; /* 0x000060005b5c7625 */ /* 0x000fc800078e0206 */ /*0540*/ IMAD.WIDE R90, R91, R6, c[0x0][0x160] ; /* 0x000058005b5a7625 */ /* 0x000fe200078e0206 */ /*0550*/ LDG.E.64 R76, [R92.64+-0x8] ; /* 0xfffff8045c4c7981 */ /* 0x000f28000c1e1b00 */ /*0560*/ LDG.E.64 R80, [R90.64] ; /* 0x000000045a507981 */ /* 0x000f28000c1e1b00 */ /*0570*/ LDG.E.64 R68, [R90.64+-0x8] ; /* 0xfffff8045a447981 */ /* 0x001f22000c1e1b00 */ /*0580*/ DADD R50, R26, R26 ; /* 0x000000001a327229 */ /* 0x004f08000000001a */ /*0590*/ DADD R66, R28, R28 ; /* 0x000000001c427229 */ /* 0x008e08000000001c */ /*05a0*/ DADD R50, -R50, R20 ; /* 0x0000000032327229 */ /* 0x010e480000000114 */ /*05b0*/ DADD R46, -R66, R46 ; /* 0x00000000422e7229 */ /* 0x0010a4000000012e */ /*05c0*/ LDG.E.64 R66, [R90.64+0x8] ; /* 0x000008045a427981 */ /* 0x001ee4000c1e1b00 */ /*05d0*/ DADD R50, R50, R22 ; /* 0x0000000032327229 */ /* 0x002e080000000016 */ /*05e0*/ DADD R48, R30, R30 ; /* 0x000000001e307229 */ /* 0x000e48000000001e */ /*05f0*/ DADD R44, R46, R44 ; /* 0x000000002e2c7229 */ /* 0x004fc8000000002c */ /*0600*/ DFMA R50, R50, c[0x3][0x130], R38 ; /* 0x00c04c0032327a2b */ /* 0x021e080000000026 */ /*0610*/ DADD R48, R24, -R48 ; /* 0x0000000018307229 */ /* 0x002e480000000830 */ /*0620*/ DFMA R82, R44, c[0x3][0x100], R50 ; /* 0x00c040002c527a2b */ /* 0x0011e40000000032 */ /*0630*/ LDG.E.64 R50, [R92.64+0x8] ; /* 0x000008045c327981 */ /* 0x001ea4000c1e1b00 */ /*0640*/ DADD R48, R52, R48 ; /* 0x0000000034307229 */ /* 0x002e080000000030 */ /*0650*/ DMUL R44, R74, R22 ; /* 0x000000164a2c7228 */ /* 0x000e480000000000 */ /*0660*/ DADD R38, R72, R72 ; /* 0x0000000048267229 */ /* 0x000f080000000048 */ /*0670*/ DFMA R48, R48, c[0x3][0x128], R12 ; /* 0x00c04a0030307a2b */ /* 0x001fc8000000000c */ /*0680*/ DFMA R46, R88, R20, -R44 ; /* 0x00000014582e722b */ /* 0x002fc8000000082c */ /*0690*/ DADD R12, -R38, R88 ; /* 0x00000000260c7229 */ /* 0x010e080000000158 */ /*06a0*/ DADD R44, -R42, R54 ; /* 0x000000002a2c7229 */ /* 0x000e480000000136 */ /*06b0*/ DADD R12, R12, R74 ; /* 0x000000000c0c7229 */ /* 0x001e08000000004a */ /*06c0*/ DADD R44, R44, -R56 ; /* 0x000000002c2c7229 */ /* 0x002e480000000838 */ /*06d0*/ DFMA R78, R78, R12, R48 ; /* 0x0000000c4e4e722b */ /* 0x0011e40000000030 */ /*06e0*/ LDG.E.64 R48, [R92.64] ; /* 0x000000045c307981 */ /* 0x001f24000c1e1b00 */ /*06f0*/ DADD R44, R44, R40 ; /* 0x000000002c2c7229 */ /* 0x002fc80000000028 */ /*0700*/ DMUL R12, R52, R74 ; /* 0x0000004a340c7228 */ /* 0x000e080000000000 */ /*0710*/ DMUL R40, R40, c[0x2][0x8] ; /* 0x0080020028287a28 */ /* 0x000e480000000000 */ /*0720*/ DFMA R12, R24, R88, -R12 ; /* 0x00000058180c722b */ /* 0x001e08000000080c */ /*0730*/ DFMA R40, R56, c[0x2][0x10], -R40 ; /* 0x0080040038287a2b */ /* 0x002e480000000828 */ /*0740*/ DMUL R42, R42, c[0x2][0x8] ; /* 0x008002002a2a7a28 */ /* 0x000e080000000000 */ /*0750*/ DFMA R12, R44, c[0x2][0x8], R12 ; /* 0x008002002c0c7a2b */ /* 0x001e08000000000c */ /*0760*/ DMUL R70, R74, R40 ; /* 0x000000284a467228 */ /* 0x002fc80000000000 */ /*0770*/ DFMA R42, R54, c[0x2][0x10], -R42 ; /* 0x00800400362a7a2b */ /* 0x000e48000000082a */ /*0780*/ DADD R40, R32, R32 ; /* 0x0000000020287229 */ /* 0x000e080000000020 */ /*0790*/ DFMA R78, -R12, c[0x3][0x8], R78 ; /* 0x00c002000c4e7a2b */ /* 0x001fc8000000014e */ /*07a0*/ DFMA R70, R88, R42, -R70 ; /* 0x0000002a5846722b */ /* 0x002fc80000000846 */ /*07b0*/ DADD R12, R54, -R40 ; /* 0x00000000360c7229 */ /* 0x000e080000000828 */ /*07c0*/ DADD R42, R34, R34 ; /* 0x00000000222a7229 */ /* 0x000e480000000022 */ /*07d0*/ DADD R44, R56, R12 ; /* 0x00000000382c7229 */ /* 0x001e08000000000c */ /*07e0*/ DADD R12, -R42, R60 ; /* 0x000000002a0c7229 */ /* 0x002e48000000013c */ /*07f0*/ DFMA R8, R44, c[0x3][0x140], R8 ; /* 0x00c050002c087a2b */ /* 0x001fc80000000008 */ /*0800*/ DADD R12, R12, R62 ; /* 0x000000000c0c7229 */ /* 0x002fc8000000003e */ /*0810*/ DADD R44, R36, R36 ; /* 0x00000000242c7229 */ /* 0x000e080000000024 */ /*0820*/ DFMA R82, -R46, c[0x3][0x8], R82 ; /* 0x00c002002e527a2b */ /* 0x0003e40000000152 */ /*0830*/ LDG.E.64 R46, [R16.64] ; /* 0x00000006102e7981 */ /* 0x002ee4000c1e1b00 */ /*0840*/ DADD R10, -R44, R10 ; /* 0x000000002c0a7229 */ /* 0x001e08000000010a */ /*0850*/ DFMA R84, R12, c[0x3][0x138], R84 ; /* 0x00c04e000c547a2b */ /* 0x0003e40000000054 */ /*0860*/ LDG.E.64 R12, [R16.64+0x8] ; /* 0x00000806100c7981 */ /* 0x002ee4000c1e1b00 */ /*0870*/ DADD R86, R10, R86 ; /* 0x000000000a567229 */ /* 0x0011e40000000056 */ /*0880*/ LDG.E.64 R10, [R16.64+-0x8] ; /* 0xfffff806100a7981 */ /* 0x001ee4000c1e1b00 */ /*0890*/ DMUL R72, R72, R38 ; /* 0x0000002648487228 */ /* 0x000e0c0000000000 */ /*08a0*/ DFMA R72, R88, R88, -R72 ; /* 0x000000585848722b */ /* 0x001e0c0000000848 */ /*08b0*/ DFMA R72, R74.reuse, R74, R72 ; /* 0x0000004a4a48722b */ /* 0x041fe20000000048 */ /*08c0*/ IMAD R7, R4, c[0x0][0x1a8], RZ ; /* 0x00006a0004077a24 */ /* 0x000fe200078e02ff */ /*08d0*/ ISETP.NE.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */ /* 0x000fe40003f05270 */ /*08e0*/ DMUL R74, R74, R62 ; /* 0x0000003e4a4a7228 */ /* 0x000e080000000000 */ /*08f0*/ DFMA R84, R86, c[0x3][0x100], R84 ; /* 0x00c0400056547a2b */ /* 0x000fc80000000054 */ /*0900*/ DFMA R74, R88, R60, -R74 ; /* 0x0000003c584a722b */ /* 0x001fe2000000084a */ /*0910*/ BSSY B1, 0x17f0 ; /* 0x00000ed000017945 */ /* 0x000fe60003800000 */ /*0920*/ DADD R48, R48, R48 ; /* 0x0000000030307229 */ /* 0x010e8c0000000030 */ /*0930*/ DADD R50, -R48, R50 ; /* 0x0000000030327229 */ /* 0x004e0c0000000132 */ /*0940*/ DADD R76, R50, R76 ; /* 0x00000000324c7229 */ /* 0x001e08000000004c */ /*0950*/ DMUL R50, R40, R80 ; /* 0x0000005028327228 */ /* 0x000ec80000000000 */ /*0960*/ DFMA R76, R76, c[0x3][0x108], R8 ; /* 0x00c042004c4c7a2b */ /* 0x001e080000000008 */ /*0970*/ DFMA R66, R54, R66, -R50 ; /* 0x000000423642722b */ /* 0x008e480000000832 */ /*0980*/ DFMA R72, R72, c[0x3][0x110], R76 ; /* 0x00c0440048487a2b */ /* 0x001fc8000000004c */ /*0990*/ DFMA R68, R56, R68, R66 ; /* 0x000000443844722b */ /* 0x002e0c0000000042 */ /*09a0*/ DFMA R72, R68, c[0x3][0x118], R72 ; /* 0x00c0460044487a2b */ /* 0x0010640000000048 */ /*09b0*/ IADD3 R69, R7, 0x1, RZ ; /* 0x0000000107457810 */ /* 0x001fc80007ffe0ff */ /*09c0*/ DFMA R70, -R70, c[0x3][0x8], R72 ; /* 0x00c0020046467a2b */ /* 0x002fc80000000148 */ /*09d0*/ DADD R8, R46, R46 ; /* 0x000000002e087229 */ /* 0x000e0c000000002e */ /*09e0*/ DADD R66, -R8, R12 ; /* 0x0000000008427229 */ /* 0x001e0c000000010c */ /*09f0*/ DADD R66, R66, R10 ; /* 0x0000000042427229 */ /* 0x001e0c000000000a */ /*0a00*/ DFMA R66, R66, c[0x3][0x120], R64 ; /* 0x00c0480042427a2b */ /* 0x0011e40000000040 */ /*0a10*/ IMAD.WIDE R64, R69, R6, c[0x0][0x1a0] ; /* 0x0000680045407625 */ /* 0x001fe400078e0206 */ /*0a20*/ DADD R68, -R52, R24 ; /* 0x0000000034447229 */ /* 0x000e080000000118 */ /*0a30*/ IMAD.WIDE R72, R5, 0x8, R64 ; /* 0x0000000805487825 */ /* 0x000fe200078e0240 */ /*0a40*/ DFMA R8, -R74, c[0x3][0x8], R84 ; /* 0x00c002004a087a2b */ /* 0x0002860000000154 */ /*0a50*/ IMAD.WIDE R64, R7, R6, c[0x0][0x1a0] ; /* 0x0000680007407625 */ /* 0x000fe200078e0206 */ /*0a60*/ DFMA R68, -R68, c[0x3][0x8], R66 ; /* 0x00c0020044447a2b */ /* 0x0012060000000142 */ /*0a70*/ IMAD.WIDE R6, R5, 0x8, R72 ; /* 0x0000000805067825 */ /* 0x000fe200078e0248 */ /*0a80*/ @!P0 BRA 0x1570 ; /* 0x00000ae000008947 */ /* 0x000fea0003800000 */ /*0a90*/ ISETP.NE.AND P0, PT, R2, 0x2, PT ; /* 0x000000020200780c */ /* 0x007fda0003f05270 */ /*0aa0*/ @!P0 BRA 0x1250 ; /* 0x000007a000008947 */ /* 0x000fea0003800000 */ /*0ab0*/ MOV R6, c[0x0][0x1a8] ; /* 0x00006a0000067a02 */ /* 0x000fc80000000f00 */ /*0ac0*/ IADD3 R7, R6, -0x3, RZ ; /* 0xfffffffd06077810 */ /* 0x000fc80007ffe0ff */ /*0ad0*/ ISETP.GE.AND P0, PT, R2, R7, PT ; /* 0x000000070200720c */ /* 0x000fda0003f06270 */ /*0ae0*/ @!P0 BRA 0xf70 ; /* 0x0000048000008947 */ /* 0x000fea0003800000 */ /*0af0*/ ISETP.NE.AND P0, PT, R2, R7, PT ; /* 0x000000070200720c */ /* 0x000fda0003f05270 */ /*0b00*/ @!P0 BRA 0xd30 ; /* 0x0000022000008947 */ /* 0x000fea0003800000 */ /*0b10*/ IADD3 R7, R6, -0x2, RZ ; /* 0xfffffffe06077810 */ /* 0x000fc80007ffe0ff */ /*0b20*/ ISETP.NE.AND P0, PT, R2, R7, PT ; /* 0x000000070200720c */ /* 0x000fda0003f05270 */ /*0b30*/ @P0 BRA 0x17e0 ; /* 0x00000ca000000947 */ /* 0x000fea0003800000 */ /*0b40*/ IMAD R7, R4, c[0x0][0x1a8], RZ ; /* 0x00006a0004077a24 */ /* 0x000fe200078e02ff */ /*0b50*/ MOV R6, 0x8 ; /* 0x0000000800067802 */ /* 0x000fe20000000f00 */ /*0b60*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0b70*/ LDG.E.64 R16, [R16.64+-0x10] ; /* 0xfffff00410107981 */ /* 0x000ea2000c1e1b00 */ /*0b80*/ IADD3 R7, R7, R2, RZ ; /* 0x0000000207077210 */ /* 0x000fc60007ffe0ff */ /*0b90*/ LDG.E.64 R18, [R18.64+-0x10] ; /* 0xfffff00412127981 */ /* 0x000ee2000c1e1b00 */ /*0ba0*/ IADD3 R7, R7, -0x2, RZ ; /* 0xfffffffe07077810 */ /* 0x000fc60007ffe0ff */ /*0bb0*/ LDG.E.64 R14, [R14.64+-0x18] ; /* 0xffffe8040e0e7981 */ /* 0x000f24000c1e1b00 */ /*0bc0*/ IMAD.WIDE R6, R7, R6, c[0x0][0x1a0] ; /* 0x0000680007067625 */ /* 0x000fe400078e0206 */ /*0bd0*/ LDG.E.64 R58, [R58.64+-0x18] ; /* 0xffffe8043a3a7981 */ /* 0x000f68000c1e1b00 */ /*0be0*/ IMAD.WIDE R6, R5, 0x8, R6 ; /* 0x0000000805067825 */ /* 0x000fcc00078e0206 */ /*0bf0*/ IMAD.WIDE R6, R5, 0x8, R6 ; /* 0x0000000805067825 */ /* 0x000fcc00078e0206 */ /*0c00*/ IMAD.WIDE R6, R5, 0x8, R6 ; /* 0x0000000805067825 */ /* 0x000fcc00078e0206 */ /*0c10*/ IMAD.WIDE R12, R5, 0x8, R6 ; /* 0x00000008050c7825 */ /* 0x000fca00078e0206 */ /*0c20*/ LDG.E.64 R6, [R12.64] ; /* 0x000000040c067981 */ /* 0x000f62000c1e1b00 */ /*0c30*/ DFMA R10, R10, -4, R16 ; /* 0xc01000000a0a782b */ /* 0x004e080000000010 */ /*0c40*/ DFMA R52, R52, -4, R18 ; /* 0xc01000003434782b */ /* 0x008e480000000012 */ /*0c50*/ DFMA R22, R22, -4, R14 ; /* 0xc01000001616782b */ /* 0x010e88000000000e */ /*0c60*/ DFMA R62, R62, -4, R58 ; /* 0xc01000003e3e782b */ /* 0x020ec8000000003a */ /*0c70*/ DFMA R10, R46, 5, R10 ; /* 0x401400002e0a782b */ /* 0x001fc8000000000a */ /*0c80*/ DFMA R52, R30, 5, R52 ; /* 0x401400001e34782b */ /* 0x002fc80000000034 */ /*0c90*/ DFMA R22, R26, 5, R22 ; /* 0x401400001a16782b */ /* 0x004fc80000000016 */ /*0ca0*/ DFMA R62, R34, 5, R62 ; /* 0x40140000223e782b */ /* 0x008fc8000000003e */ /*0cb0*/ DFMA R6, R56, -4, R6 ; /* 0xc01000003806782b */ /* 0x000e0c0000000006 */ /*0cc0*/ DFMA R6, R32, 5, R6 ; /* 0x401400002006782b */ /* 0x001e080000000006 */ /*0cd0*/ DFMA R68, R10, -0.25, R68 ; /* 0xbfd000000a44782b */ /* 0x0002880000000044 */ /*0ce0*/ DFMA R78, R52, -0.25, R78 ; /* 0xbfd00000344e782b */ /* 0x0002c8000000004e */ /*0cf0*/ DFMA R82, R22, -0.25, R82 ; /* 0xbfd000001652782b */ /* 0x0003080000000052 */ /*0d00*/ DFMA R8, R62, -0.25, R8 ; /* 0xbfd000003e08782b */ /* 0x0002080000000008 */ /*0d10*/ DFMA R70, R6, -0.25, R70 ; /* 0xbfd000000646782b */ /* 0x0012220000000046 */ /*0d20*/ BRA 0x17e0 ; /* 0x00000ab000007947 */ /* 0x000fea0003800000 */ /*0d30*/ IMAD R7, R4, c[0x0][0x1a8], RZ ; /* 0x00006a0004077a24 */ /* 0x000fe200078e02ff */ /*0d40*/ MOV R6, 0x8 ; /* 0x0000000800067802 */ /* 0x000fe20000000f00 */ /*0d50*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0d60*/ LDG.E.64 R16, [R16.64+-0x10] ; /* 0xfffff00410107981 */ /* 0x000ea2000c1e1b00 */ /*0d70*/ IADD3 R7, R7, R2, RZ ; /* 0x0000000207077210 */ /* 0x000fc60007ffe0ff */ /*0d80*/ LDG.E.64 R18, [R18.64+-0x10] ; /* 0xfffff00412127981 */ /* 0x000ee2000c1e1b00 */ /*0d90*/ IADD3 R7, R7, -0x2, RZ ; /* 0xfffffffe07077810 */ /* 0x000fc60007ffe0ff */ /*0da0*/ LDG.E.64 R14, [R14.64+-0x18] ; /* 0xffffe8040e0e7981 */ /* 0x000f24000c1e1b00 */ /*0db0*/ IMAD.WIDE R6, R7, R6, c[0x0][0x1a0] ; /* 0x0000680007067625 */ /* 0x000fe400078e0206 */ /*0dc0*/ LDG.E.64 R58, [R58.64+-0x18] ; /* 0xffffe8043a3a7981 */ /* 0x000f68000c1e1b00 */ /*0dd0*/ IMAD.WIDE R6, R5, 0x8, R6 ; /* 0x0000000805067825 */ /* 0x000fcc00078e0206 */ /*0de0*/ IMAD.WIDE R6, R5, 0x8, R6 ; /* 0x0000000805067825 */ /* 0x000fcc00078e0206 */ /*0df0*/ IMAD.WIDE R6, R5, 0x8, R6 ; /* 0x0000000805067825 */ /* 0x000fcc00078e0206 */ /*0e00*/ IMAD.WIDE R64, R5, 0x8, R6 ; /* 0x0000000805407825 */ /* 0x000fcc00078e0206 */ /*0e10*/ LDG.E.64 R64, [R64.64] ; /* 0x0000000440407981 */ /* 0x000f62000c1e1b00 */ /*0e20*/ DFMA R6, R10, -4, R16 ; /* 0xc01000000a06782b */ /* 0x004e080000000010 */ /*0e30*/ DFMA R10, R52, -4, R18 ; /* 0xc0100000340a782b */ /* 0x008e480000000012 */ /*0e40*/ DFMA R6, R46, 6, R6 ; /* 0x401800002e06782b */ /* 0x001e080000000006 */ /*0e50*/ DFMA R10, R30, 6, R10 ; /* 0x401800001e0a782b */ /* 0x002e48000000000a */ /*0e60*/ DFMA R6, R12, -4, R6 ; /* 0xc01000000c06782b */ /* 0x001e080000000006 */ /*0e70*/ DFMA R10, R24, -4, R10 ; /* 0xc0100000180a782b */ /* 0x002e48000000000a */ /*0e80*/ DFMA R68, R6, -0.25, R68 ; /* 0xbfd000000644782b */ /* 0x001fc80000000044 */ /*0e90*/ DFMA R78, R10, -0.25, R78 ; /* 0xbfd000000a4e782b */ /* 0x002fc8000000004e */ /*0ea0*/ DFMA R6, R22, -4, R14 ; /* 0xc01000001606782b */ /* 0x010e08000000000e */ /*0eb0*/ DFMA R10, R62, -4, R58 ; /* 0xc01000003e0a782b */ /* 0x020e48000000003a */ /*0ec0*/ DFMA R12, R56, -4, R64 ; /* 0xc0100000380c782b */ /* 0x000e880000000040 */ /*0ed0*/ DFMA R6, R26, 6, R6 ; /* 0x401800001a06782b */ /* 0x001e080000000006 */ /*0ee0*/ DFMA R10, R34, 6, R10 ; /* 0x40180000220a782b */ /* 0x002e48000000000a */ /*0ef0*/ DFMA R12, R32, 6, R12 ; /* 0x40180000200c782b */ /* 0x004e88000000000c */ /*0f00*/ DFMA R6, R20, -4, R6 ; /* 0xc01000001406782b */ /* 0x001e080000000006 */ /*0f10*/ DFMA R10, R60, -4, R10 ; /* 0xc01000003c0a782b */ /* 0x002e48000000000a */ /*0f20*/ DFMA R12, R54, -4, R12 ; /* 0xc0100000360c782b */ /* 0x004e88000000000c */ /*0f30*/ DFMA R82, R6, -0.25, R82 ; /* 0xbfd000000652782b */ /* 0x0010c80000000052 */ /*0f40*/ DFMA R8, R10, -0.25, R8 ; /* 0xbfd000000a08782b */ /* 0x0020480000000008 */ /*0f50*/ DFMA R70, R12, -0.25, R70 ; /* 0xbfd000000c46782b */ /* 0x0040a20000000046 */ /*0f60*/ BRA 0x17e0 ; /* 0x0000087000007947 */ /* 0x000fea0003800000 */ /*0f70*/ IMAD R7, R4, c[0x0][0x1a8], RZ ; /* 0x00006a0004077a24 */ /* 0x000fe200078e02ff */ /*0f80*/ MOV R66, 0x8 ; /* 0x0000000800427802 */ /* 0x000fe20000000f00 */ /*0f90*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0fa0*/ LDG.E.64 R64, [R18.64+-0x10] ; /* 0xfffff00412407981 */ /* 0x000ea2000c1e1b00 */ /*0fb0*/ IADD3 R7, R7, R2, RZ ; /* 0x0000000207077210 */ /* 0x000fc60007ffe0ff */ /*0fc0*/ LDG.E.64 R72, [R58.64+-0x18] ; /* 0xffffe8043a487981 */ /* 0x000ee2000c1e1b00 */ /*0fd0*/ IADD3 R7, R7, -0x2, RZ ; /* 0xfffffffe07077810 */ /* 0x000fc60007ffe0ff */ /*0fe0*/ LDG.E.64 R88, [R16.64+0x10] ; /* 0x0000100410587981 */ /* 0x000f24000c1e1b00 */ /*0ff0*/ IMAD.WIDE R66, R7, R66, c[0x0][0x1a0] ; /* 0x0000680007427625 */ /* 0x000fe400078e0242 */ /*1000*/ LDG.E.64 R6, [R16.64+-0x10] ; /* 0xfffff00410067981 */ /* 0x000f68000c1e1b00 */ /*1010*/ IMAD.WIDE R66, R5.reuse, 0x8, R66 ; /* 0x0000000805427825 */ /* 0x040fe200078e0242 */ /*1020*/ LDG.E.64 R86, [R18.64+0x10] ; /* 0x0000100412567981 */ /* 0x000f28000c1e1b00 */ /*1030*/ LDG.E.64 R84, [R14.64+0x8] ; /* 0x000008040e547981 */ /* 0x000f22000c1e1b00 */ /*1040*/ IMAD.WIDE R66, R5, 0x8, R66 ; /* 0x0000000805427825 */ /* 0x000fc600078e0242 */ /*1050*/ LDG.E.64 R80, [R58.64+0x8] ; /* 0x000008043a507981 */ /* 0x000f26000c1e1b00 */ /*1060*/ IMAD.WIDE R66, R5, 0x8, R66 ; /* 0x0000000805427825 */ /* 0x000fcc00078e0242 */ /*1070*/ IMAD.WIDE R90, R5, 0x8, R66 ; /* 0x00000008055a7825 */ /* 0x000fe400078e0242 */ /*1080*/ LDG.E.64 R66, [R14.64+-0x18] ; /* 0xffffe8040e427981 */ /* 0x000f28000c1e1b00 */ /*1090*/ LDG.E.64 R74, [R90.64] ; /* 0x000000045a4a7981 */ /* 0x000f28000c1e1b00 */ /*10a0*/ LDG.E.64 R76, [R90.64+0x20] ; /* 0x000020045a4c7981 */ /* 0x000f22000c1e1b00 */ /*10b0*/ DFMA R64, R52, -4, R64 ; /* 0xc01000003440782b */ /* 0x004e080000000040 */ /*10c0*/ DFMA R72, R62, -4, R72 ; /* 0xc01000003e48782b */ /* 0x008fc80000000048 */ /*10d0*/ DFMA R6, R10, -4, R6 ; /* 0xc01000000a06782b */ /* 0x020e480000000006 */ /*10e0*/ DFMA R64, R30, 6, R64 ; /* 0x401800001e40782b */ /* 0x001fc80000000040 */ /*10f0*/ DFMA R6, R46, 6, R6 ; /* 0x401800002e06782b */ /* 0x002fc80000000006 */ /*1100*/ DFMA R72, R34, 6, R72 ; /* 0x401800002248782b */ /* 0x000fc80000000048 */ /*1110*/ DFMA R66, R22, -4, R66 ; /* 0xc01000001642782b */ /* 0x010e080000000042 */ /*1120*/ DFMA R74, R56, -4, R74 ; /* 0xc0100000384a782b */ /* 0x000e48000000004a */ /*1130*/ DFMA R66, R26, 6, R66 ; /* 0x401800001a42782b */ /* 0x001e080000000042 */ /*1140*/ DFMA R74, R32, 6, R74 ; /* 0x40180000204a782b */ /* 0x002e48000000004a */ /*1150*/ DFMA R6, R12, -4, R6 ; /* 0xc01000000c06782b */ /* 0x000e880000000006 */ /*1160*/ DFMA R64, R24, -4, R64 ; /* 0xc01000001840782b */ /* 0x000ec80000000040 */ /*1170*/ DFMA R66, R20, -4, R66 ; /* 0xc01000001442782b */ /* 0x001e080000000042 */ /*1180*/ DFMA R72, R60, -4, R72 ; /* 0xc01000003c48782b */ /* 0x000f080000000048 */ /*1190*/ DFMA R74, R54, -4, R74 ; /* 0xc0100000364a782b */ /* 0x002e48000000004a */ /*11a0*/ DADD R88, R88, R6 ; /* 0x0000000058587229 */ /* 0x004e880000000006 */ /*11b0*/ DADD R86, R86, R64 ; /* 0x0000000056567229 */ /* 0x008ec80000000040 */ /*11c0*/ DADD R84, R84, R66 ; /* 0x0000000054547229 */ /* 0x001e080000000042 */ /*11d0*/ DADD R80, R80, R72 ; /* 0x0000000050507229 */ /* 0x010f080000000048 */ /*11e0*/ DADD R76, R76, R74 ; /* 0x000000004c4c7229 */ /* 0x002e48000000004a */ /*11f0*/ DFMA R68, R88, -0.25, R68 ; /* 0xbfd000005844782b */ /* 0x0044080000000044 */ /*1200*/ DFMA R78, R86, -0.25, R78 ; /* 0xbfd00000564e782b */ /* 0x0084c8000000004e */ /*1210*/ DFMA R82, R84, -0.25, R82 ; /* 0xbfd000005452782b */ /* 0x0014080000000052 */ /*1220*/ DFMA R8, R80, -0.25, R8 ; /* 0xbfd000005008782b */ /* 0x0105080000000008 */ /*1230*/ DFMA R70, R76, -0.25, R70 ; /* 0xbfd000004c46782b */ /* 0x0024620000000046 */ /*1240*/ BRA 0x17e0 ; /* 0x0000059000007947 */ /* 0x000fea0003800000 */ /*1250*/ IMAD.WIDE R84, R5.reuse, 0x8, R6 ; /* 0x0000000805547825 */ /* 0x040fe200078e0206 */ /*1260*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*1270*/ LDG.E.64 R80, [R64.64+0x8] ; /* 0x0000080440507981 */ /* 0x0000a2000c1e1b00 */ /*1280*/ IMAD.WIDE R74, R5, 0x8, R64 ; /* 0x00000008054a7825 */ /* 0x000fc600078e0240 */ /*1290*/ LDG.E.64 R22, [R6.64] ; /* 0x0000000406167981 */ /* 0x000ee2000c1e1b00 */ /*12a0*/ IMAD.WIDE R86, R5, 0x8, R84 ; /* 0x0000000805567825 */ /* 0x000fc600078e0254 */ /*12b0*/ LDG.E.64 R18, [R74.64+0x8] ; /* 0x000008044a127981 */ /* 0x000328000c1e1b00 */ /*12c0*/ LDG.E.64 R52, [R84.64] ; /* 0x0000000454347981 */ /* 0x000f68000c1e1b00 */ /*12d0*/ LDG.E.64 R24, [R86.64] ; /* 0x0000000456187981 */ /* 0x000f68000c1e1b00 */ /*12e0*/ LDG.E.64 R16, [R64.64+0x10] ; /* 0x0000100440107981 */ /* 0x000168000c1e1b00 */ /*12f0*/ LDG.E.64 R14, [R74.64+0x10] ; /* 0x000010044a0e7981 */ /* 0x000368000c1e1b00 */ /*1300*/ LDG.E.64 R66, [R6.64+0x8] ; /* 0x0000080406427981 */ /* 0x000f68000c1e1b00 */ /*1310*/ LDG.E.64 R62, [R84.64+0x8] ; /* 0x00000804543e7981 */ /* 0x000f68000c1e1b00 */ /*1320*/ LDG.E.64 R60, [R86.64+0x8] ; /* 0x00000804563c7981 */ /* 0x000f68000c1e1b00 */ /*1330*/ LDG.E.64 R12, [R64.64+0x18] ; /* 0x00001804400c7981 */ /* 0x000168000c1e1b00 */ /*1340*/ LDG.E.64 R10, [R74.64+0x18] ; /* 0x000018044a0a7981 */ /* 0x000368000c1e1b00 */ /*1350*/ LDG.E.64 R58, [R6.64+0x10] ; /* 0x00001004063a7981 */ /* 0x000f68000c1e1b00 */ /*1360*/ LDG.E.64 R56, [R84.64+0x10] ; /* 0x0000100454387981 */ /* 0x000f68000c1e1b00 */ /*1370*/ LDG.E.64 R54, [R86.64+0x10] ; /* 0x0000100456367981 */ /* 0x000f68000c1e1b00 */ /*1380*/ LDG.E.64 R20, [R64.64+0x20] ; /* 0x0000200440147981 */ /* 0x000168000c1e1b00 */ /*1390*/ LDG.E.64 R72, [R74.64+0x20] ; /* 0x000020044a487981 */ /* 0x000368000c1e1b00 */ /*13a0*/ LDG.E.64 R76, [R6.64+0x18] ; /* 0x00001804064c7981 */ /* 0x000f68000c1e1b00 */ /*13b0*/ LDG.E.64 R64, [R86.64+0x18] ; /* 0x0000180456407981 */ /* 0x001f68000c1e1b00 */ /*13c0*/ LDG.E.64 R74, [R84.64+0x18] ; /* 0x00001804544a7981 */ /* 0x002f62000c1e1b00 */ /*13d0*/ DMUL R80, R80, 4 ; /* 0x4010000050507828 */ /* 0x004e080000000000 */ /*13e0*/ DMUL R22, R22, 4 ; /* 0x4010000016167828 */ /* 0x008fc80000000000 */ /*13f0*/ DMUL R18, R18, 4 ; /* 0x4010000012127828 */ /* 0x010e480000000000 */ /*1400*/ DMUL R52, R52, 4 ; /* 0x4010000034347828 */ /* 0x020e880000000000 */ /*1410*/ DMUL R24, R24, 4 ; /* 0x4010000018187828 */ /* 0x000ec80000000000 */ /*1420*/ DFMA R16, R16, 6, -R80 ; /* 0x401800001010782b */ /* 0x001e080000000850 */ /*1430*/ DFMA R14, R14, 6, -R18 ; /* 0x401800000e0e782b */ /* 0x002e480000000812 */ /*1440*/ DFMA R22, R66, 6, -R22 ; /* 0x401800004216782b */ /* 0x000f080000000816 */ /*1450*/ DFMA R52, R62, 6, -R52 ; /* 0x401800003e34782b */ /* 0x004e880000000834 */ /*1460*/ DFMA R24, R60, 6, -R24 ; /* 0x401800003c18782b */ /* 0x008ec80000000818 */ /*1470*/ DFMA R12, R12, -4, R16 ; /* 0xc01000000c0c782b */ /* 0x001e080000000010 */ /*1480*/ DFMA R10, R10, -4, R14 ; /* 0xc01000000a0a782b */ /* 0x002e48000000000e */ /*1490*/ DFMA R22, R58, -4, R22 ; /* 0xc01000003a16782b */ /* 0x010f080000000016 */ /*14a0*/ DFMA R52, R56, -4, R52 ; /* 0xc01000003834782b */ /* 0x004fc80000000034 */ /*14b0*/ DFMA R24, R54, -4, R24 ; /* 0xc01000003618782b */ /* 0x008e880000000018 */ /*14c0*/ DADD R12, R12, R20 ; /* 0x000000000c0c7229 */ /* 0x001e080000000014 */ /*14d0*/ DADD R10, R10, R72 ; /* 0x000000000a0a7229 */ /* 0x002e480000000048 */ /*14e0*/ DADD R22, R22, R76 ; /* 0x0000000016167229 */ /* 0x010ec8000000004c */ /*14f0*/ DADD R24, R24, R64 ; /* 0x0000000018187229 */ /* 0x004fc80000000040 */ /*1500*/ DADD R52, R52, R74 ; /* 0x0000000034347229 */ /* 0x000e88000000004a */ /*1510*/ DFMA R68, R12, -0.25, R68 ; /* 0xbfd000000c44782b */ /* 0x0011080000000044 */ /*1520*/ DFMA R78, R10, -0.25, R78 ; /* 0xbfd000000a4e782b */ /* 0x002048000000004e */ /*1530*/ DFMA R82, R22, -0.25, R82 ; /* 0xbfd000001652782b */ /* 0x0080c80000000052 */ /*1540*/ DFMA R8, R52, -0.25, R8 ; /* 0xbfd000003408782b */ /* 0x0040880000000008 */ /*1550*/ DFMA R70, R24, -0.25, R70 ; /* 0xbfd000001846782b */ /* 0x0000220000000046 */ /*1560*/ BRA 0x17e0 ; /* 0x0000027000007947 */ /* 0x000fea0003800000 */ /*1570*/ IMAD.WIDE R58, R5.reuse, 0x8, R6 ; /* 0x00000008053a7825 */ /* 0x047fe200078e0206 */ /*1580*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*1590*/ LDG.E.64 R56, [R64.64+0x10] ; /* 0x0000100440387981 */ /* 0x000ea2000c1e1b00 */ /*15a0*/ IMAD.WIDE R54, R5, 0x8, R64 ; /* 0x0000000805367825 */ /* 0x000fc600078e0240 */ /*15b0*/ LDG.E.64 R52, [R6.64+0x8] ; /* 0x0000080406347981 */ /* 0x000ee2000c1e1b00 */ /*15c0*/ IMAD.WIDE R60, R5, 0x8, R58 ; /* 0x00000008053c7825 */ /* 0x000fc600078e023a */ /*15d0*/ LDG.E.64 R74, [R54.64+0x10] ; /* 0x00001004364a7981 */ /* 0x000528000c1e1b00 */ /*15e0*/ LDG.E.64 R24, [R58.64+0x8] ; /* 0x000008043a187981 */ /* 0x000f68000c1e1b00 */ /*15f0*/ LDG.E.64 R22, [R60.64+0x8] ; /* 0x000008043c167981 */ /* 0x000f68000c1e1b00 */ /*1600*/ LDG.E.64 R62, [R64.64+0x8] ; /* 0x00000804403e7981 */ /* 0x000f68000c1e1b00 */ /*1610*/ LDG.E.64 R72, [R54.64+0x8] ; /* 0x0000080436487981 */ /* 0x000568000c1e1b00 */ /*1620*/ LDG.E.64 R20, [R6.64] ; /* 0x0000000406147981 */ /* 0x000f68000c1e1b00 */ /*1630*/ LDG.E.64 R18, [R58.64] ; /* 0x000000043a127981 */ /* 0x000f68000c1e1b00 */ /*1640*/ LDG.E.64 R10, [R60.64] ; /* 0x000000043c0a7981 */ /* 0x000f68000c1e1b00 */ /*1650*/ LDG.E.64 R66, [R64.64+0x18] ; /* 0x0000180440427981 */ /* 0x000f68000c1e1b00 */ /*1660*/ LDG.E.64 R76, [R54.64+0x18] ; /* 0x00001804364c7981 */ /* 0x000568000c1e1b00 */ /*1670*/ LDG.E.64 R12, [R6.64+0x10] ; /* 0x00001004060c7981 */ /* 0x000f68000c1e1b00 */ /*1680*/ LDG.E.64 R14, [R58.64+0x10] ; /* 0x000010043a0e7981 */ /* 0x000f68000c1e1b00 */ /*1690*/ LDG.E.64 R16, [R60.64+0x10] ; /* 0x000010043c107981 */ /* 0x000f62000c1e1b00 */ /*16a0*/ DMUL R54, R56, 4 ; /* 0x4010000038367828 */ /* 0x004e080000000000 */ /*16b0*/ DMUL R52, R52, 4 ; /* 0x4010000034347828 */ /* 0x008fc80000000000 */ /*16c0*/ DMUL R56, R74, 4 ; /* 0x401000004a387828 */ /* 0x010e480000000000 */ /*16d0*/ DMUL R24, R24, 4 ; /* 0x4010000018187828 */ /* 0x020e880000000000 */ /*16e0*/ DMUL R22, R22, 4 ; /* 0x4010000016167828 */ /* 0x000ec80000000000 */ /*16f0*/ DFMA R54, R62, 5, -R54 ; /* 0x401400003e36782b */ /* 0x001e080000000836 */ /*1700*/ DFMA R56, R72, 5, -R56 ; /* 0x401400004838782b */ /* 0x002e480000000838 */ /*1710*/ DFMA R20, R20, 5, -R52 ; /* 0x401400001414782b */ /* 0x000f080000000834 */ /*1720*/ DFMA R18, R18, 5, -R24 ; /* 0x401400001212782b */ /* 0x004e880000000818 */ /*1730*/ DFMA R10, R10, 5, -R22 ; /* 0x401400000a0a782b */ /* 0x008ec80000000816 */ /*1740*/ DADD R54, R54, R66 ; /* 0x0000000036367229 */ /* 0x001e080000000042 */ /*1750*/ DADD R56, R56, R76 ; /* 0x0000000038387229 */ /* 0x002e48000000004c */ /*1760*/ DADD R12, R20, R12 ; /* 0x00000000140c7229 */ /* 0x010f08000000000c */ /*1770*/ DADD R14, R18, R14 ; /* 0x00000000120e7229 */ /* 0x004e88000000000e */ /*1780*/ DADD R10, R10, R16 ; /* 0x000000000a0a7229 */ /* 0x008ec80000000010 */ /*1790*/ DFMA R68, R54, -0.25, R68 ; /* 0xbfd000003644782b */ /* 0x0010080000000044 */ /*17a0*/ DFMA R78, R56, -0.25, R78 ; /* 0xbfd00000384e782b */ /* 0x002208000000004e */ /*17b0*/ DFMA R82, R12, -0.25, R82 ; /* 0xbfd000000c52782b */ /* 0x0103080000000052 */ /*17c0*/ DFMA R8, R14, -0.25, R8 ; /* 0xbfd000000e08782b */ /* 0x0042880000000008 */ /*17d0*/ DFMA R70, R10, -0.25, R70 ; /* 0xbfd000000a46782b */ /* 0x0082cc0000000046 */ /*17e0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x01ffea0003800000 */ /*17f0*/ IADD3 R6, R3.reuse, 0x1, RZ ; /* 0x0000000103067810 */ /* 0x040fe20007ffe0ff */ /*1800*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fe20000000a00 */ /*1810*/ IADD3 R87, RZ, -c[0x0][0x1a8], RZ ; /* 0x80006a00ff577a10 */ /* 0x000fe40007ffe0ff */ /*1820*/ MOV R10, c[0x0][0x1ac] ; /* 0x00006b00000a7a02 */ /* 0x000fe20000000f00 */ /*1830*/ IMAD R18, R6, c[0x0][0x1a8], RZ ; /* 0x00006a0006127a24 */ /* 0x000fe200078e02ff */ /*1840*/ IADD3 R59, R0.reuse, c[0x0][0x1b0], RZ ; /* 0x00006c00003b7a10 */ /* 0x040fe20007ffe0ff */ /*1850*/ IMAD R6, R0, c[0x0][0x1ac], RZ ; /* 0x00006b0000067a24 */ /* 0x000fe200078e02ff */ /*1860*/ IADD3 R20, R3, 0x1, RZ ; /* 0x0000000103147810 */ /* 0x000fe20007ffe0ff */ /*1870*/ IMAD R10, R10, c[0x0][0x1b0], RZ ; /* 0x00006c000a0a7a24 */ /* 0x000fe200078e02ff */ /*1880*/ LEA R19, R87, R18, 0x1 ; /* 0x0000001257137211 */ /* 0x000fc400078e08ff */ /*1890*/ IADD3 R11, R18, R2.reuse, RZ ; /* 0x00000002120b7210 */ /* 0x080fe20007ffe0ff */ /*18a0*/ IMAD R21, R20, c[0x0][0x1a8], RZ ; /* 0x00006a0014157a24 */ /* 0x000fe200078e02ff */ /*18b0*/ IADD3 R19, R19, R2, RZ ; /* 0x0000000213137210 */ /* 0x000fe20007ffe0ff */ /*18c0*/ IMAD R10, R10, c[0x0][0x1a8], RZ ; /* 0x00006a000a0a7a24 */ /* 0x000fe200078e02ff */ /*18d0*/ IADD3 R18, R3.reuse, -0x1, RZ ; /* 0xffffffff03127810 */ /* 0x040fe20007ffe0ff */ /*18e0*/ IMAD R56, R6.reuse, c[0x0][0x1a8], R11 ; /* 0x00006a0006387a24 */ /* 0x040fe200078e020b */ /*18f0*/ IADD3 R13, R3, -0x1, RZ ; /* 0xffffffff030d7810 */ /* 0x000fe20007ffe0ff */ /*1900*/ IMAD R84, R6, c[0x0][0x1a8], R19 ; /* 0x00006a0006547a24 */ /* 0x000fe200078e0213 */ /*1910*/ MOV R58, c[0x0][0x1b0] ; /* 0x00006c00003a7a02 */ /* 0x000fe20000000f00 */ /*1920*/ IMAD R19, R59, c[0x0][0x1ac], R20 ; /* 0x00006b003b137a24 */ /* 0x000fe200078e0214 */ /*1930*/ MOV R7, 0x8 ; /* 0x0000000800077802 */ /* 0x000fc40000000f00 */ /*1940*/ IADD3 R13, R6, R13, RZ ; /* 0x0000000d060d7210 */ /* 0x000fe20007ffe0ff */ /*1950*/ IMAD R24, R19, c[0x0][0x1a8], R2 ; /* 0x00006a0013187a24 */ /* 0x000fe200078e0202 */ /*1960*/ SHF.L.U32 R86, R10, 0x1, RZ ; /* 0x000000010a567819 */ /* 0x000fe200000006ff */ /*1970*/ IMAD R19, R59, c[0x0][0x1ac], R18 ; /* 0x00006b003b137a24 */ /* 0x000fe400078e0212 */ /*1980*/ IMAD.WIDE R16, R56, R7, c[0x0][0x1a0] ; /* 0x0000680038107625 */ /* 0x000fc800078e0207 */ /*1990*/ IMAD R22, R19, c[0x0][0x1a8], R2.reuse ; /* 0x00006a0013167a24 */ /* 0x100fe200078e0202 */ /*19a0*/ IADD3 R19, R21, R2.reuse, RZ ; /* 0x0000000215137210 */ /* 0x080fe20007ffe0ff */ /*19b0*/ IMAD R14, R13, c[0x0][0x1a8], R2 ; /* 0x00006a000d0e7a24 */ /* 0x000fe200078e0202 */ /*19c0*/ LEA R21, R87, R21, 0x1 ; /* 0x0000001557157211 */ /* 0x000fe200078e08ff */ /*19d0*/ IMAD.WIDE R12, R86, 0x8, R16 ; /* 0x00000008560c7825 */ /* 0x000fe200078e0210 */ /*19e0*/ LEA R59, R58, R59, 0x1 ; /* 0x0000003b3a3b7211 */ /* 0x000fe200078e08ff */ /*19f0*/ LDG.E.64 R16, [R16.64] ; /* 0x0000000810107981 */ /* 0x000ea2000c1e1b00 */ /*1a00*/ IADD3 R21, R21, R2, RZ ; /* 0x0000000215157210 */ /* 0x000fe20007ffe0ff */ /*1a10*/ IMAD R88, R6, c[0x0][0x1a8], R19 ; /* 0x00006a0006587a24 */ /* 0x000fe400078e0213 */ /*1a20*/ IMAD R19, R59, c[0x0][0x1ac], R20 ; /* 0x00006b003b137a24 */ /* 0x000fe200078e0214 */ /*1a30*/ LDG.E.64 R52, [R12.64] ; /* 0x000000080c347981 */ /* 0x0000e2000c1e1b00 */ /*1a40*/ IMAD.WIDE R76, R88, R7, c[0x0][0x168] ; /* 0x00005a00584c7625 */ /* 0x000fc800078e0207 */ /*1a50*/ IMAD R90, R6, c[0x0][0x1a8], R21 ; /* 0x00006a00065a7a24 */ /* 0x000fe400078e0215 */ /*1a60*/ IMAD R20, R19, c[0x0][0x1a8], R2 ; /* 0x00006a0013147a24 */ /* 0x000fe200078e0202 */ /*1a70*/ LDG.E.64 R76, [R76.64] ; /* 0x000000084c4c7981 */ /* 0x000f22000c1e1b00 */ /*1a80*/ IMAD R19, R59, c[0x0][0x1ac], R18 ; /* 0x00006b003b137a24 */ /* 0x000fe400078e0212 */ /*1a90*/ IMAD.WIDE R64, R90, R7, c[0x0][0x168] ; /* 0x00005a005a407625 */ /* 0x000fc800078e0207 */ /*1aa0*/ IMAD.WIDE R20, R20, R7.reuse, c[0x0][0x1a0] ; /* 0x0000680014147625 */ /* 0x080fe400078e0207 */ /*1ab0*/ LDG.E.64 R64, [R64.64] ; /* 0x0000000840407981 */ /* 0x000f64000c1e1b00 */ /*1ac0*/ IMAD.WIDE R14, R14, R7, c[0x0][0x1a0] ; /* 0x000068000e0e7625 */ /* 0x000fe400078e0207 */ /*1ad0*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000814147981 */ /* 0x000ea4000c1e1b00 */ /*1ae0*/ IMAD R18, R19, c[0x0][0x1a8], R2 ; /* 0x00006a0013127a24 */ /* 0x000fe400078e0202 */ /*1af0*/ IMAD.WIDE R10, R86, 0x8, R14 ; /* 0x00000008560a7825 */ /* 0x000fc400078e020e */ /*1b00*/ LDG.E.64 R14, [R14.64] ; /* 0x000000080e0e7981 */ /* 0x000ea4000c1e1b00 */ /*1b10*/ IMAD.WIDE R18, R18, R7.reuse, c[0x0][0x1a0] ; /* 0x0000680012127625 */ /* 0x080fe400078e0207 */ /*1b20*/ LDG.E.64 R54, [R10.64] ; /* 0x000000080a367981 */ /* 0x0002a4000c1e1b00 */ /*1b30*/ IMAD.WIDE R74, R88, R7.reuse, c[0x0][0x178] ; /* 0x00005e00584a7625 */ /* 0x080fe400078e0207 */ /*1b40*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000812127981 */ /* 0x000ea4000c1e1b00 */ /*1b50*/ IMAD.WIDE R56, R56, R7, c[0x0][0x170] ; /* 0x00005c0038387625 */ /* 0x000fc400078e0207 */ /*1b60*/ LDG.E.64 R74, [R74.64] ; /* 0x000000084a4a7981 */ /* 0x000ea4000c1e1b00 */ /*1b70*/ IMAD.WIDE R66, R90, R7.reuse, c[0x0][0x178] ; /* 0x00005e005a427625 */ /* 0x080fe400078e0207 */ /*1b80*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000838387981 */ /* 0x000ea4000c1e1b00 */ /*1b90*/ IMAD.WIDE R84, R84, R7, c[0x0][0x170] ; /* 0x00005c0054547625 */ /* 0x000fe400078e0207 */ /*1ba0*/ LDG.E.64 R66, [R66.64] ; /* 0x0000000842427981 */ /* 0x000ea4000c1e1b00 */ /*1bb0*/ IMAD.WIDE R12, R86, 0x8, R12 ; /* 0x00000008560c7825 */ /* 0x001fc400078e020c */ /*1bc0*/ LDG.E.64 R84, [R84.64] ; /* 0x0000000854547981 */ /* 0x000ea4000c1e1b00 */ /*1bd0*/ IMAD.WIDE R10, R86, 0x8, R10 ; /* 0x00000008560a7825 */ /* 0x002fe400078e020a */ /*1be0*/ LDG.E.64 R12, [R12.64] ; /* 0x000000080c0c7981 */ /* 0x000ea4000c1e1b00 */ /*1bf0*/ IMAD.WIDE R24, R24, R7.reuse, c[0x0][0x1a0] ; /* 0x0000680018187625 */ /* 0x080fe400078e0207 */ /*1c00*/ LDG.E.64 R10, [R10.64] ; /* 0x000000080a0a7981 */ /* 0x000ea4000c1e1b00 */ /*1c10*/ IMAD.WIDE R58, R90, R7, c[0x0][0x188] ; /* 0x000062005a3a7625 */ /* 0x000fc400078e0207 */ /*1c20*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000ea4000c1e1b00 */ /*1c30*/ IMAD.WIDE R22, R22, R7.reuse, c[0x0][0x1a0] ; /* 0x0000680016167625 */ /* 0x080fe400078e0207 */ /*1c40*/ LDG.E.64 R58, [R58.64] ; /* 0x000000083a3a7981 */ /* 0x000ea4000c1e1b00 */ /*1c50*/ IMAD.WIDE R60, R88, R7, c[0x0][0x188] ; /* 0x00006200583c7625 */ /* 0x000fe400078e0207 */ /*1c60*/ LDG.E.64 R22, [R22.64] ; /* 0x0000000816167981 */ /* 0x000ea8000c1e1b00 */ /*1c70*/ LDG.E.64 R60, [R60.64] ; /* 0x000000083c3c7981 */ /* 0x000ea2000c1e1b00 */ /*1c80*/ DADD R62, R26, R26 ; /* 0x000000001a3e7229 */ /* 0x000ec8000000001a */ /*1c90*/ DADD R72, R28, R28 ; /* 0x000000001c487229 */ /* 0x000fe2000000001c */ /*1ca0*/ MOV R80, c[0x3][0x150] ; /* 0x00c0540000507a02 */ /* 0x000fe40000000f00 */ /*1cb0*/ MOV R81, c[0x3][0x154] ; /* 0x00c0550000517a02 */ /* 0x000fcc0000000f00 */ /*1cc0*/ DMUL R80, R80, c[0x2][0x0] ; /* 0x0080000050507a28 */ /* 0x000fc80000000000 */ /*1cd0*/ DADD R62, -R62, R52 ; /* 0x000000003e3e7229 */ /* 0x008fc80000000134 */ /*1ce0*/ DADD R76, -R38, R76 ; /* 0x00000000264c7229 */ /* 0x010f4c000000014c */ /*1cf0*/ DADD R64, R76, R64 ; /* 0x000000004c407229 */ /* 0x020fc80000000040 */ /*1d00*/ DADD R76, -R42, R20 ; /* 0x000000002a4c7229 */ /* 0x004e080000000114 */ /*1d10*/ DADD R62, R54, R62 ; /* 0x00000000363e7229 */ /* 0x000e48000000003e */ /*1d20*/ DADD R76, R76, R18 ; /* 0x000000004c4c7229 */ /* 0x001e080000000012 */ /*1d30*/ DFMA R82, R62, c[0x3][0x180], R82 ; /* 0x00c060003e527a2b */ /* 0x002fc80000000052 */ /*1d40*/ DFMA R76, R76, c[0x3][0x188], R8 ; /* 0x00c062004c4c7a2b */ /* 0x001fc80000000008 */ /*1d50*/ DADD R74, -R44, R74 ; /* 0x000000002c4a7229 */ /* 0x000e08000000014a */ /*1d60*/ DADD R62, -R72, R56 ; /* 0x00000000483e7229 */ /* 0x000e480000000138 */ /*1d70*/ DADD R8, R46, R46 ; /* 0x000000002e087229 */ /* 0x000e88000000002e */ /*1d80*/ DADD R66, R74, R66 ; /* 0x000000004a427229 */ /* 0x001e080000000042 */ /*1d90*/ DADD R62, R84, R62 ; /* 0x00000000543e7229 */ /* 0x002e48000000003e */ /*1da0*/ DADD R74, -R8, R16 ; /* 0x00000000084a7229 */ /* 0x004e880000000110 */ /*1db0*/ DFMA R66, R66, c[0x3][0x150], R76 ; /* 0x00c0540042427a2b */ /* 0x001fc8000000004c */ /*1dc0*/ DFMA R62, R80, R62, R82 ; /* 0x0000003e503e722b */ /* 0x002fc80000000052 */ /*1dd0*/ DADD R74, R74, R14 ; /* 0x000000004a4a7229 */ /* 0x004e08000000000e */ /*1de0*/ DADD R76, -R40, R12 ; /* 0x00000000284c7229 */ /* 0x000e48000000010c */ /*1df0*/ DADD R80, R30, R30 ; /* 0x000000001e507229 */ /* 0x000e88000000001e */ /*1e00*/ DFMA R68, R74, c[0x3][0x170], R68 ; /* 0x00c05c004a447a2b */ /* 0x001fc80000000044 */ /*1e10*/ DADD R76, R10, R76 ; /* 0x000000000a4c7229 */ /* 0x002e08000000004c */ /*1e20*/ DADD R80, -R80, R24 ; /* 0x0000000050507229 */ /* 0x004e480000000118 */ /*1e30*/ DMUL R74, R58, c[0x2][0x8] ; /* 0x008002003a4a7a28 */ /* 0x000e880000000000 */ /*1e40*/ DFMA R70, R76, c[0x3][0x190], R70 ; /* 0x00c064004c467a2b */ /* 0x001fc80000000046 */ /*1e50*/ DADD R80, R80, R22 ; /* 0x0000000050507229 */ /* 0x002e080000000016 */ /*1e60*/ DMUL R76, R60, c[0x2][0x8] ; /* 0x008002003c4c7a28 */ /* 0x000e480000000000 */ /*1e70*/ DFMA R74, R10, c[0x2][0x10], -R74 ; /* 0x008004000a4a7a2b */ /* 0x004e88000000084a */ /*1e80*/ DFMA R80, R80, c[0x3][0x178], R78 ; /* 0x00c05e0050507a2b */ /* 0x001fc8000000004e */ /*1e90*/ DFMA R76, R12, c[0x2][0x10], -R76 ; /* 0x008004000c4c7a2b */ /* 0x002fc8000000084c */ /*1ea0*/ DMUL R74, R84, R74 ; /* 0x0000004a544a7228 */ /* 0x004e080000000000 */ /*1eb0*/ DMUL R78, R28, R72 ; /* 0x000000481c4e7228 */ /* 0x000e480000000000 */ /*1ec0*/ DFMA R72, R56.reuse, R76, -R74 ; /* 0x0000004c3848722b */ /* 0x0411e4000000084a */ /*1ed0*/ IMAD.WIDE R74, R88, R7, c[0x0][0x180] ; /* 0x00006000584a7625 */ /* 0x001fe400078e0207 */ /*1ee0*/ DFMA R76, R56, R56, -R78 ; /* 0x00000038384c722b */ /* 0x002048000000084e */ /*1ef0*/ DFMA R64, R64, c[0x3][0x150], R80 ; /* 0x00c0540040407a2b */ /* 0x000fe20000000050 */ /*1f00*/ LDG.E.64 R74, [R74.64] ; /* 0x000000084a4a7981 */ /* 0x000ea2000c1e1b00 */ /*1f10*/ IMAD.WIDE R78, R90, R7, c[0x0][0x180] ; /* 0x000060005a4e7625 */ /* 0x001fe400078e0207 */ /*1f20*/ DFMA R76, R84, R84, R76 ; /* 0x00000054544c722b */ /* 0x002fc8000000004c */ /*1f30*/ DMUL R80, R54, R84.reuse ; /* 0x0000005436507228 */ /* 0x080e220000000000 */ /*1f40*/ LDG.E.64 R78, [R78.64] ; /* 0x000000084e4e7981 */ /* 0x000ee6000c1e1b00 */ /*1f50*/ DMUL R82, R22, R84 ; /* 0x0000005416527228 */ /* 0x000e480000000000 */ /*1f60*/ DMUL R84, R84, R18 ; /* 0x0000001254547228 */ /* 0x000f080000000000 */ /*1f70*/ DFMA R80, R52, R56, -R80 ; /* 0x000000383450722b */ /* 0x001fc80000000850 */ /*1f80*/ DFMA R82, R24, R56, -R82 ; /* 0x000000381852722b */ /* 0x002fc80000000852 */ /*1f90*/ DFMA R84, R56, R20, -R84 ; /* 0x000000143854722b */ /* 0x0101e40000000854 */ /*1fa0*/ IMAD.WIDE R56, R88, R7, c[0x0][0x160] ; /* 0x0000580058387625 */ /* 0x001fc800078e0207 */ /*1fb0*/ IMAD.WIDE R88, R90, R7, c[0x0][0x160] ; /* 0x000058005a587625 */ /* 0x000fe400078e0207 */ /*1fc0*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000838387981 */ /* 0x000f28000c1e1b00 */ /*1fd0*/ LDG.E.64 R88, [R88.64] ; /* 0x0000000858587981 */ /* 0x000f62000c1e1b00 */ /*1fe0*/ DADD R60, -R60, R12 ; /* 0x000000003c3c7229 */ /* 0x000e0c000000010c */ /*1ff0*/ DADD R60, R60, -R10 ; /* 0x000000003c3c7229 */ /* 0x001e22000000080a */ /*2000*/ ISETP.NE.AND P0, PT, R3, 0x1, PT ; /* 0x000000010300780c */ /* 0x000fca0003f05270 */ /*2010*/ DADD R58, R60, R58 ; /* 0x000000003c3a7229 */ /* 0x001064000000003a */ /*2020*/ IADD3 R61, R6, 0x1, RZ ; /* 0x00000001063d7810 */ /* 0x001fca0007ffe0ff */ /*2030*/ IMAD R60, R61, c[0x0][0x1a8], R2 ; /* 0x00006a003d3c7a24 */ /* 0x000fe200078e0202 */ /*2040*/ DFMA R58, R58, c[0x2][0x8], R80 ; /* 0x008002003a3a7a2b */ /* 0x002e0c0000000050 */ /*2050*/ DFMA R62, -R58, c[0x3][0x20], R62 ; /* 0x00c008003a3e7a2b */ /* 0x001fc8000000013e */ /*2060*/ DFMA R64, -R82, c[0x3][0x20], R64 ; /* 0x00c0080052407a2b */ /* 0x000fc80000000140 */ /*2070*/ DFMA R66, -R84, c[0x3][0x20], R66 ; /* 0x00c0080054427a2b */ /* 0x000fc80000000142 */ /*2080*/ DADD R74, -R48, R74 ; /* 0x00000000304a7229 */ /* 0x004ecc000000014a */ /*2090*/ DADD R78, R74, R78 ; /* 0x000000004a4e7229 */ /* 0x008e0c000000004e */ /*20a0*/ DFMA R70, R78, c[0x3][0x158], R70 ; /* 0x00c056004e467a2b */ /* 0x001e080000000046 */ /*20b0*/ DADD R74, -R54, R52 ; /* 0x00000000364a7229 */ /* 0x000fc80000000134 */ /*20c0*/ DFMA R70, R76, c[0x3][0x160], R70 ; /* 0x00c058004c467a2b */ /* 0x001fc80000000046 */ /*20d0*/ DFMA R56, R12, R56, -R50 ; /* 0x000000380c38722b */ /* 0x010f4c0000000832 */ /*20e0*/ DFMA R56, R10, R88, R56 ; /* 0x000000580a38722b */ /* 0x020e080000000038 */ /*20f0*/ DFMA R68, -R74, c[0x3][0x20], R68 ; /* 0x00c008004a447a2b */ /* 0x0003e40000000144 */ /*2100*/ IADD3 R74, R60, c[0x0][0x1a8], RZ ; /* 0x00006a003c4a7a10 */ /* 0x002fe40007ffe0ff */ /*2110*/ DFMA R56, R56, c[0x3][0x168], R70 ; /* 0x00c05a0038387a2b */ /* 0x0010640000000046 */ /*2120*/ IADD3 R58, R74, c[0x0][0x1a8], RZ ; /* 0x00006a004a3a7a10 */ /* 0x000fe20007ffe0ff */ /*2130*/ IMAD.WIDE R70, R60, R7, c[0x0][0x1a0] ; /* 0x000068003c467625 */ /* 0x001fc600078e0207 */ /*2140*/ DFMA R72, -R72, c[0x3][0x20], R56 ; /* 0x00c0080048487a2b */ /* 0x0020620000000138 */ /*2150*/ IMAD.WIDE R74, R74, R7, c[0x0][0x1a0] ; /* 0x000068004a4a7625 */ /* 0x000fc800078e0207 */ /*2160*/ IMAD.WIDE R56, R58, R7, c[0x0][0x1a0] ; /* 0x000068003a387625 */ /* 0x001fe200078e0207 */ /*2170*/ @!P0 BRA 0x2d20 ; /* 0x00000ba000008947 */ /* 0x000fea0003800000 */ /*2180*/ ISETP.NE.AND P0, PT, R3, 0x2, PT ; /* 0x000000020300780c */ /* 0x002fda0003f05270 */ /*2190*/ @P0 BRA 0x25a0 ; /* 0x0000040000000947 */ /* 0x000fea0003800000 */ /*21a0*/ IMAD.WIDE R10, R5.reuse, 0x8, R70 ; /* 0x00000008050a7825 */ /* 0x040fe200078e0246 */ /*21b0*/ IADD3 R24, R58, c[0x0][0x1a8], RZ ; /* 0x00006a003a187a10 */ /* 0x000fe20007ffe0ff */ /*21c0*/ LDG.E.64 R12, [R70.64] ; /* 0x00000008460c7981 */ /* 0x0000a4000c1e1b00 */ /*21d0*/ IMAD.WIDE R54, R5.reuse, 0x8, R74 ; /* 0x0000000805367825 */ /* 0x040fe400078e024a */ /*21e0*/ LDG.E.64 R52, [R10.64] ; /* 0x000000080a347981 */ /* 0x0002e4000c1e1b00 */ /*21f0*/ IMAD.WIDE R82, R5.reuse, 0x8, R10 ; /* 0x0000000805527825 */ /* 0x040fe400078e020a */ /*2200*/ LDG.E.64 R18, [R54.64] ; /* 0x0000000836127981 */ /* 0x000964000c1e1b00 */ /*2210*/ IMAD.WIDE R80, R5, 0x8, R56 ; /* 0x0000000805507825 */ /* 0x000fc400078e0238 */ /*2220*/ LDG.E.64 R20, [R56.64] ; /* 0x0000000838147981 */ /* 0x000164000c1e1b00 */ /*2230*/ IMAD.WIDE R24, R24, R7, c[0x0][0x1a0] ; /* 0x0000680018187625 */ /* 0x000fe400078e0207 */ /*2240*/ LDG.E.64 R10, [R82.64] ; /* 0x00000008520a7981 */ /* 0x002364000c1e1b00 */ /*2250*/ IMAD.WIDE R58, R5.reuse, 0x8, R54 ; /* 0x00000008053a7825 */ /* 0x040fe400078e0236 */ /*2260*/ LDG.E.64 R16, [R74.64] ; /* 0x000000084a107981 */ /* 0x000364000c1e1b00 */ /*2270*/ IMAD.WIDE R88, R5, 0x8, R82 ; /* 0x0000000805587825 */ /* 0x000fc400078e0252 */ /*2280*/ LDG.E.64 R14, [R80.64] ; /* 0x00000008500e7981 */ /* 0x000364000c1e1b00 */ /*2290*/ IMAD.WIDE R70, R5.reuse, 0x8, R24 ; /* 0x0000000805467825 */ /* 0x041fe400078e0218 */ /*22a0*/ LDG.E.64 R54, [R88.64] ; /* 0x0000000858367981 */ /* 0x010f24000c1e1b00 */ /*22b0*/ IMAD.WIDE R76, R5.reuse, 0x8, R80 ; /* 0x00000008054c7825 */ /* 0x040fe400078e0250 */ /*22c0*/ LDG.E.64 R22, [R70.64] ; /* 0x0000000846167981 */ /* 0x000124000c1e1b00 */ /*22d0*/ IMAD.WIDE R60, R5, 0x8, R58 ; /* 0x00000008053c7825 */ /* 0x000fc400078e023a */ /*22e0*/ LDG.E.64 R58, [R58.64] ; /* 0x000000083a3a7981 */ /* 0x000f24000c1e1b00 */ /*22f0*/ IMAD.WIDE R90, R5.reuse, 0x8, R88 ; /* 0x00000008055a7825 */ /* 0x040fe400078e0258 */ /*2300*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000f24000c1e1b00 */ /*2310*/ IMAD.WIDE R78, R5.reuse, 0x8, R76 ; /* 0x00000008054e7825 */ /* 0x040fe400078e024c */ /*2320*/ LDG.E.64 R56, [R90.64] ; /* 0x000000085a387981 */ /* 0x000f24000c1e1b00 */ /*2330*/ IMAD.WIDE R84, R5, 0x8, R70 ; /* 0x0000000805547825 */ /* 0x000fc400078e0246 */ /*2340*/ LDG.E.64 R76, [R76.64] ; /* 0x000000084c4c7981 */ /* 0x000f24000c1e1b00 */ /*2350*/ IMAD.WIDE R92, R5.reuse, 0x8, R60 ; /* 0x00000008055c7825 */ /* 0x040fe400078e023c */ /*2360*/ LDG.E.64 R60, [R60.64] ; /* 0x000000083c3c7981 */ /* 0x000f24000c1e1b00 */ /*2370*/ IMAD.WIDE R80, R5.reuse, 0x8, R78 ; /* 0x0000000805507825 */ /* 0x042fe400078e024e */ /*2380*/ LDG.E.64 R70, [R92.64] ; /* 0x000000085c467981 */ /* 0x001f24000c1e1b00 */ /*2390*/ IMAD.WIDE R74, R5, 0x8, R84 ; /* 0x00000008054a7825 */ /* 0x000fc400078e0254 */ /*23a0*/ LDG.E.64 R78, [R78.64] ; /* 0x000000084e4e7981 */ /* 0x000f28000c1e1b00 */ /*23b0*/ LDG.E.64 R80, [R80.64] ; /* 0x0000000850507981 */ /* 0x000f22000c1e1b00 */ /*23c0*/ IMAD.WIDE R82, R5, 0x8, R74 ; /* 0x0000000805527825 */ /* 0x000fc600078e024a */ /*23d0*/ LDG.E.64 R84, [R84.64] ; /* 0x0000000854547981 */ /* 0x000f28000c1e1b00 */ /*23e0*/ LDG.E.64 R74, [R74.64] ; /* 0x000000084a4a7981 */ /* 0x000f28000c1e1b00 */ /*23f0*/ LDG.E.64 R82, [R82.64] ; /* 0x0000000852527981 */ /* 0x000f22000c1e1b00 */ /*2400*/ DMUL R12, R12, 4 ; /* 0x401000000c0c7828 */ /* 0x004fc80000000000 */ /*2410*/ DMUL R52, R52, 4 ; /* 0x4010000034347828 */ /* 0x008f4c0000000000 */ /*2420*/ DFMA R18, R18, 6, -R52 ; /* 0x401800001212782b */ /* 0x020fc80000000834 */ /*2430*/ DMUL R10, R10, 4 ; /* 0x401000000a0a7828 */ /* 0x000e080000000000 */ /*2440*/ DFMA R16, R16, 6, -R12 ; /* 0x401800001010782b */ /* 0x000fc8000000080c */ /*2450*/ DMUL R54, R54, 4 ; /* 0x4010000036367828 */ /* 0x010e480000000000 */ /*2460*/ DFMA R10, R58, 6, -R10 ; /* 0x401800003a0a782b */ /* 0x001fc8000000080a */ /*2470*/ DMUL R56, R56, 4 ; /* 0x4010000038387828 */ /* 0x000e080000000000 */ /*2480*/ DFMA R54, R60, 6, -R54 ; /* 0x401800003c36782b */ /* 0x002e480000000836 */ /*2490*/ DFMA R56, R70, 6, -R56 ; /* 0x401800004638782b */ /* 0x001e080000000838 */ /*24a0*/ DFMA R16, R20, -4, R16 ; /* 0xc01000001410782b */ /* 0x000e880000000010 */ /*24b0*/ DFMA R14, R14, -4, R18 ; /* 0xc01000000e0e782b */ /* 0x000ec80000000012 */ /*24c0*/ DFMA R10, R76, -4, R10 ; /* 0xc01000004c0a782b */ /* 0x000f08000000000a */ /*24d0*/ DFMA R54, R78, -4, R54 ; /* 0xc01000004e36782b */ /* 0x002e480000000036 */ /*24e0*/ DFMA R56, R80, -4, R56 ; /* 0xc01000005038782b */ /* 0x001e080000000038 */ /*24f0*/ DADD R16, R16, R24 ; /* 0x0000000010107229 */ /* 0x004e880000000018 */ /*2500*/ DADD R14, R14, R22 ; /* 0x000000000e0e7229 */ /* 0x008ec80000000016 */ /*2510*/ DADD R10, R10, R84 ; /* 0x000000000a0a7229 */ /* 0x010f080000000054 */ /*2520*/ DADD R54, R54, R74 ; /* 0x0000000036367229 */ /* 0x002e48000000004a */ /*2530*/ DADD R56, R56, R82 ; /* 0x0000000038387229 */ /* 0x001e080000000052 */ /*2540*/ DFMA R68, R16, -0.25, R68 ; /* 0xbfd000001044782b */ /* 0x0044080000000044 */ /*2550*/ DFMA R64, R14, -0.25, R64 ; /* 0xbfd000000e40782b */ /* 0x0084c80000000040 */ /*2560*/ DFMA R62, R10, -0.25, R62 ; /* 0xbfd000000a3e782b */ /* 0x010508000000003e */ /*2570*/ DFMA R66, R54, -0.25, R66 ; /* 0xbfd000003642782b */ /* 0x0024480000000042 */ /*2580*/ DFMA R72, R56, -0.25, R72 ; /* 0xbfd000003848782b */ /* 0x0014220000000048 */ /*2590*/ BRA 0x3010 ; /* 0x00000a7000007947 */ /* 0x000fea0003800000 */ /*25a0*/ ULDC UR4, c[0x0][0x1ac] ; /* 0x00006b0000047ab9 */ /* 0x000fe40000000800 */ /*25b0*/ UIADD3 UR5, UR4, -0x3, URZ ; /* 0xfffffffd04057890 */ /* 0x000fcc000fffe03f */ /*25c0*/ ISETP.GE.AND P0, PT, R3, UR5, PT ; /* 0x0000000503007c0c */ /* 0x000fda000bf06270 */ /*25d0*/ @!P0 BRA 0x2a00 ; /* 0x0000042000008947 */ /* 0x000fea0003800000 */ /*25e0*/ ISETP.NE.AND P0, PT, R3, UR5, PT ; /* 0x0000000503007c0c */ /* 0x000fda000bf05270 */ /*25f0*/ @!P0 BRA 0x27f0 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*2600*/ UIADD3 UR4, UR4, -0x2, URZ ; /* 0xfffffffe04047890 */ /* 0x000fcc000fffe03f */ /*2610*/ ISETP.NE.AND P0, PT, R3, UR4, PT ; /* 0x0000000403007c0c */ /* 0x000fda000bf05270 */ /*2620*/ @P0 BRA 0x3010 ; /* 0x000009e000000947 */ /* 0x000fea0003800000 */ /*2630*/ IADD3 R13, R3, -0x2, R6 ; /* 0xfffffffe030d7810 */ /* 0x000fca0007ffe006 */ /*2640*/ IMAD R12, R13, c[0x0][0x1a8], R2 ; /* 0x00006a000d0c7a24 */ /* 0x000fc800078e0202 */ /*2650*/ IMAD.WIDE R12, R12, R7, c[0x0][0x1a0] ; /* 0x000068000c0c7625 */ /* 0x000fcc00078e0207 */ /*2660*/ IMAD.WIDE R16, R5.reuse, 0x8, R12 ; /* 0x0000000805107825 */ /* 0x040fe400078e020c */ /*2670*/ LDG.E.64 R12, [R12.64] ; /* 0x000000080c0c7981 */ /* 0x000ea8000c1e1b00 */ /*2680*/ IMAD.WIDE R20, R5.reuse, 0x8, R16 ; /* 0x0000000805147825 */ /* 0x040fe400078e0210 */ /*2690*/ LDG.E.64 R16, [R16.64] ; /* 0x0000000810107981 */ /* 0x000ee8000c1e1b00 */ /*26a0*/ IMAD.WIDE R24, R5, 0x8, R20 ; /* 0x0000000805187825 */ /* 0x000fc400078e0214 */ /*26b0*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000814147981 */ /* 0x000f28000c1e1b00 */ /*26c0*/ IMAD.WIDE R52, R5, 0x8, R24 ; /* 0x0000000805347825 */ /* 0x000fe400078e0218 */ /*26d0*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000f68000c1e1b00 */ /*26e0*/ LDG.E.64 R52, [R52.64] ; /* 0x0000000834347981 */ /* 0x000f62000c1e1b00 */ /*26f0*/ DFMA R14, R14, -4, R12 ; /* 0xc01000000e0e782b */ /* 0x004e08000000000c */ /*2700*/ DFMA R22, R22, -4, R16 ; /* 0xc01000001616782b */ /* 0x008e480000000010 */ /*2710*/ DFMA R54, R54, -4, R20 ; /* 0xc01000003636782b */ /* 0x010e880000000014 */ /*2720*/ DFMA R18, R18, -4, R24 ; /* 0xc01000001212782b */ /* 0x020ec80000000018 */ /*2730*/ DFMA R10, R10, -4, R52 ; /* 0xc01000000a0a782b */ /* 0x000f080000000034 */ /*2740*/ DFMA R14, R46, 5, R14 ; /* 0x401400002e0e782b */ /* 0x001e08000000000e */ /*2750*/ DFMA R22, R30, 5, R22 ; /* 0x401400001e16782b */ /* 0x002e480000000016 */ /*2760*/ DFMA R54, R26, 5, R54 ; /* 0x401400001a36782b */ /* 0x004e880000000036 */ /*2770*/ DFMA R18, R34, 5, R18 ; /* 0x401400002212782b */ /* 0x008ec80000000012 */ /*2780*/ DFMA R10, R32, 5, R10 ; /* 0x40140000200a782b */ /* 0x010f08000000000a */ /*2790*/ DFMA R68, R14, -0.25, R68 ; /* 0xbfd000000e44782b */ /* 0x0010080000000044 */ /*27a0*/ DFMA R64, R22, -0.25, R64 ; /* 0xbfd000001640782b */ /* 0x0022080000000040 */ /*27b0*/ DFMA R62, R54, -0.25, R62 ; /* 0xbfd00000363e782b */ /* 0x004288000000003e */ /*27c0*/ DFMA R66, R18, -0.25, R66 ; /* 0xbfd000001242782b */ /* 0x0082c80000000042 */ /*27d0*/ DFMA R72, R10, -0.25, R72 ; /* 0xbfd000000a48782b */ /* 0x0103220000000048 */ /*27e0*/ BRA 0x3010 ; /* 0x0000082000007947 */ /* 0x000fea0003800000 */ /*27f0*/ IADD3 R57, R3, -0x2, R6 ; /* 0xfffffffe03397810 */ /* 0x000fca0007ffe006 */ /*2800*/ IMAD R70, R57, c[0x0][0x1a8], R2 ; /* 0x00006a0039467a24 */ /* 0x000fc800078e0202 */ /*2810*/ IMAD.WIDE R70, R70, R7, c[0x0][0x1a0] ; /* 0x0000680046467625 */ /* 0x000fcc00078e0207 */ /*2820*/ IMAD.WIDE R74, R5.reuse, 0x8, R70 ; /* 0x00000008054a7825 */ /* 0x040fe400078e0246 */ /*2830*/ LDG.E.64 R70, [R70.64] ; /* 0x0000000846467981 */ /* 0x000ea8000c1e1b00 */ /*2840*/ IMAD.WIDE R56, R5.reuse, 0x8, R74 ; /* 0x0000000805387825 */ /* 0x040fe200078e024a */ /*2850*/ LDG.E.64 R76, [R74.64] ; /* 0x000000084a4c7981 */ /* 0x000eea000c1e1b00 */ /*2860*/ IMAD.WIDE R60, R5, 0x8, R56 ; /* 0x00000008053c7825 */ /* 0x000fc400078e0238 */ /*2870*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000838387981 */ /* 0x000f28000c1e1b00 */ /*2880*/ IMAD.WIDE R58, R5, 0x8, R60 ; /* 0x00000008053a7825 */ /* 0x000fe400078e023c */ /*2890*/ LDG.E.64 R60, [R60.64] ; /* 0x000000083c3c7981 */ /* 0x000f68000c1e1b00 */ /*28a0*/ LDG.E.64 R58, [R58.64] ; /* 0x000000083a3a7981 */ /* 0x000f22000c1e1b00 */ /*28b0*/ DFMA R14, R14, -4, R70 ; /* 0xc01000000e0e782b */ /* 0x004e0c0000000046 */ /*28c0*/ DFMA R14, R46, 6, R14 ; /* 0x401800002e0e782b */ /* 0x001e0c000000000e */ /*28d0*/ DFMA R14, R16, -4, R14 ; /* 0xc0100000100e782b */ /* 0x001e08000000000e */ /*28e0*/ DFMA R22, R22, -4, R76 ; /* 0xc01000001616782b */ /* 0x008e48000000004c */ /*28f0*/ DFMA R68, R14, -0.25, R68 ; /* 0xbfd000000e44782b */ /* 0x001fc80000000044 */ /*2900*/ DFMA R56, R54, -4, R56 ; /* 0xc01000003638782b */ /* 0x010e080000000038 */ /*2910*/ DFMA R14, R18, -4, R60 ; /* 0xc0100000120e782b */ /* 0x020e88000000003c */ /*2920*/ DFMA R16, R10, -4, R58 ; /* 0xc01000000a10782b */ /* 0x000ec8000000003a */ /*2930*/ DFMA R22, R30, 6, R22 ; /* 0x401800001e16782b */ /* 0x002e480000000016 */ /*2940*/ DFMA R10, R26, 6, R56 ; /* 0x401800001a0a782b */ /* 0x001e080000000038 */ /*2950*/ DFMA R14, R34, 6, R14 ; /* 0x40180000220e782b */ /* 0x004e88000000000e */ /*2960*/ DFMA R16, R32, 6, R16 ; /* 0x401800002010782b */ /* 0x008ec80000000010 */ /*2970*/ DFMA R22, R24, -4, R22 ; /* 0xc01000001816782b */ /* 0x002e480000000016 */ /*2980*/ DFMA R10, R52, -4, R10 ; /* 0xc0100000340a782b */ /* 0x001e08000000000a */ /*2990*/ DFMA R14, R20, -4, R14 ; /* 0xc0100000140e782b */ /* 0x004e88000000000e */ /*29a0*/ DFMA R16, R12, -4, R16 ; /* 0xc01000000c10782b */ /* 0x008ec80000000010 */ /*29b0*/ DFMA R64, R22, -0.25, R64 ; /* 0xbfd000001640782b */ /* 0x0023080000000040 */ /*29c0*/ DFMA R62, R10, -0.25, R62 ; /* 0xbfd000000a3e782b */ /* 0x001208000000003e */ /*29d0*/ DFMA R66, R14, -0.25, R66 ; /* 0xbfd000000e42782b */ /* 0x0042880000000042 */ /*29e0*/ DFMA R72, R16, -0.25, R72 ; /* 0xbfd000001048782b */ /* 0x0082e20000000048 */ /*29f0*/ BRA 0x3010 ; /* 0x0000061000007947 */ /* 0x000fea0003800000 */ /*2a00*/ IADD3 R57, R4, -0x2, RZ ; /* 0xfffffffe04397810 */ /* 0x000fca0007ffe0ff */ /*2a10*/ IMAD R82, R57, c[0x0][0x1a8], R2 ; /* 0x00006a0039527a24 */ /* 0x000fe200078e0202 */ /*2a20*/ IADD3 R57, R4, 0x2, RZ ; /* 0x0000000204397810 */ /* 0x000fc60007ffe0ff */ /*2a30*/ IMAD.WIDE R82, R82, R7, c[0x0][0x1a0] ; /* 0x0000680052527625 */ /* 0x000fcc00078e0207 */ /*2a40*/ IMAD.WIDE R58, R5, 0x8, R82 ; /* 0x00000008053a7825 */ /* 0x000fe400078e0252 */ /*2a50*/ LDG.E.64 R82, [R82.64] ; /* 0x0000000852527981 */ /* 0x000ea4000c1e1b00 */ /*2a60*/ IMAD R78, R57, c[0x0][0x1a8], R2 ; /* 0x00006a00394e7a24 */ /* 0x000fe400078e0202 */ /*2a70*/ IMAD.WIDE R56, R5, 0x8, R58 ; /* 0x0000000805387825 */ /* 0x000fe200078e023a */ /*2a80*/ LDG.E.64 R80, [R58.64] ; /* 0x000000083a507981 */ /* 0x0000e6000c1e1b00 */ /*2a90*/ IMAD.WIDE R78, R78, R7, c[0x0][0x1a0] ; /* 0x000068004e4e7625 */ /* 0x000fc800078e0207 */ /*2aa0*/ IMAD.WIDE R74, R5.reuse, 0x8, R56 ; /* 0x00000008054a7825 */ /* 0x040fe400078e0238 */ /*2ab0*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000838387981 */ /* 0x000f24000c1e1b00 */ /*2ac0*/ IMAD.WIDE R88, R5.reuse, 0x8, R78 ; /* 0x0000000805587825 */ /* 0x040fe400078e024e */ /*2ad0*/ LDG.E.64 R78, [R78.64] ; /* 0x000000084e4e7981 */ /* 0x000f64000c1e1b00 */ /*2ae0*/ IMAD.WIDE R70, R5.reuse, 0x8, R74 ; /* 0x0000000805467825 */ /* 0x040fe400078e024a */ /*2af0*/ LDG.E.64 R74, [R74.64] ; /* 0x000000084a4a7981 */ /* 0x000f64000c1e1b00 */ /*2b00*/ IMAD.WIDE R60, R5, 0x8, R88 ; /* 0x00000008053c7825 */ /* 0x000fc400078e0258 */ /*2b10*/ LDG.E.64 R70, [R70.64] ; /* 0x0000000846467981 */ /* 0x000f68000c1e1b00 */ /*2b20*/ IMAD.WIDE R58, R5.reuse, 0x8, R60 ; /* 0x00000008053a7825 */ /* 0x041fe200078e023c */ /*2b30*/ LDG.E.64 R76, [R88.64] ; /* 0x00000008584c7981 */ /* 0x000f68000c1e1b00 */ /*2b40*/ LDG.E.64 R60, [R60.64] ; /* 0x000000083c3c7981 */ /* 0x000f62000c1e1b00 */ /*2b50*/ IMAD.WIDE R84, R5, 0x8, R58 ; /* 0x0000000805547825 */ /* 0x000fc600078e023a */ /*2b60*/ LDG.E.64 R58, [R58.64] ; /* 0x000000083a3a7981 */ /* 0x000f68000c1e1b00 */ /*2b70*/ LDG.E.64 R84, [R84.64] ; /* 0x0000000854547981 */ /* 0x000f62000c1e1b00 */ /*2b80*/ DFMA R82, R14, -4, R82 ; /* 0xc01000000e52782b */ /* 0x004e080000000052 */ /*2b90*/ DFMA R80, R22, -4, R80 ; /* 0xc01000001650782b */ /* 0x008e480000000050 */ /*2ba0*/ DFMA R56, R54, -4, R56 ; /* 0xc01000003638782b */ /* 0x010e880000000038 */ /*2bb0*/ DFMA R74, R18, -4, R74 ; /* 0xc0100000124a782b */ /* 0x020ec8000000004a */ /*2bc0*/ DFMA R70, R10, -4, R70 ; /* 0xc01000000a46782b */ /* 0x000f080000000046 */ /*2bd0*/ DFMA R82, R46, 6, R82 ; /* 0x401800002e52782b */ /* 0x001e080000000052 */ /*2be0*/ DFMA R80, R30, 6, R80 ; /* 0x401800001e50782b */ /* 0x002e480000000050 */ /*2bf0*/ DFMA R56, R26, 6, R56 ; /* 0x401800001a38782b */ /* 0x004e880000000038 */ /*2c00*/ DFMA R74, R34, 6, R74 ; /* 0x40180000224a782b */ /* 0x008ec8000000004a */ /*2c10*/ DFMA R70, R32, 6, R70 ; /* 0x401800002046782b */ /* 0x010f080000000046 */ /*2c20*/ DFMA R82, R16, -4, R82 ; /* 0xc01000001052782b */ /* 0x001e080000000052 */ /*2c30*/ DFMA R80, R24, -4, R80 ; /* 0xc01000001850782b */ /* 0x002e480000000050 */ /*2c40*/ DFMA R56, R52, -4, R56 ; /* 0xc01000003438782b */ /* 0x004e880000000038 */ /*2c50*/ DFMA R74, R20, -4, R74 ; /* 0xc0100000144a782b */ /* 0x008ec8000000004a */ /*2c60*/ DFMA R70, R12, -4, R70 ; /* 0xc01000000c46782b */ /* 0x010f080000000046 */ /*2c70*/ DADD R78, R82, R78 ; /* 0x00000000524e7229 */ /* 0x001e08000000004e */ /*2c80*/ DADD R76, R80, R76 ; /* 0x00000000504c7229 */ /* 0x002e48000000004c */ /*2c90*/ DADD R56, R56, R60 ; /* 0x0000000038387229 */ /* 0x004e88000000003c */ /*2ca0*/ DADD R58, R74, R58 ; /* 0x000000004a3a7229 */ /* 0x008ec8000000003a */ /*2cb0*/ DADD R70, R70, R84 ; /* 0x0000000046467229 */ /* 0x010f080000000054 */ /*2cc0*/ DFMA R68, R78, -0.25, R68 ; /* 0xbfd000004e44782b */ /* 0x0010080000000044 */ /*2cd0*/ DFMA R64, R76, -0.25, R64 ; /* 0xbfd000004c40782b */ /* 0x0022080000000040 */ /*2ce0*/ DFMA R62, R56, -0.25, R62 ; /* 0xbfd00000383e782b */ /* 0x004288000000003e */ /*2cf0*/ DFMA R66, R58, -0.25, R66 ; /* 0xbfd000003a42782b */ /* 0x0082c80000000042 */ /*2d00*/ DFMA R72, R70, -0.25, R72 ; /* 0xbfd000004648782b */ /* 0x0103220000000048 */ /*2d10*/ BRA 0x3010 ; /* 0x000002f000007947 */ /* 0x000fea0003800000 */ /*2d20*/ IMAD.WIDE R10, R5.reuse, 0x8, R74 ; /* 0x00000008050a7825 */ /* 0x042fe400078e024a */ /*2d30*/ LDG.E.64 R74, [R74.64] ; /* 0x000000084a4a7981 */ /* 0x000ea4000c1e1b00 */ /*2d40*/ IMAD.WIDE R12, R5.reuse, 0x8, R70 ; /* 0x00000008050c7825 */ /* 0x040fe400078e0246 */ /*2d50*/ LDG.E.64 R60, [R10.64] ; /* 0x000000080a3c7981 */ /* 0x0000e4000c1e1b00 */ /*2d60*/ IMAD.WIDE R54, R5.reuse, 0x8, R10 ; /* 0x0000000805367825 */ /* 0x040fe400078e020a */ /*2d70*/ LDG.E.64 R24, [R12.64] ; /* 0x000000080c187981 */ /* 0x000324000c1e1b00 */ /*2d80*/ IMAD.WIDE R16, R5, 0x8, R56 ; /* 0x0000000805107825 */ /* 0x000fc400078e0238 */ /*2d90*/ LDG.E.64 R70, [R70.64] ; /* 0x0000000846467981 */ /* 0x000f64000c1e1b00 */ /*2da0*/ IMAD.WIDE R20, R5.reuse, 0x8, R12 ; /* 0x0000000805147825 */ /* 0x040fe400078e020c */ /*2db0*/ LDG.E.64 R10, [R54.64] ; /* 0x00000008360a7981 */ /* 0x001164000c1e1b00 */ /*2dc0*/ IMAD.WIDE R14, R5.reuse, 0x8, R54 ; /* 0x00000008050e7825 */ /* 0x040fe400078e0236 */ /*2dd0*/ LDG.E.64 R22, [R16.64] ; /* 0x0000000810167981 */ /* 0x000164000c1e1b00 */ /*2de0*/ IMAD.WIDE R52, R5, 0x8, R16 ; /* 0x0000000805347825 */ /* 0x000fc400078e0210 */ /*2df0*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000838387981 */ /* 0x000f64000c1e1b00 */ /*2e00*/ IMAD.WIDE R18, R5.reuse, 0x8, R20 ; /* 0x0000000805127825 */ /* 0x040fe400078e0214 */ /*2e10*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000814147981 */ /* 0x000f64000c1e1b00 */ /*2e20*/ IMAD.WIDE R78, R5.reuse, 0x8, R14 ; /* 0x00000008054e7825 */ /* 0x040fe400078e020e */ /*2e30*/ LDG.E.64 R14, [R14.64] ; /* 0x000000080e0e7981 */ /* 0x000f64000c1e1b00 */ /*2e40*/ IMAD.WIDE R58, R5, 0x8, R52 ; /* 0x00000008053a7825 */ /* 0x000fc400078e0234 */ /*2e50*/ LDG.E.64 R12, [R78.64] ; /* 0x000000084e0c7981 */ /* 0x002f64000c1e1b00 */ /*2e60*/ IMAD.WIDE R76, R5.reuse, 0x8, R18 ; /* 0x00000008054c7825 */ /* 0x040fe400078e0212 */ /*2e70*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000812127981 */ /* 0x000f64000c1e1b00 */ /*2e80*/ IMAD.WIDE R80, R5, 0x8, R58 ; /* 0x0000000805507825 */ /* 0x000fe400078e023a */ /*2e90*/ LDG.E.64 R16, [R76.64] ; /* 0x000000084c107981 */ /* 0x001f68000c1e1b00 */ /*2ea0*/ LDG.E.64 R52, [R52.64] ; /* 0x0000000834347981 */ /* 0x000f68000c1e1b00 */ /*2eb0*/ LDG.E.64 R58, [R58.64] ; /* 0x000000083a3a7981 */ /* 0x000f68000c1e1b00 */ /*2ec0*/ LDG.E.64 R54, [R80.64] ; /* 0x0000000850367981 */ /* 0x000f62000c1e1b00 */ /*2ed0*/ DMUL R74, R74, 4 ; /* 0x401000004a4a7828 */ /* 0x004fc80000000000 */ /*2ee0*/ DMUL R60, R60, 4 ; /* 0x401000003c3c7828 */ /* 0x008f0c0000000000 */ /*2ef0*/ DFMA R24, R24, 5, -R60 ; /* 0x401400001818782b */ /* 0x010fc8000000083c */ /*2f00*/ DMUL R10, R10, 4 ; /* 0x401000000a0a7828 */ /* 0x020e080000000000 */ /*2f10*/ DFMA R70, R70, 5, -R74 ; /* 0x401400004646782b */ /* 0x000fc8000000084a */ /*2f20*/ DMUL R14, R14, 4 ; /* 0x401000000e0e7828 */ /* 0x000e480000000000 */ /*2f30*/ DMUL R12, R12, 4 ; /* 0x401000000c0c7828 */ /* 0x000e880000000000 */ /*2f40*/ DFMA R10, R20, 5, -R10 ; /* 0x40140000140a782b */ /* 0x001e08000000080a */ /*2f50*/ DFMA R14, R18, 5, -R14 ; /* 0x40140000120e782b */ /* 0x002e48000000080e */ /*2f60*/ DFMA R12, R16, 5, -R12 ; /* 0x40140000100c782b */ /* 0x004e88000000080c */ /*2f70*/ DADD R56, R56, R70 ; /* 0x0000000038387229 */ /* 0x000ec80000000046 */ /*2f80*/ DADD R22, R22, R24 ; /* 0x0000000016167229 */ /* 0x000f080000000018 */ /*2f90*/ DADD R10, R52, R10 ; /* 0x00000000340a7229 */ /* 0x001e08000000000a */ /*2fa0*/ DADD R14, R58, R14 ; /* 0x000000003a0e7229 */ /* 0x002e48000000000e */ /*2fb0*/ DADD R12, R54, R12 ; /* 0x00000000360c7229 */ /* 0x004e88000000000c */ /*2fc0*/ DFMA R68, R56, -0.25, R68 ; /* 0xbfd000003844782b */ /* 0x0086080000000044 */ /*2fd0*/ DFMA R64, R22, -0.25, R64 ; /* 0xbfd000001640782b */ /* 0x0107080000000040 */ /*2fe0*/ DFMA R62, R10, -0.25, R62 ; /* 0xbfd000000a3e782b */ /* 0x001608000000003e */ /*2ff0*/ DFMA R66, R14, -0.25, R66 ; /* 0xbfd000000e42782b */ /* 0x0026480000000042 */ /*3000*/ DFMA R72, R12, -0.25, R72 ; /* 0xbfd000000c48782b */ /* 0x0046880000000048 */ /*3010*/ IADD3 R15, R0, 0x1, RZ ; /* 0x00000001000f7810 */ /* 0x01ffe40007ffe0ff */ /*3020*/ MOV R4, c[0x0][0x1b0] ; /* 0x00006c0000047a02 */ /* 0x000fca0000000f00 */ /*3030*/ IMAD R6, R4, 0x3, R15 ; /* 0x0000000304067824 */ /* 0x000fc800078e020f */ /*3040*/ IMAD R11, R6.reuse, c[0x0][0x1ac], R3 ; /* 0x00006b00060b7a24 */ /* 0x040fe200078e0203 */ /*3050*/ IADD3 R6, R6, -0x2, RZ ; /* 0xfffffffe06067810 */ /* 0x000fc60007ffe0ff */ /*3060*/ IMAD R10, R11, c[0x0][0x1a8], R2 ; /* 0x00006a000b0a7a24 */ /* 0x000fe400078e0202 */ /*3070*/ IMAD R13, R6, c[0x0][0x1ac], R3 ; /* 0x00006b00060d7a24 */ /* 0x000fe400078e0203 */ /*3080*/ IMAD.WIDE R10, R10, R7, c[0x0][0x1a0] ; /* 0x000068000a0a7625 */ /* 0x000fc800078e0207 */ /*3090*/ IMAD R12, R13, c[0x0][0x1a8], R2 ; /* 0x00006a000d0c7a24 */ /* 0x000fe400078e0202 */ /*30a0*/ LDG.E.64 R10, [R10.64] ; /* 0x000000080a0a7981 */ /* 0x000ea4000c1e1b00 */ /*30b0*/ IMAD.WIDE R12, R12, R7, c[0x0][0x1a0] ; /* 0x000068000c0c7625 */ /* 0x000fcc00078e0207 */ /*30c0*/ LDG.E.64 R12, [R12.64] ; /* 0x000000080c0c7981 */ /* 0x000ee2000c1e1b00 */ /*30d0*/ IMAD R17, R3, c[0x0][0x1a8], R2 ; /* 0x00006a0003117a24 */ /* 0x000fe400078e0202 */ /*30e0*/ IMAD R14, R15, c[0x0][0x1a8], RZ ; /* 0x00006a000f0e7a24 */ /* 0x000fc800078e02ff */ /*30f0*/ IMAD R6, R14, c[0x0][0x1ac], R17 ; /* 0x00006b000e067a24 */ /* 0x000fe200078e0211 */ /*3100*/ LEA R88, R87, R14, 0x1 ; /* 0x0000000e57587211 */ /* 0x000fc600078e08ff */ /*3110*/ IMAD.WIDE R56, R6, R7, c[0x0][0x178] ; /* 0x00005e0006387625 */ /* 0x000fc800078e0207 */ /*3120*/ IMAD R88, R88, c[0x0][0x1ac], R17 ; /* 0x00006b0058587a24 */ /* 0x000fe400078e0211 */ /*3130*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000838387981 */ /* 0x000f24000c1e1b00 */ /*3140*/ IMAD.WIDE R54, R88, R7, c[0x0][0x178] ; /* 0x00005e0058367625 */ /* 0x000fcc00078e0207 */ /*3150*/ LDG.E.64 R54, [R54.64] ; /* 0x0000000836367981 */ /* 0x000f62000c1e1b00 */ /*3160*/ IADD3 R16, R15, c[0x0][0x1b0], RZ ; /* 0x00006c000f107a10 */ /* 0x000fe20007ffe0ff */ /*3170*/ IMAD.WIDE R52, R6, R7, c[0x0][0x168] ; /* 0x00005a0006347625 */ /* 0x000fe200078e0207 */ /*3180*/ IADD3 R14, R0, -0x1, RZ ; /* 0xffffffff000e7810 */ /* 0x000fc60007ffe0ff */ /*3190*/ IMAD R15, R16, c[0x0][0x1ac], R3.reuse ; /* 0x00006b00100f7a24 */ /* 0x100fe200078e0203 */ /*31a0*/ IADD3 R18, R14, c[0x0][0x1b0], RZ ; /* 0x00006c000e127a10 */ /* 0x000fe20007ffe0ff */ /*31b0*/ LDG.E.64 R52, [R52.64] ; /* 0x0000000834347981 */ /* 0x000f64000c1e1b00 */ /*31c0*/ IMAD R14, R15, c[0x0][0x1a8], R2 ; /* 0x00006a000f0e7a24 */ /* 0x000fe400078e0202 */ /*31d0*/ IMAD R17, R18, c[0x0][0x1ac], R3 ; /* 0x00006b0012117a24 */ /* 0x000fe400078e0203 */ /*31e0*/ IMAD.WIDE R14, R14, R7, c[0x0][0x1a0] ; /* 0x000068000e0e7625 */ /* 0x000fc800078e0207 */ /*31f0*/ IMAD R16, R17, c[0x0][0x1a8], R2 ; /* 0x00006a0011107a24 */ /* 0x000fe400078e0202 */ /*3200*/ LDG.E.64 R14, [R14.64] ; /* 0x000000080e0e7981 */ /* 0x000f64000c1e1b00 */ /*3210*/ IMAD.WIDE R16, R16, R7, c[0x0][0x1a0] ; /* 0x0000680010107625 */ /* 0x000fc800078e0207 */ /*3220*/ IMAD.WIDE R60, R6, R7.reuse, c[0x0][0x1a0] ; /* 0x00006800063c7625 */ /* 0x080fe400078e0207 */ /*3230*/ LDG.E.64 R16, [R16.64] ; /* 0x0000000810107981 */ /* 0x000f64000c1e1b00 */ /*3240*/ IMAD.WIDE R58, R88.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a00583a7625 */ /* 0x0c0fe400078e0207 */ /*3250*/ LDG.E.64 R18, [R60.64] ; /* 0x000000083c127981 */ /* 0x000164000c1e1b00 */ /*3260*/ IMAD.WIDE R74, R88, R7, c[0x0][0x1a0] ; /* 0x00006800584a7625 */ /* 0x000fe400078e0207 */ /*3270*/ LDG.E.64 R58, [R58.64] ; /* 0x000000083a3a7981 */ /* 0x000f68000c1e1b00 */ /*3280*/ LDG.E.64 R20, [R74.64] ; /* 0x000000084a147981 */ /* 0x000362000c1e1b00 */ /*3290*/ IMAD.WIDE R22, R86, 0x8, R60 ; /* 0x0000000856167825 */ /* 0x000fc800078e023c */ /*32a0*/ IMAD.WIDE R80, R86, 0x8, R74 ; /* 0x0000000856507825 */ /* 0x000fc800078e024a */ /*32b0*/ IMAD.WIDE R24, R86, 0x8, R22 ; /* 0x0000000856187825 */ /* 0x000fe200078e0216 */ /*32c0*/ LDG.E.64 R60, [R80.64] ; /* 0x00000008503c7981 */ /* 0x001166000c1e1b00 */ /*32d0*/ IMAD.WIDE R84, R6, R7.reuse, c[0x0][0x170] ; /* 0x00005c0006547625 */ /* 0x080fe200078e0207 */ /*32e0*/ LDG.E.64 R22, [R22.64] ; /* 0x0000000816167981 */ /* 0x000f66000c1e1b00 */ /*32f0*/ IMAD.WIDE R70, R86, 0x8, R80 ; /* 0x0000000856467825 */ /* 0x000fe200078e0250 */ /*3300*/ LDG.E.64 R74, [R84.64] ; /* 0x00000008544a7981 */ /* 0x002366000c1e1b00 */ /*3310*/ IMAD.WIDE R86, R88, R7.reuse, c[0x0][0x170] ; /* 0x00005c0058567625 */ /* 0x080fe200078e0207 */ /*3320*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000f66000c1e1b00 */ /*3330*/ IMAD.WIDE R78, R6.reuse, R7.reuse, c[0x0][0x180] ; /* 0x00006000064e7625 */ /* 0x0c0fe200078e0207 */ /*3340*/ LDG.E.64 R70, [R70.64] ; /* 0x0000000846467981 */ /* 0x000f66000c1e1b00 */ /*3350*/ IMAD.WIDE R84, R6, R7.reuse, c[0x0][0x188] ; /* 0x0000620006547625 */ /* 0x082fe200078e0207 */ /*3360*/ MOV R80, c[0x3][0x1a0] ; /* 0x00c0680000507a02 */ /* 0x001fe20000000f00 */ /*3370*/ LDG.E.64 R78, [R78.64] ; /* 0x000000084e4e7981 */ /* 0x000f62000c1e1b00 */ /*3380*/ MOV R81, c[0x3][0x1a4] ; /* 0x00c0690000517a02 */ /* 0x000fe20000000f00 */ /*3390*/ IMAD.WIDE R90, R88, R7, c[0x0][0x180] ; /* 0x00006000585a7625 */ /* 0x000fc400078e0207 */ /*33a0*/ LDG.E.64 R84, [R84.64] ; /* 0x0000000854547981 */ /* 0x000f66000c1e1b00 */ /*33b0*/ DMUL R80, R80, c[0x2][0x0] ; /* 0x0080000050507a28 */ /* 0x000fc80000000000 */ /*33c0*/ DADD R76, -R42, R10 ; /* 0x000000002a4c7229 */ /* 0x0040e4000000010a */ /*33d0*/ LDG.E.64 R42, [R86.64] ; /* 0x00000008562a7981 */ /* 0x0018a8000c1e1b00 */ /*33e0*/ DADD R82, R12, R76 ; /* 0x000000000c527229 */ /* 0x008048000000004c */ /*33f0*/ LDG.E.64 R76, [R90.64] ; /* 0x000000085a4c7981 */ /* 0x001ee4000c1e1b00 */ /*3400*/ DFMA R66, R82, c[0x3][0x1d8], R66 ; /* 0x00c0760052427a2b */ /* 0x0021e40000000042 */ /*3410*/ IMAD.WIDE R82, R88, R7, c[0x0][0x188] ; /* 0x0000620058527625 */ /* 0x001fcc00078e0207 */ /*3420*/ LDG.E.64 R82, [R82.64] ; /* 0x0000000852527981 */ /* 0x000ee2000c1e1b00 */ /*3430*/ DADD R86, -R44, R56 ; /* 0x000000002c567229 */ /* 0x010f4c0000000138 */ /*3440*/ DADD R86, R54, R86 ; /* 0x0000000036567229 */ /* 0x020e0c0000000056 */ /*3450*/ DFMA R66, R80, R86, R66 ; /* 0x000000565042722b */ /* 0x0011e40000000042 */ /*3460*/ IMAD.WIDE R80, R6, R7, c[0x0][0x160] ; /* 0x0000580006507625 */ /* 0x001fc800078e0207 */ /*3470*/ IMAD.WIDE R86, R88, R7, c[0x0][0x160] ; /* 0x0000580058567625 */ /* 0x000fe400078e0207 */ /*3480*/ LDG.E.64 R80, [R80.64] ; /* 0x0000000850507981 */ /* 0x000f28000c1e1b00 */ /*3490*/ LDG.E.64 R86, [R86.64] ; /* 0x0000000856567981 */ /* 0x000f62000c1e1b00 */ /*34a0*/ DADD R52, -R38, R52 ; /* 0x0000000026347229 */ /* 0x000fc80000000134 */ /*34b0*/ DADD R38, R30, R30 ; /* 0x000000001e267229 */ /* 0x000e0c000000001e */ /*34c0*/ DADD R38, -R38, R14 ; /* 0x0000000026267229 */ /* 0x001e08000000010e */ /*34d0*/ DADD R8, -R8, R18 ; /* 0x0000000008087229 */ /* 0x000fc80000000112 */ /*34e0*/ DADD R38, R38, R16 ; /* 0x0000000026267229 */ /* 0x001e080000000010 */ /*34f0*/ DMUL R36, R36, R44 ; /* 0x0000002c24247228 */ /* 0x000fc80000000000 */ /*3500*/ DFMA R64, R38, c[0x3][0x1c8], R64 ; /* 0x00c0720026407a2b */ /* 0x001fc80000000040 */ /*3510*/ DADD R52, R52, R58 ; /* 0x0000000034347229 */ /* 0x000e08000000003a */ /*3520*/ DMUL R44, R16, R54 ; /* 0x00000036102c7228 */ /* 0x000e480000000000 */ /*3530*/ DADD R8, R8, R20 ; /* 0x0000000008087229 */ /* 0x000e080000000014 */ /*3540*/ DFMA R64, R52, c[0x3][0x1a0], R64 ; /* 0x00c0680034407a2b */ /* 0x001fc80000000040 */ /*3550*/ DFMA R44, R14, R56, -R44 ; /* 0x000000380e2c722b */ /* 0x002e08000000082c */ /*3560*/ DFMA R68, R8, c[0x3][0x1c0], R68 ; /* 0x00c0700008447a2b */ /* 0x000fc80000000044 */ /*3570*/ DADD R38, -R12, R10 ; /* 0x000000000c267229 */ /* 0x000e48000000010a */ /*3580*/ DADD R52, R26, R26 ; /* 0x000000001a347229 */ /* 0x000e08000000001a */ /*3590*/ DFMA R8, -R44, c[0x3][0x38], R64 ; /* 0x00c00e002c087a2b */ /* 0x001fc80000000140 */ /*35a0*/ DFMA R64, -R38, c[0x3][0x38], R68 ; /* 0x00c00e0026407a2b */ /* 0x002fc80000000144 */ /*35b0*/ DADD R38, -R52, R22 ; /* 0x0000000034267229 */ /* 0x000e080000000116 */ /*35c0*/ DADD R28, R28, R28 ; /* 0x000000001c1c7229 */ /* 0x000e48000000001c */ /*35d0*/ DADD R38, R38, R60 ; /* 0x0000000026267229 */ /* 0x001e08000000003c */ /*35e0*/ DADD R74, -R28, R74 ; /* 0x000000001c4a7229 */ /* 0x002fc8000000014a */ /*35f0*/ DADD R40, -R40, R24 ; /* 0x0000000028287229 */ /* 0x000e480000000118 */ /*3600*/ DFMA R38, R38, c[0x3][0x1d0], R62 ; /* 0x00c0740026267a2b */ /* 0x001fc8000000003e */ /*3610*/ DMUL R28, R54, R60 ; /* 0x0000003c361c7228 */ /* 0x000e080000000000 */ /*3620*/ DADD R40, R70, R40 ; /* 0x0000000046287229 */ /* 0x002e480000000028 */ /*3630*/ DFMA R28, R56, R22, -R28 ; /* 0x00000016381c722b */ /* 0x001fc8000000081c */ /*3640*/ DFMA R72, R40, c[0x3][0x1e0], R72 ; /* 0x00c0780028487a2b */ /* 0x002fc80000000048 */ /*3650*/ DADD R78, -R48, R78 ; /* 0x00000000304e7229 */ /* 0x000fc8000000014e */ /*3660*/ DFMA R40, R56, R56, -R36 ; /* 0x000000383828722b */ /* 0x000e0c0000000824 */ /*3670*/ DFMA R40, R54, R54, R40 ; /* 0x000000363628722b */ /* 0x001fe20000000028 */ /*3680*/ ISETP.NE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */ /* 0x000fc60003f05270 */ /*3690*/ DADD R42, R74, R42 ; /* 0x000000004a2a7229 */ /* 0x004e0c000000002a */ /*36a0*/ DFMA R38, R42, c[0x3][0x1a0], R38 ; /* 0x00c068002a267a2b */ /* 0x001e0c0000000026 */ /*36b0*/ DFMA R28, -R28, c[0x3][0x38], R38 ; /* 0x00c00e001c1c7a2b */ /* 0x001fc80000000126 */ /*36c0*/ DMUL R42, R82, c[0x2][0x8] ; /* 0x00800200522a7a28 */ /* 0x008e080000000000 */ /*36d0*/ DMUL R38, R84, c[0x2][0x8] ; /* 0x0080020054267a28 */ /* 0x000fc80000000000 */ /*36e0*/ DFMA R42, R70, c[0x2][0x10], -R42 ; /* 0x00800400462a7a2b */ /* 0x001e08000000082a */ /*36f0*/ DADD R76, R78, R76 ; /* 0x000000004e4c7229 */ /* 0x000e48000000004c */ /*3700*/ DMUL R42, R54, R42 ; /* 0x0000002a362a7228 */ /* 0x001fc80000000000 */ /*3710*/ DMUL R54, R12, R54 ; /* 0x000000360c367228 */ /* 0x000e080000000000 */ /*3720*/ DADD R84, -R84, R24 ; /* 0x0000000054547229 */ /* 0x000e880000000118 */ /*3730*/ DFMA R38, R24, c[0x2][0x10], -R38 ; /* 0x0080040018267a2b */ /* 0x000ec80000000826 */ /*3740*/ DFMA R36, R76, c[0x3][0x1a8], R72 ; /* 0x00c06a004c247a2b */ /* 0x002e480000000048 */ /*3750*/ DFMA R54, R10, R56, -R54 ; /* 0x000000380a36722b */ /* 0x001fc80000000836 */ /*3760*/ DADD R84, R84, -R70 ; /* 0x0000000054547229 */ /* 0x004e080000000846 */ /*3770*/ DFMA R56, R56, R38, -R42 ; /* 0x000000263838722b */ /* 0x0085e4000000082a */ /*3780*/ IADD3 R39, R3, c[0x0][0x1ac], RZ ; /* 0x00006b0003277a10 */ /* 0x004fe40007ffe0ff */ /*3790*/ DFMA R36, R40, c[0x3][0x1b0], R36 ; /* 0x00c06c0028247a2b */ /* 0x0023e40000000024 */ /*37a0*/ IADD3 R41, R39, c[0x0][0x1ac], RZ ; /* 0x00006b0027297a10 */ /* 0x002fe40007ffe0ff */ /*37b0*/ DADD R84, R84, R82 ; /* 0x0000000054547229 */ /* 0x001e080000000052 */ /*37c0*/ DFMA R80, R24, R80, -R50 ; /* 0x000000501850722b */ /* 0x0103620000000832 */ /*37d0*/ IMAD R48, R39, c[0x0][0x1a8], R2.reuse ; /* 0x00006a0027307a24 */ /* 0x100fe200078e0202 */ /*37e0*/ IADD3 R59, R41.reuse, c[0x0][0x1ac], RZ ; /* 0x00006b00293b7a10 */ /* 0x040fe20007ffe0ff */ /*37f0*/ IMAD R50, R41, c[0x0][0x1a8], R2 ; /* 0x00006a0029327a24 */ /* 0x002fe200078e0202 */ /*3800*/ DFMA R54, R84, c[0x2][0x8], R54 ; /* 0x0080020054367a2b */ /* 0x001fe20000000036 */ /*3810*/ IMAD.WIDE R48, R48, R7, c[0x0][0x1a0] ; /* 0x0000680030307625 */ /* 0x000fc600078e0207 */ /*3820*/ DFMA R80, R70, R86, R80 ; /* 0x000000564650722b */ /* 0x020e220000000050 */ /*3830*/ IMAD.WIDE R50, R50, R7, c[0x0][0x1a0] ; /* 0x0000680032327625 */ /* 0x000fc800078e0207 */ /*3840*/ IMAD R44, R59, c[0x0][0x1a8], R2 ; /* 0x00006a003b2c7a24 */ /* 0x000fe200078e0202 */ /*3850*/ DFMA R36, R80, c[0x3][0x1b8], R36 ; /* 0x00c06e0050247a2b */ /* 0x001e220000000024 */ /*3860*/ IMAD.WIDE R52, R5, 0x8, R48 ; /* 0x0000000805347825 */ /* 0x000fc600078e0230 */ /*3870*/ DFMA R66, -R54, c[0x3][0x38], R66 ; /* 0x00c00e0036427a2b */ /* 0x0002a20000000142 */ /*3880*/ IMAD.WIDE R44, R44, R7, c[0x0][0x1a0] ; /* 0x000068002c2c7625 */ /* 0x000fc800078e0207 */ /*3890*/ IMAD.WIDE R54, R5, 0x8, R50 ; /* 0x0000000805367825 */ /* 0x002fe200078e0232 */ /*38a0*/ DFMA R36, -R56, c[0x3][0x38], R36 ; /* 0x00c00e0038247a2b */ /* 0x0010460000000124 */ /*38b0*/ IMAD.WIDE R40, R5, 0x8, R52 ; /* 0x0000000805287825 */ /* 0x000fc800078e0234 */ /*38c0*/ IMAD.WIDE R42, R5, 0x8, R44 ; /* 0x00000008052a7825 */ /* 0x000fc800078e022c */ /*38d0*/ IMAD.WIDE R38, R5, 0x8, R54 ; /* 0x0000000805267825 */ /* 0x000fe200078e0236 */ /*38e0*/ @!P0 BRA 0x4480 ; /* 0x00000b9000008947 */ /* 0x000fea0003800000 */ /*38f0*/ ISETP.NE.AND P0, PT, R0, 0x2, PT ; /* 0x000000020000780c */ /* 0x007fda0003f05270 */ /*3900*/ @P0 BRA 0x3cd0 ; /* 0x000003c000000947 */ /* 0x000fea0003800000 */ /*3910*/ IADD3 R59, R59, c[0x0][0x1ac], RZ ; /* 0x00006b003b3b7a10 */ /* 0x000fe20007ffe0ff */ /*3920*/ IMAD.WIDE R12, R5, 0x8, R40 ; /* 0x00000008050c7825 */ /* 0x000fe200078e0228 */ /*3930*/ LDG.E.64 R20, [R52.64] ; /* 0x0000000834147981 */ /* 0x0000a6000c1e1b00 */ /*3940*/ IMAD R18, R59, c[0x0][0x1a8], R2 ; /* 0x00006a003b127a24 */ /* 0x000fe200078e0202 */ /*3950*/ LDG.E.64 R34, [R44.64] ; /* 0x000000082c227981 */ /* 0x0002e6000c1e1b00 */ /*3960*/ IMAD.WIDE R18, R18, R7, c[0x0][0x1a0] ; /* 0x0000680012127625 */ /* 0x000fe200078e0207 */ /*3970*/ LDG.E.64 R10, [R48.64] ; /* 0x00000008300a7981 */ /* 0x000966000c1e1b00 */ /*3980*/ IMAD.WIDE R52, R5.reuse, 0x8, R42 ; /* 0x0000000805347825 */ /* 0x041fe200078e022a */ /*3990*/ LDG.E.64 R40, [R40.64] ; /* 0x0000000828287981 */ /* 0x000ee6000c1e1b00 */ /*39a0*/ IMAD.WIDE R26, R5.reuse, 0x8, R18 ; /* 0x00000008051a7825 */ /* 0x040fe200078e0212 */ /*39b0*/ LDG.E.64 R14, [R50.64] ; /* 0x00000008320e7981 */ /* 0x000ee6000c1e1b00 */ /*39c0*/ IMAD.WIDE R32, R5.reuse, 0x8, R38 ; /* 0x0000000805207825 */ /* 0x040fe200078e0226 */ /*39d0*/ LDG.E.64 R6, [R26.64] ; /* 0x000000081a067981 */ /* 0x0000e6000c1e1b00 */ /*39e0*/ IMAD.WIDE R24, R5.reuse, 0x8, R12 ; /* 0x0000000805187825 */ /* 0x040fe200078e020c */ /*39f0*/ LDG.E.64 R16, [R54.64] ; /* 0x0000000836107981 */ /* 0x000ee6000c1e1b00 */ /*3a00*/ IMAD.WIDE R44, R5.reuse, 0x8, R52 ; /* 0x00000008052c7825 */ /* 0x042fe200078e0234 */ /*3a10*/ LDG.E.64 R12, [R12.64] ; /* 0x000000080c0c7981 */ /* 0x000ee6000c1e1b00 */ /*3a20*/ IMAD.WIDE R30, R5.reuse, 0x8, R32 ; /* 0x00000008051e7825 */ /* 0x040fe200078e0220 */ /*3a30*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000ee6000c1e1b00 */ /*3a40*/ IMAD.WIDE R46, R5.reuse, 0x8, R26 ; /* 0x00000008052e7825 */ /* 0x040fe200078e021a */ /*3a50*/ LDG.E.64 R38, [R38.64] ; /* 0x0000000826267981 */ /* 0x000ee6000c1e1b00 */ /*3a60*/ IMAD.WIDE R26, R5.reuse, 0x8, R44 ; /* 0x00000008051a7825 */ /* 0x041fe200078e022c */ /*3a70*/ LDG.E.64 R32, [R32.64] ; /* 0x0000000820207981 */ /* 0x000ee6000c1e1b00 */ /*3a80*/ IMAD.WIDE R48, R5.reuse, 0x8, R46 ; /* 0x0000000805307825 */ /* 0x050fe200078e022e */ /*3a90*/ LDG.E.64 R30, [R30.64] ; /* 0x000000081e1e7981 */ /* 0x000f28000c1e1b00 */ /*3aa0*/ LDG.E.64 R22, [R42.64] ; /* 0x000000082a167981 */ /* 0x000122000c1e1b00 */ /*3ab0*/ IMAD.WIDE R4, R5, 0x8, R48 ; /* 0x0000000805047825 */ /* 0x000fc600078e0230 */ /*3ac0*/ LDG.E.64 R44, [R44.64] ; /* 0x000000082c2c7981 */ /* 0x000f28000c1e1b00 */ /*3ad0*/ LDG.E.64 R26, [R26.64] ; /* 0x000000081a1a7981 */ /* 0x000f28000c1e1b00 */ /*3ae0*/ LDG.E.64 R42, [R52.64] ; /* 0x00000008342a7981 */ /* 0x001f28000c1e1b00 */ /*3af0*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000812127981 */ /* 0x000f28000c1e1b00 */ /*3b00*/ LDG.E.64 R46, [R46.64] ; /* 0x000000082e2e7981 */ /* 0x000f28000c1e1b00 */ /*3b10*/ LDG.E.64 R48, [R48.64] ; /* 0x0000000830307981 */ /* 0x000f28000c1e1b00 */ /*3b20*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000804047981 */ /* 0x000f22000c1e1b00 */ /*3b30*/ DMUL R20, R20, 4 ; /* 0x4010000014147828 */ /* 0x004fc80000000000 */ /*3b40*/ DMUL R10, R10, 4 ; /* 0x401000000a0a7828 */ /* 0x020e080000000000 */ /*3b50*/ DMUL R40, R40, 4 ; /* 0x4010000028287828 */ /* 0x008e480000000000 */ /*3b60*/ DFMA R10, R14, 6, -R10 ; /* 0x401800000e0a782b */ /* 0x001fc8000000080a */ /*3b70*/ DMUL R12, R12, 4 ; /* 0x401000000c0c7828 */ /* 0x000e080000000000 */ /*3b80*/ DMUL R24, R24, 4 ; /* 0x4010000018187828 */ /* 0x000f080000000000 */ /*3b90*/ DFMA R16, R16, 6, -R20 ; /* 0x401800001010782b */ /* 0x000e880000000814 */ /*3ba0*/ DFMA R38, R38, 6, -R40 ; /* 0x401800002626782b */ /* 0x002e480000000828 */ /*3bb0*/ DFMA R12, R32, 6, -R12 ; /* 0x40180000200c782b */ /* 0x001e08000000080c */ /*3bc0*/ DFMA R24, R30, 6, -R24 ; /* 0x401800001e18782b */ /* 0x010ec80000000818 */ /*3bd0*/ DFMA R10, R34, -4, R10 ; /* 0xc0100000220a782b */ /* 0x000f08000000000a */ /*3be0*/ DFMA R16, R22, -4, R16 ; /* 0xc01000001610782b */ /* 0x004e880000000010 */ /*3bf0*/ DFMA R38, R42, -4, R38 ; /* 0xc01000002a26782b */ /* 0x002e480000000026 */ /*3c00*/ DFMA R12, R44, -4, R12 ; /* 0xc01000002c0c782b */ /* 0x001e08000000000c */ /*3c10*/ DFMA R24, R26, -4, R24 ; /* 0xc01000001a18782b */ /* 0x008ec80000000018 */ /*3c20*/ DADD R10, R10, R18 ; /* 0x000000000a0a7229 */ /* 0x010f080000000012 */ /*3c30*/ DADD R6, R16, R6 ; /* 0x0000000010067229 */ /* 0x004e880000000006 */ /*3c40*/ DADD R38, R38, R46 ; /* 0x0000000026267229 */ /* 0x002e48000000002e */ /*3c50*/ DADD R12, R12, R48 ; /* 0x000000000c0c7229 */ /* 0x001e080000000030 */ /*3c60*/ DADD R4, R24, R4 ; /* 0x0000000018047229 */ /* 0x008ec80000000004 */ /*3c70*/ DFMA R64, R10, -0.25, R64 ; /* 0xbfd000000a40782b */ /* 0x0108080000000040 */ /*3c80*/ DFMA R8, R6, -0.25, R8 ; /* 0xbfd000000608782b */ /* 0x0048880000000008 */ /*3c90*/ DFMA R28, R38, -0.25, R28 ; /* 0xbfd00000261c782b */ /* 0x002848000000001c */ /*3ca0*/ DFMA R66, R12, -0.25, R66 ; /* 0xbfd000000c42782b */ /* 0x0018080000000042 */ /*3cb0*/ DFMA R36, R4, -0.25, R36 ; /* 0xbfd000000424782b */ /* 0x0088e20000000024 */ /*3cc0*/ BRA 0x4720 ; /* 0x00000a5000007947 */ /* 0x000fea0003800000 */ /*3cd0*/ IADD3 R39, R4, -0x3, RZ ; /* 0xfffffffd04277810 */ /* 0x000fc80007ffe0ff */ /*3ce0*/ ISETP.GE.AND P0, PT, R0, R39, PT ; /* 0x000000270000720c */ /* 0x000fda0003f06270 */ /*3cf0*/ @!P0 BRA 0x4140 ; /* 0x0000044000008947 */ /* 0x000fea0003800000 */ /*3d00*/ ISETP.NE.AND P0, PT, R0, R39, PT ; /* 0x000000270000720c */ /* 0x000fda0003f05270 */ /*3d10*/ @!P0 BRA 0x3f20 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*3d20*/ IADD3 R11, R4, -0x2, RZ ; /* 0xfffffffe040b7810 */ /* 0x000fc80007ffe0ff */ /*3d30*/ ISETP.NE.AND P0, PT, R0, R11, PT ; /* 0x0000000b0000720c */ /* 0x000fda0003f05270 */ /*3d40*/ @P0 BRA 0x4720 ; /* 0x000009d000000947 */ /* 0x000fea0003800000 */ /*3d50*/ IADD3 R4, R0, -0x2, RZ ; /* 0xfffffffe00047810 */ /* 0x000fca0007ffe0ff */ /*3d60*/ IMAD R11, R4, c[0x0][0x1ac], R3 ; /* 0x00006b00040b7a24 */ /* 0x000fc800078e0203 */ /*3d70*/ IMAD R6, R11, c[0x0][0x1a8], R2 ; /* 0x00006a000b067a24 */ /* 0x000fc800078e0202 */ /*3d80*/ IMAD.WIDE R6, R6, R7, c[0x0][0x1a0] ; /* 0x0000680006067625 */ /* 0x000fcc00078e0207 */ /*3d90*/ IMAD.WIDE R10, R5.reuse, 0x8, R6 ; /* 0x00000008050a7825 */ /* 0x040fe400078e0206 */ /*3da0*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000806067981 */ /* 0x000ea8000c1e1b00 */ /*3db0*/ IMAD.WIDE R14, R5.reuse, 0x8, R10 ; /* 0x00000008050e7825 */ /* 0x040fe400078e020a */ /*3dc0*/ LDG.E.64 R10, [R10.64] ; /* 0x000000080a0a7981 */ /* 0x000ee8000c1e1b00 */ /*3dd0*/ IMAD.WIDE R18, R5, 0x8, R14 ; /* 0x0000000805127825 */ /* 0x000fc400078e020e */ /*3de0*/ LDG.E.64 R14, [R14.64] ; /* 0x000000080e0e7981 */ /* 0x000f28000c1e1b00 */ /*3df0*/ IMAD.WIDE R4, R5, 0x8, R18 ; /* 0x0000000805047825 */ /* 0x000fe400078e0212 */ /*3e00*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000812127981 */ /* 0x000f68000c1e1b00 */ /*3e10*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000804047981 */ /* 0x000f62000c1e1b00 */ /*3e20*/ DFMA R20, R20, -4, R6 ; /* 0xc01000001414782b */ /* 0x004e080000000006 */ /*3e30*/ DFMA R16, R16, -4, R10 ; /* 0xc01000001010782b */ /* 0x008e48000000000a */ /*3e40*/ DFMA R60, R60, -4, R14 ; /* 0xc01000003c3c782b */ /* 0x010e88000000000e */ /*3e50*/ DFMA R12, R12, -4, R18 ; /* 0xc01000000c0c782b */ /* 0x020ec80000000012 */ /*3e60*/ DFMA R70, R70, -4, R4 ; /* 0xc01000004646782b */ /* 0x000f080000000004 */ /*3e70*/ DFMA R20, R46, 5, R20 ; /* 0x401400002e14782b */ /* 0x001e080000000014 */ /*3e80*/ DFMA R16, R30, 5, R16 ; /* 0x401400001e10782b */ /* 0x002e480000000010 */ /*3e90*/ DFMA R60, R26, 5, R60 ; /* 0x401400001a3c782b */ /* 0x004e88000000003c */ /*3ea0*/ DFMA R12, R34, 5, R12 ; /* 0x40140000220c782b */ /* 0x008ec8000000000c */ /*3eb0*/ DFMA R70, R32, 5, R70 ; /* 0x401400002046782b */ /* 0x010f080000000046 */ /*3ec0*/ DFMA R64, R20, -0.25, R64 ; /* 0xbfd000001440782b */ /* 0x0010080000000040 */ /*3ed0*/ DFMA R8, R16, -0.25, R8 ; /* 0xbfd000001008782b */ /* 0x0022080000000008 */ /*3ee0*/ DFMA R28, R60, -0.25, R28 ; /* 0xbfd000003c1c782b */ /* 0x004288000000001c */ /*3ef0*/ DFMA R66, R12, -0.25, R66 ; /* 0xbfd000000c42782b */ /* 0x0082c80000000042 */ /*3f00*/ DFMA R36, R70, -0.25, R36 ; /* 0xbfd000004624782b */ /* 0x0103220000000024 */ /*3f10*/ BRA 0x4720 ; /* 0x0000080000007947 */ /* 0x000fea0003800000 */ /*3f20*/ IADD3 R4, R0, -0x2, RZ ; /* 0xfffffffe00047810 */ /* 0x000fca0007ffe0ff */ /*3f30*/ IMAD R39, R4, c[0x0][0x1ac], R3 ; /* 0x00006b0004277a24 */ /* 0x000fc800078e0203 */ /*3f40*/ IMAD R6, R39, c[0x0][0x1a8], R2 ; /* 0x00006a0027067a24 */ /* 0x000fc800078e0202 */ /*3f50*/ IMAD.WIDE R6, R6, R7, c[0x0][0x1a0] ; /* 0x0000680006067625 */ /* 0x000fcc00078e0207 */ /*3f60*/ IMAD.WIDE R38, R5.reuse, 0x8, R6 ; /* 0x0000000805267825 */ /* 0x040fe400078e0206 */ /*3f70*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000806067981 */ /* 0x000ea8000c1e1b00 */ /*3f80*/ IMAD.WIDE R42, R5.reuse, 0x8, R38 ; /* 0x00000008052a7825 */ /* 0x040fe200078e0226 */ /*3f90*/ LDG.E.64 R40, [R38.64] ; /* 0x0000000826287981 */ /* 0x000eea000c1e1b00 */ /*3fa0*/ IMAD.WIDE R44, R5, 0x8, R42 ; /* 0x00000008052c7825 */ /* 0x000fc400078e022a */ /*3fb0*/ LDG.E.64 R42, [R42.64] ; /* 0x000000082a2a7981 */ /* 0x000f28000c1e1b00 */ /*3fc0*/ IMAD.WIDE R4, R5, 0x8, R44 ; /* 0x0000000805047825 */ /* 0x000fe400078e022c */ /*3fd0*/ LDG.E.64 R44, [R44.64] ; /* 0x000000082c2c7981 */ /* 0x000f68000c1e1b00 */ /*3fe0*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000804047981 */ /* 0x000f62000c1e1b00 */ /*3ff0*/ DFMA R20, R20, -4, R6 ; /* 0xc01000001414782b */ /* 0x004e080000000006 */ /*4000*/ DFMA R40, R16, -4, R40 ; /* 0xc01000001028782b */ /* 0x008e480000000028 */ /*4010*/ DFMA R42, R60, -4, R42 ; /* 0xc01000003c2a782b */ /* 0x010e88000000002a */ /*4020*/ DFMA R44, R12, -4, R44 ; /* 0xc01000000c2c782b */ /* 0x020ec8000000002c */ /*4030*/ DFMA R4, R70, -4, R4 ; /* 0xc01000004604782b */ /* 0x000f080000000004 */ /*4040*/ DFMA R46, R46, 6, R20 ; /* 0x401800002e2e782b */ /* 0x001e080000000014 */ /*4050*/ DFMA R30, R30, 6, R40 ; /* 0x401800001e1e782b */ /* 0x002e480000000028 */ /*4060*/ DFMA R26, R26, 6, R42 ; /* 0x401800001a1a782b */ /* 0x004e88000000002a */ /*4070*/ DFMA R34, R34, 6, R44 ; /* 0x401800002222782b */ /* 0x008ec8000000002c */ /*4080*/ DFMA R32, R32, 6, R4 ; /* 0x401800002020782b */ /* 0x010f080000000004 */ /*4090*/ DFMA R46, R18, -4, R46 ; /* 0xc0100000122e782b */ /* 0x001e08000000002e */ /*40a0*/ DFMA R30, R14, -4, R30 ; /* 0xc01000000e1e782b */ /* 0x002e48000000001e */ /*40b0*/ DFMA R26, R22, -4, R26 ; /* 0xc0100000161a782b */ /* 0x004e88000000001a */ /*40c0*/ DFMA R34, R10, -4, R34 ; /* 0xc01000000a22782b */ /* 0x008ec80000000022 */ /*40d0*/ DFMA R32, R24, -4, R32 ; /* 0xc01000001820782b */ /* 0x010f080000000020 */ /*40e0*/ DFMA R64, R46, -0.25, R64 ; /* 0xbfd000002e40782b */ /* 0x0010080000000040 */ /*40f0*/ DFMA R8, R30, -0.25, R8 ; /* 0xbfd000001e08782b */ /* 0x0022080000000008 */ /*4100*/ DFMA R28, R26, -0.25, R28 ; /* 0xbfd000001a1c782b */ /* 0x004288000000001c */ /*4110*/ DFMA R66, R34, -0.25, R66 ; /* 0xbfd000002242782b */ /* 0x0082c80000000042 */ /*4120*/ DFMA R36, R32, -0.25, R36 ; /* 0xbfd000002024782b */ /* 0x0103220000000024 */ /*4130*/ BRA 0x4720 ; /* 0x000005e000007947 */ /* 0x000fea0003800000 */ /*4140*/ IADD3 R4, R0, -0x2, RZ ; /* 0xfffffffe00047810 */ /* 0x000fca0007ffe0ff */ /*4150*/ IMAD R41, R4, c[0x0][0x1ac], R3 ; /* 0x00006b0004297a24 */ /* 0x000fe200078e0203 */ /*4160*/ MOV R4, c[0x0][0x1ac] ; /* 0x00006b0000047a02 */ /* 0x000fc60000000f00 */ /*4170*/ IMAD R38, R41, c[0x0][0x1a8], R2 ; /* 0x00006a0029267a24 */ /* 0x000fe200078e0202 */ /*4180*/ LEA R41, R4, R41, 0x2 ; /* 0x0000002904297211 */ /* 0x000fc600078e10ff */ /*4190*/ IMAD.WIDE R38, R38, R7, c[0x0][0x1a0] ; /* 0x0000680026267625 */ /* 0x000fc800078e0207 */ /*41a0*/ IMAD R50, R41, c[0x0][0x1a8], R2 ; /* 0x00006a0029327a24 */ /* 0x000fe200078e0202 */ /*41b0*/ LDG.E.64 R56, [R38.64] ; /* 0x0000000826387981 */ /* 0x0000a2000c1e1b00 */ /*41c0*/ IMAD.WIDE R44, R5, 0x8, R38 ; /* 0x00000008052c7825 */ /* 0x000fc800078e0226 */ /*41d0*/ IMAD.WIDE R50, R50, R7, c[0x0][0x1a0] ; /* 0x0000680032327625 */ /* 0x000fe200078e0207 */ /*41e0*/ LDG.E.64 R52, [R44.64] ; /* 0x000000082c347981 */ /* 0x0002e6000c1e1b00 */ /*41f0*/ IMAD.WIDE R42, R5, 0x8, R44 ; /* 0x00000008052a7825 */ /* 0x000fcc00078e022c */ /*4200*/ IMAD.WIDE R58, R5.reuse, 0x8, R42 ; /* 0x00000008053a7825 */ /* 0x040fe400078e022a */ /*4210*/ LDG.E.64 R42, [R42.64] ; /* 0x000000082a2a7981 */ /* 0x000f24000c1e1b00 */ /*4220*/ IMAD.WIDE R54, R5.reuse, 0x8, R50 ; /* 0x0000000805367825 */ /* 0x040fe400078e0232 */ /*4230*/ LDG.E.64 R38, [R58.64] ; /* 0x000000083a267981 */ /* 0x001f64000c1e1b00 */ /*4240*/ IMAD.WIDE R6, R5.reuse, 0x8, R58 ; /* 0x0000000805067825 */ /* 0x040fe400078e023a */ /*4250*/ LDG.E.64 R50, [R50.64] ; /* 0x0000000832327981 */ /* 0x000f64000c1e1b00 */ /*4260*/ IMAD.WIDE R48, R5, 0x8, R54 ; /* 0x0000000805307825 */ /* 0x000fc400078e0236 */ /*4270*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000806067981 */ /* 0x000f68000c1e1b00 */ /*4280*/ IMAD.WIDE R44, R5.reuse, 0x8, R48 ; /* 0x00000008052c7825 */ /* 0x042fe200078e0230 */ /*4290*/ LDG.E.64 R40, [R54.64] ; /* 0x0000000836287981 */ /* 0x000f68000c1e1b00 */ /*42a0*/ LDG.E.64 R48, [R48.64] ; /* 0x0000000830307981 */ /* 0x000f62000c1e1b00 */ /*42b0*/ IMAD.WIDE R4, R5, 0x8, R44 ; /* 0x0000000805047825 */ /* 0x000fc600078e022c */ /*42c0*/ LDG.E.64 R44, [R44.64] ; /* 0x000000082c2c7981 */ /* 0x000f68000c1e1b00 */ /*42d0*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000804047981 */ /* 0x000f62000c1e1b00 */ /*42e0*/ DFMA R56, R20, -4, R56 ; /* 0xc01000001438782b */ /* 0x004e080000000038 */ /*42f0*/ DFMA R52, R16, -4, R52 ; /* 0xc01000001034782b */ /* 0x008e480000000034 */ /*4300*/ DFMA R56, R46, 6, R56 ; /* 0x401800002e38782b */ /* 0x001fc80000000038 */ /*4310*/ DFMA R42, R60, -4, R42 ; /* 0xc01000003c2a782b */ /* 0x010e08000000002a */ /*4320*/ DFMA R38, R12, -4, R38 ; /* 0xc01000000c26782b */ /* 0x020e880000000026 */ /*4330*/ DFMA R6, R70, -4, R6 ; /* 0xc01000004606782b */ /* 0x000ec80000000006 */ /*4340*/ DFMA R52, R30, 6, R52 ; /* 0x401800001e34782b */ /* 0x002e480000000034 */ /*4350*/ DFMA R42, R26, 6, R42 ; /* 0x401800001a2a782b */ /* 0x001e08000000002a */ /*4360*/ DFMA R38, R34, 6, R38 ; /* 0x401800002226782b */ /* 0x004e880000000026 */ /*4370*/ DFMA R6, R32, 6, R6 ; /* 0x401800002006782b */ /* 0x008ec80000000006 */ /*4380*/ DFMA R56, R18, -4, R56 ; /* 0xc01000001238782b */ /* 0x000f080000000038 */ /*4390*/ DFMA R52, R14, -4, R52 ; /* 0xc01000000e34782b */ /* 0x002e480000000034 */ /*43a0*/ DFMA R42, R22, -4, R42 ; /* 0xc0100000162a782b */ /* 0x001e08000000002a */ /*43b0*/ DFMA R38, R10, -4, R38 ; /* 0xc01000000a26782b */ /* 0x004e880000000026 */ /*43c0*/ DFMA R6, R24, -4, R6 ; /* 0xc01000001806782b */ /* 0x008ec80000000006 */ /*43d0*/ DADD R50, R50, R56 ; /* 0x0000000032327229 */ /* 0x010f080000000038 */ /*43e0*/ DADD R40, R40, R52 ; /* 0x0000000028287229 */ /* 0x002e480000000034 */ /*43f0*/ DADD R48, R48, R42 ; /* 0x0000000030307229 */ /* 0x001e08000000002a */ /*4400*/ DADD R44, R44, R38 ; /* 0x000000002c2c7229 */ /* 0x004e880000000026 */ /*4410*/ DADD R4, R4, R6 ; /* 0x0000000004047229 */ /* 0x008ec80000000006 */ /*4420*/ DFMA R64, R50, -0.25, R64 ; /* 0xbfd000003240782b */ /* 0x0108080000000040 */ /*4430*/ DFMA R8, R40, -0.25, R8 ; /* 0xbfd000002808782b */ /* 0x0028480000000008 */ /*4440*/ DFMA R28, R48, -0.25, R28 ; /* 0xbfd00000301c782b */ /* 0x001808000000001c */ /*4450*/ DFMA R66, R44, -0.25, R66 ; /* 0xbfd000002c42782b */ /* 0x0048880000000042 */ /*4460*/ DFMA R36, R4, -0.25, R36 ; /* 0xbfd000000424782b */ /* 0x0088e20000000024 */ /*4470*/ BRA 0x4720 ; /* 0x000002a000007947 */ /* 0x000fea0003800000 */ /*4480*/ LDG.E.64 R50, [R50.64] ; /* 0x0000000832327981 */ /* 0x007ea8000c1e1b00 */ /*4490*/ LDG.E.64 R6, [R54.64] ; /* 0x0000000836067981 */ /* 0x000ee2000c1e1b00 */ /*44a0*/ IMAD.WIDE R16, R5, 0x8, R38 ; /* 0x0000000805107825 */ /* 0x000fc600078e0226 */ /*44b0*/ LDG.E.64 R48, [R48.64] ; /* 0x0000000830307981 */ /* 0x000f28000c1e1b00 */ /*44c0*/ LDG.E.64 R52, [R52.64] ; /* 0x0000000834347981 */ /* 0x000f62000c1e1b00 */ /*44d0*/ IMAD.WIDE R12, R5, 0x8, R42 ; /* 0x00000008050c7825 */ /* 0x000fc600078e022a */ /*44e0*/ LDG.E.64 R44, [R44.64] ; /* 0x000000082c2c7981 */ /* 0x000f62000c1e1b00 */ /*44f0*/ IMAD.WIDE R14, R5, 0x8, R40 ; /* 0x00000008050e7825 */ /* 0x000fc600078e0228 */ /*4500*/ LDG.E.64 R10, [R42.64] ; /* 0x000000082a0a7981 */ /* 0x000f62000c1e1b00 */ /*4510*/ IMAD.WIDE R22, R5, 0x8, R16 ; /* 0x0000000805167825 */ /* 0x000fc600078e0210 */ /*4520*/ LDG.E.64 R38, [R38.64] ; /* 0x0000000826267981 */ /* 0x000f62000c1e1b00 */ /*4530*/ IMAD.WIDE R18, R5, 0x8, R12 ; /* 0x0000000805127825 */ /* 0x000fc600078e020c */ /*4540*/ LDG.E.64 R16, [R16.64] ; /* 0x0000000810107981 */ /* 0x000f62000c1e1b00 */ /*4550*/ IMAD.WIDE R20, R5, 0x8, R14 ; /* 0x0000000805147825 */ /* 0x000fc600078e020e */ /*4560*/ LDG.E.64 R22, [R22.64] ; /* 0x0000000816167981 */ /* 0x000f62000c1e1b00 */ /*4570*/ IMAD.WIDE R24, R5, 0x8, R18 ; /* 0x0000000805187825 */ /* 0x000fc600078e0212 */ /*4580*/ LDG.E.64 R40, [R40.64] ; /* 0x0000000828287981 */ /* 0x000f68000c1e1b00 */ /*4590*/ LDG.E.64 R14, [R14.64] ; /* 0x000000080e0e7981 */ /* 0x000f68000c1e1b00 */ /*45a0*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000814147981 */ /* 0x000f68000c1e1b00 */ /*45b0*/ LDG.E.64 R12, [R12.64] ; /* 0x000000080c0c7981 */ /* 0x000f68000c1e1b00 */ /*45c0*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000812127981 */ /* 0x000f68000c1e1b00 */ /*45d0*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000f62000c1e1b00 */ /*45e0*/ DMUL R4, R50, 4 ; /* 0x4010000032047828 */ /* 0x004f080000000000 */ /*45f0*/ DMUL R6, R6, 4 ; /* 0x4010000006067828 */ /* 0x008f480000000000 */ /*4600*/ DFMA R4, R48, 5, -R4 ; /* 0x401400003004782b */ /* 0x010e080000000804 */ /*4610*/ DFMA R6, R52, 5, -R6 ; /* 0x401400003406782b */ /* 0x020e480000000806 */ /*4620*/ DADD R4, R44, R4 ; /* 0x000000002c047229 */ /* 0x001e080000000004 */ /*4630*/ DADD R6, R10, R6 ; /* 0x000000000a067229 */ /* 0x002e480000000006 */ /*4640*/ DFMA R64, R4, -0.25, R64 ; /* 0xbfd000000440782b */ /* 0x001fc80000000040 */ /*4650*/ DFMA R8, R6, -0.25, R8 ; /* 0xbfd000000608782b */ /* 0x002fc80000000008 */ /*4660*/ DMUL R4, R38, 4 ; /* 0x4010000026047828 */ /* 0x000e080000000000 */ /*4670*/ DMUL R6, R16, 4 ; /* 0x4010000010067828 */ /* 0x000e480000000000 */ /*4680*/ DMUL R10, R22, 4 ; /* 0x40100000160a7828 */ /* 0x000e880000000000 */ /*4690*/ DFMA R4, R40, 5, -R4 ; /* 0x401400002804782b */ /* 0x001e080000000804 */ /*46a0*/ DFMA R6, R14, 5, -R6 ; /* 0x401400000e06782b */ /* 0x002e480000000806 */ /*46b0*/ DFMA R10, R20, 5, -R10 ; /* 0x40140000140a782b */ /* 0x004e88000000080a */ /*46c0*/ DADD R4, R12, R4 ; /* 0x000000000c047229 */ /* 0x001e080000000004 */ /*46d0*/ DADD R6, R18, R6 ; /* 0x0000000012067229 */ /* 0x002e480000000006 */ /*46e0*/ DADD R10, R24, R10 ; /* 0x00000000180a7229 */ /* 0x004e88000000000a */ /*46f0*/ DFMA R28, R4, -0.25, R28 ; /* 0xbfd00000041c782b */ /* 0x0010c8000000001c */ /*4700*/ DFMA R66, R6, -0.25, R66 ; /* 0xbfd000000642782b */ /* 0x0020480000000042 */ /*4710*/ DFMA R36, R10, -0.25, R36 ; /* 0xbfd000000a24782b */ /* 0x0040880000000024 */ /*4720*/ DMUL R12, R8, c[0x3][0x50] ; /* 0x00c01400080c7a28 */ /* 0x01f0480000000000 */ /*4730*/ DMUL R64, R64, c[0x3][0x50] ; /* 0x00c0140040407a28 */ /* 0x000e880000000000 */ /*4740*/ DMUL R38, R28, c[0x3][0x50] ; /* 0x00c014001c267a28 */ /* 0x0000c80000000000 */ /*4750*/ DMUL R84, R66, c[0x3][0x50] ; /* 0x00c0140042547a28 */ /* 0x0001080000000000 */ /*4760*/ DMUL R8, R36, c[0x3][0x50] ; /* 0x00c0140024087a28 */ /* 0x00000c0000000000 */ /*4770*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x01efea0003800000 */ /*4780*/ IMAD R3, R0, c[0x0][0x1ac], R3 ; /* 0x00006b0000037a24 */ /* 0x000fe200078e0203 */ /*4790*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*47a0*/ IMAD R3, R3, c[0x0][0x1a8], R2 ; /* 0x00006a0003037a24 */ /* 0x000fe200078e0202 */ /*47b0*/ MOV R2, 0x8 ; /* 0x0000000800027802 */ /* 0x000fc80000000f00 */ /*47c0*/ LEA R3, R3, R3, 0x2 ; /* 0x0000000303037211 */ /* 0x000fca00078e10ff */ /*47d0*/ IMAD.WIDE R2, R3, R2, c[0x0][0x190] ; /* 0x0000640003027625 */ /* 0x000fca00078e0202 */ /*47e0*/ STG.E.64 [R2.64], R64 ; /* 0x0000004002007986 */ /* 0x020fe8000c101b04 */ /*47f0*/ STG.E.64 [R2.64+0x8], R12 ; /* 0x0000080c02007986 */ /* 0x000fe8000c101b04 */ /*4800*/ STG.E.64 [R2.64+0x10], R38 ; /* 0x0000102602007986 */ /* 0x000fe8000c101b04 */ /*4810*/ STG.E.64 [R2.64+0x18], R84 ; /* 0x0000185402007986 */ /* 0x000fe8000c101b04 */ /*4820*/ STG.E.64 [R2.64+0x20], R8 ; /* 0x0000200802007986 */ /* 0x001fe2000c101b04 */ /*4830*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*4840*/ BRA 0x4840; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*4850*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4860*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4870*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4880*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*4890*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*48a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*48b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*48c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*48d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*48e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*48f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R8, SR_CTAID.Y ; /* 0x0000000000087919 */ /* 0x000e220000002600 */ /*0020*/ IMAD.MOV.U32 R7, RZ, RZ, 0x8 ; /* 0x00000008ff077424 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */ /* 0x000e280000002500 */ /*0050*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */ /* 0x000e620000002100 */ /*0060*/ IMAD R3, R8, c[0x0][0x1a4], R5 ; /* 0x0000690008037a24 */ /* 0x001fc800078e0205 */ /*0070*/ IMAD R0, R3, c[0x0][0x1a0], R4 ; /* 0x0000680003007a24 */ /* 0x002fc800078e0204 */ /*0080*/ IMAD.WIDE R2, R0, R7, c[0x0][0x198] ; /* 0x0000660000027625 */ /* 0x000fca00078e0207 */ /*0090*/ LDG.E.64 R10, [R2.64] ; /* 0x00000004020a7981 */ /* 0x000ea2000c1e1b00 */ /*00a0*/ BSSY B0, 0x1b0 ; /* 0x0000010000007945 */ /* 0x000fe20003800000 */ /*00b0*/ MUFU.RCP64H R7, R11 ; /* 0x0000000b00077308 */ /* 0x004e220000001800 */ /*00c0*/ IADD3 R6, R11, 0x300402, RZ ; /* 0x003004020b067810 */ /* 0x000fc80007ffe0ff */ /*00d0*/ FSETP.GEU.AND P0, PT, |R6|, 5.8789094863358348022e-39, PT ; /* 0x004004020600780b */ /* 0x000fe40003f0e200 */ /*00e0*/ DFMA R12, -R10, R6, 1 ; /* 0x3ff000000a0c742b */ /* 0x001e0c0000000106 */ /*00f0*/ DFMA R12, R12, R12, R12 ; /* 0x0000000c0c0c722b */ /* 0x001e0c000000000c */ /*0100*/ DFMA R12, R6, R12, R6 ; /* 0x0000000c060c722b */ /* 0x001e0c0000000006 */ /*0110*/ DFMA R14, -R10, R12, 1 ; /* 0x3ff000000a0e742b */ /* 0x001e0c000000010c */ /*0120*/ DFMA R6, R12, R14, R12 ; /* 0x0000000e0c06722b */ /* 0x001062000000000c */ /*0130*/ @P0 BRA 0x1a0 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*0140*/ LOP3.LUT R6, R11, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0b067812 */ /* 0x002fc800078ec0ff */ /*0150*/ IADD3 R14, R6, -0x100000, RZ ; /* 0xfff00000060e7810 */ /* 0x001fe40007ffe0ff */ /*0160*/ MOV R6, 0x180 ; /* 0x0000018000067802 */ /* 0x000fe40000000f00 */ /*0170*/ CALL.REL.NOINC 0x640 ; /* 0x000004c000007944 */ /* 0x000fea0003c00000 */ /*0180*/ MOV R6, R12 ; /* 0x0000000c00067202 */ /* 0x003fe20000000f00 */ /*0190*/ IMAD.MOV.U32 R7, RZ, RZ, R13 ; /* 0x000000ffff077224 */ /* 0x000fe400078e000d */ /*01a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*01b0*/ IADD3 R10, R8, c[0x0][0x1a8], RZ ; /* 0x00006a00080a7a10 */ /* 0x000fe20007ffe0ff */ /*01c0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x8 ; /* 0x00000008ff0b7424 */ /* 0x000fc800078e00ff */ /*01d0*/ IMAD R9, R10, c[0x0][0x1a4], R5 ; /* 0x000069000a097a24 */ /* 0x000fe400078e0205 */ /*01e0*/ IMAD.WIDE R14, R0, R11, c[0x0][0x160] ; /* 0x00005800000e7625 */ /* 0x001fc800078e020b */ /*01f0*/ IMAD R8, R9, c[0x0][0x1a0], R4 ; /* 0x0000680009087a24 */ /* 0x000fe200078e0204 */ /*0200*/ STG.E.64 [R14.64], R6 ; /* 0x000000060e007986 */ /* 0x0021e6000c101b04 */ /*0210*/ IMAD.WIDE R8, R8, R11, c[0x0][0x198] ; /* 0x0000660008087625 */ /* 0x000fca00078e020b */ /*0220*/ LDG.E.64 R16, [R8.64] ; /* 0x0000000408107981 */ /* 0x000ea2000c1e1b00 */ /*0230*/ MOV R12, c[0x0][0x1a8] ; /* 0x00006a00000c7a02 */ /* 0x000fe20000000f00 */ /*0240*/ IMAD.WIDE R18, R0, R11, c[0x0][0x168] ; /* 0x00005a0000127625 */ /* 0x000fc800078e020b */ /*0250*/ IMAD R12, R12, c[0x0][0x1a4], RZ ; /* 0x000069000c0c7a24 */ /* 0x000fc800078e02ff */ /*0260*/ IMAD R12, R12, c[0x0][0x1a0], RZ ; /* 0x000068000c0c7a24 */ /* 0x000fc800078e02ff */ /*0270*/ IMAD.SHL.U32 R13, R12, 0x2, RZ ; /* 0x000000020c0d7824 */ /* 0x000fc800078e00ff */ /*0280*/ IMAD.WIDE R2, R13, 0x8, R2 ; /* 0x000000080d027825 */ /* 0x000fe200078e0202 */ /*0290*/ DMUL R16, R16, R6 ; /* 0x0000000610107228 */ /* 0x004e4e0000000000 */ /*02a0*/ STG.E.64 [R18.64], R16 ; /* 0x0000001012007986 */ /* 0x0023e8000c101b04 */ /*02b0*/ LDG.E.64 R20, [R2.64] ; /* 0x0000000402147981 */ /* 0x000ea2000c1e1b00 */ /*02c0*/ MOV R15, c[0x0][0x1a8] ; /* 0x00006a00000f7a02 */ /* 0x001fca0000000f00 */ /*02d0*/ IMAD R10, R15, 0x2, R10 ; /* 0x000000020f0a7824 */ /* 0x000fc800078e020a */ /*02e0*/ IMAD R5, R10, c[0x0][0x1a4], R5 ; /* 0x000069000a057a24 */ /* 0x000fc800078e0205 */ /*02f0*/ IMAD R14, R5, c[0x0][0x1a0], R4 ; /* 0x00006800050e7a24 */ /* 0x000fe400078e0204 */ /*0300*/ IMAD.WIDE R4, R0, R11, c[0x0][0x170] ; /* 0x00005c0000047625 */ /* 0x000fc800078e020b */ /*0310*/ IMAD.WIDE R14, R14, R11, c[0x0][0x198] ; /* 0x000066000e0e7625 */ /* 0x000fe200078e020b */ /*0320*/ DMUL R20, R20, R6 ; /* 0x0000000614147228 */ /* 0x004e0e0000000000 */ /*0330*/ STG.E.64 [R4.64], R20 ; /* 0x0000001404007986 */ /* 0x0011e8000c101b04 */ /*0340*/ LDG.E.64 R22, [R14.64] ; /* 0x000000040e167981 */ /* 0x000ea2000c1e1b00 */ /*0350*/ IMAD.WIDE R16, R0, R11, c[0x0][0x178] ; /* 0x00005e0000107625 */ /* 0x002fe200078e020b */ /*0360*/ DMUL R22, R22, R6 ; /* 0x0000000616167228 */ /* 0x004e4e0000000000 */ /*0370*/ STG.E.64 [R16.64], R22 ; /* 0x0000001610007986 */ /* 0x002fe8000c101b04 */ /*0380*/ LDG.E.64 R18, [R2.64] ; /* 0x0000000402127981 */ /* 0x0002a8000c1e1b00 */ /*0390*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee8000c1e1b00 */ /*03a0*/ LDG.E.64 R24, [R14.64] ; /* 0x000000040e187981 */ /* 0x000f22000c1e1b00 */ /*03b0*/ IMAD.WIDE R4, R0, R11, c[0x0][0x190] ; /* 0x0000640000047625 */ /* 0x001fc800078e020b */ /*03c0*/ IMAD.WIDE R10, R0, R11, c[0x0][0x188] ; /* 0x00006200000a7625 */ /* 0x000fc800078e020b */ /*03d0*/ IMAD.WIDE R2, R13, 0x8, R2 ; /* 0x000000080d027825 */ /* 0x002fe200078e0202 */ /*03e0*/ DMUL R18, R18, R18 ; /* 0x0000001212127228 */ /* 0x004ecc0000000000 */ /*03f0*/ DFMA R18, R8, R8, R18 ; /* 0x000000080812722b */ /* 0x008f0c0000000012 */ /*0400*/ DFMA R18, R24, R24, R18 ; /* 0x000000181812722b */ /* 0x010e0c0000000012 */ /*0410*/ DMUL R18, R18, 0.5 ; /* 0x3fe0000012127828 */ /* 0x001e0c0000000000 */ /*0420*/ DMUL R18, R18, R6 ; /* 0x0000000612127228 */ /* 0x001e0c0000000000 */ /*0430*/ DMUL R20, R18, R6 ; /* 0x0000000612147228 */ /* 0x001e220000000000 */ /*0440*/ STG.E.64 [R4.64], R18 ; /* 0x0000001204007986 */ /* 0x0003ec000c101b04 */ /*0450*/ STG.E.64 [R10.64], R20 ; /* 0x000000140a007986 */ /* 0x0011e8000c101b04 */ /*0460*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e1b00 */ /*0470*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fe20000000000 */ /*0480*/ MOV R12, 0x0 ; /* 0x00000000000c7802 */ /* 0x000fe20000000f00 */ /*0490*/ IMAD.MOV.U32 R13, RZ, RZ, 0x3fd80000 ; /* 0x3fd80000ff0d7424 */ /* 0x000fe200078e00ff */ /*04a0*/ BSSY B0, 0x600 ; /* 0x0000015000007945 */ /* 0x000fe20003800000 */ /*04b0*/ DADD R8, -R18, R2 ; /* 0x0000000012087229 */ /* 0x004e8c0000000102 */ /*04c0*/ DMUL R14, R6, R8 ; /* 0x00000008060e7228 */ /* 0x004e8c0000000000 */ /*04d0*/ MUFU.RSQ64H R7, R15 ; /* 0x0000000f00077308 */ /* 0x004ea80000001c00 */ /*04e0*/ IADD3 R6, R15, -0x3500000, RZ ; /* 0xfcb000000f067810 */ /* 0x000fc80007ffe0ff */ /*04f0*/ ISETP.GE.U32.AND P0, PT, R6, 0x7ca00000, PT ; /* 0x7ca000000600780c */ /* 0x000fe40003f06070 */ /*0500*/ DMUL R8, R6, R6 ; /* 0x0000000606087228 */ /* 0x004e8c0000000000 */ /*0510*/ DFMA R8, R14, -R8, 1 ; /* 0x3ff000000e08742b */ /* 0x004e4c0000000808 */ /*0520*/ DFMA R4, R8, R12, 0.5 ; /* 0x3fe000000804742b */ /* 0x002fc8000000000c */ /*0530*/ DMUL R8, R6, R8 ; /* 0x0000000806087228 */ /* 0x000e4c0000000000 */ /*0540*/ DFMA R8, R4, R8, R6 ; /* 0x000000080408722b */ /* 0x002e0c0000000006 */ /*0550*/ DMUL R10, R14, R8 ; /* 0x000000080e0a7228 */ /* 0x001e080000000000 */ /*0560*/ IADD3 R5, R9, -0x100000, RZ ; /* 0xfff0000009057810 */ /* 0x000fe40007ffe0ff */ /*0570*/ DFMA R12, R10, -R10, R14 ; /* 0x8000000a0a0c722b */ /* 0x001e22000000000e */ /*0580*/ MOV R4, R8 ; /* 0x0000000800047202 */ /* 0x000fcc0000000f00 */ /*0590*/ DFMA R2, R12, R4, R10 ; /* 0x000000040c02722b */ /* 0x001062000000000a */ /*05a0*/ @!P0 BRA 0x5f0 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*05b0*/ MOV R2, 0x5d0 ; /* 0x000005d000027802 */ /* 0x002fca0000000f00 */ /*05c0*/ CALL.REL.NOINC 0x8b0 ; /* 0x000002e000007944 */ /* 0x001fea0003c00000 */ /*05d0*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */ /* 0x002fe200078e0004 */ /*05e0*/ MOV R3, R5 ; /* 0x0000000500037202 */ /* 0x000fe40000000f00 */ /*05f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0600*/ IMAD.MOV.U32 R5, RZ, RZ, 0x8 ; /* 0x00000008ff057424 */ /* 0x001fc800078e00ff */ /*0610*/ IMAD.WIDE R4, R0, R5, c[0x0][0x180] ; /* 0x0000600000047625 */ /* 0x000fca00078e0205 */ /*0620*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */ /* 0x002fe2000c101b04 */ /*0630*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0640*/ DSETP.GTU.AND P0, PT, |R10|, +INF , PT ; /* 0x7ff000000a00742a */ /* 0x000e220003f0c200 */ /*0650*/ BSSY B1, 0x890 ; /* 0x0000023000017945 */ /* 0x000fda0003800000 */ /*0660*/ @P0 BRA 0x860 ; /* 0x000001f000000947 */ /* 0x001fea0003800000 */ /*0670*/ LOP3.LUT R7, R11, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0b077812 */ /* 0x000fc800078ec0ff */ /*0680*/ IADD3 R9, R7, -0x1, RZ ; /* 0xffffffff07097810 */ /* 0x000fc80007ffe0ff */ /*0690*/ ISETP.GE.U32.AND P0, PT, R9, 0x7fefffff, PT ; /* 0x7fefffff0900780c */ /* 0x000fda0003f06070 */ /*06a0*/ @P0 LOP3.LUT R13, R11, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff000000b0d0812 */ /* 0x000fe400078e3cff */ /*06b0*/ @P0 MOV R12, RZ ; /* 0x000000ff000c0202 */ /* 0x000fe20000000f00 */ /*06c0*/ @P0 BRA 0x880 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*06d0*/ ISETP.GE.U32.AND P0, PT, R7, 0x1000001, PT ; /* 0x010000010700780c */ /* 0x000fda0003f06070 */ /*06e0*/ @!P0 BRA 0x7c0 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*06f0*/ IADD3 R13, R11, -0x3fe00000, RZ ; /* 0xc02000000b0d7810 */ /* 0x000fe20007ffe0ff */ /*0700*/ IMAD.MOV.U32 R12, RZ, RZ, R10 ; /* 0x000000ffff0c7224 */ /* 0x000fc600078e000a */ /*0710*/ MUFU.RCP64H R15, R13 ; /* 0x0000000d000f7308 */ /* 0x000e260000001800 */ /*0720*/ DFMA R16, -R12, R14, 1 ; /* 0x3ff000000c10742b */ /* 0x001e0c000000010e */ /*0730*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */ /* 0x001e0c0000000010 */ /*0740*/ DFMA R16, R14, R16, R14 ; /* 0x000000100e10722b */ /* 0x001e0c000000000e */ /*0750*/ DFMA R14, -R12, R16, 1 ; /* 0x3ff000000c0e742b */ /* 0x001e0c0000000110 */ /*0760*/ DFMA R14, R16, R14, R16 ; /* 0x0000000e100e722b */ /* 0x001e0c0000000010 */ /*0770*/ DMUL R14, R14, 2.2250738585072013831e-308 ; /* 0x001000000e0e7828 */ /* 0x001e0c0000000000 */ /*0780*/ DFMA R10, -R10, R14, 1 ; /* 0x3ff000000a0a742b */ /* 0x001e0c000000010e */ /*0790*/ DFMA R10, R10, R10, R10 ; /* 0x0000000a0a0a722b */ /* 0x001e0c000000000a */ /*07a0*/ DFMA R12, R14, R10, R14 ; /* 0x0000000a0e0c722b */ /* 0x001062000000000e */ /*07b0*/ BRA 0x880 ; /* 0x000000c000007947 */ /* 0x000fea0003800000 */ /*07c0*/ DMUL R10, R10, 8.11296384146066816958e+31 ; /* 0x469000000a0a7828 */ /* 0x000e220000000000 */ /*07d0*/ MOV R12, R14 ; /* 0x0000000e000c7202 */ /* 0x000fca0000000f00 */ /*07e0*/ MUFU.RCP64H R13, R11 ; /* 0x0000000b000d7308 */ /* 0x001e240000001800 */ /*07f0*/ DFMA R14, -R10, R12, 1 ; /* 0x3ff000000a0e742b */ /* 0x001e0c000000010c */ /*0800*/ DFMA R14, R14, R14, R14 ; /* 0x0000000e0e0e722b */ /* 0x001e0c000000000e */ /*0810*/ DFMA R14, R12, R14, R12 ; /* 0x0000000e0c0e722b */ /* 0x001e0c000000000c */ /*0820*/ DFMA R12, -R10, R14, 1 ; /* 0x3ff000000a0c742b */ /* 0x001e0c000000010e */ /*0830*/ DFMA R12, R14, R12, R14 ; /* 0x0000000c0e0c722b */ /* 0x001e0c000000000e */ /*0840*/ DMUL R12, R12, 8.11296384146066816958e+31 ; /* 0x469000000c0c7828 */ /* 0x001e220000000000 */ /*0850*/ BRA 0x880 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*0860*/ LOP3.LUT R13, R11, 0x80000, RZ, 0xfc, !PT ; /* 0x000800000b0d7812 */ /* 0x000fe200078efcff */ /*0870*/ IMAD.MOV.U32 R12, RZ, RZ, R10 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e000a */ /*0880*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0890*/ MOV R7, 0x0 ; /* 0x0000000000077802 */ /* 0x000fc80000000f00 */ /*08a0*/ RET.REL.NODEC R6 0x0 ; /* 0xfffff75006007950 */ /* 0x000fea0003c3ffff */ /*08b0*/ ISETP.GE.U32.AND P0, PT, R6, -0x3400000, PT ; /* 0xfcc000000600780c */ /* 0x000fe20003f06070 */ /*08c0*/ BSSY B1, 0xb50 ; /* 0x0000028000017945 */ /* 0x000fe20003800000 */ /*08d0*/ IMAD.MOV.U32 R9, RZ, RZ, R5 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0005 */ /*08e0*/ MOV R6, R14 ; /* 0x0000000e00067202 */ /* 0x000fe20000000f00 */ /*08f0*/ IMAD.MOV.U32 R7, RZ, RZ, R15 ; /* 0x000000ffff077224 */ /* 0x000fe200078e000f */ /*0900*/ MOV R4, R12 ; /* 0x0000000c00047202 */ /* 0x000fe20000000f00 */ /*0910*/ IMAD.MOV.U32 R5, RZ, RZ, R13 ; /* 0x000000ffff057224 */ /* 0x000fce00078e000d */ /*0920*/ @!P0 BRA 0x9b0 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*0930*/ DFMA.RM R4, R4, R8, R10 ; /* 0x000000080404722b */ /* 0x000e14000000400a */ /*0940*/ IADD3 R8, P0, R4, 0x1, RZ ; /* 0x0000000104087810 */ /* 0x001fc80007f1e0ff */ /*0950*/ IADD3.X R9, RZ, R5, RZ, P0, !PT ; /* 0x00000005ff097210 */ /* 0x000fcc00007fe4ff */ /*0960*/ DFMA.RP R6, -R4, R8, R6 ; /* 0x000000080406722b */ /* 0x000e0c0000008106 */ /*0970*/ DSETP.GT.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600722a */ /* 0x001e0c0003f04000 */ /*0980*/ FSEL R4, R8, R4, P0 ; /* 0x0000000408047208 */ /* 0x001fe40000000000 */ /*0990*/ FSEL R5, R9, R5, P0 ; /* 0x0000000509057208 */ /* 0x000fe20000000000 */ /*09a0*/ BRA 0xb40 ; /* 0x0000019000007947 */ /* 0x000fea0003800000 */ /*09b0*/ DSETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600722a */ /* 0x000e1c0003f05000 */ /*09c0*/ @!P0 BRA 0xb30 ; /* 0x0000016000008947 */ /* 0x001fea0003800000 */ /*09d0*/ ISETP.GE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fda0003f06270 */ /*09e0*/ @!P0 IMAD.MOV.U32 R4, RZ, RZ, 0x0 ; /* 0x00000000ff048424 */ /* 0x000fe200078e00ff */ /*09f0*/ @!P0 MOV R5, 0xfff80000 ; /* 0xfff8000000058802 */ /* 0x000fe20000000f00 */ /*0a00*/ @!P0 BRA 0xb40 ; /* 0x0000013000008947 */ /* 0x000fea0003800000 */ /*0a10*/ ISETP.GT.AND P0, PT, R7, 0x7fefffff, PT ; /* 0x7fefffff0700780c */ /* 0x000fda0003f04270 */ /*0a20*/ @P0 BRA 0xb30 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*0a30*/ DMUL R4, R6, 8.11296384146066816958e+31 ; /* 0x4690000006047828 */ /* 0x0000620000000000 */ /*0a40*/ MOV R10, 0x0 ; /* 0x00000000000a7802 */ /* 0x000fe20000000f00 */ /*0a50*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x001fe400078e00ff */ /*0a60*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3fd80000 ; /* 0x3fd80000ff0b7424 */ /* 0x000fe400078e00ff */ /*0a70*/ MUFU.RSQ64H R7, R5 ; /* 0x0000000500077308 */ /* 0x002e240000001c00 */ /*0a80*/ DMUL R8, R6, R6 ; /* 0x0000000606087228 */ /* 0x001e0c0000000000 */ /*0a90*/ DFMA R8, R4, -R8, 1 ; /* 0x3ff000000408742b */ /* 0x001e0c0000000808 */ /*0aa0*/ DFMA R10, R8, R10, 0.5 ; /* 0x3fe00000080a742b */ /* 0x001fc8000000000a */ /*0ab0*/ DMUL R8, R6, R8 ; /* 0x0000000806087228 */ /* 0x000e0c0000000000 */ /*0ac0*/ DFMA R8, R10, R8, R6 ; /* 0x000000080a08722b */ /* 0x001e0c0000000006 */ /*0ad0*/ DMUL R6, R4, R8 ; /* 0x0000000804067228 */ /* 0x0010480000000000 */ /*0ae0*/ IADD3 R9, R9, -0x100000, RZ ; /* 0xfff0000009097810 */ /* 0x001fe40007ffe0ff */ /*0af0*/ DFMA R10, R6, -R6, R4 ; /* 0x80000006060a722b */ /* 0x002e0c0000000004 */ /*0b00*/ DFMA R4, R8, R10, R6 ; /* 0x0000000a0804722b */ /* 0x001e140000000006 */ /*0b10*/ IADD3 R5, R5, -0x3500000, RZ ; /* 0xfcb0000005057810 */ /* 0x001fe20007ffe0ff */ /*0b20*/ BRA 0xb40 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0b30*/ DADD R4, R6, R6 ; /* 0x0000000006047229 */ /* 0x00004c0000000006 */ /*0b40*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0b50*/ MOV R3, 0x0 ; /* 0x0000000000037802 */ /* 0x000fc80000000f00 */ /*0b60*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff49002007950 */ /* 0x000fea0003c3ffff */ /*0b70*/ BRA 0xb70; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0b80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0b90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ba0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0bb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0bc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0bd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0be0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0bf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z17initialize_kernelPdiii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R88, SR_CTAID.Y ; /* 0x0000000000587919 */ /* 0x000e220000002600 */ /*0020*/ MOV R14, c[0x3][0x3a0] ; /* 0x00c0e800000e7a02 */ /* 0x000fe20000000f00 */ /*0030*/ IMAD.MOV.U32 R15, RZ, RZ, c[0x3][0x3a4] ; /* 0x00c0e900ff0f7624 */ /* 0x000fe200078e00ff */ /*0040*/ MOV R4, c[0x3][0x300] ; /* 0x00c0c00000047a02 */ /* 0x000fe20000000f00 */ /*0050*/ S2R R89, SR_TID.X ; /* 0x0000000000597919 */ /* 0x000e620000002100 */ /*0060*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x3][0x304] ; /* 0x00c0c100ff057624 */ /* 0x000fe200078e00ff */ /*0070*/ MOV R13, c[0x3][0x37c] ; /* 0x00c0df00000d7a02 */ /* 0x000fe20000000f00 */ /*0080*/ IMAD.MOV.U32 R12, RZ, RZ, c[0x3][0x378] ; /* 0x00c0de00ff0c7624 */ /* 0x000fe200078e00ff */ /*0090*/ DFMA R6, RZ, R14, c[0x3][0x328] ; /* 0x00c0ca00ff06762b */ /* 0x000ea2000000000e */ /*00a0*/ MOV R10, c[0x3][0x328] ; /* 0x00c0ca00000a7a02 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD.MOV.U32 R20, RZ, RZ, c[0x3][0x330] ; /* 0x00c0cc00ff147624 */ /* 0x000fe200078e00ff */ /*00c0*/ MOV R11, c[0x3][0x32c] ; /* 0x00c0cb00000b7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ DADD R4, R4, c[0x3][0x378] ; /* 0x00c0de0004047629 */ /* 0x000ee20000000000 */ /*00e0*/ MOV R26, c[0x3][0x3a8] ; /* 0x00c0ea00001a7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.MOV.U32 R25, RZ, RZ, c[0x3][0x384] ; /* 0x00c0e100ff197624 */ /* 0x000fe200078e00ff */ /*0100*/ MOV R27, c[0x3][0x3ac] ; /* 0x00c0eb00001b7a02 */ /* 0x000fe20000000f00 */ /*0110*/ DFMA R8, RZ, R6, c[0x3][0x2b0] ; /* 0x00c0ac00ff08762b */ /* 0x004fe20000000006 */ /*0120*/ MOV R21, c[0x3][0x334] ; /* 0x00c0cd0000157a02 */ /* 0x000fe20000000f00 */ /*0130*/ IMAD.MOV.U32 R32, RZ, RZ, c[0x3][0x3b0] ; /* 0x00c0ec00ff207624 */ /* 0x000fe200078e00ff */ /*0140*/ MOV R24, c[0x3][0x380] ; /* 0x00c0e00000187a02 */ /* 0x000fe20000000f00 */ /*0150*/ DADD R6, R4, c[0x3][0x288] ; /* 0x00c0a20004067629 */ /* 0x008fe20000000000 */ /*0160*/ MOV R33, c[0x3][0x3b4] ; /* 0x00c0ed0000217a02 */ /* 0x000fe20000000f00 */ /*0170*/ IMAD.MOV.U32 R31, RZ, RZ, c[0x3][0x33c] ; /* 0x00c0cf00ff1f7624 */ /* 0x000fe200078e00ff */ /*0180*/ MOV R30, c[0x3][0x338] ; /* 0x00c0ce00001e7a02 */ /* 0x000fe20000000f00 */ /*0190*/ I2F.F64 R68, R88 ; /* 0x0000005800447312 */ /* 0x001e220000201c00 */ /*01a0*/ DADD R10, R10, c[0x3][0x3a0] ; /* 0x00c0e8000a0a7629 */ /* 0x000ea20000000000 */ /*01b0*/ MOV R34, c[0x3][0x388] ; /* 0x00c0e20000227a02 */ /* 0x000fe20000000f00 */ /*01c0*/ S2R R91, SR_CTAID.X ; /* 0x00000000005b7919 */ /* 0x000ee20000002500 */ /*01d0*/ MOV R35, c[0x3][0x38c] ; /* 0x00c0e30000237a02 */ /* 0x000fe20000000f00 */ /*01e0*/ DFMA R2, RZ, R12, c[0x3][0x300] ; /* 0x00c0c000ff02762b */ /* 0x000f22000000000c */ /*01f0*/ IMAD.MOV.U32 R46, RZ, RZ, c[0x3][0x3b8] ; /* 0x00c0ee00ff2e7624 */ /* 0x000fe200078e00ff */ /*0200*/ MOV R47, c[0x3][0x3bc] ; /* 0x00c0ef00002f7a02 */ /* 0x000fe20000000f00 */ /*0210*/ I2F.F64 R52, R89 ; /* 0x0000005900347312 */ /* 0x002e620000201c00 */ /*0220*/ DADD R10, R10, c[0x3][0x2b0] ; /* 0x00c0ac000a0a7629 */ /* 0x004fe20000000000 */ /*0230*/ IMAD.MOV.U32 R38, RZ, RZ, c[0x3][0x340] ; /* 0x00c0d000ff267624 */ /* 0x000fe200078e00ff */ /*0240*/ MOV R39, c[0x3][0x344] ; /* 0x00c0d10000277a02 */ /* 0x000fe20000000f00 */ /*0250*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0260*/ DADD R6, R6, c[0x3][0x210] ; /* 0x00c0840006067629 */ /* 0x000fe20000000000 */ /*0270*/ MOV R48, c[0x3][0x390] ; /* 0x00c0e40000307a02 */ /* 0x000fe20000000f00 */ /*0280*/ BSSY B0, 0x1920 ; /* 0x0000169000007945 */ /* 0x000fe20003800000 */ /*0290*/ MOV R49, c[0x3][0x394] ; /* 0x00c0e50000317a02 */ /* 0x000fe20000000f00 */ /*02a0*/ DMUL R68, R68, c[0x3][0x68] ; /* 0x00c01a0044447a28 */ /* 0x001e220000000000 */ /*02b0*/ I2F.F64 R58, R88 ; /* 0x00000058003a7312 */ /* 0x000fe20000201c00 */ /*02c0*/ ISETP.NE.AND P0, PT, R89, RZ, PT ; /* 0x000000ff5900720c */ /* 0x000fc40003f05270 */ /*02d0*/ DFMA R2, RZ, R2, c[0x3][0x288] ; /* 0x00c0a200ff02762b */ /* 0x010fc80000000002 */ /*02e0*/ DMUL R52, R52, c[0x3][0x60] ; /* 0x00c0180034347a28 */ /* 0x002e620000000000 */ /*02f0*/ I2F.F64 R54, R91 ; /* 0x0000005b00367312 */ /* 0x008ea20000201c00 */ /*0300*/ IMAD R0, R91, c[0x0][0x16c], R88 ; /* 0x00005b005b007a24 */ /* 0x000fe400078e0258 */ /*0310*/ DFMA R4, R68, R14, c[0x3][0x328] ; /* 0x00c0ca004404762b */ /* 0x001e08000000000e */ /*0320*/ DFMA R14, RZ, R8, c[0x3][0x238] ; /* 0x00c08e00ff0e762b */ /* 0x000fc80000000008 */ /*0330*/ DFMA R8, R52, R12, c[0x3][0x300] ; /* 0x00c0c0003408762b */ /* 0x002e48000000000c */ /*0340*/ DFMA R4, R68, R4, c[0x3][0x2b0] ; /* 0x00c0ac004404762b */ /* 0x001fc80000000004 */ /*0350*/ DFMA R8, R52, R8, c[0x3][0x288] ; /* 0x00c0a2003408762b */ /* 0x002e080000000008 */ /*0360*/ DADD R16, R10, c[0x3][0x238] ; /* 0x00c08e000a107629 */ /* 0x000fc80000000000 */ /*0370*/ DFMA R8, R52, R8, c[0x3][0x210] ; /* 0x00c084003408762b */ /* 0x001e080000000008 */ /*0380*/ DADD R6, R6, c[0x3][0x1e8] ; /* 0x00c07a0006067629 */ /* 0x000fc80000000000 */ /*0390*/ DFMA R10, R52, R8, c[0x3][0x1e8] ; /* 0x00c07a00340a762b */ /* 0x001e080000000008 */ /*03a0*/ DFMA R12, R68, R4, c[0x3][0x238] ; /* 0x00c08e00440c762b */ /* 0x000e480000000004 */ /*03b0*/ DFMA R2, RZ, R2, c[0x3][0x210] ; /* 0x00c08400ff02762b */ /* 0x000ec80000000002 */ /*03c0*/ DADD R8, R10, R16 ; /* 0x000000000a087229 */ /* 0x001fc80000000010 */ /*03d0*/ DFMA R16, RZ, R26, c[0x3][0x330] ; /* 0x00c0cc00ff10762b */ /* 0x000e08000000001a */ /*03e0*/ DFMA R4, R68, R12, R6 ; /* 0x0000000c4404722b */ /* 0x002fc80000000006 */ /*03f0*/ DFMA R2, RZ, R2, c[0x3][0x1e8] ; /* 0x00c07a00ff02762b */ /* 0x008e480000000002 */ /*0400*/ DFMA R6, RZ, R14, R10 ; /* 0x0000000eff06722b */ /* 0x0007e4000000000a */ /*0410*/ MOV R14, c[0x3][0x308] ; /* 0x00c0c200000e7a02 */ /* 0x008fe40000000f00 */ /*0420*/ MOV R15, c[0x3][0x30c] ; /* 0x00c0c300000f7a02 */ /* 0x000fe20000000f00 */ /*0430*/ DADD R20, R20, c[0x3][0x3a8] ; /* 0x00c0ea0014147629 */ /* 0x000ec80000000000 */ /*0440*/ DFMA R18, RZ, R16, c[0x3][0x2b8] ; /* 0x00c0ae00ff12762b */ /* 0x001e080000000010 */ /*0450*/ DFMA R2, R68, R12, R2 ; /* 0x0000000c4402722b */ /* 0x002fc80000000002 */ /*0460*/ DFMA R12, R68, R12, R10 ; /* 0x0000000c440c722b */ /* 0x000fc8000000000a */ /*0470*/ DADD R14, R14, c[0x3][0x380] ; /* 0x00c0e0000e0e7629 */ /* 0x000e480000000000 */ /*0480*/ DADD R22, R20, c[0x3][0x2b8] ; /* 0x00c0ae0014167629 */ /* 0x008fc80000000000 */ /*0490*/ DFMA R10, RZ, R24, c[0x3][0x308] ; /* 0x00c0c200ff0a762b */ /* 0x000ec80000000018 */ /*04a0*/ DFMA R20, RZ, R18, c[0x3][0x240] ; /* 0x00c09000ff14762b */ /* 0x001fc80000000012 */ /*04b0*/ DFMA R18, R52, R24, c[0x3][0x308] ; /* 0x00c0c2003412762b */ /* 0x000e080000000018 */ /*04c0*/ DADD R16, R14, c[0x3][0x290] ; /* 0x00c0a4000e107629 */ /* 0x002fc80000000000 */ /*04d0*/ DFMA R10, RZ, R10, c[0x3][0x290] ; /* 0x00c0a400ff0a762b */ /* 0x008e48000000000a */ /*04e0*/ DFMA R14, R68, R26, c[0x3][0x330] ; /* 0x00c0cc00440e762b */ /* 0x000ec8000000001a */ /*04f0*/ DFMA R18, R52, R18, c[0x3][0x290] ; /* 0x00c0a4003412762b */ /* 0x001e080000000012 */ /*0500*/ DFMA R10, RZ, R10, c[0x3][0x218] ; /* 0x00c08600ff0a762b */ /* 0x002e48000000000a */ /*0510*/ DFMA R14, R68, R14, c[0x3][0x2b8] ; /* 0x00c0ae00440e762b */ /* 0x008ec8000000000e */ /*0520*/ DFMA R18, R52, R18, c[0x3][0x218] ; /* 0x00c086003412762b */ /* 0x001e080000000012 */ /*0530*/ DADD R16, R16, c[0x3][0x218] ; /* 0x00c0860010107629 */ /* 0x000f080000000000 */ /*0540*/ DADD R26, R22, c[0x3][0x240] ; /* 0x00c09000161a7629 */ /* 0x000fc80000000000 */ /*0550*/ DFMA R10, RZ, R10, c[0x3][0x1f0] ; /* 0x00c07c00ff0a762b */ /* 0x002fc8000000000a */ /*0560*/ DFMA R24, R68, R14, c[0x3][0x240] ; /* 0x00c090004418762b */ /* 0x008e48000000000e */ /*0570*/ DFMA R22, R52, R18, c[0x3][0x1f0] ; /* 0x00c07c003416762b */ /* 0x001e080000000012 */ /*0580*/ DADD R16, R16, c[0x3][0x1f0] ; /* 0x00c07c0010107629 */ /* 0x010ec80000000000 */ /*0590*/ DFMA R14, R68, R24, R10 ; /* 0x00000018440e722b */ /* 0x0023e4000000000a */ /*05a0*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x3][0x310] ; /* 0x00c0c400ff0a7624 */ /* 0x002fe200078e00ff */ /*05b0*/ MOV R11, c[0x3][0x314] ; /* 0x00c0c500000b7a02 */ /* 0x000fe20000000f00 */ /*05c0*/ DFMA R18, RZ, R20, R22 ; /* 0x00000014ff12722b */ /* 0x001fc80000000016 */ /*05d0*/ DADD R20, R22, R26 ; /* 0x0000000016147229 */ /* 0x000fc8000000001a */ /*05e0*/ DFMA R26, RZ, R32, c[0x3][0x338] ; /* 0x00c0ce00ff1a762b */ /* 0x000e080000000020 */ /*05f0*/ DFMA R16, R68, R24, R16 ; /* 0x000000184410722b */ /* 0x008fc80000000010 */ /*0600*/ DFMA R24, R68, R24, R22 ; /* 0x000000184418722b */ /* 0x000fc80000000016 */ /*0610*/ DADD R22, R10, c[0x3][0x388] ; /* 0x00c0e2000a167629 */ /* 0x000e480000000000 */ /*0620*/ DADD R30, R30, c[0x3][0x3b0] ; /* 0x00c0ec001e1e7629 */ /* 0x000ec80000000000 */ /*0630*/ DFMA R28, RZ, R26, c[0x3][0x2c0] ; /* 0x00c0b000ff1c762b */ /* 0x001e08000000001a */ /*0640*/ DADD R26, R22, c[0x3][0x298] ; /* 0x00c0a600161a7629 */ /* 0x002fc80000000000 */ /*0650*/ DFMA R22, R68, R32, c[0x3][0x338] ; /* 0x00c0ce004416762b */ /* 0x000fc80000000020 */ /*0660*/ DFMA R10, RZ, R34, c[0x3][0x310] ; /* 0x00c0c400ff0a762b */ /* 0x000e480000000022 */ /*0670*/ DADD R30, R30, c[0x3][0x2c0] ; /* 0x00c0b0001e1e7629 */ /* 0x008ec80000000000 */ /*0680*/ DFMA R32, RZ, R28, c[0x3][0x248] ; /* 0x00c09200ff20762b */ /* 0x001fc8000000001c */ /*0690*/ DFMA R28, R52, R34, c[0x3][0x310] ; /* 0x00c0c400341c762b */ /* 0x000e080000000022 */ /*06a0*/ DFMA R10, RZ, R10, c[0x3][0x298] ; /* 0x00c0a600ff0a762b */ /* 0x002e48000000000a */ /*06b0*/ DADD R34, R30, c[0x3][0x248] ; /* 0x00c092001e227629 */ /* 0x008fc80000000000 */ /*06c0*/ DFMA R30, R52, R28, c[0x3][0x298] ; /* 0x00c0a600341e762b */ /* 0x001e08000000001c */ /*06d0*/ DFMA R10, RZ, R10, c[0x3][0x220] ; /* 0x00c08800ff0a762b */ /* 0x002e48000000000a */ /*06e0*/ DFMA R22, R68, R22, c[0x3][0x2c0] ; /* 0x00c0b0004416762b */ /* 0x000ec80000000016 */ /*06f0*/ DFMA R30, R52, R30, c[0x3][0x220] ; /* 0x00c08800341e762b */ /* 0x001e08000000001e */ /*0700*/ DADD R26, R26, c[0x3][0x220] ; /* 0x00c088001a1a7629 */ /* 0x000f080000000000 */ /*0710*/ DFMA R10, RZ, R10, c[0x3][0x1f8] ; /* 0x00c07e00ff0a762b */ /* 0x002fc8000000000a */ /*0720*/ DFMA R22, R68, R22, c[0x3][0x248] ; /* 0x00c092004416762b */ /* 0x008e480000000016 */ /*0730*/ DFMA R36, R52, R30, c[0x3][0x1f8] ; /* 0x00c07e003424762b */ /* 0x001e08000000001e */ /*0740*/ DADD R28, R26, c[0x3][0x1f8] ; /* 0x00c07e001a1c7629 */ /* 0x010ec80000000000 */ /*0750*/ DFMA R26, R68, R22, R10 ; /* 0x00000016441a722b */ /* 0x0023e4000000000a */ /*0760*/ MOV R10, c[0x3][0x318] ; /* 0x00c0c600000a7a02 */ /* 0x002fe40000000f00 */ /*0770*/ DFMA R30, RZ, R32, R36 ; /* 0x00000020ff1e722b */ /* 0x001fe20000000024 */ /*0780*/ MOV R11, c[0x3][0x31c] ; /* 0x00c0c700000b7a02 */ /* 0x000fc60000000f00 */ /*0790*/ DADD R32, R36, R34 ; /* 0x0000000024207229 */ /* 0x000fc80000000022 */ /*07a0*/ DFMA R34, RZ, R46, c[0x3][0x340] ; /* 0x00c0d000ff22762b */ /* 0x000e08000000002e */ /*07b0*/ DFMA R28, R68, R22, R28 ; /* 0x00000016441c722b */ /* 0x008fc8000000001c */ /*07c0*/ DFMA R36, R68, R22, R36 ; /* 0x000000164424722b */ /* 0x000fc80000000024 */ /*07d0*/ DADD R22, R10, c[0x3][0x390] ; /* 0x00c0e4000a167629 */ /* 0x000fc80000000000 */ /*07e0*/ DADD R38, R38, c[0x3][0x3b8] ; /* 0x00c0ee0026267629 */ /* 0x000e480000000000 */ /*07f0*/ DFMA R10, RZ, R48, c[0x3][0x318] ; /* 0x00c0c600ff0a762b */ /* 0x000ec80000000030 */ /*0800*/ DFMA R42, RZ, R34, c[0x3][0x2c8] ; /* 0x00c0b200ff2a762b */ /* 0x001e080000000022 */ /*0810*/ DADD R44, R38, c[0x3][0x2c8] ; /* 0x00c0b200262c7629 */ /* 0x002fc80000000000 */ /*0820*/ DFMA R10, RZ, R10, c[0x3][0x2a0] ; /* 0x00c0a800ff0a762b */ /* 0x008e48000000000a */ /*0830*/ DFMA R38, R68, R46, c[0x3][0x340] ; /* 0x00c0d0004426762b */ /* 0x000fc8000000002e */ /*0840*/ DFMA R46, RZ, R42, c[0x3][0x250] ; /* 0x00c09400ff2e762b */ /* 0x001fc8000000002a */ /*0850*/ DFMA R42, R52, R48, c[0x3][0x318] ; /* 0x00c0c600342a762b */ /* 0x000e080000000030 */ /*0860*/ DFMA R34, RZ, R10, c[0x3][0x228] ; /* 0x00c08a00ff22762b */ /* 0x0023e4000000000a */ /*0870*/ MOV R10, c[0x3][0x3c8] ; /* 0x00c0f200000a7a02 */ /* 0x002fe40000000f00 */ /*0880*/ DMUL R54, R54, c[0x3][0x70] ; /* 0x00c01c0036367a28 */ /* 0x004e620000000000 */ /*0890*/ MOV R11, c[0x3][0x3cc] ; /* 0x00c0f300000b7a02 */ /* 0x000fc60000000f00 */ /*08a0*/ DADD R48, R44, c[0x3][0x250] ; /* 0x00c094002c307629 */ /* 0x000fc80000000000 */ /*08b0*/ DFMA R44, R52, R42, c[0x3][0x2a0] ; /* 0x00c0a800342c762b */ /* 0x001e08000000002a */ /*08c0*/ DADD R40, R22, c[0x3][0x2a0] ; /* 0x00c0a80016287629 */ /* 0x000e880000000000 */ /*08d0*/ DFMA R22, R54, R10, c[0x3][0x350] ; /* 0x00c0d4003616762b */ /* 0x002e48000000000a */ /*08e0*/ DFMA R38, R68, R38, c[0x3][0x2c8] ; /* 0x00c0b2004426762b */ /* 0x000ec80000000026 */ /*08f0*/ DFMA R44, R52, R44, c[0x3][0x228] ; /* 0x00c08a00342c762b */ /* 0x001e08000000002c */ /*0900*/ DADD R40, R40, c[0x3][0x228] ; /* 0x00c08a0028287629 */ /* 0x004e880000000000 */ /*0910*/ DFMA R22, R54, R22, c[0x3][0x2d8] ; /* 0x00c0b6003616762b */ /* 0x002e480000000016 */ /*0920*/ DFMA R34, RZ, R34, c[0x3][0x200] ; /* 0x00c08000ff22762b */ /* 0x000fc80000000022 */ /*0930*/ DFMA R38, R68, R38, c[0x3][0x250] ; /* 0x00c094004426762b */ /* 0x008ec80000000026 */ /*0940*/ DFMA R50, R52, R44, c[0x3][0x200] ; /* 0x00c080003432762b */ /* 0x001e08000000002c */ /*0950*/ DADD R42, R40, c[0x3][0x200] ; /* 0x00c08000282a7629 */ /* 0x004fc80000000000 */ /*0960*/ DFMA R22, R54, R22, c[0x3][0x260] ; /* 0x00c098003616762b */ /* 0x002e480000000016 */ /*0970*/ DFMA R40, R68, R38, R34 ; /* 0x000000264428722b */ /* 0x0085e40000000022 */ /*0980*/ IMAD.MOV.U32 R34, RZ, RZ, c[0x3][0x350] ; /* 0x00c0d400ff227624 */ /* 0x004fe200078e00ff */ /*0990*/ MOV R35, c[0x3][0x354] ; /* 0x00c0d50000237a02 */ /* 0x000fe20000000f00 */ /*09a0*/ DFMA R44, RZ, R46, R50 ; /* 0x0000002eff2c722b */ /* 0x001fc80000000032 */ /*09b0*/ DADD R46, R50, R48 ; /* 0x00000000322e7229 */ /* 0x0001e40000000030 */ /*09c0*/ MOV R48, c[0x3][0x3d0] ; /* 0x00c0f40000307a02 */ /* 0x001fe40000000f00 */ /*09d0*/ MOV R49, c[0x3][0x3d4] ; /* 0x00c0f50000317a02 */ /* 0x000fe20000000f00 */ /*09e0*/ DFMA R2, R54, R22, R2 ; /* 0x000000163602722b */ /* 0x002fc80000000002 */ /*09f0*/ DFMA R4, R54, R22, R4 ; /* 0x000000163604722b */ /* 0x000fc80000000004 */ /*0a00*/ DFMA R6, R54, R22, R6 ; /* 0x000000163606722b */ /* 0x000fc80000000006 */ /*0a10*/ DFMA R8, R54, R22, R8 ; /* 0x000000163608722b */ /* 0x000fc80000000008 */ /*0a20*/ DFMA R22, RZ, R10, c[0x3][0x350] ; /* 0x00c0d400ff16762b */ /* 0x000e08000000000a */ /*0a30*/ DADD R34, R34, c[0x3][0x3c8] ; /* 0x00c0f20022227629 */ /* 0x000e480000000000 */ /*0a40*/ DFMA R10, R54, R48, c[0x3][0x358] ; /* 0x00c0d600360a762b */ /* 0x000e880000000030 */ /*0a50*/ DFMA R42, R68, R38, R42 ; /* 0x00000026442a722b */ /* 0x000fc8000000002a */ /*0a60*/ DFMA R50, R68, R38, R50 ; /* 0x000000264432722b */ /* 0x000fc80000000032 */ /*0a70*/ DFMA R22, RZ, R22, c[0x3][0x2d8] ; /* 0x00c0b600ff16762b */ /* 0x001e080000000016 */ /*0a80*/ DADD R38, R34, c[0x3][0x2d8] ; /* 0x00c0b60022267629 */ /* 0x002e480000000000 */ /*0a90*/ DFMA R10, R54, R10, c[0x3][0x2e0] ; /* 0x00c0b800360a762b */ /* 0x004e88000000000a */ /*0aa0*/ DFMA R34, RZ, R22, c[0x3][0x260] ; /* 0x00c09800ff22762b */ /* 0x001e080000000016 */ /*0ab0*/ DADD R38, R38, c[0x3][0x260] ; /* 0x00c0980026267629 */ /* 0x002e480000000000 */ /*0ac0*/ DFMA R22, R54, R10, c[0x3][0x268] ; /* 0x00c09a003616762b */ /* 0x004e88000000000a */ /*0ad0*/ DFMA R10, RZ, R34, R12 ; /* 0x00000022ff0a722b */ /* 0x0011e4000000000c */ /*0ae0*/ MOV R34, c[0x3][0x3d8] ; /* 0x00c0f60000227a02 */ /* 0x001fe40000000f00 */ /*0af0*/ DADD R12, R12, R38 ; /* 0x000000000c0c7229 */ /* 0x0021e20000000026 */ /*0b00*/ MOV R35, c[0x3][0x3dc] ; /* 0x00c0f70000237a02 */ /* 0x000fe20000000f00 */ /*0b10*/ IMAD.MOV.U32 R38, RZ, RZ, c[0x3][0x358] ; /* 0x00c0d600ff267624 */ /* 0x001fe200078e00ff */ /*0b20*/ MOV R39, c[0x3][0x35c] ; /* 0x00c0d70000277a02 */ /* 0x000fe20000000f00 */ /*0b30*/ DFMA R14, R54, R22, R14 ; /* 0x00000016360e722b */ /* 0x004fc8000000000e */ /*0b40*/ DFMA R16, R54, R22, R16 ; /* 0x000000163610722b */ /* 0x000fc80000000010 */ /*0b50*/ DFMA R18, R54, R22, R18 ; /* 0x000000163612722b */ /* 0x000fc80000000012 */ /*0b60*/ DFMA R20, R54, R22, R20 ; /* 0x000000163614722b */ /* 0x000fc80000000014 */ /*0b70*/ DFMA R22, RZ, R48, c[0x3][0x358] ; /* 0x00c0d600ff16762b */ /* 0x000e080000000030 */ /*0b80*/ DADD R48, R38, c[0x3][0x3d0] ; /* 0x00c0f40026307629 */ /* 0x000e480000000000 */ /*0b90*/ DFMA R38, RZ, R22, c[0x3][0x2e0] ; /* 0x00c0b800ff26762b */ /* 0x001fc80000000016 */ /*0ba0*/ DFMA R22, R54, R34, c[0x3][0x360] ; /* 0x00c0d8003616762b */ /* 0x000e080000000022 */ /*0bb0*/ DADD R56, R48, c[0x3][0x2e0] ; /* 0x00c0b80030387629 */ /* 0x002fc80000000000 */ /*0bc0*/ DFMA R22, R54, R22, c[0x3][0x2e8] ; /* 0x00c0ba003616762b */ /* 0x001e080000000016 */ /*0bd0*/ DFMA R48, RZ, R38, c[0x3][0x268] ; /* 0x00c09a00ff30762b */ /* 0x000e480000000026 */ /*0be0*/ DFMA R38, R54, R22, c[0x3][0x270] ; /* 0x00c09c003626762b */ /* 0x001e080000000016 */ /*0bf0*/ DADD R56, R56, c[0x3][0x268] ; /* 0x00c09a0038387629 */ /* 0x000e880000000000 */ /*0c00*/ DFMA R22, RZ, R48, R24 ; /* 0x00000030ff16722b */ /* 0x002fc80000000018 */ /*0c10*/ DFMA R26, R54, R38, R26 ; /* 0x00000026361a722b */ /* 0x001fc8000000001a */ /*0c20*/ DFMA R28, R54, R38, R28 ; /* 0x00000026361c722b */ /* 0x000fc8000000001c */ /*0c30*/ DFMA R30, R54, R38, R30 ; /* 0x00000026361e722b */ /* 0x000fc8000000001e */ /*0c40*/ DFMA R32, R54, R38, R32 ; /* 0x000000263620722b */ /* 0x000fc80000000020 */ /*0c50*/ DADD R24, R24, R56 ; /* 0x0000000018187229 */ /* 0x004fc80000000038 */ /*0c60*/ DADD R48, -R68, 1 ; /* 0x3ff0000044307429 */ /* 0x000fc80000000100 */ /*0c70*/ DADD R38, -R52, 1 ; /* 0x3ff0000034267429 */ /* 0x000e080000000100 */ /*0c80*/ DMUL R56, R58, c[0x3][0x68] ; /* 0x00c01a003a387a28 */ /* 0x000e480000000000 */ /*0c90*/ DADD R58, -R54, 1 ; /* 0x3ff00000363a7429 */ /* 0x000fc80000000100 */ /*0ca0*/ DMUL R38, R2, R38 ; /* 0x0000002602267228 */ /* 0x001e080000000000 */ /*0cb0*/ DMUL R48, R6, R48 ; /* 0x0000003006307228 */ /* 0x000e880000000000 */ /*0cc0*/ DADD R60, -R52, 1 ; /* 0x3ff00000343c7429 */ /* 0x000ec80000000100 */ /*0cd0*/ DADD R62, -R56, 1 ; /* 0x3ff00000383e7429 */ /* 0x002e480000000100 */ /*0ce0*/ DFMA R72, R52, R4, R38 ; /* 0x000000043448722b */ /* 0x001fc80000000026 */ /*0cf0*/ DMUL R82, R10, R58 ; /* 0x0000003a0a527228 */ /* 0x000e080000000000 */ /*0d00*/ DFMA R66, R56, R8, R48 ; /* 0x000000083842722b */ /* 0x004e880000000030 */ /*0d10*/ DMUL R70, R14, R60 ; /* 0x0000003c0e467228 */ /* 0x008ec80000000000 */ /*0d20*/ DMUL R64, R18, R62 ; /* 0x0000003e12407228 */ /* 0x002e480000000000 */ /*0d30*/ DFMA R82, R54, R12, R82 ; /* 0x0000000c3652722b */ /* 0x001fc80000000052 */ /*0d40*/ DADD R38, R72, R66 ; /* 0x0000000048267229 */ /* 0x004e080000000042 */ /*0d50*/ DFMA R70, R52, R16, R70 ; /* 0x000000103446722b */ /* 0x008fc80000000046 */ /*0d60*/ DMUL R84, R22, R58 ; /* 0x0000003a16547228 */ /* 0x000e880000000000 */ /*0d70*/ DFMA R64, R56, R20, R64 ; /* 0x000000143840722b */ /* 0x002e480000000040 */ /*0d80*/ DMUL R48, R72, R66 ; /* 0x0000004248307228 */ /* 0x000fc80000000000 */ /*0d90*/ DADD R38, R82, R38 ; /* 0x0000000052267229 */ /* 0x001e080000000026 */ /*0da0*/ DFMA R84, R54, R24, R84 ; /* 0x000000183654722b */ /* 0x004fc80000000054 */ /*0db0*/ DADD R76, R70, R64 ; /* 0x00000000464c7229 */ /* 0x002e480000000040 */ /*0dc0*/ DADD R74, R38, -R48 ; /* 0x00000000264a7229 */ /* 0x001e080000000830 */ /*0dd0*/ DMUL R38, R70, R64 ; /* 0x0000004046267228 */ /* 0x000fc80000000000 */ /*0de0*/ DADD R76, R84, R76 ; /* 0x00000000544c7229 */ /* 0x002e48000000004c */ /*0df0*/ DFMA R72, -R72, R82, R74 ; /* 0x000000524848722b */ /* 0x0011e4000000014a */ /*0e00*/ IMAD.MOV.U32 R74, RZ, RZ, c[0x3][0x360] ; /* 0x00c0d800ff4a7624 */ /* 0x001fe200078e00ff */ /*0e10*/ MOV R75, c[0x3][0x364] ; /* 0x00c0d900004b7a02 */ /* 0x000fe20000000f00 */ /*0e20*/ DADD R76, R76, -R38 ; /* 0x000000004c4c7229 */ /* 0x002e080000000826 */ /*0e30*/ DFMA R34, RZ, R34, c[0x3][0x360] ; /* 0x00c0d800ff22762b */ /* 0x000e480000000022 */ /*0e40*/ DFMA R70, -R70, R84, R76 ; /* 0x000000544646722b */ /* 0x001e08000000014c */ /*0e50*/ DADD R74, R74, c[0x3][0x3d8] ; /* 0x00c0f6004a4a7629 */ /* 0x000e880000000000 */ /*0e60*/ DFMA R34, RZ, R34, c[0x3][0x2e8] ; /* 0x00c0ba00ff22762b */ /* 0x002e480000000022 */ /*0e70*/ DFMA R72, -R66, R82, R72 ; /* 0x000000524248722b */ /* 0x000ec80000000148 */ /*0e80*/ DFMA R70, -R64, R84, R70 ; /* 0x000000544046722b */ /* 0x0011240000000146 */ /*0e90*/ MOV R64, c[0x3][0x320] ; /* 0x00c0c80000407a02 */ /* 0x001fe40000000f00 */ /*0ea0*/ DADD R74, R74, c[0x3][0x2e8] ; /* 0x00c0ba004a4a7629 */ /* 0x004e220000000000 */ /*0eb0*/ MOV R65, c[0x3][0x324] ; /* 0x00c0c90000417a02 */ /* 0x000fc60000000f00 */ /*0ec0*/ DFMA R34, RZ, R34, c[0x3][0x270] ; /* 0x00c09c00ff22762b */ /* 0x002e480000000022 */ /*0ed0*/ DFMA R82, R82, R48, R72 ; /* 0x000000305252722b */ /* 0x0085e40000000048 */ /*0ee0*/ IMAD.MOV.U32 R48, RZ, RZ, c[0x3][0x398] ; /* 0x00c0e600ff307624 */ /* 0x004fe200078e00ff */ /*0ef0*/ MOV R49, c[0x3][0x39c] ; /* 0x00c0e70000317a02 */ /* 0x000fe20000000f00 */ /*0f00*/ DFMA R84, R84, R38, R70 ; /* 0x000000265454722b */ /* 0x010fc80000000046 */ /*0f10*/ DADD R74, R74, c[0x3][0x270] ; /* 0x00c09c004a4a7629 */ /* 0x001e080000000000 */ /*0f20*/ DFMA R34, RZ, R34, R36 ; /* 0x00000022ff22722b */ /* 0x002fc80000000024 */ /*0f30*/ DMUL R70, R26, R60 ; /* 0x0000003c1a467228 */ /* 0x000e480000000000 */ /*0f40*/ DMUL R72, R30, R62 ; /* 0x0000003e1e487228 */ /* 0x000e880000000000 */ /*0f50*/ DADD R36, R36, R74 ; /* 0x0000000024247229 */ /* 0x001fc8000000004a */ /*0f60*/ DFMA R70, R52, R28, R70 ; /* 0x0000001c3446722b */ /* 0x002fc80000000046 */ /*0f70*/ DMUL R38, R34, R58 ; /* 0x0000003a22267228 */ /* 0x000e080000000000 */ /*0f80*/ DFMA R72, R56, R32, R72 ; /* 0x000000203848722b */ /* 0x004e480000000048 */ /*0f90*/ DFMA R38, R54, R36, R38 ; /* 0x000000243626722b */ /* 0x001fc80000000026 */ /*0fa0*/ DADD R66, R70, R72 ; /* 0x0000000046427229 */ /* 0x002e080000000048 */ /*0fb0*/ DMUL R92, R70, R72 ; /* 0x00000048465c7228 */ /* 0x000fc80000000000 */ /*0fc0*/ DADD R74, R38, R66 ; /* 0x00000000264a7229 */ /* 0x001e080000000042 */ /*0fd0*/ DFMA R66, RZ, R48, c[0x3][0x320] ; /* 0x00c0c800ff42762b */ /* 0x000e480000000030 */ /*0fe0*/ DADD R74, R74, -R92 ; /* 0x000000004a4a7229 */ /* 0x001e08000000085c */ /*0ff0*/ DADD R64, R64, c[0x3][0x398] ; /* 0x00c0e60040407629 */ /* 0x000e880000000000 */ /*1000*/ DFMA R66, RZ, R66, c[0x3][0x2a8] ; /* 0x00c0aa00ff42762b */ /* 0x002e480000000042 */ /*1010*/ DFMA R70, -R70, R38, R74 ; /* 0x000000264646722b */ /* 0x001fc8000000014a */ /*1020*/ DADD R74, R64, c[0x3][0x2a8] ; /* 0x00c0aa00404a7629 */ /* 0x004e080000000000 */ /*1030*/ DFMA R76, R52, R48, c[0x3][0x320] ; /* 0x00c0c800344c762b */ /* 0x0004e40000000030 */ /*1040*/ MOV R48, c[0x3][0x3c0] ; /* 0x00c0f00000307a02 */ /* 0x004fe40000000f00 */ /*1050*/ MOV R49, c[0x3][0x3c4] ; /* 0x00c0f10000317a02 */ /* 0x000fe20000000f00 */ /*1060*/ DFMA R64, RZ, R66, c[0x3][0x230] ; /* 0x00c08c00ff40762b */ /* 0x002fc80000000042 */ /*1070*/ DADD R66, R74, c[0x3][0x230] ; /* 0x00c08c004a427629 */ /* 0x001fc80000000000 */ /*1080*/ DFMA R74, R68, R48, c[0x3][0x348] ; /* 0x00c0d200444a762b */ /* 0x000e080000000030 */ /*1090*/ DFMA R76, R52, R76, c[0x3][0x2a8] ; /* 0x00c0aa00344c762b */ /* 0x008e48000000004c */ /*10a0*/ DFMA R74, R68, R74, c[0x3][0x2d0] ; /* 0x00c0b400444a762b */ /* 0x001e08000000004a */ /*10b0*/ DFMA R78, R52, R76, c[0x3][0x230] ; /* 0x00c08c00344e762b */ /* 0x002e48000000004c */ /*10c0*/ DFMA R64, RZ, R64, c[0x3][0x208] ; /* 0x00c08200ff40762b */ /* 0x000fc80000000040 */ /*10d0*/ DADD R66, R66, c[0x3][0x208] ; /* 0x00c0820042427629 */ /* 0x000fc80000000000 */ /*10e0*/ DFMA R76, R68, R74, c[0x3][0x258] ; /* 0x00c09600444c762b */ /* 0x001e08000000004a */ /*10f0*/ DFMA R74, R52, R78, c[0x3][0x208] ; /* 0x00c08200344a762b */ /* 0x002e48000000004e */ /*1100*/ DFMA R64, R68, R76, R64 ; /* 0x0000004c4440722b */ /* 0x001fc80000000040 */ /*1110*/ DFMA R66, R68, R76, R66 ; /* 0x0000004c4442722b */ /* 0x000fc80000000042 */ /*1120*/ DFMA R68, R68, R76, R74 ; /* 0x0000004c4444722b */ /* 0x002fc8000000004a */ /*1130*/ DFMA R76, -R72, R38, R70 ; /* 0x00000026484c722b */ /* 0x0000640000000146 */ /*1140*/ IMAD.MOV.U32 R70, RZ, RZ, c[0x3][0x348] ; /* 0x00c0d200ff467624 */ /* 0x001fe200078e00ff */ /*1150*/ MOV R71, c[0x3][0x34c] ; /* 0x00c0d30000477a02 */ /* 0x000fe20000000f00 */ /*1160*/ DFMA R48, RZ, R48, c[0x3][0x348] ; /* 0x00c0d200ff30762b */ /* 0x000e080000000030 */ /*1170*/ DFMA R92, R38, R92, R76 ; /* 0x0000005c265c722b */ /* 0x0023e4000000004c */ /*1180*/ IMAD R38, R0, c[0x0][0x168], RZ ; /* 0x00005a0000267a24 */ /* 0x002fe200078e02ff */ /*1190*/ MOV R0, 0x8 ; /* 0x0000000800007802 */ /* 0x000fe20000000f00 */ /*11a0*/ DADD R70, R70, c[0x3][0x3c0] ; /* 0x00c0f00046467629 */ /* 0x000e480000000000 */ /*11b0*/ DFMA R48, RZ, R48, c[0x3][0x2d0] ; /* 0x00c0b400ff30762b */ /* 0x001e080000000030 */ /*11c0*/ DADD R70, R70, c[0x3][0x2d0] ; /* 0x00c0b40046467629 */ /* 0x002e480000000000 */ /*11d0*/ DFMA R48, RZ, R48, c[0x3][0x258] ; /* 0x00c09600ff30762b */ /* 0x001e080000000030 */ /*11e0*/ DADD R72, R70, c[0x3][0x258] ; /* 0x00c0960046487629 */ /* 0x002e480000000000 */ /*11f0*/ DFMA R70, RZ, R48, R74 ; /* 0x00000030ff46722b */ /* 0x0011e4000000004a */ /*1200*/ IADD3 R49, R91, c[0x0][0x170], RZ ; /* 0x00005c005b317a10 */ /* 0x001fe40007ffe0ff */ /*1210*/ DADD R72, R74, R72 ; /* 0x000000004a487229 */ /* 0x0021e40000000048 */ /*1220*/ IADD3 R39, R49.reuse, c[0x0][0x170], RZ ; /* 0x00005c0031277a10 */ /* 0x040fe20007ffe0ff */ /*1230*/ IMAD R48, R49, c[0x0][0x16c], R88.reuse ; /* 0x00005b0031307a24 */ /* 0x100fe200078e0258 */ /*1240*/ IADD3 R49, R38, R89, RZ ; /* 0x0000005926317210 */ /* 0x000fe40007ffe0ff */ /*1250*/ IADD3 R75, R39.reuse, c[0x0][0x170], RZ ; /* 0x00005c00274b7a10 */ /* 0x041fe20007ffe0ff */ /*1260*/ IMAD R74, R39, c[0x0][0x16c], R88 ; /* 0x00005b00274a7a24 */ /* 0x000fc400078e0258 */ /*1270*/ IMAD R87, R48, c[0x0][0x168], R89.reuse ; /* 0x00005a0030577a24 */ /* 0x100fe200078e0259 */ /*1280*/ IADD3 R39, R75.reuse, c[0x0][0x170], RZ ; /* 0x00005c004b277a10 */ /* 0x040fe20007ffe0ff */ /*1290*/ IMAD R38, R75, c[0x0][0x16c], R88.reuse ; /* 0x00005b004b267a24 */ /* 0x100fe400078e0258 */ /*12a0*/ IMAD R79, R74, c[0x0][0x168], R89.reuse ; /* 0x00005a004a4f7a24 */ /* 0x100fe400078e0259 */ /*12b0*/ IMAD R48, R39, c[0x0][0x16c], R88 ; /* 0x00005b0027307a24 */ /* 0x000fe200078e0258 */ /*12c0*/ MOV R39, 0x3ff00000 ; /* 0x3ff0000000277802 */ /* 0x000fe20000000f00 */ /*12d0*/ IMAD R75, R38, c[0x0][0x168], R89.reuse ; /* 0x00005a00264b7a24 */ /* 0x100fe400078e0259 */ /*12e0*/ IMAD R77, R48, c[0x0][0x168], R89 ; /* 0x00005a00304d7a24 */ /* 0x000fe200078e0259 */ /*12f0*/ MOV R48, c[0x3][0x3e0] ; /* 0x00c0f80000307a02 */ /* 0x000fe20000000f00 */ /*1300*/ IMAD.WIDE R86, R87, R0, c[0x0][0x160] ; /* 0x0000580057567625 */ /* 0x000fc800078e0200 */ /*1310*/ IMAD.WIDE R78, R79, R0.reuse, c[0x0][0x160] ; /* 0x000058004f4e7625 */ /* 0x080fe200078e0200 */ /*1320*/ STG.E.64 [R86.64], RZ ; /* 0x000000ff56007986 */ /* 0x000fe6000c101b06 */ /*1330*/ IMAD.WIDE R74, R75, R0.reuse, c[0x0][0x160] ; /* 0x000058004b4a7625 */ /* 0x080fe200078e0200 */ /*1340*/ STG.E.64 [R78.64], RZ ; /* 0x000000ff4e007986 */ /* 0x000fe6000c101b06 */ /*1350*/ IMAD.WIDE R76, R77, R0, c[0x0][0x160] ; /* 0x000058004d4c7625 */ /* 0x000fe200078e0200 */ /*1360*/ STG.E.64 [R74.64], RZ ; /* 0x000000ff4a007986 */ /* 0x000fe6000c101b06 */ /*1370*/ IMAD.MOV.U32 R38, RZ, RZ, 0x0 ; /* 0x00000000ff267424 */ /* 0x000fca00078e00ff */ /*1380*/ STG.E.64 [R76.64], R38 ; /* 0x000000264c007986 */ /* 0x0001e4000c101b06 */ /*1390*/ IMAD.WIDE R38, R49, R0, c[0x0][0x160] ; /* 0x0000580031267625 */ /* 0x001fe200078e0200 */ /*13a0*/ MOV R49, c[0x3][0x3e4] ; /* 0x00c0f90000317a02 */ /* 0x000fc80000000f00 */ /*13b0*/ STG.E.64 [R38.64], R82 ; /* 0x0000005226007986 */ /* 0x0001e4000c101b06 */ /*13c0*/ DFMA R80, R54.reuse, R48.reuse, c[0x3][0x368] ; /* 0x00c0da003650762b */ /* 0x0c0e640000000030 */ /*13d0*/ STG.E.64 [R86.64], R84 ; /* 0x0000005456007986 */ /* 0x000fe4000c101b06 */ /*13e0*/ DFMA R48, RZ, R48, c[0x3][0x368] ; /* 0x00c0da00ff30762b */ /* 0x000ea40000000030 */ /*13f0*/ STG.E.64 [R78.64], R92 ; /* 0x0000005c4e007986 */ /* 0x0007e4000c101b06 */ /*1400*/ DFMA R80, R54, R80, c[0x3][0x2f0] ; /* 0x00c0bc003650762b */ /* 0x002e480000000050 */ /*1410*/ DFMA R48, RZ, R48, c[0x3][0x2f0] ; /* 0x00c0bc00ff30762b */ /* 0x004e880000000030 */ /*1420*/ DFMA R80, R54, R80, c[0x3][0x278] ; /* 0x00c09e003650762b */ /* 0x002e480000000050 */ /*1430*/ DFMA R48, RZ, R48, c[0x3][0x278] ; /* 0x00c09e00ff30762b */ /* 0x004e880000000030 */ /*1440*/ DFMA R40, R54, R80, R40 ; /* 0x000000503628722b */ /* 0x002fc80000000028 */ /*1450*/ DFMA R42, R54, R80, R42 ; /* 0x00000050362a722b */ /* 0x000fc8000000002a */ /*1460*/ DFMA R44, R54, R80, R44 ; /* 0x00000050362c722b */ /* 0x000e08000000002c */ /*1470*/ DFMA R46, R54, R80, R46 ; /* 0x00000050362e722b */ /* 0x0003e4000000002e */ /*1480*/ IMAD.MOV.U32 R80, RZ, RZ, c[0x3][0x368] ; /* 0x00c0da00ff507624 */ /* 0x002fe200078e00ff */ /*1490*/ MOV R81, c[0x3][0x36c] ; /* 0x00c0db0000517a02 */ /* 0x000fe20000000f00 */ /*14a0*/ DFMA R48, RZ, R48, R50 ; /* 0x00000030ff30722b */ /* 0x004fc80000000032 */ /*14b0*/ DMUL R82, R44, R62 ; /* 0x0000003e2c527228 */ /* 0x001fc80000000000 */ /*14c0*/ DADD R80, R80, c[0x3][0x3e0] ; /* 0x00c0f80050507629 */ /* 0x000e0c0000000000 */ /*14d0*/ DADD R80, R80, c[0x3][0x2f0] ; /* 0x00c0bc0050507629 */ /* 0x001e0c0000000000 */ /*14e0*/ DADD R80, R80, c[0x3][0x278] ; /* 0x00c09e0050507629 */ /* 0x001e0c0000000000 */ /*14f0*/ DADD R50, R50, R80 ; /* 0x0000000032327229 */ /* 0x001fc80000000050 */ /*1500*/ DMUL R80, R40, R60 ; /* 0x0000003c28507228 */ /* 0x000ecc0000000000 */ /*1510*/ DFMA R78, R52, R42, R80 ; /* 0x0000002a344e722b */ /* 0x008fc80000000050 */ /*1520*/ DFMA R80, R56, R46, R82 ; /* 0x0000002e3850722b */ /* 0x000e080000000052 */ /*1530*/ DMUL R82, R48, R58 ; /* 0x0000003a30527228 */ /* 0x000e480000000000 */ /*1540*/ DADD R86, R78, R80 ; /* 0x000000004e567229 */ /* 0x001fc80000000050 */ /*1550*/ DFMA R82, R54, R50, R82 ; /* 0x000000323652722b */ /* 0x002e080000000052 */ /*1560*/ DMUL R84, R78, R80 ; /* 0x000000504e547228 */ /* 0x000fc80000000000 */ /*1570*/ DADD R86, R82, R86 ; /* 0x0000000052567229 */ /* 0x001e0c0000000056 */ /*1580*/ DADD R86, R86, -R84 ; /* 0x0000000056567229 */ /* 0x001e0c0000000854 */ /*1590*/ DFMA R86, -R78, R82.reuse, R86 ; /* 0x000000524e56722b */ /* 0x0810640000000156 */ /*15a0*/ MOV R78, c[0x3][0x3e8] ; /* 0x00c0fa00004e7a02 */ /* 0x001fe40000000f00 */ /*15b0*/ MOV R79, c[0x3][0x3ec] ; /* 0x00c0fb00004f7a02 */ /* 0x000fe40000000f00 */ /*15c0*/ DFMA R86, -R80, R82, R86 ; /* 0x000000525056722b */ /* 0x002fc80000000156 */ /*15d0*/ DFMA R80, R54, R78, c[0x3][0x370] ; /* 0x00c0dc003650762b */ /* 0x000e08000000004e */ /*15e0*/ DFMA R78, RZ, R78, c[0x3][0x370] ; /* 0x00c0dc00ff4e762b */ /* 0x000e48000000004e */ /*15f0*/ DFMA R80, R54, R80, c[0x3][0x2f8] ; /* 0x00c0be003650762b */ /* 0x001e080000000050 */ /*1600*/ DFMA R78, RZ, R78, c[0x3][0x2f8] ; /* 0x00c0be00ff4e762b */ /* 0x002e48000000004e */ /*1610*/ DFMA R80, R54, R80, c[0x3][0x280] ; /* 0x00c0a0003650762b */ /* 0x001e080000000050 */ /*1620*/ DFMA R78, RZ, R78, c[0x3][0x280] ; /* 0x00c0a000ff4e762b */ /* 0x002e48000000004e */ /*1630*/ DFMA R64, R54, R80, R64 ; /* 0x000000503640722b */ /* 0x001e080000000040 */ /*1640*/ DFMA R66, R54, R80, R66 ; /* 0x000000503642722b */ /* 0x000fc80000000042 */ /*1650*/ DFMA R70, R54, R80, R70 ; /* 0x000000503646722b */ /* 0x000e880000000046 */ /*1660*/ DFMA R72, R54, R80, R72 ; /* 0x000000503648722b */ /* 0x0007e40000000048 */ /*1670*/ IMAD.MOV.U32 R80, RZ, RZ, c[0x3][0x370] ; /* 0x00c0dc00ff507624 */ /* 0x008fe200078e00ff */ /*1680*/ MOV R81, c[0x3][0x374] ; /* 0x00c0dd0000517a02 */ /* 0x000fe20000000f00 */ /*1690*/ DFMA R78, RZ, R78, R68 ; /* 0x0000004eff4e722b */ /* 0x002fc80000000044 */ /*16a0*/ DMUL R60, R64, R60 ; /* 0x0000003c403c7228 */ /* 0x001fc80000000000 */ /*16b0*/ DADD R80, R80, c[0x3][0x3e8] ; /* 0x00c0fa0050507629 */ /* 0x000e080000000000 */ /*16c0*/ DMUL R62, R70, R62 ; /* 0x0000003e463e7228 */ /* 0x004fc80000000000 */ /*16d0*/ DADD R80, R80, c[0x3][0x2f8] ; /* 0x00c0be0050507629 */ /* 0x001e080000000000 */ /*16e0*/ DFMA R52, R52, R66, R60 ; /* 0x000000423434722b */ /* 0x000fc8000000003c */ /*16f0*/ DADD R80, R80, c[0x3][0x280] ; /* 0x00c0a00050507629 */ /* 0x001e080000000000 */ /*1700*/ DMUL R58, R78, R58 ; /* 0x0000003a4e3a7228 */ /* 0x000fc80000000000 */ /*1710*/ DADD R68, R68, R80 ; /* 0x0000000044447229 */ /* 0x001e080000000050 */ /*1720*/ DFMA R56, R56, R72, R62 ; /* 0x000000483838722b */ /* 0x000e48000000003e */ /*1730*/ DFMA R58, R54, R68, R58 ; /* 0x00000044363a722b */ /* 0x001fc8000000003a */ /*1740*/ DADD R60, R52, R56 ; /* 0x00000000343c7229 */ /* 0x002e080000000038 */ /*1750*/ DMUL R54, R52, R56 ; /* 0x0000003834367228 */ /* 0x000fc80000000000 */ /*1760*/ DADD R60, R58, R60 ; /* 0x000000003a3c7229 */ /* 0x001e08000000003c */ /*1770*/ DFMA R82, R82, R84, R86 ; /* 0x000000545252722b */ /* 0x000e480000000056 */ /*1780*/ DADD R60, R60, -R54 ; /* 0x000000003c3c7229 */ /* 0x001e060000000836 */ /*1790*/ STG.E.64 [R74.64], R82 ; /* 0x000000524a007986 */ /* 0x0023e6000c101b06 */ /*17a0*/ DFMA R60, -R52, R58, R60 ; /* 0x0000003a343c722b */ /* 0x0010a4000000013c */ /*17b0*/ MOV R52, c[0x0][0x170] ; /* 0x00005c0000347a02 */ /* 0x001fc80000000f00 */ /*17c0*/ DFMA R60, -R56, R58, R60 ; /* 0x0000003a383c722b */ /* 0x004e22000000013c */ /*17d0*/ IMAD R53, R52, c[0x0][0x16c], RZ ; /* 0x00005b0034357a24 */ /* 0x000fc800078e02ff */ /*17e0*/ IMAD R53, R53, c[0x0][0x168], RZ ; /* 0x00005a0035357a24 */ /* 0x000fe200078e02ff */ /*17f0*/ DFMA R60, R58, R54, R60 ; /* 0x000000363a3c722b */ /* 0x001e0e000000003c */ /*1800*/ STG.E.64 [R76.64], R60 ; /* 0x0000003c4c007986 */ /* 0x0013e2000c101b06 */ /*1810*/ @P0 BRA 0x1910 ; /* 0x000000f000000947 */ /* 0x000fea0003800000 */ /*1820*/ IMAD R54, R91, c[0x0][0x16c], R88 ; /* 0x00005b005b367a24 */ /* 0x000fe200078e0258 */ /*1830*/ MOV R56, c[0x0][0x170] ; /* 0x00005c0000387a02 */ /* 0x000fc60000000f00 */ /*1840*/ IMAD R55, R54, c[0x0][0x168], RZ ; /* 0x00005a0036377a24 */ /* 0x000fe400078e02ff */ /*1850*/ IMAD R56, R56, c[0x0][0x16c], RZ ; /* 0x00005b0038387a24 */ /* 0x000fe400078e02ff */ /*1860*/ IMAD.WIDE R54, R55, R0, c[0x0][0x160] ; /* 0x0000580037367625 */ /* 0x000fc800078e0200 */ /*1870*/ IMAD R63, R56, c[0x0][0x168], RZ ; /* 0x00005a00383f7a24 */ /* 0x000fe200078e02ff */ /*1880*/ STG.E.64 [R54.64], R2 ; /* 0x0000000236007986 */ /* 0x0001e6000c101b06 */ /*1890*/ IMAD.WIDE R56, R63, 0x8, R54 ; /* 0x000000083f387825 */ /* 0x000fca00078e0236 */ /*18a0*/ STG.E.64 [R56.64], R14 ; /* 0x0000000e38007986 */ /* 0x0001e2000c101b06 */ /*18b0*/ IMAD.WIDE R58, R63, 0x8, R56 ; /* 0x000000083f3a7825 */ /* 0x000fca00078e0238 */ /*18c0*/ STG.E.64 [R58.64], R26 ; /* 0x0000001a3a007986 */ /* 0x0001e2000c101b06 */ /*18d0*/ IMAD.WIDE R60, R63, 0x8, R58 ; /* 0x000000083f3c7825 */ /* 0x002fca00078e023a */ /*18e0*/ STG.E.64 [R60.64], R40 ; /* 0x000000283c007986 */ /* 0x0001e2000c101b06 */ /*18f0*/ IMAD.WIDE R62, R63, 0x8, R60 ; /* 0x000000083f3e7825 */ /* 0x000fca00078e023c */ /*1900*/ STG.E.64 [R62.64], R64 ; /* 0x000000403e007986 */ /* 0x0001e4000c101b06 */ /*1910*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1920*/ ULDC UR4, c[0x0][0x168] ; /* 0x00005a0000047ab9 */ /* 0x000fe20000000800 */ /*1930*/ IMAD.WIDE R2, R53, 0x8, R38 ; /* 0x0000000835027825 */ /* 0x001fe200078e0226 */ /*1940*/ UIADD3 UR5, UR4, -0x1, URZ ; /* 0xffffffff04057890 */ /* 0x000fe2000fffe03f */ /*1950*/ ISETP.NE.AND P1, PT, R88, RZ, PT ; /* 0x000000ff5800720c */ /* 0x000fc80003f25270 */ /*1960*/ IMAD.WIDE R14, R53, 0x8, R2 ; /* 0x00000008350e7825 */ /* 0x000fe200078e0202 */ /*1970*/ ISETP.NE.AND P0, PT, R89, UR5, PT ; /* 0x0000000559007c0c */ /* 0x000fca000bf05270 */ /*1980*/ IMAD.WIDE R26, R53, 0x8, R14 ; /* 0x00000008351a7825 */ /* 0x000fcc00078e020e */ /*1990*/ IMAD.WIDE R40, R53, 0x8, R26 ; /* 0x0000000835287825 */ /* 0x000fe400078e021a */ /*19a0*/ @!P0 STG.E.64 [R38.64], R4 ; /* 0x0000000426008986 */ /* 0x0001e8000c101b06 */ /*19b0*/ @!P0 STG.E.64 [R2.64], R16 ; /* 0x0000001002008986 */ /* 0x0001e8000c101b06 */ /*19c0*/ @!P0 STG.E.64 [R14.64], R28 ; /* 0x0000001c0e008986 */ /* 0x0001e8000c101b06 */ /*19d0*/ @!P0 STG.E.64 [R26.64], R42 ; /* 0x0000002a1a008986 */ /* 0x0001e8000c101b06 */ /*19e0*/ @!P0 STG.E.64 [R40.64], R66 ; /* 0x0000004228008986 */ /* 0x0001e2000c101b06 */ /*19f0*/ @P1 BRA 0x1ad0 ; /* 0x000000d000001947 */ /* 0x000fea0003800000 */ /*1a00*/ ULDC UR5, c[0x0][0x16c] ; /* 0x00005b0000057ab9 */ /* 0x000fe40000000800 */ /*1a10*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */ /* 0x000fcc000f8e023f */ /*1a20*/ IMAD R5, R91, UR4, R89 ; /* 0x000000045b057c24 */ /* 0x001fc8000f8e0259 */ /*1a30*/ IMAD.WIDE R4, R5, R0, c[0x0][0x160] ; /* 0x0000580005047625 */ /* 0x000fca00078e0200 */ /*1a40*/ STG.E.64 [R4.64], R6 ; /* 0x0000000604007986 */ /* 0x0001e2000c101b06 */ /*1a50*/ IMAD.WIDE R16, R53, 0x8, R4 ; /* 0x0000000835107825 */ /* 0x000fca00078e0204 */ /*1a60*/ STG.E.64 [R16.64], R18 ; /* 0x0000001210007986 */ /* 0x0001e2000c101b06 */ /*1a70*/ IMAD.WIDE R28, R53, 0x8, R16 ; /* 0x00000008351c7825 */ /* 0x000fca00078e0210 */ /*1a80*/ STG.E.64 [R28.64], R30 ; /* 0x0000001e1c007986 */ /* 0x0001e2000c101b06 */ /*1a90*/ IMAD.WIDE R42, R53, 0x8, R28 ; /* 0x00000008352a7825 */ /* 0x000fca00078e021c */ /*1aa0*/ STG.E.64 [R42.64], R44 ; /* 0x0000002c2a007986 */ /* 0x0001e2000c101b06 */ /*1ab0*/ IMAD.WIDE R54, R53, 0x8, R42 ; /* 0x0000000835367825 */ /* 0x000fca00078e022a */ /*1ac0*/ STG.E.64 [R54.64], R70 ; /* 0x0000004636007986 */ /* 0x0001e4000c101b06 */ /*1ad0*/ ULDC UR4, c[0x0][0x16c] ; /* 0x00005b0000047ab9 */ /* 0x000fe20000000800 */ /*1ae0*/ ISETP.NE.AND P1, PT, R91, RZ, PT ; /* 0x000000ff5b00720c */ /* 0x000fe20003f25270 */ /*1af0*/ UIADD3 UR4, UR4, -0x1, URZ ; /* 0xffffffff04047890 */ /* 0x000fe2000fffe03f */ /*1b00*/ IADD3 R52, R52, -0x1, RZ ; /* 0xffffffff34347810 */ /* 0x000fc80007ffe0ff */ /*1b10*/ ISETP.NE.AND P2, PT, R91, R52, PT ; /* 0x000000345b00720c */ /* 0x000fe40003f45270 */ /*1b20*/ ISETP.NE.AND P0, PT, R88, UR4, PT ; /* 0x0000000458007c0c */ /* 0x000fda000bf05270 */ /*1b30*/ @!P0 STG.E.64 [R38.64], R8 ; /* 0x0000000826008986 */ /* 0x0005e8000c101b06 */ /*1b40*/ @!P0 STG.E.64 [R2.64], R20 ; /* 0x0000001402008986 */ /* 0x0005e8000c101b06 */ /*1b50*/ @!P0 STG.E.64 [R14.64], R32 ; /* 0x000000200e008986 */ /* 0x0005e8000c101b06 */ /*1b60*/ @!P0 STG.E.64 [R26.64], R46 ; /* 0x0000002e1a008986 */ /* 0x0005e8000c101b06 */ /*1b70*/ @!P0 STG.E.64 [R40.64], R72 ; /* 0x0000004828008986 */ /* 0x0005e2000c101b06 */ /*1b80*/ @P1 BRA 0x1c40 ; /* 0x000000b000001947 */ /* 0x000fea0003800000 */ /*1b90*/ IMAD R5, R88, c[0x0][0x168], R89 ; /* 0x00005a0058057a24 */ /* 0x001fc800078e0259 */ /*1ba0*/ IMAD.WIDE R4, R5, R0, c[0x0][0x160] ; /* 0x0000580005047625 */ /* 0x000fca00078e0200 */ /*1bb0*/ STG.E.64 [R4.64], R10 ; /* 0x0000000a04007986 */ /* 0x0001e2000c101b06 */ /*1bc0*/ IMAD.WIDE R6, R53, 0x8, R4 ; /* 0x0000000835067825 */ /* 0x000fca00078e0204 */ /*1bd0*/ STG.E.64 [R6.64], R22 ; /* 0x0000001606007986 */ /* 0x0001e2000c101b06 */ /*1be0*/ IMAD.WIDE R8, R53, 0x8, R6 ; /* 0x0000000835087825 */ /* 0x004fca00078e0206 */ /*1bf0*/ STG.E.64 [R8.64], R34 ; /* 0x0000002208007986 */ /* 0x0001e2000c101b06 */ /*1c00*/ IMAD.WIDE R16, R53, 0x8, R8 ; /* 0x0000000835107825 */ /* 0x000fca00078e0208 */ /*1c10*/ STG.E.64 [R16.64], R48 ; /* 0x0000003010007986 */ /* 0x0001e2000c101b06 */ /*1c20*/ IMAD.WIDE R18, R53, 0x8, R16 ; /* 0x0000000835127825 */ /* 0x000fca00078e0210 */ /*1c30*/ STG.E.64 [R18.64], R78 ; /* 0x0000004e12007986 */ /* 0x0001e4000c101b06 */ /*1c40*/ @P2 EXIT ; /* 0x000000000000294d */ /* 0x000fea0003800000 */ /*1c50*/ STG.E.64 [R38.64], R12 ; /* 0x0000000c26007986 */ /* 0x000fe8000c101b06 */ /*1c60*/ STG.E.64 [R2.64], R24 ; /* 0x0000001802007986 */ /* 0x000fe8000c101b06 */ /*1c70*/ STG.E.64 [R14.64], R36 ; /* 0x000000240e007986 */ /* 0x000fe8000c101b06 */ /*1c80*/ STG.E.64 [R26.64], R50 ; /* 0x000000321a007986 */ /* 0x000fe8000c101b06 */ /*1c90*/ STG.E.64 [R40.64], R68 ; /* 0x0000004428007986 */ /* 0x000fe2000c101b06 */ /*1ca0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1cb0*/ BRA 0x1cb0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1cc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1cd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ce0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1cf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1d70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z18exact_rhs_kernel_zPdiii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ UMOV UR5, 0x1 ; /* 0x0000000100057882 */ /* 0x000fe40000000000 */ /*0030*/ ULDC.64 UR6, c[0x0][0x168] ; /* 0x00005a0000067ab9 */ /* 0x000fe20000000a00 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e220000002100 */ /*0050*/ UIADD3 UR4, -UR5, UR7, URZ ; /* 0x0000000705047290 */ /* 0x000fe4000fffe13f */ /*0060*/ UIADD3 UR5, -UR5, UR6, URZ ; /* 0x0000000605057290 */ /* 0x000fe2000fffe13f */ /*0070*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e680000002600 */ /*0080*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e620000002200 */ /*0090*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*00a0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fe20007ffe0ff */ /*00b0*/ IMAD R2, R2, c[0x0][0x4], R5 ; /* 0x0000010002027a24 */ /* 0x002fc600078e0205 */ /*00c0*/ ISETP.GE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */ /* 0x000fe4000bf06270 */ /*00d0*/ IADD3 R14, R2, 0x1, RZ ; /* 0x00000001020e7810 */ /* 0x000fc80007ffe0ff */ /*00e0*/ ISETP.GE.OR P0, PT, R14, UR5, P0 ; /* 0x000000050e007c0c */ /* 0x000fda0008706670 */ /*00f0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0100*/ I2F.F64 R4, R14 ; /* 0x0000000e00047312 */ /* 0x000e220000201c00 */ /*0110*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x3][0x378] ; /* 0x00c0de00ff067624 */ /* 0x000fe200078e00ff */ /*0120*/ MOV R7, c[0x3][0x37c] ; /* 0x00c0df0000077a02 */ /* 0x000fe20000000f00 */ /*0130*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x3][0x384] ; /* 0x00c0e100ff0b7624 */ /* 0x000fe200078e00ff */ /*0140*/ MOV R10, c[0x3][0x380] ; /* 0x00c0e000000a7a02 */ /* 0x000fe20000000f00 */ /*0150*/ IMAD.MOV.U32 R16, RZ, RZ, c[0x3][0x388] ; /* 0x00c0e200ff107624 */ /* 0x000fe200078e00ff */ /*0160*/ MOV R18, c[0x3][0x390] ; /* 0x00c0e40000127a02 */ /* 0x000fe20000000f00 */ /*0170*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x3][0x38c] ; /* 0x00c0e300ff117624 */ /* 0x000fe200078e00ff */ /*0180*/ I2F.F64 R2, R0 ; /* 0x0000000000027312 */ /* 0x000e620000201c00 */ /*0190*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x3][0x394] ; /* 0x00c0e500ff137624 */ /* 0x000fe200078e00ff */ /*01a0*/ MOV R21, c[0x3][0x39c] ; /* 0x00c0e70000157a02 */ /* 0x000fe20000000f00 */ /*01b0*/ IMAD.MOV.U32 R20, RZ, RZ, c[0x3][0x398] ; /* 0x00c0e600ff147624 */ /* 0x000fe200078e00ff */ /*01c0*/ MOV R13, c[0x3][0x3ac] ; /* 0x00c0eb00000d7a02 */ /* 0x000fe20000000f00 */ /*01d0*/ IMAD.MOV.U32 R12, RZ, RZ, c[0x3][0x3a8] ; /* 0x00c0ea00ff0c7624 */ /* 0x000fe200078e00ff */ /*01e0*/ DMUL R22, RZ, c[0x3][0x70] ; /* 0x00c01c00ff167a28 */ /* 0x000fe20000000000 */ /*01f0*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x3][0x3a0] ; /* 0x00c0e800ff087624 */ /* 0x000fe200078e00ff */ /*0200*/ BSSY B0, 0x820 ; /* 0x0000061000007945 */ /* 0x000fe20003800000 */ /*0210*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x3][0x3a4] ; /* 0x00c0e900ff097624 */ /* 0x000fe200078e00ff */ /*0220*/ DMUL R4, R4, c[0x3][0x60] ; /* 0x00c0180004047a28 */ /* 0x001e0c0000000000 */ /*0230*/ DFMA R6, R4, R6, c[0x3][0x300] ; /* 0x00c0c0000406762b */ /* 0x001e080000000006 */ /*0240*/ DFMA R10, R4, R10, c[0x3][0x308] ; /* 0x00c0c200040a762b */ /* 0x000e88000000000a */ /*0250*/ DFMA R16, R4, R16, c[0x3][0x310] ; /* 0x00c0c4000410762b */ /* 0x000ec80000000010 */ /*0260*/ DFMA R18, R4, R18, c[0x3][0x318] ; /* 0x00c0c6000412762b */ /* 0x000f080000000012 */ /*0270*/ DFMA R20, R4, R20, c[0x3][0x320] ; /* 0x00c0c8000414762b */ /* 0x000f480000000014 */ /*0280*/ DMUL R2, R2, c[0x3][0x68] ; /* 0x00c01a0002027a28 */ /* 0x002e480000000000 */ /*0290*/ DFMA R6, R4, R6, c[0x3][0x288] ; /* 0x00c0a2000406762b */ /* 0x001e080000000006 */ /*02a0*/ DFMA R10, R4, R10, c[0x3][0x290] ; /* 0x00c0a400040a762b */ /* 0x004e88000000000a */ /*02b0*/ DFMA R16, R4, R16, c[0x3][0x298] ; /* 0x00c0a6000410762b */ /* 0x008ec80000000010 */ /*02c0*/ DFMA R18, R4, R18, c[0x3][0x2a0] ; /* 0x00c0a8000412762b */ /* 0x010f080000000012 */ /*02d0*/ DFMA R20, R4, R20, c[0x3][0x2a8] ; /* 0x00c0aa000414762b */ /* 0x020f480000000014 */ /*02e0*/ DFMA R12, R2, R12, c[0x3][0x330] ; /* 0x00c0cc00020c762b */ /* 0x002e48000000000c */ /*02f0*/ DFMA R6, R4, R6, c[0x3][0x210] ; /* 0x00c084000406762b */ /* 0x001e080000000006 */ /*0300*/ DFMA R10, R4, R10, c[0x3][0x218] ; /* 0x00c08600040a762b */ /* 0x004e88000000000a */ /*0310*/ DFMA R16, R4, R16, c[0x3][0x220] ; /* 0x00c088000410762b */ /* 0x008ec80000000010 */ /*0320*/ DFMA R18, R4, R18, c[0x3][0x228] ; /* 0x00c08a000412762b */ /* 0x010f080000000012 */ /*0330*/ DFMA R20, R4, R20, c[0x3][0x230] ; /* 0x00c08c000414762b */ /* 0x020f480000000014 */ /*0340*/ DFMA R14, R2, R12, c[0x3][0x2b8] ; /* 0x00c0ae00020e762b */ /* 0x002e48000000000c */ /*0350*/ DFMA R6, R4, R6, c[0x3][0x1e8] ; /* 0x00c07a000406762b */ /* 0x001fc80000000006 */ /*0360*/ DFMA R12, R4, R10, c[0x3][0x1f0] ; /* 0x00c07c00040c762b */ /* 0x004fc8000000000a */ /*0370*/ DFMA R16, R4, R16, c[0x3][0x1f8] ; /* 0x00c07e000410762b */ /* 0x008fc80000000010 */ /*0380*/ DFMA R18, R4, R18, c[0x3][0x200] ; /* 0x00c080000412762b */ /* 0x010fc80000000012 */ /*0390*/ DFMA R20, R4, R20, c[0x3][0x208] ; /* 0x00c082000414762b */ /* 0x0201e40000000014 */ /*03a0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x3][0x3c8] ; /* 0x00c0f200ff047624 */ /* 0x001fe400078e00ff */ /*03b0*/ DFMA R8, R2, R8, c[0x3][0x328] ; /* 0x00c0ca000208762b */ /* 0x000e220000000008 */ /*03c0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x3][0x3cc] ; /* 0x00c0f300ff057624 */ /* 0x000fc600078e00ff */ /*03d0*/ DFMA R14, R2, R14, c[0x3][0x240] ; /* 0x00c09000020e762b */ /* 0x002fc8000000000e */ /*03e0*/ DFMA R8, R2, R8, c[0x3][0x2b0] ; /* 0x00c0ac000208762b */ /* 0x001e080000000008 */ /*03f0*/ DFMA R4, R22, R4, c[0x3][0x350] ; /* 0x00c0d4001604762b */ /* 0x000e480000000004 */ /*0400*/ DFMA R8, R2, R8, c[0x3][0x238] ; /* 0x00c08e000208762b */ /* 0x001e080000000008 */ /*0410*/ DFMA R4, R22, R4, c[0x3][0x2d8] ; /* 0x00c0b6001604762b */ /* 0x002e480000000004 */ /*0420*/ DFMA R10, R2, R8, R6 ; /* 0x00000008020a722b */ /* 0x0011e40000000006 */ /*0430*/ MOV R6, c[0x3][0x3b0] ; /* 0x00c0ec0000067a02 */ /* 0x001fe20000000f00 */ /*0440*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x3][0x3b4] ; /* 0x00c0ed00ff077624 */ /* 0x000fe200078e00ff */ /*0450*/ DFMA R4, R22, R4, c[0x3][0x260] ; /* 0x00c098001604762b */ /* 0x002e220000000004 */ /*0460*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x3][0x3b8] ; /* 0x00c0ee00ff087624 */ /* 0x000fe200078e00ff */ /*0470*/ MOV R9, c[0x3][0x3bc] ; /* 0x00c0ef0000097a02 */ /* 0x000fe40000000f00 */ /*0480*/ DFMA R12, R2, R14, R12 ; /* 0x0000000e020c722b */ /* 0x000fc8000000000c */ /*0490*/ DFMA R24, R22, R4, R10 ; /* 0x000000041618722b */ /* 0x001064000000000a */ /*04a0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x3][0x3c0] ; /* 0x00c0f000ff047624 */ /* 0x001fe400078e00ff */ /*04b0*/ DFMA R6, R2.reuse, R6, c[0x3][0x338] ; /* 0x00c0ce000206762b */ /* 0x040e220000000006 */ /*04c0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x3][0x3c4] ; /* 0x00c0f100ff057624 */ /* 0x000fe200078e00ff */ /*04d0*/ MUFU.RCP64H R29, R25 ; /* 0x00000019001d7308 */ /* 0x002e640000001800 */ /*04e0*/ DFMA R8, R2, R8, c[0x3][0x340] ; /* 0x00c0d0000208762b */ /* 0x000fe40000000008 */ /*04f0*/ IADD3 R28, R25, 0x300402, RZ ; /* 0x00300402191c7810 */ /* 0x000fc40007ffe0ff */ /*0500*/ DFMA R6, R2.reuse, R6, c[0x3][0x2c0] ; /* 0x00c0b0000206762b */ /* 0x041e240000000006 */ /*0510*/ FSETP.GEU.AND P0, PT, |R28|, 5.8789094863358348022e-39, PT ; /* 0x004004021c00780b */ /* 0x000fe40003f0e200 */ /*0520*/ DFMA R4, R2, R4, c[0x3][0x348] ; /* 0x00c0d2000204762b */ /* 0x000e880000000004 */ /*0530*/ DFMA R6, R2, R6, c[0x3][0x248] ; /* 0x00c092000206762b */ /* 0x001e080000000006 */ /*0540*/ DFMA R8, R2, R8, c[0x3][0x2c8] ; /* 0x00c0b2000208762b */ /* 0x000ec80000000008 */ /*0550*/ DFMA R4, R2, R4, c[0x3][0x2d0] ; /* 0x00c0b4000204762b */ /* 0x004e880000000004 */ /*0560*/ DFMA R14, R2, R6, R16 ; /* 0x00000006020e722b */ /* 0x001fc80000000010 */ /*0570*/ DFMA R8, R2, R8, c[0x3][0x250] ; /* 0x00c094000208762b */ /* 0x008e080000000008 */ /*0580*/ DFMA R6, -R24, R28, 1 ; /* 0x3ff000001806742b */ /* 0x002e48000000011c */ /*0590*/ DFMA R4, R2, R4, c[0x3][0x258] ; /* 0x00c096000204762b */ /* 0x004e880000000004 */ /*05a0*/ DFMA R16, R2, R8, R18 ; /* 0x000000080210722b */ /* 0x0011e40000000012 */ /*05b0*/ MOV R8, c[0x3][0x3e8] ; /* 0x00c0fa0000087a02 */ /* 0x001fe20000000f00 */ /*05c0*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x3][0x3ec] ; /* 0x00c0fb00ff097624 */ /* 0x000fe200078e00ff */ /*05d0*/ DFMA R6, R6, R6, R6 ; /* 0x000000060606722b */ /* 0x002e080000000006 */ /*05e0*/ DFMA R18, R2, R4, R20 ; /* 0x000000040212722b */ /* 0x0043e40000000014 */ /*05f0*/ MOV R2, c[0x3][0x3d0] ; /* 0x00c0f40000027a02 */ /* 0x002fe20000000f00 */ /*0600*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x3][0x3d4] ; /* 0x00c0f500ff037624 */ /* 0x000fe200078e00ff */ /*0610*/ DFMA R56, R28, R6, R28 ; /* 0x000000061c38722b */ /* 0x0011e2000000001c */ /*0620*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x3][0x3d8] ; /* 0x00c0f600ff047624 */ /* 0x000fe200078e00ff */ /*0630*/ MOV R5, c[0x3][0x3dc] ; /* 0x00c0f70000057a02 */ /* 0x000fe20000000f00 */ /*0640*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x3][0x3e0] ; /* 0x00c0f800ff067624 */ /* 0x001fe200078e00ff */ /*0650*/ DFMA R8, R22, R8, c[0x3][0x370] ; /* 0x00c0dc001608762b */ /* 0x000fe20000000008 */ /*0660*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x3][0x3e4] ; /* 0x00c0f900ff077624 */ /* 0x000fc600078e00ff */ /*0670*/ DFMA R2, R22, R2, c[0x3][0x358] ; /* 0x00c0d6001602762b */ /* 0x000e080000000002 */ /*0680*/ DFMA R4, R22, R4, c[0x3][0x360] ; /* 0x00c0d8001604762b */ /* 0x000e480000000004 */ /*0690*/ DFMA R6, R22, R6, c[0x3][0x368] ; /* 0x00c0da001606762b */ /* 0x000e880000000006 */ /*06a0*/ DFMA R2, R22, R2, c[0x3][0x2e0] ; /* 0x00c0b8001602762b */ /* 0x001e080000000002 */ /*06b0*/ DFMA R4, R22, R4, c[0x3][0x2e8] ; /* 0x00c0ba001604762b */ /* 0x002e480000000004 */ /*06c0*/ DFMA R6, R22, R6, c[0x3][0x2f0] ; /* 0x00c0bc001606762b */ /* 0x004e880000000006 */ /*06d0*/ DFMA R2, R22, R2, c[0x3][0x268] ; /* 0x00c09a001602762b */ /* 0x001e080000000002 */ /*06e0*/ DFMA R8, R22, R8, c[0x3][0x2f8] ; /* 0x00c0be001608762b */ /* 0x000ec80000000008 */ /*06f0*/ DFMA R4, R22, R4, c[0x3][0x270] ; /* 0x00c09c001604762b */ /* 0x002e480000000004 */ /*0700*/ DFMA R6, R22, R6, c[0x3][0x278] ; /* 0x00c09e001606762b */ /* 0x004e880000000006 */ /*0710*/ DFMA R20, R22, R2, R12 ; /* 0x000000021614722b */ /* 0x001fc8000000000c */ /*0720*/ DFMA R26, R22, R8, c[0x3][0x280] ; /* 0x00c0a000161a762b */ /* 0x008e080000000008 */ /*0730*/ DFMA R2, -R24, R56, 1 ; /* 0x3ff000001802742b */ /* 0x000ec80000000138 */ /*0740*/ DFMA R4, R22, R4, R14 ; /* 0x000000041604722b */ /* 0x002308000000000e */ /*0750*/ DFMA R8, R22, R6, R16 ; /* 0x000000061608722b */ /* 0x0042880000000010 */ /*0760*/ DFMA R22, R22, R26, R18 ; /* 0x0000001a1616722b */ /* 0x0012080000000012 */ /*0770*/ DFMA R56, R56, R2, R56 ; /* 0x000000023838722b */ /* 0x0082e20000000038 */ /*0780*/ @P0 BRA 0x810 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*0790*/ LOP3.LUT R0, R25, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff19007812 */ /* 0x015fe200078ec0ff */ /*07a0*/ IMAD.MOV.U32 R66, RZ, RZ, R24 ; /* 0x000000ffff427224 */ /* 0x000fe200078e0018 */ /*07b0*/ MOV R67, R25 ; /* 0x0000001900437202 */ /* 0x000fe40000000f00 */ /*07c0*/ IADD3 R63, R0, -0x100000, RZ ; /* 0xfff00000003f7810 */ /* 0x000fe40007ffe0ff */ /*07d0*/ MOV R76, 0x7f0 ; /* 0x000007f0004c7802 */ /* 0x000fe40000000f00 */ /*07e0*/ CALL.REL.NOINC 0x2be0 ; /* 0x000023f000007944 */ /* 0x00afea0003c00000 */ /*07f0*/ IMAD.MOV.U32 R56, RZ, RZ, R60 ; /* 0x000000ffff387224 */ /* 0x000fe400078e003c */ /*0800*/ IMAD.MOV.U32 R57, RZ, RZ, R61 ; /* 0x000000ffff397224 */ /* 0x000fe400078e003d */ /*0810*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x015fea0003800000 */ /*0820*/ MOV R36, c[0x3][0x70] ; /* 0x00c01c0000247a02 */ /* 0x000fe20000000f00 */ /*0830*/ IMAD.MOV.U32 R37, RZ, RZ, c[0x3][0x74] ; /* 0x00c01d00ff257624 */ /* 0x000fe200078e00ff */ /*0840*/ MOV R3, c[0x3][0x3cc] ; /* 0x00c0f30000037a02 */ /* 0x002fe20000000f00 */ /*0850*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x3][0x3c8] ; /* 0x00c0f200ff027624 */ /* 0x000fe200078e00ff */ /*0860*/ MOV R26, c[0x3][0x3d8] ; /* 0x00c0f600001a7a02 */ /* 0x000fe20000000f00 */ /*0870*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x3][0x3d0] ; /* 0x00c0f400ff067624 */ /* 0x000fe200078e00ff */ /*0880*/ MOV R29, c[0x3][0x3e4] ; /* 0x00c0f900001d7a02 */ /* 0x000fe20000000f00 */ /*0890*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x3][0x3d4] ; /* 0x00c0f500ff077624 */ /* 0x000fe200078e00ff */ /*08a0*/ DMUL R94, R4, R56 ; /* 0x00000038045e7228 */ /* 0x008fe20000000000 */ /*08b0*/ IMAD.MOV.U32 R27, RZ, RZ, c[0x3][0x3dc] ; /* 0x00c0f700ff1b7624 */ /* 0x000fe200078e00ff */ /*08c0*/ BSSY B0, 0xbe0 ; /* 0x0000031000007945 */ /* 0x000fe20003800000 */ /*08d0*/ IMAD.MOV.U32 R28, RZ, RZ, c[0x3][0x3e0] ; /* 0x00c0f800ff1c7624 */ /* 0x000fe200078e00ff */ /*08e0*/ DFMA R2, R2, R36, c[0x3][0x350] ; /* 0x00c0d4000202762b */ /* 0x000e220000000024 */ /*08f0*/ IMAD.MOV.U32 R30, RZ, RZ, c[0x3][0x3e8] ; /* 0x00c0fa00ff1e7624 */ /* 0x000fc400078e00ff */ /*0900*/ IMAD.MOV.U32 R31, RZ, RZ, c[0x3][0x3ec] ; /* 0x00c0fb00ff1f7624 */ /* 0x000fe200078e00ff */ /*0910*/ DMUL R92, R8, R56 ; /* 0x00000038085c7228 */ /* 0x000fc80000000000 */ /*0920*/ DFMA R2, R2, R36, c[0x3][0x2d8] ; /* 0x00c0b6000202762b */ /* 0x001e080000000024 */ /*0930*/ DFMA R30, R30, R36, c[0x3][0x370] ; /* 0x00c0dc001e1e762b */ /* 0x000fc80000000024 */ /*0940*/ DFMA R2, R2, R36, c[0x3][0x260] ; /* 0x00c098000202762b */ /* 0x001e080000000024 */ /*0950*/ DMUL R96, R20, R56 ; /* 0x0000003814607228 */ /* 0x000fc80000000000 */ /*0960*/ DFMA R54, R2, c[0x3][0x70], R10 ; /* 0x00c01c0002367a2b */ /* 0x001e08000000000a */ /*0970*/ DFMA R2, R6, R36.reuse, c[0x3][0x358] ; /* 0x00c0d6000602762b */ /* 0x080e640000000024 */ /*0980*/ MUFU.RCP64H R33, R55 ; /* 0x0000003700217308 */ /* 0x001e240000001800 */ /*0990*/ DFMA R6, R26, R36.reuse, c[0x3][0x360] ; /* 0x00c0d8001a06762b */ /* 0x080fe40000000024 */ /*09a0*/ IADD3 R32, R55, 0x300402, RZ ; /* 0x0030040237207810 */ /* 0x000fe40007ffe0ff */ /*09b0*/ DFMA R26, R28, R36, c[0x3][0x368] ; /* 0x00c0da001c1a762b */ /* 0x000ea40000000024 */ /*09c0*/ FSETP.GEU.AND P0, PT, |R32|, 5.8789094863358348022e-39, PT ; /* 0x004004022000780b */ /* 0x000fc40003f0e200 */ /*09d0*/ DFMA R2, R2, R36, c[0x3][0x2e0] ; /* 0x00c0b8000202762b */ /* 0x002e480000000024 */ /*09e0*/ DFMA R28, R26, R36, c[0x3][0x2f0] ; /* 0x00c0bc001a1c762b */ /* 0x004fc80000000024 */ /*09f0*/ DFMA R34, -R54, R32, 1 ; /* 0x3ff000003622742b */ /* 0x001e080000000120 */ /*0a00*/ DFMA R26, R2, R36, c[0x3][0x268] ; /* 0x00c09a00021a762b */ /* 0x002fc80000000024 */ /*0a10*/ DFMA R34, R34, R34, R34 ; /* 0x000000222222722b */ /* 0x001e080000000022 */ /*0a20*/ DMUL R2, R4, R94 ; /* 0x0000005e04027228 */ /* 0x000e480000000000 */ /*0a30*/ DFMA R6, R6, R36, c[0x3][0x2e8] ; /* 0x00c0ba000606762b */ /* 0x000e880000000024 */ /*0a40*/ DFMA R30, R30, R36, c[0x3][0x2f8] ; /* 0x00c0be001e1e762b */ /* 0x000ec80000000024 */ /*0a50*/ DFMA R34, R32, R34, R32 ; /* 0x000000222022722b */ /* 0x001e080000000020 */ /*0a60*/ DMUL R86, R92, R92 ; /* 0x0000005c5c567228 */ /* 0x000f080000000000 */ /*0a70*/ DFMA R2, R20, R96, R2 ; /* 0x000000601402722b */ /* 0x002e480000000002 */ /*0a80*/ DFMA R6, R6, R36, c[0x3][0x270] ; /* 0x00c09c000606762b */ /* 0x004e880000000024 */ /*0a90*/ DFMA R28, R28, R36, c[0x3][0x278] ; /* 0x00c09e001c1c762b */ /* 0x000f480000000024 */ /*0aa0*/ DFMA R30, R30, R36, c[0x3][0x280] ; /* 0x00c0a0001e1e762b */ /* 0x008fc80000000024 */ /*0ab0*/ DFMA R52, -R54, R34, 1 ; /* 0x3ff000003634742b */ /* 0x001e080000000122 */ /*0ac0*/ DFMA R102, R96, R96, R86 ; /* 0x000000606066722b */ /* 0x010ec80000000056 */ /*0ad0*/ DFMA R112, R8, R92, R2 ; /* 0x0000005c0870722b */ /* 0x0023080000000002 */ /*0ae0*/ DFMA R2, R6, c[0x3][0x70], R14 ; /* 0x00c01c0006027a2b */ /* 0x004288000000000e */ /*0af0*/ DFMA R6, R28, c[0x3][0x70], R16 ; /* 0x00c01c001c067a2b */ /* 0x0202080000000010 */ /*0b00*/ DFMA R52, R34, R52, R34 ; /* 0x000000342234722b */ /* 0x0012080000000022 */ /*0b10*/ DFMA R102, R94, R94, R102 ; /* 0x0000005e5e66722b */ /* 0x0082c80000000066 */ /*0b20*/ DFMA R26, R26, c[0x3][0x70], R12 ; /* 0x00c01c001a1a7a2b */ /* 0x000208000000000c */ /*0b30*/ DFMA R28, R30, c[0x3][0x70], R18 ; /* 0x00c01c001e1c7a2b */ /* 0x0002220000000012 */ /*0b40*/ @P0 BRA 0xbd0 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*0b50*/ LOP3.LUT R0, R55, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff37007812 */ /* 0x01cfe200078ec0ff */ /*0b60*/ IMAD.MOV.U32 R67, RZ, RZ, R55 ; /* 0x000000ffff437224 */ /* 0x000fe200078e0037 */ /*0b70*/ MOV R66, R54 ; /* 0x0000003600427202 */ /* 0x000fe40000000f00 */ /*0b80*/ IADD3 R63, R0, -0x100000, RZ ; /* 0xfff00000003f7810 */ /* 0x000fe40007ffe0ff */ /*0b90*/ MOV R76, 0xbb0 ; /* 0x00000bb0004c7802 */ /* 0x000fe40000000f00 */ /*0ba0*/ CALL.REL.NOINC 0x2be0 ; /* 0x0000203000007944 */ /* 0x003fea0003c00000 */ /*0bb0*/ IMAD.MOV.U32 R52, RZ, RZ, R60 ; /* 0x000000ffff347224 */ /* 0x000fe200078e003c */ /*0bc0*/ MOV R53, R61 ; /* 0x0000003d00357202 */ /* 0x000fe40000000f00 */ /*0bd0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x01cfea0003800000 */ /*0be0*/ IMAD.MOV.U32 R36, RZ, RZ, c[0x3][0x70] ; /* 0x00c01c00ff247624 */ /* 0x000fe200078e00ff */ /*0bf0*/ MOV R30, c[0x3][0x3c8] ; /* 0x00c0f200001e7a02 */ /* 0x002fe20000000f00 */ /*0c00*/ IMAD.MOV.U32 R37, RZ, RZ, c[0x3][0x74] ; /* 0x00c01d00ff257624 */ /* 0x000fe200078e00ff */ /*0c10*/ MOV R35, c[0x3][0x3d4] ; /* 0x00c0f50000237a02 */ /* 0x000fe20000000f00 */ /*0c20*/ IMAD.MOV.U32 R31, RZ, RZ, c[0x3][0x3cc] ; /* 0x00c0f300ff1f7624 */ /* 0x000fe200078e00ff */ /*0c30*/ MOV R38, c[0x3][0x3e0] ; /* 0x00c0f80000267a02 */ /* 0x000fe20000000f00 */ /*0c40*/ IMAD.MOV.U32 R34, RZ, RZ, c[0x3][0x3d0] ; /* 0x00c0f400ff227624 */ /* 0x000fe200078e00ff */ /*0c50*/ MOV R43, c[0x3][0x3ec] ; /* 0x00c0fb00002b7a02 */ /* 0x000fe20000000f00 */ /*0c60*/ DADD R36, R36, c[0x3][0x70] ; /* 0x00c01c0024247629 */ /* 0x000e620000000000 */ /*0c70*/ IMAD.MOV.U32 R39, RZ, RZ, c[0x3][0x3e4] ; /* 0x00c0f900ff277624 */ /* 0x000fe200078e00ff */ /*0c80*/ BSSY B0, 0xfd0 ; /* 0x0000034000007945 */ /* 0x000fe20003800000 */ /*0c90*/ IMAD.MOV.U32 R42, RZ, RZ, c[0x3][0x3e8] ; /* 0x00c0fa00ff2a7624 */ /* 0x000fc600078e00ff */ /*0ca0*/ DFMA R30, R36, R30, c[0x3][0x350] ; /* 0x00c0d400241e762b */ /* 0x002e4c000000001e */ /*0cb0*/ DFMA R30, R36, R30, c[0x3][0x2d8] ; /* 0x00c0b600241e762b */ /* 0x002e4c000000001e */ /*0cc0*/ DFMA R30, R36, R30, c[0x3][0x260] ; /* 0x00c09800241e762b */ /* 0x002e4c000000001e */ /*0cd0*/ DFMA R50, R36, R30, R10 ; /* 0x0000001e2432722b */ /* 0x002e4c000000000a */ /*0ce0*/ MUFU.RCP64H R59, R51 ; /* 0x00000033003b7308 */ /* 0x002e680000001800 */ /*0cf0*/ IADD3 R58, R51, 0x300402, RZ ; /* 0x00300402333a7810 */ /* 0x000fc80007ffe0ff */ /*0d00*/ FSETP.GEU.AND P0, PT, |R58|, 5.8789094863358348022e-39, PT ; /* 0x004004023a00780b */ /* 0x000fe40003f0e200 */ /*0d10*/ DFMA R30, -R50, R58, 1 ; /* 0x3ff00000321e742b */ /* 0x002e4c000000013a */ /*0d20*/ DFMA R32, R30, R30, R30 ; /* 0x0000001e1e20722b */ /* 0x002e48000000001e */ /*0d30*/ DFMA R30, R36, R34, c[0x3][0x358] ; /* 0x00c0d600241e762b */ /* 0x0004e40000000022 */ /*0d40*/ IMAD.MOV.U32 R34, RZ, RZ, c[0x3][0x3d8] ; /* 0x00c0f600ff227624 */ /* 0x004fe400078e00ff */ /*0d50*/ IMAD.MOV.U32 R35, RZ, RZ, c[0x3][0x3dc] ; /* 0x00c0f700ff237624 */ /* 0x000fe200078e00ff */ /*0d60*/ DFMA R40, R58, R32, R58 ; /* 0x000000203a28722b */ /* 0x002fc8000000003a */ /*0d70*/ DFMA R30, R36, R30, c[0x3][0x2e0] ; /* 0x00c0b800241e762b */ /* 0x008fc8000000001e */ /*0d80*/ DFMA R32, R36, R34, c[0x3][0x360] ; /* 0x00c0d8002420762b */ /* 0x000e480000000022 */ /*0d90*/ DFMA R34, R36, R38, c[0x3][0x368] ; /* 0x00c0da002422762b */ /* 0x000e880000000026 */ /*0da0*/ DFMA R38, R36, R42, c[0x3][0x370] ; /* 0x00c0dc002426762b */ /* 0x000ec8000000002a */ /*0db0*/ DFMA R32, R36, R32, c[0x3][0x2e8] ; /* 0x00c0ba002420762b */ /* 0x002e480000000020 */ /*0dc0*/ DFMA R34, R36, R34, c[0x3][0x2f0] ; /* 0x00c0bc002422762b */ /* 0x004e880000000022 */ /*0dd0*/ DFMA R38, R36, R38, c[0x3][0x2f8] ; /* 0x00c0be002426762b */ /* 0x008ec80000000026 */ /*0de0*/ DFMA R42, -R50, R40, 1 ; /* 0x3ff00000322a742b */ /* 0x000f080000000128 */ /*0df0*/ DFMA R30, R36, R30, c[0x3][0x268] ; /* 0x00c09a00241e762b */ /* 0x000f48000000001e */ /*0e00*/ DFMA R32, R36, R32, c[0x3][0x270] ; /* 0x00c09c002420762b */ /* 0x002e480000000020 */ /*0e10*/ DFMA R34, R36, R34, c[0x3][0x278] ; /* 0x00c09e002422762b */ /* 0x004e880000000022 */ /*0e20*/ DFMA R38, R36, R38, c[0x3][0x280] ; /* 0x00c0a0002426762b */ /* 0x008ec80000000026 */ /*0e30*/ DFMA R118, R40, R42, R40 ; /* 0x0000002a2876722b */ /* 0x010fc80000000028 */ /*0e40*/ DMUL R40, R2, R52 ; /* 0x0000003402287228 */ /* 0x001e080000000000 */ /*0e50*/ DMUL R42, R6, R52 ; /* 0x00000034062a7228 */ /* 0x000f080000000000 */ /*0e60*/ DFMA R30, R36, R30, R12 ; /* 0x0000001e241e722b */ /* 0x020fc8000000000c */ /*0e70*/ DFMA R32, R36, R32, R14 ; /* 0x000000202420722b */ /* 0x002fc8000000000e */ /*0e80*/ DFMA R34, R36, R34, R16 ; /* 0x000000222422722b */ /* 0x004fc80000000010 */ /*0e90*/ DFMA R36, R36, R38, R18 ; /* 0x000000262424722b */ /* 0x008fc80000000012 */ /*0ea0*/ DMUL R38, R26, R52 ; /* 0x000000341a267228 */ /* 0x000fc80000000000 */ /*0eb0*/ DMUL R46, R2, R40 ; /* 0x00000028022e7228 */ /* 0x001e080000000000 */ /*0ec0*/ DMUL R44, R42, R42 ; /* 0x0000002a2a2c7228 */ /* 0x010e480000000000 */ /*0ed0*/ DFMA R48, R26, R38, R46 ; /* 0x000000261a30722b */ /* 0x001e08000000002e */ /*0ee0*/ DFMA R46, R38, R38, R44 ; /* 0x00000026262e722b */ /* 0x002e48000000002c */ /*0ef0*/ DFMA R64, R6, R42, R48 ; /* 0x0000002a0640722b */ /* 0x0010a40000000030 */ /*0f00*/ IMAD.MOV.U32 R48, RZ, RZ, R50 ; /* 0x000000ffff307224 */ /* 0x001fe400078e0032 */ /*0f10*/ DFMA R46, R40, R40, R46 ; /* 0x00000028282e722b */ /* 0x002062000000002e */ /*0f20*/ IMAD.MOV.U32 R49, RZ, RZ, R51 ; /* 0x000000ffff317224 */ /* 0x000fe200078e0033 */ /*0f30*/ @P0 BRA 0xfc0 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*0f40*/ LOP3.LUT R0, R51, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff33007812 */ /* 0x007fe200078ec0ff */ /*0f50*/ IMAD.MOV.U32 R67, RZ, RZ, R51 ; /* 0x000000ffff437224 */ /* 0x000fe200078e0033 */ /*0f60*/ MOV R66, R50 ; /* 0x0000003200427202 */ /* 0x000fe40000000f00 */ /*0f70*/ IADD3 R63, R0, -0x100000, RZ ; /* 0xfff00000003f7810 */ /* 0x000fc40007ffe0ff */ /*0f80*/ MOV R76, 0xfa0 ; /* 0x00000fa0004c7802 */ /* 0x000fe40000000f00 */ /*0f90*/ CALL.REL.NOINC 0x2be0 ; /* 0x00001c4000007944 */ /* 0x000fea0003c00000 */ /*0fa0*/ IMAD.MOV.U32 R118, RZ, RZ, R60 ; /* 0x000000ffff767224 */ /* 0x000fe200078e003c */ /*0fb0*/ MOV R119, R61 ; /* 0x0000003d00777202 */ /* 0x000fe40000000f00 */ /*0fc0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x007fea0003800000 */ /*0fd0*/ IMAD.MOV.U32 R63, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff3f7624 */ /* 0x000fca00078e00ff */ /*0fe0*/ ISETP.GE.AND P0, PT, R63, 0x3, PT ; /* 0x000000033f00780c */ /* 0x000fda0003f06270 */ /*0ff0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*1000*/ S2R R58, SR_TID.X ; /* 0x00000000003a7919 */ /* 0x000e220000002100 */ /*1010*/ DMUL R50, R64, 0.5 ; /* 0x3fe0000040327828 */ /* 0x0003e20000000000 */ /*1020*/ LEA R62, R63, 0x1, 0x2 ; /* 0x000000013f3e7811 */ /* 0x000fe200078e10ff */ /*1030*/ IMAD.MOV.U32 R64, RZ, RZ, 0x1 ; /* 0x00000001ff407424 */ /* 0x002fe200078e00ff */ /*1040*/ S2R R60, SR_CTAID.Y ; /* 0x00000000003c7919 */ /* 0x000e620000002600 */ /*1050*/ DMUL R120, R32, R118.reuse ; /* 0x0000007620787228 */ /* 0x080fe20000000000 */ /*1060*/ ULDC UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */ /* 0x000fe20000000800 */ /*1070*/ IMAD.MOV.U32 R110, RZ, RZ, 0x3 ; /* 0x00000003ff6e7424 */ /* 0x000fe200078e00ff */ /*1080*/ S2R R61, SR_TID.Y ; /* 0x00000000003d7919 */ /* 0x000e620000002200 */ /*1090*/ DMUL R126, R30, R118.reuse ; /* 0x000000761e7e7228 */ /* 0x080fe20000000000 */ /*10a0*/ UIADD3 UR4, -UR4, URZ, URZ ; /* 0x0000003f04047290 */ /* 0x000fe2000fffe13f */ /*10b0*/ MOV R132, 0xfffffffc ; /* 0xfffffffc00847802 */ /* 0x000fe20000000f00 */ /*10c0*/ S2R R59, SR_CTAID.X ; /* 0x00000000003b7919 */ /* 0x000ea20000002500 */ /*10d0*/ DMUL R116, R34, R118 ; /* 0x0000007622747228 */ /* 0x000ee20000000000 */ /*10e0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fc40000000a00 */ /*10f0*/ IMAD.U32 R111, RZ, RZ, UR4 ; /* 0x00000004ff6f7e24 */ /* 0x000fe2000f8e00ff */ /*1100*/ DMUL R114, R22, R56 ; /* 0x0000003816727228 */ /* 0x0009e40000000000 */ /*1110*/ IMAD.MOV.U32 R56, RZ, RZ, c[0x3][0x1a8] ; /* 0x00c06a00ff387624 */ /* 0x010fe200078e00ff */ /*1120*/ MOV R57, c[0x3][0x1ac] ; /* 0x00c06b0000397a02 */ /* 0x000fe20000000f00 */ /*1130*/ DMUL R122, R116, R116 ; /* 0x00000074747a7228 */ /* 0x008ee20000000000 */ /*1140*/ IADD3 R0, R58, c[0x0][0x16c], RZ ; /* 0x00005b003a007a10 */ /* 0x001fc60007ffe0ff */ /*1150*/ DMUL R112, R112, 0.5 ; /* 0x3fe0000070707828 */ /* 0x000fc80000000000 */ /*1160*/ DFMA R130, R126, R126, R122 ; /* 0x0000007e7e82722b */ /* 0x008fe2000000007a */ /*1170*/ IMAD R67, R60, c[0x0][0x4], R61 ; /* 0x000001003c437a24 */ /* 0x002fe200078e023d */ /*1180*/ LEA R60, R63.reuse, 0x1, 0x1 ; /* 0x000000013f3c7811 */ /* 0x040fe200078e08ff */ /*1190*/ IMAD R61, R63.reuse, 0x3, R64 ; /* 0x000000033f3d7824 */ /* 0x040fe200078e0240 */ /*11a0*/ IADD3 R63, R63, 0x1, RZ ; /* 0x000000013f3f7810 */ /* 0x000fe20007ffe0ff */ /*11b0*/ IMAD R65, R59.reuse, c[0x0][0x0], R58 ; /* 0x000000003b417a24 */ /* 0x044fe200078e023a */ /*11c0*/ DMUL R52, R28, R52 ; /* 0x000000341c347228 */ /* 0x000fe20000000000 */ /*11d0*/ IMAD R0, R59, c[0x0][0x0], R0 ; /* 0x000000003b007a24 */ /* 0x000fe400078e0200 */ /*11e0*/ IMAD R60, R60, c[0x0][0x16c], R65.reuse ; /* 0x00005b003c3c7a24 */ /* 0x100fe200078e0241 */ /*11f0*/ DMUL R58, R32, R120 ; /* 0x00000078203a7228 */ /* 0x000e220000000000 */ /*1200*/ IMAD R61, R61, c[0x0][0x16c], R65.reuse ; /* 0x00005b003d3d7a24 */ /* 0x100fe200078e0241 */ /*1210*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fe20007ffe0ff */ /*1220*/ IMAD R62, R62, c[0x0][0x16c], R65.reuse ; /* 0x00005b003e3e7a24 */ /* 0x100fe200078e0241 */ /*1230*/ IADD3 R60, R60, 0x1, RZ ; /* 0x000000013c3c7810 */ /* 0x000fe20007ffe0ff */ /*1240*/ IMAD R63, R63, c[0x0][0x16c], R65 ; /* 0x00005b003f3f7a24 */ /* 0x000fe200078e0241 */ /*1250*/ DFMA R58, R30, R126, R58 ; /* 0x0000007e1e3a722b */ /* 0x001e22000000003a */ /*1260*/ IADD3 R61, R61, 0x1, RZ ; /* 0x000000013d3d7810 */ /* 0x000fe20007ffe0ff */ /*1270*/ IMAD R0, R0, c[0x0][0x168], R67.reuse ; /* 0x00005a0000007a24 */ /* 0x100fe200078e0243 */ /*1280*/ IADD3 R62, R62, 0x1, RZ ; /* 0x000000013e3e7810 */ /* 0x000fe20007ffe0ff */ /*1290*/ IMAD R60, R60, c[0x0][0x168], R67.reuse ; /* 0x00005a003c3c7a24 */ /* 0x100fe200078e0243 */ /*12a0*/ IADD3 R63, R63, 0x1, RZ ; /* 0x000000013f3f7810 */ /* 0x000fe20007ffe0ff */ /*12b0*/ DFMA R58, R34, R116, R58 ; /* 0x00000074223a722b */ /* 0x001e22000000003a */ /*12c0*/ IMAD R61, R61, c[0x0][0x168], R67.reuse ; /* 0x00005a003d3d7a24 */ /* 0x100fe200078e0243 */ /*12d0*/ IADD3 R109, R0, 0x1, RZ ; /* 0x00000001006d7810 */ /* 0x000fe20007ffe0ff */ /*12e0*/ IMAD R62, R62, c[0x0][0x168], R67.reuse ; /* 0x00005a003e3e7a24 */ /* 0x100fe200078e0243 */ /*12f0*/ DMUL R118, R36, R118 ; /* 0x0000007624767228 */ /* 0x0002a20000000000 */ /*1300*/ IMAD R63, R63, c[0x0][0x168], R67 ; /* 0x00005a003f3f7a24 */ /* 0x000fe200078e0243 */ /*1310*/ IADD3 R108, R60, 0x1, RZ ; /* 0x000000013c6c7810 */ /* 0x000fc40007ffe0ff */ /*1320*/ DMUL R56, R56, 0.5 ; /* 0x3fe0000038387828 */ /* 0x000ee20000000000 */ /*1330*/ IADD3 R107, R61, 0x1, RZ ; /* 0x000000013d6b7810 */ /* 0x000fe40007ffe0ff */ /*1340*/ IADD3 R106, R62, 0x1, RZ ; /* 0x000000013e6a7810 */ /* 0x000fe20007ffe0ff */ /*1350*/ DFMA R130, R120, R120, R130 ; /* 0x000000787882722b */ /* 0x0003220000000082 */ /*1360*/ IADD3 R0, R63, 0x1, RZ ; /* 0x000000013f007810 */ /* 0x000fc60007ffe0ff */ /*1370*/ DMUL R124, R58, 0.5 ; /* 0x3fe000003a7c7828 */ /* 0x01d2080000000000 */ /*1380*/ IMAD.MOV.U32 R67, RZ, RZ, 0x8 ; /* 0x00000008ff437424 */ /* 0x000fc800078e00ff */ /*1390*/ IMAD.WIDE R58, R0, R67, c[0x0][0x160] ; /* 0x00005800003a7625 */ /* 0x002fca00078e0243 */ /*13a0*/ LDG.E.64 R128, [R58.64] ; /* 0x000000063a807981 */ /* 0x000ea2000c1e1b00 */ /*13b0*/ IMAD.WIDE R62, R107, R67, c[0x0][0x160] ; /* 0x000058006b3e7625 */ /* 0x000fc800078e0243 */ /*13c0*/ IMAD.WIDE R64, R106, R67.reuse, c[0x0][0x160] ; /* 0x000058006a407625 */ /* 0x080fe200078e0243 */ /*13d0*/ LDG.E.64 R100, [R62.64] ; /* 0x000000063e647981 */ /* 0x000ee6000c1e1b00 */ /*13e0*/ IMAD.WIDE R60, R108, R67.reuse, c[0x0][0x160] ; /* 0x000058006c3c7625 */ /* 0x080fe200078e0243 */ /*13f0*/ LDG.E.64 R90, [R64.64] ; /* 0x00000006405a7981 */ /* 0x000f26000c1e1b00 */ /*1400*/ IMAD.WIDE R66, R109, R67, c[0x0][0x160] ; /* 0x000058006d427625 */ /* 0x000fe200078e0243 */ /*1410*/ LDG.E.64 R98, [R60.64] ; /* 0x000000063c627981 */ /* 0x000f68000c1e1b00 */ /*1420*/ LDG.E.64 R88, [R66.64] ; /* 0x0000000642587981 */ /* 0x000ee2000c1e1b00 */ /*1430*/ MOV R68, R38 ; /* 0x0000002600447202 */ /* 0x000fe20000000f00 */ /*1440*/ IMAD.MOV.U32 R69, RZ, RZ, R39 ; /* 0x000000ffff457224 */ /* 0x000fe200078e0027 */ /*1450*/ MOV R71, R41 ; /* 0x0000002900477202 */ /* 0x000fe20000000f00 */ /*1460*/ IMAD.MOV.U32 R70, RZ, RZ, R40 ; /* 0x000000ffff467224 */ /* 0x000fc400078e0028 */ /*1470*/ IMAD.MOV.U32 R38, RZ, RZ, R126 ; /* 0x000000ffff267224 */ /* 0x000fe400078e007e */ /*1480*/ DADD R40, R68, R68 ; /* 0x0000000044287229 */ /* 0x000e620000000044 */ /*1490*/ IMAD.MOV.U32 R39, RZ, RZ, R127 ; /* 0x000000ffff277224 */ /* 0x000fe200078e007f */ /*14a0*/ MOV R72, R46 ; /* 0x0000002e00487202 */ /* 0x000fe20000000f00 */ /*14b0*/ IMAD.MOV.U32 R73, RZ, RZ, R47 ; /* 0x000000ffff497224 */ /* 0x000fc800078e002f */ /*14c0*/ DADD R74, R38, -R40 ; /* 0x00000000264a7229 */ /* 0x002e620000000828 */ /*14d0*/ IMAD.MOV.U32 R46, RZ, RZ, R130 ; /* 0x000000ffff2e7224 */ /* 0x000fe400078e0082 */ /*14e0*/ IMAD.MOV.U32 R47, RZ, RZ, R131 ; /* 0x000000ffff2f7224 */ /* 0x000fc600078e0083 */ /*14f0*/ DADD R130, R74, R96 ; /* 0x000000004a827229 */ /* 0x0023e40000000060 */ /*1500*/ MOV R74, R44 ; /* 0x0000002c004a7202 */ /* 0x002fe20000000f00 */ /*1510*/ IMAD.MOV.U32 R75, RZ, RZ, R45 ; /* 0x000000ffff4b7224 */ /* 0x000fe200078e002d */ /*1520*/ DADD R104, R70, R70 ; /* 0x0000000046687229 */ /* 0x000e620000000046 */ /*1530*/ IMAD.MOV.U32 R40, RZ, RZ, R120 ; /* 0x000000ffff287224 */ /* 0x000fe200078e0078 */ /*1540*/ MOV R41, R121 ; /* 0x0000007900297202 */ /* 0x000fe40000000f00 */ /*1550*/ DADD R126, R72, R72 ; /* 0x00000000487e7229 */ /* 0x000e220000000048 */ /*1560*/ IMAD.MOV.U32 R44, RZ, RZ, R122 ; /* 0x000000ffff2c7224 */ /* 0x000fe200078e007a */ /*1570*/ MOV R45, R123 ; /* 0x0000007b002d7202 */ /* 0x000fc40000000f00 */ /*1580*/ DADD R120, R74, R74 ; /* 0x000000004a787229 */ /* 0x000e08000000004a */ /*1590*/ DADD R104, R40, -R104 ; /* 0x0000000028687229 */ /* 0x002e480000000868 */ /*15a0*/ DADD R96, R46, -R126 ; /* 0x000000002e607229 */ /* 0x001e08000000087e */ /*15b0*/ DADD R120, R44, -R120 ; /* 0x000000002c787229 */ /* 0x000e080000000878 */ /*15c0*/ DADD R126, R104, R94 ; /* 0x00000000687e7229 */ /* 0x0023e4000000005e */ /*15d0*/ IMAD.MOV.U32 R104, RZ, RZ, R52 ; /* 0x000000ffff687224 */ /* 0x002fe200078e0034 */ /*15e0*/ MOV R105, R53 ; /* 0x0000003500697202 */ /* 0x000fe20000000f00 */ /*15f0*/ DADD R122, R96, R102 ; /* 0x00000000607a7229 */ /* 0x001fe20000000066 */ /*1600*/ IMAD.MOV.U32 R94, RZ, RZ, R22 ; /* 0x000000ffff5e7224 */ /* 0x000fe400078e0016 */ /*1610*/ IMAD.MOV.U32 R95, RZ, RZ, R23 ; /* 0x000000ffff5f7224 */ /* 0x000fe200078e0017 */ /*1620*/ DMUL R102, R112, c[0x2][0x0] ; /* 0x0080000070667a28 */ /* 0x000e080000000000 */ /*1630*/ DADD R120, R120, R86 ; /* 0x0000000078787229 */ /* 0x0003e40000000056 */ /*1640*/ IMAD.MOV.U32 R86, RZ, RZ, R50 ; /* 0x000000ffff567224 */ /* 0x002fe200078e0032 */ /*1650*/ MOV R87, R51 ; /* 0x0000003300577202 */ /* 0x000fe20000000f00 */ /*1660*/ IMAD.MOV.U32 R50, RZ, RZ, R124 ; /* 0x000000ffff327224 */ /* 0x000fe200078e007c */ /*1670*/ MOV R51, R125 ; /* 0x0000007d00337202 */ /* 0x000fe20000000f00 */ /*1680*/ IMAD.MOV.U32 R97, RZ, RZ, R21 ; /* 0x000000ffff617224 */ /* 0x000fe200078e0015 */ /*1690*/ MOV R96, R20 ; /* 0x0000001400607202 */ /* 0x000fe20000000f00 */ /*16a0*/ DADD R136, R104, R104 ; /* 0x0000000068887229 */ /* 0x000e620000000068 */ /*16b0*/ IMAD.MOV.U32 R52, RZ, RZ, R118 ; /* 0x000000ffff347224 */ /* 0x000fe200078e0076 */ /*16c0*/ MOV R53, R119 ; /* 0x0000007700357202 */ /* 0x000fc40000000f00 */ /*16d0*/ DFMA R20, R94, c[0x2][0x8], -R102 ; /* 0x008002005e147a2b */ /* 0x0010220000000866 */ /*16e0*/ IMAD.MOV.U32 R22, RZ, RZ, R28 ; /* 0x000000ffff167224 */ /* 0x000fe200078e001c */ /*16f0*/ MOV R103, R43 ; /* 0x0000002b00677202 */ /* 0x001fe20000000f00 */ /*1700*/ IMAD.MOV.U32 R102, RZ, RZ, R42 ; /* 0x000000ffff667224 */ /* 0x000fe200078e002a */ /*1710*/ MOV R43, R117 ; /* 0x00000075002b7202 */ /* 0x000fe20000000f00 */ /*1720*/ IMAD.MOV.U32 R42, RZ, RZ, R116 ; /* 0x000000ffff2a7224 */ /* 0x000fe200078e0074 */ /*1730*/ MOV R23, R29 ; /* 0x0000001d00177202 */ /* 0x000fe20000000f00 */ /*1740*/ DMUL R116, R50, c[0x2][0x0] ; /* 0x0080000032747a28 */ /* 0x000e220000000000 */ /*1750*/ IMAD.MOV.U32 R28, RZ, RZ, R36 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e0024 */ /*1760*/ MOV R29, R37 ; /* 0x00000025001d7202 */ /* 0x000fe40000000f00 */ /*1770*/ DADD R136, R52, -R136 ; /* 0x0000000034887229 */ /* 0x002e480000000888 */ /*1780*/ DMUL R124, R20, R92 ; /* 0x0000005c147c7228 */ /* 0x0001c80000000000 */ /*1790*/ DFMA R118, R28, c[0x2][0x8], -R116 ; /* 0x008002001c767a2b */ /* 0x001e080000000874 */ /*17a0*/ DADD R112, -R112, R94 ; /* 0x0000000070707229 */ /* 0x000e08000000015e */ /*17b0*/ DADD R116, R136, R114 ; /* 0x0000000088747229 */ /* 0x002fc80000000072 */ /*17c0*/ DADD R114, R102, R102 ; /* 0x0000000066727229 */ /* 0x000e620000000066 */ /*17d0*/ IMAD.MOV.U32 R20, RZ, RZ, R26 ; /* 0x000000ffff147224 */ /* 0x000fe200078e001a */ /*17e0*/ MOV R21, R27 ; /* 0x0000001b00157202 */ /* 0x000fe40000000f00 */ /*17f0*/ DFMA R118, R42, R118, -R124 ; /* 0x000000762a76722b */ /* 0x001fe2000000087c */ /*1800*/ IMAD.MOV.U32 R26, RZ, RZ, R30 ; /* 0x000000ffff1a7224 */ /* 0x000fe200078e001e */ /*1810*/ MOV R27, R31 ; /* 0x0000001f001b7202 */ /* 0x000fe40000000f00 */ /*1820*/ DMUL R124, R112, c[0x2][0x0] ; /* 0x00800000707c7a28 */ /* 0x0000240000000000 */ /*1830*/ IMAD.MOV.U32 R112, RZ, RZ, R8 ; /* 0x000000ffff707224 */ /* 0x001fe200078e0008 */ /*1840*/ MOV R113, R9 ; /* 0x0000000900717202 */ /* 0x000fe20000000f00 */ /*1850*/ DMUL R134, R92, R96 ; /* 0x000000605c867228 */ /* 0x000e080000000000 */ /*1860*/ DADD R8, R42, -R114 ; /* 0x000000002a087229 */ /* 0x002e480000000872 */ /*1870*/ DFMA R136, R92, R112, R124 ; /* 0x000000705c88722b */ /* 0x000fc8000000007c */ /*1880*/ DFMA R134, R26, R42, -R134 ; /* 0x0000002a1a86722b */ /* 0x001e880000000886 */ /*1890*/ DADD R124, R8, R92 ; /* 0x00000000087c7229 */ /* 0x002fc8000000005c */ /*18a0*/ DADD R8, R28, -R50 ; /* 0x000000001c087229 */ /* 0x000e220000000832 */ /*18b0*/ IMAD.MOV.U32 R114, RZ, RZ, R4 ; /* 0x000000ffff727224 */ /* 0x000fe200078e0004 */ /*18c0*/ MOV R115, R5 ; /* 0x0000000500737202 */ /* 0x000fe40000000f00 */ /*18d0*/ DADD R4, R20, R20 ; /* 0x0000000014047229 */ /* 0x000fe20000000014 */ /*18e0*/ ISETP.GE.AND P0, PT, R110, c[0x0][0x170], PT ; /* 0x00005c006e007a0c */ /* 0x000fe40003f06270 */ /*18f0*/ ISETP.NE.AND P1, PT, R132, -0x4, PT ; /* 0xfffffffc8400780c */ /* 0x000fe20003f25270 */ /*1900*/ DFMA R128, -R134, c[0x3][0x38], R128 ; /* 0x00c00e0086807a2b */ /* 0x004fc80000000180 */ /*1910*/ DMUL R134, R8, c[0x2][0x0] ; /* 0x0080000008867a28 */ /* 0x0010640000000000 */ /*1920*/ IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff087224 */ /* 0x001fe200078e0006 */ /*1930*/ MOV R9, R7 ; /* 0x0000000700097202 */ /* 0x000fe20000000f00 */ /*1940*/ IMAD.MOV.U32 R6, RZ, RZ, R34 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0022 */ /*1950*/ MOV R7, R35 ; /* 0x0000002300077202 */ /* 0x000fcc0000000f00 */ /*1960*/ DFMA R134, R6, R42, R134 ; /* 0x0000002a0686722b */ /* 0x002e0c0000000086 */ /*1970*/ DADD R134, R134, -R136 ; /* 0x0000000086867229 */ /* 0x001ec80000000888 */ /*1980*/ DFMA R128, R130, c[0x3][0x1a0], R128 ; /* 0x00c0680082807a2b */ /* 0x000fc80000000080 */ /*1990*/ DMUL R130, R92, R114 ; /* 0x000000725c827228 */ /* 0x000fc80000000000 */ /*19a0*/ DFMA R100, -R134, c[0x3][0x38], R100 ; /* 0x00c00e0086647a2b */ /* 0x008e080000000164 */ /*19b0*/ DADD R92, R26, -R4 ; /* 0x000000001a5c7229 */ /* 0x0003e40000000804 */ /*19c0*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ; /* 0x000000ffff047224 */ /* 0x002fe200078e0002 */ /*19d0*/ MOV R5, R3 ; /* 0x0000000300057202 */ /* 0x000fe20000000f00 */ /*19e0*/ DFMA R90, -R118, c[0x3][0x38], R90 ; /* 0x00c00e00765a7a2b */ /* 0x010e62000000015a */ /*19f0*/ IMAD.MOV.U32 R2, RZ, RZ, R32 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0020 */ /*1a00*/ MOV R3, R33 ; /* 0x0000002100037202 */ /* 0x000fe40000000f00 */ /*1a10*/ DFMA R124, R124, c[0x3][0x198], R100 ; /* 0x00c066007c7c7a2b */ /* 0x001fc80000000064 */ /*1a20*/ DADD R100, R6, -R112 ; /* 0x0000000006647229 */ /* 0x000e080000000870 */ /*1a30*/ DFMA R122, R56, R122, R90 ; /* 0x0000007a387a722b */ /* 0x002e48000000005a */ /*1a40*/ DFMA R130, R2, R42, -R130 ; /* 0x0000002a0282722b */ /* 0x000f480000000882 */ /*1a50*/ DFMA R100, -R100, c[0x3][0x38], R88 ; /* 0x00c00e0064647a2b */ /* 0x0011e40000000158 */ /*1a60*/ IMAD.MOV.U32 R88, RZ, RZ, R24 ; /* 0x000000ffff587224 */ /* 0x001fe200078e0018 */ /*1a70*/ MOV R89, R25 ; /* 0x0000001900597202 */ /* 0x000fe20000000f00 */ /*1a80*/ DFMA R120, R120, c[0x3][0x1b0], R122 ; /* 0x00c06c0078787a2b */ /* 0x002e22000000007a */ /*1a90*/ IMAD.MOV.U32 R24, RZ, RZ, R54 ; /* 0x000000ffff187224 */ /* 0x000fe200078e0036 */ /*1aa0*/ MOV R25, R55 ; /* 0x0000003700197202 */ /* 0x000fe40000000f00 */ /*1ab0*/ DADD R92, R92, R96 ; /* 0x000000005c5c7229 */ /* 0x000e480000000060 */ /*1ac0*/ DFMA R98, -R130, c[0x3][0x38], R98 ; /* 0x00c00e0082627a2b */ /* 0x020ea20000000162 */ /*1ad0*/ IMAD.MOV.U32 R54, RZ, RZ, R48 ; /* 0x000000ffff367224 */ /* 0x000fe200078e0030 */ /*1ae0*/ MOV R55, R49 ; /* 0x0000003100377202 */ /* 0x000fe40000000f00 */ /*1af0*/ DFMA R120, R116, c[0x3][0x1b8], R120 ; /* 0x00c06e0074787a2b */ /* 0x001fc80000000078 */ /*1b00*/ DFMA R92, R92, c[0x3][0x1c8], R128 ; /* 0x00c072005c5c7a2b */ /* 0x002fc80000000080 */ /*1b10*/ DFMA R98, R126, c[0x3][0x1a0], R98 ; /* 0x00c068007e627a2b */ /* 0x004fc80000000062 */ /*1b20*/ DADD R116, R24, R24 ; /* 0x0000000018747229 */ /* 0x000e080000000018 */ /*1b30*/ DADD R128, R4, R4 ; /* 0x0000000004807229 */ /* 0x000e480000000004 */ /*1b40*/ DADD R126, R8, R8 ; /* 0x00000000087e7229 */ /* 0x000e880000000008 */ /*1b50*/ DADD R118, R22, R22 ; /* 0x0000000016767229 */ /* 0x000ec80000000016 */ /*1b60*/ DADD R116, R54, -R116 ; /* 0x0000000036747229 */ /* 0x001e080000000874 */ /*1b70*/ DADD R128, R2, -R128 ; /* 0x0000000002807229 */ /* 0x002e480000000880 */ /*1b80*/ DADD R126, R6, -R126 ; /* 0x00000000067e7229 */ /* 0x004e88000000087e */ /*1b90*/ DADD R118, R28, -R118 ; /* 0x000000001c767229 */ /* 0x008ec80000000876 */ /*1ba0*/ DADD R116, R116, R88 ; /* 0x0000000074747229 */ /* 0x001e080000000058 */ /*1bb0*/ DADD R128, R128, R114 ; /* 0x0000000080807229 */ /* 0x002e480000000072 */ /*1bc0*/ DADD R126, R126, R112 ; /* 0x000000007e7e7229 */ /* 0x004e880000000070 */ /*1bd0*/ DADD R118, R118, R94 ; /* 0x0000000076767229 */ /* 0x008ec8000000005e */ /*1be0*/ DFMA R100, R116, c[0x3][0x1c0], R100 ; /* 0x00c0700074647a2b */ /* 0x0011080000000064 */ /*1bf0*/ DFMA R98, R128, c[0x3][0x1d0], R98 ; /* 0x00c0740080627a2b */ /* 0x0020480000000062 */ /*1c00*/ DFMA R90, R126, c[0x3][0x1d8], R124 ; /* 0x00c076007e5a7a2b */ /* 0x004088000000007c */ /*1c10*/ DFMA R116, R118, c[0x3][0x1e0], R120 ; /* 0x00c0780076747a2b */ /* 0x0080e20000000078 */ /*1c20*/ @P0 BRA 0x1e30 ; /* 0x0000020000000947 */ /* 0x000fea0003800000 */ /*1c30*/ I2F.F64 R36, R110 ; /* 0x0000006e00247312 */ /* 0x016e620000201c00 */ /*1c40*/ IMAD.MOV.U32 R30, RZ, RZ, c[0x3][0x3c8] ; /* 0x00c0f200ff1e7624 */ /* 0x000fe200078e00ff */ /*1c50*/ MOV R31, c[0x3][0x3cc] ; /* 0x00c0f300001f7a02 */ /* 0x000fe20000000f00 */ /*1c60*/ IMAD.MOV.U32 R32, RZ, RZ, c[0x3][0x3d0] ; /* 0x00c0f400ff207624 */ /* 0x000fe200078e00ff */ /*1c70*/ MOV R33, c[0x3][0x3d4] ; /* 0x00c0f50000217a02 */ /* 0x000fe20000000f00 */ /*1c80*/ IMAD.MOV.U32 R34, RZ, RZ, c[0x3][0x3d8] ; /* 0x00c0f600ff227624 */ /* 0x000fe200078e00ff */ /*1c90*/ MOV R35, c[0x3][0x3dc] ; /* 0x00c0f70000237a02 */ /* 0x000fe20000000f00 */ /*1ca0*/ IMAD.MOV.U32 R48, RZ, RZ, c[0x3][0x3e0] ; /* 0x00c0f800ff307624 */ /* 0x000fe200078e00ff */ /*1cb0*/ MOV R49, c[0x3][0x3e4] ; /* 0x00c0f90000317a02 */ /* 0x000fe20000000f00 */ /*1cc0*/ IMAD.MOV.U32 R118, RZ, RZ, c[0x3][0x3e8] ; /* 0x00c0fa00ff767624 */ /* 0x001fe200078e00ff */ /*1cd0*/ MOV R119, c[0x3][0x3ec] ; /* 0x00c0fb0000777a02 */ /* 0x000fe20000000f00 */ /*1ce0*/ DMUL R36, R36, c[0x3][0x70] ; /* 0x00c01c0024247a28 */ /* 0x002e0c0000000000 */ /*1cf0*/ DFMA R30, R36, R30, c[0x3][0x350] ; /* 0x00c0d400241e762b */ /* 0x001e08000000001e */ /*1d00*/ DFMA R32, R36, R32, c[0x3][0x358] ; /* 0x00c0d6002420762b */ /* 0x000e480000000020 */ /*1d10*/ DFMA R34, R36, R34, c[0x3][0x360] ; /* 0x00c0d8002422762b */ /* 0x000e880000000022 */ /*1d20*/ DFMA R48, R36, R48, c[0x3][0x368] ; /* 0x00c0da002430762b */ /* 0x000f080000000030 */ /*1d30*/ DFMA R118, R36, R118, c[0x3][0x370] ; /* 0x00c0dc002476762b */ /* 0x000f480000000076 */ /*1d40*/ DFMA R30, R36, R30, c[0x3][0x2d8] ; /* 0x00c0b600241e762b */ /* 0x001e08000000001e */ /*1d50*/ DFMA R32, R36, R32, c[0x3][0x2e0] ; /* 0x00c0b8002420762b */ /* 0x002e480000000020 */ /*1d60*/ DFMA R34, R36, R34, c[0x3][0x2e8] ; /* 0x00c0ba002422762b */ /* 0x004e880000000022 */ /*1d70*/ DFMA R48, R36, R48, c[0x3][0x2f0] ; /* 0x00c0bc002430762b */ /* 0x010f080000000030 */ /*1d80*/ DFMA R120, R36, R118, c[0x3][0x2f8] ; /* 0x00c0be002478762b */ /* 0x020f480000000076 */ /*1d90*/ DFMA R30, R36, R30, c[0x3][0x260] ; /* 0x00c09800241e762b */ /* 0x001e08000000001e */ /*1da0*/ DFMA R32, R36, R32, c[0x3][0x268] ; /* 0x00c09a002420762b */ /* 0x002e480000000020 */ /*1db0*/ DFMA R34, R36, R34, c[0x3][0x270] ; /* 0x00c09c002422762b */ /* 0x004e880000000022 */ /*1dc0*/ DFMA R118, R36, R48, c[0x3][0x278] ; /* 0x00c09e002476762b */ /* 0x010f080000000030 */ /*1dd0*/ DFMA R120, R36, R120, c[0x3][0x280] ; /* 0x00c0a0002478762b */ /* 0x020f480000000078 */ /*1de0*/ DFMA R48, R36, R30, R10 ; /* 0x0000001e2430722b */ /* 0x0010c8000000000a */ /*1df0*/ DFMA R30, R36, R32, R12 ; /* 0x00000020241e722b */ /* 0x002048000000000c */ /*1e00*/ DFMA R32, R36, R34, R14 ; /* 0x000000222420722b */ /* 0x004088000000000e */ /*1e10*/ DFMA R34, R36, R118, R16 ; /* 0x000000762422722b */ /* 0x0101080000000010 */ /*1e20*/ DFMA R36, R36, R120, R18 ; /* 0x000000782424722b */ /* 0x02000c0000000012 */ /*1e30*/ @!P1 BRA 0x2490 ; /* 0x0000065000009947 */ /* 0x01efea0003800000 */ /*1e40*/ ISETP.NE.AND P0, PT, R132, -0x5, PT ; /* 0xfffffffb8400780c */ /* 0x000fda0003f05270 */ /*1e50*/ @!P0 BRA 0x22f0 ; /* 0x0000049000008947 */ /* 0x000fea0003800000 */ /*1e60*/ ULDC UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */ /* 0x000fe20000000800 */ /*1e70*/ IADD3 R118, R110, -0x2, RZ ; /* 0xfffffffe6e767810 */ /* 0x001fe20007ffe0ff */ /*1e80*/ UIADD3 UR4, UR4, -0x3, URZ ; /* 0xfffffffd04047890 */ /* 0x000fc6000fffe03f */ /*1e90*/ ISETP.GT.U32.AND P1, PT, R118, 0x2, PT ; /* 0x000000027600780c */ /* 0x000fc60003f24070 */ /*1ea0*/ ISETP.GE.AND P0, PT, R118, UR4, PT ; /* 0x0000000476007c0c */ /* 0x000fda000bf06270 */ /*1eb0*/ @!P0 BRA P1, 0x2150 ; /* 0x0000029000008947 */ /* 0x000fea0000800000 */ /*1ec0*/ ISETP.NE.AND P0, PT, R111, -0x4, PT ; /* 0xfffffffc6f00780c */ /* 0x000fda0003f05270 */ /*1ed0*/ @!P0 BRA 0x2000 ; /* 0x0000012000008947 */ /* 0x000fea0003800000 */ /*1ee0*/ ISETP.NE.AND P0, PT, R111, -0x3, PT ; /* 0xfffffffd6f00780c */ /* 0x000fda0003f05270 */ /*1ef0*/ @P0 BRA 0x25d0 ; /* 0x000006d000000947 */ /* 0x000fea0003800000 */ /*1f00*/ DFMA R80, R88, -4, R80 ; /* 0xc01000005850782b */ /* 0x000e080000000050 */ /*1f10*/ DFMA R82, R96, -4, R82 ; /* 0xc01000006052782b */ /* 0x000e480000000052 */ /*1f20*/ DFMA R84, R114, -4, R84 ; /* 0xc01000007254782b */ /* 0x000e880000000054 */ /*1f30*/ DFMA R76, R112, -4, R76 ; /* 0xc0100000704c782b */ /* 0x000ec8000000004c */ /*1f40*/ DFMA R78, R94, -4, R78 ; /* 0xc01000005e4e782b */ /* 0x000f08000000004e */ /*1f50*/ DFMA R80, R24, 5, R80 ; /* 0x401400001850782b */ /* 0x001e080000000050 */ /*1f60*/ DFMA R82, R20, 5, R82 ; /* 0x401400001452782b */ /* 0x002e480000000052 */ /*1f70*/ DFMA R84, R4, 5, R84 ; /* 0x401400000454782b */ /* 0x004e880000000054 */ /*1f80*/ DFMA R76, R8, 5, R76 ; /* 0x40140000084c782b */ /* 0x008ec8000000004c */ /*1f90*/ DFMA R78, R22, 5, R78 ; /* 0x40140000164e782b */ /* 0x010f08000000004e */ /*1fa0*/ DFMA R100, R80, -0.25, R100 ; /* 0xbfd000005064782b */ /* 0x0010080000000064 */ /*1fb0*/ DFMA R92, R82, -0.25, R92 ; /* 0xbfd00000525c782b */ /* 0x002208000000005c */ /*1fc0*/ DFMA R98, R84, -0.25, R98 ; /* 0xbfd000005462782b */ /* 0x0042880000000062 */ /*1fd0*/ DFMA R90, R76, -0.25, R90 ; /* 0xbfd000004c5a782b */ /* 0x0082c8000000005a */ /*1fe0*/ DFMA R116, R78, -0.25, R116 ; /* 0xbfd000004e74782b */ /* 0x0103220000000074 */ /*1ff0*/ BRA 0x25d0 ; /* 0x000005d000007947 */ /* 0x000fea0003800000 */ /*2000*/ DFMA R80, R88, -4, R80 ; /* 0xc01000005850782b */ /* 0x000e080000000050 */ /*2010*/ DFMA R82, R96, -4, R82 ; /* 0xc01000006052782b */ /* 0x000e480000000052 */ /*2020*/ DFMA R80, R24, 6, R80 ; /* 0x401800001850782b */ /* 0x001e080000000050 */ /*2030*/ DFMA R82, R20, 6, R82 ; /* 0x401800001452782b */ /* 0x002e480000000052 */ /*2040*/ DFMA R80, R54, -4, R80 ; /* 0xc01000003650782b */ /* 0x001e080000000050 */ /*2050*/ DFMA R82, R26, -4, R82 ; /* 0xc01000001a52782b */ /* 0x002e480000000052 */ /*2060*/ DFMA R100, R80, -0.25, R100 ; /* 0xbfd000005064782b */ /* 0x001fc80000000064 */ /*2070*/ DFMA R92, R82, -0.25, R92 ; /* 0xbfd00000525c782b */ /* 0x002fc8000000005c */ /*2080*/ DFMA R80, R112, -4, R76 ; /* 0xc01000007050782b */ /* 0x000e08000000004c */ /*2090*/ DFMA R84, R114, -4, R84 ; /* 0xc01000007254782b */ /* 0x000e480000000054 */ /*20a0*/ DFMA R82, R94, -4, R78 ; /* 0xc01000005e52782b */ /* 0x000e88000000004e */ /*20b0*/ DFMA R78, R8, 6, R80 ; /* 0x40180000084e782b */ /* 0x001fc80000000050 */ /*20c0*/ DFMA R76, R4, 6, R84 ; /* 0x40180000044c782b */ /* 0x002e080000000054 */ /*20d0*/ DFMA R80, R22, 6, R82 ; /* 0x401800001650782b */ /* 0x004e480000000052 */ /*20e0*/ DFMA R76, R2, -4, R76 ; /* 0xc0100000024c782b */ /* 0x001e08000000004c */ /*20f0*/ DFMA R78, R6, -4, R78 ; /* 0xc0100000064e782b */ /* 0x000e88000000004e */ /*2100*/ DFMA R80, R28, -4, R80 ; /* 0xc01000001c50782b */ /* 0x002e480000000050 */ /*2110*/ DFMA R98, R76, -0.25, R98 ; /* 0xbfd000004c62782b */ /* 0x0010c80000000062 */ /*2120*/ DFMA R90, R78, -0.25, R90 ; /* 0xbfd000004e5a782b */ /* 0x004088000000005a */ /*2130*/ DFMA R116, R80, -0.25, R116 ; /* 0xbfd000005074782b */ /* 0x0020620000000074 */ /*2140*/ BRA 0x25d0 ; /* 0x0000048000007947 */ /* 0x000fea0003800000 */ /*2150*/ DFMA R80, R88, -4, R80 ; /* 0xc01000005850782b */ /* 0x000e080000000050 */ /*2160*/ DFMA R82, R96, -4, R82 ; /* 0xc01000006052782b */ /* 0x000fc80000000052 */ /*2170*/ DFMA R80, R24, 6, R80 ; /* 0x401800001850782b */ /* 0x001e080000000050 */ /*2180*/ DFMA R84, R114, -4, R84 ; /* 0xc01000007254782b */ /* 0x000fc80000000054 */ /*2190*/ DFMA R80, R54, -4, R80 ; /* 0xc01000003650782b */ /* 0x001e080000000050 */ /*21a0*/ DFMA R76, R112, -4, R76 ; /* 0xc0100000704c782b */ /* 0x000fc8000000004c */ /*21b0*/ DADD R80, R48, R80 ; /* 0x0000000030507229 */ /* 0x001e080000000050 */ /*21c0*/ DFMA R82, R20, 6, R82 ; /* 0x401800001452782b */ /* 0x000fc80000000052 */ /*21d0*/ DFMA R100, R80, -0.25, R100 ; /* 0xbfd000005064782b */ /* 0x001fc80000000064 */ /*21e0*/ DFMA R80, R94, -4, R78 ; /* 0xc01000005e50782b */ /* 0x000e08000000004e */ /*21f0*/ DFMA R84, R4, 6, R84 ; /* 0x401800000454782b */ /* 0x000e480000000054 */ /*2200*/ DFMA R78, R8, 6, R76 ; /* 0x40180000084e782b */ /* 0x000e88000000004c */ /*2210*/ DFMA R80, R22, 6, R80 ; /* 0x401800001650782b */ /* 0x001e080000000050 */ /*2220*/ DFMA R82, R26, -4, R82 ; /* 0xc01000001a52782b */ /* 0x000ec80000000052 */ /*2230*/ DFMA R76, R2, -4, R84 ; /* 0xc0100000024c782b */ /* 0x002e480000000054 */ /*2240*/ DFMA R78, R6, -4, R78 ; /* 0xc0100000064e782b */ /* 0x004e88000000004e */ /*2250*/ DFMA R80, R28, -4, R80 ; /* 0xc01000001c50782b */ /* 0x001e080000000050 */ /*2260*/ DADD R82, R30, R82 ; /* 0x000000001e527229 */ /* 0x008ec80000000052 */ /*2270*/ DADD R76, R32, R76 ; /* 0x00000000204c7229 */ /* 0x002e48000000004c */ /*2280*/ DADD R78, R34, R78 ; /* 0x00000000224e7229 */ /* 0x004e88000000004e */ /*2290*/ DADD R80, R36, R80 ; /* 0x0000000024507229 */ /* 0x001e080000000050 */ /*22a0*/ DFMA R92, R82, -0.25, R92 ; /* 0xbfd00000525c782b */ /* 0x008708000000005c */ /*22b0*/ DFMA R98, R76, -0.25, R98 ; /* 0xbfd000004c62782b */ /* 0x0026480000000062 */ /*22c0*/ DFMA R90, R78, -0.25, R90 ; /* 0xbfd000004e5a782b */ /* 0x004688000000005a */ /*22d0*/ DFMA R116, R80, -0.25, R116 ; /* 0xbfd000005074782b */ /* 0x0016220000000074 */ /*22e0*/ BRA 0x25d0 ; /* 0x000002e000007947 */ /* 0x000fea0003800000 */ /*22f0*/ DMUL R76, R88, 4 ; /* 0x40100000584c7828 */ /* 0x000e480000000000 */ /*2300*/ DMUL R78, R96, 4 ; /* 0x40100000604e7828 */ /* 0x000e880000000000 */ /*2310*/ DFMA R76, R24, 6, -R76 ; /* 0x40180000184c782b */ /* 0x002e48000000084c */ /*2320*/ DFMA R78, R20, 6, -R78 ; /* 0x40180000144e782b */ /* 0x004e88000000084e */ /*2330*/ DFMA R76, R54, -4, R76 ; /* 0xc0100000364c782b */ /* 0x002e48000000004c */ /*2340*/ DFMA R78, R26, -4, R78 ; /* 0xc01000001a4e782b */ /* 0x004e88000000004e */ /*2350*/ DADD R76, R48, R76 ; /* 0x00000000304c7229 */ /* 0x002e48000000004c */ /*2360*/ DADD R78, R30, R78 ; /* 0x000000001e4e7229 */ /* 0x004e88000000004e */ /*2370*/ DFMA R100, R76, -0.25, R100 ; /* 0xbfd000004c64782b */ /* 0x002fc80000000064 */ /*2380*/ DFMA R92, R78, -0.25, R92 ; /* 0xbfd000004e5c782b */ /* 0x004fc8000000005c */ /*2390*/ DMUL R80, R114, 4 ; /* 0x4010000072507828 */ /* 0x000e480000000000 */ /*23a0*/ DMUL R76, R112, 4 ; /* 0x40100000704c7828 */ /* 0x000e880000000000 */ /*23b0*/ DMUL R78, R94, 4 ; /* 0x401000005e4e7828 */ /* 0x000ec80000000000 */ /*23c0*/ DFMA R80, R4, 6, -R80 ; /* 0x401800000450782b */ /* 0x002e480000000850 */ /*23d0*/ DFMA R76, R8, 6, -R76 ; /* 0x40180000084c782b */ /* 0x004e88000000084c */ /*23e0*/ DFMA R78, R22, 6, -R78 ; /* 0x40180000164e782b */ /* 0x008ec8000000084e */ /*23f0*/ DFMA R80, R2, -4, R80 ; /* 0xc01000000250782b */ /* 0x002e480000000050 */ /*2400*/ DFMA R76, R6, -4, R76 ; /* 0xc0100000064c782b */ /* 0x004e88000000004c */ /*2410*/ DFMA R78, R28, -4, R78 ; /* 0xc01000001c4e782b */ /* 0x008ec8000000004e */ /*2420*/ DADD R80, R32, R80 ; /* 0x0000000020507229 */ /* 0x002e480000000050 */ /*2430*/ DADD R76, R34, R76 ; /* 0x00000000224c7229 */ /* 0x004e88000000004c */ /*2440*/ DADD R78, R36, R78 ; /* 0x00000000244e7229 */ /* 0x009e08000000004e */ /*2450*/ DFMA R98, R80, -0.25, R98 ; /* 0xbfd000005062782b */ /* 0x0022c80000000062 */ /*2460*/ DFMA R90, R76, -0.25, R90 ; /* 0xbfd000004c5a782b */ /* 0x004288000000005a */ /*2470*/ DFMA R116, R78, -0.25, R116 ; /* 0xbfd000004e74782b */ /* 0x0012220000000074 */ /*2480*/ BRA 0x25d0 ; /* 0x0000014000007947 */ /* 0x000fea0003800000 */ /*2490*/ DMUL R76, R54, 4 ; /* 0x40100000364c7828 */ /* 0x000e480000000000 */ /*24a0*/ DMUL R78, R26, 4 ; /* 0x401000001a4e7828 */ /* 0x000e880000000000 */ /*24b0*/ DFMA R76, R24, 5, -R76 ; /* 0x40140000184c782b */ /* 0x002e48000000084c */ /*24c0*/ DFMA R78, R20, 5, -R78 ; /* 0x40140000144e782b */ /* 0x004e88000000084e */ /*24d0*/ DADD R76, R48, R76 ; /* 0x00000000304c7229 */ /* 0x002e48000000004c */ /*24e0*/ DADD R78, R30, R78 ; /* 0x000000001e4e7229 */ /* 0x004e88000000004e */ /*24f0*/ DFMA R100, R76, -0.25, R100 ; /* 0xbfd000004c64782b */ /* 0x002fc80000000064 */ /*2500*/ DFMA R92, R78, -0.25, R92 ; /* 0xbfd000004e5c782b */ /* 0x004fc8000000005c */ /*2510*/ DMUL R80, R2, 4 ; /* 0x4010000002507828 */ /* 0x000e480000000000 */ /*2520*/ DMUL R76, R6, 4 ; /* 0x40100000064c7828 */ /* 0x000e880000000000 */ /*2530*/ DMUL R78, R28, 4 ; /* 0x401000001c4e7828 */ /* 0x000ec80000000000 */ /*2540*/ DFMA R80, R4, 5, -R80 ; /* 0x401400000450782b */ /* 0x002e480000000850 */ /*2550*/ DFMA R76, R8, 5, -R76 ; /* 0x40140000084c782b */ /* 0x004e88000000084c */ /*2560*/ DFMA R78, R22, 5, -R78 ; /* 0x40140000164e782b */ /* 0x008ec8000000084e */ /*2570*/ DADD R80, R32, R80 ; /* 0x0000000020507229 */ /* 0x002e480000000050 */ /*2580*/ DADD R76, R34, R76 ; /* 0x00000000224c7229 */ /* 0x004e88000000004c */ /*2590*/ DADD R78, R36, R78 ; /* 0x00000000244e7229 */ /* 0x009e08000000004e */ /*25a0*/ DFMA R98, R80, -0.25, R98 ; /* 0xbfd000005062782b */ /* 0x0022c80000000062 */ /*25b0*/ DFMA R90, R76, -0.25, R90 ; /* 0xbfd000004c5a782b */ /* 0x004288000000005a */ /*25c0*/ DFMA R116, R78, -0.25, R116 ; /* 0xbfd000004e74782b */ /* 0x0012080000000074 */ /*25d0*/ DADD R100, -RZ, -R100 ; /* 0x00000000ff647229 */ /* 0x01fe220000000964 */ /*25e0*/ ULDC UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */ /* 0x000fe20000000800 */ /*25f0*/ IADD3 R78, R110, -0x2, RZ ; /* 0xfffffffe6e4e7810 */ /* 0x000fe20007ffe0ff */ /*2600*/ UIADD3 UR4, UR4, -0x2, URZ ; /* 0xfffffffe04047890 */ /* 0x000fe2000fffe03f */ /*2610*/ DADD R92, -RZ, -R92 ; /* 0x00000000ff5c7229 */ /* 0x000e62000000095c */ /*2620*/ IMAD.MOV.U32 R118, RZ, RZ, R52 ; /* 0x000000ffff767224 */ /* 0x000fe200078e0034 */ /*2630*/ MOV R119, R53 ; /* 0x0000003500777202 */ /* 0x000fe20000000f00 */ /*2640*/ STG.E.64 [R66.64], R100 ; /* 0x0000006442007986 */ /* 0x0011e2000c101b06 */ /*2650*/ DADD R98, -RZ, -R98 ; /* 0x00000000ff627229 */ /* 0x000ea20000000962 */ /*2660*/ ISETP.GE.AND P0, PT, R78, UR4, PT ; /* 0x000000044e007c0c */ /* 0x000fe2000bf06270 */ /*2670*/ IMAD.MOV.U32 R120, RZ, RZ, R40 ; /* 0x000000ffff787224 */ /* 0x000fe200078e0028 */ /*2680*/ STG.E.64 [R58.64], R92 ; /* 0x0000005c3a007986 */ /* 0x0021e2000c101b06 */ /*2690*/ DADD R90, -RZ, -R90 ; /* 0x00000000ff5a7229 */ /* 0x000e62000000095a */ /*26a0*/ MOV R121, R41 ; /* 0x0000002900797202 */ /* 0x000fe20000000f00 */ /*26b0*/ IMAD.MOV.U32 R126, RZ, RZ, R38 ; /* 0x000000ffff7e7224 */ /* 0x000fe200078e0026 */ /*26c0*/ STG.E.64 [R60.64], R98 ; /* 0x000000623c007986 */ /* 0x0041e2000c101b06 */ /*26d0*/ DADD R76, -RZ, -R116 ; /* 0x00000000ff4c7229 */ /* 0x0004e20000000974 */ /*26e0*/ MOV R127, R39 ; /* 0x00000027007f7202 */ /* 0x000fe20000000f00 */ /*26f0*/ IMAD.MOV.U32 R116, RZ, RZ, R42 ; /* 0x000000ffff747224 */ /* 0x004fe200078e002a */ /*2700*/ STG.E.64 [R62.64], R90 ; /* 0x0000005a3e007986 */ /* 0x0021e2000c101b06 */ /*2710*/ MOV R117, R43 ; /* 0x0000002b00757202 */ /* 0x000fe20000000f00 */ /*2720*/ IMAD.MOV.U32 R130, RZ, RZ, R46 ; /* 0x000000ffff827224 */ /* 0x000fe200078e002e */ /*2730*/ MOV R131, R47 ; /* 0x0000002f00837202 */ /* 0x000fe20000000f00 */ /*2740*/ STG.E.64 [R64.64], R76 ; /* 0x0000004c40007986 */ /* 0x0081e2000c101b06 */ /*2750*/ IMAD.MOV.U32 R122, RZ, RZ, R44 ; /* 0x000000ffff7a7224 */ /* 0x000fe200078e002c */ /*2760*/ MOV R123, R45 ; /* 0x0000002d007b7202 */ /* 0x000fe20000000f00 */ /*2770*/ IMAD.MOV.U32 R124, RZ, RZ, R50 ; /* 0x000000ffff7c7224 */ /* 0x000fe200078e0032 */ /*2780*/ MOV R125, R51 ; /* 0x00000033007d7202 */ /* 0x000fe20000000f00 */ /*2790*/ @P0 BRA 0x2960 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*27a0*/ MUFU.RCP64H R59, R49 ; /* 0x00000031003b7308 */ /* 0x001e220000001800 */ /*27b0*/ IADD3 R58, R49, 0x300402, RZ ; /* 0x00300402313a7810 */ /* 0x000fe20007ffe0ff */ /*27c0*/ BSSY B0, 0x28b0 ; /* 0x000000e000007945 */ /* 0x000fe60003800000 */ /*27d0*/ FSETP.GEU.AND P0, PT, |R58|, 5.8789094863358348022e-39, PT ; /* 0x004004023a00780b */ /* 0x000fc40003f0e200 */ /*27e0*/ DFMA R60, -R48, R58, 1 ; /* 0x3ff00000303c742b */ /* 0x001e0c000000013a */ /*27f0*/ DFMA R60, R60, R60, R60 ; /* 0x0000003c3c3c722b */ /* 0x001e0c000000003c */ /*2800*/ DFMA R60, R58, R60, R58 ; /* 0x0000003c3a3c722b */ /* 0x001e0c000000003a */ /*2810*/ DFMA R62, -R48, R60, 1 ; /* 0x3ff00000303e742b */ /* 0x001e0c000000013c */ /*2820*/ DFMA R60, R60, R62, R60 ; /* 0x0000003e3c3c722b */ /* 0x001062000000003c */ /*2830*/ @P0 BRA 0x28a0 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*2840*/ LOP3.LUT R58, R49, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff313a7812 */ /* 0x000fe200078ec0ff */ /*2850*/ IMAD.MOV.U32 R66, RZ, RZ, R48 ; /* 0x000000ffff427224 */ /* 0x000fe200078e0030 */ /*2860*/ MOV R67, R49 ; /* 0x0000003100437202 */ /* 0x000fe40000000f00 */ /*2870*/ IADD3 R63, R58, -0x100000, RZ ; /* 0xfff000003a3f7810 */ /* 0x001fe40007ffe0ff */ /*2880*/ MOV R76, 0x28a0 ; /* 0x000028a0004c7802 */ /* 0x000fe40000000f00 */ /*2890*/ CALL.REL.NOINC 0x2be0 ; /* 0x0000034000007944 */ /* 0x002fea0003c00000 */ /*28a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*28b0*/ DMUL R120, R32, R60 ; /* 0x0000003c20787228 */ /* 0x002e480000000000 */ /*28c0*/ DMUL R126, R30, R60 ; /* 0x0000003c1e7e7228 */ /* 0x000fc80000000000 */ /*28d0*/ DMUL R116, R34, R60 ; /* 0x0000003c22747228 */ /* 0x000e880000000000 */ /*28e0*/ DMUL R58, R32, R120 ; /* 0x00000078203a7228 */ /* 0x002e480000000000 */ /*28f0*/ DMUL R122, R116, R116 ; /* 0x00000074747a7228 */ /* 0x004e880000000000 */ /*2900*/ DFMA R58, R30, R126, R58 ; /* 0x0000007e1e3a722b */ /* 0x002e48000000003a */ /*2910*/ DFMA R130, R126, R126, R122 ; /* 0x0000007e7e82722b */ /* 0x004e88000000007a */ /*2920*/ DFMA R58, R34, R116, R58 ; /* 0x00000074223a722b */ /* 0x002e48000000003a */ /*2930*/ DMUL R118, R36, R60 ; /* 0x0000003c24767228 */ /* 0x0007080000000000 */ /*2940*/ DFMA R130, R120, R120, R130 ; /* 0x000000787882722b */ /* 0x0046880000000082 */ /*2950*/ DMUL R124, R58, 0.5 ; /* 0x3fe000003a7c7828 */ /* 0x0026480000000000 */ /*2960*/ ULDC UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */ /* 0x014fe20000000800 */ /*2970*/ IADD3 R58, R110, -0x1, RZ ; /* 0xffffffff6e3a7810 */ /* 0x009fe20007ffe0ff */ /*2980*/ UIADD3 UR4, UR4, -0x1, URZ ; /* 0xffffffff04047890 */ /* 0x000fe2000fffe03f */ /*2990*/ IMAD.MOV.U32 R59, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff3b7624 */ /* 0x000fe200078e00ff */ /*29a0*/ MOV R76, R112 ; /* 0x00000070004c7202 */ /* 0x000fe20000000f00 */ /*29b0*/ IMAD.MOV.U32 R77, RZ, RZ, R113 ; /* 0x000000ffff4d7224 */ /* 0x000fe200078e0071 */ /*29c0*/ MOV R78, R94 ; /* 0x0000005e004e7202 */ /* 0x000fe20000000f00 */ /*29d0*/ IMAD.MOV.U32 R79, RZ, RZ, R95 ; /* 0x000000ffff4f7224 */ /* 0x000fe200078e005f */ /*29e0*/ ISETP.GE.AND P0, PT, R58, UR4, PT ; /* 0x000000043a007c0c */ /* 0x000fe2000bf06270 */ /*29f0*/ IMAD.MOV.U32 R85, RZ, RZ, R115 ; /* 0x000000ffff557224 */ /* 0x000fe200078e0073 */ /*2a00*/ MOV R84, R114 ; /* 0x0000007200547202 */ /* 0x000fe20000000f00 */ /*2a10*/ IMAD.MOV.U32 R83, RZ, RZ, R97 ; /* 0x000000ffff537224 */ /* 0x000fe200078e0061 */ /*2a20*/ MOV R82, R96 ; /* 0x0000006000527202 */ /* 0x000fe20000000f00 */ /*2a30*/ IMAD.MOV.U32 R93, RZ, RZ, R103 ; /* 0x000000ffff5d7224 */ /* 0x000fe200078e0067 */ /*2a40*/ MOV R92, R102 ; /* 0x00000066005c7202 */ /* 0x000fe20000000f00 */ /*2a50*/ IMAD.MOV.U32 R113, RZ, RZ, R87 ; /* 0x000000ffff717224 */ /* 0x000fe200078e0057 */ /*2a60*/ MOV R112, R86 ; /* 0x0000005600707202 */ /* 0x000fe20000000f00 */ /*2a70*/ IMAD R109, R59.reuse, c[0x0][0x168], R109 ; /* 0x00005a003b6d7a24 */ /* 0x040fe200078e026d */ /*2a80*/ IADD3 R132, R132, -0x1, RZ ; /* 0xffffffff84847810 */ /* 0x000fe20007ffe0ff */ /*2a90*/ IMAD R108, R59, c[0x0][0x168], R108 ; /* 0x00005a003b6c7a24 */ /* 0x000fe200078e026c */ /*2aa0*/ IADD3 R111, R111, 0x1, RZ ; /* 0x000000016f6f7810 */ /* 0x000fe20007ffe0ff */ /*2ab0*/ IMAD R107, R59.reuse, c[0x0][0x168], R107 ; /* 0x00005a003b6b7a24 */ /* 0x040fe200078e026b */ /*2ac0*/ MOV R80, R88 ; /* 0x0000005800507202 */ /* 0x000fe20000000f00 */ /*2ad0*/ IMAD R106, R59.reuse, c[0x0][0x168], R106 ; /* 0x00005a003b6a7a24 */ /* 0x040fe200078e026a */ /*2ae0*/ MOV R114, R104 ; /* 0x0000006800727202 */ /* 0x000fe20000000f00 */ /*2af0*/ IMAD R0, R59, c[0x0][0x168], R0 ; /* 0x00005a003b007a24 */ /* 0x000fe200078e0200 */ /*2b00*/ MOV R94, R70 ; /* 0x00000046005e7202 */ /* 0x000fe20000000f00 */ /*2b10*/ IMAD.MOV.U32 R81, RZ, RZ, R89 ; /* 0x000000ffff517224 */ /* 0x000fe200078e0059 */ /*2b20*/ MOV R96, R68 ; /* 0x0000004400607202 */ /* 0x000fe20000000f00 */ /*2b30*/ IMAD.MOV.U32 R115, RZ, RZ, R105 ; /* 0x000000ffff737224 */ /* 0x000fe200078e0069 */ /*2b40*/ IADD3 R110, R110, 0x1, RZ ; /* 0x000000016e6e7810 */ /* 0x000fe20007ffe0ff */ /*2b50*/ IMAD.MOV.U32 R95, RZ, RZ, R71 ; /* 0x000000ffff5f7224 */ /* 0x000fe200078e0047 */ /*2b60*/ MOV R102, R72 ; /* 0x0000004800667202 */ /* 0x000fe20000000f00 */ /*2b70*/ IMAD.MOV.U32 R97, RZ, RZ, R69 ; /* 0x000000ffff617224 */ /* 0x000fe200078e0045 */ /*2b80*/ MOV R86, R74 ; /* 0x0000004a00567202 */ /* 0x000fe20000000f00 */ /*2b90*/ IMAD.MOV.U32 R103, RZ, RZ, R73 ; /* 0x000000ffff677224 */ /* 0x000fc400078e0049 */ /*2ba0*/ IMAD.MOV.U32 R87, RZ, RZ, R75 ; /* 0x000000ffff577224 */ /* 0x000fe200078e004b */ /*2bb0*/ @P0 CALL.REL.NOINC 0x2bd0 ; /* 0x0000001000000944 */ /* 0x000fe20003c00000 */ /*2bc0*/ BRA 0x1380 ; /* 0xffffe7b000007947 */ /* 0x000fea000383ffff */ /*2bd0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*2be0*/ DSETP.GTU.AND P0, PT, |R66|, +INF , PT ; /* 0x7ff000004200742a */ /* 0x000e220003f0c200 */ /*2bf0*/ BSSY B1, 0x2e40 ; /* 0x0000024000017945 */ /* 0x000fda0003800000 */ /*2c00*/ @P0 BRA 0x2e10 ; /* 0x0000020000000947 */ /* 0x001fea0003800000 */ /*2c10*/ LOP3.LUT R60, R67, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff433c7812 */ /* 0x000fc800078ec0ff */ /*2c20*/ IADD3 R58, R60, -0x1, RZ ; /* 0xffffffff3c3a7810 */ /* 0x000fc80007ffe0ff */ /*2c30*/ ISETP.GE.U32.AND P0, PT, R58, 0x7fefffff, PT ; /* 0x7fefffff3a00780c */ /* 0x000fda0003f06070 */ /*2c40*/ @P0 LOP3.LUT R59, R67, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff00000433b0812 */ /* 0x000fe400078e3cff */ /*2c50*/ @P0 MOV R58, RZ ; /* 0x000000ff003a0202 */ /* 0x000fe20000000f00 */ /*2c60*/ @P0 BRA 0x2e30 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*2c70*/ ISETP.GE.U32.AND P0, PT, R60, 0x1000001, PT ; /* 0x010000013c00780c */ /* 0x000fda0003f06070 */ /*2c80*/ @!P0 BRA 0x2d70 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*2c90*/ IADD3 R59, R67, -0x3fe00000, RZ ; /* 0xc0200000433b7810 */ /* 0x000fe20007ffe0ff */ /*2ca0*/ IMAD.MOV.U32 R58, RZ, RZ, R66 ; /* 0x000000ffff3a7224 */ /* 0x000fe200078e0042 */ /*2cb0*/ MOV R60, R63 ; /* 0x0000003f003c7202 */ /* 0x000fe40000000f00 */ /*2cc0*/ MUFU.RCP64H R61, R59 ; /* 0x0000003b003d7308 */ /* 0x000e280000001800 */ /*2cd0*/ DFMA R62, -R58, R60, 1 ; /* 0x3ff000003a3e742b */ /* 0x001e0c000000013c */ /*2ce0*/ DFMA R62, R62, R62, R62 ; /* 0x0000003e3e3e722b */ /* 0x001e0c000000003e */ /*2cf0*/ DFMA R62, R60, R62, R60 ; /* 0x0000003e3c3e722b */ /* 0x001e0c000000003c */ /*2d00*/ DFMA R60, -R58, R62, 1 ; /* 0x3ff000003a3c742b */ /* 0x001e0c000000013e */ /*2d10*/ DFMA R60, R62, R60, R62 ; /* 0x0000003c3e3c722b */ /* 0x001e0c000000003e */ /*2d20*/ DMUL R60, R60, 2.2250738585072013831e-308 ; /* 0x001000003c3c7828 */ /* 0x001e0c0000000000 */ /*2d30*/ DFMA R62, -R66, R60, 1 ; /* 0x3ff00000423e742b */ /* 0x001e0c000000013c */ /*2d40*/ DFMA R62, R62, R62, R62 ; /* 0x0000003e3e3e722b */ /* 0x001e0c000000003e */ /*2d50*/ DFMA R58, R60, R62, R60 ; /* 0x0000003e3c3a722b */ /* 0x001062000000003c */ /*2d60*/ BRA 0x2e30 ; /* 0x000000c000007947 */ /* 0x000fea0003800000 */ /*2d70*/ DMUL R60, R66, 8.11296384146066816958e+31 ; /* 0x46900000423c7828 */ /* 0x000e220000000000 */ /*2d80*/ IMAD.MOV.U32 R58, RZ, RZ, R63 ; /* 0x000000ffff3a7224 */ /* 0x000fca00078e003f */ /*2d90*/ MUFU.RCP64H R59, R61 ; /* 0x0000003d003b7308 */ /* 0x001e240000001800 */ /*2da0*/ DFMA R62, -R60, R58, 1 ; /* 0x3ff000003c3e742b */ /* 0x001e0c000000013a */ /*2db0*/ DFMA R62, R62, R62, R62 ; /* 0x0000003e3e3e722b */ /* 0x001e0c000000003e */ /*2dc0*/ DFMA R62, R58, R62, R58 ; /* 0x0000003e3a3e722b */ /* 0x001e0c000000003a */ /*2dd0*/ DFMA R58, -R60, R62, 1 ; /* 0x3ff000003c3a742b */ /* 0x001e0c000000013e */ /*2de0*/ DFMA R58, R62, R58, R62 ; /* 0x0000003a3e3a722b */ /* 0x001e0c000000003e */ /*2df0*/ DMUL R58, R58, 8.11296384146066816958e+31 ; /* 0x469000003a3a7828 */ /* 0x001e220000000000 */ /*2e00*/ BRA 0x2e30 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*2e10*/ LOP3.LUT R59, R67, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000433b7812 */ /* 0x000fe400078efcff */ /*2e20*/ MOV R58, R66 ; /* 0x00000042003a7202 */ /* 0x000fe40000000f00 */ /*2e30*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2e40*/ IMAD.MOV.U32 R60, RZ, RZ, R58 ; /* 0x000000ffff3c7224 */ /* 0x003fe200078e003a */ /*2e50*/ MOV R61, R59 ; /* 0x0000003b003d7202 */ /* 0x000fe20000000f00 */ /*2e60*/ IMAD.MOV.U32 R58, RZ, RZ, R76 ; /* 0x000000ffff3a7224 */ /* 0x000fe200078e004c */ /*2e70*/ MOV R59, 0x0 ; /* 0x00000000003b7802 */ /* 0x000fc80000000f00 */ /*2e80*/ RET.REL.NODEC R58 0x0 ; /* 0xffffd1703a007950 */ /* 0x000fea0003c3ffff */ /*2e90*/ BRA 0x2e90; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*2ea0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2eb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2ec0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2ed0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2ee0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2ef0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2f00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2f10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2f20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2f30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2f40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2f50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2f60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2f70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z18exact_rhs_kernel_yPdiii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R12, SR_CTAID.X ; /* 0x00000000000c7919 */ /* 0x000e220000002500 */ /*0020*/ UMOV UR5, 0x1 ; /* 0x0000000100057882 */ /* 0x000fe40000000000 */ /*0030*/ ULDC UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */ /* 0x000fe20000000800 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e220000002100 */ /*0050*/ UIADD3 UR4, -UR5, UR4, URZ ; /* 0x0000000405047290 */ /* 0x000fe4000fffe13f */ /*0060*/ ULDC UR6, c[0x0][0x168] ; /* 0x00005a0000067ab9 */ /* 0x000fe20000000800 */ /*0070*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e620000002600 */ /*0080*/ UIADD3 UR5, -UR5, UR6, URZ ; /* 0x0000000605057290 */ /* 0x000fc6000fffe13f */ /*0090*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e620000002200 */ /*00a0*/ IMAD R12, R12, c[0x0][0x0], R3 ; /* 0x000000000c0c7a24 */ /* 0x001fca00078e0203 */ /*00b0*/ IADD3 R12, R12, 0x1, RZ ; /* 0x000000010c0c7810 */ /* 0x000fe20007ffe0ff */ /*00c0*/ IMAD R0, R0, c[0x0][0x4], R5 ; /* 0x0000010000007a24 */ /* 0x002fc600078e0205 */ /*00d0*/ ISETP.GE.AND P0, PT, R12, UR4, PT ; /* 0x000000040c007c0c */ /* 0x000fe4000bf06270 */ /*00e0*/ IADD3 R13, R0, 0x1, RZ ; /* 0x00000001000d7810 */ /* 0x000fc80007ffe0ff */ /*00f0*/ ISETP.GE.OR P0, PT, R13, UR5, P0 ; /* 0x000000050d007c0c */ /* 0x000fda0008706670 */ /*0100*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0110*/ I2F.F64 R2, R13 ; /* 0x0000000d00027312 */ /* 0x000e220000201c00 */ /*0120*/ IMAD.MOV.U32 R14, RZ, RZ, c[0x3][0x398] ; /* 0x00c0e600ff0e7624 */ /* 0x000fe200078e00ff */ /*0130*/ MOV R15, c[0x3][0x39c] ; /* 0x00c0e700000f7a02 */ /* 0x000fe20000000f00 */ /*0140*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x3][0x380] ; /* 0x00c0e000ff047624 */ /* 0x000fe200078e00ff */ /*0150*/ MOV R5, c[0x3][0x384] ; /* 0x00c0e10000057a02 */ /* 0x000fe20000000f00 */ /*0160*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x3][0x388] ; /* 0x00c0e200ff067624 */ /* 0x000fe200078e00ff */ /*0170*/ MOV R7, c[0x3][0x38c] ; /* 0x00c0e30000077a02 */ /* 0x000fe20000000f00 */ /*0180*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x3][0x390] ; /* 0x00c0e400ff087624 */ /* 0x000fe200078e00ff */ /*0190*/ MOV R9, c[0x3][0x394] ; /* 0x00c0e50000097a02 */ /* 0x000fe20000000f00 */ /*01a0*/ DMUL R24, RZ, c[0x3][0x68] ; /* 0x00c01a00ff187a28 */ /* 0x000fe20000000000 */ /*01b0*/ IMAD.MOV.U32 R18, RZ, RZ, c[0x3][0x3a0] ; /* 0x00c0e800ff127624 */ /* 0x000fe200078e00ff */ /*01c0*/ MOV R19, c[0x3][0x3a4] ; /* 0x00c0e90000137a02 */ /* 0x000fe20000000f00 */ /*01d0*/ IMAD.MOV.U32 R20, RZ, RZ, c[0x3][0x3d8] ; /* 0x00c0f600ff147624 */ /* 0x000fe200078e00ff */ /*01e0*/ MOV R21, c[0x3][0x3dc] ; /* 0x00c0f70000157a02 */ /* 0x000fe20000000f00 */ /*01f0*/ IMAD.MOV.U32 R26, RZ, RZ, c[0x3][0x3e0] ; /* 0x00c0f800ff1a7624 */ /* 0x000fe200078e00ff */ /*0200*/ MOV R27, c[0x3][0x3e4] ; /* 0x00c0f900001b7a02 */ /* 0x000fe20000000f00 */ /*0210*/ DMUL R10, R2, c[0x3][0x60] ; /* 0x00c01800020a7a28 */ /* 0x0010620000000000 */ /*0220*/ IMAD.MOV.U32 R28, RZ, RZ, c[0x3][0x3e8] ; /* 0x00c0fa00ff1c7624 */ /* 0x000fe200078e00ff */ /*0230*/ MOV R3, c[0x3][0x37c] ; /* 0x00c0df0000037a02 */ /* 0x001fe20000000f00 */ /*0240*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x3][0x378] ; /* 0x00c0de00ff027624 */ /* 0x000fe200078e00ff */ /*0250*/ MOV R29, c[0x3][0x3ec] ; /* 0x00c0fb00001d7a02 */ /* 0x000fe20000000f00 */ /*0260*/ IMAD.MOV.U32 R30, RZ, RZ, c[0x3][0x3b0] ; /* 0x00c0ec00ff1e7624 */ /* 0x000fe200078e00ff */ /*0270*/ DFMA R14, R10.reuse, R14, c[0x3][0x320] ; /* 0x00c0c8000a0e762b */ /* 0x042e22000000000e */ /*0280*/ MOV R31, c[0x3][0x3b4] ; /* 0x00c0ed00001f7a02 */ /* 0x000fe20000000f00 */ /*0290*/ IMAD.MOV.U32 R34, RZ, RZ, c[0x3][0x3b8] ; /* 0x00c0ee00ff227624 */ /* 0x000fe200078e00ff */ /*02a0*/ MOV R35, c[0x3][0x3bc] ; /* 0x00c0ef0000237a02 */ /* 0x000fe20000000f00 */ /*02b0*/ DFMA R2, R10.reuse, R2, c[0x3][0x300] ; /* 0x00c0c0000a02762b */ /* 0x040e620000000002 */ /*02c0*/ IMAD.MOV.U32 R38, RZ, RZ, c[0x3][0x3c0] ; /* 0x00c0f000ff267624 */ /* 0x000fe200078e00ff */ /*02d0*/ MOV R39, c[0x3][0x3c4] ; /* 0x00c0f10000277a02 */ /* 0x000fe20000000f00 */ /*02e0*/ BSSY B0, 0x880 ; /* 0x0000059000007945 */ /* 0x000fe20003800000 */ /*02f0*/ DFMA R16, R10, R14, c[0x3][0x2a8] ; /* 0x00c0aa000a10762b */ /* 0x0011c4000000000e */ /*0300*/ I2F.F64 R14, R12 ; /* 0x0000000c000e7312 */ /* 0x001e240000201c00 */ /*0310*/ DFMA R4, R10, R4, c[0x3][0x308] ; /* 0x00c0c2000a04762b */ /* 0x000e880000000004 */ /*0320*/ DFMA R6, R10, R6, c[0x3][0x310] ; /* 0x00c0c4000a06762b */ /* 0x000ec80000000006 */ /*0330*/ DFMA R8, R10, R8, c[0x3][0x318] ; /* 0x00c0c6000a08762b */ /* 0x000f080000000008 */ /*0340*/ DFMA R2, R10, R2, c[0x3][0x288] ; /* 0x00c0a2000a02762b */ /* 0x002e480000000002 */ /*0350*/ DFMA R4, R10, R4, c[0x3][0x290] ; /* 0x00c0a4000a04762b */ /* 0x004e880000000004 */ /*0360*/ DFMA R6, R10, R6, c[0x3][0x298] ; /* 0x00c0a6000a06762b */ /* 0x008ec80000000006 */ /*0370*/ DFMA R8, R10, R8, c[0x3][0x2a0] ; /* 0x00c0a8000a08762b */ /* 0x010f080000000008 */ /*0380*/ DFMA R2, R10, R2, c[0x3][0x210] ; /* 0x00c084000a02762b */ /* 0x002e480000000002 */ /*0390*/ DFMA R4, R10, R4, c[0x3][0x218] ; /* 0x00c086000a04762b */ /* 0x004e880000000004 */ /*03a0*/ DFMA R6, R10, R6, c[0x3][0x220] ; /* 0x00c088000a06762b */ /* 0x008ec80000000006 */ /*03b0*/ DFMA R8, R10, R8, c[0x3][0x228] ; /* 0x00c08a000a08762b */ /* 0x010f080000000008 */ /*03c0*/ DFMA R16, R10, R16, c[0x3][0x230] ; /* 0x00c08c000a10762b */ /* 0x000f480000000010 */ /*03d0*/ DMUL R22, R14, c[0x3][0x70] ; /* 0x00c01c000e167a28 */ /* 0x0010240000000000 */ /*03e0*/ IMAD.MOV.U32 R14, RZ, RZ, c[0x3][0x3c8] ; /* 0x00c0f200ff0e7624 */ /* 0x001fe200078e00ff */ /*03f0*/ MOV R15, c[0x3][0x3cc] ; /* 0x00c0f300000f7a02 */ /* 0x000fe20000000f00 */ /*0400*/ DFMA R2, R10, R2, c[0x3][0x1e8] ; /* 0x00c07a000a02762b */ /* 0x002fc80000000002 */ /*0410*/ DFMA R4, R10, R4, c[0x3][0x1f0] ; /* 0x00c07c000a04762b */ /* 0x004fc80000000004 */ /*0420*/ DFMA R6, R10, R6, c[0x3][0x1f8] ; /* 0x00c07e000a06762b */ /* 0x008fc80000000006 */ /*0430*/ DFMA R8, R10, R8, c[0x3][0x200] ; /* 0x00c080000a08762b */ /* 0x010fc80000000008 */ /*0440*/ DFMA R10, R10, R16, c[0x3][0x208] ; /* 0x00c082000a0a762b */ /* 0x020fc80000000010 */ /*0450*/ DFMA R16, R24, R18, c[0x3][0x328] ; /* 0x00c0ca001810762b */ /* 0x0000640000000012 */ /*0460*/ IMAD.MOV.U32 R18, RZ, RZ, c[0x3][0x3d0] ; /* 0x00c0f400ff127624 */ /* 0x001fe200078e00ff */ /*0470*/ MOV R19, c[0x3][0x3d4] ; /* 0x00c0f50000137a02 */ /* 0x000fe20000000f00 */ /*0480*/ DFMA R14, R22, R14, c[0x3][0x350] ; /* 0x00c0d400160e762b */ /* 0x000e08000000000e */ /*0490*/ DFMA R16, R24, R16, c[0x3][0x2b0] ; /* 0x00c0ac001810762b */ /* 0x002e480000000010 */ /*04a0*/ DFMA R14, R22, R14, c[0x3][0x2d8] ; /* 0x00c0b600160e762b */ /* 0x001e08000000000e */ /*04b0*/ DFMA R16, R24, R16, c[0x3][0x238] ; /* 0x00c08e001810762b */ /* 0x002e480000000010 */ /*04c0*/ DFMA R14, R22, R14, c[0x3][0x260] ; /* 0x00c09800160e762b */ /* 0x001e08000000000e */ /*04d0*/ DFMA R16, R24, R16, R2 ; /* 0x000000101810722b */ /* 0x002fc80000000002 */ /*04e0*/ DMUL R14, R22, R14 ; /* 0x0000000e160e7228 */ /* 0x001e080000000000 */ /*04f0*/ DFMA R18, R22, R18, c[0x3][0x358] ; /* 0x00c0d6001612762b */ /* 0x000fc80000000012 */ /*0500*/ DADD R32, R16, R14 ; /* 0x0000000010207229 */ /* 0x001e08000000000e */ /*0510*/ DFMA R20, R22.reuse, R20, c[0x3][0x360] ; /* 0x00c0d8001614762b */ /* 0x040e640000000014 */ /*0520*/ MUFU.RCP64H R37, R33 ; /* 0x0000002100257308 */ /* 0x001e240000001800 */ /*0530*/ DFMA R26, R22.reuse, R26, c[0x3][0x368] ; /* 0x00c0da00161a762b */ /* 0x040ea4000000001a */ /*0540*/ IADD3 R36, R33, 0x300402, RZ ; /* 0x0030040221247810 */ /* 0x000fe40007ffe0ff */ /*0550*/ DFMA R28, R22, R28, c[0x3][0x370] ; /* 0x00c0dc00161c762b */ /* 0x000ee4000000001c */ /*0560*/ FSETP.GEU.AND P0, PT, |R36|, 5.8789094863358348022e-39, PT ; /* 0x004004022400780b */ /* 0x000fc40003f0e200 */ /*0570*/ DFMA R18, R22, R18, c[0x3][0x2e0] ; /* 0x00c0b8001612762b */ /* 0x000f080000000012 */ /*0580*/ DFMA R20, R22, R20, c[0x3][0x2e8] ; /* 0x00c0ba001614762b */ /* 0x002e480000000014 */ /*0590*/ DFMA R26, R22, R26, c[0x3][0x2f0] ; /* 0x00c0bc00161a762b */ /* 0x004e88000000001a */ /*05a0*/ DFMA R28, R22, R28, c[0x3][0x2f8] ; /* 0x00c0be00161c762b */ /* 0x008ec8000000001c */ /*05b0*/ DFMA R16, R22, R18, c[0x3][0x268] ; /* 0x00c09a001610762b */ /* 0x010f080000000012 */ /*05c0*/ DFMA R18, R22, R20, c[0x3][0x270] ; /* 0x00c09c001612762b */ /* 0x002e480000000014 */ /*05d0*/ DFMA R20, R22, R26, c[0x3][0x278] ; /* 0x00c09e001614762b */ /* 0x004e88000000001a */ /*05e0*/ DFMA R28, R22, R28, c[0x3][0x280] ; /* 0x00c0a000161c762b */ /* 0x008fc8000000001c */ /*05f0*/ DFMA R26, -R32, R36, 1 ; /* 0x3ff00000201a742b */ /* 0x001e080000000124 */ /*0600*/ DMUL R16, R22, R16 ; /* 0x0000001016107228 */ /* 0x010fc80000000000 */ /*0610*/ DMUL R18, R22, R18 ; /* 0x0000001216127228 */ /* 0x002fc80000000000 */ /*0620*/ DMUL R20, R22, R20 ; /* 0x0000001416147228 */ /* 0x004fc80000000000 */ /*0630*/ DFMA R26, R26, R26, R26 ; /* 0x0000001a1a1a722b */ /* 0x001e08000000001a */ /*0640*/ DMUL R22, R22, R28 ; /* 0x0000001c16167228 */ /* 0x0003e40000000000 */ /*0650*/ IMAD.MOV.U32 R28, RZ, RZ, c[0x3][0x3a8] ; /* 0x00c0ea00ff1c7624 */ /* 0x002fe200078e00ff */ /*0660*/ MOV R29, c[0x3][0x3ac] ; /* 0x00c0eb00001d7a02 */ /* 0x000fe20000000f00 */ /*0670*/ DFMA R68, R36, R26, R36 ; /* 0x0000001a2444722b */ /* 0x001fca0000000024 */ /*0680*/ DFMA R26, R24, R28, c[0x3][0x330] ; /* 0x00c0cc00181a762b */ /* 0x000e08000000001c */ /*0690*/ DFMA R28, R24, R30, c[0x3][0x338] ; /* 0x00c0ce00181c762b */ /* 0x000e48000000001e */ /*06a0*/ DFMA R30, R24, R34, c[0x3][0x340] ; /* 0x00c0d000181e762b */ /* 0x000e880000000022 */ /*06b0*/ DFMA R34, R24, R38, c[0x3][0x348] ; /* 0x00c0d2001822762b */ /* 0x000ec80000000026 */ /*06c0*/ DFMA R26, R24, R26, c[0x3][0x2b8] ; /* 0x00c0ae00181a762b */ /* 0x001e08000000001a */ /*06d0*/ DFMA R28, R24, R28, c[0x3][0x2c0] ; /* 0x00c0b000181c762b */ /* 0x002e48000000001c */ /*06e0*/ DFMA R30, R24, R30, c[0x3][0x2c8] ; /* 0x00c0b200181e762b */ /* 0x004e88000000001e */ /*06f0*/ DFMA R34, R24, R34, c[0x3][0x2d0] ; /* 0x00c0b4001822762b */ /* 0x008ec80000000022 */ /*0700*/ DFMA R26, R24, R26, c[0x3][0x240] ; /* 0x00c09000181a762b */ /* 0x001e08000000001a */ /*0710*/ DFMA R28, R24, R28, c[0x3][0x248] ; /* 0x00c09200181c762b */ /* 0x002e48000000001c */ /*0720*/ DFMA R30, R24, R30, c[0x3][0x250] ; /* 0x00c09400181e762b */ /* 0x004e88000000001e */ /*0730*/ DFMA R34, R24, R34, c[0x3][0x258] ; /* 0x00c096001822762b */ /* 0x008ec80000000022 */ /*0740*/ DFMA R26, R24, R26, R4 ; /* 0x0000001a181a722b */ /* 0x001e080000000004 */ /*0750*/ DFMA R28, R24, R28, R6 ; /* 0x0000001c181c722b */ /* 0x002e480000000006 */ /*0760*/ DFMA R30, R24, R30, R8 ; /* 0x0000001e181e722b */ /* 0x004e880000000008 */ /*0770*/ DFMA R38, -R32, R68, 1 ; /* 0x3ff000002026742b */ /* 0x000f080000000144 */ /*0780*/ DFMA R34, R24, R34, R10 ; /* 0x000000221822722b */ /* 0x008ec8000000000a */ /*0790*/ DADD R24, R26, R16 ; /* 0x000000001a187229 */ /* 0x0010080000000010 */ /*07a0*/ DADD R26, R28, R18 ; /* 0x000000001c1a7229 */ /* 0x0022080000000012 */ /*07b0*/ DADD R28, R30, R20 ; /* 0x000000001e1c7229 */ /* 0x0042880000000014 */ /*07c0*/ DFMA R68, R68, R38, R68 ; /* 0x000000264444722b */ /* 0x0103080000000044 */ /*07d0*/ DADD R30, R34, R22 ; /* 0x00000000221e7229 */ /* 0x0082e20000000016 */ /*07e0*/ @P0 BRA 0x870 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*07f0*/ LOP3.LUT R34, R33, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff21227812 */ /* 0x017fe200078ec0ff */ /*0800*/ IMAD.MOV.U32 R118, RZ, RZ, R32 ; /* 0x000000ffff767224 */ /* 0x000fe200078e0020 */ /*0810*/ MOV R119, R33 ; /* 0x0000002100777202 */ /* 0x000fe40000000f00 */ /*0820*/ IADD3 R73, R34, -0x100000, RZ ; /* 0xfff0000022497810 */ /* 0x000fe40007ffe0ff */ /*0830*/ MOV R72, 0x850 ; /* 0x0000085000487802 */ /* 0x000fe40000000f00 */ /*0840*/ CALL.REL.NOINC 0x2f80 ; /* 0x0000273000007944 */ /* 0x008fea0003c00000 */ /*0850*/ IMAD.MOV.U32 R68, RZ, RZ, R114 ; /* 0x000000ffff447224 */ /* 0x000fe200078e0072 */ /*0860*/ MOV R69, R115 ; /* 0x0000007300457202 */ /* 0x000fe40000000f00 */ /*0870*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x015fea0003800000 */ /*0880*/ IMAD.MOV.U32 R54, RZ, RZ, c[0x3][0x68] ; /* 0x00c01a00ff367624 */ /* 0x000fe200078e00ff */ /*0890*/ MOV R55, c[0x3][0x6c] ; /* 0x00c01b0000377a02 */ /* 0x000fe20000000f00 */ /*08a0*/ IMAD.MOV.U32 R34, RZ, RZ, c[0x3][0x3a0] ; /* 0x00c0e800ff227624 */ /* 0x002fe200078e00ff */ /*08b0*/ MOV R35, c[0x3][0x3a4] ; /* 0x00c0e90000237a02 */ /* 0x000fe20000000f00 */ /*08c0*/ IMAD.MOV.U32 R36, RZ, RZ, c[0x3][0x3a8] ; /* 0x00c0ea00ff247624 */ /* 0x000fe200078e00ff */ /*08d0*/ MOV R37, c[0x3][0x3ac] ; /* 0x00c0eb0000257a02 */ /* 0x000fe20000000f00 */ /*08e0*/ IMAD.MOV.U32 R38, RZ, RZ, c[0x3][0x3b0] ; /* 0x00c0ec00ff267624 */ /* 0x000fe200078e00ff */ /*08f0*/ MOV R39, c[0x3][0x3b4] ; /* 0x00c0ed0000277a02 */ /* 0x000fe20000000f00 */ /*0900*/ IMAD.MOV.U32 R40, RZ, RZ, c[0x3][0x3b8] ; /* 0x00c0ee00ff287624 */ /* 0x000fe200078e00ff */ /*0910*/ DFMA R34, R34, R54, c[0x3][0x328] ; /* 0x00c0ca002222762b */ /* 0x000e220000000036 */ /*0920*/ MOV R41, c[0x3][0x3bc] ; /* 0x00c0ef0000297a02 */ /* 0x000fe20000000f00 */ /*0930*/ IMAD.MOV.U32 R42, RZ, RZ, c[0x3][0x3c0] ; /* 0x00c0f000ff2a7624 */ /* 0x000fe200078e00ff */ /*0940*/ MOV R43, c[0x3][0x3c4] ; /* 0x00c0f100002b7a02 */ /* 0x000fe20000000f00 */ /*0950*/ DMUL R50, R24, R68 ; /* 0x0000004418327228 */ /* 0x000fe20000000000 */ /*0960*/ BSSY B0, 0xc90 ; /* 0x0000032000007945 */ /* 0x000fe60003800000 */ /*0970*/ DFMA R34, R34, R54, c[0x3][0x2b0] ; /* 0x00c0ac002222762b */ /* 0x001e0c0000000036 */ /*0980*/ DFMA R34, R34, R54, c[0x3][0x238] ; /* 0x00c08e002222762b */ /* 0x001e0c0000000036 */ /*0990*/ DFMA R34, R34, c[0x3][0x68], R2 ; /* 0x00c01a0022227a2b */ /* 0x001e0c0000000002 */ /*09a0*/ DADD R48, R14, R34 ; /* 0x000000000e307229 */ /* 0x001e080000000022 */ /*09b0*/ DFMA R34, R36, R54.reuse, c[0x3][0x330] ; /* 0x00c0cc002422762b */ /* 0x080e640000000036 */ /*09c0*/ MUFU.RCP64H R57, R49 ; /* 0x0000003100397308 */ /* 0x001e240000001800 */ /*09d0*/ DFMA R36, R38, R54.reuse, c[0x3][0x338] ; /* 0x00c0ce002624762b */ /* 0x080fe40000000036 */ /*09e0*/ IADD3 R56, R49, 0x300402, RZ ; /* 0x0030040231387810 */ /* 0x000fe40007ffe0ff */ /*09f0*/ DFMA R38, R40, R54, c[0x3][0x340] ; /* 0x00c0d0002826762b */ /* 0x000fe40000000036 */ /*0a00*/ FSETP.GEU.AND P0, PT, |R56|, 5.8789094863358348022e-39, PT ; /* 0x004004023800780b */ /* 0x000fc40003f0e200 */ /*0a10*/ DFMA R40, R42, R54, c[0x3][0x348] ; /* 0x00c0d2002a28762b */ /* 0x000e880000000036 */ /*0a20*/ DFMA R34, R34, R54, c[0x3][0x2b8] ; /* 0x00c0ae002222762b */ /* 0x002e480000000036 */ /*0a30*/ DFMA R44, -R48, R56, 1 ; /* 0x3ff00000302c742b */ /* 0x001e080000000138 */ /*0a40*/ DFMA R46, R40, R54, c[0x3][0x2d0] ; /* 0x00c0b400282e762b */ /* 0x004fc80000000036 */ /*0a50*/ DFMA R40, R34, R54, c[0x3][0x240] ; /* 0x00c090002228762b */ /* 0x002fc80000000036 */ /*0a60*/ DFMA R34, R44, R44, R44 ; /* 0x0000002c2c22722b */ /* 0x001e08000000002c */ /*0a70*/ DFMA R36, R36, R54, c[0x3][0x2c0] ; /* 0x00c0b0002424762b */ /* 0x000e480000000036 */ /*0a80*/ DFMA R58, R56, R34, R56 ; /* 0x00000022383a722b */ /* 0x001fc80000000038 */ /*0a90*/ DMUL R34, R26, R68 ; /* 0x000000441a227228 */ /* 0x000e080000000000 */ /*0aa0*/ DFMA R38, R38, R54, c[0x3][0x2c8] ; /* 0x00c0b2002626762b */ /* 0x000e880000000036 */ /*0ab0*/ DFMA R42, R36, R54, c[0x3][0x248] ; /* 0x00c09200242a762b */ /* 0x002fc80000000036 */ /*0ac0*/ DMUL R36, R26, R34 ; /* 0x000000221a247228 */ /* 0x001e080000000000 */ /*0ad0*/ DFMA R44, R38, R54, c[0x3][0x250] ; /* 0x00c09400262c762b */ /* 0x004e480000000036 */ /*0ae0*/ DFMA R54, R46, R54, c[0x3][0x258] ; /* 0x00c096002e36762b */ /* 0x000fc80000000036 */ /*0af0*/ DMUL R38, R34, R34 ; /* 0x0000002222267228 */ /* 0x000e880000000000 */ /*0b00*/ DMUL R46, R28, R68 ; /* 0x000000441c2e7228 */ /* 0x000fc80000000000 */ /*0b10*/ DFMA R36, R24, R50, R36 ; /* 0x000000321824722b */ /* 0x001e080000000024 */ /*0b20*/ DFMA R40, R40, c[0x3][0x68], R4 ; /* 0x00c01a0028287a2b */ /* 0x000f080000000004 */ /*0b30*/ DFMA R42, R42, c[0x3][0x68], R6 ; /* 0x00c01a002a2a7a2b */ /* 0x000f480000000006 */ /*0b40*/ DFMA R44, R44, c[0x3][0x68], R8 ; /* 0x00c01a002c2c7a2b */ /* 0x002e480000000008 */ /*0b50*/ DFMA R60, -R48, R58, 1 ; /* 0x3ff00000303c742b */ /* 0x000ec8000000013a */ /*0b60*/ DFMA R52, R50, R50, R38 ; /* 0x000000323234722b */ /* 0x004e880000000026 */ /*0b70*/ DFMA R54, R54, c[0x3][0x68], R10 ; /* 0x00c01a0036367a2b */ /* 0x000e08000000000a */ /*0b80*/ DFMA R150, R28, R46, R36 ; /* 0x0000002e1c96722b */ /* 0x0010080000000024 */ /*0b90*/ DADD R36, R16, R40 ; /* 0x0000000010247229 */ /* 0x0108080000000028 */ /*0ba0*/ DADD R40, R18, R42 ; /* 0x0000000012287229 */ /* 0x020808000000002a */ /*0bb0*/ DADD R42, R20, R44 ; /* 0x00000000142a7229 */ /* 0x002848000000002c */ /*0bc0*/ DFMA R66, R58, R60, R58 ; /* 0x0000003c3a42722b */ /* 0x0088c8000000003a */ /*0bd0*/ DFMA R52, R46, R46, R52 ; /* 0x0000002e2e34722b */ /* 0x0048880000000034 */ /*0be0*/ DADD R44, R22, R54 ; /* 0x00000000162c7229 */ /* 0x0008220000000036 */ /*0bf0*/ @P0 BRA 0xc80 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*0c00*/ LOP3.LUT R54, R49, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff31367812 */ /* 0x01efe200078ec0ff */ /*0c10*/ IMAD.MOV.U32 R118, RZ, RZ, R48 ; /* 0x000000ffff767224 */ /* 0x000fe200078e0030 */ /*0c20*/ MOV R119, R49 ; /* 0x0000003100777202 */ /* 0x000fe40000000f00 */ /*0c30*/ IADD3 R73, R54, -0x100000, RZ ; /* 0xfff0000036497810 */ /* 0x000fe40007ffe0ff */ /*0c40*/ MOV R72, 0xc60 ; /* 0x00000c6000487802 */ /* 0x000fe40000000f00 */ /*0c50*/ CALL.REL.NOINC 0x2f80 ; /* 0x0000232000007944 */ /* 0x001fea0003c00000 */ /*0c60*/ IMAD.MOV.U32 R66, RZ, RZ, R114 ; /* 0x000000ffff427224 */ /* 0x000fe200078e0072 */ /*0c70*/ MOV R67, R115 ; /* 0x0000007300437202 */ /* 0x000fe40000000f00 */ /*0c80*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x00efea0003800000 */ /*0c90*/ IMAD.MOV.U32 R54, RZ, RZ, c[0x3][0x68] ; /* 0x00c01a00ff367624 */ /* 0x010fe200078e00ff */ /*0ca0*/ MOV R55, c[0x3][0x6c] ; /* 0x00c01b0000377a02 */ /* 0x000fe20000000f00 */ /*0cb0*/ IMAD.MOV.U32 R56, RZ, RZ, c[0x3][0x3a0] ; /* 0x00c0e800ff387624 */ /* 0x000fe200078e00ff */ /*0cc0*/ MOV R57, c[0x3][0x3a4] ; /* 0x00c0e90000397a02 */ /* 0x000fe20000000f00 */ /*0cd0*/ IMAD.MOV.U32 R60, RZ, RZ, c[0x3][0x3b0] ; /* 0x00c0ec00ff3c7624 */ /* 0x000fe200078e00ff */ /*0ce0*/ MOV R61, c[0x3][0x3b4] ; /* 0x00c0ed00003d7a02 */ /* 0x000fe20000000f00 */ /*0cf0*/ IMAD.MOV.U32 R58, RZ, RZ, c[0x3][0x3a8] ; /* 0x00c0ea00ff3a7624 */ /* 0x000fe200078e00ff */ /*0d00*/ DADD R54, R54, c[0x3][0x68] ; /* 0x00c01a0036367629 */ /* 0x000e620000000000 */ /*0d10*/ MOV R59, c[0x3][0x3ac] ; /* 0x00c0eb00003b7a02 */ /* 0x000fe20000000f00 */ /*0d20*/ IMAD.MOV.U32 R62, RZ, RZ, c[0x3][0x3b8] ; /* 0x00c0ee00ff3e7624 */ /* 0x000fe200078e00ff */ /*0d30*/ MOV R63, c[0x3][0x3bc] ; /* 0x00c0ef00003f7a02 */ /* 0x000fe20000000f00 */ /*0d40*/ IMAD.MOV.U32 R64, RZ, RZ, c[0x3][0x3c0] ; /* 0x00c0f000ff407624 */ /* 0x000fe200078e00ff */ /*0d50*/ MOV R65, c[0x3][0x3c4] ; /* 0x00c0f10000417a02 */ /* 0x000fe20000000f00 */ /*0d60*/ DFMA R56, R54.reuse, R56, c[0x3][0x328] ; /* 0x00c0ca003638762b */ /* 0x042e620000000038 */ /*0d70*/ BSSY B0, 0x10b0 ; /* 0x0000033000007945 */ /* 0x000fe60003800000 */ /*0d80*/ DFMA R60, R54, R60, c[0x3][0x338] ; /* 0x00c0ce00363c762b */ /* 0x000fc8000000003c */ /*0d90*/ DFMA R56, R54, R56, c[0x3][0x2b0] ; /* 0x00c0ac003638762b */ /* 0x002e480000000038 */ /*0da0*/ DFMA R58, R54, R58, c[0x3][0x330] ; /* 0x00c0cc00363a762b */ /* 0x000fc8000000003a */ /*0db0*/ DFMA R56, R54, R56, c[0x3][0x238] ; /* 0x00c08e003638762b */ /* 0x002e480000000038 */ /*0dc0*/ DFMA R62, R54, R62, c[0x3][0x340] ; /* 0x00c0d000363e762b */ /* 0x000fc8000000003e */ /*0dd0*/ DFMA R56, R54, R56, R2 ; /* 0x000000383638722b */ /* 0x002e480000000002 */ /*0de0*/ DFMA R60, R54, R60, c[0x3][0x2c0] ; /* 0x00c0b000363c762b */ /* 0x000fc8000000003c */ /*0df0*/ DADD R158, R14, R56 ; /* 0x000000000e9e7229 */ /* 0x002e480000000038 */ /*0e00*/ DFMA R64, R54.reuse, R64, c[0x3][0x348] ; /* 0x00c0d2003640762b */ /* 0x040ea40000000040 */ /*0e10*/ MUFU.RCP64H R71, R159 ; /* 0x0000009f00477308 */ /* 0x002e640000001800 */ /*0e20*/ DFMA R58, R54.reuse, R58, c[0x3][0x2b8] ; /* 0x00c0ae00363a762b */ /* 0x040ee4000000003a */ /*0e30*/ IADD3 R70, R159, 0x300402, RZ ; /* 0x003004029f467810 */ /* 0x000fe40007ffe0ff */ /*0e40*/ DFMA R62, R54, R62, c[0x3][0x2c8] ; /* 0x00c0b200363e762b */ /* 0x000f24000000003e */ /*0e50*/ FSETP.GEU.AND P0, PT, |R70|, 5.8789094863358348022e-39, PT ; /* 0x004004024600780b */ /* 0x000fc40003f0e200 */ /*0e60*/ DFMA R60, R54, R60, c[0x3][0x248] ; /* 0x00c09200363c762b */ /* 0x000f48000000003c */ /*0e70*/ DFMA R64, R54, R64, c[0x3][0x2d0] ; /* 0x00c0b4003640762b */ /* 0x004e880000000040 */ /*0e80*/ DFMA R56, -R158, R70, 1 ; /* 0x3ff000009e38742b */ /* 0x002e480000000146 */ /*0e90*/ DFMA R58, R54, R58, c[0x3][0x240] ; /* 0x00c09000363a762b */ /* 0x008ec8000000003a */ /*0ea0*/ DFMA R62, R54, R62, c[0x3][0x250] ; /* 0x00c09400363e762b */ /* 0x010f08000000003e */ /*0eb0*/ DFMA R152, R54, R60, R6 ; /* 0x0000003c3698722b */ /* 0x020fc80000000006 */ /*0ec0*/ DFMA R64, R54, R64, c[0x3][0x258] ; /* 0x00c096003640762b */ /* 0x004e880000000040 */ /*0ed0*/ DMUL R60, R40, R66 ; /* 0x00000042283c7228 */ /* 0x001e080000000000 */ /*0ee0*/ DFMA R56, R56, R56, R56 ; /* 0x000000383838722b */ /* 0x002e480000000038 */ /*0ef0*/ DFMA R140, R54, R58, R4 ; /* 0x0000003a368c722b */ /* 0x008fc80000000004 */ /*0f00*/ DFMA R156, R54, R62, R8 ; /* 0x0000003e369c722b */ /* 0x010fc80000000008 */ /*0f10*/ DFMA R160, R54, R64, R10 ; /* 0x0000004036a0722b */ /* 0x004fc8000000000a */ /*0f20*/ DMUL R58, R36, R66 ; /* 0x00000042243a7228 */ /* 0x000fc80000000000 */ /*0f30*/ DMUL R62, R40, R60 ; /* 0x0000003c283e7228 */ /* 0x001e080000000000 */ /*0f40*/ DFMA R72, R70, R56, R70 ; /* 0x000000384648722b */ /* 0x002e480000000046 */ /*0f50*/ DMUL R54, R60, R60 ; /* 0x0000003c3c367228 */ /* 0x000e880000000000 */ /*0f60*/ DFMA R64, R36, R58, R62 ; /* 0x0000003a2440722b */ /* 0x001fc8000000003e */ /*0f70*/ DMUL R56, R42, R66 ; /* 0x000000422a387228 */ /* 0x000fc80000000000 */ /*0f80*/ DFMA R74, -R158, R72, 1 ; /* 0x3ff000009e4a742b */ /* 0x002e080000000148 */ /*0f90*/ DFMA R62, R58, R58, R54 ; /* 0x0000003a3a3e722b */ /* 0x004e480000000036 */ /*0fa0*/ DFMA R72, R72, R74, R72 ; /* 0x0000004a4848722b */ /* 0x0010880000000048 */ /*0fb0*/ DFMA R64, R42, R56, R64 ; /* 0x000000382a40722b */ /* 0x0000c80000000040 */ /*0fc0*/ DFMA R62, R56, R56, R62 ; /* 0x00000038383e722b */ /* 0x002048000000003e */ /*0fd0*/ DADD R140, R16, R140 ; /* 0x00000000108c7229 */ /* 0x000108000000008c */ /*0fe0*/ DADD R152, R18, R152 ; /* 0x0000000012987229 */ /* 0x0000080000000098 */ /*0ff0*/ DADD R156, R20, R156 ; /* 0x00000000149c7229 */ /* 0x000008000000009c */ /*1000*/ DADD R160, R22, R160 ; /* 0x0000000016a07229 */ /* 0x00002200000000a0 */ /*1010*/ @P0 BRA 0x10a0 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*1020*/ LOP3.LUT R70, R159, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff9f467812 */ /* 0x01efe200078ec0ff */ /*1030*/ IMAD.MOV.U32 R118, RZ, RZ, R158 ; /* 0x000000ffff767224 */ /* 0x000fe200078e009e */ /*1040*/ MOV R119, R159 ; /* 0x0000009f00777202 */ /* 0x000fe40000000f00 */ /*1050*/ IADD3 R73, R70, -0x100000, RZ ; /* 0xfff0000046497810 */ /* 0x000fe40007ffe0ff */ /*1060*/ MOV R72, 0x1080 ; /* 0x0000108000487802 */ /* 0x000fe40000000f00 */ /*1070*/ CALL.REL.NOINC 0x2f80 ; /* 0x00001f0000007944 */ /* 0x001fea0003c00000 */ /*1080*/ IMAD.MOV.U32 R72, RZ, RZ, R114 ; /* 0x000000ffff487224 */ /* 0x000fe200078e0072 */ /*1090*/ MOV R73, R115 ; /* 0x0000007300497202 */ /* 0x000fe40000000f00 */ /*10a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x01efea0003800000 */ /*10b0*/ IMAD.MOV.U32 R89, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff597624 */ /* 0x000fca00078e00ff */ /*10c0*/ ISETP.GE.AND P0, PT, R89, 0x3, PT ; /* 0x000000035900780c */ /* 0x000fda0003f06270 */ /*10d0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*10e0*/ IADD3 R142, R12, c[0x0][0x170], RZ ; /* 0x00005c000c8e7a10 */ /* 0x000fe20007ffe0ff */ /*10f0*/ DMUL R168, R140, R72.reuse ; /* 0x000000488ca87228 */ /* 0x080fe20000000000 */ /*1100*/ IADD3 R143, R89.reuse, -0x3, RZ ; /* 0xfffffffd598f7810 */ /* 0x040fe20007ffe0ff */ /*1110*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*1120*/ IADD3 R144, R142.reuse, c[0x0][0x170], RZ ; /* 0x00005c008e907a10 */ /* 0x040fe20007ffe0ff */ /*1130*/ DMUL R172, R152, R72.reuse ; /* 0x0000004898ac7228 */ /* 0x081e220000000000 */ /*1140*/ IADD3 R145, R89, -0x2, RZ ; /* 0xfffffffe59917810 */ /* 0x000fe20007ffe0ff */ /*1150*/ IMAD R74, R142, c[0x0][0x16c], R143 ; /* 0x00005b008e4a7a24 */ /* 0x000fe200078e028f */ /*1160*/ IADD3 R146, R144, c[0x0][0x170], RZ ; /* 0x00005c0090927a10 */ /* 0x000fe20007ffe0ff */ /*1170*/ DMUL R170, R156, R72.reuse ; /* 0x000000489caa7228 */ /* 0x080fe20000000000 */ /*1180*/ MOV R111, 0x8 ; /* 0x00000008006f7802 */ /* 0x000fe20000000f00 */ /*1190*/ IMAD R80, R74, c[0x0][0x168], R13 ; /* 0x00005a004a507a24 */ /* 0x000fe200078e020d */ /*11a0*/ IADD3 R148, R146, c[0x0][0x170], RZ ; /* 0x00005c0092947a10 */ /* 0x000fe20007ffe0ff */ /*11b0*/ DMUL R174, R160, R72 ; /* 0x00000048a0ae7228 */ /* 0x0003e20000000000 */ /*11c0*/ IMAD R76, R12, c[0x0][0x16c], R145 ; /* 0x00005b000c4c7a24 */ /* 0x000fc400078e0291 */ /*11d0*/ IMAD R72, R12, c[0x0][0x16c], R143 ; /* 0x00005b000c487a24 */ /* 0x002fe200078e028f */ /*11e0*/ DMUL R70, R152, R172.reuse ; /* 0x000000ac98467228 */ /* 0x081e220000000000 */ /*11f0*/ IMAD R74, R144, c[0x0][0x16c], R145 ; /* 0x00005b00904a7a24 */ /* 0x000fe400078e0291 */ /*1200*/ IMAD R78, R72, c[0x0][0x168], R13 ; /* 0x00005a00484e7a24 */ /* 0x000fe200078e020d */ /*1210*/ DMUL R180, R172, R172 ; /* 0x000000acacb47228 */ /* 0x000e620000000000 */ /*1220*/ IMAD R72, R144, c[0x0][0x16c], R143 ; /* 0x00005b0090487a24 */ /* 0x000fe400078e028f */ /*1230*/ IMAD R73, R142, R89, 0x1 ; /* 0x000000018e497424 */ /* 0x000fe200078e0259 */ /*1240*/ DFMA R70, R140, R168, R70 ; /* 0x000000a88c46722b */ /* 0x001e220000000046 */ /*1250*/ IMAD R82, R76, c[0x0][0x168], R13 ; /* 0x00005a004c527a24 */ /* 0x000fc400078e020d */ /*1260*/ IMAD R90, R72, c[0x0][0x168], R13.reuse ; /* 0x00005a00485a7a24 */ /* 0x100fe200078e020d */ /*1270*/ DMUL R182, R30, R68 ; /* 0x000000441eb67228 */ /* 0x0005e20000000000 */ /*1280*/ IMAD R92, R74, c[0x0][0x168], R13 ; /* 0x00005a004a5c7a24 */ /* 0x000fe200078e020d */ /*1290*/ MOV R68, c[0x3][0x158] ; /* 0x00c0560000447a02 */ /* 0x004fe20000000f00 */ /*12a0*/ IMAD R86, R148, c[0x0][0x16c], R145.reuse ; /* 0x00005b0094567a24 */ /* 0x100fe200078e0291 */ /*12b0*/ DFMA R178, R168, R168, R180 ; /* 0x000000a8a8b2722b */ /* 0x002e6200000000b4 */ /*12c0*/ IMAD R84, R142, c[0x0][0x16c], R145 ; /* 0x00005b008e547a24 */ /* 0x000fe400078e0291 */ /*12d0*/ IMAD R72, R146.reuse, c[0x0][0x16c], R143 ; /* 0x00005b0092487a24 */ /* 0x040fe200078e028f */ /*12e0*/ DFMA R184, R156, R170, R70 ; /* 0x000000aa9cb8722b */ /* 0x001e220000000046 */ /*12f0*/ IMAD R76, R146, c[0x0][0x16c], R145 ; /* 0x00005b00924c7a24 */ /* 0x000fc400078e0291 */ /*1300*/ IMAD R74, R148, c[0x0][0x16c], R143 ; /* 0x00005b00944a7a24 */ /* 0x000fe200078e028f */ /*1310*/ DMUL R64, R64, 0.5 ; /* 0x3fe0000040407828 */ /* 0x000ea20000000000 */ /*1320*/ IMAD R73, R73, c[0x0][0x168], R0 ; /* 0x00005a0049497a24 */ /* 0x000fe400078e0200 */ /*1330*/ IMAD R75, R144, R89, 0x1 ; /* 0x00000001904b7424 */ /* 0x000fe200078e0259 */ /*1340*/ DMUL R150, R150, 0.5 ; /* 0x3fe0000096967828 */ /* 0x000ee20000000000 */ /*1350*/ IMAD R108, R86, c[0x0][0x168], R13.reuse ; /* 0x00005a00566c7a24 */ /* 0x100fe200078e020d */ /*1360*/ IADD3 R88, R73, c[0x0][0x168], RZ ; /* 0x00005a0049587a10 */ /* 0x000fe20007ffe0ff */ /*1370*/ IMAD R84, R84, c[0x0][0x168], R13.reuse ; /* 0x00005a0054547a24 */ /* 0x100fe200078e020d */ /*1380*/ DMUL R66, R44, R66 ; /* 0x000000422c427228 */ /* 0x0008220000000000 */ /*1390*/ IMAD R98, R72, c[0x0][0x168], R13 ; /* 0x00005a0048627a24 */ /* 0x000fc400078e020d */ /*13a0*/ IMAD R100, R76, c[0x0][0x168], R13.reuse ; /* 0x00005a004c647a24 */ /* 0x100fe200078e020d */ /*13b0*/ DFMA R178, R170, R170, R178 ; /* 0x000000aaaab2722b */ /* 0x00286200000000b2 */ /*13c0*/ IMAD R106, R74, c[0x0][0x168], R13 ; /* 0x00005a004a6a7a24 */ /* 0x000fe400078e020d */ /*13d0*/ IMAD R86, R75, c[0x0][0x168], R0 ; /* 0x00005a004b567a24 */ /* 0x000fe200078e0200 */ /*13e0*/ DMUL R184, R184, 0.5 ; /* 0x3fe00000b8b87828 */ /* 0x001e220000000000 */ /*13f0*/ IMAD R13, R12, R89.reuse, 0x1 ; /* 0x000000010c0d7424 */ /* 0x080fe400078e0259 */ /*1400*/ IMAD R87, R146, R89, 0x1 ; /* 0x0000000192577424 */ /* 0x000fe200078e0259 */ /*1410*/ IADD3 R96, R86, c[0x0][0x168], RZ ; /* 0x00005a0056607a10 */ /* 0x000fe20007ffe0ff */ /*1420*/ IMAD.WIDE R74, R73, R111, c[0x0][0x160] ; /* 0x00005800494a7625 */ /* 0x000fc800078e026f */ /*1430*/ IMAD R73, R148, R89, 0x1 ; /* 0x0000000194497424 */ /* 0x000fe400078e0259 */ /*1440*/ IMAD R72, R13, c[0x0][0x168], R0.reuse ; /* 0x00005a000d487a24 */ /* 0x100fe400078e0200 */ /*1450*/ IMAD R94, R87, c[0x0][0x168], R0.reuse ; /* 0x00005a00575e7a24 */ /* 0x100fe400078e0200 */ /*1460*/ IMAD R73, R73, c[0x0][0x168], R0 ; /* 0x00005a0049497a24 */ /* 0x000fe200078e0200 */ /*1470*/ IADD3 R76, R72, c[0x0][0x168], RZ ; /* 0x00005a00484c7a10 */ /* 0x000fe20007ffe0ff */ /*1480*/ IMAD.MOV.U32 R69, RZ, RZ, c[0x3][0x15c] ; /* 0x00c05700ff457624 */ /* 0x000fe200078e00ff */ /*1490*/ IADD3 R104, R94, c[0x0][0x168], RZ ; /* 0x00005a005e687a10 */ /* 0x000fe20007ffe0ff */ /*14a0*/ IMAD.WIDE R70, R72, R111, c[0x0][0x160] ; /* 0x0000580048467625 */ /* 0x000fe200078e026f */ /*14b0*/ IADD3 R110, R73, c[0x0][0x168], RZ ; /* 0x00005a00496e7a10 */ /* 0x000fc60007ffe0ff */ /*14c0*/ DMUL R68, R68, 0.5 ; /* 0x3fe0000044447828 */ /* 0x000e220000000000 */ /*14d0*/ IMAD.WIDE R76, R76, R111, c[0x0][0x160] ; /* 0x000058004c4c7625 */ /* 0x000fc800078e026f */ /*14e0*/ IMAD.WIDE R78, R78, R111, c[0x0][0x160] ; /* 0x000058004e4e7625 */ /* 0x000fc800078e026f */ /*14f0*/ IMAD.WIDE R80, R80, R111, c[0x0][0x160] ; /* 0x0000580050507625 */ /* 0x000fc800078e026f */ /*1500*/ IMAD.WIDE R82, R82, R111, c[0x0][0x160] ; /* 0x0000580052527625 */ /* 0x000fc800078e026f */ /*1510*/ IMAD.WIDE R84, R84, R111, c[0x0][0x160] ; /* 0x0000580054547625 */ /* 0x000fc800078e026f */ /*1520*/ IMAD.WIDE R86, R86, R111, c[0x0][0x160] ; /* 0x0000580056567625 */ /* 0x000fc800078e026f */ /*1530*/ IMAD.WIDE R88, R88, R111, c[0x0][0x160] ; /* 0x0000580058587625 */ /* 0x000fc800078e026f */ /*1540*/ IMAD.WIDE R90, R90, R111, c[0x0][0x160] ; /* 0x000058005a5a7625 */ /* 0x000fc800078e026f */ /*1550*/ IMAD.WIDE R92, R92, R111, c[0x0][0x160] ; /* 0x000058005c5c7625 */ /* 0x000fc800078e026f */ /*1560*/ IMAD.WIDE R94, R94, R111, c[0x0][0x160] ; /* 0x000058005e5e7625 */ /* 0x000fc800078e026f */ /*1570*/ IMAD.WIDE R96, R96, R111, c[0x0][0x160] ; /* 0x0000580060607625 */ /* 0x000fc800078e026f */ /*1580*/ IMAD.WIDE R98, R98, R111, c[0x0][0x160] ; /* 0x0000580062627625 */ /* 0x000fc800078e026f */ /*1590*/ IMAD.WIDE R100, R100, R111, c[0x0][0x160] ; /* 0x0000580064647625 */ /* 0x000fc800078e026f */ /*15a0*/ IMAD.WIDE R102, R73, R111, c[0x0][0x160] ; /* 0x0000580049667625 */ /* 0x000fc800078e026f */ /*15b0*/ IMAD.WIDE R104, R104, R111, c[0x0][0x160] ; /* 0x0000580068687625 */ /* 0x000fc800078e026f */ /*15c0*/ IMAD.WIDE R106, R106, R111, c[0x0][0x160] ; /* 0x000058006a6a7625 */ /* 0x000fc800078e026f */ /*15d0*/ IMAD.WIDE R108, R108, R111, c[0x0][0x160] ; /* 0x000058006c6c7625 */ /* 0x000fc800078e026f */ /*15e0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x1 ; /* 0x00000001ff0d7424 */ /* 0x000fe400078e00ff */ /*15f0*/ IMAD.WIDE R110, R110, R111, c[0x0][0x160] ; /* 0x000058006e6e7625 */ /* 0x01ffc800078e026f */ /*1600*/ IMAD R113, R142, c[0x0][0x16c], R13.reuse ; /* 0x00005b008e717a24 */ /* 0x101fe200078e020d */ /*1610*/ MOV R120, 0x8 ; /* 0x0000000800787802 */ /* 0x000fe20000000f00 */ /*1620*/ IMAD R115, R144, c[0x0][0x16c], R13 ; /* 0x00005b0090737a24 */ /* 0x000fe400078e020d */ /*1630*/ IMAD R113, R113, c[0x0][0x168], R0.reuse ; /* 0x00005a0071717a24 */ /* 0x100fe400078e0200 */ /*1640*/ IMAD R115, R115, c[0x0][0x168], R0 ; /* 0x00005a0073737a24 */ /* 0x000fe400078e0200 */ /*1650*/ IMAD.WIDE R112, R113, R120, c[0x0][0x160] ; /* 0x0000580071707625 */ /* 0x000fc800078e0278 */ /*1660*/ IMAD.WIDE R114, R115, R120, c[0x0][0x160] ; /* 0x0000580073727625 */ /* 0x000fe200078e0278 */ /*1670*/ LDG.E.64 R176, [R112.64+0x8] ; /* 0x0000080670b07981 */ /* 0x000ea8000c1e1b00 */ /*1680*/ LDG.E.64 R154, [R114.64+0x8] ; /* 0x00000806729a7981 */ /* 0x000ee2000c1e1b00 */ /*1690*/ IMAD R117, R146, c[0x0][0x16c], R13.reuse ; /* 0x00005b0092757a24 */ /* 0x100fe400078e020d */ /*16a0*/ IMAD R119, R148, c[0x0][0x16c], R13 ; /* 0x00005b0094777a24 */ /* 0x000fe400078e020d */ /*16b0*/ IMAD R117, R117, c[0x0][0x168], R0 ; /* 0x00005a0075757a24 */ /* 0x000fc400078e0200 */ /*16c0*/ IMAD R119, R119, c[0x0][0x168], R0 ; /* 0x00005a0077777a24 */ /* 0x000fe400078e0200 */ /*16d0*/ IMAD.WIDE R116, R117, R120, c[0x0][0x160] ; /* 0x0000580075747625 */ /* 0x000fca00078e0278 */ /*16e0*/ LDG.E.64 R164, [R116.64+0x8] ; /* 0x0000080674a47981 */ /* 0x000f22000c1e1b00 */ /*16f0*/ IMAD.WIDE R118, R119, R120, c[0x0][0x160] ; /* 0x0000580077767625 */ /* 0x000fca00078e0278 */ /*1700*/ LDG.E.64 R166, [R118.64+0x8] ; /* 0x0000080676a67981 */ /* 0x000f62000c1e1b00 */ /*1710*/ IMAD R121, R12, c[0x0][0x16c], R13 ; /* 0x00005b000c797a24 */ /* 0x000fc800078e020d */ /*1720*/ IMAD R121, R121, c[0x0][0x168], R0 ; /* 0x00005a0079797a24 */ /* 0x000fc800078e0200 */ /*1730*/ IMAD.WIDE R120, R121, R120, c[0x0][0x160] ; /* 0x0000580079787625 */ /* 0x000fca00078e0278 */ /*1740*/ LDG.E.64 R162, [R120.64+0x8] ; /* 0x0000080678a27981 */ /* 0x000f22000c1e1b00 */ /*1750*/ IMAD.MOV.U32 R122, RZ, RZ, R58 ; /* 0x000000ffff7a7224 */ /* 0x000fe200078e003a */ /*1760*/ MOV R123, R59 ; /* 0x0000003b007b7202 */ /* 0x000fe20000000f00 */ /*1770*/ IMAD.MOV.U32 R124, RZ, RZ, R56 ; /* 0x000000ffff7c7224 */ /* 0x000fe200078e0038 */ /*1780*/ MOV R125, R57 ; /* 0x00000039007d7202 */ /* 0x000fe20000000f00 */ /*1790*/ IMAD.MOV.U32 R58, RZ, RZ, R168 ; /* 0x000000ffff3a7224 */ /* 0x000fe200078e00a8 */ /*17a0*/ MOV R59, R169 ; /* 0x000000a9003b7202 */ /* 0x000fe20000000f00 */ /*17b0*/ IMAD.MOV.U32 R56, RZ, RZ, R170 ; /* 0x000000ffff387224 */ /* 0x000fe200078e00aa */ /*17c0*/ DADD R128, R122, R122 ; /* 0x000000007a807229 */ /* 0x000e22000000007a */ /*17d0*/ MOV R57, R171 ; /* 0x000000ab00397202 */ /* 0x000fe20000000f00 */ /*17e0*/ IMAD.MOV.U32 R126, RZ, RZ, R62 ; /* 0x000000ffff7e7224 */ /* 0x000fe200078e003e */ /*17f0*/ MOV R127, R63 ; /* 0x0000003f007f7202 */ /* 0x000fe20000000f00 */ /*1800*/ DADD R130, R124, R124 ; /* 0x000000007c827229 */ /* 0x000e62000000007c */ /*1810*/ IMAD.MOV.U32 R62, RZ, RZ, R178 ; /* 0x000000ffff3e7224 */ /* 0x000fe200078e00b2 */ /*1820*/ MOV R63, R179 ; /* 0x000000b3003f7202 */ /* 0x000fc40000000f00 */ /*1830*/ DADD R128, R58, -R128 ; /* 0x000000003a807229 */ /* 0x001e220000000880 */ /*1840*/ IADD3 R147, R13.reuse, 0x2, RZ ; /* 0x000000020d937810 */ /* 0x040fe40007ffe0ff */ /*1850*/ ISETP.NE.AND P1, PT, R13, 0x1, PT ; /* 0x000000010d00780c */ /* 0x000fe20003f25270 */ /*1860*/ DADD R130, R56, -R130 ; /* 0x0000000038827229 */ /* 0x002e620000000882 */ /*1870*/ ISETP.GE.AND P0, PT, R147, c[0x0][0x16c], PT ; /* 0x00005b0093007a0c */ /* 0x000fc60003f06270 */ /*1880*/ DADD R168, R126, R126 ; /* 0x000000007ea87229 */ /* 0x000e08000000007e */ /*1890*/ DADD R178, R128, R50 ; /* 0x0000000080b27229 */ /* 0x0011e40000000032 */ /*18a0*/ IMAD.MOV.U32 R128, RZ, RZ, R54 ; /* 0x000000ffff807224 */ /* 0x001fe200078e0036 */ /*18b0*/ MOV R129, R55 ; /* 0x0000003700817202 */ /* 0x000fe20000000f00 */ /*18c0*/ DADD R170, R130, R46 ; /* 0x0000000082aa7229 */ /* 0x0021e2000000002e */ /*18d0*/ IMAD.MOV.U32 R54, RZ, RZ, R180 ; /* 0x000000ffff367224 */ /* 0x000fe200078e00b4 */ /*18e0*/ MOV R47, R31 ; /* 0x0000001f002f7202 */ /* 0x001fe20000000f00 */ /*18f0*/ IMAD.MOV.U32 R46, RZ, RZ, R30 ; /* 0x000000ffff2e7224 */ /* 0x000fe200078e001e */ /*1900*/ DADD R168, R62, -R168 ; /* 0x000000003ea87229 */ /* 0x000e2200000008a8 */ /*1910*/ MOV R55, R181 ; /* 0x000000b500377202 */ /* 0x000fe20000000f00 */ /*1920*/ IMAD.MOV.U32 R130, RZ, RZ, R64 ; /* 0x000000ffff827224 */ /* 0x000fe200078e0040 */ /*1930*/ MOV R131, R65 ; /* 0x0000004100837202 */ /* 0x000fe20000000f00 */ /*1940*/ DMUL R50, R150, c[0x2][0x0] ; /* 0x0080000096327a28 */ /* 0x000e620000000000 */ /*1950*/ IMAD.MOV.U32 R64, RZ, RZ, R184 ; /* 0x000000ffff407224 */ /* 0x000fe200078e00b8 */ /*1960*/ MOV R65, R185 ; /* 0x000000b900417202 */ /* 0x000fc40000000f00 */ /*1970*/ DADD R30, R128, R128 ; /* 0x00000000801e7229 */ /* 0x000e080000000080 */ /*1980*/ DADD R168, R168, R52 ; /* 0x00000000a8a87229 */ /* 0x0011e40000000034 */ /*1990*/ IMAD.MOV.U32 R52, RZ, RZ, R66 ; /* 0x000000ffff347224 */ /* 0x001fe200078e0042 */ /*19a0*/ MOV R53, R67 ; /* 0x0000004300357202 */ /* 0x000fe20000000f00 */ /*19b0*/ DFMA R50, R46, c[0x2][0x8], -R50 ; /* 0x008002002e327a2b */ /* 0x002e220000000832 */ /*19c0*/ IMAD.MOV.U32 R66, RZ, RZ, R174 ; /* 0x000000ffff427224 */ /* 0x000fe200078e00ae */ /*19d0*/ MOV R67, R175 ; /* 0x000000af00437202 */ /* 0x000fe40000000f00 */ /*19e0*/ DADD R184, R54, -R30 ; /* 0x0000000036b87229 */ /* 0x0003e4000000081e */ /*19f0*/ IMAD.MOV.U32 R30, RZ, RZ, R44 ; /* 0x000000ffff1e7224 */ /* 0x002fe200078e002c */ /*1a00*/ MOV R31, R45 ; /* 0x0000002d001f7202 */ /* 0x000fe20000000f00 */ /*1a10*/ DMUL R174, R64, c[0x2][0x0] ; /* 0x0080000040ae7a28 */ /* 0x000e620000000000 */ /*1a20*/ IMAD.MOV.U32 R44, RZ, RZ, R160 ; /* 0x000000ffff2c7224 */ /* 0x000fe200078e00a0 */ /*1a30*/ MOV R45, R161 ; /* 0x000000a1002d7202 */ /* 0x000fc40000000f00 */ /*1a40*/ DADD R188, R52, R52 ; /* 0x0000000034bc7229 */ /* 0x000e080000000034 */ /*1a50*/ DMUL R186, R50, R34 ; /* 0x0000002232ba7228 */ /* 0x0011e40000000000 */ /*1a60*/ IMAD.MOV.U32 R50, RZ, RZ, R60 ; /* 0x000000ffff327224 */ /* 0x001fe200078e003c */ /*1a70*/ MOV R51, R61 ; /* 0x0000003d00337202 */ /* 0x000fe20000000f00 */ /*1a80*/ IMAD.MOV.U32 R60, RZ, RZ, R172 ; /* 0x000000ffff3c7224 */ /* 0x000fe200078e00ac */ /*1a90*/ MOV R61, R173 ; /* 0x000000ad003d7202 */ /* 0x000fe20000000f00 */ /*1aa0*/ DFMA R180, R44, c[0x2][0x8], -R174 ; /* 0x008002002cb47a2b */ /* 0x002e0800000008ae */ /*1ab0*/ DADD R174, R184, R38 ; /* 0x00000000b8ae7229 */ /* 0x0003e40000000026 */ /*1ac0*/ IMAD.MOV.U32 R38, RZ, RZ, R24 ; /* 0x000000ffff267224 */ /* 0x002fe200078e0018 */ /*1ad0*/ MOV R39, R25 ; /* 0x0000001900277202 */ /* 0x000fe20000000f00 */ /*1ae0*/ DADD R188, R66, -R188 ; /* 0x0000000042bc7229 */ /* 0x000e6200000008bc */ /*1af0*/ IMAD.MOV.U32 R24, RZ, RZ, R36 ; /* 0x000000ffff187224 */ /* 0x000fe200078e0024 */ /*1b00*/ MOV R25, R37 ; /* 0x0000002500197202 */ /* 0x000fe20000000f00 */ /*1b10*/ IMAD.MOV.U32 R36, RZ, RZ, R140 ; /* 0x000000ffff247224 */ /* 0x000fe200078e008c */ /*1b20*/ DFMA R186, R60, R180, -R186 ; /* 0x000000b43cba722b */ /* 0x001fe200000008ba */ /*1b30*/ MOV R37, R141 ; /* 0x0000008d00257202 */ /* 0x000fc60000000f00 */ /*1b40*/ DADD R180, -R150, R46 ; /* 0x0000000096b47229 */ /* 0x000e08000000012e */ /*1b50*/ DMUL R150, R34, R38 ; /* 0x0000002622967228 */ /* 0x000e080000000000 */ /*1b60*/ DADD R172, R188, R182 ; /* 0x00000000bcac7229 */ /* 0x002fc800000000b6 */ /*1b70*/ DADD R182, R44, -R64 ; /* 0x000000002cb67229 */ /* 0x000e480000000840 */ /*1b80*/ DMUL R184, R180, c[0x2][0x0] ; /* 0x00800000b4b87a28 */ /* 0x001e080000000000 */ /*1b90*/ DFMA R180, R36, R60, -R150 ; /* 0x0000003c24b4722b */ /* 0x0001e40000000896 */ /*1ba0*/ IMAD.MOV.U32 R150, RZ, RZ, R26 ; /* 0x000000ffff967224 */ /* 0x001fe200078e001a */ /*1bb0*/ MOV R151, R27 ; /* 0x0000001b00977202 */ /* 0x000fe20000000f00 */ /*1bc0*/ IMAD.MOV.U32 R26, RZ, RZ, R40 ; /* 0x000000ffff1a7224 */ /* 0x000fe200078e0028 */ /*1bd0*/ MOV R27, R41 ; /* 0x00000029001b7202 */ /* 0x000fe20000000f00 */ /*1be0*/ IMAD.MOV.U32 R40, RZ, RZ, R152 ; /* 0x000000ffff287224 */ /* 0x000fe200078e0098 */ /*1bf0*/ MOV R41, R153 ; /* 0x0000009900297202 */ /* 0x000fe20000000f00 */ /*1c00*/ DMUL R182, R182, c[0x2][0x0] ; /* 0x00800000b6b67a28 */ /* 0x002e080000000000 */ /*1c10*/ DFMA R184, R34, R150, R184 ; /* 0x0000009622b8722b */ /* 0x000fc800000000b8 */ /*1c20*/ DFMA R182, R40, R60, R182 ; /* 0x0000003c28b6722b */ /* 0x001e0c00000000b6 */ /*1c30*/ DADD R182, R182, -R184 ; /* 0x00000000b6b67229 */ /* 0x001fc800000008b8 */ /*1c40*/ DFMA R176, -R180, c[0x3][0x20], R176 ; /* 0x00c00800b4b07a2b */ /* 0x004e0800000001b0 */ /*1c50*/ DADD R180, R50, R50 ; /* 0x0000000032b47229 */ /* 0x000e480000000032 */ /*1c60*/ DFMA R176, R178, c[0x3][0x150], R176 ; /* 0x00c05400b2b07a2b */ /* 0x001fc800000000b0 */ /*1c70*/ DFMA R182, -R182, c[0x3][0x20], R154 ; /* 0x00c00800b6b67a2b */ /* 0x0081e4000000019a */ /*1c80*/ IMAD.MOV.U32 R154, RZ, RZ, R28 ; /* 0x000000ffff9a7224 */ /* 0x001fe200078e001c */ /*1c90*/ MOV R155, R29 ; /* 0x0000001d009b7202 */ /* 0x000fe20000000f00 */ /*1ca0*/ DADD R178, R24, R24 ; /* 0x0000000018b27229 */ /* 0x000e220000000018 */ /*1cb0*/ IMAD.MOV.U32 R28, RZ, RZ, R42 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e002a */ /*1cc0*/ MOV R29, R43 ; /* 0x0000002b001d7202 */ /* 0x000fe20000000f00 */ /*1cd0*/ IMAD.MOV.U32 R42, RZ, RZ, R156 ; /* 0x000000ffff2a7224 */ /* 0x000fe200078e009c */ /*1ce0*/ DADD R180, R60, -R180 ; /* 0x000000003cb47229 */ /* 0x002e6200000008b4 */ /*1cf0*/ MOV R43, R157 ; /* 0x0000009d002b7202 */ /* 0x000fc60000000f00 */ /*1d00*/ DADD R178, R36, -R178 ; /* 0x0000000024b27229 */ /* 0x001e0800000008b2 */ /*1d10*/ DMUL R184, R34, R154 ; /* 0x0000009a22b87228 */ /* 0x000e880000000000 */ /*1d20*/ DADD R180, R180, R34 ; /* 0x00000000b4b47229 */ /* 0x002fc80000000022 */ /*1d30*/ DADD R34, R178, R38 ; /* 0x00000000b2227229 */ /* 0x001e080000000026 */ /*1d40*/ DFMA R184, R42, R60, -R184 ; /* 0x0000003c2ab8722b */ /* 0x004f0800000008b8 */ /*1d50*/ DFMA R34, R34, c[0x3][0x178], R176 ; /* 0x00c05e0022227a2b */ /* 0x001fc800000000b0 */ /*1d60*/ DFMA R184, -R184, c[0x3][0x20], R164 ; /* 0x00c00800b8b87a2b */ /* 0x010fc800000001a4 */ /*1d70*/ DADD R164, R26, R26 ; /* 0x000000001aa47229 */ /* 0x000e08000000001a */ /*1d80*/ DADD R176, R28, R28 ; /* 0x000000001cb07229 */ /* 0x000e48000000001c */ /*1d90*/ DADD R164, R40, -R164 ; /* 0x0000000028a47229 */ /* 0x001e0800000008a4 */ /*1da0*/ DADD R176, R42, -R176 ; /* 0x000000002ab07229 */ /* 0x002e4800000008b0 */ /*1db0*/ DFMA R166, -R186, c[0x3][0x20], R166 ; /* 0x00c00800baa67a2b */ /* 0x020e8800000001a6 */ /*1dc0*/ DFMA R180, R180, c[0x3][0x148], R182 ; /* 0x00c05200b4b47a2b */ /* 0x000fc800000000b6 */ /*1dd0*/ DFMA R170, R170, c[0x3][0x150], R184 ; /* 0x00c05400aaaa7a2b */ /* 0x000fc800000000b8 */ /*1de0*/ DADD R164, R164, R150 ; /* 0x00000000a4a47229 */ /* 0x001e080000000096 */ /*1df0*/ DADD R176, R176, R154 ; /* 0x00000000b0b07229 */ /* 0x002e48000000009a */ /*1e00*/ DFMA R178, R68, R168, R166 ; /* 0x000000a844b2722b */ /* 0x004e8800000000a6 */ /*1e10*/ DFMA R166, R164, c[0x3][0x180], R180 ; /* 0x00c06000a4a67a2b */ /* 0x0011e400000000b4 */ /*1e20*/ IMAD.MOV.U32 R164, RZ, RZ, R32 ; /* 0x000000ffffa47224 */ /* 0x001fe200078e0020 */ /*1e30*/ MOV R165, R33 ; /* 0x0000002100a57202 */ /* 0x000fe20000000f00 */ /*1e40*/ DFMA R168, R176, c[0x3][0x188], R170 ; /* 0x00c06200b0a87a2b */ /* 0x002fe200000000aa */ /*1e50*/ IMAD.MOV.U32 R32, RZ, RZ, R48 ; /* 0x000000ffff207224 */ /* 0x000fe200078e0030 */ /*1e60*/ MOV R33, R49 ; /* 0x0000003100217202 */ /* 0x000fe20000000f00 */ /*1e70*/ IMAD.MOV.U32 R48, RZ, RZ, R158 ; /* 0x000000ffff307224 */ /* 0x000fe200078e009e */ /*1e80*/ DADD R170, R40, -R150 ; /* 0x0000000028aa7229 */ /* 0x000e220000000896 */ /*1e90*/ MOV R49, R159 ; /* 0x0000009f00317202 */ /* 0x000fc60000000f00 */ /*1ea0*/ DFMA R174, R174, c[0x3][0x160], R178 ; /* 0x00c05800aeae7a2b */ /* 0x004e4800000000b2 */ /*1eb0*/ DFMA R170, -R170, c[0x3][0x20], R162 ; /* 0x00c00800aaaa7a2b */ /* 0x001fc800000001a2 */ /*1ec0*/ DFMA R172, R172, c[0x3][0x168], R174 ; /* 0x00c05a00acac7a2b */ /* 0x002fc800000000ae */ /*1ed0*/ DADD R162, R32, R32 ; /* 0x0000000020a27229 */ /* 0x000e080000000020 */ /*1ee0*/ DADD R174, R30, R30 ; /* 0x000000001eae7229 */ /* 0x000e48000000001e */ /*1ef0*/ DADD R162, R48, -R162 ; /* 0x0000000030a27229 */ /* 0x001e0800000008a2 */ /*1f00*/ DADD R174, R44, -R174 ; /* 0x000000002cae7229 */ /* 0x002e4800000008ae */ /*1f10*/ DADD R162, R162, R164 ; /* 0x00000000a2a27229 */ /* 0x001e0800000000a4 */ /*1f20*/ DADD R174, R174, R46 ; /* 0x00000000aeae7229 */ /* 0x002e48000000002e */ /*1f30*/ DFMA R170, R162, c[0x3][0x170], R170 ; /* 0x00c05c00a2aa7a2b */ /* 0x00108800000000aa */ /*1f40*/ DFMA R162, R174, c[0x3][0x190], R172 ; /* 0x00c06400aea27a2b */ /* 0x00206200000000ac */ /*1f50*/ @P0 BRA 0x21b0 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*1f60*/ I2F.F64 R140, R147 ; /* 0x00000093008c7312 */ /* 0x004ea20000201c00 */ /*1f70*/ IMAD.MOV.U32 R152, RZ, RZ, c[0x3][0x3a0] ; /* 0x00c0e800ff987624 */ /* 0x000fe200078e00ff */ /*1f80*/ MOV R153, c[0x3][0x3a4] ; /* 0x00c0e90000997a02 */ /* 0x000fe20000000f00 */ /*1f90*/ IMAD.MOV.U32 R156, RZ, RZ, c[0x3][0x3a8] ; /* 0x00c0ea00ff9c7624 */ /* 0x000fe200078e00ff */ /*1fa0*/ MOV R157, c[0x3][0x3ac] ; /* 0x00c0eb00009d7a02 */ /* 0x000fe20000000f00 */ /*1fb0*/ IMAD.MOV.U32 R158, RZ, RZ, c[0x3][0x3b0] ; /* 0x00c0ec00ff9e7624 */ /* 0x000fe200078e00ff */ /*1fc0*/ MOV R159, c[0x3][0x3b4] ; /* 0x00c0ed00009f7a02 */ /* 0x000fe20000000f00 */ /*1fd0*/ IMAD.MOV.U32 R160, RZ, RZ, c[0x3][0x3b8] ; /* 0x00c0ee00ffa07624 */ /* 0x000fe200078e00ff */ /*1fe0*/ MOV R161, c[0x3][0x3bc] ; /* 0x00c0ef0000a17a02 */ /* 0x000fe20000000f00 */ /*1ff0*/ IMAD.MOV.U32 R172, RZ, RZ, c[0x3][0x3c0] ; /* 0x00c0f000ffac7624 */ /* 0x001fe200078e00ff */ /*2000*/ MOV R173, c[0x3][0x3c4] ; /* 0x00c0f10000ad7a02 */ /* 0x000fe20000000f00 */ /*2010*/ DMUL R140, R140, c[0x3][0x68] ; /* 0x00c01a008c8c7a28 */ /* 0x004e0c0000000000 */ /*2020*/ DFMA R152, R140, R152, c[0x3][0x328] ; /* 0x00c0ca008c98762b */ /* 0x001e080000000098 */ /*2030*/ DFMA R156, R140, R156, c[0x3][0x330] ; /* 0x00c0cc008c9c762b */ /* 0x000e88000000009c */ /*2040*/ DFMA R158, R140, R158, c[0x3][0x338] ; /* 0x00c0ce008c9e762b */ /* 0x000ec8000000009e */ /*2050*/ DFMA R160, R140, R160, c[0x3][0x340] ; /* 0x00c0d0008ca0762b */ /* 0x000f0800000000a0 */ /*2060*/ DFMA R172, R140, R172, c[0x3][0x348] ; /* 0x00c0d2008cac762b */ /* 0x000f4800000000ac */ /*2070*/ DFMA R152, R140, R152, c[0x3][0x2b0] ; /* 0x00c0ac008c98762b */ /* 0x001e080000000098 */ /*2080*/ DFMA R156, R140, R156, c[0x3][0x2b8] ; /* 0x00c0ae008c9c762b */ /* 0x004e88000000009c */ /*2090*/ DFMA R158, R140, R158, c[0x3][0x2c0] ; /* 0x00c0b0008c9e762b */ /* 0x008ec8000000009e */ /*20a0*/ DFMA R160, R140, R160, c[0x3][0x2c8] ; /* 0x00c0b2008ca0762b */ /* 0x010f0800000000a0 */ /*20b0*/ DFMA R174, R140, R172, c[0x3][0x2d0] ; /* 0x00c0b4008cae762b */ /* 0x020f4800000000ac */ /*20c0*/ DFMA R152, R140, R152, c[0x3][0x238] ; /* 0x00c08e008c98762b */ /* 0x001e080000000098 */ /*20d0*/ DFMA R156, R140, R156, c[0x3][0x240] ; /* 0x00c090008c9c762b */ /* 0x004e88000000009c */ /*20e0*/ DFMA R158, R140, R158, c[0x3][0x248] ; /* 0x00c092008c9e762b */ /* 0x008ec8000000009e */ /*20f0*/ DFMA R172, R140, R160, c[0x3][0x250] ; /* 0x00c094008cac762b */ /* 0x010f0800000000a0 */ /*2100*/ DFMA R174, R140, R174, c[0x3][0x258] ; /* 0x00c096008cae762b */ /* 0x020f4800000000ae */ /*2110*/ DFMA R152, R140, R152, R2 ; /* 0x000000988c98722b */ /* 0x001e080000000002 */ /*2120*/ DFMA R156, R140, R156, R4 ; /* 0x0000009c8c9c722b */ /* 0x004e880000000004 */ /*2130*/ DFMA R160, R140, R158, R6 ; /* 0x0000009e8ca0722b */ /* 0x008ec80000000006 */ /*2140*/ DFMA R172, R140, R172, R8 ; /* 0x000000ac8cac722b */ /* 0x010f080000000008 */ /*2150*/ DFMA R174, R140, R174, R10 ; /* 0x000000ae8cae722b */ /* 0x020f48000000000a */ /*2160*/ DADD R158, R14, R152 ; /* 0x000000000e9e7229 */ /* 0x0010480000000098 */ /*2170*/ DADD R140, R16, R156 ; /* 0x00000000108c7229 */ /* 0x004088000000009c */ /*2180*/ DADD R152, R18, R160 ; /* 0x0000000012987229 */ /* 0x0080c800000000a0 */ /*2190*/ DADD R156, R20, R172 ; /* 0x00000000149c7229 */ /* 0x01010800000000ac */ /*21a0*/ DADD R160, R22, R174 ; /* 0x0000000016a07229 */ /* 0x02000c00000000ae */ /*21b0*/ @!P1 BRA 0x2920 ; /* 0x0000076000009947 */ /* 0x01efea0003800000 */ /*21c0*/ ISETP.NE.AND P0, PT, R13, 0x2, PT ; /* 0x000000020d00780c */ /* 0x000fda0003f05270 */ /*21d0*/ @!P0 BRA 0x2730 ; /* 0x0000055000008947 */ /* 0x000fea0003800000 */ /*21e0*/ ISETP.GE.AND P0, PT, R13.reuse, R143, PT ; /* 0x0000008f0d00720c */ /* 0x040fe40003f06270 */ /*21f0*/ ISETP.GT.U32.AND P1, PT, R13, 0x2, PT ; /* 0x000000020d00780c */ /* 0x000fda0003f24070 */ /*2200*/ @!P0 BRA P1, 0x2540 ; /* 0x0000033000008947 */ /* 0x000fea0000800000 */ /*2210*/ ISETP.NE.AND P0, PT, R13, R143, PT ; /* 0x0000008f0d00720c */ /* 0x000fda0003f05270 */ /*2220*/ @!P0 BRA 0x23a0 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*2230*/ ISETP.NE.AND P0, PT, R13, R145, PT ; /* 0x000000910d00720c */ /* 0x000fda0003f05270 */ /*2240*/ @P0 BRA 0x2ab0 ; /* 0x0000086000000947 */ /* 0x000fea0003800000 */ /*2250*/ DFMA R114, R38, -4, R134 ; /* 0xc01000002672782b */ /* 0x000e480000000086 */ /*2260*/ DFMA R112, R164, -4, R132 ; /* 0xc0100000a470782b */ /* 0x000fc80000000084 */ /*2270*/ DFMA R114, R24, 5, R114 ; /* 0x401400001872782b */ /* 0x002e480000000072 */ /*2280*/ DFMA R116, R150, -4, R136 ; /* 0xc01000009674782b */ /* 0x000e880000000088 */ /*2290*/ DFMA R114, R114, -0.25, R34 ; /* 0xbfd000007272782b */ /* 0x002fc80000000022 */ /*22a0*/ DFMA R34, R154, -4, R138 ; /* 0xc01000009a22782b */ /* 0x000e48000000008a */ /*22b0*/ DFMA R72, R46, -4, R72 ; /* 0xc01000002e48782b */ /* 0x000ec80000000048 */ /*22c0*/ DFMA R112, R32, 5, R112 ; /* 0x401400002070782b */ /* 0x000f080000000070 */ /*22d0*/ DFMA R116, R26, 5, R116 ; /* 0x401400001a74782b */ /* 0x004e880000000074 */ /*22e0*/ DFMA R34, R28, 5, R34 ; /* 0x401400001c22782b */ /* 0x002fc80000000022 */ /*22f0*/ DFMA R72, R30, 5, R72 ; /* 0x401400001e48782b */ /* 0x008fc80000000048 */ /*2300*/ DFMA R112, R112, -0.25, R170 ; /* 0xbfd000007070782b */ /* 0x010e4800000000aa */ /*2310*/ DFMA R116, R116, -0.25, R166 ; /* 0xbfd000007474782b */ /* 0x004e8600000000a6 */ /*2320*/ STG.E.64 [R82.64], R112 ; /* 0x0000007052007986 */ /* 0x0023e2000c101b06 */ /*2330*/ DFMA R34, R34, -0.25, R168 ; /* 0xbfd000002222782b */ /* 0x000ec600000000a8 */ /*2340*/ STG.E.64 [R84.64], R114 ; /* 0x0000007254007986 */ /* 0x0003e2000c101b06 */ /*2350*/ DFMA R72, R72, -0.25, R162 ; /* 0xbfd000004848782b */ /* 0x000f0600000000a2 */ /*2360*/ STG.E.64 [R92.64], R116 ; /* 0x000000745c007986 */ /* 0x0043e8000c101b06 */ /*2370*/ STG.E.64 [R100.64], R34 ; /* 0x0000002264007986 */ /* 0x0083e8000c101b06 */ /*2380*/ STG.E.64 [R108.64], R72 ; /* 0x000000486c007986 */ /* 0x0103e2000c101b06 */ /*2390*/ BRA 0x2ab0 ; /* 0x0000071000007947 */ /* 0x000fea0003800000 */ /*23a0*/ DFMA R114, R38, -4, R134 ; /* 0xc01000002672782b */ /* 0x000e480000000086 */ /*23b0*/ DFMA R112, R164, -4, R132 ; /* 0xc0100000a470782b */ /* 0x000fc80000000084 */ /*23c0*/ DFMA R114, R24, 6, R114 ; /* 0x401800001872782b */ /* 0x002e480000000072 */ /*23d0*/ DFMA R116, R150, -4, R136 ; /* 0xc01000009674782b */ /* 0x000fc80000000088 */ /*23e0*/ DFMA R114, R36, -4, R114 ; /* 0xc01000002472782b */ /* 0x002e480000000072 */ /*23f0*/ DFMA R118, R154, -4, R138 ; /* 0xc01000009a76782b */ /* 0x000e88000000008a */ /*2400*/ DFMA R120, R46, -4, R72 ; /* 0xc01000002e78782b */ /* 0x000ec80000000048 */ /*2410*/ DFMA R112, R32, 6, R112 ; /* 0x401800002070782b */ /* 0x000f080000000070 */ /*2420*/ DFMA R114, R114, -0.25, R34 ; /* 0xbfd000007272782b */ /* 0x002fc80000000022 */ /*2430*/ DFMA R34, R26, 6, R116 ; /* 0x401800001a22782b */ /* 0x000e480000000074 */ /*2440*/ DFMA R72, R28, 6, R118 ; /* 0x401800001c48782b */ /* 0x004e880000000076 */ /*2450*/ DFMA R116, R30, 6, R120 ; /* 0x401800001e74782b */ /* 0x008ec80000000078 */ /*2460*/ DFMA R112, R48, -4, R112 ; /* 0xc01000003070782b */ /* 0x010f080000000070 */ /*2470*/ DFMA R34, R40, -4, R34 ; /* 0xc01000002822782b */ /* 0x002e480000000022 */ /*2480*/ DFMA R72, R42, -4, R72 ; /* 0xc01000002a48782b */ /* 0x004fc80000000048 */ /*2490*/ DFMA R116, R44, -4, R116 ; /* 0xc01000002c74782b */ /* 0x008fc80000000074 */ /*24a0*/ DFMA R112, R112, -0.25, R170 ; /* 0xbfd000007070782b */ /* 0x010e8800000000aa */ /*24b0*/ DFMA R34, R34, -0.25, R166 ; /* 0xbfd000002222782b */ /* 0x002e4600000000a6 */ /*24c0*/ STG.E.64 [R78.64], R112 ; /* 0x000000704e007986 */ /* 0x0045e2000c101b06 */ /*24d0*/ DFMA R72, R72, -0.25, R168 ; /* 0xbfd000004848782b */ /* 0x000ec600000000a8 */ /*24e0*/ STG.E.64 [R80.64], R114 ; /* 0x0000007250007986 */ /* 0x0005e2000c101b06 */ /*24f0*/ DFMA R116, R116, -0.25, R162 ; /* 0xbfd000007474782b */ /* 0x000f0600000000a2 */ /*2500*/ STG.E.64 [R90.64], R34 ; /* 0x000000225a007986 */ /* 0x0025e8000c101b06 */ /*2510*/ STG.E.64 [R98.64], R72 ; /* 0x0000004862007986 */ /* 0x0085e8000c101b06 */ /*2520*/ STG.E.64 [R106.64], R116 ; /* 0x000000746a007986 */ /* 0x0105e2000c101b06 */ /*2530*/ BRA 0x2ab0 ; /* 0x0000057000007947 */ /* 0x000fea0003800000 */ /*2540*/ DFMA R134, R38, -4, R134 ; /* 0xc01000002686782b */ /* 0x000e480000000086 */ /*2550*/ DFMA R132, R164, -4, R132 ; /* 0xc0100000a484782b */ /* 0x000fc80000000084 */ /*2560*/ DFMA R134, R24, 6, R134 ; /* 0x401800001886782b */ /* 0x002e480000000086 */ /*2570*/ DFMA R136, R150, -4, R136 ; /* 0xc01000009688782b */ /* 0x000fc80000000088 */ /*2580*/ DFMA R134, R36, -4, R134 ; /* 0xc01000002486782b */ /* 0x002e480000000086 */ /*2590*/ DFMA R132, R32, 6, R132 ; /* 0x401800002084782b */ /* 0x000fc80000000084 */ /*25a0*/ DADD R134, R140, R134 ; /* 0x000000008c867229 */ /* 0x002e480000000086 */ /*25b0*/ DFMA R136, R26, 6, R136 ; /* 0x401800001a88782b */ /* 0x000fc80000000088 */ /*25c0*/ DFMA R134, R134, -0.25, R34 ; /* 0xbfd000008686782b */ /* 0x002fc80000000022 */ /*25d0*/ DFMA R34, R154, -4, R138 ; /* 0xc01000009a22782b */ /* 0x000e48000000008a */ /*25e0*/ DFMA R138, R46, -4, R72 ; /* 0xc01000002e8a782b */ /* 0x000e880000000048 */ /*25f0*/ DFMA R72, R28, 6, R34 ; /* 0x401800001c48782b */ /* 0x002e480000000022 */ /*2600*/ DFMA R138, R30, 6, R138 ; /* 0x401800001e8a782b */ /* 0x004e88000000008a */ /*2610*/ DFMA R132, R48, -4, R132 ; /* 0xc01000003084782b */ /* 0x000ec80000000084 */ /*2620*/ DFMA R34, R40, -4, R136 ; /* 0xc01000002822782b */ /* 0x000f080000000088 */ /*2630*/ DFMA R72, R42, -4, R72 ; /* 0xc01000002a48782b */ /* 0x002e480000000048 */ /*2640*/ DFMA R136, R44, -4, R138 ; /* 0xc01000002c88782b */ /* 0x004e88000000008a */ /*2650*/ DADD R132, R158, R132 ; /* 0x000000009e847229 */ /* 0x008ec80000000084 */ /*2660*/ DADD R34, R152, R34 ; /* 0x0000000098227229 */ /* 0x010f080000000022 */ /*2670*/ DADD R72, R156, R72 ; /* 0x000000009c487229 */ /* 0x002fc80000000048 */ /*2680*/ DADD R136, R160, R136 ; /* 0x00000000a0887229 */ /* 0x005fc80000000088 */ /*2690*/ DFMA R132, R132, -0.25, R170 ; /* 0xbfd000008484782b */ /* 0x008e0800000000aa */ /*26a0*/ DFMA R34, R34, -0.25, R166 ; /* 0xbfd000002222782b */ /* 0x010e4600000000a6 */ /*26b0*/ STG.E.64 [R120.64+0x8], R132 ; /* 0x0000088478007986 */ /* 0x0011e2000c101b06 */ /*26c0*/ DFMA R72, R72, -0.25, R168 ; /* 0xbfd000004848782b */ /* 0x000e8600000000a8 */ /*26d0*/ STG.E.64 [R112.64+0x8], R134 ; /* 0x0000088670007986 */ /* 0x0001e2000c101b06 */ /*26e0*/ DFMA R136, R136, -0.25, R162 ; /* 0xbfd000008888782b */ /* 0x000ec600000000a2 */ /*26f0*/ STG.E.64 [R114.64+0x8], R34 ; /* 0x0000082272007986 */ /* 0x0021e8000c101b06 */ /*2700*/ STG.E.64 [R116.64+0x8], R72 ; /* 0x0000084874007986 */ /* 0x0041e8000c101b06 */ /*2710*/ STG.E.64 [R118.64+0x8], R136 ; /* 0x0000088876007986 */ /* 0x0081e2000c101b06 */ /*2720*/ BRA 0x2ab0 ; /* 0x0000038000007947 */ /* 0x000fea0003800000 */ /*2730*/ DMUL R112, R38, 4 ; /* 0x4010000026707828 */ /* 0x000e480000000000 */ /*2740*/ DMUL R72, R164, 4 ; /* 0x40100000a4487828 */ /* 0x000fc80000000000 */ /*2750*/ DFMA R112, R24, 6, -R112 ; /* 0x401800001870782b */ /* 0x002e480000000870 */ /*2760*/ DMUL R114, R150, 4 ; /* 0x4010000096727828 */ /* 0x000fc80000000000 */ /*2770*/ DFMA R112, R36, -4, R112 ; /* 0xc01000002470782b */ /* 0x002e480000000070 */ /*2780*/ DMUL R116, R46, 4 ; /* 0x401000002e747828 */ /* 0x000fc80000000000 */ /*2790*/ DADD R112, R140, R112 ; /* 0x000000008c707229 */ /* 0x002e480000000070 */ /*27a0*/ DFMA R72, R32, 6, -R72 ; /* 0x401800002048782b */ /* 0x000fc80000000848 */ /*27b0*/ DFMA R112, R112, -0.25, R34 ; /* 0xbfd000007070782b */ /* 0x002fc80000000022 */ /*27c0*/ DMUL R34, R154, 4 ; /* 0x401000009a227828 */ /* 0x000e480000000000 */ /*27d0*/ DFMA R114, R26, 6, -R114 ; /* 0x401800001a72782b */ /* 0x000e880000000872 */ /*27e0*/ DFMA R34, R28, 6, -R34 ; /* 0x401800001c22782b */ /* 0x002e480000000822 */ /*27f0*/ DFMA R116, R30, 6, -R116 ; /* 0x401800001e74782b */ /* 0x000ec80000000874 */ /*2800*/ DFMA R72, R48, -4, R72 ; /* 0xc01000003048782b */ /* 0x000f080000000048 */ /*2810*/ DFMA R114, R40, -4, R114 ; /* 0xc01000002872782b */ /* 0x004e880000000072 */ /*2820*/ DFMA R34, R42, -4, R34 ; /* 0xc01000002a22782b */ /* 0x002e480000000022 */ /*2830*/ DFMA R116, R44, -4, R116 ; /* 0xc01000002c74782b */ /* 0x008ec80000000074 */ /*2840*/ DADD R72, R158, R72 ; /* 0x000000009e487229 */ /* 0x010f080000000048 */ /*2850*/ DADD R114, R152, R114 ; /* 0x0000000098727229 */ /* 0x004e880000000072 */ /*2860*/ DADD R34, R156, R34 ; /* 0x000000009c227229 */ /* 0x002fc80000000022 */ /*2870*/ DADD R116, R160, R116 ; /* 0x00000000a0747229 */ /* 0x009fc80000000074 */ /*2880*/ DFMA R72, R72, -0.25, R170 ; /* 0xbfd000004848782b */ /* 0x010e0800000000aa */ /*2890*/ DFMA R114, R114, -0.25, R166 ; /* 0xbfd000007272782b */ /* 0x004e4600000000a6 */ /*28a0*/ STG.E.64 [R76.64+0x8], R72 ; /* 0x000008484c007986 */ /* 0x0011e2000c101b06 */ /*28b0*/ DFMA R34, R34, -0.25, R168 ; /* 0xbfd000002222782b */ /* 0x000e8600000000a8 */ /*28c0*/ STG.E.64 [R88.64+0x8], R112 ; /* 0x0000087058007986 */ /* 0x0001e2000c101b06 */ /*28d0*/ DFMA R116, R116, -0.25, R162 ; /* 0xbfd000007474782b */ /* 0x000ec600000000a2 */ /*28e0*/ STG.E.64 [R96.64+0x8], R114 ; /* 0x0000087260007986 */ /* 0x0021e8000c101b06 */ /*28f0*/ STG.E.64 [R104.64+0x8], R34 ; /* 0x0000082268007986 */ /* 0x0041e8000c101b06 */ /*2900*/ STG.E.64 [R110.64+0x8], R116 ; /* 0x000008746e007986 */ /* 0x0081e2000c101b06 */ /*2910*/ BRA 0x2ab0 ; /* 0x0000019000007947 */ /* 0x000fea0003800000 */ /*2920*/ DMUL R112, R36, 4 ; /* 0x4010000024707828 */ /* 0x000e480000000000 */ /*2930*/ DMUL R72, R48, 4 ; /* 0x4010000030487828 */ /* 0x000fc80000000000 */ /*2940*/ DFMA R112, R24, 5, -R112 ; /* 0x401400001870782b */ /* 0x002e480000000870 */ /*2950*/ DMUL R114, R40, 4 ; /* 0x4010000028727828 */ /* 0x000fc80000000000 */ /*2960*/ DADD R112, R140, R112 ; /* 0x000000008c707229 */ /* 0x002e480000000070 */ /*2970*/ DMUL R116, R44, 4 ; /* 0x401000002c747828 */ /* 0x000fc80000000000 */ /*2980*/ DFMA R112, R112, -0.25, R34 ; /* 0xbfd000007070782b */ /* 0x002fc80000000022 */ /*2990*/ DMUL R34, R42, 4 ; /* 0x401000002a227828 */ /* 0x000e480000000000 */ /*29a0*/ DFMA R72, R32, 5, -R72 ; /* 0x401400002048782b */ /* 0x000e880000000848 */ /*29b0*/ DFMA R114, R26, 5, -R114 ; /* 0x401400001a72782b */ /* 0x000ec80000000872 */ /*29c0*/ DFMA R34, R28, 5, -R34 ; /* 0x401400001c22782b */ /* 0x002e480000000822 */ /*29d0*/ DFMA R116, R30, 5, -R116 ; /* 0x401400001e74782b */ /* 0x000f080000000874 */ /*29e0*/ DADD R72, R158, R72 ; /* 0x000000009e487229 */ /* 0x004e880000000048 */ /*29f0*/ DADD R114, R152, R114 ; /* 0x0000000098727229 */ /* 0x008ec80000000072 */ /*2a00*/ DADD R34, R156, R34 ; /* 0x000000009c227229 */ /* 0x002fc80000000022 */ /*2a10*/ DADD R116, R160, R116 ; /* 0x00000000a0747229 */ /* 0x011fc80000000074 */ /*2a20*/ DFMA R72, R72, -0.25, R170 ; /* 0xbfd000004848782b */ /* 0x004e0800000000aa */ /*2a30*/ DFMA R114, R114, -0.25, R166 ; /* 0xbfd000007272782b */ /* 0x008e4600000000a6 */ /*2a40*/ STG.E.64 [R70.64+0x8], R72 ; /* 0x0000084846007986 */ /* 0x0011e2000c101b06 */ /*2a50*/ DFMA R34, R34, -0.25, R168 ; /* 0xbfd000002222782b */ /* 0x000e8600000000a8 */ /*2a60*/ STG.E.64 [R74.64+0x8], R112 ; /* 0x000008704a007986 */ /* 0x0001e2000c101b06 */ /*2a70*/ DFMA R116, R116, -0.25, R162 ; /* 0xbfd000007474782b */ /* 0x000ec600000000a2 */ /*2a80*/ STG.E.64 [R86.64+0x8], R114 ; /* 0x0000087256007986 */ /* 0x0021e8000c101b06 */ /*2a90*/ STG.E.64 [R94.64+0x8], R34 ; /* 0x000008225e007986 */ /* 0x0041e8000c101b06 */ /*2aa0*/ STG.E.64 [R102.64+0x8], R116 ; /* 0x0000087466007986 */ /* 0x0081e4000c101b06 */ /*2ab0*/ ISETP.GE.AND P0, PT, R13, R145, PT ; /* 0x000000910d00720c */ /* 0x000fe20003f06270 */ /*2ac0*/ IMAD.MOV.U32 R174, RZ, RZ, R66 ; /* 0x000000ffffae7224 */ /* 0x001fe200078e0042 */ /*2ad0*/ MOV R175, R67 ; /* 0x0000004300af7202 */ /* 0x000fe20000000f00 */ /*2ae0*/ IMAD.MOV.U32 R170, RZ, RZ, R56 ; /* 0x000000ffffaa7224 */ /* 0x000fe200078e0038 */ /*2af0*/ MOV R171, R57 ; /* 0x0000003900ab7202 */ /* 0x000fe20000000f00 */ /*2b00*/ IMAD.MOV.U32 R172, RZ, RZ, R60 ; /* 0x000000ffffac7224 */ /* 0x000fe200078e003c */ /*2b10*/ MOV R173, R61 ; /* 0x0000003d00ad7202 */ /* 0x000fe20000000f00 */ /*2b20*/ IMAD.MOV.U32 R168, RZ, RZ, R58 ; /* 0x000000ffffa87224 */ /* 0x000fe200078e003a */ /*2b30*/ MOV R169, R59 ; /* 0x0000003b00a97202 */ /* 0x000fe20000000f00 */ /*2b40*/ IMAD.MOV.U32 R178, RZ, RZ, R62 ; /* 0x000000ffffb27224 */ /* 0x000fe200078e003e */ /*2b50*/ MOV R179, R63 ; /* 0x0000003f00b37202 */ /* 0x000fe20000000f00 */ /*2b60*/ IMAD.MOV.U32 R180, RZ, RZ, R54 ; /* 0x000000ffffb47224 */ /* 0x000fe200078e0036 */ /*2b70*/ MOV R181, R55 ; /* 0x0000003700b57202 */ /* 0x000fe20000000f00 */ /*2b80*/ IMAD.MOV.U32 R184, RZ, RZ, R64 ; /* 0x000000ffffb87224 */ /* 0x000fe200078e0040 */ /*2b90*/ MOV R185, R65 ; /* 0x0000004100b97202 */ /* 0x000fe20000000f00 */ /*2ba0*/ @P0 BRA 0x2d90 ; /* 0x000001e000000947 */ /* 0x000fea0003800000 */ /*2bb0*/ MUFU.RCP64H R35, R159 ; /* 0x0000009f00237308 */ /* 0x006e220000001800 */ /*2bc0*/ IADD3 R34, R159, 0x300402, RZ ; /* 0x003004029f227810 */ /* 0x000fe20007ffe0ff */ /*2bd0*/ BSSY B0, 0x2ce0 ; /* 0x0000010000007945 */ /* 0x000fe60003800000 */ /*2be0*/ FSETP.GEU.AND P0, PT, |R34|, 5.8789094863358348022e-39, PT ; /* 0x004004022200780b */ /* 0x000fc40003f0e200 */ /*2bf0*/ DFMA R72, -R158, R34, 1 ; /* 0x3ff000009e48742b */ /* 0x001e0c0000000122 */ /*2c00*/ DFMA R72, R72, R72, R72 ; /* 0x000000484848722b */ /* 0x001e0c0000000048 */ /*2c10*/ DFMA R72, R34, R72, R34 ; /* 0x000000482248722b */ /* 0x001e0c0000000022 */ /*2c20*/ DFMA R112, -R158, R72, 1 ; /* 0x3ff000009e70742b */ /* 0x001e0c0000000148 */ /*2c30*/ DFMA R72, R72, R112, R72 ; /* 0x000000704848722b */ /* 0x0010620000000048 */ /*2c40*/ @P0 BRA 0x2cd0 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*2c50*/ LOP3.LUT R34, R159, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff9f227812 */ /* 0x000fe200078ec0ff */ /*2c60*/ IMAD.MOV.U32 R119, RZ, RZ, R159 ; /* 0x000000ffff777224 */ /* 0x000fe200078e009f */ /*2c70*/ MOV R118, R158 ; /* 0x0000009e00767202 */ /* 0x000fe40000000f00 */ /*2c80*/ IADD3 R73, R34, -0x100000, RZ ; /* 0xfff0000022497810 */ /* 0x002fe40007ffe0ff */ /*2c90*/ MOV R72, 0x2cb0 ; /* 0x00002cb000487802 */ /* 0x000fe40000000f00 */ /*2ca0*/ CALL.REL.NOINC 0x2f80 ; /* 0x000002d000007944 */ /* 0x001fea0003c00000 */ /*2cb0*/ MOV R72, R114 ; /* 0x0000007200487202 */ /* 0x000fe40000000f00 */ /*2cc0*/ MOV R73, R115 ; /* 0x0000007300497202 */ /* 0x000fe40000000f00 */ /*2cd0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2ce0*/ DMUL R172, R152, R72 ; /* 0x0000004898ac7228 */ /* 0x002e480000000000 */ /*2cf0*/ DMUL R168, R140, R72 ; /* 0x000000488ca87228 */ /* 0x000fc80000000000 */ /*2d00*/ DMUL R34, R152, R172 ; /* 0x000000ac98227228 */ /* 0x002e480000000000 */ /*2d10*/ DMUL R170, R156, R72 ; /* 0x000000489caa7228 */ /* 0x000fc80000000000 */ /*2d20*/ DMUL R180, R172, R172 ; /* 0x000000acacb47228 */ /* 0x000e880000000000 */ /*2d30*/ DFMA R34, R140, R168, R34 ; /* 0x000000a88c22722b */ /* 0x002e480000000022 */ /*2d40*/ DFMA R178, R168, R168, R180 ; /* 0x000000a8a8b2722b */ /* 0x004e8800000000b4 */ /*2d50*/ DFMA R34, R156, R170, R34 ; /* 0x000000aa9c22722b */ /* 0x002e480000000022 */ /*2d60*/ DMUL R174, R160, R72 ; /* 0x00000048a0ae7228 */ /* 0x0007080000000000 */ /*2d70*/ DFMA R178, R170, R170, R178 ; /* 0x000000aaaab2722b */ /* 0x00468800000000b2 */ /*2d80*/ DMUL R184, R34, 0.5 ; /* 0x3fe0000022b87828 */ /* 0x0026480000000000 */ /*2d90*/ ULDC UR4, c[0x0][0x16c] ; /* 0x00005b0000047ab9 */ /* 0x014fe20000000800 */ /*2da0*/ IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d7810 */ /* 0x000fe20007ffe0ff */ /*2db0*/ UIADD3 UR4, UR4, -0x1, URZ ; /* 0xffffffff04047890 */ /* 0x000fe2000fffe03f */ /*2dc0*/ IMAD.MOV.U32 R72, RZ, RZ, R46 ; /* 0x000000ffff487224 */ /* 0x00afe200078e002e */ /*2dd0*/ MOV R73, R47 ; /* 0x0000002f00497202 */ /* 0x000fe20000000f00 */ /*2de0*/ IMAD.MOV.U32 R134, RZ, RZ, R38 ; /* 0x000000ffff867224 */ /* 0x000fe200078e0026 */ /*2df0*/ MOV R136, R150 ; /* 0x0000009600887202 */ /* 0x000fe20000000f00 */ /*2e00*/ IMAD.MOV.U32 R35, RZ, RZ, R51 ; /* 0x000000ffff237224 */ /* 0x000fe200078e0033 */ /*2e10*/ ISETP.GE.AND P0, PT, R13, UR4, PT ; /* 0x000000040d007c0c */ /* 0x000fe2000bf06270 */ /*2e20*/ IMAD.MOV.U32 R139, RZ, RZ, R155 ; /* 0x000000ffff8b7224 */ /* 0x000fe200078e009b */ /*2e30*/ MOV R137, R151 ; /* 0x0000009700897202 */ /* 0x000fe20000000f00 */ /*2e40*/ IMAD.MOV.U32 R133, RZ, RZ, R165 ; /* 0x000000ffff857224 */ /* 0x000fe200078e00a5 */ /*2e50*/ MOV R135, R39 ; /* 0x0000002700877202 */ /* 0x000fe20000000f00 */ /*2e60*/ IMAD.MOV.U32 R46, RZ, RZ, R124 ; /* 0x000000ffff2e7224 */ /* 0x000fe200078e007c */ /*2e70*/ MOV R182, R52 ; /* 0x0000003400b67202 */ /* 0x000fe20000000f00 */ /*2e80*/ IMAD.MOV.U32 R52, RZ, RZ, R126 ; /* 0x000000ffff347224 */ /* 0x000fe200078e007e */ /*2e90*/ MOV R183, R53 ; /* 0x0000003500b77202 */ /* 0x000fe20000000f00 */ /*2ea0*/ IMAD.MOV.U32 R151, RZ, RZ, R131 ; /* 0x000000ffff977224 */ /* 0x000fe200078e0083 */ /*2eb0*/ MOV R34, R50 ; /* 0x0000003200227202 */ /* 0x000fc40000000f00 */ /*2ec0*/ MOV R138, R154 ; /* 0x0000009a008a7202 */ /* 0x000fe40000000f00 */ /*2ed0*/ MOV R132, R164 ; /* 0x000000a400847202 */ /* 0x000fe40000000f00 */ /*2ee0*/ MOV R47, R125 ; /* 0x0000007d002f7202 */ /* 0x000fe40000000f00 */ /*2ef0*/ MOV R50, R122 ; /* 0x0000007a00327202 */ /* 0x000fe40000000f00 */ /*2f00*/ MOV R51, R123 ; /* 0x0000007b00337202 */ /* 0x000fe40000000f00 */ /*2f10*/ MOV R53, R127 ; /* 0x0000007f00357202 */ /* 0x000fc40000000f00 */ /*2f20*/ MOV R150, R130 ; /* 0x0000008200967202 */ /* 0x000fe40000000f00 */ /*2f30*/ MOV R38, R128 ; /* 0x0000008000267202 */ /* 0x000fe40000000f00 */ /*2f40*/ MOV R39, R129 ; /* 0x0000008100277202 */ /* 0x000fe20000000f00 */ /*2f50*/ @P0 CALL.REL.NOINC 0x2f70 ; /* 0x0000001000000944 */ /* 0x000fe20003c00000 */ /*2f60*/ BRA 0x1600 ; /* 0xffffe69000007947 */ /* 0x000fea000383ffff */ /*2f70*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*2f80*/ DSETP.GTU.AND P0, PT, |R118|, +INF , PT ; /* 0x7ff000007600742a */ /* 0x000e220003f0c200 */ /*2f90*/ BSSY B1, 0x31e0 ; /* 0x0000024000017945 */ /* 0x000fda0003800000 */ /*2fa0*/ @P0 BRA 0x31b0 ; /* 0x0000020000000947 */ /* 0x001fea0003800000 */ /*2fb0*/ LOP3.LUT R114, R119, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff77727812 */ /* 0x000fc800078ec0ff */ /*2fc0*/ IADD3 R112, R114, -0x1, RZ ; /* 0xffffffff72707810 */ /* 0x000fc80007ffe0ff */ /*2fd0*/ ISETP.GE.U32.AND P0, PT, R112, 0x7fefffff, PT ; /* 0x7fefffff7000780c */ /* 0x000fda0003f06070 */ /*2fe0*/ @P0 LOP3.LUT R113, R119, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff0000077710812 */ /* 0x000fe200078e3cff */ /*2ff0*/ @P0 IMAD.MOV.U32 R112, RZ, RZ, RZ ; /* 0x000000ffff700224 */ /* 0x000fe200078e00ff */ /*3000*/ @P0 BRA 0x31d0 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*3010*/ ISETP.GE.U32.AND P0, PT, R114, 0x1000001, PT ; /* 0x010000017200780c */ /* 0x000fda0003f06070 */ /*3020*/ @!P0 BRA 0x3110 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*3030*/ IADD3 R113, R119, -0x3fe00000, RZ ; /* 0xc020000077717810 */ /* 0x000fe40007ffe0ff */ /*3040*/ MOV R112, R118 ; /* 0x0000007600707202 */ /* 0x000fe40000000f00 */ /*3050*/ MUFU.RCP64H R115, R113 ; /* 0x0000007100737308 */ /* 0x000e220000001800 */ /*3060*/ MOV R114, R73 ; /* 0x0000004900727202 */ /* 0x000fcc0000000f00 */ /*3070*/ DFMA R116, -R112, R114, 1 ; /* 0x3ff000007074742b */ /* 0x001e0c0000000172 */ /*3080*/ DFMA R116, R116, R116, R116 ; /* 0x000000747474722b */ /* 0x001e0c0000000074 */ /*3090*/ DFMA R116, R114, R116, R114 ; /* 0x000000747274722b */ /* 0x001e0c0000000072 */ /*30a0*/ DFMA R114, -R112, R116, 1 ; /* 0x3ff000007072742b */ /* 0x001e0c0000000174 */ /*30b0*/ DFMA R114, R116, R114, R116 ; /* 0x000000727472722b */ /* 0x001e0c0000000074 */ /*30c0*/ DMUL R114, R114, 2.2250738585072013831e-308 ; /* 0x0010000072727828 */ /* 0x001e0c0000000000 */ /*30d0*/ DFMA R116, -R118, R114, 1 ; /* 0x3ff000007674742b */ /* 0x001e0c0000000172 */ /*30e0*/ DFMA R116, R116, R116, R116 ; /* 0x000000747474722b */ /* 0x001e0c0000000074 */ /*30f0*/ DFMA R112, R114, R116, R114 ; /* 0x000000747270722b */ /* 0x0010620000000072 */ /*3100*/ BRA 0x31d0 ; /* 0x000000c000007947 */ /* 0x000fea0003800000 */ /*3110*/ DMUL R114, R118, 8.11296384146066816958e+31 ; /* 0x4690000076727828 */ /* 0x000e220000000000 */ /*3120*/ IMAD.MOV.U32 R112, RZ, RZ, R73 ; /* 0x000000ffff707224 */ /* 0x000fca00078e0049 */ /*3130*/ MUFU.RCP64H R113, R115 ; /* 0x0000007300717308 */ /* 0x001e240000001800 */ /*3140*/ DFMA R116, -R114, R112, 1 ; /* 0x3ff000007274742b */ /* 0x001e0c0000000170 */ /*3150*/ DFMA R116, R116, R116, R116 ; /* 0x000000747474722b */ /* 0x001e0c0000000074 */ /*3160*/ DFMA R116, R112, R116, R112 ; /* 0x000000747074722b */ /* 0x001e0c0000000070 */ /*3170*/ DFMA R112, -R114, R116, 1 ; /* 0x3ff000007270742b */ /* 0x001e0c0000000174 */ /*3180*/ DFMA R112, R116, R112, R116 ; /* 0x000000707470722b */ /* 0x001e0c0000000074 */ /*3190*/ DMUL R112, R112, 8.11296384146066816958e+31 ; /* 0x4690000070707828 */ /* 0x001e220000000000 */ /*31a0*/ BRA 0x31d0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*31b0*/ LOP3.LUT R113, R119, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000077717812 */ /* 0x000fe400078efcff */ /*31c0*/ MOV R112, R118 ; /* 0x0000007600707202 */ /* 0x000fe40000000f00 */ /*31d0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*31e0*/ MOV R114, R112 ; /* 0x0000007000727202 */ /* 0x003fe20000000f00 */ /*31f0*/ IMAD.MOV.U32 R115, RZ, RZ, R113 ; /* 0x000000ffff737224 */ /* 0x000fe200078e0071 */ /*3200*/ MOV R112, R72 ; /* 0x0000004800707202 */ /* 0x000fe40000000f00 */ /*3210*/ MOV R113, 0x0 ; /* 0x0000000000717802 */ /* 0x000fc80000000f00 */ /*3220*/ RET.REL.NODEC R112 0x0 ; /* 0xffffcdd070007950 */ /* 0x000fea0003c3ffff */ /*3230*/ BRA 0x3230; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*3240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*32a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*32b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*32c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*32d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*32e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*32f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z18exact_rhs_kernel_xPdiii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R75, SR_CTAID.X ; /* 0x00000000004b7919 */ /* 0x000e220000002500 */ /*0020*/ UMOV UR5, 0x1 ; /* 0x0000000100057882 */ /* 0x000fe40000000000 */ /*0030*/ ULDC UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */ /* 0x000fe20000000800 */ /*0040*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0050*/ UIADD3 UR4, -UR5, UR4, URZ ; /* 0x0000000405047290 */ /* 0x000fe4000fffe13f */ /*0060*/ ULDC UR6, c[0x0][0x16c] ; /* 0x00005b0000067ab9 */ /* 0x000fe20000000800 */ /*0070*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e620000002600 */ /*0080*/ UIADD3 UR5, -UR5, UR6, URZ ; /* 0x0000000605057290 */ /* 0x000fc6000fffe13f */ /*0090*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e620000002200 */ /*00a0*/ IMAD R75, R75, c[0x0][0x0], R0 ; /* 0x000000004b4b7a24 */ /* 0x001fca00078e0200 */ /*00b0*/ IADD3 R75, R75, 0x1, RZ ; /* 0x000000014b4b7810 */ /* 0x000fe20007ffe0ff */ /*00c0*/ IMAD R0, R2, c[0x0][0x4], R3 ; /* 0x0000010002007a24 */ /* 0x002fc600078e0203 */ /*00d0*/ ISETP.GE.AND P0, PT, R75, UR4, PT ; /* 0x000000044b007c0c */ /* 0x000fe4000bf06270 */ /*00e0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fc80007ffe0ff */ /*00f0*/ ISETP.GE.OR P0, PT, R0, UR5, P0 ; /* 0x0000000500007c0c */ /* 0x000fda0008706670 */ /*0100*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0110*/ DMUL R6, RZ, c[0x3][0x60] ; /* 0x00c01800ff067a28 */ /* 0x000e220000000000 */ /*0120*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x3][0x378] ; /* 0x00c0de00ff027624 */ /* 0x000fe200078e00ff */ /*0130*/ MOV R3, c[0x3][0x37c] ; /* 0x00c0df0000037a02 */ /* 0x000fe20000000f00 */ /*0140*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x3][0x380] ; /* 0x00c0e000ff087624 */ /* 0x000fe200078e00ff */ /*0150*/ MOV R12, c[0x3][0x388] ; /* 0x00c0e200000c7a02 */ /* 0x000fe20000000f00 */ /*0160*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x3][0x384] ; /* 0x00c0e100ff097624 */ /* 0x000fe200078e00ff */ /*0170*/ MOV R15, c[0x3][0x394] ; /* 0x00c0e500000f7a02 */ /* 0x000fe20000000f00 */ /*0180*/ IMAD.MOV.U32 R13, RZ, RZ, c[0x3][0x38c] ; /* 0x00c0e300ff0d7624 */ /* 0x000fe200078e00ff */ /*0190*/ DFMA R2, R6.reuse, R2, c[0x3][0x300] ; /* 0x00c0c0000602762b */ /* 0x041e220000000002 */ /*01a0*/ IMAD.MOV.U32 R14, RZ, RZ, c[0x3][0x390] ; /* 0x00c0e400ff0e7624 */ /* 0x000fe200078e00ff */ /*01b0*/ I2F.F64 R4, R0 ; /* 0x0000000000047312 */ /* 0x000e620000201c00 */ /*01c0*/ IMAD.MOV.U32 R18, RZ, RZ, c[0x3][0x398] ; /* 0x00c0e600ff127624 */ /* 0x000fe200078e00ff */ /*01d0*/ DFMA R8, R6.reuse, R8, c[0x3][0x308] ; /* 0x00c0c2000608762b */ /* 0x040ea20000000008 */ /*01e0*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x3][0x39c] ; /* 0x00c0e700ff137624 */ /* 0x000fe200078e00ff */ /*01f0*/ BSSY B0, 0x8d0 ; /* 0x000006d000007945 */ /* 0x000fe40003800000 */ /*0200*/ DFMA R2, R6, R2, c[0x3][0x288] ; /* 0x00c0a2000602762b */ /* 0x001fc80000000002 */ /*0210*/ DFMA R12, R6, R12, c[0x3][0x310] ; /* 0x00c0c400060c762b */ /* 0x000e08000000000c */ /*0220*/ DFMA R14, R6, R14, c[0x3][0x318] ; /* 0x00c0c600060e762b */ /* 0x000ec8000000000e */ /*0230*/ DFMA R18, R6, R18, c[0x3][0x320] ; /* 0x00c0c8000612762b */ /* 0x000f080000000012 */ /*0240*/ DFMA R10, R6, R8, c[0x3][0x290] ; /* 0x00c0a400060a762b */ /* 0x004e880000000008 */ /*0250*/ DFMA R12, R6, R12, c[0x3][0x298] ; /* 0x00c0a600060c762b */ /* 0x001e08000000000c */ /*0260*/ DFMA R16, R6, R14, c[0x3][0x2a0] ; /* 0x00c0a8000610762b */ /* 0x008ec8000000000e */ /*0270*/ DFMA R20, R6, R18, c[0x3][0x2a8] ; /* 0x00c0aa000614762b */ /* 0x010f080000000012 */ /*0280*/ DFMA R8, R6.reuse, R2, c[0x3][0x210] ; /* 0x00c084000608762b */ /* 0x040a240000000002 */ /*0290*/ I2F.F64 R2, R75 ; /* 0x0000004b00027312 */ /* 0x020f640000201c00 */ /*02a0*/ DFMA R10, R6, R10, c[0x3][0x218] ; /* 0x00c08600060a762b */ /* 0x004e88000000000a */ /*02b0*/ DFMA R14, R6, R12, c[0x3][0x220] ; /* 0x00c08800060e762b */ /* 0x001e08000000000c */ /*02c0*/ DFMA R18, R6, R16, c[0x3][0x228] ; /* 0x00c08a000612762b */ /* 0x008ec80000000010 */ /*02d0*/ DFMA R22, R6, R20, c[0x3][0x230] ; /* 0x00c08c000616762b */ /* 0x010f080000000014 */ /*02e0*/ DFMA R8, R6, R8, c[0x3][0x1e8] ; /* 0x00c07a000608762b */ /* 0x000fc80000000008 */ /*02f0*/ DFMA R12, R6.reuse, R10, c[0x3][0x1f0] ; /* 0x00c07c00060c762b */ /* 0x0445e4000000000a */ /*0300*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x3][0x3c8] ; /* 0x00c0f200ff0a7624 */ /* 0x004fe200078e00ff */ /*0310*/ MOV R11, c[0x3][0x3cc] ; /* 0x00c0f300000b7a02 */ /* 0x000fe20000000f00 */ /*0320*/ DFMA R16, R6.reuse, R14, c[0x3][0x1f8] ; /* 0x00c07e000610762b */ /* 0x0411e4000000000e */ /*0330*/ IMAD.MOV.U32 R14, RZ, RZ, c[0x3][0x3a8] ; /* 0x00c0ea00ff0e7624 */ /* 0x001fe200078e00ff */ /*0340*/ MOV R15, c[0x3][0x3ac] ; /* 0x00c0eb00000f7a02 */ /* 0x000fe20000000f00 */ /*0350*/ DFMA R20, R6, R18, c[0x3][0x200] ; /* 0x00c080000614762b */ /* 0x0081e40000000012 */ /*0360*/ IMAD.MOV.U32 R18, RZ, RZ, c[0x3][0x3b0] ; /* 0x00c0ec00ff127624 */ /* 0x001fc400078e00ff */ /*0370*/ DFMA R24, R6, R22, c[0x3][0x208] ; /* 0x00c082000618762b */ /* 0x0101e20000000016 */ /*0380*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x3][0x3b4] ; /* 0x00c0ed00ff137624 */ /* 0x000fe200078e00ff */ /*0390*/ MOV R6, c[0x3][0x3a0] ; /* 0x00c0e80000067a02 */ /* 0x001fe20000000f00 */ /*03a0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x3][0x3a4] ; /* 0x00c0e900ff077624 */ /* 0x000fe200078e00ff */ /*03b0*/ DMUL R4, R4, c[0x3][0x68] ; /* 0x00c01a0004047a28 */ /* 0x002e220000000000 */ /*03c0*/ MOV R22, c[0x3][0x3b8] ; /* 0x00c0ee0000167a02 */ /* 0x000fe20000000f00 */ /*03d0*/ IMAD.MOV.U32 R23, RZ, RZ, c[0x3][0x3bc] ; /* 0x00c0ef00ff177624 */ /* 0x000fe400078e00ff */ /*03e0*/ DMUL R2, R2, c[0x3][0x70] ; /* 0x00c01c0002027a28 */ /* 0x020e480000000000 */ /*03f0*/ DFMA R6, R4, R6, c[0x3][0x328] ; /* 0x00c0ca000406762b */ /* 0x001e080000000006 */ /*0400*/ DFMA R10, R2, R10, c[0x3][0x350] ; /* 0x00c0d400020a762b */ /* 0x002e48000000000a */ /*0410*/ DFMA R6, R4, R6, c[0x3][0x2b0] ; /* 0x00c0ac000406762b */ /* 0x001e080000000006 */ /*0420*/ DFMA R10, R2, R10, c[0x3][0x2d8] ; /* 0x00c0b600020a762b */ /* 0x002e48000000000a */ /*0430*/ DFMA R6, R4, R6, c[0x3][0x238] ; /* 0x00c08e000406762b */ /* 0x001e080000000006 */ /*0440*/ DFMA R10, R2, R10, c[0x3][0x260] ; /* 0x00c09800020a762b */ /* 0x002e48000000000a */ /*0450*/ DMUL R66, R4, R6 ; /* 0x0000000604427228 */ /* 0x0010a40000000000 */ /*0460*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x3][0x3c0] ; /* 0x00c0f000ff067624 */ /* 0x001fe400078e00ff */ /*0470*/ DMUL R64, R2, R10 ; /* 0x0000000a02407228 */ /* 0x0021e20000000000 */ /*0480*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x3][0x3c4] ; /* 0x00c0f100ff077624 */ /* 0x000fe200078e00ff */ /*0490*/ MOV R10, c[0x3][0x3e8] ; /* 0x00c0fa00000a7a02 */ /* 0x001fe20000000f00 */ /*04a0*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x3][0x3ec] ; /* 0x00c0fb00ff0b7624 */ /* 0x000fe200078e00ff */ /*04b0*/ DADD R8, R8, R66 ; /* 0x0000000008087229 */ /* 0x004e080000000042 */ /*04c0*/ DFMA R14, R4, R14, c[0x3][0x330] ; /* 0x00c0cc00040e762b */ /* 0x000fc8000000000e */ /*04d0*/ DADD R38, R8, R64 ; /* 0x0000000008267229 */ /* 0x001e080000000040 */ /*04e0*/ DFMA R18, R4.reuse, R18, c[0x3][0x338] ; /* 0x00c0ce000412762b */ /* 0x040e640000000012 */ /*04f0*/ MUFU.RCP64H R27, R39 ; /* 0x00000027001b7308 */ /* 0x001e240000001800 */ /*0500*/ DFMA R22, R4.reuse, R22, c[0x3][0x340] ; /* 0x00c0d0000416762b */ /* 0x040ea40000000016 */ /*0510*/ IADD3 R26, R39, 0x300402, RZ ; /* 0x00300402271a7810 */ /* 0x000fe40007ffe0ff */ /*0520*/ DFMA R6, R4, R6, c[0x3][0x348] ; /* 0x00c0d2000406762b */ /* 0x000ee40000000006 */ /*0530*/ FSETP.GEU.AND P0, PT, |R26|, 5.8789094863358348022e-39, PT ; /* 0x004004021a00780b */ /* 0x000fc40003f0e200 */ /*0540*/ DFMA R14, R4, R14, c[0x3][0x2b8] ; /* 0x00c0ae00040e762b */ /* 0x000f08000000000e */ /*0550*/ DFMA R18, R4, R18, c[0x3][0x2c0] ; /* 0x00c0b0000412762b */ /* 0x002e480000000012 */ /*0560*/ DFMA R22, R4, R22, c[0x3][0x2c8] ; /* 0x00c0b2000416762b */ /* 0x004e880000000016 */ /*0570*/ DFMA R6, R4, R6, c[0x3][0x2d0] ; /* 0x00c0b4000406762b */ /* 0x008ec80000000006 */ /*0580*/ DFMA R8, -R38, R26, 1 ; /* 0x3ff000002608742b */ /* 0x001e08000000011a */ /*0590*/ DFMA R14, R4, R14, c[0x3][0x240] ; /* 0x00c09000040e762b */ /* 0x010f08000000000e */ /*05a0*/ DFMA R18, R4, R18, c[0x3][0x248] ; /* 0x00c092000412762b */ /* 0x002e480000000012 */ /*05b0*/ DFMA R22, R4, R22, c[0x3][0x250] ; /* 0x00c094000416762b */ /* 0x004e880000000016 */ /*05c0*/ DFMA R6, R4, R6, c[0x3][0x258] ; /* 0x00c096000406762b */ /* 0x008ec80000000006 */ /*05d0*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */ /* 0x001e080000000008 */ /*05e0*/ DMUL R62, R4, R14 ; /* 0x0000000e043e7228 */ /* 0x010fc80000000000 */ /*05f0*/ DMUL R60, R4, R18 ; /* 0x00000012043c7228 */ /* 0x002fc80000000000 */ /*0600*/ DMUL R58, R4, R22 ; /* 0x00000016043a7228 */ /* 0x004fc80000000000 */ /*0610*/ DMUL R56, R4, R6 ; /* 0x0000000604387228 */ /* 0x0083e40000000000 */ /*0620*/ MOV R4, c[0x3][0x3d0] ; /* 0x00c0f40000047a02 */ /* 0x002fe20000000f00 */ /*0630*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x3][0x3d4] ; /* 0x00c0f500ff057624 */ /* 0x000fe200078e00ff */ /*0640*/ DFMA R138, R26, R8, R26 ; /* 0x000000081a8a722b */ /* 0x0011e2000000001a */ /*0650*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x3][0x3d8] ; /* 0x00c0f600ff067624 */ /* 0x000fe200078e00ff */ /*0660*/ MOV R7, c[0x3][0x3dc] ; /* 0x00c0f70000077a02 */ /* 0x000fe20000000f00 */ /*0670*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x3][0x3e0] ; /* 0x00c0f800ff087624 */ /* 0x001fe200078e00ff */ /*0680*/ DFMA R10, R2, R10, c[0x3][0x370] ; /* 0x00c0dc00020a762b */ /* 0x000fe2000000000a */ /*0690*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x3][0x3e4] ; /* 0x00c0f900ff097624 */ /* 0x000fc600078e00ff */ /*06a0*/ DFMA R4, R2, R4, c[0x3][0x358] ; /* 0x00c0d6000204762b */ /* 0x000e080000000004 */ /*06b0*/ DFMA R6, R2, R6, c[0x3][0x360] ; /* 0x00c0d8000206762b */ /* 0x000e480000000006 */ /*06c0*/ DFMA R8, R2, R8, c[0x3][0x368] ; /* 0x00c0da000208762b */ /* 0x000e880000000008 */ /*06d0*/ DFMA R4, R2, R4, c[0x3][0x2e0] ; /* 0x00c0b8000204762b */ /* 0x001e080000000004 */ /*06e0*/ DFMA R6, R2, R6, c[0x3][0x2e8] ; /* 0x00c0ba000206762b */ /* 0x002e480000000006 */ /*06f0*/ DFMA R8, R2, R8, c[0x3][0x2f0] ; /* 0x00c0bc000208762b */ /* 0x004e880000000008 */ /*0700*/ DFMA R10, R2, R10, c[0x3][0x2f8] ; /* 0x00c0be00020a762b */ /* 0x000ec8000000000a */ /*0710*/ DFMA R4, R2, R4, c[0x3][0x268] ; /* 0x00c09a000204762b */ /* 0x001e080000000004 */ /*0720*/ DFMA R6, R2, R6, c[0x3][0x270] ; /* 0x00c09c000206762b */ /* 0x002e480000000006 */ /*0730*/ DFMA R8, R2, R8, c[0x3][0x278] ; /* 0x00c09e000208762b */ /* 0x004e880000000008 */ /*0740*/ DFMA R10, R2, R10, c[0x3][0x280] ; /* 0x00c0a000020a762b */ /* 0x008ec8000000000a */ /*0750*/ DMUL R54, R2, R4 ; /* 0x0000000402367228 */ /* 0x001fc80000000000 */ /*0760*/ DMUL R52, R2, R6 ; /* 0x0000000602347228 */ /* 0x002fc80000000000 */ /*0770*/ DFMA R4, -R38, R138, 1 ; /* 0x3ff000002604742b */ /* 0x000e08000000018a */ /*0780*/ DMUL R50, R2, R8 ; /* 0x0000000802327228 */ /* 0x004fc80000000000 */ /*0790*/ DMUL R48, R2, R10 ; /* 0x0000000a02307228 */ /* 0x008fc80000000000 */ /*07a0*/ DADD R12, R12, R62 ; /* 0x000000000c0c7229 */ /* 0x000e48000000003e */ /*07b0*/ DADD R16, R16, R60 ; /* 0x0000000010107229 */ /* 0x000e88000000003c */ /*07c0*/ DADD R20, R20, R58 ; /* 0x0000000014147229 */ /* 0x000ec8000000003a */ /*07d0*/ DADD R24, R24, R56 ; /* 0x0000000018187229 */ /* 0x000f080000000038 */ /*07e0*/ DFMA R138, R138, R4, R138 ; /* 0x000000048a8a722b */ /* 0x001148000000008a */ /*07f0*/ DADD R46, R12, R54 ; /* 0x000000000c2e7229 */ /* 0x0020480000000036 */ /*0800*/ DADD R44, R16, R52 ; /* 0x00000000102c7229 */ /* 0x0040880000000034 */ /*0810*/ DADD R42, R20, R50 ; /* 0x00000000142a7229 */ /* 0x0080c80000000032 */ /*0820*/ DADD R40, R24, R48 ; /* 0x0000000018287229 */ /* 0x0101220000000030 */ /*0830*/ @P0 BRA 0x8c0 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*0840*/ LOP3.LUT R2, R39, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff27027812 */ /* 0x02efe200078ec0ff */ /*0850*/ IMAD.MOV.U32 R68, RZ, RZ, R38 ; /* 0x000000ffff447224 */ /* 0x000fe200078e0026 */ /*0860*/ MOV R3, R39 ; /* 0x0000002700037202 */ /* 0x000fe40000000f00 */ /*0870*/ IADD3 R81, R2, -0x100000, RZ ; /* 0xfff0000002517810 */ /* 0x000fe40007ffe0ff */ /*0880*/ MOV R106, 0x8a0 ; /* 0x000008a0006a7802 */ /* 0x000fe40000000f00 */ /*0890*/ CALL.REL.NOINC 0x2e20 ; /* 0x0000258000007944 */ /* 0x011fea0003c00000 */ /*08a0*/ IMAD.MOV.U32 R138, RZ, RZ, R72 ; /* 0x000000ffff8a7224 */ /* 0x002fe400078e0048 */ /*08b0*/ IMAD.MOV.U32 R139, RZ, RZ, R73 ; /* 0x000000ffff8b7224 */ /* 0x000fe400078e0049 */ /*08c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x02efea0003800000 */ /*08d0*/ MOV R18, c[0x3][0x60] ; /* 0x00c0180000127a02 */ /* 0x000fe20000000f00 */ /*08e0*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x3][0x64] ; /* 0x00c01900ff137624 */ /* 0x000fe200078e00ff */ /*08f0*/ MOV R3, c[0x3][0x37c] ; /* 0x00c0df0000037a02 */ /* 0x000fe20000000f00 */ /*0900*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x3][0x378] ; /* 0x00c0de00ff027624 */ /* 0x000fe200078e00ff */ /*0910*/ MOV R6, c[0x3][0x388] ; /* 0x00c0e20000067a02 */ /* 0x000fe20000000f00 */ /*0920*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x3][0x38c] ; /* 0x00c0e300ff077624 */ /* 0x000fe200078e00ff */ /*0930*/ MOV R9, c[0x3][0x394] ; /* 0x00c0e50000097a02 */ /* 0x000fe20000000f00 */ /*0940*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x3][0x380] ; /* 0x00c0e000ff047624 */ /* 0x001fe200078e00ff */ /*0950*/ DMUL R122, R44, R138 ; /* 0x0000008a2c7a7228 */ /* 0x000fe20000000000 */ /*0960*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x3][0x384] ; /* 0x00c0e100ff057624 */ /* 0x000fe200078e00ff */ /*0970*/ BSSY B0, 0xd30 ; /* 0x000003b000007945 */ /* 0x000fe20003800000 */ /*0980*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x3][0x390] ; /* 0x00c0e400ff087624 */ /* 0x000fe200078e00ff */ /*0990*/ DFMA R2, R2, R18, c[0x3][0x300] ; /* 0x00c0c0000202762b */ /* 0x000e220000000012 */ /*09a0*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x3][0x398] ; /* 0x00c0e600ff0a7624 */ /* 0x000fc400078e00ff */ /*09b0*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x3][0x39c] ; /* 0x00c0e700ff0b7624 */ /* 0x000fe200078e00ff */ /*09c0*/ DFMA R6, R6, R18, c[0x3][0x310] ; /* 0x00c0c4000606762b */ /* 0x000fc80000000012 */ /*09d0*/ DFMA R2, R2, R18, c[0x3][0x288] ; /* 0x00c0a2000202762b */ /* 0x001e080000000012 */ /*09e0*/ DFMA R4, R4, R18, c[0x3][0x308] ; /* 0x00c0c2000404762b */ /* 0x000fc80000000012 */ /*09f0*/ DFMA R2, R2, R18, c[0x3][0x210] ; /* 0x00c084000202762b */ /* 0x001e080000000012 */ /*0a00*/ DFMA R8, R8, R18, c[0x3][0x318] ; /* 0x00c0c6000808762b */ /* 0x000fc80000000012 */ /*0a10*/ DFMA R2, R2, R18, c[0x3][0x1e8] ; /* 0x00c07a000202762b */ /* 0x001e080000000012 */ /*0a20*/ DFMA R10, R10, R18, c[0x3][0x320] ; /* 0x00c0c8000a0a762b */ /* 0x000fc80000000012 */ /*0a30*/ DADD R2, R66, R2 ; /* 0x0000000042027229 */ /* 0x001e080000000002 */ /*0a40*/ DFMA R6, R6, R18, c[0x3][0x298] ; /* 0x00c0a6000606762b */ /* 0x000fc80000000012 */ /*0a50*/ DADD R28, R64, R2 ; /* 0x00000000401c7229 */ /* 0x001e080000000002 */ /*0a60*/ DFMA R4, R4, R18.reuse, c[0x3][0x290] ; /* 0x00c0a4000404762b */ /* 0x080e640000000012 */ /*0a70*/ MUFU.RCP64H R15, R29 ; /* 0x0000001d000f7308 */ /* 0x001e240000001800 */ /*0a80*/ DFMA R8, R8, R18.reuse, c[0x3][0x2a0] ; /* 0x00c0a8000808762b */ /* 0x080ea40000000012 */ /*0a90*/ IADD3 R14, R29, 0x300402, RZ ; /* 0x003004021d0e7810 */ /* 0x000fe40007ffe0ff */ /*0aa0*/ DFMA R12, R10, R18, c[0x3][0x2a8] ; /* 0x00c0aa000a0c762b */ /* 0x000ee40000000012 */ /*0ab0*/ FSETP.GEU.AND P0, PT, |R14|, 5.8789094863358348022e-39, PT ; /* 0x004004020e00780b */ /* 0x000fc40003f0e200 */ /*0ac0*/ DFMA R2, R6, R18, c[0x3][0x220] ; /* 0x00c088000602762b */ /* 0x000fc80000000012 */ /*0ad0*/ DFMA R4, R4, R18, c[0x3][0x218] ; /* 0x00c086000404762b */ /* 0x002fc80000000012 */ /*0ae0*/ DFMA R16, -R28, R14, 1 ; /* 0x3ff000001c10742b */ /* 0x001e08000000010e */ /*0af0*/ DFMA R10, R8, R18, c[0x3][0x228] ; /* 0x00c08a00080a762b */ /* 0x004e480000000012 */ /*0b00*/ DFMA R12, R12, R18, c[0x3][0x230] ; /* 0x00c08c000c0c762b */ /* 0x008e880000000012 */ /*0b10*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */ /* 0x001e080000000010 */ /*0b20*/ DMUL R116, R46, R138 ; /* 0x0000008a2e747228 */ /* 0x000ec80000000000 */ /*0b30*/ DFMA R8, R2, R18, c[0x3][0x1f8] ; /* 0x00c07e000208762b */ /* 0x000fc80000000012 */ /*0b40*/ DFMA R6, R4, R18, c[0x3][0x1f0] ; /* 0x00c07c000406762b */ /* 0x000fc80000000012 */ /*0b50*/ DFMA R10, R10, R18, c[0x3][0x200] ; /* 0x00c080000a0a762b */ /* 0x002fc80000000012 */ /*0b60*/ DFMA R12, R12, R18, c[0x3][0x208] ; /* 0x00c082000c0c762b */ /* 0x004fc80000000012 */ /*0b70*/ DFMA R16, R14, R16, R14 ; /* 0x000000100e10722b */ /* 0x001fc8000000000e */ /*0b80*/ DMUL R2, R44, R122 ; /* 0x0000007a2c027228 */ /* 0x000e080000000000 */ /*0b90*/ DMUL R124, R116, R116 ; /* 0x00000074747c7228 */ /* 0x008e480000000000 */ /*0ba0*/ DMUL R120, R42, R138 ; /* 0x0000008a2a787228 */ /* 0x000fc80000000000 */ /*0bb0*/ DFMA R2, R46, R116, R2 ; /* 0x000000742e02722b */ /* 0x001fc80000000002 */ /*0bc0*/ DFMA R4, -R28, R16, 1 ; /* 0x3ff000001c04742b */ /* 0x000e080000000110 */ /*0bd0*/ DFMA R118, R122, R122, R124 ; /* 0x0000007a7a76722b */ /* 0x002e48000000007c */ /*0be0*/ DADD R6, R62, R6 ; /* 0x000000003e067229 */ /* 0x000e880000000006 */ /*0bf0*/ DADD R8, R60, R8 ; /* 0x000000003c087229 */ /* 0x000ec80000000008 */ /*0c00*/ DADD R10, R58, R10 ; /* 0x000000003a0a7229 */ /* 0x000f48000000000a */ /*0c10*/ DADD R12, R56, R12 ; /* 0x00000000380c7229 */ /* 0x000f08000000000c */ /*0c20*/ DFMA R4, R16, R4, R16 ; /* 0x000000041004722b */ /* 0x0010080000000010 */ /*0c30*/ DFMA R136, R42, R120, R2 ; /* 0x000000782a88722b */ /* 0x0000080000000002 */ /*0c40*/ DFMA R118, R120, R120, R118 ; /* 0x000000787876722b */ /* 0x0022080000000076 */ /*0c50*/ DADD R36, R54, R6 ; /* 0x0000000036247229 */ /* 0x0042880000000006 */ /*0c60*/ DADD R34, R52, R8 ; /* 0x0000000034227229 */ /* 0x0082c80000000008 */ /*0c70*/ DADD R32, R50, R10 ; /* 0x0000000032207229 */ /* 0x020348000000000a */ /*0c80*/ DADD R30, R48, R12 ; /* 0x00000000301e7229 */ /* 0x010322000000000c */ /*0c90*/ @P0 BRA 0xd20 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*0ca0*/ LOP3.LUT R2, R29, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff1d027812 */ /* 0x02dfe200078ec0ff */ /*0cb0*/ IMAD.MOV.U32 R3, RZ, RZ, R29 ; /* 0x000000ffff037224 */ /* 0x000fe200078e001d */ /*0cc0*/ MOV R68, R28 ; /* 0x0000001c00447202 */ /* 0x000fe40000000f00 */ /*0cd0*/ IADD3 R81, R2, -0x100000, RZ ; /* 0xfff0000002517810 */ /* 0x000fe40007ffe0ff */ /*0ce0*/ MOV R106, 0xd00 ; /* 0x00000d00006a7802 */ /* 0x000fe40000000f00 */ /*0cf0*/ CALL.REL.NOINC 0x2e20 ; /* 0x0000212000007944 */ /* 0x012fea0003c00000 */ /*0d00*/ IMAD.MOV.U32 R4, RZ, RZ, R72 ; /* 0x000000ffff047224 */ /* 0x002fe200078e0048 */ /*0d10*/ MOV R5, R73 ; /* 0x0000004900057202 */ /* 0x000fe40000000f00 */ /*0d20*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x02dfea0003800000 */ /*0d30*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x3][0x60] ; /* 0x00c01800ff027624 */ /* 0x000fe200078e00ff */ /*0d40*/ MOV R6, c[0x3][0x378] ; /* 0x00c0de0000067a02 */ /* 0x002fe20000000f00 */ /*0d50*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x3][0x64] ; /* 0x00c01900ff037624 */ /* 0x000fe200078e00ff */ /*0d60*/ MOV R11, c[0x3][0x384] ; /* 0x00c0e100000b7a02 */ /* 0x000fe20000000f00 */ /*0d70*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x3][0x37c] ; /* 0x00c0df00ff077624 */ /* 0x000fe200078e00ff */ /*0d80*/ MOV R13, c[0x3][0x38c] ; /* 0x00c0e300000d7a02 */ /* 0x000fe20000000f00 */ /*0d90*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x3][0x380] ; /* 0x00c0e000ff0a7624 */ /* 0x000fe200078e00ff */ /*0da0*/ MOV R15, c[0x3][0x394] ; /* 0x00c0e500000f7a02 */ /* 0x000fe20000000f00 */ /*0db0*/ DADD R2, R2, c[0x3][0x60] ; /* 0x00c0180002027629 */ /* 0x000e220000000000 */ /*0dc0*/ IMAD.MOV.U32 R12, RZ, RZ, c[0x3][0x388] ; /* 0x00c0e200ff0c7624 */ /* 0x000fe200078e00ff */ /*0dd0*/ MOV R17, c[0x3][0x39c] ; /* 0x00c0e70000117a02 */ /* 0x000fe20000000f00 */ /*0de0*/ IMAD.MOV.U32 R14, RZ, RZ, c[0x3][0x390] ; /* 0x00c0e400ff0e7624 */ /* 0x000fe200078e00ff */ /*0df0*/ DMUL R26, R34, R4 ; /* 0x00000004221a7228 */ /* 0x000fe20000000000 */ /*0e00*/ IMAD.MOV.U32 R16, RZ, RZ, c[0x3][0x398] ; /* 0x00c0e600ff107624 */ /* 0x000fe200078e00ff */ /*0e10*/ BSSY B0, 0x1180 ; /* 0x0000036000007945 */ /* 0x000fe40003800000 */ /*0e20*/ DFMA R6, R2, R6, c[0x3][0x300] ; /* 0x00c0c0000206762b */ /* 0x001e080000000006 */ /*0e30*/ DFMA R10, R2, R10, c[0x3][0x308] ; /* 0x00c0c200020a762b */ /* 0x000fc8000000000a */ /*0e40*/ DFMA R6, R2, R6, c[0x3][0x288] ; /* 0x00c0a2000206762b */ /* 0x001e080000000006 */ /*0e50*/ DFMA R12, R2, R12, c[0x3][0x310] ; /* 0x00c0c400020c762b */ /* 0x000fc8000000000c */ /*0e60*/ DFMA R6, R2, R6, c[0x3][0x210] ; /* 0x00c084000206762b */ /* 0x001e080000000006 */ /*0e70*/ DFMA R14, R2, R14, c[0x3][0x318] ; /* 0x00c0c600020e762b */ /* 0x000fc8000000000e */ /*0e80*/ DFMA R6, R2, R6, c[0x3][0x1e8] ; /* 0x00c07a000206762b */ /* 0x001e080000000006 */ /*0e90*/ DFMA R16, R2, R16, c[0x3][0x320] ; /* 0x00c0c8000210762b */ /* 0x000fc80000000010 */ /*0ea0*/ DADD R6, R66, R6 ; /* 0x0000000042067229 */ /* 0x001e080000000006 */ /*0eb0*/ DFMA R10, R2, R10, c[0x3][0x290] ; /* 0x00c0a400020a762b */ /* 0x000fc8000000000a */ /*0ec0*/ DADD R8, R64, R6 ; /* 0x0000000040087229 */ /* 0x001e080000000006 */ /*0ed0*/ DFMA R12, R2.reuse, R12, c[0x3][0x298] ; /* 0x00c0a600020c762b */ /* 0x040e64000000000c */ /*0ee0*/ MUFU.RCP64H R71, R9 ; /* 0x0000000900477308 */ /* 0x001e240000001800 */ /*0ef0*/ DFMA R14, R2.reuse, R14, c[0x3][0x2a0] ; /* 0x00c0a800020e762b */ /* 0x040ea4000000000e */ /*0f00*/ IADD3 R70, R9, 0x300402, RZ ; /* 0x0030040209467810 */ /* 0x000fe40007ffe0ff */ /*0f10*/ DFMA R16, R2, R16, c[0x3][0x2a8] ; /* 0x00c0aa000210762b */ /* 0x000ee40000000010 */ /*0f20*/ FSETP.GEU.AND P0, PT, |R70|, 5.8789094863358348022e-39, PT ; /* 0x004004024600780b */ /* 0x000fc40003f0e200 */ /*0f30*/ DFMA R10, R2, R10, c[0x3][0x218] ; /* 0x00c08600020a762b */ /* 0x000fc8000000000a */ /*0f40*/ DFMA R12, R2, R12, c[0x3][0x220] ; /* 0x00c08800020c762b */ /* 0x002fc8000000000c */ /*0f50*/ DFMA R6, -R8, R70, 1 ; /* 0x3ff000000806742b */ /* 0x001e080000000146 */ /*0f60*/ DFMA R14, R2, R14, c[0x3][0x228] ; /* 0x00c08a00020e762b */ /* 0x004e48000000000e */ /*0f70*/ DFMA R16, R2, R16, c[0x3][0x230] ; /* 0x00c08c000210762b */ /* 0x008e880000000010 */ /*0f80*/ DFMA R6, R6, R6, R6 ; /* 0x000000060606722b */ /* 0x001e080000000006 */ /*0f90*/ DFMA R10, R2, R10, c[0x3][0x1f0] ; /* 0x00c07c00020a762b */ /* 0x000fc8000000000a */ /*0fa0*/ DFMA R12, R2, R12, c[0x3][0x1f8] ; /* 0x00c07e00020c762b */ /* 0x000fc8000000000c */ /*0fb0*/ DFMA R14, R2, R14, c[0x3][0x200] ; /* 0x00c08000020e762b */ /* 0x002fc8000000000e */ /*0fc0*/ DFMA R16, R2, R16, c[0x3][0x208] ; /* 0x00c082000210762b */ /* 0x004fc80000000010 */ /*0fd0*/ DFMA R6, R70, R6, R70 ; /* 0x000000064606722b */ /* 0x001e080000000046 */ /*0fe0*/ DMUL R24, R36, R4 ; /* 0x0000000424187228 */ /* 0x000fc80000000000 */ /*0ff0*/ DMUL R2, R34, R26 ; /* 0x0000001a22027228 */ /* 0x000e480000000000 */ /*1000*/ DFMA R68, -R8, R6, 1 ; /* 0x3ff000000844742b */ /* 0x001e080000000106 */ /*1010*/ DMUL R22, R32, R4 ; /* 0x0000000420167228 */ /* 0x000fc80000000000 */ /*1020*/ DFMA R2, R36, R24, R2 ; /* 0x000000182402722b */ /* 0x002e480000000002 */ /*1030*/ DMUL R20, R24, R24 ; /* 0x0000001818147228 */ /* 0x000e880000000000 */ /*1040*/ DFMA R72, R6, R68, R6 ; /* 0x000000440648722b */ /* 0x001fc80000000006 */ /*1050*/ DFMA R6, R32, R22, R2 ; /* 0x000000162006722b */ /* 0x002fc80000000002 */ /*1060*/ DADD R10, R62, R10 ; /* 0x000000003e0a7229 */ /* 0x000e08000000000a */ /*1070*/ DADD R12, R60, R12 ; /* 0x000000003c0c7229 */ /* 0x000e48000000000c */ /*1080*/ DFMA R18, R26, R26, R20 ; /* 0x0000001a1a12722b */ /* 0x004e880000000014 */ /*1090*/ DADD R2, R58, R14 ; /* 0x000000003a027229 */ /* 0x000ec8000000000e */ /*10a0*/ DADD R68, R56, R16 ; /* 0x0000000038447229 */ /* 0x000f480000000010 */ /*10b0*/ DADD R16, R54, R10 ; /* 0x0000000036107229 */ /* 0x001108000000000a */ /*10c0*/ DADD R14, R52, R12 ; /* 0x00000000340e7229 */ /* 0x002048000000000c */ /*10d0*/ DFMA R18, R22, R22, R18 ; /* 0x000000161612722b */ /* 0x0040880000000012 */ /*10e0*/ DADD R12, R50, R2 ; /* 0x00000000320c7229 */ /* 0x0080c80000000002 */ /*10f0*/ DADD R10, R48, R68 ; /* 0x00000000300a7229 */ /* 0x0201620000000044 */ /*1100*/ @P0 BRA 0x1170 ; /* 0x0000006000000947 */ /* 0x000fea0003800000 */ /*1110*/ LOP3.LUT R2, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09027812 */ /* 0x01ffe200078ec0ff */ /*1120*/ IMAD.MOV.U32 R68, RZ, RZ, R8 ; /* 0x000000ffff447224 */ /* 0x000fe200078e0008 */ /*1130*/ MOV R3, R9 ; /* 0x0000000900037202 */ /* 0x000fe40000000f00 */ /*1140*/ IADD3 R81, R2, -0x100000, RZ ; /* 0xfff0000002517810 */ /* 0x000fe40007ffe0ff */ /*1150*/ MOV R106, 0x1170 ; /* 0x00001170006a7802 */ /* 0x000fe40000000f00 */ /*1160*/ CALL.REL.NOINC 0x2e20 ; /* 0x00001cb000007944 */ /* 0x020fea0003c00000 */ /*1170*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x01efea0003800000 */ /*1180*/ IMAD.MOV.U32 R127, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff7f7624 */ /* 0x000fca00078e00ff */ /*1190*/ ISETP.GE.AND P0, PT, R127, 0x3, PT ; /* 0x000000037f00780c */ /* 0x000fda0003f06270 */ /*11a0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*11b0*/ IADD3 R79, R75.reuse, c[0x0][0x170], RZ ; /* 0x00005c004b4f7a10 */ /* 0x040fe20007ffe0ff */ /*11c0*/ DMUL R140, R14, R72.reuse ; /* 0x000000480e8c7228 */ /* 0x080e620000000000 */ /*11d0*/ IMAD R126, R75, c[0x0][0x16c], R0.reuse ; /* 0x00005b004b7e7a24 */ /* 0x100fe200078e0200 */ /*11e0*/ MOV R70, c[0x3][0x108] ; /* 0x00c0420000467a02 */ /* 0x000fe20000000f00 */ /*11f0*/ IMAD.MOV.U32 R71, RZ, RZ, c[0x3][0x10c] ; /* 0x00c04300ff477624 */ /* 0x000fe200078e00ff */ /*1200*/ IADD3 R81, R79.reuse, c[0x0][0x170], RZ ; /* 0x00005c004f517a10 */ /* 0x040fe20007ffe0ff */ /*1210*/ DMUL R2, R16, R72 ; /* 0x0000004810027228 */ /* 0x001e220000000000 */ /*1220*/ IMAD R128, R79, c[0x0][0x16c], R0.reuse ; /* 0x00005b004f807a24 */ /* 0x100fe200078e0200 */ /*1230*/ MOV R95, 0x8 ; /* 0x00000008005f7802 */ /* 0x000fe20000000f00 */ /*1240*/ IMAD R126, R126, c[0x0][0x168], RZ ; /* 0x00005a007e7e7a24 */ /* 0x000fe200078e02ff */ /*1250*/ IADD3 R83, R81.reuse, c[0x0][0x170], RZ ; /* 0x00005c0051537a10 */ /* 0x040fe20007ffe0ff */ /*1260*/ DMUL R76, R14, R140 ; /* 0x0000008c0e4c7228 */ /* 0x002e620000000000 */ /*1270*/ IMAD R130, R81, c[0x0][0x16c], R0.reuse ; /* 0x00005b0051827a24 */ /* 0x100fe200078e0200 */ /*1280*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*1290*/ IADD3 R75, R83.reuse, c[0x0][0x170], RZ ; /* 0x00005c00534b7a10 */ /* 0x040fe20007ffe0ff */ /*12a0*/ DMUL R142, R12, R72 ; /* 0x000000480c8e7228 */ /* 0x000fe20000000000 */ /*12b0*/ IMAD R132, R83, c[0x0][0x16c], R0 ; /* 0x00005b0053847a24 */ /* 0x000fc400078e0200 */ /*12c0*/ IMAD R130, R130, c[0x0][0x168], RZ ; /* 0x00005a0082827a24 */ /* 0x000fe200078e02ff */ /*12d0*/ DMUL R68, R10, R72 ; /* 0x000000480a447228 */ /* 0x020fe20000000000 */ /*12e0*/ IMAD R134, R75, c[0x0][0x16c], R0 ; /* 0x00005b004b867a24 */ /* 0x000fe200078e0200 */ /*12f0*/ IADD3 R0, R127.reuse, -0x2, RZ ; /* 0xfffffffe7f007810 */ /* 0x040fe20007ffe0ff */ /*1300*/ IMAD R128, R128, c[0x0][0x168], RZ ; /* 0x00005a0080807a24 */ /* 0x000fe200078e02ff */ /*1310*/ DMUL R72, R2, R2.reuse ; /* 0x0000000202487228 */ /* 0x081e220000000000 */ /*1320*/ IADD3 R127, R127, -0x3, RZ ; /* 0xfffffffd7f7f7810 */ /* 0x000fe20007ffe0ff */ /*1330*/ IMAD R134, R134, c[0x0][0x168], RZ ; /* 0x00005a0086867a24 */ /* 0x000fe400078e02ff */ /*1340*/ DFMA R76, R16, R2, R76 ; /* 0x00000002104c722b */ /* 0x002e62000000004c */ /*1350*/ IMAD R132, R132, c[0x0][0x168], RZ ; /* 0x00005a0084847a24 */ /* 0x000fe200078e02ff */ /*1360*/ IADD3 R78, R126, R127.reuse, RZ ; /* 0x0000007f7e4e7210 */ /* 0x080fe20007ffe0ff */ /*1370*/ IMAD.IADD R82, R128, 0x1, R127.reuse ; /* 0x0000000180527824 */ /* 0x100fe200078e027f */ /*1380*/ DFMA R144, R140, R140, R72 ; /* 0x0000008c8c90722b */ /* 0x001e220000000048 */ /*1390*/ IADD3 R86, R130, R127.reuse, RZ ; /* 0x0000007f82567210 */ /* 0x080fe20007ffe0ff */ /*13a0*/ IMAD.IADD R90, R132, 0x1, R127 ; /* 0x00000001845a7824 */ /* 0x000fe200078e027f */ /*13b0*/ IADD3 R94, R134, R127, RZ ; /* 0x0000007f865e7210 */ /* 0x000fe20007ffe0ff */ /*13c0*/ DFMA R80, R12, R142, R76 ; /* 0x0000008e0c50722b */ /* 0x0022a2000000004c */ /*13d0*/ IMAD.WIDE R74, R126, R95, c[0x0][0x160] ; /* 0x000058007e4a7625 */ /* 0x000fc600078e025f */ /*13e0*/ DMUL R6, R6, 0.5 ; /* 0x3fe0000006067828 */ /* 0x000ee20000000000 */ /*13f0*/ IMAD.WIDE R76, R78, R95, c[0x0][0x160] ; /* 0x000058004e4c7625 */ /* 0x002fc600078e025f */ /*1400*/ DMUL R136, R136, 0.5 ; /* 0x3fe0000088887828 */ /* 0x000e620000000000 */ /*1410*/ IMAD.WIDE R78, R128, R95, c[0x0][0x160] ; /* 0x00005800804e7625 */ /* 0x000fc600078e025f */ /*1420*/ DMUL R4, R30, R4 ; /* 0x000000041e047228 */ /* 0x0009620000000000 */ /*1430*/ IMAD.WIDE R82, R82, R95, c[0x0][0x160] ; /* 0x0000580052527625 */ /* 0x000fc600078e025f */ /*1440*/ DMUL R138, R40, R138 ; /* 0x0000008a288a7228 */ /* 0x0008220000000000 */ /*1450*/ IMAD.WIDE R84, R130, R95, c[0x0][0x160] ; /* 0x0000580082547625 */ /* 0x000fc600078e025f */ /*1460*/ DMUL R70, R70, 0.5 ; /* 0x3fe0000046467828 */ /* 0x000e220000000000 */ /*1470*/ IMAD.WIDE R86, R86, R95, c[0x0][0x160] ; /* 0x0000580056567625 */ /* 0x000fc600078e025f */ /*1480*/ DFMA R144, R142, R142, R144 ; /* 0x0000008e8e90722b */ /* 0x0018220000000090 */ /*1490*/ IMAD.WIDE R88, R132, R95, c[0x0][0x160] ; /* 0x0000580084587625 */ /* 0x000fc600078e025f */ /*14a0*/ DMUL R80, R80, 0.5 ; /* 0x3fe0000050507828 */ /* 0x004ea20000000000 */ /*14b0*/ IMAD.WIDE R90, R90, R95, c[0x0][0x160] ; /* 0x000058005a5a7625 */ /* 0x000fc800078e025f */ /*14c0*/ IMAD.WIDE R92, R134, R95, c[0x0][0x160] ; /* 0x00005800865c7625 */ /* 0x000fc800078e025f */ /*14d0*/ IMAD.MOV.U32 R129, RZ, RZ, 0x1 ; /* 0x00000001ff817424 */ /* 0x000fe400078e00ff */ /*14e0*/ IMAD.WIDE R94, R94, R95, c[0x0][0x160] ; /* 0x000058005e5e7625 */ /* 0x03ffc800078e025f */ /*14f0*/ IMAD.MOV.U32 R96, RZ, RZ, R26 ; /* 0x000000ffff607224 */ /* 0x000fe200078e001a */ /*1500*/ MOV R97, R27 ; /* 0x0000001b00617202 */ /* 0x000fe20000000f00 */ /*1510*/ IMAD.MOV.U32 R98, RZ, RZ, R22 ; /* 0x000000ffff627224 */ /* 0x000fe200078e0016 */ /*1520*/ MOV R99, R23 ; /* 0x0000001700637202 */ /* 0x000fe20000000f00 */ /*1530*/ IMAD.MOV.U32 R100, RZ, RZ, R18 ; /* 0x000000ffff647224 */ /* 0x000fe200078e0012 */ /*1540*/ MOV R101, R19 ; /* 0x0000001300657202 */ /* 0x000fe20000000f00 */ /*1550*/ IMAD.MOV.U32 R26, RZ, RZ, R140 ; /* 0x000000ffff1a7224 */ /* 0x000fe200078e008c */ /*1560*/ DADD R102, R96, R96 ; /* 0x0000000060667229 */ /* 0x000e220000000060 */ /*1570*/ MOV R27, R141 ; /* 0x0000008d001b7202 */ /* 0x000fe20000000f00 */ /*1580*/ IMAD.MOV.U32 R22, RZ, RZ, R142 ; /* 0x000000ffff167224 */ /* 0x000fe200078e008e */ /*1590*/ MOV R23, R143 ; /* 0x0000008f00177202 */ /* 0x000fe20000000f00 */ /*15a0*/ DADD R104, R98, R98 ; /* 0x0000000062687229 */ /* 0x002e620000000062 */ /*15b0*/ IMAD.MOV.U32 R18, RZ, RZ, R144 ; /* 0x000000ffff127224 */ /* 0x000fe200078e0090 */ /*15c0*/ MOV R19, R145 ; /* 0x0000009100137202 */ /* 0x000fc40000000f00 */ /*15d0*/ DADD R140, R100, R100 ; /* 0x00000000648c7229 */ /* 0x000ea20000000064 */ /*15e0*/ IADD3 R131, R129.reuse, 0x2, RZ ; /* 0x0000000281837810 */ /* 0x040fe40007ffe0ff */ /*15f0*/ ISETP.NE.AND P1, PT, R129, 0x1, PT ; /* 0x000000018100780c */ /* 0x000fe20003f25270 */ /*1600*/ DADD R102, R26, -R102 ; /* 0x000000001a667229 */ /* 0x001e220000000866 */ /*1610*/ ISETP.GE.AND P0, PT, R131, c[0x0][0x168], PT ; /* 0x00005a0083007a0c */ /* 0x000fc60003f06270 */ /*1620*/ DADD R104, R22, -R104 ; /* 0x0000000016687229 */ /* 0x002e480000000868 */ /*1630*/ DADD R144, R18, -R140 ; /* 0x0000000012907229 */ /* 0x004fc8000000088c */ /*1640*/ DADD R140, R102, R122 ; /* 0x00000000668c7229 */ /* 0x0011e4000000007a */ /*1650*/ IMAD.MOV.U32 R102, RZ, RZ, R20 ; /* 0x000000ffff667224 */ /* 0x001fe200078e0014 */ /*1660*/ MOV R103, R21 ; /* 0x0000001500677202 */ /* 0x000fe20000000f00 */ /*1670*/ DADD R142, R104, R120 ; /* 0x00000000688e7229 */ /* 0x0021e20000000078 */ /*1680*/ IMAD.MOV.U32 R122, RZ, RZ, R4 ; /* 0x000000ffff7a7224 */ /* 0x000fe200078e0004 */ /*1690*/ MOV R121, R41 ; /* 0x0000002900797202 */ /* 0x001fe20000000f00 */ /*16a0*/ IMAD.MOV.U32 R120, RZ, RZ, R40 ; /* 0x000000ffff787224 */ /* 0x000fe200078e0028 */ /*16b0*/ DMUL R104, R136, c[0x2][0x0] ; /* 0x0080000088687a28 */ /* 0x000e220000000000 */ /*16c0*/ MOV R123, R5 ; /* 0x00000005007b7202 */ /* 0x000fe20000000f00 */ /*16d0*/ IMAD.MOV.U32 R20, RZ, RZ, R72 ; /* 0x000000ffff147224 */ /* 0x000fe200078e0048 */ /*16e0*/ MOV R21, R73 ; /* 0x0000004900157202 */ /* 0x000fe20000000f00 */ /*16f0*/ DADD R4, R102, R102 ; /* 0x0000000066047229 */ /* 0x000e620000000066 */ /*1700*/ IMAD.MOV.U32 R40, RZ, RZ, R30 ; /* 0x000000ffff287224 */ /* 0x000fe200078e001e */ /*1710*/ MOV R41, R31 ; /* 0x0000001f00297202 */ /* 0x000fe20000000f00 */ /*1720*/ IMAD.MOV.U32 R30, RZ, RZ, R10 ; /* 0x000000ffff1e7224 */ /* 0x020fe200078e000a */ /*1730*/ DFMA R146, R120, c[0x2][0x8], -R104 ; /* 0x0080020078927a2b */ /* 0x0011e20000000868 */ /*1740*/ MOV R31, R11 ; /* 0x0000000b001f7202 */ /* 0x000fe20000000f00 */ /*1750*/ IMAD.MOV.U32 R104, RZ, RZ, R6 ; /* 0x000000ffff687224 */ /* 0x001fe200078e0006 */ /*1760*/ MOV R105, R7 ; /* 0x0000000700697202 */ /* 0x000fe20000000f00 */ /*1770*/ IMAD.MOV.U32 R6, RZ, RZ, R80 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0050 */ /*1780*/ MOV R7, R81 ; /* 0x0000005100077202 */ /* 0x000fe20000000f00 */ /*1790*/ DADD R144, R144, R118 ; /* 0x0000000090907229 */ /* 0x000fc80000000076 */ /*17a0*/ DADD R80, R20, -R4 ; /* 0x0000000014507229 */ /* 0x0021e40000000804 */ /*17b0*/ IMAD.MOV.U32 R4, RZ, RZ, R68 ; /* 0x000000ffff047224 */ /* 0x001fe200078e0044 */ /*17c0*/ MOV R5, R69 ; /* 0x0000004500057202 */ /* 0x000fe20000000f00 */ /*17d0*/ DADD R118, R122, R122 ; /* 0x000000007a767229 */ /* 0x000e08000000007a */ /*17e0*/ DMUL R68, R6, c[0x2][0x0] ; /* 0x0080000006447a28 */ /* 0x000e480000000000 */ /*17f0*/ DADD R148, R4, -R118 ; /* 0x0000000004947229 */ /* 0x0010a40000000876 */ /*1800*/ IMAD.MOV.U32 R118, RZ, RZ, R24 ; /* 0x000000ffff767224 */ /* 0x001fe200078e0018 */ /*1810*/ MOV R119, R25 ; /* 0x0000001900777202 */ /* 0x000fe20000000f00 */ /*1820*/ IMAD.MOV.U32 R24, RZ, RZ, R2 ; /* 0x000000ffff187224 */ /* 0x000fe200078e0002 */ /*1830*/ MOV R25, R3 ; /* 0x0000000300197202 */ /* 0x000fe20000000f00 */ /*1840*/ DADD R2, R80, R124 ; /* 0x0000000050027229 */ /* 0x0001e4000000007c */ /*1850*/ IMAD.MOV.U32 R124, RZ, RZ, R44 ; /* 0x000000ffff7c7224 */ /* 0x001fe200078e002c */ /*1860*/ MOV R125, R45 ; /* 0x0000002d007d7202 */ /* 0x000fe20000000f00 */ /*1870*/ DMUL R146, R146, R116 ; /* 0x0000007492927228 */ /* 0x000fc80000000000 */ /*1880*/ DFMA R72, R30, c[0x2][0x8], -R68 ; /* 0x008002001e487a2b */ /* 0x002e080000000844 */ /*1890*/ DADD R44, -R136, R120 ; /* 0x00000000882c7229 */ /* 0x0002e40000000178 */ /*18a0*/ IMAD.MOV.U32 R136, RZ, RZ, R46 ; /* 0x000000ffff887224 */ /* 0x002fe200078e002e */ /*18b0*/ MOV R137, R47 ; /* 0x0000002f00897202 */ /* 0x000fe20000000f00 */ /*18c0*/ DADD R68, R148, R138 ; /* 0x0000000094447229 */ /* 0x0043e4000000008a */ /*18d0*/ IMAD.MOV.U32 R138, RZ, RZ, R42 ; /* 0x000000ffff8a7224 */ /* 0x002fe200078e002a */ /*18e0*/ MOV R139, R43 ; /* 0x0000002b008b7202 */ /* 0x000fe20000000f00 */ /*18f0*/ DFMA R146, R24, R72, -R146 ; /* 0x000000481892722b */ /* 0x001fe20000000892 */ /*1900*/ IMAD.MOV.U32 R42, RZ, RZ, R32 ; /* 0x000000ffff2a7224 */ /* 0x000fe200078e0020 */ /*1910*/ MOV R43, R33 ; /* 0x00000021002b7202 */ /* 0x000fe20000000f00 */ /*1920*/ IMAD.MOV.U32 R32, RZ, RZ, R12 ; /* 0x000000ffff207224 */ /* 0x000fe200078e000c */ /*1930*/ DMUL R44, R44, c[0x2][0x0] ; /* 0x008000002c2c7a28 */ /* 0x008e220000000000 */ /*1940*/ MOV R33, R13 ; /* 0x0000000d00217202 */ /* 0x000fc60000000f00 */ /*1950*/ DADD R72, R118, R118 ; /* 0x0000000076487229 */ /* 0x000e480000000076 */ /*1960*/ DMUL R46, R116, R138 ; /* 0x0000008a742e7228 */ /* 0x000e880000000000 */ /*1970*/ DFMA R148, R116, R136, R44 ; /* 0x000000887494722b */ /* 0x0011e4000000002c */ /*1980*/ IMAD.MOV.U32 R44, RZ, RZ, R34 ; /* 0x000000ffff2c7224 */ /* 0x001fe200078e0022 */ /*1990*/ MOV R45, R35 ; /* 0x00000023002d7202 */ /* 0x000fe20000000f00 */ /*19a0*/ DADD R72, R24, -R72 ; /* 0x0000000018487229 */ /* 0x002e220000000848 */ /*19b0*/ IMAD.MOV.U32 R34, RZ, RZ, R14 ; /* 0x000000ffff227224 */ /* 0x000fe200078e000e */ /*19c0*/ MOV R35, R15 ; /* 0x0000000f00237202 */ /* 0x000fe40000000f00 */ /*19d0*/ DMUL R150, R116, R124 ; /* 0x0000007c74967228 */ /* 0x000e480000000000 */ /*19e0*/ DFMA R46, R32, R24, -R46 ; /* 0x00000018202e722b */ /* 0x004e88000000082e */ /*19f0*/ DADD R80, R72, R116 ; /* 0x0000000048507229 */ /* 0x0011e40000000074 */ /*1a00*/ IMAD.MOV.U32 R116, RZ, RZ, R38 ; /* 0x000000ffff747224 */ /* 0x001fe200078e0026 */ /*1a10*/ MOV R117, R39 ; /* 0x0000002700757202 */ /* 0x000fe20000000f00 */ /*1a20*/ DFMA R150, R34, R24, -R150 ; /* 0x000000182296722b */ /* 0x002e220000000896 */ /*1a30*/ IMAD.MOV.U32 R38, RZ, RZ, R28 ; /* 0x000000ffff267224 */ /* 0x000fe200078e001c */ /*1a40*/ MOV R39, R29 ; /* 0x0000001d00277202 */ /* 0x000fe20000000f00 */ /*1a50*/ IMAD.MOV.U32 R28, RZ, RZ, R8 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e0008 */ /*1a60*/ DFMA R46, -R46, c[0x3][0x8], RZ ; /* 0x00c002002e2e7a2b */ /* 0x004e6200000001ff */ /*1a70*/ MOV R29, R9 ; /* 0x00000009001d7202 */ /* 0x000fc60000000f00 */ /*1a80*/ DFMA R150, -R150, c[0x3][0x8], RZ ; /* 0x00c0020096967a2b */ /* 0x001e0800000001ff */ /*1a90*/ DFMA R142, R142, c[0x3][0x100], R46 ; /* 0x00c040008e8e7a2b */ /* 0x0023e4000000002e */ /*1aa0*/ IMAD.MOV.U32 R46, RZ, RZ, R36 ; /* 0x000000ffff2e7224 */ /* 0x002fe200078e0024 */ /*1ab0*/ MOV R47, R37 ; /* 0x00000025002f7202 */ /* 0x000fe20000000f00 */ /*1ac0*/ DADD R72, R38, R38 ; /* 0x0000000026487229 */ /* 0x000e620000000026 */ /*1ad0*/ IMAD.MOV.U32 R36, RZ, RZ, R16 ; /* 0x000000ffff247224 */ /* 0x000fe200078e0010 */ /*1ae0*/ MOV R37, R17 ; /* 0x0000001100257202 */ /* 0x000fe40000000f00 */ /*1af0*/ DFMA R140, R140, c[0x3][0x100], R150 ; /* 0x00c040008c8c7a2b */ /* 0x001fc80000000096 */ /*1b00*/ DADD R150, R28, -R72 ; /* 0x000000001c967229 */ /* 0x002e080000000848 */ /*1b10*/ DADD R72, R36, -R136 ; /* 0x0000000024487229 */ /* 0x000e480000000888 */ /*1b20*/ DADD R150, R150, R116 ; /* 0x0000000096967229 */ /* 0x001fc80000000074 */ /*1b30*/ DFMA R72, -R72, c[0x3][0x8], RZ ; /* 0x00c0020048487a2b */ /* 0x002e0800000001ff */ /*1b40*/ DADD R152, R30, -R6 ; /* 0x000000001e987229 */ /* 0x000e480000000806 */ /*1b50*/ DFMA R72, R150, c[0x3][0x120], R72 ; /* 0x00c0480096487a2b */ /* 0x001fc80000000048 */ /*1b60*/ DFMA R150, -R146, c[0x3][0x8], RZ ; /* 0x00c0020092967a2b */ /* 0x000e0800000001ff */ /*1b70*/ DMUL R152, R152, c[0x2][0x0] ; /* 0x0080000098987a28 */ /* 0x002fc80000000000 */ /*1b80*/ DFMA R144, R70, R144, R150 ; /* 0x000000904690722b */ /* 0x001e080000000096 */ /*1b90*/ DADD R150, R42, R42 ; /* 0x000000002a967229 */ /* 0x000e48000000002a */ /*1ba0*/ DFMA R144, R2, c[0x3][0x110], R144 ; /* 0x00c0440002907a2b */ /* 0x001fc80000000090 */ /*1bb0*/ DADD R150, R32, -R150 ; /* 0x0000000020967229 */ /* 0x002e080000000896 */ /*1bc0*/ DFMA R152, R36, R24, R152 ; /* 0x000000182498722b */ /* 0x000e480000000098 */ /*1bd0*/ DADD R150, R150, R138 ; /* 0x0000000096967229 */ /* 0x001e08000000008a */ /*1be0*/ DFMA R144, R68, c[0x3][0x118], R144 ; /* 0x00c0460044907a2b */ /* 0x000fc80000000090 */ /*1bf0*/ DADD R148, R152, -R148 ; /* 0x0000000098947229 */ /* 0x002e480000000894 */ /*1c00*/ DFMA R2, R150, c[0x3][0x138], R142 ; /* 0x00c04e0096027a2b */ /* 0x001fc8000000008e */ /*1c10*/ DADD R68, R46, R46 ; /* 0x000000002e447229 */ /* 0x000e08000000002e */ /*1c20*/ DADD R146, R44, R44 ; /* 0x000000002c927229 */ /* 0x000e88000000002c */ /*1c30*/ DADD R142, R40, R40 ; /* 0x00000000288e7229 */ /* 0x000ec80000000028 */ /*1c40*/ DFMA R148, -R148, c[0x3][0x8], RZ ; /* 0x00c0020094947a2b */ /* 0x002e4800000001ff */ /*1c50*/ DADD R68, R36, -R68 ; /* 0x0000000024447229 */ /* 0x001e080000000844 */ /*1c60*/ DADD R146, R34, -R146 ; /* 0x0000000022927229 */ /* 0x004e880000000892 */ /*1c70*/ DADD R142, R30, -R142 ; /* 0x000000001e8e7229 */ /* 0x008ec8000000088e */ /*1c80*/ DFMA R80, R80, c[0x3][0xf8], R148 ; /* 0x00c03e0050507a2b */ /* 0x002fc80000000094 */ /*1c90*/ DADD R68, R68, R136 ; /* 0x0000000044447229 */ /* 0x001e080000000088 */ /*1ca0*/ DADD R146, R146, R124 ; /* 0x0000000092927229 */ /* 0x004e48000000007c */ /*1cb0*/ DADD R142, R142, R120 ; /* 0x000000008e8e7229 */ /* 0x008e880000000078 */ /*1cc0*/ DFMA R80, R68, c[0x3][0x128], R80 ; /* 0x00c04a0044507a2b */ /* 0x0010c80000000050 */ /*1cd0*/ DFMA R140, R146, c[0x3][0x130], R140 ; /* 0x00c04c00928c7a2b */ /* 0x002048000000008c */ /*1ce0*/ DFMA R68, R142, c[0x3][0x140], R144 ; /* 0x00c050008e447a2b */ /* 0x0040a20000000090 */ /*1cf0*/ @P0 BRA 0x1fa0 ; /* 0x000002a000000947 */ /* 0x000fea0003800000 */ /*1d00*/ I2F.F64 R8, R131 ; /* 0x0000008300087312 */ /* 0x00ae620000201c00 */ /*1d10*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x3][0x378] ; /* 0x00c0de00ff0a7624 */ /* 0x000fe200078e00ff */ /*1d20*/ MOV R11, c[0x3][0x37c] ; /* 0x00c0df00000b7a02 */ /* 0x000fe20000000f00 */ /*1d30*/ IMAD.MOV.U32 R12, RZ, RZ, c[0x3][0x380] ; /* 0x00c0e000ff0c7624 */ /* 0x000fe200078e00ff */ /*1d40*/ MOV R13, c[0x3][0x384] ; /* 0x00c0e100000d7a02 */ /* 0x000fe20000000f00 */ /*1d50*/ IMAD.MOV.U32 R14, RZ, RZ, c[0x3][0x388] ; /* 0x00c0e200ff0e7624 */ /* 0x000fe200078e00ff */ /*1d60*/ MOV R15, c[0x3][0x38c] ; /* 0x00c0e300000f7a02 */ /* 0x000fe20000000f00 */ /*1d70*/ IMAD.MOV.U32 R16, RZ, RZ, c[0x3][0x390] ; /* 0x00c0e400ff107624 */ /* 0x000fe200078e00ff */ /*1d80*/ MOV R17, c[0x3][0x394] ; /* 0x00c0e50000117a02 */ /* 0x000fe20000000f00 */ /*1d90*/ IMAD.MOV.U32 R142, RZ, RZ, c[0x3][0x398] ; /* 0x00c0e600ff8e7624 */ /* 0x001fe200078e00ff */ /*1da0*/ MOV R143, c[0x3][0x39c] ; /* 0x00c0e700008f7a02 */ /* 0x000fe20000000f00 */ /*1db0*/ DMUL R8, R8, c[0x3][0x60] ; /* 0x00c0180008087a28 */ /* 0x002e0c0000000000 */ /*1dc0*/ DFMA R10, R8, R10, c[0x3][0x300] ; /* 0x00c0c000080a762b */ /* 0x001e08000000000a */ /*1dd0*/ DFMA R12, R8, R12, c[0x3][0x308] ; /* 0x00c0c200080c762b */ /* 0x000e48000000000c */ /*1de0*/ DFMA R14, R8, R14, c[0x3][0x310] ; /* 0x00c0c400080e762b */ /* 0x000ec8000000000e */ /*1df0*/ DFMA R16, R8, R16, c[0x3][0x318] ; /* 0x00c0c6000810762b */ /* 0x000f080000000010 */ /*1e00*/ DFMA R142, R8, R142, c[0x3][0x320] ; /* 0x00c0c800088e762b */ /* 0x000f48000000008e */ /*1e10*/ DFMA R10, R8, R10, c[0x3][0x288] ; /* 0x00c0a200080a762b */ /* 0x001e08000000000a */ /*1e20*/ DFMA R12, R8, R12, c[0x3][0x290] ; /* 0x00c0a400080c762b */ /* 0x002e48000000000c */ /*1e30*/ DFMA R14, R8, R14, c[0x3][0x298] ; /* 0x00c0a600080e762b */ /* 0x008ec8000000000e */ /*1e40*/ DFMA R16, R8, R16, c[0x3][0x2a0] ; /* 0x00c0a8000810762b */ /* 0x010f080000000010 */ /*1e50*/ DFMA R142, R8, R142, c[0x3][0x2a8] ; /* 0x00c0aa00088e762b */ /* 0x020f48000000008e */ /*1e60*/ DFMA R10, R8, R10, c[0x3][0x210] ; /* 0x00c08400080a762b */ /* 0x001e08000000000a */ /*1e70*/ DFMA R12, R8, R12, c[0x3][0x218] ; /* 0x00c08600080c762b */ /* 0x002e48000000000c */ /*1e80*/ DFMA R14, R8, R14, c[0x3][0x220] ; /* 0x00c08800080e762b */ /* 0x008ec8000000000e */ /*1e90*/ DFMA R16, R8, R16, c[0x3][0x228] ; /* 0x00c08a000810762b */ /* 0x010f080000000010 */ /*1ea0*/ DFMA R142, R8, R142, c[0x3][0x230] ; /* 0x00c08c00088e762b */ /* 0x020f48000000008e */ /*1eb0*/ DFMA R10, R8, R10, c[0x3][0x1e8] ; /* 0x00c07a00080a762b */ /* 0x001e08000000000a */ /*1ec0*/ DFMA R12, R8, R12, c[0x3][0x1f0] ; /* 0x00c07c00080c762b */ /* 0x002e48000000000c */ /*1ed0*/ DFMA R14, R8, R14, c[0x3][0x1f8] ; /* 0x00c07e00080e762b */ /* 0x008ec8000000000e */ /*1ee0*/ DFMA R16, R8, R16, c[0x3][0x200] ; /* 0x00c080000810762b */ /* 0x010f080000000010 */ /*1ef0*/ DFMA R8, R8, R142, c[0x3][0x208] ; /* 0x00c082000808762b */ /* 0x020f48000000008e */ /*1f00*/ DADD R10, R66, R10 ; /* 0x00000000420a7229 */ /* 0x001e08000000000a */ /*1f10*/ DADD R12, R62, R12 ; /* 0x000000003e0c7229 */ /* 0x002e48000000000c */ /*1f20*/ DADD R14, R60, R14 ; /* 0x000000003c0e7229 */ /* 0x008ec8000000000e */ /*1f30*/ DADD R142, R58, R16 ; /* 0x000000003a8e7229 */ /* 0x010f080000000010 */ /*1f40*/ DADD R144, R56, R8 ; /* 0x0000000038907229 */ /* 0x020f480000000008 */ /*1f50*/ DADD R8, R64, R10 ; /* 0x0000000040087229 */ /* 0x001088000000000a */ /*1f60*/ DADD R16, R54, R12 ; /* 0x0000000036107229 */ /* 0x002048000000000c */ /*1f70*/ DADD R14, R52, R14 ; /* 0x00000000340e7229 */ /* 0x0080c8000000000e */ /*1f80*/ DADD R12, R50, R142 ; /* 0x00000000320c7229 */ /* 0x010108000000008e */ /*1f90*/ DADD R10, R48, R144 ; /* 0x00000000300a7229 */ /* 0x02014c0000000090 */ /*1fa0*/ @!P1 BRA 0x27c0 ; /* 0x0000081000009947 */ /* 0x01efea0003800000 */ /*1fb0*/ ISETP.NE.AND P0, PT, R129, 0x2, PT ; /* 0x000000028100780c */ /* 0x000fda0003f05270 */ /*1fc0*/ @!P0 BRA 0x25d0 ; /* 0x0000060000008947 */ /* 0x000fea0003800000 */ /*1fd0*/ ISETP.GE.AND P0, PT, R129.reuse, R127, PT ; /* 0x0000007f8100720c */ /* 0x040fe40003f06270 */ /*1fe0*/ ISETP.GT.U32.AND P1, PT, R129, 0x2, PT ; /* 0x000000028100780c */ /* 0x000fda0003f24070 */ /*1ff0*/ @!P0 BRA P1, 0x2330 ; /* 0x0000033000008947 */ /* 0x000fea0000800000 */ /*2000*/ ISETP.NE.AND P0, PT, R129, R127, PT ; /* 0x0000007f8100720c */ /* 0x000fda0003f05270 */ /*2010*/ @!P0 BRA 0x2190 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*2020*/ ISETP.NE.AND P0, PT, R129, R0, PT ; /* 0x000000008100720c */ /* 0x000fda0003f05270 */ /*2030*/ @P0 BRA 0x2950 ; /* 0x0000091000000947 */ /* 0x000fea0003800000 */ /*2040*/ DFMA R106, R116, -4, R106 ; /* 0xc0100000746a782b */ /* 0x000e48000000006a */ /*2050*/ DFMA R108, R136, -4, R108 ; /* 0xc0100000886c782b */ /* 0x000e88000000006c */ /*2060*/ DFMA R106, R38, 5, R106 ; /* 0x40140000266a782b */ /* 0x002e48000000006a */ /*2070*/ DFMA R108, R46, 5, R108 ; /* 0x401400002e6c782b */ /* 0x004e88000000006c */ /*2080*/ DFMA R110, R124, -4, R110 ; /* 0xc01000007c6e782b */ /* 0x000fc8000000006e */ /*2090*/ DFMA R106, R106, -0.25, R72 ; /* 0xbfd000006a6a782b */ /* 0x002e480000000048 */ /*20a0*/ DFMA R108, R108, -0.25, R80 ; /* 0xbfd000006c6c782b */ /* 0x004e860000000050 */ /*20b0*/ STG.E.64 [R76.64+0x8], R106 ; /* 0x0000086a4c007986 */ /* 0x0023e2000c101b06 */ /*20c0*/ DFMA R72, R138, -4, R112 ; /* 0xc01000008a48782b */ /* 0x000ec60000000070 */ /*20d0*/ STG.E.64 [R82.64+0x8], R108 ; /* 0x0000086c52007986 */ /* 0x0043e2000c101b06 */ /*20e0*/ DFMA R80, R120, -4, R114 ; /* 0xc01000007850782b */ /* 0x000e880000000072 */ /*20f0*/ DFMA R110, R44, 5, R110 ; /* 0x401400002c6e782b */ /* 0x000f08000000006e */ /*2100*/ DFMA R72, R42, 5, R72 ; /* 0x401400002a48782b */ /* 0x008ec80000000048 */ /*2110*/ DFMA R80, R40, 5, R80 ; /* 0x401400002850782b */ /* 0x004fc80000000050 */ /*2120*/ DFMA R110, R110, -0.25, R140 ; /* 0xbfd000006e6e782b */ /* 0x010e88000000008c */ /*2130*/ DFMA R72, R72, -0.25, R2 ; /* 0xbfd000004848782b */ /* 0x008ec60000000002 */ /*2140*/ STG.E.64 [R86.64+0x8], R110 ; /* 0x0000086e56007986 */ /* 0x0043e2000c101b06 */ /*2150*/ DFMA R80, R80, -0.25, R68 ; /* 0xbfd000005050782b */ /* 0x000e860000000044 */ /*2160*/ STG.E.64 [R90.64+0x8], R72 ; /* 0x000008485a007986 */ /* 0x0083e8000c101b06 */ /*2170*/ STG.E.64 [R94.64+0x8], R80 ; /* 0x000008505e007986 */ /* 0x0043e2000c101b06 */ /*2180*/ BRA 0x2950 ; /* 0x000007c000007947 */ /* 0x000fea0003800000 */ /*2190*/ DFMA R106, R116, -4, R106 ; /* 0xc0100000746a782b */ /* 0x000e48000000006a */ /*21a0*/ DFMA R108, R136, -4, R108 ; /* 0xc0100000886c782b */ /* 0x000e88000000006c */ /*21b0*/ DFMA R106, R38, 6, R106 ; /* 0x40180000266a782b */ /* 0x002e48000000006a */ /*21c0*/ DFMA R108, R46, 6, R108 ; /* 0x401800002e6c782b */ /* 0x004e88000000006c */ /*21d0*/ DFMA R106, R28, -4, R106 ; /* 0xc01000001c6a782b */ /* 0x002e48000000006a */ /*21e0*/ DFMA R108, R36, -4, R108 ; /* 0xc0100000246c782b */ /* 0x004fc8000000006c */ /*21f0*/ DFMA R110, R124, -4, R110 ; /* 0xc01000007c6e782b */ /* 0x000fc8000000006e */ /*2200*/ DFMA R72, R106, -0.25, R72 ; /* 0xbfd000006a48782b */ /* 0x002e480000000048 */ /*2210*/ DFMA R106, R138, -4, R112 ; /* 0xc01000008a6a782b */ /* 0x000fc60000000070 */ /*2220*/ STG.E.64 [R76.64], R72 ; /* 0x000000484c007986 */ /* 0x0023e2000c101b06 */ /*2230*/ DFMA R112, R120, -4, R114 ; /* 0xc01000007870782b */ /* 0x000fc80000000072 */ /*2240*/ DFMA R108, R108, -0.25, R80 ; /* 0xbfd000006c6c782b */ /* 0x000e880000000050 */ /*2250*/ DFMA R80, R44, 6, R110 ; /* 0x401800002c50782b */ /* 0x000ec6000000006e */ /*2260*/ STG.E.64 [R82.64], R108 ; /* 0x0000006c52007986 */ /* 0x0043e2000c101b06 */ /*2270*/ DFMA R106, R42, 6, R106 ; /* 0x401800002a6a782b */ /* 0x000e88000000006a */ /*2280*/ DFMA R110, R40, 6, R112 ; /* 0x40180000286e782b */ /* 0x000f080000000070 */ /*2290*/ DFMA R80, R34, -4, R80 ; /* 0xc01000002250782b */ /* 0x008ec80000000050 */ /*22a0*/ DFMA R106, R32, -4, R106 ; /* 0xc0100000206a782b */ /* 0x004e88000000006a */ /*22b0*/ DFMA R110, R30, -4, R110 ; /* 0xc01000001e6e782b */ /* 0x010fc8000000006e */ /*22c0*/ DFMA R80, R80, -0.25, R140 ; /* 0xbfd000005050782b */ /* 0x008ec8000000008c */ /*22d0*/ DFMA R106, R106, -0.25, R2 ; /* 0xbfd000006a6a782b */ /* 0x004e860000000002 */ /*22e0*/ STG.E.64 [R86.64], R80 ; /* 0x0000005056007986 */ /* 0x0083e2000c101b06 */ /*22f0*/ DFMA R110, R110, -0.25, R68 ; /* 0xbfd000006e6e782b */ /* 0x000ec60000000044 */ /*2300*/ STG.E.64 [R90.64], R106 ; /* 0x0000006a5a007986 */ /* 0x0043e8000c101b06 */ /*2310*/ STG.E.64 [R94.64], R110 ; /* 0x0000006e5e007986 */ /* 0x0083e2000c101b06 */ /*2320*/ BRA 0x2950 ; /* 0x0000062000007947 */ /* 0x000fea0003800000 */ /*2330*/ DFMA R106, R116, -4, R106 ; /* 0xc0100000746a782b */ /* 0x000e48000000006a */ /*2340*/ DFMA R108, R136, -4, R108 ; /* 0xc0100000886c782b */ /* 0x000e88000000006c */ /*2350*/ DFMA R106, R38, 6, R106 ; /* 0x40180000266a782b */ /* 0x002e48000000006a */ /*2360*/ DFMA R108, R46, 6, R108 ; /* 0x401800002e6c782b */ /* 0x004e88000000006c */ /*2370*/ DFMA R106, R28, -4, R106 ; /* 0xc01000001c6a782b */ /* 0x002e48000000006a */ /*2380*/ DFMA R108, R36, -4, R108 ; /* 0xc0100000246c782b */ /* 0x004e88000000006c */ /*2390*/ DADD R106, R8, R106 ; /* 0x00000000086a7229 */ /* 0x002e48000000006a */ /*23a0*/ DADD R108, R16, R108 ; /* 0x00000000106c7229 */ /* 0x004e88000000006c */ /*23b0*/ DFMA R72, R106, -0.25, R72 ; /* 0xbfd000006a48782b */ /* 0x002fc80000000048 */ /*23c0*/ DFMA R110, R124, -4, R110 ; /* 0xc01000007c6e782b */ /* 0x000e48000000006e */ /*23d0*/ DFMA R106, R138, -4, R112 ; /* 0xc01000008a6a782b */ /* 0x000ec80000000070 */ /*23e0*/ DFMA R112, R120, -4, R114 ; /* 0xc01000007870782b */ /* 0x0008240000000072 */ /*23f0*/ MOV R115, 0x8 ; /* 0x0000000800737802 */ /* 0x010fe40000000f00 */ /*2400*/ DFMA R80, R108, -0.25, R80 ; /* 0xbfd000006c50782b */ /* 0x004fe20000000050 */ /*2410*/ IADD3 R114, R134, R129, RZ ; /* 0x0000008186727210 */ /* 0x000fc60007ffe0ff */ /*2420*/ DFMA R110, R44, 6, R110 ; /* 0x401800002c6e782b */ /* 0x002e48000000006e */ /*2430*/ DFMA R108, R42, 6, R106 ; /* 0x401800002a6c782b */ /* 0x008e88000000006a */ /*2440*/ DFMA R112, R40, 6, R112 ; /* 0x401800002870782b */ /* 0x001e080000000070 */ /*2450*/ DFMA R106, R34, -4, R110 ; /* 0xc0100000226a782b */ /* 0x002fc8000000006e */ /*2460*/ DFMA R108, R32, -4, R108 ; /* 0xc0100000206c782b */ /* 0x004e48000000006c */ /*2470*/ DFMA R110, R30, -4, R112 ; /* 0xc01000001e6e782b */ /* 0x001e080000000070 */ /*2480*/ DADD R108, R12, R108 ; /* 0x000000000c6c7229 */ /* 0x002e48000000006c */ /*2490*/ DADD R106, R14, R106 ; /* 0x000000000e6a7229 */ /* 0x000e88000000006a */ /*24a0*/ DADD R110, R10, R110 ; /* 0x000000000a6e7229 */ /* 0x021e08000000006e */ /*24b0*/ DFMA R108, R108, -0.25, R2 ; /* 0xbfd000006c6c782b */ /* 0x0023e40000000002 */ /*24c0*/ IMAD.IADD R2, R126, 0x1, R129 ; /* 0x000000017e027824 */ /* 0x002fe400078e0281 */ /*24d0*/ DFMA R140, R106, -0.25, R140 ; /* 0xbfd000006a8c782b */ /* 0x0042a4000000008c */ /*24e0*/ IADD3 R106, R130, R129, RZ ; /* 0x00000081826a7210 */ /* 0x002fe20007ffe0ff */ /*24f0*/ IMAD.WIDE R2, R2, R115, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fe200078e0273 */ /*2500*/ DFMA R112, R110, -0.25, R68 ; /* 0xbfd000006e70782b */ /* 0x0010460000000044 */ /*2510*/ IMAD.IADD R68, R128, 0x1, R129.reuse ; /* 0x0000000180447824 */ /* 0x101fe200078e0281 */ /*2520*/ STG.E.64 [R2.64], R72 ; /* 0x0000004802007986 */ /* 0x0001e2000c101b06 */ /*2530*/ IMAD.IADD R110, R132, 0x1, R129 ; /* 0x00000001846e7824 */ /* 0x000fe400078e0281 */ /*2540*/ IMAD.WIDE R68, R68, R115, c[0x0][0x160] ; /* 0x0000580044447625 */ /* 0x000fc800078e0273 */ /*2550*/ IMAD.WIDE R106, R106, R115.reuse, c[0x0][0x160] ; /* 0x000058006a6a7625 */ /* 0x080fe200078e0273 */ /*2560*/ STG.E.64 [R68.64], R80 ; /* 0x0000005044007986 */ /* 0x0001e6000c101b06 */ /*2570*/ IMAD.WIDE R110, R110, R115.reuse, c[0x0][0x160] ; /* 0x000058006e6e7625 */ /* 0x080fe200078e0273 */ /*2580*/ STG.E.64 [R106.64], R140 ; /* 0x0000008c6a007986 */ /* 0x0041e6000c101b06 */ /*2590*/ IMAD.WIDE R114, R114, R115, c[0x0][0x160] ; /* 0x0000580072727625 */ /* 0x000fe200078e0273 */ /*25a0*/ STG.E.64 [R110.64], R108 ; /* 0x0000006c6e007986 */ /* 0x0001e8000c101b06 */ /*25b0*/ STG.E.64 [R114.64], R112 ; /* 0x0000007072007986 */ /* 0x0021e2000c101b06 */ /*25c0*/ BRA 0x2950 ; /* 0x0000038000007947 */ /* 0x000fea0003800000 */ /*25d0*/ DMUL R106, R116, 4 ; /* 0x40100000746a7828 */ /* 0x000e480000000000 */ /*25e0*/ DMUL R108, R136, 4 ; /* 0x40100000886c7828 */ /* 0x000e880000000000 */ /*25f0*/ DFMA R106, R38, 6, -R106 ; /* 0x40180000266a782b */ /* 0x002e48000000086a */ /*2600*/ DFMA R108, R46, 6, -R108 ; /* 0x401800002e6c782b */ /* 0x004e88000000086c */ /*2610*/ DFMA R106, R28, -4, R106 ; /* 0xc01000001c6a782b */ /* 0x002e48000000006a */ /*2620*/ DFMA R108, R36, -4, R108 ; /* 0xc0100000246c782b */ /* 0x004e88000000006c */ /*2630*/ DADD R106, R8, R106 ; /* 0x00000000086a7229 */ /* 0x002e48000000006a */ /*2640*/ DADD R108, R16, R108 ; /* 0x00000000106c7229 */ /* 0x004e88000000006c */ /*2650*/ DMUL R110, R124, 4 ; /* 0x401000007c6e7828 */ /* 0x000fc80000000000 */ /*2660*/ DFMA R72, R106, -0.25, R72 ; /* 0xbfd000006a48782b */ /* 0x002e480000000048 */ /*2670*/ DFMA R80, R108, -0.25, R80 ; /* 0xbfd000006c50782b */ /* 0x004e860000000050 */ /*2680*/ STG.E.64 [R74.64+0x10], R72 ; /* 0x000010484a007986 */ /* 0x0023e2000c101b06 */ /*2690*/ DMUL R106, R138, 4 ; /* 0x401000008a6a7828 */ /* 0x000ec60000000000 */ /*26a0*/ STG.E.64 [R78.64+0x10], R80 ; /* 0x000010504e007986 */ /* 0x0043e2000c101b06 */ /*26b0*/ DMUL R108, R120, 4 ; /* 0x40100000786c7828 */ /* 0x000e880000000000 */ /*26c0*/ DFMA R110, R44, 6, -R110 ; /* 0x401800002c6e782b */ /* 0x000f08000000086e */ /*26d0*/ DFMA R106, R42, 6, -R106 ; /* 0x401800002a6a782b */ /* 0x008ec8000000086a */ /*26e0*/ DFMA R108, R40, 6, -R108 ; /* 0x40180000286c782b */ /* 0x004e88000000086c */ /*26f0*/ DFMA R110, R34, -4, R110 ; /* 0xc0100000226e782b */ /* 0x010f08000000006e */ /*2700*/ DFMA R106, R32, -4, R106 ; /* 0xc0100000206a782b */ /* 0x008ec8000000006a */ /*2710*/ DFMA R108, R30, -4, R108 ; /* 0xc01000001e6c782b */ /* 0x004e88000000006c */ /*2720*/ DADD R110, R14, R110 ; /* 0x000000000e6e7229 */ /* 0x010f08000000006e */ /*2730*/ DADD R106, R12, R106 ; /* 0x000000000c6a7229 */ /* 0x008ec8000000006a */ /*2740*/ DADD R108, R10, R108 ; /* 0x000000000a6c7229 */ /* 0x024fc8000000006c */ /*2750*/ DFMA R110, R110, -0.25, R140 ; /* 0xbfd000006e6e782b */ /* 0x010e88000000008c */ /*2760*/ DFMA R106, R106, -0.25, R2 ; /* 0xbfd000006a6a782b */ /* 0x008ec60000000002 */ /*2770*/ STG.E.64 [R84.64+0x10], R110 ; /* 0x0000106e54007986 */ /* 0x0043e2000c101b06 */ /*2780*/ DFMA R108, R108, -0.25, R68 ; /* 0xbfd000006c6c782b */ /* 0x000e860000000044 */ /*2790*/ STG.E.64 [R88.64+0x10], R106 ; /* 0x0000106a58007986 */ /* 0x0083e8000c101b06 */ /*27a0*/ STG.E.64 [R92.64+0x10], R108 ; /* 0x0000106c5c007986 */ /* 0x0043e2000c101b06 */ /*27b0*/ BRA 0x2950 ; /* 0x0000019000007947 */ /* 0x000fea0003800000 */ /*27c0*/ DMUL R106, R28, 4 ; /* 0x401000001c6a7828 */ /* 0x000e480000000000 */ /*27d0*/ DMUL R108, R36, 4 ; /* 0x40100000246c7828 */ /* 0x000e880000000000 */ /*27e0*/ DFMA R106, R38, 5, -R106 ; /* 0x40140000266a782b */ /* 0x002e48000000086a */ /*27f0*/ DFMA R108, R46, 5, -R108 ; /* 0x401400002e6c782b */ /* 0x004e88000000086c */ /*2800*/ DADD R106, R8, R106 ; /* 0x00000000086a7229 */ /* 0x002e48000000006a */ /*2810*/ DADD R108, R16, R108 ; /* 0x00000000106c7229 */ /* 0x004e88000000006c */ /*2820*/ DMUL R110, R34, 4 ; /* 0x40100000226e7828 */ /* 0x000fc80000000000 */ /*2830*/ DFMA R106, R106, -0.25, R72 ; /* 0xbfd000006a6a782b */ /* 0x002e480000000048 */ /*2840*/ DFMA R108, R108, -0.25, R80 ; /* 0xbfd000006c6c782b */ /* 0x004e860000000050 */ /*2850*/ STG.E.64 [R74.64+0x8], R106 ; /* 0x0000086a4a007986 */ /* 0x0023e2000c101b06 */ /*2860*/ DMUL R72, R32, 4 ; /* 0x4010000020487828 */ /* 0x000ec60000000000 */ /*2870*/ STG.E.64 [R78.64+0x8], R108 ; /* 0x0000086c4e007986 */ /* 0x0043e2000c101b06 */ /*2880*/ DMUL R80, R30, 4 ; /* 0x401000001e507828 */ /* 0x000e880000000000 */ /*2890*/ DFMA R110, R44, 5, -R110 ; /* 0x401400002c6e782b */ /* 0x000f08000000086e */ /*28a0*/ DFMA R72, R42, 5, -R72 ; /* 0x401400002a48782b */ /* 0x008ec80000000848 */ /*28b0*/ DFMA R80, R40, 5, -R80 ; /* 0x401400002850782b */ /* 0x004e880000000850 */ /*28c0*/ DADD R110, R14, R110 ; /* 0x000000000e6e7229 */ /* 0x010f08000000006e */ /*28d0*/ DADD R72, R12, R72 ; /* 0x000000000c487229 */ /* 0x008ec80000000048 */ /*28e0*/ DADD R80, R10, R80 ; /* 0x000000000a507229 */ /* 0x024fc80000000050 */ /*28f0*/ DFMA R110, R110, -0.25, R140 ; /* 0xbfd000006e6e782b */ /* 0x010e88000000008c */ /*2900*/ DFMA R72, R72, -0.25, R2 ; /* 0xbfd000004848782b */ /* 0x008ec60000000002 */ /*2910*/ STG.E.64 [R84.64+0x8], R110 ; /* 0x0000086e54007986 */ /* 0x0043e2000c101b06 */ /*2920*/ DFMA R80, R80, -0.25, R68 ; /* 0xbfd000005050782b */ /* 0x000e860000000044 */ /*2930*/ STG.E.64 [R88.64+0x8], R72 ; /* 0x0000084858007986 */ /* 0x0083e8000c101b06 */ /*2940*/ STG.E.64 [R92.64+0x8], R80 ; /* 0x000008505c007986 */ /* 0x0043e8000c101b06 */ /*2950*/ ISETP.GE.AND P0, PT, R129, R0, PT ; /* 0x000000008100720c */ /* 0x000fe20003f06270 */ /*2960*/ IMAD.MOV.U32 R68, RZ, RZ, R4 ; /* 0x000000ffff447224 */ /* 0x001fe200078e0004 */ /*2970*/ MOV R69, R5 ; /* 0x0000000500457202 */ /* 0x000fe20000000f00 */ /*2980*/ IMAD.MOV.U32 R142, RZ, RZ, R22 ; /* 0x000000ffff8e7224 */ /* 0x000fe200078e0016 */ /*2990*/ MOV R143, R23 ; /* 0x00000017008f7202 */ /* 0x000fe20000000f00 */ /*29a0*/ IMAD.MOV.U32 R140, RZ, RZ, R26 ; /* 0x000000ffff8c7224 */ /* 0x000fe200078e001a */ /*29b0*/ MOV R141, R27 ; /* 0x0000001b008d7202 */ /* 0x000fe20000000f00 */ /*29c0*/ IMAD.MOV.U32 R2, RZ, RZ, R24 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0018 */ /*29d0*/ MOV R3, R25 ; /* 0x0000001900037202 */ /* 0x000fe20000000f00 */ /*29e0*/ IMAD.MOV.U32 R144, RZ, RZ, R18 ; /* 0x000000ffff907224 */ /* 0x000fe200078e0012 */ /*29f0*/ MOV R145, R19 ; /* 0x0000001300917202 */ /* 0x000fe20000000f00 */ /*2a00*/ IMAD.MOV.U32 R72, RZ, RZ, R20 ; /* 0x000000ffff487224 */ /* 0x002fe200078e0014 */ /*2a10*/ MOV R73, R21 ; /* 0x0000001500497202 */ /* 0x000fe20000000f00 */ /*2a20*/ IMAD.MOV.U32 R80, RZ, RZ, R6 ; /* 0x000000ffff507224 */ /* 0x000fe200078e0006 */ /*2a30*/ MOV R81, R7 ; /* 0x0000000700517202 */ /* 0x000fe20000000f00 */ /*2a40*/ @P0 BRA 0x2c30 ; /* 0x000001e000000947 */ /* 0x000fea0003800000 */ /*2a50*/ MUFU.RCP64H R3, R9 ; /* 0x0000000900037308 */ /* 0x000e220000001800 */ /*2a60*/ IADD3 R2, R9, 0x300402, RZ ; /* 0x0030040209027810 */ /* 0x000fe20007ffe0ff */ /*2a70*/ BSSY B0, 0x2b80 ; /* 0x0000010000007945 */ /* 0x000fe60003800000 */ /*2a80*/ FSETP.GEU.AND P0, PT, |R2|, 5.8789094863358348022e-39, PT ; /* 0x004004020200780b */ /* 0x000fc40003f0e200 */ /*2a90*/ DFMA R68, -R8, R2, 1 ; /* 0x3ff000000844742b */ /* 0x001e0c0000000102 */ /*2aa0*/ DFMA R68, R68, R68, R68 ; /* 0x000000444444722b */ /* 0x001e0c0000000044 */ /*2ab0*/ DFMA R68, R2, R68, R2 ; /* 0x000000440244722b */ /* 0x001e0c0000000002 */ /*2ac0*/ DFMA R72, -R8, R68, 1 ; /* 0x3ff000000848742b */ /* 0x001e0c0000000144 */ /*2ad0*/ DFMA R68, R68, R72, R68 ; /* 0x000000484444722b */ /* 0x0010620000000044 */ /*2ae0*/ @P0 BRA 0x2b70 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*2af0*/ LOP3.LUT R2, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09027812 */ /* 0x000fe200078ec0ff */ /*2b00*/ IMAD.MOV.U32 R68, RZ, RZ, R8 ; /* 0x000000ffff447224 */ /* 0x002fe200078e0008 */ /*2b10*/ MOV R3, R9 ; /* 0x0000000900037202 */ /* 0x000fe40000000f00 */ /*2b20*/ IADD3 R81, R2, -0x100000, RZ ; /* 0xfff0000002517810 */ /* 0x000fe40007ffe0ff */ /*2b30*/ MOV R106, 0x2b50 ; /* 0x00002b50006a7802 */ /* 0x000fe40000000f00 */ /*2b40*/ CALL.REL.NOINC 0x2e20 ; /* 0x000002d000007944 */ /* 0x021fea0003c00000 */ /*2b50*/ IMAD.MOV.U32 R68, RZ, RZ, R72 ; /* 0x000000ffff447224 */ /* 0x002fe200078e0048 */ /*2b60*/ MOV R69, R73 ; /* 0x0000004900457202 */ /* 0x000fe40000000f00 */ /*2b70*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2b80*/ DMUL R140, R14, R68 ; /* 0x000000440e8c7228 */ /* 0x002e480000000000 */ /*2b90*/ DMUL R2, R16, R68 ; /* 0x0000004410027228 */ /* 0x000e880000000000 */ /*2ba0*/ DMUL R80, R14, R140 ; /* 0x0000008c0e507228 */ /* 0x002e480000000000 */ /*2bb0*/ DMUL R142, R12, R68 ; /* 0x000000440c8e7228 */ /* 0x000fc80000000000 */ /*2bc0*/ DMUL R72, R2, R2 ; /* 0x0000000202487228 */ /* 0x005e080000000000 */ /*2bd0*/ DFMA R80, R16, R2, R80 ; /* 0x000000021050722b */ /* 0x002e480000000050 */ /*2be0*/ DFMA R144, R140, R140, R72 ; /* 0x0000008c8c90722b */ /* 0x001e080000000048 */ /*2bf0*/ DFMA R80, R12, R142, R80 ; /* 0x0000008e0c50722b */ /* 0x002e480000000050 */ /*2c00*/ DMUL R68, R10, R68 ; /* 0x000000440a447228 */ /* 0x0204c80000000000 */ /*2c10*/ DFMA R144, R142, R142, R144 ; /* 0x0000008e8e90722b */ /* 0x0014080000000090 */ /*2c20*/ DMUL R80, R80, 0.5 ; /* 0x3fe0000050507828 */ /* 0x002e480000000000 */ /*2c30*/ ULDC UR4, c[0x0][0x168] ; /* 0x00005a0000047ab9 */ /* 0x00dfe20000000800 */ /*2c40*/ IADD3 R129, R129, 0x1, RZ ; /* 0x0000000181817810 */ /* 0x000fe20007ffe0ff */ /*2c50*/ UIADD3 UR4, UR4, -0x1, URZ ; /* 0xffffffff04047890 */ /* 0x000fe2000fffe03f */ /*2c60*/ IMAD.MOV.U32 R112, RZ, RZ, R138 ; /* 0x000000ffff707224 */ /* 0x000fe200078e008a */ /*2c70*/ MOV R113, R139 ; /* 0x0000008b00717202 */ /* 0x000fe20000000f00 */ /*2c80*/ IMAD.MOV.U32 R106, RZ, RZ, R116 ; /* 0x000000ffff6a7224 */ /* 0x000fe200078e0074 */ /*2c90*/ MOV R107, R117 ; /* 0x00000075006b7202 */ /* 0x000fe20000000f00 */ /*2ca0*/ IMAD.MOV.U32 R114, RZ, RZ, R120 ; /* 0x000000ffff727224 */ /* 0x000fe200078e0078 */ /*2cb0*/ ISETP.GE.AND P0, PT, R129, UR4, PT ; /* 0x0000000481007c0c */ /* 0x000fe2000bf06270 */ /*2cc0*/ IMAD.MOV.U32 R110, RZ, RZ, R124 ; /* 0x000000ffff6e7224 */ /* 0x000fe200078e007c */ /*2cd0*/ MOV R115, R121 ; /* 0x0000007900737202 */ /* 0x000fe20000000f00 */ /*2ce0*/ IMAD.MOV.U32 R108, RZ, RZ, R136 ; /* 0x000000ffff6c7224 */ /* 0x000fe200078e0088 */ /*2cf0*/ MOV R111, R125 ; /* 0x0000007d006f7202 */ /* 0x000fe20000000f00 */ /*2d00*/ IMAD.MOV.U32 R138, RZ, RZ, R122 ; /* 0x000000ffff8a7224 */ /* 0x000fe200078e007a */ /*2d10*/ MOV R109, R137 ; /* 0x00000089006d7202 */ /* 0x000fe20000000f00 */ /*2d20*/ IMAD.MOV.U32 R116, RZ, RZ, R118 ; /* 0x000000ffff747224 */ /* 0x000fe200078e0076 */ /*2d30*/ MOV R139, R123 ; /* 0x0000007b008b7202 */ /* 0x000fe20000000f00 */ /*2d40*/ IMAD.MOV.U32 R120, RZ, RZ, R98 ; /* 0x000000ffff787224 */ /* 0x000fe200078e0062 */ /*2d50*/ MOV R117, R119 ; /* 0x0000007700757202 */ /* 0x000fe20000000f00 */ /*2d60*/ IMAD.MOV.U32 R122, RZ, RZ, R96 ; /* 0x000000ffff7a7224 */ /* 0x000fe200078e0060 */ /*2d70*/ MOV R121, R99 ; /* 0x0000006300797202 */ /* 0x000fe20000000f00 */ /*2d80*/ IMAD.MOV.U32 R118, RZ, RZ, R100 ; /* 0x000000ffff767224 */ /* 0x000fe200078e0064 */ /*2d90*/ MOV R123, R97 ; /* 0x00000061007b7202 */ /* 0x000fe20000000f00 */ /*2da0*/ IMAD.MOV.U32 R136, RZ, RZ, R104 ; /* 0x000000ffff887224 */ /* 0x000fe200078e0068 */ /*2db0*/ MOV R119, R101 ; /* 0x0000006500777202 */ /* 0x000fe20000000f00 */ /*2dc0*/ IMAD.MOV.U32 R124, RZ, RZ, R102 ; /* 0x000000ffff7c7224 */ /* 0x000fe200078e0066 */ /*2dd0*/ MOV R137, R105 ; /* 0x0000006900897202 */ /* 0x000fc40000000f00 */ /*2de0*/ MOV R125, R103 ; /* 0x00000067007d7202 */ /* 0x000fe20000000f00 */ /*2df0*/ @P0 CALL.REL.NOINC 0x2e10 ; /* 0x0000001000000944 */ /* 0x000fe20003c00000 */ /*2e00*/ BRA 0x14f0 ; /* 0xffffe6e000007947 */ /* 0x000fea000383ffff */ /*2e10*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*2e20*/ IMAD.MOV.U32 R2, RZ, RZ, R68 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0044 */ /*2e30*/ BSSY B1, 0x3090 ; /* 0x0000025000017945 */ /* 0x000fea0003800000 */ /*2e40*/ DSETP.GTU.AND P0, PT, |R2|, +INF , PT ; /* 0x7ff000000200742a */ /* 0x000e1c0003f0c200 */ /*2e50*/ @P0 BRA 0x3060 ; /* 0x0000020000000947 */ /* 0x001fea0003800000 */ /*2e60*/ LOP3.LUT R69, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03457812 */ /* 0x000fc800078ec0ff */ /*2e70*/ IADD3 R68, R69, -0x1, RZ ; /* 0xffffffff45447810 */ /* 0x000fc80007ffe0ff */ /*2e80*/ ISETP.GE.U32.AND P0, PT, R68, 0x7fefffff, PT ; /* 0x7fefffff4400780c */ /* 0x000fda0003f06070 */ /*2e90*/ @P0 LOP3.LUT R73, R3, 0x7ff00000, RZ, 0x3c, !PT ; /* 0x7ff0000003490812 */ /* 0x000fe400078e3cff */ /*2ea0*/ @P0 MOV R72, RZ ; /* 0x000000ff00480202 */ /* 0x000fe20000000f00 */ /*2eb0*/ @P0 BRA 0x3080 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*2ec0*/ ISETP.GE.U32.AND P0, PT, R69, 0x1000001, PT ; /* 0x010000014500780c */ /* 0x000fda0003f06070 */ /*2ed0*/ @!P0 BRA 0x2fc0 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*2ee0*/ IADD3 R69, R3, -0x3fe00000, RZ ; /* 0xc020000003457810 */ /* 0x000fe20007ffe0ff */ /*2ef0*/ IMAD.MOV.U32 R68, RZ, RZ, R2 ; /* 0x000000ffff447224 */ /* 0x000fe200078e0002 */ /*2f00*/ MOV R72, R81 ; /* 0x0000005100487202 */ /* 0x000fe40000000f00 */ /*2f10*/ MUFU.RCP64H R73, R69 ; /* 0x0000004500497308 */ /* 0x000e280000001800 */ /*2f20*/ DFMA R80, -R68, R72, 1 ; /* 0x3ff000004450742b */ /* 0x001e0c0000000148 */ /*2f30*/ DFMA R80, R80, R80, R80 ; /* 0x000000505050722b */ /* 0x001e0c0000000050 */ /*2f40*/ DFMA R80, R72, R80, R72 ; /* 0x000000504850722b */ /* 0x001e0c0000000048 */ /*2f50*/ DFMA R72, -R68, R80, 1 ; /* 0x3ff000004448742b */ /* 0x001e0c0000000150 */ /*2f60*/ DFMA R72, R80, R72, R80 ; /* 0x000000485048722b */ /* 0x001e0c0000000050 */ /*2f70*/ DMUL R72, R72, 2.2250738585072013831e-308 ; /* 0x0010000048487828 */ /* 0x001e0c0000000000 */ /*2f80*/ DFMA R2, -R2, R72, 1 ; /* 0x3ff000000202742b */ /* 0x001e0c0000000148 */ /*2f90*/ DFMA R2, R2, R2, R2 ; /* 0x000000020202722b */ /* 0x001e0c0000000002 */ /*2fa0*/ DFMA R72, R72, R2, R72 ; /* 0x000000024848722b */ /* 0x0010620000000048 */ /*2fb0*/ BRA 0x3080 ; /* 0x000000c000007947 */ /* 0x000fea0003800000 */ /*2fc0*/ DMUL R2, R2, 8.11296384146066816958e+31 ; /* 0x4690000002027828 */ /* 0x000e220000000000 */ /*2fd0*/ IMAD.MOV.U32 R68, RZ, RZ, R81 ; /* 0x000000ffff447224 */ /* 0x000fca00078e0051 */ /*2fe0*/ MUFU.RCP64H R69, R3 ; /* 0x0000000300457308 */ /* 0x001e240000001800 */ /*2ff0*/ DFMA R72, -R2, R68, 1 ; /* 0x3ff000000248742b */ /* 0x001e0c0000000144 */ /*3000*/ DFMA R72, R72, R72, R72 ; /* 0x000000484848722b */ /* 0x001e0c0000000048 */ /*3010*/ DFMA R72, R68, R72, R68 ; /* 0x000000484448722b */ /* 0x001e0c0000000044 */ /*3020*/ DFMA R68, -R2, R72, 1 ; /* 0x3ff000000244742b */ /* 0x001e0c0000000148 */ /*3030*/ DFMA R68, R72, R68, R72 ; /* 0x000000444844722b */ /* 0x001e0c0000000048 */ /*3040*/ DMUL R72, R68, 8.11296384146066816958e+31 ; /* 0x4690000044487828 */ /* 0x0010620000000000 */ /*3050*/ BRA 0x3080 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*3060*/ LOP3.LUT R73, R3, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000003497812 */ /* 0x000fe400078efcff */ /*3070*/ MOV R72, R2 ; /* 0x0000000200487202 */ /* 0x000fe40000000f00 */ /*3080*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*3090*/ IMAD.MOV.U32 R2, RZ, RZ, R106 ; /* 0x000000ffff027224 */ /* 0x001fe200078e006a */ /*30a0*/ MOV R3, 0x0 ; /* 0x0000000000037802 */ /* 0x000fc80000000f00 */ /*30b0*/ RET.REL.NODEC R2 0x0 ; /* 0xffffcf4002007950 */ /* 0x000fea0003c3ffff */ /*30c0*/ BRA 0x30c0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*30d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*30e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*30f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z21exact_rhs_kernel_initPdiii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e220000002600 */ /*0020*/ MOV R11, 0x8 ; /* 0x00000008000b7802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R7, SR_CTAID.X ; /* 0x0000000000077919 */ /* 0x000e680000002500 */ /*0050*/ S2R R10, SR_TID.X ; /* 0x00000000000a7919 */ /* 0x000ea20000002100 */ /*0060*/ IADD3 R2, R0, c[0x0][0x170], RZ ; /* 0x00005c0000027a10 */ /* 0x001fc80007ffe0ff */ /*0070*/ IADD3 R3, R2, c[0x0][0x170], RZ ; /* 0x00005c0002037a10 */ /* 0x000fe20007ffe0ff */ /*0080*/ IMAD R0, R0, c[0x0][0x16c], R7.reuse ; /* 0x00005b0000007a24 */ /* 0x102fe400078e0207 */ /*0090*/ IMAD R2, R2, c[0x0][0x16c], R7.reuse ; /* 0x00005b0002027a24 */ /* 0x100fe200078e0207 */ /*00a0*/ IADD3 R4, R3.reuse, c[0x0][0x170], RZ ; /* 0x00005c0003047a10 */ /* 0x040fe20007ffe0ff */ /*00b0*/ IMAD R3, R3, c[0x0][0x16c], R7.reuse ; /* 0x00005b0003037a24 */ /* 0x100fe400078e0207 */ /*00c0*/ IMAD R0, R0, c[0x0][0x168], R10.reuse ; /* 0x00005a0000007a24 */ /* 0x104fe200078e020a */ /*00d0*/ IADD3 R6, R4.reuse, c[0x0][0x170], RZ ; /* 0x00005c0004067a10 */ /* 0x040fe20007ffe0ff */ /*00e0*/ IMAD R5, R4, c[0x0][0x16c], R7 ; /* 0x00005b0004057a24 */ /* 0x000fe400078e0207 */ /*00f0*/ IMAD R4, R2, c[0x0][0x168], R10 ; /* 0x00005a0002047a24 */ /* 0x000fc400078e020a */ /*0100*/ IMAD R7, R6, c[0x0][0x16c], R7 ; /* 0x00005b0006077a24 */ /* 0x000fe400078e0207 */ /*0110*/ IMAD R6, R3, c[0x0][0x168], R10.reuse ; /* 0x00005a0003067a24 */ /* 0x100fe400078e020a */ /*0120*/ IMAD R8, R5, c[0x0][0x168], R10.reuse ; /* 0x00005a0005087a24 */ /* 0x100fe400078e020a */ /*0130*/ IMAD R10, R7, c[0x0][0x168], R10 ; /* 0x00005a00070a7a24 */ /* 0x000fe400078e020a */ /*0140*/ IMAD.WIDE R2, R0, R11, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fc800078e020b */ /*0150*/ IMAD.WIDE R4, R4, R11.reuse, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x080fe200078e020b */ /*0160*/ STG.E.64 [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x000fe6000c101b04 */ /*0170*/ IMAD.WIDE R6, R6, R11.reuse, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x080fe200078e020b */ /*0180*/ STG.E.64 [R4.64], RZ ; /* 0x000000ff04007986 */ /* 0x000fe6000c101b04 */ /*0190*/ IMAD.WIDE R8, R8, R11.reuse, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x080fe200078e020b */ /*01a0*/ STG.E.64 [R6.64], RZ ; /* 0x000000ff06007986 */ /* 0x000fe6000c101b04 */ /*01b0*/ IMAD.WIDE R10, R10, R11, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fe200078e020b */ /*01c0*/ STG.E.64 [R8.64], RZ ; /* 0x000000ff08007986 */ /* 0x000fe8000c101b04 */ /*01d0*/ STG.E.64 [R10.64], RZ ; /* 0x000000ff0a007986 */ /* 0x000fe2000c101b04 */ /*01e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01f0*/ BRA 0x1f0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <stdlib.h> #include <iostream> #include <math.h> #include <hip/hip_runtime.h> #include <sys/time.h> #define NPB_VERSION "3.3.1" using namespace std; #define min(x,y) (x) <= (y) ? (x) : (y) #define max(x,y) (x) >= (y) ? (x) : (y) // block sizes for CUDA kernels #define NORM_BLOCK 32 #define SOLVE_BLOCK 32 #define ERHS_BLOCK 32 // timer constants #define t_total 0 #define t_rhsx 1 #define t_rhsy 2 #define t_rhsz 3 #define t_rhs 4 #define t_xsolve 5 #define t_ysolve 6 #define t_zsolve 7 #define t_rdis1 8 #define t_rdis2 9 #define t_txinvr 10 #define t_pinvr 11 #define t_ninvr 12 #define t_tzetar 13 #define t_add 14 #define t_last 15 //--------------------------------------------------------------------- // diffusion coefficients //--------------------------------------------------------------------- #define dx1 0.75 #define dx2 0.75 #define dx3 0.75 #define dx4 0.75 #define dx5 0.75 #define dy1 0.75 #define dy2 0.75 #define dy3 0.75 #define dy4 0.75 #define dy5 0.75 #define dz1 1.0 #define dz2 1.0 #define dz3 1.0 #define dz4 1.0 #define dz5 1.0 //#define dxmax max(dx3,dx4) //#define dymax max(dy2,dy4) //#define dzmax max(dz2,dz3) #define dxmax dx3 #define dymax dy2 #define dzmax dz2 //--------------------------------------------------------------------- // fourth difference dissipation //--------------------------------------------------------------------- #define dssp (max(max(dx1,dy1),dz1)*.25) #define c4dssp (4.0*dssp) #define c5dssp (5.0*dssp) #define c1 1.4 #define c2 0.4 #define c3 0.1 #define c4 1.0 #define c5 1.4 #define c1c2 (c1*c2) #define c1c5 (c1*c5) #define c3c4 (c3*c4) #define c1345 (c1c5*c3c4) #define conz1 (1.0-c1c5) #define c2iv 2.5 #define con43 (4.0/3.0) #define con16 (1.0/6.0) // macros to linearize multidimensional array accesses #define fu(m,i,j,k) fu[(i)+nx*((j)+ny*((k)+nz*(m)))] #define forcing(m,i,j,k) forcing[(i)+nx*((j)+ny*((k)+nz*(m)))] #define rhs(m,i,j,k) rhs[m+(i)*5+(j)*5*nx+(k)*5*nx*ny] #define rho_i(i,j,k) rho_i[i+(j)*nx+(k)*nx*ny] #define us(i,j,k) us[i+(j)*nx+(k)*nx*ny] #define vs(i,j,k) vs[i+(j)*nx+(k)*nx*ny] #define ws(i,j,k) ws[i+(j)*nx+(k)*nx*ny] #define square(i,j,k) square[i+(j)*nx+(k)*nx*ny] #define qs(i,j,k) qs[i+(j)*nx+(k)*nx*ny] #define speed(i,j,k) speed[i+(j)*nx+(k)*nx*ny] static void inline HandleError( hipError_t err, const char *file, int line ) { if (err != hipSuccess) { printf( "%s in %s at line %d\n", hipGetErrorString( err ), file, line ); exit( EXIT_FAILURE ); } } #define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ )) __constant__ double tx1, tx2, tx3, ty1, ty2, ty3, tz1, tz2, tz3; __constant__ double bt, dt, dtdssp; __constant__ double dnxm1, dnym1, dnzm1; __constant__ double dtx1, dttx2, dty1, dtty2, dtz1, dttz2, c2dttx1, c2dtty1, c2dttz1; __constant__ double comz1, comz4, comz5, comz6, c3c4tx3, c3c4ty3, c3c4tz3; __constant__ double xxcon1, xxcon2, xxcon3, xxcon4, xxcon5, dx1tx1, dx2tx1, dx3tx1, dx4tx1, dx5tx1; __constant__ double yycon1, yycon2, yycon3, yycon4, yycon5, dy1ty1, dy2ty1, dy3ty1, dy4ty1, dy5ty1; __constant__ double zzcon1, zzcon2, zzcon3, zzcon4, zzcon5, dz1tz1, dz2tz1, dz3tz1, dz4tz1, dz5tz1; __constant__ double ce[13][5]; //--------------------------------------------------------------------- // exact_rhs computation //--------------------------------------------------------------------- __device__ static void exact_solution_kernel (const double xi, const double eta, const double zta, double *dtemp) { for (int m = 0; m < 5; m++) dtemp[m] = ce[0][m] + xi*(ce[1][m] + xi*(ce[4][m] + xi*(ce[7][m] + xi*ce[10][m]))) + eta*(ce[2][m] + eta*(ce[5][m] + eta*(ce[8][m] + eta*ce[11][m])))+ zta*(ce[3][m] + zta*(ce[6][m] + zta*(ce[9][m] + zta*ce[12][m]))); } __global__ static void exact_rhs_kernel_init (double *forcing, const int nx, const int ny, const int nz) { int i, j, k, m; k = blockIdx.y; j = blockIdx.x; i = threadIdx.x; for (m = 0; m < 5; m++) forcing(m,i,j,k) = (double)0.0; } __global__ static void exact_rhs_kernel_x (double *forcing, const int nx, const int ny, const int nz) { int i, j, k, m; double xi, eta, zta, dtemp[5], dtpp; double ue[5][5], buf[3][5], cuf[3], q[3]; k = blockIdx.x*blockDim.x+threadIdx.x+1; j = blockIdx.y*blockDim.y+threadIdx.y+1; if (k >= nz-1 || j >= ny-1) return; zta = (double)k * dnzm1; eta = (double)j * dnym1; //--------------------------------------------------------------------- // xi-direction flux differences //--------------------------------------------------------------------- for (i = 0; i < 3; i++) { xi = (double)i * dnxm1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[i+1][m] = dtemp[m]; dtpp = 1.0/dtemp[0]; for (m = 1; m < 5; m++) buf[i][m] = dtpp*dtemp[m]; cuf[i] = buf[i][1] * buf[i][1]; buf[i][0] = cuf[i] + buf[i][2] * buf[i][2] + buf[i][3] * buf[i][3]; q[i] = 0.5 * (buf[i][1]*ue[i+1][1] + buf[i][2]*ue[i+1][2] + buf[i][3]*ue[i+1][3]); } for (i = 1; i < nx-1; i++) { if (i+2 < nx) { xi = (double)(i+2) * dnxm1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[4][m] = dtemp[m]; } dtemp[0] = 0.0 - tx2*(ue[3][1]-ue[1][1])+ dx1tx1*(ue[3][0]-2.0*ue[2][0]+ue[1][0]); dtemp[1] = 0.0 - tx2*((ue[3][1]*buf[2][1]+c2*(ue[3][4]-q[2]))-(ue[1][1]*buf[0][1]+c2*(ue[1][4]-q[0])))+xxcon1*(buf[2][1]-2.0*buf[1][1]+buf[0][1])+dx2tx1*(ue[3][1]-2.0*ue[2][1]+ue[1][1]); dtemp[2] = 0.0 - tx2*(ue[3][2]*buf[2][1]-ue[1][2]*buf[0][1])+xxcon2*(buf[2][2]-2.0*buf[1][2]+buf[0][2])+dx3tx1*(ue[3][2]-2.0*ue[2][2]+ue[1][2]); dtemp[3] = 0.0 - tx2*(ue[3][3]*buf[2][1]-ue[1][3]*buf[0][1])+xxcon2*(buf[2][3]-2.0*buf[1][3]+buf[0][3])+dx4tx1*(ue[3][3]-2.0*ue[2][3]+ue[1][3]); dtemp[4] = 0.0 - tx2*(buf[2][1]*(c1*ue[3][4]-c2*q[2])-buf[0][1]*(c1*ue[1][4]-c2*q[0]))+0.5*xxcon3*(buf[2][0]-2.0*buf[1][0]+buf[0][0])+xxcon4*(cuf[2]-2.0*cuf[1]+cuf[0])+ xxcon5*(buf[2][4]-2.0*buf[1][4]+buf[0][4])+dx5tx1*(ue[3][4]-2.0*ue[2][4]+ ue[1][4]); //--------------------------------------------------------------------- // Fourth-order dissipation //--------------------------------------------------------------------- if (i == 1) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(5.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (i == 2) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(-4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (i >= 3 && i < nx-3) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(ue[0][m] - 4.0*ue[1][m]+6.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (i == nx-3) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(ue[0][m] - 4.0*ue[1][m] +6.0*ue[2][m] - 4.0*ue[3][m]); } else if (i == nx-2) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(ue[0][m] - 4.0*ue[1][m] + 5.0*ue[2][m]); } for (m = 0; m < 5; m++) { ue[0][m] = ue[1][m]; ue[1][m] = ue[2][m]; ue[2][m] = ue[3][m]; ue[3][m] = ue[4][m]; buf[0][m] = buf[1][m]; buf[1][m] = buf[2][m]; } cuf[0] = cuf[1]; cuf[1] = cuf[2]; q[0] = q[1]; q[1] = q[2]; if (i < nx-2) { dtpp = 1.0/ue[3][0]; for (m = 1; m < 5; m++) buf[2][m] = dtpp*ue[3][m]; cuf[2] = buf[2][1] * buf[2][1]; buf[2][0] = cuf[2] + buf[2][2] * buf[2][2] + buf[2][3] * buf[2][3]; q[2] = 0.5 * (buf[2][1]*ue[3][1] + buf[2][2]*ue[3][2] + buf[2][3]*ue[3][3]); } } } __global__ static void exact_rhs_kernel_y (double *forcing, const int nx, const int ny, const int nz) { int i, j, k, m; double xi, eta, zta, dtemp[5], dtpp; double ue[5][5], buf[3][5], cuf[3], q[3]; k = blockIdx.x*blockDim.x+threadIdx.x+1; i = blockIdx.y*blockDim.y+threadIdx.y+1; if (k >= nz-1 || i >= nx-1) return; zta = (double)k * dnzm1; xi = (double)i * dnxm1; //--------------------------------------------------------------------- // eta-direction flux differences //--------------------------------------------------------------------- for (j = 0; j < 3; j++) { eta = (double)j * dnym1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[j+1][m] = dtemp[m]; dtpp = 1.0/dtemp[0]; for (m = 1; m < 5; m++) buf[j][m] = dtpp * dtemp[m]; cuf[j] = buf[j][2] * buf[j][2]; buf[j][0] = cuf[j] + buf[j][1] * buf[j][1] + buf[j][3] * buf[j][3]; q[j] = 0.5*(buf[j][1]*ue[j+1][1] + buf[j][2]*ue[j+1][2] + buf[j][3]*ue[j+1][3]); } for (j = 1; j < ny-1; j++) { if (j+2 < ny) { eta = (double)(j+2) * dnym1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[4][m] = dtemp[m]; } dtemp[0] = forcing(0,i,j,k) - ty2*(ue[3][2]-ue[1][2])+ dy1ty1*(ue[3][0]-2.0*ue[2][0]+ue[1][0]); dtemp[1] = forcing(1,i,j,k) - ty2*(ue[3][1]*buf[2][2]-ue[1][1]*buf[0][2])+yycon2*(buf[2][1]-2.0*buf[1][1]+buf[0][1])+dy2ty1*(ue[3][1]-2.0*ue[2][1]+ ue[1][1]); dtemp[2] = forcing(2,i,j,k) - ty2*((ue[3][2]*buf[2][2]+c2*(ue[3][4]-q[2]))-(ue[1][2]*buf[0][2]+c2*(ue[1][4]-q[0])))+yycon1*(buf[2][2]-2.0*buf[1][2]+buf[0][2])+dy3ty1*( ue[3][2]-2.0*ue[2][2] +ue[1][2]); dtemp[3] = forcing(3,i,j,k) - ty2*(ue[3][3]*buf[2][2]-ue[1][3]*buf[0][2])+yycon2*(buf[2][3]-2.0*buf[1][3]+buf[0][3])+dy4ty1*( ue[3][3]-2.0*ue[2][3]+ ue[1][3]); dtemp[4] = forcing(4,i,j,k) - ty2*(buf[2][2]*(c1*ue[3][4]-c2*q[2])-buf[0][2]*(c1*ue[1][4]-c2*q[0]))+0.5*yycon3*(buf[2][0]-2.0*buf[1][0]+buf[0][0])+yycon4*(cuf[2]-2.0*cuf[1]+cuf[0])+ yycon5*(buf[2][4]-2.0*buf[1][4]+buf[0][4])+dy5ty1*(ue[3][4]-2.0*ue[2][4]+ue[1][4]); //--------------------------------------------------------------------- // Fourth-order dissipation //--------------------------------------------------------------------- if (j == 1) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp * (5.0*ue[2][m] - 4.0*ue[3][m] +ue[4][m]); } else if (j == 2) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp * (-4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (j >= 3 && j < ny-3) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp*(ue[0][m] - 4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m] + ue[4][m]); } else if (j == ny-3) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp * (ue[0][m] - 4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m]); } else if (j == ny-2) { for (m = 0; m < 5; m++) forcing(m,i,j,k) = dtemp[m] - dssp * (ue[0][m] - 4.0*ue[1][m] + 5.0*ue[2][m]); } for (m = 0; m < 5; m++) { ue[0][m] = ue[1][m]; ue[1][m] = ue[2][m]; ue[2][m] = ue[3][m]; ue[3][m] = ue[4][m]; buf[0][m] = buf[1][m]; buf[1][m] = buf[2][m]; } cuf[0] = cuf[1]; cuf[1] = cuf[2]; q[0] = q[1]; q[1] = q[2]; if (j < ny-2) { dtpp = 1.0/ue[3][0]; for (m = 1; m < 5; m++) buf[2][m] = dtpp * ue[3][m]; cuf[2] = buf[2][2] * buf[2][2]; buf[2][0] = cuf[2] + buf[2][1] * buf[2][1] + buf[2][3] * buf[2][3]; q[2] = 0.5*(buf[2][1]*ue[3][1] + buf[2][2]*ue[3][2] + buf[2][3]*ue[3][3]); } } } __global__ static void exact_rhs_kernel_z (double *forcing, const int nx, const int ny, const int nz) { int i, j, k, m; double xi, eta, zta, dtpp, dtemp[5]; double ue[5][5], buf[3][5], cuf[3], q[3]; j = blockIdx.x*blockDim.x+threadIdx.x+1; i = blockIdx.y*blockDim.y+threadIdx.y+1; if (j >= ny-1 || i >= nx-1) return; eta = (double)j * dnym1; xi = (double)i * dnxm1; //--------------------------------------------------------------------- // zeta-direction flux differences //--------------------------------------------------------------------- for (k = 0; k < 3; k++) { zta = (double)k * dnzm1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[k+1][m] = dtemp[m]; dtpp = 1.0/dtemp[0]; for (m = 1; m < 5; m++) buf[k][m] = dtpp * dtemp[m]; cuf[k] = buf[k][3] * buf[k][3]; buf[k][0] = cuf[k] + buf[k][1] * buf[k][1] + buf[k][2] * buf[k][2]; q[k] = 0.5*(buf[k][1]*ue[k+1][1] + buf[k][2]*ue[k+1][2] + buf[k][3]*ue[k+1][3]); } for (k = 1; k < nz-1; k++) { if (k+2 < nz) { zta = (double)(k+2) * dnzm1; exact_solution_kernel(xi, eta, zta, dtemp); for (m = 0; m < 5; m++) ue[4][m] = dtemp[m]; } dtemp[0] = forcing(0,i,j,k) - tz2*(ue[3][3]-ue[1][3])+dz1tz1*(ue[3][0]-2.0*ue[2][0]+ue[1][0]); dtemp[1] = forcing(1,i,j,k) - tz2*(ue[3][1]*buf[2][3]-ue[1][1]*buf[0][3])+zzcon2*(buf[2][1]-2.0*buf[1][1]+buf[0][1])+dz2tz1*(ue[3][1]-2.0*ue[2][1]+ue[1][1]); dtemp[2] = forcing(2,i,j,k) - tz2*(ue[3][2]*buf[2][3]-ue[1][2]*buf[0][3])+zzcon2*(buf[2][2]-2.0*buf[1][2]+buf[0][2])+dz3tz1*(ue[3][2]-2.0*ue[2][2]+ue[1][2]); dtemp[3] = forcing(3,i,j,k) - tz2*((ue[3][3]*buf[2][3]+c2*(ue[3][4]-q[2]))-(ue[1][3]*buf[0][3]+c2*(ue[1][4]-q[0])))+zzcon1*(buf[2][3]-2.0*buf[1][3]+buf[0][3])+dz4tz1*(ue[3][3]-2.0*ue[2][3] +ue[1][3]); dtemp[4] = forcing(4,i,j,k) - tz2*(buf[2][3]*(c1*ue[3][4]-c2*q[2])-buf[0][3]*(c1*ue[1][4]-c2*q[0]))+0.5*zzcon3*(buf[2][0]-2.0*buf[1][0]+buf[0][0])+ zzcon4*(cuf[2]-2.0*cuf[1]+cuf[0])+zzcon5*(buf[2][4]-2.0*buf[1][4]+buf[0][4])+dz5tz1*(ue[3][4]-2.0*ue[2][4]+ue[1][4]); //--------------------------------------------------------------------- // Fourth-order dissipation //--------------------------------------------------------------------- if (k == 1) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(5.0*ue[2][m]-4.0*ue[3][m]+ue[4][m]); } else if (k == 2) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(-4.0*ue[1][m]+6.0*ue[2][m]-4.0*ue[3][m]+ue[4][m]); } else if (k >= 3 && k < nz-3) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(ue[0][m]-4.0*ue[1][m]+6.0*ue[2][m]-4.0*ue[3][m]+ue[4][m]); } else if (k == nz-3) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(ue[0][m]-4.0*ue[1][m] + 6.0*ue[2][m] - 4.0*ue[3][m]); } else if (k == nz-2) { for (m = 0; m < 5; m++) dtemp[m] = dtemp[m] - dssp*(ue[0][m]-4.0*ue[1][m]+5.0*ue[2][m]); } //--------------------------------------------------------------------- // now change the sign of the forcing function, //--------------------------------------------------------------------- for (m = 0; m < 5; m++) forcing(m,i,j,k) = -1.0 * dtemp[m]; for (m = 0; m < 5; m++) { ue[0][m] = ue[1][m]; ue[1][m] = ue[2][m]; ue[2][m] = ue[3][m]; ue[3][m] = ue[4][m]; buf[0][m] = buf[1][m]; buf[1][m] = buf[2][m]; } cuf[0] = cuf[1]; cuf[1] = cuf[2]; q[0] = q[1]; q[1] = q[2]; if (k < nz-2) { dtpp = 1.0/ue[3][0]; for (m = 1; m < 5; m++) buf[2][m] = dtpp * ue[3][m]; cuf[2] = buf[2][3] * buf[2][3]; buf[2][0] = cuf[2] + buf[2][1] * buf[2][1] + buf[2][2] * buf[2][2]; q[2] = 0.5*(buf[2][1]*ue[3][1] + buf[2][2]*ue[3][2] + buf[2][3]*ue[3][3]); } } } void exact_rhs (double* forcing, int nx, int ny, int nz) { dim3 gridinit(ny,nz); exact_rhs_kernel_init<<<gridinit,nx>>>(forcing, nx, ny, nz); int yblock = min(ERHS_BLOCK,ny); int ygrid = (ny+yblock-1)/yblock; int zblock_y = min(ERHS_BLOCK/yblock,nz); int zgrid_y = (nz+zblock_y-1)/zblock_y; dim3 grid_x(zgrid_y,ygrid), block_x(zblock_y,yblock); exact_rhs_kernel_x<<<grid_x,block_x>>>(forcing, nx, ny, nz); int xblock = min(ERHS_BLOCK,nx); int xgrid = (nx+xblock-1)/xblock; int zblock_x = min(ERHS_BLOCK/xblock,nz); int zgrid_x = (nz+zblock_x-1)/zblock_x; dim3 grid_y(zgrid_x,xgrid), block_y(zblock_x,xblock); exact_rhs_kernel_y<<<grid_y,block_y>>>(forcing, nx, ny, nz); int yblock_x = min(ERHS_BLOCK/xblock,ny); int ygrid_x = (ny+yblock_x-1)/yblock_x; dim3 grid_z(ygrid_x,xgrid), block_z(yblock_x,xblock); exact_rhs_kernel_z<<<grid_z,block_z>>>(forcing, nx, ny, nz); } //--------------------------------------------------------------------- // initialize_kernel //--------------------------------------------------------------------- __global__ static void initialize_kernel (double *fu, const int nx, const int ny, const int nz) { int i, j, k, m; double xi, eta, zta, temp[5]; double Pface11[5], Pface12[5], Pface21[5], Pface22[5], Pface31[5], Pface32[5]; double zero, one; k = blockIdx.x; j = blockIdx.y; i = threadIdx.x; //--------------------------------------------------------------------- // to compute the whole thing with a simple loop. Make sure those // values are nonzero by initializing the whole thing here. //--------------------------------------------------------------------- fu(0,i,j,k) = (double)1.0; fu(1,i,j,k) = (double)0.0; fu(2,i,j,k) = (double)0.0; fu(3,i,j,k) = (double)0.0; fu(4,i,j,k) = (double)1.0; zero = (double)0.0; one = (double)1.0; //--------------------------------------------------------------------- // first store the "interpolated" values everywhere on the zone //--------------------------------------------------------------------- zta = (double)k * dnzm1; eta = (double)j * dnym1; xi = (double)i * dnxm1; exact_solution_kernel (zero, eta, zta, Pface11); exact_solution_kernel (one, eta, zta, Pface12); exact_solution_kernel (xi, zero, zta, Pface21); exact_solution_kernel (xi, one, zta, Pface22); exact_solution_kernel (xi, eta, zero, Pface31); exact_solution_kernel (xi, eta, one, Pface32); for (m = 0; m < 5; m++) { double Pxi = xi * Pface12[m] + (1.0-xi)*Pface11[m]; double Peta = eta * Pface22[m] + (1.0-eta)*Pface21[m]; double Pzeta = zta * Pface32[m] + (1.0-zta)*Pface31[m]; fu(m,i,j,k) = Pxi + Peta + Pzeta - Pxi*Peta - Pxi*Pzeta - Peta*Pzeta + Pxi*Peta*Pzeta; } //--------------------------------------------------------------------- // now store the exact values on the boundaries //--------------------------------------------------------------------- //--------------------------------------------------------------------- // west face //--------------------------------------------------------------------- xi = (double)0.0; if (i == 0) { zta = (double)k * dnzm1; eta = (double)j * dnym1; exact_solution_kernel (xi, eta, zta, temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // east face //--------------------------------------------------------------------- xi = (double)1.0; if (i == nx-1) { zta = (double)k * dnzm1; eta = (double)j * dnym1; exact_solution_kernel (xi, eta, zta, temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // south face //--------------------------------------------------------------------- eta = (double)0.0; if (j == 0) { zta = (double)k * dnzm1; xi = (double)i * dnxm1; exact_solution_kernel (xi,eta,zta,temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // north face //--------------------------------------------------------------------- eta = (double)1.0; if (j == ny-1) { zta = (double)k * dnzm1; xi = (double)i * dnxm1; exact_solution_kernel (xi,eta,zta,temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // bottom face //--------------------------------------------------------------------- zta = (double)0.0; if (k == 0) { eta = (double)j * dnym1; xi = (double)i * dnxm1; exact_solution_kernel (xi, eta, zta, temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } //--------------------------------------------------------------------- // top face //--------------------------------------------------------------------- zta = (double)1.0; if (k == nz-1) { eta = (double)j * dnym1; xi = (double)i * dnxm1; exact_solution_kernel (xi, eta, zta, temp); for (m = 0; m < 5; m++) fu(m,i,j,k) = temp[m]; } } //--------------------------------------------------------------------- // adi: compute_rhs //--------------------------------------------------------------------- __global__ static void compute_rhs_kernel_1 (double *rho_i, double *us, double *vs, double *ws, double *speed, double *qs, double *square, double *fu, const int nx, const int ny, const int nz) { int i, j, k; k = blockIdx.y; j = blockIdx.x; i = threadIdx.x; //--------------------------------------------------------------------- // compute the reciprocal of density, and the kinetic energy, // and the speed of sound. //--------------------------------------------------------------------- double rho_nv = 1.0/fu(0,i,j,k); double square_ijk; rho_i(i,j,k) = rho_nv; us(i,j,k) = fu(1,i,j,k) * rho_nv; vs(i,j,k) = fu(2,i,j,k) * rho_nv; ws(i,j,k) = fu(3,i,j,k) * rho_nv; square_ijk = 0.5*(fu(1,i,j,k)*fu(1,i,j,k) + fu(2,i,j,k)*fu(2,i,j,k) + fu(3,i,j,k)*fu(3,i,j,k)) * rho_nv; square(i,j,k) = 0.5*(fu(1,i,j,k)*fu(1,i,j,k) + fu(2,i,j,k)*fu(2,i,j,k) + fu(3,i,j,k)*fu(3,i,j,k)) * rho_nv; qs(i,j,k) = square_ijk * rho_nv; //--------------------------------------------------------------------- // (don't need speed and ainx until the lhs computation) //--------------------------------------------------------------------- speed(i,j,k) = sqrt(c1c2*rho_nv*(fu(4,i,j,k) - square_ijk)); } __global__ static void compute_rhs_kernel_2 (double *rho_i, double *us, double *vs, double *ws, double *qs, double *square, double *rhs, double *forcing, double *fu, int nx, const int ny, const int nz) { int i, j, k, m; k = blockIdx.y; j = blockIdx.x; i = threadIdx.x; double rtmp[5]; //--------------------------------------------------------------------- // copy the exact forcing term to the right hand side; because // this forcing term is known, we can store it on the whole zone // including the boundary //--------------------------------------------------------------------- for (m = 0; m < 5; m++) rtmp[m] = forcing(m,i,j,k); //--------------------------------------------------------------------- // compute xi-direction fluxes //--------------------------------------------------------------------- if (k >= 1 && k < nz-1 && j >= 1 && j < ny-1 && i >= 1 && i < nx-1) { double uijk = us(i,j,k); double up1 = us(i+1,j,k); double um1 = us(i-1,j,k); rtmp[0] = rtmp[0] + dx1tx1*(fu(0,i+1,j,k) - 2.0*fu(0,i,j,k) + fu(0,i-1,j,k)) - tx2*(fu(1,i+1,j,k)-fu(1,i-1,j,k)); rtmp[1] = rtmp[1] + dx2tx1*(fu(1,i+1,j,k) - 2.0*fu(1,i,j,k) + fu(1,i-1,j,k)) + xxcon2*con43*(up1-2.0*uijk+um1) - tx2*(fu(1,i+1,j,k)*up1 - fu(1,i-1,j,k)*um1 + (fu(4,i+1,j,k)-square(i+1,j,k)-fu(4,i-1,j,k)+square(i-1,j,k))*c2); rtmp[2] = rtmp[2] + dx3tx1*(fu(2,i+1,j,k) - 2.0*fu(2,i,j,k) + fu(2,i-1,j,k)) + xxcon2*(vs(i+1,j,k)-2.0*vs(i,j,k)+vs(i-1,j,k)) - tx2*(fu(2,i+1,j,k)*up1 - fu(2,i-1,j,k)*um1); rtmp[3] = rtmp[3] + dx4tx1*(fu(3,i+1,j,k) - 2.0*fu(3,i,j,k) + fu(3,i-1,j,k)) + xxcon2*(ws(i+1,j,k)-2.0*ws(i,j,k)+ws(i-1,j,k)) - tx2*(fu(3,i+1,j,k)*up1 - fu(3,i-1,j,k)*um1); rtmp[4] = rtmp[4] + dx5tx1*(fu(4,i+1,j,k) - 2.0*fu(4,i,j,k) + fu(4,i-1,j,k)) + xxcon3*(qs(i+1,j,k)-2.0*qs(i,j,k)+qs(i-1,j,k))+ xxcon4*(up1*up1-2.0*uijk*uijk+um1*um1) + xxcon5*(fu(4,i+1,j,k)*rho_i(i+1,j,k) - 2.0*fu(4,i,j,k)*rho_i(i,j,k) + fu(4,i-1,j,k)*rho_i(i-1,j,k)) - tx2*((c1*fu(4,i+1,j,k) - c2*square(i+1,j,k))*up1 - (c1*fu(4,i-1,j,k) - c2*square(i-1,j,k))*um1 ); //--------------------------------------------------------------------- // add fourth order xi-direction dissipation //--------------------------------------------------------------------- if (i == 1) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * (5.0*fu(m,i,j,k)-4.0*fu(m,i+1,j,k)+fu(m,i+2,j,k)); } else if (i == 2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * (-4.0*fu(m,i-1,j,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i+1,j,k)+fu(m,i+2,j,k)); } else if (i >= 3 && i < nx-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * ( fu(m,i-2,j,k)-4.0*fu(m,i-1,j,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i+1,j,k)+fu(m,i+2,j,k)); } else if (i == nx-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * (fu(m,i-2,j,k)-4.0*fu(m,i-1,j,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i+1,j,k) ); } else if (i == nx-2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp * (fu(m,i-2,j,k)-4.0*fu(m,i-1,j,k) + 5.0*fu(m,i,j,k)); } //--------------------------------------------------------------------- // compute eta-direction fluxes //--------------------------------------------------------------------- double vijk = vs(i,j,k); double vp1 = vs(i,j+1,k); double vm1 = vs(i,j-1,k); rtmp[0] = rtmp[0] + dy1ty1*(fu(0,i,j+1,k) - 2.0*fu(0,i,j,k) + fu(0,i,j-1,k)) - ty2*(fu(2,i,j+1,k)-fu(2,i,j-1,k)); rtmp[1] = rtmp[1] + dy2ty1*(fu(1,i,j+1,k) - 2.0*fu(1,i,j,k) + fu(1,i,j-1,k)) + yycon2*(us(i,j+1,k)-2.0*us(i,j,k)+us(i,j-1,k)) - ty2*(fu(1,i,j+1,k)*vp1-fu(1,i,j-1,k)*vm1); rtmp[2] = rtmp[2] + dy3ty1*(fu(2,i,j+1,k) - 2.0*fu(2,i,j,k) + fu(2,i,j-1,k)) + yycon2*con43*(vp1-2.0*vijk+vm1) - ty2*(fu(2,i,j+1,k)*vp1-fu(2,i,j-1,k)*vm1+(fu(4,i,j+1,k)-square(i,j+1,k)-fu(4,i,j-1,k)+square(i,j-1,k))*c2); rtmp[3] = rtmp[3] + dy4ty1*(fu(3,i,j+1,k) - 2.0*fu(3,i,j,k) + fu(3,i,j-1,k)) + yycon2*(ws(i,j+1,k)-2.0*ws(i,j,k)+ws(i,j-1,k))-ty2*(fu(3,i,j+1,k)*vp1-fu(3,i,j-1,k)*vm1); rtmp[4] = rtmp[4] + dy5ty1*(fu(4,i,j+1,k) - 2.0*fu(4,i,j,k) + fu(4,i,j-1,k)) + yycon3*(qs(i,j+1,k)-2.0*qs(i,j,k)+qs(i,j-1,k)) + yycon4*(vp1*vp1-2.0*vijk*vijk+vm1*vm1) + yycon5*(fu(4,i,j+1,k)*rho_i(i,j+1,k)-2.0*fu(4,i,j,k)*rho_i(i,j,k)+fu(4,i,j-1,k)*rho_i(i,j-1,k)) - ty2*((c1*fu(4,i,j+1,k)-c2*square(i,j+1,k))*vp1 - (c1*fu(4,i,j-1,k)-c2*square(i,j-1,k))*vm1); //--------------------------------------------------------------------- // add fourth order eta-direction dissipation //--------------------------------------------------------------------- if (j == 1) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(5.0*fu(m,i,j,k)-4.0*fu(m,i,j+1,k)+fu(m,i,j+2,k)); } else if (j == 2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(-4.0*fu(m,i,j-1,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j+1,k)+fu(m,i,j+2,k)); } else if (j >= 3 && j < ny-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j-2,k)-4.0*fu(m,i,j-1,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j+1,k)+fu(m,i,j+2,k)); } else if (j == ny-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j-2,k)-4.0*fu(m,i,j-1,k)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j+1,k)); } else if (j == ny-2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j-2,k)-4.0*fu(m,i,j-1,k)+5.0*fu(m,i,j,k)); } //--------------------------------------------------------------------- // compute zeta-direction fluxes //--------------------------------------------------------------------- double wijk = ws(i,j,k); double wp1 = ws(i,j,k+1); double wm1 = ws(i,j,k-1); rtmp[0] = rtmp[0] + dz1tz1*(fu(0,i,j,k+1)-2.0*fu(0,i,j,k)+fu(0,i,j,k-1)) - tz2*(fu(3,i,j,k+1)-fu(3,i,j,k-1)); rtmp[1] = rtmp[1] + dz2tz1*(fu(1,i,j,k+1)-2.0*fu(1,i,j,k)+fu(1,i,j,k-1)) + zzcon2*(us(i,j,k+1)-2.0*us(i,j,k)+us(i,j,k-1)) - tz2*(fu(1,i,j,k+1)*wp1-fu(1,i,j,k-1)*wm1); rtmp[2] = rtmp[2] + dz3tz1*(fu(2,i,j,k+1)-2.0*fu(2,i,j,k)+fu(2,i,j,k-1)) + zzcon2*(vs(i,j,k+1)-2.0*vs(i,j,k)+vs(i,j,k-1)) - tz2*(fu(2,i,j,k+1)*wp1-fu(2,i,j,k-1)*wm1); rtmp[3] = rtmp[3] + dz4tz1*(fu(3,i,j,k+1)-2.0*fu(3,i,j,k)+fu(3,i,j,k-1)) + zzcon2*con43*(wp1-2.0*wijk+wm1) - tz2*(fu(3,i,j,k+1)*wp1-fu(3,i,j,k-1)*wm1+(fu(4,i,j,k+1)-square(i,j,k+1)-fu(4,i,j,k-1)+square(i,j,k-1))*c2); rtmp[4] = rtmp[4] + dz5tz1*(fu(4,i,j,k+1)-2.0*fu(4,i,j,k)+fu(4,i,j,k-1)) + zzcon3*(qs(i,j,k+1)-2.0*qs(i,j,k)+qs(i,j,k-1)) + zzcon4*(wp1*wp1-2.0*wijk*wijk+wm1*wm1) + zzcon5*(fu(4,i,j,k+1)*rho_i(i,j,k+1)-2.0*fu(4,i,j,k)*rho_i(i,j,k)+fu(4,i,j,k-1)*rho_i(i,j,k-1)) - tz2*((c1*fu(4,i,j,k+1)-c2*square(i,j,k+1))*wp1-(c1*fu(4,i,j,k-1)-c2*square(i,j,k-1))*wm1); //--------------------------------------------------------------------- // add fourth order zeta-direction dissipation //--------------------------------------------------------------------- if (k == 1) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(5.0*fu(m,i,j,k)-4.0*fu(m,i,j,k+1)+fu(m,i,j,k+2)); } else if (k == 2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(-4.0*fu(m,i,j,k-1)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j,k+1)+fu(m,i,j,k+2)); } else if (k >= 3 && k < nz-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j,k-2)-4.0*fu(m,i,j,k-1)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j,k+1)+fu(m,i,j,k+2)); } else if (k == nz-3) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j,k-2)-4.0*fu(m,i,j,k-1)+6.0*fu(m,i,j,k)-4.0*fu(m,i,j,k+1)); } else if (k == nz-2) { for (m = 0; m < 5; m++) rtmp[m] = rtmp[m] - dssp*(fu(m,i,j,k-2)-4.0*fu(m,i,j,k-1)+5.0*fu(m,i,j,k)); } for (m = 0; m < 5; m++) rtmp[m] *= dt; } for (m = 0; m < 5; m++) rhs(m,i,j,k) = rtmp[m]; } //--------------------------------------------------------------------- // adi: txinvr //--------------------------------------------------------------------- __global__ static void txinvr_kernel ( double *rho_i, double *us, double *vs, double *ws, double *speed, double *qs, double *rhs, const int nx, const int ny, const int nz) { int i, j, k; k = blockIdx.y+1; j = blockIdx.x+1; i = threadIdx.x+1; double ru1 = rho_i(i,j,k); double uu = us(i,j,k); double vv = vs(i,j,k); double ww = ws(i,j,k); double ap = speed(i,j,k); double ac2inv = 1.0/( ap*ap ); double r1 = rhs(0,i,j,k); double r2 = rhs(1,i,j,k); double r3 = rhs(2,i,j,k); double r4 = rhs(3,i,j,k); double r5 = rhs(4,i,j,k); double t1 = c2*ac2inv*(qs(i,j,k)*r1 - uu*r2 - vv*r3 - ww*r4 + r5); double t2 = bt * ru1 * ( uu * r1 - r2 ); double t3 = ( bt * ru1 * ap ) * t1; rhs(0,i,j,k) = r1 - t1; rhs(1,i,j,k) = -ru1*(ww*r1-r4); rhs(2,i,j,k) = ru1*(vv*r1-r3); rhs(3,i,j,k) = -t2+t3; rhs(4,i,j,k) = t2+t3; } //--------------------------------------------------------------------- // adi: x_solve //--------------------------------------------------------------------- #define lhs(m,i,j,k) lhs[(j-1)+(ny-2)*((k-1)+(nz-2)*((i)+nx*(m-3)))] #define lhsp(m,i,j,k) lhs[(j-1)+(ny-2)*((k-1)+(nz-2)*((i)+nx*(m+4)))] #define lhsm(m,i,j,k) lhs[(j-1)+(ny-2)*((k-1)+(nz-2)*((i)+nx*(m-3+2)))] #define rtmp(m,i,j,k) rstmp[(j)+ny*((k)+nz*((i)+nx*(m)))] __global__ static void x_solve_kernel (double *rho_i, double *us, double *speed, double *rhs, double *lhs, double *rstmp, const int nx, const int ny, const int nz) { int i, j, k, m; double rhon[3], cv[3], _ls[3][5], _lp[3][5], _rs[3][5], fac1; double zero; k = blockIdx.x*blockDim.x+threadIdx.x+1; j = blockIdx.y*blockDim.y+threadIdx.y+1; if (k >= nz-1 || j >= ny-1) return; //--------------------------------------------------------------------- // Computes the left hand side for the three x-factors //--------------------------------------------------------------------- //--------------------------------------------------------------------- // zap the whole left hand side for starters //--------------------------------------------------------------------- _ls[0][0] = (double)0.0; _ls[0][1] = (double)0.0; _ls[0][2] = (double)1.0; _ls[0][3] = (double)0.0; _ls[0][4] = (double)0.0; lhsp(0,0,j,k) = (double)0.0; lhsp(1,0,j,k) = (double)0.0; lhsp(2,0,j,k) = (double)1.0; lhsp(3,0,j,k) = (double)0.0; lhsp(4,0,j,k) = (double)0.0; zero = (double)0.0; //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //-------------------------------------------------------------------- for (i = 0; i < 3; i++) { fac1 = c3c4*rho_i(i,j,k); //rhon[i] = max(max(max(dx2+con43*fac1, dx5+c1c5*fac1), dxmax+fac1), zero+dx1); if (dx2+con43*fac1>dx5+c1c5*fac1) rhon[i] = dx2+con43*fac1; else rhon[i] = dx5+c1c5*fac1; if (rhon[i]<dxmax+fac1) rhon[i] = dxmax+fac1; if (rhon[i]<zero+dx1) rhon[i] = zero+dx1; cv[i] = us(i,j,k); } _ls[1][0] = (double)0.0; _ls[1][1] = - dttx2 * cv[0] - dtx1 * rhon[0]; _ls[1][2] = 1.0 + c2dttx1 * rhon[1]; _ls[1][3] = dttx2 * cv[2] - dtx1 * rhon[2]; _ls[1][4] = (double)0.0; _ls[1][2] += comz5; _ls[1][3] -= comz4; _ls[1][4] += comz1; for (m = 0; m < 5; m++) lhsp(m,1,j,k) = _ls[1][m]; rhon[0] = rhon[1]; rhon[1] = rhon[2]; cv[0] = cv[1]; cv[1] = cv[2]; for (m = 0; m < 3; m++) { _rs[0][m] = rhs(m,0,j,k); _rs[1][m] = rhs(m,1,j,k); } //--------------------------------------------------------------------- // perform the Thomas algorithm; first, FORWARD ELIMINATION //--------------------------------------------------------------------- for (i = 0; i < nx-2; i++) { //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- if (i+2 == nx-1) { _ls[2][0] = (double)0.0; _ls[2][1] = (double)0.0; _ls[2][2] = (double)1.0; _ls[2][3] = (double)0.0; _ls[2][4] = (double)0.0; lhsp(0,i+2,j,k) = (double)0.0; lhsp(1,i+2,j,k) = (double)0.0; lhsp(2,i+2,j,k) = (double)1.0; lhsp(3,i+2,j,k) = (double)0.0; lhsp(4,i+2,j,k) = (double)0.0; } else { fac1 = c3c4*rho_i(i+3,j,k); //rhon[2] = max(max(max(dx2+con43*fac1, dx5+c1c5*fac1), dxmax+fac1), zero+dx1); if (dx2+con43*fac1>dx5+c1c5*fac1) rhon[2] = dx2+con43*fac1; else rhon[2] = dx5+c1c5*fac1; if (rhon[2]<dxmax+fac1) rhon[2] = dxmax+fac1; if (rhon[2]<zero+dx1) rhon[2] = zero+dx1; cv[2] = us(i+3,j,k); _ls[2][0] = (double)0.0; _ls[2][1] = - dttx2 * cv[0] - dtx1 * rhon[0]; _ls[2][2] = 1.0 + c2dttx1 * rhon[1]; _ls[2][3] = dttx2 * cv[2] - dtx1 * rhon[2]; _ls[2][4] = (double)0.0; //--------------------------------------------------------------------- // add fourth order dissipation //--------------------------------------------------------------------- if (i+2 == 2) { _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (i+2 >= 3 && i+2 < nx-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (i+2 == nx-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; } else if (i+2 == nx-2) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz5; } //--------------------------------------------------------------------- // store computed lhs for later reuse //--------------------------------------------------------------------- for (m = 0; m < 5; m++) lhsp(m,i+2,j,k) = _ls[2][m]; rhon[0] = rhon[1]; rhon[1] = rhon[2]; cv[0] = cv[1]; cv[1] = cv[2]; } //--------------------------------------------------------------------- // load rhs values for current iteration //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[2][m] = rhs(m,i+2,j,k); //--------------------------------------------------------------------- // perform current iteration //--------------------------------------------------------------------- fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- lhs(3,i,j,k) = _ls[0][3]; lhs(4,i,j,k) = _ls[0][4]; for (m = 0; m < 5; m++) { _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } for (m = 0; m < 3; m++) { rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } } //--------------------------------------------------------------------- // The last two rows in this zone are a bit different, // since they do not have two more rows available for the // elimination of off-diagonal entries //--------------------------------------------------------------------- i = nx-2; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // scale the last row immediately //--------------------------------------------------------------------- fac1 = 1.0/_ls[1][2]; for (m = 0; m < 3; m++) _rs[1][m] *= fac1; lhs(3,nx-2,j,k) = _ls[0][3]; lhs(4,nx-2,j,k) = _ls[0][4]; //--------------------------------------------------------------------- // subsequently, fill the other factors u+c, u-c //--------------------------------------------------------------------- for (i = 0; i < 3; i++) cv[i] = speed(i,j,k); for (m = 0; m < 5; m++) { _ls[0][m] = lhsp(m,0,j,k); _lp[0][m] = lhsp(m,0,j,k); _ls[1][m] = lhsp(m,1,j,k); _lp[1][m] = lhsp(m,1,j,k); } _lp[1][1] -= dttx2 * cv[0]; _lp[1][3] += dttx2 * cv[2]; _ls[1][1] += dttx2 * cv[0]; _ls[1][3] -= dttx2 * cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; _rs[0][3] = rhs(3,0,j,k); _rs[0][4] = rhs(4,0,j,k); _rs[1][3] = rhs(3,1,j,k); _rs[1][4] = rhs(4,1,j,k); //--------------------------------------------------------------------- // do the u+c and the u-c factors //--------------------------------------------------------------------- for (i = 0; i < nx-2; i++) { //--------------------------------------------------------------------- // first, fill the other factors u+c, u-c //--------------------------------------------------------------------- for (m = 0; m < 5; m++) { _ls[2][m] = lhsp(m,i+2,j,k); _lp[2][m] = lhsp(m,i+2,j,k); } _rs[2][3] = rhs(3,i+2,j,k); _rs[2][4] = rhs(4,i+2,j,k); if (i+2 < nx-1) { cv[2] = speed(i+3,j,k); _lp[2][1] -= dttx2 * cv[0]; _lp[2][3] += dttx2 * cv[2]; _ls[2][1] += dttx2 * cv[0]; _ls[2][3] -= dttx2 * cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; } m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1]*_lp[0][3]; _lp[1][3] -= _lp[1][1]*_lp[0][4]; _rs[1][m] -= _lp[1][1]*_rs[0][m]; _lp[2][1] -= _lp[2][0]*_lp[0][3]; _lp[2][2] -= _lp[2][0]*_lp[0][4]; _rs[2][m] -= _lp[2][0]*_rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1]*_ls[0][3]; _ls[1][3] -= _ls[1][1]*_ls[0][4]; _rs[1][m] -= _ls[1][1]*_rs[0][m]; _ls[2][1] -= _ls[2][0]*_ls[0][3]; _ls[2][2] -= _ls[2][0]*_ls[0][4]; _rs[2][m] -= _ls[2][0]*_rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- for (m = 3; m < 5; m++) { lhsp(m,i,j,k) = _lp[0][m]; lhsm(m,i,j,k) = _ls[0][m]; rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } for (m = 0; m < 5; m++) { _lp[0][m] = _lp[1][m]; _lp[1][m] = _lp[2][m]; _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } } //--------------------------------------------------------------------- // And again the last two rows separately //--------------------------------------------------------------------- i = nx-2; m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1]*_lp[0][3]; _lp[1][3] -= _lp[1][1]*_lp[0][4]; _rs[1][m] -= _lp[1][1]*_rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1]*_ls[0][3]; _ls[1][3] -= _ls[1][1]*_ls[0][4]; _rs[1][m] -= _ls[1][1]*_rs[0][m]; //--------------------------------------------------------------------- // Scale the last row immediately //--------------------------------------------------------------------- _rs[1][3] /= _lp[1][2]; _rs[1][4] /= _ls[1][2]; //--------------------------------------------------------------------- // BACKSUBSTITUTION //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] -= lhs(3,nx-2,j,k)*_rs[1][m]; _rs[0][3] -= _lp[0][3]*_rs[1][3]; _rs[0][4] -= _ls[0][3]*_rs[1][4]; for (m = 0; m < 5; m++) { _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } for (i = nx-3; i >= 0; i--) { //--------------------------------------------------------------------- // The first three factors //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] = rtmp(m,i,j,k) - lhs(3,i,j,k)*_rs[1][m] - lhs(4,i,j,k)*_rs[2][m]; //--------------------------------------------------------------------- // And the remaining two //--------------------------------------------------------------------- _rs[0][3] = rtmp(3,i,j,k) - lhsp(3,i,j,k)*_rs[1][3] - lhsp(4,i,j,k)*_rs[2][3]; _rs[0][4] = rtmp(4,i,j,k) - lhsm(3,i,j,k)*_rs[1][4] - lhsm(4,i,j,k)*_rs[2][4]; if (i+2 < nx-1) { //--------------------------------------------------------------------- // Do the block-diagonal inversion //--------------------------------------------------------------------- double r1 = _rs[2][0]; double r2 = _rs[2][1]; double r3 = _rs[2][2]; double r4 = _rs[2][3]; double r5 = _rs[2][4]; double t1 = bt * r3; double t2 = 0.5 * (r4+r5); _rs[2][0] = -r2; _rs[2][1] = r1; _rs[2][2] = bt * ( r4 - r5 ); _rs[2][3] = -t1 + t2; _rs[2][4] = t1 + t2; } for (m = 0; m < 5; m++) { rhs(m,i+2,j,k) = _rs[2][m]; _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } } //--------------------------------------------------------------------- // Do the block-diagonal inversion //--------------------------------------------------------------------- double tf1 = bt * _rs[2][2]; double tf2 = 0.5 * (_rs[2][3]+_rs[2][4]); rhs(0,1,j,k) = -_rs[2][1]; rhs(1,1,j,k) = _rs[2][0]; rhs(2,1,j,k) = bt * ( _rs[2][3] - _rs[2][4] ); rhs(3,1,j,k) = -tf1 + tf2; rhs(4,1,j,k) = tf1 + tf2; for (m = 0; m < 5; m++) rhs(m,0,j,k) = _rs[1][m]; } #undef lhs #undef lhsp #undef lhsm #undef rtmp //--------------------------------------------------------------------- // adi: y_solve //--------------------------------------------------------------------- #define lhs(m,i,j,k) lhs[(i-1)+(nx-2)*((k-1)+(nz-2)*((j)+ny*(m-3)))] #define lhsp(m,i,j,k) lhs[(i-1)+(nx-2)*((k-1)+(nz-2)*((j)+ny*(m+4)))] #define lhsm(m,i,j,k) lhs[(i-1)+(nx-2)*((k-1)+(nz-2)*((j)+ny*(m-3+2)))] #define rtmp(m,i,j,k) rstmp[(i)+nx*((k)+nz*((j)+ny*(m)))] __global__ static void y_solve_kernel (double *rho_i, double *vs, double *speed, double *rhs, double *lhs, double *rstmp, const int nx, const int ny, const int nz) { int i, j, k, m; double rhoq[3], cv[3], _ls[3][5], _lp[3][5], _rs[3][5], fac1; double zero; k = blockIdx.x*blockDim.x+threadIdx.x+1; i = blockIdx.y*blockDim.y+threadIdx.y+1; if (k >= nz-1 || i >= nx-1) return; //--------------------------------------------------------------------- // Computes the left hand side for the three y-factors //--------------------------------------------------------------------- //--------------------------------------------------------------------- // zap the whole left hand side for starters //--------------------------------------------------------------------- _ls[0][0] = (double)0.0; _ls[0][1] = (double)0.0; _ls[0][2] = (double)1.0; _ls[0][3] = (double)0.0; _ls[0][4] = (double)0.0; lhsp(0,i,0,k) = (double)0.0; lhsp(1,i,0,k) = (double)0.0; lhsp(2,i,0,k) = (double)1.0; lhsp(3,i,0,k) = (double)0.0; lhsp(4,i,0,k) = (double)0.0; zero = (double)0.0; //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- for (j = 0; j < 3; j++) { fac1 = c3c4*rho_i(i,j,k); //rhoq[j] = max(max(max(dy3+con43*fac1, dy5+c1c5*fac1), dymax+fac1), zero+dy1); if (dy3+con43*fac1>dy5+c1c5*fac1) rhoq[j] = dy3+con43*fac1; else rhoq[j] = dy5+c1c5*fac1; if (rhoq[j]<dymax+fac1) rhoq[j] = dymax+fac1; if (rhoq[j]<zero+dy1) rhoq[j] = zero+dy1; cv[j] = vs(i,j,k); } _ls[1][0] = (double)0.0; _ls[1][1] = -dtty2*cv[0]-dty1 * rhoq[0]; _ls[1][2] = 1.0 + c2dtty1 * rhoq[1]; _ls[1][3] = dtty2*cv[2]-dty1 * rhoq[2]; _ls[1][4] = (double)0.0; _ls[1][2] += comz5; _ls[1][3] -= comz4; _ls[1][4] += comz1; for (m = 0; m < 5; m++) lhsp(m,i,1,k) = _ls[1][m]; rhoq[0] = rhoq[1]; rhoq[1] = rhoq[2]; cv[0] = cv[1]; cv[1] = cv[2]; for (m = 0; m < 3; m++) { _rs[0][m] = rhs(m,i,0,k); _rs[1][m] = rhs(m,i,1,k); } //--------------------------------------------------------------------- // FORWARD ELIMINATION //--------------------------------------------------------------------- for (j = 0; j < ny-2; j++) { //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- if (j+2 == ny-1) { _ls[2][0] = (double)0.0; _ls[2][1] = (double)0.0; _ls[2][2] = (double)1.0; _ls[2][3] = (double)0.0; _ls[2][4] = (double)0.0; lhsp(0,i,j+2,k) = (double)0.0; lhsp(1,i,j+2,k) = (double)0.0; lhsp(2,i,j+2,k) = (double)1.0; lhsp(3,i,j+2,k) = (double)0.0; lhsp(4,i,j+2,k) = (double)0.0; } else { fac1 = c3c4*rho_i(i,j+3,k); //rhoq[2] = max(max(max(dy3+con43*fac1, dy5+c1c5*fac1), dymax+fac1), zero+dy1); if (dy3+con43*fac1>dy5+c1c5*fac1) rhoq[2] = dy3+con43*fac1; else rhoq[2] = dy5+c1c5*fac1; if (rhoq[2]<dymax+fac1) rhoq[2] = dymax+fac1; if (rhoq[2]<zero+dy1) rhoq[2] = zero+dy1; cv[2] = vs(i,j+3,k); _ls[2][0] = (double)0.0; _ls[2][1] = -dtty2*cv[0]-dty1 * rhoq[0]; _ls[2][2] = 1.0 + c2dtty1 * rhoq[1]; _ls[2][3] = dtty2*cv[2]-dty1 * rhoq[2]; _ls[2][4] = (double)0.0; //--------------------------------------------------------------------- // add fourth order dissipation //--------------------------------------------------------------------- if (j+2 == 2) { _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (j+2 >= 3 && j+2 < ny-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (j+2 == ny-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; } else if (j+2 == ny-2) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz5; } //--------------------------------------------------------------------- // store computed lhs for later reuse //--------------------------------------------------------------------- for (m = 0; m < 5; m++) lhsp(m,i,j+2,k) = _ls[2][m]; rhoq[0] = rhoq[1]; rhoq[1] = rhoq[2]; cv[0] = cv[1]; cv[1] = cv[2]; } //--------------------------------------------------------------------- // load rhs values for current iteration //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[2][m] = rhs(m,i,j+2,k); //--------------------------------------------------------------------- // perform current iteration //--------------------------------------------------------------------- fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- lhs(3,i,j,k) = _ls[0][3]; lhs(4,i,j,k) = _ls[0][4]; for (m = 0; m < 5; m++) { _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } for (m = 0; m < 3; m++) { rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } } //--------------------------------------------------------------------- // The last two rows in this zone are a bit different, // since they do not have two more rows available for the // elimination of off-diagonal entries //--------------------------------------------------------------------- j = ny-2; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // scale the last row immediately //--------------------------------------------------------------------- fac1 = 1.0/_ls[1][2]; for (m = 0; m < 3; m++) _rs[1][m] *= fac1; lhs(3,i,ny-2,k) = _ls[0][3]; lhs(4,i,ny-2,k) = _ls[0][4]; //--------------------------------------------------------------------- // do the u+c and the u-c factors //--------------------------------------------------------------------- for (j = 0; j < 3; j++) cv[j] = speed(i,j,k); for (m = 0; m < 5; m++) { _ls[0][m] = lhsp(m,i,0,k); _lp[0][m] = lhsp(m,i,0,k); _ls[1][m] = lhsp(m,i,1,k); _lp[1][m] = lhsp(m,i,1,k); } _lp[1][1] -= dtty2*cv[0]; _lp[1][3] += dtty2*cv[2]; _ls[1][1] += dtty2*cv[0]; _ls[1][3] -= dtty2*cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; _rs[0][3] = rhs(3,i,0,k); _rs[0][4] = rhs(4,i,0,k); _rs[1][3] = rhs(3,i,1,k); _rs[1][4] = rhs(4,i,1,k); for (j = 0; j < ny-2; j++) { for (m = 0; m < 5; m++) { _ls[2][m] = lhsp(m,i,j+2,k); _lp[2][m] = lhsp(m,i,j+2,k); } _rs[2][3] = rhs(3,i,j+2,k); _rs[2][4] = rhs(4,i,j+2,k); if (j+2 < ny-1) { cv[2] = speed(i,j+3,k); _lp[2][1] -= dtty2*cv[0]; _lp[2][3] += dtty2*cv[2]; _ls[2][1] += dtty2*cv[0]; _ls[2][3] -= dtty2*cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; } fac1 = 1.0/_lp[0][2]; m = 3; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1] * _lp[0][3]; _lp[1][3] -= _lp[1][1] * _lp[0][4]; _rs[1][m] -= _lp[1][1] * _rs[0][m]; _lp[2][1] -= _lp[2][0] * _lp[0][3]; _lp[2][2] -= _lp[2][0] * _lp[0][4]; _rs[2][m] -= _lp[2][0] * _rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- for (m = 3; m < 5; m++) { lhsp(m,i,j,k) = _lp[0][m]; lhsm(m,i,j,k) = _ls[0][m]; rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } for (m = 0; m < 5; m++) { _lp[0][m] = _lp[1][m]; _lp[1][m] = _lp[2][m]; _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } } //--------------------------------------------------------------------- // And again the last two rows separately //--------------------------------------------------------------------- j = ny-2; m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1] * _lp[0][3]; _lp[1][3] -= _lp[1][1] * _lp[0][4]; _rs[1][m] -= _lp[1][1] * _rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // Scale the last row immediately //--------------------------------------------------------------------- _rs[1][3] /= _lp[1][2]; _rs[1][4] /= _ls[1][2]; //--------------------------------------------------------------------- // BACKSUBSTITUTION //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] -= lhs(3,i,ny-2,k) * _rs[1][m]; _rs[0][3] -= _lp[0][3] * _rs[1][3]; _rs[0][4] -= _ls[0][3] * _rs[1][4]; for (m = 0; m < 5; m++) { _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } for (j = ny-3; j >= 0; j--) { //--------------------------------------------------------------------- // The first three factors //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] = rtmp(m,i,j,k) - lhs(3,i,j,k)*_rs[1][m] - lhs(4,i,j,k)*_rs[2][m]; //--------------------------------------------------------------------- // And the remaining two //--------------------------------------------------------------------- _rs[0][3] = rtmp(3,i,j,k) - lhsp(3,i,j,k)*_rs[1][3] - lhsp(4,i,j,k)*_rs[2][3]; _rs[0][4] = rtmp(4,i,j,k) - lhsm(3,i,j,k)*_rs[1][4] - lhsm(4,i,j,k)*_rs[2][4]; if (j+2 < ny-1) { //--------------------------------------------------------------------- // block-diagonal matrix-vector multiplication //--------------------------------------------------------------------- double r1 = _rs[2][0]; double r2 = _rs[2][1]; double r3 = _rs[2][2]; double r4 = _rs[2][3]; double r5 = _rs[2][4]; double t1 = bt * r1; double t2 = 0.5 * ( r4 + r5 ); _rs[2][0] = bt * ( r4 - r5 ); _rs[2][1] = -r3; _rs[2][2] = r2; _rs[2][3] = -t1 + t2; _rs[2][4] = t1 + t2; } for (m = 0; m < 5; m++) { rhs(m,i,j+2,k) = _rs[2][m]; _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } } //--------------------------------------------------------------------- // block-diagonal matrix-vector multiplication //--------------------------------------------------------------------- double tf1 = bt * _rs[2][0]; double tf2 = 0.5 * ( _rs[2][3] + _rs[2][4] ); rhs(0,i,1,k) = bt * ( _rs[2][3] - _rs[2][4] ); rhs(1,i,1,k) = -_rs[2][2]; rhs(2,i,1,k) = _rs[2][1]; rhs(3,i,1,k) = -tf1 + tf2; rhs(4,i,1,k) = tf1 + tf2; for (m = 0; m < 5; m++) rhs(m,i,0,k) = _rs[1][m]; } #undef lhs #undef lhsp #undef lhsm #undef rtmp //--------------------------------------------------------------------- // adi: z_solve //--------------------------------------------------------------------- #define lhs(m,i,j,k) lhs[(i-1)+(nx-2)*((j-1)+(ny-2)*((k)+nz*(m-3)))] #define lhsp(m,i,j,k) lhs[(i-1)+(nx-2)*((j-1)+(ny-2)*((k)+nz*(m+4)))] #define lhsm(m,i,j,k) lhs[(i-1)+(nx-2)*((j-1)+(ny-2)*((k)+nz*(m-3+2)))] #define rtmp(m,i,j,k) rstmp[(i)+nx*((j)+ny*((k)+nz*(m)))] __global__ static void z_solve_kernel (double *rho_i, double *us, double *vs, double *ws, double *speed, double *qs, double *fu, double *rhs, double *lhs, double *rstmp, const int nx, const int ny, const int nz) { int i, j, k, m; double rhos[3], cv[3], _ls[3][5], _lp[3][5], _rs[3][5], fac1; double zero; j = blockIdx.x*blockDim.x+threadIdx.x+1; i = blockIdx.y*blockDim.y+threadIdx.y+1; if (j >= ny-1 || i >= nx-1) return; //--------------------------------------------------------------------- // Computes the left hand side for the three z-factors //--------------------------------------------------------------------- //--------------------------------------------------------------------- // zap the whole left hand side for starters //--------------------------------------------------------------------- _ls[0][0] = (double)0.0; _ls[0][1] = (double)0.0; _ls[0][2] = (double)1.0; _ls[0][3] = (double)0.0; _ls[0][4] = (double)0.0; lhsp(0,i,j,0) = (double)0.0; lhsp(1,i,j,0) = (double)0.0; lhsp(2,i,j,0) = (double)1.0; lhsp(3,i,j,0) = (double)0.0; lhsp(4,i,j,0) = (double)0.0; zero = (double)0.0; //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- for (k = 0; k < 3; k++) { fac1 = c3c4*rho_i(i,j,k); //rhos[k] = max(max(max(dz4+con43*fac1, dz5+c1c5*fac1), dzmax+fac1), zero+dz1); if (dz4+con43*fac1>dz5+c1c5*fac1) rhos[k] = dz4+con43*fac1; else rhos[k] = dz5+c1c5*fac1; if (rhos[k]<dzmax+fac1) rhos[k] = dzmax+fac1; if (rhos[k]<zero+dz1) rhos[k] = zero+dz1; cv[k] = ws(i,j,k); } _ls[1][0] = (double)0.0; _ls[1][1] = -dttz2*cv[0] - dtz1*rhos[0]; _ls[1][2] = 1.0 + c2dttz1 * rhos[1]; _ls[1][3] = dttz2*cv[2] - dtz1*rhos[2]; _ls[1][4]= (double)0.0; _ls[1][2] += comz5; _ls[1][3] -= comz4; _ls[1][4] += comz1; for (m = 0; m < 5; m++) lhsp(m,i,j,1) = _ls[1][m]; rhos[0] = rhos[1]; rhos[1] = rhos[2]; cv[0] = cv[1]; cv[1] = cv[2]; for (m = 0; m < 3; m++) { _rs[0][m] = rhs(m,i,j,0); _rs[1][m] = rhs(m,i,j,1); } //--------------------------------------------------------------------- // FORWARD ELIMINATION //--------------------------------------------------------------------- for (k = 0; k < nz-2; k++) { //--------------------------------------------------------------------- // first fill the lhs for the u-eigenvalue //--------------------------------------------------------------------- if (k+2 == nz-1) { _ls[2][0] = (double)0.0; _ls[2][1] = (double)0.0; _ls[2][2] = (double)1.0; _ls[2][3] = (double)0.0; _ls[2][4] = (double)0.0; lhsp(0,i,j,k+2) = (double)0.0; lhsp(1,i,j,k+2) = (double)0.0; lhsp(2,i,j,k+2) = (double)1.0; lhsp(3,i,j,k+2) = (double)0.0; lhsp(4,i,j,k+2) = (double)0.0; } else { fac1 = c3c4*rho_i(i,j,k+3); //rhos[2] = max(max(max(dz4+con43*fac1, dz5+c1c5*fac1), dzmax+fac1), zero+dz1); if (dz4+con43*fac1>dz5+c1c5*fac1) rhos[2] = dz4+con43*fac1; else rhos[2] = dz5+c1c5*fac1; if (rhos[2]<dzmax+fac1) rhos[2] = dzmax+fac1; if (rhos[2]<zero+dz1) rhos[2] = zero+dz1; cv[2] = ws(i,j,k+3); _ls[2][0] = (double)0.0; _ls[2][1] = -dttz2*cv[0] - dtz1*rhos[0]; _ls[2][2] = 1.0 + c2dttz1 * rhos[1]; _ls[2][3] = dttz2*cv[2] - dtz1*rhos[2]; _ls[2][4] = (double)0.0; //--------------------------------------------------------------------- // add fourth order dissipation //--------------------------------------------------------------------- if (k+2 == 2) { _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (k+2 >= 3 && k+2 < nz-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; _ls[2][4] += comz1; } else if (k+2 == nz-3) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz6; _ls[2][3] -= comz4; } else if (k+2 == nz-2) { _ls[2][0] += comz1; _ls[2][1] -= comz4; _ls[2][2] += comz5; } //--------------------------------------------------------------------- // store computed lhs for later reuse //--------------------------------------------------------------------- for (m = 0; m < 5; m++) lhsp(m,i,j,k+2) = _ls[2][m]; rhos[0] = rhos[1]; rhos[1] = rhos[2]; cv[0] = cv[1]; cv[1] = cv[2]; } //--------------------------------------------------------------------- // load rhs values for current iteration //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[2][m] = rhs(m,i,j,k+2); //--------------------------------------------------------------------- // perform current iteration //--------------------------------------------------------------------- fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- lhs(3,i,j,k) = _ls[0][3]; lhs(4,i,j,k) = _ls[0][4]; for (m = 0; m < 5; m++) { _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } for (m = 0; m < 3; m++) { rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } } //--------------------------------------------------------------------- // The last two rows in this zone are a bit different, // since they do not have two more rows available for the // elimination of off-diagonal entries //--------------------------------------------------------------------- k = nz-2; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; for (m = 0; m < 3; m++) _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; for (m = 0; m < 3; m++) _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // scale the last row immediately //--------------------------------------------------------------------- fac1 = 1.0/_ls[1][2]; for (m = 0; m < 3; m++) _rs[1][m] *= fac1; lhs(3,i,j,k) = _ls[0][3]; lhs(4,i,j,k) = _ls[0][4]; //--------------------------------------------------------------------- // subsequently, fill the other factors u+c, u-c //--------------------------------------------------------------------- for (k = 0; k < 3; k++) cv[k] = speed(i,j,k); for (m = 0; m < 5; m++) { _ls[0][m] = lhsp(m,i,j,0); _lp[0][m] = lhsp(m,i,j,0); _ls[1][m] = lhsp(m,i,j,1); _lp[1][m] = lhsp(m,i,j,1); } _lp[1][1] -= dttz2*cv[0]; _lp[1][3] += dttz2*cv[2]; _ls[1][1] += dttz2*cv[0]; _ls[1][3] -= dttz2*cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; _rs[0][3] = rhs(3,i,j,0); _rs[0][4] = rhs(4,i,j,0); _rs[1][3] = rhs(3,i,j,1); _rs[1][4] = rhs(4,i,j,1); //--------------------------------------------------------------------- // do the u+c and the u-c factors //--------------------------------------------------------------------- for (k = 0; k < nz-2; k++) { //--------------------------------------------------------------------- // first, fill the other factors u+c, u-c //--------------------------------------------------------------------- for (m = 0; m < 5; m++) { _ls[2][m] = lhsp(m,i,j,k+2); _lp[2][m] = lhsp(m,i,j,k+2); } _rs[2][3] = rhs(3,i,j,k+2); _rs[2][4] = rhs(4,i,j,k+2); if (k+2 < nz-1) { cv[2] = speed(i,j,k+3); _lp[2][1] -= dttz2*cv[0]; _lp[2][3] += dttz2*cv[2]; _ls[2][1] += dttz2*cv[0]; _ls[2][3] -= dttz2*cv[2]; cv[0] = cv[1]; cv[1] = cv[2]; } m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1] * _lp[0][3]; _lp[1][3] -= _lp[1][1] * _lp[0][4]; _rs[1][m] -= _lp[1][1] * _rs[0][m]; _lp[2][1] -= _lp[2][0] * _lp[0][3]; _lp[2][2] -= _lp[2][0] * _lp[0][4]; _rs[2][m] -= _lp[2][0] * _rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; _rs[1][m] -= _ls[1][1] * _rs[0][m]; _ls[2][1] -= _ls[2][0] * _ls[0][3]; _ls[2][2] -= _ls[2][0] * _ls[0][4]; _rs[2][m] -= _ls[2][0] * _rs[0][m]; //--------------------------------------------------------------------- // store computed lhs and prepare data for next iteration // rhs is stored in a temp array such that write accesses are coalesced //--------------------------------------------------------------------- for (m = 3; m < 5; m++) { lhsp(m,i,j,k) = _lp[0][m]; lhsm(m,i,j,k) = _ls[0][m]; rtmp(m,i,j,k) = _rs[0][m]; _rs[0][m] = _rs[1][m]; _rs[1][m] = _rs[2][m]; } for (m = 0; m < 5; m++) { _lp[0][m] = _lp[1][m]; _lp[1][m] = _lp[2][m]; _ls[0][m] = _ls[1][m]; _ls[1][m] = _ls[2][m]; } } //--------------------------------------------------------------------- // And again the last two rows separately //--------------------------------------------------------------------- k = nz-2; m = 3; fac1 = 1.0/_lp[0][2]; _lp[0][3] *= fac1; _lp[0][4] *= fac1; _rs[0][m] *= fac1; _lp[1][2] -= _lp[1][1] * _lp[0][3]; _lp[1][3] -= _lp[1][1] * _lp[0][4]; _rs[1][m] -= _lp[1][1] * _rs[0][m]; m = 4; fac1 = 1.0/_ls[0][2]; _ls[0][3] *= fac1; _ls[0][4] *= fac1; _rs[0][m] *= fac1; _ls[1][2] -= _ls[1][1] * _ls[0][3]; _ls[1][3] -= _ls[1][1] * _ls[0][4]; _rs[1][m] -= _ls[1][1] * _rs[0][m]; //--------------------------------------------------------------------- // Scale the last row immediately some of this is overkill // if this is the last cell //--------------------------------------------------------------------- _rs[1][3] /= _lp[1][2]; _rs[1][4] /= _ls[1][2]; //--------------------------------------------------------------------- // BACKSUBSTITUTION //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] -= lhs(3,i,j,nz-2) * _rs[1][m]; _rs[0][3] -= _lp[0][3] * _rs[1][3]; _rs[0][4] -= _ls[0][3] * _rs[1][4]; for (m = 0; m < 5; m++) { _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } for (k = nz-3; k >= 0; k--) { //--------------------------------------------------------------------- // The first three factors //--------------------------------------------------------------------- for (m = 0; m < 3; m++) _rs[0][m] = rtmp(m,i,j,k) - lhs(3,i,j,k)*_rs[1][m] - lhs(4,i,j,k)*_rs[2][m]; //--------------------------------------------------------------------- // And the remaining two //--------------------------------------------------------------------- _rs[0][3] = rtmp(3,i,j,k) - lhsp(3,i,j,k)*_rs[1][3] - lhsp(4,i,j,k)*_rs[2][3]; _rs[0][4] = rtmp(4,i,j,k) - lhsm(3,i,j,k)*_rs[1][4] - lhsm(4,i,j,k)*_rs[2][4]; if (k+2 < nz-1) { //--------------------------------------------------------------------- // block-diagonal matrix-vector multiplication tzetar //--------------------------------------------------------------------- double xvel = us(i,j,k+2); double yvel = vs(i,j,k+2); double zvel = ws(i,j,k+2); double ac = speed(i,j,k+2); double uzik1 = fu(0,i,j,k+2); double t1 = (bt*uzik1)/ac * (_rs[2][3] + _rs[2][4]); double t2 = _rs[2][2] + t1; double t3 = bt*uzik1 * (_rs[2][3] - _rs[2][4]); _rs[2][4] = uzik1*(-xvel*_rs[2][1] + yvel*_rs[2][0]) + qs(i,j,k+2)*t2 + c2iv*(ac*ac)*t1 + zvel*t3; _rs[2][3] = zvel*t2 + t3; _rs[2][2] = uzik1*_rs[2][0] + yvel*t2; _rs[2][1] = -uzik1*_rs[2][1] + xvel*t2; _rs[2][0] = t2; } for (m = 0; m < 5; m++) { rhs(m,i,j,k+2) = _rs[2][m]; _rs[2][m] = _rs[1][m]; _rs[1][m] = _rs[0][m]; } } //--------------------------------------------------------------------- // block-diagonal matrix-vector multiplication tzetar //--------------------------------------------------------------------- double xfvel = us(i,j,1); double yfvel = vs(i,j,1); double zfvel = ws(i,j,1); double afc = speed(i,j,1); double ufzik1 = fu(0,i,j,1); double tf1 = (bt*ufzik1)/afc * (_rs[2][3] + _rs[2][4]); double tf2 = _rs[2][2] + tf1; double tf3 = bt*ufzik1 * (_rs[2][3] - _rs[2][4]); rhs(4,i,j,1) = ufzik1*(-xfvel*_rs[2][1] + yfvel*_rs[2][0]) + qs(i,j,1)*tf2 + c2iv*(afc*afc)*tf1 + zfvel*tf3; rhs(3,i,j,1) = zfvel*tf2 + tf3; rhs(2,i,j,1) = ufzik1*_rs[2][0] + yfvel*tf2; rhs(1,i,j,1) = -ufzik1*_rs[2][1] + xfvel*tf2; rhs(0,i,j,1) = tf2; for (m = 0; m < 5; m++) rhs(m,i,j,0) = _rs[1][m]; } #undef lhs #undef lhsp #undef lhsm #undef rtmp //--------------------------------------------------------------------- // addition of update to the vector u //--------------------------------------------------------------------- __global__ static void add_kernel (double *fu, double *rhs, const int nx, const int ny, const int nz) { int i, j, k, m; k = blockIdx.y+1; j = blockIdx.x+1; i = threadIdx.x+1; m = threadIdx.y; fu(m,i,j,k) += rhs(m,i,j,k); } //--------------------------------------------------------------------- // adi //--------------------------------------------------------------------- void adi(bool singlestep, int nx, int ny, int nz, int niter, double* rho_i, double* us, double* vs, double* ws, double* speed, double* qs, double* square, double* rhs, double* lhs, double* forcing, double* fu, double* rstmp) { HANDLE_ERROR(hipDeviceSynchronize()); int itmax = singlestep ? 1 : niter; int xblock, xgrid, yblock, ygrid, zblock, zgrid; for (int step = 1; step <= itmax; step++) { if (step % 20 == 0 || step == 1 && !singlestep) printf(" Time step %4d\n", step); //compute_rhs(); dim3 grid1(ny,nz); compute_rhs_kernel_1<<<grid1,nx>>>(rho_i, us, vs, ws, speed, qs, square, fu, nx, ny, nz); compute_rhs_kernel_2<<<grid1,nx>>>(rho_i, us, vs, ws, qs, square, rhs, forcing, fu, nx, ny, nz); //txinvr(); dim3 grid2(ny-2,nz-2); txinvr_kernel<<<grid2,nx-2>>> (rho_i, us, vs, ws, speed, qs, rhs, nx, ny, nz); //x_solve(); yblock = min(SOLVE_BLOCK,ny); ygrid = (ny+yblock-1)/yblock; zblock = min(SOLVE_BLOCK/yblock,nz); zgrid = (nz+zblock-1)/zblock; dim3 grid3(zgrid,ygrid), block3(zblock,yblock); x_solve_kernel<<<grid3,block3>>>(rho_i, us, speed, rhs, lhs, rstmp, nx, ny, nz); //y_solve(); xblock = min(SOLVE_BLOCK,nx); xgrid = (nx+xblock-1)/xblock; zblock = min(SOLVE_BLOCK/xblock,nz); zgrid = (nz+zblock-1)/zblock; dim3 grid4(zgrid,xgrid), block4(zblock,xblock); y_solve_kernel<<<grid4,block4>>>(rho_i, vs, speed, rhs, lhs, rstmp, nx, ny, nz); //z_solve(); xblock = min(SOLVE_BLOCK,nx); xgrid = (nx+xblock-1)/xblock; yblock = min(SOLVE_BLOCK/xblock,ny); ygrid = (ny+yblock-1)/yblock; dim3 grid5(ygrid,xgrid), block5(yblock,xblock); z_solve_kernel<<<grid5,block5>>>(rho_i, us, vs, ws, speed, qs, fu, rhs, lhs, rstmp, nx, ny, nz); //add(); dim3 grid6(ny-2,nz-2); dim3 block6(nx-2,5); add_kernel<<<grid6,block6>>>(fu, rhs, nx, ny, nz); } HANDLE_ERROR(hipDeviceSynchronize()); } //--------------------------------------------------------------------- // defaults from parameters //--------------------------------------------------------------------- void read_input(char benchclass, double* dd_td, int* nx, int* ny, int* nz, int* niter) { FILE *file; if ((file = fopen("inputsp.data", "rt")) != NULL) { char line[1024]; printf(" Reading from input file inputsp.data\n"); fgets(line, sizeof(line)-1, file); sscanf(line, "%i", niter); fgets(line, sizeof(line)-1, file); sscanf(line, "%lf", dd_td); fgets(line, sizeof(line)-1, file); sscanf(line, "%i %i %i", nx, ny, nz); fclose(file); } else { // printf(" No input file inputsp.data. Using compiled defaults\n"); int problem_size; switch (benchclass) { case 's': case 'S': problem_size = 12; *dd_td = 0.015; *niter = 100; break; case 'w': case 'W': problem_size = 36; *dd_td = 0.0015; *niter = 400; break; case 'a': case 'A': problem_size = 64; *dd_td = 0.0015; *niter = 400; break; case 'b': case 'B': problem_size = 102; *dd_td = 0.001; *niter = 400; break; case 'c': case 'C': problem_size = 162; *dd_td = 0.00067; *niter = 400; break; case 'd': case 'D': problem_size = 408; *dd_td = 0.00030; *niter = 500; break; case 'e': case 'E': problem_size = 1020; *dd_td = 0.0001; *niter = 500; break; default: printf("setparams: Internal error: invalid class %c\n", benchclass); exit(EXIT_FAILURE); } *nx = *ny = *nz = problem_size; } printf("\n\n NAS Parallel Benchmarks (NPB3.3-CUDA) - SP Benchmark\n\n"); printf(" Size: %4dx%4dx%4d\n", *nx, *ny, *nz); printf(" Iterations: %4d dt_d: %10.6F\n", *niter, *dd_td); printf("\n"); } int main(int argc, char **argv) { char benchclass = argc > 1 ? argv[1][0] : 'S'; struct timeval start_t; struct timeval end_t; struct timeval skt_t; struct timeval ske_t; int niter; int nx, ny, nz; double hdd; double dd_d; double *fu, *forcing, *rhs, *rho_i, *us, *vs, *ws, *qs, *speed, *square, *lhs, *rstmp; //double* rmsbuf; //double xce[5], xcr[5]; char CUDAname[256]; int CUDAmp, CUDAclock, CUDAmemclock, CUDAl2cache; size_t CUDAmem; //--------------------------------------------------------------------- // read input data //--------------------------------------------------------------------- read_input(benchclass, &hdd, &nx, &ny, &nz, &niter); dd_d = hdd; //--------------------------------------------------------------------- // allocate CUDA device memory //--------------------------------------------------------------------- int gridsize = nx*ny*nz; int facesize = max(max(nx*ny, nx*nz), ny*nz); gettimeofday(&start_t, NULL); HANDLE_ERROR(hipMalloc((void **)&fu, 5*gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&forcing, 5*gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&rhs, 5*gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&rho_i, gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&us, gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&vs, gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&ws, gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&qs, gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&speed, gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&square, gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&lhs, 9*gridsize*sizeof(double))); HANDLE_ERROR(hipMalloc((void **)&rstmp, 5*gridsize*sizeof(double))); //HANDLE_ERROR(cudaMalloc((void **)&rmsbuf, 5*facesize*sizeof(double))); double ce_d[13][5]; ce_d[0][0] = (double)2.0; ce_d[1][0] = (double)0.0; ce_d[2][0] = (double)0.0; ce_d[3][0] = (double)4.0; ce_d[4][0] = (double)5.0; ce_d[5][0] = (double)3.0; ce_d[6][0] = (double)0.5; ce_d[7][0] = (double)0.02; ce_d[8][0] = (double)0.01; ce_d[9][0] = (double)0.03; ce_d[10][0] = (double)0.5; ce_d[11][0] = (double)0.4; ce_d[12][0] = (double)0.3; ce_d[0][1] = (double)1.0; ce_d[1][1] = (double)0.0; ce_d[2][1] = (double)0.0; ce_d[3][1] = (double)0.0; ce_d[4][1] = (double)1.0; ce_d[5][1] = (double)2.0; ce_d[6][1] = (double)3.0; ce_d[7][1] = (double)0.01; ce_d[8][1] = (double)0.03; ce_d[9][1] = (double)0.02; ce_d[10][1] = (double)0.4; ce_d[11][1] = (double)0.3; ce_d[12][1] = (double)0.5; ce_d[0][2] = (double)2.0; ce_d[1][2] = (double)2.0; ce_d[2][2] = (double)0.0; ce_d[3][2] = (double)0.0; ce_d[4][2] = (double)0.0; ce_d[5][2] = (double)2.0; ce_d[6][2] = (double)3.0; ce_d[7][2] = (double)0.04; ce_d[8][2] = (double)0.03; ce_d[9][2] = (double)0.05; ce_d[10][2] = (double)0.3; ce_d[11][2] = (double)0.5; ce_d[12][2] = (double)0.4; ce_d[0][3] = (double)2.0; ce_d[1][3] = (double)2.0; ce_d[2][3] = (double)0.0; ce_d[3][3] = (double)0.0; ce_d[4][3] = (double)0.0; ce_d[5][3] = (double)2.0; ce_d[6][3] = (double)3.0; ce_d[7][3] = (double)0.03; ce_d[8][3] = (double)0.05; ce_d[9][3] = (double)0.04; ce_d[10][3] = (double)0.2; ce_d[11][3] = (double)0.1; ce_d[12][3] = (double)0.3; ce_d[0][4] = (double)5.0; ce_d[1][4] = (double)4.0; ce_d[2][4] = (double)3.0; ce_d[3][4] = (double)2.0; ce_d[4][4] = (double)0.1; ce_d[5][4] = (double)0.4; ce_d[6][4] = (double)0.3; ce_d[7][4] = (double)0.05; ce_d[8][4] = (double)0.04; ce_d[9][4] = (double)0.03; ce_d[10][4] = (double)0.1; ce_d[11][4] = (double)0.3; ce_d[12][4] = (double)0.2; double bt_d = sqrt(0.5); double dnxm1_d = 1.0/((double)nx-1.0); double dnym1_d = 1.0/((double)ny-1.0); double dnzm1_d = 1.0/((double)nz-1.0); double tx1_d = 1.0 / (dnxm1_d * dnxm1_d); double tx2_d = 1.0 / (2.0 * dnxm1_d); double tx3_d = 1.0 / dnxm1_d; double ty1_d = 1.0 / (dnym1_d * dnym1_d); double ty2_d = 1.0 / (2.0 * dnym1_d); double ty3_d = 1.0 / dnym1_d; double tz1_d = 1.0 / (dnzm1_d * dnzm1_d); double tz2_d = 1.0 / (2.0 * dnzm1_d); double tz3_d = 1.0 / dnzm1_d; double dtx1_d = dd_d*tx1_d; double dttx2_d = dd_d*tx2_d; double dty1_d = dd_d*ty1_d; double dtty2_d = dd_d*ty2_d; double dtz1_d = dd_d*tz1_d; double dttz2_d = dd_d*tz2_d; double c2dttx1_d = 2.0*dtx1_d; double c2dtty1_d = 2.0*dty1_d; double c2dttz1_d = 2.0*dtz1_d; double dtdssp_d = dd_d*dssp; double comz1_d = dtdssp_d; double comz4_d = 4.0*dtdssp_d; double comz5_d = 5.0*dtdssp_d; double comz6_d = 6.0*dtdssp_d; double c3c4tx3_d = c3c4*tx3_d; double c3c4ty3_d = c3c4*ty3_d; double c3c4tz3_d = c3c4*tz3_d; double dx1tx1_d = dx1*tx1_d; double dx2tx1_d = dx2*tx1_d; double dx3tx1_d = dx3*tx1_d; double dx4tx1_d = dx4*tx1_d; double dx5tx1_d = dx5*tx1_d; double dy1ty1_d = dy1*ty1_d; double dy2ty1_d = dy2*ty1_d; double dy3ty1_d = dy3*ty1_d; double dy4ty1_d = dy4*ty1_d; double dy5ty1_d = dy5*ty1_d; double dz1tz1_d = dz1*tz1_d; double dz2tz1_d = dz2*tz1_d; double dz3tz1_d = dz3*tz1_d; double dz4tz1_d = dz4*tz1_d; double dz5tz1_d = dz5*tz1_d; double xxcon1_d = c3c4tx3_d*con43*tx3_d; double xxcon2_d = c3c4tx3_d*tx3_d; double xxcon3_d = c3c4tx3_d*conz1*tx3_d; double xxcon4_d = c3c4tx3_d*con16*tx3_d; double xxcon5_d = c3c4tx3_d*c1c5*tx3_d; double yycon1_d = c3c4ty3_d*con43*ty3_d; double yycon2_d = c3c4ty3_d*ty3_d; double yycon3_d = c3c4ty3_d*conz1*ty3_d; double yycon4_d = c3c4ty3_d*con16*ty3_d; double yycon5_d = c3c4ty3_d*c1c5*ty3_d; double zzcon1_d = c3c4tz3_d*con43*tz3_d; double zzcon2_d = c3c4tz3_d*tz3_d; double zzcon3_d = c3c4tz3_d*conz1*tz3_d; double zzcon4_d = c3c4tz3_d*con16*tz3_d; double zzcon5_d = c3c4tz3_d*c1c5*tz3_d; HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&ce), &ce_d, 13*5*sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&bt), &bt_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dnxm1), &dnxm1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dnym1), &dnym1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dnzm1), &dnzm1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&tx1), &tx1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&tx2), &tx2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&tx3), &tx3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&ty1), &ty1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&ty2), &ty2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&ty3), &ty3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&tz1), &tz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&tz2), &tz2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&tz3), &tz3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dtx1), &dtx1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dttx2), &dttx2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dty1), &dty1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dtty2), &dtty2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dtz1), &dtz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dttz2), &dttz2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&c2dttx1), &c2dttx1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&c2dtty1), &c2dtty1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&c2dttz1), &c2dttz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dt), &dd_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dtdssp), &dtdssp_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&comz1), &comz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&comz4), &comz4_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&comz5), &comz5_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&comz6), &comz6_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&c3c4tx3), &c3c4tx3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&c3c4ty3), &c3c4ty3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&c3c4tz3), &c3c4tz3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dx1tx1), &dx1tx1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dx2tx1), &dx2tx1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dx3tx1), &dx3tx1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dx4tx1), &dx4tx1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dx5tx1), &dx5tx1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dy1ty1), &dy1ty1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dy2ty1), &dy2ty1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dy3ty1), &dy3ty1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dy4ty1), &dy4ty1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dy5ty1), &dy5ty1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dz1tz1), &dz1tz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dz2tz1), &dz2tz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dz3tz1), &dz3tz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dz4tz1), &dz4tz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&dz5tz1), &dz5tz1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&xxcon1), &xxcon1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&xxcon2), &xxcon2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&xxcon3), &xxcon3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&xxcon4), &xxcon4_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&xxcon5), &xxcon5_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&yycon1), &yycon1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&yycon2), &yycon2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&yycon3), &yycon3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&yycon4), &yycon4_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&yycon5), &yycon5_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&zzcon1), &zzcon1_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&zzcon2), &zzcon2_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&zzcon3), &zzcon3_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&zzcon4), &zzcon4_d, sizeof(double))); HANDLE_ERROR (hipMemcpyToSymbol (HIP_SYMBOL(&zzcon5), &zzcon5_d, sizeof(double))); gettimeofday(&skt_t, NULL); exact_rhs(forcing, nx, ny, nz); //sp->initialize(); dim3 grid(nz,ny); initialize_kernel<<<grid,nx>>> (fu, nx, ny, nz); //--------------------------------------------------------------------- // do one time step to touch all code, and reinitialize //--------------------------------------------------------------------- adi(true, nx, ny, nz, niter, rho_i, us, vs, ws, speed, qs, square, rhs, lhs, forcing, fu, rstmp); //sp->initialize(); initialize_kernel<<<grid,nx>>> (fu, nx, ny, nz); //--------------------------------------------------------------------- // main time stepping loop //--------------------------------------------------------------------- //sp->adi(false); adi(false, nx, ny, nz, niter, rho_i, us, vs, ws, speed, qs, square, rhs, lhs, forcing, fu, rstmp); gettimeofday(&ske_t, NULL); gettimeofday(&end_t, NULL); std::cout << "time: "<<((end_t.tv_sec-start_t.tv_sec)+(end_t.tv_usec-start_t.tv_usec)*1e-6) << std::endl; std::cout << "kernel: "<<((ske_t.tv_sec-skt_t.tv_sec)+(ske_t.tv_usec-skt_t.tv_usec)*1e-6) << std::endl; //std::cout << (sdkGetAverageTimerValue(&timer)/1000.0) / iterations << " seconds per iteration" << std::endl; //--------------------------------------------------------------------- // verification test //--------------------------------------------------------------------- //char verifyclass; //bool verified; //--------------------------------------------------------------------- // More timers //--------------------------------------------------------------------- //sp->print_timers(); //delete sp; return EXIT_SUCCESS; }
.text .file "sp_double.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z9exact_rhsPdiii # -- Begin function _Z9exact_rhsPdiii .type _Z9exact_rhsPdiii,@function _Z9exact_rhsPdiii: # @_Z9exact_rhsPdiii .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %ecx, %ebx movl %edx, %r14d movl %esi, %ebp movq %rdi, %r15 movl %edx, %eax movq %rbx, %rdi shlq $32, %rdi orq %rax, %rdi movl %esi, %edx btsq $32, %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_2 # %bb.1: movq %r15, %rdi movl %ebp, %esi movl %r14d, %edx movl %ebx, %ecx callq _ZL36__device_stub__exact_rhs_kernel_initPdiii .LBB0_2: cmpl $32, %r14d movl $32, %r13d movl $32, %ecx cmovll %r14d, %ecx leal (%r14,%rcx), %eax decl %eax cltd idivl %ecx movl %eax, %edi movl $32, %eax xorl %edx, %edx idivl %ecx movl %eax, %esi cmpl %ebx, %eax cmovgel %ebx, %esi leal -1(%rbx), %r12d leal (%rbx,%rsi), %eax decl %eax cltd idivl %esi # kill: def $eax killed $eax def $rax shlq $32, %rdi orq %rax, %rdi shlq $32, %rcx orq %rsi, %rcx movl $1, %esi movq %rcx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_4 # %bb.3: movq %r15, %rdi movl %ebp, %esi movl %r14d, %edx movl %ebx, %ecx callq _ZL33__device_stub__exact_rhs_kernel_xPdiii .LBB0_4: movq %r15, (%rsp) # 8-byte Spill leal -1(%r14), %r15d cmpl $32, %ebp cmovll %ebp, %r13d movq %rbp, 8(%rsp) # 8-byte Spill leal -1(%rbp,%r13), %eax cltd idivl %r13d movl %eax, %ebp movl $32, %eax xorl %edx, %edx idivl %r13d movq %rbx, %rcx movl %eax, %ebx cmpl %ecx, %eax movq %rcx, 16(%rsp) # 8-byte Spill # kill: def $ecx killed $ecx killed $rcx def $rcx cmovll %eax, %ecx addl %ecx, %r12d movl %r12d, %eax cltd idivl %ecx # kill: def $eax killed $eax def $rax shlq $32, %rbp leaq (%rax,%rbp), %rdi shlq $32, %r13 orq %r13, %rcx movl $1, %esi movq %rcx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_6 # %bb.5: movq (%rsp), %rdi # 8-byte Reload movq 8(%rsp), %rsi # 8-byte Reload # kill: def $esi killed $esi killed $rsi movl %r14d, %edx movq 16(%rsp), %rcx # 8-byte Reload # kill: def $ecx killed $ecx killed $rcx callq _ZL33__device_stub__exact_rhs_kernel_yPdiii .LBB0_6: cmpl %r14d, %ebx cmovgel %r14d, %ebx addl %ebx, %r15d movl %r15d, %eax cltd idivl %ebx # kill: def $eax killed $eax def $rax orq %rax, %rbp orq %rbx, %r13 movq %rbp, %rdi movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax je .LBB0_8 # %bb.7: addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB0_8: .cfi_def_cfa_offset 80 movq (%rsp), %rdi # 8-byte Reload movq 8(%rsp), %rsi # 8-byte Reload # kill: def $esi killed $esi killed $rsi movl %r14d, %edx movq 16(%rsp), %rcx # 8-byte Reload # kill: def $ecx killed $ecx killed $rcx addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp _ZL33__device_stub__exact_rhs_kernel_zPdiii # TAILCALL .Lfunc_end0: .size _Z9exact_rhsPdiii, .Lfunc_end0-_Z9exact_rhsPdiii .cfi_endproc # -- End function .type _ZL36__device_stub__exact_rhs_kernel_initPdiii,@function # -- Begin function _ZL36__device_stub__exact_rhs_kernel_initPdiii _ZL36__device_stub__exact_rhs_kernel_initPdiii: # @_ZL36__device_stub__exact_rhs_kernel_initPdiii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 20(%rsp), %rdi movl %esi, (%rdi) leaq 16(%rsp), %rsi movl %edx, (%rsi) leaq 12(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL21exact_rhs_kernel_initPdiii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _ZL36__device_stub__exact_rhs_kernel_initPdiii, .Lfunc_end1-_ZL36__device_stub__exact_rhs_kernel_initPdiii .cfi_endproc # -- End function .type _ZL33__device_stub__exact_rhs_kernel_xPdiii,@function # -- Begin function _ZL33__device_stub__exact_rhs_kernel_xPdiii _ZL33__device_stub__exact_rhs_kernel_xPdiii: # @_ZL33__device_stub__exact_rhs_kernel_xPdiii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 20(%rsp), %rdi movl %esi, (%rdi) leaq 16(%rsp), %rsi movl %edx, (%rsi) leaq 12(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL18exact_rhs_kernel_xPdiii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _ZL33__device_stub__exact_rhs_kernel_xPdiii, .Lfunc_end2-_ZL33__device_stub__exact_rhs_kernel_xPdiii .cfi_endproc # -- End function .type _ZL33__device_stub__exact_rhs_kernel_yPdiii,@function # -- Begin function _ZL33__device_stub__exact_rhs_kernel_yPdiii _ZL33__device_stub__exact_rhs_kernel_yPdiii: # @_ZL33__device_stub__exact_rhs_kernel_yPdiii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 20(%rsp), %rdi movl %esi, (%rdi) leaq 16(%rsp), %rsi movl %edx, (%rsi) leaq 12(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL18exact_rhs_kernel_yPdiii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _ZL33__device_stub__exact_rhs_kernel_yPdiii, .Lfunc_end3-_ZL33__device_stub__exact_rhs_kernel_yPdiii .cfi_endproc # -- End function .type _ZL33__device_stub__exact_rhs_kernel_zPdiii,@function # -- Begin function _ZL33__device_stub__exact_rhs_kernel_zPdiii _ZL33__device_stub__exact_rhs_kernel_zPdiii: # @_ZL33__device_stub__exact_rhs_kernel_zPdiii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 20(%rsp), %rdi movl %esi, (%rdi) leaq 16(%rsp), %rsi movl %edx, (%rsi) leaq 12(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL18exact_rhs_kernel_zPdiii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size _ZL33__device_stub__exact_rhs_kernel_zPdiii, .Lfunc_end4-_ZL33__device_stub__exact_rhs_kernel_zPdiii .cfi_endproc # -- End function .globl _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ # -- Begin function _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ .type _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_,@function _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_: # @_Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $136, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %r9, 16(%rsp) # 8-byte Spill movl %r8d, %ebx movl %ecx, %r15d movl %edx, %r12d # kill: def $esi killed $esi def $rsi movq %rsi, 8(%rsp) # 8-byte Spill movl %edi, %ebp callq hipDeviceSynchronize testl %eax, %eax jne .LBB5_1 # %bb.3: # %_ZL11HandleError10hipError_tPKci.exit movl %ebp, 28(%rsp) # 4-byte Spill testb %bpl, %bpl movl $1, %ebp cmovnel %ebp, %ebx testl %ebx, %ebx jle .LBB5_23 # %bb.4: # %.lr.ph movl %r12d, %eax movq %r15, %r14 shlq $32, %r14 orq %rax, %r14 movq 8(%rsp), %rcx # 8-byte Reload movl %ecx, %r13d btsq $32, %r13 leal -2(%r12), %eax leal -2(%r15), %edx shlq $32, %rdx orq %rax, %rdx movq %rdx, 40(%rsp) # 8-byte Spill leal -2(%rcx), %eax movq %rax, %rdx btsq $32, %rdx movq %rdx, 112(%rsp) # 8-byte Spill movl $32, %edx cmpl %edx, %r12d movl $32, %esi cmovll %r12d, %esi movq %rsi, %rdi shlq $32, %rdi movq %rdi, 88(%rsp) # 8-byte Spill cmpl %edx, %ecx cmovll %ecx, %edx movabsq $21474836480, %rdi # imm = 0x500000000 orq %rax, %rdi movq %rdi, 80(%rsp) # 8-byte Spill movq %rdx, %rax shlq $32, %rax movq %rax, 72(%rsp) # 8-byte Spill negl %ebx leal -1(%r12), %eax movq %rax, 56(%rsp) # 8-byte Spill movq %rsi, 96(%rsp) # 8-byte Spill leal (%r12,%rsi), %eax decl %eax movl %eax, 36(%rsp) # 4-byte Spill leal -1(%r15), %eax movq %rax, 48(%rsp) # 8-byte Spill movq %rdx, 104(%rsp) # 8-byte Spill leal -1(%rcx,%rdx), %eax movl %eax, 32(%rsp) # 4-byte Spill movq %r14, 128(%rsp) # 8-byte Spill movq %r13, 120(%rsp) # 8-byte Spill movq %rbx, 64(%rsp) # 8-byte Spill .LBB5_5: # =>This Inner Loop Header: Depth=1 movl %ebp, %eax movl $3435973837, %ecx # imm = 0xCCCCCCCD imulq %rcx, %rax shrq $36, %rax shll $2, %eax leal (%rax,%rax,4), %ecx cmpl $1, %ebp setne %al cmpl %ecx, %ebp je .LBB5_7 # %bb.6: # in Loop: Header=BB5_5 Depth=1 orb 28(%rsp), %al # 1-byte Folded Reload jne .LBB5_8 .LBB5_7: # in Loop: Header=BB5_5 Depth=1 movl $.L.str.1, %edi movl %ebp, %esi xorl %eax, %eax callq printf .LBB5_8: # in Loop: Header=BB5_5 Depth=1 movq %r14, %rdi movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB5_10 # %bb.9: # in Loop: Header=BB5_5 Depth=1 subq $8, %rsp .cfi_adjust_cfa_offset 8 movq 24(%rsp), %rdi # 8-byte Reload movq 200(%rsp), %rsi movq 208(%rsp), %rdx movq 216(%rsp), %rcx movq 224(%rsp), %r8 movq 232(%rsp), %r9 pushq %r15 .cfi_adjust_cfa_offset 8 pushq %r12 .cfi_adjust_cfa_offset 8 pushq 32(%rsp) # 8-byte Folded Reload .cfi_adjust_cfa_offset 8 pushq 296(%rsp) .cfi_adjust_cfa_offset 8 pushq 272(%rsp) .cfi_adjust_cfa_offset 8 callq _ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii addq $48, %rsp .cfi_adjust_cfa_offset -48 .LBB5_10: # in Loop: Header=BB5_5 Depth=1 movq %r14, %rdi movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB5_12 # %bb.11: # in Loop: Header=BB5_5 Depth=1 movq 16(%rsp), %rdi # 8-byte Reload movq 192(%rsp), %rsi movq 200(%rsp), %rdx movq 208(%rsp), %rcx movq 224(%rsp), %r8 movq 232(%rsp), %r9 pushq %r15 .cfi_adjust_cfa_offset 8 pushq %r12 .cfi_adjust_cfa_offset 8 pushq 24(%rsp) # 8-byte Folded Reload .cfi_adjust_cfa_offset 8 pushq 288(%rsp) .cfi_adjust_cfa_offset 8 pushq 288(%rsp) .cfi_adjust_cfa_offset 8 pushq 280(%rsp) .cfi_adjust_cfa_offset 8 callq _ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii addq $48, %rsp .cfi_adjust_cfa_offset -48 .LBB5_12: # in Loop: Header=BB5_5 Depth=1 movq 40(%rsp), %rdi # 8-byte Reload movl $1, %esi movq 112(%rsp), %rdx # 8-byte Reload movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB5_14 # %bb.13: # in Loop: Header=BB5_5 Depth=1 movq 16(%rsp), %rdi # 8-byte Reload movq 192(%rsp), %rsi movq 200(%rsp), %rdx movq 208(%rsp), %rcx movq 216(%rsp), %r8 movq 224(%rsp), %r9 pushq %r15 .cfi_adjust_cfa_offset 8 pushq %r12 .cfi_adjust_cfa_offset 8 pushq 24(%rsp) # 8-byte Folded Reload .cfi_adjust_cfa_offset 8 pushq 264(%rsp) .cfi_adjust_cfa_offset 8 callq _ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii addq $32, %rsp .cfi_adjust_cfa_offset -32 .LBB5_14: # in Loop: Header=BB5_5 Depth=1 movl 36(%rsp), %eax # 4-byte Reload cltd movq 96(%rsp), %rcx # 8-byte Reload idivl %ecx movl %eax, %edi movl $32, %eax xorl %edx, %edx idivl %ecx movl %eax, %ecx cmpl %r15d, %eax cmovgel %r15d, %ecx movq 48(%rsp), %r13 # 8-byte Reload leal (%rcx,%r13), %eax cltd idivl %ecx # kill: def $eax killed $eax def $rax shlq $32, %rdi orq %rax, %rdi orq 88(%rsp), %rcx # 8-byte Folded Reload movl $1, %esi movq %rcx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB5_16 # %bb.15: # in Loop: Header=BB5_5 Depth=1 subq $8, %rsp .cfi_adjust_cfa_offset 8 movq 24(%rsp), %rdi # 8-byte Reload movq 200(%rsp), %rsi movq 224(%rsp), %rdx movq 248(%rsp), %rcx movq 256(%rsp), %r8 movq 280(%rsp), %r9 pushq %r15 .cfi_adjust_cfa_offset 8 pushq %r12 .cfi_adjust_cfa_offset 8 pushq 32(%rsp) # 8-byte Folded Reload .cfi_adjust_cfa_offset 8 callq _ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii addq $32, %rsp .cfi_adjust_cfa_offset -32 .LBB5_16: # in Loop: Header=BB5_5 Depth=1 movl 32(%rsp), %eax # 4-byte Reload cltd movq 104(%rsp), %rcx # 8-byte Reload idivl %ecx movl %eax, %r14d movl $32, %eax xorl %edx, %edx idivl %ecx movl %eax, %ebx cmpl %r15d, %eax movl %r15d, %ecx cmovll %eax, %ecx leal (%rcx,%r13), %eax cltd idivl %ecx # kill: def $eax killed $eax def $rax shlq $32, %r14 leaq (%rax,%r14), %rdi movq 72(%rsp), %r13 # 8-byte Reload orq %r13, %rcx movl $1, %esi movq %rcx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB5_18 # %bb.17: # in Loop: Header=BB5_5 Depth=1 subq $8, %rsp .cfi_adjust_cfa_offset 8 movq 24(%rsp), %rdi # 8-byte Reload movq 208(%rsp), %rsi movq 224(%rsp), %rdx movq 248(%rsp), %rcx movq 256(%rsp), %r8 movq 280(%rsp), %r9 pushq %r15 .cfi_adjust_cfa_offset 8 pushq %r12 .cfi_adjust_cfa_offset 8 pushq 32(%rsp) # 8-byte Folded Reload .cfi_adjust_cfa_offset 8 callq _ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii addq $32, %rsp .cfi_adjust_cfa_offset -32 .LBB5_18: # in Loop: Header=BB5_5 Depth=1 cmpl %r12d, %ebx cmovgel %r12d, %ebx movq 56(%rsp), %rax # 8-byte Reload addl %ebx, %eax cltd idivl %ebx # kill: def $eax killed $eax def $rax orq %rax, %r14 orq %r13, %rbx movq %r14, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB5_20 # %bb.19: # in Loop: Header=BB5_5 Depth=1 subq $8, %rsp .cfi_adjust_cfa_offset 8 movq 24(%rsp), %rdi # 8-byte Reload movq 200(%rsp), %rsi movq 208(%rsp), %rdx movq 216(%rsp), %rcx movq 224(%rsp), %r8 movq 232(%rsp), %r9 pushq %r15 .cfi_adjust_cfa_offset 8 pushq %r12 .cfi_adjust_cfa_offset 8 pushq 32(%rsp) # 8-byte Folded Reload .cfi_adjust_cfa_offset 8 pushq 304(%rsp) .cfi_adjust_cfa_offset 8 pushq 288(%rsp) .cfi_adjust_cfa_offset 8 pushq 288(%rsp) .cfi_adjust_cfa_offset 8 pushq 320(%rsp) .cfi_adjust_cfa_offset 8 callq _ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii addq $64, %rsp .cfi_adjust_cfa_offset -64 .LBB5_20: # in Loop: Header=BB5_5 Depth=1 movq 40(%rsp), %rdi # 8-byte Reload movl $1, %esi movq 80(%rsp), %rdx # 8-byte Reload movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax movq 64(%rsp), %rbx # 8-byte Reload movq 128(%rsp), %r14 # 8-byte Reload jne .LBB5_22 # %bb.21: # in Loop: Header=BB5_5 Depth=1 movq 264(%rsp), %rdi movq 240(%rsp), %rsi movq 8(%rsp), %rdx # 8-byte Reload # kill: def $edx killed $edx killed $rdx movl %r12d, %ecx movl %r15d, %r8d callq _ZL25__device_stub__add_kernelPdS_iii .LBB5_22: # in Loop: Header=BB5_5 Depth=1 leal (%rbx,%rbp), %eax incl %eax movl %ebp, %ecx incl %ecx movl %ecx, %ebp cmpl $1, %eax movq 120(%rsp), %r13 # 8-byte Reload jne .LBB5_5 .LBB5_23: # %._crit_edge callq hipDeviceSynchronize testl %eax, %eax jne .LBB5_24 # %bb.25: # %_ZL11HandleError10hipError_tPKci.exit202 addq $136, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB5_1: .cfi_def_cfa_offset 192 movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1793, %ecx # imm = 0x701 jmp .LBB5_2 .LBB5_24: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1841, %ecx # imm = 0x731 .LBB5_2: xorl %eax, %eax callq printf movl $1, %edi callq exit .Lfunc_end5: .size _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_, .Lfunc_end5-_Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ .cfi_endproc # -- End function .type _ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii,@function # -- Begin function _ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii _ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii: # @_ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $192, %rsp .cfi_def_cfa_offset 240 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 240(%rsp), %rax movq %rax, 48(%rbx) leaq 248(%rsp), %rax movq %rax, 56(%rbx) leaq 256(%rsp), %rax movq %rax, 64(%rbx) leaq 264(%rsp), %rax movq %rax, 72(%rbx) leaq 272(%rsp), %rax movq %rax, 80(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $208, %rsp .cfi_adjust_cfa_offset -208 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end6: .size _ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii, .Lfunc_end6-_ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .cfi_endproc # -- End function .type _ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii,@function # -- Begin function _ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii _ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii: # @_ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $192, %rsp .cfi_def_cfa_offset 240 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 240(%rsp), %rax movq %rax, 48(%rbx) leaq 248(%rsp), %rax movq %rax, 56(%rbx) leaq 256(%rsp), %rax movq %rax, 64(%rbx) leaq 264(%rsp), %rax movq %rax, 72(%rbx) leaq 272(%rsp), %rax movq %rax, 80(%rbx) leaq 280(%rsp), %rax movq %rax, 88(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $208, %rsp .cfi_adjust_cfa_offset -208 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end7: .size _ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii, .Lfunc_end7-_ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .cfi_endproc # -- End function .type _ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii,@function # -- Begin function _ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii _ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii: # @_ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $176, %rsp .cfi_def_cfa_offset 224 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 224(%rsp), %rax movq %rax, 48(%rbx) leaq 232(%rsp), %rax movq %rax, 56(%rbx) leaq 240(%rsp), %rax movq %rax, 64(%rbx) leaq 248(%rsp), %rax movq %rax, 72(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL13txinvr_kernelPdS_S_S_S_S_S_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $192, %rsp .cfi_adjust_cfa_offset -192 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end8: .size _ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii, .Lfunc_end8-_ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii .cfi_endproc # -- End function .type _ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii,@function # -- Begin function _ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii _ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii: # @_ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $176, %rsp .cfi_def_cfa_offset 224 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 224(%rsp), %rax movq %rax, 48(%rbx) leaq 232(%rsp), %rax movq %rax, 56(%rbx) leaq 240(%rsp), %rax movq %rax, 64(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL14x_solve_kernelPdS_S_S_S_S_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $192, %rsp .cfi_adjust_cfa_offset -192 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end9: .size _ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii, .Lfunc_end9-_ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii .cfi_endproc # -- End function .type _ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii,@function # -- Begin function _ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii _ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii: # @_ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $176, %rsp .cfi_def_cfa_offset 224 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 224(%rsp), %rax movq %rax, 48(%rbx) leaq 232(%rsp), %rax movq %rax, 56(%rbx) leaq 240(%rsp), %rax movq %rax, 64(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL14y_solve_kernelPdS_S_S_S_S_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $192, %rsp .cfi_adjust_cfa_offset -192 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end10: .size _ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii, .Lfunc_end10-_ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii .cfi_endproc # -- End function .type _ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii,@function # -- Begin function _ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii _ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii: # @_ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $208, %rsp .cfi_def_cfa_offset 256 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 256(%rsp), %rax movq %rax, 48(%rbx) leaq 264(%rsp), %rax movq %rax, 56(%rbx) leaq 272(%rsp), %rax movq %rax, 64(%rbx) leaq 280(%rsp), %rax movq %rax, 72(%rbx) leaq 288(%rsp), %rax movq %rax, 80(%rbx) leaq 296(%rsp), %rax movq %rax, 88(%rbx) leaq 304(%rsp), %rax movq %rax, 96(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $224, %rsp .cfi_adjust_cfa_offset -224 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end11: .size _ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii, .Lfunc_end11-_ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .cfi_endproc # -- End function .type _ZL25__device_stub__add_kernelPdS_iii,@function # -- Begin function _ZL25__device_stub__add_kernelPdS_iii _ZL25__device_stub__add_kernelPdS_iii: # @_ZL25__device_stub__add_kernelPdS_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 8(%rsp), %rdx movl %ecx, (%rdx) leaq 4(%rsp), %rcx movl %r8d, (%rcx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL10add_kernelPdS_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end12: .size _ZL25__device_stub__add_kernelPdS_iii, .Lfunc_end12-_ZL25__device_stub__add_kernelPdS_iii .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _Z10read_inputcPdPiS0_S0_S0_ .LCPI13_0: .quad 0x3f8eb851eb851eb8 # double 0.014999999999999999 .LCPI13_1: .quad 0x3f1a36e2eb1c432d # double 1.0E-4 .LCPI13_2: .quad 0x3f33a92a30553261 # double 2.9999999999999997E-4 .LCPI13_3: .quad 0x3f45f45e0b4e11dc # double 6.7000000000000002E-4 .LCPI13_4: .quad 0x3f50624dd2f1a9fc # double 0.001 .LCPI13_5: .quad 0x3f589374bc6a7efa # double 0.0015 .text .globl _Z10read_inputcPdPiS0_S0_S0_ .type _Z10read_inputcPdPiS0_S0_S0_,@function _Z10read_inputcPdPiS0_S0_S0_: # @_Z10read_inputcPdPiS0_S0_S0_ .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $1048, %rsp # imm = 0x418 .cfi_def_cfa_offset 1104 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %r9, %r14 movq %r8, 8(%rsp) # 8-byte Spill movq %rcx, %rbp movq %rdx, %r12 movq %rsi, %r15 movl %edi, %ebx movl $.L.str.2, %edi movl $.L.str.3, %esi callq fopen testq %rax, %rax je .LBB13_2 # %bb.1: movq %rax, %r13 movl $.Lstr, %edi callq puts@PLT leaq 16(%rsp), %rbx movq %rbx, %rdi movl $1023, %esi # imm = 0x3FF movq %r13, %rdx callq fgets movl $.L.str.5, %esi movq %rbx, %rdi movq %r14, %rdx xorl %eax, %eax callq __isoc23_sscanf movq %rbx, %rdi movl $1023, %esi # imm = 0x3FF movq %r13, %rdx callq fgets movl $.L.str.6, %esi movq %rbx, %rdi movq %r15, %rdx xorl %eax, %eax callq __isoc23_sscanf movq %rbx, %rdi movl $1023, %esi # imm = 0x3FF movq %r13, %rdx callq fgets movl $.L.str.7, %esi movq %rbx, %rdi movq %r12, %rdx movq %rbp, %rcx movq %rbp, %rbx movq 8(%rsp), %rbp # 8-byte Reload movq %rbp, %r8 xorl %eax, %eax callq __isoc23_sscanf movq %r13, %rdi callq fclose jmp .LBB13_18 .LBB13_2: movq %r12, %rdi movq %rbp, %r13 movq 8(%rsp), %rbp # 8-byte Reload movsbl %bl, %esi movl $12, %eax movl $100, %ecx movsd .LCPI13_0(%rip), %xmm0 # xmm0 = mem[0],zero cmpl $86, %esi jle .LBB13_3 # %bb.7: leal -87(%rsi), %edx cmpl $14, %edx movq %r13, %rbx movq %rdi, %r12 ja .LBB13_8 # %bb.19: jmpq *.LJTI13_1(,%rdx,8) .LBB13_3: leal -65(%rsi), %edx cmpl $4, %edx movq %r13, %rbx movq %rdi, %r12 ja .LBB13_4 # %bb.6: jmpq *.LJTI13_0(,%rdx,8) .LBB13_12: movl $64, %eax jmp .LBB13_11 .LBB13_8: cmpl $115, %esi je .LBB13_17 # %bb.9: cmpl $119, %esi jne .LBB13_5 .LBB13_10: movl $36, %eax .LBB13_11: movl $400, %ecx # imm = 0x190 movsd .LCPI13_5(%rip), %xmm0 # xmm0 = mem[0],zero jmp .LBB13_17 .LBB13_15: movl $1020, %eax # imm = 0x3FC movl $500, %ecx # imm = 0x1F4 movsd .LCPI13_1(%rip), %xmm0 # xmm0 = mem[0],zero jmp .LBB13_17 .LBB13_14: movl $408, %eax # imm = 0x198 movl $500, %ecx # imm = 0x1F4 movsd .LCPI13_2(%rip), %xmm0 # xmm0 = mem[0],zero jmp .LBB13_17 .LBB13_13: movl $162, %eax movl $400, %ecx # imm = 0x190 movsd .LCPI13_3(%rip), %xmm0 # xmm0 = mem[0],zero jmp .LBB13_17 .LBB13_16: movl $102, %eax movl $400, %ecx # imm = 0x190 movsd .LCPI13_4(%rip), %xmm0 # xmm0 = mem[0],zero jmp .LBB13_17 .LBB13_4: cmpl $83, %esi jne .LBB13_5 .LBB13_17: movsd %xmm0, (%r15) movl %ecx, (%r14) movl %eax, (%rbp) movl %eax, (%rbx) movl %eax, (%r12) .LBB13_18: movl $.Lstr.1, %edi callq puts@PLT movl (%r12), %esi movl (%rbx), %edx movl (%rbp), %ecx movl $.L.str.10, %edi xorl %eax, %eax callq printf movl (%r14), %esi movsd (%r15), %xmm0 # xmm0 = mem[0],zero movl $.L.str.11, %edi movb $1, %al callq printf movl $10, %edi callq putchar@PLT addq $1048, %rsp # imm = 0x418 .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB13_5: .cfi_def_cfa_offset 1104 movl $.L.str.8, %edi # kill: def $esi killed $esi killed $rsi xorl %eax, %eax callq printf movl $1, %edi callq exit .Lfunc_end13: .size _Z10read_inputcPdPiS0_S0_S0_, .Lfunc_end13-_Z10read_inputcPdPiS0_S0_S0_ .cfi_endproc .section .rodata,"a",@progbits .p2align 3, 0x0 .LJTI13_0: .quad .LBB13_12 .quad .LBB13_16 .quad .LBB13_13 .quad .LBB13_14 .quad .LBB13_15 .LJTI13_1: .quad .LBB13_10 .quad .LBB13_5 .quad .LBB13_5 .quad .LBB13_5 .quad .LBB13_5 .quad .LBB13_5 .quad .LBB13_5 .quad .LBB13_5 .quad .LBB13_5 .quad .LBB13_5 .quad .LBB13_12 .quad .LBB13_16 .quad .LBB13_13 .quad .LBB13_14 .quad .LBB13_15 # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI14_0: .quad 0xbff0000000000000 # double -1 .LCPI14_1: .quad 0x3ff0000000000000 # double 1 .LCPI14_2: .quad 0x3fd0000000000000 # double 0.25 .LCPI14_3: .quad 0x4010000000000000 # double 4 .LCPI14_4: .quad 0x4014000000000000 # double 5 .LCPI14_5: .quad 0x4018000000000000 # double 6 .LCPI14_6: .quad 0x3fb999999999999a # double 0.10000000000000001 .LCPI14_7: .quad 0x3fe8000000000000 # double 0.75 .LCPI14_8: .quad 0x3ff5555555555555 # double 1.3333333333333333 .LCPI14_9: .quad 0xbfeeb851eb851eb6 # double -0.95999999999999974 .LCPI14_10: .quad 0x3fc5555555555555 # double 0.16666666666666666 .LCPI14_11: .quad 0x3fff5c28f5c28f5b # double 1.9599999999999997 .LCPI14_12: .quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $1192, %rsp # imm = 0x4A8 .cfi_def_cfa_offset 1232 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movb $83, %al cmpl $2, %edi jl .LBB14_2 # %bb.1: movq 8(%rsi), %rax movb (%rax), %al .LBB14_2: movsbl %al, %edi leaq 648(%rsp), %rbx leaq 16(%rsp), %r14 leaq 24(%rsp), %r15 leaq 20(%rsp), %r12 leaq 28(%rsp), %r9 movq %rbx, %rsi movq %r14, %rdx movq %r15, %rcx movq %r12, %r8 callq _Z10read_inputcPdPiS0_S0_S0_ movsd (%rbx), %xmm0 # xmm0 = mem[0],zero movsd %xmm0, 128(%rsp) movslq (%r14), %rax movslq (%r15), %rcx imulq %rax, %rcx movslq (%r12), %r15 imulq %rcx, %r15 leaq 632(%rsp), %rdi xorl %esi, %esi callq gettimeofday leaq (,%r15,8), %rax leaq (%rax,%rax,4), %rbx leaq 32(%rsp), %rdi movq %rbx, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_3 # %bb.5: # %_ZL11HandleError10hipError_tPKci.exit leaq 40(%rsp), %rdi movq %rbx, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_6 # %bb.7: # %_ZL11HandleError10hipError_tPKci.exit30 leaq 120(%rsp), %rdi movq %rbx, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_8 # %bb.9: # %_ZL11HandleError10hipError_tPKci.exit32 movslq %r15d, %r14 shlq $3, %r14 leaq 112(%rsp), %rdi movq %r14, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_10 # %bb.11: # %_ZL11HandleError10hipError_tPKci.exit34 leaq 104(%rsp), %rdi movq %r14, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_12 # %bb.13: # %_ZL11HandleError10hipError_tPKci.exit36 leaq 96(%rsp), %rdi movq %r14, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_14 # %bb.15: # %_ZL11HandleError10hipError_tPKci.exit38 leaq 88(%rsp), %rdi movq %r14, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_16 # %bb.17: # %_ZL11HandleError10hipError_tPKci.exit40 leaq 80(%rsp), %rdi movq %r14, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_18 # %bb.19: # %_ZL11HandleError10hipError_tPKci.exit42 leaq 72(%rsp), %rdi movq %r14, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_20 # %bb.21: # %_ZL11HandleError10hipError_tPKci.exit44 leaq 64(%rsp), %rdi movq %r14, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_22 # %bb.23: # %_ZL11HandleError10hipError_tPKci.exit46 leal (%r15,%r15,8), %eax movslq %eax, %rsi shlq $3, %rsi leaq 56(%rsp), %rdi callq hipMalloc testl %eax, %eax jne .LBB14_24 # %bb.25: # %_ZL11HandleError10hipError_tPKci.exit48 leaq 48(%rsp), %rdi movq %rbx, %rsi callq hipMalloc testl %eax, %eax jne .LBB14_26 # %bb.27: # %_ZL11HandleError10hipError_tPKci.exit50 movabsq $4611686018427387904, %rax # imm = 0x4000000000000000 leaq 672(%rsp), %rsi movq %rax, (%rsi) xorpd %xmm0, %xmm0 movupd %xmm0, 40(%rsi) movapd %xmm0, 80(%rsi) movabsq $4616189618054758400, %rcx # imm = 0x4010000000000000 movq %rcx, 120(%rsi) movabsq $4617315517961601024, %rdx # imm = 0x4014000000000000 movq %rdx, 160(%rsi) movabsq $4613937818241073152, %rdi # imm = 0x4008000000000000 movq %rdi, 200(%rsi) movabsq $4602678819172646912, %r11 # imm = 0x3FE0000000000000 movq %r11, 240(%rsi) movabsq $4581421828931458171, %rbx # imm = 0x3F947AE147AE147B movq %rbx, 280(%rsi) movabsq $4576918229304087675, %r14 # imm = 0x3F847AE147AE147B movq %r14, 320(%rsi) movabsq $4584304132692975288, %r8 # imm = 0x3F9EB851EB851EB8 movq %r8, 360(%rsi) movq %r11, 400(%rsi) movabsq $4600877379321698714, %r10 # imm = 0x3FD999999999999A movq %r10, 440(%rsi) movabsq $4599075939470750515, %r9 # imm = 0x3FD3333333333333 movq %r9, 480(%rsi) movabsq $4607182418800017408, %r15 # imm = 0x3FF0000000000000 movq %r15, 8(%rsi) movq $0, 128(%rsi) movq %r15, 168(%rsi) movq %rax, 208(%rsi) movq %rdi, 248(%rsi) movq %r14, 288(%rsi) movq %r8, 328(%rsi) movq %rbx, 368(%rsi) movq %r10, 408(%rsi) movq %r9, 448(%rsi) movq %r11, 488(%rsi) movq %rax, 16(%rsi) movq %rax, 56(%rsi) movapd %xmm0, 96(%rsi) movupd %xmm0, 136(%rsi) movapd %xmm0, 176(%rsi) movq %rax, 216(%rsi) movq %rdi, 256(%rsi) movabsq $4585925428558828667, %rbx # imm = 0x3FA47AE147AE147B movq %rbx, 296(%rsi) movq %r8, 336(%rsi) movabsq $4587366580439587226, %r14 # imm = 0x3FA999999999999A movq %r14, 376(%rsi) movq %r9, 416(%rsi) movq %r11, 456(%rsi) movq %r10, 496(%rsi) movq %rax, 24(%rsi) movq %rax, 64(%rsi) movq %rax, 224(%rsi) movq %rdi, 264(%rsi) movq %r8, 304(%rsi) movq %r14, 344(%rsi) movq %rbx, 384(%rsi) movabsq $4596373779694328218, %r11 # imm = 0x3FC999999999999A movq %r11, 424(%rsi) movabsq $4591870180066957722, %r15 # imm = 0x3FB999999999999A movq %r15, 464(%rsi) movq %r9, 504(%rsi) movq %rdx, 32(%rsi) movq %rcx, 72(%rsi) movq %rdi, 112(%rsi) movq %rax, 152(%rsi) movq %r15, 192(%rsi) movq %r10, 232(%rsi) movq %r9, 272(%rsi) movq %r14, 312(%rsi) movq %rbx, 352(%rsi) movq %r8, 392(%rsi) movq %r15, 432(%rsi) movq %r9, 472(%rsi) movq %r11, 512(%rsi) movabsq $4604544271217802189, %rax # imm = 0x3FE6A09E667F3BCD movq %rax, 608(%rsp) cvtsi2sdl 16(%rsp), %xmm1 movsd .LCPI14_0(%rip), %xmm2 # xmm2 = mem[0],zero addsd %xmm2, %xmm1 movsd .LCPI14_1(%rip), %xmm0 # xmm0 = mem[0],zero movapd %xmm0, %xmm4 divsd %xmm1, %xmm4 movsd %xmm4, 600(%rsp) xorps %xmm1, %xmm1 cvtsi2sdl 24(%rsp), %xmm1 addsd %xmm2, %xmm1 movapd %xmm0, %xmm6 divsd %xmm1, %xmm6 xorps %xmm1, %xmm1 cvtsi2sdl 20(%rsp), %xmm1 movsd %xmm6, 592(%rsp) addsd %xmm2, %xmm1 movapd %xmm0, %xmm5 divsd %xmm1, %xmm5 movsd %xmm5, 584(%rsp) movapd %xmm4, %xmm1 mulsd %xmm4, %xmm1 movapd %xmm0, %xmm3 divsd %xmm1, %xmm3 movsd %xmm3, 576(%rsp) movapd %xmm0, %xmm2 divsd %xmm4, %xmm2 addsd %xmm4, %xmm4 movapd %xmm0, %xmm9 divsd %xmm4, %xmm9 movsd %xmm9, 568(%rsp) movsd %xmm2, 560(%rsp) movapd %xmm6, %xmm1 mulsd %xmm6, %xmm1 movapd %xmm0, %xmm4 divsd %xmm1, %xmm4 movsd %xmm4, 552(%rsp) movapd %xmm0, %xmm1 divsd %xmm6, %xmm1 addsd %xmm6, %xmm6 movapd %xmm0, %xmm10 divsd %xmm6, %xmm10 movsd %xmm10, 544(%rsp) movsd %xmm1, 536(%rsp) movapd %xmm0, %xmm6 movapd %xmm5, %xmm8 movapd %xmm0, %xmm7 divsd %xmm5, %xmm0 mulsd %xmm5, %xmm5 divsd %xmm5, %xmm6 movsd %xmm6, 528(%rsp) addsd %xmm8, %xmm8 divsd %xmm8, %xmm7 movsd %xmm7, 520(%rsp) movsd %xmm0, 512(%rsp) movsd 128(%rsp), %xmm5 # xmm5 = mem[0],zero movapd %xmm3, %xmm8 mulsd %xmm5, %xmm8 movsd %xmm8, 504(%rsp) mulsd %xmm5, %xmm9 movsd %xmm9, 496(%rsp) movapd %xmm4, %xmm9 mulsd %xmm5, %xmm9 movsd %xmm9, 488(%rsp) mulsd %xmm5, %xmm10 movsd %xmm10, 480(%rsp) movsd %xmm6, 288(%rsp) movsd %xmm6, 280(%rsp) movsd %xmm6, 272(%rsp) movsd %xmm6, 264(%rsp) movsd %xmm6, 256(%rsp) mulsd %xmm5, %xmm6 movsd %xmm6, 472(%rsp) mulsd %xmm5, %xmm7 movsd %xmm7, 464(%rsp) addsd %xmm8, %xmm8 movsd %xmm8, 456(%rsp) addsd %xmm9, %xmm9 movsd %xmm9, 448(%rsp) addsd %xmm6, %xmm6 movsd %xmm6, 440(%rsp) mulsd .LCPI14_2(%rip), %xmm5 movsd %xmm5, 432(%rsp) movsd %xmm5, 424(%rsp) movsd .LCPI14_3(%rip), %xmm6 # xmm6 = mem[0],zero mulsd %xmm5, %xmm6 movsd %xmm6, 416(%rsp) movsd .LCPI14_4(%rip), %xmm6 # xmm6 = mem[0],zero mulsd %xmm5, %xmm6 movsd %xmm6, 408(%rsp) mulsd .LCPI14_5(%rip), %xmm5 movsd %xmm5, 400(%rsp) movsd .LCPI14_6(%rip), %xmm5 # xmm5 = mem[0],zero movapd %xmm2, %xmm9 mulsd %xmm5, %xmm9 movsd %xmm9, 392(%rsp) movapd %xmm1, %xmm6 mulsd %xmm5, %xmm6 movsd %xmm6, 384(%rsp) mulsd %xmm0, %xmm5 movsd %xmm5, 376(%rsp) movsd .LCPI14_7(%rip), %xmm7 # xmm7 = mem[0],zero mulsd %xmm7, %xmm3 movsd %xmm3, 368(%rsp) movsd %xmm3, 360(%rsp) movsd %xmm3, 352(%rsp) movsd %xmm3, 344(%rsp) movsd %xmm3, 336(%rsp) mulsd %xmm7, %xmm4 movsd %xmm4, 328(%rsp) movsd %xmm4, 320(%rsp) movsd %xmm4, 312(%rsp) movsd %xmm4, 304(%rsp) movsd %xmm4, 296(%rsp) movsd .LCPI14_8(%rip), %xmm3 # xmm3 = mem[0],zero movapd %xmm9, %xmm4 mulsd %xmm3, %xmm4 mulsd %xmm2, %xmm4 movsd %xmm4, 248(%rsp) movapd %xmm2, %xmm4 mulsd %xmm9, %xmm4 movsd %xmm4, 240(%rsp) movsd .LCPI14_9(%rip), %xmm4 # xmm4 = mem[0],zero movapd %xmm9, %xmm7 mulsd %xmm4, %xmm7 mulsd %xmm2, %xmm7 movsd %xmm7, 232(%rsp) movsd .LCPI14_10(%rip), %xmm7 # xmm7 = mem[0],zero movapd %xmm9, %xmm8 mulsd %xmm7, %xmm8 mulsd %xmm2, %xmm8 movsd %xmm8, 224(%rsp) movsd .LCPI14_11(%rip), %xmm8 # xmm8 = mem[0],zero mulsd %xmm8, %xmm9 mulsd %xmm2, %xmm9 movsd %xmm9, 216(%rsp) movapd %xmm6, %xmm2 mulsd %xmm3, %xmm2 mulsd %xmm1, %xmm2 movsd %xmm2, 208(%rsp) movapd %xmm1, %xmm2 mulsd %xmm6, %xmm2 movsd %xmm2, 200(%rsp) movapd %xmm6, %xmm2 mulsd %xmm4, %xmm2 mulsd %xmm1, %xmm2 movsd %xmm2, 192(%rsp) movapd %xmm6, %xmm2 mulsd %xmm7, %xmm2 mulsd %xmm1, %xmm2 movsd %xmm2, 184(%rsp) mulsd %xmm8, %xmm6 mulsd %xmm1, %xmm6 movsd %xmm6, 176(%rsp) mulsd %xmm5, %xmm3 mulsd %xmm0, %xmm3 movsd %xmm3, 168(%rsp) movapd %xmm0, %xmm1 mulsd %xmm5, %xmm1 movsd %xmm1, 160(%rsp) mulsd %xmm5, %xmm4 mulsd %xmm0, %xmm4 movsd %xmm4, 152(%rsp) mulsd %xmm5, %xmm7 mulsd %xmm0, %xmm7 movsd %xmm7, 144(%rsp) mulsd %xmm8, %xmm5 mulsd %xmm0, %xmm5 movsd %xmm5, 136(%rsp) movq %rsp, %rdi movq $ce, (%rdi) movl $520, %edx # imm = 0x208 xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_28 # %bb.29: # %_ZL11HandleError10hipError_tPKci.exit52 movq %rsp, %rdi movq $bt, (%rdi) leaq 608(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_30 # %bb.31: # %_ZL11HandleError10hipError_tPKci.exit54 movq %rsp, %rdi movq $dnxm1, (%rdi) leaq 600(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_32 # %bb.33: # %_ZL11HandleError10hipError_tPKci.exit56 movq %rsp, %rdi movq $dnym1, (%rdi) leaq 592(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_34 # %bb.35: # %_ZL11HandleError10hipError_tPKci.exit58 movq %rsp, %rdi movq $dnzm1, (%rdi) leaq 584(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_36 # %bb.37: # %_ZL11HandleError10hipError_tPKci.exit60 movq %rsp, %rdi movq $tx1, (%rdi) leaq 576(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_38 # %bb.39: # %_ZL11HandleError10hipError_tPKci.exit62 movq %rsp, %rdi movq $tx2, (%rdi) leaq 568(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_40 # %bb.41: # %_ZL11HandleError10hipError_tPKci.exit64 movq %rsp, %rdi movq $tx3, (%rdi) leaq 560(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_42 # %bb.43: # %_ZL11HandleError10hipError_tPKci.exit66 movq %rsp, %rdi movq $ty1, (%rdi) leaq 552(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_44 # %bb.45: # %_ZL11HandleError10hipError_tPKci.exit68 movq %rsp, %rdi movq $ty2, (%rdi) leaq 544(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_46 # %bb.47: # %_ZL11HandleError10hipError_tPKci.exit70 movq %rsp, %rdi movq $ty3, (%rdi) leaq 536(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_48 # %bb.49: # %_ZL11HandleError10hipError_tPKci.exit72 movq %rsp, %rdi movq $tz1, (%rdi) leaq 528(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_50 # %bb.51: # %_ZL11HandleError10hipError_tPKci.exit74 movq %rsp, %rdi movq $tz2, (%rdi) leaq 520(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_52 # %bb.53: # %_ZL11HandleError10hipError_tPKci.exit76 movq %rsp, %rdi movq $tz3, (%rdi) leaq 512(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_54 # %bb.55: # %_ZL11HandleError10hipError_tPKci.exit78 movq %rsp, %rdi movq $dtx1, (%rdi) leaq 504(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_56 # %bb.57: # %_ZL11HandleError10hipError_tPKci.exit80 movq %rsp, %rdi movq $dttx2, (%rdi) leaq 496(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_58 # %bb.59: # %_ZL11HandleError10hipError_tPKci.exit82 movq %rsp, %rdi movq $dty1, (%rdi) leaq 488(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_60 # %bb.61: # %_ZL11HandleError10hipError_tPKci.exit84 movq %rsp, %rdi movq $dtty2, (%rdi) leaq 480(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_62 # %bb.63: # %_ZL11HandleError10hipError_tPKci.exit86 movq %rsp, %rdi movq $dtz1, (%rdi) leaq 472(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_64 # %bb.65: # %_ZL11HandleError10hipError_tPKci.exit88 movq %rsp, %rdi movq $dttz2, (%rdi) leaq 464(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_66 # %bb.67: # %_ZL11HandleError10hipError_tPKci.exit90 movq %rsp, %rdi movq $c2dttx1, (%rdi) leaq 456(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_68 # %bb.69: # %_ZL11HandleError10hipError_tPKci.exit92 movq %rsp, %rdi movq $c2dtty1, (%rdi) leaq 448(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_70 # %bb.71: # %_ZL11HandleError10hipError_tPKci.exit94 movq %rsp, %rdi movq $c2dttz1, (%rdi) leaq 440(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_72 # %bb.73: # %_ZL11HandleError10hipError_tPKci.exit96 movq %rsp, %rdi movq $dt, (%rdi) leaq 128(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_74 # %bb.75: # %_ZL11HandleError10hipError_tPKci.exit98 movq %rsp, %rdi movq $dtdssp, (%rdi) leaq 432(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_76 # %bb.77: # %_ZL11HandleError10hipError_tPKci.exit100 movq %rsp, %rdi movq $comz1, (%rdi) leaq 424(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_78 # %bb.79: # %_ZL11HandleError10hipError_tPKci.exit102 movq %rsp, %rdi movq $comz4, (%rdi) leaq 416(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_80 # %bb.81: # %_ZL11HandleError10hipError_tPKci.exit104 movq %rsp, %rdi movq $comz5, (%rdi) leaq 408(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_82 # %bb.83: # %_ZL11HandleError10hipError_tPKci.exit106 movq %rsp, %rdi movq $comz6, (%rdi) leaq 400(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_84 # %bb.85: # %_ZL11HandleError10hipError_tPKci.exit108 movq %rsp, %rdi movq $c3c4tx3, (%rdi) leaq 392(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_86 # %bb.87: # %_ZL11HandleError10hipError_tPKci.exit110 movq %rsp, %rdi movq $c3c4ty3, (%rdi) leaq 384(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_88 # %bb.89: # %_ZL11HandleError10hipError_tPKci.exit112 movq %rsp, %rdi movq $c3c4tz3, (%rdi) leaq 376(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_90 # %bb.91: # %_ZL11HandleError10hipError_tPKci.exit114 movq %rsp, %rdi movq $dx1tx1, (%rdi) leaq 368(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_92 # %bb.93: # %_ZL11HandleError10hipError_tPKci.exit116 movq %rsp, %rdi movq $dx2tx1, (%rdi) leaq 360(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_94 # %bb.95: # %_ZL11HandleError10hipError_tPKci.exit118 movq %rsp, %rdi movq $dx3tx1, (%rdi) leaq 352(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_96 # %bb.97: # %_ZL11HandleError10hipError_tPKci.exit120 movq %rsp, %rdi movq $dx4tx1, (%rdi) leaq 344(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_98 # %bb.99: # %_ZL11HandleError10hipError_tPKci.exit122 movq %rsp, %rdi movq $dx5tx1, (%rdi) leaq 336(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_100 # %bb.101: # %_ZL11HandleError10hipError_tPKci.exit124 movq %rsp, %rdi movq $dy1ty1, (%rdi) leaq 328(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_102 # %bb.103: # %_ZL11HandleError10hipError_tPKci.exit126 movq %rsp, %rdi movq $dy2ty1, (%rdi) leaq 320(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_104 # %bb.105: # %_ZL11HandleError10hipError_tPKci.exit128 movq %rsp, %rdi movq $dy3ty1, (%rdi) leaq 312(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_106 # %bb.107: # %_ZL11HandleError10hipError_tPKci.exit130 movq %rsp, %rdi movq $dy4ty1, (%rdi) leaq 304(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_108 # %bb.109: # %_ZL11HandleError10hipError_tPKci.exit132 movq %rsp, %rdi movq $dy5ty1, (%rdi) leaq 296(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_110 # %bb.111: # %_ZL11HandleError10hipError_tPKci.exit134 movq %rsp, %rdi movq $dz1tz1, (%rdi) leaq 288(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_112 # %bb.113: # %_ZL11HandleError10hipError_tPKci.exit136 movq %rsp, %rdi movq $dz2tz1, (%rdi) leaq 280(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_114 # %bb.115: # %_ZL11HandleError10hipError_tPKci.exit138 movq %rsp, %rdi movq $dz3tz1, (%rdi) leaq 272(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_116 # %bb.117: # %_ZL11HandleError10hipError_tPKci.exit140 movq %rsp, %rdi movq $dz4tz1, (%rdi) leaq 264(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_118 # %bb.119: # %_ZL11HandleError10hipError_tPKci.exit142 movq %rsp, %rdi movq $dz5tz1, (%rdi) leaq 256(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_120 # %bb.121: # %_ZL11HandleError10hipError_tPKci.exit144 movq %rsp, %rdi movq $xxcon1, (%rdi) leaq 248(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_122 # %bb.123: # %_ZL11HandleError10hipError_tPKci.exit146 movq %rsp, %rdi movq $xxcon2, (%rdi) leaq 240(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_124 # %bb.125: # %_ZL11HandleError10hipError_tPKci.exit148 movq %rsp, %rdi movq $xxcon3, (%rdi) leaq 232(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_126 # %bb.127: # %_ZL11HandleError10hipError_tPKci.exit150 movq %rsp, %rdi movq $xxcon4, (%rdi) leaq 224(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_128 # %bb.129: # %_ZL11HandleError10hipError_tPKci.exit152 movq %rsp, %rdi movq $xxcon5, (%rdi) leaq 216(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_130 # %bb.131: # %_ZL11HandleError10hipError_tPKci.exit154 movq %rsp, %rdi movq $yycon1, (%rdi) leaq 208(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_132 # %bb.133: # %_ZL11HandleError10hipError_tPKci.exit156 movq %rsp, %rdi movq $yycon2, (%rdi) leaq 200(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_134 # %bb.135: # %_ZL11HandleError10hipError_tPKci.exit158 movq %rsp, %rdi movq $yycon3, (%rdi) leaq 192(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_136 # %bb.137: # %_ZL11HandleError10hipError_tPKci.exit160 movq %rsp, %rdi movq $yycon4, (%rdi) leaq 184(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_138 # %bb.139: # %_ZL11HandleError10hipError_tPKci.exit162 movq %rsp, %rdi movq $yycon5, (%rdi) leaq 176(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_140 # %bb.141: # %_ZL11HandleError10hipError_tPKci.exit164 movq %rsp, %rdi movq $zzcon1, (%rdi) leaq 168(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_142 # %bb.143: # %_ZL11HandleError10hipError_tPKci.exit166 movq %rsp, %rdi movq $zzcon2, (%rdi) leaq 160(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_144 # %bb.145: # %_ZL11HandleError10hipError_tPKci.exit168 movq %rsp, %rdi movq $zzcon3, (%rdi) leaq 152(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_146 # %bb.147: # %_ZL11HandleError10hipError_tPKci.exit170 movq %rsp, %rdi movq $zzcon4, (%rdi) leaq 144(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_148 # %bb.149: # %_ZL11HandleError10hipError_tPKci.exit172 movq %rsp, %rdi movq $zzcon5, (%rdi) leaq 136(%rsp), %rsi movl $8, %edx xorl %ecx, %ecx movl $1, %r8d callq hipMemcpyToSymbol testl %eax, %eax jne .LBB14_150 # %bb.151: # %_ZL11HandleError10hipError_tPKci.exit174 movabsq $4294967296, %r14 # imm = 0x100000000 leaq 616(%rsp), %rdi xorl %esi, %esi callq gettimeofday movq 40(%rsp), %rdi movl 16(%rsp), %esi movl 24(%rsp), %edx movl 20(%rsp), %ecx callq _Z9exact_rhsPdiii movl 20(%rsp), %eax movl 24(%rsp), %ebx shlq $32, %rbx orq %rax, %rbx movl 16(%rsp), %edx btsq $32, %rdx movq %rbx, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB14_153 # %bb.152: movq 32(%rsp), %rdi movl 16(%rsp), %esi movl 24(%rsp), %edx movl 20(%rsp), %ecx callq _ZL32__device_stub__initialize_kernelPdiii .LBB14_153: movl 16(%rsp), %esi movl 24(%rsp), %edx movl 20(%rsp), %ecx movl 28(%rsp), %r8d movq 112(%rsp), %r9 subq $8, %rsp .cfi_adjust_cfa_offset 8 movl $1, %edi pushq 56(%rsp) .cfi_adjust_cfa_offset 8 pushq 48(%rsp) .cfi_adjust_cfa_offset 8 pushq 64(%rsp) .cfi_adjust_cfa_offset 8 pushq 88(%rsp) .cfi_adjust_cfa_offset 8 pushq 160(%rsp) .cfi_adjust_cfa_offset 8 pushq 112(%rsp) .cfi_adjust_cfa_offset 8 pushq 136(%rsp) .cfi_adjust_cfa_offset 8 pushq 136(%rsp) .cfi_adjust_cfa_offset 8 pushq 160(%rsp) .cfi_adjust_cfa_offset 8 pushq 176(%rsp) .cfi_adjust_cfa_offset 8 pushq 192(%rsp) .cfi_adjust_cfa_offset 8 callq _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ addq $96, %rsp .cfi_adjust_cfa_offset -96 movl 16(%rsp), %edx orq %r14, %rdx movq %rbx, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB14_155 # %bb.154: movq 32(%rsp), %rdi movl 16(%rsp), %esi movl 24(%rsp), %edx movl 20(%rsp), %ecx callq _ZL32__device_stub__initialize_kernelPdiii .LBB14_155: movl 16(%rsp), %esi movl 24(%rsp), %edx movl 20(%rsp), %ecx movl 28(%rsp), %r8d movq 112(%rsp), %r9 subq $8, %rsp .cfi_adjust_cfa_offset 8 xorl %edi, %edi pushq 56(%rsp) .cfi_adjust_cfa_offset 8 pushq 48(%rsp) .cfi_adjust_cfa_offset 8 pushq 64(%rsp) .cfi_adjust_cfa_offset 8 pushq 88(%rsp) .cfi_adjust_cfa_offset 8 pushq 160(%rsp) .cfi_adjust_cfa_offset 8 pushq 112(%rsp) .cfi_adjust_cfa_offset 8 pushq 136(%rsp) .cfi_adjust_cfa_offset 8 pushq 136(%rsp) .cfi_adjust_cfa_offset 8 pushq 160(%rsp) .cfi_adjust_cfa_offset 8 pushq 176(%rsp) .cfi_adjust_cfa_offset 8 pushq 192(%rsp) .cfi_adjust_cfa_offset 8 callq _Z3adibiiiiPdS_S_S_S_S_S_S_S_S_S_S_ addq $96, %rsp .cfi_adjust_cfa_offset -96 leaq 656(%rsp), %rbx movq %rbx, %rdi xorl %esi, %esi callq gettimeofday movq %rsp, %r14 movq %r14, %rdi xorl %esi, %esi callq gettimeofday movl $_ZSt4cout, %edi movl $.L.str.13, %esi movl $6, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq (%r14), %rax movq 8(%r14), %rcx subq 632(%rsp), %rax cvtsi2sd %rax, %xmm1 subq 640(%rsp), %rcx cvtsi2sd %rcx, %xmm0 mulsd .LCPI14_12(%rip), %xmm0 addsd %xmm1, %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r14 movq (%rax), %rax movq -24(%rax), %rdi addq %r14, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r14, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv movl $_ZSt4cout, %edi movl $.L.str.14, %esi movl $8, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq (%rbx), %rax movq 8(%rbx), %rcx subq 616(%rsp), %rax xorps %xmm1, %xmm1 cvtsi2sd %rax, %xmm1 subq 624(%rsp), %rcx xorps %xmm0, %xmm0 cvtsi2sd %rcx, %xmm0 mulsd .LCPI14_12(%rip), %xmm0 addsd %xmm1, %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %rbx movq (%rax), %rax movq -24(%rax), %rdi addq %rbx, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %rbx, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv xorl %eax, %eax addq $1192, %rsp # imm = 0x4A8 .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB14_3: .cfi_def_cfa_offset 1232 movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1927, %ecx # imm = 0x787 jmp .LBB14_4 .LBB14_6: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1928, %ecx # imm = 0x788 jmp .LBB14_4 .LBB14_8: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1929, %ecx # imm = 0x789 jmp .LBB14_4 .LBB14_10: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1930, %ecx # imm = 0x78A jmp .LBB14_4 .LBB14_12: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1931, %ecx # imm = 0x78B jmp .LBB14_4 .LBB14_14: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1932, %ecx # imm = 0x78C jmp .LBB14_4 .LBB14_16: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1933, %ecx # imm = 0x78D jmp .LBB14_4 .LBB14_18: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1934, %ecx # imm = 0x78E jmp .LBB14_4 .LBB14_20: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1935, %ecx # imm = 0x78F jmp .LBB14_4 .LBB14_22: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1936, %ecx # imm = 0x790 jmp .LBB14_4 .LBB14_24: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1937, %ecx # imm = 0x791 jmp .LBB14_4 .LBB14_26: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $1938, %ecx # imm = 0x792 jmp .LBB14_4 .LBB14_28: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2088, %ecx # imm = 0x828 jmp .LBB14_4 .LBB14_30: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2089, %ecx # imm = 0x829 jmp .LBB14_4 .LBB14_32: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2090, %ecx # imm = 0x82A jmp .LBB14_4 .LBB14_34: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2091, %ecx # imm = 0x82B jmp .LBB14_4 .LBB14_36: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2092, %ecx # imm = 0x82C jmp .LBB14_4 .LBB14_38: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2093, %ecx # imm = 0x82D jmp .LBB14_4 .LBB14_40: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2094, %ecx # imm = 0x82E jmp .LBB14_4 .LBB14_42: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2095, %ecx # imm = 0x82F jmp .LBB14_4 .LBB14_44: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2096, %ecx # imm = 0x830 jmp .LBB14_4 .LBB14_46: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2097, %ecx # imm = 0x831 jmp .LBB14_4 .LBB14_48: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2098, %ecx # imm = 0x832 jmp .LBB14_4 .LBB14_50: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2099, %ecx # imm = 0x833 jmp .LBB14_4 .LBB14_52: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2100, %ecx # imm = 0x834 jmp .LBB14_4 .LBB14_54: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2101, %ecx # imm = 0x835 jmp .LBB14_4 .LBB14_56: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2102, %ecx # imm = 0x836 jmp .LBB14_4 .LBB14_58: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2103, %ecx # imm = 0x837 jmp .LBB14_4 .LBB14_60: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2104, %ecx # imm = 0x838 jmp .LBB14_4 .LBB14_62: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2105, %ecx # imm = 0x839 jmp .LBB14_4 .LBB14_64: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2106, %ecx # imm = 0x83A jmp .LBB14_4 .LBB14_66: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2107, %ecx # imm = 0x83B jmp .LBB14_4 .LBB14_68: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2108, %ecx # imm = 0x83C jmp .LBB14_4 .LBB14_70: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2109, %ecx # imm = 0x83D jmp .LBB14_4 .LBB14_72: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2110, %ecx # imm = 0x83E jmp .LBB14_4 .LBB14_74: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2111, %ecx # imm = 0x83F jmp .LBB14_4 .LBB14_76: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2112, %ecx # imm = 0x840 jmp .LBB14_4 .LBB14_78: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2113, %ecx # imm = 0x841 jmp .LBB14_4 .LBB14_80: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2114, %ecx # imm = 0x842 jmp .LBB14_4 .LBB14_82: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2115, %ecx # imm = 0x843 jmp .LBB14_4 .LBB14_84: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2116, %ecx # imm = 0x844 jmp .LBB14_4 .LBB14_86: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2117, %ecx # imm = 0x845 jmp .LBB14_4 .LBB14_88: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2118, %ecx # imm = 0x846 jmp .LBB14_4 .LBB14_90: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2119, %ecx # imm = 0x847 jmp .LBB14_4 .LBB14_92: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2120, %ecx # imm = 0x848 jmp .LBB14_4 .LBB14_94: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2121, %ecx # imm = 0x849 jmp .LBB14_4 .LBB14_96: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2122, %ecx # imm = 0x84A jmp .LBB14_4 .LBB14_98: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2123, %ecx # imm = 0x84B jmp .LBB14_4 .LBB14_100: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2124, %ecx # imm = 0x84C jmp .LBB14_4 .LBB14_102: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2125, %ecx # imm = 0x84D jmp .LBB14_4 .LBB14_104: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2126, %ecx # imm = 0x84E jmp .LBB14_4 .LBB14_106: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2127, %ecx # imm = 0x84F jmp .LBB14_4 .LBB14_108: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2128, %ecx # imm = 0x850 jmp .LBB14_4 .LBB14_110: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2129, %ecx # imm = 0x851 jmp .LBB14_4 .LBB14_112: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2130, %ecx # imm = 0x852 jmp .LBB14_4 .LBB14_114: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2131, %ecx # imm = 0x853 jmp .LBB14_4 .LBB14_116: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2132, %ecx # imm = 0x854 jmp .LBB14_4 .LBB14_118: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2133, %ecx # imm = 0x855 jmp .LBB14_4 .LBB14_120: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2134, %ecx # imm = 0x856 jmp .LBB14_4 .LBB14_122: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2135, %ecx # imm = 0x857 jmp .LBB14_4 .LBB14_124: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2136, %ecx # imm = 0x858 jmp .LBB14_4 .LBB14_126: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2137, %ecx # imm = 0x859 jmp .LBB14_4 .LBB14_128: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2138, %ecx # imm = 0x85A jmp .LBB14_4 .LBB14_130: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2139, %ecx # imm = 0x85B jmp .LBB14_4 .LBB14_132: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2140, %ecx # imm = 0x85C jmp .LBB14_4 .LBB14_134: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2141, %ecx # imm = 0x85D jmp .LBB14_4 .LBB14_136: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2142, %ecx # imm = 0x85E jmp .LBB14_4 .LBB14_138: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2143, %ecx # imm = 0x85F jmp .LBB14_4 .LBB14_140: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2144, %ecx # imm = 0x860 jmp .LBB14_4 .LBB14_142: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2145, %ecx # imm = 0x861 jmp .LBB14_4 .LBB14_144: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2146, %ecx # imm = 0x862 jmp .LBB14_4 .LBB14_146: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2147, %ecx # imm = 0x863 jmp .LBB14_4 .LBB14_148: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2148, %ecx # imm = 0x864 jmp .LBB14_4 .LBB14_150: movl %eax, %edi callq hipGetErrorString movl $.L.str.15, %edi movl $.L.str, %edx movq %rax, %rsi movl $2149, %ecx # imm = 0x865 .LBB14_4: xorl %eax, %eax callq printf movl $1, %edi callq exit .Lfunc_end14: .size main, .Lfunc_end14-main .cfi_endproc # -- End function .type _ZL32__device_stub__initialize_kernelPdiii,@function # -- Begin function _ZL32__device_stub__initialize_kernelPdiii _ZL32__device_stub__initialize_kernelPdiii: # @_ZL32__device_stub__initialize_kernelPdiii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 20(%rsp), %rdi movl %esi, (%rdi) leaq 16(%rsp), %rsi movl %edx, (%rsi) leaq 12(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZL17initialize_kernelPdiii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end15: .size _ZL32__device_stub__initialize_kernelPdiii, .Lfunc_end15-_ZL32__device_stub__initialize_kernelPdiii .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB16_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB16_2: subq $32, %rsp .cfi_adjust_cfa_offset 32 xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL21exact_rhs_kernel_initPdiii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL18exact_rhs_kernel_xPdiii, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL18exact_rhs_kernel_yPdiii, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL18exact_rhs_kernel_zPdiii, %esi movl $.L__unnamed_4, %edx movl $.L__unnamed_4, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii, %esi movl $.L__unnamed_5, %edx movl $.L__unnamed_5, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii, %esi movl $.L__unnamed_6, %edx movl $.L__unnamed_6, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL13txinvr_kernelPdS_S_S_S_S_S_iii, %esi movl $.L__unnamed_7, %edx movl $.L__unnamed_7, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL14x_solve_kernelPdS_S_S_S_S_iii, %esi movl $.L__unnamed_8, %edx movl $.L__unnamed_8, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL14y_solve_kernelPdS_S_S_S_S_iii, %esi movl $.L__unnamed_9, %edx movl $.L__unnamed_9, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii, %esi movl $.L__unnamed_10, %edx movl $.L__unnamed_10, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL10add_kernelPdS_iii, %esi movl $.L__unnamed_11, %edx movl $.L__unnamed_11, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZL17initialize_kernelPdiii, %esi movl $.L__unnamed_12, %edx movl $.L__unnamed_12, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction addq $32, %rsp .cfi_adjust_cfa_offset -32 movl $tx1, %esi movl $.L__unnamed_13, %edx movl $.L__unnamed_13, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $tx2, %esi movl $.L__unnamed_14, %edx movl $.L__unnamed_14, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $tx3, %esi movl $.L__unnamed_15, %edx movl $.L__unnamed_15, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $ty1, %esi movl $.L__unnamed_16, %edx movl $.L__unnamed_16, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $ty2, %esi movl $.L__unnamed_17, %edx movl $.L__unnamed_17, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $ty3, %esi movl $.L__unnamed_18, %edx movl $.L__unnamed_18, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $tz1, %esi movl $.L__unnamed_19, %edx movl $.L__unnamed_19, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $tz2, %esi movl $.L__unnamed_20, %edx movl $.L__unnamed_20, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $tz3, %esi movl $.L__unnamed_21, %edx movl $.L__unnamed_21, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $bt, %esi movl $.L__unnamed_22, %edx movl $.L__unnamed_22, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dt, %esi movl $.L__unnamed_23, %edx movl $.L__unnamed_23, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dtdssp, %esi movl $.L__unnamed_24, %edx movl $.L__unnamed_24, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dnxm1, %esi movl $.L__unnamed_25, %edx movl $.L__unnamed_25, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dnym1, %esi movl $.L__unnamed_26, %edx movl $.L__unnamed_26, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dnzm1, %esi movl $.L__unnamed_27, %edx movl $.L__unnamed_27, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dtx1, %esi movl $.L__unnamed_28, %edx movl $.L__unnamed_28, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dttx2, %esi movl $.L__unnamed_29, %edx movl $.L__unnamed_29, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dty1, %esi movl $.L__unnamed_30, %edx movl $.L__unnamed_30, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dtty2, %esi movl $.L__unnamed_31, %edx movl $.L__unnamed_31, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dtz1, %esi movl $.L__unnamed_32, %edx movl $.L__unnamed_32, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dttz2, %esi movl $.L__unnamed_33, %edx movl $.L__unnamed_33, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $c2dttx1, %esi movl $.L__unnamed_34, %edx movl $.L__unnamed_34, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $c2dtty1, %esi movl $.L__unnamed_35, %edx movl $.L__unnamed_35, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $c2dttz1, %esi movl $.L__unnamed_36, %edx movl $.L__unnamed_36, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $comz1, %esi movl $.L__unnamed_37, %edx movl $.L__unnamed_37, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $comz4, %esi movl $.L__unnamed_38, %edx movl $.L__unnamed_38, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $comz5, %esi movl $.L__unnamed_39, %edx movl $.L__unnamed_39, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $comz6, %esi movl $.L__unnamed_40, %edx movl $.L__unnamed_40, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $c3c4tx3, %esi movl $.L__unnamed_41, %edx movl $.L__unnamed_41, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $c3c4ty3, %esi movl $.L__unnamed_42, %edx movl $.L__unnamed_42, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $c3c4tz3, %esi movl $.L__unnamed_43, %edx movl $.L__unnamed_43, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $xxcon1, %esi movl $.L__unnamed_44, %edx movl $.L__unnamed_44, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $xxcon2, %esi movl $.L__unnamed_45, %edx movl $.L__unnamed_45, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $xxcon3, %esi movl $.L__unnamed_46, %edx movl $.L__unnamed_46, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $xxcon4, %esi movl $.L__unnamed_47, %edx movl $.L__unnamed_47, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $xxcon5, %esi movl $.L__unnamed_48, %edx movl $.L__unnamed_48, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dx1tx1, %esi movl $.L__unnamed_49, %edx movl $.L__unnamed_49, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dx2tx1, %esi movl $.L__unnamed_50, %edx movl $.L__unnamed_50, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dx3tx1, %esi movl $.L__unnamed_51, %edx movl $.L__unnamed_51, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dx4tx1, %esi movl $.L__unnamed_52, %edx movl $.L__unnamed_52, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dx5tx1, %esi movl $.L__unnamed_53, %edx movl $.L__unnamed_53, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $yycon1, %esi movl $.L__unnamed_54, %edx movl $.L__unnamed_54, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $yycon2, %esi movl $.L__unnamed_55, %edx movl $.L__unnamed_55, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $yycon3, %esi movl $.L__unnamed_56, %edx movl $.L__unnamed_56, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $yycon4, %esi movl $.L__unnamed_57, %edx movl $.L__unnamed_57, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $yycon5, %esi movl $.L__unnamed_58, %edx movl $.L__unnamed_58, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dy1ty1, %esi movl $.L__unnamed_59, %edx movl $.L__unnamed_59, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dy2ty1, %esi movl $.L__unnamed_60, %edx movl $.L__unnamed_60, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dy3ty1, %esi movl $.L__unnamed_61, %edx movl $.L__unnamed_61, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dy4ty1, %esi movl $.L__unnamed_62, %edx movl $.L__unnamed_62, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dy5ty1, %esi movl $.L__unnamed_63, %edx movl $.L__unnamed_63, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $zzcon1, %esi movl $.L__unnamed_64, %edx movl $.L__unnamed_64, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $zzcon2, %esi movl $.L__unnamed_65, %edx movl $.L__unnamed_65, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $zzcon3, %esi movl $.L__unnamed_66, %edx movl $.L__unnamed_66, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $zzcon4, %esi movl $.L__unnamed_67, %edx movl $.L__unnamed_67, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $zzcon5, %esi movl $.L__unnamed_68, %edx movl $.L__unnamed_68, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dz1tz1, %esi movl $.L__unnamed_69, %edx movl $.L__unnamed_69, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dz2tz1, %esi movl $.L__unnamed_70, %edx movl $.L__unnamed_70, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dz3tz1, %esi movl $.L__unnamed_71, %edx movl $.L__unnamed_71, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dz4tz1, %esi movl $.L__unnamed_72, %edx movl $.L__unnamed_72, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $dz5tz1, %esi movl $.L__unnamed_73, %edx movl $.L__unnamed_73, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $ce, %esi movl $.L__unnamed_74, %edx movl $.L__unnamed_74, %ecx movl $520, %r9d # imm = 0x208 movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $1 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $__hip_module_dtor, %edi popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end16: .size __hip_module_ctor, .Lfunc_end16-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB17_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB17_2: retq .Lfunc_end17: .size __hip_module_dtor, .Lfunc_end17-__hip_module_dtor .cfi_endproc # -- End function .type tx1,@object # @tx1 .local tx1 .comm tx1,8,8 .type tx2,@object # @tx2 .local tx2 .comm tx2,8,8 .type tx3,@object # @tx3 .local tx3 .comm tx3,8,8 .type ty1,@object # @ty1 .local ty1 .comm ty1,8,8 .type ty2,@object # @ty2 .local ty2 .comm ty2,8,8 .type ty3,@object # @ty3 .local ty3 .comm ty3,8,8 .type tz1,@object # @tz1 .local tz1 .comm tz1,8,8 .type tz2,@object # @tz2 .local tz2 .comm tz2,8,8 .type tz3,@object # @tz3 .local tz3 .comm tz3,8,8 .type bt,@object # @bt .local bt .comm bt,8,8 .type dt,@object # @dt .local dt .comm dt,8,8 .type dtdssp,@object # @dtdssp .local dtdssp .comm dtdssp,8,8 .type dnxm1,@object # @dnxm1 .local dnxm1 .comm dnxm1,8,8 .type dnym1,@object # @dnym1 .local dnym1 .comm dnym1,8,8 .type dnzm1,@object # @dnzm1 .local dnzm1 .comm dnzm1,8,8 .type dtx1,@object # @dtx1 .local dtx1 .comm dtx1,8,8 .type dttx2,@object # @dttx2 .local dttx2 .comm dttx2,8,8 .type dty1,@object # @dty1 .local dty1 .comm dty1,8,8 .type dtty2,@object # @dtty2 .local dtty2 .comm dtty2,8,8 .type dtz1,@object # @dtz1 .local dtz1 .comm dtz1,8,8 .type dttz2,@object # @dttz2 .local dttz2 .comm dttz2,8,8 .type c2dttx1,@object # @c2dttx1 .local c2dttx1 .comm c2dttx1,8,8 .type c2dtty1,@object # @c2dtty1 .local c2dtty1 .comm c2dtty1,8,8 .type c2dttz1,@object # @c2dttz1 .local c2dttz1 .comm c2dttz1,8,8 .type comz1,@object # @comz1 .local comz1 .comm comz1,8,8 .type comz4,@object # @comz4 .local comz4 .comm comz4,8,8 .type comz5,@object # @comz5 .local comz5 .comm comz5,8,8 .type comz6,@object # @comz6 .local comz6 .comm comz6,8,8 .type c3c4tx3,@object # @c3c4tx3 .local c3c4tx3 .comm c3c4tx3,8,8 .type c3c4ty3,@object # @c3c4ty3 .local c3c4ty3 .comm c3c4ty3,8,8 .type c3c4tz3,@object # @c3c4tz3 .local c3c4tz3 .comm c3c4tz3,8,8 .type xxcon1,@object # @xxcon1 .local xxcon1 .comm xxcon1,8,8 .type xxcon2,@object # @xxcon2 .local xxcon2 .comm xxcon2,8,8 .type xxcon3,@object # @xxcon3 .local xxcon3 .comm xxcon3,8,8 .type xxcon4,@object # @xxcon4 .local xxcon4 .comm xxcon4,8,8 .type xxcon5,@object # @xxcon5 .local xxcon5 .comm xxcon5,8,8 .type dx1tx1,@object # @dx1tx1 .local dx1tx1 .comm dx1tx1,8,8 .type dx2tx1,@object # @dx2tx1 .local dx2tx1 .comm dx2tx1,8,8 .type dx3tx1,@object # @dx3tx1 .local dx3tx1 .comm dx3tx1,8,8 .type dx4tx1,@object # @dx4tx1 .local dx4tx1 .comm dx4tx1,8,8 .type dx5tx1,@object # @dx5tx1 .local dx5tx1 .comm dx5tx1,8,8 .type yycon1,@object # @yycon1 .local yycon1 .comm yycon1,8,8 .type yycon2,@object # @yycon2 .local yycon2 .comm yycon2,8,8 .type yycon3,@object # @yycon3 .local yycon3 .comm yycon3,8,8 .type yycon4,@object # @yycon4 .local yycon4 .comm yycon4,8,8 .type yycon5,@object # @yycon5 .local yycon5 .comm yycon5,8,8 .type dy1ty1,@object # @dy1ty1 .local dy1ty1 .comm dy1ty1,8,8 .type dy2ty1,@object # @dy2ty1 .local dy2ty1 .comm dy2ty1,8,8 .type dy3ty1,@object # @dy3ty1 .local dy3ty1 .comm dy3ty1,8,8 .type dy4ty1,@object # @dy4ty1 .local dy4ty1 .comm dy4ty1,8,8 .type dy5ty1,@object # @dy5ty1 .local dy5ty1 .comm dy5ty1,8,8 .type zzcon1,@object # @zzcon1 .local zzcon1 .comm zzcon1,8,8 .type zzcon2,@object # @zzcon2 .local zzcon2 .comm zzcon2,8,8 .type zzcon3,@object # @zzcon3 .local zzcon3 .comm zzcon3,8,8 .type zzcon4,@object # @zzcon4 .local zzcon4 .comm zzcon4,8,8 .type zzcon5,@object # @zzcon5 .local zzcon5 .comm zzcon5,8,8 .type dz1tz1,@object # @dz1tz1 .local dz1tz1 .comm dz1tz1,8,8 .type dz2tz1,@object # @dz2tz1 .local dz2tz1 .comm dz2tz1,8,8 .type dz3tz1,@object # @dz3tz1 .local dz3tz1 .comm dz3tz1,8,8 .type dz4tz1,@object # @dz4tz1 .local dz4tz1 .comm dz4tz1,8,8 .type dz5tz1,@object # @dz5tz1 .local dz5tz1 .comm dz5tz1,8,8 .type ce,@object # @ce .local ce .comm ce,520,16 .type _ZL21exact_rhs_kernel_initPdiii,@object # @_ZL21exact_rhs_kernel_initPdiii .section .rodata,"a",@progbits .p2align 3, 0x0 _ZL21exact_rhs_kernel_initPdiii: .quad _ZL36__device_stub__exact_rhs_kernel_initPdiii .size _ZL21exact_rhs_kernel_initPdiii, 8 .type _ZL18exact_rhs_kernel_xPdiii,@object # @_ZL18exact_rhs_kernel_xPdiii .p2align 3, 0x0 _ZL18exact_rhs_kernel_xPdiii: .quad _ZL33__device_stub__exact_rhs_kernel_xPdiii .size _ZL18exact_rhs_kernel_xPdiii, 8 .type _ZL18exact_rhs_kernel_yPdiii,@object # @_ZL18exact_rhs_kernel_yPdiii .p2align 3, 0x0 _ZL18exact_rhs_kernel_yPdiii: .quad _ZL33__device_stub__exact_rhs_kernel_yPdiii .size _ZL18exact_rhs_kernel_yPdiii, 8 .type _ZL18exact_rhs_kernel_zPdiii,@object # @_ZL18exact_rhs_kernel_zPdiii .p2align 3, 0x0 _ZL18exact_rhs_kernel_zPdiii: .quad _ZL33__device_stub__exact_rhs_kernel_zPdiii .size _ZL18exact_rhs_kernel_zPdiii, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/raydongpub/GPU-FPtuner/master/orig_application/sp_double.hip" .size .L.str, 123 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz " Time step %4d\n" .size .L.str.1, 16 .type _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii,@object # @_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .section .rodata,"a",@progbits .p2align 3, 0x0 _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii: .quad _ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .size _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii, 8 .type _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii,@object # @_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .p2align 3, 0x0 _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii: .quad _ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .size _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii, 8 .type _ZL13txinvr_kernelPdS_S_S_S_S_S_iii,@object # @_ZL13txinvr_kernelPdS_S_S_S_S_S_iii .p2align 3, 0x0 _ZL13txinvr_kernelPdS_S_S_S_S_S_iii: .quad _ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii .size _ZL13txinvr_kernelPdS_S_S_S_S_S_iii, 8 .type _ZL14x_solve_kernelPdS_S_S_S_S_iii,@object # @_ZL14x_solve_kernelPdS_S_S_S_S_iii .p2align 3, 0x0 _ZL14x_solve_kernelPdS_S_S_S_S_iii: .quad _ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii .size _ZL14x_solve_kernelPdS_S_S_S_S_iii, 8 .type _ZL14y_solve_kernelPdS_S_S_S_S_iii,@object # @_ZL14y_solve_kernelPdS_S_S_S_S_iii .p2align 3, 0x0 _ZL14y_solve_kernelPdS_S_S_S_S_iii: .quad _ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii .size _ZL14y_solve_kernelPdS_S_S_S_S_iii, 8 .type _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii,@object # @_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .p2align 3, 0x0 _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii: .quad _ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .size _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii, 8 .type _ZL10add_kernelPdS_iii,@object # @_ZL10add_kernelPdS_iii .p2align 3, 0x0 _ZL10add_kernelPdS_iii: .quad _ZL25__device_stub__add_kernelPdS_iii .size _ZL10add_kernelPdS_iii, 8 .type .L.str.2,@object # @.str.2 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.2: .asciz "inputsp.data" .size .L.str.2, 13 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "rt" .size .L.str.3, 3 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "%i" .size .L.str.5, 3 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "%lf" .size .L.str.6, 4 .type .L.str.7,@object # @.str.7 .L.str.7: .asciz "%i %i %i" .size .L.str.7, 9 .type .L.str.8,@object # @.str.8 .L.str.8: .asciz "setparams: Internal error: invalid class %c\n" .size .L.str.8, 45 .type .L.str.10,@object # @.str.10 .L.str.10: .asciz " Size: %4dx%4dx%4d\n" .size .L.str.10, 20 .type .L.str.11,@object # @.str.11 .L.str.11: .asciz " Iterations: %4d dt_d: %10.6F\n" .size .L.str.11, 34 .type _ZL17initialize_kernelPdiii,@object # @_ZL17initialize_kernelPdiii .section .rodata,"a",@progbits .p2align 3, 0x0 _ZL17initialize_kernelPdiii: .quad _ZL32__device_stub__initialize_kernelPdiii .size _ZL17initialize_kernelPdiii, 8 .type .L.str.13,@object # @.str.13 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.13: .asciz "time: " .size .L.str.13, 7 .type .L.str.14,@object # @.str.14 .L.str.14: .asciz "kernel: " .size .L.str.14, 9 .type .L.str.15,@object # @.str.15 .L.str.15: .asciz "%s in %s at line %d\n" .size .L.str.15, 21 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_ZL21exact_rhs_kernel_initPdiii" .size .L__unnamed_1, 32 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_ZL18exact_rhs_kernel_xPdiii" .size .L__unnamed_2, 29 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "_ZL18exact_rhs_kernel_yPdiii" .size .L__unnamed_3, 29 .type .L__unnamed_4,@object # @3 .L__unnamed_4: .asciz "_ZL18exact_rhs_kernel_zPdiii" .size .L__unnamed_4, 29 .type .L__unnamed_5,@object # @4 .L__unnamed_5: .asciz "_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii" .size .L__unnamed_5, 45 .type .L__unnamed_6,@object # @5 .L__unnamed_6: .asciz "_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii" .size .L__unnamed_6, 47 .type .L__unnamed_7,@object # @6 .L__unnamed_7: .asciz "_ZL13txinvr_kernelPdS_S_S_S_S_S_iii" .size .L__unnamed_7, 36 .type .L__unnamed_8,@object # @7 .L__unnamed_8: .asciz "_ZL14x_solve_kernelPdS_S_S_S_S_iii" .size .L__unnamed_8, 35 .type .L__unnamed_9,@object # @8 .L__unnamed_9: .asciz "_ZL14y_solve_kernelPdS_S_S_S_S_iii" .size .L__unnamed_9, 35 .type .L__unnamed_10,@object # @9 .L__unnamed_10: .asciz "_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii" .size .L__unnamed_10, 43 .type .L__unnamed_11,@object # @10 .L__unnamed_11: .asciz "_ZL10add_kernelPdS_iii" .size .L__unnamed_11, 23 .type .L__unnamed_12,@object # @11 .L__unnamed_12: .asciz "_ZL17initialize_kernelPdiii" .size .L__unnamed_12, 28 .type .L__unnamed_13,@object # @12 .L__unnamed_13: .asciz "tx1" .size .L__unnamed_13, 4 .type .L__unnamed_14,@object # @13 .L__unnamed_14: .asciz "tx2" .size .L__unnamed_14, 4 .type .L__unnamed_15,@object # @14 .L__unnamed_15: .asciz "tx3" .size .L__unnamed_15, 4 .type .L__unnamed_16,@object # @15 .L__unnamed_16: .asciz "ty1" .size .L__unnamed_16, 4 .type .L__unnamed_17,@object # @16 .L__unnamed_17: .asciz "ty2" .size .L__unnamed_17, 4 .type .L__unnamed_18,@object # @17 .L__unnamed_18: .asciz "ty3" .size .L__unnamed_18, 4 .type .L__unnamed_19,@object # @18 .L__unnamed_19: .asciz "tz1" .size .L__unnamed_19, 4 .type .L__unnamed_20,@object # @19 .L__unnamed_20: .asciz "tz2" .size .L__unnamed_20, 4 .type .L__unnamed_21,@object # @20 .L__unnamed_21: .asciz "tz3" .size .L__unnamed_21, 4 .type .L__unnamed_22,@object # @21 .L__unnamed_22: .asciz "bt" .size .L__unnamed_22, 3 .type .L__unnamed_23,@object # @22 .L__unnamed_23: .asciz "dt" .size .L__unnamed_23, 3 .type .L__unnamed_24,@object # @23 .L__unnamed_24: .asciz "dtdssp" .size .L__unnamed_24, 7 .type .L__unnamed_25,@object # @24 .L__unnamed_25: .asciz "dnxm1" .size .L__unnamed_25, 6 .type .L__unnamed_26,@object # @25 .L__unnamed_26: .asciz "dnym1" .size .L__unnamed_26, 6 .type .L__unnamed_27,@object # @26 .L__unnamed_27: .asciz "dnzm1" .size .L__unnamed_27, 6 .type .L__unnamed_28,@object # @27 .L__unnamed_28: .asciz "dtx1" .size .L__unnamed_28, 5 .type .L__unnamed_29,@object # @28 .L__unnamed_29: .asciz "dttx2" .size .L__unnamed_29, 6 .type .L__unnamed_30,@object # @29 .L__unnamed_30: .asciz "dty1" .size .L__unnamed_30, 5 .type .L__unnamed_31,@object # @30 .L__unnamed_31: .asciz "dtty2" .size .L__unnamed_31, 6 .type .L__unnamed_32,@object # @31 .L__unnamed_32: .asciz "dtz1" .size .L__unnamed_32, 5 .type .L__unnamed_33,@object # @32 .L__unnamed_33: .asciz "dttz2" .size .L__unnamed_33, 6 .type .L__unnamed_34,@object # @33 .L__unnamed_34: .asciz "c2dttx1" .size .L__unnamed_34, 8 .type .L__unnamed_35,@object # @34 .L__unnamed_35: .asciz "c2dtty1" .size .L__unnamed_35, 8 .type .L__unnamed_36,@object # @35 .L__unnamed_36: .asciz "c2dttz1" .size .L__unnamed_36, 8 .type .L__unnamed_37,@object # @36 .L__unnamed_37: .asciz "comz1" .size .L__unnamed_37, 6 .type .L__unnamed_38,@object # @37 .L__unnamed_38: .asciz "comz4" .size .L__unnamed_38, 6 .type .L__unnamed_39,@object # @38 .L__unnamed_39: .asciz "comz5" .size .L__unnamed_39, 6 .type .L__unnamed_40,@object # @39 .L__unnamed_40: .asciz "comz6" .size .L__unnamed_40, 6 .type .L__unnamed_41,@object # @40 .L__unnamed_41: .asciz "c3c4tx3" .size .L__unnamed_41, 8 .type .L__unnamed_42,@object # @41 .L__unnamed_42: .asciz "c3c4ty3" .size .L__unnamed_42, 8 .type .L__unnamed_43,@object # @42 .L__unnamed_43: .asciz "c3c4tz3" .size .L__unnamed_43, 8 .type .L__unnamed_44,@object # @43 .L__unnamed_44: .asciz "xxcon1" .size .L__unnamed_44, 7 .type .L__unnamed_45,@object # @44 .L__unnamed_45: .asciz "xxcon2" .size .L__unnamed_45, 7 .type .L__unnamed_46,@object # @45 .L__unnamed_46: .asciz "xxcon3" .size .L__unnamed_46, 7 .type .L__unnamed_47,@object # @46 .L__unnamed_47: .asciz "xxcon4" .size .L__unnamed_47, 7 .type .L__unnamed_48,@object # @47 .L__unnamed_48: .asciz "xxcon5" .size .L__unnamed_48, 7 .type .L__unnamed_49,@object # @48 .L__unnamed_49: .asciz "dx1tx1" .size .L__unnamed_49, 7 .type .L__unnamed_50,@object # @49 .L__unnamed_50: .asciz "dx2tx1" .size .L__unnamed_50, 7 .type .L__unnamed_51,@object # @50 .L__unnamed_51: .asciz "dx3tx1" .size .L__unnamed_51, 7 .type .L__unnamed_52,@object # @51 .L__unnamed_52: .asciz "dx4tx1" .size .L__unnamed_52, 7 .type .L__unnamed_53,@object # @52 .L__unnamed_53: .asciz "dx5tx1" .size .L__unnamed_53, 7 .type .L__unnamed_54,@object # @53 .L__unnamed_54: .asciz "yycon1" .size .L__unnamed_54, 7 .type .L__unnamed_55,@object # @54 .L__unnamed_55: .asciz "yycon2" .size .L__unnamed_55, 7 .type .L__unnamed_56,@object # @55 .L__unnamed_56: .asciz "yycon3" .size .L__unnamed_56, 7 .type .L__unnamed_57,@object # @56 .L__unnamed_57: .asciz "yycon4" .size .L__unnamed_57, 7 .type .L__unnamed_58,@object # @57 .L__unnamed_58: .asciz "yycon5" .size .L__unnamed_58, 7 .type .L__unnamed_59,@object # @58 .L__unnamed_59: .asciz "dy1ty1" .size .L__unnamed_59, 7 .type .L__unnamed_60,@object # @59 .L__unnamed_60: .asciz "dy2ty1" .size .L__unnamed_60, 7 .type .L__unnamed_61,@object # @60 .L__unnamed_61: .asciz "dy3ty1" .size .L__unnamed_61, 7 .type .L__unnamed_62,@object # @61 .L__unnamed_62: .asciz "dy4ty1" .size .L__unnamed_62, 7 .type .L__unnamed_63,@object # @62 .L__unnamed_63: .asciz "dy5ty1" .size .L__unnamed_63, 7 .type .L__unnamed_64,@object # @63 .L__unnamed_64: .asciz "zzcon1" .size .L__unnamed_64, 7 .type .L__unnamed_65,@object # @64 .L__unnamed_65: .asciz "zzcon2" .size .L__unnamed_65, 7 .type .L__unnamed_66,@object # @65 .L__unnamed_66: .asciz "zzcon3" .size .L__unnamed_66, 7 .type .L__unnamed_67,@object # @66 .L__unnamed_67: .asciz "zzcon4" .size .L__unnamed_67, 7 .type .L__unnamed_68,@object # @67 .L__unnamed_68: .asciz "zzcon5" .size .L__unnamed_68, 7 .type .L__unnamed_69,@object # @68 .L__unnamed_69: .asciz "dz1tz1" .size .L__unnamed_69, 7 .type .L__unnamed_70,@object # @69 .L__unnamed_70: .asciz "dz2tz1" .size .L__unnamed_70, 7 .type .L__unnamed_71,@object # @70 .L__unnamed_71: .asciz "dz3tz1" .size .L__unnamed_71, 7 .type .L__unnamed_72,@object # @71 .L__unnamed_72: .asciz "dz4tz1" .size .L__unnamed_72, 7 .type .L__unnamed_73,@object # @72 .L__unnamed_73: .asciz "dz5tz1" .size .L__unnamed_73, 7 .type .L__unnamed_74,@object # @73 .L__unnamed_74: .asciz "ce" .size .L__unnamed_74, 3 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz " Reading from input file inputsp.data" .size .Lstr, 38 .type .Lstr.1,@object # @str.1 .Lstr.1: .asciz "\n\n NAS Parallel Benchmarks (NPB3.3-CUDA) - SP Benchmark\n" .size .Lstr.1, 57 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _ZL36__device_stub__exact_rhs_kernel_initPdiii .addrsig_sym _ZL33__device_stub__exact_rhs_kernel_xPdiii .addrsig_sym _ZL33__device_stub__exact_rhs_kernel_yPdiii .addrsig_sym _ZL33__device_stub__exact_rhs_kernel_zPdiii .addrsig_sym _ZL35__device_stub__compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .addrsig_sym _ZL35__device_stub__compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .addrsig_sym _ZL28__device_stub__txinvr_kernelPdS_S_S_S_S_S_iii .addrsig_sym _ZL29__device_stub__x_solve_kernelPdS_S_S_S_S_iii .addrsig_sym _ZL29__device_stub__y_solve_kernelPdS_S_S_S_S_iii .addrsig_sym _ZL29__device_stub__z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .addrsig_sym _ZL25__device_stub__add_kernelPdS_iii .addrsig_sym _ZL32__device_stub__initialize_kernelPdiii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym tx1 .addrsig_sym tx2 .addrsig_sym tx3 .addrsig_sym ty1 .addrsig_sym ty2 .addrsig_sym ty3 .addrsig_sym tz1 .addrsig_sym tz2 .addrsig_sym tz3 .addrsig_sym bt .addrsig_sym dt .addrsig_sym dtdssp .addrsig_sym dnxm1 .addrsig_sym dnym1 .addrsig_sym dnzm1 .addrsig_sym dtx1 .addrsig_sym dttx2 .addrsig_sym dty1 .addrsig_sym dtty2 .addrsig_sym dtz1 .addrsig_sym dttz2 .addrsig_sym c2dttx1 .addrsig_sym c2dtty1 .addrsig_sym c2dttz1 .addrsig_sym comz1 .addrsig_sym comz4 .addrsig_sym comz5 .addrsig_sym comz6 .addrsig_sym c3c4tx3 .addrsig_sym c3c4ty3 .addrsig_sym c3c4tz3 .addrsig_sym xxcon1 .addrsig_sym xxcon2 .addrsig_sym xxcon3 .addrsig_sym xxcon4 .addrsig_sym xxcon5 .addrsig_sym dx1tx1 .addrsig_sym dx2tx1 .addrsig_sym dx3tx1 .addrsig_sym dx4tx1 .addrsig_sym dx5tx1 .addrsig_sym yycon1 .addrsig_sym yycon2 .addrsig_sym yycon3 .addrsig_sym yycon4 .addrsig_sym yycon5 .addrsig_sym dy1ty1 .addrsig_sym dy2ty1 .addrsig_sym dy3ty1 .addrsig_sym dy4ty1 .addrsig_sym dy5ty1 .addrsig_sym zzcon1 .addrsig_sym zzcon2 .addrsig_sym zzcon3 .addrsig_sym zzcon4 .addrsig_sym zzcon5 .addrsig_sym dz1tz1 .addrsig_sym dz2tz1 .addrsig_sym dz3tz1 .addrsig_sym dz4tz1 .addrsig_sym dz5tz1 .addrsig_sym ce .addrsig_sym _ZL21exact_rhs_kernel_initPdiii .addrsig_sym _ZL18exact_rhs_kernel_xPdiii .addrsig_sym _ZL18exact_rhs_kernel_yPdiii .addrsig_sym _ZL18exact_rhs_kernel_zPdiii .addrsig_sym _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .addrsig_sym _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .addrsig_sym _ZL13txinvr_kernelPdS_S_S_S_S_S_iii .addrsig_sym _ZL14x_solve_kernelPdS_S_S_S_S_iii .addrsig_sym _ZL14y_solve_kernelPdS_S_S_S_S_iii .addrsig_sym _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .addrsig_sym _ZL10add_kernelPdS_iii .addrsig_sym _ZL17initialize_kernelPdiii .addrsig_sym _ZSt4cout .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .section .text._ZL21exact_rhs_kernel_initPdiii,"axG",@progbits,_ZL21exact_rhs_kernel_initPdiii,comdat .globl _ZL21exact_rhs_kernel_initPdiii ; -- Begin function _ZL21exact_rhs_kernel_initPdiii .p2align 8 .type _ZL21exact_rhs_kernel_initPdiii,@function _ZL21exact_rhs_kernel_initPdiii: ; @_ZL21exact_rhs_kernel_initPdiii ; %bb.0: s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x8 s_load_b64 s[0:1], s[0:1], 0x0 v_mov_b32_e32 v3, 0 s_mov_b32 s3, 5 s_waitcnt lgkmcnt(0) s_mul_i32 s15, s15, s5 s_mul_i32 s2, s6, s5 s_add_i32 s14, s14, s15 s_mul_i32 s2, s2, s4 v_mad_u64_u32 v[1:2], null, s4, s14, v[0:1] .LBB0_1: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_ashrrev_i32_e32 v2, 31, v1 v_mov_b32_e32 v4, v3 s_add_i32 s3, s3, -1 s_cmp_lg_u32 s3, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[5:6], 3, v[1:2] v_add_nc_u32_e32 v1, s2, v1 v_add_co_u32 v5, vcc_lo, s0, v5 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo global_store_b64 v[5:6], v[3:4], off s_cbranch_scc1 .LBB0_1 ; %bb.2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL21exact_rhs_kernel_initPdiii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 20 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL21exact_rhs_kernel_initPdiii,"axG",@progbits,_ZL21exact_rhs_kernel_initPdiii,comdat .Lfunc_end0: .size _ZL21exact_rhs_kernel_initPdiii, .Lfunc_end0-_ZL21exact_rhs_kernel_initPdiii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 132 ; NumSgprs: 18 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZL18exact_rhs_kernel_xPdiii,"axG",@progbits,_ZL18exact_rhs_kernel_xPdiii,comdat .globl _ZL18exact_rhs_kernel_xPdiii ; -- Begin function _ZL18exact_rhs_kernel_xPdiii .p2align 8 .type _ZL18exact_rhs_kernel_xPdiii,@function _ZL18exact_rhs_kernel_xPdiii: ; @_ZL18exact_rhs_kernel_xPdiii ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x24 s_load_b128 s[8:11], s[0:1], 0x8 v_and_b32_e32 v1, 0x3ff, v0 v_bfe_u32 v30, v0, 10, 10 s_waitcnt lgkmcnt(0) s_and_b32 s3, s2, 0xffff s_lshr_b32 s2, s2, 16 s_mul_i32 s14, s14, s3 s_mul_i32 s11, s15, s2 v_add3_u32 v31, v1, s14, 1 v_add3_u32 v0, v30, s11, 1 s_add_i32 s2, s10, -1 s_add_i32 s3, s9, -1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s2, v31 v_cmp_gt_i32_e64 s2, s3, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB1_50 ; %bb.1: v_cvt_f64_i32_e32 v[1:2], v31 v_cvt_f64_i32_e32 v[3:4], v0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, dnzm1@rel32@lo+4 s_addc_u32 s3, s3, dnzm1@rel32@hi+12 s_getpc_b64 s[4:5] s_add_u32 s4, s4, dnym1@rel32@lo+4 s_addc_u32 s5, s5, dnym1@rel32@hi+12 s_load_b64 s[2:3], s[2:3], 0x0 s_load_b64 s[4:5], s[4:5], 0x0 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 v_or_b32_e64 v32, 0xe0, 8 s_mov_b32 s17, 0 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $vgpr28_vgpr29 s_waitcnt lgkmcnt(0) v_mul_f64 v[18:19], s[2:3], v[1:2] v_mul_f64 v[20:21], s[4:5], v[3:4] s_getpc_b64 s[2:3] s_add_u32 s2, s2, dnxm1@rel32@lo+4 s_addc_u32 s3, s3, dnxm1@rel32@hi+12 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 s_add_i32 s33, 16, 40 s_load_b64 s[6:7], s[2:3], 0x0 ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13 ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13 s_mov_b32 s16, s33 ; implicit-def: $vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17 ; implicit-def: $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; implicit-def: $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 .LBB1_2: ; =>This Loop Header: Depth=1 ; Child Loop BB1_3 Depth 2 ; Child Loop BB1_5 Depth 2 ; Child Loop BB1_7 Depth 2 s_waitcnt lgkmcnt(0) v_mul_f64 v[24:25], s[6:7], v[22:23] s_mov_b64 s[14:15], 0 s_getpc_b64 s[12:13] s_add_u32 s12, s12, ce@rel32@lo+4 s_addc_u32 s13, s13, ce@rel32@hi+12 .LBB1_3: ; Parent Loop BB1_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x7 s_load_b64 s[2:3], s[12:13], 0x118 s_load_b64 s[4:5], s[12:13], 0x190 s_load_b64 s[18:19], s[12:13], 0xa0 s_load_b64 s[20:21], s[12:13], 0xc8 s_load_b64 s[22:23], s[12:13], 0x140 s_load_b64 s[24:25], s[12:13], 0x1b8 s_load_b64 s[26:27], s[12:13], 0xf0 s_load_b64 s[28:29], s[12:13], 0x168 s_cmp_eq_u32 s14, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s14, 3 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[33:34], v[24:25], s[4:5], s[2:3] v_fma_f64 v[35:36], v[20:21], s[24:25], s[22:23] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[33:34], v[24:25], v[33:34], s[18:19] s_clause 0x4 s_load_b64 s[2:3], s[12:13], 0x1e0 s_load_b64 s[4:5], s[12:13], 0x28 s_load_b64 s[18:19], s[12:13], 0x0 s_load_b64 s[22:23], s[12:13], 0x50 s_load_b64 s[24:25], s[12:13], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[35:36], v[20:21], v[35:36], s[20:21] s_waitcnt lgkmcnt(0) v_fma_f64 v[37:38], v[18:19], s[2:3], s[28:29] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s14, 2 s_cselect_b32 s3, -1, 0 s_cmp_eq_u32 s14, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[33:34], v[24:25], v[33:34], s[4:5] s_cselect_b32 s4, -1, 0 s_cmp_eq_u32 s14, 0 s_cselect_b32 s5, -1, 0 v_fma_f64 v[35:36], v[20:21], v[35:36], s[22:23] s_add_u32 s14, s14, 1 s_addc_u32 s15, s15, 0 s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[37:38], v[18:19], v[37:38], s[26:27] v_fma_f64 v[33:34], v[24:25], v[33:34], s[18:19] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[37:38], v[18:19], v[37:38], s[24:25] v_fma_f64 v[33:34], v[20:21], v[35:36], v[33:34] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[33:34], v[18:19], v[37:38], v[33:34] v_dual_cndmask_b32 v9, v9, v34 :: v_dual_cndmask_b32 v8, v8, v33 v_cndmask_b32_e64 v7, v7, v34, s2 v_cndmask_b32_e64 v6, v6, v33, s2 v_cndmask_b32_e64 v5, v5, v34, s3 v_cndmask_b32_e64 v4, v4, v33, s3 v_cndmask_b32_e64 v3, v3, v34, s4 v_cndmask_b32_e64 v2, v2, v33, s4 v_cndmask_b32_e64 v1, v1, v34, s5 v_cndmask_b32_e64 v0, v0, v33, s5 s_cbranch_scc1 .LBB1_3 ; %bb.4: ; %_ZL21exact_solution_kerneldddPd.exit.preheader ; in Loop: Header=BB1_2 Depth=1 s_mov_b64 s[2:3], 0 s_mov_b32 s4, s16 .LBB1_5: ; %_ZL21exact_solution_kerneldddPd.exit ; Parent Loop BB1_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s2, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v24, v1, v3 :: v_dual_cndmask_b32 v25, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v24, v24, v5 :: v_dual_cndmask_b32 v25, v25, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 4 v_dual_cndmask_b32 v24, v24, v7 :: v_dual_cndmask_b32 v33, v25, v6 s_cselect_b32 vcc_lo, -1, 0 s_delay_alu instid0(VALU_DEP_1) v_dual_cndmask_b32 v25, v24, v9 :: v_dual_cndmask_b32 v24, v33, v8 scratch_store_b64 off, v[24:25], s4 s_add_i32 s4, s4, 8 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 s_cbranch_scc1 .LBB1_5 ; %bb.6: ; in Loop: Header=BB1_2 Depth=1 v_div_scale_f64 v[24:25], null, v[0:1], v[0:1], 1.0 s_mov_b64 s[2:3], 1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[33:34], v[24:25] s_waitcnt_depctr 0xfff v_fma_f64 v[35:36], -v[24:25], v[33:34], 1.0 v_fma_f64 v[33:34], v[33:34], v[35:36], v[33:34] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[35:36], -v[24:25], v[33:34], 1.0 v_fma_f64 v[33:34], v[33:34], v[35:36], v[33:34] v_div_scale_f64 v[35:36], vcc_lo, 1.0, v[0:1], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[37:38], v[35:36], v[33:34] v_fma_f64 v[24:25], -v[24:25], v[37:38], v[35:36] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[24:25], v[24:25], v[33:34], v[37:38] v_mov_b32_e32 v33, v32 v_div_fixup_f64 v[24:25], v[24:25], v[0:1], 1.0 .LBB1_7: ; Parent Loop BB1_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s2, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v34, v1, v3 :: v_dual_cndmask_b32 v35, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v34, v34, v5 :: v_dual_cndmask_b32 v35, v35, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 4 v_cndmask_b32_e32 v34, v34, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v36, v35, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 v_dual_cndmask_b32 v35, v34, v9 :: v_dual_cndmask_b32 v34, v36, v8 s_cmp_lg_u32 s2, 5 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[34:35], v[24:25], v[34:35] scratch_store_b64 v33, v[34:35], off v_add_nc_u32_e32 v33, 8, v33 s_cbranch_scc1 .LBB1_7 ; %bb.8: ; in Loop: Header=BB1_2 Depth=1 s_mul_i32 s5, s17, 40 s_add_i32 s4, s17, 1 s_add_i32 s12, s5, 0xe0 s_cmp_eq_u32 s17, 2 s_clause 0x1 scratch_load_b128 v[33:36], off, s12 offset:8 scratch_load_b64 v[24:25], off, s12 offset:24 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s17, 1 v_add_f64 v[22:23], v[22:23], 1.0 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s17, 0 v_add_nc_u32_e32 v32, 40, v32 s_cselect_b32 s3, -1, 0 s_add_i32 s5, s5, 16 s_clause 0x1 scratch_load_b128 v[37:40], off, s5 offset:48 scratch_load_b64 v[43:44], off, s5 offset:64 s_add_i32 s16, s16, 40 s_cmp_eq_u32 s4, 3 s_waitcnt vmcnt(3) v_mul_f64 v[41:42], v[33:34], v[33:34] s_waitcnt vmcnt(1) v_mul_f64 v[39:40], v[35:36], v[39:40] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[35:36], v[35:36], v[35:36], v[41:42] v_dual_cndmask_b32 v15, v15, v42 :: v_dual_cndmask_b32 v14, v14, v41 v_cndmask_b32_e64 v13, v13, v42, s2 v_cndmask_b32_e64 v12, v12, v41, s2 v_cndmask_b32_e64 v27, v27, v42, s3 v_cndmask_b32_e64 v26, v26, v41, s3 v_fma_f64 v[33:34], v[33:34], v[37:38], v[39:40] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[33:34], v[24:25], v[43:44], v[33:34] v_fma_f64 v[24:25], v[24:25], v[24:25], v[35:36] v_mul_f64 v[33:34], v[33:34], 0.5 scratch_store_b64 off, v[24:25], s12 v_dual_cndmask_b32 v17, v17, v34 :: v_dual_cndmask_b32 v16, v16, v33 v_cndmask_b32_e64 v11, v11, v34, s2 v_cndmask_b32_e64 v10, v10, v33, s2 v_cndmask_b32_e64 v29, v29, v34, s3 v_cndmask_b32_e64 v28, v28, v33, s3 s_cbranch_scc1 .LBB1_10 ; %bb.9: ; in Loop: Header=BB1_2 Depth=1 s_mov_b32 s17, s4 s_branch .LBB1_2 .LBB1_10: ; %.preheader193 s_cmp_lt_i32 s8, 3 s_cbranch_scc1 .LBB1_50 ; %bb.11: ; %.lr.ph s_getpc_b64 s[2:3] s_add_u32 s2, s2, xxcon3@rel32@lo+4 s_addc_u32 s3, s3, xxcon3@rel32@hi+12 v_mul_lo_u32 v24, s9, v31 s_load_b64 s[2:3], s[2:3], 0x0 s_getpc_b64 s[12:13] s_add_u32 s12, s12, tx2@rel32@lo+4 s_addc_u32 s13, s13, tx2@rel32@hi+12 s_load_b64 s[4:5], s[0:1], 0x0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, dx1tx1@rel32@lo+4 s_addc_u32 s1, s1, dx1tx1@rel32@hi+12 s_movk_i32 s14, 0x80 s_mov_b32 s40, 16 v_add_nc_u32_e64 v34, s14, 16 v_add3_u32 v30, v30, v24, s11 s_load_b64 s[14:15], s[0:1], 0x0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, xxcon1@rel32@lo+4 s_addc_u32 s1, s1, xxcon1@rel32@hi+12 s_getpc_b64 s[18:19] s_add_u32 s18, s18, dx2tx1@rel32@lo+4 s_addc_u32 s19, s19, dx2tx1@rel32@hi+12 s_getpc_b64 s[20:21] s_add_u32 s20, s20, xxcon2@rel32@lo+4 s_addc_u32 s21, s21, xxcon2@rel32@hi+12 v_mad_u64_u32 v[24:25], null, s8, v30, s[8:9] v_mov_b32_e32 v22, 0xe0 s_addk_i32 s40, 0x50 s_load_b64 s[16:17], s[0:1], 0x0 s_load_b64 s[18:19], s[18:19], 0x0 s_load_b64 s[20:21], s[20:21], 0x0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, dx3tx1@rel32@lo+4 s_addc_u32 s1, s1, dx3tx1@rel32@hi+12 s_load_b64 s[12:13], s[12:13], 0x0 s_mul_i32 s52, s10, s9 v_dual_mov_b32 v32, 16 :: v_dual_add_nc_u32 v37, 1, v24 v_add_nc_u32_e32 v35, 0x58, v22 s_waitcnt lgkmcnt(0) v_mul_f64 v[22:23], s[2:3], 0.5 s_getpc_b64 s[2:3] s_add_u32 s2, s2, dx4tx1@rel32@lo+4 s_addc_u32 s3, s3, dx4tx1@rel32@hi+12 s_getpc_b64 s[26:27] s_add_u32 s26, s26, xxcon4@rel32@lo+4 s_addc_u32 s27, s27, xxcon4@rel32@hi+12 s_getpc_b64 s[28:29] s_add_u32 s28, s28, xxcon5@rel32@lo+4 s_addc_u32 s29, s29, xxcon5@rel32@hi+12 s_getpc_b64 s[30:31] s_add_u32 s30, s30, dx5tx1@rel32@lo+4 s_addc_u32 s31, s31, dx5tx1@rel32@hi+12 s_load_b64 s[22:23], s[0:1], 0x0 s_load_b64 s[24:25], s[2:3], 0x0 s_load_b64 s[26:27], s[26:27], 0x0 s_load_b64 s[28:29], s[28:29], 0x0 s_load_b64 s[30:31], s[30:31], 0x0 s_add_i32 s41, s8, -3 s_add_i32 s42, s8, -2 s_add_u32 s43, s4, 16 s_addc_u32 s44, s5, 0 s_movk_i32 s0, 0xa0 s_add_u32 s45, s4, 8 s_addc_u32 s46, s5, 0 s_ashr_i32 s47, s8, 31 v_add_nc_u32_e32 v33, 0x78, v32 v_add_nc_u32_e64 v36, s0, 16 s_add_u32 s49, s4, -16 s_addc_u32 s50, s5, -1 s_add_u32 s51, s4, 0xffffffe8 s_mov_b32 s10, 0x9999999a s_mov_b32 s34, 0x66666666 s_mov_b32 s48, s8 s_mov_b32 s11, 0x3fd99999 s_mov_b32 s35, 0x3ff66666 s_addc_u32 s9, s5, -1 s_mul_i32 s52, s52, s8 s_mov_b32 s53, 1 .LBB1_12: ; =>This Loop Header: Depth=1 ; Child Loop BB1_14 Depth 2 ; Child Loop BB1_16 Depth 2 ; Child Loop BB1_20 Depth 2 ; Child Loop BB1_30 Depth 2 ; Child Loop BB1_34 Depth 2 ; Child Loop BB1_38 Depth 2 ; Child Loop BB1_42 Depth 2 ; Child Loop BB1_44 Depth 2 ; Child Loop BB1_47 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_add_i32 s0, s53, 2 s_cmp_ge_i32 s0, s8 s_cbranch_scc1 .LBB1_17 ; %bb.13: ; in Loop: Header=BB1_12 Depth=1 v_cvt_f64_i32_e32 v[30:31], s0 s_mov_b64 s[38:39], 0 s_getpc_b64 s[36:37] s_add_u32 s36, s36, ce@rel32@lo+4 s_addc_u32 s37, s37, ce@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[30:31], s[6:7], v[30:31] .LBB1_14: ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x7 s_load_b64 s[0:1], s[36:37], 0x118 s_load_b64 s[2:3], s[36:37], 0x190 s_load_b64 s[54:55], s[36:37], 0xa0 s_load_b64 s[56:57], s[36:37], 0xc8 s_load_b64 s[58:59], s[36:37], 0x140 s_load_b64 s[60:61], s[36:37], 0x1b8 s_load_b64 s[62:63], s[36:37], 0xf0 s_load_b64 s[64:65], s[36:37], 0x168 s_cmp_eq_u32 s38, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 3 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[38:39], v[30:31], s[2:3], s[0:1] v_fma_f64 v[40:41], v[20:21], s[60:61], s[58:59] v_fma_f64 v[38:39], v[30:31], v[38:39], s[54:55] s_clause 0x4 s_load_b64 s[0:1], s[36:37], 0x1e0 s_load_b64 s[2:3], s[36:37], 0x28 s_load_b64 s[54:55], s[36:37], 0x0 s_load_b64 s[58:59], s[36:37], 0x50 s_load_b64 s[60:61], s[36:37], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[40:41], v[20:21], v[40:41], s[56:57] s_waitcnt lgkmcnt(0) v_fma_f64 v[42:43], v[18:19], s[0:1], s[64:65] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s38, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[38:39], v[30:31], v[38:39], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s38, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[40:41], v[20:21], v[40:41], s[58:59] s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_add_u32 s36, s36, 8 s_addc_u32 s37, s37, 0 s_cmp_lg_u32 s38, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[42:43], v[18:19], v[42:43], s[62:63] v_fma_f64 v[38:39], v[30:31], v[38:39], s[54:55] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[42:43], v[18:19], v[42:43], s[60:61] v_fma_f64 v[38:39], v[20:21], v[40:41], v[38:39] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[38:39], v[18:19], v[42:43], v[38:39] v_dual_cndmask_b32 v9, v9, v39 :: v_dual_cndmask_b32 v8, v8, v38 v_cndmask_b32_e64 v7, v7, v39, s0 v_cndmask_b32_e64 v6, v6, v38, s0 v_cndmask_b32_e64 v5, v5, v39, s1 v_cndmask_b32_e64 v4, v4, v38, s1 v_cndmask_b32_e64 v3, v3, v39, s2 v_cndmask_b32_e64 v2, v2, v38, s2 v_cndmask_b32_e64 v1, v1, v39, s3 v_cndmask_b32_e64 v0, v0, v38, s3 s_cbranch_scc1 .LBB1_14 ; %bb.15: ; %_ZL21exact_solution_kerneldddPd.exit167.preheader ; in Loop: Header=BB1_12 Depth=1 v_mov_b32_e32 v25, v36 s_mov_b64 s[0:1], 0 .LBB1_16: ; %_ZL21exact_solution_kerneldddPd.exit167 ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s0, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 2 v_dual_cndmask_b32 v30, v1, v3 :: v_dual_cndmask_b32 v31, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v30, v30, v5 :: v_dual_cndmask_b32 v31, v31, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 4 v_cndmask_b32_e32 v30, v30, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e32 v38, v31, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s0, s0, 1 s_addc_u32 s1, s1, 0 v_cndmask_b32_e32 v31, v30, v9, vcc_lo v_cndmask_b32_e32 v30, v38, v8, vcc_lo s_cmp_lg_u32 s0, 5 scratch_store_b64 v25, v[30:31], off v_add_nc_u32_e32 v25, 8, v25 s_cbranch_scc1 .LBB1_16 .LBB1_17: ; %NodeBlock ; in Loop: Header=BB1_12 Depth=1 s_clause 0xf scratch_load_b128 v[0:3], off, off offset:88 scratch_load_b64 v[8:9], off, off offset:168 scratch_load_b128 v[4:7], off, off offset:224 scratch_load_b128 v[38:41], off, off offset:304 scratch_load_b128 v[42:45], off, off offset:256 scratch_load_b128 v[46:49], off, off offset:272 scratch_load_b128 v[50:53], off, off offset:320 scratch_load_b128 v[54:57], off, off offset:72 scratch_load_b128 v[58:61], off, off offset:288 scratch_load_b128 v[62:65], off, off offset:136 scratch_load_b128 v[66:69], off, off offset:56 scratch_load_b64 v[30:31], off, off offset:336 scratch_load_b128 v[70:73], off, off offset:152 scratch_load_b128 v[74:77], off, off offset:104 scratch_load_b128 v[78:81], off, off offset:120 scratch_load_b128 v[82:85], off, off offset:240 v_mul_f64 v[86:87], v[28:29], s[10:11] v_mul_f64 v[88:89], v[16:17], s[10:11] v_fma_f64 v[92:93], v[12:13], -2.0, v[14:15] s_mov_b32 s1, -1 s_mov_b32 s3, 0 s_cmp_lt_i32 s53, 2 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[25:26], v[26:27], v[92:93] s_waitcnt vmcnt(15) v_fma_f64 v[86:87], v[0:1], s[34:35], -v[86:87] s_waitcnt vmcnt(14) v_add_f64 v[90:91], v[8:9], -v[16:17] v_add_f64 v[28:29], v[0:1], -v[28:29] v_fma_f64 v[88:89], v[8:9], s[34:35], -v[88:89] s_waitcnt vmcnt(11) v_fma_f64 v[38:39], v[44:45], -2.0, v[38:39] s_waitcnt vmcnt(10) v_fma_f64 v[44:45], v[46:47], -2.0, v[40:41] s_waitcnt vmcnt(9) v_fma_f64 v[46:47], v[48:49], -2.0, v[50:51] s_waitcnt vmcnt(8) v_mul_f64 v[48:49], v[6:7], v[54:55] s_waitcnt vmcnt(7) v_fma_f64 v[50:51], v[58:59], -2.0, v[52:53] v_mul_f64 v[52:53], v[6:7], v[56:57] s_waitcnt vmcnt(6) v_fma_f64 v[2:3], v[2:3], -2.0, v[62:63] s_waitcnt vmcnt(1) v_fma_f64 v[8:9], v[80:81], -2.0, v[8:9] v_mul_f64 v[86:87], v[6:7], v[86:87] v_mul_f64 v[90:91], v[90:91], s[10:11] v_mul_f64 v[28:29], v[28:29], s[10:11] v_add_f64 v[4:5], v[4:5], v[38:39] v_fma_f64 v[48:49], v[40:41], v[70:71], -v[48:49] v_add_f64 v[2:3], v[66:67], v[2:3] v_add_f64 v[8:9], v[0:1], v[8:9] v_fma_f64 v[86:87], v[40:41], v[88:89], -v[86:87] v_fma_f64 v[58:59], v[64:65], v[40:41], v[90:91] v_fma_f64 v[27:28], v[68:69], v[6:7], v[28:29] v_fma_f64 v[29:30], v[60:61], -2.0, v[30:31] v_fma_f64 v[40:41], v[40:41], v[72:73], -v[52:53] v_fma_f64 v[52:53], v[74:75], -2.0, v[64:65] v_fma_f64 v[60:61], v[78:79], -2.0, v[72:73] v_add_f64 v[6:7], v[6:7], v[44:45] s_waitcnt vmcnt(0) v_add_f64 v[44:45], v[82:83], v[46:47] v_add_f64 v[46:47], v[84:85], v[50:51] v_fma_f64 v[38:39], -s[12:13], v[86:87], 0 v_add_f64 v[27:28], v[58:59], -v[27:28] v_fma_f64 v[58:59], v[76:77], -2.0, v[70:71] v_add_f64 v[29:30], v[42:43], v[29:30] v_fma_f64 v[42:43], -s[12:13], v[48:49], 0 v_fma_f64 v[40:41], -s[12:13], v[40:41], 0 v_add_f64 v[50:51], v[56:57], v[60:61] v_fma_f64 v[4:5], v[22:23], v[4:5], v[38:39] v_add_f64 v[38:39], v[64:65], -v[68:69] v_fma_f64 v[27:28], -s[12:13], v[27:28], 0 v_add_f64 v[48:49], v[54:55], v[58:59] v_fma_f64 v[42:43], s[20:21], v[44:45], v[42:43] s_waitcnt lgkmcnt(0) v_fma_f64 v[4:5], v[25:26], s[26:27], v[4:5] v_fma_f64 v[25:26], -s[12:13], v[38:39], 0 v_add_f64 v[38:39], v[68:69], v[52:53] v_fma_f64 v[6:7], s[16:17], v[6:7], v[27:28] v_fma_f64 v[27:28], s[20:21], v[46:47], v[40:41] v_fma_f64 v[29:30], s[28:29], v[29:30], v[4:5] v_fma_f64 v[0:1], s[14:15], v[2:3], v[25:26] v_fma_f64 v[4:5], s[22:23], v[48:49], v[42:43] v_fma_f64 v[2:3], s[18:19], v[38:39], v[6:7] v_fma_f64 v[6:7], s[24:25], v[50:51], v[27:28] v_fma_f64 v[8:9], s[30:31], v[8:9], v[29:30] s_cbranch_scc1 .LBB1_23 ; %bb.18: ; %LeafBlock452 ; in Loop: Header=BB1_12 Depth=1 s_cmp_eq_u32 s53, 2 s_mov_b32 s0, -1 s_cbranch_scc0 .LBB1_22 ; %bb.19: ; %.preheader190.preheader ; in Loop: Header=BB1_12 Depth=1 v_mov_b32_e32 v25, v24 s_mov_b64 s[36:37], 0 s_mov_b32 s38, s40 .LBB1_20: ; %.preheader190 ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x1 scratch_load_b64 v[26:27], off, s38 offset:-40 scratch_load_b64 v[28:29], off, s38 s_cmp_eq_u32 s36, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s36, 2 v_cndmask_b32_e32 v30, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s36, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v30, v30, v5, s0 s_cmp_eq_u32 s36, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s39, s38, 40 v_cndmask_b32_e64 v40, v30, v7, s1 scratch_load_b64 v[30:31], off, s39 s_add_i32 s39, s38, 0x50 s_add_i32 s38, s38, 8 scratch_load_b64 v[38:39], off, s39 s_add_u32 s36, s36, 1 s_addc_u32 s37, s37, 0 s_cmp_eq_u32 s36, 5 s_waitcnt vmcnt(3) v_mul_f64 v[26:27], v[26:27], -4.0 s_waitcnt vmcnt(2) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[26:27], 0x40180000, v[28:29], v[26:27] v_cndmask_b32_e32 v28, v0, v2, vcc_lo v_cndmask_b32_e64 v29, v40, v9, s2 v_cndmask_b32_e64 v28, v28, v4, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v6, s1 v_cndmask_b32_e64 v28, v28, v8, s2 s_waitcnt vmcnt(1) v_fma_f64 v[26:27], v[30:31], -4.0, v[26:27] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[26:27], v[38:39], v[26:27] v_fma_f64 v[27:28], 0xbfd00000, v[26:27], v[28:29] v_ashrrev_i32_e32 v26, 31, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[29:30], 3, v[25:26] v_add_nc_u32_e32 v25, s52, v25 v_add_co_u32 v29, vcc_lo, s43, v29 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v30, vcc_lo, s44, v30, vcc_lo global_store_b64 v[29:30], v[27:28], off s_cbranch_scc0 .LBB1_20 ; %bb.21: ; %Flow454 ; in Loop: Header=BB1_12 Depth=1 s_mov_b32 s0, 0 .LBB1_22: ; %Flow465 ; in Loop: Header=BB1_12 Depth=1 s_mov_b32 s1, 0 .LBB1_23: ; %Flow464 ; in Loop: Header=BB1_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB1_25 ; %bb.24: ; %LeafBlock ; in Loop: Header=BB1_12 Depth=1 s_cmp_lg_u32 s53, 1 s_mov_b32 s3, -1 s_cselect_b32 s0, -1, 0 .LBB1_25: ; %Flow466 ; in Loop: Header=BB1_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB1_40 ; %bb.26: ; in Loop: Header=BB1_12 Depth=1 s_cmp_gt_u32 s53, 2 s_cselect_b32 s0, -1, 0 s_cmp_lt_i32 s53, s41 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b32 s0, -1 s_cbranch_vccz .LBB1_36 ; %bb.27: ; in Loop: Header=BB1_12 Depth=1 s_cmp_lg_u32 s53, s41 s_cbranch_scc0 .LBB1_32 ; %bb.28: ; in Loop: Header=BB1_12 Depth=1 s_cmp_lg_u32 s53, s42 s_cbranch_scc1 .LBB1_31 ; %bb.29: ; %.preheader186.preheader ; in Loop: Header=BB1_12 Depth=1 v_mov_b32_e32 v25, v24 s_mov_b64 s[36:37], 0 s_mov_b32 s3, s33 .LBB1_30: ; %.preheader186 ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x1 scratch_load_b64 v[26:27], off, s3 offset:-40 scratch_load_b64 v[28:29], off, s3 s_cmp_eq_u32 s36, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s36, 2 v_cndmask_b32_e32 v30, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s36, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v30, v30, v5, s0 s_cmp_eq_u32 s36, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s38, s3, 40 v_cndmask_b32_e64 v38, v30, v7, s1 scratch_load_b64 v[30:31], off, s38 s_add_u32 s36, s36, 1 s_addc_u32 s37, s37, 0 s_add_i32 s3, s3, 8 s_cmp_eq_u32 s36, 5 s_waitcnt vmcnt(1) v_fma_f64 v[26:27], v[28:29], -4.0, v[26:27] v_cndmask_b32_e32 v28, v0, v2, vcc_lo v_cndmask_b32_e64 v29, v38, v9, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v4, s0 v_cndmask_b32_e64 v28, v28, v6, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v8, s2 s_waitcnt vmcnt(0) v_fma_f64 v[26:27], 0x40140000, v[30:31], v[26:27] v_fma_f64 v[26:27], 0xbfd00000, v[26:27], v[28:29] v_ashrrev_i32_e32 v29, 31, v25 v_add_co_u32 v28, vcc_lo, v25, s48 v_add_nc_u32_e32 v25, s52, v25 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v29, vcc_lo, s47, v29, vcc_lo v_lshlrev_b64 v[28:29], 3, v[28:29] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v28, vcc_lo, s49, v28 v_add_co_ci_u32_e32 v29, vcc_lo, s50, v29, vcc_lo global_store_b64 v[28:29], v[26:27], off s_cbranch_scc0 .LBB1_30 .LBB1_31: ; %Flow456 ; in Loop: Header=BB1_12 Depth=1 s_mov_b32 s0, 0 .LBB1_32: ; %Flow458 ; in Loop: Header=BB1_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB1_35 ; %bb.33: ; %.preheader184.preheader ; in Loop: Header=BB1_12 Depth=1 v_dual_mov_b32 v25, v33 :: v_dual_mov_b32 v26, v24 s_mov_b64 s[0:1], 0 .LBB1_34: ; %.preheader184 ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x3 scratch_load_b64 v[27:28], v25, off offset:-120 scratch_load_b64 v[29:30], v25, off offset:-80 scratch_load_b64 v[38:39], v25, off offset:-40 scratch_load_b64 v[40:41], v25, off s_cmp_eq_u32 s0, 1 v_add_nc_u32_e32 v25, 8, v25 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 2 s_waitcnt vmcnt(2) v_fma_f64 v[27:28], v[29:30], -4.0, v[27:28] v_dual_cndmask_b32 v29, v1, v3 :: v_dual_cndmask_b32 v30, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v29, v29, v5 :: v_dual_cndmask_b32 v30, v30, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 4 v_cndmask_b32_e32 v29, v29, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v31, v30, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s0, s0, 1 s_addc_u32 s1, s1, 0 v_dual_cndmask_b32 v30, v29, v9 :: v_dual_cndmask_b32 v29, v31, v8 s_cmp_eq_u32 s0, 5 s_waitcnt vmcnt(1) v_fma_f64 v[27:28], 0x40180000, v[38:39], v[27:28] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[27:28], v[40:41], -4.0, v[27:28] v_fma_f64 v[27:28], 0xbfd00000, v[27:28], v[29:30] v_ashrrev_i32_e32 v30, 31, v26 v_add_co_u32 v29, vcc_lo, v26, s48 v_add_nc_u32_e32 v26, s52, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v30, vcc_lo, s47, v30, vcc_lo v_lshlrev_b64 v[29:30], 3, v[29:30] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v29, vcc_lo, s51, v29 v_add_co_ci_u32_e32 v30, vcc_lo, s9, v30, vcc_lo global_store_b64 v[29:30], v[27:28], off s_cbranch_scc0 .LBB1_34 .LBB1_35: ; %Flow459 ; in Loop: Header=BB1_12 Depth=1 s_mov_b32 s0, 0 .LBB1_36: ; %Flow461 ; in Loop: Header=BB1_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB1_39 ; %bb.37: ; %.preheader.preheader ; in Loop: Header=BB1_12 Depth=1 v_mov_b32_e32 v25, v37 s_mov_b64 s[36:37], 0 s_mov_b32 s3, s40 .LBB1_38: ; %.preheader ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x2 scratch_load_b64 v[26:27], off, s3 offset:-80 scratch_load_b64 v[28:29], off, s3 offset:-40 scratch_load_b64 v[30:31], off, s3 s_cmp_eq_u32 s36, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s36, 2 v_cndmask_b32_e32 v38, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s36, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v38, v38, v5, s0 s_cmp_eq_u32 s36, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s38, s3, 40 v_cndmask_b32_e64 v42, v38, v7, s1 scratch_load_b64 v[38:39], off, s38 s_add_i32 s38, s3, 0x50 s_add_u32 s36, s36, 1 scratch_load_b64 v[40:41], off, s38 s_addc_u32 s37, s37, 0 s_add_i32 s3, s3, 8 s_cmp_eq_u32 s36, 5 s_waitcnt vmcnt(3) v_fma_f64 v[26:27], v[28:29], -4.0, v[26:27] v_cndmask_b32_e32 v28, v0, v2, vcc_lo v_cndmask_b32_e64 v29, v42, v9, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v4, s0 v_cndmask_b32_e64 v28, v28, v6, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v8, s2 s_waitcnt vmcnt(2) v_fma_f64 v[26:27], 0x40180000, v[30:31], v[26:27] s_waitcnt vmcnt(1) v_fma_f64 v[26:27], v[38:39], -4.0, v[26:27] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[26:27], v[40:41], v[26:27] v_fma_f64 v[27:28], 0xbfd00000, v[26:27], v[28:29] v_ashrrev_i32_e32 v26, 31, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[29:30], 3, v[25:26] v_add_nc_u32_e32 v25, s52, v25 v_add_co_u32 v29, vcc_lo, s4, v29 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo global_store_b64 v[29:30], v[27:28], off s_cbranch_scc0 .LBB1_38 .LBB1_39: ; %Flow462 ; in Loop: Header=BB1_12 Depth=1 s_mov_b32 s3, 0 .LBB1_40: ; %Flow467 ; in Loop: Header=BB1_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB1_43 ; %bb.41: ; %.preheader188.preheader ; in Loop: Header=BB1_12 Depth=1 v_mov_b32_e32 v25, v24 s_mov_b64 s[36:37], 0 s_mov_b32 s3, s40 .LBB1_42: ; %.preheader188 ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s36, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s36, 2 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v26, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s36, 3 s_cselect_b32 s1, -1, 0 v_cndmask_b32_e64 v26, v26, v5, s0 s_cmp_eq_u32 s36, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s38, s3, 40 s_delay_alu instid0(VALU_DEP_1) v_cndmask_b32_e64 v38, v26, v7, s1 s_clause 0x1 scratch_load_b64 v[26:27], off, s38 scratch_load_b64 v[28:29], off, s3 s_add_i32 s38, s3, 0x50 s_add_i32 s3, s3, 8 scratch_load_b64 v[30:31], off, s38 s_add_u32 s36, s36, 1 s_addc_u32 s37, s37, 0 s_cmp_eq_u32 s36, 5 s_waitcnt vmcnt(2) v_mul_f64 v[26:27], v[26:27], -4.0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[26:27], 0x40140000, v[28:29], v[26:27] v_cndmask_b32_e32 v28, v0, v2, vcc_lo v_cndmask_b32_e64 v29, v38, v9, s2 v_cndmask_b32_e64 v28, v28, v4, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v6, s1 v_cndmask_b32_e64 v28, v28, v8, s2 s_waitcnt vmcnt(0) v_add_f64 v[26:27], v[30:31], v[26:27] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[27:28], 0xbfd00000, v[26:27], v[28:29] v_ashrrev_i32_e32 v26, 31, v25 v_lshlrev_b64 v[29:30], 3, v[25:26] v_add_nc_u32_e32 v25, s52, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v29, vcc_lo, s45, v29 v_add_co_ci_u32_e32 v30, vcc_lo, s46, v30, vcc_lo global_store_b64 v[29:30], v[27:28], off s_cbranch_scc0 .LBB1_42 .LBB1_43: ; %.loopexit.preheader ; in Loop: Header=BB1_12 Depth=1 s_mov_b32 s0, 0 .LBB1_44: ; %.loopexit ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 v_readfirstlane_b32 s1, v32 v_add_nc_u32_e64 v25, 0xe0, s0 s_add_i32 s37, s0, 0xe0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s1, s1, s0 v_add_nc_u32_e32 v31, 40, v25 s_add_i32 s2, s1, 40 v_add_nc_u32_e32 v42, 0x50, v25 s_add_i32 s3, s1, 0x50 s_add_i32 s36, s1, 0x78 s_addk_i32 s1, 0xa0 s_clause 0x3 scratch_load_b64 v[25:26], off, s2 scratch_load_b64 v[27:28], off, s3 scratch_load_b64 v[29:30], off, s36 scratch_load_b64 v[38:39], off, s1 s_clause 0x1 scratch_load_b64 v[40:41], v31, off scratch_load_b64 v[42:43], v42, off s_add_i32 s1, s0, 16 s_add_i32 s0, s0, 8 s_waitcnt vmcnt(5) scratch_store_b64 off, v[25:26], s1 s_waitcnt vmcnt(4) scratch_store_b64 off, v[27:28], s2 s_waitcnt vmcnt(3) scratch_store_b64 off, v[29:30], s3 s_waitcnt vmcnt(2) scratch_store_b64 off, v[38:39], s36 s_waitcnt vmcnt(1) scratch_store_b64 off, v[40:41], s37 s_waitcnt vmcnt(0) scratch_store_b64 v31, v[42:43], off s_cmp_lg_u32 s0, 40 s_cbranch_scc1 .LBB1_44 ; %bb.45: ; in Loop: Header=BB1_12 Depth=1 v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v27, v13 v_dual_mov_b32 v12, v14 :: v_dual_mov_b32 v13, v15 v_dual_mov_b32 v28, v10 :: v_dual_mov_b32 v29, v11 v_dual_mov_b32 v10, v16 :: v_dual_mov_b32 v11, v17 s_cmp_ge_i32 s53, s42 s_cbranch_scc1 .LBB1_49 ; %bb.46: ; in Loop: Header=BB1_12 Depth=1 scratch_load_b64 v[14:15], off, off offset:136 s_mov_b32 s0, 0 s_waitcnt vmcnt(0) v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[30:31], v[16:17] s_waitcnt_depctr 0xfff v_fma_f64 v[38:39], -v[16:17], v[30:31], 1.0 v_fma_f64 v[30:31], v[30:31], v[38:39], v[30:31] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[38:39], -v[16:17], v[30:31], 1.0 v_fma_f64 v[30:31], v[30:31], v[38:39], v[30:31] v_div_scale_f64 v[38:39], vcc_lo, 1.0, v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[40:41], v[38:39], v[30:31] v_fma_f64 v[16:17], -v[16:17], v[40:41], v[38:39] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[16:17], v[16:17], v[30:31], v[40:41] v_div_fixup_f64 v[14:15], v[16:17], v[14:15], 1.0 .LBB1_47: ; Parent Loop BB1_12 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e32 v16, s0, v34 v_add_nc_u32_e32 v25, s0, v35 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s0, 32 scratch_load_b64 v[16:17], v16, off s_waitcnt vmcnt(0) v_mul_f64 v[16:17], v[14:15], v[16:17] scratch_store_b64 v25, v[16:17], off s_cbranch_scc1 .LBB1_47 ; %bb.48: ; in Loop: Header=BB1_12 Depth=1 s_clause 0x3 scratch_load_b128 v[38:41], off, off offset:144 scratch_load_b128 v[42:45], off, off offset:312 scratch_load_b64 v[16:17], off, off offset:328 scratch_load_b64 v[30:31], off, off offset:160 s_waitcnt vmcnt(2) v_mul_f64 v[40:41], v[44:45], v[40:41] v_mul_f64 v[14:15], v[42:43], v[42:43] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[38:39], v[42:43], v[38:39], v[40:41] v_fma_f64 v[40:41], v[44:45], v[44:45], v[14:15] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[30:31], v[16:17], v[30:31], v[38:39] v_fma_f64 v[38:39], v[16:17], v[16:17], v[40:41] s_delay_alu instid0(VALU_DEP_2) v_mul_f64 v[16:17], v[30:31], 0.5 scratch_store_b64 off, v[38:39], off offset:304 .LBB1_49: ; in Loop: Header=BB1_12 Depth=1 v_add_nc_u32_e32 v37, 1, v37 s_add_i32 s0, s53, 1 s_cmp_lg_u32 s53, s42 s_mov_b32 s53, s0 s_cbranch_scc1 .LBB1_12 .LBB1_50: ; %.loopexit194 s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL18exact_rhs_kernel_xPdiii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 352 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 1 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 94 .amdhsa_next_free_sgpr 66 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL18exact_rhs_kernel_xPdiii,"axG",@progbits,_ZL18exact_rhs_kernel_xPdiii,comdat .Lfunc_end1: .size _ZL18exact_rhs_kernel_xPdiii, .Lfunc_end1-_ZL18exact_rhs_kernel_xPdiii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 5104 ; NumSgprs: 68 ; NumVgprs: 94 ; ScratchSize: 352 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 8 ; VGPRBlocks: 11 ; NumSGPRsForWavesPerEU: 68 ; NumVGPRsForWavesPerEU: 94 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .section .text._ZL18exact_rhs_kernel_yPdiii,"axG",@progbits,_ZL18exact_rhs_kernel_yPdiii,comdat .globl _ZL18exact_rhs_kernel_yPdiii ; -- Begin function _ZL18exact_rhs_kernel_yPdiii .p2align 8 .type _ZL18exact_rhs_kernel_yPdiii,@function _ZL18exact_rhs_kernel_yPdiii: ; @_ZL18exact_rhs_kernel_yPdiii ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x24 s_load_b128 s[8:11], s[0:1], 0x8 v_and_b32_e32 v39, 0x3ff, v0 v_bfe_u32 v29, v0, 10, 10 s_waitcnt lgkmcnt(0) s_and_b32 s3, s2, 0xffff s_lshr_b32 s2, s2, 16 s_mul_i32 s26, s14, s3 s_mul_i32 s11, s15, s2 v_add3_u32 v34, v39, s26, 1 v_add3_u32 v18, v29, s11, 1 s_add_i32 s2, s10, -1 s_add_i32 s3, s8, -1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s2, v34 v_cmp_gt_i32_e64 s2, s3, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB2_50 ; %bb.1: v_cvt_f64_i32_e32 v[0:1], v34 v_cvt_f64_i32_e32 v[2:3], v18 s_getpc_b64 s[2:3] s_add_u32 s2, s2, dnzm1@rel32@lo+4 s_addc_u32 s3, s3, dnzm1@rel32@hi+12 s_getpc_b64 s[4:5] s_add_u32 s4, s4, dnxm1@rel32@lo+4 s_addc_u32 s5, s5, dnxm1@rel32@hi+12 s_load_b64 s[2:3], s[2:3], 0x0 s_load_b64 s[4:5], s[4:5], 0x0 v_mov_b32_e32 v23, 0 v_mov_b32_e32 v24, 0 v_or_b32_e64 v32, 0xe0, 8 s_mov_b32 s17, 0 ; implicit-def: $vgpr25_vgpr26 ; implicit-def: $vgpr27_vgpr28 s_waitcnt lgkmcnt(0) v_mul_f64 v[19:20], s[2:3], v[0:1] v_mul_f64 v[21:22], s[4:5], v[2:3] s_getpc_b64 s[2:3] s_add_u32 s2, s2, dnym1@rel32@lo+4 s_addc_u32 s3, s3, dnym1@rel32@hi+12 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 s_add_i32 s33, 16, 40 s_load_b64 s[6:7], s[2:3], 0x0 ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13 ; implicit-def: $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13 s_mov_b32 s16, s33 ; implicit-def: $vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17 ; implicit-def: $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; implicit-def: $vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 .LBB2_2: ; =>This Loop Header: Depth=1 ; Child Loop BB2_3 Depth 2 ; Child Loop BB2_5 Depth 2 ; Child Loop BB2_7 Depth 2 s_waitcnt lgkmcnt(0) v_mul_f64 v[30:31], s[6:7], v[23:24] s_mov_b64 s[14:15], 0 s_getpc_b64 s[12:13] s_add_u32 s12, s12, ce@rel32@lo+4 s_addc_u32 s13, s13, ce@rel32@hi+12 .LBB2_3: ; Parent Loop BB2_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x7 s_load_b64 s[2:3], s[12:13], 0x118 s_load_b64 s[4:5], s[12:13], 0x190 s_load_b64 s[18:19], s[12:13], 0xa0 s_load_b64 s[20:21], s[12:13], 0xc8 s_load_b64 s[22:23], s[12:13], 0x140 s_load_b64 s[24:25], s[12:13], 0x1b8 s_load_b64 s[28:29], s[12:13], 0xf0 s_load_b64 s[30:31], s[12:13], 0x168 s_cmp_eq_u32 s14, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s14, 3 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[35:36], v[21:22], s[4:5], s[2:3] v_fma_f64 v[37:38], v[30:31], s[24:25], s[22:23] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[35:36], v[21:22], v[35:36], s[18:19] s_clause 0x4 s_load_b64 s[2:3], s[12:13], 0x1e0 s_load_b64 s[4:5], s[12:13], 0x28 s_load_b64 s[18:19], s[12:13], 0x0 s_load_b64 s[22:23], s[12:13], 0x50 s_load_b64 s[24:25], s[12:13], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[37:38], v[30:31], v[37:38], s[20:21] s_waitcnt lgkmcnt(0) v_fma_f64 v[40:41], v[19:20], s[2:3], s[30:31] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s14, 2 s_cselect_b32 s3, -1, 0 s_cmp_eq_u32 s14, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[35:36], v[21:22], v[35:36], s[4:5] s_cselect_b32 s4, -1, 0 s_cmp_eq_u32 s14, 0 s_cselect_b32 s5, -1, 0 v_fma_f64 v[37:38], v[30:31], v[37:38], s[22:23] s_add_u32 s14, s14, 1 s_addc_u32 s15, s15, 0 s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[40:41], v[19:20], v[40:41], s[28:29] v_fma_f64 v[35:36], v[21:22], v[35:36], s[18:19] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[40:41], v[19:20], v[40:41], s[24:25] v_fma_f64 v[35:36], v[30:31], v[37:38], v[35:36] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[35:36], v[19:20], v[40:41], v[35:36] v_dual_cndmask_b32 v9, v9, v36 :: v_dual_cndmask_b32 v8, v8, v35 v_cndmask_b32_e64 v7, v7, v36, s2 v_cndmask_b32_e64 v6, v6, v35, s2 v_cndmask_b32_e64 v5, v5, v36, s3 v_cndmask_b32_e64 v4, v4, v35, s3 v_cndmask_b32_e64 v3, v3, v36, s4 v_cndmask_b32_e64 v2, v2, v35, s4 v_cndmask_b32_e64 v1, v1, v36, s5 v_cndmask_b32_e64 v0, v0, v35, s5 s_cbranch_scc1 .LBB2_3 ; %bb.4: ; %_ZL21exact_solution_kerneldddPd.exit.preheader ; in Loop: Header=BB2_2 Depth=1 s_mov_b64 s[2:3], 0 s_mov_b32 s4, s16 .LBB2_5: ; %_ZL21exact_solution_kerneldddPd.exit ; Parent Loop BB2_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s2, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v30, v1, v3 :: v_dual_cndmask_b32 v31, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v30, v30, v5 :: v_dual_cndmask_b32 v31, v31, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 4 v_dual_cndmask_b32 v30, v30, v7 :: v_dual_cndmask_b32 v33, v31, v6 s_cselect_b32 vcc_lo, -1, 0 s_delay_alu instid0(VALU_DEP_1) v_dual_cndmask_b32 v31, v30, v9 :: v_dual_cndmask_b32 v30, v33, v8 scratch_store_b64 off, v[30:31], s4 s_add_i32 s4, s4, 8 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 s_cbranch_scc1 .LBB2_5 ; %bb.6: ; in Loop: Header=BB2_2 Depth=1 v_div_scale_f64 v[30:31], null, v[0:1], v[0:1], 1.0 v_mov_b32_e32 v33, v32 s_mov_b64 s[2:3], 1 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[35:36], v[30:31] s_waitcnt_depctr 0xfff v_fma_f64 v[37:38], -v[30:31], v[35:36], 1.0 v_fma_f64 v[35:36], v[35:36], v[37:38], v[35:36] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[37:38], -v[30:31], v[35:36], 1.0 v_fma_f64 v[35:36], v[35:36], v[37:38], v[35:36] v_div_scale_f64 v[37:38], vcc_lo, 1.0, v[0:1], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[40:41], v[37:38], v[35:36] v_fma_f64 v[30:31], -v[30:31], v[40:41], v[37:38] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[30:31], v[30:31], v[35:36], v[40:41] v_div_fixup_f64 v[30:31], v[30:31], v[0:1], 1.0 .LBB2_7: ; Parent Loop BB2_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s2, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v35, v1, v3 :: v_dual_cndmask_b32 v36, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v35, v35, v5 :: v_dual_cndmask_b32 v36, v36, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 4 v_cndmask_b32_e32 v35, v35, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v37, v36, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 v_dual_cndmask_b32 v36, v35, v9 :: v_dual_cndmask_b32 v35, v37, v8 s_cmp_lg_u32 s2, 5 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[35:36], v[30:31], v[35:36] scratch_store_b64 v33, v[35:36], off v_add_nc_u32_e32 v33, 8, v33 s_cbranch_scc1 .LBB2_7 ; %bb.8: ; in Loop: Header=BB2_2 Depth=1 s_mul_i32 s5, s17, 40 s_add_i32 s4, s17, 1 s_add_i32 s12, s5, 0xe0 s_cmp_eq_u32 s17, 2 s_clause 0x1 scratch_load_b128 v[35:38], off, s12 offset:8 scratch_load_b64 v[30:31], off, s12 offset:24 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s17, 1 v_add_f64 v[23:24], v[23:24], 1.0 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s17, 0 v_add_nc_u32_e32 v32, 40, v32 s_cselect_b32 s3, -1, 0 s_add_i32 s5, s5, 16 s_clause 0x1 scratch_load_b128 v[40:43], off, s5 offset:48 scratch_load_b64 v[46:47], off, s5 offset:64 s_add_i32 s16, s16, 40 s_cmp_eq_u32 s4, 3 s_waitcnt vmcnt(3) v_mul_f64 v[44:45], v[37:38], v[37:38] s_waitcnt vmcnt(1) v_mul_f64 v[37:38], v[37:38], v[42:43] s_delay_alu instid0(VALU_DEP_2) v_dual_cndmask_b32 v15, v15, v45 :: v_dual_cndmask_b32 v14, v14, v44 v_cndmask_b32_e64 v13, v13, v45, s2 v_cndmask_b32_e64 v12, v12, v44, s2 v_cndmask_b32_e64 v26, v26, v45, s3 v_cndmask_b32_e64 v25, v25, v44, s3 v_fma_f64 v[37:38], v[35:36], v[40:41], v[37:38] v_fma_f64 v[35:36], v[35:36], v[35:36], v[44:45] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[37:38], v[30:31], v[46:47], v[37:38] v_fma_f64 v[30:31], v[30:31], v[30:31], v[35:36] s_delay_alu instid0(VALU_DEP_2) v_mul_f64 v[37:38], v[37:38], 0.5 scratch_store_b64 off, v[30:31], s12 v_dual_cndmask_b32 v17, v17, v38 :: v_dual_cndmask_b32 v16, v16, v37 v_cndmask_b32_e64 v11, v11, v38, s2 v_cndmask_b32_e64 v10, v10, v37, s2 v_cndmask_b32_e64 v28, v28, v38, s3 v_cndmask_b32_e64 v27, v27, v37, s3 s_cbranch_scc1 .LBB2_10 ; %bb.9: ; in Loop: Header=BB2_2 Depth=1 s_mov_b32 s17, s4 s_branch .LBB2_2 .LBB2_10: ; %.preheader228 s_cmp_lt_i32 s9, 3 s_cbranch_scc1 .LBB2_50 ; %bb.11: ; %.lr.ph v_add_nc_u32_e32 v23, s10, v34 v_mul_lo_u32 v32, v34, s9 s_getpc_b64 s[2:3] s_add_u32 s2, s2, ty2@rel32@lo+4 s_addc_u32 s3, s3, ty2@rel32@hi+12 v_add3_u32 v39, v39, s26, 2 s_load_b64 s[4:5], s[0:1], 0x0 v_mul_lo_u32 v34, v23, s9 v_add_nc_u32_e32 v23, s10, v23 s_getpc_b64 s[0:1] s_add_u32 s0, s0, dy1ty1@rel32@lo+4 s_addc_u32 s1, s1, dy1ty1@rel32@hi+12 s_load_b64 s[12:13], s[2:3], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, yycon3@rel32@lo+4 s_addc_u32 s3, s3, yycon3@rel32@hi+12 s_load_b64 s[14:15], s[0:1], 0x0 v_add_nc_u32_e32 v30, s10, v23 s_load_b64 s[0:1], s[2:3], 0x0 v_mul_lo_u32 v40, s9, v39 v_mul_lo_u32 v46, s8, v32 v_dual_mov_b32 v31, 16 :: v_dual_mov_b32 v24, 0xe0 v_mul_lo_u32 v38, v30, s9 v_add_nc_u32_e32 v30, s10, v30 v_mul_lo_u32 v37, v23, s9 s_mov_b32 s40, 16 v_add_nc_u32_e32 v45, -2, v40 v_add_nc_u32_e32 v40, -3, v40 v_mul_lo_u32 v39, v30, s9 v_add_nc_u32_e32 v30, 2, v32 s_addk_i32 s40, 0x50 s_getpc_b64 s[2:3] s_add_u32 s2, s2, yycon2@rel32@lo+4 s_addc_u32 s3, s3, yycon2@rel32@hi+12 s_movk_i32 s16, 0x80 s_getpc_b64 s[18:19] s_add_u32 s18, s18, dy2ty1@rel32@lo+4 s_addc_u32 s19, s19, dy2ty1@rel32@hi+12 v_mad_u64_u32 v[43:44], null, s8, v45, v[29:30] v_mad_u64_u32 v[41:42], null, s8, v30, v[29:30] v_mad_u64_u32 v[44:45], null, s8, v40, v[29:30] v_add3_u32 v29, v46, s8, v29 v_add_nc_u32_e64 v35, s16, 16 s_load_b64 s[16:17], s[2:3], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, yycon1@rel32@lo+4 s_addc_u32 s3, s3, yycon1@rel32@hi+12 s_getpc_b64 s[22:23] s_add_u32 s22, s22, dy3ty1@rel32@lo+4 s_addc_u32 s23, s23, dy3ty1@rel32@hi+12 v_add3_u32 v42, v29, s11, 1 v_add_nc_u32_e32 v36, 0x58, v24 s_waitcnt lgkmcnt(0) v_mul_f64 v[23:24], s[0:1], 0.5 s_getpc_b64 s[24:25] s_add_u32 s24, s24, dy4ty1@rel32@lo+4 s_addc_u32 s25, s25, dy4ty1@rel32@hi+12 s_getpc_b64 s[0:1] s_add_u32 s0, s0, yycon4@rel32@lo+4 s_addc_u32 s1, s1, yycon4@rel32@hi+12 v_mov_b32_e32 v45, v42 s_load_b64 s[20:21], s[2:3], 0x0 s_load_b64 s[22:23], s[22:23], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, yycon5@rel32@lo+4 s_addc_u32 s3, s3, yycon5@rel32@hi+12 s_getpc_b64 s[30:31] s_add_u32 s30, s30, dy5ty1@rel32@lo+4 s_addc_u32 s31, s31, dy5ty1@rel32@hi+12 s_load_b64 s[26:27], s[0:1], 0x0 s_load_b64 s[28:29], s[2:3], 0x0 s_load_b64 s[30:31], s[30:31], 0x0 s_load_b64 s[18:19], s[18:19], 0x0 s_load_b64 s[24:25], s[24:25], 0x0 s_movk_i32 s0, 0xa0 v_add_nc_u32_e32 v33, 0x78, v31 v_add_nc_u32_e64 v40, s0, 16 v_add3_u32 v41, v41, s11, 1 v_add3_u32 v43, v43, s11, 1 v_add3_u32 v44, v44, s11, 1 s_mul_i32 s43, s10, s9 s_mov_b32 s34, 0x9999999a s_mov_b32 s36, 0x66666666 s_add_i32 s41, s9, -3 s_add_i32 s42, s9, -2 s_mov_b32 s35, 0x3fd99999 s_mov_b32 s37, 0x3ff66666 s_mov_b32 s44, 1 s_mul_i32 s43, s43, s8 .LBB2_12: ; =>This Loop Header: Depth=1 ; Child Loop BB2_14 Depth 2 ; Child Loop BB2_16 Depth 2 ; Child Loop BB2_20 Depth 2 ; Child Loop BB2_30 Depth 2 ; Child Loop BB2_34 Depth 2 ; Child Loop BB2_38 Depth 2 ; Child Loop BB2_42 Depth 2 ; Child Loop BB2_44 Depth 2 ; Child Loop BB2_47 Depth 2 s_add_i32 s0, s44, 2 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_ge_i32 s0, s9 s_cbranch_scc1 .LBB2_17 ; %bb.13: ; in Loop: Header=BB2_12 Depth=1 v_cvt_f64_i32_e32 v[29:30], s0 s_mov_b64 s[38:39], 0 s_getpc_b64 s[10:11] s_add_u32 s10, s10, ce@rel32@lo+4 s_addc_u32 s11, s11, ce@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[29:30], s[6:7], v[29:30] .LBB2_14: ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x7 s_load_b64 s[0:1], s[10:11], 0x118 s_load_b64 s[2:3], s[10:11], 0x190 s_load_b64 s[46:47], s[10:11], 0xa0 s_load_b64 s[48:49], s[10:11], 0xc8 s_load_b64 s[50:51], s[10:11], 0x140 s_load_b64 s[52:53], s[10:11], 0x1b8 s_load_b64 s[54:55], s[10:11], 0xf0 s_load_b64 s[56:57], s[10:11], 0x168 s_cmp_eq_u32 s38, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[46:47], v[21:22], s[2:3], s[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[48:49], v[29:30], s[52:53], s[50:51] v_fma_f64 v[46:47], v[21:22], v[46:47], s[46:47] s_clause 0x4 s_load_b64 s[0:1], s[10:11], 0x1e0 s_load_b64 s[2:3], s[10:11], 0x28 s_load_b64 s[46:47], s[10:11], 0x0 s_load_b64 s[50:51], s[10:11], 0x50 s_load_b64 s[52:53], s[10:11], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[48:49], v[29:30], v[48:49], s[48:49] s_waitcnt lgkmcnt(0) v_fma_f64 v[50:51], v[19:20], s[0:1], s[56:57] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s38, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[46:47], v[21:22], v[46:47], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s38, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[48:49], v[29:30], v[48:49], s[50:51] s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s38, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[50:51], v[19:20], v[50:51], s[54:55] v_fma_f64 v[46:47], v[21:22], v[46:47], s[46:47] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[50:51], v[19:20], v[50:51], s[52:53] v_fma_f64 v[46:47], v[29:30], v[48:49], v[46:47] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[46:47], v[19:20], v[50:51], v[46:47] v_dual_cndmask_b32 v9, v9, v47 :: v_dual_cndmask_b32 v8, v8, v46 v_cndmask_b32_e64 v7, v7, v47, s0 v_cndmask_b32_e64 v6, v6, v46, s0 v_cndmask_b32_e64 v5, v5, v47, s1 v_cndmask_b32_e64 v4, v4, v46, s1 v_cndmask_b32_e64 v3, v3, v47, s2 v_cndmask_b32_e64 v2, v2, v46, s2 v_cndmask_b32_e64 v1, v1, v47, s3 v_cndmask_b32_e64 v0, v0, v46, s3 s_cbranch_scc1 .LBB2_14 ; %bb.15: ; %_ZL21exact_solution_kerneldddPd.exit202.preheader ; in Loop: Header=BB2_12 Depth=1 v_mov_b32_e32 v29, v40 s_mov_b64 s[0:1], 0 .LBB2_16: ; %_ZL21exact_solution_kerneldddPd.exit202 ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s0, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 2 v_cndmask_b32_e32 v30, v1, v3, vcc_lo v_cndmask_b32_e32 v46, v0, v2, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v30, v30, v5, vcc_lo v_cndmask_b32_e32 v46, v46, v4, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v30, v30, v7, vcc_lo v_cndmask_b32_e32 v46, v46, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s0, s0, 1 s_addc_u32 s1, s1, 0 v_cndmask_b32_e32 v47, v30, v9, vcc_lo v_cndmask_b32_e32 v46, v46, v8, vcc_lo s_cmp_lg_u32 s0, 5 scratch_store_b64 v29, v[46:47], off v_add_nc_u32_e32 v29, 8, v29 s_cbranch_scc1 .LBB2_16 .LBB2_17: ; %NodeBlock ; in Loop: Header=BB2_12 Depth=1 s_clause 0xe scratch_load_b128 v[0:3], off, off offset:304 scratch_load_b128 v[4:7], off, off offset:272 scratch_load_b128 v[46:49], off, off offset:256 scratch_load_b128 v[50:53], off, off offset:88 scratch_load_b128 v[54:57], off, off offset:320 scratch_load_b64 v[8:9], off, off offset:168 scratch_load_b128 v[58:61], off, off offset:224 scratch_load_b128 v[62:65], off, off offset:240 scratch_load_b128 v[66:69], off, off offset:56 scratch_load_b128 v[70:73], off, off offset:72 scratch_load_b128 v[74:77], off, off offset:288 scratch_load_b64 v[29:30], off, off offset:336 scratch_load_b128 v[78:81], off, off offset:136 scratch_load_b128 v[82:85], off, off offset:152 scratch_load_b128 v[86:89], off, off offset:104 v_mul_f64 v[90:91], v[27:28], s[34:35] v_add_nc_u32_e32 v94, s44, v32 v_add_nc_u32_e32 v96, s44, v38 v_add_nc_u32_e32 v98, s44, v39 s_mov_b32 s1, -1 s_mov_b32 s3, 0 s_cmp_lt_i32 s44, 2 s_mov_b32 s0, 0 s_waitcnt vmcnt(13) v_fma_f64 v[2:3], v[4:5], -2.0, v[2:3] s_waitcnt vmcnt(12) v_fma_f64 v[0:1], v[48:49], -2.0, v[0:1] v_mul_f64 v[4:5], v[16:17], s[34:35] s_waitcnt vmcnt(11) v_fma_f64 v[48:49], v[50:51], s[36:37], -v[90:91] s_waitcnt vmcnt(9) v_add_f64 v[90:91], v[8:9], -v[16:17] v_fma_f64 v[6:7], v[6:7], -2.0, v[54:55] v_add_f64 v[27:28], v[50:51], -v[27:28] s_waitcnt vmcnt(5) v_mul_f64 v[92:93], v[62:63], v[72:73] s_waitcnt vmcnt(4) v_fma_f64 v[56:57], v[74:75], -2.0, v[56:57] s_waitcnt vmcnt(3) v_fma_f64 v[29:30], v[76:77], -2.0, v[29:30] v_mad_u64_u32 v[76:77], null, v94, s8, v[18:19] v_add_nc_u32_e32 v94, s44, v37 s_waitcnt vmcnt(2) v_fma_f64 v[52:53], v[52:53], -2.0, v[78:79] s_waitcnt vmcnt(0) v_fma_f64 v[78:79], v[86:87], -2.0, v[80:81] v_fma_f64 v[86:87], v[88:89], -2.0, v[82:83] v_ashrrev_i32_e32 v77, 31, v76 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[76:77], 3, v[76:77] v_add_co_u32 v76, vcc_lo, s4, v76 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v77, vcc_lo, s5, v77, vcc_lo v_add_f64 v[60:61], v[60:61], v[2:3] v_fma_f64 v[4:5], v[8:9], s[36:37], -v[4:5] v_mul_f64 v[2:3], v[62:63], v[48:49] v_add_f64 v[48:49], v[58:59], v[0:1] v_mul_f64 v[58:59], v[68:69], v[62:63] v_mul_f64 v[90:91], v[90:91], s[34:35] v_mul_f64 v[27:28], v[27:28], s[34:35] v_fma_f64 v[74:75], v[54:55], v[84:85], -v[92:93] v_add_nc_u32_e32 v92, s44, v34 v_add_f64 v[6:7], v[62:63], v[6:7] v_add_f64 v[56:57], v[64:65], v[56:57] v_add_f64 v[29:30], v[46:47], v[29:30] v_fma_f64 v[4:5], v[54:55], v[4:5], -v[2:3] scratch_load_b128 v[0:3], off, off offset:120 v_fma_f64 v[58:59], v[80:81], v[54:55], -v[58:59] v_fma_f64 v[54:55], v[82:83], v[54:55], v[90:91] v_mad_u64_u32 v[90:91], null, v92, s8, v[18:19] v_mad_u64_u32 v[92:93], null, v94, s8, v[18:19] v_mad_u64_u32 v[94:95], null, v96, s8, v[18:19] v_mad_u64_u32 v[96:97], null, v98, s8, v[18:19] s_delay_alu instid0(VALU_DEP_4) v_ashrrev_i32_e32 v91, 31, v90 v_fma_f64 v[27:28], v[70:71], v[62:63], v[27:28] v_ashrrev_i32_e32 v93, 31, v92 v_fma_f64 v[98:99], v[12:13], -2.0, v[14:15] v_ashrrev_i32_e32 v95, 31, v94 v_lshlrev_b64 v[90:91], 3, v[90:91] v_ashrrev_i32_e32 v97, 31, v96 v_lshlrev_b64 v[92:93], 3, v[92:93] v_add_f64 v[82:83], v[82:83], -v[70:71] v_lshlrev_b64 v[94:95], 3, v[94:95] v_add_co_u32 v90, vcc_lo, s4, v90 v_add_co_ci_u32_e32 v91, vcc_lo, s5, v91, vcc_lo v_add_co_u32 v92, vcc_lo, s4, v92 v_lshlrev_b64 v[96:97], 3, v[96:97] v_add_co_ci_u32_e32 v93, vcc_lo, s5, v93, vcc_lo v_add_co_u32 v94, vcc_lo, s4, v94 v_add_co_ci_u32_e32 v95, vcc_lo, s5, v95, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v96, vcc_lo, s4, v96 v_add_co_ci_u32_e32 v97, vcc_lo, s5, v97, vcc_lo global_load_b64 v[80:81], v[96:97], off v_add_f64 v[27:28], v[54:55], -v[27:28] v_add_f64 v[25:26], v[25:26], v[98:99] s_waitcnt vmcnt(1) v_fma_f64 v[0:1], v[0:1], -2.0, v[84:85] v_fma_f64 v[2:3], v[2:3], -2.0, v[8:9] s_waitcnt vmcnt(0) v_fma_f64 v[4:5], -s[12:13], v[4:5], v[80:81] s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[4:5], v[23:24], v[48:49], v[4:5] s_clause 0x3 global_load_b64 v[48:49], v[90:91], off global_load_b64 v[54:55], v[94:95], off global_load_b64 v[80:81], v[92:93], off global_load_b64 v[76:77], v[76:77], off s_waitcnt lgkmcnt(0) v_fma_f64 v[4:5], v[25:26], s[26:27], v[4:5] v_add_f64 v[25:26], v[66:67], v[52:53] v_add_f64 v[52:53], v[68:69], v[78:79] s_waitcnt vmcnt(3) v_fma_f64 v[46:47], -s[12:13], v[58:59], v[48:49] s_waitcnt vmcnt(2) v_fma_f64 v[48:49], -s[12:13], v[74:75], v[54:55] s_waitcnt vmcnt(1) v_fma_f64 v[27:28], -s[12:13], v[27:28], v[80:81] s_waitcnt vmcnt(0) v_fma_f64 v[8:9], -s[12:13], v[82:83], v[76:77] v_add_f64 v[54:55], v[70:71], v[86:87] v_add_f64 v[58:59], v[72:73], v[0:1] v_fma_f64 v[46:47], s[16:17], v[60:61], v[46:47] v_fma_f64 v[48:49], s[16:17], v[56:57], v[48:49] v_fma_f64 v[6:7], s[20:21], v[6:7], v[27:28] v_fma_f64 v[27:28], s[28:29], v[29:30], v[4:5] v_add_f64 v[29:30], v[50:51], v[2:3] v_fma_f64 v[0:1], s[14:15], v[25:26], v[8:9] v_fma_f64 v[2:3], s[18:19], v[52:53], v[46:47] v_fma_f64 v[4:5], s[22:23], v[54:55], v[6:7] v_fma_f64 v[6:7], s[24:25], v[58:59], v[48:49] v_fma_f64 v[8:9], s[30:31], v[29:30], v[27:28] s_cbranch_scc1 .LBB2_23 ; %bb.18: ; %LeafBlock477 ; in Loop: Header=BB2_12 Depth=1 s_cmp_eq_u32 s44, 2 s_mov_b32 s0, -1 s_cbranch_scc0 .LBB2_22 ; %bb.19: ; %.preheader225.preheader ; in Loop: Header=BB2_12 Depth=1 v_mov_b32_e32 v25, v41 s_mov_b64 s[10:11], 0 s_mov_b32 s38, s40 .LBB2_20: ; %.preheader225 ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x1 scratch_load_b64 v[26:27], off, s38 offset:-40 scratch_load_b64 v[28:29], off, s38 s_cmp_eq_u32 s10, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s10, 2 v_cndmask_b32_e32 v30, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s10, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s10, 4 v_cndmask_b32_e64 v30, v30, v5, s0 s_cselect_b32 s2, -1, 0 s_add_i32 s39, s38, 40 scratch_load_b64 v[46:47], off, s39 s_add_i32 s39, s38, 0x50 v_cndmask_b32_e64 v30, v30, v7, s1 scratch_load_b64 v[48:49], off, s39 s_add_i32 s38, s38, 8 s_add_u32 s10, s10, 1 s_addc_u32 s11, s11, 0 s_cmp_eq_u32 s10, 5 s_waitcnt vmcnt(3) v_mul_f64 v[26:27], v[26:27], -4.0 s_waitcnt vmcnt(2) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[26:27], 0x40180000, v[28:29], v[26:27] v_cndmask_b32_e32 v28, v0, v2, vcc_lo v_cndmask_b32_e64 v29, v30, v9, s2 v_cndmask_b32_e64 v28, v28, v4, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v6, s1 v_cndmask_b32_e64 v28, v28, v8, s2 s_waitcnt vmcnt(1) v_fma_f64 v[26:27], v[46:47], -4.0, v[26:27] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[26:27], v[48:49], v[26:27] v_fma_f64 v[27:28], 0xbfd00000, v[26:27], v[28:29] v_ashrrev_i32_e32 v26, 31, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[29:30], 3, v[25:26] v_add_nc_u32_e32 v25, s43, v25 v_add_co_u32 v29, vcc_lo, s4, v29 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo global_store_b64 v[29:30], v[27:28], off s_cbranch_scc0 .LBB2_20 ; %bb.21: ; %Flow479 ; in Loop: Header=BB2_12 Depth=1 s_mov_b32 s0, 0 .LBB2_22: ; %Flow490 ; in Loop: Header=BB2_12 Depth=1 s_mov_b32 s1, 0 .LBB2_23: ; %Flow489 ; in Loop: Header=BB2_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB2_25 ; %bb.24: ; %LeafBlock ; in Loop: Header=BB2_12 Depth=1 s_cmp_lg_u32 s44, 1 s_mov_b32 s3, -1 s_cselect_b32 s0, -1, 0 .LBB2_25: ; %Flow491 ; in Loop: Header=BB2_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB2_40 ; %bb.26: ; in Loop: Header=BB2_12 Depth=1 s_cmp_gt_u32 s44, 2 s_cselect_b32 s0, -1, 0 s_cmp_lt_i32 s44, s41 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b32 s0, -1 s_cbranch_vccz .LBB2_36 ; %bb.27: ; in Loop: Header=BB2_12 Depth=1 s_cmp_lg_u32 s44, s41 s_cbranch_scc0 .LBB2_32 ; %bb.28: ; in Loop: Header=BB2_12 Depth=1 s_cmp_lg_u32 s44, s42 s_cbranch_scc1 .LBB2_31 ; %bb.29: ; %.preheader221.preheader ; in Loop: Header=BB2_12 Depth=1 v_mov_b32_e32 v25, v43 s_mov_b64 s[10:11], 0 s_mov_b32 s3, s33 .LBB2_30: ; %.preheader221 ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x1 scratch_load_b64 v[26:27], off, s3 offset:-40 scratch_load_b64 v[28:29], off, s3 s_cmp_eq_u32 s10, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s10, 2 v_cndmask_b32_e32 v30, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s10, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s10, 4 v_cndmask_b32_e64 v30, v30, v5, s0 s_cselect_b32 s2, -1, 0 s_add_i32 s38, s3, 40 s_add_u32 s10, s10, 1 scratch_load_b64 v[46:47], off, s38 v_cndmask_b32_e64 v30, v30, v7, s1 s_addc_u32 s11, s11, 0 s_add_i32 s3, s3, 8 s_cmp_eq_u32 s10, 5 s_waitcnt vmcnt(1) v_fma_f64 v[26:27], v[28:29], -4.0, v[26:27] v_cndmask_b32_e32 v28, v0, v2, vcc_lo v_cndmask_b32_e64 v29, v30, v9, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v4, s0 v_cndmask_b32_e64 v28, v28, v6, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v8, s2 s_waitcnt vmcnt(0) v_fma_f64 v[26:27], 0x40140000, v[46:47], v[26:27] v_fma_f64 v[27:28], 0xbfd00000, v[26:27], v[28:29] v_ashrrev_i32_e32 v26, 31, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[29:30], 3, v[25:26] v_add_nc_u32_e32 v25, s43, v25 v_add_co_u32 v29, vcc_lo, s4, v29 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo global_store_b64 v[29:30], v[27:28], off s_cbranch_scc0 .LBB2_30 .LBB2_31: ; %Flow481 ; in Loop: Header=BB2_12 Depth=1 s_mov_b32 s0, 0 .LBB2_32: ; %Flow483 ; in Loop: Header=BB2_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB2_35 ; %bb.33: ; %.preheader219.preheader ; in Loop: Header=BB2_12 Depth=1 v_mov_b32_e32 v27, v33 v_mov_b32_e32 v25, v44 s_mov_b64 s[0:1], 0 .LBB2_34: ; %.preheader219 ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x3 scratch_load_b64 v[28:29], v27, off offset:-120 scratch_load_b64 v[46:47], v27, off offset:-80 scratch_load_b64 v[48:49], v27, off offset:-40 scratch_load_b64 v[50:51], v27, off s_cmp_eq_u32 s0, 1 v_add_nc_u32_e32 v27, 8, v27 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 2 v_cndmask_b32_e32 v26, v1, v3, vcc_lo v_cndmask_b32_e32 v30, v0, v2, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v26, v26, v5, vcc_lo v_cndmask_b32_e32 v30, v30, v4, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v26, v26, v7, vcc_lo v_cndmask_b32_e32 v30, v30, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s0, s0, 1 s_addc_u32 s1, s1, 0 s_cmp_eq_u32 s0, 5 s_waitcnt vmcnt(2) v_fma_f64 v[28:29], v[46:47], -4.0, v[28:29] v_cndmask_b32_e32 v47, v26, v9, vcc_lo v_cndmask_b32_e32 v46, v30, v8, vcc_lo v_ashrrev_i32_e32 v26, 31, v25 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[28:29], 0x40180000, v[48:49], v[28:29] s_waitcnt vmcnt(0) v_fma_f64 v[28:29], v[50:51], -4.0, v[28:29] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[28:29], 0xbfd00000, v[28:29], v[46:47] v_lshlrev_b64 v[46:47], 3, v[25:26] v_add_nc_u32_e32 v25, s43, v25 v_add_co_u32 v46, vcc_lo, s4, v46 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v47, vcc_lo, s5, v47, vcc_lo global_store_b64 v[46:47], v[28:29], off s_cbranch_scc0 .LBB2_34 .LBB2_35: ; %Flow484 ; in Loop: Header=BB2_12 Depth=1 s_mov_b32 s0, 0 .LBB2_36: ; %Flow486 ; in Loop: Header=BB2_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB2_39 ; %bb.37: ; %.preheader.preheader ; in Loop: Header=BB2_12 Depth=1 v_mov_b32_e32 v25, v45 s_mov_b64 s[10:11], 0 s_mov_b32 s3, s40 .LBB2_38: ; %.preheader ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x2 scratch_load_b64 v[26:27], off, s3 offset:-80 scratch_load_b64 v[28:29], off, s3 offset:-40 scratch_load_b64 v[46:47], off, s3 s_cmp_eq_u32 s10, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s10, 2 v_cndmask_b32_e32 v30, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s10, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s10, 4 v_cndmask_b32_e64 v30, v30, v5, s0 s_cselect_b32 s2, -1, 0 s_add_i32 s38, s3, 40 scratch_load_b64 v[48:49], off, s38 s_add_i32 s38, s3, 0x50 v_cndmask_b32_e64 v30, v30, v7, s1 scratch_load_b64 v[50:51], off, s38 s_add_u32 s10, s10, 1 s_addc_u32 s11, s11, 0 s_add_i32 s3, s3, 8 s_cmp_eq_u32 s10, 5 s_waitcnt vmcnt(3) v_fma_f64 v[26:27], v[28:29], -4.0, v[26:27] v_cndmask_b32_e32 v28, v0, v2, vcc_lo v_cndmask_b32_e64 v29, v30, v9, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v4, s0 v_cndmask_b32_e64 v28, v28, v6, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v8, s2 s_waitcnt vmcnt(2) v_fma_f64 v[26:27], 0x40180000, v[46:47], v[26:27] s_waitcnt vmcnt(1) v_fma_f64 v[26:27], v[48:49], -4.0, v[26:27] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[26:27], v[50:51], v[26:27] v_fma_f64 v[27:28], 0xbfd00000, v[26:27], v[28:29] v_ashrrev_i32_e32 v26, 31, v25 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[29:30], 3, v[25:26] v_add_nc_u32_e32 v25, s43, v25 v_add_co_u32 v29, vcc_lo, s4, v29 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo global_store_b64 v[29:30], v[27:28], off s_cbranch_scc0 .LBB2_38 .LBB2_39: ; %Flow487 ; in Loop: Header=BB2_12 Depth=1 s_mov_b32 s3, 0 .LBB2_40: ; %Flow492 ; in Loop: Header=BB2_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB2_43 ; %bb.41: ; %.preheader223.preheader ; in Loop: Header=BB2_12 Depth=1 v_mov_b32_e32 v25, v42 s_mov_b64 s[10:11], 0 s_mov_b32 s3, s40 .LBB2_42: ; %.preheader223 ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s10, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s10, 2 v_cndmask_b32_e32 v26, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s10, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v26, v26, v5, s0 s_cmp_eq_u32 s10, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s38, s3, 40 v_cndmask_b32_e64 v30, v26, v7, s1 s_clause 0x1 scratch_load_b64 v[26:27], off, s38 scratch_load_b64 v[28:29], off, s3 s_add_i32 s38, s3, 0x50 s_add_i32 s3, s3, 8 scratch_load_b64 v[46:47], off, s38 s_add_u32 s10, s10, 1 s_addc_u32 s11, s11, 0 s_cmp_eq_u32 s10, 5 s_waitcnt vmcnt(2) v_mul_f64 v[26:27], v[26:27], -4.0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[26:27], 0x40140000, v[28:29], v[26:27] v_cndmask_b32_e32 v28, v0, v2, vcc_lo v_cndmask_b32_e64 v29, v30, v9, s2 v_cndmask_b32_e64 v28, v28, v4, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v28, v28, v6, s1 v_cndmask_b32_e64 v28, v28, v8, s2 s_waitcnt vmcnt(0) v_add_f64 v[26:27], v[46:47], v[26:27] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[27:28], 0xbfd00000, v[26:27], v[28:29] v_ashrrev_i32_e32 v26, 31, v25 v_lshlrev_b64 v[29:30], 3, v[25:26] v_add_nc_u32_e32 v25, s43, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v29, vcc_lo, s4, v29 v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo global_store_b64 v[29:30], v[27:28], off s_cbranch_scc0 .LBB2_42 .LBB2_43: ; %.loopexit.preheader ; in Loop: Header=BB2_12 Depth=1 s_mov_b32 s0, 0 .LBB2_44: ; %.loopexit ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 v_readfirstlane_b32 s1, v31 v_add_nc_u32_e64 v25, 0xe0, s0 s_add_i32 s11, s0, 0xe0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s1, s1, s0 v_add_nc_u32_e32 v52, 40, v25 s_add_i32 s2, s1, 40 v_add_nc_u32_e32 v50, 0x50, v25 s_add_i32 s3, s1, 0x50 s_add_i32 s10, s1, 0x78 s_addk_i32 s1, 0xa0 s_clause 0x3 scratch_load_b64 v[25:26], off, s2 scratch_load_b64 v[27:28], off, s3 scratch_load_b64 v[29:30], off, s10 scratch_load_b64 v[46:47], off, s1 s_clause 0x1 scratch_load_b64 v[48:49], v52, off scratch_load_b64 v[50:51], v50, off s_add_i32 s1, s0, 16 s_add_i32 s0, s0, 8 s_waitcnt vmcnt(5) scratch_store_b64 off, v[25:26], s1 s_waitcnt vmcnt(4) scratch_store_b64 off, v[27:28], s2 s_waitcnt vmcnt(3) scratch_store_b64 off, v[29:30], s3 s_waitcnt vmcnt(2) scratch_store_b64 off, v[46:47], s10 s_waitcnt vmcnt(1) scratch_store_b64 off, v[48:49], s11 s_waitcnt vmcnt(0) scratch_store_b64 v52, v[50:51], off s_cmp_lg_u32 s0, 40 s_cbranch_scc1 .LBB2_44 ; %bb.45: ; in Loop: Header=BB2_12 Depth=1 v_dual_mov_b32 v25, v12 :: v_dual_mov_b32 v26, v13 v_dual_mov_b32 v12, v14 :: v_dual_mov_b32 v13, v15 v_dual_mov_b32 v27, v10 :: v_dual_mov_b32 v28, v11 v_dual_mov_b32 v10, v16 :: v_dual_mov_b32 v11, v17 s_cmp_ge_i32 s44, s42 s_cbranch_scc1 .LBB2_49 ; %bb.46: ; in Loop: Header=BB2_12 Depth=1 scratch_load_b64 v[14:15], off, off offset:136 s_mov_b32 s0, 0 s_waitcnt vmcnt(0) v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[29:30], v[16:17] s_waitcnt_depctr 0xfff v_fma_f64 v[46:47], -v[16:17], v[29:30], 1.0 v_fma_f64 v[29:30], v[29:30], v[46:47], v[29:30] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[46:47], -v[16:17], v[29:30], 1.0 v_fma_f64 v[29:30], v[29:30], v[46:47], v[29:30] v_div_scale_f64 v[46:47], vcc_lo, 1.0, v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[48:49], v[46:47], v[29:30] v_fma_f64 v[16:17], -v[16:17], v[48:49], v[46:47] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[16:17], v[16:17], v[29:30], v[48:49] v_div_fixup_f64 v[14:15], v[16:17], v[14:15], 1.0 .LBB2_47: ; Parent Loop BB2_12 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e32 v16, s0, v35 v_add_nc_u32_e32 v29, s0, v36 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s0, 32 scratch_load_b64 v[16:17], v16, off s_waitcnt vmcnt(0) v_mul_f64 v[16:17], v[14:15], v[16:17] scratch_store_b64 v29, v[16:17], off s_cbranch_scc1 .LBB2_47 ; %bb.48: ; in Loop: Header=BB2_12 Depth=1 s_clause 0x3 scratch_load_b128 v[46:49], off, off offset:144 scratch_load_b128 v[50:53], off, off offset:312 scratch_load_b64 v[16:17], off, off offset:328 scratch_load_b64 v[29:30], off, off offset:160 s_waitcnt vmcnt(2) v_mul_f64 v[48:49], v[52:53], v[48:49] v_mul_f64 v[14:15], v[52:53], v[52:53] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[46:47], v[50:51], v[46:47], v[48:49] v_fma_f64 v[48:49], v[50:51], v[50:51], v[14:15] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[29:30], v[16:17], v[29:30], v[46:47] v_fma_f64 v[46:47], v[16:17], v[16:17], v[48:49] s_delay_alu instid0(VALU_DEP_2) v_mul_f64 v[16:17], v[29:30], 0.5 scratch_store_b64 off, v[46:47], off offset:304 .LBB2_49: ; in Loop: Header=BB2_12 Depth=1 v_add_nc_u32_e32 v45, s8, v45 s_add_i32 s0, s44, 1 s_cmp_lg_u32 s44, s42 s_mov_b32 s44, s0 s_cbranch_scc1 .LBB2_12 .LBB2_50: ; %.loopexit229 s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL18exact_rhs_kernel_yPdiii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 352 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 1 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 100 .amdhsa_next_free_sgpr 58 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL18exact_rhs_kernel_yPdiii,"axG",@progbits,_ZL18exact_rhs_kernel_yPdiii,comdat .Lfunc_end2: .size _ZL18exact_rhs_kernel_yPdiii, .Lfunc_end2-_ZL18exact_rhs_kernel_yPdiii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 5416 ; NumSgprs: 60 ; NumVgprs: 100 ; ScratchSize: 352 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 7 ; VGPRBlocks: 12 ; NumSGPRsForWavesPerEU: 60 ; NumVGPRsForWavesPerEU: 100 ; Occupancy: 12 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .section .text._ZL18exact_rhs_kernel_zPdiii,"axG",@progbits,_ZL18exact_rhs_kernel_zPdiii,comdat .globl _ZL18exact_rhs_kernel_zPdiii ; -- Begin function _ZL18exact_rhs_kernel_zPdiii .p2align 8 .type _ZL18exact_rhs_kernel_zPdiii,@function _ZL18exact_rhs_kernel_zPdiii: ; @_ZL18exact_rhs_kernel_zPdiii ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x24 s_load_b128 s[8:11], s[0:1], 0x8 v_and_b32_e32 v19, 0x3ff, v0 v_bfe_u32 v18, v0, 10, 10 s_waitcnt lgkmcnt(0) s_and_b32 s3, s2, 0xffff s_lshr_b32 s2, s2, 16 s_mul_i32 s26, s14, s3 s_mul_i32 s38, s15, s2 v_add3_u32 v34, v19, s26, 1 v_add3_u32 v35, v18, s38, 1 s_add_i32 s2, s9, -1 s_add_i32 s3, s8, -1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s2, v34 v_cmp_gt_i32_e64 s2, s3, v35 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB3_58 ; %bb.1: v_cvt_f64_i32_e32 v[0:1], v34 v_cvt_f64_i32_e32 v[2:3], v35 s_getpc_b64 s[2:3] s_add_u32 s2, s2, dnym1@rel32@lo+4 s_addc_u32 s3, s3, dnym1@rel32@hi+12 s_getpc_b64 s[4:5] s_add_u32 s4, s4, dnxm1@rel32@lo+4 s_addc_u32 s5, s5, dnxm1@rel32@hi+12 s_load_b64 s[2:3], s[2:3], 0x0 s_load_b64 s[4:5], s[4:5], 0x0 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 v_or_b32_e64 v20, 0xe0, 8 ; implicit-def: $vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29 ; implicit-def: $vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29 s_mov_b32 s17, 0 ; implicit-def: $vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 ; implicit-def: $vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 s_waitcnt lgkmcnt(0) v_mul_f64 v[36:37], s[2:3], v[0:1] v_mul_f64 v[38:39], s[4:5], v[2:3] s_getpc_b64 s[2:3] s_add_u32 s2, s2, dnzm1@rel32@lo+4 s_addc_u32 s3, s3, dnzm1@rel32@hi+12 s_add_i32 s11, 16, 40 s_load_b64 s[6:7], s[2:3], 0x0 s_mov_b32 s16, s11 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $vgpr10_vgpr11 .LBB3_2: ; =>This Loop Header: Depth=1 ; Child Loop BB3_3 Depth 2 ; Child Loop BB3_5 Depth 2 ; Child Loop BB3_7 Depth 2 s_waitcnt lgkmcnt(0) v_mul_f64 v[14:15], s[6:7], v[16:17] s_mov_b64 s[14:15], 0 s_getpc_b64 s[12:13] s_add_u32 s12, s12, ce@rel32@lo+4 s_addc_u32 s13, s13, ce@rel32@hi+12 .LBB3_3: ; Parent Loop BB3_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x7 s_load_b64 s[2:3], s[12:13], 0x118 s_load_b64 s[4:5], s[12:13], 0x190 s_load_b64 s[18:19], s[12:13], 0xa0 s_load_b64 s[20:21], s[12:13], 0xc8 s_load_b64 s[22:23], s[12:13], 0x140 s_load_b64 s[24:25], s[12:13], 0x1b8 s_load_b64 s[28:29], s[12:13], 0xf0 s_load_b64 s[30:31], s[12:13], 0x168 s_cmp_eq_u32 s14, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s14, 3 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[21:22], v[38:39], s[4:5], s[2:3] v_fma_f64 v[23:24], v[36:37], s[24:25], s[22:23] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[21:22], v[38:39], v[21:22], s[18:19] s_clause 0x4 s_load_b64 s[2:3], s[12:13], 0x1e0 s_load_b64 s[4:5], s[12:13], 0x28 s_load_b64 s[18:19], s[12:13], 0x0 s_load_b64 s[22:23], s[12:13], 0x50 s_load_b64 s[24:25], s[12:13], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[23:24], v[36:37], v[23:24], s[20:21] s_waitcnt lgkmcnt(0) v_fma_f64 v[40:41], v[14:15], s[2:3], s[30:31] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s14, 2 s_cselect_b32 s3, -1, 0 s_cmp_eq_u32 s14, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[21:22], v[38:39], v[21:22], s[4:5] s_cselect_b32 s4, -1, 0 s_cmp_eq_u32 s14, 0 s_cselect_b32 s5, -1, 0 v_fma_f64 v[23:24], v[36:37], v[23:24], s[22:23] s_add_u32 s14, s14, 1 s_addc_u32 s15, s15, 0 s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[40:41], v[14:15], v[40:41], s[28:29] v_fma_f64 v[21:22], v[38:39], v[21:22], s[18:19] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[40:41], v[14:15], v[40:41], s[24:25] v_fma_f64 v[21:22], v[36:37], v[23:24], v[21:22] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[21:22], v[14:15], v[40:41], v[21:22] v_dual_cndmask_b32 v9, v9, v22 :: v_dual_cndmask_b32 v8, v8, v21 v_cndmask_b32_e64 v7, v7, v22, s2 v_cndmask_b32_e64 v6, v6, v21, s2 v_cndmask_b32_e64 v5, v5, v22, s3 v_cndmask_b32_e64 v4, v4, v21, s3 v_cndmask_b32_e64 v3, v3, v22, s4 v_cndmask_b32_e64 v2, v2, v21, s4 v_cndmask_b32_e64 v1, v1, v22, s5 v_cndmask_b32_e64 v0, v0, v21, s5 s_cbranch_scc1 .LBB3_3 ; %bb.4: ; %_ZL21exact_solution_kerneldddPd.exit.preheader ; in Loop: Header=BB3_2 Depth=1 s_mov_b64 s[2:3], 0 s_mov_b32 s4, s16 .LBB3_5: ; %_ZL21exact_solution_kerneldddPd.exit ; Parent Loop BB3_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s2, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v14, v1, v3 :: v_dual_cndmask_b32 v15, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v14, v14, v5 :: v_dual_cndmask_b32 v15, v15, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 4 v_dual_cndmask_b32 v14, v14, v7 :: v_dual_cndmask_b32 v21, v15, v6 s_cselect_b32 vcc_lo, -1, 0 s_delay_alu instid0(VALU_DEP_1) v_dual_cndmask_b32 v15, v14, v9 :: v_dual_cndmask_b32 v14, v21, v8 scratch_store_b64 off, v[14:15], s4 s_add_i32 s4, s4, 8 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 s_cbranch_scc1 .LBB3_5 ; %bb.6: ; in Loop: Header=BB3_2 Depth=1 v_div_scale_f64 v[14:15], null, v[0:1], v[0:1], 1.0 s_mov_b64 s[2:3], 1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[21:22], v[14:15] s_waitcnt_depctr 0xfff v_fma_f64 v[23:24], -v[14:15], v[21:22], 1.0 v_fma_f64 v[21:22], v[21:22], v[23:24], v[21:22] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[23:24], -v[14:15], v[21:22], 1.0 v_fma_f64 v[21:22], v[21:22], v[23:24], v[21:22] v_div_scale_f64 v[23:24], vcc_lo, 1.0, v[0:1], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[40:41], v[23:24], v[21:22] v_fma_f64 v[14:15], -v[14:15], v[40:41], v[23:24] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[14:15], v[14:15], v[21:22], v[40:41] v_mov_b32_e32 v21, v20 v_div_fixup_f64 v[14:15], v[14:15], v[0:1], 1.0 .LBB3_7: ; Parent Loop BB3_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s2, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v22, v1, v3 :: v_dual_cndmask_b32 v23, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v22, v22, v5 :: v_dual_cndmask_b32 v23, v23, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 4 v_cndmask_b32_e32 v22, v22, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v24, v23, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 v_dual_cndmask_b32 v23, v22, v9 :: v_dual_cndmask_b32 v22, v24, v8 s_cmp_lg_u32 s2, 5 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[22:23], v[14:15], v[22:23] scratch_store_b64 v21, v[22:23], off v_add_nc_u32_e32 v21, 8, v21 s_cbranch_scc1 .LBB3_7 ; %bb.8: ; in Loop: Header=BB3_2 Depth=1 s_mul_i32 s5, s17, 40 s_add_i32 s4, s17, 1 s_add_i32 s12, s5, 0xe0 s_cmp_eq_u32 s17, 2 s_clause 0x1 scratch_load_b64 v[14:15], off, s12 offset:24 scratch_load_b128 v[21:24], off, s12 offset:8 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s17, 1 v_add_f64 v[16:17], v[16:17], 1.0 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s17, 0 v_add_nc_u32_e32 v20, 40, v20 s_cselect_b32 s3, -1, 0 s_add_i32 s5, s5, 16 s_clause 0x1 scratch_load_b128 v[40:43], off, s5 offset:48 scratch_load_b64 v[46:47], off, s5 offset:64 s_add_i32 s16, s16, 40 s_cmp_eq_u32 s4, 3 s_waitcnt vmcnt(3) v_mul_f64 v[44:45], v[14:15], v[14:15] s_waitcnt vmcnt(1) v_mul_f64 v[42:43], v[23:24], v[42:43] s_delay_alu instid0(VALU_DEP_2) v_dual_cndmask_b32 v31, v31, v45 :: v_dual_cndmask_b32 v30, v30, v44 v_cndmask_b32_e64 v29, v29, v45, s2 v_cndmask_b32_e64 v28, v28, v44, s2 v_cndmask_b32_e64 v13, v13, v45, s3 v_cndmask_b32_e64 v12, v12, v44, s3 v_fma_f64 v[40:41], v[21:22], v[40:41], v[42:43] v_fma_f64 v[21:22], v[21:22], v[21:22], v[44:45] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[14:15], v[14:15], v[46:47], v[40:41] v_fma_f64 v[21:22], v[23:24], v[23:24], v[21:22] s_delay_alu instid0(VALU_DEP_2) v_mul_f64 v[14:15], v[14:15], 0.5 scratch_store_b64 off, v[21:22], s12 v_dual_cndmask_b32 v33, v33, v15 :: v_dual_cndmask_b32 v32, v32, v14 v_cndmask_b32_e64 v27, v27, v15, s2 v_cndmask_b32_e64 v26, v26, v14, s2 v_cndmask_b32_e64 v11, v11, v15, s3 v_cndmask_b32_e64 v10, v10, v14, s3 s_cbranch_scc1 .LBB3_10 ; %bb.9: ; in Loop: Header=BB3_2 Depth=1 s_mov_b32 s17, s4 s_branch .LBB3_2 .LBB3_10: ; %.preheader216 s_cmp_lt_i32 s10, 3 s_cbranch_scc1 .LBB3_58 ; %bb.11: ; %.lr.ph s_getpc_b64 s[2:3] s_add_u32 s2, s2, zzcon3@rel32@lo+4 s_addc_u32 s3, s3, zzcon3@rel32@hi+12 s_getpc_b64 s[12:13] s_add_u32 s12, s12, tz2@rel32@lo+4 s_addc_u32 s13, s13, tz2@rel32@hi+12 s_load_b64 s[2:3], s[2:3], 0x0 s_getpc_b64 s[14:15] s_add_u32 s14, s14, dz1tz1@rel32@lo+4 s_addc_u32 s15, s15, dz1tz1@rel32@hi+12 s_load_b64 s[4:5], s[0:1], 0x0 s_load_b64 s[12:13], s[12:13], 0x0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, zzcon2@rel32@lo+4 s_addc_u32 s1, s1, zzcon2@rel32@hi+12 v_add3_u32 v15, s26, s9, v19 s_load_b64 s[16:17], s[0:1], 0x0 s_load_b64 s[14:15], s[14:15], 0x0 v_mov_b32_e32 v14, 0xe0 v_mov_b32_e32 v42, 16 v_mul_lo_u32 v15, s8, v15 s_mov_b32 s33, 16 s_mul_i32 s44, s9, s8 v_add_nc_u32_e32 v45, 0x58, v14 v_add_nc_u32_e32 v43, 0x78, v42 s_mov_b32 s34, 0x9999999a s_mov_b32 s36, 0x66666666 s_mov_b32 s35, 0x3fd99999 v_add3_u32 v14, v15, s8, v18 s_mov_b32 s37, 0x3ff66666 s_mov_b32 s46, 1 s_waitcnt lgkmcnt(0) v_mul_f64 v[40:41], s[2:3], 0.5 s_getpc_b64 s[2:3] s_add_u32 s2, s2, dz2tz1@rel32@lo+4 s_addc_u32 s3, s3, dz2tz1@rel32@hi+12 s_getpc_b64 s[20:21] s_add_u32 s20, s20, dz3tz1@rel32@lo+4 s_addc_u32 s21, s21, dz3tz1@rel32@hi+12 s_getpc_b64 s[0:1] s_add_u32 s0, s0, zzcon1@rel32@lo+4 s_addc_u32 s1, s1, zzcon1@rel32@hi+12 s_load_b64 s[18:19], s[2:3], 0x0 s_load_b64 s[20:21], s[20:21], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, dz4tz1@rel32@lo+4 s_addc_u32 s3, s3, dz4tz1@rel32@hi+12 s_load_b64 s[22:23], s[0:1], 0x0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, zzcon4@rel32@lo+4 s_addc_u32 s1, s1, zzcon4@rel32@hi+12 s_getpc_b64 s[28:29] s_add_u32 s28, s28, zzcon5@rel32@lo+4 s_addc_u32 s29, s29, zzcon5@rel32@hi+12 s_getpc_b64 s[30:31] s_add_u32 s30, s30, dz5tz1@rel32@lo+4 s_addc_u32 s31, s31, dz5tz1@rel32@hi+12 s_load_b64 s[26:27], s[0:1], 0x0 s_load_b64 s[28:29], s[28:29], 0x0 s_load_b64 s[30:31], s[30:31], 0x0 s_load_b64 s[24:25], s[2:3], 0x0 s_movk_i32 s0, 0x80 v_add3_u32 v47, v14, s38, 1 v_add_nc_u32_e64 v44, s0, 16 s_movk_i32 s0, 0xa0 s_addk_i32 s33, 0x50 v_add_nc_u32_e64 v46, s0, 16 s_add_i32 s42, s10, -3 s_add_i32 s43, s10, -2 s_mul_i32 s45, s44, s10 .LBB3_12: ; =>This Loop Header: Depth=1 ; Child Loop BB3_14 Depth 2 ; Child Loop BB3_16 Depth 2 ; Child Loop BB3_20 Depth 2 ; Child Loop BB3_32 Depth 2 ; Child Loop BB3_39 Depth 2 ; Child Loop BB3_43 Depth 2 ; Child Loop BB3_47 Depth 2 ; Child Loop BB3_50 Depth 2 ; Child Loop BB3_52 Depth 2 ; Child Loop BB3_55 Depth 2 s_add_i32 s0, s46, 2 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_ge_i32 s0, s10 s_cbranch_scc1 .LBB3_17 ; %bb.13: ; in Loop: Header=BB3_12 Depth=1 v_cvt_f64_i32_e32 v[14:15], s0 s_mov_b64 s[40:41], 0 s_getpc_b64 s[38:39] s_add_u32 s38, s38, ce@rel32@lo+4 s_addc_u32 s39, s39, ce@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[14:15], s[6:7], v[14:15] .LBB3_14: ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x7 s_load_b64 s[0:1], s[38:39], 0x118 s_load_b64 s[2:3], s[38:39], 0x190 s_load_b64 s[48:49], s[38:39], 0xa0 s_load_b64 s[50:51], s[38:39], 0xc8 s_load_b64 s[52:53], s[38:39], 0x140 s_load_b64 s[54:55], s[38:39], 0x1b8 s_load_b64 s[56:57], s[38:39], 0xf0 s_load_b64 s[58:59], s[38:39], 0x168 s_cmp_eq_u32 s40, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s40, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[16:17], v[38:39], s[2:3], s[0:1] v_fma_f64 v[18:19], v[36:37], s[54:55], s[52:53] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[16:17], v[38:39], v[16:17], s[48:49] s_clause 0x4 s_load_b64 s[0:1], s[38:39], 0x1e0 s_load_b64 s[2:3], s[38:39], 0x28 s_load_b64 s[48:49], s[38:39], 0x0 s_load_b64 s[52:53], s[38:39], 0x50 s_load_b64 s[54:55], s[38:39], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[18:19], v[36:37], v[18:19], s[50:51] s_waitcnt lgkmcnt(0) v_fma_f64 v[20:21], v[14:15], s[0:1], s[58:59] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s40, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s40, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[16:17], v[38:39], v[16:17], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s40, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[18:19], v[36:37], v[18:19], s[52:53] s_add_u32 s40, s40, 1 s_addc_u32 s41, s41, 0 s_add_u32 s38, s38, 8 s_addc_u32 s39, s39, 0 s_cmp_lg_u32 s40, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[20:21], v[14:15], v[20:21], s[56:57] v_fma_f64 v[16:17], v[38:39], v[16:17], s[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[20:21], v[14:15], v[20:21], s[54:55] v_fma_f64 v[16:17], v[36:37], v[18:19], v[16:17] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], v[14:15], v[20:21], v[16:17] v_dual_cndmask_b32 v9, v9, v17 :: v_dual_cndmask_b32 v8, v8, v16 v_cndmask_b32_e64 v7, v7, v17, s0 v_cndmask_b32_e64 v6, v6, v16, s0 v_cndmask_b32_e64 v5, v5, v17, s1 v_cndmask_b32_e64 v4, v4, v16, s1 v_cndmask_b32_e64 v3, v3, v17, s2 v_cndmask_b32_e64 v2, v2, v16, s2 v_cndmask_b32_e64 v1, v1, v17, s3 v_cndmask_b32_e64 v0, v0, v16, s3 s_cbranch_scc1 .LBB3_14 ; %bb.15: ; %_ZL21exact_solution_kerneldddPd.exit178.preheader ; in Loop: Header=BB3_12 Depth=1 v_mov_b32_e32 v14, v46 s_mov_b64 s[0:1], 0 .LBB3_16: ; %_ZL21exact_solution_kerneldddPd.exit178 ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s0, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 2 v_dual_cndmask_b32 v15, v1, v3 :: v_dual_cndmask_b32 v16, v0, v2 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v15, v15, v5 :: v_dual_cndmask_b32 v16, v16, v4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s0, 4 v_cndmask_b32_e32 v15, v15, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v17, v16, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s0, s0, 1 s_addc_u32 s1, s1, 0 v_dual_cndmask_b32 v16, v15, v9 :: v_dual_cndmask_b32 v15, v17, v8 s_cmp_lg_u32 s0, 5 scratch_store_b64 v14, v[15:16], off v_add_nc_u32_e32 v14, 8, v14 s_cbranch_scc1 .LBB3_16 .LBB3_17: ; %NodeBlock ; in Loop: Header=BB3_12 Depth=1 s_clause 0xa scratch_load_b128 v[0:3], off, off offset:88 scratch_load_b64 v[68:69], off, off offset:168 scratch_load_b128 v[4:7], off, off offset:240 scratch_load_b128 v[14:17], off, off offset:56 scratch_load_b128 v[18:21], off, off offset:72 scratch_load_b128 v[22:25], off, off offset:288 scratch_load_b64 v[8:9], off, off offset:336 scratch_load_b128 v[48:51], off, off offset:320 scratch_load_b128 v[52:55], off, off offset:136 scratch_load_b128 v[56:59], off, off offset:152 scratch_load_b128 v[60:63], off, off offset:272 v_mul_f64 v[70:71], v[10:11], s[34:35] scratch_load_b128 v[64:67], off, off offset:104 v_mad_u64_u32 v[74:75], null, s46, s9, v[34:35] v_mul_f64 v[72:73], v[32:33], s[34:35] v_fma_f64 v[75:76], v[28:29], -2.0, v[30:31] s_add_i32 s0, s46, s10 s_mov_b32 s40, 0 s_add_i32 s1, s0, s10 v_mad_u64_u32 v[77:78], null, s0, s9, v[34:35] s_add_i32 s0, s1, s10 v_mad_u64_u32 v[78:79], null, s1, s9, v[34:35] s_add_i32 s1, s0, s10 v_mad_u64_u32 v[79:80], null, s0, s9, v[34:35] v_mad_u64_u32 v[80:81], null, s1, s9, v[34:35] v_mad_u64_u32 v[81:82], null, v74, s8, v[35:36] v_mad_u64_u32 v[83:84], null, v77, s8, v[35:36] v_mad_u64_u32 v[85:86], null, v78, s8, v[35:36] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mad_u64_u32 v[89:90], null, v80, s8, v[35:36] v_ashrrev_i32_e32 v82, 31, v81 v_mad_u64_u32 v[77:78], null, v79, s8, v[35:36] v_ashrrev_i32_e32 v84, 31, v83 v_ashrrev_i32_e32 v86, 31, v85 s_delay_alu instid0(VALU_DEP_4) v_lshlrev_b64 v[79:80], 3, v[81:82] v_ashrrev_i32_e32 v90, 31, v89 s_cmp_lt_i32 s46, 2 v_lshlrev_b64 v[81:82], 3, v[83:84] v_lshlrev_b64 v[83:84], 3, v[85:86] v_ashrrev_i32_e32 v78, 31, v77 v_lshlrev_b64 v[85:86], 3, v[89:90] v_add_co_u32 v79, vcc_lo, s4, v79 v_add_co_ci_u32_e32 v80, vcc_lo, s5, v80, vcc_lo v_add_f64 v[12:13], v[12:13], v[75:76] v_lshlrev_b64 v[77:78], 3, v[77:78] v_add_co_u32 v81, vcc_lo, s4, v81 v_add_co_ci_u32_e32 v82, vcc_lo, s5, v82, vcc_lo v_add_co_u32 v83, vcc_lo, s4, v83 v_add_co_ci_u32_e32 v84, vcc_lo, s5, v84, vcc_lo v_add_co_u32 v77, vcc_lo, s4, v77 v_add_co_ci_u32_e32 v78, vcc_lo, s5, v78, vcc_lo v_add_co_u32 v85, vcc_lo, s4, v85 v_add_co_ci_u32_e32 v86, vcc_lo, s5, v86, vcc_lo s_waitcnt vmcnt(11) v_fma_f64 v[70:71], v[0:1], s[36:37], -v[70:71] s_waitcnt vmcnt(10) v_add_f64 v[87:88], v[68:69], -v[32:33] v_fma_f64 v[72:73], v[68:69], s[36:37], -v[72:73] s_waitcnt vmcnt(8) v_mul_f64 v[74:75], v[16:17], v[6:7] s_waitcnt vmcnt(7) v_mul_f64 v[89:90], v[6:7], v[18:19] s_waitcnt vmcnt(5) v_fma_f64 v[91:92], v[24:25], -2.0, v[8:9] s_waitcnt vmcnt(4) v_fma_f64 v[93:94], v[22:23], -2.0, v[50:51] scratch_load_b128 v[22:25], off, off offset:120 s_waitcnt vmcnt(4) v_fma_f64 v[2:3], v[2:3], -2.0, v[52:53] s_waitcnt vmcnt(1) v_fma_f64 v[52:53], v[64:65], -2.0, v[54:55] v_mul_f64 v[70:71], v[6:7], v[70:71] v_mul_f64 v[87:88], v[87:88], s[34:35] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[2:3], v[14:15], v[2:3] v_add_f64 v[14:15], v[16:17], v[52:53] s_delay_alu instid0(VALU_DEP_4) v_fma_f64 v[8:9], v[50:51], v[72:73], -v[70:71] v_fma_f64 v[70:71], v[54:55], v[50:51], -v[74:75] v_fma_f64 v[72:73], v[50:51], v[56:57], -v[89:90] v_fma_f64 v[74:75], v[58:59], v[50:51], v[87:88] v_fma_f64 v[87:88], v[62:63], -2.0, v[48:49] scratch_load_b128 v[48:51], off, off offset:304 global_load_b64 v[54:55], v[85:86], off v_fma_f64 v[56:57], v[66:67], -2.0, v[56:57] v_add_f64 v[66:67], v[58:59], -v[20:21] v_add_f64 v[4:5], v[4:5], v[87:88] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_f64 v[52:53], v[18:19], v[56:57] s_waitcnt vmcnt(2) v_fma_f64 v[22:23], v[22:23], -2.0, v[58:59] v_add_f64 v[22:23], v[20:21], v[22:23] s_waitcnt vmcnt(1) v_fma_f64 v[50:51], v[60:61], -2.0, v[50:51] scratch_load_b128 v[60:63], off, off offset:256 s_waitcnt vmcnt(1) v_fma_f64 v[54:55], -s[12:13], v[8:9], v[54:55] v_add_f64 v[8:9], v[0:1], -v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[8:9], v[8:9], s[34:35] v_fma_f64 v[8:9], v[20:21], v[6:7], v[8:9] v_add_f64 v[6:7], v[6:7], v[93:94] s_waitcnt vmcnt(0) v_fma_f64 v[48:49], v[62:63], -2.0, v[48:49] s_delay_alu instid0(VALU_DEP_3) v_add_f64 v[62:63], v[74:75], -v[8:9] scratch_load_b128 v[8:11], off, off offset:224 s_waitcnt vmcnt(0) v_add_f64 v[8:9], v[8:9], v[48:49] v_add_f64 v[10:11], v[10:11], v[50:51] v_add_f64 v[50:51], v[60:61], v[91:92] s_delay_alu instid0(VALU_DEP_3) v_fma_f64 v[8:9], v[40:41], v[8:9], v[54:55] s_clause 0x3 global_load_b64 v[48:49], v[81:82], off global_load_b64 v[54:55], v[83:84], off global_load_b64 v[64:65], v[77:78], off global_load_b64 v[74:75], v[79:80], off s_waitcnt lgkmcnt(0) v_fma_f64 v[8:9], v[12:13], s[26:27], v[8:9] v_fma_f64 v[12:13], v[24:25], -2.0, v[68:69] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[8:9], s[28:29], v[50:51], v[8:9] v_add_f64 v[0:1], v[0:1], v[12:13] s_waitcnt vmcnt(3) v_fma_f64 v[48:49], -s[12:13], v[70:71], v[48:49] s_waitcnt vmcnt(2) v_fma_f64 v[54:55], -s[12:13], v[72:73], v[54:55] s_waitcnt vmcnt(1) v_fma_f64 v[58:59], -s[12:13], v[62:63], v[64:65] s_waitcnt vmcnt(0) v_fma_f64 v[24:25], -s[12:13], v[66:67], v[74:75] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[10:11], s[16:17], v[10:11], v[48:49] v_fma_f64 v[4:5], s[16:17], v[4:5], v[54:55] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[6:7], s[22:23], v[6:7], v[58:59] v_fma_f64 v[16:17], s[14:15], v[2:3], v[24:25] v_fma_f64 v[24:25], s[30:31], v[0:1], v[8:9] v_fma_f64 v[18:19], s[18:19], v[14:15], v[10:11] v_fma_f64 v[20:21], s[20:21], v[52:53], v[4:5] v_fma_f64 v[22:23], s[24:25], v[22:23], v[6:7] s_cbranch_scc1 .LBB3_22 ; %bb.18: ; %LeafBlock562 ; in Loop: Header=BB3_12 Depth=1 s_cmp_eq_u32 s46, 2 s_cbranch_scc0 .LBB3_23 ; %bb.19: ; %.preheader213.preheader ; in Loop: Header=BB3_12 Depth=1 v_dual_mov_b32 v0, v16 :: v_dual_mov_b32 v1, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_mov_b32 v2, v18 :: v_dual_mov_b32 v3, v19 v_dual_mov_b32 v4, v20 :: v_dual_mov_b32 v5, v21 s_delay_alu instid0(VALU_DEP_4) v_dual_mov_b32 v6, v22 :: v_dual_mov_b32 v7, v23 v_dual_mov_b32 v8, v24 :: v_dual_mov_b32 v9, v25 s_mov_b64 s[38:39], 0 s_mov_b32 s41, s33 .LBB3_20: ; %.preheader213 ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x1 scratch_load_b64 v[10:11], off, s41 offset:-40 scratch_load_b64 v[12:13], off, s41 s_cmp_eq_u32 s38, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 2 v_cndmask_b32_e32 v14, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v14, v14, v5, s0 s_cmp_eq_u32 s38, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s3, s41, 40 v_cndmask_b32_e64 v50, v14, v7, s1 scratch_load_b64 v[14:15], off, s3 s_add_i32 s3, s41, 0x50 s_cmp_eq_u32 s38, 0 scratch_load_b64 v[48:49], off, s3 s_cselect_b32 s3, -1, 0 s_add_i32 s41, s41, 8 s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_cmp_eq_u32 s38, 5 s_waitcnt vmcnt(3) v_mul_f64 v[10:11], v[10:11], -4.0 s_waitcnt vmcnt(2) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[10:11], 0x40180000, v[12:13], v[10:11] v_cndmask_b32_e32 v12, v0, v2, vcc_lo v_cndmask_b32_e64 v13, v50, v9, s2 v_cndmask_b32_e64 v12, v12, v4, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v12, v12, v6, s1 v_cndmask_b32_e64 v12, v12, v8, s2 s_waitcnt vmcnt(1) v_fma_f64 v[10:11], v[14:15], -4.0, v[10:11] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[10:11], v[48:49], v[10:11] v_fma_f64 v[10:11], 0xbfd00000, v[10:11], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v3, v3, v11, vcc_lo v_cndmask_b32_e64 v9, v9, v11, s2 v_cndmask_b32_e64 v8, v8, v10, s2 v_cndmask_b32_e64 v7, v7, v11, s1 v_cndmask_b32_e64 v6, v6, v10, s1 v_cndmask_b32_e64 v5, v5, v11, s0 v_cndmask_b32_e64 v4, v4, v10, s0 v_cndmask_b32_e32 v2, v2, v10, vcc_lo v_cndmask_b32_e64 v1, v1, v11, s3 v_cndmask_b32_e64 v0, v0, v10, s3 s_cbranch_scc0 .LBB3_20 ; %bb.21: ; %Flow564 ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s0, 0 s_branch .LBB3_24 .LBB3_22: ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s1, -1 s_mov_b32 s0, 0 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 s_branch .LBB3_25 .LBB3_23: ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s0, -1 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 .LBB3_24: ; %Flow575 ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s1, 0 .LBB3_25: ; %Flow574 ; in Loop: Header=BB3_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB3_27 ; %bb.26: ; %LeafBlock ; in Loop: Header=BB3_12 Depth=1 s_cmp_lg_u32 s46, 1 s_mov_b32 s40, -1 s_cselect_b32 s0, -1, 0 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 .LBB3_27: ; %Flow576 ; in Loop: Header=BB3_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB3_45 ; %bb.28: ; in Loop: Header=BB3_12 Depth=1 s_cmp_gt_u32 s46, 2 s_cselect_b32 s0, -1, 0 s_cmp_lt_i32 s46, s42 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB3_33 ; %bb.29: ; in Loop: Header=BB3_12 Depth=1 s_cmp_lg_u32 s46, s42 s_cbranch_scc0 .LBB3_34 ; %bb.30: ; in Loop: Header=BB3_12 Depth=1 s_cmp_lg_u32 s46, s43 s_cbranch_scc1 .LBB3_35 ; %bb.31: ; %.preheader209.preheader ; in Loop: Header=BB3_12 Depth=1 v_dual_mov_b32 v0, v16 :: v_dual_mov_b32 v1, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_mov_b32 v2, v18 :: v_dual_mov_b32 v3, v19 v_dual_mov_b32 v4, v20 :: v_dual_mov_b32 v5, v21 s_delay_alu instid0(VALU_DEP_4) v_dual_mov_b32 v6, v22 :: v_dual_mov_b32 v7, v23 v_dual_mov_b32 v8, v24 :: v_dual_mov_b32 v9, v25 s_mov_b64 s[38:39], 0 s_mov_b32 s40, s11 .LBB3_32: ; %.preheader209 ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x1 scratch_load_b64 v[10:11], off, s40 offset:-40 scratch_load_b64 v[12:13], off, s40 s_cmp_eq_u32 s38, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 2 v_cndmask_b32_e32 v14, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v14, v14, v5, s0 s_cmp_eq_u32 s38, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s3, s40, 40 v_cndmask_b32_e64 v48, v14, v7, s1 scratch_load_b64 v[14:15], off, s3 s_cmp_eq_u32 s38, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_add_i32 s40, s40, 8 s_cmp_eq_u32 s38, 5 s_waitcnt vmcnt(1) v_fma_f64 v[10:11], v[12:13], -4.0, v[10:11] v_cndmask_b32_e32 v12, v0, v2, vcc_lo v_cndmask_b32_e64 v13, v48, v9, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v12, v12, v4, s0 v_cndmask_b32_e64 v12, v12, v6, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v12, v12, v8, s2 s_waitcnt vmcnt(0) v_fma_f64 v[10:11], 0x40140000, v[14:15], v[10:11] v_fma_f64 v[10:11], 0xbfd00000, v[10:11], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v3, v3, v11, vcc_lo v_cndmask_b32_e64 v9, v9, v11, s2 v_cndmask_b32_e64 v8, v8, v10, s2 v_cndmask_b32_e64 v7, v7, v11, s1 v_cndmask_b32_e64 v6, v6, v10, s1 v_cndmask_b32_e64 v5, v5, v11, s0 v_cndmask_b32_e64 v4, v4, v10, s0 v_cndmask_b32_e32 v2, v2, v10, vcc_lo v_cndmask_b32_e64 v1, v1, v11, s3 v_cndmask_b32_e64 v0, v0, v10, s3 s_cbranch_scc0 .LBB3_32 s_branch .LBB3_36 .LBB3_33: ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s0, -1 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 s_branch .LBB3_41 .LBB3_34: ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s0, -1 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 s_branch .LBB3_37 .LBB3_35: ; in Loop: Header=BB3_12 Depth=1 v_dual_mov_b32 v0, v16 :: v_dual_mov_b32 v1, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_mov_b32 v2, v18 :: v_dual_mov_b32 v3, v19 v_dual_mov_b32 v4, v20 :: v_dual_mov_b32 v5, v21 s_delay_alu instid0(VALU_DEP_4) v_dual_mov_b32 v6, v22 :: v_dual_mov_b32 v7, v23 v_dual_mov_b32 v8, v24 :: v_dual_mov_b32 v9, v25 v_dual_mov_b32 v10, v26 :: v_dual_mov_b32 v11, v27 v_dual_mov_b32 v12, v28 :: v_dual_mov_b32 v13, v29 v_dual_mov_b32 v14, v30 :: v_dual_mov_b32 v15, v31 .LBB3_36: ; %Flow566 ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s0, 0 .LBB3_37: ; %Flow568 ; in Loop: Header=BB3_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB3_40 ; %bb.38: ; %.preheader207.preheader ; in Loop: Header=BB3_12 Depth=1 v_mov_b32_e32 v0, v16 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v2, v18 v_mov_b32_e32 v4, v20 s_delay_alu instid0(VALU_DEP_4) v_mov_b32_e32 v6, v22 v_dual_mov_b32 v8, v24 :: v_dual_mov_b32 v9, v25 v_dual_mov_b32 v10, v43 :: v_dual_mov_b32 v1, v17 v_mov_b32_e32 v3, v19 v_mov_b32_e32 v5, v21 v_mov_b32_e32 v7, v23 s_mov_b64 s[38:39], 0 .LBB3_39: ; %.preheader207 ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x3 scratch_load_b64 v[11:12], v10, off offset:-120 scratch_load_b64 v[13:14], v10, off offset:-80 scratch_load_b64 v[48:49], v10, off offset:-40 scratch_load_b64 v[50:51], v10, off s_cmp_eq_u32 s38, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 2 s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s38, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s38, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_cmp_eq_u32 s38, 5 s_waitcnt vmcnt(2) v_fma_f64 v[11:12], v[13:14], -4.0, v[11:12] v_dual_cndmask_b32 v13, v1, v3 :: v_dual_cndmask_b32 v14, v0, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v13, v13, v5, s0 v_cndmask_b32_e64 v14, v14, v4, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v13, v13, v7, s1 v_cndmask_b32_e64 v15, v14, v6, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v14, v13, v9, s2 v_cndmask_b32_e64 v13, v15, v8, s2 s_waitcnt vmcnt(1) v_fma_f64 v[11:12], 0x40180000, v[48:49], v[11:12] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[11:12], v[50:51], -4.0, v[11:12] v_fma_f64 v[11:12], 0xbfd00000, v[11:12], v[13:14] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_cndmask_b32 v3, v3, v12 :: v_dual_add_nc_u32 v10, 8, v10 v_cndmask_b32_e64 v9, v9, v12, s2 v_cndmask_b32_e64 v8, v8, v11, s2 v_cndmask_b32_e64 v7, v7, v12, s1 v_cndmask_b32_e64 v6, v6, v11, s1 v_cndmask_b32_e64 v5, v5, v12, s0 v_cndmask_b32_e64 v4, v4, v11, s0 v_cndmask_b32_e32 v2, v2, v11, vcc_lo v_cndmask_b32_e64 v1, v1, v12, s3 v_cndmask_b32_e64 v0, v0, v11, s3 s_cbranch_scc0 .LBB3_39 .LBB3_40: ; %Flow569 ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s0, 0 .LBB3_41: ; %Flow571 ; in Loop: Header=BB3_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB3_44 ; %bb.42: ; %.preheader206.preheader ; in Loop: Header=BB3_12 Depth=1 v_dual_mov_b32 v0, v16 :: v_dual_mov_b32 v1, v17 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_mov_b32 v2, v18 :: v_dual_mov_b32 v3, v19 v_dual_mov_b32 v4, v20 :: v_dual_mov_b32 v5, v21 s_delay_alu instid0(VALU_DEP_4) v_dual_mov_b32 v6, v22 :: v_dual_mov_b32 v7, v23 v_dual_mov_b32 v8, v24 :: v_dual_mov_b32 v9, v25 s_mov_b64 s[38:39], 0 s_mov_b32 s40, s33 .LBB3_43: ; %.preheader206 ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_clause 0x2 scratch_load_b64 v[10:11], off, s40 offset:-80 scratch_load_b64 v[12:13], off, s40 offset:-40 scratch_load_b64 v[14:15], off, s40 s_cmp_eq_u32 s38, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 2 v_cndmask_b32_e32 v48, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v48, v48, v5, s0 s_cmp_eq_u32 s38, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s3, s40, 40 v_cndmask_b32_e64 v52, v48, v7, s1 scratch_load_b64 v[48:49], off, s3 s_add_i32 s3, s40, 0x50 s_cmp_eq_u32 s38, 0 scratch_load_b64 v[50:51], off, s3 s_cselect_b32 s3, -1, 0 s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_add_i32 s40, s40, 8 s_cmp_eq_u32 s38, 5 s_waitcnt vmcnt(3) v_fma_f64 v[10:11], v[12:13], -4.0, v[10:11] v_cndmask_b32_e32 v12, v0, v2, vcc_lo v_cndmask_b32_e64 v13, v52, v9, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v12, v12, v4, s0 v_cndmask_b32_e64 v12, v12, v6, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v12, v12, v8, s2 s_waitcnt vmcnt(2) v_fma_f64 v[10:11], 0x40180000, v[14:15], v[10:11] s_waitcnt vmcnt(1) v_fma_f64 v[10:11], v[48:49], -4.0, v[10:11] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[10:11], v[50:51], v[10:11] v_fma_f64 v[10:11], 0xbfd00000, v[10:11], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v3, v3, v11, vcc_lo v_cndmask_b32_e64 v9, v9, v11, s2 v_cndmask_b32_e64 v8, v8, v10, s2 v_cndmask_b32_e64 v7, v7, v11, s1 v_cndmask_b32_e64 v6, v6, v10, s1 v_cndmask_b32_e64 v5, v5, v11, s0 v_cndmask_b32_e64 v4, v4, v10, s0 v_cndmask_b32_e32 v2, v2, v10, vcc_lo v_cndmask_b32_e64 v1, v1, v11, s3 v_cndmask_b32_e64 v0, v0, v10, s3 s_cbranch_scc0 .LBB3_43 .LBB3_44: ; %Flow572 ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s40, 0 .LBB3_45: ; %Flow577 ; in Loop: Header=BB3_12 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s40 s_cbranch_vccnz .LBB3_49 ; %bb.46: ; %.preheader211.preheader ; in Loop: Header=BB3_12 Depth=1 s_mov_b64 s[38:39], 0 s_mov_b32 s40, s33 .LBB3_47: ; %.preheader211 ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_cmp_eq_u32 s38, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 2 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v0, v17, v19, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 3 s_cselect_b32 s1, -1, 0 v_cndmask_b32_e64 v0, v0, v21, s0 s_cmp_eq_u32 s38, 4 s_cselect_b32 s2, -1, 0 s_add_i32 s3, s40, 40 s_delay_alu instid0(VALU_DEP_1) v_cndmask_b32_e64 v6, v0, v23, s1 s_clause 0x1 scratch_load_b64 v[0:1], off, s3 scratch_load_b64 v[2:3], off, s40 s_add_i32 s3, s40, 0x50 s_cmp_eq_u32 s38, 0 scratch_load_b64 v[4:5], off, s3 s_cselect_b32 s3, -1, 0 s_add_i32 s40, s40, 8 s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_cmp_eq_u32 s38, 5 s_waitcnt vmcnt(2) v_mul_f64 v[0:1], v[0:1], -4.0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[0:1], 0x40140000, v[2:3], v[0:1] v_cndmask_b32_e32 v2, v16, v18, vcc_lo v_cndmask_b32_e64 v3, v6, v25, s2 v_cndmask_b32_e64 v2, v2, v20, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v2, v2, v22, s1 v_cndmask_b32_e64 v2, v2, v24, s2 s_waitcnt vmcnt(0) v_add_f64 v[0:1], v[4:5], v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[0:1], 0xbfd00000, v[0:1], v[2:3] v_cndmask_b32_e32 v19, v19, v1, vcc_lo v_cndmask_b32_e64 v25, v25, v1, s2 s_delay_alu instid0(VALU_DEP_3) v_cndmask_b32_e64 v24, v24, v0, s2 v_cndmask_b32_e64 v23, v23, v1, s1 v_cndmask_b32_e64 v22, v22, v0, s1 v_cndmask_b32_e64 v21, v21, v1, s0 v_cndmask_b32_e64 v20, v20, v0, s0 v_cndmask_b32_e32 v18, v18, v0, vcc_lo v_cndmask_b32_e64 v17, v17, v1, s3 v_cndmask_b32_e64 v16, v16, v0, s3 s_cbranch_scc0 .LBB3_47 ; %bb.48: ; %Flow573 ; in Loop: Header=BB3_12 Depth=1 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v0, v16 :: v_dual_mov_b32 v1, v17 v_dual_mov_b32 v2, v18 :: v_dual_mov_b32 v3, v19 v_dual_mov_b32 v4, v20 :: v_dual_mov_b32 v5, v21 v_dual_mov_b32 v6, v22 :: v_dual_mov_b32 v7, v23 v_dual_mov_b32 v8, v24 :: v_dual_mov_b32 v9, v25 v_dual_mov_b32 v10, v26 :: v_dual_mov_b32 v11, v27 v_dual_mov_b32 v12, v28 :: v_dual_mov_b32 v13, v29 v_dual_mov_b32 v14, v30 :: v_dual_mov_b32 v15, v31 .LBB3_49: ; %.loopexit ; in Loop: Header=BB3_12 Depth=1 v_mov_b32_e32 v10, v47 s_mov_b64 s[2:3], 0 .LBB3_50: ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_eq_u32 s2, 1 v_ashrrev_i32_e32 v11, 31, v10 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v13, v0, v2 :: v_dual_cndmask_b32 v14, v1, v3 s_cselect_b32 s0, -1, 0 v_lshlrev_b64 v[11:12], 3, v[10:11] s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v13, v13, v4, s0 v_cndmask_b32_e64 v14, v14, v5, s0 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 4 v_add_co_u32 v11, s0, s4, v11 v_dual_cndmask_b32 v13, v13, v6 :: v_dual_cndmask_b32 v14, v14, v7 v_add_co_ci_u32_e64 v12, vcc_lo, s5, v12, s0 s_cselect_b32 vcc_lo, -1, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_cndmask_b32 v13, v13, v8 :: v_dual_add_nc_u32 v10, s45, v10 v_cndmask_b32_e64 v14, -v14, -v9, vcc_lo s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 global_store_b64 v[11:12], v[13:14], off s_cbranch_scc1 .LBB3_50 ; %bb.51: ; %.preheader.preheader ; in Loop: Header=BB3_12 Depth=1 s_mov_b32 s0, 0 .LBB3_52: ; %.preheader ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 v_readfirstlane_b32 s1, v42 v_add_nc_u32_e64 v10, 0xe0, s0 s_add_i32 s39, s0, 0xe0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s1, s1, s0 v_add_nc_u32_e32 v22, 40, v10 s_add_i32 s2, s1, 40 v_add_nc_u32_e32 v20, 0x50, v10 s_add_i32 s3, s1, 0x50 s_add_i32 s38, s1, 0x78 s_addk_i32 s1, 0xa0 s_clause 0x3 scratch_load_b64 v[10:11], off, s2 scratch_load_b64 v[12:13], off, s3 scratch_load_b64 v[14:15], off, s38 scratch_load_b64 v[16:17], off, s1 s_clause 0x1 scratch_load_b64 v[18:19], v22, off scratch_load_b64 v[20:21], v20, off s_add_i32 s1, s0, 16 s_add_i32 s0, s0, 8 s_waitcnt vmcnt(5) scratch_store_b64 off, v[10:11], s1 s_waitcnt vmcnt(4) scratch_store_b64 off, v[12:13], s2 s_waitcnt vmcnt(3) scratch_store_b64 off, v[14:15], s3 s_waitcnt vmcnt(2) scratch_store_b64 off, v[16:17], s38 s_waitcnt vmcnt(1) scratch_store_b64 off, v[18:19], s39 s_waitcnt vmcnt(0) scratch_store_b64 v22, v[20:21], off s_cmp_lg_u32 s0, 40 s_cbranch_scc1 .LBB3_52 ; %bb.53: ; in Loop: Header=BB3_12 Depth=1 v_dual_mov_b32 v12, v28 :: v_dual_mov_b32 v13, v29 v_dual_mov_b32 v28, v30 :: v_dual_mov_b32 v29, v31 v_dual_mov_b32 v10, v26 :: v_dual_mov_b32 v11, v27 v_dual_mov_b32 v26, v32 :: v_dual_mov_b32 v27, v33 s_cmp_ge_i32 s46, s43 s_cbranch_scc1 .LBB3_57 ; %bb.54: ; in Loop: Header=BB3_12 Depth=1 scratch_load_b64 v[14:15], off, off offset:136 s_mov_b32 s0, 0 s_waitcnt vmcnt(0) v_div_scale_f64 v[16:17], null, v[14:15], v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[18:19], v[16:17] s_waitcnt_depctr 0xfff v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0 v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[20:21], -v[16:17], v[18:19], 1.0 v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19] v_div_scale_f64 v[20:21], vcc_lo, 1.0, v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[22:23], v[20:21], v[18:19] v_fma_f64 v[16:17], -v[16:17], v[22:23], v[20:21] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[16:17], v[16:17], v[18:19], v[22:23] v_div_fixup_f64 v[14:15], v[16:17], v[14:15], 1.0 .LBB3_55: ; Parent Loop BB3_12 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e32 v16, s0, v44 v_add_nc_u32_e32 v18, s0, v45 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s0, 32 scratch_load_b64 v[16:17], v16, off s_waitcnt vmcnt(0) v_mul_f64 v[16:17], v[14:15], v[16:17] scratch_store_b64 v18, v[16:17], off s_cbranch_scc1 .LBB3_55 ; %bb.56: ; in Loop: Header=BB3_12 Depth=1 s_clause 0x3 scratch_load_b128 v[14:17], off, off offset:312 scratch_load_b128 v[18:21], off, off offset:144 scratch_load_b64 v[22:23], off, off offset:328 scratch_load_b64 v[24:25], off, off offset:160 s_waitcnt vmcnt(2) v_mul_f64 v[20:21], v[16:17], v[20:21] s_waitcnt vmcnt(1) v_mul_f64 v[30:31], v[22:23], v[22:23] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[18:19], v[14:15], v[18:19], v[20:21] v_fma_f64 v[14:15], v[14:15], v[14:15], v[30:31] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[18:19], v[22:23], v[24:25], v[18:19] v_fma_f64 v[14:15], v[16:17], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_2) v_mul_f64 v[32:33], v[18:19], 0.5 scratch_store_b64 off, v[14:15], off offset:304 .LBB3_57: ; in Loop: Header=BB3_12 Depth=1 v_add_nc_u32_e32 v47, s44, v47 s_add_i32 s0, s46, 1 s_cmp_lg_u32 s46, s43 s_mov_b32 s46, s0 s_cbranch_scc1 .LBB3_12 .LBB3_58: ; %.loopexit217 s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL18exact_rhs_kernel_zPdiii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 352 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 1 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 95 .amdhsa_next_free_sgpr 60 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL18exact_rhs_kernel_zPdiii,"axG",@progbits,_ZL18exact_rhs_kernel_zPdiii,comdat .Lfunc_end3: .size _ZL18exact_rhs_kernel_zPdiii, .Lfunc_end3-_ZL18exact_rhs_kernel_zPdiii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 6096 ; NumSgprs: 62 ; NumVgprs: 95 ; ScratchSize: 352 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 7 ; VGPRBlocks: 11 ; NumSGPRsForWavesPerEU: 62 ; NumVGPRsForWavesPerEU: 95 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .section .text._ZL17initialize_kernelPdiii,"axG",@progbits,_ZL17initialize_kernelPdiii,comdat .globl _ZL17initialize_kernelPdiii ; -- Begin function _ZL17initialize_kernelPdiii .p2align 8 .type _ZL17initialize_kernelPdiii,@function _ZL17initialize_kernelPdiii: ; @_ZL17initialize_kernelPdiii ; %bb.0: v_cvt_f64_i32_e32 v[1:2], s14 s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x8 s_load_b64 s[8:9], s[0:1], 0x0 v_cvt_f64_i32_e32 v[3:4], s15 s_getpc_b64 s[10:11] s_add_u32 s10, s10, dnzm1@rel32@lo+4 s_addc_u32 s11, s11, dnzm1@rel32@hi+12 s_getpc_b64 s[12:13] s_add_u32 s12, s12, dnym1@rel32@lo+4 s_addc_u32 s13, s13, dnym1@rel32@hi+12 s_load_b64 s[0:1], s[10:11], 0x0 s_load_b64 s[12:13], s[12:13], 0x0 s_mov_b32 s3, 0x3ff00000 s_mov_b32 s2, 0 s_delay_alu instid0(SALU_CYCLE_1) v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v5, s2 s_mov_b32 s3, s2 s_mov_b64 s[24:25], 0 ; implicit-def: $sgpr18_sgpr19 ; implicit-def: $sgpr20_sgpr21 ; implicit-def: $sgpr22_sgpr23 s_waitcnt lgkmcnt(0) s_mul_i32 s7, s14, s5 s_add_i32 s10, s14, s6 s_add_i32 s11, s7, s15 s_mul_i32 s16, s10, s5 s_add_i32 s17, s10, s6 s_mul_i32 s10, s11, s4 s_add_i32 s16, s16, s15 v_add_nc_u32_e32 v17, s10, v0 s_mul_i32 s11, s17, s5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s11, s11, s15 v_ashrrev_i32_e32 v18, 31, v17 v_mad_u64_u32 v[7:8], null, s16, s4, v[0:1] v_mad_u64_u32 v[9:10], null, s11, s4, v[0:1] s_delay_alu instid0(VALU_DEP_3) v_lshlrev_b64 v[10:11], 3, v[17:18] v_mul_f64 v[22:23], s[0:1], v[1:2] v_mul_f64 v[18:19], s[12:13], v[3:4] s_add_i32 s16, s17, s6 v_ashrrev_i32_e32 v8, 31, v7 s_mul_i32 s17, s16, s5 v_add_co_u32 v3, vcc_lo, s8, v10 v_add_co_ci_u32_e32 v4, vcc_lo, s9, v11, vcc_lo v_mov_b32_e32 v12, s3 v_lshlrev_b64 v[1:2], 3, v[7:8] s_add_i32 s0, s16, s6 s_add_i32 s17, s17, s15 s_mul_i32 s0, s0, s5 v_ashrrev_i32_e32 v10, 31, v9 s_add_i32 s0, s0, s15 v_add_co_u32 v1, vcc_lo, s8, v1 v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo v_mov_b32_e32 v11, s2 s_delay_alu instid0(VALU_DEP_3) v_mad_u64_u32 v[7:8], null, s17, s4, v[0:1] v_mad_u64_u32 v[13:14], null, s0, s4, v[0:1] s_getpc_b64 s[0:1] s_add_u32 s0, s0, dnxm1@rel32@lo+4 s_addc_u32 s1, s1, dnxm1@rel32@hi+12 global_store_b64 v[3:4], v[5:6], off s_load_b64 s[0:1], s[0:1], 0x0 v_lshlrev_b64 v[3:4], 3, v[9:10] v_ashrrev_i32_e32 v8, 31, v7 global_store_b64 v[1:2], v[11:12], off v_ashrrev_i32_e32 v14, 31, v13 s_getpc_b64 s[2:3] s_add_u32 s2, s2, ce@rel32@lo+4 s_addc_u32 s3, s3, ce@rel32@hi+12 ; implicit-def: $sgpr12_sgpr13 ; implicit-def: $sgpr16_sgpr17 v_lshlrev_b64 v[1:2], 3, v[7:8] v_add_co_u32 v3, vcc_lo, s8, v3 v_lshlrev_b64 v[7:8], 3, v[13:14] v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_co_u32 v1, vcc_lo, s8, v1 v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo v_add_co_u32 v7, vcc_lo, s8, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo s_clause 0x2 global_store_b64 v[3:4], v[11:12], off global_store_b64 v[1:2], v[11:12], off global_store_b64 v[7:8], v[5:6], off .LBB4_1: ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[26:27], s[2:3], 0x118 s_load_b64 s[28:29], s[2:3], 0x190 s_load_b64 s[30:31], s[2:3], 0xa0 s_load_b64 s[34:35], s[2:3], 0xc8 s_load_b64 s[36:37], s[2:3], 0x140 s_load_b64 s[38:39], s[2:3], 0x1b8 s_load_b64 s[40:41], s[2:3], 0xf0 s_load_b64 s[42:43], s[2:3], 0x168 s_cmp_eq_u32 s24, 4 s_waitcnt lgkmcnt(0) v_fma_f64 v[1:2], s[28:29], 0, s[26:27] v_fma_f64 v[3:4], v[18:19], s[38:39], s[36:37] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[1:2], v[1:2], 0, s[30:31] s_clause 0x4 s_load_b64 s[26:27], s[2:3], 0x1e0 s_load_b64 s[28:29], s[2:3], 0x28 s_load_b64 s[30:31], s[2:3], 0x0 s_load_b64 s[36:37], s[2:3], 0x50 s_load_b64 s[38:39], s[2:3], 0x78 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[18:19], v[3:4], s[34:35] s_waitcnt lgkmcnt(0) v_fma_f64 v[5:6], v[22:23], s[26:27], s[42:43] v_fma_f64 v[1:2], v[1:2], 0, s[28:29] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[18:19], v[3:4], s[36:37] v_fma_f64 v[5:6], v[22:23], v[5:6], s[40:41] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[1:2], v[1:2], 0, s[30:31] v_fma_f64 v[5:6], v[22:23], v[5:6], s[38:39] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[1:2], v[18:19], v[3:4], v[1:2] v_fma_f64 v[1:2], v[22:23], v[5:6], v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s11, v2 v_readfirstlane_b32 s26, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) s_cselect_b32 s23, s11, s23 s_cselect_b32 s22, s26, s22 s_cmp_eq_u32 s24, 3 s_cselect_b32 s21, s11, s21 s_cselect_b32 s20, s26, s20 s_cmp_eq_u32 s24, 2 s_cselect_b32 s19, s11, s19 s_cselect_b32 s18, s26, s18 s_cmp_eq_u32 s24, 1 s_cselect_b32 s17, s11, s17 s_cselect_b32 s16, s26, s16 s_cmp_eq_u32 s24, 0 s_cselect_b32 s13, s11, s13 s_cselect_b32 s12, s26, s12 s_add_u32 s24, s24, 1 s_addc_u32 s25, s25, 0 s_add_u32 s2, s2, 8 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s24, 5 s_cbranch_scc1 .LBB4_1 ; %bb.2: ; %_ZL21exact_solution_kerneldddPd.exit.preheader s_mov_b64 s[36:37], 0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, ce@rel32@lo+4 s_addc_u32 s3, s3, ce@rel32@hi+12 ; implicit-def: $sgpr24_sgpr25 ; implicit-def: $sgpr26_sgpr27 ; implicit-def: $sgpr28_sgpr29 ; implicit-def: $sgpr30_sgpr31 ; implicit-def: $sgpr34_sgpr35 .LBB4_3: ; %_ZL21exact_solution_kerneldddPd.exit ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[38:39], s[2:3], 0x118 s_load_b64 s[40:41], s[2:3], 0x190 s_load_b64 s[42:43], s[2:3], 0xa0 s_load_b64 s[44:45], s[2:3], 0xc8 s_load_b64 s[46:47], s[2:3], 0x140 s_load_b64 s[48:49], s[2:3], 0x1b8 s_load_b64 s[50:51], s[2:3], 0xf0 s_load_b64 s[52:53], s[2:3], 0x168 s_cmp_eq_u32 s36, 4 s_waitcnt lgkmcnt(0) v_add_f64 v[1:2], s[38:39], s[40:41] v_fma_f64 v[3:4], v[18:19], s[48:49], s[46:47] s_delay_alu instid0(VALU_DEP_2) v_add_f64 v[1:2], s[42:43], v[1:2] s_clause 0x4 s_load_b64 s[38:39], s[2:3], 0x1e0 s_load_b64 s[40:41], s[2:3], 0x28 s_load_b64 s[42:43], s[2:3], 0x0 s_load_b64 s[46:47], s[2:3], 0x50 s_load_b64 s[48:49], s[2:3], 0x78 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[18:19], v[3:4], s[44:45] s_waitcnt lgkmcnt(0) v_fma_f64 v[5:6], v[22:23], s[38:39], s[52:53] v_add_f64 v[1:2], s[40:41], v[1:2] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[18:19], v[3:4], s[46:47] v_fma_f64 v[5:6], v[22:23], v[5:6], s[50:51] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[1:2], s[42:43], v[1:2] v_fma_f64 v[5:6], v[22:23], v[5:6], s[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[1:2], v[18:19], v[3:4], v[1:2] v_fma_f64 v[1:2], v[22:23], v[5:6], v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s11, v2 v_readfirstlane_b32 s33, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) s_cselect_b32 s35, s11, s35 s_cselect_b32 s34, s33, s34 s_cmp_eq_u32 s36, 3 s_cselect_b32 s31, s11, s31 s_cselect_b32 s30, s33, s30 s_cmp_eq_u32 s36, 2 s_cselect_b32 s29, s11, s29 s_cselect_b32 s28, s33, s28 s_cmp_eq_u32 s36, 1 s_cselect_b32 s27, s11, s27 s_cselect_b32 s26, s33, s26 s_cmp_eq_u32 s36, 0 s_cselect_b32 s25, s11, s25 s_cselect_b32 s24, s33, s24 s_add_u32 s36, s36, 1 s_addc_u32 s37, s37, 0 s_add_u32 s2, s2, 8 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s36, 5 s_cbranch_scc1 .LBB4_3 ; %bb.4: ; %_ZL21exact_solution_kerneldddPd.exit203.preheader v_cvt_f64_i32_e32 v[1:2], v0 s_mov_b64 s[38:39], 0 s_getpc_b64 s[36:37] s_add_u32 s36, s36, ce@rel32@lo+4 s_addc_u32 s37, s37, ce@rel32@hi+12 ; implicit-def: $vgpr3_vgpr4 ; implicit-def: $vgpr5_vgpr6 ; implicit-def: $vgpr7_vgpr8 ; implicit-def: $vgpr9_vgpr10 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[20:21], s[0:1], v[1:2] ; implicit-def: $vgpr1_vgpr2 .LBB4_5: ; %_ZL21exact_solution_kerneldddPd.exit203 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[0:1], s[36:37], 0x118 s_load_b64 s[2:3], s[36:37], 0x190 s_load_b64 s[40:41], s[36:37], 0xa0 s_load_b64 s[42:43], s[36:37], 0xc8 s_load_b64 s[44:45], s[36:37], 0x140 s_load_b64 s[46:47], s[36:37], 0x1b8 s_load_b64 s[48:49], s[36:37], 0xf0 s_load_b64 s[50:51], s[36:37], 0x168 s_cmp_eq_u32 s38, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 3 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[11:12], v[20:21], s[2:3], s[0:1] v_fma_f64 v[13:14], s[46:47], 0, s[44:45] v_fma_f64 v[11:12], v[20:21], v[11:12], s[40:41] s_clause 0x4 s_load_b64 s[0:1], s[36:37], 0x1e0 s_load_b64 s[2:3], s[36:37], 0x28 s_load_b64 s[40:41], s[36:37], 0x0 s_load_b64 s[44:45], s[36:37], 0x50 s_load_b64 s[46:47], s[36:37], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[13:14], v[13:14], 0, s[42:43] s_waitcnt lgkmcnt(0) v_fma_f64 v[15:16], v[22:23], s[0:1], s[50:51] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s38, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[11:12], v[20:21], v[11:12], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s38, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[13:14], v[13:14], 0, s[44:45] s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_add_u32 s36, s36, 8 s_addc_u32 s37, s37, 0 s_cmp_lg_u32 s38, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[15:16], v[22:23], v[15:16], s[48:49] v_fma_f64 v[11:12], v[20:21], v[11:12], s[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[15:16], v[22:23], v[15:16], s[46:47] v_fma_f64 v[11:12], v[13:14], 0, v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[11:12], v[22:23], v[15:16], v[11:12] v_dual_cndmask_b32 v10, v10, v12 :: v_dual_cndmask_b32 v9, v9, v11 v_cndmask_b32_e64 v8, v8, v12, s0 v_cndmask_b32_e64 v7, v7, v11, s0 v_cndmask_b32_e64 v6, v6, v12, s1 v_cndmask_b32_e64 v5, v5, v11, s1 v_cndmask_b32_e64 v4, v4, v12, s2 v_cndmask_b32_e64 v3, v3, v11, s2 v_cndmask_b32_e64 v2, v2, v12, s3 v_cndmask_b32_e64 v1, v1, v11, s3 s_cbranch_scc1 .LBB4_5 ; %bb.6: ; %_ZL21exact_solution_kerneldddPd.exit206.preheader s_mov_b64 s[38:39], 0 s_getpc_b64 s[36:37] s_add_u32 s36, s36, ce@rel32@lo+4 s_addc_u32 s37, s37, ce@rel32@hi+12 ; implicit-def: $vgpr11_vgpr12 ; implicit-def: $vgpr13_vgpr14 ; implicit-def: $vgpr15_vgpr16 ; implicit-def: $vgpr24_vgpr25 ; implicit-def: $vgpr26_vgpr27 .LBB4_7: ; %_ZL21exact_solution_kerneldddPd.exit206 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[0:1], s[36:37], 0x118 s_load_b64 s[2:3], s[36:37], 0x190 s_load_b64 s[40:41], s[36:37], 0xa0 s_load_b64 s[42:43], s[36:37], 0xc8 s_load_b64 s[44:45], s[36:37], 0x140 s_load_b64 s[46:47], s[36:37], 0x1b8 s_load_b64 s[48:49], s[36:37], 0xf0 s_load_b64 s[50:51], s[36:37], 0x168 s_cmp_eq_u32 s38, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[28:29], v[20:21], s[2:3], s[0:1] v_add_f64 v[30:31], s[44:45], s[46:47] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[28:29], v[20:21], v[28:29], s[40:41] s_clause 0x4 s_load_b64 s[0:1], s[36:37], 0x1e0 s_load_b64 s[2:3], s[36:37], 0x28 s_load_b64 s[40:41], s[36:37], 0x0 s_load_b64 s[44:45], s[36:37], 0x50 s_load_b64 s[46:47], s[36:37], 0x78 s_delay_alu instid0(VALU_DEP_2) v_add_f64 v[30:31], s[42:43], v[30:31] s_waitcnt lgkmcnt(0) v_fma_f64 v[32:33], v[22:23], s[0:1], s[50:51] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s38, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[28:29], v[20:21], v[28:29], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s38, 0 s_cselect_b32 s3, -1, 0 v_add_f64 v[30:31], s[44:45], v[30:31] s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_add_u32 s36, s36, 8 s_addc_u32 s37, s37, 0 s_cmp_lg_u32 s38, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[32:33], v[22:23], v[32:33], s[48:49] v_fma_f64 v[28:29], v[20:21], v[28:29], s[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[32:33], v[22:23], v[32:33], s[46:47] v_add_f64 v[28:29], v[30:31], v[28:29] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[28:29], v[22:23], v[32:33], v[28:29] v_dual_cndmask_b32 v27, v27, v29 :: v_dual_cndmask_b32 v26, v26, v28 v_cndmask_b32_e64 v25, v25, v29, s0 v_cndmask_b32_e64 v24, v24, v28, s0 v_cndmask_b32_e64 v16, v16, v29, s1 v_cndmask_b32_e64 v15, v15, v28, s1 v_cndmask_b32_e64 v14, v14, v29, s2 v_cndmask_b32_e64 v13, v13, v28, s2 v_cndmask_b32_e64 v12, v12, v29, s3 v_cndmask_b32_e64 v11, v11, v28, s3 s_cbranch_scc1 .LBB4_7 ; %bb.8: ; %_ZL21exact_solution_kerneldddPd.exit209.preheader s_mov_b64 s[38:39], 0 s_getpc_b64 s[36:37] s_add_u32 s36, s36, ce@rel32@lo+4 s_addc_u32 s37, s37, ce@rel32@hi+12 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr34_vgpr35 ; implicit-def: $vgpr36_vgpr37 .LBB4_9: ; %_ZL21exact_solution_kerneldddPd.exit209 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[0:1], s[36:37], 0x118 s_load_b64 s[2:3], s[36:37], 0x190 s_load_b64 s[40:41], s[36:37], 0xa0 s_load_b64 s[42:43], s[36:37], 0xc8 s_load_b64 s[44:45], s[36:37], 0x140 s_load_b64 s[46:47], s[36:37], 0x1b8 s_load_b64 s[48:49], s[36:37], 0xf0 s_load_b64 s[50:51], s[36:37], 0x168 s_cmp_eq_u32 s38, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[38:39], v[20:21], s[2:3], s[0:1] v_fma_f64 v[40:41], v[18:19], s[46:47], s[44:45] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[38:39], v[20:21], v[38:39], s[40:41] s_clause 0x4 s_load_b64 s[0:1], s[36:37], 0x1e0 s_load_b64 s[2:3], s[36:37], 0x28 s_load_b64 s[40:41], s[36:37], 0x0 s_load_b64 s[44:45], s[36:37], 0x50 s_load_b64 s[46:47], s[36:37], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[40:41], v[18:19], v[40:41], s[42:43] s_waitcnt lgkmcnt(0) v_fma_f64 v[42:43], s[0:1], 0, s[50:51] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s38, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[38:39], v[20:21], v[38:39], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s38, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[40:41], v[18:19], v[40:41], s[44:45] s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_add_u32 s36, s36, 8 s_addc_u32 s37, s37, 0 s_cmp_lg_u32 s38, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[42:43], v[42:43], 0, s[48:49] v_fma_f64 v[38:39], v[20:21], v[38:39], s[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[42:43], v[42:43], 0, s[46:47] v_fma_f64 v[38:39], v[18:19], v[40:41], v[38:39] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[38:39], v[42:43], 0, v[38:39] v_dual_cndmask_b32 v37, v37, v39 :: v_dual_cndmask_b32 v36, v36, v38 v_cndmask_b32_e64 v35, v35, v39, s0 v_cndmask_b32_e64 v34, v34, v38, s0 v_cndmask_b32_e64 v33, v33, v39, s1 v_cndmask_b32_e64 v32, v32, v38, s1 v_cndmask_b32_e64 v31, v31, v39, s2 v_cndmask_b32_e64 v30, v30, v38, s2 v_cndmask_b32_e64 v29, v29, v39, s3 v_cndmask_b32_e64 v28, v28, v38, s3 s_cbranch_scc1 .LBB4_9 ; %bb.10: ; %_ZL21exact_solution_kerneldddPd.exit212.preheader s_mov_b64 s[38:39], 0 s_getpc_b64 s[36:37] s_add_u32 s36, s36, ce@rel32@lo+4 s_addc_u32 s37, s37, ce@rel32@hi+12 ; implicit-def: $vgpr38_vgpr39 ; implicit-def: $vgpr40_vgpr41 ; implicit-def: $vgpr42_vgpr43 ; implicit-def: $vgpr44_vgpr45 ; implicit-def: $vgpr46_vgpr47 .LBB4_11: ; %_ZL21exact_solution_kerneldddPd.exit212 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[0:1], s[36:37], 0x118 s_load_b64 s[2:3], s[36:37], 0x190 s_load_b64 s[40:41], s[36:37], 0xa0 s_load_b64 s[42:43], s[36:37], 0xc8 s_load_b64 s[44:45], s[36:37], 0x140 s_load_b64 s[46:47], s[36:37], 0x1b8 s_load_b64 s[48:49], s[36:37], 0xf0 s_load_b64 s[50:51], s[36:37], 0x168 s_cmp_eq_u32 s38, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s38, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[48:49], v[20:21], s[2:3], s[0:1] v_fma_f64 v[50:51], v[18:19], s[46:47], s[44:45] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[48:49], v[20:21], v[48:49], s[40:41] s_clause 0x4 s_load_b64 s[0:1], s[36:37], 0x1e0 s_load_b64 s[2:3], s[36:37], 0x28 s_load_b64 s[40:41], s[36:37], 0x0 s_load_b64 s[44:45], s[36:37], 0x50 s_load_b64 s[46:47], s[36:37], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[50:51], v[18:19], v[50:51], s[42:43] s_waitcnt lgkmcnt(0) v_add_f64 v[52:53], s[50:51], s[0:1] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s38, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s38, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[48:49], v[20:21], v[48:49], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s38, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[50:51], v[18:19], v[50:51], s[44:45] s_add_u32 s38, s38, 1 s_addc_u32 s39, s39, 0 s_add_u32 s36, s36, 8 s_addc_u32 s37, s37, 0 s_cmp_lg_u32 s38, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[52:53], s[48:49], v[52:53] v_fma_f64 v[48:49], v[20:21], v[48:49], s[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[52:53], s[46:47], v[52:53] v_fma_f64 v[48:49], v[18:19], v[50:51], v[48:49] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[48:49], v[52:53], v[48:49] v_dual_cndmask_b32 v47, v47, v49 :: v_dual_cndmask_b32 v46, v46, v48 v_cndmask_b32_e64 v45, v45, v49, s0 v_cndmask_b32_e64 v44, v44, v48, s0 v_cndmask_b32_e64 v43, v43, v49, s1 v_cndmask_b32_e64 v42, v42, v48, s1 v_cndmask_b32_e64 v41, v41, v49, s2 v_cndmask_b32_e64 v40, v40, v48, s2 v_cndmask_b32_e64 v39, v39, v49, s3 v_cndmask_b32_e64 v38, v38, v48, s3 s_cbranch_scc1 .LBB4_11 ; %bb.12: ; %_ZL21exact_solution_kerneldddPd.exit215.preheader v_add_f64 v[48:49], -v[20:21], 1.0 v_add_f64 v[50:51], -v[18:19], 1.0 v_add_f64 v[52:53], -v[22:23], 1.0 v_mov_b32_e32 v54, v17 s_mul_i32 s33, s6, s5 s_mov_b64 s[36:37], 0 s_mul_i32 s33, s33, s4 .LBB4_13: ; %_ZL21exact_solution_kerneldddPd.exit215 ; =>This Inner Loop Header: Depth=1 s_cmp_eq_u32 s36, 1 s_cselect_b32 vcc_lo, -1, 0 v_dual_cndmask_b32 v55, v12, v14 :: v_dual_cndmask_b32 v56, v2, v4 s_and_b32 s0, vcc_lo, exec_lo v_dual_cndmask_b32 v57, v1, v3 :: v_dual_cndmask_b32 v62, v11, v13 s_cselect_b32 s1, s26, s24 s_cselect_b32 s2, s27, s25 s_cselect_b32 s3, s16, s12 s_cselect_b32 s11, s17, s13 s_cmp_eq_u32 s36, 2 v_cndmask_b32_e32 v61, v28, v30, vcc_lo s_cselect_b32 s0, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 s38, s0, exec_lo v_cndmask_b32_e64 v56, v56, v6, s0 v_cndmask_b32_e64 v57, v57, v5, s0 s_cselect_b32 s2, s29, s2 s_cselect_b32 s38, s28, s1 s_cselect_b32 s11, s19, s11 s_cselect_b32 s3, s18, s3 s_cmp_eq_u32 s36, 3 v_cndmask_b32_e64 v55, v55, v16, s0 s_cselect_b32 s1, -1, 0 v_cndmask_b32_e64 v61, v61, v32, s0 s_and_b32 s39, s1, exec_lo v_cndmask_b32_e64 v58, v56, v8, s1 v_cndmask_b32_e64 v57, v57, v7, s1 s_cselect_b32 s40, s30, s38 s_cselect_b32 s41, s31, s2 s_cselect_b32 s3, s20, s3 s_cselect_b32 s11, s21, s11 s_cmp_eq_u32 s36, 4 v_cndmask_b32_e64 v55, v55, v25, s1 s_cselect_b32 s2, -1, 0 v_cndmask_b32_e64 v62, v62, v15, s0 v_cndmask_b32_e64 v58, v58, v10, s2 v_cndmask_b32_e64 v57, v57, v9, s2 s_and_b32 s38, s2, exec_lo s_cselect_b32 s39, s23, s11 s_cselect_b32 s38, s22, s3 v_cndmask_b32_e64 v56, v55, v27, s2 v_mul_f64 v[59:60], v[48:49], s[38:39] v_mul_f64 v[57:58], v[50:51], v[57:58] v_cndmask_b32_e32 v55, v29, v31, vcc_lo v_cndmask_b32_e64 v61, v61, v34, s1 v_cndmask_b32_e64 v63, v62, v24, s1 s_cselect_b32 s39, s35, s41 s_cselect_b32 s38, s34, s40 v_cndmask_b32_e64 v55, v55, v33, s0 v_cndmask_b32_e64 v61, v61, v36, s2 s_add_u32 s36, s36, 1 s_addc_u32 s37, s37, 0 s_cmp_lg_u32 s36, 5 v_cndmask_b32_e64 v55, v55, v35, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v62, v55, v37, s2 v_cndmask_b32_e64 v55, v63, v26, s2 v_mul_f64 v[61:62], v[52:53], v[61:62] v_fma_f64 v[59:60], v[20:21], s[38:39], v[59:60] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[55:56], v[18:19], v[55:56], v[57:58] v_dual_cndmask_b32 v58, v38, v40 :: v_dual_cndmask_b32 v57, v39, v41 v_cndmask_b32_e64 v58, v58, v42, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v57, v57, v43, s0 v_cndmask_b32_e64 v63, v58, v44, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v57, v57, v45, s1 v_cndmask_b32_e64 v58, v57, v47, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v57, v63, v46, s2 v_fma_f64 v[57:58], v[22:23], v[57:58], v[61:62] v_add_f64 v[61:62], v[59:60], v[55:56] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[61:62], v[57:58], v[61:62] v_fma_f64 v[61:62], -v[59:60], v[55:56], v[61:62] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[61:62], -v[59:60], v[57:58], v[61:62] v_mul_f64 v[59:60], v[59:60], v[55:56] v_fma_f64 v[55:56], -v[55:56], v[57:58], v[61:62] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[56:57], v[57:58], v[59:60], v[55:56] v_ashrrev_i32_e32 v55, 31, v54 v_lshlrev_b64 v[58:59], 3, v[54:55] v_add_nc_u32_e32 v54, s33, v54 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v58, vcc_lo, s8, v58 v_add_co_ci_u32_e32 v59, vcc_lo, s9, v59, vcc_lo global_store_b64 v[58:59], v[56:57], off s_cbranch_scc1 .LBB4_13 ; %bb.14: s_mov_b32 s12, exec_lo ; implicit-def: $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB4_19 ; %bb.15: ; %.preheader264.preheader s_mov_b64 s[2:3], 0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, ce@rel32@lo+4 s_addc_u32 s1, s1, ce@rel32@hi+12 ; implicit-def: $sgpr16_sgpr17 .LBB4_16: ; %.preheader264 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[26:27], s[0:1], 0x118 s_load_b64 s[28:29], s[0:1], 0x190 s_load_b64 s[30:31], s[0:1], 0xa0 s_load_b64 s[34:35], s[0:1], 0xc8 s_load_b64 s[36:37], s[0:1], 0x140 s_load_b64 s[38:39], s[0:1], 0x1b8 s_load_b64 s[40:41], s[0:1], 0xf0 s_load_b64 s[42:43], s[0:1], 0x168 s_cmp_eq_u32 s2, 4 s_waitcnt lgkmcnt(0) v_fma_f64 v[1:2], s[28:29], 0, s[26:27] v_fma_f64 v[3:4], v[18:19], s[38:39], s[36:37] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[1:2], v[1:2], 0, s[30:31] s_clause 0x4 s_load_b64 s[26:27], s[0:1], 0x1e0 s_load_b64 s[28:29], s[0:1], 0x28 s_load_b64 s[30:31], s[0:1], 0x0 s_load_b64 s[36:37], s[0:1], 0x50 s_load_b64 s[38:39], s[0:1], 0x78 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[18:19], v[3:4], s[34:35] s_waitcnt lgkmcnt(0) v_fma_f64 v[5:6], v[22:23], s[26:27], s[42:43] v_fma_f64 v[1:2], v[1:2], 0, s[28:29] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[18:19], v[3:4], s[36:37] v_fma_f64 v[5:6], v[22:23], v[5:6], s[40:41] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[1:2], v[1:2], 0, s[30:31] v_fma_f64 v[5:6], v[22:23], v[5:6], s[38:39] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[1:2], v[18:19], v[3:4], v[1:2] v_fma_f64 v[1:2], v[22:23], v[5:6], v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s11, v2 v_readfirstlane_b32 s13, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) s_cselect_b32 s25, s11, s25 s_cselect_b32 s24, s13, s24 s_cmp_eq_u32 s2, 3 s_cselect_b32 s23, s11, s23 s_cselect_b32 s22, s13, s22 s_cmp_eq_u32 s2, 2 s_cselect_b32 s21, s11, s21 s_cselect_b32 s20, s13, s20 s_cmp_eq_u32 s2, 1 s_cselect_b32 s19, s11, s19 s_cselect_b32 s18, s13, s18 s_cmp_eq_u32 s2, 0 s_cselect_b32 s17, s11, s17 s_cselect_b32 s16, s13, s16 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_cmp_lg_u32 s2, 5 s_cbranch_scc1 .LBB4_16 ; %bb.17: ; %_ZL21exact_solution_kerneldddPd.exit218.preheader v_mov_b32_e32 v1, 0 s_mov_b64 s[0:1], 0 .LBB4_18: ; %_ZL21exact_solution_kerneldddPd.exit218 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s0, 1 s_cselect_b32 s2, s18, s16 s_cselect_b32 s3, s19, s17 s_cmp_eq_u32 s0, 2 s_cselect_b32 s3, s21, s3 s_cselect_b32 s2, s20, s2 s_cmp_eq_u32 s0, 3 s_cselect_b32 s2, s22, s2 s_cselect_b32 s3, s23, s3 s_cmp_eq_u32 s0, 4 s_cselect_b32 s13, s25, s3 s_cselect_b32 s2, s24, s2 s_ashr_i32 s11, s10, 31 v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s13 s_lshl_b64 s[2:3], s[10:11], 3 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s2, s8, s2 s_addc_u32 s3, s9, s3 s_add_u32 s0, s0, 1 s_addc_u32 s1, s1, 0 s_add_i32 s10, s10, s33 s_cmp_lg_u32 s0, 5 global_store_b64 v1, v[2:3], s[2:3] s_cbranch_scc1 .LBB4_18 .LBB4_19: ; %Flow665 s_or_b32 exec_lo, exec_lo, s12 v_dual_mov_b32 v1, s16 :: v_dual_mov_b32 v2, s17 v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19 v_dual_mov_b32 v5, s20 :: v_dual_mov_b32 v6, s21 v_dual_mov_b32 v7, s22 :: v_dual_mov_b32 v8, s23 v_dual_mov_b32 v9, s24 :: v_dual_mov_b32 v10, s25 s_add_i32 s0, s4, -1 s_mov_b32 s10, exec_lo v_dual_mov_b32 v11, s26 :: v_dual_mov_b32 v12, s27 v_dual_mov_b32 v13, s28 :: v_dual_mov_b32 v14, s29 v_dual_mov_b32 v15, s30 :: v_dual_mov_b32 v16, s31 v_cmpx_eq_u32_e64 s0, v0 s_cbranch_execz .LBB4_25 ; %bb.20: ; %.preheader262.preheader s_mov_b64 s[2:3], 0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, ce@rel32@lo+4 s_addc_u32 s1, s1, ce@rel32@hi+12 .LBB4_21: ; %.preheader262 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[12:13], s[0:1], 0x118 s_load_b64 s[26:27], s[0:1], 0x190 s_load_b64 s[28:29], s[0:1], 0xa0 s_load_b64 s[30:31], s[0:1], 0xc8 s_load_b64 s[34:35], s[0:1], 0x140 s_load_b64 s[36:37], s[0:1], 0x1b8 s_load_b64 s[38:39], s[0:1], 0xf0 s_load_b64 s[40:41], s[0:1], 0x168 s_cmp_eq_u32 s2, 4 s_waitcnt lgkmcnt(0) v_add_f64 v[1:2], s[12:13], s[26:27] v_fma_f64 v[3:4], v[18:19], s[36:37], s[34:35] s_delay_alu instid0(VALU_DEP_2) v_add_f64 v[1:2], s[28:29], v[1:2] s_clause 0x4 s_load_b64 s[12:13], s[0:1], 0x1e0 s_load_b64 s[26:27], s[0:1], 0x28 s_load_b64 s[28:29], s[0:1], 0x0 s_load_b64 s[34:35], s[0:1], 0x50 s_load_b64 s[36:37], s[0:1], 0x78 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[18:19], v[3:4], s[30:31] s_waitcnt lgkmcnt(0) v_fma_f64 v[5:6], v[22:23], s[12:13], s[40:41] v_add_f64 v[1:2], s[26:27], v[1:2] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[3:4], v[18:19], v[3:4], s[34:35] v_fma_f64 v[5:6], v[22:23], v[5:6], s[38:39] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[1:2], s[28:29], v[1:2] v_fma_f64 v[5:6], v[22:23], v[5:6], s[36:37] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[1:2], v[18:19], v[3:4], v[1:2] v_fma_f64 v[1:2], v[22:23], v[5:6], v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_readfirstlane_b32 s11, v2 v_readfirstlane_b32 s12, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) s_cselect_b32 s25, s11, s25 s_cselect_b32 s24, s12, s24 s_cmp_eq_u32 s2, 3 s_cselect_b32 s23, s11, s23 s_cselect_b32 s22, s12, s22 s_cmp_eq_u32 s2, 2 s_cselect_b32 s21, s11, s21 s_cselect_b32 s20, s12, s20 s_cmp_eq_u32 s2, 1 s_cselect_b32 s19, s11, s19 s_cselect_b32 s18, s12, s18 s_cmp_eq_u32 s2, 0 s_cselect_b32 s17, s11, s17 s_cselect_b32 s16, s12, s16 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_cmp_lg_u32 s2, 5 s_cbranch_scc1 .LBB4_21 ; %bb.22: ; %_ZL21exact_solution_kerneldddPd.exit221.preheader v_mov_b32_e32 v1, v17 s_mov_b64 s[0:1], 0 .LBB4_23: ; %_ZL21exact_solution_kerneldddPd.exit221 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 s_cmp_eq_u32 s0, 1 s_cselect_b32 s2, s18, s16 s_cselect_b32 s3, s19, s17 s_cmp_eq_u32 s0, 2 v_lshlrev_b64 v[2:3], 3, v[1:2] s_cselect_b32 s3, s21, s3 s_cselect_b32 s2, s20, s2 s_cmp_eq_u32 s0, 3 s_cselect_b32 s2, s22, s2 s_cselect_b32 s3, s23, s3 s_cmp_eq_u32 s0, 4 v_add_co_u32 v2, vcc_lo, s8, v2 s_cselect_b32 s2, s24, s2 s_cselect_b32 s3, s25, s3 v_dual_mov_b32 v4, s2 :: v_dual_add_nc_u32 v1, s33, v1 v_mov_b32_e32 v5, s3 v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo s_add_u32 s0, s0, 1 s_addc_u32 s1, s1, 0 s_cmp_lg_u32 s0, 5 global_store_b64 v[2:3], v[4:5], off s_cbranch_scc1 .LBB4_23 ; %bb.24: ; %Flow662 v_dual_mov_b32 v1, s16 :: v_dual_mov_b32 v2, s17 v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19 v_dual_mov_b32 v5, s20 :: v_dual_mov_b32 v6, s21 v_dual_mov_b32 v7, s22 :: v_dual_mov_b32 v8, s23 v_dual_mov_b32 v9, s24 :: v_dual_mov_b32 v10, s25 v_dual_mov_b32 v11, s26 :: v_dual_mov_b32 v12, s27 v_dual_mov_b32 v13, s28 :: v_dual_mov_b32 v14, s29 v_dual_mov_b32 v15, s30 :: v_dual_mov_b32 v16, s31 .LBB4_25: ; %Flow663 s_or_b32 exec_lo, exec_lo, s10 s_cmp_lg_u32 s15, 0 s_cbranch_scc1 .LBB4_30 ; %bb.26: ; %.preheader260.preheader s_mov_b64 s[12:13], 0 s_getpc_b64 s[10:11] s_add_u32 s10, s10, ce@rel32@lo+4 s_addc_u32 s11, s11, ce@rel32@hi+12 .LBB4_27: ; %.preheader260 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[0:1], s[10:11], 0x118 s_load_b64 s[2:3], s[10:11], 0x190 s_load_b64 s[16:17], s[10:11], 0xa0 s_load_b64 s[18:19], s[10:11], 0xc8 s_load_b64 s[20:21], s[10:11], 0x140 s_load_b64 s[22:23], s[10:11], 0x1b8 s_load_b64 s[24:25], s[10:11], 0xf0 s_load_b64 s[26:27], s[10:11], 0x168 s_cmp_eq_u32 s12, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s12, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[11:12], v[20:21], s[2:3], s[0:1] v_fma_f64 v[13:14], s[22:23], 0, s[20:21] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[11:12], v[20:21], v[11:12], s[16:17] s_clause 0x4 s_load_b64 s[0:1], s[10:11], 0x1e0 s_load_b64 s[2:3], s[10:11], 0x28 s_load_b64 s[16:17], s[10:11], 0x0 s_load_b64 s[20:21], s[10:11], 0x50 s_load_b64 s[22:23], s[10:11], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[13:14], v[13:14], 0, s[18:19] s_waitcnt lgkmcnt(0) v_fma_f64 v[15:16], v[22:23], s[0:1], s[26:27] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s12, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s12, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[11:12], v[20:21], v[11:12], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s12, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[13:14], v[13:14], 0, s[20:21] s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s12, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[15:16], v[22:23], v[15:16], s[24:25] v_fma_f64 v[11:12], v[20:21], v[11:12], s[16:17] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[15:16], v[22:23], v[15:16], s[22:23] v_fma_f64 v[11:12], v[13:14], 0, v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[11:12], v[22:23], v[15:16], v[11:12] v_dual_cndmask_b32 v10, v10, v12 :: v_dual_cndmask_b32 v9, v9, v11 v_cndmask_b32_e64 v8, v8, v12, s0 v_cndmask_b32_e64 v7, v7, v11, s0 v_cndmask_b32_e64 v6, v6, v12, s1 v_cndmask_b32_e64 v5, v5, v11, s1 v_cndmask_b32_e64 v4, v4, v12, s2 v_cndmask_b32_e64 v3, v3, v11, s2 v_cndmask_b32_e64 v2, v2, v12, s3 v_cndmask_b32_e64 v1, v1, v11, s3 s_cbranch_scc1 .LBB4_27 ; %bb.28: ; %_ZL21exact_solution_kerneldddPd.exit224.preheader s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, s7, s4, v[0:1] s_mov_b64 s[2:3], 0 .LBB4_29: ; %_ZL21exact_solution_kerneldddPd.exit224 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_eq_u32 s2, 1 v_ashrrev_i32_e32 v12, 31, v11 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v14, v2, v4 :: v_dual_cndmask_b32 v15, v1, v3 s_cselect_b32 s0, -1, 0 v_lshlrev_b64 v[12:13], 3, v[11:12] s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v14, v14, v6, s0 v_cndmask_b32_e64 v15, v15, v5, s0 s_cselect_b32 vcc_lo, -1, 0 v_add_nc_u32_e32 v11, s33, v11 v_add_co_u32 v12, s0, s8, v12 v_cndmask_b32_e32 v14, v14, v8, vcc_lo v_cndmask_b32_e32 v16, v15, v7, vcc_lo s_cmp_eq_u32 s2, 4 v_add_co_ci_u32_e64 v13, vcc_lo, s9, v13, s0 s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s2, s2, 1 v_dual_cndmask_b32 v15, v14, v10 :: v_dual_cndmask_b32 v14, v16, v9 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 global_store_b64 v[12:13], v[14:15], off s_cbranch_scc1 .LBB4_29 .LBB4_30: ; %.loopexit259 s_add_i32 s0, s5, -1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s15, s0 s_cbranch_scc1 .LBB4_35 ; %bb.31: ; %.preheader258.preheader s_mov_b64 s[12:13], 0 s_getpc_b64 s[10:11] s_add_u32 s10, s10, ce@rel32@lo+4 s_addc_u32 s11, s11, ce@rel32@hi+12 .LBB4_32: ; %.preheader258 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[0:1], s[10:11], 0x118 s_load_b64 s[2:3], s[10:11], 0x190 s_load_b64 s[16:17], s[10:11], 0xa0 s_load_b64 s[18:19], s[10:11], 0xc8 s_load_b64 s[20:21], s[10:11], 0x140 s_load_b64 s[22:23], s[10:11], 0x1b8 s_load_b64 s[24:25], s[10:11], 0xf0 s_load_b64 s[26:27], s[10:11], 0x168 s_cmp_eq_u32 s12, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s12, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[11:12], v[20:21], s[2:3], s[0:1] v_add_f64 v[13:14], s[20:21], s[22:23] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[11:12], v[20:21], v[11:12], s[16:17] s_clause 0x4 s_load_b64 s[0:1], s[10:11], 0x1e0 s_load_b64 s[2:3], s[10:11], 0x28 s_load_b64 s[16:17], s[10:11], 0x0 s_load_b64 s[20:21], s[10:11], 0x50 s_load_b64 s[22:23], s[10:11], 0x78 s_delay_alu instid0(VALU_DEP_2) v_add_f64 v[13:14], s[18:19], v[13:14] s_waitcnt lgkmcnt(0) v_fma_f64 v[15:16], v[22:23], s[0:1], s[26:27] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s12, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s12, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[11:12], v[20:21], v[11:12], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s12, 0 s_cselect_b32 s3, -1, 0 v_add_f64 v[13:14], s[20:21], v[13:14] s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s12, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[15:16], v[22:23], v[15:16], s[24:25] v_fma_f64 v[11:12], v[20:21], v[11:12], s[16:17] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[15:16], v[22:23], v[15:16], s[22:23] v_add_f64 v[11:12], v[13:14], v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[11:12], v[22:23], v[15:16], v[11:12] v_dual_cndmask_b32 v10, v10, v12 :: v_dual_cndmask_b32 v9, v9, v11 v_cndmask_b32_e64 v8, v8, v12, s0 v_cndmask_b32_e64 v7, v7, v11, s0 v_cndmask_b32_e64 v6, v6, v12, s1 v_cndmask_b32_e64 v5, v5, v11, s1 v_cndmask_b32_e64 v4, v4, v12, s2 v_cndmask_b32_e64 v3, v3, v11, s2 v_cndmask_b32_e64 v2, v2, v12, s3 v_cndmask_b32_e64 v1, v1, v11, s3 s_cbranch_scc1 .LBB4_32 ; %bb.33: ; %_ZL21exact_solution_kerneldddPd.exit227.preheader v_mov_b32_e32 v11, v17 s_mov_b64 s[2:3], 0 .LBB4_34: ; %_ZL21exact_solution_kerneldddPd.exit227 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_eq_u32 s2, 1 v_ashrrev_i32_e32 v12, 31, v11 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v14, v2, v4 :: v_dual_cndmask_b32 v15, v1, v3 s_cselect_b32 s0, -1, 0 v_lshlrev_b64 v[12:13], 3, v[11:12] s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v14, v14, v6, s0 v_cndmask_b32_e64 v15, v15, v5, s0 s_cselect_b32 vcc_lo, -1, 0 v_add_nc_u32_e32 v11, s33, v11 v_add_co_u32 v12, s0, s8, v12 v_cndmask_b32_e32 v14, v14, v8, vcc_lo v_cndmask_b32_e32 v16, v15, v7, vcc_lo s_cmp_eq_u32 s2, 4 v_add_co_ci_u32_e64 v13, vcc_lo, s9, v13, s0 s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s2, s2, 1 v_dual_cndmask_b32 v15, v14, v10 :: v_dual_cndmask_b32 v14, v16, v9 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 global_store_b64 v[12:13], v[14:15], off s_cbranch_scc1 .LBB4_34 .LBB4_35: ; %.loopexit257 s_cmp_lg_u32 s14, 0 s_cbranch_scc1 .LBB4_40 ; %bb.36: ; %.preheader256.preheader s_mov_b64 s[12:13], 0 s_getpc_b64 s[10:11] s_add_u32 s10, s10, ce@rel32@lo+4 s_addc_u32 s11, s11, ce@rel32@hi+12 .LBB4_37: ; %.preheader256 ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[0:1], s[10:11], 0x118 s_load_b64 s[2:3], s[10:11], 0x190 s_load_b64 s[16:17], s[10:11], 0xa0 s_load_b64 s[18:19], s[10:11], 0xc8 s_load_b64 s[20:21], s[10:11], 0x140 s_load_b64 s[22:23], s[10:11], 0x1b8 s_load_b64 s[24:25], s[10:11], 0xf0 s_load_b64 s[26:27], s[10:11], 0x168 s_cmp_eq_u32 s12, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s12, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[11:12], v[20:21], s[2:3], s[0:1] v_fma_f64 v[13:14], v[18:19], s[22:23], s[20:21] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[11:12], v[20:21], v[11:12], s[16:17] s_clause 0x4 s_load_b64 s[0:1], s[10:11], 0x1e0 s_load_b64 s[2:3], s[10:11], 0x28 s_load_b64 s[16:17], s[10:11], 0x0 s_load_b64 s[20:21], s[10:11], 0x50 s_load_b64 s[22:23], s[10:11], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[13:14], v[18:19], v[13:14], s[18:19] s_waitcnt lgkmcnt(0) v_fma_f64 v[15:16], s[0:1], 0, s[26:27] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s12, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s12, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[11:12], v[20:21], v[11:12], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s12, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[13:14], v[18:19], v[13:14], s[20:21] s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s12, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[15:16], v[15:16], 0, s[24:25] v_fma_f64 v[11:12], v[20:21], v[11:12], s[16:17] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[15:16], v[15:16], 0, s[22:23] v_fma_f64 v[11:12], v[18:19], v[13:14], v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[11:12], v[15:16], 0, v[11:12] v_dual_cndmask_b32 v10, v10, v12 :: v_dual_cndmask_b32 v9, v9, v11 v_cndmask_b32_e64 v8, v8, v12, s0 v_cndmask_b32_e64 v7, v7, v11, s0 v_cndmask_b32_e64 v6, v6, v12, s1 v_cndmask_b32_e64 v5, v5, v11, s1 v_cndmask_b32_e64 v4, v4, v12, s2 v_cndmask_b32_e64 v3, v3, v11, s2 v_cndmask_b32_e64 v2, v2, v12, s3 v_cndmask_b32_e64 v1, v1, v11, s3 s_cbranch_scc1 .LBB4_37 ; %bb.38: ; %_ZL21exact_solution_kerneldddPd.exit230.preheader s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, s15, s4, v[0:1] s_mov_b64 s[2:3], 0 .LBB4_39: ; %_ZL21exact_solution_kerneldddPd.exit230 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_eq_u32 s2, 1 v_ashrrev_i32_e32 v12, 31, v11 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_cndmask_b32_e32 v0, v2, v4, vcc_lo v_cndmask_b32_e32 v14, v1, v3, vcc_lo s_cselect_b32 s0, -1, 0 v_lshlrev_b64 v[12:13], 3, v[11:12] v_add_nc_u32_e32 v11, s33, v11 v_cndmask_b32_e64 v0, v0, v6, s0 v_cndmask_b32_e64 v14, v14, v5, s0 s_cmp_eq_u32 s2, 3 s_cselect_b32 vcc_lo, -1, 0 v_add_co_u32 v12, s0, s8, v12 v_cndmask_b32_e32 v0, v0, v8, vcc_lo v_cndmask_b32_e32 v14, v14, v7, vcc_lo s_cmp_eq_u32 s2, 4 v_add_co_ci_u32_e64 v13, vcc_lo, s9, v13, s0 s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s2, s2, 1 v_dual_cndmask_b32 v15, v0, v10 :: v_dual_cndmask_b32 v14, v14, v9 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 global_store_b64 v[12:13], v[14:15], off s_cbranch_scc1 .LBB4_39 .LBB4_40: ; %.loopexit255 s_add_i32 s0, s6, -1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s14, s0 s_cbranch_scc1 .LBB4_45 ; %bb.41: ; %.preheader.preheader s_mov_b64 s[6:7], 0 s_getpc_b64 s[4:5] s_add_u32 s4, s4, ce@rel32@lo+4 s_addc_u32 s5, s5, ce@rel32@hi+12 .LBB4_42: ; %.preheader ; =>This Inner Loop Header: Depth=1 s_clause 0x7 s_load_b64 s[0:1], s[4:5], 0x118 s_load_b64 s[2:3], s[4:5], 0x190 s_load_b64 s[10:11], s[4:5], 0xa0 s_load_b64 s[12:13], s[4:5], 0xc8 s_load_b64 s[14:15], s[4:5], 0x140 s_load_b64 s[16:17], s[4:5], 0x1b8 s_load_b64 s[18:19], s[4:5], 0xf0 s_load_b64 s[20:21], s[4:5], 0x168 s_cmp_eq_u32 s6, 4 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 3 s_waitcnt lgkmcnt(0) v_fma_f64 v[11:12], v[20:21], s[2:3], s[0:1] v_fma_f64 v[13:14], v[18:19], s[16:17], s[14:15] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[11:12], v[20:21], v[11:12], s[10:11] s_clause 0x4 s_load_b64 s[0:1], s[4:5], 0x1e0 s_load_b64 s[2:3], s[4:5], 0x28 s_load_b64 s[10:11], s[4:5], 0x0 s_load_b64 s[14:15], s[4:5], 0x50 s_load_b64 s[16:17], s[4:5], 0x78 s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[13:14], v[18:19], v[13:14], s[12:13] s_waitcnt lgkmcnt(0) v_add_f64 v[15:16], s[20:21], s[0:1] s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 2 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[11:12], v[20:21], v[11:12], s[2:3] s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 v_fma_f64 v[13:14], v[18:19], v[13:14], s[14:15] s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_add_u32 s4, s4, 8 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s6, 5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[15:16], s[18:19], v[15:16] v_fma_f64 v[11:12], v[20:21], v[11:12], s[10:11] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[15:16], s[16:17], v[15:16] v_fma_f64 v[11:12], v[18:19], v[13:14], v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[11:12], v[15:16], v[11:12] v_dual_cndmask_b32 v10, v10, v12 :: v_dual_cndmask_b32 v9, v9, v11 v_cndmask_b32_e64 v8, v8, v12, s0 v_cndmask_b32_e64 v7, v7, v11, s0 v_cndmask_b32_e64 v6, v6, v12, s1 v_cndmask_b32_e64 v5, v5, v11, s1 v_cndmask_b32_e64 v4, v4, v12, s2 v_cndmask_b32_e64 v3, v3, v11, s2 v_cndmask_b32_e64 v2, v2, v12, s3 v_cndmask_b32_e64 v1, v1, v11, s3 s_cbranch_scc1 .LBB4_42 ; %bb.43: ; %_ZL21exact_solution_kerneldddPd.exit233.preheader s_mov_b64 s[2:3], 0 .LBB4_44: ; %_ZL21exact_solution_kerneldddPd.exit233 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s2, 1 v_ashrrev_i32_e32 v18, 31, v17 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 2 v_dual_cndmask_b32 v0, v2, v4 :: v_dual_cndmask_b32 v13, v1, v3 s_cselect_b32 s0, -1, 0 v_lshlrev_b64 v[11:12], 3, v[17:18] s_cmp_eq_u32 s2, 3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v0, v0, v6, s0 v_cndmask_b32_e64 v13, v13, v5, s0 s_cselect_b32 vcc_lo, -1, 0 v_add_nc_u32_e32 v17, s33, v17 v_add_co_u32 v11, s0, s8, v11 v_dual_cndmask_b32 v0, v0, v8 :: v_dual_cndmask_b32 v13, v13, v7 s_cmp_eq_u32 s2, 4 v_add_co_ci_u32_e64 v12, vcc_lo, s9, v12, s0 s_cselect_b32 vcc_lo, -1, 0 s_add_u32 s2, s2, 1 v_dual_cndmask_b32 v14, v0, v10 :: v_dual_cndmask_b32 v13, v13, v9 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 global_store_b64 v[11:12], v[13:14], off s_cbranch_scc1 .LBB4_44 .LBB4_45: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL17initialize_kernelPdiii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 20 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 64 .amdhsa_next_free_sgpr 54 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL17initialize_kernelPdiii,"axG",@progbits,_ZL17initialize_kernelPdiii,comdat .Lfunc_end4: .size _ZL17initialize_kernelPdiii, .Lfunc_end4-_ZL17initialize_kernelPdiii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 6720 ; NumSgprs: 56 ; NumVgprs: 64 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 6 ; VGPRBlocks: 7 ; NumSGPRsForWavesPerEU: 56 ; NumVGPRsForWavesPerEU: 64 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii,"axG",@progbits,_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii,comdat .globl _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii ; -- Begin function _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .p2align 8 .type _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii,@function _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii: ; @_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii ; %bb.0: s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x40 s_load_b512 s[16:31], s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_mul_i32 s2, s15, s5 s_add_i32 s0, s15, s6 s_add_i32 s2, s2, s14 s_mul_i32 s1, s0, s5 v_mad_u64_u32 v[1:2], null, s2, s4, v[0:1] s_add_i32 s1, s1, s14 s_add_i32 s0, s0, s6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[1:2], 3, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s30, v1 v_add_co_ci_u32_e32 v4, vcc_lo, s31, v2, vcc_lo global_load_b64 v[3:4], v[3:4], off s_waitcnt vmcnt(0) v_div_scale_f64 v[5:6], null, v[3:4], v[3:4], 1.0 v_div_scale_f64 v[11:12], vcc_lo, 1.0, v[3:4], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[7:8], v[5:6] s_waitcnt_depctr 0xfff v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0 v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0 v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[9:10], v[11:12], v[7:8] v_fma_f64 v[5:6], -v[5:6], v[9:10], v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[9:10] v_add_co_u32 v7, vcc_lo, s16, v1 v_add_co_ci_u32_e32 v8, vcc_lo, s17, v2, vcc_lo v_div_fixup_f64 v[3:4], v[5:6], v[3:4], 1.0 v_mad_u64_u32 v[5:6], null, s1, s4, v[0:1] s_mul_i32 s1, s0, s5 s_add_i32 s0, s0, s6 s_add_i32 s1, s1, s14 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[9:10], null, s1, s4, v[0:1] v_ashrrev_i32_e32 v6, 31, v5 s_mul_i32 s1, s0, s5 s_add_i32 s0, s0, s6 s_add_i32 s1, s1, s14 s_mul_i32 s0, s0, s5 v_lshlrev_b64 v[5:6], 3, v[5:6] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v10, 31, v9 s_add_i32 s0, s0, s14 v_lshlrev_b64 v[9:10], 3, v[9:10] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v5, vcc_lo, s30, v5 v_add_co_ci_u32_e32 v6, vcc_lo, s31, v6, vcc_lo v_add_co_u32 v11, vcc_lo, s18, v1 v_add_co_ci_u32_e32 v12, vcc_lo, s19, v2, vcc_lo v_add_co_u32 v9, vcc_lo, s30, v9 v_add_co_ci_u32_e32 v10, vcc_lo, s31, v10, vcc_lo v_add_co_u32 v13, vcc_lo, s20, v1 v_add_co_ci_u32_e32 v14, vcc_lo, s21, v2, vcc_lo global_store_b64 v[7:8], v[3:4], off global_load_b64 v[7:8], v[5:6], off s_waitcnt vmcnt(0) v_mul_f64 v[7:8], v[3:4], v[7:8] global_store_b64 v[11:12], v[7:8], off global_load_b64 v[7:8], v[9:10], off v_mad_u64_u32 v[11:12], null, s1, s4, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v12, 31, v11 v_lshlrev_b64 v[11:12], 3, v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, s30, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s31, v12, vcc_lo s_waitcnt vmcnt(0) v_mul_f64 v[7:8], v[3:4], v[7:8] global_store_b64 v[13:14], v[7:8], off global_load_b64 v[7:8], v[11:12], off v_add_co_u32 v13, vcc_lo, s22, v1 v_add_co_ci_u32_e32 v14, vcc_lo, s23, v2, vcc_lo s_waitcnt vmcnt(0) v_mul_f64 v[7:8], v[3:4], v[7:8] global_store_b64 v[13:14], v[7:8], off s_clause 0x2 global_load_b64 v[7:8], v[9:10], off global_load_b64 v[5:6], v[5:6], off global_load_b64 v[9:10], v[11:12], off v_mad_u64_u32 v[11:12], null, s0, s4, v[0:1] v_add_co_u32 v13, vcc_lo, s28, v1 v_add_co_ci_u32_e32 v14, vcc_lo, s29, v2, vcc_lo v_add_co_u32 v15, vcc_lo, s26, v1 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v12, 31, v11 v_add_co_ci_u32_e32 v16, vcc_lo, s27, v2, vcc_lo s_mov_b32 s0, 0x1eb851eb s_mov_b32 s1, 0x3fe1eb85 v_lshlrev_b64 v[11:12], 3, v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, s30, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s31, v12, vcc_lo s_waitcnt vmcnt(2) v_mul_f64 v[7:8], v[7:8], v[7:8] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[5:6], v[5:6], v[5:6], v[7:8] s_waitcnt vmcnt(0) v_fma_f64 v[5:6], v[9:10], v[9:10], v[5:6] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[5:6], v[5:6], 0.5 v_mul_f64 v[7:8], v[3:4], v[5:6] s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[9:10], v[3:4], v[7:8] global_store_b64 v[13:14], v[7:8], off global_store_b64 v[15:16], v[9:10], off global_load_b64 v[7:8], v[11:12], off v_mul_f64 v[9:10], v[3:4], s[0:1] s_waitcnt vmcnt(0) v_fma_f64 v[3:4], -v[3:4], v[5:6], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[3:4], v[9:10], v[3:4] v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[3:4] v_cndmask_b32_e64 v0, 0, 1, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v0, 8, v0 v_ldexp_f64 v[3:4], v[3:4], v0 v_cndmask_b32_e64 v0, 0, 0xffffff80, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_rsq_f64_e32 v[5:6], v[3:4] v_cmp_class_f64_e64 vcc_lo, v[3:4], 0x260 s_waitcnt_depctr 0xfff v_mul_f64 v[7:8], v[3:4], v[5:6] v_mul_f64 v[5:6], v[5:6], 0.5 v_fma_f64 v[9:10], -v[5:6], v[7:8], 0.5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8] v_fma_f64 v[5:6], v[5:6], v[9:10], v[5:6] v_fma_f64 v[9:10], -v[7:8], v[7:8], v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[7:8], v[9:10], v[5:6], v[7:8] v_fma_f64 v[9:10], -v[7:8], v[7:8], v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[5:6], v[9:10], v[5:6], v[7:8] v_ldexp_f64 v[5:6], v[5:6], v0 s_delay_alu instid0(VALU_DEP_1) v_dual_cndmask_b32 v3, v5, v3 :: v_dual_cndmask_b32 v4, v6, v4 v_add_co_u32 v0, vcc_lo, s24, v1 v_add_co_ci_u32_e32 v1, vcc_lo, s25, v2, vcc_lo global_store_b64 v[0:1], v[3:4], off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 76 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 17 .amdhsa_next_free_sgpr 32 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii,"axG",@progbits,_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii,comdat .Lfunc_end5: .size _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii, .Lfunc_end5-_ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 932 ; NumSgprs: 34 ; NumVgprs: 17 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 34 ; NumVGPRsForWavesPerEU: 17 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii,"axG",@progbits,_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii,comdat .globl _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii ; -- Begin function _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .p2align 8 .type _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii,@function _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii: ; @_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii ; %bb.0: s_clause 0x1 s_load_b128 s[8:11], s[0:1], 0x48 s_load_b512 s[16:31], s[0:1], 0x0 s_mov_b64 s[6:7], 0 ; implicit-def: $vgpr1_vgpr2 v_mov_b32_e32 v46, v0 s_waitcnt lgkmcnt(0) s_mul_i32 s35, s15, s9 s_mul_i32 s33, s10, s9 s_add_i32 s36, s14, s35 s_mul_i32 s33, s33, s8 s_mul_i32 s11, s8, s36 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v13, s11, v0 v_mov_b32_e32 v11, v13 .LBB6_1: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v12, 31, v11 s_cmp_eq_u32 s6, 4 v_lshlrev_b64 v[14:15], 3, v[11:12] v_add_nc_u32_e32 v11, s33, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v14, vcc_lo, s30, v14 v_add_co_ci_u32_e32 v15, vcc_lo, s31, v15, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s2, -1, 0 global_load_b64 v[14:15], v[14:15], off s_cmp_eq_u32 s6, 2 s_cselect_b32 s3, -1, 0 s_cmp_eq_u32 s6, 1 s_cselect_b32 s4, -1, 0 s_cmp_eq_u32 s6, 0 s_cselect_b32 s5, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 5 s_waitcnt vmcnt(0) v_dual_cndmask_b32 v10, v10, v15 :: v_dual_cndmask_b32 v9, v9, v14 v_cndmask_b32_e64 v8, v8, v15, s2 v_cndmask_b32_e64 v7, v7, v14, s2 v_cndmask_b32_e64 v6, v6, v15, s3 v_cndmask_b32_e64 v5, v5, v14, s3 v_cndmask_b32_e64 v4, v4, v15, s4 v_cndmask_b32_e64 v3, v3, v14, s4 v_cndmask_b32_e64 v2, v2, v15, s5 v_cndmask_b32_e64 v1, v1, v14, s5 s_cbranch_scc1 .LBB6_1 ; %bb.2: s_cmp_lt_i32 s15, 1 s_cbranch_scc1 .LBB6_98 ; %bb.3: s_add_i32 s2, s10, -1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) s_cmp_ge_i32 s15, s2 s_cselect_b32 s2, -1, 0 s_cmp_lt_i32 s14, 1 s_cselect_b32 s3, -1, 0 s_or_b32 s2, s3, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s2 s_cbranch_vccnz .LBB6_98 ; %bb.4: s_add_i32 s2, s9, -1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_cmp_lt_i32 s14, s2 s_cselect_b32 s3, -1, 0 s_add_i32 s2, s8, -1 v_cmp_gt_i32_e32 vcc_lo, s2, v0 v_cmp_ne_u32_e64 s2, 0, v0 s_and_b32 s3, s3, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_b32 s2, s3, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s30, s2 s_cbranch_execz .LBB6_97 ; %bb.5: v_mad_u64_u32 v[11:12], null, s14, s8, v[0:1] s_mul_i32 s34, s9, s8 s_load_b64 s[4:5], s[0:1], 0x40 s_mul_i32 s39, s34, s15 s_add_i32 s0, s15, s10 s_mul_i32 s31, s10, 3 s_mul_i32 s38, s0, s9 s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v14, s39, v11 s_add_i32 s0, s0, s31 s_add_i32 s1, s38, s14 s_mul_i32 s40, s0, s9 s_mul_i32 s1, s1, s8 s_add_i32 s2, s40, s14 v_add_nc_u32_e32 v16, 1, v14 s_mul_i32 s2, s2, s8 v_ashrrev_i32_e32 v15, 31, v14 v_add_nc_u32_e32 v22, s2, v0 s_ashr_i32 s3, s1, 31 v_ashrrev_i32_e32 v17, 31, v16 s_lshl_b32 s37, s10, 1 v_lshlrev_b64 v[18:19], 3, v[14:15] v_ashrrev_i32_e32 v23, 31, v22 v_add_nc_u32_e32 v14, -1, v14 v_lshlrev_b64 v[16:17], 3, v[16:17] s_sub_i32 s0, s0, s37 s_mov_b32 s50, 0x55555555 v_add_co_u32 v20, vcc_lo, s18, v18 v_lshlrev_b64 v[22:23], 3, v[22:23] v_add_co_ci_u32_e32 v21, vcc_lo, s19, v19, vcc_lo v_add_co_u32 v26, vcc_lo, s18, v16 v_add_co_ci_u32_e32 v27, vcc_lo, s19, v17, vcc_lo s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v22, vcc_lo, s4, v22 v_add_co_ci_u32_e32 v23, vcc_lo, s5, v23, vcc_lo global_load_b64 v[34:35], v[20:21], off v_add_nc_u32_e32 v20, s1, v0 v_add_co_u32 v24, s1, s1, v0 global_load_b64 v[40:41], v[22:23], off v_ashrrev_i32_e32 v15, 31, v14 v_add_co_ci_u32_e64 v25, null, s3, 0, s1 v_ashrrev_i32_e32 v21, 31, v20 s_ashr_i32 s3, s2, 31 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[36:37], 3, v[14:15] v_lshlrev_b64 v[14:15], 3, v[24:25] v_add_co_u32 v24, s2, s2, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_co_ci_u32_e64 v25, null, s3, 0, s2 v_lshlrev_b64 v[20:21], 3, v[20:21] v_add_co_u32 v38, vcc_lo, s4, v14 v_add_co_ci_u32_e32 v39, vcc_lo, s5, v15, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[14:15], 3, v[24:25] v_add_co_u32 v20, vcc_lo, s4, v20 v_add_co_ci_u32_e32 v21, vcc_lo, s5, v21, vcc_lo s_clause 0x1 global_load_b64 v[42:43], v[38:39], off offset:8 global_load_b64 v[44:45], v[20:21], off v_add_co_u32 v14, vcc_lo, s4, v14 v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo v_add_co_u32 v20, vcc_lo, s20, v16 v_add_co_ci_u32_e32 v21, vcc_lo, s21, v17, vcc_lo v_add_co_u32 v22, vcc_lo, s16, v16 v_add_co_ci_u32_e32 v23, vcc_lo, s17, v17, vcc_lo v_add_co_u32 v24, vcc_lo, s16, v18 v_add_co_ci_u32_e32 v25, vcc_lo, s17, v19, vcc_lo v_add_co_u32 v28, vcc_lo, s20, v18 v_add_co_ci_u32_e32 v29, vcc_lo, s21, v19, vcc_lo global_load_b64 v[47:48], v[14:15], off offset:8 s_clause 0x1 global_load_b64 v[49:50], v[22:23], off global_load_b64 v[51:52], v[24:25], off s_clause 0x1 global_load_b64 v[53:54], v[20:21], off global_load_b64 v[24:25], v[28:29], off v_add_co_u32 v22, vcc_lo, s26, v16 v_add_co_ci_u32_e32 v23, vcc_lo, s27, v17, vcc_lo v_add_co_u32 v20, vcc_lo, s26, v36 v_add_co_ci_u32_e32 v21, vcc_lo, s27, v37, vcc_lo global_load_b64 v[55:56], v[14:15], off offset:-8 s_clause 0x1 global_load_b64 v[57:58], v[22:23], off global_load_b64 v[59:60], v[20:21], off v_add_co_u32 v22, vcc_lo, s24, v16 v_add_co_ci_u32_e32 v23, vcc_lo, s25, v17, vcc_lo v_add_co_u32 v28, vcc_lo, s24, v18 v_add_co_ci_u32_e32 v29, vcc_lo, s25, v19, vcc_lo s_clause 0x1 global_load_b64 v[61:62], v[22:23], off global_load_b64 v[63:64], v[28:29], off v_add_co_u32 v22, vcc_lo, s20, v36 v_add_co_ci_u32_e32 v23, vcc_lo, s21, v37, vcc_lo s_ashr_i32 s1, s11, 31 v_add_co_u32 v30, s2, s11, v0 s_mul_i32 s42, s0, s9 global_load_b64 v[65:66], v[22:23], off v_add_co_ci_u32_e64 v31, null, s1, 0, s2 s_add_i32 s1, s42, s14 s_add_i32 s41, s0, s10 s_mul_i32 s1, s1, s8 s_mul_i32 s41, s41, s9 s_ashr_i32 s2, s1, 31 v_add_co_u32 v14, s3, s1, v0 v_add_nc_u32_e32 v20, s1, v0 v_add_co_ci_u32_e64 v15, null, s2, 0, s3 s_add_i32 s0, s41, s14 v_lshlrev_b64 v[30:31], 3, v[30:31] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v21, 31, v20 v_lshlrev_b64 v[14:15], 3, v[14:15] s_mul_i32 s0, s0, s8 s_mov_b32 s51, 0x3ff55555 s_ashr_i32 s1, s0, 31 v_add_co_u32 v22, s2, s0, v0 v_lshlrev_b64 v[20:21], 3, v[20:21] v_add_co_ci_u32_e64 v23, null, s1, 0, s2 v_add_co_u32 v14, vcc_lo, s4, v14 v_add_nc_u32_e32 v28, s0, v0 v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo v_add_co_u32 v20, vcc_lo, s4, v20 v_lshlrev_b64 v[22:23], 3, v[22:23] v_add_co_ci_u32_e32 v21, vcc_lo, s5, v21, vcc_lo v_ashrrev_i32_e32 v29, 31, v28 v_add_co_u32 v32, vcc_lo, s24, v36 v_add_co_ci_u32_e32 v33, vcc_lo, s25, v37, vcc_lo v_add_co_u32 v67, vcc_lo, s4, v22 v_add_co_ci_u32_e32 v68, vcc_lo, s5, v23, vcc_lo v_lshlrev_b64 v[22:23], 3, v[28:29] v_add_co_u32 v28, vcc_lo, s16, v36 v_add_co_ci_u32_e32 v29, vcc_lo, s17, v37, vcc_lo global_load_b64 v[69:70], v[32:33], off v_add_co_u32 v32, vcc_lo, s4, v22 v_add_co_ci_u32_e32 v33, vcc_lo, s5, v23, vcc_lo global_load_b64 v[71:72], v[28:29], off s_clause 0x1 global_load_b64 v[73:74], v[14:15], off offset:8 global_load_b128 v[20:23], v[20:21], off offset:-8 global_load_b64 v[75:76], v[26:27], off s_clause 0x1 global_load_b64 v[67:68], v[67:68], off offset:8 global_load_b128 v[26:29], v[32:33], off offset:-8 v_ashrrev_i32_e32 v14, 31, v13 s_getpc_b64 s[2:3] s_add_u32 s2, s2, dx5tx1@rel32@lo+4 s_addc_u32 s3, s3, dx5tx1@rel32@hi+12 s_mov_b32 s0, 0x9999999a s_load_b64 s[2:3], s[2:3], 0x0 s_mov_b32 s1, 0x3fd99999 v_lshlrev_b64 v[12:13], 3, v[13:14] v_add_co_u32 v14, vcc_lo, s4, v30 v_add_co_ci_u32_e32 v15, vcc_lo, s5, v31, vcc_lo s_getpc_b64 s[6:7] s_add_u32 s6, s6, xxcon3@rel32@lo+4 s_addc_u32 s7, s7, xxcon3@rel32@hi+12 v_add_co_u32 v12, vcc_lo, s4, v12 v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo v_add_co_u32 v77, vcc_lo, s18, v36 v_add_co_ci_u32_e32 v78, vcc_lo, s19, v37, vcc_lo s_clause 0x1 global_load_b64 v[79:80], v[14:15], off offset:8 global_load_b128 v[30:33], v[12:13], off offset:-8 v_add_co_u32 v12, vcc_lo, s22, v16 v_add_co_ci_u32_e32 v13, vcc_lo, s23, v17, vcc_lo v_add_co_u32 v14, vcc_lo, s22, v18 v_add_co_ci_u32_e32 v15, vcc_lo, s23, v19, vcc_lo global_load_b64 v[38:39], v[38:39], off offset:-8 global_load_b64 v[77:78], v[77:78], off s_clause 0x1 global_load_b64 v[81:82], v[12:13], off global_load_b64 v[16:17], v[14:15], off v_add_co_u32 v12, vcc_lo, s22, v36 v_add_co_ci_u32_e32 v13, vcc_lo, s23, v37, vcc_lo s_load_b64 s[6:7], s[6:7], 0x0 s_mov_b32 s43, 0 global_load_b64 v[36:37], v[12:13], off s_waitcnt vmcnt(28) v_add_f64 v[14:15], v[34:35], v[34:35] s_waitcnt vmcnt(27) v_add_f64 v[18:19], v[40:41], v[40:41] s_waitcnt vmcnt(24) v_fma_f64 v[40:41], v[40:41], -2.0, v[47:48] s_waitcnt vmcnt(22) s_delay_alu instid0(VALU_DEP_2) v_mul_f64 v[12:13], v[18:19], v[51:52] s_waitcnt vmcnt(20) v_fma_f64 v[51:52], v[24:25], -2.0, v[53:54] s_waitcnt vmcnt(17) v_mul_f64 v[83:84], v[59:60], s[0:1] s_waitcnt vmcnt(15) v_fma_f64 v[53:54], v[63:64], -2.0, v[61:62] v_add_f64 v[61:62], v[47:48], -v[57:58] v_mul_f64 v[57:58], v[57:58], s[0:1] v_add_f64 v[40:41], v[55:56], v[40:41] v_fma_f64 v[49:50], v[47:48], v[49:50], -v[12:13] s_waitcnt vmcnt(14) v_add_f64 v[51:52], v[65:66], v[51:52] v_mul_f64 v[65:66], v[34:35], v[14:15] v_add_f64 v[61:62], v[61:62], -v[55:56] s_waitcnt lgkmcnt(0) v_fma_f64 v[9:10], s[2:3], v[40:41], v[9:10] s_mov_b32 s2, 0x66666666 s_mov_b32 s3, 0x3ff66666 s_delay_alu instid0(SALU_CYCLE_1) v_fma_f64 v[47:48], v[47:48], s[2:3], -v[57:58] s_waitcnt vmcnt(13) v_add_f64 v[53:54], v[69:70], v[53:54] v_fma_f64 v[69:70], v[44:45], -2.0, v[42:43] s_waitcnt vmcnt(12) v_fma_f64 v[40:41], v[55:56], v[71:72], v[49:50] s_waitcnt vmcnt(10) v_fma_f64 v[49:50], v[22:23], -2.0, v[73:74] s_waitcnt vmcnt(9) v_fma_f64 v[65:66], v[75:76], v[75:76], -v[65:66] s_waitcnt vmcnt(7) v_fma_f64 v[71:72], v[28:29], -2.0, v[67:68] v_fma_f64 v[55:56], v[55:56], s[2:3], -v[83:84] v_fma_f64 v[34:35], v[34:35], -2.0, v[75:76] v_add_f64 v[59:60], v[61:62], v[59:60] s_waitcnt vmcnt(5) v_fma_f64 v[79:80], v[32:33], -2.0, v[79:80] s_waitcnt vmcnt(1) v_fma_f64 v[81:82], v[16:17], -2.0, v[81:82] v_fma_f64 v[9:10], s[6:7], v[53:54], v[9:10] v_add_f64 v[69:70], v[38:39], v[69:70] v_mul_f64 v[53:54], v[77:78], v[38:39] v_add_f64 v[49:50], v[20:21], v[49:50] v_fma_f64 v[65:66], v[77:78], v[77:78], v[65:66] v_add_f64 v[71:72], v[26:27], v[71:72] s_getpc_b64 s[6:7] s_add_u32 s6, s6, xxcon2@rel32@lo+4 s_addc_u32 s7, s7, xxcon2@rel32@hi+12 s_getpc_b64 s[12:13] s_add_u32 s12, s12, dx2tx1@rel32@lo+4 s_addc_u32 s13, s13, dx2tx1@rel32@hi+12 s_getpc_b64 s[44:45] s_add_u32 s44, s44, dx3tx1@rel32@lo+4 s_addc_u32 s45, s45, dx3tx1@rel32@hi+12 s_getpc_b64 s[46:47] s_add_u32 s46, s46, dx4tx1@rel32@lo+4 s_addc_u32 s47, s47, dx4tx1@rel32@hi+12 s_getpc_b64 s[48:49] s_add_u32 s48, s48, xxcon4@rel32@lo+4 s_addc_u32 s49, s49, xxcon4@rel32@hi+12 s_load_b64 s[6:7], s[6:7], 0x0 s_load_b64 s[12:13], s[12:13], 0x0 s_load_b64 s[44:45], s[44:45], 0x0 s_load_b64 s[46:47], s[46:47], 0x0 s_load_b64 s[48:49], s[48:49], 0x0 v_add_f64 v[34:35], v[34:35], v[77:78] v_mul_f64 v[20:21], v[77:78], v[20:21] v_mul_f64 v[26:27], v[77:78], v[26:27] s_getpc_b64 s[2:3] s_add_u32 s2, s2, dx1tx1@rel32@lo+4 s_addc_u32 s3, s3, dx1tx1@rel32@hi+12 v_add_f64 v[38:39], v[42:43], -v[38:39] s_load_b64 s[2:3], s[2:3], 0x0 v_add_f64 v[30:31], v[30:31], v[79:80] s_waitcnt lgkmcnt(0) v_mul_f64 v[61:62], s[6:7], s[50:51] s_waitcnt vmcnt(0) v_add_f64 v[36:37], v[36:37], v[81:82] v_fma_f64 v[3:4], s[12:13], v[69:70], v[3:4] v_fma_f64 v[53:54], v[75:76], v[42:43], -v[53:54] v_fma_f64 v[5:6], s[44:45], v[49:50], v[5:6] v_fma_f64 v[9:10], v[65:66], s[48:49], v[9:10] v_fma_f64 v[7:8], s[46:47], v[71:72], v[7:8] v_mul_f64 v[49:50], v[77:78], v[55:56] s_getpc_b64 s[12:13] s_add_u32 s12, s12, xxcon5@rel32@lo+4 s_addc_u32 s13, s13, xxcon5@rel32@hi+12 s_load_b64 s[12:13], s[12:13], 0x0 v_fma_f64 v[20:21], v[75:76], v[73:74], -v[20:21] v_fma_f64 v[26:27], v[75:76], v[67:68], -v[26:27] v_fma_f64 v[30:31], s[2:3], v[30:31], v[1:2] v_add_f64 v[1:2], v[32:33], v[32:33] ; implicit-def: $vgpr32_vgpr33 v_fma_f64 v[3:4], v[34:35], v[61:62], v[3:4] v_fma_f64 v[34:35], v[59:60], s[0:1], v[53:54] v_fma_f64 v[5:6], s[6:7], v[51:52], v[5:6] s_waitcnt lgkmcnt(0) v_fma_f64 v[51:52], s[12:13], v[40:41], v[9:10] v_fma_f64 v[42:43], s[6:7], v[36:37], v[7:8] v_fma_f64 v[47:48], v[75:76], v[47:48], -v[49:50] s_getpc_b64 s[0:1] s_add_u32 s0, s0, tx2@rel32@lo+4 s_addc_u32 s1, s1, tx2@rel32@hi+12 v_add_f64 v[7:8], v[44:45], v[44:45] s_load_b64 s[0:1], s[0:1], 0x0 v_add_f64 v[9:10], v[22:23], v[22:23] v_add_f64 v[22:23], v[63:64], v[63:64] s_waitcnt lgkmcnt(0) v_fma_f64 v[36:37], -s[0:1], v[38:39], v[30:31] ; implicit-def: $vgpr30_vgpr31 v_fma_f64 v[38:39], -s[0:1], v[34:35], v[3:4] v_add_f64 v[3:4], v[24:25], v[24:25] v_fma_f64 v[40:41], -s[0:1], v[20:21], v[5:6] v_add_f64 v[20:21], v[28:29], v[28:29] v_add_f64 v[5:6], v[16:17], v[16:17] v_fma_f64 v[42:43], -s[0:1], v[26:27], v[42:43] v_fma_f64 v[44:45], -s[0:1], v[47:48], v[51:52] s_mov_b32 s0, 0 ; implicit-def: $vgpr34_vgpr35 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr26_vgpr27 s_mov_b32 s1, exec_lo v_cmpx_lt_i32_e32 1, v0 s_xor_b32 s44, exec_lo, s1 s_cbranch_execz .LBB6_11 ; %bb.6: ; %LeafBlock2368 s_mov_b32 s0, -1 s_mov_b32 s45, exec_lo ; implicit-def: $vgpr34_vgpr35 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 v_cmpx_eq_u32_e32 2, v0 s_cbranch_execz .LBB6_10 ; %bb.7: ; %.preheader1742.preheader v_dual_mov_b32 v26, v36 :: v_dual_mov_b32 v27, v37 v_dual_mov_b32 v32, v38 :: v_dual_mov_b32 v33, v39 v_dual_mov_b32 v30, v40 :: v_dual_mov_b32 v31, v41 v_dual_mov_b32 v28, v42 :: v_dual_mov_b32 v29, v43 v_dual_mov_b32 v34, v44 :: v_dual_mov_b32 v35, v45 s_mov_b64 s[6:7], 0 s_mov_b32 s12, s11 .LBB6_8: ; %.preheader1742 ; =>This Inner Loop Header: Depth=1 s_cmp_eq_u32 s6, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_cndmask_b32_e32 v47, v27, v33, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v47, v47, v31, s0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_ashr_i32 s13, s12, 31 v_cndmask_b32_e64 v51, v47, v29, s1 v_add_co_u32 v47, s3, s12, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_co_ci_u32_e64 v48, null, s13, 0, s3 s_lshl_b64 s[46:47], s[12:13], 3 s_add_u32 s46, s4, s46 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_lshlrev_b64 v[47:48], 3, v[47:48] s_addc_u32 s47, s5, s47 s_cmp_eq_u32 s6, 0 v_add_co_u32 v47, s3, s4, v47 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v48, s3, s5, v48, s3 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 global_load_b64 v[49:50], v[47:48], off offset:-8 s_clause 0x1 s_load_b64 s[48:49], s[46:47], 0x20 s_load_b64 s[46:47], s[46:47], 0x10 global_load_b64 v[47:48], v[47:48], off offset:8 s_add_i32 s12, s12, s33 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(1) v_mul_f64 v[49:50], v[49:50], -4.0 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[49:50], 0x40180000, s[46:47], v[49:50] s_waitcnt vmcnt(0) v_fma_f64 v[47:48], v[47:48], -4.0, v[49:50] v_cndmask_b32_e32 v49, v26, v32, vcc_lo v_cndmask_b32_e64 v50, v51, v35, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v30, s0 v_cndmask_b32_e64 v49, v49, v28, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v34, s2 v_add_f64 v[47:48], s[48:49], v[47:48] v_fma_f64 v[47:48], 0xbfd00000, v[47:48], v[49:50] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v32, v32, v47, vcc_lo v_cndmask_b32_e64 v27, v27, v48, s3 v_cndmask_b32_e64 v26, v26, v47, s3 v_cndmask_b32_e32 v33, v33, v48, vcc_lo v_cndmask_b32_e64 v31, v31, v48, s0 v_cndmask_b32_e64 v30, v30, v47, s0 v_cndmask_b32_e64 v29, v29, v48, s1 v_cndmask_b32_e64 v28, v28, v47, s1 v_cndmask_b32_e64 v35, v35, v48, s2 v_cndmask_b32_e64 v34, v34, v47, s2 s_cbranch_scc0 .LBB6_8 ; %bb.9: ; %Flow2412 s_xor_b32 s0, exec_lo, -1 .LBB6_10: ; %Flow2423 s_or_b32 exec_lo, exec_lo, s45 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 s0, s0, exec_lo .LBB6_11: ; %Flow2422 s_and_not1_saveexec_b32 s1, s44 ; %bb.12: ; %LeafBlock v_cmp_ne_u32_e32 vcc_lo, 1, v0 s_and_not1_b32 s0, s0, exec_lo s_mov_b32 s43, exec_lo ; implicit-def: $vgpr34_vgpr35 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 s_and_b32 s2, vcc_lo, exec_lo s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s0, s0, s2 ; %bb.13: ; %Flow2424 s_or_b32 exec_lo, exec_lo, s1 s_and_saveexec_b32 s1, s0 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s12, exec_lo, s1 s_cbranch_execz .LBB6_28 ; %bb.14: s_add_i32 s0, s8, -3 ; implicit-def: $vgpr34_vgpr35 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 s_mov_b32 s1, exec_lo v_cmpx_le_i32_e64 s0, v0 s_xor_b32 s13, exec_lo, s1 s_cbranch_execz .LBB6_24 ; %bb.15: v_cmp_ne_u32_e32 vcc_lo, s0, v0 ; implicit-def: $vgpr34_vgpr35 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 s_and_saveexec_b32 s0, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s44, exec_lo, s0 s_cbranch_execz .LBB6_20 ; %bb.16: v_dual_mov_b32 v34, v44 :: v_dual_mov_b32 v35, v45 v_dual_mov_b32 v28, v42 :: v_dual_mov_b32 v29, v43 v_dual_mov_b32 v30, v40 :: v_dual_mov_b32 v31, v41 v_dual_mov_b32 v32, v38 :: v_dual_mov_b32 v33, v39 v_dual_mov_b32 v26, v36 :: v_dual_mov_b32 v27, v37 s_add_i32 s0, s8, -2 s_mov_b32 s45, exec_lo v_cmpx_eq_u32_e64 s0, v0 s_cbranch_execz .LBB6_19 ; %bb.17: ; %.preheader1738 v_dual_mov_b32 v26, v36 :: v_dual_mov_b32 v27, v37 v_dual_mov_b32 v32, v38 :: v_dual_mov_b32 v33, v39 v_dual_mov_b32 v30, v40 :: v_dual_mov_b32 v31, v41 v_dual_mov_b32 v28, v42 :: v_dual_mov_b32 v29, v43 v_dual_mov_b32 v34, v44 :: v_dual_mov_b32 v35, v45 s_mov_b64 s[6:7], 0 s_mov_b32 s46, s11 .LBB6_18: ; =>This Inner Loop Header: Depth=1 s_cmp_eq_u32 s6, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_cndmask_b32_e32 v47, v27, v33, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 v_add_nc_u32_e32 v51, s46, v0 s_cselect_b32 s1, -1, 0 v_cndmask_b32_e64 v47, v47, v31, s0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_ashr_i32 s3, s46, 31 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v53, v47, v29, s1 v_add_co_u32 v47, s47, v0, s46 v_add_co_ci_u32_e64 v48, null, 0, s3, s47 v_ashrrev_i32_e32 v52, 31, v51 s_cmp_eq_u32 s6, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[47:48], 3, v[47:48] v_lshlrev_b64 v[51:52], 3, v[51:52] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v47, s3, s4, v47 v_add_co_ci_u32_e64 v48, s3, s5, v48, s3 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v51, s3, s4, v51 v_add_co_ci_u32_e64 v52, s3, s5, v52, s3 global_load_b128 v[47:50], v[47:48], off offset:-16 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 global_load_b64 v[51:52], v[51:52], off s_addc_u32 s7, s7, 0 s_add_i32 s46, s46, s33 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(1) v_fma_f64 v[47:48], v[49:50], -4.0, v[47:48] v_cndmask_b32_e32 v49, v26, v32, vcc_lo v_cndmask_b32_e64 v50, v53, v35, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v30, s0 v_cndmask_b32_e64 v49, v49, v28, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v34, s2 s_waitcnt vmcnt(0) v_fma_f64 v[47:48], 0x40140000, v[51:52], v[47:48] v_fma_f64 v[47:48], 0xbfd00000, v[47:48], v[49:50] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v27, v27, v48, s3 v_cndmask_b32_e64 v26, v26, v47, s3 v_dual_cndmask_b32 v33, v33, v48 :: v_dual_cndmask_b32 v32, v32, v47 v_cndmask_b32_e64 v31, v31, v48, s0 v_cndmask_b32_e64 v30, v30, v47, s0 v_cndmask_b32_e64 v29, v29, v48, s1 v_cndmask_b32_e64 v28, v28, v47, s1 v_cndmask_b32_e64 v35, v35, v48, s2 v_cndmask_b32_e64 v34, v34, v47, s2 s_cbranch_scc0 .LBB6_18 .LBB6_19: ; %Flow2414 s_or_b32 exec_lo, exec_lo, s45 .LBB6_20: ; %Flow2416 s_and_not1_saveexec_b32 s44, s44 s_cbranch_execz .LBB6_23 ; %bb.21: ; %.preheader1736 v_dual_mov_b32 v26, v36 :: v_dual_mov_b32 v27, v37 v_dual_mov_b32 v32, v38 :: v_dual_mov_b32 v33, v39 v_dual_mov_b32 v30, v40 :: v_dual_mov_b32 v31, v41 v_dual_mov_b32 v28, v42 :: v_dual_mov_b32 v29, v43 v_dual_mov_b32 v34, v44 :: v_dual_mov_b32 v35, v45 s_mov_b64 s[6:7], 0 s_mov_b32 s45, s11 .LBB6_22: ; =>This Inner Loop Header: Depth=1 s_cmp_eq_u32 s6, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_cndmask_b32_e32 v47, v27, v33, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 v_add_nc_u32_e32 v51, s45, v0 s_cselect_b32 s1, -1, 0 v_cndmask_b32_e64 v47, v47, v31, s0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_ashr_i32 s3, s45, 31 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v55, v47, v29, s1 v_add_co_u32 v47, s46, v0, s45 v_add_co_ci_u32_e64 v48, null, 0, s3, s46 v_ashrrev_i32_e32 v52, 31, v51 s_cmp_eq_u32 s6, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[47:48], 3, v[47:48] v_lshlrev_b64 v[51:52], 3, v[51:52] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v47, s3, s4, v47 v_add_co_ci_u32_e64 v48, s3, s5, v48, s3 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v51, s3, s4, v51 v_add_co_ci_u32_e64 v52, s3, s5, v52, s3 global_load_b128 v[47:50], v[47:48], off offset:-16 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 global_load_b128 v[51:54], v[51:52], off s_addc_u32 s7, s7, 0 s_add_i32 s45, s45, s33 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(1) v_fma_f64 v[47:48], v[49:50], -4.0, v[47:48] v_cndmask_b32_e32 v49, v26, v32, vcc_lo v_cndmask_b32_e64 v50, v55, v35, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v30, s0 v_cndmask_b32_e64 v49, v49, v28, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v34, s2 s_waitcnt vmcnt(0) v_fma_f64 v[47:48], 0x40180000, v[51:52], v[47:48] v_fma_f64 v[47:48], v[53:54], -4.0, v[47:48] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[47:48], 0xbfd00000, v[47:48], v[49:50] v_cndmask_b32_e64 v27, v27, v48, s3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v26, v26, v47, s3 v_dual_cndmask_b32 v33, v33, v48 :: v_dual_cndmask_b32 v32, v32, v47 v_cndmask_b32_e64 v31, v31, v48, s0 v_cndmask_b32_e64 v30, v30, v47, s0 v_cndmask_b32_e64 v29, v29, v48, s1 v_cndmask_b32_e64 v28, v28, v47, s1 v_cndmask_b32_e64 v35, v35, v48, s2 v_cndmask_b32_e64 v34, v34, v47, s2 s_cbranch_scc0 .LBB6_22 .LBB6_23: ; %Flow2417 s_or_b32 exec_lo, exec_lo, s44 .LBB6_24: ; %Flow2419 s_and_not1_saveexec_b32 s13, s13 s_cbranch_execz .LBB6_27 ; %bb.25: ; %.preheader1734 v_dual_mov_b32 v26, v36 :: v_dual_mov_b32 v27, v37 v_dual_mov_b32 v32, v38 :: v_dual_mov_b32 v33, v39 v_dual_mov_b32 v30, v40 :: v_dual_mov_b32 v31, v41 v_dual_mov_b32 v28, v42 :: v_dual_mov_b32 v29, v43 v_dual_mov_b32 v34, v44 :: v_dual_mov_b32 v35, v45 s_mov_b64 s[6:7], 0 s_mov_b32 s44, s11 .LBB6_26: ; =>This Inner Loop Header: Depth=1 s_cmp_eq_u32 s6, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_cndmask_b32_e32 v47, v27, v33, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 v_add_nc_u32_e32 v51, s44, v0 s_cselect_b32 s1, -1, 0 v_cndmask_b32_e64 v47, v47, v31, s0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_ashr_i32 s3, s44, 31 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v57, v47, v29, s1 v_add_co_u32 v47, s45, v0, s44 v_add_co_ci_u32_e64 v48, null, 0, s3, s45 v_ashrrev_i32_e32 v52, 31, v51 s_cmp_eq_u32 s6, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[47:48], 3, v[47:48] v_lshlrev_b64 v[51:52], 3, v[51:52] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v47, s3, s4, v47 v_add_co_ci_u32_e64 v48, s3, s5, v48, s3 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v55, s3, s4, v51 v_add_co_ci_u32_e64 v56, s3, s5, v52, s3 s_clause 0x2 global_load_b128 v[47:50], v[47:48], off offset:-16 global_load_b128 v[51:54], v[55:56], off global_load_b64 v[55:56], v[55:56], off offset:16 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_add_i32 s44, s44, s33 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(2) v_fma_f64 v[47:48], v[49:50], -4.0, v[47:48] v_cndmask_b32_e32 v49, v26, v32, vcc_lo v_cndmask_b32_e64 v50, v57, v35, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v30, s0 v_cndmask_b32_e64 v49, v49, v28, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v34, s2 s_waitcnt vmcnt(1) v_fma_f64 v[47:48], 0x40180000, v[51:52], v[47:48] v_fma_f64 v[47:48], v[53:54], -4.0, v[47:48] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[47:48], v[55:56], v[47:48] v_fma_f64 v[47:48], 0xbfd00000, v[47:48], v[49:50] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v32, v32, v47, vcc_lo v_cndmask_b32_e64 v27, v27, v48, s3 v_cndmask_b32_e64 v26, v26, v47, s3 v_cndmask_b32_e32 v33, v33, v48, vcc_lo v_cndmask_b32_e64 v31, v31, v48, s0 v_cndmask_b32_e64 v30, v30, v47, s0 v_cndmask_b32_e64 v29, v29, v48, s1 v_cndmask_b32_e64 v28, v28, v47, s1 v_cndmask_b32_e64 v35, v35, v48, s2 v_cndmask_b32_e64 v34, v34, v47, s2 s_cbranch_scc0 .LBB6_26 .LBB6_27: ; %Flow2420 s_or_b32 exec_lo, exec_lo, s13 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s43, s43, exec_lo .LBB6_28: ; %Flow2425 s_or_b32 exec_lo, exec_lo, s12 s_and_saveexec_b32 s44, s43 s_cbranch_execz .LBB6_32 ; %bb.29: ; %.preheader1740.preheader v_lshlrev_b32_e32 v26, 3, v0 s_mov_b64 s[6:7], 0 s_mov_b32 s12, s11 .LBB6_30: ; %.preheader1740 ; =>This Inner Loop Header: Depth=1 s_cmp_eq_u32 s6, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_dual_cndmask_b32 v27, v37, v39 :: v_dual_cndmask_b32 v30, v36, v38 s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 v_cndmask_b32_e64 v27, v27, v41, s0 s_cselect_b32 s2, -1, 0 s_ashr_i32 s13, s12, 31 v_cndmask_b32_e64 v30, v30, v40, s0 s_lshl_b64 s[46:47], s[12:13], 3 v_cndmask_b32_e64 v29, v27, v43, s1 s_add_u32 s46, s4, s46 s_addc_u32 s47, s5, s47 v_cndmask_b32_e64 v31, v30, v42, s1 global_load_b64 v[27:28], v26, s[46:47] offset:8 s_clause 0x1 s_load_b64 s[48:49], s[46:47], 0x8 s_load_b64 s[46:47], s[46:47], 0x18 v_cndmask_b32_e64 v30, v29, v45, s2 s_cmp_eq_u32 s6, 0 v_cndmask_b32_e64 v29, v31, v44, s2 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_add_i32 s12, s12, s33 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(0) v_mul_f64 v[27:28], v[27:28], -4.0 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[27:28], 0x40140000, s[48:49], v[27:28] v_add_f64 v[27:28], s[46:47], v[27:28] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[27:28], 0xbfd00000, v[27:28], v[29:30] v_cndmask_b32_e64 v37, v37, v28, s3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v36, v36, v27, s3 v_dual_cndmask_b32 v39, v39, v28 :: v_dual_cndmask_b32 v38, v38, v27 v_cndmask_b32_e64 v41, v41, v28, s0 v_cndmask_b32_e64 v40, v40, v27, s0 v_cndmask_b32_e64 v43, v43, v28, s1 v_cndmask_b32_e64 v42, v42, v27, s1 v_cndmask_b32_e64 v45, v45, v28, s2 v_cndmask_b32_e64 v44, v44, v27, s2 s_cbranch_scc0 .LBB6_30 ; %bb.31: ; %Flow2421 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v34, v44 :: v_dual_mov_b32 v35, v45 v_dual_mov_b32 v28, v42 :: v_dual_mov_b32 v29, v43 v_dual_mov_b32 v30, v40 :: v_dual_mov_b32 v31, v41 v_dual_mov_b32 v32, v38 :: v_dual_mov_b32 v33, v39 v_dual_mov_b32 v26, v36 :: v_dual_mov_b32 v27, v37 .LBB6_32: ; %Flow2426 s_or_b32 exec_lo, exec_lo, s44 s_add_i32 s0, s14, 1 s_lshl_b32 s1, s8, 1 s_mul_i32 s2, s0, s8 s_add_i32 s3, s40, s0 v_add3_u32 v36, s39, s2, v0 v_mad_u64_u32 v[38:39], null, s3, s8, v[0:1] s_sub_i32 s1, s2, s1 s_add_i32 s2, s38, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_ashrrev_i32_e32 v37, 31, v36 v_add3_u32 v40, s39, s1, v0 s_add_i32 s1, s35, s0 v_mad_u64_u32 v[53:54], null, s2, s8, v[0:1] v_ashrrev_i32_e32 v39, 31, v38 v_lshlrev_b64 v[36:37], 3, v[36:37] v_ashrrev_i32_e32 v41, 31, v40 v_mad_u64_u32 v[42:43], null, s1, s8, v[0:1] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_lshlrev_b64 v[38:39], 3, v[38:39] s_add_i32 s1, s42, s0 v_add_co_u32 v44, vcc_lo, s20, v36 v_add_co_ci_u32_e32 v45, vcc_lo, s21, v37, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v38, vcc_lo, s4, v38 v_add_co_ci_u32_e32 v39, vcc_lo, s5, v39, vcc_lo v_lshlrev_b64 v[40:41], 3, v[40:41] v_mad_u64_u32 v[47:48], null, s1, s8, v[0:1] global_load_b64 v[38:39], v[38:39], off s_add_i32 s1, s14, -1 v_ashrrev_i32_e32 v43, 31, v42 v_add_co_u32 v48, vcc_lo, s20, v40 v_add_co_ci_u32_e32 v49, vcc_lo, s21, v41, vcc_lo s_add_i32 s40, s40, s1 s_clause 0x1 global_load_b64 v[44:45], v[44:45], off global_load_b64 v[49:50], v[48:49], off v_mad_u64_u32 v[51:52], null, s40, s8, v[0:1] v_ashrrev_i32_e32 v48, 31, v47 v_lshlrev_b64 v[42:43], 3, v[42:43] s_add_i32 s42, s42, s1 s_add_i32 s0, s41, s0 v_mad_u64_u32 v[55:56], null, s42, s8, v[0:1] v_lshlrev_b64 v[47:48], 3, v[47:48] v_ashrrev_i32_e32 v52, 31, v51 v_add_co_u32 v42, vcc_lo, s4, v42 v_add_co_ci_u32_e32 v43, vcc_lo, s5, v43, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v47, vcc_lo, s4, v47 v_lshlrev_b64 v[51:52], 3, v[51:52] v_add_co_ci_u32_e32 v48, vcc_lo, s5, v48, vcc_lo v_add_co_u32 v57, vcc_lo, s24, v36 v_add_co_ci_u32_e32 v58, vcc_lo, s25, v37, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v51, vcc_lo, s4, v51 v_add_co_ci_u32_e32 v52, vcc_lo, s5, v52, vcc_lo global_load_b64 v[47:48], v[47:48], off global_load_b64 v[57:58], v[57:58], off global_load_b64 v[51:52], v[51:52], off v_ashrrev_i32_e32 v54, 31, v53 v_mad_u64_u32 v[59:60], null, s0, s8, v[0:1] v_ashrrev_i32_e32 v56, 31, v55 s_add_i32 s38, s38, s1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_lshlrev_b64 v[53:54], 3, v[53:54] v_mad_u64_u32 v[61:62], null, s38, s8, v[0:1] v_lshlrev_b64 v[55:56], 3, v[55:56] v_ashrrev_i32_e32 v60, 31, v59 s_add_i32 s41, s41, s1 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_co_u32 v53, vcc_lo, s4, v53 v_add_co_ci_u32_e32 v54, vcc_lo, s5, v54, vcc_lo v_add_co_u32 v55, vcc_lo, s4, v55 v_lshlrev_b64 v[59:60], 3, v[59:60] v_add_co_ci_u32_e32 v56, vcc_lo, s5, v56, vcc_lo v_add_co_u32 v62, vcc_lo, s26, v36 v_add_co_ci_u32_e32 v63, vcc_lo, s27, v37, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v59, vcc_lo, s4, v59 v_add_co_ci_u32_e32 v60, vcc_lo, s5, v60, vcc_lo v_add_co_u32 v64, vcc_lo, s24, v40 v_add_co_ci_u32_e32 v65, vcc_lo, s25, v41, vcc_lo v_add_co_u32 v66, vcc_lo, s26, v40 v_add_co_ci_u32_e32 v67, vcc_lo, s27, v41, vcc_lo global_load_b64 v[53:54], v[53:54], off global_load_b64 v[68:69], v[62:63], off global_load_b64 v[59:60], v[59:60], off global_load_b64 v[63:64], v[64:65], off v_mad_u64_u32 v[70:71], null, s41, s8, v[0:1] global_load_b64 v[65:66], v[66:67], off v_ashrrev_i32_e32 v62, 31, v61 v_add_co_u32 v72, vcc_lo, s18, v36 v_add_co_ci_u32_e32 v73, vcc_lo, s19, v37, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_lshlrev_b64 v[61:62], 3, v[61:62] v_ashrrev_i32_e32 v71, 31, v70 v_add_co_u32 v74, vcc_lo, s22, v36 v_add_co_ci_u32_e32 v75, vcc_lo, s23, v37, vcc_lo v_add_co_u32 v61, vcc_lo, s4, v61 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_lshlrev_b64 v[70:71], 3, v[70:71] v_add_co_ci_u32_e32 v62, vcc_lo, s5, v62, vcc_lo v_add_co_u32 v36, vcc_lo, s16, v36 v_add_co_ci_u32_e32 v37, vcc_lo, s17, v37, vcc_lo v_add_co_u32 v70, vcc_lo, s4, v70 v_add_co_ci_u32_e32 v71, vcc_lo, s5, v71, vcc_lo s_clause 0x1 global_load_b64 v[42:43], v[42:43], off global_load_b64 v[55:56], v[55:56], off global_load_b64 v[72:73], v[72:73], off global_load_b64 v[74:75], v[74:75], off global_load_b64 v[36:37], v[36:37], off s_clause 0x1 global_load_b64 v[61:62], v[61:62], off global_load_b64 v[70:71], v[70:71], off s_add_i32 s0, s35, s1 v_add_co_u32 v78, vcc_lo, s18, v40 v_mad_u64_u32 v[76:77], null, s0, s8, v[0:1] v_add_co_ci_u32_e32 v79, vcc_lo, s19, v41, vcc_lo v_add_co_u32 v80, vcc_lo, s22, v40 v_add_co_ci_u32_e32 v81, vcc_lo, s23, v41, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_ashrrev_i32_e32 v77, 31, v76 global_load_b64 v[78:79], v[78:79], off v_mul_f64 v[24:25], v[24:25], v[3:4] s_getpc_b64 s[0:1] s_add_u32 s0, s0, dy5ty1@rel32@lo+4 s_addc_u32 s1, s1, dy5ty1@rel32@hi+12 s_mov_b32 s2, 0x9999999a v_lshlrev_b64 v[76:77], 3, v[76:77] s_load_b64 s[0:1], s[0:1], 0x0 s_mov_b32 s3, 0x3fd99999 s_mov_b32 s12, 0x66666666 s_mov_b32 s13, 0x3ff66666 s_mov_b32 s44, 0x55555555 v_add_co_u32 v76, vcc_lo, s4, v76 v_add_co_ci_u32_e32 v77, vcc_lo, s5, v77, vcc_lo v_add_co_u32 v40, vcc_lo, s16, v40 v_add_co_ci_u32_e32 v41, vcc_lo, s17, v41, vcc_lo global_load_b64 v[80:81], v[80:81], off global_load_b64 v[76:77], v[76:77], off global_load_b64 v[40:41], v[40:41], off s_mov_b32 s45, 0x3ff55555 s_waitcnt vmcnt(21) v_add_f64 v[82:83], v[38:39], -v[18:19] s_waitcnt vmcnt(20) v_fma_f64 v[24:25], v[44:45], v[44:45], -v[24:25] s_waitcnt vmcnt(18) v_add_f64 v[86:87], v[47:48], -v[9:10] s_waitcnt vmcnt(17) v_add_f64 v[57:58], v[57:58], -v[22:23] s_waitcnt vmcnt(16) s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[82:83], v[82:83], v[51:52] v_fma_f64 v[24:25], v[49:50], v[49:50], v[24:25] s_waitcnt vmcnt(14) v_add_f64 v[88:89], v[38:39], -v[68:69] v_add_f64 v[84:85], v[53:54], -v[7:8] s_waitcnt vmcnt(13) v_add_f64 v[90:91], v[59:60], -v[20:21] s_waitcnt vmcnt(12) v_add_f64 v[57:58], v[57:58], v[63:64] s_waitcnt lgkmcnt(0) v_fma_f64 v[34:35], v[82:83], s[0:1], v[34:35] s_waitcnt vmcnt(11) v_mul_f64 v[63:64], v[65:66], s[2:3] s_getpc_b64 s[0:1] s_add_u32 s0, s0, yycon3@rel32@lo+4 s_addc_u32 s1, s1, yycon3@rel32@hi+12 v_add_f64 v[82:83], v[44:45], -v[3:4] s_load_b64 s[0:1], s[0:1], 0x0 v_mul_f64 v[67:68], v[68:69], s[2:3] s_getpc_b64 s[6:7] s_add_u32 s6, s6, yycon2@rel32@lo+4 s_addc_u32 s7, s7, yycon2@rel32@hi+12 s_waitcnt vmcnt(10) v_add_f64 v[42:43], v[42:43], -v[1:2] s_waitcnt vmcnt(9) v_mul_f64 v[92:93], v[49:50], v[55:56] s_waitcnt vmcnt(8) v_add_f64 v[72:73], v[72:73], -v[14:15] s_waitcnt vmcnt(7) v_add_f64 v[74:75], v[74:75], -v[5:6] s_waitcnt vmcnt(6) v_fma_f64 v[36:37], v[38:39], v[36:37], -v[12:13] v_add_f64 v[86:87], v[86:87], v[55:56] v_add_f64 v[88:89], v[88:89], -v[51:52] s_waitcnt vmcnt(5) v_add_f64 v[84:85], v[84:85], v[61:62] s_waitcnt vmcnt(4) v_add_f64 v[90:91], v[90:91], v[70:71] v_mul_f64 v[61:62], v[49:50], v[61:62] s_waitcnt lgkmcnt(0) v_fma_f64 v[34:35], s[0:1], v[57:58], v[34:35] v_fma_f64 v[57:58], v[51:52], s[12:13], -v[63:64] s_load_b64 s[0:1], s[6:7], 0x0 s_getpc_b64 s[6:7] s_add_u32 s6, s6, dy2ty1@rel32@lo+4 s_addc_u32 s7, s7, dy2ty1@rel32@hi+12 s_getpc_b64 s[38:39] s_add_u32 s38, s38, dy3ty1@rel32@lo+4 s_addc_u32 s39, s39, dy3ty1@rel32@hi+12 s_getpc_b64 s[40:41] s_add_u32 s40, s40, dy4ty1@rel32@lo+4 s_addc_u32 s41, s41, dy4ty1@rel32@hi+12 s_getpc_b64 s[42:43] s_add_u32 s42, s42, yycon4@rel32@lo+4 s_addc_u32 s43, s43, yycon4@rel32@hi+12 s_load_b64 s[6:7], s[6:7], 0x0 s_load_b64 s[38:39], s[38:39], 0x0 s_load_b64 s[40:41], s[40:41], 0x0 s_load_b64 s[42:43], s[42:43], 0x0 v_mul_f64 v[69:70], v[49:50], v[70:71] v_fma_f64 v[38:39], v[38:39], s[12:13], -v[67:68] s_waitcnt lgkmcnt(0) v_mul_f64 v[63:64], s[0:1], s[44:45] s_waitcnt vmcnt(1) v_add_f64 v[42:43], v[42:43], v[76:77] v_fma_f64 v[67:68], v[44:45], v[47:48], -v[92:93] v_add_f64 v[71:72], v[72:73], v[78:79] v_add_f64 v[78:79], v[82:83], v[49:50] v_add_f64 v[73:74], v[74:75], v[80:81] s_waitcnt vmcnt(0) v_fma_f64 v[36:37], v[51:52], v[40:41], v[36:37] v_fma_f64 v[30:31], v[86:87], s[38:39], v[30:31] v_add_f64 v[47:48], v[47:48], -v[55:56] v_add_f64 v[40:41], v[88:89], v[65:66] v_fma_f64 v[32:33], s[6:7], v[84:85], v[32:33] v_fma_f64 v[28:29], s[40:41], v[90:91], v[28:29] s_getpc_b64 s[6:7] s_add_u32 s6, s6, dy1ty1@rel32@lo+4 s_addc_u32 s7, s7, dy1ty1@rel32@hi+12 v_fma_f64 v[24:25], v[24:25], s[42:43], v[34:35] v_mul_f64 v[34:35], v[49:50], v[57:58] s_getpc_b64 s[12:13] s_add_u32 s12, s12, yycon5@rel32@lo+4 s_addc_u32 s13, s13, yycon5@rel32@hi+12 s_load_b64 s[6:7], s[6:7], 0x0 s_load_b64 s[12:13], s[12:13], 0x0 v_fma_f64 v[49:50], v[44:45], v[53:54], -v[61:62] v_fma_f64 v[51:52], v[44:45], v[59:60], -v[69:70] s_waitcnt lgkmcnt(0) v_fma_f64 v[26:27], s[6:7], v[42:43], v[26:27] v_fma_f64 v[30:31], v[78:79], v[63:64], v[30:31] v_fma_f64 v[40:41], v[40:41], s[2:3], v[67:68] v_fma_f64 v[32:33], s[0:1], v[71:72], v[32:33] v_fma_f64 v[28:29], s[0:1], v[73:74], v[28:29] s_getpc_b64 s[0:1] s_add_u32 s0, s0, ty2@rel32@lo+4 s_addc_u32 s1, s1, ty2@rel32@hi+12 v_fma_f64 v[24:25], s[12:13], v[36:37], v[24:25] v_fma_f64 v[42:43], v[44:45], v[38:39], -v[34:35] s_load_b64 s[0:1], s[0:1], 0x0 s_cmp_lt_i32 s14, 2 s_mov_b32 s12, 0 s_waitcnt lgkmcnt(0) v_fma_f64 v[34:35], -s[0:1], v[47:48], v[26:27] v_fma_f64 v[38:39], -s[0:1], v[40:41], v[30:31] v_fma_f64 v[36:37], -s[0:1], v[49:50], v[32:33] v_fma_f64 v[40:41], -s[0:1], v[51:52], v[28:29] v_fma_f64 v[42:43], -s[0:1], v[42:43], v[24:25] s_mov_b32 s1, -1 s_cbranch_scc1 .LBB6_37 ; %bb.33: ; %LeafBlock2372 s_cmp_eq_u32 s14, 2 s_cbranch_scc0 .LBB6_38 ; %bb.34: ; %.preheader1732.preheader s_add_i32 s0, s36, 1 s_add_i32 s1, s35, 4 v_mov_b32_e32 v24, v34 s_delay_alu instid0(VALU_DEP_4) v_mov_b32_e32 v30, v36 v_mov_b32_e32 v28, v38 v_mov_b32_e32 v26, v40 v_dual_mov_b32 v32, v42 :: v_dual_mov_b32 v33, v43 v_dual_mov_b32 v44, v46 :: v_dual_mov_b32 v25, v35 v_mov_b32_e32 v31, v37 v_mov_b32_e32 v29, v39 v_mov_b32_e32 v27, v41 s_mul_i32 s13, s8, s0 s_mul_i32 s38, s8, s1 s_add_i32 s0, s35, 2 s_add_i32 s1, s36, -1 s_mul_i32 s39, s8, s0 s_mul_i32 s40, s8, s1 s_mov_b64 s[6:7], 0 .LBB6_35: ; %.preheader1732 ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v47, s40, v44 v_add_nc_u32_e32 v49, s39, v44 v_add_nc_u32_e32 v51, s13, v44 v_add_nc_u32_e32 v53, s38, v44 s_cmp_eq_u32 s6, 1 v_ashrrev_i32_e32 v48, 31, v47 v_ashrrev_i32_e32 v50, 31, v49 v_ashrrev_i32_e32 v52, 31, v51 v_ashrrev_i32_e32 v54, 31, v53 v_add_nc_u32_e32 v44, s33, v44 v_lshlrev_b64 v[47:48], 3, v[47:48] v_lshlrev_b64 v[49:50], 3, v[49:50] v_lshlrev_b64 v[51:52], 3, v[51:52] v_lshlrev_b64 v[53:54], 3, v[53:54] s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v47, vcc_lo, s4, v47 v_add_co_ci_u32_e32 v48, vcc_lo, s5, v48, vcc_lo v_add_co_u32 v49, vcc_lo, s4, v49 v_add_co_ci_u32_e32 v50, vcc_lo, s5, v50, vcc_lo global_load_b64 v[47:48], v[47:48], off v_add_co_u32 v51, vcc_lo, s4, v51 global_load_b64 v[49:50], v[49:50], off v_add_co_ci_u32_e32 v52, vcc_lo, s5, v52, vcc_lo v_add_co_u32 v53, vcc_lo, s4, v53 v_add_co_ci_u32_e32 v54, vcc_lo, s5, v54, vcc_lo global_load_b64 v[51:52], v[51:52], off s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 global_load_b64 v[53:54], v[53:54], off v_cndmask_b32_e32 v45, v25, v31, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v45, v45, v29, s0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 v_cndmask_b32_e64 v45, v45, v27, s1 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(3) v_mul_f64 v[47:48], v[47:48], -4.0 s_waitcnt vmcnt(2) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[47:48], 0x40180000, v[49:50], v[47:48] v_cndmask_b32_e32 v49, v24, v30, vcc_lo v_cndmask_b32_e64 v50, v45, v33, s2 v_cndmask_b32_e64 v49, v49, v28, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v26, s1 v_cndmask_b32_e64 v49, v49, v32, s2 s_waitcnt vmcnt(1) v_fma_f64 v[47:48], v[51:52], -4.0, v[47:48] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[47:48], v[53:54], v[47:48] v_fma_f64 v[47:48], 0xbfd00000, v[47:48], v[49:50] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v25, v25, v48, s3 v_cndmask_b32_e64 v24, v24, v47, s3 v_dual_cndmask_b32 v31, v31, v48 :: v_dual_cndmask_b32 v30, v30, v47 v_cndmask_b32_e64 v29, v29, v48, s0 v_cndmask_b32_e64 v28, v28, v47, s0 v_cndmask_b32_e64 v27, v27, v48, s1 v_cndmask_b32_e64 v26, v26, v47, s1 v_cndmask_b32_e64 v33, v33, v48, s2 v_cndmask_b32_e64 v32, v32, v47, s2 s_cbranch_scc0 .LBB6_35 ; %bb.36: ; %Flow2397 s_mov_b32 s0, 0 s_branch .LBB6_39 .LBB6_37: s_mov_b32 s0, 0 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr24_vgpr25 s_branch .LBB6_40 .LBB6_38: s_mov_b32 s0, -1 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr24_vgpr25 .LBB6_39: ; %Flow2408 s_mov_b32 s1, 0 .LBB6_40: ; %Flow2407 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s1 s_cbranch_vccz .LBB6_42 ; %bb.41: ; %LeafBlock2370 s_cmp_lg_u32 s14, 1 s_mov_b32 s12, -1 s_cselect_b32 s0, -1, 0 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr24_vgpr25 .LBB6_42: ; %Flow2409 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB6_59 ; %bb.43: s_add_i32 s0, s9, -3 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_ge_i32 s14, s0 s_cbranch_scc0 .LBB6_49 ; %bb.44: s_cmp_lg_u32 s14, s0 s_cbranch_scc0 .LBB6_50 ; %bb.45: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_mov_b32 v32, v42 :: v_dual_mov_b32 v33, v43 v_dual_mov_b32 v26, v40 :: v_dual_mov_b32 v27, v41 v_dual_mov_b32 v28, v38 :: v_dual_mov_b32 v29, v39 v_dual_mov_b32 v30, v36 :: v_dual_mov_b32 v31, v37 v_dual_mov_b32 v24, v34 :: v_dual_mov_b32 v25, v35 s_add_i32 s0, s9, -2 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s14, s0 s_cbranch_scc1 .LBB6_48 ; %bb.46: ; %.preheader1728 v_mov_b32_e32 v24, v34 v_mov_b32_e32 v30, v36 v_mov_b32_e32 v28, v38 v_mov_b32_e32 v26, v40 v_dual_mov_b32 v32, v42 :: v_dual_mov_b32 v33, v43 v_dual_mov_b32 v44, v46 :: v_dual_mov_b32 v25, v35 v_mov_b32_e32 v31, v37 v_mov_b32_e32 v29, v39 v_mov_b32_e32 v27, v41 s_add_i32 s0, s36, -1 s_add_i32 s1, s36, -2 s_mul_i32 s12, s8, s0 s_mul_i32 s13, s8, s1 s_mov_b64 s[6:7], 0 .LBB6_47: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v47, s13, v44 v_add_nc_u32_e32 v49, s12, v44 v_add_nc_u32_e32 v51, s11, v44 s_cmp_eq_u32 s6, 1 v_add_nc_u32_e32 v44, s33, v44 v_ashrrev_i32_e32 v48, 31, v47 v_ashrrev_i32_e32 v50, 31, v49 v_ashrrev_i32_e32 v52, 31, v51 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[47:48], 3, v[47:48] v_lshlrev_b64 v[49:50], 3, v[49:50] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[51:52], 3, v[51:52] v_add_co_u32 v47, vcc_lo, s4, v47 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_ci_u32_e32 v48, vcc_lo, s5, v48, vcc_lo v_add_co_u32 v49, vcc_lo, s4, v49 v_add_co_ci_u32_e32 v50, vcc_lo, s5, v50, vcc_lo s_clause 0x1 global_load_b64 v[47:48], v[47:48], off global_load_b64 v[49:50], v[49:50], off v_add_co_u32 v51, vcc_lo, s4, v51 v_add_co_ci_u32_e32 v52, vcc_lo, s5, v52, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_cndmask_b32_e32 v45, v25, v31, vcc_lo global_load_b64 v[51:52], v[51:52], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 v_cndmask_b32_e64 v45, v45, v29, s0 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_delay_alu instid0(VALU_DEP_1) v_cndmask_b32_e64 v45, v45, v27, s1 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(1) v_fma_f64 v[47:48], v[49:50], -4.0, v[47:48] v_cndmask_b32_e32 v49, v24, v30, vcc_lo v_cndmask_b32_e64 v50, v45, v33, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v28, s0 v_cndmask_b32_e64 v49, v49, v26, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v32, s2 s_waitcnt vmcnt(0) v_fma_f64 v[47:48], 0x40140000, v[51:52], v[47:48] v_fma_f64 v[47:48], 0xbfd00000, v[47:48], v[49:50] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v25, v25, v48, s3 v_cndmask_b32_e64 v24, v24, v47, s3 v_dual_cndmask_b32 v31, v31, v48 :: v_dual_cndmask_b32 v30, v30, v47 v_cndmask_b32_e64 v29, v29, v48, s0 v_cndmask_b32_e64 v28, v28, v47, s0 v_cndmask_b32_e64 v27, v27, v48, s1 v_cndmask_b32_e64 v26, v26, v47, s1 v_cndmask_b32_e64 v33, v33, v48, s2 v_cndmask_b32_e64 v32, v32, v47, s2 s_cbranch_scc0 .LBB6_47 .LBB6_48: ; %Flow2399 s_mov_b32 s0, 0 s_branch .LBB6_51 .LBB6_49: s_mov_b32 s0, -1 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr24_vgpr25 s_branch .LBB6_55 .LBB6_50: s_mov_b32 s0, -1 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $vgpr30_vgpr31 ; implicit-def: $vgpr24_vgpr25 .LBB6_51: ; %Flow2401 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB6_54 ; %bb.52: ; %.preheader1726 s_add_i32 s0, s36, 1 v_mov_b32_e32 v24, v34 s_delay_alu instid0(VALU_DEP_4) v_mov_b32_e32 v30, v36 v_mov_b32_e32 v28, v38 v_mov_b32_e32 v26, v40 v_dual_mov_b32 v32, v42 :: v_dual_mov_b32 v33, v43 v_dual_mov_b32 v44, v46 :: v_dual_mov_b32 v25, v35 v_mov_b32_e32 v31, v37 v_mov_b32_e32 v29, v39 v_mov_b32_e32 v27, v41 s_add_i32 s1, s36, -1 s_mul_i32 s12, s8, s0 s_add_i32 s0, s36, -2 s_mul_i32 s13, s8, s1 s_mul_i32 s38, s8, s0 s_mov_b64 s[6:7], 0 .LBB6_53: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v47, s38, v44 v_add_nc_u32_e32 v49, s13, v44 v_add_nc_u32_e32 v51, s11, v44 v_add_nc_u32_e32 v53, s12, v44 s_cmp_eq_u32 s6, 1 v_ashrrev_i32_e32 v48, 31, v47 v_ashrrev_i32_e32 v50, 31, v49 v_ashrrev_i32_e32 v52, 31, v51 v_ashrrev_i32_e32 v54, 31, v53 v_add_nc_u32_e32 v44, s33, v44 v_lshlrev_b64 v[47:48], 3, v[47:48] v_lshlrev_b64 v[49:50], 3, v[49:50] v_lshlrev_b64 v[51:52], 3, v[51:52] v_lshlrev_b64 v[53:54], 3, v[53:54] s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v47, vcc_lo, s4, v47 v_add_co_ci_u32_e32 v48, vcc_lo, s5, v48, vcc_lo v_add_co_u32 v49, vcc_lo, s4, v49 v_add_co_ci_u32_e32 v50, vcc_lo, s5, v50, vcc_lo s_clause 0x1 global_load_b64 v[47:48], v[47:48], off global_load_b64 v[49:50], v[49:50], off v_add_co_u32 v51, vcc_lo, s4, v51 v_add_co_ci_u32_e32 v52, vcc_lo, s5, v52, vcc_lo v_add_co_u32 v53, vcc_lo, s4, v53 v_add_co_ci_u32_e32 v54, vcc_lo, s5, v54, vcc_lo global_load_b64 v[51:52], v[51:52], off s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 global_load_b64 v[53:54], v[53:54], off v_cndmask_b32_e32 v45, v25, v31, vcc_lo s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v45, v45, v29, s0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 v_cndmask_b32_e64 v45, v45, v27, s1 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(2) v_fma_f64 v[47:48], v[49:50], -4.0, v[47:48] v_cndmask_b32_e32 v49, v24, v30, vcc_lo v_cndmask_b32_e64 v50, v45, v33, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v28, s0 v_cndmask_b32_e64 v49, v49, v26, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v32, s2 s_waitcnt vmcnt(1) v_fma_f64 v[47:48], 0x40180000, v[51:52], v[47:48] s_waitcnt vmcnt(0) v_fma_f64 v[47:48], v[53:54], -4.0, v[47:48] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[47:48], 0xbfd00000, v[47:48], v[49:50] v_cndmask_b32_e64 v25, v25, v48, s3 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v24, v24, v47, s3 v_dual_cndmask_b32 v31, v31, v48 :: v_dual_cndmask_b32 v30, v30, v47 v_cndmask_b32_e64 v29, v29, v48, s0 v_cndmask_b32_e64 v28, v28, v47, s0 v_cndmask_b32_e64 v27, v27, v48, s1 v_cndmask_b32_e64 v26, v26, v47, s1 v_cndmask_b32_e64 v33, v33, v48, s2 v_cndmask_b32_e64 v32, v32, v47, s2 s_cbranch_scc0 .LBB6_53 .LBB6_54: ; %Flow2402 s_mov_b32 s0, 0 .LBB6_55: ; %Flow2404 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB6_58 ; %bb.56: ; %.preheader1724 s_add_i32 s0, s36, 1 s_add_i32 s1, s36, 2 v_mov_b32_e32 v24, v34 s_delay_alu instid0(VALU_DEP_4) v_mov_b32_e32 v30, v36 v_mov_b32_e32 v28, v38 v_mov_b32_e32 v26, v40 v_dual_mov_b32 v32, v42 :: v_dual_mov_b32 v33, v43 v_dual_mov_b32 v44, v46 :: v_dual_mov_b32 v25, v35 v_mov_b32_e32 v31, v37 v_mov_b32_e32 v29, v39 v_mov_b32_e32 v27, v41 s_mul_i32 s12, s8, s0 s_mul_i32 s13, s8, s1 s_add_i32 s0, s36, -1 s_add_i32 s1, s36, -2 s_mul_i32 s38, s8, s0 s_mul_i32 s39, s8, s1 s_mov_b64 s[6:7], 0 .LBB6_57: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v47, s39, v44 v_add_nc_u32_e32 v49, s38, v44 v_add_nc_u32_e32 v51, s11, v44 v_add_nc_u32_e32 v53, s12, v44 v_add_nc_u32_e32 v55, s13, v44 v_ashrrev_i32_e32 v48, 31, v47 v_ashrrev_i32_e32 v50, 31, v49 v_ashrrev_i32_e32 v52, 31, v51 v_ashrrev_i32_e32 v54, 31, v53 v_ashrrev_i32_e32 v56, 31, v55 v_lshlrev_b64 v[47:48], 3, v[47:48] v_lshlrev_b64 v[49:50], 3, v[49:50] v_lshlrev_b64 v[51:52], 3, v[51:52] v_lshlrev_b64 v[53:54], 3, v[53:54] v_lshlrev_b64 v[55:56], 3, v[55:56] s_cmp_eq_u32 s6, 1 v_add_co_u32 v47, vcc_lo, s4, v47 v_add_co_ci_u32_e32 v48, vcc_lo, s5, v48, vcc_lo v_add_co_u32 v49, vcc_lo, s4, v49 v_add_co_ci_u32_e32 v50, vcc_lo, s5, v50, vcc_lo v_add_co_u32 v51, vcc_lo, s4, v51 s_clause 0x1 global_load_b64 v[47:48], v[47:48], off global_load_b64 v[49:50], v[49:50], off v_add_co_ci_u32_e32 v52, vcc_lo, s5, v52, vcc_lo v_add_co_u32 v53, vcc_lo, s4, v53 v_add_co_ci_u32_e32 v54, vcc_lo, s5, v54, vcc_lo global_load_b64 v[51:52], v[51:52], off v_add_co_u32 v55, vcc_lo, s4, v55 global_load_b64 v[53:54], v[53:54], off v_add_co_ci_u32_e32 v56, vcc_lo, s5, v56, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_dual_cndmask_b32 v45, v25, v31 :: v_dual_add_nc_u32 v44, s33, v44 global_load_b64 v[55:56], v[55:56], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 v_cndmask_b32_e64 v45, v45, v29, s0 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_delay_alu instid0(VALU_DEP_1) v_cndmask_b32_e64 v45, v45, v27, s1 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(3) v_fma_f64 v[47:48], v[49:50], -4.0, v[47:48] v_cndmask_b32_e32 v49, v24, v30, vcc_lo v_cndmask_b32_e64 v50, v45, v33, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v28, s0 v_cndmask_b32_e64 v49, v49, v26, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v49, v49, v32, s2 s_waitcnt vmcnt(2) v_fma_f64 v[47:48], 0x40180000, v[51:52], v[47:48] s_waitcnt vmcnt(1) v_fma_f64 v[47:48], v[53:54], -4.0, v[47:48] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[47:48], v[55:56], v[47:48] v_fma_f64 v[47:48], 0xbfd00000, v[47:48], v[49:50] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v25, v25, v48, s3 v_cndmask_b32_e64 v24, v24, v47, s3 v_dual_cndmask_b32 v31, v31, v48 :: v_dual_cndmask_b32 v30, v30, v47 v_cndmask_b32_e64 v29, v29, v48, s0 v_cndmask_b32_e64 v28, v28, v47, s0 v_cndmask_b32_e64 v27, v27, v48, s1 v_cndmask_b32_e64 v26, v26, v47, s1 v_cndmask_b32_e64 v33, v33, v48, s2 v_cndmask_b32_e64 v32, v32, v47, s2 s_cbranch_scc0 .LBB6_57 .LBB6_58: ; %Flow2405 s_mov_b32 s12, 0 .LBB6_59: ; %Flow2410 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB6_63 ; %bb.60: ; %.preheader1730.preheader v_mov_b32_e32 v24, v46 s_add_i32 s36, s36, 1 s_add_i32 s0, s35, 3 s_add_i32 s35, s35, 1 s_mul_i32 s12, s8, s36 s_mul_i32 s13, s8, s0 s_mul_i32 s35, s8, s35 s_mov_b64 s[6:7], 0 .LBB6_61: ; %.preheader1730 ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v25, s12, v24 v_add_nc_u32_e32 v27, s35, v24 v_add_nc_u32_e32 v29, s13, v24 s_cmp_eq_u32 s6, 1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v26, 31, v25 v_ashrrev_i32_e32 v28, 31, v27 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v30, 31, v29 v_lshlrev_b64 v[25:26], 3, v[25:26] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[27:28], 3, v[27:28] v_lshlrev_b64 v[29:30], 3, v[29:30] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v25, vcc_lo, s4, v25 v_add_co_ci_u32_e32 v26, vcc_lo, s5, v26, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v27, vcc_lo, s4, v27 v_add_co_ci_u32_e32 v28, vcc_lo, s5, v28, vcc_lo v_add_co_u32 v29, vcc_lo, s4, v29 s_clause 0x1 global_load_b64 v[25:26], v[25:26], off global_load_b64 v[27:28], v[27:28], off v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 global_load_b64 v[29:30], v[29:30], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(2) v_mul_f64 v[25:26], v[25:26], -4.0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[25:26], 0x40140000, v[27:28], v[25:26] v_dual_cndmask_b32 v27, v35, v37 :: v_dual_cndmask_b32 v28, v34, v36 v_cndmask_b32_e64 v27, v27, v39, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v28, v28, v38, s0 v_cndmask_b32_e64 v27, v27, v41, s1 s_waitcnt vmcnt(0) v_add_f64 v[25:26], v[29:30], v[25:26] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v29, v28, v40, s1 v_cndmask_b32_e64 v28, v27, v43, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v27, v29, v42, s2 v_fma_f64 v[25:26], 0xbfd00000, v[25:26], v[27:28] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_cndmask_b32 v37, v37, v26 :: v_dual_add_nc_u32 v24, s33, v24 v_cndmask_b32_e64 v35, v35, v26, s3 v_cndmask_b32_e64 v34, v34, v25, s3 v_cndmask_b32_e32 v36, v36, v25, vcc_lo v_cndmask_b32_e64 v39, v39, v26, s0 v_cndmask_b32_e64 v38, v38, v25, s0 v_cndmask_b32_e64 v41, v41, v26, s1 v_cndmask_b32_e64 v40, v40, v25, s1 v_cndmask_b32_e64 v43, v43, v26, s2 v_cndmask_b32_e64 v42, v42, v25, s2 s_cbranch_scc0 .LBB6_61 ; %bb.62: ; %Flow2406 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v32, v42 :: v_dual_mov_b32 v33, v43 v_dual_mov_b32 v26, v40 :: v_dual_mov_b32 v27, v41 v_dual_mov_b32 v28, v38 :: v_dual_mov_b32 v29, v39 v_dual_mov_b32 v30, v36 :: v_dual_mov_b32 v31, v37 v_dual_mov_b32 v24, v34 :: v_dual_mov_b32 v25, v35 .LBB6_63: ; %NodeBlock2380 s_add_i32 s1, s15, 1 s_lshl_b32 s2, s34, 1 s_mul_i32 s0, s34, s1 s_add_i32 s13, s15, -1 v_add_nc_u32_e32 v34, s0, v11 s_sub_i32 s0, s0, s2 s_add_i32 s2, s1, s10 v_add_nc_u32_e32 v36, s0, v11 s_add_i32 s3, s2, s10 s_mul_i32 s0, s1, s9 s_add_i32 s6, s3, s37 s_add_i32 s12, s0, s14 s_mul_i32 s6, s6, s9 s_mul_i32 s12, s12, s8 s_add_i32 s6, s6, s14 v_ashrrev_i32_e32 v35, 31, v34 v_add_nc_u32_e32 v38, s12, v0 v_mad_u64_u32 v[42:43], null, s6, s8, v[0:1] v_ashrrev_i32_e32 v37, 31, v36 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[34:35], 3, v[34:35] v_ashrrev_i32_e32 v39, 31, v38 s_add_i32 s1, s31, s1 s_add_i32 s6, s13, s10 v_lshlrev_b64 v[36:37], 3, v[36:37] v_ashrrev_i32_e32 v43, 31, v42 v_add_co_u32 v40, vcc_lo, s22, v34 v_lshlrev_b64 v[38:39], 3, v[38:39] v_add_co_ci_u32_e32 v41, vcc_lo, s23, v35, vcc_lo v_add_co_u32 v44, vcc_lo, s22, v36 v_lshlrev_b64 v[42:43], 3, v[42:43] v_add_co_ci_u32_e32 v45, vcc_lo, s23, v37, vcc_lo v_add_co_u32 v38, vcc_lo, s4, v38 v_add_co_ci_u32_e32 v39, vcc_lo, s5, v39, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v42, vcc_lo, s4, v42 v_add_co_ci_u32_e32 v43, vcc_lo, s5, v43, vcc_lo s_mul_i32 s1, s1, s9 s_clause 0x1 global_load_b64 v[40:41], v[40:41], off global_load_b64 v[44:45], v[44:45], off s_add_i32 s1, s1, s14 global_load_b64 v[42:43], v[42:43], off v_mad_u64_u32 v[47:48], null, s1, s8, v[0:1] s_add_i32 s1, s31, s13 s_add_i32 s7, s6, s10 s_mul_i32 s1, s1, s9 v_mul_f64 v[16:17], v[16:17], v[5:6] s_add_i32 s1, s1, s14 s_delay_alu instid0(SALU_CYCLE_1) v_mad_u64_u32 v[49:50], null, s1, s8, v[0:1] s_mul_i32 s1, s2, s9 s_add_i32 s2, s7, s37 v_ashrrev_i32_e32 v48, 31, v47 s_mul_i32 s2, s2, s9 s_add_i32 s1, s1, s14 s_add_i32 s2, s2, s14 v_mad_u64_u32 v[51:52], null, s1, s8, v[0:1] v_mad_u64_u32 v[53:54], null, s2, s8, v[0:1] v_lshlrev_b64 v[47:48], 3, v[47:48] s_mul_i32 s2, s3, s9 v_ashrrev_i32_e32 v50, 31, v49 s_add_i32 s2, s2, s14 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v52, 31, v51 v_mad_u64_u32 v[57:58], null, s2, s8, v[0:1] v_ashrrev_i32_e32 v54, 31, v53 v_add_co_u32 v47, vcc_lo, s4, v47 v_add_co_ci_u32_e32 v48, vcc_lo, s5, v48, vcc_lo v_lshlrev_b64 v[53:54], 3, v[53:54] v_add_co_u32 v55, vcc_lo, s24, v34 global_load_b64 v[47:48], v[47:48], off v_add_co_ci_u32_e32 v56, vcc_lo, s25, v35, vcc_lo v_add_co_u32 v53, vcc_lo, s4, v53 v_add_co_ci_u32_e32 v54, vcc_lo, s5, v54, vcc_lo global_load_b64 v[38:39], v[38:39], off global_load_b64 v[55:56], v[55:56], off global_load_b64 v[53:54], v[53:54], off v_lshlrev_b64 v[51:52], 3, v[51:52] v_ashrrev_i32_e32 v58, 31, v57 v_lshlrev_b64 v[49:50], 3, v[49:50] s_mul_i32 s2, s6, s9 s_lshl_b32 s1, s9, 1 s_add_i32 s2, s2, s14 v_add_co_u32 v51, vcc_lo, s4, v51 v_lshlrev_b64 v[57:58], 3, v[57:58] v_add_co_ci_u32_e32 v52, vcc_lo, s5, v52, vcc_lo v_add_co_u32 v49, vcc_lo, s4, v49 v_add_co_ci_u32_e32 v50, vcc_lo, s5, v50, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v57, vcc_lo, s4, v57 v_add_co_ci_u32_e32 v58, vcc_lo, s5, v58, vcc_lo v_add_co_u32 v61, vcc_lo, s26, v34 v_add_co_ci_u32_e32 v62, vcc_lo, s27, v35, vcc_lo v_add_co_u32 v63, vcc_lo, s24, v36 v_add_co_ci_u32_e32 v64, vcc_lo, s25, v37, vcc_lo v_add_co_u32 v65, vcc_lo, s26, v36 v_add_co_ci_u32_e32 v66, vcc_lo, s27, v37, vcc_lo s_clause 0x1 global_load_b64 v[51:52], v[51:52], off global_load_b64 v[57:58], v[57:58], off global_load_b64 v[61:62], v[61:62], off global_load_b64 v[63:64], v[63:64], off v_mad_u64_u32 v[59:60], null, s2, s8, v[0:1] global_load_b64 v[65:66], v[65:66], off s_mul_i32 s2, s7, s9 v_add_co_u32 v69, vcc_lo, s18, v34 s_add_i32 s2, s2, s14 v_add_co_ci_u32_e32 v70, vcc_lo, s19, v35, vcc_lo v_mad_u64_u32 v[67:68], null, s2, s8, v[0:1] v_ashrrev_i32_e32 v60, 31, v59 v_add_co_u32 v71, vcc_lo, s20, v34 v_add_co_ci_u32_e32 v72, vcc_lo, s21, v35, vcc_lo s_delay_alu instid0(VALU_DEP_3) v_lshlrev_b64 v[59:60], 3, v[59:60] v_ashrrev_i32_e32 v68, 31, v67 global_load_b64 v[49:50], v[49:50], off global_load_b64 v[69:70], v[69:70], off global_load_b64 v[71:72], v[71:72], off s_sub_i32 s0, s0, s1 v_add_co_u32 v59, vcc_lo, s4, v59 v_lshlrev_b64 v[67:68], 3, v[67:68] v_add_co_ci_u32_e32 v60, vcc_lo, s5, v60, vcc_lo v_add_co_u32 v34, vcc_lo, s16, v34 v_add_co_ci_u32_e32 v35, vcc_lo, s17, v35, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v67, vcc_lo, s4, v67 v_add_co_ci_u32_e32 v68, vcc_lo, s5, v68, vcc_lo global_load_b64 v[34:35], v[34:35], off global_load_b64 v[59:60], v[59:60], off s_add_i32 s0, s0, s14 v_add_co_u32 v75, vcc_lo, s18, v36 global_load_b64 v[67:68], v[67:68], off v_mad_u64_u32 v[73:74], null, s0, s8, v[0:1] v_add_co_ci_u32_e32 v76, vcc_lo, s19, v37, vcc_lo v_add_co_u32 v77, vcc_lo, s20, v36 v_add_co_ci_u32_e32 v78, vcc_lo, s21, v37, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_ashrrev_i32_e32 v74, 31, v73 global_load_b64 v[75:76], v[75:76], off global_load_b64 v[77:78], v[77:78], off s_getpc_b64 s[2:3] s_add_u32 s2, s2, dz5tz1@rel32@lo+4 s_addc_u32 s3, s3, dz5tz1@rel32@hi+12 s_mov_b32 s6, 0x9999999a v_lshlrev_b64 v[73:74], 3, v[73:74] s_load_b64 s[2:3], s[2:3], 0x0 s_mov_b32 s7, 0x3fd99999 s_mov_b32 s18, 0x66666666 s_mov_b32 s19, 0x3ff66666 s_mov_b32 s26, 0x55555555 v_add_co_u32 v73, vcc_lo, s4, v73 v_add_co_ci_u32_e32 v74, vcc_lo, s5, v74, vcc_lo v_add_co_u32 v36, vcc_lo, s16, v36 v_add_co_ci_u32_e32 v37, vcc_lo, s17, v37, vcc_lo global_load_b64 v[73:74], v[73:74], off global_load_b64 v[36:37], v[36:37], off s_mov_b32 s27, 0x3ff55555 s_waitcnt vmcnt(21) v_fma_f64 v[16:17], v[40:41], v[40:41], -v[16:17] v_add_f64 v[5:6], v[40:41], -v[5:6] s_waitcnt vmcnt(19) v_add_f64 v[18:19], v[42:43], -v[18:19] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_fma_f64 v[16:17], v[44:45], v[44:45], v[16:17] s_waitcnt vmcnt(18) v_add_f64 v[20:21], v[47:48], -v[20:21] v_add_f64 v[5:6], v[5:6], v[44:45] s_waitcnt vmcnt(17) v_add_f64 v[1:2], v[38:39], -v[1:2] s_waitcnt vmcnt(16) v_add_f64 v[22:23], v[55:56], -v[22:23] s_waitcnt vmcnt(15) v_add_f64 v[18:19], v[18:19], v[53:54] s_waitcnt vmcnt(13) v_add_f64 v[9:10], v[57:58], -v[9:10] v_add_f64 v[7:8], v[51:52], -v[7:8] s_waitcnt vmcnt(12) v_add_f64 v[55:56], v[42:43], -v[61:62] v_mul_f64 v[61:62], v[61:62], s[6:7] s_waitcnt vmcnt(11) v_add_f64 v[22:23], v[22:23], v[63:64] s_waitcnt lgkmcnt(0) v_fma_f64 v[18:19], v[18:19], s[2:3], v[32:33] s_waitcnt vmcnt(10) v_mul_f64 v[32:33], v[65:66], s[6:7] s_getpc_b64 s[2:3] s_add_u32 s2, s2, zzcon3@rel32@lo+4 s_addc_u32 s3, s3, zzcon3@rel32@hi+12 s_getpc_b64 s[16:17] s_add_u32 s16, s16, zzcon2@rel32@lo+4 s_addc_u32 s17, s17, zzcon2@rel32@hi+12 s_load_b64 s[2:3], s[2:3], 0x0 s_waitcnt vmcnt(9) v_mul_f64 v[38:39], v[44:45], v[49:50] s_waitcnt vmcnt(8) v_add_f64 v[14:15], v[69:70], -v[14:15] s_waitcnt vmcnt(7) v_add_f64 v[3:4], v[71:72], -v[3:4] v_add_f64 v[20:21], v[20:21], v[49:50] s_waitcnt vmcnt(6) v_fma_f64 v[11:12], v[42:43], v[34:35], -v[12:13] s_waitcnt vmcnt(5) v_add_f64 v[7:8], v[7:8], v[59:60] v_add_f64 v[34:35], v[55:56], -v[53:54] v_mul_f64 v[55:56], v[44:45], v[59:60] s_waitcnt vmcnt(4) v_add_f64 v[9:10], v[9:10], v[67:68] v_mul_f64 v[59:60], v[44:45], v[67:68] v_fma_f64 v[42:43], v[42:43], s[18:19], -v[61:62] s_waitcnt lgkmcnt(0) v_fma_f64 v[18:19], s[2:3], v[22:23], v[18:19] v_fma_f64 v[22:23], v[53:54], s[18:19], -v[32:33] s_load_b64 s[2:3], s[16:17], 0x0 s_getpc_b64 s[16:17] s_add_u32 s16, s16, dz2tz1@rel32@lo+4 s_addc_u32 s17, s17, dz2tz1@rel32@hi+12 s_getpc_b64 s[20:21] s_add_u32 s20, s20, dz4tz1@rel32@lo+4 s_addc_u32 s21, s21, dz4tz1@rel32@hi+12 s_getpc_b64 s[22:23] s_add_u32 s22, s22, dz3tz1@rel32@lo+4 s_addc_u32 s23, s23, dz3tz1@rel32@hi+12 s_getpc_b64 s[24:25] s_add_u32 s24, s24, zzcon4@rel32@lo+4 s_addc_u32 s25, s25, zzcon4@rel32@hi+12 s_load_b64 s[16:17], s[16:17], 0x0 s_load_b64 s[20:21], s[20:21], 0x0 s_load_b64 s[22:23], s[22:23], 0x0 s_load_b64 s[24:25], s[24:25], 0x0 v_fma_f64 v[38:39], v[40:41], v[47:48], -v[38:39] s_waitcnt vmcnt(3) v_add_f64 v[13:14], v[14:15], v[75:76] s_waitcnt vmcnt(2) v_add_f64 v[3:4], v[3:4], v[77:78] s_waitcnt lgkmcnt(0) v_mul_f64 v[32:33], s[2:3], s[26:27] s_waitcnt vmcnt(1) v_add_f64 v[1:2], v[1:2], v[73:74] v_fma_f64 v[20:21], v[20:21], s[20:21], v[26:27] s_waitcnt vmcnt(0) v_fma_f64 v[11:12], v[53:54], v[36:37], v[11:12] v_fma_f64 v[7:8], s[16:17], v[7:8], v[30:31] v_add_f64 v[26:27], v[34:35], v[65:66] s_getpc_b64 s[16:17] s_add_u32 s16, s16, dz1tz1@rel32@lo+4 s_addc_u32 s17, s17, dz1tz1@rel32@hi+12 v_fma_f64 v[9:10], s[22:23], v[9:10], v[28:29] s_getpc_b64 s[18:19] s_add_u32 s18, s18, zzcon5@rel32@lo+4 s_addc_u32 s19, s19, zzcon5@rel32@hi+12 s_load_b64 s[16:17], s[16:17], 0x0 s_load_b64 s[18:19], s[18:19], 0x0 v_fma_f64 v[15:16], v[16:17], s[24:25], v[18:19] v_mul_f64 v[17:18], v[44:45], v[22:23] v_add_f64 v[22:23], v[47:48], -v[49:50] v_fma_f64 v[28:29], v[40:41], v[51:52], -v[55:56] v_fma_f64 v[30:31], v[40:41], v[57:58], -v[59:60] s_waitcnt lgkmcnt(0) v_fma_f64 v[1:2], s[16:17], v[1:2], v[24:25] v_fma_f64 v[5:6], v[5:6], v[32:33], v[20:21] s_mov_b32 s16, 0 v_fma_f64 v[7:8], s[2:3], v[13:14], v[7:8] v_fma_f64 v[3:4], s[2:3], v[3:4], v[9:10] v_fma_f64 v[9:10], v[26:27], s[6:7], v[38:39] s_getpc_b64 s[2:3] s_add_u32 s2, s2, tz2@rel32@lo+4 s_addc_u32 s3, s3, tz2@rel32@hi+12 s_cmp_lt_i32 s15, 2 v_fma_f64 v[11:12], s[18:19], v[11:12], v[15:16] v_fma_f64 v[13:14], v[40:41], v[42:43], -v[17:18] s_load_b64 s[2:3], s[2:3], 0x0 s_waitcnt lgkmcnt(0) v_fma_f64 v[17:18], -s[2:3], v[22:23], v[1:2] v_fma_f64 v[19:20], -s[2:3], v[28:29], v[7:8] v_fma_f64 v[21:22], -s[2:3], v[30:31], v[3:4] v_fma_f64 v[23:24], -s[2:3], v[9:10], v[5:6] v_fma_f64 v[25:26], -s[2:3], v[13:14], v[11:12] s_mov_b32 s2, -1 s_cbranch_scc1 .LBB6_68 ; %bb.64: ; %LeafBlock2378 s_cmp_eq_u32 s15, 2 s_cbranch_scc0 .LBB6_69 ; %bb.65: ; %.preheader1722.preheader s_lshl_b32 s0, s9, 2 s_mul_i32 s2, s9, s13 s_add_i32 s0, s14, s0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v3, v19 v_mov_b32_e32 v5, v21 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v7, v23 v_dual_mov_b32 v9, v25 :: v_dual_mov_b32 v10, v26 v_dual_mov_b32 v11, v46 :: v_dual_mov_b32 v4, v20 v_dual_mov_b32 v1, v17 :: v_dual_mov_b32 v2, v18 v_mov_b32_e32 v6, v22 v_mov_b32_e32 v8, v24 s_add_i32 s1, s14, s1 s_mul_i32 s17, s8, s0 s_add_i32 s0, s14, s2 s_mul_i32 s18, s8, s1 s_mul_i32 s19, s8, s0 s_mov_b64 s[6:7], 0 .LBB6_66: ; %.preheader1722 ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v12, s19, v11 v_add_nc_u32_e32 v14, s18, v11 v_add_nc_u32_e32 v27, s12, v11 v_add_nc_u32_e32 v29, s17, v11 s_cmp_eq_u32 s6, 1 v_ashrrev_i32_e32 v13, 31, v12 v_ashrrev_i32_e32 v15, 31, v14 v_ashrrev_i32_e32 v28, 31, v27 v_ashrrev_i32_e32 v30, 31, v29 v_add_nc_u32_e32 v11, s33, v11 v_lshlrev_b64 v[12:13], 3, v[12:13] v_lshlrev_b64 v[14:15], 3, v[14:15] v_lshlrev_b64 v[27:28], 3, v[27:28] v_lshlrev_b64 v[29:30], 3, v[29:30] s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v12, vcc_lo, s4, v12 v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo v_add_co_u32 v14, vcc_lo, s4, v14 v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo global_load_b64 v[12:13], v[12:13], off v_add_co_u32 v27, vcc_lo, s4, v27 global_load_b64 v[14:15], v[14:15], off v_add_co_ci_u32_e32 v28, vcc_lo, s5, v28, vcc_lo v_add_co_u32 v29, vcc_lo, s4, v29 v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo global_load_b64 v[27:28], v[27:28], off s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 global_load_b64 v[29:30], v[29:30], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(3) v_mul_f64 v[12:13], v[12:13], -4.0 s_waitcnt vmcnt(2) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], 0x40180000, v[14:15], v[12:13] v_dual_cndmask_b32 v14, v2, v4 :: v_dual_cndmask_b32 v15, v1, v3 v_cndmask_b32_e64 v14, v14, v6, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v15, v15, v5, s0 v_cndmask_b32_e64 v14, v14, v8, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v16, v15, v7, s1 v_cndmask_b32_e64 v15, v14, v10, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v14, v16, v9, s2 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], v[27:28], -4.0, v[12:13] s_waitcnt vmcnt(0) v_add_f64 v[12:13], v[29:30], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], 0xbfd00000, v[12:13], v[14:15] v_cndmask_b32_e64 v10, v10, v13, s2 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v9, v9, v12, s2 v_cndmask_b32_e64 v8, v8, v13, s1 v_cndmask_b32_e64 v7, v7, v12, s1 v_cndmask_b32_e64 v6, v6, v13, s0 v_cndmask_b32_e64 v5, v5, v12, s0 v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_cndmask_b32_e64 v2, v2, v13, s3 v_cndmask_b32_e64 v1, v1, v12, s3 s_cbranch_scc0 .LBB6_66 ; %bb.67: ; %Flow2382 s_mov_b32 s0, 0 s_branch .LBB6_70 .LBB6_68: s_mov_b32 s0, 0 ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 s_branch .LBB6_71 .LBB6_69: s_mov_b32 s0, -1 ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 .LBB6_70: ; %Flow2393 s_mov_b32 s2, 0 .LBB6_71: ; %Flow2392 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s2 s_cbranch_vccz .LBB6_73 ; %bb.72: ; %LeafBlock2376 s_cmp_lg_u32 s15, 1 s_mov_b32 s16, -1 s_cselect_b32 s0, -1, 0 ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 .LBB6_73: ; %Flow2394 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB6_91 ; %bb.74: s_add_i32 s0, s10, -3 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_ge_i32 s15, s0 s_cbranch_scc0 .LBB6_79 ; %bb.75: s_cmp_lg_u32 s15, s0 s_cbranch_scc0 .LBB6_80 ; %bb.76: s_add_i32 s0, s10, -2 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s15, s0 s_cbranch_scc1 .LBB6_81 ; %bb.77: ; %.preheader1718 s_add_i32 s0, s15, -2 s_mul_i32 s1, s9, s13 s_mul_i32 s0, s9, s0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v3, v19 v_mov_b32_e32 v5, v21 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v7, v23 v_dual_mov_b32 v9, v25 :: v_dual_mov_b32 v10, v26 v_dual_mov_b32 v11, v46 :: v_dual_mov_b32 v4, v20 v_dual_mov_b32 v1, v17 :: v_dual_mov_b32 v2, v18 v_mov_b32_e32 v6, v22 v_mov_b32_e32 v8, v24 s_add_i32 s1, s14, s1 s_add_i32 s0, s14, s0 s_mul_i32 s10, s8, s1 s_mul_i32 s16, s8, s0 s_mov_b64 s[6:7], 0 .LBB6_78: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v12, s16, v11 v_add_nc_u32_e32 v14, s10, v11 v_add_nc_u32_e32 v27, s11, v11 s_cmp_eq_u32 s6, 1 v_add_nc_u32_e32 v11, s33, v11 v_ashrrev_i32_e32 v13, 31, v12 v_ashrrev_i32_e32 v15, 31, v14 v_ashrrev_i32_e32 v28, 31, v27 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[12:13], 3, v[12:13] v_lshlrev_b64 v[14:15], 3, v[14:15] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[27:28], 3, v[27:28] v_add_co_u32 v12, vcc_lo, s4, v12 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo v_add_co_u32 v14, vcc_lo, s4, v14 v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo v_add_co_u32 v27, vcc_lo, s4, v27 s_clause 0x1 global_load_b64 v[12:13], v[12:13], off global_load_b64 v[14:15], v[14:15], off v_add_co_ci_u32_e32 v28, vcc_lo, s5, v28, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 global_load_b64 v[27:28], v[27:28], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], v[14:15], -4.0, v[12:13] v_dual_cndmask_b32 v14, v2, v4 :: v_dual_cndmask_b32 v15, v1, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v14, v14, v6, s0 v_cndmask_b32_e64 v15, v15, v5, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v14, v14, v8, s1 v_cndmask_b32_e64 v16, v15, v7, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v15, v14, v10, s2 v_cndmask_b32_e64 v14, v16, v9, s2 s_waitcnt vmcnt(0) v_fma_f64 v[12:13], 0x40140000, v[27:28], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], 0xbfd00000, v[12:13], v[14:15] v_cndmask_b32_e32 v4, v4, v13, vcc_lo v_cndmask_b32_e64 v10, v10, v13, s2 s_delay_alu instid0(VALU_DEP_3) v_cndmask_b32_e64 v9, v9, v12, s2 v_cndmask_b32_e64 v8, v8, v13, s1 v_cndmask_b32_e64 v7, v7, v12, s1 v_cndmask_b32_e64 v6, v6, v13, s0 v_cndmask_b32_e64 v5, v5, v12, s0 v_cndmask_b32_e32 v3, v3, v12, vcc_lo v_cndmask_b32_e64 v2, v2, v13, s3 v_cndmask_b32_e64 v1, v1, v12, s3 s_cbranch_scc0 .LBB6_78 s_branch .LBB6_82 .LBB6_79: s_mov_b32 s0, -1 ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 s_branch .LBB6_87 .LBB6_80: s_mov_b32 s0, -1 ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16 s_branch .LBB6_83 .LBB6_81: v_dual_mov_b32 v1, v17 :: v_dual_mov_b32 v2, v18 v_dual_mov_b32 v3, v19 :: v_dual_mov_b32 v4, v20 v_dual_mov_b32 v5, v21 :: v_dual_mov_b32 v6, v22 v_dual_mov_b32 v7, v23 :: v_dual_mov_b32 v8, v24 v_dual_mov_b32 v9, v25 :: v_dual_mov_b32 v10, v26 v_dual_mov_b32 v11, v27 :: v_dual_mov_b32 v12, v28 v_dual_mov_b32 v13, v29 :: v_dual_mov_b32 v14, v30 v_dual_mov_b32 v15, v31 :: v_dual_mov_b32 v16, v32 .LBB6_82: ; %Flow2384 s_mov_b32 s0, 0 .LBB6_83: ; %Flow2386 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB6_86 ; %bb.84: ; %.preheader1716 s_add_i32 s0, s15, -2 s_mul_i32 s1, s9, s13 s_mul_i32 s0, s9, s0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v3, v19 v_mov_b32_e32 v5, v21 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v7, v23 v_dual_mov_b32 v9, v25 :: v_dual_mov_b32 v10, v26 v_dual_mov_b32 v11, v46 :: v_dual_mov_b32 v4, v20 v_dual_mov_b32 v1, v17 :: v_dual_mov_b32 v2, v18 v_mov_b32_e32 v6, v22 v_mov_b32_e32 v8, v24 s_add_i32 s1, s14, s1 s_add_i32 s0, s14, s0 s_mul_i32 s10, s8, s1 s_mul_i32 s16, s8, s0 s_mov_b64 s[6:7], 0 .LBB6_85: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v12, s16, v11 v_add_nc_u32_e32 v14, s10, v11 v_add_nc_u32_e32 v27, s11, v11 v_add_nc_u32_e32 v29, s12, v11 s_cmp_eq_u32 s6, 1 v_ashrrev_i32_e32 v13, 31, v12 v_ashrrev_i32_e32 v15, 31, v14 v_ashrrev_i32_e32 v28, 31, v27 v_ashrrev_i32_e32 v30, 31, v29 v_add_nc_u32_e32 v11, s33, v11 v_lshlrev_b64 v[12:13], 3, v[12:13] v_lshlrev_b64 v[14:15], 3, v[14:15] v_lshlrev_b64 v[27:28], 3, v[27:28] v_lshlrev_b64 v[29:30], 3, v[29:30] s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v12, vcc_lo, s4, v12 v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo v_add_co_u32 v14, vcc_lo, s4, v14 v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo v_add_co_u32 v27, vcc_lo, s4, v27 s_clause 0x1 global_load_b64 v[12:13], v[12:13], off global_load_b64 v[14:15], v[14:15], off v_add_co_ci_u32_e32 v28, vcc_lo, s5, v28, vcc_lo v_add_co_u32 v29, vcc_lo, s4, v29 v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo global_load_b64 v[27:28], v[27:28], off s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 global_load_b64 v[29:30], v[29:30], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(2) v_fma_f64 v[12:13], v[14:15], -4.0, v[12:13] v_dual_cndmask_b32 v14, v2, v4 :: v_dual_cndmask_b32 v15, v1, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v14, v14, v6, s0 v_cndmask_b32_e64 v15, v15, v5, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v14, v14, v8, s1 v_cndmask_b32_e64 v16, v15, v7, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v15, v14, v10, s2 v_cndmask_b32_e64 v14, v16, v9, s2 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], 0x40180000, v[27:28], v[12:13] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], v[29:30], -4.0, v[12:13] v_fma_f64 v[12:13], 0xbfd00000, v[12:13], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v10, v10, v13, s2 v_cndmask_b32_e64 v9, v9, v12, s2 v_cndmask_b32_e64 v8, v8, v13, s1 v_cndmask_b32_e64 v7, v7, v12, s1 v_cndmask_b32_e64 v6, v6, v13, s0 v_cndmask_b32_e64 v5, v5, v12, s0 v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_cndmask_b32_e64 v2, v2, v13, s3 v_cndmask_b32_e64 v1, v1, v12, s3 s_cbranch_scc0 .LBB6_85 .LBB6_86: ; %Flow2387 s_mov_b32 s0, 0 .LBB6_87: ; %Flow2389 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB6_90 ; %bb.88: ; %.preheader s_add_i32 s0, s15, 2 s_add_i32 s15, s15, -2 s_mul_i32 s0, s9, s0 s_mul_i32 s1, s9, s13 s_add_i32 s0, s14, s0 s_mul_i32 s2, s9, s15 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v3, v19 v_mov_b32_e32 v5, v21 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mov_b32_e32 v7, v23 v_dual_mov_b32 v9, v25 :: v_dual_mov_b32 v10, v26 v_dual_mov_b32 v11, v46 :: v_dual_mov_b32 v4, v20 v_dual_mov_b32 v1, v17 :: v_dual_mov_b32 v2, v18 v_mov_b32_e32 v6, v22 v_mov_b32_e32 v8, v24 s_mul_i32 s10, s8, s0 s_add_i32 s0, s14, s1 s_add_i32 s1, s14, s2 s_mul_i32 s13, s8, s0 s_mul_i32 s15, s8, s1 s_mov_b64 s[6:7], 0 .LBB6_89: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v12, s15, v11 v_add_nc_u32_e32 v14, s13, v11 v_add_nc_u32_e32 v27, s11, v11 v_add_nc_u32_e32 v29, s12, v11 v_add_nc_u32_e32 v31, s10, v11 v_ashrrev_i32_e32 v13, 31, v12 v_ashrrev_i32_e32 v15, 31, v14 v_ashrrev_i32_e32 v28, 31, v27 v_ashrrev_i32_e32 v30, 31, v29 v_ashrrev_i32_e32 v32, 31, v31 v_lshlrev_b64 v[12:13], 3, v[12:13] v_lshlrev_b64 v[14:15], 3, v[14:15] v_lshlrev_b64 v[27:28], 3, v[27:28] v_lshlrev_b64 v[29:30], 3, v[29:30] v_lshlrev_b64 v[31:32], 3, v[31:32] s_cmp_eq_u32 s6, 1 v_add_co_u32 v12, vcc_lo, s4, v12 v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo v_add_co_u32 v14, vcc_lo, s4, v14 v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo v_add_co_u32 v27, vcc_lo, s4, v27 s_clause 0x1 global_load_b64 v[12:13], v[12:13], off global_load_b64 v[14:15], v[14:15], off v_add_co_ci_u32_e32 v28, vcc_lo, s5, v28, vcc_lo v_add_co_u32 v29, vcc_lo, s4, v29 v_add_co_ci_u32_e32 v30, vcc_lo, s5, v30, vcc_lo global_load_b64 v[27:28], v[27:28], off v_add_co_u32 v31, vcc_lo, s4, v31 global_load_b64 v[29:30], v[29:30], off v_add_co_ci_u32_e32 v32, vcc_lo, s5, v32, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_add_nc_u32_e32 v11, s33, v11 global_load_b64 v[31:32], v[31:32], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(3) v_fma_f64 v[12:13], v[14:15], -4.0, v[12:13] v_dual_cndmask_b32 v14, v2, v4 :: v_dual_cndmask_b32 v15, v1, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v14, v14, v6, s0 v_cndmask_b32_e64 v15, v15, v5, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v14, v14, v8, s1 v_cndmask_b32_e64 v16, v15, v7, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v15, v14, v10, s2 v_cndmask_b32_e64 v14, v16, v9, s2 s_waitcnt vmcnt(2) v_fma_f64 v[12:13], 0x40180000, v[27:28], v[12:13] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], v[29:30], -4.0, v[12:13] s_waitcnt vmcnt(0) v_add_f64 v[12:13], v[31:32], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], 0xbfd00000, v[12:13], v[14:15] v_cndmask_b32_e64 v10, v10, v13, s2 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v9, v9, v12, s2 v_cndmask_b32_e64 v8, v8, v13, s1 v_cndmask_b32_e64 v7, v7, v12, s1 v_cndmask_b32_e64 v6, v6, v13, s0 v_cndmask_b32_e64 v5, v5, v12, s0 v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_cndmask_b32_e64 v2, v2, v13, s3 v_cndmask_b32_e64 v1, v1, v12, s3 s_cbranch_scc0 .LBB6_89 .LBB6_90: ; %Flow2390 s_mov_b32 s16, 0 .LBB6_91: ; %Flow2395 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s16 s_cbranch_vccnz .LBB6_95 ; %bb.92: ; %.preheader1720.preheader s_mul_i32 s0, s9, 3 s_add_i32 s1, s14, s9 s_add_i32 s14, s14, s0 s_mul_i32 s9, s8, s1 s_mul_i32 s8, s8, s14 s_mov_b64 s[6:7], 0 .LBB6_93: ; %.preheader1720 ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v1, s12, v46 v_add_nc_u32_e32 v3, s9, v46 v_add_nc_u32_e32 v5, s8, v46 s_cmp_eq_u32 s6, 1 v_add_nc_u32_e32 v46, s33, v46 v_ashrrev_i32_e32 v2, 31, v1 v_ashrrev_i32_e32 v4, 31, v3 v_ashrrev_i32_e32 v6, 31, v5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[1:2], 3, v[1:2] v_lshlrev_b64 v[3:4], 3, v[3:4] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[5:6], 3, v[5:6] v_add_co_u32 v1, vcc_lo, s4, v1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo v_add_co_u32 v3, vcc_lo, s4, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo s_clause 0x1 global_load_b64 v[1:2], v[1:2], off global_load_b64 v[3:4], v[3:4], off v_add_co_u32 v5, vcc_lo, s4, v5 v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 global_load_b64 v[5:6], v[5:6], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_eq_u32 s6, 5 s_waitcnt vmcnt(2) v_mul_f64 v[1:2], v[1:2], -4.0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[1:2], 0x40140000, v[3:4], v[1:2] v_dual_cndmask_b32 v4, v17, v19 :: v_dual_cndmask_b32 v3, v18, v20 v_cndmask_b32_e64 v4, v4, v21, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v3, v3, v22, s0 v_cndmask_b32_e64 v3, v3, v24, s1 s_waitcnt vmcnt(0) v_add_f64 v[1:2], v[5:6], v[1:2] v_cndmask_b32_e64 v5, v4, v23, s1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v4, v3, v26, s2 v_cndmask_b32_e64 v3, v5, v25, s2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[1:2], 0xbfd00000, v[1:2], v[3:4] v_cndmask_b32_e64 v26, v26, v2, s2 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v25, v25, v1, s2 v_cndmask_b32_e64 v24, v24, v2, s1 v_cndmask_b32_e64 v23, v23, v1, s1 v_cndmask_b32_e64 v22, v22, v2, s0 v_cndmask_b32_e64 v21, v21, v1, s0 v_dual_cndmask_b32 v20, v20, v2 :: v_dual_cndmask_b32 v19, v19, v1 v_cndmask_b32_e64 v18, v18, v2, s3 v_cndmask_b32_e64 v17, v17, v1, s3 s_cbranch_scc0 .LBB6_93 ; %bb.94: ; %Flow2391 s_delay_alu instid0(VALU_DEP_1) v_dual_mov_b32 v1, v17 :: v_dual_mov_b32 v2, v18 v_dual_mov_b32 v3, v19 :: v_dual_mov_b32 v4, v20 v_dual_mov_b32 v5, v21 :: v_dual_mov_b32 v6, v22 v_dual_mov_b32 v7, v23 :: v_dual_mov_b32 v8, v24 v_dual_mov_b32 v9, v25 :: v_dual_mov_b32 v10, v26 v_dual_mov_b32 v11, v27 :: v_dual_mov_b32 v12, v28 v_dual_mov_b32 v13, v29 :: v_dual_mov_b32 v14, v30 v_dual_mov_b32 v15, v31 :: v_dual_mov_b32 v16, v32 .LBB6_95: ; %.loopexit1715 s_getpc_b64 s[0:1] s_add_u32 s0, s0, dt@rel32@lo+4 s_addc_u32 s1, s1, dt@rel32@hi+12 s_mov_b64 s[6:7], 0 s_load_b64 s[4:5], s[0:1], 0x0 .LBB6_96: ; =>This Inner Loop Header: Depth=1 s_cmp_eq_u32 s6, 1 s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s6, 2 v_dual_cndmask_b32 v11, v2, v4 :: v_dual_cndmask_b32 v12, v1, v3 s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s6, 3 s_cselect_b32 s1, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v11, v11, v6, s0 v_cndmask_b32_e64 v12, v12, v5, s0 s_cmp_eq_u32 s6, 4 s_cselect_b32 s2, -1, 0 v_cndmask_b32_e64 v11, v11, v8, s1 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v13, v12, v7, s1 s_cmp_eq_u32 s6, 0 s_cselect_b32 s3, -1, 0 v_cndmask_b32_e64 v12, v11, v10, s2 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v11, v13, v9, s2 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 5 s_waitcnt lgkmcnt(0) v_mul_f64 v[11:12], v[11:12], s[4:5] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v10, v10, v12, s2 v_cndmask_b32_e64 v9, v9, v11, s2 v_cndmask_b32_e64 v8, v8, v12, s1 v_cndmask_b32_e64 v7, v7, v11, s1 v_cndmask_b32_e64 v6, v6, v12, s0 v_cndmask_b32_e64 v5, v5, v11, s0 v_dual_cndmask_b32 v4, v4, v12 :: v_dual_cndmask_b32 v3, v3, v11 v_cndmask_b32_e64 v2, v2, v12, s3 v_cndmask_b32_e64 v1, v1, v11, s3 s_cbranch_scc1 .LBB6_96 .LBB6_97: ; %Flow2427 s_or_b32 exec_lo, exec_lo, s30 .LBB6_98: ; %.loopexit s_mul_i32 s11, s11, 5 s_mov_b64 s[2:3], 0 v_mad_u32_u24 v0, v0, 5, s11 .LBB6_99: ; =>This Inner Loop Header: Depth=1 s_cmp_eq_u32 s2, 1 s_cselect_b32 vcc_lo, -1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_dual_cndmask_b32 v14, v1, v3 :: v_dual_add_nc_u32 v11, s2, v0 v_cndmask_b32_e32 v13, v2, v4, vcc_lo s_cmp_eq_u32 s2, 2 v_ashrrev_i32_e32 v12, 31, v11 s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s2, 3 v_cndmask_b32_e64 v13, v13, v6, s0 v_cndmask_b32_e64 v14, v14, v5, s0 v_lshlrev_b64 v[11:12], 3, v[11:12] s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s2, 4 v_cndmask_b32_e32 v13, v13, v8, vcc_lo v_cndmask_b32_e32 v15, v14, v7, vcc_lo s_cselect_b32 s0, -1, 0 v_add_co_u32 v11, vcc_lo, s28, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s29, v12, vcc_lo v_cndmask_b32_e64 v14, v13, v10, s0 v_cndmask_b32_e64 v13, v15, v9, s0 s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 s_cmp_lg_u32 s2, 5 global_store_b64 v[11:12], v[13:14], off s_cbranch_scc1 .LBB6_99 ; %bb.100: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 84 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 94 .amdhsa_next_free_sgpr 52 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii,"axG",@progbits,_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii,comdat .Lfunc_end6: .size _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii, .Lfunc_end6-_ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 13784 ; NumSgprs: 54 ; NumVgprs: 94 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 6 ; VGPRBlocks: 11 ; NumSGPRsForWavesPerEU: 54 ; NumVGPRsForWavesPerEU: 94 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZL13txinvr_kernelPdS_S_S_S_S_S_iii,"axG",@progbits,_ZL13txinvr_kernelPdS_S_S_S_S_S_iii,comdat .globl _ZL13txinvr_kernelPdS_S_S_S_S_S_iii ; -- Begin function _ZL13txinvr_kernelPdS_S_S_S_S_S_iii .p2align 8 .type _ZL13txinvr_kernelPdS_S_S_S_S_S_iii,@function _ZL13txinvr_kernelPdS_S_S_S_S_S_iii: ; @_ZL13txinvr_kernelPdS_S_S_S_S_S_iii ; %bb.0: s_load_b64 s[2:3], s[0:1], 0x38 s_add_i32 s4, s15, 1 v_add_nc_u32_e32 v0, 1, v0 s_add_i32 s20, s14, 1 s_load_b256 s[12:19], s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_mul_i32 s3, s4, s3 s_load_b256 s[4:11], s[0:1], 0x20 s_waitcnt lgkmcnt(0) s_add_i32 s10, s3, s20 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[1:2], null, s10, s2, v[0:1] v_mul_u32_u24_e32 v0, 5, v0 s_mul_i32 s2, s2, 5 s_mul_i32 s0, s2, s20 s_mul_i32 s3, s3, s2 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_add3_u32 v5, s3, s0, v0 s_delay_alu instid0(VALU_DEP_3) v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, bt@rel32@lo+4 s_addc_u32 s1, s1, bt@rel32@hi+12 s_mov_b32 s2, 0x9999999a s_load_b64 s[0:1], s[0:1], 0x0 v_add_nc_u32_e32 v6, 1, v5 v_lshlrev_b64 v[1:2], 3, v[1:2] v_add_nc_u32_e32 v20, 2, v5 v_add_nc_u32_e32 v30, 3, v5 s_mov_b32 s3, 0x3fd99999 v_ashrrev_i32_e32 v7, 31, v6 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v3, vcc_lo, s4, v1 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo v_lshlrev_b64 v[6:7], 3, v[6:7] v_add_co_u32 v8, vcc_lo, s14, v1 global_load_b64 v[3:4], v[3:4], off v_add_co_ci_u32_e32 v9, vcc_lo, s15, v2, vcc_lo v_add_co_u32 v10, vcc_lo, s8, v6 v_add_co_ci_u32_e32 v11, vcc_lo, s9, v7, vcc_lo global_load_b64 v[7:8], v[8:9], off global_load_b64 v[12:13], v[10:11], off v_ashrrev_i32_e32 v6, 31, v5 v_ashrrev_i32_e32 v21, 31, v20 v_ashrrev_i32_e32 v31, 31, v30 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[14:15], 3, v[5:6] v_lshlrev_b64 v[20:21], 3, v[20:21] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_lshlrev_b64 v[30:31], 3, v[30:31] v_add_nc_u32_e32 v5, 4, v5 v_add_co_u32 v14, vcc_lo, s8, v14 v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo v_add_co_u32 v16, vcc_lo, s6, v1 v_add_co_ci_u32_e32 v17, vcc_lo, s7, v2, vcc_lo global_load_b64 v[18:19], v[14:15], off global_load_b64 v[16:17], v[16:17], off v_add_co_u32 v24, vcc_lo, s16, v1 v_add_co_ci_u32_e32 v25, vcc_lo, s17, v2, vcc_lo v_add_co_u32 v20, vcc_lo, s8, v20 v_add_co_ci_u32_e32 v21, vcc_lo, s9, v21, vcc_lo global_load_b64 v[24:25], v[24:25], off global_load_b64 v[26:27], v[20:21], off v_add_co_u32 v32, vcc_lo, s18, v1 v_add_co_ci_u32_e32 v33, vcc_lo, s19, v2, vcc_lo v_add_co_u32 v30, vcc_lo, s8, v30 v_add_co_ci_u32_e32 v31, vcc_lo, s9, v31, vcc_lo global_load_b64 v[32:33], v[32:33], off global_load_b64 v[34:35], v[30:31], off v_ashrrev_i32_e32 v6, 31, v5 v_add_co_u32 v0, vcc_lo, s12, v1 v_add_co_ci_u32_e32 v1, vcc_lo, s13, v2, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[5:6], 3, v[5:6] v_add_co_u32 v5, vcc_lo, s8, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo global_load_b64 v[0:1], v[0:1], off global_load_b64 v[38:39], v[5:6], off s_waitcnt vmcnt(10) v_mul_f64 v[22:23], v[3:4], v[3:4] v_div_scale_f64 v[28:29], null, v[22:23], v[22:23], 1.0 v_div_scale_f64 v[42:43], vcc_lo, 1.0, v[22:23], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[36:37], v[28:29] s_waitcnt_depctr 0xfff v_fma_f64 v[40:41], -v[28:29], v[36:37], 1.0 v_fma_f64 v[36:37], v[36:37], v[40:41], v[36:37] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[40:41], -v[28:29], v[36:37], 1.0 v_fma_f64 v[36:37], v[36:37], v[40:41], v[36:37] s_waitcnt vmcnt(8) v_mul_f64 v[40:41], v[7:8], v[12:13] s_waitcnt vmcnt(7) v_fma_f64 v[7:8], v[7:8], v[18:19], -v[12:13] s_waitcnt vmcnt(2) v_fma_f64 v[12:13], v[32:33], v[18:19], -v[34:35] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f64 v[44:45], v[42:43], v[36:37] v_fma_f64 v[16:17], v[18:19], v[16:17], -v[40:41] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f64 v[12:13], v[12:13], -v[0:1] v_fma_f64 v[28:29], -v[28:29], v[44:45], v[42:43] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[16:17], -v[24:25], v[26:27], v[16:17] v_fma_f64 v[24:25], v[24:25], v[18:19], -v[26:27] v_div_fmas_f64 v[28:29], v[28:29], v[36:37], v[44:45] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[16:17], -v[32:33], v[34:35], v[16:17] v_div_fixup_f64 v[22:23], v[28:29], v[22:23], 1.0 s_waitcnt lgkmcnt(0) v_mul_f64 v[28:29], v[0:1], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[16:17], v[38:39], v[16:17] v_mul_f64 v[0:1], v[0:1], v[24:25] v_mul_f64 v[22:23], v[22:23], s[2:3] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[2:3], v[3:4], v[28:29] v_mul_f64 v[36:37], v[22:23], v[16:17] v_fma_f64 v[16:17], -v[22:23], v[16:17], v[18:19] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[2:3], v[2:3], v[36:37] v_fma_f64 v[18:19], -v[7:8], v[28:29], v[2:3] v_fma_f64 v[2:3], v[7:8], v[28:29], v[2:3] s_clause 0x4 global_store_b64 v[14:15], v[16:17], off global_store_b64 v[10:11], v[12:13], off global_store_b64 v[20:21], v[0:1], off global_store_b64 v[30:31], v[18:19], off global_store_b64 v[5:6], v[2:3], off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL13txinvr_kernelPdS_S_S_S_S_S_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 68 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 46 .amdhsa_next_free_sgpr 21 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL13txinvr_kernelPdS_S_S_S_S_S_iii,"axG",@progbits,_ZL13txinvr_kernelPdS_S_S_S_S_S_iii,comdat .Lfunc_end7: .size _ZL13txinvr_kernelPdS_S_S_S_S_S_iii, .Lfunc_end7-_ZL13txinvr_kernelPdS_S_S_S_S_S_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 828 ; NumSgprs: 23 ; NumVgprs: 46 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 5 ; NumSGPRsForWavesPerEU: 23 ; NumVGPRsForWavesPerEU: 46 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZL14x_solve_kernelPdS_S_S_S_S_iii,"axG",@progbits,_ZL14x_solve_kernelPdS_S_S_S_S_iii,comdat .globl _ZL14x_solve_kernelPdS_S_S_S_S_iii ; -- Begin function _ZL14x_solve_kernelPdS_S_S_S_S_iii .p2align 8 .type _ZL14x_solve_kernelPdS_S_S_S_S_iii,@function _ZL14x_solve_kernelPdS_S_S_S_S_iii: ; @_ZL14x_solve_kernelPdS_S_S_S_S_iii ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x4c s_load_b128 s[16:19], s[0:1], 0x30 v_and_b32_e32 v46, 0x3ff, v0 v_bfe_u32 v45, v0, 10, 10 s_waitcnt lgkmcnt(0) s_and_b32 s3, s2, 0xffff s_lshr_b32 s2, s2, 16 s_mul_i32 s40, s14, s3 s_mul_i32 s6, s15, s2 v_add_nc_u32_e32 v38, s40, v46 v_add_nc_u32_e32 v39, s6, v45 s_add_i32 s2, s18, -1 s_add_i32 s3, s17, -1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v40, 1, v38 v_add_nc_u32_e32 v41, 1, v39 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s2, v40 v_cmp_gt_i32_e64 s2, s3, v41 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB8_86 ; %bb.1: s_mov_b32 s2, 0 s_add_i32 s7, s18, -2 s_mov_b32 s3, s2 v_mov_b32_e32 v0, 0 s_lshl_b32 s19, s16, 2 v_mul_lo_u32 v50, v40, s17 v_mad_u64_u32 v[4:5], null, s7, s19, v[38:39] v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v5, s2 v_mov_b32_e32 v1, v0 v_mov_b32_e32 v2, v0 v_mov_b32_e32 v3, v0 s_add_i32 s33, s17, -2 s_mul_i32 s48, s16, 5 v_mad_u64_u32 v[7:8], null, v4, s33, v[39:40] scratch_store_b128 off, v[0:3], off offset:16 v_mov_b32_e32 v1, 0x3ff00000 s_clause 0x1 s_load_b128 s[20:23], s[0:1], 0x20 s_load_b256 s[8:15], s[0:1], 0x0 v_add_nc_u32_e32 v53, v50, v41 s_mul_i32 s47, s16, s7 s_mov_b32 s24, 0x9999999a s_clause 0x1 scratch_store_b128 off, v[0:3], off offset:32 scratch_store_b64 off, v[5:6], off offset:48 v_mad_u64_u32 v[2:3], null, s7, s48, v[38:39] v_ashrrev_i32_e32 v8, 31, v7 v_mad_u64_u32 v[3:4], null, s47, 6, v[38:39] v_mad_u64_u32 v[11:12], null, s47, 7, v[38:39] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_lshlrev_b64 v[7:8], 3, v[7:8] v_mad_u64_u32 v[9:10], null, v2, s33, v[39:40] v_lshl_add_u32 v4, s47, 3, v38 v_mad_u64_u32 v[12:13], null, v3, s33, v[39:40] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s20, v7 v_add_co_ci_u32_e32 v3, vcc_lo, s21, v8, vcc_lo v_ashrrev_i32_e32 v10, 31, v9 v_mad_u64_u32 v[7:8], null, v11, s33, v[39:40] global_store_b64 v[2:3], v[5:6], off v_ashrrev_i32_e32 v13, 31, v12 v_lshlrev_b64 v[2:3], 3, v[9:10] v_mad_u64_u32 v[9:10], null, v4, s33, v[39:40] v_mul_lo_u32 v51, v53, s16 v_ashrrev_i32_e32 v8, 31, v7 v_lshlrev_b64 v[11:12], 3, v[12:13] v_add_co_u32 v2, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s21, v3, vcc_lo v_ashrrev_i32_e32 v10, 31, v9 v_lshlrev_b64 v[7:8], 3, v[7:8] v_add_co_u32 v11, vcc_lo, s20, v11 v_add_co_ci_u32_e32 v12, vcc_lo, s21, v12, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[9:10], 3, v[9:10] v_add_co_u32 v7, vcc_lo, s20, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s21, v8, vcc_lo s_mov_b32 s26, 0x55555555 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v9, vcc_lo, s20, v9 v_add_co_ci_u32_e32 v10, vcc_lo, s21, v10, vcc_lo s_mov_b32 s28, 0xf5c28f5b s_mov_b32 s25, 0x3fb99999 s_mov_b32 s27, 0x3ff55555 s_mov_b32 s29, 0x3fff5c28 s_mov_b64 s[30:31], 0 s_clause 0x3 global_store_b64 v[2:3], v[5:6], off global_store_b64 v[11:12], v[0:1], off global_store_b64 v[7:8], v[5:6], off global_store_b64 v[9:10], v[5:6], off ; implicit-def: $vgpr2_vgpr3 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $vgpr0_vgpr1 ; implicit-def: $vgpr6_vgpr7 .LBB8_2: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v4, s30, v51 s_cmp_eq_u32 s30, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v5, 31, v4 v_lshlrev_b64 v[4:5], 3, v[4:5] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, s8, v4 v_add_co_ci_u32_e32 v11, vcc_lo, s9, v5, vcc_lo v_add_co_u32 v4, vcc_lo, s10, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo global_load_b64 v[10:11], v[10:11], off s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s30, 1 global_load_b64 v[4:5], v[4:5], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s30, 2 s_cselect_b32 s1, -1, 0 s_waitcnt vmcnt(1) v_mul_f64 v[16:17], v[10:11], s[24:25] v_fma_f64 v[10:11], v[10:11], s[24:25], 0x3fe80000 s_waitcnt vmcnt(0) v_cndmask_b32_e64 v9, v9, v5, s1 v_cndmask_b32_e64 v8, v8, v4, s1 v_cndmask_b32_e64 v7, v7, v5, s0 v_cndmask_b32_e64 v6, v6, v4, s0 v_dual_cndmask_b32 v0, v0, v4 :: v_dual_cndmask_b32 v1, v1, v5 v_fma_f64 v[18:19], v[16:17], s[28:29], 0x3fe80000 v_fma_f64 v[16:17], v[16:17], s[26:27], 0x3fe80000 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v23, v2, v18, vcc_lo v_cmp_gt_f64_e64 s2, v[16:17], v[18:19] v_cndmask_b32_e64 v20, v15, v19, s1 v_cndmask_b32_e64 v21, v14, v18, s1 v_cndmask_b32_e32 v22, v3, v19, vcc_lo v_cndmask_b32_e64 v19, v13, v19, s0 v_cndmask_b32_e64 v18, v12, v18, s0 v_dual_cndmask_b32 v3, v3, v17 :: v_dual_cndmask_b32 v2, v2, v16 v_cndmask_b32_e64 v12, v12, v16, s0 v_cndmask_b32_e64 v13, v13, v17, s0 v_cndmask_b32_e64 v14, v14, v16, s1 v_cndmask_b32_e64 v15, v15, v17, s1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v12, v18, v12, s2 v_cndmask_b32_e64 v13, v19, v13, s2 v_cndmask_b32_e64 v16, v22, v3, s2 v_cndmask_b32_e64 v17, v23, v2, s2 v_cndmask_b32_e64 v14, v21, v14, s2 v_cndmask_b32_e64 v15, v20, v15, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v2, v16, v13, s0 v_cndmask_b32_e64 v18, v17, v12, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v3, v2, v15, s1 v_cndmask_b32_e64 v2, v18, v14, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_f64_e64 s2, v[2:3], v[10:11] s_and_b32 s3, s2, s1 s_and_b32 s4, s2, s0 s_and_b32 s2, s2, vcc_lo v_cndmask_b32_e64 v14, v14, v10, s3 v_cndmask_b32_e64 v12, v12, v10, s4 v_cndmask_b32_e64 v10, v17, v10, s2 v_cndmask_b32_e64 v13, v13, v11, s4 v_cndmask_b32_e64 v16, v16, v11, s2 v_cndmask_b32_e64 v11, v15, v11, s3 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v2, v10, v12, s0 v_cndmask_b32_e64 v3, v16, v13, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v2, v2, v14, s1 v_cndmask_b32_e64 v3, v3, v11, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_f64_e64 s2, 0x3fe80000, v[2:3] s_and_b32 s1, s2, s1 s_and_b32 s0, s2, s0 s_and_b32 s2, s2, vcc_lo v_cndmask_b32_e64 v15, v11, 0x3fe80000, s1 v_cndmask_b32_e64 v13, v13, 0x3fe80000, s0 v_cndmask_b32_e64 v3, v16, 0x3fe80000, s2 v_cndmask_b32_e64 v14, v14, 0, s1 v_cndmask_b32_e64 v12, v12, 0, s0 v_cndmask_b32_e64 v2, v10, 0, s2 s_add_u32 s30, s30, 1 s_addc_u32 s31, s31, 0 s_cmp_lg_u32 s30, 3 s_cbranch_scc1 .LBB8_2 ; %bb.3: s_getpc_b64 s[0:1] s_add_u32 s0, s0, dtx1@rel32@lo+4 s_addc_u32 s1, s1, dtx1@rel32@hi+12 s_getpc_b64 s[2:3] s_add_u32 s2, s2, c2dttx1@rel32@lo+4 s_addc_u32 s3, s3, c2dttx1@rel32@hi+12 s_load_b64 s[0:1], s[0:1], 0x0 s_getpc_b64 s[24:25] s_add_u32 s24, s24, dttx2@rel32@lo+4 s_addc_u32 s25, s25, dttx2@rel32@hi+12 s_load_b64 s[4:5], s[2:3], 0x0 s_load_b64 s[2:3], s[24:25], 0x0 s_getpc_b64 s[24:25] s_add_u32 s24, s24, comz5@rel32@lo+4 s_addc_u32 s25, s25, comz5@rel32@hi+12 s_getpc_b64 s[26:27] s_add_u32 s26, s26, comz4@rel32@lo+4 s_addc_u32 s27, s27, comz4@rel32@hi+12 s_getpc_b64 s[28:29] s_add_u32 s28, s28, comz1@rel32@lo+4 s_addc_u32 s29, s29, comz1@rel32@hi+12 s_load_b64 s[24:25], s[24:25], 0x0 s_load_b64 s[26:27], s[26:27], 0x0 s_load_b64 s[28:29], s[28:29], 0x0 v_add_nc_u32_e64 v52, 16, 40 s_mul_i32 s44, s47, s33 s_waitcnt lgkmcnt(0) v_mul_f64 v[4:5], v[14:15], s[0:1] v_mul_f64 v[2:3], v[2:3], s[0:1] v_fma_f64 v[10:11], v[12:13], s[4:5], 1.0 v_add_f64 v[24:25], s[28:29], 0 s_add_i32 s28, s19, 1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4) s_mul_i32 s28, s7, s28 v_fma_f64 v[18:19], v[8:9], s[2:3], -v[4:5] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[3:4], v[0:1], -s[2:3], -v[2:3] v_add_f64 v[16:17], v[10:11], s[24:25] v_add3_u32 v0, s40, s28, v46 v_mov_b32_e32 v1, 0 s_mov_b32 s28, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v0, v0, s33 v_mov_b32_e32 v2, v1 s_delay_alu instid0(VALU_DEP_2) v_add3_u32 v0, v45, v0, s6 v_add_f64 v[18:19], v[18:19], -s[26:27] s_clause 0x2 scratch_store_b128 off, v[1:4], off offset:56 scratch_store_b128 off, v[16:19], off offset:72 scratch_store_b64 off, v[24:25], off offset:88 .LBB8_4: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v1, s28, v52 s_add_i32 s28, s28, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) s_cmp_lg_u32 s28, 40 scratch_load_b64 v[2:3], v1, off v_ashrrev_i32_e32 v1, 31, v0 v_lshlrev_b64 v[4:5], 3, v[0:1] v_add_nc_u32_e32 v0, s44, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, s20, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s21, v5, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[4:5], v[2:3], off s_cbranch_scc1 .LBB8_4 ; %bb.5: v_add3_u32 v0, v45, v50, s6 s_add_i32 s41, 0x110, 40 s_mov_b32 s28, 0 s_mov_b32 s29, s41 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshl_add_u32 v48, v0, 2, v0 v_add_nc_u32_e32 v0, 5, v48 s_delay_alu instid0(VALU_DEP_1) v_mul_lo_u32 v47, s16, v0 .LBB8_6: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v0, s28, v47 s_add_i32 s28, s28, 1 v_add_nc_u32_e32 v2, 5, v0 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v3, 31, v2 v_lshlrev_b64 v[0:1], 3, v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[2:3], 3, v[2:3] v_add_co_u32 v0, vcc_lo, s14, v0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo v_add_co_u32 v2, vcc_lo, s14, v2 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo s_clause 0x1 global_load_b64 v[0:1], v[0:1], off global_load_b64 v[2:3], v[2:3], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[0:1], s29 offset:-40 s_waitcnt vmcnt(0) scratch_store_b64 off, v[2:3], s29 s_add_i32 s29, s29, 8 s_cmp_eq_u32 s28, 3 s_cbranch_scc0 .LBB8_6 ; %bb.7: ; %.preheader674 v_mov_b32_e32 v16, 0 v_dual_mov_b32 v17, 0x3ff00000 :: v_dual_mov_b32 v18, 0 v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v11, v9 s_add_i32 s45, s16, -2 v_mov_b32_e32 v19, 0 v_add_nc_u32_e32 v49, 3, v51 s_cmp_gt_i32 s16, 2 s_mul_i32 s42, s18, s17 s_cselect_b32 s49, -1, 0 s_cmp_lt_i32 s16, 3 s_mul_i32 s46, s7, s33 s_mul_i32 s43, s42, s16 s_cbranch_scc1 .LBB8_47 ; %bb.8: ; %.lr.ph s_add_i32 s30, s19, 2 s_getpc_b64 s[28:29] s_add_u32 s28, s28, comz6@rel32@lo+4 s_addc_u32 s29, s29, comz6@rel32@hi+12 s_mul_i32 s30, s7, s30 s_load_b64 s[28:29], s[28:29], 0x0 v_add3_u32 v0, s40, s30, v46 v_dual_mov_b32 v1, 16 :: v_dual_mov_b32 v2, 0x110 v_mad_u64_u32 v[42:43], null, v51, 5, 10 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_lo_u32 v0, v0, s33 v_add_nc_u32_e32 v54, 0x50, v1 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_dual_mov_b32 v26, 0 :: v_dual_add_nc_u32 v55, 0x50, v2 v_mov_b32_e32 v57, 0x3ff00000 s_mov_b32 s30, 0x9999999a s_mov_b32 s34, 0x55555555 s_mov_b32 s36, 0xf5c28f5b v_add3_u32 v56, v45, v0, s6 s_add_i32 s50, s16, -3 s_mov_b32 s31, 0x3fb99999 s_mov_b32 s35, 0x3ff55555 s_mov_b32 s37, 0x3fff5c28 s_add_i32 s51, s16, -5 s_mov_b32 s38, 0 s_mov_b32 s52, 0 .LBB8_9: ; =>This Loop Header: Depth=1 ; Child Loop BB8_29 Depth 2 ; Child Loop BB8_34 Depth 2 ; Child Loop BB8_36 Depth 2 ; Child Loop BB8_38 Depth 2 ; Child Loop BB8_40 Depth 2 ; Child Loop BB8_42 Depth 2 ; Child Loop BB8_44 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) s_add_i32 s39, s52, 2 s_cmp_lg_u32 s52, s50 s_cbranch_scc0 .LBB8_16 ; %bb.10: ; in Loop: Header=BB8_9 Depth=1 v_add_nc_u32_e32 v0, s52, v49 v_fma_f64 v[34:35], s[4:5], v[14:15], 1.0 s_cmp_lg_u32 s52, 0 v_mov_b32_e32 v27, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v1, 31, v0 v_lshlrev_b64 v[0:1], 3, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s8, v0 v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s10, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo global_load_b64 v[4:5], v[2:3], off global_load_b64 v[2:3], v[0:1], off s_waitcnt vmcnt(1) v_mul_f64 v[0:1], v[4:5], s[30:31] v_fma_f64 v[4:5], v[4:5], s[30:31], 0x3fe80000 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[18:19], v[0:1], s[34:35], 0x3fe80000 v_fma_f64 v[0:1], v[0:1], s[36:37], 0x3fe80000 v_cmp_gt_f64_e32 vcc_lo, v[18:19], v[0:1] v_dual_cndmask_b32 v1, v1, v19 :: v_dual_cndmask_b32 v0, v0, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5] v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v0, v0, v4 v_mul_f64 v[4:5], s[0:1], v[12:13] v_cmp_ngt_f64_e32 vcc_lo, 0x3fe80000, v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_fma_f64 v[28:29], v[6:7], -s[2:3], -v[4:5] v_cndmask_b32_e32 v21, 0x3fe80000, v1, vcc_lo v_cndmask_b32_e32 v20, 0, v0, vcc_lo v_mul_f64 v[0:1], s[0:1], v[20:21] scratch_store_b128 off, v[26:29], off offset:96 s_waitcnt vmcnt(0) v_fma_f64 v[36:37], s[2:3], v[2:3], -v[0:1] s_clause 0x1 scratch_store_b128 off, v[34:37], off offset:112 scratch_store_b64 off, v[26:27], off offset:128 s_cbranch_scc0 .LBB8_17 ; %bb.11: ; in Loop: Header=BB8_9 Depth=1 s_cmp_ge_i32 s39, s50 s_cbranch_scc0 .LBB8_18 ; %bb.12: ; in Loop: Header=BB8_9 Depth=1 s_cmp_lg_u32 s52, s51 s_cbranch_scc0 .LBB8_19 ; %bb.13: ; in Loop: Header=BB8_9 Depth=1 v_mov_b32_e32 v43, 0 v_dual_mov_b32 v44, 0 :: v_dual_mov_b32 v31, v29 v_mov_b32_e32 v30, v28 v_dual_mov_b32 v32, v34 :: v_dual_mov_b32 v33, v35 s_cmp_lg_u32 s39, s45 s_cbranch_scc1 .LBB8_15 ; %bb.14: ; in Loop: Header=BB8_9 Depth=1 v_add_f64 v[60:61], v[28:29], -s[26:27] v_add_f64 v[32:33], s[24:25], v[34:35] v_dual_mov_b32 v58, v24 :: v_dual_mov_b32 v59, v25 v_dual_mov_b32 v44, v25 :: v_dual_mov_b32 v43, v24 s_clause 0x1 scratch_store_b128 off, v[58:61], off offset:96 scratch_store_b64 off, v[32:33], off offset:112 v_dual_mov_b32 v30, v60 :: v_dual_mov_b32 v31, v61 .LBB8_15: ; %Flow1071 ; in Loop: Header=BB8_9 Depth=1 s_mov_b32 s53, 0 s_branch .LBB8_20 .LBB8_16: ; in Loop: Header=BB8_9 Depth=1 s_mov_b32 s53, -1 ; implicit-def: $vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 ; implicit-def: $vgpr43_vgpr44 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB8_31 .LBB8_17: ; in Loop: Header=BB8_9 Depth=1 s_mov_b32 s53, -1 ; implicit-def: $vgpr43_vgpr44 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB8_26 .LBB8_18: ; in Loop: Header=BB8_9 Depth=1 s_mov_b32 s53, -1 ; implicit-def: $vgpr43_vgpr44 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB8_23 .LBB8_19: ; in Loop: Header=BB8_9 Depth=1 s_mov_b32 s53, -1 ; implicit-def: $vgpr43_vgpr44 ; implicit-def: $vgpr30_vgpr31 .LBB8_20: ; %Flow1072 ; in Loop: Header=BB8_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s53 s_cbranch_vccnz .LBB8_22 ; %bb.21: ; in Loop: Header=BB8_9 Depth=1 v_add_f64 v[60:61], v[28:29], -s[26:27] s_waitcnt lgkmcnt(0) v_add_f64 v[62:63], v[34:35], s[28:29] v_add_f64 v[64:65], v[36:37], -s[26:27] v_dual_mov_b32 v58, v24 :: v_dual_mov_b32 v59, v25 v_dual_mov_b32 v44, v25 :: v_dual_mov_b32 v43, v24 s_clause 0x1 scratch_store_b128 off, v[58:61], off offset:96 scratch_store_b128 off, v[62:65], off offset:112 v_dual_mov_b32 v30, v60 :: v_dual_mov_b32 v31, v61 v_dual_mov_b32 v32, v62 :: v_dual_mov_b32 v33, v63 .LBB8_22: ; %Flow1073 ; in Loop: Header=BB8_9 Depth=1 s_mov_b32 s53, 0 .LBB8_23: ; %Flow1074 ; in Loop: Header=BB8_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s53 s_cbranch_vccnz .LBB8_25 ; %bb.24: ; in Loop: Header=BB8_9 Depth=1 v_add_f64 v[60:61], v[28:29], -s[26:27] s_waitcnt lgkmcnt(0) v_add_f64 v[62:63], v[34:35], s[28:29] v_add_f64 v[64:65], v[36:37], -s[26:27] v_dual_mov_b32 v58, v24 :: v_dual_mov_b32 v59, v25 v_dual_mov_b32 v44, v25 :: v_dual_mov_b32 v43, v24 s_clause 0x2 scratch_store_b128 off, v[58:61], off offset:96 scratch_store_b128 off, v[62:65], off offset:112 scratch_store_b64 off, v[24:25], off offset:128 v_dual_mov_b32 v30, v60 :: v_dual_mov_b32 v31, v61 v_dual_mov_b32 v32, v62 :: v_dual_mov_b32 v33, v63 .LBB8_25: ; %Flow1075 ; in Loop: Header=BB8_9 Depth=1 s_mov_b32 s53, 0 .LBB8_26: ; %Flow1076 ; in Loop: Header=BB8_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s53 s_cbranch_vccnz .LBB8_28 ; %bb.27: ; in Loop: Header=BB8_9 Depth=1 v_add_f64 v[30:31], v[28:29], -s[26:27] s_waitcnt lgkmcnt(0) v_add_f64 v[32:33], v[34:35], s[28:29] v_add_f64 v[22:23], v[36:37], -s[26:27] v_mov_b32_e32 v43, 0 v_mov_b32_e32 v44, 0 s_clause 0x1 scratch_store_b128 off, v[30:33], off offset:104 scratch_store_b128 off, v[22:25], off offset:120 .LBB8_28: ; in Loop: Header=BB8_9 Depth=1 v_mov_b32_e32 v0, v56 s_mov_b32 s53, 0 .LBB8_29: ; Parent Loop BB8_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_nc_u32_e32 v1, s53, v54 s_add_i32 s53, s53, 8 s_cmp_lg_u32 s53, 40 scratch_load_b64 v[4:5], v1, off v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[18:19], 3, v[0:1] v_add_nc_u32_e32 v0, s44, v0 v_add_co_u32 v18, vcc_lo, s20, v18 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v19, vcc_lo, s21, v19, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[18:19], v[4:5], off s_cbranch_scc1 .LBB8_29 ; %bb.30: ; in Loop: Header=BB8_9 Depth=1 v_dual_mov_b32 v18, v14 :: v_dual_mov_b32 v19, v15 v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v3 s_mov_b32 s53, 0 .LBB8_31: ; %Flow1077 ; in Loop: Header=BB8_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s53 s_cbranch_vccz .LBB8_33 ; %bb.32: ; in Loop: Header=BB8_9 Depth=1 s_add_i32 s53, s39, s19 s_mov_b32 s39, s38 v_mad_u64_u32 v[0:1], null, s53, s7, v[38:39] v_dual_mov_b32 v27, v26 :: v_dual_mov_b32 v34, s38 v_dual_mov_b32 v28, v26 :: v_dual_mov_b32 v35, s39 s_add_i32 s39, s53, s16 v_dual_mov_b32 v29, v26 :: v_dual_mov_b32 v30, 0 s_delay_alu instid0(VALU_DEP_4) v_mad_u64_u32 v[1:2], null, v0, s33, v[39:40] v_mad_u64_u32 v[3:4], null, s39, s7, v[38:39] s_add_i32 s39, s39, s16 s_clause 0x1 scratch_store_b128 off, v[26:29], off offset:96 scratch_store_b64 off, v[34:35], off offset:128 v_mad_u64_u32 v[4:5], null, s39, s7, v[38:39] v_ashrrev_i32_e32 v2, 31, v1 s_add_i32 s39, s39, s16 v_mad_u64_u32 v[18:19], null, v3, s33, v[39:40] v_dual_mov_b32 v27, v57 :: v_dual_mov_b32 v32, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_lshlrev_b64 v[0:1], 3, v[1:2] v_mad_u64_u32 v[2:3], null, s39, s7, v[38:39] s_add_i32 s39, s39, s16 v_mad_u64_u32 v[20:21], null, v4, s33, v[39:40] v_mad_u64_u32 v[3:4], null, s39, s7, v[38:39] v_add_co_u32 v0, vcc_lo, s20, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s21, v1, vcc_lo v_ashrrev_i32_e32 v19, 31, v18 v_mad_u64_u32 v[4:5], null, v2, s33, v[39:40] v_ashrrev_i32_e32 v21, 31, v20 global_store_b64 v[0:1], v[34:35], off v_lshlrev_b64 v[0:1], 3, v[18:19] v_mad_u64_u32 v[18:19], null, v3, s33, v[39:40] v_lshlrev_b64 v[2:3], 3, v[20:21] v_ashrrev_i32_e32 v5, 31, v4 scratch_store_b128 off, v[26:29], off offset:112 v_add_co_u32 v28, vcc_lo, s20, v0 v_add_co_ci_u32_e32 v29, vcc_lo, s21, v1, vcc_lo v_ashrrev_i32_e32 v19, 31, v18 v_lshlrev_b64 v[0:1], 3, v[4:5] v_add_co_u32 v36, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v37, vcc_lo, s21, v3, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[2:3], 3, v[18:19] v_add_co_u32 v58, vcc_lo, s20, v0 v_mov_b32_e32 v31, 0 v_add_co_ci_u32_e32 v59, vcc_lo, s21, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v60, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v61, vcc_lo, s21, v3, vcc_lo v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v33, 0x3ff00000 v_dual_mov_b32 v44, v31 :: v_dual_mov_b32 v23, v17 v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v43, v30 v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v1, v7 v_dual_mov_b32 v4, v10 :: v_dual_mov_b32 v3, v9 v_dual_mov_b32 v22, v16 :: v_dual_mov_b32 v5, v11 v_dual_mov_b32 v20, v14 :: v_dual_mov_b32 v21, v15 v_mov_b32_e32 v19, v13 s_clause 0x3 global_store_b64 v[28:29], v[34:35], off global_store_b64 v[36:37], v[26:27], off global_store_b64 v[58:59], v[34:35], off global_store_b64 v[60:61], v[34:35], off .LBB8_33: ; in Loop: Header=BB8_9 Depth=1 v_mov_b32_e32 v6, v55 s_mov_b32 s39, 0 .LBB8_34: ; Parent Loop BB8_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_nc_u32_e32 v7, s39, v42 s_add_i32 s39, s39, 1 s_cmp_lg_u32 s39, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v8, 31, v7 v_lshlrev_b64 v[7:8], 3, v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, s14, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s15, v8, vcc_lo global_load_b64 v[7:8], v[7:8], off s_waitcnt vmcnt(0) scratch_store_b64 v6, v[7:8], off v_add_nc_u32_e32 v6, 8, v6 s_cbranch_scc1 .LBB8_34 ; %bb.35: ; in Loop: Header=BB8_9 Depth=1 s_clause 0x1 scratch_load_b128 v[6:9], off, off offset:32 scratch_load_b64 v[12:13], off, off offset:48 s_mov_b32 s39, 0 s_waitcnt vmcnt(1) v_div_scale_f64 v[10:11], null, v[6:7], v[6:7], 1.0 v_div_scale_f64 v[27:28], vcc_lo, 1.0, v[6:7], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[14:15], v[10:11] s_waitcnt_depctr 0xfff v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[16:17], v[27:28], v[14:15] v_fma_f64 v[10:11], -v[10:11], v[16:17], v[27:28] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[10:11], v[10:11], v[14:15], v[16:17] v_div_fixup_f64 v[10:11], v[10:11], v[6:7], 1.0 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[6:7], v[8:9], v[10:11] s_waitcnt vmcnt(0) v_mul_f64 v[8:9], v[10:11], v[12:13] scratch_store_b128 off, v[6:9], off offset:40 .LBB8_36: ; Parent Loop BB8_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_add_i32 s53, s39, 0x110 s_add_i32 s39, s39, 8 scratch_load_b64 v[12:13], off, s53 s_cmp_lg_u32 s39, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s53 s_cbranch_scc1 .LBB8_36 ; %bb.37: ; in Loop: Header=BB8_9 Depth=1 s_clause 0x1 scratch_load_b128 v[10:13], off, off offset:64 scratch_load_b64 v[14:15], off, off offset:80 s_mov_b32 s39, 0 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], -v[6:7], v[10:11], v[12:13] s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[8:9], v[10:11], v[14:15] scratch_store_b128 off, v[12:15], off offset:72 .LBB8_38: ; Parent Loop BB8_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v12, 0x110, s39 s_add_i32 s53, s39, 0x110 s_add_i32 s39, s39, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s39, 24 v_add_nc_u32_e32 v16, 40, v12 s_clause 0x1 scratch_load_b64 v[12:13], off, s53 scratch_load_b64 v[14:15], v16, off s_waitcnt vmcnt(0) v_fma_f64 v[12:13], -v[10:11], v[12:13], v[14:15] scratch_store_b64 v16, v[12:13], off s_cbranch_scc1 .LBB8_38 ; %bb.39: ; in Loop: Header=BB8_9 Depth=1 v_fma_f64 v[10:11], -v[6:7], v[43:44], v[30:31] v_fma_f64 v[12:13], -v[8:9], v[43:44], v[32:33] s_mov_b32 s39, 0 scratch_store_b128 off, v[10:13], off offset:104 .LBB8_40: ; Parent Loop BB8_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v10, 0x110, s39 s_add_i32 s53, s39, 0x110 s_add_i32 s39, s39, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s39, 24 v_add_nc_u32_e32 v14, 0x50, v10 s_clause 0x1 scratch_load_b64 v[10:11], off, s53 scratch_load_b64 v[12:13], v14, off s_waitcnt vmcnt(0) v_fma_f64 v[10:11], -v[43:44], v[10:11], v[12:13] scratch_store_b64 v14, v[10:11], off s_cbranch_scc1 .LBB8_40 ; %bb.41: ; in Loop: Header=BB8_9 Depth=1 v_mad_u64_u32 v[10:11], null, s52, s7, v[38:39] s_add_i32 s39, s52, s16 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[11:12], null, s39, s7, v[38:39] s_mov_b32 s39, 0 v_mad_u64_u32 v[12:13], null, v10, s33, v[39:40] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[14:15], null, v11, s33, v[39:40] v_ashrrev_i32_e32 v13, 31, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v15, 31, v14 v_lshlrev_b64 v[10:11], 3, v[12:13] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[12:13], 3, v[14:15] v_add_co_u32 v10, vcc_lo, s20, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v11, vcc_lo, s21, v11, vcc_lo v_add_co_u32 v12, vcc_lo, s20, v12 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v13, vcc_lo, s21, v13, vcc_lo s_clause 0x1 global_store_b64 v[10:11], v[6:7], off global_store_b64 v[12:13], v[8:9], off .LBB8_42: ; Parent Loop BB8_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v6, s39, 16 s_add_i32 s53, s39, 16 s_add_i32 s39, s39, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s39, 40 v_add_nc_u32_e32 v10, 40, v6 v_add_nc_u32_e32 v8, 0x50, v6 s_clause 0x1 scratch_load_b64 v[6:7], v10, off scratch_load_b64 v[8:9], v8, off s_waitcnt vmcnt(1) scratch_store_b64 off, v[6:7], s53 s_waitcnt vmcnt(0) scratch_store_b64 v10, v[8:9], off s_cbranch_scc1 .LBB8_42 ; %bb.43: ; %.preheader673.preheader ; in Loop: Header=BB8_9 Depth=1 v_mov_b32_e32 v6, v53 s_mov_b32 s39, 0 .LBB8_44: ; %.preheader673 ; Parent Loop BB8_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_add_nc_u32_e64 v7, 0x110, s39 s_add_i32 s53, s39, 0x110 s_add_i32 s39, s39, 8 s_cmp_lg_u32 s39, 24 s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v16, 40, v7 v_add_nc_u32_e32 v7, 0x50, v7 s_clause 0x2 scratch_load_b64 v[8:9], off, s53 scratch_load_b64 v[10:11], v16, off scratch_load_b64 v[12:13], v7, off v_ashrrev_i32_e32 v7, 31, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[14:15], 3, v[6:7] v_add_nc_u32_e32 v6, s43, v6 v_add_co_u32 v14, vcc_lo, s22, v14 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v15, vcc_lo, s23, v15, vcc_lo s_waitcnt vmcnt(2) global_store_b64 v[14:15], v[8:9], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[10:11], s53 s_waitcnt vmcnt(0) scratch_store_b64 v16, v[12:13], off s_cbranch_scc1 .LBB8_44 ; %bb.45: ; in Loop: Header=BB8_9 Depth=1 v_add_nc_u32_e32 v56, s46, v56 v_add_nc_u32_e32 v42, 5, v42 v_add_nc_u32_e32 v53, s42, v53 s_add_i32 s52, s52, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s52, s45 s_cbranch_scc0 .LBB8_48 ; %bb.46: ; in Loop: Header=BB8_9 Depth=1 v_dual_mov_b32 v12, v18 :: v_dual_mov_b32 v13, v19 v_dual_mov_b32 v11, v5 :: v_dual_mov_b32 v10, v4 v_dual_mov_b32 v14, v20 :: v_dual_mov_b32 v15, v21 v_dual_mov_b32 v16, v22 :: v_dual_mov_b32 v17, v23 v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2 v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0 s_branch .LBB8_9 .LBB8_47: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7 v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9 v_dual_mov_b32 v4, v10 :: v_dual_mov_b32 v5, v11 v_dual_mov_b32 v8, v18 :: v_dual_mov_b32 v9, v19 s_branch .LBB8_49 .LBB8_48: ; %._crit_edge.loopexit s_clause 0x1 scratch_load_b128 v[16:19], off, off offset:32 scratch_load_b64 v[8:9], off, off offset:48 .LBB8_49: ; %._crit_edge s_waitcnt vmcnt(1) v_div_scale_f64 v[6:7], null, v[16:17], v[16:17], 1.0 v_div_scale_f64 v[14:15], vcc_lo, 1.0, v[16:17], 1.0 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[10:11], v[6:7] s_waitcnt_depctr 0xfff v_fma_f64 v[12:13], -v[6:7], v[10:11], 1.0 v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], -v[6:7], v[10:11], 1.0 v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[12:13], v[14:15], v[10:11] v_fma_f64 v[6:7], -v[6:7], v[12:13], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[6:7], v[6:7], v[10:11], v[12:13] v_div_fixup_f64 v[10:11], v[6:7], v[16:17], 1.0 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[6:7], v[18:19], v[10:11] s_waitcnt vmcnt(0) v_mul_f64 v[8:9], v[10:11], v[8:9] scratch_store_b128 off, v[6:9], off offset:40 .LBB8_50: ; =>This Inner Loop Header: Depth=1 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 scratch_load_b64 v[12:13], off, s1 s_cmp_lg_u32 s0, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s1 s_cbranch_scc1 .LBB8_50 ; %bb.51: s_clause 0x1 scratch_load_b128 v[10:13], off, off offset:64 scratch_load_b64 v[14:15], off, off offset:80 s_mov_b32 s0, 0 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], -v[6:7], v[10:11], v[12:13] s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[8:9], v[10:11], v[14:15] scratch_store_b128 off, v[12:15], off offset:72 .LBB8_52: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v14, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 24 v_add_nc_u32_e32 v18, 40, v14 s_clause 0x1 scratch_load_b64 v[14:15], off, s1 scratch_load_b64 v[16:17], v18, off s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[10:11], v[14:15], v[16:17] scratch_store_b64 v18, v[14:15], off s_cbranch_scc1 .LBB8_52 ; %bb.53: v_div_scale_f64 v[10:11], null, v[12:13], v[12:13], 1.0 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[14:15], v[10:11] s_waitcnt_depctr 0xfff v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] v_div_scale_f64 v[16:17], vcc_lo, 1.0, v[12:13], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[18:19], v[16:17], v[14:15] v_fma_f64 v[10:11], -v[10:11], v[18:19], v[16:17] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[10:11], v[10:11], v[14:15], v[18:19] v_div_fixup_f64 v[10:11], v[10:11], v[12:13], 1.0 .LBB8_54: ; =>This Inner Loop Header: Depth=1 s_add_i32 s1, s41, s0 s_add_i32 s0, s0, 8 scratch_load_b64 v[12:13], off, s1 s_cmp_lg_u32 s0, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s1 s_cbranch_scc1 .LBB8_54 ; %bb.55: v_mad_u64_u32 v[10:11], null, s7, s45, v[38:39] s_add_i32 s0, s45, s16 s_mov_b64 s[4:5], 0 v_mad_u64_u32 v[11:12], null, s7, s0, v[38:39] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[12:13], null, v10, s33, v[39:40] v_mad_u64_u32 v[14:15], null, v11, s33, v[39:40] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v13, 31, v12 v_ashrrev_i32_e32 v15, 31, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[10:11], 3, v[12:13] v_lshlrev_b64 v[12:13], 3, v[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v16, vcc_lo, s20, v10 v_add_co_ci_u32_e32 v17, vcc_lo, s21, v11, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v10, vcc_lo, s20, v12 v_add_co_ci_u32_e32 v11, vcc_lo, s21, v13, vcc_lo s_clause 0x1 global_store_b64 v[16:17], v[6:7], off global_store_b64 v[10:11], v[8:9], off .LBB8_56: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v6, s4, v51 s_cmp_eq_u32 s4, 2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v7, 31, v6 v_lshlrev_b64 v[6:7], 3, v[6:7] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, s12, v6 v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s4, 1 s_cselect_b32 s0, -1, 0 global_load_b64 v[6:7], v[6:7], off s_cmp_eq_u32 s4, 0 s_cselect_b32 s1, -1, 0 s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s4, 3 s_waitcnt vmcnt(0) v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v4, v4, v6 v_cndmask_b32_e64 v3, v3, v7, s0 v_cndmask_b32_e64 v2, v2, v6, s0 v_cndmask_b32_e64 v1, v1, v7, s1 v_cndmask_b32_e64 v0, v0, v6, s1 s_cbranch_scc1 .LBB8_56 ; %bb.57: ; %.preheader672.preheader s_lshl_b32 s0, s47, 2 v_add_nc_u32_e64 v8, 0x90, 40 s_add_i32 s0, s40, s0 v_mov_b32_e32 v9, v39 s_add_i32 s1, s0, s18 v_add_nc_u32_e32 v7, s0, v46 v_add3_u32 v6, s1, v46, -2 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v7, v7, s33 v_mul_lo_u32 v6, v6, s33 .LBB8_58: ; %.preheader672 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v10, v7, v9 v_add_nc_u32_e32 v12, v6, v9 v_add_nc_u32_e32 v14, s0, v52 v_add_nc_u32_e32 v9, s44, v9 v_add_nc_u32_e32 v15, s0, v8 v_ashrrev_i32_e32 v11, 31, v10 v_ashrrev_i32_e32 v13, 31, v12 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_cmp_lg_u32 s0, 40 v_lshlrev_b64 v[10:11], 3, v[10:11] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[12:13], 3, v[12:13] v_add_co_u32 v10, vcc_lo, s20, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v11, vcc_lo, s21, v11, vcc_lo v_add_co_u32 v12, vcc_lo, s20, v12 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v13, vcc_lo, s21, v13, vcc_lo s_clause 0x1 global_load_b64 v[10:11], v[10:11], off global_load_b64 v[12:13], v[12:13], off s_waitcnt vmcnt(1) scratch_store_b64 v14, v[10:11], off offset:-40 s_waitcnt vmcnt(0) scratch_store_b64 v14, v[12:13], off s_clause 0x1 scratch_store_b64 v15, v[10:11], off offset:-40 scratch_store_b64 v15, v[12:13], off s_cbranch_scc1 .LBB8_58 ; %bb.59: s_clause 0x3 scratch_load_b64 v[18:19], off, off offset:192 scratch_load_b64 v[22:23], off, off offset:208 scratch_load_b64 v[24:25], off, off offset:64 scratch_load_b64 v[26:27], off, off offset:80 v_mul_lo_u32 v6, s48, v41 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[20:21], null, v50, s48, v[6:7] v_ashrrev_i32_e32 v21, 31, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[6:7], 3, v[20:21] v_cndmask_b32_e64 v21, 0, 1, s49 v_add_co_u32 v14, vcc_lo, s14, v6 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v15, vcc_lo, s15, v7, vcc_lo s_and_not1_b32 vcc_lo, exec_lo, s49 s_clause 0x1 global_load_b128 v[10:13], v[14:15], off offset:24 global_load_b128 v[6:9], v[14:15], off offset:64 s_waitcnt vmcnt(5) v_fma_f64 v[18:19], -s[2:3], v[0:1], v[18:19] s_waitcnt vmcnt(4) v_fma_f64 v[22:23], s[2:3], v[4:5], v[22:23] s_waitcnt vmcnt(3) v_fma_f64 v[0:1], s[2:3], v[0:1], v[24:25] s_waitcnt vmcnt(2) v_fma_f64 v[24:25], -s[2:3], v[4:5], v[26:27] s_clause 0x3 scratch_store_b64 off, v[18:19], off offset:192 scratch_store_b64 off, v[22:23], off offset:208 scratch_store_b64 off, v[0:1], off offset:64 scratch_store_b64 off, v[24:25], off offset:80 s_waitcnt vmcnt(1) scratch_store_b128 off, v[10:13], off offset:296 s_waitcnt vmcnt(0) scratch_store_b128 off, v[6:9], off offset:336 s_cbranch_vccnz .LBB8_71 ; %bb.60: ; %.preheader671.lr.ph s_mul_i32 s0, s18, s16 s_add_i32 s1, s19, 2 s_mul_i32 s0, s0, 3 v_add_nc_u32_e32 v13, 3, v20 v_add3_u32 v0, s40, s0, v46 s_mul_i32 s0, s7, s1 s_lshl_b32 s1, s47, 1 v_add3_u32 v1, s40, s0, v46 s_mul_i32 s47, s47, 7 v_mul_lo_u32 v0, s17, v0 v_add3_u32 v6, s40, s1, v46 v_add3_u32 v9, s40, s47, v46 v_mul_lo_u32 v8, v1, s33 s_movk_i32 s0, 0x50 v_dual_mov_b32 v27, 0x110 :: v_dual_add_nc_u32 v20, 4, v20 v_add_nc_u32_e64 v22, 16, 24 v_add3_u32 v10, v0, s17, v45 v_mad_u64_u32 v[0:1], null, v6, s33, s[6:7] v_mad_u64_u32 v[6:7], null, v9, s33, s[6:7] v_add_nc_u32_e64 v23, 0x90, 24 v_add_nc_u32_e64 v24, 0x90, s0 v_add_nc_u32_e64 v25, s0, 16 v_add3_u32 v1, v45, v8, s6 v_add3_u32 v26, v10, s6, 1 s_add_i32 s1, s16, -1 s_mov_b32 s4, 0 .LBB8_61: ; %.preheader671 ; =>This Loop Header: Depth=1 ; Child Loop BB8_62 Depth 2 ; Child Loop BB8_66 Depth 2 ; Child Loop BB8_68 Depth 2 s_delay_alu instid0(VALU_DEP_2) v_mov_b32_e32 v7, v1 s_mov_b32 s0, 0 .LBB8_62: ; Parent Loop BB8_61 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_ashrrev_i32_e32 v8, 31, v7 v_add_nc_u32_e32 v10, s0, v25 v_add_nc_u32_e32 v11, s0, v24 s_add_i32 s0, s0, 8 s_cmp_lg_u32 s0, 40 v_lshlrev_b64 v[8:9], 3, v[7:8] v_add_nc_u32_e32 v7, s44, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, s20, v8 v_add_co_ci_u32_e32 v9, vcc_lo, s21, v9, vcc_lo global_load_b64 v[8:9], v[8:9], off s_waitcnt vmcnt(0) scratch_store_b64 v10, v[8:9], off scratch_store_b64 v11, v[8:9], off s_cbranch_scc1 .LBB8_62 ; %bb.63: ; in Loop: Header=BB8_61 Depth=1 s_add_i32 s0, s4, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) s_mul_i32 s5, s0, 5 s_cmp_ge_i32 s0, s1 v_add_nc_u32_e32 v7, s5, v13 v_add_nc_u32_e32 v9, s5, v20 v_ashrrev_i32_e32 v8, 31, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v10, 31, v9 v_lshlrev_b64 v[7:8], 3, v[7:8] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[9:10], 3, v[9:10] v_add_co_u32 v7, vcc_lo, s14, v7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v8, vcc_lo, s15, v8, vcc_lo v_add_co_u32 v9, vcc_lo, s14, v9 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v10, vcc_lo, s15, v10, vcc_lo scratch_load_b64 v[18:19], off, off offset:232 s_clause 0x1 global_load_b64 v[11:12], v[7:8], off global_load_b64 v[7:8], v[9:10], off scratch_load_b64 v[9:10], off, off offset:104 s_cbranch_scc1 .LBB8_65 ; %bb.64: ; in Loop: Header=BB8_61 Depth=1 v_add_nc_u32_e32 v28, s4, v49 s_waitcnt vmcnt(3) v_fma_f64 v[18:19], -s[2:3], v[2:3], v[18:19] s_waitcnt vmcnt(0) v_fma_f64 v[9:10], s[2:3], v[2:3], v[9:10] v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5 v_ashrrev_i32_e32 v29, 31, v28 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[28:29], 3, v[28:29] v_add_co_u32 v28, vcc_lo, s12, v28 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v29, vcc_lo, s13, v29, vcc_lo scratch_load_b64 v[30:31], off, off offset:248 global_load_b64 v[28:29], v[28:29], off scratch_load_b64 v[32:33], off, off offset:120 s_waitcnt vmcnt(1) v_fma_f64 v[30:31], s[2:3], v[28:29], v[30:31] s_waitcnt vmcnt(0) v_fma_f64 v[32:33], -s[2:3], v[28:29], v[32:33] v_dual_mov_b32 v4, v28 :: v_dual_mov_b32 v5, v29 s_clause 0x1 scratch_store_b64 off, v[30:31], off offset:248 scratch_store_b64 off, v[32:33], off offset:120 .LBB8_65: ; in Loop: Header=BB8_61 Depth=1 s_clause 0xd scratch_load_b128 v[28:31], off, off offset:160 scratch_load_b128 v[32:35], off, off offset:32 scratch_load_b64 v[36:37], off, off offset:176 scratch_load_b64 v[68:69], off, off offset:48 scratch_load_b128 v[50:53], off, off offset:296 scratch_load_b128 v[54:57], off, off offset:192 scratch_load_b64 v[78:79], off, off offset:208 scratch_load_b128 v[58:61], off, off offset:336 scratch_load_b64 v[80:81], off, off offset:224 scratch_load_b64 v[82:83], off, off offset:240 scratch_load_b128 v[62:65], off, off offset:64 scratch_load_b64 v[84:85], off, off offset:80 scratch_load_b64 v[86:87], off, off offset:96 scratch_load_b64 v[88:89], off, off offset:112 s_waitcnt vmcnt(13) v_div_scale_f64 v[42:43], null, v[28:29], v[28:29], 1.0 s_waitcnt vmcnt(12) v_div_scale_f64 v[66:67], null, v[32:33], v[32:33], 1.0 v_div_scale_f64 v[90:91], vcc_lo, 1.0, v[28:29], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[70:71], v[42:43] v_rcp_f64_e32 v[72:73], v[66:67] s_waitcnt_depctr 0xfff v_fma_f64 v[74:75], -v[42:43], v[70:71], 1.0 v_fma_f64 v[76:77], -v[66:67], v[72:73], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[70:71], v[70:71], v[74:75], v[70:71] v_fma_f64 v[72:73], v[72:73], v[76:77], v[72:73] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[74:75], -v[42:43], v[70:71], 1.0 v_fma_f64 v[76:77], -v[66:67], v[72:73], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[70:71], v[70:71], v[74:75], v[70:71] v_div_scale_f64 v[74:75], s0, 1.0, v[32:33], 1.0 v_fma_f64 v[72:73], v[72:73], v[76:77], v[72:73] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[76:77], v[90:91], v[70:71] v_mul_f64 v[92:93], v[74:75], v[72:73] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[42:43], -v[42:43], v[76:77], v[90:91] v_fma_f64 v[66:67], -v[66:67], v[92:93], v[74:75] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_div_fmas_f64 v[42:43], v[42:43], v[70:71], v[76:77] s_mov_b32 vcc_lo, s0 s_mov_b32 s0, 0 v_div_fmas_f64 v[66:67], v[66:67], v[72:73], v[92:93] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[42:43], v[42:43], v[28:29], 1.0 v_div_fixup_f64 v[70:71], v[66:67], v[32:33], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_mul_f64 v[28:29], v[30:31], v[42:43] s_waitcnt vmcnt(11) v_mul_f64 v[30:31], v[42:43], v[36:37] s_waitcnt vmcnt(9) v_mul_f64 v[32:33], v[42:43], v[50:51] v_mul_f64 v[66:67], v[34:35], v[70:71] v_mul_f64 v[68:69], v[70:71], v[68:69] v_mul_f64 v[34:35], v[70:71], v[52:53] s_waitcnt vmcnt(8) v_fma_f64 v[50:51], -v[28:29], v[54:55], v[56:57] s_waitcnt vmcnt(7) v_fma_f64 v[52:53], -v[30:31], v[54:55], v[78:79] s_waitcnt vmcnt(5) v_fma_f64 v[70:71], -v[28:29], v[80:81], v[18:19] s_waitcnt vmcnt(4) v_fma_f64 v[72:73], -v[30:31], v[80:81], v[82:83] s_waitcnt vmcnt(3) v_fma_f64 v[74:75], -v[66:67], v[62:63], v[64:65] s_waitcnt vmcnt(2) v_fma_f64 v[76:77], -v[68:69], v[62:63], v[84:85] v_fma_f64 v[54:55], -v[32:33], v[54:55], v[58:59] v_fma_f64 v[56:57], -v[34:35], v[62:63], v[60:61] s_waitcnt vmcnt(1) v_fma_f64 v[62:63], -v[66:67], v[86:87], v[9:10] s_waitcnt vmcnt(0) v_fma_f64 v[64:65], -v[68:69], v[86:87], v[88:89] v_fma_f64 v[58:59], -v[32:33], v[80:81], v[11:12] v_fma_f64 v[60:61], -v[34:35], v[86:87], v[7:8] v_mov_b32_e32 v9, v45 v_mov_b32_e32 v7, v26 s_clause 0x8 scratch_store_b128 off, v[28:31], off offset:168 scratch_store_b128 off, v[50:53], off offset:200 scratch_store_b128 off, v[70:73], off offset:232 scratch_store_b128 off, v[66:69], off offset:40 scratch_store_b128 off, v[74:77], off offset:72 scratch_store_b128 off, v[32:35], off offset:296 scratch_store_b128 off, v[54:57], off offset:336 scratch_store_b128 off, v[62:65], off offset:104 scratch_store_b128 off, v[58:61], off offset:376 .LBB8_66: ; Parent Loop BB8_61 Depth=1 ; => This Inner Loop Header: Depth=2 v_readfirstlane_b32 s5, v27 v_add_nc_u32_e32 v8, s0, v23 v_add_nc_u32_e32 v12, s0, v22 v_add_nc_u32_e32 v34, v6, v9 v_add_nc_u32_e32 v36, v0, v9 s_add_i32 s5, s5, s0 scratch_load_b64 v[10:11], v8, off s_add_i32 s8, s5, 24 s_add_i32 s9, s5, 64 scratch_load_b64 v[18:19], v12, off s_addk_i32 s5, 0x68 s_clause 0x2 scratch_load_b64 v[28:29], off, s8 scratch_load_b64 v[30:31], off, s9 scratch_load_b64 v[32:33], off, s5 v_ashrrev_i32_e32 v8, 31, v7 v_ashrrev_i32_e32 v35, 31, v34 v_ashrrev_i32_e32 v37, 31, v36 v_add_nc_u32_e32 v9, s44, v9 s_add_i32 s0, s0, 8 v_lshlrev_b64 v[42:43], 3, v[7:8] v_lshlrev_b64 v[34:35], 3, v[34:35] v_lshlrev_b64 v[36:37], 3, v[36:37] v_add_nc_u32_e32 v7, s43, v7 s_cmp_lg_u32 s0, 16 s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v42, vcc_lo, s22, v42 v_add_co_ci_u32_e32 v43, vcc_lo, s23, v43, vcc_lo v_add_co_u32 v34, vcc_lo, s20, v34 v_add_co_ci_u32_e32 v35, vcc_lo, s21, v35, vcc_lo v_add_co_u32 v36, vcc_lo, s20, v36 v_add_co_ci_u32_e32 v37, vcc_lo, s21, v37, vcc_lo s_waitcnt vmcnt(4) global_store_b64 v[34:35], v[10:11], off s_waitcnt vmcnt(3) global_store_b64 v[36:37], v[18:19], off s_waitcnt vmcnt(2) global_store_b64 v[42:43], v[28:29], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[30:31], s8 s_waitcnt vmcnt(0) scratch_store_b64 off, v[32:33], s9 s_cbranch_scc1 .LBB8_66 ; %bb.67: ; %.preheader670.preheader ; in Loop: Header=BB8_61 Depth=1 s_mov_b32 s0, 0 .LBB8_68: ; %.preheader670 ; Parent Loop BB8_61 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_nc_u32_e64 v7, 0x90, s0 v_add_nc_u32_e64 v8, s0, 16 s_add_i32 s5, s0, 0x90 s_add_i32 s8, s0, 16 s_add_i32 s0, s0, 8 v_add_nc_u32_e32 v28, 40, v7 v_add_nc_u32_e32 v9, 0x50, v7 v_add_nc_u32_e32 v29, 40, v8 v_add_nc_u32_e32 v18, 0x50, v8 s_cmp_lg_u32 s0, 40 s_clause 0x1 scratch_load_b64 v[7:8], v28, off scratch_load_b64 v[9:10], v9, off s_clause 0x1 scratch_load_b64 v[11:12], v29, off scratch_load_b64 v[18:19], v18, off s_waitcnt vmcnt(3) scratch_store_b64 off, v[7:8], s5 s_waitcnt vmcnt(2) scratch_store_b64 v28, v[9:10], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[11:12], s8 s_waitcnt vmcnt(0) scratch_store_b64 v29, v[18:19], off s_cbranch_scc1 .LBB8_68 ; %bb.69: ; in Loop: Header=BB8_61 Depth=1 v_add_nc_u32_e32 v1, s46, v1 v_add_nc_u32_e32 v26, s42, v26 v_add_nc_u32_e32 v0, s46, v0 v_add_nc_u32_e32 v6, s46, v6 s_add_i32 s4, s4, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s4, s45 s_cbranch_scc1 .LBB8_61 ; %bb.70: ; %._crit_edge703.loopexit s_clause 0x3 scratch_load_b64 v[18:19], off, off offset:192 scratch_load_b128 v[10:13], off, off offset:296 scratch_load_b128 v[6:9], off, off offset:336 scratch_load_b64 v[0:1], off, off offset:64 .LBB8_71: ; %._crit_edge703 s_clause 0x3 scratch_load_b128 v[2:5], off, off offset:160 scratch_load_b128 v[22:25], off, off offset:32 scratch_load_b64 v[26:27], off, off offset:200 scratch_load_b64 v[30:31], off, off offset:72 s_waitcnt vmcnt(3) v_div_scale_f64 v[28:29], null, v[2:3], v[2:3], 1.0 s_waitcnt vmcnt(2) v_div_scale_f64 v[32:33], null, v[22:23], v[22:23], 1.0 v_div_scale_f64 v[51:52], vcc_lo, 1.0, v[2:3], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[34:35], v[28:29] v_rcp_f64_e32 v[36:37], v[32:33] s_waitcnt_depctr 0xfff v_fma_f64 v[42:43], -v[28:29], v[34:35], 1.0 v_fma_f64 v[49:50], -v[32:33], v[36:37], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[34:35], v[34:35], v[42:43], v[34:35] v_fma_f64 v[36:37], v[36:37], v[49:50], v[36:37] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[42:43], -v[28:29], v[34:35], 1.0 v_fma_f64 v[49:50], -v[32:33], v[36:37], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[34:35], v[34:35], v[42:43], v[34:35] v_div_scale_f64 v[42:43], s0, 1.0, v[22:23], 1.0 v_fma_f64 v[36:37], v[36:37], v[49:50], v[36:37] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[49:50], v[51:52], v[34:35] v_mul_f64 v[53:54], v[42:43], v[36:37] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[28:29], -v[28:29], v[49:50], v[51:52] v_fma_f64 v[32:33], -v[32:33], v[53:54], v[42:43] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[28:29], v[28:29], v[34:35], v[49:50] s_mov_b32 vcc_lo, s0 v_div_fmas_f64 v[32:33], v[32:33], v[36:37], v[53:54] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[2:3], v[28:29], v[2:3], 1.0 v_div_fixup_f64 v[22:23], v[32:33], v[22:23], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mul_f64 v[4:5], v[4:5], v[2:3] v_mul_f64 v[10:11], v[2:3], v[10:11] v_mul_f64 v[2:3], v[24:25], v[22:23] v_mul_f64 v[12:13], v[22:23], v[12:13] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[22:23], -v[4:5], v[18:19], v[26:27] v_fma_f64 v[6:7], -v[10:11], v[18:19], v[6:7] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[18:19], -v[2:3], v[0:1], v[30:31] v_fma_f64 v[8:9], -v[12:13], v[0:1], v[8:9] global_load_b64 v[0:1], v[16:17], off v_div_scale_f64 v[24:25], null, v[22:23], v[22:23], v[6:7] v_div_scale_f64 v[34:35], vcc_lo, v[6:7], v[22:23], v[6:7] v_div_scale_f64 v[26:27], null, v[18:19], v[18:19], v[8:9] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[28:29], v[24:25] v_rcp_f64_e32 v[30:31], v[26:27] s_waitcnt_depctr 0xfff v_fma_f64 v[16:17], -v[24:25], v[28:29], 1.0 v_fma_f64 v[32:33], -v[26:27], v[30:31], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[16:17], v[28:29], v[16:17], v[28:29] v_fma_f64 v[28:29], v[30:31], v[32:33], v[30:31] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[30:31], -v[24:25], v[16:17], 1.0 v_fma_f64 v[32:33], -v[26:27], v[28:29], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[16:17], v[16:17], v[30:31], v[16:17] v_div_scale_f64 v[30:31], s0, v[8:9], v[18:19], v[8:9] v_fma_f64 v[28:29], v[28:29], v[32:33], v[28:29] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[32:33], v[34:35], v[16:17] v_mul_f64 v[36:37], v[30:31], v[28:29] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[24:25], -v[24:25], v[32:33], v[34:35] v_fma_f64 v[26:27], -v[26:27], v[36:37], v[30:31] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_div_fmas_f64 v[16:17], v[24:25], v[16:17], v[32:33] s_mov_b32 vcc_lo, s0 s_mov_b32 s0, 0 v_div_fmas_f64 v[24:25], v[26:27], v[28:29], v[36:37] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[6:7], v[16:17], v[22:23], v[6:7] v_div_fixup_f64 v[8:9], v[24:25], v[18:19], v[8:9] s_clause 0x1 scratch_store_b128 off, v[10:13], off offset:296 scratch_store_b128 off, v[6:9], off offset:336 .LBB8_72: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v6, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 24 v_add_nc_u32_e32 v6, 40, v6 s_clause 0x1 scratch_load_b64 v[6:7], v6, off scratch_load_b64 v[8:9], off, s1 s_waitcnt vmcnt(0) v_fma_f64 v[6:7], -v[0:1], v[6:7], v[8:9] scratch_store_b64 off, v[6:7], s1 s_cbranch_scc1 .LBB8_72 ; %bb.73: s_clause 0x1 scratch_load_b128 v[6:9], off, off offset:336 scratch_load_b128 v[10:13], off, off offset:296 s_mov_b32 s0, 0 s_waitcnt vmcnt(0) v_fma_f64 v[0:1], -v[4:5], v[6:7], v[10:11] v_fma_f64 v[2:3], -v[2:3], v[8:9], v[12:13] scratch_store_b128 off, v[0:3], off offset:296 .LBB8_74: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v4, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 40 v_add_nc_u32_e32 v5, 40, v4 v_add_nc_u32_e32 v4, 0x50, v4 s_clause 0x1 scratch_load_b64 v[0:1], v5, off scratch_load_b64 v[2:3], off, s1 s_waitcnt vmcnt(1) scratch_store_b64 v4, v[0:1], off s_waitcnt vmcnt(0) scratch_store_b64 v5, v[2:3], off s_cbranch_scc1 .LBB8_74 ; %bb.75: s_getpc_b64 s[0:1] s_add_u32 s0, s0, bt@rel32@lo+4 s_addc_u32 s1, s1, bt@rel32@hi+12 v_cmp_ne_u32_e32 vcc_lo, 1, v21 s_load_b64 s[0:1], s[0:1], 0x0 s_cbranch_vccnz .LBB8_84 ; %bb.76: ; %.preheader.lr.ph s_add_i32 s2, s16, -3 v_add_nc_u32_e32 v1, 10, v48 s_mul_i32 s3, s18, s2 s_lshl_b32 s4, s16, 1 v_add3_u32 v0, s40, s3, v46 s_add_i32 s3, s16, -1 v_mul_lo_u32 v6, s16, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v0, s17, v0 v_add3_u32 v0, v0, s17, v45 s_delay_alu instid0(VALU_DEP_1) v_add3_u32 v7, v0, s6, 1 .LBB8_77: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB8_78 Depth 2 ; Child Loop BB8_82 Depth 2 v_mad_u64_u32 v[0:1], null, s2, s7, v[38:39] s_add_i32 s5, s2, s16 s_mov_b32 s6, 0 v_mad_u64_u32 v[1:2], null, s5, s7, v[38:39] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[2:3], null, v0, s33, v[39:40] v_mad_u64_u32 v[4:5], null, v1, s33, v[39:40] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v3, 31, v2 v_ashrrev_i32_e32 v5, 31, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[0:1], 3, v[2:3] v_lshlrev_b64 v[2:3], 3, v[4:5] v_mov_b32_e32 v4, v7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v0, vcc_lo, s20, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s21, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s21, v3, vcc_lo s_clause 0x1 global_load_b64 v[0:1], v[0:1], off global_load_b64 v[2:3], v[2:3], off .LBB8_78: ; Parent Loop BB8_77 Depth=1 ; => This Inner Loop Header: Depth=2 v_ashrrev_i32_e32 v5, 31, v4 s_add_i32 s8, s6, 0x110 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_lshlrev_b64 v[8:9], 3, v[4:5] v_add_nc_u32_e64 v5, 0x110, s6 v_add_nc_u32_e32 v4, s43, v4 s_add_i32 s6, s6, 8 s_cmp_lg_u32 s6, 24 s_delay_alu instid0(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, s22, v8 v_add_nc_u32_e32 v10, 40, v5 v_add_co_ci_u32_e32 v9, vcc_lo, s23, v9, vcc_lo v_add_nc_u32_e32 v5, 0x50, v5 scratch_load_b64 v[10:11], v10, off global_load_b64 v[8:9], v[8:9], off scratch_load_b64 v[12:13], v5, off s_waitcnt vmcnt(1) v_fma_f64 v[8:9], -v[0:1], v[10:11], v[8:9] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[8:9], -v[2:3], v[12:13], v[8:9] scratch_store_b64 off, v[8:9], s8 s_cbranch_scc1 .LBB8_78 ; %bb.79: ; in Loop: Header=BB8_77 Depth=1 s_add_i32 s5, s5, s4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) s_add_i32 s6, s5, s19 v_mad_u64_u32 v[0:1], null, s5, s18, v[40:41] s_add_i32 s8, s6, s16 v_mad_u64_u32 v[1:2], null, s6, s7, v[38:39] s_sub_i32 s6, s8, s19 v_mad_u64_u32 v[2:3], null, s6, s18, v[40:41] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[3:4], null, v0, s17, v[41:42] v_mad_u64_u32 v[8:9], null, v1, s33, v[39:40] s_sub_i32 s6, s6, s4 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_mad_u64_u32 v[0:1], null, v2, s17, v[41:42] v_mad_u64_u32 v[1:2], null, s6, s7, v[38:39] v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v9, 31, v8 v_lshlrev_b64 v[2:3], 3, v[3:4] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[4:5], null, v1, s33, v[39:40] v_lshlrev_b64 v[8:9], 3, v[8:9] v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, s22, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo v_add_co_u32 v8, vcc_lo, s20, v8 v_ashrrev_i32_e32 v5, 31, v4 v_add_co_ci_u32_e32 v9, vcc_lo, s21, v9, vcc_lo v_lshlrev_b64 v[0:1], 3, v[0:1] global_load_b64 v[12:13], v[2:3], off global_load_b64 v[16:17], v[8:9], off v_lshlrev_b64 v[2:3], 3, v[4:5] scratch_load_b128 v[8:11], off, off offset:336 v_mad_u64_u32 v[4:5], null, s8, s7, v[38:39] v_add_co_u32 v0, vcc_lo, s22, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo v_add_co_u32 v2, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s21, v3, vcc_lo global_load_b64 v[18:19], v[0:1], off global_load_b64 v[20:21], v[2:3], off v_mad_u64_u32 v[0:1], null, s5, s7, v[38:39] v_mad_u64_u32 v[1:2], null, v4, s33, v[39:40] s_add_i32 s5, s2, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_cmp_ge_i32 s5, s3 v_mad_u64_u32 v[3:4], null, v0, s33, v[39:40] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[0:1], 3, v[1:2] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[2:3], 3, v[3:4] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v0, vcc_lo, s20, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s21, v1, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v4, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v5, vcc_lo, s21, v3, vcc_lo global_load_b64 v[22:23], v[0:1], off scratch_load_b128 v[0:3], off, off offset:376 global_load_b64 v[4:5], v[4:5], off s_waitcnt vmcnt(5) v_fma_f64 v[8:9], -v[16:17], v[8:9], v[12:13] s_waitcnt vmcnt(3) v_fma_f64 v[10:11], -v[20:21], v[10:11], v[18:19] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[8:9], -v[22:23], v[0:1], v[8:9] s_waitcnt vmcnt(0) v_fma_f64 v[10:11], -v[4:5], v[2:3], v[10:11] scratch_store_b128 off, v[8:11], off offset:296 s_cbranch_scc1 .LBB8_81 ; %bb.80: ; in Loop: Header=BB8_77 Depth=1 s_clause 0x1 scratch_load_b64 v[4:5], off, off offset:368 scratch_load_b128 v[8:11], off, off offset:352 v_add_f64 v[12:13], v[0:1], v[2:3] v_add_f64 v[0:1], v[0:1], -v[2:3] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_mul_f64 v[0:1], v[0:1], s[0:1] s_waitcnt vmcnt(1) v_mul_f64 v[4:5], v[4:5], s[0:1] s_waitcnt vmcnt(0) v_xor_b32_e32 v11, 0x80000000, v11 v_fma_f64 v[2:3], v[12:13], 0.5, -v[4:5] v_fma_f64 v[4:5], v[12:13], 0.5, v[4:5] v_dual_mov_b32 v12, v8 :: v_dual_mov_b32 v13, v9 s_clause 0x2 scratch_store_b128 off, v[10:13], off offset:352 scratch_store_b128 off, v[0:3], off offset:368 scratch_store_b64 off, v[4:5], off offset:384 .LBB8_81: ; in Loop: Header=BB8_77 Depth=1 v_mov_b32_e32 v0, -5 s_mov_b32 s5, s41 .LBB8_82: ; Parent Loop BB8_77 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s6, s5, 40 v_add_nc_u32_e32 v10, v6, v0 s_clause 0x2 scratch_load_b64 v[1:2], off, s6 scratch_load_b64 v[3:4], off, s5 offset:-40 scratch_load_b64 v[8:9], off, s5 v_add_co_u32 v0, s8, v0, 1 v_ashrrev_i32_e32 v11, 31, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], 3, v[10:11] v_add_co_u32 v10, vcc_lo, s14, v10 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v11, vcc_lo, s15, v11, vcc_lo s_and_not1_b32 vcc_lo, exec_lo, s8 s_waitcnt vmcnt(2) global_store_b64 v[10:11], v[1:2], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[3:4], s5 s_add_i32 s5, s5, 8 s_waitcnt vmcnt(0) scratch_store_b64 off, v[8:9], s6 s_cbranch_vccnz .LBB8_82 ; %bb.83: ; in Loop: Header=BB8_77 Depth=1 v_subrev_nc_u32_e32 v7, s42, v7 v_add_nc_u32_e32 v6, -5, v6 s_add_i32 s5, s2, -1 s_cmp_gt_i32 s2, 0 s_mov_b32 s2, s5 s_cbranch_scc1 .LBB8_77 .LBB8_84: ; %._crit_edge709 s_clause 0x2 scratch_load_b64 v[8:9], off, off offset:384 scratch_load_b128 v[0:3], off, off offset:368 scratch_load_b128 v[4:7], off, off offset:352 s_waitcnt vmcnt(1) v_add_f64 v[10:11], v[2:3], v[8:9] v_add_f64 v[2:3], v[2:3], -v[8:9] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f64 v[12:13], v[10:11], 0.5 s_waitcnt lgkmcnt(0) v_mul_f64 v[8:9], s[0:1], v[2:3] s_waitcnt vmcnt(0) v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5 s_delay_alu instid0(VALU_DEP_3) v_fma_f64 v[10:11], -s[0:1], v[0:1], v[12:13] v_fma_f64 v[12:13], s[0:1], v[0:1], v[12:13] v_xor_b32_e32 v1, 0x80000000, v7 v_mov_b32_e32 v0, v6 s_mov_b32 s0, 0 s_clause 0x2 global_store_b128 v[14:15], v[0:3], off offset:40 global_store_b128 v[14:15], v[8:11], off offset:56 global_store_b64 v[14:15], v[12:13], off offset:72 .LBB8_85: ; =>This Inner Loop Header: Depth=1 scratch_load_b64 v[0:1], off, s41 v_add_nc_u32_e32 v2, s0, v47 s_add_i32 s0, s0, 1 s_add_i32 s41, s41, 8 s_cmp_lg_u32 s0, 5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v3, 31, v2 v_lshlrev_b64 v[2:3], 3, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s14, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[2:3], v[0:1], off s_cbranch_scc1 .LBB8_85 .LBB8_86: ; %.loopexit s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL14x_solve_kernelPdS_S_S_S_S_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 400 .amdhsa_kernarg_size 320 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 1 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 94 .amdhsa_next_free_sgpr 54 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL14x_solve_kernelPdS_S_S_S_S_iii,"axG",@progbits,_ZL14x_solve_kernelPdS_S_S_S_S_iii,comdat .Lfunc_end8: .size _ZL14x_solve_kernelPdS_S_S_S_S_iii, .Lfunc_end8-_ZL14x_solve_kernelPdS_S_S_S_S_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 9200 ; NumSgprs: 56 ; NumVgprs: 94 ; ScratchSize: 400 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 6 ; VGPRBlocks: 11 ; NumSGPRsForWavesPerEU: 56 ; NumVGPRsForWavesPerEU: 94 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .section .text._ZL14y_solve_kernelPdS_S_S_S_S_iii,"axG",@progbits,_ZL14y_solve_kernelPdS_S_S_S_S_iii,comdat .globl _ZL14y_solve_kernelPdS_S_S_S_S_iii ; -- Begin function _ZL14y_solve_kernelPdS_S_S_S_S_iii .p2align 8 .type _ZL14y_solve_kernelPdS_S_S_S_S_iii,@function _ZL14y_solve_kernelPdS_S_S_S_S_iii: ; @_ZL14y_solve_kernelPdS_S_S_S_S_iii ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x4c s_load_b128 s[16:19], s[0:1], 0x30 v_and_b32_e32 v46, 0x3ff, v0 v_bfe_u32 v42, v0, 10, 10 s_waitcnt lgkmcnt(0) s_and_b32 s3, s2, 0xffff s_lshr_b32 s2, s2, 16 s_mul_i32 s40, s14, s3 s_mul_i32 s6, s15, s2 v_add_nc_u32_e32 v38, s40, v46 v_add_nc_u32_e32 v39, s6, v42 s_add_i32 s2, s18, -1 s_add_i32 s3, s16, -1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v40, 1, v38 v_add_nc_u32_e32 v41, 1, v39 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s2, v40 v_cmp_gt_i32_e64 s2, s3, v41 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB9_90 ; %bb.1: s_add_i32 s7, s18, -2 s_lshl_b32 s19, s17, 2 s_mul_i32 s49, s17, s7 v_mad_u64_u32 v[1:2], null, s7, s19, v[38:39] v_mad_u64_u32 v[6:7], null, s49, 5, v[38:39] s_add_i32 s33, s16, -2 s_clause 0x1 s_load_b256 s[8:15], s[0:1], 0x0 s_load_b128 s[20:23], s[0:1], 0x20 v_mad_u64_u32 v[11:12], null, s49, 6, v[38:39] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[4:5], null, v1, s33, v[39:40] v_mad_u64_u32 v[9:10], null, v6, s33, v[39:40] s_mov_b32 s0, 0 v_mad_u64_u32 v[14:15], null, s49, 7, v[38:39] s_mov_b32 s1, s0 v_mov_b32_e32 v0, 0 s_delay_alu instid0(VALU_DEP_4) v_ashrrev_i32_e32 v5, 31, v4 v_mad_u64_u32 v[12:13], null, v11, s33, v[39:40] v_dual_mov_b32 v8, s1 :: v_dual_mov_b32 v7, s0 v_ashrrev_i32_e32 v10, 31, v9 v_mov_b32_e32 v1, v0 v_mov_b32_e32 v2, v0 v_mov_b32_e32 v3, v0 v_lshlrev_b64 v[4:5], 3, v[4:5] v_lshl_add_u32 v6, s49, 3, v38 v_lshlrev_b64 v[9:10], 3, v[9:10] v_ashrrev_i32_e32 v13, 31, v12 scratch_store_b128 off, v[0:3], off offset:16 v_mov_b32_e32 v1, 0x3ff00000 v_mad_u64_u32 v[15:16], null, v14, s33, v[39:40] s_waitcnt lgkmcnt(0) v_add_co_u32 v4, vcc_lo, s20, v4 v_mad_u64_u32 v[17:18], null, v6, s33, v[39:40] v_add_co_ci_u32_e32 v5, vcc_lo, s21, v5, vcc_lo v_add_co_u32 v9, vcc_lo, s20, v9 s_clause 0x1 scratch_store_b128 off, v[0:3], off offset:32 scratch_store_b64 off, v[7:8], off offset:48 v_lshlrev_b64 v[2:3], 3, v[12:13] v_add_co_ci_u32_e32 v10, vcc_lo, s21, v10, vcc_lo v_ashrrev_i32_e32 v16, 31, v15 s_mul_i32 s0, s17, s16 s_clause 0x1 global_store_b64 v[4:5], v[7:8], off global_store_b64 v[9:10], v[7:8], off v_ashrrev_i32_e32 v18, 31, v17 v_add_co_u32 v4, vcc_lo, s20, v2 v_mad_u64_u32 v[11:12], null, s0, v40, v[42:43] v_add_co_ci_u32_e32 v5, vcc_lo, s21, v3, vcc_lo v_lshlrev_b64 v[2:3], 3, v[15:16] v_lshlrev_b64 v[9:10], 3, v[17:18] s_mov_b32 s24, 0x9999999a s_mov_b32 s26, 0x55555555 s_delay_alu instid0(VALU_DEP_4) v_add3_u32 v43, v11, s6, 1 s_mov_b32 s28, 0xf5c28f5b v_add_co_u32 v12, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v13, vcc_lo, s21, v3, vcc_lo v_add_co_u32 v9, vcc_lo, s20, v9 v_add_co_ci_u32_e32 v10, vcc_lo, s21, v10, vcc_lo v_mov_b32_e32 v2, v43 s_mov_b32 s25, 0x3fb99999 s_mov_b32 s27, 0x3ff55555 s_mov_b32 s29, 0x3fff5c28 s_mov_b64 s[30:31], 0 s_clause 0x2 global_store_b64 v[4:5], v[0:1], off global_store_b64 v[12:13], v[7:8], off global_store_b64 v[9:10], v[7:8], off ; implicit-def: $vgpr4_vgpr5 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $vgpr0_vgpr1 ; implicit-def: $vgpr6_vgpr7 .LBB9_2: ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v3, 31, v2 s_cmp_eq_u32 s30, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], 3, v[2:3] v_add_co_u32 v16, vcc_lo, s8, v10 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v17, vcc_lo, s9, v11, vcc_lo v_add_co_u32 v10, vcc_lo, s10, v10 v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo global_load_b64 v[16:17], v[16:17], off s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s30, 1 global_load_b64 v[10:11], v[10:11], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s30, 2 v_add_nc_u32_e32 v2, s16, v2 s_cselect_b32 s1, -1, 0 s_waitcnt vmcnt(1) v_mul_f64 v[18:19], v[16:17], s[24:25] v_fma_f64 v[16:17], v[16:17], s[24:25], 0x3fe80000 s_waitcnt vmcnt(0) v_cndmask_b32_e32 v1, v1, v11, vcc_lo v_cndmask_b32_e64 v9, v9, v11, s1 v_cndmask_b32_e64 v8, v8, v10, s1 v_cndmask_b32_e64 v7, v7, v11, s0 v_cndmask_b32_e64 v6, v6, v10, s0 v_cndmask_b32_e32 v0, v0, v10, vcc_lo v_fma_f64 v[20:21], v[18:19], s[28:29], 0x3fe80000 v_fma_f64 v[18:19], v[18:19], s[26:27], 0x3fe80000 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v3, v15, v21, s1 v_cmp_gt_f64_e64 s2, v[18:19], v[20:21] v_cndmask_b32_e64 v22, v14, v20, s1 v_dual_cndmask_b32 v23, v5, v21 :: v_dual_cndmask_b32 v24, v4, v20 v_cndmask_b32_e64 v21, v13, v21, s0 v_cndmask_b32_e64 v20, v12, v20, s0 v_dual_cndmask_b32 v5, v5, v19 :: v_dual_cndmask_b32 v4, v4, v18 v_cndmask_b32_e64 v12, v12, v18, s0 v_cndmask_b32_e64 v13, v13, v19, s0 v_cndmask_b32_e64 v14, v14, v18, s1 v_cndmask_b32_e64 v15, v15, v19, s1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v12, v20, v12, s2 v_cndmask_b32_e64 v13, v21, v13, s2 v_cndmask_b32_e64 v5, v23, v5, s2 v_cndmask_b32_e64 v18, v24, v4, s2 v_cndmask_b32_e64 v14, v22, v14, s2 v_cndmask_b32_e64 v15, v3, v15, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v3, v5, v13, s0 v_cndmask_b32_e64 v19, v18, v12, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v4, v3, v15, s1 v_cndmask_b32_e64 v3, v19, v14, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_f64_e64 s2, v[3:4], v[16:17] s_and_b32 s3, s2, s1 s_and_b32 s4, s2, s0 s_and_b32 s2, s2, vcc_lo v_cndmask_b32_e64 v14, v14, v16, s3 v_cndmask_b32_e64 v12, v12, v16, s4 v_cndmask_b32_e64 v16, v18, v16, s2 v_cndmask_b32_e64 v13, v13, v17, s4 v_cndmask_b32_e64 v5, v5, v17, s2 v_cndmask_b32_e64 v15, v15, v17, s3 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v3, v16, v12, s0 v_cndmask_b32_e64 v4, v5, v13, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v3, v3, v14, s1 v_cndmask_b32_e64 v4, v4, v15, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_f64_e64 s2, 0x3fe80000, v[3:4] s_and_b32 s1, s2, s1 s_and_b32 s0, s2, s0 s_and_b32 s2, s2, vcc_lo v_cndmask_b32_e64 v15, v15, 0x3fe80000, s1 v_cndmask_b32_e64 v13, v13, 0x3fe80000, s0 v_cndmask_b32_e64 v5, v5, 0x3fe80000, s2 v_cndmask_b32_e64 v14, v14, 0, s1 v_cndmask_b32_e64 v12, v12, 0, s0 v_cndmask_b32_e64 v4, v16, 0, s2 s_add_u32 s30, s30, 1 s_addc_u32 s31, s31, 0 s_cmp_lg_u32 s30, 3 s_cbranch_scc1 .LBB9_2 ; %bb.3: s_getpc_b64 s[0:1] s_add_u32 s0, s0, dty1@rel32@lo+4 s_addc_u32 s1, s1, dty1@rel32@hi+12 s_getpc_b64 s[2:3] s_add_u32 s2, s2, c2dtty1@rel32@lo+4 s_addc_u32 s3, s3, c2dtty1@rel32@hi+12 s_load_b64 s[0:1], s[0:1], 0x0 s_getpc_b64 s[24:25] s_add_u32 s24, s24, dtty2@rel32@lo+4 s_addc_u32 s25, s25, dtty2@rel32@hi+12 s_load_b64 s[4:5], s[2:3], 0x0 s_load_b64 s[2:3], s[24:25], 0x0 s_getpc_b64 s[24:25] s_add_u32 s24, s24, comz5@rel32@lo+4 s_addc_u32 s25, s25, comz5@rel32@hi+12 s_getpc_b64 s[26:27] s_add_u32 s26, s26, comz4@rel32@lo+4 s_addc_u32 s27, s27, comz4@rel32@hi+12 s_getpc_b64 s[28:29] s_add_u32 s28, s28, comz1@rel32@lo+4 s_addc_u32 s29, s29, comz1@rel32@hi+12 s_load_b64 s[24:25], s[24:25], 0x0 s_load_b64 s[26:27], s[26:27], 0x0 s_load_b64 s[28:29], s[28:29], 0x0 v_add_nc_u32_e64 v50, 16, 40 s_mul_i32 s46, s49, s33 s_waitcnt lgkmcnt(0) v_mul_f64 v[2:3], v[14:15], s[0:1] v_mul_f64 v[4:5], v[4:5], s[0:1] v_fma_f64 v[10:11], v[12:13], s[4:5], 1.0 v_add_f64 v[24:25], s[28:29], 0 s_add_i32 s28, s19, 1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4) s_mul_i32 s28, s7, s28 v_fma_f64 v[18:19], v[8:9], s[2:3], -v[2:3] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[3:4], v[0:1], -s[2:3], -v[4:5] v_add_f64 v[16:17], v[10:11], s[24:25] v_add3_u32 v0, s40, s28, v46 v_mov_b32_e32 v1, 0 s_mov_b32 s28, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v0, v0, s33 v_mov_b32_e32 v2, v1 s_delay_alu instid0(VALU_DEP_2) v_add3_u32 v0, v42, v0, s6 v_add_f64 v[18:19], v[18:19], -s[26:27] s_clause 0x2 scratch_store_b128 off, v[1:4], off offset:56 scratch_store_b128 off, v[16:19], off offset:72 scratch_store_b64 off, v[24:25], off offset:88 .LBB9_4: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v1, s28, v50 s_add_i32 s28, s28, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) s_cmp_lg_u32 s28, 40 scratch_load_b64 v[2:3], v1, off v_ashrrev_i32_e32 v1, 31, v0 v_lshlrev_b64 v[4:5], 3, v[0:1] v_add_nc_u32_e32 v0, s46, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, s20, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s21, v5, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[4:5], v[2:3], off s_cbranch_scc1 .LBB9_4 ; %bb.5: v_mul_lo_u32 v0, v40, s17 s_mul_i32 s42, s16, 5 s_add_i32 s41, 0x110, 40 s_mov_b32 s28, 0 s_mov_b32 s29, s41 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mad_u64_u32 v[1:2], null, v0, 5, 5 v_mul_lo_u32 v47, v0, s42 v_lshl_add_u32 v2, v39, 2, v39 v_mul_lo_u32 v1, s16, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) v_add3_u32 v1, v1, v2, 5 v_add3_u32 v2, v47, v2, 5 .LBB9_6: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v3, s28, v2 v_add_nc_u32_e32 v10, s28, v1 s_add_i32 s28, s28, 1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v4, 31, v3 v_ashrrev_i32_e32 v11, 31, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[3:4], 3, v[3:4] v_lshlrev_b64 v[10:11], 3, v[10:11] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v3, vcc_lo, s14, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s15, v4, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v10, vcc_lo, s14, v10 v_add_co_ci_u32_e32 v11, vcc_lo, s15, v11, vcc_lo s_clause 0x1 global_load_b64 v[3:4], v[3:4], off global_load_b64 v[10:11], v[10:11], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[3:4], s29 offset:-40 s_waitcnt vmcnt(0) scratch_store_b64 off, v[10:11], s29 s_add_i32 s29, s29, 8 s_cmp_eq_u32 s28, 3 s_cbranch_scc0 .LBB9_6 ; %bb.7: ; %.preheader674 s_add_i32 s47, s17, -2 s_cmp_gt_i32 s17, 2 v_mov_b32_e32 v16, 0 s_cselect_b32 s50, -1, 0 s_cmp_lt_i32 s17, 3 v_dual_mov_b32 v17, 0x3ff00000 :: v_dual_mov_b32 v18, 0 v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v11, v9 v_mov_b32_e32 v19, 0 v_add_nc_u32_e32 v49, 3, v0 v_mul_u32_u24_e32 v48, 5, v42 s_cselect_b32 s45, -1, 0 s_mul_i32 s43, s18, s16 s_and_b32 vcc_lo, exec_lo, s45 s_mul_i32 s48, s7, s33 s_mul_i32 s44, s43, s17 s_cbranch_vccnz .LBB9_47 ; %bb.8: ; %.lr.ph v_dual_mov_b32 v3, 16 :: v_dual_add_nc_u32 v0, 2, v0 s_add_i32 s30, s19, 2 s_getpc_b64 s[28:29] s_add_u32 s28, s28, comz6@rel32@lo+4 s_addc_u32 s29, s29, comz6@rel32@hi+12 s_mul_i32 s30, s7, s30 v_mul_lo_u32 v4, s16, v0 s_load_b64 s[28:29], s[28:29], 0x0 v_add3_u32 v2, s40, s30, v46 s_mul_i32 s30, s6, 5 v_mad_u64_u32 v[0:1], null, s16, v40, v[42:43] v_dual_mov_b32 v5, 0x110 :: v_dual_mov_b32 v26, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_mul_lo_u32 v16, v2, s33 v_mad_u64_u32 v[1:2], null, v4, 5, s[30:31] v_add_nc_u32_e32 v51, 0x50, v3 v_add_nc_u32_e32 v52, 0x50, v5 v_add3_u32 v53, v0, s6, 1 v_mov_b32_e32 v56, 0x3ff00000 s_mov_b32 s30, 0x9999999a v_add3_u32 v54, v42, v16, s6 v_add3_u32 v55, v1, v48, 5 s_mov_b32 s34, 0x55555555 s_mov_b32 s36, 0xf5c28f5b s_add_i32 s51, s17, -3 s_mov_b32 s31, 0x3fb99999 s_mov_b32 s35, 0x3ff55555 s_mov_b32 s37, 0x3fff5c28 s_add_i32 s52, s17, -5 s_mov_b32 s38, 0 s_mov_b32 s53, 0 .LBB9_9: ; =>This Loop Header: Depth=1 ; Child Loop BB9_29 Depth 2 ; Child Loop BB9_34 Depth 2 ; Child Loop BB9_36 Depth 2 ; Child Loop BB9_38 Depth 2 ; Child Loop BB9_40 Depth 2 ; Child Loop BB9_42 Depth 2 ; Child Loop BB9_44 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) s_add_i32 s39, s53, 2 s_cmp_lg_u32 s53, s51 s_cbranch_scc0 .LBB9_16 ; %bb.10: ; in Loop: Header=BB9_9 Depth=1 v_add_nc_u32_e32 v2, s53, v49 v_fma_f64 v[34:35], s[4:5], v[14:15], 1.0 s_cmp_lg_u32 s53, 0 v_mov_b32_e32 v27, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[0:1], null, v2, s16, v[41:42] v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v2, vcc_lo, s8, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s10, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo global_load_b64 v[4:5], v[2:3], off global_load_b64 v[2:3], v[0:1], off s_waitcnt vmcnt(1) v_mul_f64 v[0:1], v[4:5], s[30:31] v_fma_f64 v[4:5], v[4:5], s[30:31], 0x3fe80000 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[18:19], v[0:1], s[34:35], 0x3fe80000 v_fma_f64 v[0:1], v[0:1], s[36:37], 0x3fe80000 v_cmp_gt_f64_e32 vcc_lo, v[18:19], v[0:1] v_dual_cndmask_b32 v1, v1, v19 :: v_dual_cndmask_b32 v0, v0, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5] v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v0, v0, v4 v_mul_f64 v[4:5], s[0:1], v[12:13] v_cmp_ngt_f64_e32 vcc_lo, 0x3fe80000, v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_fma_f64 v[28:29], v[6:7], -s[2:3], -v[4:5] v_cndmask_b32_e32 v21, 0x3fe80000, v1, vcc_lo v_cndmask_b32_e32 v20, 0, v0, vcc_lo v_mul_f64 v[0:1], s[0:1], v[20:21] scratch_store_b128 off, v[26:29], off offset:96 s_waitcnt vmcnt(0) v_fma_f64 v[36:37], s[2:3], v[2:3], -v[0:1] s_clause 0x1 scratch_store_b128 off, v[34:37], off offset:112 scratch_store_b64 off, v[26:27], off offset:128 s_cbranch_scc0 .LBB9_17 ; %bb.11: ; in Loop: Header=BB9_9 Depth=1 s_cmp_ge_i32 s39, s51 s_cbranch_scc0 .LBB9_18 ; %bb.12: ; in Loop: Header=BB9_9 Depth=1 s_cmp_lg_u32 s53, s52 s_cbranch_scc0 .LBB9_19 ; %bb.13: ; in Loop: Header=BB9_9 Depth=1 v_dual_mov_b32 v44, 0 :: v_dual_mov_b32 v31, v29 v_dual_mov_b32 v45, 0 :: v_dual_mov_b32 v30, v28 v_dual_mov_b32 v32, v34 :: v_dual_mov_b32 v33, v35 s_cmp_lg_u32 s39, s47 s_cbranch_scc1 .LBB9_15 ; %bb.14: ; in Loop: Header=BB9_9 Depth=1 v_add_f64 v[59:60], v[28:29], -s[26:27] v_add_f64 v[32:33], s[24:25], v[34:35] v_dual_mov_b32 v57, v24 :: v_dual_mov_b32 v58, v25 v_dual_mov_b32 v45, v25 :: v_dual_mov_b32 v44, v24 s_clause 0x1 scratch_store_b128 off, v[57:60], off offset:96 scratch_store_b64 off, v[32:33], off offset:112 v_dual_mov_b32 v30, v59 :: v_dual_mov_b32 v31, v60 .LBB9_15: ; %Flow1071 ; in Loop: Header=BB9_9 Depth=1 s_mov_b32 s54, 0 s_branch .LBB9_20 .LBB9_16: ; in Loop: Header=BB9_9 Depth=1 s_mov_b32 s54, -1 ; implicit-def: $vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 ; implicit-def: $vgpr44_vgpr45 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB9_31 .LBB9_17: ; in Loop: Header=BB9_9 Depth=1 s_mov_b32 s54, -1 ; implicit-def: $vgpr44_vgpr45 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB9_26 .LBB9_18: ; in Loop: Header=BB9_9 Depth=1 s_mov_b32 s54, -1 ; implicit-def: $vgpr44_vgpr45 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB9_23 .LBB9_19: ; in Loop: Header=BB9_9 Depth=1 s_mov_b32 s54, -1 ; implicit-def: $vgpr44_vgpr45 ; implicit-def: $vgpr30_vgpr31 .LBB9_20: ; %Flow1073 ; in Loop: Header=BB9_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s54 s_cbranch_vccnz .LBB9_22 ; %bb.21: ; in Loop: Header=BB9_9 Depth=1 v_add_f64 v[59:60], v[28:29], -s[26:27] s_waitcnt lgkmcnt(0) v_add_f64 v[61:62], v[34:35], s[28:29] v_add_f64 v[63:64], v[36:37], -s[26:27] v_dual_mov_b32 v57, v24 :: v_dual_mov_b32 v58, v25 v_dual_mov_b32 v45, v25 :: v_dual_mov_b32 v44, v24 s_clause 0x1 scratch_store_b128 off, v[57:60], off offset:96 scratch_store_b128 off, v[61:64], off offset:112 v_dual_mov_b32 v30, v59 :: v_dual_mov_b32 v31, v60 v_dual_mov_b32 v32, v61 :: v_dual_mov_b32 v33, v62 .LBB9_22: ; %Flow1074 ; in Loop: Header=BB9_9 Depth=1 s_mov_b32 s54, 0 .LBB9_23: ; %Flow1076 ; in Loop: Header=BB9_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s54 s_cbranch_vccnz .LBB9_25 ; %bb.24: ; in Loop: Header=BB9_9 Depth=1 v_add_f64 v[59:60], v[28:29], -s[26:27] s_waitcnt lgkmcnt(0) v_add_f64 v[61:62], v[34:35], s[28:29] v_add_f64 v[63:64], v[36:37], -s[26:27] v_dual_mov_b32 v57, v24 :: v_dual_mov_b32 v58, v25 v_dual_mov_b32 v45, v25 :: v_dual_mov_b32 v44, v24 s_clause 0x2 scratch_store_b128 off, v[57:60], off offset:96 scratch_store_b128 off, v[61:64], off offset:112 scratch_store_b64 off, v[24:25], off offset:128 v_dual_mov_b32 v30, v59 :: v_dual_mov_b32 v31, v60 v_dual_mov_b32 v32, v61 :: v_dual_mov_b32 v33, v62 .LBB9_25: ; %Flow1077 ; in Loop: Header=BB9_9 Depth=1 s_mov_b32 s54, 0 .LBB9_26: ; %Flow1079 ; in Loop: Header=BB9_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s54 s_cbranch_vccnz .LBB9_28 ; %bb.27: ; in Loop: Header=BB9_9 Depth=1 v_add_f64 v[30:31], v[28:29], -s[26:27] s_waitcnt lgkmcnt(0) v_add_f64 v[32:33], v[34:35], s[28:29] v_add_f64 v[22:23], v[36:37], -s[26:27] v_mov_b32_e32 v44, 0 v_mov_b32_e32 v45, 0 s_clause 0x1 scratch_store_b128 off, v[30:33], off offset:104 scratch_store_b128 off, v[22:25], off offset:120 .LBB9_28: ; in Loop: Header=BB9_9 Depth=1 v_mov_b32_e32 v0, v54 s_mov_b32 s54, 0 .LBB9_29: ; Parent Loop BB9_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_nc_u32_e32 v1, s54, v51 s_add_i32 s54, s54, 8 s_cmp_lg_u32 s54, 40 scratch_load_b64 v[4:5], v1, off v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[18:19], 3, v[0:1] v_add_nc_u32_e32 v0, s46, v0 v_add_co_u32 v18, vcc_lo, s20, v18 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v19, vcc_lo, s21, v19, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[18:19], v[4:5], off s_cbranch_scc1 .LBB9_29 ; %bb.30: ; in Loop: Header=BB9_9 Depth=1 v_dual_mov_b32 v18, v14 :: v_dual_mov_b32 v19, v15 v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v3 s_mov_b32 s54, 0 .LBB9_31: ; %Flow1081 ; in Loop: Header=BB9_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s54 s_cbranch_vccz .LBB9_33 ; %bb.32: ; in Loop: Header=BB9_9 Depth=1 s_add_i32 s54, s39, s19 s_mov_b32 s39, s38 v_mad_u64_u32 v[0:1], null, s54, s7, v[38:39] v_dual_mov_b32 v27, v26 :: v_dual_mov_b32 v34, s38 v_dual_mov_b32 v28, v26 :: v_dual_mov_b32 v35, s39 s_add_i32 s39, s54, s17 v_dual_mov_b32 v29, v26 :: v_dual_mov_b32 v30, 0 s_delay_alu instid0(VALU_DEP_4) v_mad_u64_u32 v[1:2], null, v0, s33, v[39:40] v_mad_u64_u32 v[3:4], null, s39, s7, v[38:39] s_add_i32 s39, s39, s17 s_clause 0x1 scratch_store_b128 off, v[26:29], off offset:96 scratch_store_b64 off, v[34:35], off offset:128 v_mad_u64_u32 v[4:5], null, s39, s7, v[38:39] v_ashrrev_i32_e32 v2, 31, v1 s_add_i32 s39, s39, s17 v_mad_u64_u32 v[18:19], null, v3, s33, v[39:40] v_dual_mov_b32 v27, v56 :: v_dual_mov_b32 v32, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_lshlrev_b64 v[0:1], 3, v[1:2] v_mad_u64_u32 v[2:3], null, s39, s7, v[38:39] s_add_i32 s39, s39, s17 v_mad_u64_u32 v[20:21], null, v4, s33, v[39:40] v_mad_u64_u32 v[3:4], null, s39, s7, v[38:39] v_add_co_u32 v0, vcc_lo, s20, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s21, v1, vcc_lo v_ashrrev_i32_e32 v19, 31, v18 v_mad_u64_u32 v[4:5], null, v2, s33, v[39:40] v_ashrrev_i32_e32 v21, 31, v20 global_store_b64 v[0:1], v[34:35], off v_lshlrev_b64 v[0:1], 3, v[18:19] v_mad_u64_u32 v[18:19], null, v3, s33, v[39:40] v_lshlrev_b64 v[2:3], 3, v[20:21] v_ashrrev_i32_e32 v5, 31, v4 scratch_store_b128 off, v[26:29], off offset:112 v_add_co_u32 v28, vcc_lo, s20, v0 v_add_co_ci_u32_e32 v29, vcc_lo, s21, v1, vcc_lo v_ashrrev_i32_e32 v19, 31, v18 v_lshlrev_b64 v[0:1], 3, v[4:5] v_add_co_u32 v36, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v37, vcc_lo, s21, v3, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[2:3], 3, v[18:19] v_add_co_u32 v57, vcc_lo, s20, v0 v_mov_b32_e32 v31, 0 v_add_co_ci_u32_e32 v58, vcc_lo, s21, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_co_u32 v59, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v60, vcc_lo, s21, v3, vcc_lo v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v45, v31 v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v23, v17 v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v33, 0x3ff00000 v_dual_mov_b32 v44, v30 :: v_dual_mov_b32 v1, v7 v_dual_mov_b32 v4, v10 :: v_dual_mov_b32 v3, v9 v_dual_mov_b32 v22, v16 :: v_dual_mov_b32 v5, v11 v_dual_mov_b32 v20, v14 :: v_dual_mov_b32 v21, v15 v_mov_b32_e32 v19, v13 s_clause 0x3 global_store_b64 v[28:29], v[34:35], off global_store_b64 v[36:37], v[26:27], off global_store_b64 v[57:58], v[34:35], off global_store_b64 v[59:60], v[34:35], off .LBB9_33: ; in Loop: Header=BB9_9 Depth=1 v_mov_b32_e32 v6, v52 s_mov_b32 s39, 0 .LBB9_34: ; Parent Loop BB9_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_nc_u32_e32 v7, s39, v55 s_add_i32 s39, s39, 1 s_cmp_lg_u32 s39, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v8, 31, v7 v_lshlrev_b64 v[7:8], 3, v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, s14, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s15, v8, vcc_lo global_load_b64 v[7:8], v[7:8], off s_waitcnt vmcnt(0) scratch_store_b64 v6, v[7:8], off v_add_nc_u32_e32 v6, 8, v6 s_cbranch_scc1 .LBB9_34 ; %bb.35: ; in Loop: Header=BB9_9 Depth=1 s_clause 0x1 scratch_load_b128 v[6:9], off, off offset:32 scratch_load_b64 v[12:13], off, off offset:48 s_mov_b32 s39, 0 s_waitcnt vmcnt(1) v_div_scale_f64 v[10:11], null, v[6:7], v[6:7], 1.0 v_div_scale_f64 v[27:28], vcc_lo, 1.0, v[6:7], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[14:15], v[10:11] s_waitcnt_depctr 0xfff v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[16:17], v[27:28], v[14:15] v_fma_f64 v[10:11], -v[10:11], v[16:17], v[27:28] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[10:11], v[10:11], v[14:15], v[16:17] v_div_fixup_f64 v[10:11], v[10:11], v[6:7], 1.0 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[6:7], v[8:9], v[10:11] s_waitcnt vmcnt(0) v_mul_f64 v[8:9], v[10:11], v[12:13] scratch_store_b128 off, v[6:9], off offset:40 .LBB9_36: ; Parent Loop BB9_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_add_i32 s54, s39, 0x110 s_add_i32 s39, s39, 8 scratch_load_b64 v[12:13], off, s54 s_cmp_lg_u32 s39, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s54 s_cbranch_scc1 .LBB9_36 ; %bb.37: ; in Loop: Header=BB9_9 Depth=1 s_clause 0x1 scratch_load_b128 v[10:13], off, off offset:64 scratch_load_b64 v[14:15], off, off offset:80 s_mov_b32 s39, 0 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], -v[6:7], v[10:11], v[12:13] s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[8:9], v[10:11], v[14:15] scratch_store_b128 off, v[12:15], off offset:72 .LBB9_38: ; Parent Loop BB9_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v12, 0x110, s39 s_add_i32 s54, s39, 0x110 s_add_i32 s39, s39, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s39, 24 v_add_nc_u32_e32 v16, 40, v12 s_clause 0x1 scratch_load_b64 v[12:13], off, s54 scratch_load_b64 v[14:15], v16, off s_waitcnt vmcnt(0) v_fma_f64 v[12:13], -v[10:11], v[12:13], v[14:15] scratch_store_b64 v16, v[12:13], off s_cbranch_scc1 .LBB9_38 ; %bb.39: ; in Loop: Header=BB9_9 Depth=1 v_fma_f64 v[10:11], -v[6:7], v[44:45], v[30:31] v_fma_f64 v[12:13], -v[8:9], v[44:45], v[32:33] s_mov_b32 s39, 0 scratch_store_b128 off, v[10:13], off offset:104 .LBB9_40: ; Parent Loop BB9_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v10, 0x110, s39 s_add_i32 s54, s39, 0x110 s_add_i32 s39, s39, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s39, 24 v_add_nc_u32_e32 v14, 0x50, v10 s_clause 0x1 scratch_load_b64 v[10:11], off, s54 scratch_load_b64 v[12:13], v14, off s_waitcnt vmcnt(0) v_fma_f64 v[10:11], -v[44:45], v[10:11], v[12:13] scratch_store_b64 v14, v[10:11], off s_cbranch_scc1 .LBB9_40 ; %bb.41: ; in Loop: Header=BB9_9 Depth=1 v_mad_u64_u32 v[10:11], null, s53, s7, v[38:39] s_add_i32 s39, s53, s17 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[11:12], null, s39, s7, v[38:39] s_mov_b32 s39, 0 v_mad_u64_u32 v[12:13], null, v10, s33, v[39:40] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[14:15], null, v11, s33, v[39:40] v_ashrrev_i32_e32 v13, 31, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v15, 31, v14 v_lshlrev_b64 v[10:11], 3, v[12:13] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[12:13], 3, v[14:15] v_add_co_u32 v10, vcc_lo, s20, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v11, vcc_lo, s21, v11, vcc_lo v_add_co_u32 v12, vcc_lo, s20, v12 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v13, vcc_lo, s21, v13, vcc_lo s_clause 0x1 global_store_b64 v[10:11], v[6:7], off global_store_b64 v[12:13], v[8:9], off .LBB9_42: ; Parent Loop BB9_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v6, s39, 16 s_add_i32 s54, s39, 16 s_add_i32 s39, s39, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s39, 40 v_add_nc_u32_e32 v10, 40, v6 v_add_nc_u32_e32 v8, 0x50, v6 s_clause 0x1 scratch_load_b64 v[6:7], v10, off scratch_load_b64 v[8:9], v8, off s_waitcnt vmcnt(1) scratch_store_b64 off, v[6:7], s54 s_waitcnt vmcnt(0) scratch_store_b64 v10, v[8:9], off s_cbranch_scc1 .LBB9_42 ; %bb.43: ; %.preheader673.preheader ; in Loop: Header=BB9_9 Depth=1 v_mov_b32_e32 v6, v53 s_mov_b32 s39, 0 .LBB9_44: ; %.preheader673 ; Parent Loop BB9_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_add_nc_u32_e64 v7, 0x110, s39 s_add_i32 s54, s39, 0x110 s_add_i32 s39, s39, 8 s_cmp_lg_u32 s39, 24 s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v16, 40, v7 v_add_nc_u32_e32 v7, 0x50, v7 s_clause 0x2 scratch_load_b64 v[8:9], off, s54 scratch_load_b64 v[10:11], v16, off scratch_load_b64 v[12:13], v7, off v_ashrrev_i32_e32 v7, 31, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[14:15], 3, v[6:7] v_add_nc_u32_e32 v6, s44, v6 v_add_co_u32 v14, vcc_lo, s22, v14 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v15, vcc_lo, s23, v15, vcc_lo s_waitcnt vmcnt(2) global_store_b64 v[14:15], v[8:9], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[10:11], s54 s_waitcnt vmcnt(0) scratch_store_b64 v16, v[12:13], off s_cbranch_scc1 .LBB9_44 ; %bb.45: ; in Loop: Header=BB9_9 Depth=1 v_add_nc_u32_e32 v54, s48, v54 v_add_nc_u32_e32 v55, s42, v55 v_add_nc_u32_e32 v53, s43, v53 s_add_i32 s53, s53, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s53, s47 s_cbranch_scc0 .LBB9_48 ; %bb.46: ; in Loop: Header=BB9_9 Depth=1 v_dual_mov_b32 v12, v18 :: v_dual_mov_b32 v13, v19 v_dual_mov_b32 v11, v5 :: v_dual_mov_b32 v10, v4 v_dual_mov_b32 v14, v20 :: v_dual_mov_b32 v15, v21 v_dual_mov_b32 v16, v22 :: v_dual_mov_b32 v17, v23 v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2 v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0 s_branch .LBB9_9 .LBB9_47: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7 v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9 v_dual_mov_b32 v4, v10 :: v_dual_mov_b32 v5, v11 v_dual_mov_b32 v8, v18 :: v_dual_mov_b32 v9, v19 s_branch .LBB9_49 .LBB9_48: ; %._crit_edge.loopexit s_clause 0x1 scratch_load_b128 v[16:19], off, off offset:32 scratch_load_b64 v[8:9], off, off offset:48 .LBB9_49: ; %._crit_edge s_waitcnt vmcnt(1) v_div_scale_f64 v[6:7], null, v[16:17], v[16:17], 1.0 v_div_scale_f64 v[14:15], vcc_lo, 1.0, v[16:17], 1.0 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[10:11], v[6:7] s_waitcnt_depctr 0xfff v_fma_f64 v[12:13], -v[6:7], v[10:11], 1.0 v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], -v[6:7], v[10:11], 1.0 v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[12:13], v[14:15], v[10:11] v_fma_f64 v[6:7], -v[6:7], v[12:13], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[6:7], v[6:7], v[10:11], v[12:13] v_div_fixup_f64 v[10:11], v[6:7], v[16:17], 1.0 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[6:7], v[18:19], v[10:11] s_waitcnt vmcnt(0) v_mul_f64 v[8:9], v[10:11], v[8:9] scratch_store_b128 off, v[6:9], off offset:40 .LBB9_50: ; =>This Inner Loop Header: Depth=1 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 scratch_load_b64 v[12:13], off, s1 s_cmp_lg_u32 s0, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s1 s_cbranch_scc1 .LBB9_50 ; %bb.51: s_clause 0x1 scratch_load_b128 v[10:13], off, off offset:64 scratch_load_b64 v[14:15], off, off offset:80 s_mov_b32 s0, 0 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], -v[6:7], v[10:11], v[12:13] s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[8:9], v[10:11], v[14:15] scratch_store_b128 off, v[12:15], off offset:72 .LBB9_52: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v14, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 24 v_add_nc_u32_e32 v18, 40, v14 s_clause 0x1 scratch_load_b64 v[14:15], off, s1 scratch_load_b64 v[16:17], v18, off s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[10:11], v[14:15], v[16:17] scratch_store_b64 v18, v[14:15], off s_cbranch_scc1 .LBB9_52 ; %bb.53: v_div_scale_f64 v[10:11], null, v[12:13], v[12:13], 1.0 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[14:15], v[10:11] s_waitcnt_depctr 0xfff v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] v_div_scale_f64 v[16:17], vcc_lo, 1.0, v[12:13], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[18:19], v[16:17], v[14:15] v_fma_f64 v[10:11], -v[10:11], v[18:19], v[16:17] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[10:11], v[10:11], v[14:15], v[18:19] v_div_fixup_f64 v[10:11], v[10:11], v[12:13], 1.0 .LBB9_54: ; =>This Inner Loop Header: Depth=1 s_add_i32 s1, s41, s0 s_add_i32 s0, s0, 8 scratch_load_b64 v[12:13], off, s1 s_cmp_lg_u32 s0, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s1 s_cbranch_scc1 .LBB9_54 ; %bb.55: v_mad_u64_u32 v[10:11], null, s7, s47, v[38:39] s_add_i32 s0, s47, s17 s_mov_b64 s[4:5], 0 v_mad_u64_u32 v[11:12], null, s7, s0, v[38:39] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[12:13], null, v10, s33, v[39:40] v_mad_u64_u32 v[14:15], null, v11, s33, v[39:40] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v13, 31, v12 v_ashrrev_i32_e32 v15, 31, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[10:11], 3, v[12:13] v_lshlrev_b64 v[12:13], 3, v[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v18, vcc_lo, s20, v10 v_add_co_ci_u32_e32 v19, vcc_lo, s21, v11, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v10, vcc_lo, s20, v12 v_add_co_ci_u32_e32 v11, vcc_lo, s21, v13, vcc_lo s_clause 0x1 global_store_b64 v[18:19], v[6:7], off global_store_b64 v[10:11], v[8:9], off .LBB9_56: ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v44, 31, v43 s_cmp_eq_u32 s4, 2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[6:7], 3, v[43:44] v_add_co_u32 v6, vcc_lo, s12, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s4, 1 s_cselect_b32 s0, -1, 0 global_load_b64 v[6:7], v[6:7], off s_cmp_eq_u32 s4, 0 v_add_nc_u32_e32 v43, s16, v43 s_cselect_b32 s1, -1, 0 s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s4, 3 s_waitcnt vmcnt(0) v_dual_cndmask_b32 v4, v4, v6 :: v_dual_cndmask_b32 v5, v5, v7 v_cndmask_b32_e64 v3, v3, v7, s0 v_cndmask_b32_e64 v2, v2, v6, s0 v_cndmask_b32_e64 v1, v1, v7, s1 v_cndmask_b32_e64 v0, v0, v6, s1 s_cbranch_scc1 .LBB9_56 ; %bb.57: ; %.preheader672.preheader s_lshl_b32 s0, s49, 2 v_add_nc_u32_e64 v8, 0x90, 40 s_add_i32 s0, s40, s0 v_mov_b32_e32 v9, v39 s_add_i32 s1, s0, s18 v_add_nc_u32_e32 v7, s0, v46 v_add3_u32 v6, s1, v46, -2 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v7, v7, s33 v_mul_lo_u32 v6, v6, s33 .LBB9_58: ; %.preheader672 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v10, v7, v9 v_add_nc_u32_e32 v12, v6, v9 v_add_nc_u32_e32 v14, s0, v50 v_add_nc_u32_e32 v9, s46, v9 v_add_nc_u32_e32 v15, s0, v8 v_ashrrev_i32_e32 v11, 31, v10 v_ashrrev_i32_e32 v13, 31, v12 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_cmp_lg_u32 s0, 40 v_lshlrev_b64 v[10:11], 3, v[10:11] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[12:13], 3, v[12:13] v_add_co_u32 v10, vcc_lo, s20, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v11, vcc_lo, s21, v11, vcc_lo v_add_co_u32 v12, vcc_lo, s20, v12 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v13, vcc_lo, s21, v13, vcc_lo s_clause 0x1 global_load_b64 v[10:11], v[10:11], off global_load_b64 v[12:13], v[12:13], off s_waitcnt vmcnt(1) scratch_store_b64 v14, v[10:11], off offset:-40 s_waitcnt vmcnt(0) scratch_store_b64 v14, v[12:13], off s_clause 0x1 scratch_store_b64 v15, v[10:11], off offset:-40 scratch_store_b64 v15, v[12:13], off s_cbranch_scc1 .LBB9_58 ; %bb.59: v_lshl_add_u32 v25, v41, 2, v41 s_clause 0x3 scratch_load_b64 v[27:28], off, off offset:192 scratch_load_b64 v[29:30], off, off offset:208 scratch_load_b64 v[31:32], off, off offset:64 scratch_load_b64 v[33:34], off, off offset:80 v_add_nc_u32_e32 v26, s42, v47 v_add_nc_u32_e32 v6, 3, v25 v_add_nc_u32_e32 v7, 4, v25 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v20, v6, v47 v_add_nc_u32_e32 v22, v7, v47 v_add_nc_u32_e32 v6, v26, v6 v_add_nc_u32_e32 v8, v26, v7 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_ashrrev_i32_e32 v21, 31, v20 v_ashrrev_i32_e32 v23, 31, v22 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_ashrrev_i32_e32 v7, 31, v6 v_ashrrev_i32_e32 v9, 31, v8 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[10:11], 3, v[20:21] v_lshlrev_b64 v[12:13], 3, v[22:23] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[6:7], 3, v[6:7] v_lshlrev_b64 v[8:9], 3, v[8:9] s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v10, vcc_lo, s14, v10 v_add_co_ci_u32_e32 v11, vcc_lo, s15, v11, vcc_lo v_add_co_u32 v12, vcc_lo, s14, v12 v_add_co_ci_u32_e32 v13, vcc_lo, s15, v13, vcc_lo v_add_co_u32 v14, vcc_lo, s14, v6 v_add_co_ci_u32_e32 v15, vcc_lo, s15, v7, vcc_lo v_add_co_u32 v16, vcc_lo, s14, v8 v_add_co_ci_u32_e32 v17, vcc_lo, s15, v9, vcc_lo s_clause 0x3 global_load_b64 v[12:13], v[12:13], off global_load_b64 v[6:7], v[14:15], off global_load_b64 v[10:11], v[10:11], off global_load_b64 v[8:9], v[16:17], off s_and_not1_b32 vcc_lo, exec_lo, s50 s_waitcnt vmcnt(7) v_fma_f64 v[23:24], -s[2:3], v[0:1], v[27:28] s_waitcnt vmcnt(6) v_fma_f64 v[27:28], s[2:3], v[4:5], v[29:30] s_waitcnt vmcnt(5) v_fma_f64 v[0:1], s[2:3], v[0:1], v[31:32] s_waitcnt vmcnt(4) v_fma_f64 v[29:30], -s[2:3], v[4:5], v[33:34] s_clause 0x3 scratch_store_b64 off, v[23:24], off offset:192 scratch_store_b64 off, v[27:28], off offset:208 scratch_store_b64 off, v[0:1], off offset:64 scratch_store_b64 off, v[29:30], off offset:80 s_waitcnt vmcnt(1) scratch_store_b128 off, v[10:13], off offset:296 s_waitcnt vmcnt(0) scratch_store_b128 off, v[6:9], off offset:336 s_cbranch_vccnz .LBB9_71 ; %bb.60: ; %.preheader671.lr.ph s_mul_i32 s4, s18, s17 s_add_i32 s1, s19, 2 s_mul_i32 s0, s4, 3 v_add_nc_u32_e64 v13, 16, 24 v_add3_u32 v0, s40, s0, v46 s_mul_i32 s0, s7, s1 s_movk_i32 s1, 0x50 v_add3_u32 v1, s40, s0, v46 s_lshl_b32 s0, s49, 1 v_mul_lo_u32 v0, s16, v0 s_mul_i32 s49, s49, 7 v_add3_u32 v6, s40, s0, v46 v_mul_lo_u32 v8, v1, s33 v_add3_u32 v9, s40, s49, v46 v_add_nc_u32_e64 v21, 0x90, s1 v_add_nc_u32_e64 v27, s1, 16 s_add_i32 s1, s17, -1 v_add3_u32 v10, v0, s16, v42 v_mad_u64_u32 v[0:1], null, v6, s33, s[6:7] v_mad_u64_u32 v[6:7], null, v9, s33, s[6:7] v_add3_u32 v1, v42, v8, s6 s_delay_alu instid0(VALU_DEP_4) v_add3_u32 v28, v10, s6, 1 s_mul_i32 s4, s4, s16 s_mov_b32 s5, 0 .LBB9_61: ; %.preheader671 ; =>This Loop Header: Depth=1 ; Child Loop BB9_62 Depth 2 ; Child Loop BB9_66 Depth 2 ; Child Loop BB9_68 Depth 2 s_delay_alu instid0(VALU_DEP_2) v_mov_b32_e32 v7, v1 s_mov_b32 s0, 0 .LBB9_62: ; Parent Loop BB9_61 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_ashrrev_i32_e32 v8, 31, v7 v_add_nc_u32_e32 v10, s0, v27 v_add_nc_u32_e32 v11, s0, v21 s_add_i32 s0, s0, 8 s_cmp_lg_u32 s0, 40 v_lshlrev_b64 v[8:9], 3, v[7:8] v_add_nc_u32_e32 v7, s46, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, s20, v8 v_add_co_ci_u32_e32 v9, vcc_lo, s21, v9, vcc_lo global_load_b64 v[8:9], v[8:9], off s_waitcnt vmcnt(0) scratch_store_b64 v10, v[8:9], off scratch_store_b64 v11, v[8:9], off s_cbranch_scc1 .LBB9_62 ; %bb.63: ; in Loop: Header=BB9_61 Depth=1 s_add_i32 s0, s5, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) s_mul_i32 s8, s42, s0 s_cmp_ge_i32 s0, s1 v_add_nc_u32_e32 v7, s8, v20 v_add_nc_u32_e32 v9, s8, v22 v_ashrrev_i32_e32 v8, 31, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v10, 31, v9 v_lshlrev_b64 v[7:8], 3, v[7:8] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[9:10], 3, v[9:10] v_add_co_u32 v7, vcc_lo, s14, v7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v8, vcc_lo, s15, v8, vcc_lo v_add_co_u32 v9, vcc_lo, s14, v9 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v10, vcc_lo, s15, v10, vcc_lo scratch_load_b64 v[23:24], off, off offset:232 s_clause 0x1 global_load_b64 v[11:12], v[7:8], off global_load_b64 v[7:8], v[9:10], off scratch_load_b64 v[9:10], off, off offset:104 s_cbranch_scc1 .LBB9_65 ; %bb.64: ; in Loop: Header=BB9_61 Depth=1 v_add_nc_u32_e32 v31, s5, v49 s_waitcnt vmcnt(3) v_fma_f64 v[23:24], -s[2:3], v[2:3], v[23:24] s_waitcnt vmcnt(0) v_fma_f64 v[9:10], s[2:3], v[2:3], v[9:10] v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5 v_mad_u64_u32 v[29:30], null, v31, s16, v[41:42] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v30, 31, v29 v_lshlrev_b64 v[29:30], 3, v[29:30] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v29, vcc_lo, s12, v29 v_add_co_ci_u32_e32 v30, vcc_lo, s13, v30, vcc_lo scratch_load_b64 v[31:32], off, off offset:248 global_load_b64 v[29:30], v[29:30], off scratch_load_b64 v[33:34], off, off offset:120 s_waitcnt vmcnt(1) v_fma_f64 v[31:32], s[2:3], v[29:30], v[31:32] s_waitcnt vmcnt(0) v_fma_f64 v[33:34], -s[2:3], v[29:30], v[33:34] v_dual_mov_b32 v4, v29 :: v_dual_mov_b32 v5, v30 s_clause 0x1 scratch_store_b64 off, v[31:32], off offset:248 scratch_store_b64 off, v[33:34], off offset:120 .LBB9_65: ; in Loop: Header=BB9_61 Depth=1 s_clause 0xd scratch_load_b128 v[29:32], off, off offset:160 scratch_load_b128 v[33:36], off, off offset:32 scratch_load_b64 v[43:44], off, off offset:176 scratch_load_b64 v[68:69], off, off offset:48 scratch_load_b128 v[50:53], off, off offset:296 scratch_load_b128 v[54:57], off, off offset:192 scratch_load_b64 v[80:81], off, off offset:208 scratch_load_b128 v[58:61], off, off offset:336 scratch_load_b64 v[82:83], off, off offset:224 scratch_load_b64 v[84:85], off, off offset:240 scratch_load_b128 v[62:65], off, off offset:64 scratch_load_b64 v[86:87], off, off offset:80 scratch_load_b64 v[88:89], off, off offset:96 scratch_load_b64 v[90:91], off, off offset:112 s_waitcnt vmcnt(13) v_div_scale_f64 v[66:67], null, v[29:30], v[29:30], 1.0 s_waitcnt vmcnt(12) v_div_scale_f64 v[70:71], null, v[33:34], v[33:34], 1.0 v_div_scale_f64 v[92:93], vcc_lo, 1.0, v[29:30], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[72:73], v[66:67] v_rcp_f64_e32 v[74:75], v[70:71] s_waitcnt_depctr 0xfff v_fma_f64 v[76:77], -v[66:67], v[72:73], 1.0 v_fma_f64 v[78:79], -v[70:71], v[74:75], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[72:73], v[72:73], v[76:77], v[72:73] v_fma_f64 v[74:75], v[74:75], v[78:79], v[74:75] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[76:77], -v[66:67], v[72:73], 1.0 v_fma_f64 v[78:79], -v[70:71], v[74:75], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[72:73], v[72:73], v[76:77], v[72:73] v_div_scale_f64 v[76:77], s0, 1.0, v[33:34], 1.0 v_fma_f64 v[74:75], v[74:75], v[78:79], v[74:75] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[78:79], v[92:93], v[72:73] v_mul_f64 v[94:95], v[76:77], v[74:75] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[66:67], -v[66:67], v[78:79], v[92:93] v_fma_f64 v[70:71], -v[70:71], v[94:95], v[76:77] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_div_fmas_f64 v[66:67], v[66:67], v[72:73], v[78:79] s_mov_b32 vcc_lo, s0 s_mov_b32 s0, 0 v_div_fmas_f64 v[70:71], v[70:71], v[74:75], v[94:95] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[66:67], v[66:67], v[29:30], 1.0 v_div_fixup_f64 v[70:71], v[70:71], v[33:34], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_mul_f64 v[29:30], v[31:32], v[66:67] s_waitcnt vmcnt(11) v_mul_f64 v[31:32], v[66:67], v[43:44] s_waitcnt vmcnt(9) v_mul_f64 v[33:34], v[66:67], v[50:51] v_mul_f64 v[66:67], v[35:36], v[70:71] v_mul_f64 v[68:69], v[70:71], v[68:69] v_mul_f64 v[35:36], v[70:71], v[52:53] s_waitcnt vmcnt(8) v_fma_f64 v[50:51], -v[29:30], v[54:55], v[56:57] s_waitcnt vmcnt(7) v_fma_f64 v[52:53], -v[31:32], v[54:55], v[80:81] s_waitcnt vmcnt(5) v_fma_f64 v[70:71], -v[29:30], v[82:83], v[23:24] s_waitcnt vmcnt(4) v_fma_f64 v[72:73], -v[31:32], v[82:83], v[84:85] s_waitcnt vmcnt(3) v_fma_f64 v[74:75], -v[66:67], v[62:63], v[64:65] s_waitcnt vmcnt(2) v_fma_f64 v[76:77], -v[68:69], v[62:63], v[86:87] v_fma_f64 v[54:55], -v[33:34], v[54:55], v[58:59] v_fma_f64 v[56:57], -v[35:36], v[62:63], v[60:61] s_waitcnt vmcnt(1) v_fma_f64 v[62:63], -v[66:67], v[88:89], v[9:10] s_waitcnt vmcnt(0) v_fma_f64 v[64:65], -v[68:69], v[88:89], v[90:91] v_fma_f64 v[58:59], -v[33:34], v[82:83], v[11:12] v_fma_f64 v[60:61], -v[35:36], v[88:89], v[7:8] v_mov_b32_e32 v9, v42 v_mov_b32_e32 v7, v28 s_clause 0x8 scratch_store_b128 off, v[29:32], off offset:168 scratch_store_b128 off, v[50:53], off offset:200 scratch_store_b128 off, v[70:73], off offset:232 scratch_store_b128 off, v[66:69], off offset:40 scratch_store_b128 off, v[74:77], off offset:72 scratch_store_b128 off, v[33:36], off offset:296 scratch_store_b128 off, v[54:57], off offset:336 scratch_store_b128 off, v[62:65], off offset:104 scratch_store_b128 off, v[58:61], off offset:376 .LBB9_66: ; Parent Loop BB9_61 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v10, 0x110 :: v_dual_add_nc_u32 v35, v6, v9 v_add_nc_u32_e64 v8, 0x90, 24 v_add_nc_u32_e32 v12, s0, v13 v_add_nc_u32_e32 v43, v0, v9 s_delay_alu instid0(VALU_DEP_4) v_readfirstlane_b32 s8, v10 v_ashrrev_i32_e32 v36, 31, v35 v_add_nc_u32_e32 v8, s0, v8 scratch_load_b64 v[23:24], v12, off v_ashrrev_i32_e32 v44, 31, v43 s_add_i32 s8, s8, s0 v_lshlrev_b64 v[35:36], 3, v[35:36] s_add_i32 s9, s8, 24 s_add_i32 s10, s8, 64 scratch_load_b64 v[10:11], v8, off s_addk_i32 s8, 0x68 s_clause 0x2 scratch_load_b64 v[29:30], off, s9 scratch_load_b64 v[31:32], off, s10 scratch_load_b64 v[33:34], off, s8 v_ashrrev_i32_e32 v8, 31, v7 v_lshlrev_b64 v[43:44], 3, v[43:44] v_add_nc_u32_e32 v9, s46, v9 s_add_i32 s0, s0, 8 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_lshlrev_b64 v[50:51], 3, v[7:8] v_add_nc_u32_e32 v7, s4, v7 s_cmp_lg_u32 s0, 16 v_add_co_u32 v50, vcc_lo, s22, v50 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v51, vcc_lo, s23, v51, vcc_lo v_add_co_u32 v35, vcc_lo, s20, v35 v_add_co_ci_u32_e32 v36, vcc_lo, s21, v36, vcc_lo v_add_co_u32 v43, vcc_lo, s20, v43 v_add_co_ci_u32_e32 v44, vcc_lo, s21, v44, vcc_lo s_waitcnt vmcnt(3) s_clause 0x1 global_store_b64 v[35:36], v[10:11], off global_store_b64 v[43:44], v[23:24], off s_waitcnt vmcnt(2) global_store_b64 v[50:51], v[29:30], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[31:32], s9 s_waitcnt vmcnt(0) scratch_store_b64 off, v[33:34], s10 s_cbranch_scc1 .LBB9_66 ; %bb.67: ; %.preheader670.preheader ; in Loop: Header=BB9_61 Depth=1 s_mov_b32 s0, 0 .LBB9_68: ; %.preheader670 ; Parent Loop BB9_61 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_nc_u32_e64 v7, 0x90, s0 v_add_nc_u32_e64 v8, s0, 16 s_add_i32 s8, s0, 0x90 s_add_i32 s9, s0, 16 s_add_i32 s0, s0, 8 v_add_nc_u32_e32 v29, 40, v7 v_add_nc_u32_e32 v9, 0x50, v7 v_add_nc_u32_e32 v30, 40, v8 v_add_nc_u32_e32 v23, 0x50, v8 s_cmp_lg_u32 s0, 40 s_clause 0x1 scratch_load_b64 v[7:8], v29, off scratch_load_b64 v[9:10], v9, off s_clause 0x1 scratch_load_b64 v[11:12], v30, off scratch_load_b64 v[23:24], v23, off s_waitcnt vmcnt(3) scratch_store_b64 off, v[7:8], s8 s_waitcnt vmcnt(2) scratch_store_b64 v29, v[9:10], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[11:12], s9 s_waitcnt vmcnt(0) scratch_store_b64 v30, v[23:24], off s_cbranch_scc1 .LBB9_68 ; %bb.69: ; in Loop: Header=BB9_61 Depth=1 v_add_nc_u32_e32 v1, s48, v1 v_add_nc_u32_e32 v28, s43, v28 v_add_nc_u32_e32 v0, s48, v0 v_add_nc_u32_e32 v6, s48, v6 s_add_i32 s5, s5, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s5, s47 s_cbranch_scc1 .LBB9_61 ; %bb.70: ; %._crit_edge703.loopexit s_clause 0x3 scratch_load_b64 v[23:24], off, off offset:192 scratch_load_b128 v[10:13], off, off offset:296 scratch_load_b128 v[6:9], off, off offset:336 scratch_load_b64 v[0:1], off, off offset:64 .LBB9_71: ; %._crit_edge703 s_clause 0x3 scratch_load_b128 v[2:5], off, off offset:160 scratch_load_b128 v[27:30], off, off offset:32 scratch_load_b64 v[20:21], off, off offset:200 scratch_load_b64 v[33:34], off, off offset:72 s_waitcnt vmcnt(3) v_div_scale_f64 v[31:32], null, v[2:3], v[2:3], 1.0 s_waitcnt vmcnt(2) v_div_scale_f64 v[35:36], null, v[27:28], v[27:28], 1.0 v_div_scale_f64 v[55:56], vcc_lo, 1.0, v[2:3], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[43:44], v[31:32] v_rcp_f64_e32 v[49:50], v[35:36] s_waitcnt_depctr 0xfff v_fma_f64 v[51:52], -v[31:32], v[43:44], 1.0 v_fma_f64 v[53:54], -v[35:36], v[49:50], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[43:44], v[43:44], v[51:52], v[43:44] v_fma_f64 v[49:50], v[49:50], v[53:54], v[49:50] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[51:52], -v[31:32], v[43:44], 1.0 v_fma_f64 v[53:54], -v[35:36], v[49:50], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[43:44], v[43:44], v[51:52], v[43:44] v_div_scale_f64 v[51:52], s0, 1.0, v[27:28], 1.0 v_fma_f64 v[49:50], v[49:50], v[53:54], v[49:50] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[53:54], v[55:56], v[43:44] v_mul_f64 v[57:58], v[51:52], v[49:50] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[31:32], -v[31:32], v[53:54], v[55:56] v_fma_f64 v[35:36], -v[35:36], v[57:58], v[51:52] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[31:32], v[31:32], v[43:44], v[53:54] s_mov_b32 vcc_lo, s0 v_div_fmas_f64 v[35:36], v[35:36], v[49:50], v[57:58] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[2:3], v[31:32], v[2:3], 1.0 v_div_fixup_f64 v[27:28], v[35:36], v[27:28], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mul_f64 v[4:5], v[4:5], v[2:3] v_mul_f64 v[10:11], v[2:3], v[10:11] v_mul_f64 v[2:3], v[29:30], v[27:28] v_mul_f64 v[12:13], v[27:28], v[12:13] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[20:21], -v[4:5], v[23:24], v[20:21] v_fma_f64 v[6:7], -v[10:11], v[23:24], v[6:7] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[22:23], -v[2:3], v[0:1], v[33:34] v_fma_f64 v[8:9], -v[12:13], v[0:1], v[8:9] global_load_b64 v[0:1], v[18:19], off v_div_scale_f64 v[27:28], null, v[20:21], v[20:21], v[6:7] v_div_scale_f64 v[43:44], vcc_lo, v[6:7], v[20:21], v[6:7] v_div_scale_f64 v[29:30], null, v[22:23], v[22:23], v[8:9] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[31:32], v[27:28] v_rcp_f64_e32 v[33:34], v[29:30] s_waitcnt_depctr 0xfff v_fma_f64 v[18:19], -v[27:28], v[31:32], 1.0 v_fma_f64 v[35:36], -v[29:30], v[33:34], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[18:19], v[31:32], v[18:19], v[31:32] v_fma_f64 v[31:32], v[33:34], v[35:36], v[33:34] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[33:34], -v[27:28], v[18:19], 1.0 v_fma_f64 v[35:36], -v[29:30], v[31:32], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[18:19], v[18:19], v[33:34], v[18:19] v_div_scale_f64 v[33:34], s0, v[8:9], v[22:23], v[8:9] v_fma_f64 v[31:32], v[31:32], v[35:36], v[31:32] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[35:36], v[43:44], v[18:19] v_mul_f64 v[49:50], v[33:34], v[31:32] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[27:28], -v[27:28], v[35:36], v[43:44] v_fma_f64 v[29:30], -v[29:30], v[49:50], v[33:34] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_div_fmas_f64 v[18:19], v[27:28], v[18:19], v[35:36] s_mov_b32 vcc_lo, s0 s_mov_b32 s0, 0 v_div_fmas_f64 v[27:28], v[29:30], v[31:32], v[49:50] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[6:7], v[18:19], v[20:21], v[6:7] v_div_fixup_f64 v[8:9], v[27:28], v[22:23], v[8:9] s_clause 0x1 scratch_store_b128 off, v[10:13], off offset:296 scratch_store_b128 off, v[6:9], off offset:336 .LBB9_72: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v6, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 24 v_add_nc_u32_e32 v6, 40, v6 s_clause 0x1 scratch_load_b64 v[6:7], v6, off scratch_load_b64 v[8:9], off, s1 s_waitcnt vmcnt(0) v_fma_f64 v[6:7], -v[0:1], v[6:7], v[8:9] scratch_store_b64 off, v[6:7], s1 s_cbranch_scc1 .LBB9_72 ; %bb.73: s_clause 0x1 scratch_load_b128 v[6:9], off, off offset:336 scratch_load_b128 v[10:13], off, off offset:296 s_mov_b32 s0, 0 s_waitcnt vmcnt(0) v_fma_f64 v[0:1], -v[4:5], v[6:7], v[10:11] v_fma_f64 v[2:3], -v[2:3], v[8:9], v[12:13] scratch_store_b128 off, v[0:3], off offset:296 .LBB9_74: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v4, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 40 v_add_nc_u32_e32 v5, 40, v4 v_add_nc_u32_e32 v4, 0x50, v4 s_clause 0x1 scratch_load_b64 v[0:1], v5, off scratch_load_b64 v[2:3], off, s1 s_waitcnt vmcnt(1) scratch_store_b64 v4, v[0:1], off s_waitcnt vmcnt(0) scratch_store_b64 v5, v[2:3], off s_cbranch_scc1 .LBB9_74 ; %bb.75: v_add_nc_u32_e32 v6, v47, v25 s_getpc_b64 s[0:1] s_add_u32 s0, s0, bt@rel32@lo+4 s_addc_u32 s1, s1, bt@rel32@hi+12 s_and_not1_b32 vcc_lo, exec_lo, s45 s_cbranch_vccnz .LBB9_77 ; %bb.76: ; %.._crit_edge709_crit_edge v_add_nc_u32_e32 v0, v47, v25 s_mov_b32 s2, 0 s_branch .LBB9_78 .LBB9_77: s_mov_b32 s2, -1 ; implicit-def: $vgpr0 .LBB9_78: ; %Flow1068 s_load_b64 s[0:1], s[0:1], 0x0 s_and_not1_b32 vcc_lo, exec_lo, s2 s_cbranch_vccnz .LBB9_88 ; %bb.79: ; %.preheader.lr.ph v_mad_u64_u32 v[0:1], null, v38, 5, 10 s_add_i32 s2, s17, -3 s_lshl_b32 s4, s17, 1 s_mul_i32 s3, s18, s2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s17, v0, -5 v_add3_u32 v2, s40, s3, v46 s_add_i32 s3, s17, -1 v_mul_lo_u32 v3, s16, v2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v0, s16, v1 v_mad_u64_u32 v[1:2], null, s6, 5, v[0:1] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v3, s16, v42 v_add3_u32 v7, v0, s6, 1 s_delay_alu instid0(VALU_DEP_3) v_add3_u32 v8, v1, v48, 5 .LBB9_80: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB9_81 Depth 2 ; Child Loop BB9_85 Depth 2 v_mad_u64_u32 v[0:1], null, s2, s7, v[38:39] s_add_i32 s5, s2, s17 s_mov_b32 s6, 0 v_mad_u64_u32 v[1:2], null, s5, s7, v[38:39] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[2:3], null, v0, s33, v[39:40] v_mad_u64_u32 v[4:5], null, v1, s33, v[39:40] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v3, 31, v2 v_ashrrev_i32_e32 v5, 31, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[0:1], 3, v[2:3] v_lshlrev_b64 v[2:3], 3, v[4:5] v_mov_b32_e32 v4, v7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v0, vcc_lo, s20, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s21, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s21, v3, vcc_lo s_clause 0x1 global_load_b64 v[0:1], v[0:1], off global_load_b64 v[2:3], v[2:3], off .LBB9_81: ; Parent Loop BB9_80 Depth=1 ; => This Inner Loop Header: Depth=2 v_ashrrev_i32_e32 v5, 31, v4 s_add_i32 s8, s6, 0x110 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_lshlrev_b64 v[9:10], 3, v[4:5] v_add_nc_u32_e64 v5, 0x110, s6 v_add_nc_u32_e32 v4, s44, v4 s_add_i32 s6, s6, 8 s_cmp_lg_u32 s6, 24 s_delay_alu instid0(VALU_DEP_3) v_add_co_u32 v9, vcc_lo, s22, v9 v_add_nc_u32_e32 v11, 40, v5 v_add_co_ci_u32_e32 v10, vcc_lo, s23, v10, vcc_lo v_add_nc_u32_e32 v5, 0x50, v5 scratch_load_b64 v[11:12], v11, off global_load_b64 v[9:10], v[9:10], off scratch_load_b64 v[18:19], v5, off s_waitcnt vmcnt(1) v_fma_f64 v[9:10], -v[0:1], v[11:12], v[9:10] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[9:10], -v[2:3], v[18:19], v[9:10] scratch_store_b64 off, v[9:10], s8 s_cbranch_scc1 .LBB9_81 ; %bb.82: ; in Loop: Header=BB9_80 Depth=1 s_add_i32 s5, s5, s4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) s_add_i32 s6, s5, s19 v_mad_u64_u32 v[0:1], null, s5, s18, v[40:41] s_add_i32 s8, s6, s17 v_mad_u64_u32 v[1:2], null, s6, s7, v[38:39] s_sub_i32 s6, s8, s19 v_mad_u64_u32 v[2:3], null, s6, s18, v[40:41] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[3:4], null, v0, s16, v[41:42] v_mad_u64_u32 v[9:10], null, v1, s33, v[39:40] s_sub_i32 s6, s6, s4 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_mad_u64_u32 v[0:1], null, v2, s16, v[41:42] v_mad_u64_u32 v[1:2], null, s6, s7, v[38:39] v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v10, 31, v9 v_lshlrev_b64 v[2:3], 3, v[3:4] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[4:5], null, v1, s33, v[39:40] v_lshlrev_b64 v[9:10], 3, v[9:10] v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, s22, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo v_add_co_u32 v9, vcc_lo, s20, v9 v_ashrrev_i32_e32 v5, 31, v4 v_add_co_ci_u32_e32 v10, vcc_lo, s21, v10, vcc_lo v_lshlrev_b64 v[0:1], 3, v[0:1] global_load_b64 v[18:19], v[2:3], off global_load_b64 v[20:21], v[9:10], off v_lshlrev_b64 v[2:3], 3, v[4:5] scratch_load_b128 v[9:12], off, off offset:336 v_mad_u64_u32 v[4:5], null, s8, s7, v[38:39] v_add_co_u32 v0, vcc_lo, s22, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo v_add_co_u32 v2, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s21, v3, vcc_lo global_load_b64 v[22:23], v[0:1], off global_load_b64 v[27:28], v[2:3], off v_mad_u64_u32 v[0:1], null, s5, s7, v[38:39] v_mad_u64_u32 v[1:2], null, v4, s33, v[39:40] s_add_i32 s5, s2, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_cmp_ge_i32 s5, s3 v_mad_u64_u32 v[3:4], null, v0, s33, v[39:40] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[0:1], 3, v[1:2] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[2:3], 3, v[3:4] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v0, vcc_lo, s20, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s21, v1, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v4, vcc_lo, s20, v2 v_add_co_ci_u32_e32 v5, vcc_lo, s21, v3, vcc_lo global_load_b64 v[29:30], v[0:1], off scratch_load_b128 v[0:3], off, off offset:376 global_load_b64 v[4:5], v[4:5], off s_waitcnt vmcnt(5) v_fma_f64 v[9:10], -v[20:21], v[9:10], v[18:19] s_waitcnt vmcnt(3) v_fma_f64 v[11:12], -v[27:28], v[11:12], v[22:23] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[9:10], -v[29:30], v[0:1], v[9:10] s_waitcnt vmcnt(0) v_fma_f64 v[11:12], -v[4:5], v[2:3], v[11:12] scratch_store_b128 off, v[9:12], off offset:296 s_cbranch_scc1 .LBB9_84 ; %bb.83: ; in Loop: Header=BB9_80 Depth=1 s_clause 0x1 scratch_load_b128 v[9:12], off, off offset:352 scratch_load_b64 v[4:5], off, off offset:368 v_add_f64 v[18:19], v[0:1], v[2:3] v_add_f64 v[0:1], v[0:1], -v[2:3] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_mul_f64 v[2:3], v[0:1], s[0:1] s_waitcnt vmcnt(1) v_mul_f64 v[9:10], v[9:10], s[0:1] s_waitcnt vmcnt(0) v_xor_b32_e32 v5, 0x80000000, v5 v_fma_f64 v[20:21], v[18:19], 0.5, -v[9:10] v_fma_f64 v[0:1], v[18:19], 0.5, v[9:10] v_dual_mov_b32 v18, v11 :: v_dual_mov_b32 v19, v12 s_clause 0x2 scratch_store_b128 off, v[2:5], off offset:352 scratch_store_b128 off, v[18:21], off offset:368 scratch_store_b64 off, v[0:1], off offset:384 .LBB9_84: ; in Loop: Header=BB9_80 Depth=1 s_mov_b32 s5, 0 s_mov_b32 s6, s41 .LBB9_85: ; Parent Loop BB9_80 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_i32 s8, s6, 40 s_clause 0x2 scratch_load_b64 v[0:1], off, s6 scratch_load_b64 v[2:3], off, s6 offset:-40 scratch_load_b64 v[4:5], off, s8 v_add_nc_u32_e32 v9, s5, v8 s_add_i32 s5, s5, 1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v10, 31, v9 v_lshlrev_b64 v[9:10], 3, v[9:10] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v9, vcc_lo, s14, v9 v_add_co_ci_u32_e32 v10, vcc_lo, s15, v10, vcc_lo s_waitcnt vmcnt(1) scratch_store_b64 off, v[2:3], s6 s_add_i32 s6, s6, 8 s_cmp_lg_u32 s5, 5 scratch_store_b64 off, v[0:1], s8 s_waitcnt vmcnt(0) global_store_b64 v[9:10], v[4:5], off s_cbranch_scc1 .LBB9_85 ; %bb.86: ; in Loop: Header=BB9_80 Depth=1 v_subrev_nc_u32_e32 v7, s43, v7 v_subrev_nc_u32_e32 v8, s42, v8 s_add_i32 s5, s2, -1 s_cmp_gt_i32 s2, 0 s_mov_b32 s2, s5 s_cbranch_scc1 .LBB9_80 ; %bb.87: v_mov_b32_e32 v0, v6 .LBB9_88: ; %._crit_edge709 s_clause 0x2 scratch_load_b128 v[1:4], off, off offset:368 scratch_load_b64 v[9:10], off, off offset:384 scratch_load_b128 v[5:8], off, off offset:352 s_waitcnt vmcnt(2) v_xor_b32_e32 v2, 0x80000000, v2 s_waitcnt vmcnt(1) v_add_f64 v[11:12], v[3:4], v[9:10] v_add_f64 v[3:4], v[3:4], -v[9:10] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f64 v[9:10], v[11:12], 0.5 s_waitcnt lgkmcnt(0) v_mul_f64 v[3:4], s[0:1], v[3:4] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_fma_f64 v[11:12], -s[0:1], v[5:6], v[9:10] v_fma_f64 v[5:6], s[0:1], v[5:6], v[9:10] v_add_nc_u32_e32 v9, v26, v25 s_mov_b32 s0, 0 v_add_nc_u32_e32 v18, 1, v9 v_add_nc_u32_e32 v20, 2, v9 v_ashrrev_i32_e32 v10, 31, v9 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v19, 31, v18 v_ashrrev_i32_e32 v21, 31, v20 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[9:10], 3, v[9:10] v_lshlrev_b64 v[18:19], 3, v[18:19] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[20:21], 3, v[20:21] v_add_co_u32 v18, vcc_lo, s14, v18 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v19, vcc_lo, s15, v19, vcc_lo v_add_co_u32 v20, vcc_lo, s14, v20 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v21, vcc_lo, s15, v21, vcc_lo v_add_co_u32 v9, vcc_lo, s14, v9 v_add_co_ci_u32_e32 v10, vcc_lo, s15, v10, vcc_lo s_clause 0x4 global_store_b64 v[18:19], v[1:2], off global_store_b64 v[20:21], v[7:8], off global_store_b64 v[14:15], v[11:12], off global_store_b64 v[9:10], v[3:4], off global_store_b64 v[16:17], v[5:6], off .LBB9_89: ; =>This Inner Loop Header: Depth=1 scratch_load_b64 v[1:2], off, s41 v_add_nc_u32_e32 v3, s0, v0 s_add_i32 s0, s0, 1 s_add_i32 s41, s41, 8 s_cmp_lg_u32 s0, 5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[3:4], 3, v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s14, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s15, v4, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[3:4], v[1:2], off s_cbranch_scc1 .LBB9_89 .LBB9_90: ; %.loopexit s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL14y_solve_kernelPdS_S_S_S_S_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 400 .amdhsa_kernarg_size 320 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 1 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 96 .amdhsa_next_free_sgpr 55 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL14y_solve_kernelPdS_S_S_S_S_iii,"axG",@progbits,_ZL14y_solve_kernelPdS_S_S_S_S_iii,comdat .Lfunc_end9: .size _ZL14y_solve_kernelPdS_S_S_S_S_iii, .Lfunc_end9-_ZL14y_solve_kernelPdS_S_S_S_S_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 9596 ; NumSgprs: 57 ; NumVgprs: 96 ; ScratchSize: 400 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 7 ; VGPRBlocks: 11 ; NumSGPRsForWavesPerEU: 57 ; NumVGPRsForWavesPerEU: 96 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .section .text._ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii,"axG",@progbits,_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii,comdat .globl _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii ; -- Begin function _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .p2align 8 .type _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii,@function _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii: ; @_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x6c s_load_b128 s[24:27], s[0:1], 0x50 v_and_b32_e32 v46, 0x3ff, v0 v_bfe_u32 v45, v0, 10, 10 s_waitcnt lgkmcnt(0) s_and_b32 s3, s2, 0xffff s_lshr_b32 s2, s2, 16 s_mul_i32 s54, s14, s3 s_mul_i32 s6, s15, s2 v_add_nc_u32_e32 v40, s54, v46 v_add_nc_u32_e32 v41, s6, v45 s_add_i32 s2, s25, -1 s_add_i32 s3, s24, -1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v39, 1, v40 v_add_nc_u32_e32 v38, 1, v41 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s2, v39 v_cmp_gt_i32_e64 s2, s3, v38 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB10_86 ; %bb.1: s_add_i32 s7, s25, -2 s_lshl_b32 s27, s26, 2 s_mov_b32 s2, 0 v_mad_u64_u32 v[4:5], null, s27, s7, v[40:41] s_mov_b32 s3, s2 v_mov_b32_e32 v0, 0 s_add_i32 s33, s24, -2 s_mul_i32 s58, s26, s7 v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v5, s2 s_delay_alu instid0(VALU_DEP_3) v_mad_u64_u32 v[7:8], null, v4, s33, v[41:42] v_mad_u64_u32 v[9:10], null, s58, 5, v[40:41] v_mov_b32_e32 v1, v0 v_mov_b32_e32 v2, v0 v_mov_b32_e32 v3, v0 v_mad_u64_u32 v[10:11], null, s58, 6, v[40:41] s_load_b128 s[28:31], s[0:1], 0x40 v_ashrrev_i32_e32 v8, 31, v7 scratch_store_b128 off, v[0:3], off offset:16 v_mov_b32_e32 v1, 0x3ff00000 v_mad_u64_u32 v[11:12], null, v9, s33, v[41:42] s_clause 0x1 scratch_store_b128 off, v[0:3], off offset:32 scratch_store_b64 off, v[5:6], off offset:48 v_lshlrev_b64 v[2:3], 3, v[7:8] v_mad_u64_u32 v[7:8], null, v10, s33, v[41:42] v_ashrrev_i32_e32 v12, 31, v11 v_mad_u64_u32 v[9:10], null, s58, 7, v[40:41] v_lshl_add_u32 v4, s58, 3, v40 s_load_b512 s[8:23], s[0:1], 0x0 s_delay_alu instid0(VALU_DEP_3) v_lshlrev_b64 v[10:11], 3, v[11:12] v_ashrrev_i32_e32 v8, 31, v7 s_mov_b32 s34, 0x9999999a s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s28, v2 v_mad_u64_u32 v[12:13], null, v9, s33, v[41:42] v_lshlrev_b64 v[7:8], 3, v[7:8] v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo v_add_co_u32 v9, vcc_lo, s28, v10 v_mad_u64_u32 v[14:15], null, v4, s33, v[41:42] v_add_co_ci_u32_e32 v10, vcc_lo, s29, v11, vcc_lo v_add_co_u32 v7, vcc_lo, s28, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s29, v8, vcc_lo v_ashrrev_i32_e32 v13, 31, v12 v_ashrrev_i32_e32 v15, 31, v14 s_clause 0x2 global_store_b64 v[2:3], v[5:6], off global_store_b64 v[9:10], v[5:6], off global_store_b64 v[7:8], v[0:1], off v_mul_lo_u32 v10, s24, v39 v_lshlrev_b64 v[2:3], 3, v[12:13] v_lshlrev_b64 v[0:1], 3, v[14:15] s_mov_b32 s36, 0x55555555 s_mov_b32 s38, 0xf5c28f5b s_mov_b32 s35, 0x3fb99999 s_mov_b32 s37, 0x3ff55555 v_add_co_u32 v7, vcc_lo, s28, v2 v_add3_u32 v11, v45, v10, s6 v_add_co_ci_u32_e32 v8, vcc_lo, s29, v3, vcc_lo v_add_co_u32 v0, vcc_lo, s28, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s29, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_nc_u32_e32 v2, 1, v11 s_mov_b32 s39, 0x3fff5c28 s_mul_i32 s52, s25, s24 s_mov_b64 s[40:41], 0 s_clause 0x1 global_store_b64 v[7:8], v[5:6], off global_store_b64 v[0:1], v[5:6], off ; implicit-def: $vgpr4_vgpr5 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $vgpr0_vgpr1 ; implicit-def: $vgpr6_vgpr7 .LBB10_2: ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v3, 31, v2 s_cmp_eq_u32 s40, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[16:17], 3, v[2:3] v_add_co_u32 v18, vcc_lo, s8, v16 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v19, vcc_lo, s9, v17, vcc_lo v_add_co_u32 v16, vcc_lo, s14, v16 v_add_co_ci_u32_e32 v17, vcc_lo, s15, v17, vcc_lo global_load_b64 v[18:19], v[18:19], off s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s40, 1 global_load_b64 v[16:17], v[16:17], off s_cselect_b32 s0, -1, 0 s_cmp_eq_u32 s40, 2 v_add_nc_u32_e32 v2, s52, v2 s_cselect_b32 s1, -1, 0 s_waitcnt vmcnt(1) v_mul_f64 v[20:21], v[18:19], s[34:35] v_fma_f64 v[18:19], v[18:19], s[34:35], 1.0 s_waitcnt vmcnt(0) v_cndmask_b32_e32 v1, v1, v17, vcc_lo v_cndmask_b32_e64 v9, v9, v17, s1 v_cndmask_b32_e64 v8, v8, v16, s1 v_cndmask_b32_e64 v7, v7, v17, s0 v_cndmask_b32_e64 v6, v6, v16, s0 v_cndmask_b32_e32 v0, v0, v16, vcc_lo v_fma_f64 v[22:23], v[20:21], s[38:39], 1.0 v_fma_f64 v[20:21], v[20:21], s[36:37], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v3, v15, v23, s1 v_cmp_gt_f64_e64 s2, v[20:21], v[22:23] v_cndmask_b32_e64 v24, v14, v22, s1 v_dual_cndmask_b32 v25, v5, v23 :: v_dual_cndmask_b32 v26, v4, v22 v_cndmask_b32_e64 v23, v13, v23, s0 v_cndmask_b32_e64 v22, v12, v22, s0 v_dual_cndmask_b32 v5, v5, v21 :: v_dual_cndmask_b32 v4, v4, v20 v_cndmask_b32_e64 v12, v12, v20, s0 v_cndmask_b32_e64 v13, v13, v21, s0 v_cndmask_b32_e64 v14, v14, v20, s1 v_cndmask_b32_e64 v15, v15, v21, s1 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v12, v22, v12, s2 v_cndmask_b32_e64 v13, v23, v13, s2 v_cndmask_b32_e64 v5, v25, v5, s2 v_cndmask_b32_e64 v20, v26, v4, s2 v_cndmask_b32_e64 v14, v24, v14, s2 v_cndmask_b32_e64 v15, v3, v15, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_cndmask_b32_e64 v3, v5, v13, s0 v_cndmask_b32_e64 v21, v20, v12, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v4, v3, v15, s1 v_cndmask_b32_e64 v3, v21, v14, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_f64_e64 s2, v[3:4], v[18:19] s_and_b32 s3, s2, s1 s_and_b32 s4, s2, s0 s_and_b32 s2, s2, vcc_lo v_cndmask_b32_e64 v14, v14, v18, s3 v_cndmask_b32_e64 v12, v12, v18, s4 v_cndmask_b32_e64 v18, v20, v18, s2 v_cndmask_b32_e64 v13, v13, v19, s4 v_cndmask_b32_e64 v5, v5, v19, s2 v_cndmask_b32_e64 v15, v15, v19, s3 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v3, v18, v12, s0 v_cndmask_b32_e64 v4, v5, v13, s0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v3, v3, v14, s1 v_cndmask_b32_e64 v4, v4, v15, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_f64_e64 s2, 1.0, v[3:4] s_and_b32 s1, s2, s1 s_and_b32 s0, s2, s0 s_and_b32 s2, s2, vcc_lo v_cndmask_b32_e64 v15, v15, 0x3ff00000, s1 v_cndmask_b32_e64 v13, v13, 0x3ff00000, s0 v_cndmask_b32_e64 v5, v5, 0x3ff00000, s2 v_cndmask_b32_e64 v14, v14, 0, s1 v_cndmask_b32_e64 v12, v12, 0, s0 v_cndmask_b32_e64 v4, v18, 0, s2 s_add_u32 s40, s40, 1 s_addc_u32 s41, s41, 0 s_cmp_lg_u32 s40, 3 s_cbranch_scc1 .LBB10_2 ; %bb.3: s_getpc_b64 s[0:1] s_add_u32 s0, s0, dtz1@rel32@lo+4 s_addc_u32 s1, s1, dtz1@rel32@hi+12 s_getpc_b64 s[2:3] s_add_u32 s2, s2, c2dttz1@rel32@lo+4 s_addc_u32 s3, s3, c2dttz1@rel32@hi+12 s_load_b64 s[0:1], s[0:1], 0x0 s_getpc_b64 s[4:5] s_add_u32 s4, s4, dttz2@rel32@lo+4 s_addc_u32 s5, s5, dttz2@rel32@hi+12 s_load_b64 s[36:37], s[2:3], 0x0 s_load_b64 s[34:35], s[4:5], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, comz5@rel32@lo+4 s_addc_u32 s3, s3, comz5@rel32@hi+12 s_getpc_b64 s[4:5] s_add_u32 s4, s4, comz4@rel32@lo+4 s_addc_u32 s5, s5, comz4@rel32@hi+12 s_getpc_b64 s[42:43] s_add_u32 s42, s42, comz1@rel32@lo+4 s_addc_u32 s43, s43, comz1@rel32@hi+12 s_load_b64 s[38:39], s[2:3], 0x0 s_load_b64 s[40:41], s[4:5], 0x0 s_load_b64 s[2:3], s[42:43], 0x0 v_add_nc_u32_e64 v48, 16, 40 s_mul_i32 s55, s58, s33 s_waitcnt lgkmcnt(0) v_mul_f64 v[2:3], v[14:15], s[0:1] v_mul_f64 v[4:5], v[4:5], s[0:1] v_fma_f64 v[16:17], v[12:13], s[36:37], 1.0 v_add_f64 v[24:25], s[2:3], 0 s_add_i32 s2, s27, 1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4) s_mul_i32 s2, s7, s2 v_fma_f64 v[18:19], v[8:9], s[34:35], -v[2:3] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[3:4], v[0:1], -s[34:35], -v[4:5] v_add_f64 v[16:17], v[16:17], s[38:39] v_add3_u32 v0, s54, s2, v46 v_mov_b32_e32 v1, 0 s_mov_b32 s2, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v0, v0, s33 v_mov_b32_e32 v2, v1 s_delay_alu instid0(VALU_DEP_2) v_add3_u32 v0, v45, v0, s6 v_add_f64 v[18:19], v[18:19], -s[40:41] s_clause 0x2 scratch_store_b128 off, v[1:4], off offset:56 scratch_store_b128 off, v[16:19], off offset:72 scratch_store_b64 off, v[24:25], off offset:88 .LBB10_4: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v1, s2, v48 s_add_i32 s2, s2, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) s_cmp_lg_u32 s2, 40 scratch_load_b64 v[2:3], v1, off v_ashrrev_i32_e32 v1, 31, v0 v_lshlrev_b64 v[4:5], 3, v[0:1] v_add_nc_u32_e32 v0, s55, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, s28, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s29, v5, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[4:5], v[2:3], off s_cbranch_scc1 .LBB10_4 ; %bb.5: v_mad_u64_u32 v[42:43], null, v11, 5, 5 s_mul_i32 s4, s52, 5 s_add_i32 s53, 0x110, 40 s_ashr_i32 s5, s4, 31 s_mov_b32 s42, 0 s_lshl_b64 s[2:3], s[4:5], 3 s_mov_b32 s5, s53 .LBB10_6: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v0, s42, v42 s_add_i32 s42, s42, 1 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, s22, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo v_add_co_u32 v2, vcc_lo, v0, s2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo s_clause 0x1 global_load_b64 v[0:1], v[0:1], off global_load_b64 v[2:3], v[2:3], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[0:1], s5 offset:-40 s_waitcnt vmcnt(0) scratch_store_b64 off, v[2:3], s5 s_add_i32 s5, s5, 8 s_cmp_eq_u32 s42, 3 s_cbranch_scc0 .LBB10_6 ; %bb.7: ; %.preheader794 v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v16, 0 v_dual_mov_b32 v17, 0x3ff00000 :: v_dual_mov_b32 v18, 0 v_dual_mov_b32 v10, v8 :: v_dual_add_nc_u32 v49, v10, v38 s_add_i32 s56, s26, -2 v_mov_b32_e32 v19, 0 v_mul_u32_u24_e32 v47, 5, v45 s_cmp_gt_i32 s26, 2 s_mul_i32 s59, s26, s25 s_cselect_b32 s60, -1, 0 s_cmp_lt_i32 s26, 3 s_mul_i32 s57, s7, s33 s_mul_i32 s5, s59, s24 s_cbranch_scc1 .LBB10_47 ; %bb.8: ; %.lr.ph v_lshl_add_u32 v2, s25, 1, v40 s_add_i32 s44, s27, 2 s_getpc_b64 s[42:43] s_add_u32 s42, s42, comz6@rel32@lo+4 s_addc_u32 s43, s43, comz6@rel32@hi+12 s_mul_i32 s44, s7, s44 s_load_b64 s[42:43], s[42:43], 0x0 v_mad_u64_u32 v[0:1], null, s24, v2, s[24:25] v_add3_u32 v1, s54, s44, v46 s_mul_i32 s44, s6, 5 v_dual_mov_b32 v3, 16 :: v_dual_mov_b32 v54, 0x3ff00000 s_mov_b32 s46, 0x55555555 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_lo_u32 v4, v1, s33 v_mad_u64_u32 v[1:2], null, v0, 5, s[44:45] v_mov_b32_e32 v0, 0x110 v_dual_mov_b32 v55, v49 :: v_dual_add_nc_u32 v50, 0x50, v3 v_mov_b32_e32 v26, 0 s_mov_b32 s44, 0x9999999a s_delay_alu instid0(VALU_DEP_3) v_add_nc_u32_e32 v51, 0x50, v0 v_add3_u32 v52, v45, v4, s6 v_add3_u32 v53, v1, v47, 5 s_mov_b32 s48, 0xf5c28f5b s_add_i32 s61, s26, -3 s_mov_b32 s45, 0x3fb99999 s_mov_b32 s47, 0x3ff55555 s_mov_b32 s49, 0x3fff5c28 s_add_i32 s62, s26, -5 s_mov_b32 s50, 0 s_mov_b32 s63, 0 .LBB10_9: ; =>This Loop Header: Depth=1 ; Child Loop BB10_29 Depth 2 ; Child Loop BB10_34 Depth 2 ; Child Loop BB10_36 Depth 2 ; Child Loop BB10_38 Depth 2 ; Child Loop BB10_40 Depth 2 ; Child Loop BB10_42 Depth 2 ; Child Loop BB10_44 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) s_add_i32 s51, s63, 2 s_cmp_lg_u32 s63, s61 s_cbranch_scc0 .LBB10_16 ; %bb.10: ; in Loop: Header=BB10_9 Depth=1 s_add_i32 s64, s63, 3 v_fma_f64 v[34:35], s[36:37], v[14:15], 1.0 v_mad_u64_u32 v[0:1], null, s64, s25, v[39:40] s_cmp_lg_u32 s63, 0 v_mov_b32_e32 v27, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, v0, s24, v[38:39] v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[1:2] v_add_co_u32 v2, vcc_lo, s8, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s14, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo global_load_b64 v[4:5], v[2:3], off global_load_b64 v[2:3], v[0:1], off s_waitcnt vmcnt(1) v_mul_f64 v[0:1], v[4:5], s[44:45] v_fma_f64 v[4:5], v[4:5], s[44:45], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[18:19], v[0:1], s[46:47], 1.0 v_fma_f64 v[0:1], v[0:1], s[48:49], 1.0 v_cmp_gt_f64_e32 vcc_lo, v[18:19], v[0:1] v_dual_cndmask_b32 v1, v1, v19 :: v_dual_cndmask_b32 v0, v0, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_lt_f64_e32 vcc_lo, v[0:1], v[4:5] v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v0, v0, v4 v_mul_f64 v[4:5], s[0:1], v[12:13] v_cmp_ngt_f64_e32 vcc_lo, 1.0, v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_fma_f64 v[28:29], v[6:7], -s[34:35], -v[4:5] v_cndmask_b32_e32 v21, 0x3ff00000, v1, vcc_lo v_cndmask_b32_e32 v20, 0, v0, vcc_lo v_mul_f64 v[0:1], s[0:1], v[20:21] scratch_store_b128 off, v[26:29], off offset:96 s_waitcnt vmcnt(0) v_fma_f64 v[36:37], s[34:35], v[2:3], -v[0:1] s_clause 0x1 scratch_store_b128 off, v[34:37], off offset:112 scratch_store_b64 off, v[26:27], off offset:128 s_cbranch_scc0 .LBB10_17 ; %bb.11: ; in Loop: Header=BB10_9 Depth=1 s_cmp_ge_i32 s51, s61 s_cbranch_scc0 .LBB10_18 ; %bb.12: ; in Loop: Header=BB10_9 Depth=1 s_cmp_lg_u32 s63, s62 s_cbranch_scc0 .LBB10_19 ; %bb.13: ; in Loop: Header=BB10_9 Depth=1 v_mov_b32_e32 v43, 0 v_dual_mov_b32 v44, 0 :: v_dual_mov_b32 v31, v29 v_mov_b32_e32 v30, v28 v_dual_mov_b32 v32, v34 :: v_dual_mov_b32 v33, v35 s_cmp_lg_u32 s51, s56 s_cbranch_scc1 .LBB10_15 ; %bb.14: ; in Loop: Header=BB10_9 Depth=1 v_add_f64 v[58:59], v[28:29], -s[40:41] v_add_f64 v[32:33], s[38:39], v[34:35] v_dual_mov_b32 v56, v24 :: v_dual_mov_b32 v57, v25 v_dual_mov_b32 v44, v25 :: v_dual_mov_b32 v43, v24 s_clause 0x1 scratch_store_b128 off, v[56:59], off offset:96 scratch_store_b64 off, v[32:33], off offset:112 v_dual_mov_b32 v30, v58 :: v_dual_mov_b32 v31, v59 .LBB10_15: ; %Flow1202 ; in Loop: Header=BB10_9 Depth=1 s_mov_b32 s64, 0 s_branch .LBB10_20 .LBB10_16: ; in Loop: Header=BB10_9 Depth=1 s_mov_b32 s64, -1 ; implicit-def: $vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23 ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 ; implicit-def: $vgpr43_vgpr44 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB10_31 .LBB10_17: ; in Loop: Header=BB10_9 Depth=1 s_mov_b32 s64, -1 ; implicit-def: $vgpr43_vgpr44 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB10_26 .LBB10_18: ; in Loop: Header=BB10_9 Depth=1 s_mov_b32 s64, -1 ; implicit-def: $vgpr43_vgpr44 ; implicit-def: $vgpr30_vgpr31 s_branch .LBB10_23 .LBB10_19: ; in Loop: Header=BB10_9 Depth=1 s_mov_b32 s64, -1 ; implicit-def: $vgpr43_vgpr44 ; implicit-def: $vgpr30_vgpr31 .LBB10_20: ; %Flow1203 ; in Loop: Header=BB10_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s64 s_cbranch_vccnz .LBB10_22 ; %bb.21: ; in Loop: Header=BB10_9 Depth=1 v_add_f64 v[58:59], v[28:29], -s[40:41] s_waitcnt lgkmcnt(0) v_add_f64 v[60:61], v[34:35], s[42:43] v_add_f64 v[62:63], v[36:37], -s[40:41] v_dual_mov_b32 v56, v24 :: v_dual_mov_b32 v57, v25 v_dual_mov_b32 v44, v25 :: v_dual_mov_b32 v43, v24 s_clause 0x1 scratch_store_b128 off, v[56:59], off offset:96 scratch_store_b128 off, v[60:63], off offset:112 v_dual_mov_b32 v30, v58 :: v_dual_mov_b32 v31, v59 v_dual_mov_b32 v32, v60 :: v_dual_mov_b32 v33, v61 .LBB10_22: ; %Flow1204 ; in Loop: Header=BB10_9 Depth=1 s_mov_b32 s64, 0 .LBB10_23: ; %Flow1205 ; in Loop: Header=BB10_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s64 s_cbranch_vccnz .LBB10_25 ; %bb.24: ; in Loop: Header=BB10_9 Depth=1 v_add_f64 v[58:59], v[28:29], -s[40:41] s_waitcnt lgkmcnt(0) v_add_f64 v[60:61], v[34:35], s[42:43] v_add_f64 v[62:63], v[36:37], -s[40:41] v_dual_mov_b32 v56, v24 :: v_dual_mov_b32 v57, v25 v_dual_mov_b32 v44, v25 :: v_dual_mov_b32 v43, v24 s_clause 0x2 scratch_store_b128 off, v[56:59], off offset:96 scratch_store_b128 off, v[60:63], off offset:112 scratch_store_b64 off, v[24:25], off offset:128 v_dual_mov_b32 v30, v58 :: v_dual_mov_b32 v31, v59 v_dual_mov_b32 v32, v60 :: v_dual_mov_b32 v33, v61 .LBB10_25: ; %Flow1206 ; in Loop: Header=BB10_9 Depth=1 s_mov_b32 s64, 0 .LBB10_26: ; %Flow1207 ; in Loop: Header=BB10_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s64 s_cbranch_vccnz .LBB10_28 ; %bb.27: ; in Loop: Header=BB10_9 Depth=1 v_add_f64 v[30:31], v[28:29], -s[40:41] s_waitcnt lgkmcnt(0) v_add_f64 v[32:33], v[34:35], s[42:43] v_add_f64 v[22:23], v[36:37], -s[40:41] v_mov_b32_e32 v43, 0 v_mov_b32_e32 v44, 0 s_clause 0x1 scratch_store_b128 off, v[30:33], off offset:104 scratch_store_b128 off, v[22:25], off offset:120 .LBB10_28: ; in Loop: Header=BB10_9 Depth=1 v_mov_b32_e32 v0, v52 s_mov_b32 s64, 0 .LBB10_29: ; Parent Loop BB10_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_nc_u32_e32 v1, s64, v50 s_add_i32 s64, s64, 8 s_cmp_lg_u32 s64, 40 scratch_load_b64 v[4:5], v1, off v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[18:19], 3, v[0:1] v_add_nc_u32_e32 v0, s55, v0 v_add_co_u32 v18, vcc_lo, s28, v18 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v19, vcc_lo, s29, v19, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[18:19], v[4:5], off s_cbranch_scc1 .LBB10_29 ; %bb.30: ; in Loop: Header=BB10_9 Depth=1 v_dual_mov_b32 v18, v14 :: v_dual_mov_b32 v19, v15 v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9 v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v5, v3 s_mov_b32 s64, 0 .LBB10_31: ; %Flow1208 ; in Loop: Header=BB10_9 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s64 s_cbranch_vccz .LBB10_33 ; %bb.32: ; in Loop: Header=BB10_9 Depth=1 s_add_i32 s64, s51, s27 s_mov_b32 s51, s50 v_mad_u64_u32 v[0:1], null, s64, s7, v[40:41] v_dual_mov_b32 v27, v26 :: v_dual_mov_b32 v34, s50 v_dual_mov_b32 v28, v26 :: v_dual_mov_b32 v35, s51 s_add_i32 s51, s64, s26 v_dual_mov_b32 v29, v26 :: v_dual_mov_b32 v30, 0 s_delay_alu instid0(VALU_DEP_4) v_mad_u64_u32 v[1:2], null, v0, s33, v[41:42] v_mad_u64_u32 v[3:4], null, s51, s7, v[40:41] s_add_i32 s51, s51, s26 s_clause 0x1 scratch_store_b128 off, v[26:29], off offset:96 scratch_store_b64 off, v[34:35], off offset:128 v_mad_u64_u32 v[4:5], null, s51, s7, v[40:41] v_ashrrev_i32_e32 v2, 31, v1 s_add_i32 s51, s51, s26 v_mad_u64_u32 v[18:19], null, v3, s33, v[41:42] v_dual_mov_b32 v27, v54 :: v_dual_mov_b32 v32, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_lshlrev_b64 v[0:1], 3, v[1:2] v_mad_u64_u32 v[2:3], null, s51, s7, v[40:41] s_add_i32 s51, s51, s26 v_mad_u64_u32 v[20:21], null, v4, s33, v[41:42] v_mad_u64_u32 v[3:4], null, s51, s7, v[40:41] v_add_co_u32 v0, vcc_lo, s28, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s29, v1, vcc_lo v_ashrrev_i32_e32 v19, 31, v18 v_mad_u64_u32 v[4:5], null, v2, s33, v[41:42] v_ashrrev_i32_e32 v21, 31, v20 global_store_b64 v[0:1], v[34:35], off v_lshlrev_b64 v[0:1], 3, v[18:19] v_mad_u64_u32 v[18:19], null, v3, s33, v[41:42] v_lshlrev_b64 v[2:3], 3, v[20:21] v_ashrrev_i32_e32 v5, 31, v4 scratch_store_b128 off, v[26:29], off offset:112 v_add_co_u32 v28, vcc_lo, s28, v0 v_add_co_ci_u32_e32 v29, vcc_lo, s29, v1, vcc_lo v_ashrrev_i32_e32 v19, 31, v18 v_lshlrev_b64 v[0:1], 3, v[4:5] v_add_co_u32 v36, vcc_lo, s28, v2 v_add_co_ci_u32_e32 v37, vcc_lo, s29, v3, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_lshlrev_b64 v[2:3], 3, v[18:19] v_add_co_u32 v56, vcc_lo, s28, v0 v_mov_b32_e32 v31, 0 v_add_co_ci_u32_e32 v57, vcc_lo, s29, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v58, vcc_lo, s28, v2 v_add_co_ci_u32_e32 v59, vcc_lo, s29, v3, vcc_lo v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v33, 0x3ff00000 v_dual_mov_b32 v44, v31 :: v_dual_mov_b32 v23, v17 v_dual_mov_b32 v18, v12 :: v_dual_mov_b32 v43, v30 v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v1, v7 v_dual_mov_b32 v4, v10 :: v_dual_mov_b32 v3, v9 v_dual_mov_b32 v22, v16 :: v_dual_mov_b32 v5, v11 v_dual_mov_b32 v20, v14 :: v_dual_mov_b32 v21, v15 v_mov_b32_e32 v19, v13 s_clause 0x3 global_store_b64 v[28:29], v[34:35], off global_store_b64 v[36:37], v[26:27], off global_store_b64 v[56:57], v[34:35], off global_store_b64 v[58:59], v[34:35], off .LBB10_33: ; in Loop: Header=BB10_9 Depth=1 v_mov_b32_e32 v6, v51 s_mov_b32 s51, 0 .LBB10_34: ; Parent Loop BB10_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_nc_u32_e32 v7, s51, v53 s_add_i32 s51, s51, 1 s_cmp_lg_u32 s51, 3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v8, 31, v7 v_lshlrev_b64 v[7:8], 3, v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, s22, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s23, v8, vcc_lo global_load_b64 v[7:8], v[7:8], off s_waitcnt vmcnt(0) scratch_store_b64 v6, v[7:8], off v_add_nc_u32_e32 v6, 8, v6 s_cbranch_scc1 .LBB10_34 ; %bb.35: ; in Loop: Header=BB10_9 Depth=1 s_clause 0x1 scratch_load_b128 v[6:9], off, off offset:32 scratch_load_b64 v[12:13], off, off offset:48 s_mov_b32 s51, 0 s_waitcnt vmcnt(1) v_div_scale_f64 v[10:11], null, v[6:7], v[6:7], 1.0 v_div_scale_f64 v[27:28], vcc_lo, 1.0, v[6:7], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[14:15], v[10:11] s_waitcnt_depctr 0xfff v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[16:17], v[27:28], v[14:15] v_fma_f64 v[10:11], -v[10:11], v[16:17], v[27:28] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[10:11], v[10:11], v[14:15], v[16:17] v_div_fixup_f64 v[10:11], v[10:11], v[6:7], 1.0 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[6:7], v[8:9], v[10:11] s_waitcnt vmcnt(0) v_mul_f64 v[8:9], v[10:11], v[12:13] scratch_store_b128 off, v[6:9], off offset:40 .LBB10_36: ; Parent Loop BB10_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_add_i32 s64, s51, 0x110 s_add_i32 s51, s51, 8 scratch_load_b64 v[12:13], off, s64 s_cmp_lg_u32 s51, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s64 s_cbranch_scc1 .LBB10_36 ; %bb.37: ; in Loop: Header=BB10_9 Depth=1 s_clause 0x1 scratch_load_b128 v[10:13], off, off offset:64 scratch_load_b64 v[14:15], off, off offset:80 s_mov_b32 s51, 0 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], -v[6:7], v[10:11], v[12:13] s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[8:9], v[10:11], v[14:15] scratch_store_b128 off, v[12:15], off offset:72 .LBB10_38: ; Parent Loop BB10_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v12, 0x110, s51 s_add_i32 s64, s51, 0x110 s_add_i32 s51, s51, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s51, 24 v_add_nc_u32_e32 v16, 40, v12 s_clause 0x1 scratch_load_b64 v[12:13], off, s64 scratch_load_b64 v[14:15], v16, off s_waitcnt vmcnt(0) v_fma_f64 v[12:13], -v[10:11], v[12:13], v[14:15] scratch_store_b64 v16, v[12:13], off s_cbranch_scc1 .LBB10_38 ; %bb.39: ; in Loop: Header=BB10_9 Depth=1 v_fma_f64 v[10:11], -v[6:7], v[43:44], v[30:31] v_fma_f64 v[12:13], -v[8:9], v[43:44], v[32:33] s_mov_b32 s51, 0 scratch_store_b128 off, v[10:13], off offset:104 .LBB10_40: ; Parent Loop BB10_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v10, 0x110, s51 s_add_i32 s64, s51, 0x110 s_add_i32 s51, s51, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s51, 24 v_add_nc_u32_e32 v14, 0x50, v10 s_clause 0x1 scratch_load_b64 v[10:11], off, s64 scratch_load_b64 v[12:13], v14, off s_waitcnt vmcnt(0) v_fma_f64 v[10:11], -v[43:44], v[10:11], v[12:13] scratch_store_b64 v14, v[10:11], off s_cbranch_scc1 .LBB10_40 ; %bb.41: ; in Loop: Header=BB10_9 Depth=1 v_mad_u64_u32 v[10:11], null, s63, s7, v[40:41] s_add_i32 s51, s63, s26 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[11:12], null, s51, s7, v[40:41] s_mov_b32 s51, 0 v_mad_u64_u32 v[12:13], null, v10, s33, v[41:42] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[14:15], null, v11, s33, v[41:42] v_ashrrev_i32_e32 v13, 31, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v15, 31, v14 v_lshlrev_b64 v[10:11], 3, v[12:13] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[12:13], 3, v[14:15] v_add_co_u32 v10, vcc_lo, s28, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v11, vcc_lo, s29, v11, vcc_lo v_add_co_u32 v12, vcc_lo, s28, v12 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v13, vcc_lo, s29, v13, vcc_lo s_clause 0x1 global_store_b64 v[10:11], v[6:7], off global_store_b64 v[12:13], v[8:9], off .LBB10_42: ; Parent Loop BB10_9 Depth=1 ; => This Inner Loop Header: Depth=2 v_add_nc_u32_e64 v6, s51, 16 s_add_i32 s64, s51, 16 s_add_i32 s51, s51, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s51, 40 v_add_nc_u32_e32 v10, 40, v6 v_add_nc_u32_e32 v8, 0x50, v6 s_clause 0x1 scratch_load_b64 v[6:7], v10, off scratch_load_b64 v[8:9], v8, off s_waitcnt vmcnt(1) scratch_store_b64 off, v[6:7], s64 s_waitcnt vmcnt(0) scratch_store_b64 v10, v[8:9], off s_cbranch_scc1 .LBB10_42 ; %bb.43: ; %.preheader793.preheader ; in Loop: Header=BB10_9 Depth=1 v_mov_b32_e32 v6, v55 s_mov_b32 s51, 0 .LBB10_44: ; %.preheader793 ; Parent Loop BB10_9 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_add_nc_u32_e64 v7, 0x110, s51 s_add_i32 s64, s51, 0x110 s_add_i32 s51, s51, 8 s_cmp_lg_u32 s51, 24 s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v16, 40, v7 v_add_nc_u32_e32 v7, 0x50, v7 s_clause 0x2 scratch_load_b64 v[8:9], off, s64 scratch_load_b64 v[10:11], v16, off scratch_load_b64 v[12:13], v7, off v_ashrrev_i32_e32 v7, 31, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[14:15], 3, v[6:7] v_add_nc_u32_e32 v6, s5, v6 v_add_co_u32 v14, vcc_lo, s30, v14 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v15, vcc_lo, s31, v15, vcc_lo s_waitcnt vmcnt(2) global_store_b64 v[14:15], v[8:9], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[10:11], s64 s_waitcnt vmcnt(0) scratch_store_b64 v16, v[12:13], off s_cbranch_scc1 .LBB10_44 ; %bb.45: ; in Loop: Header=BB10_9 Depth=1 v_add_nc_u32_e32 v52, s57, v52 v_add_nc_u32_e32 v53, s4, v53 v_add_nc_u32_e32 v55, s52, v55 s_add_i32 s63, s63, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s63, s56 s_cbranch_scc0 .LBB10_48 ; %bb.46: ; in Loop: Header=BB10_9 Depth=1 v_dual_mov_b32 v12, v18 :: v_dual_mov_b32 v13, v19 v_dual_mov_b32 v11, v5 :: v_dual_mov_b32 v10, v4 v_dual_mov_b32 v14, v20 :: v_dual_mov_b32 v15, v21 v_dual_mov_b32 v16, v22 :: v_dual_mov_b32 v17, v23 v_dual_mov_b32 v9, v3 :: v_dual_mov_b32 v8, v2 v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0 s_branch .LBB10_9 .LBB10_47: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7 v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9 v_dual_mov_b32 v4, v10 :: v_dual_mov_b32 v5, v11 v_dual_mov_b32 v8, v18 :: v_dual_mov_b32 v9, v19 s_branch .LBB10_49 .LBB10_48: ; %._crit_edge.loopexit s_clause 0x1 scratch_load_b128 v[16:19], off, off offset:32 scratch_load_b64 v[8:9], off, off offset:48 .LBB10_49: ; %._crit_edge s_waitcnt vmcnt(1) v_div_scale_f64 v[6:7], null, v[16:17], v[16:17], 1.0 v_div_scale_f64 v[14:15], vcc_lo, 1.0, v[16:17], 1.0 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[10:11], v[6:7] s_waitcnt_depctr 0xfff v_fma_f64 v[12:13], -v[6:7], v[10:11], 1.0 v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[12:13], -v[6:7], v[10:11], 1.0 v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[12:13], v[14:15], v[10:11] v_fma_f64 v[6:7], -v[6:7], v[12:13], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[6:7], v[6:7], v[10:11], v[12:13] v_div_fixup_f64 v[10:11], v[6:7], v[16:17], 1.0 s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[6:7], v[18:19], v[10:11] s_waitcnt vmcnt(0) v_mul_f64 v[8:9], v[10:11], v[8:9] scratch_store_b128 off, v[6:9], off offset:40 .LBB10_50: ; =>This Inner Loop Header: Depth=1 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 scratch_load_b64 v[12:13], off, s1 s_cmp_lg_u32 s0, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s1 s_cbranch_scc1 .LBB10_50 ; %bb.51: s_clause 0x1 scratch_load_b128 v[10:13], off, off offset:64 scratch_load_b64 v[14:15], off, off offset:80 s_mov_b32 s0, 0 s_waitcnt vmcnt(1) v_fma_f64 v[12:13], -v[6:7], v[10:11], v[12:13] s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[8:9], v[10:11], v[14:15] scratch_store_b128 off, v[12:15], off offset:72 .LBB10_52: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v14, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 24 v_add_nc_u32_e32 v18, 40, v14 s_clause 0x1 scratch_load_b64 v[14:15], off, s1 scratch_load_b64 v[16:17], v18, off s_waitcnt vmcnt(0) v_fma_f64 v[14:15], -v[10:11], v[14:15], v[16:17] scratch_store_b64 v18, v[14:15], off s_cbranch_scc1 .LBB10_52 ; %bb.53: v_div_scale_f64 v[10:11], null, v[12:13], v[12:13], 1.0 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[14:15], v[10:11] s_waitcnt_depctr 0xfff v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], -v[10:11], v[14:15], 1.0 v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15] v_div_scale_f64 v[16:17], vcc_lo, 1.0, v[12:13], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[18:19], v[16:17], v[14:15] v_fma_f64 v[10:11], -v[10:11], v[18:19], v[16:17] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[10:11], v[10:11], v[14:15], v[18:19] v_div_fixup_f64 v[10:11], v[10:11], v[12:13], 1.0 .LBB10_54: ; =>This Inner Loop Header: Depth=1 s_add_i32 s1, s53, s0 s_add_i32 s0, s0, 8 scratch_load_b64 v[12:13], off, s1 s_cmp_lg_u32 s0, 24 s_waitcnt vmcnt(0) v_mul_f64 v[12:13], v[10:11], v[12:13] scratch_store_b64 off, v[12:13], s1 s_cbranch_scc1 .LBB10_54 ; %bb.55: v_mad_u64_u32 v[10:11], null, s56, s7, v[40:41] s_add_i32 s0, s56, s26 s_mov_b64 s[8:9], 0 v_mad_u64_u32 v[11:12], null, s0, s7, v[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[12:13], null, v10, s33, v[41:42] v_mad_u64_u32 v[14:15], null, v11, s33, v[41:42] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v13, 31, v12 v_ashrrev_i32_e32 v15, 31, v14 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[10:11], 3, v[12:13] v_lshlrev_b64 v[12:13], 3, v[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v21, vcc_lo, s28, v10 v_add_co_ci_u32_e32 v22, vcc_lo, s29, v11, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v11, vcc_lo, s28, v12 v_add_co_ci_u32_e32 v12, vcc_lo, s29, v13, vcc_lo v_mov_b32_e32 v10, v49 s_clause 0x1 global_store_b64 v[21:22], v[6:7], off global_store_b64 v[11:12], v[8:9], off .LBB10_56: ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v11, 31, v10 s_cmp_eq_u32 s8, 2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[6:7], 3, v[10:11] v_add_co_u32 v6, vcc_lo, s16, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, s17, v7, vcc_lo s_cselect_b32 vcc_lo, -1, 0 s_cmp_eq_u32 s8, 1 s_cselect_b32 s0, -1, 0 global_load_b64 v[6:7], v[6:7], off s_cmp_eq_u32 s8, 0 v_add_nc_u32_e32 v10, s52, v10 s_cselect_b32 s1, -1, 0 s_add_u32 s8, s8, 1 s_addc_u32 s9, s9, 0 s_cmp_lg_u32 s8, 3 s_waitcnt vmcnt(0) v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v4, v4, v6 v_cndmask_b32_e64 v3, v3, v7, s0 v_cndmask_b32_e64 v2, v2, v6, s0 v_cndmask_b32_e64 v1, v1, v7, s1 v_cndmask_b32_e64 v0, v0, v6, s1 s_cbranch_scc1 .LBB10_56 ; %bb.57: ; %.preheader792.preheader s_lshl_b32 s0, s58, 2 v_add_nc_u32_e64 v8, 0x90, 40 s_add_i32 s0, s54, s0 v_mov_b32_e32 v9, v41 s_add_i32 s1, s0, s25 v_add_nc_u32_e32 v7, s0, v46 v_add3_u32 v6, s1, v46, -2 s_mov_b32 s0, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v7, v7, s33 v_mul_lo_u32 v6, v6, s33 .LBB10_58: ; %.preheader792 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v10, v7, v9 v_add_nc_u32_e32 v12, v6, v9 v_add_nc_u32_e32 v14, s0, v48 v_add_nc_u32_e32 v9, s55, v9 v_add_nc_u32_e32 v15, s0, v8 v_ashrrev_i32_e32 v11, 31, v10 v_ashrrev_i32_e32 v13, 31, v12 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_cmp_lg_u32 s0, 40 v_lshlrev_b64 v[10:11], 3, v[10:11] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[12:13], 3, v[12:13] v_add_co_u32 v10, vcc_lo, s28, v10 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v11, vcc_lo, s29, v11, vcc_lo v_add_co_u32 v12, vcc_lo, s28, v12 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v13, vcc_lo, s29, v13, vcc_lo s_clause 0x1 global_load_b64 v[10:11], v[10:11], off global_load_b64 v[12:13], v[12:13], off s_waitcnt vmcnt(1) scratch_store_b64 v14, v[10:11], off offset:-40 s_waitcnt vmcnt(0) scratch_store_b64 v14, v[12:13], off s_clause 0x1 scratch_store_b64 v15, v[10:11], off offset:-40 scratch_store_b64 v15, v[12:13], off s_cbranch_scc1 .LBB10_58 ; %bb.59: s_clause 0x3 scratch_load_b64 v[23:24], off, off offset:192 scratch_load_b64 v[28:29], off, off offset:208 scratch_load_b64 v[30:31], off, off offset:64 scratch_load_b64 v[32:33], off, off offset:80 v_lshl_add_u32 v14, v49, 2, v49 v_cndmask_b32_e64 v25, 0, 1, s60 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v26, 3, v14 v_add_nc_u32_e32 v27, 4, v14 v_ashrrev_i32_e32 v15, 31, v14 v_add_nc_u32_e32 v6, s4, v26 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_nc_u32_e32 v8, s4, v27 v_lshlrev_b64 v[10:11], 3, v[14:15] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v7, 31, v6 v_ashrrev_i32_e32 v9, 31, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v19, vcc_lo, s22, v10 v_lshlrev_b64 v[6:7], 3, v[6:7] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_lshlrev_b64 v[8:9], 3, v[8:9] v_add_co_ci_u32_e32 v20, vcc_lo, s23, v11, vcc_lo v_add_co_u32 v15, vcc_lo, s22, v6 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_ci_u32_e32 v16, vcc_lo, s23, v7, vcc_lo v_add_co_u32 v17, vcc_lo, s22, v8 v_add_co_ci_u32_e32 v18, vcc_lo, s23, v9, vcc_lo s_clause 0x2 global_load_b128 v[10:13], v[19:20], off offset:24 global_load_b64 v[6:7], v[15:16], off global_load_b64 v[8:9], v[17:18], off s_and_not1_b32 vcc_lo, exec_lo, s60 s_waitcnt vmcnt(6) v_fma_f64 v[23:24], -s[34:35], v[0:1], v[23:24] s_waitcnt vmcnt(5) v_fma_f64 v[28:29], s[34:35], v[4:5], v[28:29] s_waitcnt vmcnt(4) v_fma_f64 v[0:1], s[34:35], v[0:1], v[30:31] s_waitcnt vmcnt(3) v_fma_f64 v[30:31], -s[34:35], v[4:5], v[32:33] s_clause 0x3 scratch_store_b64 off, v[23:24], off offset:192 scratch_store_b64 off, v[28:29], off offset:208 scratch_store_b64 off, v[0:1], off offset:64 scratch_store_b64 off, v[30:31], off offset:80 s_waitcnt vmcnt(2) scratch_store_b128 off, v[10:13], off offset:296 s_waitcnt vmcnt(0) scratch_store_b128 off, v[6:9], off offset:336 s_cbranch_vccnz .LBB10_71 ; %bb.60: ; %.preheader791.lr.ph s_mul_i32 s59, s59, 3 s_add_i32 s0, s27, 2 v_add3_u32 v0, s54, s59, v46 s_mul_i32 s0, s7, s0 s_lshl_b32 s1, s58, 1 v_add3_u32 v1, s54, s0, v46 s_mul_i32 s58, s58, 7 v_mul_lo_u32 v0, s24, v0 v_add3_u32 v6, s54, s1, v46 v_add3_u32 v9, s54, s58, v46 v_mul_lo_u32 v8, v1, s33 s_movk_i32 s0, 0x50 s_add_i32 s1, s26, -1 v_add_nc_u32_e64 v13, 0x90, s0 v_add_nc_u32_e64 v28, s0, 16 v_add3_u32 v10, v0, s24, v45 v_mad_u64_u32 v[0:1], null, v6, s33, s[6:7] v_mad_u64_u32 v[6:7], null, v9, s33, s[6:7] v_add3_u32 v1, v45, v8, s6 s_delay_alu instid0(VALU_DEP_4) v_add3_u32 v29, v10, s6, 1 s_mov_b32 s8, 0 .LBB10_61: ; %.preheader791 ; =>This Loop Header: Depth=1 ; Child Loop BB10_62 Depth 2 ; Child Loop BB10_66 Depth 2 ; Child Loop BB10_68 Depth 2 s_delay_alu instid0(VALU_DEP_2) v_mov_b32_e32 v7, v1 s_mov_b32 s0, 0 .LBB10_62: ; Parent Loop BB10_61 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_ashrrev_i32_e32 v8, 31, v7 v_add_nc_u32_e32 v10, s0, v28 v_add_nc_u32_e32 v11, s0, v13 s_add_i32 s0, s0, 8 s_cmp_lg_u32 s0, 40 v_lshlrev_b64 v[8:9], 3, v[7:8] v_add_nc_u32_e32 v7, s55, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, s28, v8 v_add_co_ci_u32_e32 v9, vcc_lo, s29, v9, vcc_lo global_load_b64 v[8:9], v[8:9], off s_waitcnt vmcnt(0) scratch_store_b64 v10, v[8:9], off scratch_store_b64 v11, v[8:9], off s_cbranch_scc1 .LBB10_62 ; %bb.63: ; in Loop: Header=BB10_61 Depth=1 s_add_i32 s0, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) s_mul_i32 s9, s4, s0 s_cmp_ge_i32 s0, s1 v_add_nc_u32_e32 v7, s9, v26 v_add_nc_u32_e32 v9, s9, v27 v_ashrrev_i32_e32 v8, 31, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v10, 31, v9 v_lshlrev_b64 v[7:8], 3, v[7:8] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[9:10], 3, v[9:10] v_add_co_u32 v7, vcc_lo, s22, v7 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v8, vcc_lo, s23, v8, vcc_lo v_add_co_u32 v9, vcc_lo, s22, v9 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v10, vcc_lo, s23, v10, vcc_lo scratch_load_b64 v[23:24], off, off offset:232 s_clause 0x1 global_load_b64 v[11:12], v[7:8], off global_load_b64 v[7:8], v[9:10], off scratch_load_b64 v[9:10], off, off offset:104 s_cbranch_scc1 .LBB10_65 ; %bb.64: ; in Loop: Header=BB10_61 Depth=1 s_add_i32 s0, s8, 3 s_waitcnt vmcnt(3) v_fma_f64 v[23:24], -s[34:35], v[2:3], v[23:24] v_mad_u64_u32 v[30:31], null, s0, s25, v[39:40] s_waitcnt vmcnt(0) v_fma_f64 v[9:10], s[34:35], v[2:3], v[9:10] v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[31:32], null, v30, s24, v[38:39] v_ashrrev_i32_e32 v32, 31, v31 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[30:31], 3, v[31:32] v_add_co_u32 v30, vcc_lo, s16, v30 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v31, vcc_lo, s17, v31, vcc_lo scratch_load_b64 v[32:33], off, off offset:248 global_load_b64 v[30:31], v[30:31], off scratch_load_b64 v[34:35], off, off offset:120 s_waitcnt vmcnt(1) v_fma_f64 v[32:33], s[34:35], v[30:31], v[32:33] s_waitcnt vmcnt(0) v_fma_f64 v[34:35], -s[34:35], v[30:31], v[34:35] v_dual_mov_b32 v4, v30 :: v_dual_mov_b32 v5, v31 s_clause 0x1 scratch_store_b64 off, v[32:33], off offset:248 scratch_store_b64 off, v[34:35], off offset:120 .LBB10_65: ; in Loop: Header=BB10_61 Depth=1 s_clause 0xd scratch_load_b128 v[30:33], off, off offset:160 scratch_load_b128 v[34:37], off, off offset:32 scratch_load_b64 v[43:44], off, off offset:176 scratch_load_b64 v[66:67], off, off offset:48 scratch_load_b128 v[48:51], off, off offset:296 scratch_load_b128 v[52:55], off, off offset:192 scratch_load_b64 v[78:79], off, off offset:208 scratch_load_b128 v[56:59], off, off offset:336 scratch_load_b64 v[80:81], off, off offset:224 scratch_load_b64 v[82:83], off, off offset:240 scratch_load_b128 v[60:63], off, off offset:64 scratch_load_b64 v[84:85], off, off offset:80 scratch_load_b64 v[86:87], off, off offset:96 scratch_load_b64 v[88:89], off, off offset:112 s_waitcnt vmcnt(13) v_div_scale_f64 v[64:65], null, v[30:31], v[30:31], 1.0 s_waitcnt vmcnt(12) v_div_scale_f64 v[68:69], null, v[34:35], v[34:35], 1.0 v_div_scale_f64 v[90:91], vcc_lo, 1.0, v[30:31], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[70:71], v[64:65] v_rcp_f64_e32 v[72:73], v[68:69] s_waitcnt_depctr 0xfff v_fma_f64 v[74:75], -v[64:65], v[70:71], 1.0 v_fma_f64 v[76:77], -v[68:69], v[72:73], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[70:71], v[70:71], v[74:75], v[70:71] v_fma_f64 v[72:73], v[72:73], v[76:77], v[72:73] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[74:75], -v[64:65], v[70:71], 1.0 v_fma_f64 v[76:77], -v[68:69], v[72:73], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[70:71], v[70:71], v[74:75], v[70:71] v_div_scale_f64 v[74:75], s0, 1.0, v[34:35], 1.0 v_fma_f64 v[72:73], v[72:73], v[76:77], v[72:73] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[76:77], v[90:91], v[70:71] v_mul_f64 v[92:93], v[74:75], v[72:73] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[64:65], -v[64:65], v[76:77], v[90:91] v_fma_f64 v[68:69], -v[68:69], v[92:93], v[74:75] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_div_fmas_f64 v[64:65], v[64:65], v[70:71], v[76:77] s_mov_b32 vcc_lo, s0 s_mov_b32 s0, 0 v_div_fmas_f64 v[68:69], v[68:69], v[72:73], v[92:93] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[64:65], v[64:65], v[30:31], 1.0 v_div_fixup_f64 v[68:69], v[68:69], v[34:35], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_mul_f64 v[30:31], v[32:33], v[64:65] s_waitcnt vmcnt(11) v_mul_f64 v[32:33], v[64:65], v[43:44] s_waitcnt vmcnt(9) v_mul_f64 v[34:35], v[64:65], v[48:49] v_mul_f64 v[64:65], v[36:37], v[68:69] v_mul_f64 v[66:67], v[68:69], v[66:67] v_mul_f64 v[36:37], v[68:69], v[50:51] s_waitcnt vmcnt(8) v_fma_f64 v[48:49], -v[30:31], v[52:53], v[54:55] s_waitcnt vmcnt(7) v_fma_f64 v[50:51], -v[32:33], v[52:53], v[78:79] s_waitcnt vmcnt(5) v_fma_f64 v[68:69], -v[30:31], v[80:81], v[23:24] s_waitcnt vmcnt(4) v_fma_f64 v[70:71], -v[32:33], v[80:81], v[82:83] s_waitcnt vmcnt(3) v_fma_f64 v[72:73], -v[64:65], v[60:61], v[62:63] s_waitcnt vmcnt(2) v_fma_f64 v[74:75], -v[66:67], v[60:61], v[84:85] v_fma_f64 v[52:53], -v[34:35], v[52:53], v[56:57] v_fma_f64 v[54:55], -v[36:37], v[60:61], v[58:59] s_waitcnt vmcnt(1) v_fma_f64 v[60:61], -v[64:65], v[86:87], v[9:10] s_waitcnt vmcnt(0) v_fma_f64 v[62:63], -v[66:67], v[86:87], v[88:89] v_fma_f64 v[56:57], -v[34:35], v[80:81], v[11:12] v_fma_f64 v[58:59], -v[36:37], v[86:87], v[7:8] v_mov_b32_e32 v9, v45 v_mov_b32_e32 v7, v29 s_clause 0x8 scratch_store_b128 off, v[30:33], off offset:168 scratch_store_b128 off, v[48:51], off offset:200 scratch_store_b128 off, v[68:71], off offset:232 scratch_store_b128 off, v[64:67], off offset:40 scratch_store_b128 off, v[72:75], off offset:72 scratch_store_b128 off, v[34:37], off offset:296 scratch_store_b128 off, v[52:55], off offset:336 scratch_store_b128 off, v[60:63], off offset:104 scratch_store_b128 off, v[56:59], off offset:376 .LBB10_66: ; Parent Loop BB10_61 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v10, 0x110 :: v_dual_add_nc_u32 v43, v0, v9 v_add_nc_u32_e64 v8, 0x90, 24 v_add_nc_u32_e32 v36, v6, v9 v_add_nc_u32_e32 v9, s55, v9 s_delay_alu instid0(VALU_DEP_4) v_readfirstlane_b32 s9, v10 v_add_nc_u32_e64 v10, 16, 24 v_add_nc_u32_e32 v8, s0, v8 v_ashrrev_i32_e32 v37, 31, v36 v_ashrrev_i32_e32 v44, 31, v43 s_add_i32 s9, s9, s0 v_add_nc_u32_e32 v12, s0, v10 s_add_i32 s36, s9, 24 s_add_i32 s37, s9, 64 scratch_load_b64 v[10:11], v8, off s_addk_i32 s9, 0x68 scratch_load_b64 v[23:24], v12, off s_clause 0x2 scratch_load_b64 v[30:31], off, s36 scratch_load_b64 v[32:33], off, s37 scratch_load_b64 v[34:35], off, s9 v_ashrrev_i32_e32 v8, 31, v7 v_lshlrev_b64 v[36:37], 3, v[36:37] v_lshlrev_b64 v[43:44], 3, v[43:44] s_add_i32 s0, s0, 8 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_lshlrev_b64 v[48:49], 3, v[7:8] v_add_nc_u32_e32 v7, s5, v7 s_cmp_lg_u32 s0, 16 v_add_co_u32 v48, vcc_lo, s30, v48 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v49, vcc_lo, s31, v49, vcc_lo v_add_co_u32 v36, vcc_lo, s28, v36 v_add_co_ci_u32_e32 v37, vcc_lo, s29, v37, vcc_lo v_add_co_u32 v43, vcc_lo, s28, v43 v_add_co_ci_u32_e32 v44, vcc_lo, s29, v44, vcc_lo s_waitcnt vmcnt(4) global_store_b64 v[36:37], v[10:11], off s_waitcnt vmcnt(3) global_store_b64 v[43:44], v[23:24], off s_waitcnt vmcnt(2) global_store_b64 v[48:49], v[30:31], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[32:33], s36 s_waitcnt vmcnt(0) scratch_store_b64 off, v[34:35], s37 s_cbranch_scc1 .LBB10_66 ; %bb.67: ; %.preheader790.preheader ; in Loop: Header=BB10_61 Depth=1 s_mov_b32 s0, 0 .LBB10_68: ; %.preheader790 ; Parent Loop BB10_61 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_nc_u32_e64 v7, 0x90, s0 v_add_nc_u32_e64 v8, s0, 16 s_add_i32 s9, s0, 0x90 s_add_i32 s36, s0, 16 s_add_i32 s0, s0, 8 v_add_nc_u32_e32 v30, 40, v7 v_add_nc_u32_e32 v9, 0x50, v7 v_add_nc_u32_e32 v31, 40, v8 v_add_nc_u32_e32 v23, 0x50, v8 s_cmp_lg_u32 s0, 40 s_clause 0x1 scratch_load_b64 v[7:8], v30, off scratch_load_b64 v[9:10], v9, off s_clause 0x1 scratch_load_b64 v[11:12], v31, off scratch_load_b64 v[23:24], v23, off s_waitcnt vmcnt(3) scratch_store_b64 off, v[7:8], s9 s_waitcnt vmcnt(2) scratch_store_b64 v30, v[9:10], off s_waitcnt vmcnt(1) scratch_store_b64 off, v[11:12], s36 s_waitcnt vmcnt(0) scratch_store_b64 v31, v[23:24], off s_cbranch_scc1 .LBB10_68 ; %bb.69: ; in Loop: Header=BB10_61 Depth=1 v_add_nc_u32_e32 v1, s57, v1 v_add_nc_u32_e32 v29, s52, v29 v_add_nc_u32_e32 v0, s57, v0 v_add_nc_u32_e32 v6, s57, v6 s_add_i32 s8, s8, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s8, s56 s_cbranch_scc1 .LBB10_61 ; %bb.70: ; %._crit_edge823.loopexit s_clause 0x3 scratch_load_b64 v[23:24], off, off offset:192 scratch_load_b128 v[10:13], off, off offset:296 scratch_load_b128 v[6:9], off, off offset:336 scratch_load_b64 v[0:1], off, off offset:64 .LBB10_71: ; %._crit_edge823 s_clause 0x3 scratch_load_b128 v[2:5], off, off offset:160 scratch_load_b128 v[26:29], off, off offset:32 scratch_load_b64 v[30:31], off, off offset:200 scratch_load_b64 v[34:35], off, off offset:72 s_waitcnt vmcnt(3) v_div_scale_f64 v[32:33], null, v[2:3], v[2:3], 1.0 s_waitcnt vmcnt(2) v_div_scale_f64 v[36:37], null, v[26:27], v[26:27], 1.0 v_div_scale_f64 v[54:55], vcc_lo, 1.0, v[2:3], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_rcp_f64_e32 v[43:44], v[32:33] v_rcp_f64_e32 v[48:49], v[36:37] s_waitcnt_depctr 0xfff v_fma_f64 v[50:51], -v[32:33], v[43:44], 1.0 v_fma_f64 v[52:53], -v[36:37], v[48:49], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[43:44], v[43:44], v[50:51], v[43:44] v_fma_f64 v[48:49], v[48:49], v[52:53], v[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[50:51], -v[32:33], v[43:44], 1.0 v_fma_f64 v[52:53], -v[36:37], v[48:49], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[43:44], v[43:44], v[50:51], v[43:44] v_div_scale_f64 v[50:51], s0, 1.0, v[26:27], 1.0 v_fma_f64 v[48:49], v[48:49], v[52:53], v[48:49] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[52:53], v[54:55], v[43:44] v_mul_f64 v[56:57], v[50:51], v[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[32:33], -v[32:33], v[52:53], v[54:55] v_fma_f64 v[36:37], -v[36:37], v[56:57], v[50:51] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[32:33], v[32:33], v[43:44], v[52:53] s_mov_b32 vcc_lo, s0 v_div_fmas_f64 v[36:37], v[36:37], v[48:49], v[56:57] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[2:3], v[32:33], v[2:3], 1.0 v_div_fixup_f64 v[26:27], v[36:37], v[26:27], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mul_f64 v[4:5], v[4:5], v[2:3] v_mul_f64 v[10:11], v[2:3], v[10:11] v_mul_f64 v[2:3], v[28:29], v[26:27] v_mul_f64 v[12:13], v[26:27], v[12:13] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[26:27], -v[4:5], v[23:24], v[30:31] v_fma_f64 v[6:7], -v[10:11], v[23:24], v[6:7] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[23:24], -v[2:3], v[0:1], v[34:35] v_fma_f64 v[8:9], -v[12:13], v[0:1], v[8:9] global_load_b64 v[0:1], v[21:22], off v_div_scale_f64 v[28:29], null, v[26:27], v[26:27], v[6:7] v_div_scale_f64 v[43:44], vcc_lo, v[6:7], v[26:27], v[6:7] v_div_scale_f64 v[30:31], null, v[23:24], v[23:24], v[8:9] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[32:33], v[28:29] v_rcp_f64_e32 v[34:35], v[30:31] s_waitcnt_depctr 0xfff v_fma_f64 v[21:22], -v[28:29], v[32:33], 1.0 v_fma_f64 v[36:37], -v[30:31], v[34:35], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[21:22], v[32:33], v[21:22], v[32:33] v_fma_f64 v[32:33], v[34:35], v[36:37], v[34:35] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[34:35], -v[28:29], v[21:22], 1.0 v_fma_f64 v[36:37], -v[30:31], v[32:33], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[21:22], v[21:22], v[34:35], v[21:22] v_div_scale_f64 v[34:35], s0, v[8:9], v[23:24], v[8:9] v_fma_f64 v[32:33], v[32:33], v[36:37], v[32:33] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[36:37], v[43:44], v[21:22] v_mul_f64 v[48:49], v[34:35], v[32:33] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[28:29], -v[28:29], v[36:37], v[43:44] v_fma_f64 v[30:31], -v[30:31], v[48:49], v[34:35] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_div_fmas_f64 v[21:22], v[28:29], v[21:22], v[36:37] s_mov_b32 vcc_lo, s0 s_mov_b32 s0, 0 v_div_fmas_f64 v[28:29], v[30:31], v[32:33], v[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_div_fixup_f64 v[6:7], v[21:22], v[26:27], v[6:7] v_div_fixup_f64 v[8:9], v[28:29], v[23:24], v[8:9] s_clause 0x1 scratch_store_b128 off, v[10:13], off offset:296 scratch_store_b128 off, v[6:9], off offset:336 .LBB10_72: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v6, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 24 v_add_nc_u32_e32 v6, 40, v6 s_clause 0x1 scratch_load_b64 v[6:7], v6, off scratch_load_b64 v[8:9], off, s1 s_waitcnt vmcnt(0) v_fma_f64 v[6:7], -v[0:1], v[6:7], v[8:9] scratch_store_b64 off, v[6:7], s1 s_cbranch_scc1 .LBB10_72 ; %bb.73: s_clause 0x1 scratch_load_b128 v[6:9], off, off offset:336 scratch_load_b128 v[10:13], off, off offset:296 s_mov_b32 s0, 0 s_waitcnt vmcnt(0) v_fma_f64 v[0:1], -v[4:5], v[6:7], v[10:11] v_fma_f64 v[2:3], -v[2:3], v[8:9], v[12:13] scratch_store_b128 off, v[0:3], off offset:296 .LBB10_74: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e64 v4, 0x110, s0 s_add_i32 s1, s0, 0x110 s_add_i32 s0, s0, 8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_lg_u32 s0, 40 v_add_nc_u32_e32 v5, 40, v4 v_add_nc_u32_e32 v4, 0x50, v4 s_clause 0x1 scratch_load_b64 v[0:1], v5, off scratch_load_b64 v[2:3], off, s1 s_waitcnt vmcnt(1) scratch_store_b64 v4, v[0:1], off s_waitcnt vmcnt(0) scratch_store_b64 v5, v[2:3], off s_cbranch_scc1 .LBB10_74 ; %bb.75: s_getpc_b64 s[0:1] s_add_u32 s0, s0, bt@rel32@lo+4 s_addc_u32 s1, s1, bt@rel32@hi+12 v_cmp_ne_u32_e32 vcc_lo, 1, v25 s_load_b64 s[0:1], s[0:1], 0x0 s_cbranch_vccnz .LBB10_84 ; %bb.76: ; %.preheader.lr.ph s_add_i32 s8, s26, -1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_i32 s9, s25, s8 v_add3_u32 v2, s54, s9, v46 s_add_i32 s9, s26, -3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_mul_i32 s34, s25, s9 v_mad_u64_u32 v[0:1], null, v2, 5, 5 v_add3_u32 v1, s54, s34, v46 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_lo_u32 v3, s24, v1 v_mul_lo_u32 v0, s24, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[1:2], null, s6, 5, v[0:1] v_add3_u32 v0, v3, s24, v45 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add3_u32 v6, v0, s6, 1 v_add3_u32 v7, v1, v47, 5 s_lshl_b32 s6, s26, 1 .LBB10_77: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB10_78 Depth 2 ; Child Loop BB10_82 Depth 2 v_mad_u64_u32 v[0:1], null, s9, s7, v[40:41] s_add_i32 s34, s9, s26 s_mov_b32 s35, 0 v_mad_u64_u32 v[1:2], null, s34, s7, v[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mad_u64_u32 v[2:3], null, v0, s33, v[41:42] v_mad_u64_u32 v[4:5], null, v1, s33, v[41:42] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v3, 31, v2 v_ashrrev_i32_e32 v5, 31, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[0:1], 3, v[2:3] v_lshlrev_b64 v[2:3], 3, v[4:5] v_mov_b32_e32 v4, v6 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v0, vcc_lo, s28, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s29, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, s28, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo s_clause 0x1 global_load_b64 v[0:1], v[0:1], off global_load_b64 v[2:3], v[2:3], off .LBB10_78: ; Parent Loop BB10_77 Depth=1 ; => This Inner Loop Header: Depth=2 v_ashrrev_i32_e32 v5, 31, v4 s_add_i32 s36, s35, 0x110 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_lshlrev_b64 v[8:9], 3, v[4:5] v_add_nc_u32_e64 v5, 0x110, s35 v_add_nc_u32_e32 v4, s5, v4 s_add_i32 s35, s35, 8 s_cmp_lg_u32 s35, 24 s_delay_alu instid0(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, s30, v8 v_add_nc_u32_e32 v10, 40, v5 v_add_co_ci_u32_e32 v9, vcc_lo, s31, v9, vcc_lo v_add_nc_u32_e32 v5, 0x50, v5 scratch_load_b64 v[10:11], v10, off global_load_b64 v[8:9], v[8:9], off scratch_load_b64 v[12:13], v5, off s_waitcnt vmcnt(1) v_fma_f64 v[8:9], -v[0:1], v[10:11], v[8:9] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[8:9], -v[2:3], v[12:13], v[8:9] scratch_store_b64 off, v[8:9], s36 s_cbranch_scc1 .LBB10_78 ; %bb.79: ; in Loop: Header=BB10_77 Depth=1 s_add_i32 s34, s34, s6 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) s_add_i32 s35, s34, s27 v_mad_u64_u32 v[0:1], null, s34, s25, v[39:40] s_add_i32 s36, s35, s26 v_mad_u64_u32 v[1:2], null, s35, s7, v[40:41] s_sub_i32 s35, s36, s27 v_mad_u64_u32 v[2:3], null, s35, s25, v[39:40] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[3:4], null, v0, s24, v[38:39] v_mad_u64_u32 v[8:9], null, v1, s33, v[41:42] s_sub_i32 s35, s35, s6 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_mad_u64_u32 v[0:1], null, v2, s24, v[38:39] v_mad_u64_u32 v[1:2], null, s35, s7, v[40:41] v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v9, 31, v8 v_lshlrev_b64 v[2:3], 3, v[3:4] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_mad_u64_u32 v[4:5], null, v1, s33, v[41:42] v_lshlrev_b64 v[8:9], 3, v[8:9] v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, s30, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s31, v3, vcc_lo v_add_co_u32 v8, vcc_lo, s28, v8 v_ashrrev_i32_e32 v5, 31, v4 v_add_co_ci_u32_e32 v9, vcc_lo, s29, v9, vcc_lo v_lshlrev_b64 v[0:1], 3, v[0:1] global_load_b64 v[12:13], v[2:3], off global_load_b64 v[21:22], v[8:9], off v_lshlrev_b64 v[2:3], 3, v[4:5] scratch_load_b128 v[8:11], off, off offset:336 v_mad_u64_u32 v[4:5], null, s36, s7, v[40:41] v_add_co_u32 v0, vcc_lo, s30, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s31, v1, vcc_lo v_add_co_u32 v2, vcc_lo, s28, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s29, v3, vcc_lo global_load_b64 v[23:24], v[0:1], off global_load_b64 v[25:26], v[2:3], off v_mad_u64_u32 v[0:1], null, s34, s7, v[40:41] v_mad_u64_u32 v[1:2], null, v4, s33, v[41:42] s_add_i32 s34, s9, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_cmp_ge_i32 s34, s8 v_mad_u64_u32 v[3:4], null, v0, s33, v[41:42] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[0:1], 3, v[1:2] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[2:3], 3, v[3:4] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v0, vcc_lo, s28, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s29, v1, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v4, vcc_lo, s28, v2 v_add_co_ci_u32_e32 v5, vcc_lo, s29, v3, vcc_lo global_load_b64 v[27:28], v[0:1], off scratch_load_b128 v[0:3], off, off offset:376 global_load_b64 v[4:5], v[4:5], off s_waitcnt vmcnt(5) v_fma_f64 v[8:9], -v[21:22], v[8:9], v[12:13] s_waitcnt vmcnt(3) v_fma_f64 v[10:11], -v[25:26], v[10:11], v[23:24] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[8:9], -v[27:28], v[0:1], v[8:9] s_waitcnt vmcnt(0) v_fma_f64 v[10:11], -v[4:5], v[2:3], v[10:11] scratch_store_b128 off, v[8:11], off offset:296 s_cbranch_scc1 .LBB10_81 ; %bb.80: ; in Loop: Header=BB10_77 Depth=1 v_mad_u64_u32 v[4:5], null, s34, s25, v[39:40] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, s24, v[38:39] v_ashrrev_i32_e32 v9, 31, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], 3, v[8:9] v_add_co_u32 v8, vcc_lo, s20, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, s21, v5, vcc_lo global_load_b64 v[12:13], v[8:9], off v_add_co_u32 v8, vcc_lo, s16, v4 v_add_co_ci_u32_e32 v9, vcc_lo, s17, v5, vcc_lo v_add_co_u32 v25, vcc_lo, s10, v4 v_add_co_ci_u32_e32 v26, vcc_lo, s11, v5, vcc_lo global_load_b64 v[21:22], v[8:9], off scratch_load_b128 v[8:11], off, off offset:352 global_load_b64 v[25:26], v[25:26], off v_add_co_u32 v29, vcc_lo, s12, v4 v_add_co_ci_u32_e32 v30, vcc_lo, s13, v5, vcc_lo scratch_load_b64 v[33:34], off, off offset:368 v_add_co_u32 v43, vcc_lo, s18, v4 global_load_b64 v[29:30], v[29:30], off v_add_co_ci_u32_e32 v44, vcc_lo, s19, v5, vcc_lo v_add_co_u32 v4, vcc_lo, s14, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s15, v5, vcc_lo global_load_b64 v[43:44], v[43:44], off global_load_b64 v[4:5], v[4:5], off s_waitcnt vmcnt(7) lgkmcnt(0) v_mul_f64 v[23:24], v[12:13], s[0:1] s_waitcnt vmcnt(6) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f64 v[27:28], null, v[21:22], v[21:22], v[23:24] v_div_scale_f64 v[45:46], vcc_lo, v[23:24], v[21:22], v[23:24] v_rcp_f64_e32 v[31:32], v[27:28] s_waitcnt_depctr 0xfff v_fma_f64 v[35:36], -v[27:28], v[31:32], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[31:32], v[31:32], v[35:36], v[31:32] v_fma_f64 v[35:36], -v[27:28], v[31:32], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[31:32], v[31:32], v[35:36], v[31:32] v_mul_f64 v[35:36], v[45:46], v[31:32] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[27:28], -v[27:28], v[35:36], v[45:46] s_waitcnt vmcnt(4) v_mul_f64 v[45:46], v[25:26], v[10:11] v_mul_f64 v[10:11], v[12:13], v[10:11] v_div_fmas_f64 v[27:28], v[27:28], v[31:32], v[35:36] v_add_f64 v[31:32], v[0:1], v[2:3] s_waitcnt vmcnt(2) s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_fma_f64 v[35:36], v[29:30], v[8:9], -v[45:46] v_mul_f64 v[45:46], v[21:22], v[21:22] v_add_f64 v[0:1], v[0:1], -v[2:3] v_div_fixup_f64 v[27:28], v[27:28], v[21:22], v[23:24] v_mul_f64 v[35:36], v[12:13], v[35:36] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f64 v[2:3], 0x40040000, v[45:46] v_mul_f64 v[0:1], v[0:1], v[23:24] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[21:22], v[31:32], v[27:28], v[33:34] v_mul_f64 v[27:28], v[31:32], v[27:28] s_waitcnt vmcnt(1) v_fma_f64 v[31:32], v[43:44], v[21:22], v[35:36] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[23:24], v[2:3], v[27:28], v[31:32] v_mul_f64 v[27:28], v[29:30], v[21:22] s_waitcnt vmcnt(0) v_fma_f64 v[2:3], v[4:5], v[21:22], v[0:1] v_fma_f64 v[4:5], v[4:5], v[0:1], v[23:24] s_delay_alu instid0(VALU_DEP_3) v_fma_f64 v[0:1], v[12:13], v[8:9], v[27:28] v_fma_f64 v[23:24], v[25:26], v[21:22], -v[10:11] s_clause 0x2 scratch_store_b64 off, v[4:5], off offset:384 scratch_store_b128 off, v[0:3], off offset:368 scratch_store_b128 off, v[21:24], off offset:352 .LBB10_81: ; in Loop: Header=BB10_77 Depth=1 s_mov_b32 s34, 0 s_mov_b32 s35, s53 .LBB10_82: ; Parent Loop BB10_77 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_i32 s36, s35, 40 s_clause 0x2 scratch_load_b64 v[0:1], off, s35 scratch_load_b64 v[2:3], off, s35 offset:-40 scratch_load_b64 v[4:5], off, s36 v_add_nc_u32_e32 v8, s34, v7 s_add_i32 s34, s34, 1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v9, 31, v8 v_lshlrev_b64 v[8:9], 3, v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, s22, v8 v_add_co_ci_u32_e32 v9, vcc_lo, s23, v9, vcc_lo s_waitcnt vmcnt(1) scratch_store_b64 off, v[2:3], s35 s_add_i32 s35, s35, 8 s_cmp_lg_u32 s34, 5 scratch_store_b64 off, v[0:1], s36 s_waitcnt vmcnt(0) global_store_b64 v[8:9], v[4:5], off s_cbranch_scc1 .LBB10_82 ; %bb.83: ; in Loop: Header=BB10_77 Depth=1 v_subrev_nc_u32_e32 v6, s52, v6 v_subrev_nc_u32_e32 v7, s4, v7 s_add_i32 s34, s9, -1 s_cmp_gt_i32 s9, 0 s_mov_b32 s9, s34 s_cbranch_scc1 .LBB10_77 .LBB10_84: ; %._crit_edge829 v_add_nc_u32_e32 v2, s25, v39 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[0:1], null, v2, s24, v[38:39] v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], 3, v[0:1] v_add_co_u32 v0, vcc_lo, s20, v8 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s21, v9, vcc_lo global_load_b64 v[10:11], v[0:1], off v_add_co_u32 v0, vcc_lo, s16, v8 v_add_co_ci_u32_e32 v1, vcc_lo, s17, v9, vcc_lo v_add_co_u32 v4, vcc_lo, s10, v8 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v9, vcc_lo global_load_b64 v[12:13], v[0:1], off scratch_load_b128 v[0:3], off, off offset:352 global_load_b64 v[23:24], v[4:5], off v_add_co_u32 v27, vcc_lo, s12, v8 v_add_co_ci_u32_e32 v28, vcc_lo, s13, v9, vcc_lo s_clause 0x1 scratch_load_b128 v[4:7], off, off offset:368 scratch_load_b64 v[29:30], off, off offset:384 global_load_b64 v[27:28], v[27:28], off v_add_co_u32 v35, vcc_lo, s18, v8 v_add_co_ci_u32_e32 v36, vcc_lo, s19, v9, vcc_lo v_add_co_u32 v8, vcc_lo, s14, v8 v_add_co_ci_u32_e32 v9, vcc_lo, s15, v9, vcc_lo global_load_b64 v[35:36], v[35:36], off global_load_b64 v[8:9], v[8:9], off s_waitcnt vmcnt(8) lgkmcnt(0) v_mul_f64 v[21:22], v[10:11], s[0:1] s_mov_b32 s0, 0 s_waitcnt vmcnt(7) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f64 v[25:26], null, v[12:13], v[12:13], v[21:22] v_div_scale_f64 v[37:38], vcc_lo, v[21:22], v[12:13], v[21:22] v_rcp_f64_e32 v[31:32], v[25:26] s_waitcnt_depctr 0xfff v_fma_f64 v[33:34], -v[25:26], v[31:32], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[31:32], v[31:32], v[33:34], v[31:32] v_fma_f64 v[33:34], -v[25:26], v[31:32], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[31:32], v[31:32], v[33:34], v[31:32] v_mul_f64 v[33:34], v[37:38], v[31:32] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[25:26], -v[25:26], v[33:34], v[37:38] s_waitcnt vmcnt(5) v_mul_f64 v[37:38], v[23:24], v[2:3] v_mul_f64 v[2:3], v[10:11], v[2:3] v_div_fmas_f64 v[25:26], v[25:26], v[31:32], v[33:34] s_waitcnt vmcnt(3) v_add_f64 v[31:32], v[6:7], v[29:30] s_waitcnt vmcnt(2) s_delay_alu instid0(VALU_DEP_4) v_fma_f64 v[33:34], v[27:28], v[0:1], -v[37:38] v_add_f64 v[6:7], v[6:7], -v[29:30] v_add_co_u32 v19, vcc_lo, v19, s2 v_add_co_ci_u32_e32 v20, vcc_lo, s3, v20, vcc_lo v_div_fixup_f64 v[25:26], v[25:26], v[12:13], v[21:22] v_mul_f64 v[12:13], v[12:13], v[12:13] v_mul_f64 v[33:34], v[10:11], v[33:34] v_mul_f64 v[6:7], v[21:22], v[6:7] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[4:5], v[25:26], v[31:32], v[4:5] v_mul_f64 v[12:13], 0x40040000, v[12:13] v_mul_f64 v[25:26], v[25:26], v[31:32] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[29:30], v[4:5], v[35:36], v[33:34] v_mul_f64 v[21:22], v[27:28], v[4:5] v_fma_f64 v[2:3], v[23:24], v[4:5], -v[2:3] v_fma_f64 v[12:13], v[12:13], v[25:26], v[29:30] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fma_f64 v[0:1], v[10:11], v[0:1], v[21:22] s_waitcnt vmcnt(0) v_fma_f64 v[12:13], v[8:9], v[6:7], v[12:13] v_fma_f64 v[6:7], v[8:9], v[4:5], v[6:7] v_add_nc_u32_e32 v9, s4, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v8, 2, v9 v_add_nc_u32_e32 v10, 1, v9 v_ashrrev_i32_e32 v9, 31, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v11, 31, v10 v_lshlrev_b64 v[8:9], 3, v[8:9] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[10:11], 3, v[10:11] v_add_co_u32 v8, vcc_lo, s22, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v9, vcc_lo, s23, v9, vcc_lo v_add_co_u32 v10, vcc_lo, s22, v10 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v11, vcc_lo, s23, v11, vcc_lo s_clause 0x4 global_store_b64 v[17:18], v[12:13], off global_store_b64 v[15:16], v[6:7], off global_store_b64 v[8:9], v[0:1], off global_store_b64 v[10:11], v[2:3], off global_store_b64 v[19:20], v[4:5], off .LBB10_85: ; =>This Inner Loop Header: Depth=1 scratch_load_b64 v[0:1], off, s53 v_add_nc_u32_e32 v2, s0, v42 s_add_i32 s0, s0, 1 s_add_i32 s53, s53, 8 s_cmp_lg_u32 s0, 5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v3, 31, v2 v_lshlrev_b64 v[2:3], 3, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s22, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo s_waitcnt vmcnt(0) global_store_b64 v[2:3], v[0:1], off s_cbranch_scc1 .LBB10_85 .LBB10_86: ; %.loopexit s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 400 .amdhsa_kernarg_size 352 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 1 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 94 .amdhsa_next_free_sgpr 65 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii,"axG",@progbits,_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii,comdat .Lfunc_end10: .size _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii, .Lfunc_end10-_ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 10184 ; NumSgprs: 67 ; NumVgprs: 94 ; ScratchSize: 400 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 8 ; VGPRBlocks: 11 ; NumSGPRsForWavesPerEU: 67 ; NumVGPRsForWavesPerEU: 94 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .section .text._ZL10add_kernelPdS_iii,"axG",@progbits,_ZL10add_kernelPdS_iii,comdat .globl _ZL10add_kernelPdS_iii ; -- Begin function _ZL10add_kernelPdS_iii .p2align 8 .type _ZL10add_kernelPdS_iii,@function _ZL10add_kernelPdS_iii: ; @_ZL10add_kernelPdS_iii ; %bb.0: s_load_b256 s[0:7], s[0:1], 0x0 v_bfe_u32 v5, v0, 10, 10 s_add_i32 s8, s15, 1 v_and_b32_e32 v0, 0x3ff, v0 s_add_i32 s10, s14, 1 s_waitcnt lgkmcnt(0) v_mad_u64_u32 v[1:2], null, v5, s6, s[8:9] s_mul_i32 s6, s8, s5 s_delay_alu instid0(SALU_CYCLE_1) s_add_i32 s6, s6, s10 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[2:3], null, s6, s4, v[0:1] v_mad_u64_u32 v[3:4], null, v1, s5, s[10:11] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshl_add_u32 v1, v2, 2, v2 v_mul_lo_u32 v3, v3, s4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add3_u32 v1, v1, v5, 5 v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v2, 31, v1 v_add_co_u32 v3, vcc_lo, v3, v0 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[0:1], 3, v[1:2] v_lshlrev_b64 v[2:3], 3, v[3:4] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, s2, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, s0, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo global_load_b64 v[0:1], v[0:1], off global_load_b64 v[4:5], v[2:3], off offset:8 s_waitcnt vmcnt(0) v_add_f64 v[0:1], v[0:1], v[4:5] global_store_b64 v[2:3], v[0:1], off offset:8 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZL10add_kernelPdS_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 28 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZL10add_kernelPdS_iii,"axG",@progbits,_ZL10add_kernelPdS_iii,comdat .Lfunc_end11: .size _ZL10add_kernelPdS_iii, .Lfunc_end11-_ZL10add_kernelPdS_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 232 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .protected tx1 ; @tx1 .type tx1,@object .section .bss,"aw",@nobits .globl tx1 .p2align 3, 0x0 tx1: .quad 0x0000000000000000 ; double 0 .size tx1, 8 .protected tx2 ; @tx2 .type tx2,@object .globl tx2 .p2align 3, 0x0 tx2: .quad 0x0000000000000000 ; double 0 .size tx2, 8 .protected tx3 ; @tx3 .type tx3,@object .globl tx3 .p2align 3, 0x0 tx3: .quad 0x0000000000000000 ; double 0 .size tx3, 8 .protected ty1 ; @ty1 .type ty1,@object .globl ty1 .p2align 3, 0x0 ty1: .quad 0x0000000000000000 ; double 0 .size ty1, 8 .protected ty2 ; @ty2 .type ty2,@object .globl ty2 .p2align 3, 0x0 ty2: .quad 0x0000000000000000 ; double 0 .size ty2, 8 .protected ty3 ; @ty3 .type ty3,@object .globl ty3 .p2align 3, 0x0 ty3: .quad 0x0000000000000000 ; double 0 .size ty3, 8 .protected tz1 ; @tz1 .type tz1,@object .globl tz1 .p2align 3, 0x0 tz1: .quad 0x0000000000000000 ; double 0 .size tz1, 8 .protected tz2 ; @tz2 .type tz2,@object .globl tz2 .p2align 3, 0x0 tz2: .quad 0x0000000000000000 ; double 0 .size tz2, 8 .protected tz3 ; @tz3 .type tz3,@object .globl tz3 .p2align 3, 0x0 tz3: .quad 0x0000000000000000 ; double 0 .size tz3, 8 .protected bt ; @bt .type bt,@object .globl bt .p2align 3, 0x0 bt: .quad 0x0000000000000000 ; double 0 .size bt, 8 .protected dt ; @dt .type dt,@object .globl dt .p2align 3, 0x0 dt: .quad 0x0000000000000000 ; double 0 .size dt, 8 .protected dtdssp ; @dtdssp .type dtdssp,@object .globl dtdssp .p2align 3, 0x0 dtdssp: .quad 0x0000000000000000 ; double 0 .size dtdssp, 8 .protected dnxm1 ; @dnxm1 .type dnxm1,@object .globl dnxm1 .p2align 3, 0x0 dnxm1: .quad 0x0000000000000000 ; double 0 .size dnxm1, 8 .protected dnym1 ; @dnym1 .type dnym1,@object .globl dnym1 .p2align 3, 0x0 dnym1: .quad 0x0000000000000000 ; double 0 .size dnym1, 8 .protected dnzm1 ; @dnzm1 .type dnzm1,@object .globl dnzm1 .p2align 3, 0x0 dnzm1: .quad 0x0000000000000000 ; double 0 .size dnzm1, 8 .protected dtx1 ; @dtx1 .type dtx1,@object .globl dtx1 .p2align 3, 0x0 dtx1: .quad 0x0000000000000000 ; double 0 .size dtx1, 8 .protected dttx2 ; @dttx2 .type dttx2,@object .globl dttx2 .p2align 3, 0x0 dttx2: .quad 0x0000000000000000 ; double 0 .size dttx2, 8 .protected dty1 ; @dty1 .type dty1,@object .globl dty1 .p2align 3, 0x0 dty1: .quad 0x0000000000000000 ; double 0 .size dty1, 8 .protected dtty2 ; @dtty2 .type dtty2,@object .globl dtty2 .p2align 3, 0x0 dtty2: .quad 0x0000000000000000 ; double 0 .size dtty2, 8 .protected dtz1 ; @dtz1 .type dtz1,@object .globl dtz1 .p2align 3, 0x0 dtz1: .quad 0x0000000000000000 ; double 0 .size dtz1, 8 .protected dttz2 ; @dttz2 .type dttz2,@object .globl dttz2 .p2align 3, 0x0 dttz2: .quad 0x0000000000000000 ; double 0 .size dttz2, 8 .protected c2dttx1 ; @c2dttx1 .type c2dttx1,@object .globl c2dttx1 .p2align 3, 0x0 c2dttx1: .quad 0x0000000000000000 ; double 0 .size c2dttx1, 8 .protected c2dtty1 ; @c2dtty1 .type c2dtty1,@object .globl c2dtty1 .p2align 3, 0x0 c2dtty1: .quad 0x0000000000000000 ; double 0 .size c2dtty1, 8 .protected c2dttz1 ; @c2dttz1 .type c2dttz1,@object .globl c2dttz1 .p2align 3, 0x0 c2dttz1: .quad 0x0000000000000000 ; double 0 .size c2dttz1, 8 .protected comz1 ; @comz1 .type comz1,@object .globl comz1 .p2align 3, 0x0 comz1: .quad 0x0000000000000000 ; double 0 .size comz1, 8 .protected comz4 ; @comz4 .type comz4,@object .globl comz4 .p2align 3, 0x0 comz4: .quad 0x0000000000000000 ; double 0 .size comz4, 8 .protected comz5 ; @comz5 .type comz5,@object .globl comz5 .p2align 3, 0x0 comz5: .quad 0x0000000000000000 ; double 0 .size comz5, 8 .protected comz6 ; @comz6 .type comz6,@object .globl comz6 .p2align 3, 0x0 comz6: .quad 0x0000000000000000 ; double 0 .size comz6, 8 .protected c3c4tx3 ; @c3c4tx3 .type c3c4tx3,@object .globl c3c4tx3 .p2align 3, 0x0 c3c4tx3: .quad 0x0000000000000000 ; double 0 .size c3c4tx3, 8 .protected c3c4ty3 ; @c3c4ty3 .type c3c4ty3,@object .globl c3c4ty3 .p2align 3, 0x0 c3c4ty3: .quad 0x0000000000000000 ; double 0 .size c3c4ty3, 8 .protected c3c4tz3 ; @c3c4tz3 .type c3c4tz3,@object .globl c3c4tz3 .p2align 3, 0x0 c3c4tz3: .quad 0x0000000000000000 ; double 0 .size c3c4tz3, 8 .protected xxcon1 ; @xxcon1 .type xxcon1,@object .globl xxcon1 .p2align 3, 0x0 xxcon1: .quad 0x0000000000000000 ; double 0 .size xxcon1, 8 .protected xxcon2 ; @xxcon2 .type xxcon2,@object .globl xxcon2 .p2align 3, 0x0 xxcon2: .quad 0x0000000000000000 ; double 0 .size xxcon2, 8 .protected xxcon3 ; @xxcon3 .type xxcon3,@object .globl xxcon3 .p2align 3, 0x0 xxcon3: .quad 0x0000000000000000 ; double 0 .size xxcon3, 8 .protected xxcon4 ; @xxcon4 .type xxcon4,@object .globl xxcon4 .p2align 3, 0x0 xxcon4: .quad 0x0000000000000000 ; double 0 .size xxcon4, 8 .protected xxcon5 ; @xxcon5 .type xxcon5,@object .globl xxcon5 .p2align 3, 0x0 xxcon5: .quad 0x0000000000000000 ; double 0 .size xxcon5, 8 .protected dx1tx1 ; @dx1tx1 .type dx1tx1,@object .globl dx1tx1 .p2align 3, 0x0 dx1tx1: .quad 0x0000000000000000 ; double 0 .size dx1tx1, 8 .protected dx2tx1 ; @dx2tx1 .type dx2tx1,@object .globl dx2tx1 .p2align 3, 0x0 dx2tx1: .quad 0x0000000000000000 ; double 0 .size dx2tx1, 8 .protected dx3tx1 ; @dx3tx1 .type dx3tx1,@object .globl dx3tx1 .p2align 3, 0x0 dx3tx1: .quad 0x0000000000000000 ; double 0 .size dx3tx1, 8 .protected dx4tx1 ; @dx4tx1 .type dx4tx1,@object .globl dx4tx1 .p2align 3, 0x0 dx4tx1: .quad 0x0000000000000000 ; double 0 .size dx4tx1, 8 .protected dx5tx1 ; @dx5tx1 .type dx5tx1,@object .globl dx5tx1 .p2align 3, 0x0 dx5tx1: .quad 0x0000000000000000 ; double 0 .size dx5tx1, 8 .protected yycon1 ; @yycon1 .type yycon1,@object .globl yycon1 .p2align 3, 0x0 yycon1: .quad 0x0000000000000000 ; double 0 .size yycon1, 8 .protected yycon2 ; @yycon2 .type yycon2,@object .globl yycon2 .p2align 3, 0x0 yycon2: .quad 0x0000000000000000 ; double 0 .size yycon2, 8 .protected yycon3 ; @yycon3 .type yycon3,@object .globl yycon3 .p2align 3, 0x0 yycon3: .quad 0x0000000000000000 ; double 0 .size yycon3, 8 .protected yycon4 ; @yycon4 .type yycon4,@object .globl yycon4 .p2align 3, 0x0 yycon4: .quad 0x0000000000000000 ; double 0 .size yycon4, 8 .protected yycon5 ; @yycon5 .type yycon5,@object .globl yycon5 .p2align 3, 0x0 yycon5: .quad 0x0000000000000000 ; double 0 .size yycon5, 8 .protected dy1ty1 ; @dy1ty1 .type dy1ty1,@object .globl dy1ty1 .p2align 3, 0x0 dy1ty1: .quad 0x0000000000000000 ; double 0 .size dy1ty1, 8 .protected dy2ty1 ; @dy2ty1 .type dy2ty1,@object .globl dy2ty1 .p2align 3, 0x0 dy2ty1: .quad 0x0000000000000000 ; double 0 .size dy2ty1, 8 .protected dy3ty1 ; @dy3ty1 .type dy3ty1,@object .globl dy3ty1 .p2align 3, 0x0 dy3ty1: .quad 0x0000000000000000 ; double 0 .size dy3ty1, 8 .protected dy4ty1 ; @dy4ty1 .type dy4ty1,@object .globl dy4ty1 .p2align 3, 0x0 dy4ty1: .quad 0x0000000000000000 ; double 0 .size dy4ty1, 8 .protected dy5ty1 ; @dy5ty1 .type dy5ty1,@object .globl dy5ty1 .p2align 3, 0x0 dy5ty1: .quad 0x0000000000000000 ; double 0 .size dy5ty1, 8 .protected zzcon1 ; @zzcon1 .type zzcon1,@object .globl zzcon1 .p2align 3, 0x0 zzcon1: .quad 0x0000000000000000 ; double 0 .size zzcon1, 8 .protected zzcon2 ; @zzcon2 .type zzcon2,@object .globl zzcon2 .p2align 3, 0x0 zzcon2: .quad 0x0000000000000000 ; double 0 .size zzcon2, 8 .protected zzcon3 ; @zzcon3 .type zzcon3,@object .globl zzcon3 .p2align 3, 0x0 zzcon3: .quad 0x0000000000000000 ; double 0 .size zzcon3, 8 .protected zzcon4 ; @zzcon4 .type zzcon4,@object .globl zzcon4 .p2align 3, 0x0 zzcon4: .quad 0x0000000000000000 ; double 0 .size zzcon4, 8 .protected zzcon5 ; @zzcon5 .type zzcon5,@object .globl zzcon5 .p2align 3, 0x0 zzcon5: .quad 0x0000000000000000 ; double 0 .size zzcon5, 8 .protected dz1tz1 ; @dz1tz1 .type dz1tz1,@object .globl dz1tz1 .p2align 3, 0x0 dz1tz1: .quad 0x0000000000000000 ; double 0 .size dz1tz1, 8 .protected dz2tz1 ; @dz2tz1 .type dz2tz1,@object .globl dz2tz1 .p2align 3, 0x0 dz2tz1: .quad 0x0000000000000000 ; double 0 .size dz2tz1, 8 .protected dz3tz1 ; @dz3tz1 .type dz3tz1,@object .globl dz3tz1 .p2align 3, 0x0 dz3tz1: .quad 0x0000000000000000 ; double 0 .size dz3tz1, 8 .protected dz4tz1 ; @dz4tz1 .type dz4tz1,@object .globl dz4tz1 .p2align 3, 0x0 dz4tz1: .quad 0x0000000000000000 ; double 0 .size dz4tz1, 8 .protected dz5tz1 ; @dz5tz1 .type dz5tz1,@object .globl dz5tz1 .p2align 3, 0x0 dz5tz1: .quad 0x0000000000000000 ; double 0 .size dz5tz1, 8 .protected ce ; @ce .type ce,@object .globl ce .p2align 4, 0x0 ce: .zero 520 .size ce, 520 .type __hip_cuid_,@object ; @__hip_cuid_ .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym tx1 .addrsig_sym tx2 .addrsig_sym tx3 .addrsig_sym ty1 .addrsig_sym ty2 .addrsig_sym ty3 .addrsig_sym tz1 .addrsig_sym tz2 .addrsig_sym tz3 .addrsig_sym bt .addrsig_sym dt .addrsig_sym dtdssp .addrsig_sym dnxm1 .addrsig_sym dnym1 .addrsig_sym dnzm1 .addrsig_sym dtx1 .addrsig_sym dttx2 .addrsig_sym dty1 .addrsig_sym dtty2 .addrsig_sym dtz1 .addrsig_sym dttz2 .addrsig_sym c2dttx1 .addrsig_sym c2dtty1 .addrsig_sym c2dttz1 .addrsig_sym comz1 .addrsig_sym comz4 .addrsig_sym comz5 .addrsig_sym comz6 .addrsig_sym c3c4tx3 .addrsig_sym c3c4ty3 .addrsig_sym c3c4tz3 .addrsig_sym xxcon1 .addrsig_sym xxcon2 .addrsig_sym xxcon3 .addrsig_sym xxcon4 .addrsig_sym xxcon5 .addrsig_sym dx1tx1 .addrsig_sym dx2tx1 .addrsig_sym dx3tx1 .addrsig_sym dx4tx1 .addrsig_sym dx5tx1 .addrsig_sym yycon1 .addrsig_sym yycon2 .addrsig_sym yycon3 .addrsig_sym yycon4 .addrsig_sym yycon5 .addrsig_sym dy1ty1 .addrsig_sym dy2ty1 .addrsig_sym dy3ty1 .addrsig_sym dy4ty1 .addrsig_sym dy5ty1 .addrsig_sym zzcon1 .addrsig_sym zzcon2 .addrsig_sym zzcon3 .addrsig_sym zzcon4 .addrsig_sym zzcon5 .addrsig_sym dz1tz1 .addrsig_sym dz2tz1 .addrsig_sym dz3tz1 .addrsig_sym dz4tz1 .addrsig_sym dz5tz1 .addrsig_sym ce .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 20 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL21exact_rhs_kernel_initPdiii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _ZL21exact_rhs_kernel_initPdiii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL18exact_rhs_kernel_xPdiii .private_segment_fixed_size: 352 .sgpr_count: 68 .sgpr_spill_count: 0 .symbol: _ZL18exact_rhs_kernel_xPdiii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 94 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL18exact_rhs_kernel_yPdiii .private_segment_fixed_size: 352 .sgpr_count: 60 .sgpr_spill_count: 0 .symbol: _ZL18exact_rhs_kernel_yPdiii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 100 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL18exact_rhs_kernel_zPdiii .private_segment_fixed_size: 352 .sgpr_count: 62 .sgpr_spill_count: 0 .symbol: _ZL18exact_rhs_kernel_zPdiii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 95 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 20 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL17initialize_kernelPdiii .private_segment_fixed_size: 0 .sgpr_count: 56 .sgpr_spill_count: 0 .symbol: _ZL17initialize_kernelPdiii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 64 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .offset: 64 .size: 4 .value_kind: by_value - .offset: 68 .size: 4 .value_kind: by_value - .offset: 72 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 76 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii .private_segment_fixed_size: 0 .sgpr_count: 34 .sgpr_spill_count: 0 .symbol: _ZL20compute_rhs_kernel_1PdS_S_S_S_S_S_S_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 17 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 64 .size: 8 .value_kind: global_buffer - .offset: 72 .size: 4 .value_kind: by_value - .offset: 76 .size: 4 .value_kind: by_value - .offset: 80 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 84 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii .private_segment_fixed_size: 0 .sgpr_count: 54 .sgpr_spill_count: 0 .symbol: _ZL20compute_rhs_kernel_2PdS_S_S_S_S_S_S_S_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 94 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .offset: 56 .size: 4 .value_kind: by_value - .offset: 60 .size: 4 .value_kind: by_value - .offset: 64 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 68 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL13txinvr_kernelPdS_S_S_S_S_S_iii .private_segment_fixed_size: 0 .sgpr_count: 23 .sgpr_spill_count: 0 .symbol: _ZL13txinvr_kernelPdS_S_S_S_S_S_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 46 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .offset: 48 .size: 4 .value_kind: by_value - .offset: 52 .size: 4 .value_kind: by_value - .offset: 56 .size: 4 .value_kind: by_value - .offset: 64 .size: 4 .value_kind: hidden_block_count_x - .offset: 68 .size: 4 .value_kind: hidden_block_count_y - .offset: 72 .size: 4 .value_kind: hidden_block_count_z - .offset: 76 .size: 2 .value_kind: hidden_group_size_x - .offset: 78 .size: 2 .value_kind: hidden_group_size_y - .offset: 80 .size: 2 .value_kind: hidden_group_size_z - .offset: 82 .size: 2 .value_kind: hidden_remainder_x - .offset: 84 .size: 2 .value_kind: hidden_remainder_y - .offset: 86 .size: 2 .value_kind: hidden_remainder_z - .offset: 104 .size: 8 .value_kind: hidden_global_offset_x - .offset: 112 .size: 8 .value_kind: hidden_global_offset_y - .offset: 120 .size: 8 .value_kind: hidden_global_offset_z - .offset: 128 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 320 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL14x_solve_kernelPdS_S_S_S_S_iii .private_segment_fixed_size: 400 .sgpr_count: 56 .sgpr_spill_count: 0 .symbol: _ZL14x_solve_kernelPdS_S_S_S_S_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 94 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .offset: 48 .size: 4 .value_kind: by_value - .offset: 52 .size: 4 .value_kind: by_value - .offset: 56 .size: 4 .value_kind: by_value - .offset: 64 .size: 4 .value_kind: hidden_block_count_x - .offset: 68 .size: 4 .value_kind: hidden_block_count_y - .offset: 72 .size: 4 .value_kind: hidden_block_count_z - .offset: 76 .size: 2 .value_kind: hidden_group_size_x - .offset: 78 .size: 2 .value_kind: hidden_group_size_y - .offset: 80 .size: 2 .value_kind: hidden_group_size_z - .offset: 82 .size: 2 .value_kind: hidden_remainder_x - .offset: 84 .size: 2 .value_kind: hidden_remainder_y - .offset: 86 .size: 2 .value_kind: hidden_remainder_z - .offset: 104 .size: 8 .value_kind: hidden_global_offset_x - .offset: 112 .size: 8 .value_kind: hidden_global_offset_y - .offset: 120 .size: 8 .value_kind: hidden_global_offset_z - .offset: 128 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 320 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL14y_solve_kernelPdS_S_S_S_S_iii .private_segment_fixed_size: 400 .sgpr_count: 57 .sgpr_spill_count: 0 .symbol: _ZL14y_solve_kernelPdS_S_S_S_S_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 96 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 64 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 72 .size: 8 .value_kind: global_buffer - .offset: 80 .size: 4 .value_kind: by_value - .offset: 84 .size: 4 .value_kind: by_value - .offset: 88 .size: 4 .value_kind: by_value - .offset: 96 .size: 4 .value_kind: hidden_block_count_x - .offset: 100 .size: 4 .value_kind: hidden_block_count_y - .offset: 104 .size: 4 .value_kind: hidden_block_count_z - .offset: 108 .size: 2 .value_kind: hidden_group_size_x - .offset: 110 .size: 2 .value_kind: hidden_group_size_y - .offset: 112 .size: 2 .value_kind: hidden_group_size_z - .offset: 114 .size: 2 .value_kind: hidden_remainder_x - .offset: 116 .size: 2 .value_kind: hidden_remainder_y - .offset: 118 .size: 2 .value_kind: hidden_remainder_z - .offset: 136 .size: 8 .value_kind: hidden_global_offset_x - .offset: 144 .size: 8 .value_kind: hidden_global_offset_y - .offset: 152 .size: 8 .value_kind: hidden_global_offset_z - .offset: 160 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 352 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii .private_segment_fixed_size: 400 .sgpr_count: 67 .sgpr_spill_count: 0 .symbol: _ZL14z_solve_kernelPdS_S_S_S_S_S_S_S_S_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 94 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 20 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 28 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _ZL10add_kernelPdS_iii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _ZL10add_kernelPdS_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
c76c915e8815eb4da18fb5a63fce2f6171654add
#include "includes.h" __global__ void bcnn_grad_scales_kernel(float *x_norm, float *delta, int batch, int n, int size, float *scale_updates) { __shared__ float part[BCNN_CUDA_THREADS]; int i, b; int filter = blockIdx.x; int p = threadIdx.x; float sum = 0; for (b = 0; b < batch; ++b) { for (i = 0; i < size; i += BCNN_CUDA_THREADS) { int index = p + i + size * (filter + n * b); sum += (p + i < size) ? delta[index] * x_norm[index] : 0; } } part[p] = sum; __syncthreads(); if (p == 0) { for (i = 0; i < BCNN_CUDA_THREADS; ++i) scale_updates[filter] += part[i]; } }
.file "tmpxft_002cd6f5_00000000-6_bcnn_grad_scales_kernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z50__device_stub__Z23bcnn_grad_scales_kernelPfS_iiiS_PfS_iiiS_ .type _Z50__device_stub__Z23bcnn_grad_scales_kernelPfS_iiiS_PfS_iiiS_, @function _Z50__device_stub__Z23bcnn_grad_scales_kernelPfS_iiiS_PfS_iiiS_: .LFB2032: .cfi_startproc endbr64 subq $184, %rsp .cfi_def_cfa_offset 192 movq %rdi, 40(%rsp) leaq 72(%rsp), %rdi movq %rsi, 32(%rsp) leaq 84(%rsp), %rsi movl %edx, 28(%rsp) leaq 56(%rsp), %rdx movl %ecx, 24(%rsp) leaq 64(%rsp), %rcx movl %r8d, 20(%rsp) movq %r9, 8(%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 80(%rsp) movq %rax, 120(%rsp) leaq 32(%rsp), %rax movq %rax, 128(%rsp) leaq 28(%rsp), %rax movq %rax, 136(%rsp) leaq 24(%rsp), %rax movq %rax, 144(%rsp) leaq 20(%rsp), %rax movq %rax, 152(%rsp) leaq 8(%rsp), %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 64(%rsp) .cfi_def_cfa_offset 200 leaq _Z23bcnn_grad_scales_kernelPfS_iiiS_(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 208 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 136(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L2: movq 168(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z50__device_stub__Z23bcnn_grad_scales_kernelPfS_iiiS_PfS_iiiS_, .-_Z50__device_stub__Z23bcnn_grad_scales_kernelPfS_iiiS_PfS_iiiS_ .globl _Z23bcnn_grad_scales_kernelPfS_iiiS_ .type _Z23bcnn_grad_scales_kernelPfS_iiiS_, @function _Z23bcnn_grad_scales_kernelPfS_iiiS_: .LFB2033: .cfi_startproc endbr64 jmp _Z50__device_stub__Z23bcnn_grad_scales_kernelPfS_iiiS_PfS_iiiS_ .cfi_endproc .LFE2033: .size _Z23bcnn_grad_scales_kernelPfS_iiiS_, .-_Z23bcnn_grad_scales_kernelPfS_iiiS_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z23bcnn_grad_scales_kernelPfS_iiiS_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z23bcnn_grad_scales_kernelPfS_iiiS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z23bcnn_grad_scales_kernelPfS_iiiS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ MOV R2, 0x1 ; /* 0x0000000100027802 */ /* 0x000fe20000000f00 */ /*0020*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0030*/ ULDC.64 UR10, c[0x0][0x118] ; /* 0x00004600000a7ab9 */ /* 0x000fe20000000a00 */ /*0040*/ MOV R24, RZ ; /* 0x000000ff00187202 */ /* 0x000fe40000000f00 */ /*0050*/ S2R R10, SR_TID.X ; /* 0x00000000000a7919 */ /* 0x000e620000002100 */ /*0060*/ ISETP.LE.AND P0, PT, R2, c[0x0][0x178], PT ; /* 0x00005e0002007a0c */ /* 0x000fc80003f03270 */ /*0070*/ ISETP.GT.OR P0, PT, R2, c[0x0][0x170], !P0 ; /* 0x00005c0002007a0c */ /* 0x000fda0004704670 */ /*0080*/ @P0 BRA 0x15d0 ; /* 0x0000154000000947 */ /* 0x000fea0003800000 */ /*0090*/ MOV R12, 0x1 ; /* 0x00000001000c7802 */ /* 0x000fe40000000f00 */ /*00a0*/ IADD3 R14, R10, 0xc00, RZ ; /* 0x00000c000a0e7810 */ /* 0x002fe40007ffe0ff */ /*00b0*/ IADD3 R12, -R12, c[0x0][0x178], RZ ; /* 0x00005e000c0c7a10 */ /* 0x000fe40007ffe1ff */ /*00c0*/ MOV R24, RZ ; /* 0x000000ff00187202 */ /* 0x000fe40000000f00 */ /*00d0*/ SHF.R.U32.HI R16, RZ, 0xa, R12 ; /* 0x0000000aff107819 */ /* 0x000fe4000001160c */ /*00e0*/ MOV R15, RZ ; /* 0x000000ff000f7202 */ /* 0x000fc40000000f00 */ /*00f0*/ IADD3 R13, R16, 0x1, RZ ; /* 0x00000001100d7810 */ /* 0x000fc80007ffe0ff */ /*0100*/ LOP3.LUT R13, R13, 0x3, RZ, 0xc0, !PT ; /* 0x000000030d0d7812 */ /* 0x000fc800078ec0ff */ /*0110*/ IADD3 R16, -R16, -0x1, R13 ; /* 0xffffffff10107810 */ /* 0x000fe40007ffe10d */ /*0120*/ ISETP.GE.U32.AND P0, PT, R12, 0xc00, PT ; /* 0x00000c000c00780c */ /* 0x000fe20003f06070 */ /*0130*/ IMAD R17, R15.reuse, c[0x0][0x174], R0 ; /* 0x00005d000f117a24 */ /* 0x041fe200078e0200 */ /*0140*/ IADD3 R15, R15, 0x1, RZ ; /* 0x000000010f0f7810 */ /* 0x000fe20007ffe0ff */ /*0150*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fc60008000000 */ /*0160*/ ISETP.GE.AND P1, PT, R15, c[0x0][0x170], PT ; /* 0x00005c000f007a0c */ /* 0x000fce0003f26270 */ /*0170*/ @!P0 BRA 0x1330 ; /* 0x000011b000008947 */ /* 0x000fea0003800000 */ /*0180*/ ISETP.GE.AND P0, PT, R16, RZ, PT ; /* 0x000000ff1000720c */ /* 0x000fe20003f06270 */ /*0190*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*01a0*/ IMAD R19, R17, c[0x0][0x178], R10 ; /* 0x00005e0011137a24 */ /* 0x000fe200078e020a */ /*01b0*/ ULDC.64 UR8, c[0x0][0x168] ; /* 0x00005a0000087ab9 */ /* 0x000fe20000000a00 */ /*01c0*/ MOV R20, R16 ; /* 0x0000001000147202 */ /* 0x000fe20000000f00 */ /*01d0*/ ULDC.64 UR6, c[0x0][0x160] ; /* 0x0000580000067ab9 */ /* 0x000fe20000000a00 */ /*01e0*/ MOV R11, R14 ; /* 0x0000000e000b7202 */ /* 0x000fce0000000f00 */ /*01f0*/ @P0 BRA 0x10a0 ; /* 0x00000ea000000947 */ /* 0x000fea0003800000 */ /*0200*/ IADD3 R2, -R20, RZ, RZ ; /* 0x000000ff14027210 */ /* 0x000fe40007ffe1ff */ /*0210*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0f070 */ /*0220*/ ISETP.GT.AND P2, PT, R2, 0xc, PT ; /* 0x0000000c0200780c */ /* 0x000fda0003f44270 */ /*0230*/ @!P2 BRA 0xb50 ; /* 0x000009100000a947 */ /* 0x000fea0003800000 */ /*0240*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0250*/ IADD3 R2, R11, -0x800, RZ ; /* 0xfffff8000b027810 */ /* 0x000fe40007ffe0ff */ /*0260*/ MOV R6, UR8 ; /* 0x0000000800067c02 */ /* 0x000fe40008000f00 */ /*0270*/ ISETP.GE.AND P2, PT, R2, c[0x0][0x178], PT ; /* 0x00005e0002007a0c */ /* 0x000fe40003f46270 */ /*0280*/ MOV R7, UR9 ; /* 0x0000000900077c02 */ /* 0x000fe40008000f00 */ /*0290*/ MOV R8, UR6 ; /* 0x0000000600087c02 */ /* 0x000fe40008000f00 */ /*02a0*/ MOV R9, UR7 ; /* 0x0000000700097c02 */ /* 0x000fe20008000f00 */ /*02b0*/ IMAD.WIDE R6, R19, 0x4, R6 ; /* 0x0000000413067825 */ /* 0x000fc800078e0206 */ /*02c0*/ IMAD.WIDE R8, R19, 0x4, R8 ; /* 0x0000000413087825 */ /* 0x000fe400078e0208 */ /*02d0*/ @!P2 LDG.E R5, [R6.64+0x1000] ; /* 0x0010000a0605a981 */ /* 0x000ea8000c1e1900 */ /*02e0*/ @!P2 LDG.E R4, [R8.64+0x1000] ; /* 0x0010000a0804a981 */ /* 0x000ea2000c1e1900 */ /*02f0*/ IADD3 R3, R11.reuse, -0x400, RZ ; /* 0xfffffc000b037810 */ /* 0x040fe40007ffe0ff */ /*0300*/ IADD3 R2, R11, -0xc00, RZ ; /* 0xfffff4000b027810 */ /* 0x000fe40007ffe0ff */ /*0310*/ ISETP.GE.AND P3, PT, R3, c[0x0][0x178], PT ; /* 0x00005e0003007a0c */ /* 0x000fc40003f66270 */ /*0320*/ ISETP.GE.AND P4, PT, R2, c[0x0][0x178], PT ; /* 0x00005e0002007a0c */ /* 0x000fe40003f86270 */ /*0330*/ IADD3 R18, R11.reuse, 0x400, RZ ; /* 0x000004000b127810 */ /* 0x040fe40007ffe0ff */ /*0340*/ ISETP.GE.AND P5, PT, R11.reuse, c[0x0][0x178], PT ; /* 0x00005e000b007a0c */ /* 0x040fe40003fa6270 */ /*0350*/ ISETP.GE.AND P6, PT, R18, c[0x0][0x178], PT ; /* 0x00005e0012007a0c */ /* 0x000fe20003fc6270 */ /*0360*/ CS2R R22, SRZ ; /* 0x0000000000167805 */ /* 0x000fe2000001ff00 */ /*0370*/ IADD3 R18, R11, 0x800, RZ ; /* 0x000008000b127810 */ /* 0x000fc60007ffe0ff */ /*0380*/ @!P3 LDG.E R21, [R8.64+0x2000] ; /* 0x0020000a0815b981 */ /* 0x000ee8000c1e1900 */ /*0390*/ @!P3 LDG.E R30, [R6.64+0x2000] ; /* 0x0020000a061eb981 */ /* 0x000ee8000c1e1900 */ /*03a0*/ @!P4 LDG.E R2, [R6.64] ; /* 0x0000000a0602c981 */ /* 0x000f28000c1e1900 */ /*03b0*/ @!P4 LDG.E R3, [R8.64] ; /* 0x0000000a0803c981 */ /* 0x000f28000c1e1900 */ /*03c0*/ @!P5 LDG.E R25, [R8.64+0x3000] ; /* 0x0030000a0819d981 */ /* 0x000f68000c1e1900 */ /*03d0*/ @!P5 LDG.E R32, [R6.64+0x3000] ; /* 0x0030000a0620d981 */ /* 0x000f68000c1e1900 */ /*03e0*/ @!P6 LDG.E R27, [R6.64+0x4000] ; /* 0x0040000a061be981 */ /* 0x000f68000c1e1900 */ /*03f0*/ @!P6 LDG.E R28, [R8.64+0x4000] ; /* 0x0040000a081ce981 */ /* 0x000f62000c1e1900 */ /*0400*/ @!P2 FMUL R22, R4, R5 ; /* 0x000000050416a220 */ /* 0x004fe20000400000 */ /*0410*/ ISETP.GE.AND P2, PT, R18, c[0x0][0x178], PT ; /* 0x00005e0012007a0c */ /* 0x000fda0003f46270 */ /*0420*/ @!P2 LDG.E R26, [R8.64+0x5000] ; /* 0x0050000a081aa981 */ /* 0x0000a8000c1e1900 */ /*0430*/ @!P2 LDG.E R29, [R6.64+0x5000] ; /* 0x0050000a061da981 */ /* 0x0002a2000c1e1900 */ /*0440*/ IADD3 R4, R11.reuse, 0xc00, RZ ; /* 0x00000c000b047810 */ /* 0x040fe40007ffe0ff */ /*0450*/ IADD3 R5, R11, 0x1000, RZ ; /* 0x000010000b057810 */ /* 0x000fe40007ffe0ff */ /*0460*/ MOV R18, RZ ; /* 0x000000ff00127202 */ /* 0x000fe20000000f00 */ /*0470*/ @!P3 FMUL R18, R21, R30 ; /* 0x0000001e1512b220 */ /* 0x008fe20000400000 */ /*0480*/ ISETP.GE.AND P3, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */ /* 0x000fe20003f66270 */ /*0490*/ @!P4 FMUL R23, R2, R3 ; /* 0x000000030217c220 */ /* 0x010fe20000400000 */ /*04a0*/ ISETP.GE.AND P4, PT, R5, c[0x0][0x178], PT ; /* 0x00005e0005007a0c */ /* 0x000fe20003f86270 */ /*04b0*/ UIADD3 UR13, UP1, UR8, 0x4000, URZ ; /* 0x00004000080d7890 */ /* 0x000fc4000ff3e03f */ /*04c0*/ UIADD3 UR5, UP0, UR6, 0x4000, URZ ; /* 0x0000400006057890 */ /* 0x000fe2000ff1e03f */ /*04d0*/ MOV R21, RZ ; /* 0x000000ff00157202 */ /* 0x000fe20000000f00 */ /*04e0*/ UIADD3.X UR14, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f0e7290 */ /* 0x000fe20008ffe43f */ /*04f0*/ IADD3 R2, R11, 0x1400, RZ ; /* 0x000014000b027810 */ /* 0x000fe20007ffe0ff */ /*0500*/ @!P5 FMUL R21, R25, R32 ; /* 0x000000201915d220 */ /* 0x020fc80000400000 */ /*0510*/ @!P3 LDG.E R33, [R6.64+0x6000] ; /* 0x0060000a0621b981 */ /* 0x0002e2000c1e1900 */ /*0520*/ UIADD3.X UR12, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f0c7290 */ /* 0x000fe200087fe43f */ /*0530*/ MOV R25, RZ ; /* 0x000000ff00197202 */ /* 0x000fe40000000f00 */ /*0540*/ IADD3 R34, R11, 0x1800, RZ ; /* 0x000018000b227810 */ /* 0x000fe20007ffe0ff */ /*0550*/ @!P4 LDG.E R32, [R6.64+0x7000] ; /* 0x0070000a0620c981 */ /* 0x000322000c1e1900 */ /*0560*/ ISETP.GE.AND P5, PT, R2, c[0x0][0x178], PT ; /* 0x00005e0002007a0c */ /* 0x000fe20003fa6270 */ /*0570*/ @!P6 FMUL R25, R27, R28 ; /* 0x0000001c1b19e220 */ /* 0x000fe20000400000 */ /*0580*/ MOV R27, RZ ; /* 0x000000ff001b7202 */ /* 0x000fe20000000f00 */ /*0590*/ @!P3 LDG.E R30, [R8.64+0x6000] ; /* 0x0060000a081eb981 */ /* 0x0000e2000c1e1900 */ /*05a0*/ MOV R2, UR13 ; /* 0x0000000d00027c02 */ /* 0x000fc60008000f00 */ /*05b0*/ @!P4 LDG.E R31, [R8.64+0x7000] ; /* 0x0070000a081fc981 */ /* 0x000122000c1e1900 */ /*05c0*/ IADD3 R6, R11, 0x1c00, RZ ; /* 0x00001c000b067810 */ /* 0x002fe40007ffe0ff */ /*05d0*/ MOV R4, UR5 ; /* 0x0000000500047c02 */ /* 0x000fe40008000f00 */ /*05e0*/ MOV R3, UR14 ; /* 0x0000000e00037c02 */ /* 0x000fe40008000f00 */ /*05f0*/ MOV R5, UR12 ; /* 0x0000000c00057c02 */ /* 0x000fe40008000f00 */ /*0600*/ ISETP.GE.AND P6, PT, R34, c[0x0][0x178], PT ; /* 0x00005e0022007a0c */ /* 0x000fe20003fc6270 */ /*0610*/ IMAD.WIDE R2, R19, 0x4, R2 ; /* 0x0000000413027825 */ /* 0x000fc800078e0202 */ /*0620*/ IMAD.WIDE R8, R19, 0x4, R4 ; /* 0x0000000413087825 */ /* 0x001fe400078e0204 */ /*0630*/ @!P5 LDG.E R4, [R2.64+0x4000] ; /* 0x0040000a0204d981 */ /* 0x000f68000c1e1900 */ /*0640*/ @!P5 LDG.E R5, [R8.64+0x4000] ; /* 0x0040000a0805d981 */ /* 0x000168000c1e1900 */ /*0650*/ @!P6 LDG.E R7, [R8.64+0x5000] ; /* 0x0050000a0807e981 */ /* 0x000162000c1e1900 */ /*0660*/ @!P2 FMUL R27, R26, R29 ; /* 0x0000001d1a1ba220 */ /* 0x004fe20000400000 */ /*0670*/ ISETP.GE.AND P2, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fc40003f46270 */ /*0680*/ @!P6 LDG.E R6, [R2.64+0x5000] ; /* 0x0050000a0206e981 */ /* 0x0002b6000c1e1900 */ /*0690*/ @!P2 LDG.E R29, [R8.64+0x6000] ; /* 0x0060000a081da981 */ /* 0x0000a8000c1e1900 */ /*06a0*/ @!P2 LDG.E R26, [R2.64+0x6000] ; /* 0x0060000a021aa981 */ /* 0x0002a2000c1e1900 */ /*06b0*/ MOV R28, RZ ; /* 0x000000ff001c7202 */ /* 0x000fe20000000f00 */ /*06c0*/ UIADD3 UR13, UP1, UR8, 0x8000, URZ ; /* 0x00008000080d7890 */ /* 0x000fc4000ff3e03f */ /*06d0*/ UIADD3 UR5, UP0, UR6, 0x8000, URZ ; /* 0x0000800006057890 */ /* 0x000fe2000ff1e03f */ /*06e0*/ @!P3 FMUL R28, R30, R33 ; /* 0x000000211e1cb220 */ /* 0x008fe20000400000 */ /*06f0*/ MOV R30, RZ ; /* 0x000000ff001e7202 */ /* 0x000fe20000000f00 */ /*0700*/ @!P4 FMUL R30, R31, R32 ; /* 0x000000201f1ec220 */ /* 0x010fe20000400000 */ /*0710*/ IADD3 R31, R11, 0x2000, RZ ; /* 0x000020000b1f7810 */ /* 0x000fe20007ffe0ff */ /*0720*/ CS2R R32, SRZ ; /* 0x0000000000207805 */ /* 0x000fe2000001ff00 */ /*0730*/ UIADD3.X UR14, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f0e7290 */ /* 0x000fe40008ffe43f */ /*0740*/ ISETP.GE.AND P3, PT, R31, c[0x0][0x178], PT ; /* 0x00005e001f007a0c */ /* 0x000fe20003f66270 */ /*0750*/ UIADD3.X UR12, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f0c7290 */ /* 0x000fe200087fe43f */ /*0760*/ IADD3 R31, R11, 0x2400, RZ ; /* 0x000024000b1f7810 */ /* 0x000fc80007ffe0ff */ /*0770*/ ISETP.GE.AND P4, PT, R31, c[0x0][0x178], PT ; /* 0x00005e001f007a0c */ /* 0x000fe40003f86270 */ /*0780*/ MOV R31, RZ ; /* 0x000000ff001f7202 */ /* 0x000fe40000000f00 */ /*0790*/ IADD3 R34, R11, 0x2c00, RZ ; /* 0x00002c000b227810 */ /* 0x000fc60007ffe0ff */ /*07a0*/ @!P3 LDG.E R8, [R8.64+0x7000] ; /* 0x0070000a0808b981 */ /* 0x0010e2000c1e1900 */ /*07b0*/ @!P5 FMUL R32, R4, R5 ; /* 0x000000050420d220 */ /* 0x020fe20000400000 */ /*07c0*/ IADD3 R4, R11, 0x2800, RZ ; /* 0x000028000b047810 */ /* 0x000fe40007ffe0ff */ /*07d0*/ @!P3 LDG.E R3, [R2.64+0x7000] ; /* 0x0070000a0203b981 */ /* 0x0022e4000c1e1900 */ /*07e0*/ ISETP.GE.AND P5, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */ /* 0x000fe40003fa6270 */ /*07f0*/ MOV R4, UR5 ; /* 0x0000000500047c02 */ /* 0x000fe40008000f00 */ /*0800*/ MOV R5, UR12 ; /* 0x0000000c00057c02 */ /* 0x000fca0008000f00 */ /*0810*/ IMAD.WIDE R4, R19, 0x4, R4 ; /* 0x0000000413047825 */ /* 0x000fca00078e0204 */ /*0820*/ @!P4 LDG.E R9, [R4.64+0x4000] ; /* 0x0040000a0409c981 */ /* 0x001122000c1e1900 */ /*0830*/ @!P6 FMUL R31, R7, R6 ; /* 0x00000006071fe220 */ /* 0x004fe20000400000 */ /*0840*/ MOV R6, UR13 ; /* 0x0000000d00067c02 */ /* 0x000fe40008000f00 */ /*0850*/ MOV R7, UR14 ; /* 0x0000000e00077c02 */ /* 0x000fe20008000f00 */ /*0860*/ @!P2 FMUL R33, R29, R26 ; /* 0x0000001a1d21a220 */ /* 0x000fe20000400000 */ /*0870*/ IADD3 R29, R11, 0x3000, RZ ; /* 0x000030000b1d7810 */ /* 0x000fc80007ffe0ff */ /*0880*/ ISETP.GE.AND P2, PT, R29, c[0x0][0x178], PT ; /* 0x00005e001d007a0c */ /* 0x000fe20003f46270 */ /*0890*/ IMAD.WIDE R6, R19, 0x4, R6 ; /* 0x0000000413067825 */ /* 0x000fe200078e0206 */ /*08a0*/ ISETP.GE.AND P6, PT, R34, c[0x0][0x178], PT ; /* 0x00005e0022007a0c */ /* 0x000fe20003fc6270 */ /*08b0*/ FADD R29, R23, R24 ; /* 0x00000018171d7221 */ /* 0x000fe40000000000 */ /*08c0*/ @!P5 LDG.E R23, [R4.64+0x5000] ; /* 0x0050000a0417d981 */ /* 0x0000a8000c1e1900 */ /*08d0*/ @!P5 LDG.E R2, [R6.64+0x5000] ; /* 0x0050000a0602d981 */ /* 0x002ea8000c1e1900 */ /*08e0*/ @!P4 LDG.E R26, [R6.64+0x4000] ; /* 0x0040000a061ac981 */ /* 0x000f28000c1e1900 */ /*08f0*/ @!P2 LDG.E R24, [R4.64+0x7000] ; /* 0x0070000a0418a981 */ /* 0x000168000c1e1900 */ /*0900*/ @!P2 LDG.E R35, [R6.64+0x7000] ; /* 0x0070000a0623a981 */ /* 0x000362000c1e1900 */ /*0910*/ FADD R37, R29, R22 ; /* 0x000000161d257221 */ /* 0x000fc60000000000 */ /*0920*/ @!P6 LDG.E R29, [R4.64+0x6000] ; /* 0x0060000a041de981 */ /* 0x000168000c1e1900 */ /*0930*/ @!P6 LDG.E R22, [R6.64+0x6000] ; /* 0x0060000a0616e981 */ /* 0x000362000c1e1900 */ /*0940*/ FADD R18, R37, R18 ; /* 0x0000001225127221 */ /* 0x000fc80000000000 */ /*0950*/ FADD R18, R18, R21 ; /* 0x0000001512127221 */ /* 0x000fc80000000000 */ /*0960*/ FADD R18, R18, R25 ; /* 0x0000001912127221 */ /* 0x000fc80000000000 */ /*0970*/ FADD R27, R18, R27 ; /* 0x0000001b121b7221 */ /* 0x000fc80000000000 */ /*0980*/ FADD R27, R27, R28 ; /* 0x0000001c1b1b7221 */ /* 0x000fc80000000000 */ /*0990*/ FADD R27, R27, R30 ; /* 0x0000001e1b1b7221 */ /* 0x000fc80000000000 */ /*09a0*/ FADD R32, R27, R32 ; /* 0x000000201b207221 */ /* 0x000fe20000000000 */ /*09b0*/ MOV R18, RZ ; /* 0x000000ff00127202 */ /* 0x000fc60000000f00 */ /*09c0*/ FADD R32, R32, R31 ; /* 0x0000001f20207221 */ /* 0x000fe20000000000 */ /*09d0*/ @!P3 FMUL R18, R8, R3 ; /* 0x000000030812b220 */ /* 0x008fe20000400000 */ /*09e0*/ MOV R3, RZ ; /* 0x000000ff00037202 */ /* 0x000fe40000000f00 */ /*09f0*/ FADD R33, R32, R33 ; /* 0x0000002120217221 */ /* 0x000fe20000000000 */ /*0a00*/ IADD3 R20, R20, 0x10, RZ ; /* 0x0000001014147810 */ /* 0x000fe40007ffe0ff */ /*0a10*/ MOV R4, RZ ; /* 0x000000ff00047202 */ /* 0x001fe20000000f00 */ /*0a20*/ FADD R33, R33, R18 ; /* 0x0000001221217221 */ /* 0x000fe20000000000 */ /*0a30*/ UIADD3 UR6, UP0, UR6, 0x10000, URZ ; /* 0x0001000006067890 */ /* 0x000fe4000ff1e03f */ /*0a40*/ UIADD3 UR8, UP1, UR8, 0x10000, URZ ; /* 0x0001000008087890 */ /* 0x000fc4000ff3e03f */ /*0a50*/ UIADD3 UR4, UR4, 0x4000, URZ ; /* 0x0000400004047890 */ /* 0x000fe4000fffe03f */ /*0a60*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe400087fe43f */ /*0a70*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */ /* 0x000fe20008ffe43f */ /*0a80*/ IADD3 R11, R11, 0x4000, RZ ; /* 0x000040000b0b7810 */ /* 0x000fe20007ffe0ff */ /*0a90*/ @!P5 FMUL R3, R23, R2 ; /* 0x000000021703d220 */ /* 0x004fe20000400000 */ /*0aa0*/ MOV R2, RZ ; /* 0x000000ff00027202 */ /* 0x000fe20000000f00 */ /*0ab0*/ @!P4 FMUL R4, R26, R9 ; /* 0x000000091a04c220 */ /* 0x010fc80000400000 */ /*0ac0*/ FADD R6, R33, R4 ; /* 0x0000000421067221 */ /* 0x002fe20000000000 */ /*0ad0*/ @!P2 FMUL R2, R24, R35 ; /* 0x000000231802a220 */ /* 0x020fe20000400000 */ /*0ae0*/ ISETP.GE.AND P2, PT, R20, -0xc, PT ; /* 0xfffffff41400780c */ /* 0x000fe40003f46270 */ /*0af0*/ FADD R3, R6, R3 ; /* 0x0000000306037221 */ /* 0x000fe20000000000 */ /*0b00*/ MOV R4, RZ ; /* 0x000000ff00047202 */ /* 0x000fe20000000f00 */ /*0b10*/ @!P6 FMUL R4, R29, R22 ; /* 0x000000161d04e220 */ /* 0x000fc80000400000 */ /*0b20*/ FADD R3, R3, R4 ; /* 0x0000000403037221 */ /* 0x000fc80000000000 */ /*0b30*/ FADD R24, R3, R2 ; /* 0x0000000203187221 */ /* 0x000fe20000000000 */ /*0b40*/ @!P2 BRA 0x250 ; /* 0xfffff7000000a947 */ /* 0x000fea000383ffff */ /*0b50*/ IADD3 R2, -R20, RZ, RZ ; /* 0x000000ff14027210 */ /* 0x000fc80007ffe1ff */ /*0b60*/ ISETP.GT.AND P2, PT, R2, 0x4, PT ; /* 0x000000040200780c */ /* 0x000fda0003f44270 */ /*0b70*/ @!P2 BRA 0x1080 ; /* 0x000005000000a947 */ /* 0x000fea0003800000 */ /*0b80*/ IADD3 R4, R11.reuse, -0xc00, RZ ; /* 0xfffff4000b047810 */ /* 0x040fe40007ffe0ff */ /*0b90*/ MOV R2, UR8 ; /* 0x0000000800027c02 */ /* 0x000fe40008000f00 */ /*0ba0*/ ISETP.GE.AND P6, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */ /* 0x000fe40003fc6270 */ /*0bb0*/ IADD3 R4, R11, -0x800, RZ ; /* 0xfffff8000b047810 */ /* 0x000fe40007ffe0ff */ /*0bc0*/ MOV R3, UR9 ; /* 0x0000000900037c02 */ /* 0x000fe40008000f00 */ /*0bd0*/ MOV R8, UR6 ; /* 0x0000000600087c02 */ /* 0x000fc40008000f00 */ /*0be0*/ MOV R9, UR7 ; /* 0x0000000700097c02 */ /* 0x000fe20008000f00 */ /*0bf0*/ IMAD.WIDE R2, R19, 0x4, R2 ; /* 0x0000000413027825 */ /* 0x000fe200078e0202 */ /*0c00*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */ /* 0x000fc60003f06270 */ /*0c10*/ IMAD.WIDE R8, R19, 0x4, R8 ; /* 0x0000000413087825 */ /* 0x000fe200078e0208 */ /*0c20*/ @!P6 LDG.E R30, [R2.64] ; /* 0x0000000a021ee981 */ /* 0x000ea8000c1e1900 */ /*0c30*/ @!P6 LDG.E R27, [R8.64] ; /* 0x0000000a081be981 */ /* 0x0000aa000c1e1900 */ /*0c40*/ @!P0 LDG.E R26, [R8.64+0x1000] ; /* 0x0010000a081a8981 */ /* 0x0000e8000c1e1900 */ /*0c50*/ @!P0 LDG.E R23, [R2.64+0x1000] ; /* 0x0010000a02178981 */ /* 0x000ee2000c1e1900 */ /*0c60*/ IADD3 R4, R11.reuse, -0x400, RZ ; /* 0xfffffc000b047810 */ /* 0x040fe20007ffe0ff */ /*0c70*/ UIADD3 UR8, UP1, UR8, 0x4000, URZ ; /* 0x0000400008087890 */ /* 0x000fe2000ff3e03f */ /*0c80*/ IADD3 R18, R11.reuse, 0x1000, RZ ; /* 0x000010000b127810 */ /* 0x040fe20007ffe0ff */ /*0c90*/ UIADD3 UR6, UP0, UR6, 0x4000, URZ ; /* 0x0000400006067890 */ /* 0x000fe2000ff1e03f */ /*0ca0*/ ISETP.GE.AND P2, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */ /* 0x000fe20003f46270 */ /*0cb0*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */ /* 0x000fe20008ffe43f */ /*0cc0*/ ISETP.GE.AND P3, PT, R11.reuse, c[0x0][0x178], PT ; /* 0x00005e000b007a0c */ /* 0x040fe20003f66270 */ /*0cd0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*0ce0*/ IADD3 R4, R11, 0x400, RZ ; /* 0x000004000b047810 */ /* 0x000fc40007ffe0ff */ /*0cf0*/ IADD3 R5, R18, -0x800, RZ ; /* 0xfffff80012057810 */ /* 0x000fe40007ffe0ff */ /*0d00*/ ISETP.GE.AND P4, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */ /* 0x000fe40003f86270 */ /*0d10*/ ISETP.GE.AND P5, PT, R5, c[0x0][0x178], PT ; /* 0x00005e0005007a0c */ /* 0x000fe40003fa6270 */ /*0d20*/ MOV R6, UR8 ; /* 0x0000000800067c02 */ /* 0x000fe20008000f00 */ /*0d30*/ @!P2 LDG.E R11, [R8.64+0x2000] ; /* 0x0020000a080ba981 */ /* 0x000122000c1e1900 */ /*0d40*/ MOV R4, UR6 ; /* 0x0000000600047c02 */ /* 0x000fe40008000f00 */ /*0d50*/ MOV R7, UR9 ; /* 0x0000000900077c02 */ /* 0x000fe20008000f00 */ /*0d60*/ @!P2 LDG.E R22, [R2.64+0x2000] ; /* 0x0020000a0216a981 */ /* 0x000322000c1e1900 */ /*0d70*/ MOV R5, UR7 ; /* 0x0000000700057c02 */ /* 0x000fc40008000f00 */ /*0d80*/ IADD3 R29, R18, -0x400, RZ ; /* 0xfffffc00121d7810 */ /* 0x000fe40007ffe0ff */ /*0d90*/ MOV R25, RZ ; /* 0x000000ff00197202 */ /* 0x000fe20000000f00 */ /*0da0*/ IMAD.WIDE R6, R19.reuse, 0x4, R6 ; /* 0x0000000413067825 */ /* 0x040fe200078e0206 */ /*0db0*/ @!P3 LDG.E R21, [R8.64+0x3000] ; /* 0x0030000a0815b981 */ /* 0x000166000c1e1900 */ /*0dc0*/ IMAD.WIDE R4, R19, 0x4, R4 ; /* 0x0000000413047825 */ /* 0x000fe200078e0204 */ /*0dd0*/ @!P3 LDG.E R28, [R2.64+0x3000] ; /* 0x0030000a021cb981 */ /* 0x000368000c1e1900 */ /*0de0*/ @!P4 LDG.E R9, [R6.64] ; /* 0x0000000a0609c981 */ /* 0x001f68000c1e1900 */ /*0df0*/ @!P4 LDG.E R8, [R4.64] ; /* 0x0000000a0408c981 */ /* 0x000162000c1e1900 */ /*0e00*/ @!P6 FMUL R25, R30, R27 ; /* 0x0000001b1e19e220 */ /* 0x004fe20000400000 */ /*0e10*/ ISETP.GE.AND P6, PT, R29, c[0x0][0x178], PT ; /* 0x00005e001d007a0c */ /* 0x000fc40003fc6270 */ /*0e20*/ @!P5 LDG.E R27, [R4.64+0x1000] ; /* 0x0010000a041bd981 */ /* 0x0000a2000c1e1900 */ /*0e30*/ MOV R29, RZ ; /* 0x000000ff001d7202 */ /* 0x000fe20000000f00 */ /*0e40*/ @!P0 FMUL R29, R26, R23 ; /* 0x000000171a1d8220 */ /* 0x008fe20000400000 */ /*0e50*/ ISETP.GE.AND P0, PT, R18, c[0x0][0x178], PT ; /* 0x00005e0012007a0c */ /* 0x000fe20003f06270 */ /*0e60*/ @!P5 LDG.E R26, [R6.64+0x1000] ; /* 0x0010000a061ad981 */ /* 0x000eae000c1e1900 */ /*0e70*/ @!P6 LDG.E R3, [R4.64+0x2000] ; /* 0x0020000a0403e981 */ /* 0x0020e8000c1e1900 */ /*0e80*/ @!P6 LDG.E R2, [R6.64+0x2000] ; /* 0x0020000a0602e981 */ /* 0x000ee8000c1e1900 */ /*0e90*/ @!P0 LDG.E R23, [R4.64+0x3000] ; /* 0x0030000a04178981 */ /* 0x0000e8000c1e1900 */ /*0ea0*/ @!P0 LDG.E R30, [R6.64+0x3000] ; /* 0x0030000a061e8981 */ /* 0x000ee2000c1e1900 */ /*0eb0*/ FADD R32, R24, R25 ; /* 0x0000001918207221 */ /* 0x000fe20000000000 */ /*0ec0*/ MOV R24, RZ ; /* 0x000000ff00187202 */ /* 0x000fe20000000f00 */ /*0ed0*/ @!P2 FMUL R24, R11, R22 ; /* 0x000000160b18a220 */ /* 0x010fc40000400000 */ /*0ee0*/ FADD R29, R32, R29 ; /* 0x0000001d201d7221 */ /* 0x000fe20000000000 */ /*0ef0*/ MOV R11, RZ ; /* 0x000000ff000b7202 */ /* 0x000fc60000000f00 */ /*0f00*/ FADD R24, R29, R24 ; /* 0x000000181d187221 */ /* 0x000fe20000000000 */ /*0f10*/ @!P3 FMUL R11, R21, R28 ; /* 0x0000001c150bb220 */ /* 0x020fe20000400000 */ /*0f20*/ MOV R21, RZ ; /* 0x000000ff00157202 */ /* 0x000fe20000000f00 */ /*0f30*/ CS2R R4, SRZ ; /* 0x0000000000047805 */ /* 0x001fe4000001ff00 */ /*0f40*/ FADD R24, R24, R11 ; /* 0x0000000b18187221 */ /* 0x000fe20000000000 */ /*0f50*/ @!P4 FMUL R21, R9, R8 ; /* 0x000000080915c220 */ /* 0x000fc80000400000 */ /*0f60*/ FADD R21, R24, R21 ; /* 0x0000001518157221 */ /* 0x000fe20000000000 */ /*0f70*/ MOV R24, RZ ; /* 0x000000ff00187202 */ /* 0x000fe40000000f00 */ /*0f80*/ IADD3 R20, R20, 0x4, RZ ; /* 0x0000000414147810 */ /* 0x000fe20007ffe0ff */ /*0f90*/ UIADD3 UR4, UR4, 0x1000, URZ ; /* 0x0000100004047890 */ /* 0x000fe2000fffe03f */ /*0fa0*/ IADD3 R11, R18, 0x1000, RZ ; /* 0x00001000120b7810 */ /* 0x000fe20007ffe0ff */ /*0fb0*/ UIADD3 UR6, UP0, UR6, 0x4000, URZ ; /* 0x0000400006067890 */ /* 0x000fe2000ff1e03f */ /*0fc0*/ IADD3 R20, R20, 0x4, RZ ; /* 0x0000000414147810 */ /* 0x000fe20007ffe0ff */ /*0fd0*/ UIADD3 UR8, UP1, UR8, 0x4000, URZ ; /* 0x0000400008087890 */ /* 0x000fe4000ff3e03f */ /*0fe0*/ UIADD3 UR4, UR4, 0x1000, URZ ; /* 0x0000100004047890 */ /* 0x000fc4000fffe03f */ /*0ff0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe400087fe43f */ /*1000*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */ /* 0x000fe20008ffe43f */ /*1010*/ @!P5 FMUL R4, R27, R26 ; /* 0x0000001a1b04d220 */ /* 0x004fc80000400000 */ /*1020*/ FADD R4, R21, R4 ; /* 0x0000000415047221 */ /* 0x000fe20000000000 */ /*1030*/ @!P6 FMUL R5, R3, R2 ; /* 0x000000020305e220 */ /* 0x008fc80000400000 */ /*1040*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fe20000000000 */ /*1050*/ @!P0 FMUL R24, R23, R30 ; /* 0x0000001e17188220 */ /* 0x000fe20000400000 */ /*1060*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc60003f0e170 */ /*1070*/ FADD R24, R5, R24 ; /* 0x0000001805187221 */ /* 0x000fe20000000000 */ /*1080*/ ISETP.NE.OR P0, PT, R20, RZ, P0 ; /* 0x000000ff1400720c */ /* 0x000fda0000705670 */ /*1090*/ @!P0 BRA 0x1330 ; /* 0x0000029000008947 */ /* 0x000fea0003800000 */ /*10a0*/ IADD3 R4, R11.reuse, -0xc00, RZ ; /* 0xfffff4000b047810 */ /* 0x040fe40007ffe0ff */ /*10b0*/ IADD3 R6, R11, -0x800, RZ ; /* 0xfffff8000b067810 */ /* 0x000fe40007ffe0ff */ /*10c0*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */ /* 0x000fe40003f06270 */ /*10d0*/ MOV R2, UR8 ; /* 0x0000000800027c02 */ /* 0x000fe40008000f00 */ /*10e0*/ MOV R3, UR9 ; /* 0x0000000900037c02 */ /* 0x000fe40008000f00 */ /*10f0*/ MOV R4, UR6 ; /* 0x0000000600047c02 */ /* 0x000fc40008000f00 */ /*1100*/ MOV R5, UR7 ; /* 0x0000000700057c02 */ /* 0x000fe20008000f00 */ /*1110*/ IMAD.WIDE R2, R19, 0x4, R2 ; /* 0x0000000413027825 */ /* 0x000fe200078e0202 */ /*1120*/ ISETP.GE.AND P2, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fe40003f46270 */ /*1130*/ IADD3 R6, R11, -0x400, RZ ; /* 0xfffffc000b067810 */ /* 0x000fe20007ffe0ff */ /*1140*/ IMAD.WIDE R4, R19, 0x4, R4 ; /* 0x0000000413047825 */ /* 0x000fc600078e0204 */ /*1150*/ ISETP.GE.AND P3, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fe40003f66270 */ /*1160*/ ISETP.GE.AND P4, PT, R11.reuse, c[0x0][0x178], PT ; /* 0x00005e000b007a0c */ /* 0x040fe20003f86270 */ /*1170*/ @!P0 LDG.E R6, [R2.64] ; /* 0x0000000a02068981 */ /* 0x000ea8000c1e1900 */ /*1180*/ @!P0 LDG.E R7, [R4.64] ; /* 0x0000000a04078981 */ /* 0x000ea8000c1e1900 */ /*1190*/ @!P2 LDG.E R8, [R4.64+0x1000] ; /* 0x0010000a0408a981 */ /* 0x000ee8000c1e1900 */ /*11a0*/ @!P2 LDG.E R9, [R2.64+0x1000] ; /* 0x0010000a0209a981 */ /* 0x000ee8000c1e1900 */ /*11b0*/ @!P3 LDG.E R18, [R4.64+0x2000] ; /* 0x0020000a0412b981 */ /* 0x000f28000c1e1900 */ /*11c0*/ @!P3 LDG.E R21, [R2.64+0x2000] ; /* 0x0020000a0215b981 */ /* 0x000f28000c1e1900 */ /*11d0*/ @!P4 LDG.E R22, [R4.64+0x3000] ; /* 0x0030000a0416c981 */ /* 0x000f68000c1e1900 */ /*11e0*/ @!P4 LDG.E R23, [R2.64+0x3000] ; /* 0x0030000a0217c981 */ /* 0x000f62000c1e1900 */ /*11f0*/ IADD3 R20, R20, 0x4, RZ ; /* 0x0000000414147810 */ /* 0x000fe20007ffe0ff */ /*1200*/ UIADD3 UR6, UP0, UR6, 0x4000, URZ ; /* 0x0000400006067890 */ /* 0x000fe2000ff1e03f */ /*1210*/ MOV R25, RZ ; /* 0x000000ff00197202 */ /* 0x000fe20000000f00 */ /*1220*/ UIADD3 UR8, UP1, UR8, 0x4000, URZ ; /* 0x0000400008087890 */ /* 0x000fe2000ff3e03f */ /*1230*/ IADD3 R11, R11, 0x1000, RZ ; /* 0x000010000b0b7810 */ /* 0x000fe20007ffe0ff */ /*1240*/ UIADD3 UR4, UR4, 0x1000, URZ ; /* 0x0000100004047890 */ /* 0x000fc4000fffe03f */ /*1250*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe400087fe43f */ /*1260*/ UIADD3.X UR9, URZ, UR9, URZ, UP1, !UPT ; /* 0x000000093f097290 */ /* 0x000fe20008ffe43f */ /*1270*/ @!P0 FMUL R25, R6, R7 ; /* 0x0000000706198220 */ /* 0x004fe20000400000 */ /*1280*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fe20003f05270 */ /*1290*/ CS2R R6, SRZ ; /* 0x0000000000067805 */ /* 0x000fe4000001ff00 */ /*12a0*/ FADD R25, R25, R24 ; /* 0x0000001819197221 */ /* 0x000fe20000000000 */ /*12b0*/ MOV R24, RZ ; /* 0x000000ff00187202 */ /* 0x000fe20000000f00 */ /*12c0*/ @!P2 FMUL R6, R8, R9 ; /* 0x000000090806a220 */ /* 0x008fc80000400000 */ /*12d0*/ FADD R6, R25, R6 ; /* 0x0000000619067221 */ /* 0x000fe20000000000 */ /*12e0*/ @!P3 FMUL R7, R18, R21 ; /* 0x000000151207b220 */ /* 0x010fc80000400000 */ /*12f0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fe20000000000 */ /*1300*/ @!P4 FMUL R24, R22, R23 ; /* 0x000000171618c220 */ /* 0x020fc80000400000 */ /*1310*/ FADD R24, R7, R24 ; /* 0x0000001807187221 */ /* 0x000fe20000000000 */ /*1320*/ @P0 BRA 0x10a0 ; /* 0xfffffd7000000947 */ /* 0x000fea000383ffff */ /*1330*/ ISETP.NE.AND P0, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */ /* 0x000fda0003f05270 */ /*1340*/ @!P0 BRA 0x15b0 ; /* 0x0000026000008947 */ /* 0x000fea0003800000 */ /*1350*/ IADD3 R8, R10, UR4, RZ ; /* 0x000000040a087c10 */ /* 0x000fe2000fffe0ff */ /*1360*/ BSSY B0, 0x1430 ; /* 0x000000c000007945 */ /* 0x000fe20003800000 */ /*1370*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe40000000f00 */ /*1380*/ ISETP.GE.AND P0, PT, R8, c[0x0][0x178], PT ; /* 0x00005e0008007a0c */ /* 0x000fe20003f06270 */ /*1390*/ IMAD R4, R17, c[0x0][0x178], R8 ; /* 0x00005e0011047a24 */ /* 0x000fe200078e0208 */ /*13a0*/ ISETP.NE.AND P2, PT, R13, 0x1, PT ; /* 0x000000010d00780c */ /* 0x000fe40003f45270 */ /*13b0*/ MOV R7, RZ ; /* 0x000000ff00077202 */ /* 0x000fe20000000f00 */ /*13c0*/ IMAD.WIDE R2, R4, R5, c[0x0][0x168] ; /* 0x00005a0004027625 */ /* 0x000fc800078e0205 */ /*13d0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e0205 */ /*13e0*/ @P0 BRA 0x1420 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*13f0*/ LDG.E R7, [R2.64] ; /* 0x0000000a02077981 */ /* 0x000ea8000c1e1900 */ /*1400*/ LDG.E R6, [R4.64] ; /* 0x0000000a04067981 */ /* 0x000ea4000c1e1900 */ /*1410*/ FMUL R7, R7, R6 ; /* 0x0000000607077220 */ /* 0x004fe40000400000 */ /*1420*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1430*/ FADD R24, R24, R7 ; /* 0x0000000718187221 */ /* 0x000fe20000000000 */ /*1440*/ @!P2 BRA 0x15b0 ; /* 0x000001600000a947 */ /* 0x000fea0003800000 */ /*1450*/ IADD3 R6, R8, 0x400, RZ ; /* 0x0000040008067810 */ /* 0x000fe20007ffe0ff */ /*1460*/ BSSY B0, 0x14f0 ; /* 0x0000008000007945 */ /* 0x000fe20003800000 */ /*1470*/ ISETP.NE.AND P2, PT, R13, 0x2, PT ; /* 0x000000020d00780c */ /* 0x000fe40003f45270 */ /*1480*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fc40003f06270 */ /*1490*/ MOV R7, RZ ; /* 0x000000ff00077202 */ /* 0x000fd60000000f00 */ /*14a0*/ @P0 BRA 0x14e0 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*14b0*/ LDG.E R7, [R4.64+0x1000] ; /* 0x0010000a04077981 */ /* 0x000ea8000c1e1900 */ /*14c0*/ LDG.E R6, [R2.64+0x1000] ; /* 0x0010000a02067981 */ /* 0x000ea4000c1e1900 */ /*14d0*/ FMUL R7, R7, R6 ; /* 0x0000000607077220 */ /* 0x004fe40000400000 */ /*14e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*14f0*/ FADD R24, R24, R7 ; /* 0x0000000718187221 */ /* 0x000fe20000000000 */ /*1500*/ @!P2 BRA 0x15b0 ; /* 0x000000a00000a947 */ /* 0x000fea0003800000 */ /*1510*/ IADD3 R6, R8, 0x800, RZ ; /* 0x0000080008067810 */ /* 0x000fe20007ffe0ff */ /*1520*/ BSSY B0, 0x15a0 ; /* 0x0000007000007945 */ /* 0x000fe20003800000 */ /*1530*/ MOV R7, RZ ; /* 0x000000ff00077202 */ /* 0x000fe40000000f00 */ /*1540*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*1550*/ @P0 BRA 0x1590 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*1560*/ LDG.E R4, [R4.64+0x2000] ; /* 0x0020000a04047981 */ /* 0x000ea8000c1e1900 */ /*1570*/ LDG.E R3, [R2.64+0x2000] ; /* 0x0020000a02037981 */ /* 0x000ea4000c1e1900 */ /*1580*/ FMUL R7, R4, R3 ; /* 0x0000000304077220 */ /* 0x004fe40000400000 */ /*1590*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*15a0*/ FADD R24, R24, R7 ; /* 0x0000000718187221 */ /* 0x000fe40000000000 */ /*15b0*/ @P1 CALL.REL.NOINC 0x15d0 ; /* 0x0000001000001944 */ /* 0x000fe20003c00000 */ /*15c0*/ BRA 0x120 ; /* 0xffffeb5000007947 */ /* 0x000fea000383ffff */ /*15d0*/ NOP ; /* 0x0000000000007918 */ /* 0x000fc80000000000 */ /*15e0*/ STS [R10.X4], R24 ; /* 0x000000180a007388 */ /* 0x0023e80000004800 */ /*15f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*1600*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fda0003f05270 */ /*1610*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*1620*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x002fe20000000f00 */ /*1630*/ LDS.128 R12, [RZ] ; /* 0x00000000ff0c7984 */ /* 0x000e680000000c00 */ /*1640*/ IMAD.WIDE R2, R0, R3, c[0x0][0x180] ; /* 0x0000600000027625 */ /* 0x001fe200078e0203 */ /*1650*/ LDS.128 R8, [0x10] ; /* 0x00001000ff087984 */ /* 0x000e280000000c00 */ /*1660*/ LDG.E R17, [R2.64] ; /* 0x0000000a02117981 */ /* 0x000e68000c1e1900 */ /*1670*/ LDS.128 R4, [0x20] ; /* 0x00002000ff047984 */ /* 0x000ea20000000c00 */ /*1680*/ FADD R12, R17, R12 ; /* 0x0000000c110c7221 */ /* 0x002fc60000000000 */ /*1690*/ LDS.128 R16, [0x30] ; /* 0x00003000ff107984 */ /* 0x000e620000000c00 */ /*16a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*16b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*16c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*16d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*16e0*/ LDS.128 R12, [0x40] ; /* 0x00004000ff0c7984 */ /* 0x000e240000000c00 */ /*16f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*1700*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*1710*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*1720*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*1730*/ LDS.128 R8, [0x50] ; /* 0x00005000ff087984 */ /* 0x000ea40000000c00 */ /*1740*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*1750*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*1760*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*1770*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*1780*/ LDS.128 R4, [0x60] ; /* 0x00006000ff047984 */ /* 0x000e640000000c00 */ /*1790*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*17a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*17b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*17c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*17d0*/ LDS.128 R16, [0x70] ; /* 0x00007000ff107984 */ /* 0x000e240000000c00 */ /*17e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*17f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*1800*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*1810*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*1820*/ LDS.128 R12, [0x80] ; /* 0x00008000ff0c7984 */ /* 0x000ea40000000c00 */ /*1830*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*1840*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*1850*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*1860*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*1870*/ LDS.128 R8, [0x90] ; /* 0x00009000ff087984 */ /* 0x000e640000000c00 */ /*1880*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*1890*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*18a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*18b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*18c0*/ LDS.128 R4, [0xa0] ; /* 0x0000a000ff047984 */ /* 0x000e240000000c00 */ /*18d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*18e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*18f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*1900*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*1910*/ LDS.128 R16, [0xb0] ; /* 0x0000b000ff107984 */ /* 0x000ea40000000c00 */ /*1920*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*1930*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*1940*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*1950*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*1960*/ LDS.128 R12, [0xc0] ; /* 0x0000c000ff0c7984 */ /* 0x000e640000000c00 */ /*1970*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*1980*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*1990*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*19a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*19b0*/ LDS.128 R8, [0xd0] ; /* 0x0000d000ff087984 */ /* 0x000e240000000c00 */ /*19c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*19d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*19e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*19f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*1a00*/ LDS.128 R4, [0xe0] ; /* 0x0000e000ff047984 */ /* 0x000ea40000000c00 */ /*1a10*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*1a20*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*1a30*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*1a40*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*1a50*/ LDS.128 R16, [0xf0] ; /* 0x0000f000ff107984 */ /* 0x000e640000000c00 */ /*1a60*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*1a70*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*1a80*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*1a90*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*1aa0*/ LDS.128 R12, [0x100] ; /* 0x00010000ff0c7984 */ /* 0x000e240000000c00 */ /*1ab0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*1ac0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*1ad0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*1ae0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*1af0*/ LDS.128 R8, [0x110] ; /* 0x00011000ff087984 */ /* 0x000ea40000000c00 */ /*1b00*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*1b10*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*1b20*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*1b30*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*1b40*/ LDS.128 R4, [0x120] ; /* 0x00012000ff047984 */ /* 0x000e640000000c00 */ /*1b50*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*1b60*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*1b70*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*1b80*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*1b90*/ LDS.128 R16, [0x130] ; /* 0x00013000ff107984 */ /* 0x000e240000000c00 */ /*1ba0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*1bb0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*1bc0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*1bd0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*1be0*/ LDS.128 R12, [0x140] ; /* 0x00014000ff0c7984 */ /* 0x000ea40000000c00 */ /*1bf0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*1c00*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*1c10*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*1c20*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*1c30*/ LDS.128 R8, [0x150] ; /* 0x00015000ff087984 */ /* 0x000e640000000c00 */ /*1c40*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*1c50*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*1c60*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*1c70*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*1c80*/ LDS.128 R4, [0x160] ; /* 0x00016000ff047984 */ /* 0x000e240000000c00 */ /*1c90*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*1ca0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*1cb0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*1cc0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*1cd0*/ LDS.128 R16, [0x170] ; /* 0x00017000ff107984 */ /* 0x000ea40000000c00 */ /*1ce0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*1cf0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*1d00*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*1d10*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*1d20*/ LDS.128 R12, [0x180] ; /* 0x00018000ff0c7984 */ /* 0x000e640000000c00 */ /*1d30*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*1d40*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*1d50*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*1d60*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*1d70*/ LDS.128 R8, [0x190] ; /* 0x00019000ff087984 */ /* 0x000e240000000c00 */ /*1d80*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*1d90*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*1da0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*1db0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*1dc0*/ LDS.128 R4, [0x1a0] ; /* 0x0001a000ff047984 */ /* 0x000ea40000000c00 */ /*1dd0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*1de0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*1df0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*1e00*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*1e10*/ LDS.128 R16, [0x1b0] ; /* 0x0001b000ff107984 */ /* 0x000e640000000c00 */ /*1e20*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*1e30*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*1e40*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*1e50*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*1e60*/ LDS.128 R12, [0x1c0] ; /* 0x0001c000ff0c7984 */ /* 0x000e240000000c00 */ /*1e70*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*1e80*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*1e90*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*1ea0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*1eb0*/ LDS.128 R8, [0x1d0] ; /* 0x0001d000ff087984 */ /* 0x000ea40000000c00 */ /*1ec0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*1ed0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*1ee0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*1ef0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*1f00*/ LDS.128 R4, [0x1e0] ; /* 0x0001e000ff047984 */ /* 0x000e640000000c00 */ /*1f10*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*1f20*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*1f30*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*1f40*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*1f50*/ LDS.128 R16, [0x1f0] ; /* 0x0001f000ff107984 */ /* 0x000e240000000c00 */ /*1f60*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*1f70*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*1f80*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*1f90*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*1fa0*/ LDS.128 R12, [0x200] ; /* 0x00020000ff0c7984 */ /* 0x000ea40000000c00 */ /*1fb0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*1fc0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*1fd0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*1fe0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*1ff0*/ LDS.128 R8, [0x210] ; /* 0x00021000ff087984 */ /* 0x000e640000000c00 */ /*2000*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2010*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2020*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2030*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*2040*/ LDS.128 R4, [0x220] ; /* 0x00022000ff047984 */ /* 0x000e240000000c00 */ /*2050*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2060*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2070*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2080*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*2090*/ LDS.128 R16, [0x230] ; /* 0x00023000ff107984 */ /* 0x000ea40000000c00 */ /*20a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*20b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*20c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*20d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*20e0*/ LDS.128 R12, [0x240] ; /* 0x00024000ff0c7984 */ /* 0x000e640000000c00 */ /*20f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2100*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2110*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*2120*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*2130*/ LDS.128 R8, [0x250] ; /* 0x00025000ff087984 */ /* 0x000e240000000c00 */ /*2140*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2150*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2160*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2170*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*2180*/ LDS.128 R4, [0x260] ; /* 0x00026000ff047984 */ /* 0x000ea40000000c00 */ /*2190*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*21a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*21b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*21c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*21d0*/ LDS.128 R16, [0x270] ; /* 0x00027000ff107984 */ /* 0x000e640000000c00 */ /*21e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*21f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2200*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2210*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*2220*/ LDS.128 R12, [0x280] ; /* 0x00028000ff0c7984 */ /* 0x000e240000000c00 */ /*2230*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2240*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2250*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*2260*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*2270*/ LDS.128 R8, [0x290] ; /* 0x00029000ff087984 */ /* 0x000ea40000000c00 */ /*2280*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2290*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*22a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*22b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*22c0*/ LDS.128 R4, [0x2a0] ; /* 0x0002a000ff047984 */ /* 0x000e640000000c00 */ /*22d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*22e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*22f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2300*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*2310*/ LDS.128 R16, [0x2b0] ; /* 0x0002b000ff107984 */ /* 0x000e240000000c00 */ /*2320*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2330*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2340*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2350*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*2360*/ LDS.128 R12, [0x2c0] ; /* 0x0002c000ff0c7984 */ /* 0x000ea40000000c00 */ /*2370*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2380*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2390*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*23a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*23b0*/ LDS.128 R8, [0x2d0] ; /* 0x0002d000ff087984 */ /* 0x000e640000000c00 */ /*23c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*23d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*23e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*23f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*2400*/ LDS.128 R4, [0x2e0] ; /* 0x0002e000ff047984 */ /* 0x000e240000000c00 */ /*2410*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2420*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2430*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2440*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*2450*/ LDS.128 R16, [0x2f0] ; /* 0x0002f000ff107984 */ /* 0x000ea40000000c00 */ /*2460*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2470*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2480*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2490*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*24a0*/ LDS.128 R12, [0x300] ; /* 0x00030000ff0c7984 */ /* 0x000e640000000c00 */ /*24b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*24c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*24d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*24e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*24f0*/ LDS.128 R8, [0x310] ; /* 0x00031000ff087984 */ /* 0x000e240000000c00 */ /*2500*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2510*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2520*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2530*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*2540*/ LDS.128 R4, [0x320] ; /* 0x00032000ff047984 */ /* 0x000ea40000000c00 */ /*2550*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2560*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2570*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2580*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*2590*/ LDS.128 R16, [0x330] ; /* 0x00033000ff107984 */ /* 0x000e640000000c00 */ /*25a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*25b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*25c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*25d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*25e0*/ LDS.128 R12, [0x340] ; /* 0x00034000ff0c7984 */ /* 0x000e240000000c00 */ /*25f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2600*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2610*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*2620*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*2630*/ LDS.128 R8, [0x350] ; /* 0x00035000ff087984 */ /* 0x000ea40000000c00 */ /*2640*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2650*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2660*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2670*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*2680*/ LDS.128 R4, [0x360] ; /* 0x00036000ff047984 */ /* 0x000e640000000c00 */ /*2690*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*26a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*26b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*26c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*26d0*/ LDS.128 R16, [0x370] ; /* 0x00037000ff107984 */ /* 0x000e240000000c00 */ /*26e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*26f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2700*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2710*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*2720*/ LDS.128 R12, [0x380] ; /* 0x00038000ff0c7984 */ /* 0x000ea40000000c00 */ /*2730*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2740*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2750*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*2760*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*2770*/ LDS.128 R8, [0x390] ; /* 0x00039000ff087984 */ /* 0x000e640000000c00 */ /*2780*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2790*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*27a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*27b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*27c0*/ LDS.128 R4, [0x3a0] ; /* 0x0003a000ff047984 */ /* 0x000e240000000c00 */ /*27d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*27e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*27f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2800*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*2810*/ LDS.128 R16, [0x3b0] ; /* 0x0003b000ff107984 */ /* 0x000ea40000000c00 */ /*2820*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2830*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2840*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2850*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*2860*/ LDS.128 R12, [0x3c0] ; /* 0x0003c000ff0c7984 */ /* 0x000e640000000c00 */ /*2870*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2880*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2890*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*28a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*28b0*/ LDS.128 R8, [0x3d0] ; /* 0x0003d000ff087984 */ /* 0x000e240000000c00 */ /*28c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*28d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*28e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*28f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*2900*/ LDS.128 R4, [0x3e0] ; /* 0x0003e000ff047984 */ /* 0x000ea40000000c00 */ /*2910*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2920*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2930*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2940*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*2950*/ LDS.128 R16, [0x3f0] ; /* 0x0003f000ff107984 */ /* 0x000e640000000c00 */ /*2960*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2970*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2980*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2990*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*29a0*/ LDS.128 R12, [0x400] ; /* 0x00040000ff0c7984 */ /* 0x000e240000000c00 */ /*29b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*29c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*29d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*29e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*29f0*/ LDS.128 R8, [0x410] ; /* 0x00041000ff087984 */ /* 0x000ea40000000c00 */ /*2a00*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2a10*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2a20*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2a30*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*2a40*/ LDS.128 R4, [0x420] ; /* 0x00042000ff047984 */ /* 0x000e640000000c00 */ /*2a50*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2a60*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2a70*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2a80*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*2a90*/ LDS.128 R16, [0x430] ; /* 0x00043000ff107984 */ /* 0x000e240000000c00 */ /*2aa0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2ab0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2ac0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2ad0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*2ae0*/ LDS.128 R12, [0x440] ; /* 0x00044000ff0c7984 */ /* 0x000ea40000000c00 */ /*2af0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2b00*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2b10*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*2b20*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*2b30*/ LDS.128 R8, [0x450] ; /* 0x00045000ff087984 */ /* 0x000e640000000c00 */ /*2b40*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2b50*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2b60*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2b70*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*2b80*/ LDS.128 R4, [0x460] ; /* 0x00046000ff047984 */ /* 0x000e240000000c00 */ /*2b90*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2ba0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2bb0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2bc0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*2bd0*/ LDS.128 R16, [0x470] ; /* 0x00047000ff107984 */ /* 0x000ea40000000c00 */ /*2be0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2bf0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2c00*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2c10*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*2c20*/ LDS.128 R12, [0x480] ; /* 0x00048000ff0c7984 */ /* 0x000e640000000c00 */ /*2c30*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2c40*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2c50*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*2c60*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*2c70*/ LDS.128 R8, [0x490] ; /* 0x00049000ff087984 */ /* 0x000e240000000c00 */ /*2c80*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2c90*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2ca0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2cb0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*2cc0*/ LDS.128 R4, [0x4a0] ; /* 0x0004a000ff047984 */ /* 0x000ea40000000c00 */ /*2cd0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2ce0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2cf0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2d00*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*2d10*/ LDS.128 R16, [0x4b0] ; /* 0x0004b000ff107984 */ /* 0x000e640000000c00 */ /*2d20*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2d30*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2d40*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2d50*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*2d60*/ LDS.128 R12, [0x4c0] ; /* 0x0004c000ff0c7984 */ /* 0x000e240000000c00 */ /*2d70*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2d80*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2d90*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*2da0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*2db0*/ LDS.128 R8, [0x4d0] ; /* 0x0004d000ff087984 */ /* 0x000ea40000000c00 */ /*2dc0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2dd0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2de0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2df0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*2e00*/ LDS.128 R4, [0x4e0] ; /* 0x0004e000ff047984 */ /* 0x000e640000000c00 */ /*2e10*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2e20*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2e30*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2e40*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*2e50*/ LDS.128 R16, [0x4f0] ; /* 0x0004f000ff107984 */ /* 0x000e240000000c00 */ /*2e60*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2e70*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2e80*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2e90*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*2ea0*/ LDS.128 R12, [0x500] ; /* 0x00050000ff0c7984 */ /* 0x000ea40000000c00 */ /*2eb0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*2ec0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*2ed0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*2ee0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*2ef0*/ LDS.128 R8, [0x510] ; /* 0x00051000ff087984 */ /* 0x000e640000000c00 */ /*2f00*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*2f10*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*2f20*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*2f30*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*2f40*/ LDS.128 R4, [0x520] ; /* 0x00052000ff047984 */ /* 0x000e240000000c00 */ /*2f50*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*2f60*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*2f70*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*2f80*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*2f90*/ LDS.128 R16, [0x530] ; /* 0x00053000ff107984 */ /* 0x000ea40000000c00 */ /*2fa0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*2fb0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*2fc0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*2fd0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*2fe0*/ LDS.128 R12, [0x540] ; /* 0x00054000ff0c7984 */ /* 0x000e640000000c00 */ /*2ff0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3000*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3010*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3020*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*3030*/ LDS.128 R8, [0x550] ; /* 0x00055000ff087984 */ /* 0x000e240000000c00 */ /*3040*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3050*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3060*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3070*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*3080*/ LDS.128 R4, [0x560] ; /* 0x00056000ff047984 */ /* 0x000ea40000000c00 */ /*3090*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*30a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*30b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*30c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*30d0*/ LDS.128 R16, [0x570] ; /* 0x00057000ff107984 */ /* 0x000e640000000c00 */ /*30e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*30f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3100*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3110*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*3120*/ LDS.128 R12, [0x580] ; /* 0x00058000ff0c7984 */ /* 0x000e240000000c00 */ /*3130*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3140*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3150*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3160*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*3170*/ LDS.128 R8, [0x590] ; /* 0x00059000ff087984 */ /* 0x000ea40000000c00 */ /*3180*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3190*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*31a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*31b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*31c0*/ LDS.128 R4, [0x5a0] ; /* 0x0005a000ff047984 */ /* 0x000e640000000c00 */ /*31d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*31e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*31f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3200*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*3210*/ LDS.128 R16, [0x5b0] ; /* 0x0005b000ff107984 */ /* 0x000e240000000c00 */ /*3220*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3230*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3240*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3250*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*3260*/ LDS.128 R12, [0x5c0] ; /* 0x0005c000ff0c7984 */ /* 0x000ea40000000c00 */ /*3270*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3280*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3290*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*32a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*32b0*/ LDS.128 R8, [0x5d0] ; /* 0x0005d000ff087984 */ /* 0x000e640000000c00 */ /*32c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*32d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*32e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*32f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*3300*/ LDS.128 R4, [0x5e0] ; /* 0x0005e000ff047984 */ /* 0x000e240000000c00 */ /*3310*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3320*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3330*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3340*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*3350*/ LDS.128 R16, [0x5f0] ; /* 0x0005f000ff107984 */ /* 0x000ea40000000c00 */ /*3360*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3370*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3380*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3390*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*33a0*/ LDS.128 R12, [0x600] ; /* 0x00060000ff0c7984 */ /* 0x000e640000000c00 */ /*33b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*33c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*33d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*33e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*33f0*/ LDS.128 R8, [0x610] ; /* 0x00061000ff087984 */ /* 0x000e240000000c00 */ /*3400*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3410*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3420*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3430*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*3440*/ LDS.128 R4, [0x620] ; /* 0x00062000ff047984 */ /* 0x000ea40000000c00 */ /*3450*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3460*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3470*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3480*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*3490*/ LDS.128 R16, [0x630] ; /* 0x00063000ff107984 */ /* 0x000e640000000c00 */ /*34a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*34b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*34c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*34d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*34e0*/ LDS.128 R12, [0x640] ; /* 0x00064000ff0c7984 */ /* 0x000e240000000c00 */ /*34f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3500*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3510*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3520*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*3530*/ LDS.128 R8, [0x650] ; /* 0x00065000ff087984 */ /* 0x000ea40000000c00 */ /*3540*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3550*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3560*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3570*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*3580*/ LDS.128 R4, [0x660] ; /* 0x00066000ff047984 */ /* 0x000e640000000c00 */ /*3590*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*35a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*35b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*35c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*35d0*/ LDS.128 R16, [0x670] ; /* 0x00067000ff107984 */ /* 0x000e240000000c00 */ /*35e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*35f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3600*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3610*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*3620*/ LDS.128 R12, [0x680] ; /* 0x00068000ff0c7984 */ /* 0x000ea40000000c00 */ /*3630*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3640*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3650*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3660*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*3670*/ LDS.128 R8, [0x690] ; /* 0x00069000ff087984 */ /* 0x000e640000000c00 */ /*3680*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3690*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*36a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*36b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*36c0*/ LDS.128 R4, [0x6a0] ; /* 0x0006a000ff047984 */ /* 0x000e240000000c00 */ /*36d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*36e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*36f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3700*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*3710*/ LDS.128 R16, [0x6b0] ; /* 0x0006b000ff107984 */ /* 0x000ea40000000c00 */ /*3720*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3730*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3740*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3750*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*3760*/ LDS.128 R12, [0x6c0] ; /* 0x0006c000ff0c7984 */ /* 0x000e640000000c00 */ /*3770*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3780*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3790*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*37a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*37b0*/ LDS.128 R8, [0x6d0] ; /* 0x0006d000ff087984 */ /* 0x000e240000000c00 */ /*37c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*37d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*37e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*37f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*3800*/ LDS.128 R4, [0x6e0] ; /* 0x0006e000ff047984 */ /* 0x000ea40000000c00 */ /*3810*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3820*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3830*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3840*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*3850*/ LDS.128 R16, [0x6f0] ; /* 0x0006f000ff107984 */ /* 0x000e640000000c00 */ /*3860*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3870*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3880*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3890*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*38a0*/ LDS.128 R12, [0x700] ; /* 0x00070000ff0c7984 */ /* 0x000e240000000c00 */ /*38b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*38c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*38d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*38e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*38f0*/ LDS.128 R8, [0x710] ; /* 0x00071000ff087984 */ /* 0x000ea40000000c00 */ /*3900*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3910*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3920*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3930*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*3940*/ LDS.128 R4, [0x720] ; /* 0x00072000ff047984 */ /* 0x000e640000000c00 */ /*3950*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3960*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3970*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3980*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*3990*/ LDS.128 R16, [0x730] ; /* 0x00073000ff107984 */ /* 0x000e240000000c00 */ /*39a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*39b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*39c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*39d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*39e0*/ LDS.128 R12, [0x740] ; /* 0x00074000ff0c7984 */ /* 0x000ea40000000c00 */ /*39f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3a00*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3a10*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3a20*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*3a30*/ LDS.128 R8, [0x750] ; /* 0x00075000ff087984 */ /* 0x000e640000000c00 */ /*3a40*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3a50*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3a60*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3a70*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*3a80*/ LDS.128 R4, [0x760] ; /* 0x00076000ff047984 */ /* 0x000e240000000c00 */ /*3a90*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3aa0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3ab0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3ac0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*3ad0*/ LDS.128 R16, [0x770] ; /* 0x00077000ff107984 */ /* 0x000ea40000000c00 */ /*3ae0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3af0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3b00*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3b10*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*3b20*/ LDS.128 R12, [0x780] ; /* 0x00078000ff0c7984 */ /* 0x000e640000000c00 */ /*3b30*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3b40*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3b50*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3b60*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*3b70*/ LDS.128 R8, [0x790] ; /* 0x00079000ff087984 */ /* 0x000e240000000c00 */ /*3b80*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3b90*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3ba0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3bb0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*3bc0*/ LDS.128 R4, [0x7a0] ; /* 0x0007a000ff047984 */ /* 0x000ea40000000c00 */ /*3bd0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3be0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3bf0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3c00*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*3c10*/ LDS.128 R16, [0x7b0] ; /* 0x0007b000ff107984 */ /* 0x000e640000000c00 */ /*3c20*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3c30*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3c40*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3c50*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*3c60*/ LDS.128 R12, [0x7c0] ; /* 0x0007c000ff0c7984 */ /* 0x000e240000000c00 */ /*3c70*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3c80*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3c90*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3ca0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*3cb0*/ LDS.128 R8, [0x7d0] ; /* 0x0007d000ff087984 */ /* 0x000ea40000000c00 */ /*3cc0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3cd0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3ce0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3cf0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*3d00*/ LDS.128 R4, [0x7e0] ; /* 0x0007e000ff047984 */ /* 0x000e640000000c00 */ /*3d10*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3d20*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3d30*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3d40*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*3d50*/ LDS.128 R16, [0x7f0] ; /* 0x0007f000ff107984 */ /* 0x000e240000000c00 */ /*3d60*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3d70*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3d80*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3d90*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*3da0*/ LDS.128 R12, [0x800] ; /* 0x00080000ff0c7984 */ /* 0x000ea40000000c00 */ /*3db0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3dc0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3dd0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3de0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*3df0*/ LDS.128 R8, [0x810] ; /* 0x00081000ff087984 */ /* 0x000e640000000c00 */ /*3e00*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3e10*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3e20*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3e30*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*3e40*/ LDS.128 R4, [0x820] ; /* 0x00082000ff047984 */ /* 0x000e240000000c00 */ /*3e50*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3e60*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3e70*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3e80*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*3e90*/ LDS.128 R16, [0x830] ; /* 0x00083000ff107984 */ /* 0x000ea40000000c00 */ /*3ea0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3eb0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*3ec0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*3ed0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*3ee0*/ LDS.128 R12, [0x840] ; /* 0x00084000ff0c7984 */ /* 0x000e640000000c00 */ /*3ef0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*3f00*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*3f10*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*3f20*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*3f30*/ LDS.128 R8, [0x850] ; /* 0x00085000ff087984 */ /* 0x000e240000000c00 */ /*3f40*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*3f50*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*3f60*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*3f70*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*3f80*/ LDS.128 R4, [0x860] ; /* 0x00086000ff047984 */ /* 0x000ea40000000c00 */ /*3f90*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*3fa0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*3fb0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*3fc0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*3fd0*/ LDS.128 R16, [0x870] ; /* 0x00087000ff107984 */ /* 0x000e640000000c00 */ /*3fe0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*3ff0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4000*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4010*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*4020*/ LDS.128 R12, [0x880] ; /* 0x00088000ff0c7984 */ /* 0x000e240000000c00 */ /*4030*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4040*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4050*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4060*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*4070*/ LDS.128 R8, [0x890] ; /* 0x00089000ff087984 */ /* 0x000ea40000000c00 */ /*4080*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4090*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*40a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*40b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*40c0*/ LDS.128 R4, [0x8a0] ; /* 0x0008a000ff047984 */ /* 0x000e640000000c00 */ /*40d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*40e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*40f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4100*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*4110*/ LDS.128 R16, [0x8b0] ; /* 0x0008b000ff107984 */ /* 0x000e240000000c00 */ /*4120*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*4130*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4140*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4150*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*4160*/ LDS.128 R12, [0x8c0] ; /* 0x0008c000ff0c7984 */ /* 0x000ea40000000c00 */ /*4170*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4180*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4190*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*41a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*41b0*/ LDS.128 R8, [0x8d0] ; /* 0x0008d000ff087984 */ /* 0x000e640000000c00 */ /*41c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*41d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*41e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*41f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*4200*/ LDS.128 R4, [0x8e0] ; /* 0x0008e000ff047984 */ /* 0x000e240000000c00 */ /*4210*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4220*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4230*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4240*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*4250*/ LDS.128 R16, [0x8f0] ; /* 0x0008f000ff107984 */ /* 0x000ea40000000c00 */ /*4260*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*4270*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4280*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4290*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*42a0*/ LDS.128 R12, [0x900] ; /* 0x00090000ff0c7984 */ /* 0x000e640000000c00 */ /*42b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*42c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*42d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*42e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*42f0*/ LDS.128 R8, [0x910] ; /* 0x00091000ff087984 */ /* 0x000e240000000c00 */ /*4300*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4310*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4320*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4330*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*4340*/ LDS.128 R4, [0x920] ; /* 0x00092000ff047984 */ /* 0x000ea40000000c00 */ /*4350*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4360*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4370*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4380*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*4390*/ LDS.128 R16, [0x930] ; /* 0x00093000ff107984 */ /* 0x000e640000000c00 */ /*43a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*43b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*43c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*43d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*43e0*/ LDS.128 R12, [0x940] ; /* 0x00094000ff0c7984 */ /* 0x000e240000000c00 */ /*43f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4400*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4410*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4420*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*4430*/ LDS.128 R8, [0x950] ; /* 0x00095000ff087984 */ /* 0x000ea40000000c00 */ /*4440*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4450*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4460*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4470*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*4480*/ LDS.128 R4, [0x960] ; /* 0x00096000ff047984 */ /* 0x000e640000000c00 */ /*4490*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*44a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*44b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*44c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*44d0*/ LDS.128 R16, [0x970] ; /* 0x00097000ff107984 */ /* 0x000e240000000c00 */ /*44e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*44f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4500*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4510*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*4520*/ LDS.128 R12, [0x980] ; /* 0x00098000ff0c7984 */ /* 0x000ea40000000c00 */ /*4530*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4540*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4550*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4560*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*4570*/ LDS.128 R8, [0x990] ; /* 0x00099000ff087984 */ /* 0x000e640000000c00 */ /*4580*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4590*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*45a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*45b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*45c0*/ LDS.128 R4, [0x9a0] ; /* 0x0009a000ff047984 */ /* 0x000e240000000c00 */ /*45d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*45e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*45f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4600*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*4610*/ LDS.128 R16, [0x9b0] ; /* 0x0009b000ff107984 */ /* 0x000ea40000000c00 */ /*4620*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*4630*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4640*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4650*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*4660*/ LDS.128 R12, [0x9c0] ; /* 0x0009c000ff0c7984 */ /* 0x000e640000000c00 */ /*4670*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4680*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4690*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*46a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*46b0*/ LDS.128 R8, [0x9d0] ; /* 0x0009d000ff087984 */ /* 0x000e240000000c00 */ /*46c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*46d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*46e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*46f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*4700*/ LDS.128 R4, [0x9e0] ; /* 0x0009e000ff047984 */ /* 0x000ea40000000c00 */ /*4710*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4720*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4730*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4740*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*4750*/ LDS.128 R16, [0x9f0] ; /* 0x0009f000ff107984 */ /* 0x000e640000000c00 */ /*4760*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*4770*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4780*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4790*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*47a0*/ LDS.128 R12, [0xa00] ; /* 0x000a0000ff0c7984 */ /* 0x000e240000000c00 */ /*47b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*47c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*47d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*47e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*47f0*/ LDS.128 R8, [0xa10] ; /* 0x000a1000ff087984 */ /* 0x000ea40000000c00 */ /*4800*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4810*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4820*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4830*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*4840*/ LDS.128 R4, [0xa20] ; /* 0x000a2000ff047984 */ /* 0x000e640000000c00 */ /*4850*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4860*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4870*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4880*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*4890*/ LDS.128 R16, [0xa30] ; /* 0x000a3000ff107984 */ /* 0x000e240000000c00 */ /*48a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*48b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*48c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*48d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*48e0*/ LDS.128 R12, [0xa40] ; /* 0x000a4000ff0c7984 */ /* 0x000ea40000000c00 */ /*48f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4900*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4910*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4920*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*4930*/ LDS.128 R8, [0xa50] ; /* 0x000a5000ff087984 */ /* 0x000e640000000c00 */ /*4940*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4950*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4960*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4970*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*4980*/ LDS.128 R4, [0xa60] ; /* 0x000a6000ff047984 */ /* 0x000e240000000c00 */ /*4990*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*49a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*49b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*49c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*49d0*/ LDS.128 R16, [0xa70] ; /* 0x000a7000ff107984 */ /* 0x000ea40000000c00 */ /*49e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*49f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4a00*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4a10*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*4a20*/ LDS.128 R12, [0xa80] ; /* 0x000a8000ff0c7984 */ /* 0x000e640000000c00 */ /*4a30*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4a40*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4a50*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4a60*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*4a70*/ LDS.128 R8, [0xa90] ; /* 0x000a9000ff087984 */ /* 0x000e240000000c00 */ /*4a80*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4a90*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4aa0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4ab0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*4ac0*/ LDS.128 R4, [0xaa0] ; /* 0x000aa000ff047984 */ /* 0x000ea40000000c00 */ /*4ad0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4ae0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4af0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4b00*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*4b10*/ LDS.128 R16, [0xab0] ; /* 0x000ab000ff107984 */ /* 0x000e640000000c00 */ /*4b20*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*4b30*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4b40*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4b50*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*4b60*/ LDS.128 R12, [0xac0] ; /* 0x000ac000ff0c7984 */ /* 0x000e240000000c00 */ /*4b70*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4b80*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4b90*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4ba0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*4bb0*/ LDS.128 R8, [0xad0] ; /* 0x000ad000ff087984 */ /* 0x000ea40000000c00 */ /*4bc0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4bd0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4be0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4bf0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*4c00*/ LDS.128 R4, [0xae0] ; /* 0x000ae000ff047984 */ /* 0x000e640000000c00 */ /*4c10*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4c20*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4c30*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4c40*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*4c50*/ LDS.128 R16, [0xaf0] ; /* 0x000af000ff107984 */ /* 0x000e240000000c00 */ /*4c60*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*4c70*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4c80*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4c90*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*4ca0*/ LDS.128 R12, [0xb00] ; /* 0x000b0000ff0c7984 */ /* 0x000ea40000000c00 */ /*4cb0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4cc0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4cd0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4ce0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*4cf0*/ LDS.128 R8, [0xb10] ; /* 0x000b1000ff087984 */ /* 0x000e640000000c00 */ /*4d00*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4d10*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4d20*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4d30*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*4d40*/ LDS.128 R4, [0xb20] ; /* 0x000b2000ff047984 */ /* 0x000e240000000c00 */ /*4d50*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4d60*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4d70*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4d80*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*4d90*/ LDS.128 R16, [0xb30] ; /* 0x000b3000ff107984 */ /* 0x000ea40000000c00 */ /*4da0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*4db0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4dc0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4dd0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*4de0*/ LDS.128 R12, [0xb40] ; /* 0x000b4000ff0c7984 */ /* 0x000e640000000c00 */ /*4df0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4e00*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4e10*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4e20*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*4e30*/ LDS.128 R8, [0xb50] ; /* 0x000b5000ff087984 */ /* 0x000e240000000c00 */ /*4e40*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4e50*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4e60*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4e70*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*4e80*/ LDS.128 R4, [0xb60] ; /* 0x000b6000ff047984 */ /* 0x000ea40000000c00 */ /*4e90*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4ea0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4eb0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*4ec0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*4ed0*/ LDS.128 R16, [0xb70] ; /* 0x000b7000ff107984 */ /* 0x000e640000000c00 */ /*4ee0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*4ef0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*4f00*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*4f10*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*4f20*/ LDS.128 R12, [0xb80] ; /* 0x000b8000ff0c7984 */ /* 0x000e240000000c00 */ /*4f30*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*4f40*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*4f50*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*4f60*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*4f70*/ LDS.128 R8, [0xb90] ; /* 0x000b9000ff087984 */ /* 0x000ea40000000c00 */ /*4f80*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*4f90*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*4fa0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*4fb0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*4fc0*/ LDS.128 R4, [0xba0] ; /* 0x000ba000ff047984 */ /* 0x000e640000000c00 */ /*4fd0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*4fe0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*4ff0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5000*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*5010*/ LDS.128 R16, [0xbb0] ; /* 0x000bb000ff107984 */ /* 0x000e240000000c00 */ /*5020*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5030*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5040*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5050*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*5060*/ LDS.128 R12, [0xbc0] ; /* 0x000bc000ff0c7984 */ /* 0x000ea40000000c00 */ /*5070*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5080*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5090*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*50a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*50b0*/ LDS.128 R8, [0xbd0] ; /* 0x000bd000ff087984 */ /* 0x000e640000000c00 */ /*50c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*50d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*50e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*50f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*5100*/ LDS.128 R4, [0xbe0] ; /* 0x000be000ff047984 */ /* 0x000e240000000c00 */ /*5110*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*5120*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*5130*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5140*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*5150*/ LDS.128 R16, [0xbf0] ; /* 0x000bf000ff107984 */ /* 0x000ea40000000c00 */ /*5160*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5170*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5180*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5190*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*51a0*/ LDS.128 R12, [0xc00] ; /* 0x000c0000ff0c7984 */ /* 0x000e640000000c00 */ /*51b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*51c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*51d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*51e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*51f0*/ LDS.128 R8, [0xc10] ; /* 0x000c1000ff087984 */ /* 0x000e240000000c00 */ /*5200*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5210*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5220*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5230*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*5240*/ LDS.128 R4, [0xc20] ; /* 0x000c2000ff047984 */ /* 0x000ea40000000c00 */ /*5250*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*5260*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*5270*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5280*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*5290*/ LDS.128 R16, [0xc30] ; /* 0x000c3000ff107984 */ /* 0x000e640000000c00 */ /*52a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*52b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*52c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*52d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*52e0*/ LDS.128 R12, [0xc40] ; /* 0x000c4000ff0c7984 */ /* 0x000e240000000c00 */ /*52f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5300*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5310*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5320*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*5330*/ LDS.128 R8, [0xc50] ; /* 0x000c5000ff087984 */ /* 0x000ea40000000c00 */ /*5340*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5350*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5360*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5370*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*5380*/ LDS.128 R4, [0xc60] ; /* 0x000c6000ff047984 */ /* 0x000e640000000c00 */ /*5390*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*53a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*53b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*53c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*53d0*/ LDS.128 R16, [0xc70] ; /* 0x000c7000ff107984 */ /* 0x000e240000000c00 */ /*53e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*53f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5400*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5410*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*5420*/ LDS.128 R12, [0xc80] ; /* 0x000c8000ff0c7984 */ /* 0x000ea40000000c00 */ /*5430*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5440*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5450*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5460*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*5470*/ LDS.128 R8, [0xc90] ; /* 0x000c9000ff087984 */ /* 0x000e640000000c00 */ /*5480*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5490*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*54a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*54b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*54c0*/ LDS.128 R4, [0xca0] ; /* 0x000ca000ff047984 */ /* 0x000e240000000c00 */ /*54d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*54e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*54f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5500*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*5510*/ LDS.128 R16, [0xcb0] ; /* 0x000cb000ff107984 */ /* 0x000ea40000000c00 */ /*5520*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5530*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5540*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5550*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*5560*/ LDS.128 R12, [0xcc0] ; /* 0x000cc000ff0c7984 */ /* 0x000e640000000c00 */ /*5570*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5580*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5590*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*55a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*55b0*/ LDS.128 R8, [0xcd0] ; /* 0x000cd000ff087984 */ /* 0x000e240000000c00 */ /*55c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*55d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*55e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*55f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*5600*/ LDS.128 R4, [0xce0] ; /* 0x000ce000ff047984 */ /* 0x000ea40000000c00 */ /*5610*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*5620*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*5630*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5640*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*5650*/ LDS.128 R16, [0xcf0] ; /* 0x000cf000ff107984 */ /* 0x000e640000000c00 */ /*5660*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5670*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5680*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5690*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*56a0*/ LDS.128 R12, [0xd00] ; /* 0x000d0000ff0c7984 */ /* 0x000e240000000c00 */ /*56b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*56c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*56d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*56e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*56f0*/ LDS.128 R8, [0xd10] ; /* 0x000d1000ff087984 */ /* 0x000ea40000000c00 */ /*5700*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5710*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5720*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5730*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*5740*/ LDS.128 R4, [0xd20] ; /* 0x000d2000ff047984 */ /* 0x000e640000000c00 */ /*5750*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*5760*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*5770*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5780*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*5790*/ LDS.128 R16, [0xd30] ; /* 0x000d3000ff107984 */ /* 0x000e240000000c00 */ /*57a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*57b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*57c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*57d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*57e0*/ LDS.128 R12, [0xd40] ; /* 0x000d4000ff0c7984 */ /* 0x000ea40000000c00 */ /*57f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5800*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5810*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5820*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*5830*/ LDS.128 R8, [0xd50] ; /* 0x000d5000ff087984 */ /* 0x000e640000000c00 */ /*5840*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5850*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5860*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5870*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*5880*/ LDS.128 R4, [0xd60] ; /* 0x000d6000ff047984 */ /* 0x000e240000000c00 */ /*5890*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*58a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*58b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*58c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*58d0*/ LDS.128 R16, [0xd70] ; /* 0x000d7000ff107984 */ /* 0x000ea40000000c00 */ /*58e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*58f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5900*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5910*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*5920*/ LDS.128 R12, [0xd80] ; /* 0x000d8000ff0c7984 */ /* 0x000e640000000c00 */ /*5930*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5940*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5950*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5960*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*5970*/ LDS.128 R8, [0xd90] ; /* 0x000d9000ff087984 */ /* 0x000e240000000c00 */ /*5980*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5990*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*59a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*59b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*59c0*/ LDS.128 R4, [0xda0] ; /* 0x000da000ff047984 */ /* 0x000ea40000000c00 */ /*59d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*59e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*59f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5a00*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*5a10*/ LDS.128 R16, [0xdb0] ; /* 0x000db000ff107984 */ /* 0x000e640000000c00 */ /*5a20*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5a30*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5a40*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5a50*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*5a60*/ LDS.128 R12, [0xdc0] ; /* 0x000dc000ff0c7984 */ /* 0x000e240000000c00 */ /*5a70*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5a80*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5a90*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5aa0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*5ab0*/ LDS.128 R8, [0xdd0] ; /* 0x000dd000ff087984 */ /* 0x000ea40000000c00 */ /*5ac0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5ad0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5ae0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5af0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*5b00*/ LDS.128 R4, [0xde0] ; /* 0x000de000ff047984 */ /* 0x000e640000000c00 */ /*5b10*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*5b20*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*5b30*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5b40*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*5b50*/ LDS.128 R16, [0xdf0] ; /* 0x000df000ff107984 */ /* 0x000e240000000c00 */ /*5b60*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5b70*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5b80*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5b90*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*5ba0*/ LDS.128 R12, [0xe00] ; /* 0x000e0000ff0c7984 */ /* 0x000ea40000000c00 */ /*5bb0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5bc0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5bd0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5be0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*5bf0*/ LDS.128 R8, [0xe10] ; /* 0x000e1000ff087984 */ /* 0x000e640000000c00 */ /*5c00*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5c10*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5c20*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5c30*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*5c40*/ LDS.128 R4, [0xe20] ; /* 0x000e2000ff047984 */ /* 0x000e240000000c00 */ /*5c50*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*5c60*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*5c70*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5c80*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*5c90*/ LDS.128 R16, [0xe30] ; /* 0x000e3000ff107984 */ /* 0x000ea40000000c00 */ /*5ca0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5cb0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5cc0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5cd0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*5ce0*/ LDS.128 R12, [0xe40] ; /* 0x000e4000ff0c7984 */ /* 0x000e640000000c00 */ /*5cf0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5d00*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5d10*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5d20*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*5d30*/ LDS.128 R8, [0xe50] ; /* 0x000e5000ff087984 */ /* 0x000e240000000c00 */ /*5d40*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5d50*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5d60*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5d70*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*5d80*/ LDS.128 R4, [0xe60] ; /* 0x000e6000ff047984 */ /* 0x000ea40000000c00 */ /*5d90*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*5da0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*5db0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5dc0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*5dd0*/ LDS.128 R16, [0xe70] ; /* 0x000e7000ff107984 */ /* 0x000e640000000c00 */ /*5de0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5df0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5e00*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5e10*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*5e20*/ LDS.128 R12, [0xe80] ; /* 0x000e8000ff0c7984 */ /* 0x000e240000000c00 */ /*5e30*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5e40*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5e50*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5e60*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*5e70*/ LDS.128 R8, [0xe90] ; /* 0x000e9000ff087984 */ /* 0x000ea40000000c00 */ /*5e80*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5e90*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5ea0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5eb0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*5ec0*/ LDS.128 R4, [0xea0] ; /* 0x000ea000ff047984 */ /* 0x000e640000000c00 */ /*5ed0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*5ee0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*5ef0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*5f00*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*5f10*/ LDS.128 R16, [0xeb0] ; /* 0x000eb000ff107984 */ /* 0x000e240000000c00 */ /*5f20*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*5f30*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*5f40*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*5f50*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*5f60*/ LDS.128 R12, [0xec0] ; /* 0x000ec000ff0c7984 */ /* 0x000ea40000000c00 */ /*5f70*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*5f80*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*5f90*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*5fa0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*5fb0*/ LDS.128 R8, [0xed0] ; /* 0x000ed000ff087984 */ /* 0x000e640000000c00 */ /*5fc0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*5fd0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*5fe0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*5ff0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*6000*/ LDS.128 R4, [0xee0] ; /* 0x000ee000ff047984 */ /* 0x000e240000000c00 */ /*6010*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*6020*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*6030*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*6040*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x004fe40000000000 */ /*6050*/ LDS.128 R16, [0xef0] ; /* 0x000ef000ff107984 */ /* 0x000ea40000000c00 */ /*6060*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*6070*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*6080*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*6090*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*60a0*/ LDS.128 R12, [0xf00] ; /* 0x000f0000ff0c7984 */ /* 0x000e640000000c00 */ /*60b0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*60c0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*60d0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*60e0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*60f0*/ LDS.128 R8, [0xf10] ; /* 0x000f1000ff087984 */ /* 0x000e240000000c00 */ /*6100*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*6110*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*6120*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*6130*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*6140*/ LDS.128 R4, [0xf20] ; /* 0x000f2000ff047984 */ /* 0x000ea40000000c00 */ /*6150*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*6160*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*6170*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*6180*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*6190*/ LDS.128 R16, [0xf30] ; /* 0x000f3000ff107984 */ /* 0x000e640000000c00 */ /*61a0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*61b0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*61c0*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*61d0*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fe40000000000 */ /*61e0*/ LDS.128 R12, [0xf40] ; /* 0x000f4000ff0c7984 */ /* 0x000e240000000c00 */ /*61f0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*6200*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*6210*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*6220*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fe40000000000 */ /*6230*/ LDS.128 R8, [0xf50] ; /* 0x000f5000ff087984 */ /* 0x000ea40000000c00 */ /*6240*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*6250*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*6260*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*6270*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fe40000000000 */ /*6280*/ LDS.128 R4, [0xf60] ; /* 0x000f6000ff047984 */ /* 0x000e640000000c00 */ /*6290*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*62a0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*62b0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*62c0*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x001fe40000000000 */ /*62d0*/ LDS.128 R16, [0xf70] ; /* 0x000f7000ff107984 */ /* 0x000e240000000c00 */ /*62e0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*62f0*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*6300*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*6310*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x004fe40000000000 */ /*6320*/ LDS.128 R12, [0xf80] ; /* 0x000f8000ff0c7984 */ /* 0x000ea40000000c00 */ /*6330*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*6340*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*6350*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*6360*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x002fe40000000000 */ /*6370*/ LDS.128 R8, [0xf90] ; /* 0x000f9000ff087984 */ /* 0x000e640000000c00 */ /*6380*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*6390*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*63a0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*63b0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x001fe40000000000 */ /*63c0*/ LDS.128 R4, [0xfa0] ; /* 0x000fa000ff047984 */ /* 0x000e240000000c00 */ /*63d0*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*63e0*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*63f0*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*6400*/ FADD R12, R12, R19 ; /* 0x000000130c0c7221 */ /* 0x004fe40000000000 */ /*6410*/ LDS.128 R16, [0xfb0] ; /* 0x000fb000ff107984 */ /* 0x000ea40000000c00 */ /*6420*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*6430*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*6440*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*6450*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x002fe40000000000 */ /*6460*/ LDS.128 R12, [0xfc0] ; /* 0x000fc000ff0c7984 */ /* 0x000e640000000c00 */ /*6470*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*6480*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*6490*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*64a0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x001fe40000000000 */ /*64b0*/ LDS.128 R8, [0xfd0] ; /* 0x000fd000ff087984 */ /* 0x000e240000000c00 */ /*64c0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*64d0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*64e0*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*64f0*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x004fe40000000000 */ /*6500*/ LDS.128 R4, [0xfe0] ; /* 0x000fe000ff047984 */ /* 0x000ea40000000c00 */ /*6510*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*6520*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*6530*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fc80000000000 */ /*6540*/ FADD R12, R19, R12 ; /* 0x0000000c130c7221 */ /* 0x002fe40000000000 */ /*6550*/ LDS.128 R16, [0xff0] ; /* 0x000ff000ff107984 */ /* 0x000e640000000c00 */ /*6560*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */ /* 0x000fc80000000000 */ /*6570*/ FADD R14, R13, R14 ; /* 0x0000000e0d0e7221 */ /* 0x000fc80000000000 */ /*6580*/ FADD R15, R14, R15 ; /* 0x0000000f0e0f7221 */ /* 0x000fc80000000000 */ /*6590*/ FADD R8, R15, R8 ; /* 0x000000080f087221 */ /* 0x001fc80000000000 */ /*65a0*/ FADD R9, R8, R9 ; /* 0x0000000908097221 */ /* 0x000fc80000000000 */ /*65b0*/ FADD R10, R9, R10 ; /* 0x0000000a090a7221 */ /* 0x000fc80000000000 */ /*65c0*/ FADD R11, R10, R11 ; /* 0x0000000b0a0b7221 */ /* 0x000fc80000000000 */ /*65d0*/ FADD R4, R11, R4 ; /* 0x000000040b047221 */ /* 0x004fc80000000000 */ /*65e0*/ FADD R5, R4, R5 ; /* 0x0000000504057221 */ /* 0x000fc80000000000 */ /*65f0*/ FADD R6, R5, R6 ; /* 0x0000000605067221 */ /* 0x000fc80000000000 */ /*6600*/ FADD R7, R6, R7 ; /* 0x0000000706077221 */ /* 0x000fc80000000000 */ /*6610*/ FADD R16, R7, R16 ; /* 0x0000001007107221 */ /* 0x002fc80000000000 */ /*6620*/ FADD R17, R16, R17 ; /* 0x0000001110117221 */ /* 0x000fc80000000000 */ /*6630*/ FADD R18, R17, R18 ; /* 0x0000001211127221 */ /* 0x000fc80000000000 */ /*6640*/ FADD R19, R18, R19 ; /* 0x0000001312137221 */ /* 0x000fca0000000000 */ /*6650*/ STG.E [R2.64], R19 ; /* 0x0000001302007986 */ /* 0x000fe2000c10190a */ /*6660*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*6670*/ BRA 0x6670; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*6680*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*6690*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*66a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*66b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*66c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*66d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*66e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*66f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void bcnn_grad_scales_kernel(float *x_norm, float *delta, int batch, int n, int size, float *scale_updates) { __shared__ float part[BCNN_CUDA_THREADS]; int i, b; int filter = blockIdx.x; int p = threadIdx.x; float sum = 0; for (b = 0; b < batch; ++b) { for (i = 0; i < size; i += BCNN_CUDA_THREADS) { int index = p + i + size * (filter + n * b); sum += (p + i < size) ? delta[index] * x_norm[index] : 0; } } part[p] = sum; __syncthreads(); if (p == 0) { for (i = 0; i < BCNN_CUDA_THREADS; ++i) scale_updates[filter] += part[i]; } }
.text .file "bcnn_grad_scales_kernel.hip" .globl _Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_ # -- Begin function _Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_ .type _Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_,@function _Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_: # @_Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $144, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 20(%rsp), %rsi movl %edx, (%rsi) leaq 16(%rsp), %rdx movl %ecx, (%rdx) leaq 12(%rsp), %rcx movl %r8d, (%rcx) leaq 40(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z23bcnn_grad_scales_kernelPfS_iiiS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $160, %rsp .cfi_adjust_cfa_offset -160 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_, .Lfunc_end0-_Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_ .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z23bcnn_grad_scales_kernelPfS_iiiS_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z23bcnn_grad_scales_kernelPfS_iiiS_,@object # @_Z23bcnn_grad_scales_kernelPfS_iiiS_ .section .rodata,"a",@progbits .globl _Z23bcnn_grad_scales_kernelPfS_iiiS_ .p2align 3, 0x0 _Z23bcnn_grad_scales_kernelPfS_iiiS_: .quad _Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_ .size _Z23bcnn_grad_scales_kernelPfS_iiiS_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z23bcnn_grad_scales_kernelPfS_iiiS_" .size .L__unnamed_1, 37 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z38__device_stub__bcnn_grad_scales_kernelPfS_iiiS_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z23bcnn_grad_scales_kernelPfS_iiiS_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z23bcnn_grad_scales_kernelPfS_iiiS_ ; -- Begin function _Z23bcnn_grad_scales_kernelPfS_iiiS_ .globl _Z23bcnn_grad_scales_kernelPfS_iiiS_ .p2align 8 .type _Z23bcnn_grad_scales_kernelPfS_iiiS_,@function _Z23bcnn_grad_scales_kernelPfS_iiiS_: ; @_Z23bcnn_grad_scales_kernelPfS_iiiS_ ; %bb.0: s_load_b128 s[4:7], s[0:1], 0x10 s_mov_b32 s2, s15 s_waitcnt lgkmcnt(0) s_cmp_lt_i32 s4, 1 s_cbranch_scc1 .LBB0_8 ; %bb.1: ; %.preheader34.lr.ph s_load_b128 s[8:11], s[0:1], 0x0 v_mad_u64_u32 v[1:2], null, s2, s6, v[0:1] v_mov_b32_e32 v2, 0 s_cmp_gt_i32 s6, 0 s_mov_b32 s7, 0 s_cselect_b32 s3, -1, 0 s_mul_i32 s5, s6, s5 .LBB0_2: ; %.preheader34 ; =>This Loop Header: Depth=1 ; Child Loop BB0_4 Depth 2 s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB0_7 ; %bb.3: ; %.lr.ph ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s12, 0 .LBB0_4: ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v3, s12, v0 v_cmp_gt_i32_e32 vcc_lo, s6, v3 v_mov_b32_e32 v3, 0 s_and_saveexec_b32 s13, vcc_lo s_cbranch_execz .LBB0_6 ; %bb.5: ; in Loop: Header=BB0_4 Depth=2 v_add_nc_u32_e32 v3, s12, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[3:4], 2, v[3:4] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, s10, v3 v_add_co_ci_u32_e32 v6, vcc_lo, s11, v4, vcc_lo v_add_co_u32 v3, vcc_lo, s8, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo global_load_b32 v5, v[5:6], off global_load_b32 v3, v[3:4], off s_waitcnt vmcnt(0) v_mul_f32_e32 v3, v5, v3 .LBB0_6: ; in Loop: Header=BB0_4 Depth=2 s_or_b32 exec_lo, exec_lo, s13 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_f32_e32 v2, v2, v3 s_addk_i32 s12, 0x400 s_cmp_lt_i32 s12, s6 s_cbranch_scc1 .LBB0_4 .LBB0_7: ; %._crit_edge ; in Loop: Header=BB0_2 Depth=1 v_add_nc_u32_e32 v1, s5, v1 s_add_i32 s7, s7, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s7, s4 s_cbranch_scc1 .LBB0_2 s_branch .LBB0_9 .LBB0_8: v_mov_b32_e32 v2, 0 .LBB0_9: ; %._crit_edge39 v_lshlrev_b32_e32 v1, 2, v0 s_mov_b32 s4, 0 s_mov_b32 s3, exec_lo ds_store_b32 v1, v2 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB0_13 ; %bb.10: ; %.preheader s_load_b64 s[0:1], s[0:1], 0x20 s_ashr_i32 s3, s2, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[2:3], s[2:3], 2 s_waitcnt lgkmcnt(0) s_add_u32 s0, s0, s2 s_addc_u32 s1, s1, s3 s_load_b32 s2, s[0:1], 0x0 s_waitcnt lgkmcnt(0) v_mov_b32_e32 v0, s2 .LBB0_11: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, s4 s_add_i32 s4, s4, 4 s_delay_alu instid0(SALU_CYCLE_1) s_cmpk_lg_i32 s4, 0x1000 ds_load_b32 v1, v1 s_waitcnt lgkmcnt(0) v_add_f32_e32 v0, v1, v0 s_cbranch_scc1 .LBB0_11 ; %bb.12: ; %.loopexit v_mov_b32_e32 v1, 0 global_store_b32 v1, v0, s[0:1] .LBB0_13: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z23bcnn_grad_scales_kernelPfS_iiiS_ .amdhsa_group_segment_fixed_size 4096 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 40 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z23bcnn_grad_scales_kernelPfS_iiiS_, .Lfunc_end0-_Z23bcnn_grad_scales_kernelPfS_iiiS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 376 ; NumSgprs: 18 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 4096 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 20 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: by_value - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 4096 .kernarg_segment_align: 8 .kernarg_segment_size: 40 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z23bcnn_grad_scales_kernelPfS_iiiS_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z23bcnn_grad_scales_kernelPfS_iiiS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
55eefc93c0a27ff93054d3b84c604bd3eb09c0c8
#define ulong unsigned long long #define uint unsigned int #define MOD_P0 469762049LL #define MOD_P1 1811939329LL #define MOD_P2 2013265921LL //R‚݂̌ɑfP^̂ŁAꂼ̗]肩猳̒l𕜌 //̂ƂP͑SČŒȂ̂ŏ]vZ͑Sߑłł //E0`E2́AE3ɏo //Jオl //arrayLength2=arrayE3̔zTCY __global__ void GarnerGPU(uint *arrayE0,uint *arrayE1,uint *arrayE2,uint *arrayE3,uint arrayLength2 ) { int idx = threadIdx.x+blockIdx.x*256; ulong ar=arrayE0[idx]; ulong br=arrayE1[idx]; ulong cr=arrayE2[idx]; ulong x=ar; ulong brx=br-x+MOD_P1; if (brx>=MOD_P1)brx-=MOD_P1; x=x+(brx*1540148431)%MOD_P1*MOD_P0; //1540148431=modinv(MOD_P0,MOD_P1) //̎_xMOD_P1*MOD_P0ȉł邱Ƃۏ؂Ă ulong crx=cr+MOD_P2-x%MOD_P2; if (crx>=MOD_P2)crx-=MOD_P2; ulong w1=(crx*1050399624)%MOD_P2; //1050399624=modinv(MOD_P0,MOD_P2) *modinv(MOD_P1,MOD_P2)%MOD_P2 ulong w2=MOD_P0*MOD_P1; ulong out_lo=w1*w2; ulong out_hi=__umul64hi(w1,w2); if (out_lo>(out_lo+x)){ out_hi++; } out_lo+=x; //Jオ菈 uint ui00_32=(uint)(out_lo%(1ULL<<32ULL)); uint ui32_64=(uint)(out_lo/(1ULL<<32ULL)); uint ui64_96=(uint)(out_hi%(1ULL<<32ULL)); uint lastE3_0 = atomicAdd( &arrayE3[idx+0], ui00_32 ); if ((lastE3_0+ui00_32)<lastE3_0){//Jオl ui32_64++; if (ui32_64==0)ui64_96++; } if (ui32_64!=0){ uint lastE3_1 = atomicAdd( &arrayE3[idx+1], ui32_64 ); if ((lastE3_1+ui32_64)<lastE3_1){//Jオl ui64_96++;//‚I[o[t[邱Ƃ͐΂ɂȂ } } uint upflg=0; if (ui64_96!=0){ uint lastE3_2 = atomicAdd( &arrayE3[idx+2], ui64_96 ); if ((lastE3_2+ui64_96)<lastE3_2){//Jオl upflg++; } } uint lastE3_i; for(int i=idx+3;i<arrayLength2;i++){ //9999999+1݂ȂƂp if (upflg==0)break; lastE3_i = atomicAdd( &arrayE3[i], upflg ); if (lastE3_i==4294967295){ upflg=1; }else{ upflg=0; } } }
.file "tmpxft_0027e940_00000000-6_garner_win.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z35__device_stub__Z9GarnerGPUPjS_S_S_jPjS_S_S_j .type _Z35__device_stub__Z9GarnerGPUPjS_S_S_jPjS_S_S_j, @function _Z35__device_stub__Z9GarnerGPUPjS_S_S_jPjS_S_S_j: .LFB2032: .cfi_startproc endbr64 subq $168, %rsp .cfi_def_cfa_offset 176 movq %rdi, 40(%rsp) leaq 64(%rsp), %rdi movq %rsi, 32(%rsp) leaq 76(%rsp), %rsi movq %rdx, 24(%rsp) leaq 48(%rsp), %rdx movq %rcx, 16(%rsp) leaq 56(%rsp), %rcx movl %r8d, 12(%rsp) movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 72(%rsp) movq %rax, 112(%rsp) leaq 32(%rsp), %rax movq %rax, 120(%rsp) leaq 24(%rsp), %rax movq %rax, 128(%rsp) leaq 16(%rsp), %rax movq %rax, 136(%rsp) leaq 12(%rsp), %rax movq %rax, 144(%rsp) movabsq $4294967297, %rax movq %rax, 64(%rsp) movq %rax, 76(%rsp) movl $1, 84(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 56(%rsp) .cfi_def_cfa_offset 184 leaq _Z9GarnerGPUPjS_S_S_j(%rip), %rdi pushq 56(%rsp) .cfi_def_cfa_offset 192 movq 92(%rsp), %rcx movl 100(%rsp), %r8d movq 80(%rsp), %rsi movl 88(%rsp), %edx leaq 128(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 184 popq %rdx .cfi_def_cfa_offset 176 .L2: movq 152(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $168, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z35__device_stub__Z9GarnerGPUPjS_S_S_jPjS_S_S_j, .-_Z35__device_stub__Z9GarnerGPUPjS_S_S_jPjS_S_S_j .globl _Z9GarnerGPUPjS_S_S_j .type _Z9GarnerGPUPjS_S_S_j, @function _Z9GarnerGPUPjS_S_S_j: .LFB2033: .cfi_startproc endbr64 jmp _Z35__device_stub__Z9GarnerGPUPjS_S_S_jPjS_S_S_j .cfi_endproc .LFE2033: .size _Z9GarnerGPUPjS_S_S_j, .-_Z9GarnerGPUPjS_S_S_j .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z9GarnerGPUPjS_S_S_j" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z9GarnerGPUPjS_S_S_j(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z9GarnerGPUPjS_S_S_j .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e220000002500 */ /*0020*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */ /* 0x000e240000002100 */ /*0050*/ IMAD R3, R3, 0x100, R2 ; /* 0x0000010003037824 */ /* 0x001fc800078e0202 */ /*0060*/ IMAD.WIDE R4, R3, R0, c[0x0][0x160] ; /* 0x0000580003047625 */ /* 0x000fc800078e0200 */ /*0070*/ IMAD.WIDE R6, R3.reuse, R0.reuse, c[0x0][0x168] ; /* 0x00005a0003067625 */ /* 0x0c0fe400078e0200 */ /*0080*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*0090*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x000ea2000c1e1900 */ /*00a0*/ IMAD.WIDE R8, R3, R0, c[0x0][0x170] ; /* 0x00005c0003087625 */ /* 0x000fca00078e0200 */ /*00b0*/ LDG.E R2, [R8.64] ; /* 0x0000000408027981 */ /* 0x0000e2000c1e1900 */ /*00c0*/ IADD3 R12, P1, -R4, R7, RZ ; /* 0x00000007040c7210 */ /* 0x004fc80007f3e1ff */ /*00d0*/ ISETP.GE.U32.AND P0, PT, R12.reuse, -0x6c000001, PT ; /* 0x93ffffff0c00780c */ /* 0x040fe20003f06070 */ /*00e0*/ IMAD.X R13, RZ, RZ, -0x1, P1 ; /* 0xffffffffff0d7424 */ /* 0x000fe200008e06ff */ /*00f0*/ IADD3 R11, P1, R12, 0x6c000001, RZ ; /* 0x6c0000010c0b7810 */ /* 0x000fc80007f3e0ff */ /*0100*/ ISETP.GE.U32.AND.EX P0, PT, R13, -0x1, PT, P0 ; /* 0xffffffff0d00780c */ /* 0x000fe20003f06100 */ /*0110*/ IMAD.X R10, RZ, RZ, R13, P1 ; /* 0x000000ffff0a7224 */ /* 0x000fc600008e060d */ /*0120*/ SEL R5, R12, R11, !P0 ; /* 0x0000000b0c057207 */ /* 0x000fe40004000000 */ /*0130*/ SEL R10, R13, R10, !P0 ; /* 0x0000000a0d0a7207 */ /* 0x000fc60004000000 */ /*0140*/ IMAD.WIDE.U32 R6, R5, 0x5bcccccf, RZ ; /* 0x5bcccccf05067825 */ /* 0x000fc800078e00ff */ /*0150*/ IMAD R11, R10, 0x5bcccccf, RZ ; /* 0x5bcccccf0a0b7824 */ /* 0x000fca00078e02ff */ /*0160*/ IADD3 R7, R7, R11, RZ ; /* 0x0000000b07077210 */ /* 0x000fca0007ffe0ff */ /*0170*/ IMAD.WIDE.U32 R8, R7, 0x43c668ad, RZ ; /* 0x43c668ad07087825 */ /* 0x001fcc00078e00ff */ /*0180*/ IMAD.WIDE.U32 R10, P0, R6, 0x2f684bd7, R8 ; /* 0x2f684bd7060a7825 */ /* 0x000fc80007800008 */ /*0190*/ IMAD.WIDE.U32 R8, R6, 0x43c668ad, RZ ; /* 0x43c668ad06087825 */ /* 0x000fc800078e00ff */ /*01a0*/ IMAD.X R13, RZ, RZ, RZ, P0 ; /* 0x000000ffff0d7224 */ /* 0x000fe200000e06ff */ /*01b0*/ IADD3 RZ, P0, R9, R10, RZ ; /* 0x0000000a09ff7210 */ /* 0x000fe20007f1e0ff */ /*01c0*/ IMAD.MOV.U32 R12, RZ, RZ, R11 ; /* 0x000000ffff0c7224 */ /* 0x000fc800078e000b */ /*01d0*/ IMAD.WIDE.U32.X R8, R7, 0x2f684bd7, R12, P0 ; /* 0x2f684bd707087825 */ /* 0x000fca00000e040c */ /*01e0*/ IADD3 R5, P0, R6, -R8, RZ ; /* 0x8000000806057210 */ /* 0x000fca0007f1e0ff */ /*01f0*/ IMAD.X R10, R7, 0x1, ~R9, P0 ; /* 0x00000001070a7824 */ /* 0x000fca00000e0e09 */ /*0200*/ SHF.R.U64 R5, R5, 0x1, R10.reuse ; /* 0x0000000105057819 */ /* 0x100fe4000000120a */ /*0210*/ SHF.R.U32.HI R11, RZ, 0x1, R10 ; /* 0x00000001ff0b7819 */ /* 0x000fe4000001160a */ /*0220*/ IADD3 R5, P0, R5, R8, RZ ; /* 0x0000000805057210 */ /* 0x000fca0007f1e0ff */ /*0230*/ IMAD.X R8, R11, 0x1, R9, P0 ; /* 0x000000010b087824 */ /* 0x000fca00000e0609 */ /*0240*/ SHF.R.U64 R5, R5, 0x1e, R8.reuse ; /* 0x0000001e05057819 */ /* 0x100fe40000001208 */ /*0250*/ SHF.R.U32.HI R8, RZ, 0x1e, R8 ; /* 0x0000001eff087819 */ /* 0x000fc60000011608 */ /*0260*/ IMAD.WIDE.U32 R6, R5, -0x6c000001, R6 ; /* 0x93ffffff05067825 */ /* 0x000fc800078e0006 */ /*0270*/ IMAD R8, R8, -0x6c000001, RZ ; /* 0x93ffffff08087824 */ /* 0x000fca00078e02ff */ /*0280*/ IADD3 R7, R7, -R5, R8 ; /* 0x8000000507077210 */ /* 0x000fe40007ffe008 */ /*0290*/ MOV R5, RZ ; /* 0x000000ff00057202 */ /* 0x000fc60000000f00 */ /*02a0*/ IMAD R7, R7, 0x1c000001, RZ ; /* 0x1c00000107077824 */ /* 0x000fe400078e02ff */ /*02b0*/ IMAD.WIDE.U32 R4, R6, 0x1c000001, R4 ; /* 0x1c00000106047825 */ /* 0x000fc800078e0004 */ /*02c0*/ IMAD.IADD R5, R5, 0x1, R7 ; /* 0x0000000105057824 */ /* 0x000fc800078e0207 */ /*02d0*/ IMAD.WIDE.U32 R6, R5, -0x3579bdfd, RZ ; /* 0xca86420305067825 */ /* 0x000fcc00078e00ff */ /*02e0*/ IMAD.WIDE.U32 R8, P0, R4, 0x1111110e, R6 ; /* 0x1111110e04087825 */ /* 0x000fc80007800006 */ /*02f0*/ IMAD.WIDE.U32 R6, R4, -0x3579bdfd, RZ ; /* 0xca86420304067825 */ /* 0x000fc800078e00ff */ /*0300*/ IMAD.X R11, RZ, RZ, RZ, P0 ; /* 0x000000ffff0b7224 */ /* 0x000fe200000e06ff */ /*0310*/ IADD3 RZ, P0, R7, R8, RZ ; /* 0x0000000807ff7210 */ /* 0x000fe20007f1e0ff */ /*0320*/ IMAD.MOV.U32 R10, RZ, RZ, R9 ; /* 0x000000ffff0a7224 */ /* 0x000fc800078e0009 */ /*0330*/ IMAD.WIDE.U32.X R6, R5, 0x1111110e, R10, P0 ; /* 0x1111110e05067825 */ /* 0x000fca00000e040a */ /*0340*/ IADD3 R9, P0, R4, -R6, RZ ; /* 0x8000000604097210 */ /* 0x000fca0007f1e0ff */ /*0350*/ IMAD.X R8, R5, 0x1, ~R7, P0 ; /* 0x0000000105087824 */ /* 0x000fca00000e0e07 */ /*0360*/ SHF.R.U64 R9, R9, 0x1, R8.reuse ; /* 0x0000000109097819 */ /* 0x100fe40000001208 */ /*0370*/ SHF.R.U32.HI R11, RZ, 0x1, R8 ; /* 0x00000001ff0b7819 */ /* 0x000fe40000011608 */ /*0380*/ IADD3 R9, P0, R9, R6, RZ ; /* 0x0000000609097210 */ /* 0x000fe40007f1e0ff */ /*0390*/ IADD3 R6, P1, RZ, -R4, RZ ; /* 0x80000004ff067210 */ /* 0x000fe40007f3e0ff */ /*03a0*/ IADD3.X R8, R11, R7, RZ, P0, !PT ; /* 0x000000070b087210 */ /* 0x000fc600007fe4ff */ /*03b0*/ IMAD.X R7, RZ, RZ, ~R5, P1 ; /* 0x000000ffff077224 */ /* 0x000fe200008e0e05 */ /*03c0*/ SHF.R.U64 R9, R9, 0x1e, R8.reuse ; /* 0x0000001e09097819 */ /* 0x100fe40000001208 */ /*03d0*/ SHF.R.U32.HI R8, RZ, 0x1e, R8 ; /* 0x0000001eff087819 */ /* 0x000fc60000011608 */ /*03e0*/ IMAD.WIDE.U32 R6, R9, 0x78000001, R6 ; /* 0x7800000109067825 */ /* 0x000fc800078e0006 */ /*03f0*/ IMAD R11, R8, 0x78000001, RZ ; /* 0x78000001080b7824 */ /* 0x000fe200078e02ff */ /*0400*/ IADD3 R9, P0, R2, R6, RZ ; /* 0x0000000602097210 */ /* 0x008fc80007f1e0ff */ /*0410*/ IADD3 R6, P1, R9, 0x78000001, RZ ; /* 0x7800000109067810 */ /* 0x000fe20007f3e0ff */ /*0420*/ IMAD.X R7, R7, 0x1, R11, P0 ; /* 0x0000000107077824 */ /* 0x000fc600000e060b */ /*0430*/ ISETP.GT.U32.AND P0, PT, R6, 0x78000000, PT ; /* 0x780000000600780c */ /* 0x000fe20003f04070 */ /*0440*/ IMAD.X R2, RZ, RZ, R7, P1 ; /* 0x000000ffff027224 */ /* 0x000fca00008e0607 */ /*0450*/ ISETP.GT.U32.AND.EX P0, PT, R2, RZ, PT, P0 ; /* 0x000000ff0200720c */ /* 0x000fc80003f04100 */ /*0460*/ SEL R2, R7, R2, P0 ; /* 0x0000000207027207 */ /* 0x000fe40000000000 */ /*0470*/ SEL R6, R9, R6, P0 ; /* 0x0000000609067207 */ /* 0x000fc60000000000 */ /*0480*/ IMAD R9, R2, 0x3e9bd388, RZ ; /* 0x3e9bd38802097824 */ /* 0x000fe400078e02ff */ /*0490*/ IMAD.WIDE.U32 R6, R6, 0x3e9bd388, RZ ; /* 0x3e9bd38806067825 */ /* 0x000fc800078e00ff */ /*04a0*/ IMAD.IADD R7, R7, 0x1, R9 ; /* 0x0000000107077824 */ /* 0x000fc800078e0209 */ /*04b0*/ IMAD.WIDE.U32 R8, R7, -0x3579bdfd, RZ ; /* 0xca86420307087825 */ /* 0x000fcc00078e00ff */ /*04c0*/ IMAD.WIDE.U32 R10, P0, R6, 0x1111110e, R8 ; /* 0x1111110e060a7825 */ /* 0x000fc80007800008 */ /*04d0*/ IMAD.WIDE.U32 R8, R6, -0x3579bdfd, RZ ; /* 0xca86420306087825 */ /* 0x000fe200078e00ff */ /*04e0*/ IADD3.X R13, RZ, RZ, RZ, P0, !PT ; /* 0x000000ffff0d7210 */ /* 0x000fc600007fe4ff */ /*04f0*/ IMAD.MOV.U32 R12, RZ, RZ, R11 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e000b */ /*0500*/ IADD3 RZ, P0, R9, R10, RZ ; /* 0x0000000a09ff7210 */ /* 0x000fca0007f1e0ff */ /*0510*/ IMAD.WIDE.U32.X R8, R7, 0x1111110e, R12, P0 ; /* 0x1111110e07087825 */ /* 0x000fca00000e040c */ /*0520*/ IADD3 R13, P0, R6, -R8, RZ ; /* 0x80000008060d7210 */ /* 0x000fca0007f1e0ff */ /*0530*/ IMAD.X R2, R7, 0x1, ~R9, P0 ; /* 0x0000000107027824 */ /* 0x000fca00000e0e09 */ /*0540*/ SHF.R.U64 R13, R13, 0x1, R2.reuse ; /* 0x000000010d0d7819 */ /* 0x100fe40000001202 */ /*0550*/ SHF.R.U32.HI R11, RZ, 0x1, R2 ; /* 0x00000001ff0b7819 */ /* 0x000fe40000011602 */ /*0560*/ IADD3 R13, P0, R13, R8, RZ ; /* 0x000000080d0d7210 */ /* 0x000fca0007f1e0ff */ /*0570*/ IMAD.X R12, R11, 0x1, R9, P0 ; /* 0x000000010b0c7824 */ /* 0x000fca00000e0609 */ /*0580*/ SHF.R.U64 R13, R13, 0x1e, R12 ; /* 0x0000001e0d0d7819 */ /* 0x000fca000000120c */ /*0590*/ IMAD.WIDE.U32 R10, R13, -0x78000001, R6 ; /* 0x87ffffff0d0a7825 */ /* 0x000fc800078e0006 */ /*05a0*/ IMAD.WIDE R6, R3, R0, c[0x0][0x178] ; /* 0x00005e0003067625 */ /* 0x000fc800078e0200 */ /*05b0*/ IMAD.WIDE.U32 R8, R10, -0x77ffffff, RZ ; /* 0x880000010a087825 */ /* 0x000fca00078e00ff */ /*05c0*/ IADD3 R15, P0, R4, R8, RZ ; /* 0x00000008040f7210 */ /* 0x000fca0007f1e0ff */ /*05d0*/ ATOMG.E.ADD.STRONG.GPU PT, R2, [R6.64], R15 ; /* 0x0000000f060279a8 */ /* 0x000ea200081ee1c4 */ /*05e0*/ SHF.R.U32.HI R4, RZ, 0x1e, R12 ; /* 0x0000001eff047819 */ /* 0x000fe2000001160c */ /*05f0*/ BSSY B0, 0x7b0 ; /* 0x000001b000007945 */ /* 0x000fe80003800000 */ /*0600*/ IMAD R4, R4, -0x78000001, RZ ; /* 0x87ffffff04047824 */ /* 0x000fca00078e02ff */ /*0610*/ IADD3 R11, R11, -R13, R4 ; /* 0x8000000d0b0b7210 */ /* 0x000fca0007ffe004 */ /*0620*/ IMAD.WIDE.U32 R12, R11, -0x77ffffff, RZ ; /* 0x880000010b0c7825 */ /* 0x000fcc00078e00ff */ /*0630*/ IMAD.WIDE.U32 R12, R10, 0xbd00000, R12 ; /* 0x0bd000000a0c7825 */ /* 0x000fca00078e000c */ /*0640*/ IADD3 R4, P1, R9, R12, RZ ; /* 0x0000000c09047210 */ /* 0x000fc80007f3e0ff */ /*0650*/ IADD3.X R5, R4, R5, RZ, P0, !PT ; /* 0x0000000504057210 */ /* 0x000fe200007fe4ff */ /*0660*/ IMAD.X R11, R11, 0xbd00000, R13, P1 ; /* 0x0bd000000b0b7824 */ /* 0x000fe200008e060d */ /*0670*/ ISETP.GE.U32.AND P0, PT, R15, R8, PT ; /* 0x000000080f00720c */ /* 0x000fc80003f06070 */ /*0680*/ ISETP.GE.U32.AND.EX P0, PT, R5, R4, PT, P0 ; /* 0x000000040500720c */ /* 0x000fc80003f06100 */ /*0690*/ SEL R4, RZ, 0x1, P0 ; /* 0x00000001ff047807 */ /* 0x000fe20000000000 */ /*06a0*/ IMAD.IADD R9, R2, 0x1, R15 ; /* 0x0000000102097824 */ /* 0x004fca00078e020f */ /*06b0*/ ISETP.GE.U32.AND P2, PT, R9, R2, PT ; /* 0x000000020900720c */ /* 0x000fe40003f46070 */ /*06c0*/ IADD3 R2, R5, 0x1, RZ ; /* 0x0000000105027810 */ /* 0x000fc80007ffe0ff */ /*06d0*/ SEL R5, R2.reuse, R5, !P2 ; /* 0x0000000502057207 */ /* 0x040fe40005000000 */ /*06e0*/ ISETP.EQ.AND P1, PT, R2, RZ, !P2 ; /* 0x000000ff0200720c */ /* 0x000fe20005722270 */ /*06f0*/ IMAD.IADD R2, R4, 0x1, R11 ; /* 0x0000000104027824 */ /* 0x000fe200078e020b */ /*0700*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fc80003f05270 */ /*0710*/ IADD3 R9, R2, 0x1, RZ ; /* 0x0000000102097810 */ /* 0x000fce0007ffe0ff */ /*0720*/ @!P1 IMAD.MOV R9, RZ, RZ, R2 ; /* 0x000000ffff099224 */ /* 0x000fe400078e0202 */ /*0730*/ @!P0 BRA 0x7a0 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*0740*/ ATOMG.E.ADD.STRONG.GPU PT, R2, [R6.64+0x4], R5 ; /* 0x00000405060279a8 */ /* 0x000ea400081ee1c4 */ /*0750*/ IMAD.IADD R11, R5, 0x1, R2 ; /* 0x00000001050b7824 */ /* 0x004fca00078e0202 */ /*0760*/ ISETP.GE.U32.AND P0, PT, R11, R2, PT ; /* 0x000000020b00720c */ /* 0x000fe40003f06070 */ /*0770*/ IADD3 R2, R9, 0x1, RZ ; /* 0x0000000109027810 */ /* 0x000fd60007ffe0ff */ /*0780*/ @P0 IMAD.MOV R2, RZ, RZ, R9 ; /* 0x000000ffff020224 */ /* 0x000fca00078e0209 */ /*0790*/ MOV R9, R2 ; /* 0x0000000200097202 */ /* 0x000fe40000000f00 */ /*07a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*07b0*/ ISETP.NE.AND P1, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f25270 */ /*07c0*/ BSSY B0, 0x840 ; /* 0x0000007000007945 */ /* 0x000fe20003800000 */ /*07d0*/ IADD3 R2, R3, 0x3, RZ ; /* 0x0000000303027810 */ /* 0x000fe40007ffe0ff */ /*07e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd20003f0f070 */ /*07f0*/ @!P1 BRA 0x830 ; /* 0x0000003000009947 */ /* 0x000fea0003800000 */ /*0800*/ ATOMG.E.ADD.STRONG.GPU PT, R6, [R6.64+0x8], R9 ; /* 0x00000809060679a8 */ /* 0x000ea400081ee1c4 */ /*0810*/ IMAD.IADD R3, R6, 0x1, R9 ; /* 0x0000000106037824 */ /* 0x004fca00078e0209 */ /*0820*/ ISETP.GE.U32.AND P0, PT, R3, R6, PT ; /* 0x000000060300720c */ /* 0x000fd00003f06070 */ /*0830*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0840*/ ISETP.GE.U32.OR P0, PT, R2, c[0x0][0x180], P0 ; /* 0x0000600002007a0c */ /* 0x000fda0000706470 */ /*0850*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0860*/ IMAD.MOV.U32 R5, RZ, RZ, R2 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0002 */ /*0870*/ IMAD.MOV.U32 R7, RZ, RZ, 0x1 ; /* 0x00000001ff077424 */ /* 0x000fe400078e00ff */ /*0880*/ IMAD.WIDE R2, R5.reuse, R0, c[0x0][0x178] ; /* 0x00005e0005027625 */ /* 0x040fe200078e0200 */ /*0890*/ YIELD ; /* 0x0000000000007946 */ /* 0x000fea0003800000 */ /*08a0*/ ATOMG.E.ADD.STRONG.GPU PT, R2, [R2.64], R7 ; /* 0x00000007020279a8 */ /* 0x000ea200081ee1c4 */ /*08b0*/ IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105057810 */ /* 0x000fc80007ffe0ff */ /*08c0*/ ISETP.LT.U32.AND P1, PT, R5, c[0x0][0x180], PT ; /* 0x0000600005007a0c */ /* 0x000fe40003f21070 */ /*08d0*/ ISETP.NE.AND P0, PT, R2, -0x1, PT ; /* 0xffffffff0200780c */ /* 0x004fc80003f05270 */ /*08e0*/ SEL R7, RZ, 0x1, P0 ; /* 0x00000001ff077807 */ /* 0x000fd20000000000 */ /*08f0*/ @!P0 BRA P1, 0x880 ; /* 0xffffff8000008947 */ /* 0x000fea000083ffff */ /*0900*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0910*/ BRA 0x910; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0920*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0930*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0940*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0950*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0960*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0970*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0980*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0990*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #define ulong unsigned long long #define uint unsigned int #define MOD_P0 469762049LL #define MOD_P1 1811939329LL #define MOD_P2 2013265921LL //R‚݂̌ɑfP^̂ŁAꂼ̗]肩猳̒l𕜌 //̂ƂP͑SČŒȂ̂ŏ]vZ͑Sߑłł //E0`E2́AE3ɏo //Jオl //arrayLength2=arrayE3̔zTCY __global__ void GarnerGPU(uint *arrayE0,uint *arrayE1,uint *arrayE2,uint *arrayE3,uint arrayLength2 ) { int idx = threadIdx.x+blockIdx.x*256; ulong ar=arrayE0[idx]; ulong br=arrayE1[idx]; ulong cr=arrayE2[idx]; ulong x=ar; ulong brx=br-x+MOD_P1; if (brx>=MOD_P1)brx-=MOD_P1; x=x+(brx*1540148431)%MOD_P1*MOD_P0; //1540148431=modinv(MOD_P0,MOD_P1) //̎_xMOD_P1*MOD_P0ȉł邱Ƃۏ؂Ă ulong crx=cr+MOD_P2-x%MOD_P2; if (crx>=MOD_P2)crx-=MOD_P2; ulong w1=(crx*1050399624)%MOD_P2; //1050399624=modinv(MOD_P0,MOD_P2) *modinv(MOD_P1,MOD_P2)%MOD_P2 ulong w2=MOD_P0*MOD_P1; ulong out_lo=w1*w2; ulong out_hi=__umul64hi(w1,w2); if (out_lo>(out_lo+x)){ out_hi++; } out_lo+=x; //Jオ菈 uint ui00_32=(uint)(out_lo%(1ULL<<32ULL)); uint ui32_64=(uint)(out_lo/(1ULL<<32ULL)); uint ui64_96=(uint)(out_hi%(1ULL<<32ULL)); uint lastE3_0 = atomicAdd( &arrayE3[idx+0], ui00_32 ); if ((lastE3_0+ui00_32)<lastE3_0){//Jオl ui32_64++; if (ui32_64==0)ui64_96++; } if (ui32_64!=0){ uint lastE3_1 = atomicAdd( &arrayE3[idx+1], ui32_64 ); if ((lastE3_1+ui32_64)<lastE3_1){//Jオl ui64_96++;//‚I[o[t[邱Ƃ͐΂ɂȂ } } uint upflg=0; if (ui64_96!=0){ uint lastE3_2 = atomicAdd( &arrayE3[idx+2], ui64_96 ); if ((lastE3_2+ui64_96)<lastE3_2){//Jオl upflg++; } } uint lastE3_i; for(int i=idx+3;i<arrayLength2;i++){ //9999999+1݂ȂƂp if (upflg==0)break; lastE3_i = atomicAdd( &arrayE3[i], upflg ); if (lastE3_i==4294967295){ upflg=1; }else{ upflg=0; } } }
.text .file "garner_win.hip" .globl _Z24__device_stub__GarnerGPUPjS_S_S_j # -- Begin function _Z24__device_stub__GarnerGPUPjS_S_S_j .type _Z24__device_stub__GarnerGPUPjS_S_S_j,@function _Z24__device_stub__GarnerGPUPjS_S_S_j: # @_Z24__device_stub__GarnerGPUPjS_S_S_j .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $144, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 12(%rsp), %rcx movl %r8d, (%rcx) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9GarnerGPUPjS_S_S_j, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $160, %rsp .cfi_adjust_cfa_offset -160 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z24__device_stub__GarnerGPUPjS_S_S_j, .Lfunc_end0-_Z24__device_stub__GarnerGPUPjS_S_S_j .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9GarnerGPUPjS_S_S_j, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z9GarnerGPUPjS_S_S_j,@object # @_Z9GarnerGPUPjS_S_S_j .section .rodata,"a",@progbits .globl _Z9GarnerGPUPjS_S_S_j .p2align 3, 0x0 _Z9GarnerGPUPjS_S_S_j: .quad _Z24__device_stub__GarnerGPUPjS_S_S_j .size _Z9GarnerGPUPjS_S_S_j, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z9GarnerGPUPjS_S_S_j" .size .L__unnamed_1, 22 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z24__device_stub__GarnerGPUPjS_S_S_j .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z9GarnerGPUPjS_S_S_j .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z9GarnerGPUPjS_S_S_j ; -- Begin function _Z9GarnerGPUPjS_S_S_j .globl _Z9GarnerGPUPjS_S_S_j .p2align 8 .type _Z9GarnerGPUPjS_S_S_j,@function _Z9GarnerGPUPjS_S_S_j: ; @_Z9GarnerGPUPjS_S_S_j ; %bb.0: s_load_b256 s[4:11], s[0:1], 0x0 v_lshl_add_u32 v0, s15, 8, v0 s_movk_i32 s2, 0x67a s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) s_add_u32 s2, 0x134, s2 s_addc_u32 s3, 0, 0 v_ashrrev_i32_e32 v1, 31, v0 v_add_co_u32 v7, s2, 0x5ed09000, s2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_cmp_lg_u32 s2, 0 v_lshlrev_b64 v[1:2], 2, v[0:1] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s4, v1 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo v_add_co_u32 v5, vcc_lo, s6, v1 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo v_readfirstlane_b32 s4, v7 global_load_b32 v3, v[3:4], off global_load_b32 v6, v[5:6], off v_add_co_u32 v4, vcc_lo, s8, v1 v_add_co_ci_u32_e32 v5, vcc_lo, s9, v2, vcc_lo s_addc_u32 s5, s3, 2 s_mov_b32 s2, 0x93ffffff s_mov_b32 s3, -1 global_load_b32 v13, v[4:5], off s_mul_hi_u32 s7, s4, 0x93ffffff s_mul_i32 s6, s5, 0x93ffffff s_sub_i32 s7, s7, s4 s_mul_i32 s8, s4, 0x93ffffff s_add_i32 s7, s7, s6 s_mul_hi_u32 s9, s4, s8 s_mul_hi_u32 s12, s5, s8 s_mul_hi_u32 s6, s5, s7 s_waitcnt vmcnt(1) v_sub_co_u32 v4, s13, v6, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_co_ci_u32_e64 v5, null, 0, 0, s13 v_add_co_u32 v6, vcc_lo, 0x6c000001, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, 0, v5, vcc_lo v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[4:5] s_mul_hi_u32 s3, s4, s7 s_mul_i32 s4, s4, s7 s_mul_i32 s2, s5, s8 s_add_u32 s4, s9, s4 s_addc_u32 s3, 0, s3 v_cndmask_b32_e32 v6, v6, v4, vcc_lo v_cndmask_b32_e32 v8, v8, v5, vcc_lo s_add_u32 s2, s4, s2 s_mul_i32 s7, s5, s7 s_addc_u32 s2, s3, s12 v_mad_u64_u32 v[4:5], null, 0x5bcccccf, v6, 0 s_addc_u32 s3, s6, 0 s_add_u32 s2, s2, s7 s_addc_u32 s3, 0, s3 v_add_co_u32 v11, s2, v7, s2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) s_cmp_lg_u32 s2, 0 v_mad_u64_u32 v[6:7], null, 0x5bcccccf, v8, v[5:6] s_addc_u32 s2, s5, s3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mul_hi_u32 v5, v4, v11 v_mad_u64_u32 v[7:8], null, v4, s2, 0 v_mad_u64_u32 v[9:10], null, v6, v11, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v5, vcc_lo, v5, v7 v_add_co_ci_u32_e32 v11, vcc_lo, 0, v8, vcc_lo v_mad_u64_u32 v[7:8], null, v6, s2, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v5, vcc_lo, v5, v9 v_add_co_ci_u32_e32 v5, vcc_lo, v11, v10, vcc_lo s_add_u32 s2, 0, 0 s_addc_u32 s3, 0, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo v_add_co_u32 v5, vcc_lo, v5, v7 v_add_co_u32 v14, s2, 0x2222221d, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v10, vcc_lo, 0, v8, vcc_lo v_mad_u64_u32 v[7:8], null, 0x6c000001, v5, 0 s_cmp_lg_u32 s2, 0 s_addc_u32 s3, s3, 2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mov_b32_e32 v5, v8 v_mad_u64_u32 v[8:9], null, 0x6c000001, v10, v[5:6] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_co_u32 v5, vcc_lo, v4, v7 v_sub_co_ci_u32_e32 v4, vcc_lo, v6, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_subrev_co_u32 v6, vcc_lo, 0x6c000001, v5 v_subrev_co_ci_u32_e32 v7, vcc_lo, 0, v4, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4) v_cmp_lt_u32_e32 vcc_lo, 0x6c000000, v6 v_cndmask_b32_e64 v8, 0, -1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, 0x6c000000, v5 v_cndmask_b32_e64 v9, 0, -1, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v7 v_dual_cndmask_b32 v7, -1, v8 :: v_dual_add_nc_u32 v8, 0x93ffffff, v6 v_cmp_eq_u32_e32 vcc_lo, 0, v4 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_mov_b32 v4, 0 :: v_dual_cndmask_b32 v9, -1, v9 v_cmp_ne_u32_e32 vcc_lo, 0, v7 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v6, v6, v8, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v7, v5, v6, vcc_lo v_mad_u64_u32 v[5:6], null, 0x1c000001, v7, v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mad_u64_u32 v[7:8], null, v5, s3, 0 v_mul_hi_u32 v3, v5, v14 v_mad_u64_u32 v[9:10], null, v6, v14, 0 v_mad_u64_u32 v[11:12], null, v6, s3, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, v7 v_add_co_ci_u32_e32 v7, vcc_lo, 0, v8, vcc_lo v_add_co_u32 v3, vcc_lo, v3, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v7, v10, vcc_lo v_add_co_ci_u32_e32 v7, vcc_lo, 0, v12, vcc_lo v_add_co_u32 v3, vcc_lo, v3, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v10, vcc_lo, 0, v7, vcc_lo v_mad_u64_u32 v[7:8], null, 0x78000001, v3, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mov_b32_e32 v3, v8 v_mad_u64_u32 v[8:9], null, 0x78000001, v10, v[3:4] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_co_u32 v3, vcc_lo, v5, v7 v_sub_co_ci_u32_e32 v7, vcc_lo, v6, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_subrev_co_u32 v8, vcc_lo, 0x78000001, v3 v_subrev_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) v_cmp_lt_u32_e32 vcc_lo, 0x78000000, v8 v_cmp_eq_u32_e64 s2, 0, v7 v_cndmask_b32_e64 v10, 0, -1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, 0x78000000, v3 v_cndmask_b32_e64 v11, 0, -1, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v10, -1, v10, vcc_lo v_subrev_co_u32 v12, vcc_lo, 0x78000001, v8 v_subrev_co_ci_u32_e32 v15, vcc_lo, 0, v9, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v10 v_cndmask_b32_e64 v10, -1, v11, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_cndmask_b32 v9, v9, v15 :: v_dual_cndmask_b32 v8, v8, v12 v_cmp_ne_u32_e32 vcc_lo, 0, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v7, v7, v9, vcc_lo v_cndmask_b32_e32 v3, v3, v8, vcc_lo s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_sub_co_u32 v3, vcc_lo, v13, v3 v_sub_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, 0x78000001, v3 v_add_co_ci_u32_e32 v8, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_lt_u64_e32 vcc_lo, 0x78000000, v[7:8] v_dual_cndmask_b32 v10, v8, v9 :: v_dual_cndmask_b32 v3, v7, v3 v_mad_u64_u32 v[7:8], null, 0x3e9bd388, v3, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mov_b32_e32 v3, v8 v_mad_u64_u32 v[8:9], null, 0x3e9bd388, v10, v[3:4] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mad_u64_u32 v[9:10], null, v7, s3, 0 v_mul_hi_u32 v3, v7, v14 v_mad_u64_u32 v[11:12], null, v8, v14, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v3, vcc_lo, v3, v9 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v10, vcc_lo v_mad_u64_u32 v[9:10], null, v8, s3, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v3, vcc_lo, v3, v11 v_add_co_ci_u32_e32 v3, vcc_lo, v13, v12, vcc_lo s_mov_b32 s3, -1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo v_add_co_u32 v3, vcc_lo, v3, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e32 v12, vcc_lo, 0, v10, vcc_lo v_mad_u64_u32 v[9:10], null, 0x78000001, v3, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mov_b32_e32 v3, v10 v_mad_u64_u32 v[10:11], null, 0x78000001, v12, v[3:4] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_sub_co_u32 v3, vcc_lo, v7, v9 v_sub_co_ci_u32_e32 v7, vcc_lo, v8, v10, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_subrev_co_u32 v8, vcc_lo, 0x78000001, v3 v_subrev_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) v_cmp_lt_u32_e32 vcc_lo, 0x78000000, v8 v_cmp_eq_u32_e64 s2, 0, v7 v_cndmask_b32_e64 v10, 0, -1, vcc_lo v_cmp_lt_u32_e32 vcc_lo, 0x78000000, v3 v_cndmask_b32_e64 v11, 0, -1, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v9 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v10, -1, v10, vcc_lo v_subrev_co_u32 v12, vcc_lo, 0x78000001, v8 v_subrev_co_ci_u32_e32 v13, vcc_lo, 0, v9, vcc_lo v_cmp_ne_u32_e32 vcc_lo, 0, v10 v_cndmask_b32_e64 v10, -1, v11, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_dual_cndmask_b32 v8, v8, v12 :: v_dual_cndmask_b32 v9, v9, v13 v_cmp_ne_u32_e32 vcc_lo, 0, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v11, v3, v8, vcc_lo v_cndmask_b32_e32 v9, v7, v9, vcc_lo v_add_co_u32 v1, vcc_lo, s10, v1 v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mad_u64_u32 v[7:8], null, 0x88000001, v11, 0 v_mul_lo_u32 v3, 0x88000001, v9 v_mul_lo_u32 v10, 0xbd00000, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_mov_b32_e32 v9, v7 v_add3_u32 v10, v8, v10, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v9, v5 v_add_co_ci_u32_e32 v6, vcc_lo, v10, v6, vcc_lo global_atomic_add_u32 v3, v[1:2], v5, off glc v_add_co_u32 v12, s2, v6, 1 s_waitcnt vmcnt(0) v_not_b32_e32 v7, v3 v_mov_b32_e32 v3, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_lt_u32_e32 vcc_lo, v7, v5 v_mad_u64_u32 v[7:8], null, 0xbd00000, v11, v[3:4] s_and_b32 s2, vcc_lo, s2 v_cndmask_b32_e32 v4, v6, v12, vcc_lo v_cmp_lt_u64_e32 vcc_lo, v[5:6], v[9:10] v_cndmask_b32_e64 v3, 0, 1, s2 s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v3, vcc_lo, v3, v8, vcc_lo v_cmpx_ne_u32_e32 0, v4 s_cbranch_execz .LBB0_2 ; %bb.1: global_atomic_add_u32 v5, v[1:2], v4, off offset:4 glc s_waitcnt vmcnt(0) v_not_b32_e32 v5, v5 s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u32_e32 vcc_lo, v4, v5 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo .LBB0_2: s_or_b32 exec_lo, exec_lo, s2 s_load_b32 s2, s[0:1], 0x20 s_mov_b32 s0, exec_lo s_delay_alu instid0(VALU_DEP_1) v_cmpx_ne_u32_e32 0, v3 s_cbranch_execz .LBB0_4 ; %bb.3: global_atomic_add_u32 v1, v[1:2], v3, off offset:8 glc s_waitcnt vmcnt(0) v_not_b32_e32 v1, v1 s_delay_alu instid0(VALU_DEP_1) v_cmp_le_u32_e32 vcc_lo, v3, v1 s_or_not1_b32 s3, vcc_lo, exec_lo .LBB0_4: s_or_b32 exec_lo, exec_lo, s0 v_add_nc_u32_e32 v1, 3, v0 s_xor_b32 s0, s3, -1 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_cmp_gt_u32_e32 vcc_lo, s2, v1 s_and_b32 s0, s0, vcc_lo s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_7 ; %bb.5: ; %.lr.ph.preheader v_ashrrev_i32_e32 v2, 31, v1 s_mov_b32 s3, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[3:4], 2, v[1:2] v_add_nc_u32_e32 v2, 4, v0 v_add_co_u32 v0, vcc_lo, s10, v3 v_mov_b32_e32 v3, 1 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v1, vcc_lo, s11, v4, vcc_lo .LBB0_6: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 global_atomic_add_u32 v4, v[0:1], v3, off glc v_cmp_le_u32_e32 vcc_lo, s2, v2 v_add_co_u32 v0, s1, v0, 4 v_add_nc_u32_e32 v2, 1, v2 s_waitcnt vmcnt(0) v_cmp_ne_u32_e64 s0, -1, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_or_b32 s0, s0, vcc_lo v_add_co_ci_u32_e64 v1, vcc_lo, 0, v1, s1 s_and_b32 s0, exec_lo, s0 s_or_b32 s3, s0, s3 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB0_6 .LBB0_7: ; %._crit_edge s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9GarnerGPUPjS_S_S_j .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 36 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 16 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z9GarnerGPUPjS_S_S_j, .Lfunc_end0-_Z9GarnerGPUPjS_S_S_j ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1684 ; NumSgprs: 18 ; NumVgprs: 16 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 16 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .offset: 32 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 36 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9GarnerGPUPjS_S_S_j .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z9GarnerGPUPjS_S_S_j.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 16 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
e848db5288e463d05e0cb94a396e9dbd9467a261
#include <stdio.h> #include <cuda.h> #include <stdlib.h> #define N 17 // size of arrays __global__ void transpose (int *a, int *b) { int col = blockIdx.x*blockDim.x+threadIdx.x; int row =blockIdx.y*blockDim.y+threadIdx.y; int index1 = col + row * N; int index2 = row + col * N; if ( col < N && row < N) b[index1]= a[index2]; } int main (int argc, char **argv ) { int i,j; int size = N * N *sizeof( int); int a[N][N], *devA, *devB; int gridsize = (int) ceil((double) N/16); for (i = 0; i < N; i++){ // put some numbers into array for (j= 0; j < N; j++) { a[i][j] = j + N * i; } } printf("Initial values"); for (i = 0; i < N; i++) { printf("\n"); for (j= 0; j < N; j++) { printf("%3d ",a[i][j]); } } printf("\nN = %d, grid size = %d\n",N,gridsize); dim3 block (16,16); dim3 grid (gridsize, gridsize); cudaMalloc( (void**)&devA, size ); cudaMalloc( (void**)&devB, size ); cudaMemcpy( devA, a, size, cudaMemcpyHostToDevice); transpose<<<grid, block>>>(devA, devB); cudaMemcpy( a, devB, size, cudaMemcpyDeviceToHost); printf("Results"); for (i = 0; i < N; i++) { printf("\n"); for (j= 0; j < N; j++) { printf("%3d ",a[i][j]); } } printf("\n"); cudaFree( devA); cudaFree( devB); return (0); }
.file "tmpxft_002319dc_00000000-6_transpose.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z30__device_stub__Z9transposePiS_PiS_ .type _Z30__device_stub__Z9transposePiS_PiS_, @function _Z30__device_stub__Z9transposePiS_PiS_: .LFB2052: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z9transposePiS_(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L2: movq 104(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z30__device_stub__Z9transposePiS_PiS_, .-_Z30__device_stub__Z9transposePiS_PiS_ .globl _Z9transposePiS_ .type _Z9transposePiS_, @function _Z9transposePiS_: .LFB2053: .cfi_startproc endbr64 jmp _Z30__device_stub__Z9transposePiS_PiS_ .cfi_endproc .LFE2053: .size _Z9transposePiS_, .-_Z9transposePiS_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "Initial values" .LC1: .string "\n" .LC2: .string "%3d " .LC3: .string "\nN = %d, grid size = %d\n" .LC4: .string "Results" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 xorl %edx, %edx pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $1224, %rsp .cfi_def_cfa_offset 1280 movq %fs:40, %rax movq %rax, 1208(%rsp) xorl %eax, %eax leaq 52(%rsp), %rbx movq %rbx, %rcx .L9: xorl %eax, %eax .L10: leal (%rdx,%rax), %esi movl %esi, (%rcx,%rax,4) incq %rax cmpq $17, %rax jne .L10 addl $17, %edx addq $68, %rcx cmpl $289, %edx jne .L9 leaq .LC0(%rip), %rsi movl $2, %edi xorl %eax, %eax movq %rbx, %rbp call __printf_chk@PLT leaq 1156(%rbx), %r13 leaq .LC1(%rip), %r12 .L13: movq %r12, %rsi movl $2, %edi xorl %eax, %eax xorl %r15d, %r15d call __printf_chk@PLT leaq .LC2(%rip), %r14 .L12: movl 0(%rbp,%r15,4), %edx movq %r14, %rsi movl $2, %edi xorl %eax, %eax incq %r15 call __printf_chk@PLT cmpq $17, %r15 jne .L12 addq $68, %rbp cmpq %r13, %rbp jne .L13 movl $2, %ecx movl $17, %edx leaq .LC3(%rip), %rsi xorl %eax, %eax movl $2, %edi call __printf_chk@PLT leaq 8(%rsp), %rdi movabsq $68719476752, %rax movl $1156, %esi movq %rax, 28(%rsp) movabsq $8589934594, %rax movl $1, 36(%rsp) movq %rax, 40(%rsp) movl $1, 48(%rsp) call cudaMalloc@PLT leaq 16(%rsp), %rdi movl $1156, %esi call cudaMalloc@PLT movq 8(%rsp), %rdi movl $1, %ecx movq %rbx, %rsi movl $1156, %edx call cudaMemcpy@PLT movl 36(%rsp), %ecx movl 48(%rsp), %esi xorl %r9d, %r9d movq 28(%rsp), %rdx movq 40(%rsp), %rdi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L14 movq 16(%rsp), %rsi movq 8(%rsp), %rdi call _Z30__device_stub__Z9transposePiS_PiS_ .L14: movq 16(%rsp), %rsi movq %rbx, %rdi movl $2, %ecx movl $1156, %edx call cudaMemcpy@PLT leaq .LC4(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L16: movq %r12, %rsi movl $2, %edi xorl %eax, %eax xorl %ebp, %ebp call __printf_chk@PLT .L15: movl (%rbx,%rbp,4), %edx movq %r14, %rsi movl $2, %edi xorl %eax, %eax incq %rbp call __printf_chk@PLT cmpq $17, %rbp jne .L15 addq $68, %rbx cmpq %r13, %rbx jne .L16 movq %r12, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq 8(%rsp), %rdi call cudaFree@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq 1208(%rsp), %rax subq %fs:40, %rax je .L17 call __stack_chk_fail@PLT .L17: addq $1224, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC5: .string "_Z9transposePiS_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC5(%rip), %rdx movq %rax, %rdi leaq _Z9transposePiS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z9transposePiS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002600 */ /*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */ /* 0x000e280000002200 */ /*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e680000002500 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e620000002100 */ /*0050*/ IMAD R5, R5, c[0x0][0x4], R2 ; /* 0x0000010005057a24 */ /* 0x001fca00078e0202 */ /*0060*/ ISETP.GT.AND P0, PT, R5, 0x10, PT ; /* 0x000000100500780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x002fca00078e0203 */ /*0080*/ ISETP.GT.OR P0, PT, R0, 0x10, P0 ; /* 0x000000100000780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R4, 0x4 ; /* 0x0000000400047802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R2, R0, 0x11, R5 ; /* 0x0000001100027824 */ /* 0x000fe200078e0205 */ /*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*00d0*/ IMAD.WIDE R2, R2, R4, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fcc00078e0204 */ /*00e0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00f0*/ IMAD R5, R5, 0x11, R0 ; /* 0x0000001105057824 */ /* 0x000fc800078e0200 */ /*0100*/ IMAD.WIDE R4, R5, R4, c[0x0][0x168] ; /* 0x00005a0005047625 */ /* 0x000fca00078e0204 */ /*0110*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x004fe2000c101904 */ /*0120*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0130*/ BRA 0x130; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <hip/hip_runtime.h> #include <stdlib.h> #define N 17 // size of arrays __global__ void transpose (int *a, int *b) { int col = blockIdx.x*blockDim.x+threadIdx.x; int row =blockIdx.y*blockDim.y+threadIdx.y; int index1 = col + row * N; int index2 = row + col * N; if ( col < N && row < N) b[index1]= a[index2]; } int main (int argc, char **argv ) { int i,j; int size = N * N *sizeof( int); int a[N][N], *devA, *devB; int gridsize = (int) ceil((double) N/16); for (i = 0; i < N; i++){ // put some numbers into array for (j= 0; j < N; j++) { a[i][j] = j + N * i; } } printf("Initial values"); for (i = 0; i < N; i++) { printf("\n"); for (j= 0; j < N; j++) { printf("%3d ",a[i][j]); } } printf("\nN = %d, grid size = %d\n",N,gridsize); dim3 block (16,16); dim3 grid (gridsize, gridsize); hipMalloc( (void**)&devA, size ); hipMalloc( (void**)&devB, size ); hipMemcpy( devA, a, size, hipMemcpyHostToDevice); transpose<<<grid, block>>>(devA, devB); hipMemcpy( a, devB, size, hipMemcpyDeviceToHost); printf("Results"); for (i = 0; i < N; i++) { printf("\n"); for (j= 0; j < N; j++) { printf("%3d ",a[i][j]); } } printf("\n"); hipFree( devA); hipFree( devB); return (0); }
.text .file "transpose.hip" .globl _Z24__device_stub__transposePiS_ # -- Begin function _Z24__device_stub__transposePiS_ .type _Z24__device_stub__transposePiS_,@function _Z24__device_stub__transposePiS_: # @_Z24__device_stub__transposePiS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9transposePiS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z24__device_stub__transposePiS_, .Lfunc_end0-_Z24__device_stub__transposePiS_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $1184, %rsp # imm = 0x4A0 .cfi_def_cfa_offset 1216 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 xorl %eax, %eax xorl %ecx, %ecx .LBB1_1: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB1_2 Depth 2 movl $17, %edx movq %rax, %rsi .LBB1_2: # Parent Loop BB1_1 Depth=1 # => This Inner Loop Header: Depth=2 movl %esi, 16(%rsp,%rsi,4) incq %rsi decq %rdx jne .LBB1_2 # %bb.3: # in Loop: Header=BB1_1 Depth=1 incq %rcx addq $17, %rax cmpq $17, %rcx jne .LBB1_1 # %bb.4: movl $.L.str, %edi xorl %eax, %eax callq printf leaq 16(%rsp), %rbx xorl %r14d, %r14d .LBB1_5: # =>This Loop Header: Depth=1 # Child Loop BB1_6 Depth 2 movl $10, %edi callq putchar@PLT xorl %r15d, %r15d .LBB1_6: # Parent Loop BB1_5 Depth=1 # => This Inner Loop Header: Depth=2 movl (%rbx,%r15,4), %esi movl $.L.str.2, %edi xorl %eax, %eax callq printf incq %r15 cmpq $17, %r15 jne .LBB1_6 # %bb.7: # in Loop: Header=BB1_5 Depth=1 incq %r14 addq $68, %rbx cmpq $17, %r14 jne .LBB1_5 # %bb.8: movl $.L.str.3, %edi movl $17, %esi movl $2, %edx xorl %eax, %eax callq printf leaq 8(%rsp), %rbx movl $1156, %esi # imm = 0x484 movq %rbx, %rdi callq hipMalloc movq %rsp, %rdi movl $1156, %esi # imm = 0x484 callq hipMalloc movq (%rbx), %rdi leaq 16(%rsp), %rbx movl $1156, %edx # imm = 0x484 movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movabsq $8589934594, %rdi # imm = 0x200000002 movabsq $68719476752, %rdx # imm = 0x1000000010 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_10 # %bb.9: movq 8(%rsp), %rdi movq (%rsp), %rsi callq _Z24__device_stub__transposePiS_ .LBB1_10: movq (%rsp), %rsi movl $1156, %edx # imm = 0x484 movq %rbx, %rdi movl $2, %ecx callq hipMemcpy movl $.L.str.4, %edi xorl %eax, %eax callq printf xorl %r14d, %r14d .LBB1_11: # =>This Loop Header: Depth=1 # Child Loop BB1_12 Depth 2 movl $10, %edi callq putchar@PLT xorl %r15d, %r15d .LBB1_12: # Parent Loop BB1_11 Depth=1 # => This Inner Loop Header: Depth=2 movl (%rbx,%r15,4), %esi movl $.L.str.2, %edi xorl %eax, %eax callq printf incq %r15 cmpq $17, %r15 jne .LBB1_12 # %bb.13: # in Loop: Header=BB1_11 Depth=1 incq %r14 addq $68, %rbx cmpq $17, %r14 jne .LBB1_11 # %bb.14: movl $10, %edi callq putchar@PLT movq 8(%rsp), %rdi callq hipFree movq (%rsp), %rdi callq hipFree xorl %eax, %eax addq $1184, %rsp # imm = 0x4A0 .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9transposePiS_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z9transposePiS_,@object # @_Z9transposePiS_ .section .rodata,"a",@progbits .globl _Z9transposePiS_ .p2align 3, 0x0 _Z9transposePiS_: .quad _Z24__device_stub__transposePiS_ .size _Z9transposePiS_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Initial values" .size .L.str, 15 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "%3d " .size .L.str.2, 6 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "\nN = %d, grid size = %d\n" .size .L.str.3, 25 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "Results" .size .L.str.4, 8 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z9transposePiS_" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z24__device_stub__transposePiS_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z9transposePiS_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z9transposePiS_ ; -- Begin function _Z9transposePiS_ .globl _Z9transposePiS_ .p2align 8 .type _Z9transposePiS_,@function _Z9transposePiS_: ; @_Z9transposePiS_ ; %bb.0: s_load_b32 s2, s[0:1], 0x1c v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 17, v2 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[0:3], s[0:1], 0x0 v_mad_u64_u32 v[2:3], null, v0, 17, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v3, 31, v2 v_lshlrev_b64 v[2:3], 2, v[2:3] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s0, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo global_load_b32 v4, v[2:3], off v_mad_u64_u32 v[2:3], null, v1, 17, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v3, 31, v2 v_lshlrev_b64 v[0:1], 2, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, s2, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo s_waitcnt vmcnt(0) global_store_b32 v[0:1], v4, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9transposePiS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 5 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z9transposePiS_, .Lfunc_end0-_Z9transposePiS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 204 ; NumSgprs: 18 ; NumVgprs: 5 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 5 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9transposePiS_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z9transposePiS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 5 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
72e119544b1bf98e80ef90f71bad66bcc5720722
#include "includes.h" __global__ void Product (float *a, float *b, float *c) { // Out of all the threads created each one computes 1 value of C and stores into cval float cval = 0.00; int R = blockIdx.y * blockDim.y + threadIdx.y; //Row of the matrix int C = blockIdx.x * blockDim.x + threadIdx.x; //Column of the matrix //Defining the size of the matrix// int N=1000; if(R> N || C > N ){ return; } for (int j = 0; j < N; j++) { cval += a[R * N+ j] *b[j * N + C]; } c[R * N + C]+= cval; }
.file "tmpxft_00290912_00000000-6_Product.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z30__device_stub__Z7ProductPfS_S_PfS_S_ .type _Z30__device_stub__Z7ProductPfS_S_PfS_S_, @function _Z30__device_stub__Z7ProductPfS_S_PfS_S_: .LFB2032: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z7ProductPfS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z30__device_stub__Z7ProductPfS_S_PfS_S_, .-_Z30__device_stub__Z7ProductPfS_S_PfS_S_ .globl _Z7ProductPfS_S_ .type _Z7ProductPfS_S_, @function _Z7ProductPfS_S_: .LFB2033: .cfi_startproc endbr64 jmp _Z30__device_stub__Z7ProductPfS_S_PfS_S_ .cfi_endproc .LFE2033: .size _Z7ProductPfS_S_, .-_Z7ProductPfS_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z7ProductPfS_S_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z7ProductPfS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7ProductPfS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e280000002100 */ /*0030*/ S2R R7, SR_CTAID.Y ; /* 0x0000000000077919 */ /* 0x000e680000002600 */ /*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */ /* 0x000e620000002200 */ /*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x3e8, PT ; /* 0x000003e80000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R7, R7, c[0x0][0x4], R2 ; /* 0x0000010007077a24 */ /* 0x002fca00078e0202 */ /*0080*/ ISETP.GT.OR P0, PT, R7, 0x3e8, P0 ; /* 0x000003e80700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R6, 0x4 ; /* 0x0000000400067802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R7, R7, 0x3e8, RZ ; /* 0x000003e807077824 */ /* 0x000fe200078e02ff */ /*00c0*/ CS2R R32, SRZ ; /* 0x0000000000207805 */ /* 0x000fe2000001ff00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*00e0*/ IMAD.WIDE R2, R7, R6, c[0x0][0x160] ; /* 0x0000580007027625 */ /* 0x000fe200078e0206 */ /*00f0*/ ULDC.64 UR6, c[0x0][0x168] ; /* 0x00005a0000067ab9 */ /* 0x000fc80000000a00 */ /*0100*/ IADD3 R2, P0, R2, 0x10, RZ ; /* 0x0000001002027810 */ /* 0x000fc80007f1e0ff */ /*0110*/ IADD3.X R3, RZ, R3, RZ, P0, !PT ; /* 0x00000003ff037210 */ /* 0x000fc800007fe4ff */ /*0120*/ MOV R4, UR6 ; /* 0x0000000600047c02 */ /* 0x000fe20008000f00 */ /*0130*/ LDG.E R9, [R2.64+-0x10] ; /* 0xfffff00402097981 */ /* 0x000ea2000c1e1900 */ /*0140*/ MOV R5, UR7 ; /* 0x0000000700057c02 */ /* 0x000fc60008000f00 */ /*0150*/ LDG.E R10, [R2.64+-0xc] ; /* 0xfffff404020a7981 */ /* 0x000ee4000c1e1900 */ /*0160*/ IMAD.WIDE R4, R0, 0x4, R4 ; /* 0x0000000400047825 */ /* 0x000fe400078e0204 */ /*0170*/ LDG.E R34, [R2.64+-0x8] ; /* 0xfffff80402227981 */ /* 0x000f28000c1e1900 */ /*0180*/ LDG.E R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea8000c1e1900 */ /*0190*/ LDG.E R11, [R4.64+0xfa0] ; /* 0x000fa004040b7981 */ /* 0x000ee8000c1e1900 */ /*01a0*/ LDG.E R35, [R4.64+0x1f40] ; /* 0x001f400404237981 */ /* 0x000f28000c1e1900 */ /*01b0*/ LDG.E R24, [R2.64+-0x4] ; /* 0xfffffc0402187981 */ /* 0x000f68000c1e1900 */ /*01c0*/ LDG.E R25, [R4.64+0x2ee0] ; /* 0x002ee00404197981 */ /* 0x000f68000c1e1900 */ /*01d0*/ LDG.E R30, [R2.64] ; /* 0x00000004021e7981 */ /* 0x000f68000c1e1900 */ /*01e0*/ LDG.E R31, [R4.64+0x3e80] ; /* 0x003e8004041f7981 */ /* 0x000f68000c1e1900 */ /*01f0*/ LDG.E R28, [R2.64+0x4] ; /* 0x00000404021c7981 */ /* 0x000f68000c1e1900 */ /*0200*/ LDG.E R29, [R4.64+0x4e20] ; /* 0x004e2004041d7981 */ /* 0x000f68000c1e1900 */ /*0210*/ LDG.E R26, [R2.64+0x8] ; /* 0x00000804021a7981 */ /* 0x000f68000c1e1900 */ /*0220*/ LDG.E R27, [R4.64+0x5dc0] ; /* 0x005dc004041b7981 */ /* 0x000f68000c1e1900 */ /*0230*/ LDG.E R22, [R2.64+0xc] ; /* 0x00000c0402167981 */ /* 0x000f68000c1e1900 */ /*0240*/ LDG.E R23, [R4.64+0x6d60] ; /* 0x006d600404177981 */ /* 0x000f68000c1e1900 */ /*0250*/ LDG.E R20, [R2.64+0x10] ; /* 0x0000100402147981 */ /* 0x000f68000c1e1900 */ /*0260*/ LDG.E R21, [R4.64+0x7d00] ; /* 0x007d000404157981 */ /* 0x000f68000c1e1900 */ /*0270*/ LDG.E R18, [R2.64+0x14] ; /* 0x0000140402127981 */ /* 0x000f68000c1e1900 */ /*0280*/ LDG.E R19, [R4.64+0x8ca0] ; /* 0x008ca00404137981 */ /* 0x000f68000c1e1900 */ /*0290*/ LDG.E R16, [R2.64+0x18] ; /* 0x0000180402107981 */ /* 0x000f68000c1e1900 */ /*02a0*/ LDG.E R17, [R4.64+0x9c40] ; /* 0x009c400404117981 */ /* 0x000f68000c1e1900 */ /*02b0*/ LDG.E R14, [R2.64+0x1c] ; /* 0x00001c04020e7981 */ /* 0x000f68000c1e1900 */ /*02c0*/ LDG.E R15, [R4.64+0xabe0] ; /* 0x00abe004040f7981 */ /* 0x000f68000c1e1900 */ /*02d0*/ LDG.E R12, [R2.64+0x20] ; /* 0x00002004020c7981 */ /* 0x000f68000c1e1900 */ /*02e0*/ LDG.E R13, [R4.64+0xbb80] ; /* 0x00bb8004040d7981 */ /* 0x000f62000c1e1900 */ /*02f0*/ FFMA R8, R8, R9, R33 ; /* 0x0000000908087223 */ /* 0x004fc60000000021 */ /*0300*/ LDG.E R9, [R4.64+0xdac0] ; /* 0x00dac00404097981 */ /* 0x000ea2000c1e1900 */ /*0310*/ FFMA R8, R11, R10, R8 ; /* 0x0000000a0b087223 */ /* 0x008fc60000000008 */ /*0320*/ LDG.E R10, [R2.64+0x24] ; /* 0x00002404020a7981 */ /* 0x000ee8000c1e1900 */ /*0330*/ LDG.E R11, [R4.64+0xcb20] ; /* 0x00cb2004040b7981 */ /* 0x000ee2000c1e1900 */ /*0340*/ FFMA R34, R35, R34, R8 ; /* 0x0000002223227223 */ /* 0x010fc60000000008 */ /*0350*/ LDG.E R8, [R2.64+0x28] ; /* 0x0000280402087981 */ /* 0x000ea2000c1e1900 */ /*0360*/ FFMA R24, R25, R24, R34 ; /* 0x0000001819187223 */ /* 0x020fc60000000022 */ /*0370*/ LDG.E R25, [R4.64+0xea60] ; /* 0x00ea600404197981 */ /* 0x000f28000c1e1900 */ /*0380*/ LDG.E R33, [R4.64+0x26160] ; /* 0x0261600404217981 */ /* 0x000f62000c1e1900 */ /*0390*/ FFMA R30, R31, R30, R24 ; /* 0x0000001e1f1e7223 */ /* 0x000fc60000000018 */ /*03a0*/ LDG.E R24, [R2.64+0x2c] ; /* 0x00002c0402187981 */ /* 0x000f28000c1e1900 */ /*03b0*/ LDG.E R31, [R4.64+0xfa00] ; /* 0x00fa0004041f7981 */ /* 0x000f62000c1e1900 */ /*03c0*/ FFMA R28, R29, R28, R30 ; /* 0x0000001c1d1c7223 */ /* 0x000fc6000000001e */ /*03d0*/ LDG.E R30, [R2.64+0x30] ; /* 0x00003004021e7981 */ /* 0x000f68000c1e1900 */ /*03e0*/ LDG.E R29, [R4.64+0x109a0] ; /* 0x0109a004041d7981 */ /* 0x000f62000c1e1900 */ /*03f0*/ FFMA R26, R27, R26, R28 ; /* 0x0000001a1b1a7223 */ /* 0x000fc6000000001c */ /*0400*/ LDG.E R28, [R2.64+0x34] ; /* 0x00003404021c7981 */ /* 0x000f68000c1e1900 */ /*0410*/ LDG.E R27, [R4.64+0x11940] ; /* 0x01194004041b7981 */ /* 0x000f62000c1e1900 */ /*0420*/ FFMA R22, R23, R22, R26 ; /* 0x0000001617167223 */ /* 0x000fc6000000001a */ /*0430*/ LDG.E R26, [R2.64+0x38] ; /* 0x00003804021a7981 */ /* 0x000f68000c1e1900 */ /*0440*/ LDG.E R23, [R2.64+0x3c] ; /* 0x00003c0402177981 */ /* 0x000f62000c1e1900 */ /*0450*/ FFMA R20, R21, R20, R22 ; /* 0x0000001415147223 */ /* 0x000fc60000000016 */ /*0460*/ LDG.E R22, [R4.64+0x128e0] ; /* 0x0128e00404167981 */ /* 0x000f68000c1e1900 */ /*0470*/ LDG.E R21, [R2.64+0x40] ; /* 0x0000400402157981 */ /* 0x000f62000c1e1900 */ /*0480*/ FFMA R18, R19, R18, R20 ; /* 0x0000001213127223 */ /* 0x000fc60000000014 */ /*0490*/ LDG.E R20, [R4.64+0x13880] ; /* 0x0138800404147981 */ /* 0x000f68000c1e1900 */ /*04a0*/ LDG.E R19, [R2.64+0x44] ; /* 0x0000440402137981 */ /* 0x000f62000c1e1900 */ /*04b0*/ FFMA R16, R17, R16, R18 ; /* 0x0000001011107223 */ /* 0x000fc60000000012 */ /*04c0*/ LDG.E R18, [R4.64+0x14820] ; /* 0x0148200404127981 */ /* 0x000f68000c1e1900 */ /*04d0*/ LDG.E R17, [R2.64+0x48] ; /* 0x0000480402117981 */ /* 0x000f62000c1e1900 */ /*04e0*/ FFMA R14, R15, R14, R16 ; /* 0x0000000e0f0e7223 */ /* 0x000fc60000000010 */ /*04f0*/ LDG.E R16, [R4.64+0x157c0] ; /* 0x0157c00404107981 */ /* 0x000f68000c1e1900 */ /*0500*/ LDG.E R15, [R2.64+0x4c] ; /* 0x00004c04020f7981 */ /* 0x000f62000c1e1900 */ /*0510*/ FFMA R12, R13, R12, R14 ; /* 0x0000000c0d0c7223 */ /* 0x000fc6000000000e */ /*0520*/ LDG.E R14, [R4.64+0x16760] ; /* 0x01676004040e7981 */ /* 0x000f68000c1e1900 */ /*0530*/ LDG.E R13, [R2.64+0x50] ; /* 0x00005004020d7981 */ /* 0x000f62000c1e1900 */ /*0540*/ FFMA R10, R11, R10, R12 ; /* 0x0000000a0b0a7223 */ /* 0x008fc6000000000c */ /*0550*/ LDG.E R12, [R4.64+0x17700] ; /* 0x01770004040c7981 */ /* 0x000ee2000c1e1900 */ /*0560*/ FFMA R34, R9, R8, R10 ; /* 0x0000000809227223 */ /* 0x004fc6000000000a */ /*0570*/ LDG.E R11, [R2.64+0x54] ; /* 0x00005404020b7981 */ /* 0x000ea8000c1e1900 */ /*0580*/ LDG.E R10, [R4.64+0x186a0] ; /* 0x0186a004040a7981 */ /* 0x000ea8000c1e1900 */ /*0590*/ LDG.E R9, [R2.64+0x58] ; /* 0x0000580402097981 */ /* 0x000ea8000c1e1900 */ /*05a0*/ LDG.E R8, [R4.64+0x19640] ; /* 0x0196400404087981 */ /* 0x000ea2000c1e1900 */ /*05b0*/ FFMA R24, R25, R24, R34 ; /* 0x0000001819187223 */ /* 0x010fc60000000022 */ /*05c0*/ LDG.E R25, [R2.64+0x5c] ; /* 0x00005c0402197981 */ /* 0x000f22000c1e1900 */ /*05d0*/ FFMA R30, R31, R30, R24 ; /* 0x0000001e1f1e7223 */ /* 0x020fc60000000018 */ /*05e0*/ LDG.E R24, [R4.64+0x1a5e0] ; /* 0x01a5e00404187981 */ /* 0x000f28000c1e1900 */ /*05f0*/ LDG.E R34, [R2.64+0x8c] ; /* 0x00008c0402227981 */ /* 0x000162000c1e1900 */ /*0600*/ FFMA R30, R29, R28, R30 ; /* 0x0000001c1d1e7223 */ /* 0x000fc6000000001e */ /*0610*/ LDG.E R28, [R2.64+0x60] ; /* 0x00006004021c7981 */ /* 0x000f68000c1e1900 */ /*0620*/ LDG.E R29, [R4.64+0x1b580] ; /* 0x01b58004041d7981 */ /* 0x000f62000c1e1900 */ /*0630*/ FFMA R31, R27, R26, R30 ; /* 0x0000001a1b1f7223 */ /* 0x000fc6000000001e */ /*0640*/ LDG.E R26, [R2.64+0x64] ; /* 0x00006404021a7981 */ /* 0x000f68000c1e1900 */ /*0650*/ LDG.E R27, [R4.64+0x1c520] ; /* 0x01c52004041b7981 */ /* 0x000f62000c1e1900 */ /*0660*/ FFMA R31, R22, R23, R31 ; /* 0x00000017161f7223 */ /* 0x000fc6000000001f */ /*0670*/ LDG.E R23, [R2.64+0x68] ; /* 0x0000680402177981 */ /* 0x000f68000c1e1900 */ /*0680*/ LDG.E R22, [R4.64+0x1d4c0] ; /* 0x01d4c00404167981 */ /* 0x000f62000c1e1900 */ /*0690*/ FFMA R31, R20, R21, R31 ; /* 0x00000015141f7223 */ /* 0x000fc6000000001f */ /*06a0*/ LDG.E R21, [R2.64+0x6c] ; /* 0x00006c0402157981 */ /* 0x000f68000c1e1900 */ /*06b0*/ LDG.E R20, [R4.64+0x1e460] ; /* 0x01e4600404147981 */ /* 0x000f62000c1e1900 */ /*06c0*/ FFMA R31, R18, R19, R31 ; /* 0x00000013121f7223 */ /* 0x000fc6000000001f */ /*06d0*/ LDG.E R19, [R2.64+0x70] ; /* 0x0000700402137981 */ /* 0x000f68000c1e1900 */ /*06e0*/ LDG.E R18, [R4.64+0x1f400] ; /* 0x01f4000404127981 */ /* 0x000f62000c1e1900 */ /*06f0*/ FFMA R31, R16, R17, R31 ; /* 0x00000011101f7223 */ /* 0x000fc6000000001f */ /*0700*/ LDG.E R17, [R2.64+0x74] ; /* 0x0000740402117981 */ /* 0x000f68000c1e1900 */ /*0710*/ LDG.E R16, [R4.64+0x203a0] ; /* 0x0203a00404107981 */ /* 0x000f62000c1e1900 */ /*0720*/ FFMA R31, R14, R15, R31 ; /* 0x0000000f0e1f7223 */ /* 0x000fc6000000001f */ /*0730*/ LDG.E R15, [R2.64+0x78] ; /* 0x00007804020f7981 */ /* 0x000f68000c1e1900 */ /*0740*/ LDG.E R14, [R4.64+0x21340] ; /* 0x02134004040e7981 */ /* 0x000f68000c1e1900 */ /*0750*/ LDG.E R30, [R4.64+0x24220] ; /* 0x02422004041e7981 */ /* 0x000f62000c1e1900 */ /*0760*/ FFMA R31, R12, R13, R31 ; /* 0x0000000d0c1f7223 */ /* 0x008fc6000000001f */ /*0770*/ LDG.E R13, [R2.64+0x7c] ; /* 0x00007c04020d7981 */ /* 0x0000e8000c1e1900 */ /*0780*/ LDG.E R12, [R4.64+0x222e0] ; /* 0x0222e004040c7981 */ /* 0x000ee2000c1e1900 */ /*0790*/ FFMA R31, R10, R11, R31 ; /* 0x0000000b0a1f7223 */ /* 0x004fc6000000001f */ /*07a0*/ LDG.E R11, [R2.64+0x80] ; /* 0x00008004020b7981 */ /* 0x0000a8000c1e1900 */ /*07b0*/ LDG.E R10, [R4.64+0x23280] ; /* 0x02328004040a7981 */ /* 0x000ea2000c1e1900 */ /*07c0*/ FFMA R35, R8, R9, R31 ; /* 0x0000000908237223 */ /* 0x000fc6000000001f */ /*07d0*/ LDG.E R31, [R2.64+0x84] ; /* 0x00008404021f7981 */ /* 0x0000a8000c1e1900 */ /*07e0*/ LDG.E R8, [R2.64+0x88] ; /* 0x0000880402087981 */ /* 0x0000a8000c1e1900 */ /*07f0*/ LDG.E R9, [R4.64+0x251c0] ; /* 0x0251c00404097981 */ /* 0x000ea2000c1e1900 */ /*0800*/ FFMA R24, R24, R25, R35 ; /* 0x0000001918187223 */ /* 0x010fc80000000023 */ /*0810*/ FFMA R24, R29, R28, R24 ; /* 0x0000001c1d187223 */ /* 0x020fc80000000018 */ /*0820*/ FFMA R27, R27, R26, R24 ; /* 0x0000001a1b1b7223 */ /* 0x000fc80000000018 */ /*0830*/ FFMA R23, R22, R23, R27 ; /* 0x0000001716177223 */ /* 0x000fc8000000001b */ /*0840*/ FFMA R21, R20, R21, R23 ; /* 0x0000001514157223 */ /* 0x000fc80000000017 */ /*0850*/ FFMA R19, R18, R19, R21 ; /* 0x0000001312137223 */ /* 0x000fe20000000015 */ /*0860*/ IADD3 R32, R32, 0x28, RZ ; /* 0x0000002820207810 */ /* 0x000fc60007ffe0ff */ /*0870*/ FFMA R17, R16, R17, R19 ; /* 0x0000001110117223 */ /* 0x000fe20000000013 */ /*0880*/ ISETP.NE.AND P0, PT, R32, 0x3e8, PT ; /* 0x000003e82000780c */ /* 0x000fc60003f05270 */ /*0890*/ FFMA R15, R14, R15, R17 ; /* 0x0000000f0e0f7223 */ /* 0x000fe20000000011 */ /*08a0*/ UIADD3 UR6, UP0, UR6, 0x27100, URZ ; /* 0x0002710006067890 */ /* 0x000fe2000ff1e03f */ /*08b0*/ IADD3 R2, P1, R2, 0xa0, RZ ; /* 0x000000a002027810 */ /* 0x001fc60007f3e0ff */ /*08c0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */ /* 0x000fe200087fe43f */ /*08d0*/ IADD3.X R3, RZ, R3, RZ, P1, !PT ; /* 0x00000003ff037210 */ /* 0x000fe20000ffe4ff */ /*08e0*/ FFMA R13, R12, R13, R15 ; /* 0x0000000d0c0d7223 */ /* 0x008fc8000000000f */ /*08f0*/ FFMA R11, R10, R11, R13 ; /* 0x0000000b0a0b7223 */ /* 0x004fc8000000000d */ /*0900*/ FFMA R30, R30, R31, R11 ; /* 0x0000001f1e1e7223 */ /* 0x000fc8000000000b */ /*0910*/ FFMA R8, R9, R8, R30 ; /* 0x0000000809087223 */ /* 0x000fc8000000001e */ /*0920*/ FFMA R33, R33, R34, R8 ; /* 0x0000002221217223 */ /* 0x000fe20000000008 */ /*0930*/ @P0 BRA 0x120 ; /* 0xfffff7e000000947 */ /* 0x000fea000383ffff */ /*0940*/ IADD3 R7, R0, R7, RZ ; /* 0x0000000700077210 */ /* 0x000fca0007ffe0ff */ /*0950*/ IMAD.WIDE R6, R7, R6, c[0x0][0x170] ; /* 0x00005c0007067625 */ /* 0x000fca00078e0206 */ /*0960*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */ /* 0x000ea4000c1e1900 */ /*0970*/ FADD R33, R33, R0 ; /* 0x0000000021217221 */ /* 0x004fca0000000000 */ /*0980*/ STG.E [R6.64], R33 ; /* 0x0000002106007986 */ /* 0x000fe2000c101904 */ /*0990*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*09a0*/ BRA 0x9a0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*09b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void Product (float *a, float *b, float *c) { // Out of all the threads created each one computes 1 value of C and stores into cval float cval = 0.00; int R = blockIdx.y * blockDim.y + threadIdx.y; //Row of the matrix int C = blockIdx.x * blockDim.x + threadIdx.x; //Column of the matrix //Defining the size of the matrix// int N=1000; if(R> N || C > N ){ return; } for (int j = 0; j < N; j++) { cval += a[R * N+ j] *b[j * N + C]; } c[R * N + C]+= cval; }
.text .file "Product.hip" .globl _Z22__device_stub__ProductPfS_S_ # -- Begin function _Z22__device_stub__ProductPfS_S_ .type _Z22__device_stub__ProductPfS_S_,@function _Z22__device_stub__ProductPfS_S_: # @_Z22__device_stub__ProductPfS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7ProductPfS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z22__device_stub__ProductPfS_S_, .Lfunc_end0-_Z22__device_stub__ProductPfS_S_ .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7ProductPfS_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z7ProductPfS_S_,@object # @_Z7ProductPfS_S_ .section .rodata,"a",@progbits .globl _Z7ProductPfS_S_ .p2align 3, 0x0 _Z7ProductPfS_S_: .quad _Z22__device_stub__ProductPfS_S_ .size _Z7ProductPfS_S_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z7ProductPfS_S_" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__ProductPfS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7ProductPfS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7ProductPfS_S_ ; -- Begin function _Z7ProductPfS_S_ .globl _Z7ProductPfS_S_ .p2align 8 .type _Z7ProductPfS_S_,@function _Z7ProductPfS_S_: ; @_Z7ProductPfS_S_ ; %bb.0: s_load_b32 s2, s[0:1], 0x24 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v4, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2] v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v1, v2, v0 v_cmpx_gt_i32_e32 0x3e9, v1 s_cbranch_execz .LBB0_4 ; %bb.1: ; %.preheader s_load_b128 s[4:7], s[0:1], 0x0 v_mul_lo_u32 v1, 0x3e8, v2 s_load_b64 s[0:1], s[0:1], 0x10 v_mov_b32_e32 v4, 0 s_mov_b64 s[2:3], 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[2:3], 2, v[1:2] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, s4, v2 v_add_co_ci_u32_e32 v6, vcc_lo, s5, v3, vcc_lo v_mov_b32_e32 v2, v0 .LBB0_2: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) v_ashrrev_i32_e32 v3, 31, v2 v_add_co_u32 v7, vcc_lo, v5, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v8, vcc_lo, s3, v6, vcc_lo v_lshlrev_b64 v[9:10], 2, v[2:3] v_add_nc_u32_e32 v2, 0x3e8, v2 s_add_u32 s2, s2, 4 s_addc_u32 s3, s3, 0 s_cmpk_eq_i32 s2, 0xfa0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v9, vcc_lo, s6, v9 v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo global_load_b32 v3, v[7:8], off global_load_b32 v7, v[9:10], off s_waitcnt vmcnt(0) v_fmac_f32_e32 v4, v3, v7 s_cbranch_scc0 .LBB0_2 ; %bb.3: v_add_nc_u32_e32 v0, v1, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v1, 31, v0 v_lshlrev_b64 v[0:1], 2, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_load_b32 v2, v[0:1], off s_waitcnt vmcnt(0) v_add_f32_e32 v2, v4, v2 global_store_b32 v[0:1], v2, off .LBB0_4: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7ProductPfS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7ProductPfS_S_, .Lfunc_end0-_Z7ProductPfS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 324 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7ProductPfS_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z7ProductPfS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
a332a4040630587d19ffa7d17d1ee212ff688eff
#include <cuda_runtime.h> #include <stdio.h> __global__ void checkIndex(void) { printf("threadIdx:(%d, %d, %d) blockIdx:(%d, %d, %d) blockDim:(%d, %d, %d) " "gridDim:(%d, %d, %d)\n", threadIdx.x, threadIdx.y, threadIdx.z, blockIdx.x, blockIdx.y, blockIdx.z, blockDim.x, blockDim.y, blockDim.z, gridDim.x,gridDim.y,gridDim.z); } int main(int argc, char **argv) { int nX = 16; int nY = 16; // define total data element //int nEle = 16; //int iLen = 8; // define grid and block structure dim3 block (8, 8); dim3 grid (nX/block.x, nY/block.y); //dim3 block (iLen, iLen); //dim3 grid ((nEle + block.x-1)/block.x, (nEle + block.y-1)/block.y); // check grid and block dimension from host side printf("grid.x %d grid.y %d grid.z %d\n",grid.x, grid.y, grid.z); printf("block.x %d block.y %d block.z %d\n",block.x, block.y, block.z); // check grid and block dimension from device side checkIndex <<<grid, block>>> (); // reset device before you leave cudaDeviceReset(); return(0); }
.file "tmpxft_0031266d_00000000-6_checkDimension.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z29__device_stub__Z10checkIndexvv .type _Z29__device_stub__Z10checkIndexvv, @function _Z29__device_stub__Z10checkIndexvv: .LFB2052: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 72(%rsp) movabsq $4294967297, %rax leaq 8(%rsp), %rcx movq %rsp, %rdx leaq 28(%rsp), %rsi leaq 16(%rsp), %rdi movl $1, 24(%rsp) movl $1, 36(%rsp) movq %rax, 16(%rsp) movq %rax, 28(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 8(%rsp) .cfi_def_cfa_offset 104 leaq _Z10checkIndexv(%rip), %rdi pushq 8(%rsp) .cfi_def_cfa_offset 112 movq 44(%rsp), %rcx movl 52(%rsp), %r8d movq 32(%rsp), %rsi movl 40(%rsp), %edx leaq 80(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L2: movq 72(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z29__device_stub__Z10checkIndexvv, .-_Z29__device_stub__Z10checkIndexvv .globl _Z10checkIndexv .type _Z10checkIndexv, @function _Z10checkIndexv: .LFB2053: .cfi_startproc endbr64 jmp _Z29__device_stub__Z10checkIndexvv .cfi_endproc .LFE2053: .size _Z10checkIndexv, .-_Z10checkIndexv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "grid.x %d grid.y %d grid.z %d\n" .LC1: .string "block.x %d block.y %d block.z %d\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 movl $2, %ecx movl $2, %edx xorl %eax, %eax movl $1, %r8d leaq .LC0(%rip), %rsi movl $2, %edi call __printf_chk@PLT movl $1, %r8d xorl %eax, %eax movl $8, %ecx movl $8, %edx leaq .LC1(%rip), %rsi movl $2, %edi call __printf_chk@PLT xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $34359738376, %rdx movl $1, %esi movabsq $8589934594, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 call _Z29__device_stub__Z10checkIndexvv .L9: call cudaDeviceReset@PLT xorl %eax, %eax addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC2: .string "_Z10checkIndexv" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC2(%rip), %rdx movq %rax, %rdi leaq _Z10checkIndexv(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10checkIndexv .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fc800078e00ff */ /*0010*/ S2R R11, SR_CTAID.X ; /* 0x00000000000b7919 */ /* 0x000e220000002500 */ /*0020*/ IADD3 R1, R1, -0x30, RZ ; /* 0xffffffd001017810 */ /* 0x000fe20007ffe0ff */ /*0030*/ IMAD.MOV.U32 R14, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff0e7624 */ /* 0x000fe200078e00ff */ /*0040*/ MOV R18, c[0x0][0x10] ; /* 0x0000040000127a02 */ /* 0x000fe20000000f00 */ /*0050*/ S2R R10, SR_TID.Z ; /* 0x00000000000a7919 */ /* 0x000e220000002300 */ /*0060*/ IMAD.MOV.U32 R15, RZ, RZ, c[0x0][0x4] ; /* 0x00000100ff0f7624 */ /* 0x000fe200078e00ff */ /*0070*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe20000000f00 */ /*0080*/ IMAD.MOV.U32 R16, RZ, RZ, c[0x0][0x8] ; /* 0x00000200ff107624 */ /* 0x000fe200078e00ff */ /*0090*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */ /* 0x000e220000002200 */ /*00a0*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff117624 */ /* 0x000fe200078e00ff */ /*00b0*/ LDC.64 R2, c[0x4][R0] ; /* 0x0100000000027b82 */ /* 0x0002a20000000a00 */ /*00c0*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x0][0x14] ; /* 0x00000500ff137624 */ /* 0x000fe200078e00ff */ /*00d0*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */ /* 0x000e220000002100 */ /*00e0*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fe20007f1e0ff */ /*00f0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*0100*/ MOV R5, c[0x4][0xc] ; /* 0x0100030000057a02 */ /* 0x000fe20000000f00 */ /*0110*/ S2R R13, SR_CTAID.Z ; /* 0x00000000000d7919 */ /* 0x000ee40000002700 */ /*0120*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */ /* 0x000fc400000e06ff */ /*0130*/ S2R R12, SR_CTAID.Y ; /* 0x00000000000c7919 */ /* 0x000ee80000002600 */ /*0140*/ STL.128 [R1+0x20], R16 ; /* 0x0000201001007387 */ /* 0x0003e80000100c00 */ /*0150*/ STL.128 [R1], R8 ; /* 0x0000000801007387 */ /* 0x0013e80000100c00 */ /*0160*/ STL.128 [R1+0x10], R12 ; /* 0x0000100c01007387 */ /* 0x0083e40000100c00 */ /*0170*/ LEPC R8 ; /* 0x000000000008734e */ /* 0x006fe40000000000 */ /*0180*/ MOV R11, 0x1f0 ; /* 0x000001f0000b7802 */ /* 0x000fe40000000f00 */ /*0190*/ MOV R20, 0x170 ; /* 0x0000017000147802 */ /* 0x000fc40000000f00 */ /*01a0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*01b0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*01c0*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e108 */ /*01d0*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2509 */ /*01e0*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */ /* 0x000fea0003c00000 */ /*01f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0200*/ BRA 0x200; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> __global__ void checkIndex(void) { printf("threadIdx:(%d, %d, %d) blockIdx:(%d, %d, %d) blockDim:(%d, %d, %d) " "gridDim:(%d, %d, %d)\n", threadIdx.x, threadIdx.y, threadIdx.z, blockIdx.x, blockIdx.y, blockIdx.z, blockDim.x, blockDim.y, blockDim.z, gridDim.x,gridDim.y,gridDim.z); } int main(int argc, char **argv) { int nX = 16; int nY = 16; // define total data element //int nEle = 16; //int iLen = 8; // define grid and block structure dim3 block (8, 8); dim3 grid (nX/block.x, nY/block.y); //dim3 block (iLen, iLen); //dim3 grid ((nEle + block.x-1)/block.x, (nEle + block.y-1)/block.y); // check grid and block dimension from host side printf("grid.x %d grid.y %d grid.z %d\n",grid.x, grid.y, grid.z); printf("block.x %d block.y %d block.z %d\n",block.x, block.y, block.z); // check grid and block dimension from device side checkIndex <<<grid, block>>> (); // reset device before you leave hipDeviceReset(); return(0); }
.text .file "checkDimension.hip" .globl _Z25__device_stub__checkIndexv # -- Begin function _Z25__device_stub__checkIndexv .type _Z25__device_stub__checkIndexv,@function _Z25__device_stub__checkIndexv: # @_Z25__device_stub__checkIndexv .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $56, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rbx leaq 24(%rsp), %r14 leaq 16(%rsp), %r15 leaq 8(%rsp), %r12 movq %rbx, %rdi movq %r14, %rsi movq %r15, %rdx movq %r12, %rcx callq __hipPopCallConfiguration movq (%rbx), %rsi movl 8(%rbx), %edx movq (%r14), %rcx movl 8(%r14), %r8d movq %rsp, %r9 movl $_Z10checkIndexv, %edi pushq (%r12) .cfi_adjust_cfa_offset 8 pushq (%r15) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $72, %rsp .cfi_adjust_cfa_offset -72 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z25__device_stub__checkIndexv, .Lfunc_end0-_Z25__device_stub__checkIndexv .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movl $.L.str, %edi movl $2, %esi movl $2, %edx movl $1, %ecx xorl %eax, %eax callq printf movl $.L.str.1, %edi movl $8, %esi movl $8, %edx movl $1, %ecx xorl %eax, %eax callq printf movabsq $8589934594, %rdi # imm = 0x200000002 movabsq $34359738376, %rdx # imm = 0x800000008 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: callq _Z25__device_stub__checkIndexv .LBB1_2: callq hipDeviceReset xorl %eax, %eax popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10checkIndexv, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z10checkIndexv,@object # @_Z10checkIndexv .section .rodata,"a",@progbits .globl _Z10checkIndexv .p2align 3, 0x0 _Z10checkIndexv: .quad _Z25__device_stub__checkIndexv .size _Z10checkIndexv, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "grid.x %d grid.y %d grid.z %d\n" .size .L.str, 31 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "block.x %d block.y %d block.z %d\n" .size .L.str.1, 34 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z10checkIndexv" .size .L__unnamed_1, 16 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__checkIndexv .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z10checkIndexv .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10checkIndexv ; -- Begin function _Z10checkIndexv .globl _Z10checkIndexv .p2align 8 .type _Z10checkIndexv,@function _Z10checkIndexv: ; @_Z10checkIndexv ; %bb.0: s_clause 0x2 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b32 s16, s[0:1], 0x10 s_load_b64 s[2:3], s[0:1], 0x50 v_mbcnt_lo_u32_b32 v2, -1, 0 v_mov_b32_e32 v9, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v7, v2 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v7 s_waitcnt lgkmcnt(0) s_mov_b32 s12, s7 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_6 ; %bb.1: v_mov_b32_e32 v1, 0 s_mov_b32 s7, exec_lo global_load_b64 v[5:6], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[8:9], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v3, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v10, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v10, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v8, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v9, v4, vcc_lo global_load_b64 v[3:4], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[9:10], v1, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[9:10], v[5:6] s_cbranch_execz .LBB0_5 ; %bb.2: ; %.preheader3.i.i.i.preheader s_mov_b32 s8, 0 .LBB0_3: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v6, v10 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v3, v3, v5 s_waitcnt vmcnt(0) v_mad_u64_u32 v[8:9], null, v3, 24, v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v3, v9 :: v_dual_and_b32 v4, v4, v6 v_mad_u64_u32 v[9:10], null, v4, 24, v[3:4] global_load_b64 v[3:4], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[9:10], v1, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[5:6] s_or_b32 s8, vcc_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB0_3 ; %bb.4: ; %Flow863 s_or_b32 exec_lo, exec_lo, s8 .LBB0_5: ; %Flow865 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 .LBB0_6: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v8, 0 v_readfirstlane_b32 s8, v9 v_readfirstlane_b32 s9, v10 s_mov_b32 s18, exec_lo s_and_b32 s7, s16, 0xffff s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:40 global_load_b128 v[3:6], v8, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s16, s10, 24 s_mul_i32 s17, s10, 24 s_and_saveexec_b32 s19, s0 s_cbranch_execz .LBB0_8 ; %bb.7: v_dual_mov_b32 v9, s18 :: v_dual_mov_b32 v10, v8 s_add_i32 s18, s16, s1 s_waitcnt vmcnt(0) v_add_co_u32 v13, vcc_lo, v3, s17 v_add_co_ci_u32_e32 v14, vcc_lo, s18, v4, vcc_lo v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1 global_store_b128 v[13:14], v[9:12], off offset:8 .LBB0_8: s_or_b32 exec_lo, exec_lo, s19 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[9:10], 6, v[7:8] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v5, s10 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v6, vcc_lo s_mov_b32 s20, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v1, v9 s_mov_b32 s21, s20 s_mov_b32 s22, s20 s_mov_b32 s23, s20 v_add_co_ci_u32_e32 v12, vcc_lo, v5, v10, vcc_lo v_dual_mov_b32 v7, 33 :: v_dual_mov_b32 v10, v8 v_mov_b32_e32 v9, v8 v_dual_mov_b32 v13, s20 :: v_dual_mov_b32 v16, s23 v_dual_mov_b32 v14, s21 :: v_dual_mov_b32 v15, s22 s_clause 0x3 global_store_b128 v[11:12], v[7:10], off global_store_b128 v[11:12], v[13:16], off offset:16 global_store_b128 v[11:12], v[13:16], off offset:32 global_store_b128 v[11:12], v[13:16], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_16 ; %bb.9: v_mov_b32_e32 v1, 0 s_mov_b32 s11, exec_lo s_clause 0x1 global_load_b64 v[15:16], v1, s[2:3] offset:32 glc global_load_b64 v[5:6], v1, s[2:3] offset:40 v_dual_mov_b32 v14, s9 :: v_dual_mov_b32 v13, s8 s_waitcnt vmcnt(0) v_and_b32_e32 v6, s9, v6 v_and_b32_e32 v5, s8, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v6, v6, 24 v_mul_hi_u32 v7, v5, 24 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v6, v7, v6 v_add_co_u32 v9, vcc_lo, v3, v5 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v10, vcc_lo, v4, v6, vcc_lo global_store_b64 v[9:10], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v1, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[7:8], v[15:16] s_cbranch_execz .LBB0_12 ; %bb.10: ; %.preheader1.i.i.i.preheader s_mov_b32 s18, 0 .LBB0_11: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, s9 s_sleep 1 global_store_b64 v[9:10], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8] v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5 s_or_b32 s18, vcc_lo, s18 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB0_11 .LBB0_12: ; %Flow861 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v8, 0 s_mov_b32 s18, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v1, s18, 0 global_load_b64 v[5:6], v8, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v1 s_cbranch_execz .LBB0_14 ; %bb.13: s_bcnt1_i32_b32 s18, s18 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v7, s18 s_waitcnt vmcnt(0) global_atomic_add_u64 v[5:6], v[7:8], off offset:8 .LBB0_14: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[5:6], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_16 ; %bb.15: global_load_b32 v5, v[5:6], off offset:24 v_mov_b32_e32 v6, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v5 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[5:6], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_16: ; %Flow862 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s16, s16, s1 v_add_co_u32 v1, vcc_lo, v3, s17 v_add_co_ci_u32_e32 v4, vcc_lo, s16, v4, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_17: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_19 ; %bb.18: ; in Loop: Header=BB0_17 Depth=1 global_load_b32 v1, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v1, 1, v1 .LBB0_19: ; in Loop: Header=BB0_17 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v1 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_21 ; %bb.20: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_22 .LBB0_21: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, -1 .LBB0_22: ; %Flow856 ; in Loop: Header=BB0_17 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_17 ; %bb.23: global_load_b64 v[3:4], v[11:12], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_27 ; %bb.24: v_mov_b32_e32 v1, 0 s_clause 0x2 global_load_b64 v[7:8], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] offset:24 glc global_load_b64 v[9:10], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v7, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v13, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v14 :: v_dual_cndmask_b32 v5, v5, v13 v_and_b32_e32 v8, v6, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v7, v5, v7 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v7, 24 v_mul_lo_u32 v7, v7, 24 v_add_nc_u32_e32 v8, v13, v8 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v9, vcc_lo, v9, v7 v_mov_b32_e32 v7, v11 v_add_co_ci_u32_e32 v10, vcc_lo, v10, v8, vcc_lo v_mov_b32_e32 v8, v12 global_store_b64 v[9:10], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v1, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_27 ; %bb.25: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_26: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[9:10], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v1, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[7:8] v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v8, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_26 .LBB0_27: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[8:9] s_add_u32 s8, s8, .str@rel32@lo+4 s_addc_u32 s9, s9, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[8:9], 0 s_cbranch_scc0 .LBB0_113 ; %bb.28: s_waitcnt vmcnt(0) v_dual_mov_b32 v32, 0 :: v_dual_and_b32 v1, 2, v3 v_dual_mov_b32 v6, v4 :: v_dual_and_b32 v5, -3, v3 v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1 s_mov_b64 s[10:11], 0x59 .LBB0_29: ; =>This Loop Header: Depth=1 ; Child Loop BB0_32 Depth 2 ; Child Loop BB0_39 Depth 2 ; Child Loop BB0_47 Depth 2 ; Child Loop BB0_55 Depth 2 ; Child Loop BB0_63 Depth 2 ; Child Loop BB0_71 Depth 2 ; Child Loop BB0_79 Depth 2 ; Child Loop BB0_87 Depth 2 ; Child Loop BB0_95 Depth 2 ; Child Loop BB0_101 Depth 2 ; Child Loop BB0_110 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[10:11], 56 ; implicit-def: $vgpr13_vgpr14 ; implicit-def: $sgpr23 s_and_b32 s0, s0, exec_lo s_cselect_b32 s16, s10, 56 s_cselect_b32 s17, s11, 0 s_cmp_gt_u32 s16, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_34 ; %bb.30: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v13, 0 v_mov_b32_e32 v14, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_33 ; %bb.31: ; %.preheader31.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_lshl_b64 s[0:1], s[16:17], 3 s_mov_b64 s[18:19], 0 s_mov_b64 s[20:21], s[8:9] .LBB0_32: ; %.preheader31.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v7, v32, s[20:21] s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[7:8], s18, v[31:32] s_add_u32 s18, s18, 8 s_addc_u32 s19, s19, 0 s_add_u32 s20, s20, 1 s_addc_u32 s21, s21, 0 s_cmp_lg_u32 s0, s18 v_or_b32_e32 v13, v7, v13 v_or_b32_e32 v14, v8, v14 s_cbranch_scc1 .LBB0_32 .LBB0_33: ; %Flow832 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s23, 0 .LBB0_34: ; %Flow834 ; in Loop: Header=BB0_29 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[8:9] s_cbranch_vccnz .LBB0_36 ; %bb.35: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[13:14], v32, s[8:9] s_add_i32 s23, s16, -8 s_add_u32 s0, s8, 8 s_addc_u32 s1, s9, 0 .LBB0_36: ; %.loopexit32.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s23, 7 s_cbranch_scc1 .LBB0_41 ; %bb.37: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v15, 0 v_mov_b32_e32 v16, 0 s_cmp_eq_u32 s23, 0 s_cbranch_scc1 .LBB0_40 ; %bb.38: ; %.preheader29.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[18:19], 0 s_mov_b64 s[20:21], 0 .LBB0_39: ; %.preheader29.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s24, s0, s20 s_addc_u32 s25, s1, s21 s_add_u32 s20, s20, 1 global_load_u8 v7, v32, s[24:25] s_addc_u32 s21, s21, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s18, v[31:32] s_add_u32 s18, s18, 8 s_addc_u32 s19, s19, 0 s_cmp_lg_u32 s23, s20 v_or_b32_e32 v15, v7, v15 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v16, v8, v16 s_cbranch_scc1 .LBB0_39 .LBB0_40: ; %Flow827 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, 0 s_mov_b32 s22, 0 s_branch .LBB0_42 .LBB0_41: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, -1 ; implicit-def: $vgpr15_vgpr16 ; implicit-def: $sgpr22 .LBB0_42: ; %Flow829 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB0_44 ; %bb.43: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[15:16], v32, s[0:1] s_add_i32 s22, s23, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_44: ; %.loopexit30.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s22, 7 s_cbranch_scc1 .LBB0_49 ; %bb.45: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v17, 0 v_mov_b32_e32 v18, 0 s_cmp_eq_u32 s22, 0 s_cbranch_scc1 .LBB0_48 ; %bb.46: ; %.preheader27.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[18:19], 0 s_mov_b64 s[20:21], 0 .LBB0_47: ; %.preheader27.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s24, s0, s20 s_addc_u32 s25, s1, s21 s_add_u32 s20, s20, 1 global_load_u8 v7, v32, s[24:25] s_addc_u32 s21, s21, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s18, v[31:32] s_add_u32 s18, s18, 8 s_addc_u32 s19, s19, 0 s_cmp_lg_u32 s22, s20 v_or_b32_e32 v17, v7, v17 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v18, v8, v18 s_cbranch_scc1 .LBB0_47 .LBB0_48: ; %Flow822 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, 0 s_mov_b32 s23, 0 s_branch .LBB0_50 .LBB0_49: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, -1 ; implicit-def: $sgpr23 .LBB0_50: ; %Flow824 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB0_52 ; %bb.51: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[17:18], v32, s[0:1] s_add_i32 s23, s22, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_52: ; %.loopexit28.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s23, 7 s_cbranch_scc1 .LBB0_57 ; %bb.53: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v19, 0 v_mov_b32_e32 v20, 0 s_cmp_eq_u32 s23, 0 s_cbranch_scc1 .LBB0_56 ; %bb.54: ; %.preheader25.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[18:19], 0 s_mov_b64 s[20:21], 0 .LBB0_55: ; %.preheader25.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s24, s0, s20 s_addc_u32 s25, s1, s21 s_add_u32 s20, s20, 1 global_load_u8 v7, v32, s[24:25] s_addc_u32 s21, s21, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s18, v[31:32] s_add_u32 s18, s18, 8 s_addc_u32 s19, s19, 0 s_cmp_lg_u32 s23, s20 v_or_b32_e32 v19, v7, v19 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v20, v8, v20 s_cbranch_scc1 .LBB0_55 .LBB0_56: ; %Flow817 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, 0 s_mov_b32 s22, 0 s_branch .LBB0_58 .LBB0_57: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, -1 ; implicit-def: $vgpr19_vgpr20 ; implicit-def: $sgpr22 .LBB0_58: ; %Flow819 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB0_60 ; %bb.59: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[19:20], v32, s[0:1] s_add_i32 s22, s23, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_60: ; %.loopexit26.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s22, 7 s_cbranch_scc1 .LBB0_65 ; %bb.61: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v21, 0 v_mov_b32_e32 v22, 0 s_cmp_eq_u32 s22, 0 s_cbranch_scc1 .LBB0_64 ; %bb.62: ; %.preheader23.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[18:19], 0 s_mov_b64 s[20:21], 0 .LBB0_63: ; %.preheader23.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s24, s0, s20 s_addc_u32 s25, s1, s21 s_add_u32 s20, s20, 1 global_load_u8 v7, v32, s[24:25] s_addc_u32 s21, s21, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s18, v[31:32] s_add_u32 s18, s18, 8 s_addc_u32 s19, s19, 0 s_cmp_lg_u32 s22, s20 v_or_b32_e32 v21, v7, v21 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v22, v8, v22 s_cbranch_scc1 .LBB0_63 .LBB0_64: ; %Flow812 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, 0 s_mov_b32 s23, 0 s_branch .LBB0_66 .LBB0_65: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, -1 ; implicit-def: $sgpr23 .LBB0_66: ; %Flow814 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB0_68 ; %bb.67: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[21:22], v32, s[0:1] s_add_i32 s23, s22, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_68: ; %.loopexit24.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s23, 7 s_cbranch_scc1 .LBB0_73 ; %bb.69: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v23, 0 v_mov_b32_e32 v24, 0 s_cmp_eq_u32 s23, 0 s_cbranch_scc1 .LBB0_72 ; %bb.70: ; %.preheader21.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[18:19], 0 s_mov_b64 s[20:21], 0 .LBB0_71: ; %.preheader21.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s24, s0, s20 s_addc_u32 s25, s1, s21 s_add_u32 s20, s20, 1 global_load_u8 v7, v32, s[24:25] s_addc_u32 s21, s21, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s18, v[31:32] s_add_u32 s18, s18, 8 s_addc_u32 s19, s19, 0 s_cmp_lg_u32 s23, s20 v_or_b32_e32 v23, v7, v23 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v24, v8, v24 s_cbranch_scc1 .LBB0_71 .LBB0_72: ; %Flow807 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, 0 s_mov_b32 s22, 0 s_branch .LBB0_74 .LBB0_73: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, -1 ; implicit-def: $vgpr23_vgpr24 ; implicit-def: $sgpr22 .LBB0_74: ; %Flow809 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB0_76 ; %bb.75: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[23:24], v32, s[0:1] s_add_i32 s22, s23, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_76: ; %.loopexit22.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s22, 7 s_cbranch_scc1 .LBB0_81 ; %bb.77: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v25, 0 v_mov_b32_e32 v26, 0 s_cmp_eq_u32 s22, 0 s_cbranch_scc1 .LBB0_80 ; %bb.78: ; %.preheader.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[18:19], 0 s_mov_b64 s[20:21], s[0:1] .LBB0_79: ; %.preheader.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v7, v32, s[20:21] s_add_i32 s22, s22, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[7:8], s18, v[31:32] s_add_u32 s18, s18, 8 s_addc_u32 s19, s19, 0 s_add_u32 s20, s20, 1 s_addc_u32 s21, s21, 0 s_cmp_lg_u32 s22, 0 v_or_b32_e32 v25, v7, v25 v_or_b32_e32 v26, v8, v26 s_cbranch_scc1 .LBB0_79 .LBB0_80: ; %Flow802 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, 0 s_branch .LBB0_82 .LBB0_81: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, -1 .LBB0_82: ; %Flow804 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s18 s_cbranch_vccnz .LBB0_84 ; %bb.83: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[25:26], v32, s[0:1] .LBB0_84: ; %.loopexit.i ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v31, v2 s_waitcnt vmcnt(0) v_mov_b32_e32 v7, 0 v_mov_b32_e32 v8, 0 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v31 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v31 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_90 ; %bb.85: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[29:30], v32, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[7:8], v32, s[2:3] offset:40 global_load_b64 v[11:12], v32, s[2:3] s_mov_b32 s18, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v8, v8, v30 v_and_b32_e32 v7, v7, v29 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v8, v8, 24 v_mul_hi_u32 v27, v7, 24 v_mul_lo_u32 v7, v7, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v8, v27, v8 s_waitcnt vmcnt(0) v_add_co_u32 v7, vcc_lo, v11, v7 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, v12, v8, vcc_lo global_load_b64 v[27:28], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v32, v[27:30], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[7:8], v[29:30] s_cbranch_execz .LBB0_89 ; %bb.86: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s19, 0 .LBB0_87: ; %.preheader3.i.i19.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[11:12], v32, s[2:3] offset:40 global_load_b64 v[27:28], v32, s[2:3] v_dual_mov_b32 v30, v8 :: v_dual_mov_b32 v29, v7 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v11, v11, v29 s_waitcnt vmcnt(0) v_mad_u64_u32 v[7:8], null, v11, 24, v[27:28] v_and_b32_e32 v27, v12, v30 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v27, 24, v[8:9] v_mov_b32_e32 v8, v11 global_load_b64 v[27:28], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v32, v[27:30], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[29:30] s_or_b32 s19, vcc_lo, s19 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s19 s_cbranch_execnz .LBB0_87 ; %bb.88: ; %Flow797 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s19 .LBB0_89: ; %Flow799 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s18 .LBB0_90: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[11:12], v32, s[2:3] offset:40 global_load_b128 v[27:30], v32, s[2:3] v_readfirstlane_b32 s18, v7 v_readfirstlane_b32 s19, v8 s_mov_b32 s24, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s20, v11 v_readfirstlane_b32 s21, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[20:21], s[18:19], s[20:21] s_mul_i32 s1, s21, 24 s_mul_hi_u32 s22, s20, 24 s_mul_i32 s23, s20, 24 s_and_saveexec_b32 s25, s0 s_cbranch_execz .LBB0_92 ; %bb.91: ; in Loop: Header=BB0_29 Depth=1 v_dual_mov_b32 v7, s24 :: v_dual_mov_b32 v8, v32 s_add_i32 s24, s22, s1 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v27, s23 v_add_co_ci_u32_e32 v12, vcc_lo, s24, v28, vcc_lo global_store_b128 v[11:12], v[7:10], off offset:8 .LBB0_92: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s25 v_cmp_gt_u64_e64 vcc_lo, s[10:11], 56 v_or_b32_e32 v7, 0, v6 v_or_b32_e32 v8, v5, v1 s_lshl_b64 s[20:21], s[20:21], 12 s_lshl_b32 s24, s16, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s24, s24, 28 v_dual_cndmask_b32 v12, v7, v6 :: v_dual_cndmask_b32 v7, v8, v5 v_lshlrev_b64 v[5:6], 6, v[31:32] s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v29, s20 v_add_co_ci_u32_e32 v30, vcc_lo, s21, v30, vcc_lo s_and_b32 s24, s24, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v29, vcc_lo, v8, v5 v_and_or_b32 v11, 0xffffff1f, v7, s24 v_add_co_ci_u32_e32 v30, vcc_lo, v30, v6, vcc_lo s_clause 0x3 global_store_b128 v[29:30], v[11:14], off global_store_b128 v[29:30], v[15:18], off offset:16 global_store_b128 v[29:30], v[19:22], off offset:32 global_store_b128 v[29:30], v[23:26], off offset:48 s_and_saveexec_b32 s20, s0 s_cbranch_execz .LBB0_100 ; %bb.93: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x1 global_load_b64 v[15:16], v32, s[2:3] offset:32 glc global_load_b64 v[5:6], v32, s[2:3] offset:40 v_dual_mov_b32 v13, s18 :: v_dual_mov_b32 v14, s19 s_waitcnt vmcnt(0) v_readfirstlane_b32 s24, v5 v_readfirstlane_b32 s25, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[24:25], s[24:25], s[18:19] s_mul_i32 s21, s25, 24 s_mul_hi_u32 s25, s24, 24 s_mul_i32 s24, s24, 24 s_add_i32 s25, s25, s21 v_add_co_u32 v11, vcc_lo, v27, s24 v_add_co_ci_u32_e32 v12, vcc_lo, s25, v28, vcc_lo s_mov_b32 s21, exec_lo global_store_b64 v[11:12], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v32, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[7:8], v[15:16] s_cbranch_execz .LBB0_96 ; %bb.94: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s24, 0 .LBB0_95: ; %.preheader1.i.i17.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v5, s18 :: v_dual_mov_b32 v6, s19 s_sleep 1 global_store_b64 v[11:12], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v32, v[5:8], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8] v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5 s_or_b32 s24, vcc_lo, s24 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s24 s_cbranch_execnz .LBB0_95 .LBB0_96: ; %Flow795 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s21 global_load_b64 v[5:6], v32, s[2:3] offset:16 s_mov_b32 s24, exec_lo s_mov_b32 s21, exec_lo v_mbcnt_lo_u32_b32 v7, s24, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v7 s_cbranch_execz .LBB0_98 ; %bb.97: ; in Loop: Header=BB0_29 Depth=1 s_bcnt1_i32_b32 s24, s24 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v31, s24 s_waitcnt vmcnt(0) global_atomic_add_u64 v[5:6], v[31:32], off offset:8 .LBB0_98: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s21 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[5:6], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_100 ; %bb.99: ; in Loop: Header=BB0_29 Depth=1 global_load_b32 v31, v[5:6], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s21, v31 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[31:32], off s_and_b32 m0, s21, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_100: ; %Flow796 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s20 s_add_i32 s22, s22, s1 v_add_co_u32 v5, vcc_lo, v27, s23 v_add_co_ci_u32_e32 v6, vcc_lo, s22, v28, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v5, 20 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo .LBB0_101: ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v7, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_101 Depth=2 global_load_b32 v7, v[5:6], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v7, 1, v7 .LBB0_103: ; in Loop: Header=BB0_101 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v7 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_105 ; %bb.104: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_106 .LBB0_105: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, -1 .LBB0_106: ; %Flow790 ; in Loop: Header=BB0_101 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_101 ; %bb.107: ; in Loop: Header=BB0_29 Depth=1 global_load_b128 v[5:8], v[29:30], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_111 ; %bb.108: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x2 global_load_b64 v[7:8], v32, s[2:3] offset:40 global_load_b64 v[15:16], v32, s[2:3] offset:24 glc global_load_b64 v[13:14], v32, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v17, vcc_lo, v7, 1 v_add_co_ci_u32_e32 v18, vcc_lo, 0, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v17, s18 v_add_co_ci_u32_e32 v12, vcc_lo, s19, v18, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[11:12] v_dual_cndmask_b32 v12, v12, v18 :: v_dual_cndmask_b32 v11, v11, v17 v_and_b32_e32 v8, v12, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v11, v7 v_mul_hi_u32 v17, v7, 24 v_mul_lo_u32 v7, v7, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v7, vcc_lo, v13, v7 v_mov_b32_e32 v13, v15 v_mul_lo_u32 v8, v8, 24 v_add_nc_u32_e32 v8, v17, v8 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v8, vcc_lo, v14, v8, vcc_lo v_mov_b32_e32 v14, v16 global_store_b64 v[7:8], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[13:14], v32, v[11:14], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[13:14], v[15:16] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_111 ; %bb.109: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 .LBB0_110: ; %.preheader.i.i16.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[7:8], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v32, v[11:14], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[13:14] v_dual_mov_b32 v13, v15 :: v_dual_mov_b32 v14, v16 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_110 .LBB0_111: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s10, s10, s16 s_subb_u32 s11, s11, s17 s_add_u32 s8, s8, s16 s_addc_u32 s9, s9, s17 s_cmp_lg_u64 s[10:11], 0 s_cbranch_scc1 .LBB0_29 ; %bb.112: ; %Flow835 s_mov_b32 s0, 0 s_branch .LBB0_114 .LBB0_113: s_mov_b32 s0, -1 ; implicit-def: $vgpr5_vgpr6 .LBB0_114: ; %Flow850 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_143 ; %bb.115: s_waitcnt vmcnt(0) v_mov_b32_e32 v5, v2 v_mov_b32_e32 v11, 0 v_mov_b32_e32 v12, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v5 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_121 ; %bb.116: v_mov_b32_e32 v1, 0 s_mov_b32 s8, exec_lo global_load_b64 v[8:9], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[10:11], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v6, v6, v8 v_and_b32_e32 v7, v7, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v6, 24 v_mul_lo_u32 v7, v7, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v7, v12, v7 s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v10, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo global_load_b64 v[6:7], v[6:7], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[8:9] s_cbranch_execz .LBB0_120 ; %bb.117: ; %.preheader3.i.i.i12.preheader s_mov_b32 s9, 0 .LBB0_118: ; %.preheader3.i.i.i12 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[13:14], v1, s[2:3] v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v6, v6, v8 v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[10:11], null, v6, 24, v[13:14] v_mov_b32_e32 v6, v11 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v7, 24, v[6:7] global_load_b64 v[6:7], v[10:11], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_118 ; %bb.119: ; %Flow847 s_or_b32 exec_lo, exec_lo, s9 .LBB0_120: ; %Flow849 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_121: ; %.loopexit4.i.i.i7 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v11 v_readfirstlane_b32 s9, v12 s_mov_b32 s18, exec_lo s_clause 0x1 global_load_b64 v[13:14], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v13 v_readfirstlane_b32 s11, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s16, s10, 24 s_mul_i32 s17, s10, 24 s_and_saveexec_b32 s19, s0 s_cbranch_execz .LBB0_123 ; %bb.122: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, v6 s_add_i32 s18, s16, s1 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v16, vcc_lo, s18, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[15:16], v[11:14], off offset:8 .LBB0_123: s_or_b32 exec_lo, exec_lo, s19 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[11:12], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v10, vcc_lo s_mov_b32 s20, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v9, vcc_lo, v1, v11 s_mov_b32 s21, s20 s_mov_b32 s22, s20 s_mov_b32 s23, s20 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v10, vcc_lo, v5, v12, vcc_lo v_mov_b32_e32 v5, v6 v_dual_mov_b32 v11, s20 :: v_dual_mov_b32 v14, s23 v_dual_mov_b32 v12, s21 :: v_dual_mov_b32 v13, s22 s_clause 0x3 global_store_b128 v[9:10], v[3:6], off global_store_b128 v[9:10], v[11:14], off offset:16 global_store_b128 v[9:10], v[11:14], off offset:32 global_store_b128 v[9:10], v[11:14], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_131 ; %bb.124: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v14, s9 v_mov_b32_e32 v13, s8 s_clause 0x1 global_load_b64 v[15:16], v1, s[2:3] offset:32 glc global_load_b64 v[3:4], v1, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[8:9] s_mul_i32 s11, s19, 24 s_mul_hi_u32 s19, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s19, s19, s11 v_add_co_u32 v11, vcc_lo, v7, s18 v_add_co_ci_u32_e32 v12, vcc_lo, s19, v8, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[11:12], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v1, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[15:16] s_cbranch_execz .LBB0_127 ; %bb.125: ; %.preheader1.i.i.i10.preheader s_mov_b32 s18, 0 .LBB0_126: ; %.preheader1.i.i.i10 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[11:12], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v1, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s18, vcc_lo, s18 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB0_126 .LBB0_127: ; %Flow845 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s18, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v1, s18, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v1 s_cbranch_execz .LBB0_129 ; %bb.128: s_bcnt1_i32_b32 s18, s18 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s18 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_129: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_131 ; %bb.130: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_131: ; %Flow846 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s16, s16, s1 v_add_co_u32 v1, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v4, vcc_lo, s16, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_132: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_134 ; %bb.133: ; in Loop: Header=BB0_132 Depth=1 global_load_b32 v1, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v1, 1, v1 .LBB0_134: ; in Loop: Header=BB0_132 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v1 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_136 ; %bb.135: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_137 .LBB0_136: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, -1 .LBB0_137: ; %Flow840 ; in Loop: Header=BB0_132 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_132 ; %bb.138: global_load_b128 v[5:8], v[9:10], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_142 ; %bb.139: v_mov_b32_e32 v1, 0 s_clause 0x2 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] offset:24 glc global_load_b64 v[9:10], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v4, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, v13, s8 v_add_co_ci_u32_e32 v8, vcc_lo, s9, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] v_dual_cndmask_b32 v8, v8, v14 :: v_dual_cndmask_b32 v7, v7, v13 v_and_b32_e32 v4, v8, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v7, v3 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v3, 24 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v4, v13, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v3, vcc_lo, v9, v3 v_mov_b32_e32 v9, v11 v_add_co_ci_u32_e32 v4, vcc_lo, v10, v4, vcc_lo v_mov_b32_e32 v10, v12 global_store_b64 v[3:4], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v1, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[9:10], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_142 ; %bb.140: ; %.preheader.i.i.i9.preheader s_mov_b32 s0, 0 .LBB0_141: ; %.preheader.i.i.i9 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[3:4], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v1, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[9:10] v_dual_mov_b32 v9, v11 :: v_dual_mov_b32 v10, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_141 .LBB0_142: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_143: ; %__ockl_printf_append_string_n.exit s_waitcnt vmcnt(0) v_mov_b32_e32 v3, v2 v_mov_b32_e32 v7, 0 v_mov_b32_e32 v8, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v3 v_cmp_eq_u32_e64 s0, s0, v3 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_149 ; %bb.144: v_mov_b32_e32 v1, 0 s_mov_b32 s8, exec_lo global_load_b64 v[9:10], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[7:8], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v8, v10 v_and_b32_e32 v7, v7, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v8, v7, 24 v_mul_lo_u32 v7, v7, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v8, v4 s_waitcnt vmcnt(0) v_add_co_u32 v7, vcc_lo, v11, v7 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, v12, v4, vcc_lo global_load_b64 v[7:8], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[7:8], v[9:10] s_cbranch_execz .LBB0_148 ; %bb.145: ; %.preheader3.i.i.i19.preheader s_mov_b32 s9, 0 .LBB0_146: ; %.preheader3.i.i.i19 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[11:12], v1, s[2:3] offset:40 global_load_b64 v[13:14], v1, s[2:3] v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v4, v11, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[7:8], null, v4, 24, v[13:14] v_and_b32_e32 v13, v12, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mov_b32_e32 v4, v8 v_mad_u64_u32 v[11:12], null, v13, 24, v[4:5] s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v8, v11 global_load_b64 v[7:8], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_146 ; %bb.147: ; %Flow783 s_or_b32 exec_lo, exec_lo, s9 .LBB0_148: ; %Flow785 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_149: ; %.loopexit4.i.i.i13 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v4, 0 v_readfirstlane_b32 s8, v7 v_readfirstlane_b32 s9, v8 s_mov_b32 s18, exec_lo s_clause 0x1 global_load_b64 v[13:14], v4, s[2:3] offset:40 global_load_b128 v[9:12], v4, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v13 v_readfirstlane_b32 s11, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s16, s10, 24 s_mul_i32 s17, s10, 24 s_and_saveexec_b32 s19, s0 s_cbranch_execz .LBB0_151 ; %bb.150: v_dual_mov_b32 v13, s18 :: v_dual_mov_b32 v14, v4 s_add_i32 s18, s16, s1 s_waitcnt vmcnt(0) v_add_co_u32 v7, vcc_lo, v9, s17 v_add_co_ci_u32_e32 v8, vcc_lo, s18, v10, vcc_lo v_dual_mov_b32 v15, 2 :: v_dual_mov_b32 v16, 1 global_store_b128 v[7:8], v[13:16], off offset:8 .LBB0_151: s_or_b32 exec_lo, exec_lo, s19 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[13:14], 6, v[3:4] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v11, s10 v_add_co_ci_u32_e32 v3, vcc_lo, s11, v12, vcc_lo s_mov_b32 s20, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v1, v13 s_mov_b32 s21, s20 s_mov_b32 s22, s20 s_mov_b32 s23, s20 v_dual_mov_b32 v8, v4 :: v_dual_and_b32 v7, 0x3ff, v0 v_and_or_b32 v5, 0xffffff1f, v5, 32 v_add_co_ci_u32_e32 v12, vcc_lo, v3, v14, vcc_lo v_dual_mov_b32 v13, s20 :: v_dual_mov_b32 v14, s21 v_dual_mov_b32 v15, s22 :: v_dual_mov_b32 v16, s23 s_clause 0x3 global_store_b128 v[11:12], v[5:8], off global_store_b128 v[11:12], v[13:16], off offset:16 global_store_b128 v[11:12], v[13:16], off offset:32 global_store_b128 v[11:12], v[13:16], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_159 ; %bb.152: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v14, s9 v_mov_b32_e32 v13, s8 s_clause 0x1 global_load_b64 v[15:16], v1, s[2:3] offset:32 glc global_load_b64 v[3:4], v1, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[8:9] s_mul_i32 s11, s19, 24 s_mul_hi_u32 s19, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s19, s19, s11 v_add_co_u32 v7, vcc_lo, v9, s18 v_add_co_ci_u32_e32 v8, vcc_lo, s19, v10, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[7:8], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v1, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[15:16] s_cbranch_execz .LBB0_155 ; %bb.153: ; %.preheader1.i.i.i17.preheader s_mov_b32 s18, 0 .LBB0_154: ; %.preheader1.i.i.i17 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v1, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s18, vcc_lo, s18 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB0_154 .LBB0_155: ; %Flow781 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s18, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v1, s18, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v1 s_cbranch_execz .LBB0_157 ; %bb.156: s_bcnt1_i32_b32 s18, s18 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s18 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_157: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_159 ; %bb.158: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_159: ; %Flow782 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s16, s16, s1 v_add_co_u32 v1, vcc_lo, v9, s17 v_add_co_ci_u32_e32 v4, vcc_lo, s16, v10, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_160: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_162 ; %bb.161: ; in Loop: Header=BB0_160 Depth=1 global_load_b32 v1, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v1, 1, v1 .LBB0_162: ; in Loop: Header=BB0_160 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v1 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_164 ; %bb.163: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_165 .LBB0_164: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, -1 .LBB0_165: ; %Flow776 ; in Loop: Header=BB0_160 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_160 ; %bb.166: global_load_b64 v[3:4], v[11:12], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_170 ; %bb.167: v_mov_b32_e32 v1, 0 s_clause 0x2 global_load_b64 v[7:8], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] offset:24 glc global_load_b64 v[9:10], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v7, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v13, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v14 :: v_dual_cndmask_b32 v5, v5, v13 v_and_b32_e32 v8, v6, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v7, v5, v7 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v7, 24 v_mul_lo_u32 v7, v7, 24 v_add_nc_u32_e32 v8, v13, v8 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v9, vcc_lo, v9, v7 v_mov_b32_e32 v7, v11 v_add_co_ci_u32_e32 v10, vcc_lo, v10, v8, vcc_lo v_mov_b32_e32 v8, v12 global_store_b64 v[9:10], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v1, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_170 ; %bb.168: ; %.preheader.i.i.i16.preheader s_mov_b32 s0, 0 .LBB0_169: ; %.preheader.i.i.i16 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[9:10], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v1, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[7:8] v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v8, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_169 .LBB0_170: ; %__ockl_printf_append_args.exit s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v5, v2 v_mov_b32_e32 v11, 0 v_mov_b32_e32 v12, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v5 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_176 ; %bb.171: v_mov_b32_e32 v1, 0 s_mov_b32 s8, exec_lo global_load_b64 v[8:9], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[10:11], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v6, v6, v8 v_and_b32_e32 v7, v7, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v6, 24 v_mul_lo_u32 v7, v7, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v7, v12, v7 s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v10, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo global_load_b64 v[6:7], v[6:7], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[8:9] s_cbranch_execz .LBB0_175 ; %bb.172: ; %.preheader3.i.i.i26.preheader s_mov_b32 s9, 0 .LBB0_173: ; %.preheader3.i.i.i26 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[13:14], v1, s[2:3] v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v6, v6, v8 v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[10:11], null, v6, 24, v[13:14] v_mov_b32_e32 v6, v11 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v7, 24, v[6:7] global_load_b64 v[6:7], v[10:11], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_173 ; %bb.174: ; %Flow769 s_or_b32 exec_lo, exec_lo, s9 .LBB0_175: ; %Flow771 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_176: ; %.loopexit4.i.i.i20 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v11 v_readfirstlane_b32 s9, v12 s_mov_b32 s18, exec_lo s_clause 0x1 global_load_b64 v[13:14], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v13 v_readfirstlane_b32 s11, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s16, s10, 24 s_mul_i32 s17, s10, 24 s_and_saveexec_b32 s19, s0 s_cbranch_execz .LBB0_178 ; %bb.177: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, v6 s_add_i32 s18, s16, s1 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v16, vcc_lo, s18, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[15:16], v[11:14], off offset:8 .LBB0_178: s_or_b32 exec_lo, exec_lo, s19 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[11:12], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo s_mov_b32 s20, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v9, vcc_lo, v1, v11 s_mov_b32 s21, s20 s_mov_b32 s22, s20 s_mov_b32 s23, s20 v_bfe_u32 v5, v0, 10, 10 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v10, vcc_lo, v10, v12, vcc_lo v_dual_mov_b32 v11, s20 :: v_dual_mov_b32 v12, s21 v_dual_mov_b32 v13, s22 :: v_dual_mov_b32 v14, s23 s_clause 0x3 global_store_b128 v[9:10], v[3:6], off global_store_b128 v[9:10], v[11:14], off offset:16 global_store_b128 v[9:10], v[11:14], off offset:32 global_store_b128 v[9:10], v[11:14], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_186 ; %bb.179: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v14, s9 v_mov_b32_e32 v13, s8 s_clause 0x1 global_load_b64 v[15:16], v1, s[2:3] offset:32 glc global_load_b64 v[3:4], v1, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[8:9] s_mul_i32 s11, s19, 24 s_mul_hi_u32 s19, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s19, s19, s11 v_add_co_u32 v11, vcc_lo, v7, s18 v_add_co_ci_u32_e32 v12, vcc_lo, s19, v8, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[11:12], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v1, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[15:16] s_cbranch_execz .LBB0_182 ; %bb.180: ; %.preheader1.i.i.i24.preheader s_mov_b32 s18, 0 .LBB0_181: ; %.preheader1.i.i.i24 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[11:12], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v1, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s18, vcc_lo, s18 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB0_181 .LBB0_182: ; %Flow767 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s18, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v1, s18, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v1 s_cbranch_execz .LBB0_184 ; %bb.183: s_bcnt1_i32_b32 s18, s18 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s18 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_184: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_186 ; %bb.185: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_186: ; %Flow768 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s16, s16, s1 v_add_co_u32 v1, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v4, vcc_lo, s16, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_187: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_189 ; %bb.188: ; in Loop: Header=BB0_187 Depth=1 global_load_b32 v1, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v1, 1, v1 .LBB0_189: ; in Loop: Header=BB0_187 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v1 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_191 ; %bb.190: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_192 .LBB0_191: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, -1 .LBB0_192: ; %Flow762 ; in Loop: Header=BB0_187 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_187 ; %bb.193: global_load_b64 v[3:4], v[9:10], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_197 ; %bb.194: v_mov_b32_e32 v1, 0 s_clause 0x2 global_load_b64 v[7:8], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] offset:24 glc global_load_b64 v[9:10], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v7, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v13, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v14 :: v_dual_cndmask_b32 v5, v5, v13 v_and_b32_e32 v8, v6, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v7, v5, v7 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v7, 24 v_mul_lo_u32 v7, v7, 24 v_add_nc_u32_e32 v8, v13, v8 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v9, vcc_lo, v9, v7 v_mov_b32_e32 v7, v11 v_add_co_ci_u32_e32 v10, vcc_lo, v10, v8, vcc_lo v_mov_b32_e32 v8, v12 global_store_b64 v[9:10], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v1, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_197 ; %bb.195: ; %.preheader.i.i.i23.preheader s_mov_b32 s0, 0 .LBB0_196: ; %.preheader.i.i.i23 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[9:10], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v1, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[7:8] v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v8, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_196 .LBB0_197: ; %__ockl_printf_append_args.exit27 s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v5, v2 v_mov_b32_e32 v11, 0 v_mov_b32_e32 v12, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v5 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_203 ; %bb.198: v_mov_b32_e32 v1, 0 s_mov_b32 s8, exec_lo global_load_b64 v[8:9], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[10:11], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v6, v6, v8 v_and_b32_e32 v7, v7, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v6, 24 v_mul_lo_u32 v7, v7, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v7, v12, v7 s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v10, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo global_load_b64 v[6:7], v[6:7], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[8:9] s_cbranch_execz .LBB0_202 ; %bb.199: ; %.preheader3.i.i.i34.preheader s_mov_b32 s9, 0 .LBB0_200: ; %.preheader3.i.i.i34 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[13:14], v1, s[2:3] v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v6, v6, v8 v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[10:11], null, v6, 24, v[13:14] v_mov_b32_e32 v6, v11 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v7, 24, v[6:7] global_load_b64 v[6:7], v[10:11], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_200 ; %bb.201: ; %Flow755 s_or_b32 exec_lo, exec_lo, s9 .LBB0_202: ; %Flow757 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_203: ; %.loopexit4.i.i.i28 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v11 v_readfirstlane_b32 s9, v12 s_mov_b32 s18, exec_lo s_clause 0x1 global_load_b64 v[13:14], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v13 v_readfirstlane_b32 s11, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s16, s10, 24 s_mul_i32 s17, s10, 24 s_and_saveexec_b32 s19, s0 s_cbranch_execz .LBB0_205 ; %bb.204: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, v6 s_add_i32 s18, s16, s1 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v16, vcc_lo, s18, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[15:16], v[11:14], off offset:8 .LBB0_205: s_or_b32 exec_lo, exec_lo, s19 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[11:12], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s20, 0 v_bfe_u32 v5, v0, 20, 10 s_delay_alu instid0(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v1, v11 s_mov_b32 s21, s20 s_mov_b32 s22, s20 s_mov_b32 s23, s20 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v12, vcc_lo v_dual_mov_b32 v9, s20 :: v_dual_mov_b32 v10, s21 v_dual_mov_b32 v11, s22 :: v_dual_mov_b32 v12, s23 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_213 ; %bb.206: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[8:9] s_mul_i32 s11, s19, 24 s_mul_hi_u32 s19, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s19, s19, s11 v_add_co_u32 v9, vcc_lo, v7, s18 v_add_co_ci_u32_e32 v10, vcc_lo, s19, v8, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_209 ; %bb.207: ; %.preheader1.i.i.i32.preheader s_mov_b32 s18, 0 .LBB0_208: ; %.preheader1.i.i.i32 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s18, vcc_lo, s18 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB0_208 .LBB0_209: ; %Flow753 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s18, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v5, s18, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_211 ; %bb.210: s_bcnt1_i32_b32 s18, s18 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s18 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_211: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_213 ; %bb.212: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_213: ; %Flow754 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s16, s16, s1 v_add_co_u32 v3, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v4, vcc_lo, s16, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_214: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_216 ; %bb.215: ; in Loop: Header=BB0_214 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_216: ; in Loop: Header=BB0_214 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_218 ; %bb.217: ; in Loop: Header=BB0_214 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_219 .LBB0_218: ; in Loop: Header=BB0_214 Depth=1 s_mov_b32 s1, -1 .LBB0_219: ; %Flow748 ; in Loop: Header=BB0_214 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_214 ; %bb.220: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_224 ; %bb.221: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[0:1], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v1, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v5, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v7, v0 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_224 ; %bb.222: ; %.preheader.i.i.i31.preheader s_mov_b32 s0, 0 .LBB0_223: ; %.preheader.i.i.i31 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_223 .LBB0_224: ; %__ockl_printf_append_args.exit35 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v5 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_230 ; %bb.225: v_mov_b32_e32 v6, 0 s_mov_b32 s8, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_229 ; %bb.226: ; %.preheader3.i.i.i42.preheader s_mov_b32 s9, 0 .LBB0_227: ; %.preheader3.i.i.i42 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[11:12], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_227 ; %bb.228: ; %Flow741 s_or_b32 exec_lo, exec_lo, s9 .LBB0_229: ; %Flow743 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_230: ; %.loopexit4.i.i.i36 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_mov_b32 s18, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s16, s10, 24 s_mul_i32 s17, s10, 24 s_and_saveexec_b32 s19, s0 s_cbranch_execz .LBB0_232 ; %bb.231: v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, v6 s_add_i32 s18, s16, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v1, vcc_lo, s18, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[0:1], v[11:14], off offset:8 .LBB0_232: s_or_b32 exec_lo, exec_lo, s19 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[0:1], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s20, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 s_mov_b32 s21, s20 s_mov_b32 s22, s20 s_mov_b32 s23, s20 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v5, s13 v_dual_mov_b32 v9, s20 :: v_dual_mov_b32 v12, s23 v_dual_mov_b32 v10, s21 :: v_dual_mov_b32 v11, s22 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_240 ; %bb.233: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[8:9] s_mul_i32 s11, s19, 24 s_mul_hi_u32 s13, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s13, s13, s11 v_add_co_u32 v9, vcc_lo, v7, s18 v_add_co_ci_u32_e32 v10, vcc_lo, s13, v8, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_236 ; %bb.234: ; %.preheader1.i.i.i40.preheader s_mov_b32 s13, 0 .LBB0_235: ; %.preheader1.i.i.i40 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s13, vcc_lo, s13 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_235 .LBB0_236: ; %Flow739 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s13, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v5, s13, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_238 ; %bb.237: s_bcnt1_i32_b32 s13, s13 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s13 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_238: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_240 ; %bb.239: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_240: ; %Flow740 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s16, s16, s1 v_add_co_u32 v3, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v4, vcc_lo, s16, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_241: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_243 ; %bb.242: ; in Loop: Header=BB0_241 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_243: ; in Loop: Header=BB0_241 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_245 ; %bb.244: ; in Loop: Header=BB0_241 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_246 .LBB0_245: ; in Loop: Header=BB0_241 Depth=1 s_mov_b32 s1, -1 .LBB0_246: ; %Flow734 ; in Loop: Header=BB0_241 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_241 ; %bb.247: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_251 ; %bb.248: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[0:1], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v1, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v5, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v7, v0 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_251 ; %bb.249: ; %.preheader.i.i.i39.preheader s_mov_b32 s0, 0 .LBB0_250: ; %.preheader.i.i.i39 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_250 .LBB0_251: ; %__ockl_printf_append_args.exit43 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v5 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_257 ; %bb.252: v_mov_b32_e32 v6, 0 s_mov_b32 s8, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_256 ; %bb.253: ; %.preheader3.i.i.i50.preheader s_mov_b32 s9, 0 .LBB0_254: ; %.preheader3.i.i.i50 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[11:12], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_254 ; %bb.255: ; %Flow727 s_or_b32 exec_lo, exec_lo, s9 .LBB0_256: ; %Flow729 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_257: ; %.loopexit4.i.i.i44 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_mov_b32 s17, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s13, s10, 24 s_mul_i32 s16, s10, 24 s_and_saveexec_b32 s18, s0 s_cbranch_execz .LBB0_259 ; %bb.258: v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, v6 s_add_i32 s17, s13, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s16 v_add_co_ci_u32_e32 v1, vcc_lo, s17, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[0:1], v[11:14], off offset:8 .LBB0_259: s_or_b32 exec_lo, exec_lo, s18 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[0:1], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s20, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 s_mov_b32 s21, s20 s_mov_b32 s22, s20 s_mov_b32 s23, s20 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v5, s14 v_dual_mov_b32 v9, s20 :: v_dual_mov_b32 v12, s23 v_dual_mov_b32 v10, s21 :: v_dual_mov_b32 v11, s22 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_267 ; %bb.260: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[8:9] s_mul_i32 s11, s19, 24 s_mul_hi_u32 s14, s18, 24 s_mul_i32 s17, s18, 24 s_add_i32 s14, s14, s11 v_add_co_u32 v9, vcc_lo, v7, s17 v_add_co_ci_u32_e32 v10, vcc_lo, s14, v8, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_263 ; %bb.261: ; %.preheader1.i.i.i48.preheader s_mov_b32 s14, 0 .LBB0_262: ; %.preheader1.i.i.i48 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s14, vcc_lo, s14 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s14 s_cbranch_execnz .LBB0_262 .LBB0_263: ; %Flow725 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s14, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v5, s14, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_265 ; %bb.264: s_bcnt1_i32_b32 s14, s14 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s14 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_265: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_267 ; %bb.266: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_267: ; %Flow726 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s13, s13, s1 v_add_co_u32 v3, vcc_lo, v7, s16 v_add_co_ci_u32_e32 v4, vcc_lo, s13, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_268: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_270 ; %bb.269: ; in Loop: Header=BB0_268 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_270: ; in Loop: Header=BB0_268 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_272 ; %bb.271: ; in Loop: Header=BB0_268 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_273 .LBB0_272: ; in Loop: Header=BB0_268 Depth=1 s_mov_b32 s1, -1 .LBB0_273: ; %Flow720 ; in Loop: Header=BB0_268 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_268 ; %bb.274: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_278 ; %bb.275: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[0:1], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v1, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v5, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v7, v0 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_278 ; %bb.276: ; %.preheader.i.i.i47.preheader s_mov_b32 s0, 0 .LBB0_277: ; %.preheader.i.i.i47 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_277 .LBB0_278: ; %__ockl_printf_append_args.exit51 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v5 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_284 ; %bb.279: v_mov_b32_e32 v6, 0 s_mov_b32 s8, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_283 ; %bb.280: ; %.preheader3.i.i.i58.preheader s_mov_b32 s9, 0 .LBB0_281: ; %.preheader3.i.i.i58 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[11:12], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_281 ; %bb.282: ; %Flow713 s_or_b32 exec_lo, exec_lo, s9 .LBB0_283: ; %Flow715 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_284: ; %.loopexit4.i.i.i52 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_mov_b32 s16, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s13, s10, 24 s_mul_i32 s14, s10, 24 s_and_saveexec_b32 s17, s0 s_cbranch_execz .LBB0_286 ; %bb.285: v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, v6 s_add_i32 s16, s13, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s14 v_add_co_ci_u32_e32 v1, vcc_lo, s16, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[0:1], v[11:14], off offset:8 .LBB0_286: s_or_b32 exec_lo, exec_lo, s17 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[0:1], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v5, s15 v_dual_mov_b32 v9, s16 :: v_dual_mov_b32 v12, s19 v_dual_mov_b32 v10, s17 :: v_dual_mov_b32 v11, s18 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_294 ; %bb.287: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v3 v_readfirstlane_b32 s17, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[8:9] s_mul_i32 s11, s17, 24 s_mul_hi_u32 s15, s16, 24 s_mul_i32 s16, s16, 24 s_add_i32 s15, s15, s11 v_add_co_u32 v9, vcc_lo, v7, s16 v_add_co_ci_u32_e32 v10, vcc_lo, s15, v8, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_290 ; %bb.288: ; %.preheader1.i.i.i56.preheader s_mov_b32 s15, 0 .LBB0_289: ; %.preheader1.i.i.i56 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s15, vcc_lo, s15 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s15 s_cbranch_execnz .LBB0_289 .LBB0_290: ; %Flow711 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s15, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v5, s15, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_292 ; %bb.291: s_bcnt1_i32_b32 s15, s15 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s15 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_292: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_294 ; %bb.293: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_294: ; %Flow712 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s13, s13, s1 v_add_co_u32 v3, vcc_lo, v7, s14 v_add_co_ci_u32_e32 v4, vcc_lo, s13, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_295: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_297 ; %bb.296: ; in Loop: Header=BB0_295 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_297: ; in Loop: Header=BB0_295 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_299 ; %bb.298: ; in Loop: Header=BB0_295 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_300 .LBB0_299: ; in Loop: Header=BB0_295 Depth=1 s_mov_b32 s1, -1 .LBB0_300: ; %Flow706 ; in Loop: Header=BB0_295 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_295 ; %bb.301: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_305 ; %bb.302: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[0:1], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v1, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v5, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v7, v0 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_305 ; %bb.303: ; %.preheader.i.i.i55.preheader s_mov_b32 s0, 0 .LBB0_304: ; %.preheader.i.i.i55 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_304 .LBB0_305: ; %__ockl_printf_append_args.exit59 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v5 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_311 ; %bb.306: v_mov_b32_e32 v6, 0 s_mov_b32 s8, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_310 ; %bb.307: ; %.preheader3.i.i.i66.preheader s_mov_b32 s9, 0 .LBB0_308: ; %.preheader3.i.i.i66 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[11:12], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_308 ; %bb.309: ; %Flow699 s_or_b32 exec_lo, exec_lo, s9 .LBB0_310: ; %Flow701 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_311: ; %.loopexit4.i.i.i60 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_mov_b32 s15, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s13, s10, 24 s_mul_i32 s14, s10, 24 s_and_saveexec_b32 s16, s0 s_cbranch_execz .LBB0_313 ; %bb.312: v_dual_mov_b32 v11, s15 :: v_dual_mov_b32 v12, v6 s_add_i32 s15, s13, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s14 v_add_co_ci_u32_e32 v1, vcc_lo, s15, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[0:1], v[11:14], off offset:8 .LBB0_313: s_or_b32 exec_lo, exec_lo, s16 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[0:1], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s16, 0 s_and_b32 s10, s12, 0xffff s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v5, s10 v_dual_mov_b32 v9, s16 :: v_dual_mov_b32 v12, s19 v_dual_mov_b32 v10, s17 :: v_dual_mov_b32 v11, s18 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_321 ; %bb.314: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v3 v_readfirstlane_b32 s17, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[8:9] s_mul_i32 s11, s17, 24 s_mul_hi_u32 s15, s16, 24 s_mul_i32 s16, s16, 24 s_add_i32 s15, s15, s11 v_add_co_u32 v9, vcc_lo, v7, s16 v_add_co_ci_u32_e32 v10, vcc_lo, s15, v8, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_317 ; %bb.315: ; %.preheader1.i.i.i64.preheader s_mov_b32 s15, 0 .LBB0_316: ; %.preheader1.i.i.i64 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s15, vcc_lo, s15 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s15 s_cbranch_execnz .LBB0_316 .LBB0_317: ; %Flow697 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s15, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v5, s15, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_319 ; %bb.318: s_bcnt1_i32_b32 s15, s15 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s15 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_319: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_321 ; %bb.320: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_321: ; %Flow698 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s13, s13, s1 v_add_co_u32 v3, vcc_lo, v7, s14 v_add_co_ci_u32_e32 v4, vcc_lo, s13, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_322: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_324 ; %bb.323: ; in Loop: Header=BB0_322 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_324: ; in Loop: Header=BB0_322 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_326 ; %bb.325: ; in Loop: Header=BB0_322 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_327 .LBB0_326: ; in Loop: Header=BB0_322 Depth=1 s_mov_b32 s1, -1 .LBB0_327: ; %Flow692 ; in Loop: Header=BB0_322 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_322 ; %bb.328: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_332 ; %bb.329: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[0:1], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v1, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v5, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v7, v0 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_332 ; %bb.330: ; %.preheader.i.i.i63.preheader s_mov_b32 s0, 0 .LBB0_331: ; %.preheader.i.i.i63 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_331 .LBB0_332: ; %__ockl_printf_append_args.exit67 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v5 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_338 ; %bb.333: v_mov_b32_e32 v6, 0 s_mov_b32 s8, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_337 ; %bb.334: ; %.preheader3.i.i.i74.preheader s_mov_b32 s9, 0 .LBB0_335: ; %.preheader3.i.i.i74 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[11:12], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_335 ; %bb.336: ; %Flow685 s_or_b32 exec_lo, exec_lo, s9 .LBB0_337: ; %Flow687 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_338: ; %.loopexit4.i.i.i68 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_mov_b32 s15, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s13, s10, 24 s_mul_i32 s14, s10, 24 s_and_saveexec_b32 s16, s0 s_cbranch_execz .LBB0_340 ; %bb.339: v_dual_mov_b32 v11, s15 :: v_dual_mov_b32 v12, v6 s_add_i32 s15, s13, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s14 v_add_co_ci_u32_e32 v1, vcc_lo, s15, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[0:1], v[11:14], off offset:8 .LBB0_340: s_or_b32 exec_lo, exec_lo, s16 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[0:1], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s16, 0 s_lshr_b32 s10, s12, 16 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v5, s10 v_dual_mov_b32 v9, s16 :: v_dual_mov_b32 v12, s19 v_dual_mov_b32 v10, s17 :: v_dual_mov_b32 v11, s18 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s10, s0 s_cbranch_execz .LBB0_348 ; %bb.341: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v3 v_readfirstlane_b32 s17, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[8:9] s_mul_i32 s11, s17, 24 s_mul_hi_u32 s12, s16, 24 s_mul_i32 s15, s16, 24 s_add_i32 s12, s12, s11 v_add_co_u32 v9, vcc_lo, v7, s15 v_add_co_ci_u32_e32 v10, vcc_lo, s12, v8, vcc_lo s_mov_b32 s11, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_344 ; %bb.342: ; %.preheader1.i.i.i72.preheader s_mov_b32 s12, 0 .LBB0_343: ; %.preheader1.i.i.i72 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s12, vcc_lo, s12 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s12 s_cbranch_execnz .LBB0_343 .LBB0_344: ; %Flow683 s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v6, 0 s_mov_b32 s12, exec_lo s_mov_b32 s11, exec_lo v_mbcnt_lo_u32_b32 v5, s12, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_346 ; %bb.345: s_bcnt1_i32_b32 s12, s12 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s12 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_346: s_or_b32 exec_lo, exec_lo, s11 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_348 ; %bb.347: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s11, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s11, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_348: ; %Flow684 s_or_b32 exec_lo, exec_lo, s10 s_add_i32 s13, s13, s1 v_add_co_u32 v3, vcc_lo, v7, s14 v_add_co_ci_u32_e32 v4, vcc_lo, s13, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_349: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_351 ; %bb.350: ; in Loop: Header=BB0_349 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_351: ; in Loop: Header=BB0_349 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_353 ; %bb.352: ; in Loop: Header=BB0_349 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_354 .LBB0_353: ; in Loop: Header=BB0_349 Depth=1 s_mov_b32 s1, -1 .LBB0_354: ; %Flow678 ; in Loop: Header=BB0_349 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_349 ; %bb.355: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_359 ; %bb.356: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[0:1], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v1, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v5, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v7, v0 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_359 ; %bb.357: ; %.preheader.i.i.i71.preheader s_mov_b32 s0, 0 .LBB0_358: ; %.preheader.i.i.i71 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_358 .LBB0_359: ; %__ockl_printf_append_args.exit75 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v5 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_365 ; %bb.360: v_mov_b32_e32 v6, 0 s_mov_b32 s8, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_364 ; %bb.361: ; %.preheader3.i.i.i82.preheader s_mov_b32 s9, 0 .LBB0_362: ; %.preheader3.i.i.i82 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[11:12], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_362 ; %bb.363: ; %Flow671 s_or_b32 exec_lo, exec_lo, s9 .LBB0_364: ; %Flow673 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s8 .LBB0_365: ; %.loopexit4.i.i.i76 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_mov_b32 s14, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s12, s10, 24 s_mul_i32 s13, s10, 24 s_and_saveexec_b32 s15, s0 s_cbranch_execz .LBB0_367 ; %bb.366: v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, v6 s_add_i32 s14, s12, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s13 v_add_co_ci_u32_e32 v1, vcc_lo, s14, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[0:1], v[11:14], off offset:8 .LBB0_367: s_or_b32 exec_lo, exec_lo, s15 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[0:1], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s16, 0 s_and_b32 s7, s7, 0xffff s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v5, s7 v_dual_mov_b32 v9, s16 :: v_dual_mov_b32 v12, s19 v_dual_mov_b32 v10, s17 :: v_dual_mov_b32 v11, s18 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s7, s0 s_cbranch_execz .LBB0_375 ; %bb.368: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[8:9] s_mul_i32 s11, s11, 24 s_mul_hi_u32 s14, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s14, s14, s11 v_add_co_u32 v9, vcc_lo, v7, s10 v_add_co_ci_u32_e32 v10, vcc_lo, s14, v8, vcc_lo s_mov_b32 s10, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_371 ; %bb.369: ; %.preheader1.i.i.i80.preheader s_mov_b32 s11, 0 .LBB0_370: ; %.preheader1.i.i.i80 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_370 .LBB0_371: ; %Flow669 s_or_b32 exec_lo, exec_lo, s10 v_mov_b32_e32 v6, 0 s_mov_b32 s11, exec_lo s_mov_b32 s10, exec_lo v_mbcnt_lo_u32_b32 v5, s11, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_373 ; %bb.372: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_373: s_or_b32 exec_lo, exec_lo, s10 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_375 ; %bb.374: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s10, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_375: ; %Flow670 s_or_b32 exec_lo, exec_lo, s7 s_add_i32 s12, s12, s1 v_add_co_u32 v3, vcc_lo, v7, s13 v_add_co_ci_u32_e32 v4, vcc_lo, s12, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_376: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_378 ; %bb.377: ; in Loop: Header=BB0_376 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_378: ; in Loop: Header=BB0_376 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_380 ; %bb.379: ; in Loop: Header=BB0_376 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_381 .LBB0_380: ; in Loop: Header=BB0_376 Depth=1 s_mov_b32 s1, -1 .LBB0_381: ; %Flow664 ; in Loop: Header=BB0_376 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_376 ; %bb.382: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_386 ; %bb.383: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[0:1], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v1, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v5, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v7, v0 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_386 ; %bb.384: ; %.preheader.i.i.i79.preheader s_mov_b32 s0, 0 .LBB0_385: ; %.preheader.i.i.i79 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_385 .LBB0_386: ; %__ockl_printf_append_args.exit83 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v5 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_392 ; %bb.387: v_mov_b32_e32 v6, 0 s_mov_b32 s7, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_391 ; %bb.388: ; %.preheader3.i.i.i90.preheader s_mov_b32 s8, 0 .LBB0_389: ; %.preheader3.i.i.i90 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[11:12], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s8, vcc_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB0_389 ; %bb.390: ; %Flow657 s_or_b32 exec_lo, exec_lo, s8 .LBB0_391: ; %Flow659 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 .LBB0_392: ; %.loopexit4.i.i.i84 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_mov_b32 s13, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s7, s10, 24 s_mul_i32 s12, s10, 24 s_and_saveexec_b32 s14, s0 s_cbranch_execz .LBB0_394 ; %bb.393: v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, v6 s_add_i32 s13, s7, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s12 v_add_co_ci_u32_e32 v1, vcc_lo, s13, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[0:1], v[11:14], off offset:8 .LBB0_394: s_or_b32 exec_lo, exec_lo, s14 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[0:1], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v5, s4 v_dual_mov_b32 v9, s16 :: v_dual_mov_b32 v12, s19 v_dual_mov_b32 v10, s17 :: v_dual_mov_b32 v11, s18 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB0_402 ; %bb.395: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[8:9] s_mul_i32 s11, s11, 24 s_mul_hi_u32 s13, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s13, s13, s11 v_add_co_u32 v9, vcc_lo, v7, s10 v_add_co_ci_u32_e32 v10, vcc_lo, s13, v8, vcc_lo s_mov_b32 s10, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_398 ; %bb.396: ; %.preheader1.i.i.i88.preheader s_mov_b32 s11, 0 .LBB0_397: ; %.preheader1.i.i.i88 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_397 .LBB0_398: ; %Flow655 s_or_b32 exec_lo, exec_lo, s10 v_mov_b32_e32 v6, 0 s_mov_b32 s11, exec_lo s_mov_b32 s10, exec_lo v_mbcnt_lo_u32_b32 v5, s11, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_400 ; %bb.399: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_400: s_or_b32 exec_lo, exec_lo, s10 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_402 ; %bb.401: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s10, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_402: ; %Flow656 s_or_b32 exec_lo, exec_lo, s4 s_add_i32 s7, s7, s1 v_add_co_u32 v3, vcc_lo, v7, s12 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_403: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_405 ; %bb.404: ; in Loop: Header=BB0_403 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_405: ; in Loop: Header=BB0_403 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_407 ; %bb.406: ; in Loop: Header=BB0_403 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_408 .LBB0_407: ; in Loop: Header=BB0_403 Depth=1 s_mov_b32 s1, -1 .LBB0_408: ; %Flow650 ; in Loop: Header=BB0_403 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_403 ; %bb.409: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_413 ; %bb.410: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[0:1], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v1, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v5, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v7, v0 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[0:1], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_413 ; %bb.411: ; %.preheader.i.i.i87.preheader s_mov_b32 s0, 0 .LBB0_412: ; %.preheader.i.i.i87 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_412 .LBB0_413: ; %__ockl_printf_append_args.exit91 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v5 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_419 ; %bb.414: v_mov_b32_e32 v6, 0 s_mov_b32 s4, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_418 ; %bb.415: ; %.preheader3.i.i.i98.preheader s_mov_b32 s7, 0 .LBB0_416: ; %.preheader3.i.i.i98 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[11:12], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB0_416 ; %bb.417: ; %Flow643 s_or_b32 exec_lo, exec_lo, s7 .LBB0_418: ; %Flow645 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_419: ; %.loopexit4.i.i.i92 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_mov_b32 s12, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s10, v11 v_readfirstlane_b32 s11, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[8:9], s[10:11] s_mul_i32 s1, s11, 24 s_mul_hi_u32 s4, s10, 24 s_mul_i32 s7, s10, 24 s_and_saveexec_b32 s13, s0 s_cbranch_execz .LBB0_421 ; %bb.420: v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v12, v6 s_add_i32 s12, s4, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s7 v_add_co_ci_u32_e32 v1, vcc_lo, s12, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[0:1], v[11:14], off offset:8 .LBB0_421: s_or_b32 exec_lo, exec_lo, s13 s_lshl_b64 s[10:11], s[10:11], 12 v_lshlrev_b64 v[0:1], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v10, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v5, s5 v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v12, s15 v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, s14 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s5, s0 s_cbranch_execz .LBB0_429 ; %bb.422: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s8 v_mov_b32_e32 v13, s9 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[8:9] s_mul_i32 s11, s11, 24 s_mul_hi_u32 s12, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s12, s12, s11 v_add_co_u32 v9, vcc_lo, v7, s10 v_add_co_ci_u32_e32 v10, vcc_lo, s12, v8, vcc_lo s_mov_b32 s10, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_425 ; %bb.423: ; %.preheader1.i.i.i96.preheader s_mov_b32 s11, 0 .LBB0_424: ; %.preheader1.i.i.i96 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_424 .LBB0_425: ; %Flow641 s_or_b32 exec_lo, exec_lo, s10 v_mov_b32_e32 v6, 0 s_mov_b32 s11, exec_lo s_mov_b32 s10, exec_lo v_mbcnt_lo_u32_b32 v5, s11, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_427 ; %bb.426: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_427: s_or_b32 exec_lo, exec_lo, s10 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_429 ; %bb.428: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s10, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_429: ; %Flow642 s_or_b32 exec_lo, exec_lo, s5 s_add_i32 s4, s4, s1 v_add_co_u32 v3, vcc_lo, v7, s7 v_add_co_ci_u32_e32 v4, vcc_lo, s4, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_430: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_432 ; %bb.431: ; in Loop: Header=BB0_430 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_432: ; in Loop: Header=BB0_430 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_434 ; %bb.433: ; in Loop: Header=BB0_430 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_435 .LBB0_434: ; in Loop: Header=BB0_430 Depth=1 s_mov_b32 s1, -1 .LBB0_435: ; %Flow636 ; in Loop: Header=BB0_430 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_430 ; %bb.436: global_load_b64 v[0:1], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_440 ; %bb.437: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[5:6], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v5, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v4, vcc_lo, s9, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_and_b32_e32 v6, v4, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v3, v5 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v5, 24 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, v7, v5 v_mov_b32_e32 v5, v10 v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo v_mov_b32_e32 v6, v11 global_store_b64 v[7:8], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_440 ; %bb.438: ; %.preheader.i.i.i95.preheader s_mov_b32 s0, 0 .LBB0_439: ; %.preheader.i.i.i95 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6] v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_439 .LBB0_440: ; %__ockl_printf_append_args.exit99 s_or_b32 exec_lo, exec_lo, s1 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v2 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v2 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_446 ; %bb.441: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_445 ; %bb.442: ; %.preheader3.i.i.i106.preheader s_mov_b32 s5, 0 .LBB0_443: ; %.preheader3.i.i.i106 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_443 ; %bb.444: ; %Flow629 s_or_b32 exec_lo, exec_lo, s5 .LBB0_445: ; %Flow631 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_446: ; %.loopexit4.i.i.i100 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s11, exec_lo s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v10 v_readfirstlane_b32 s9, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[4:5], s[8:9] s_mul_i32 s1, s9, 24 s_mul_hi_u32 s7, s8, 24 s_mul_i32 s10, s8, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_448 ; %bb.447: v_dual_mov_b32 v8, s11 :: v_dual_mov_b32 v9, v3 s_add_i32 s11, s7, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v13, vcc_lo, s11, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_448: s_or_b32 exec_lo, exec_lo, s12 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[8:9], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v2, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1d, v0, 34 v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo v_mov_b32_e32 v2, s6 v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v9, s15 v_dual_mov_b32 v7, s13 :: v_dual_mov_b32 v8, s14 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_456 ; %bb.449: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[8:9], s[4:5] s_mul_i32 s9, s9, 24 s_mul_hi_u32 s11, s8, 24 s_mul_i32 s8, s8, 24 s_add_i32 s11, s11, s9 v_add_co_u32 v6, vcc_lo, v4, s8 v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo s_mov_b32 s8, exec_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_452 ; %bb.450: ; %.preheader1.i.i.i104.preheader s_mov_b32 s9, 0 .LBB0_451: ; %.preheader1.i.i.i104 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_451 .LBB0_452: ; %Flow627 s_or_b32 exec_lo, exec_lo, s8 v_mov_b32_e32 v3, 0 s_mov_b32 s9, exec_lo s_mov_b32 s8, exec_lo v_mbcnt_lo_u32_b32 v2, s9, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_454 ; %bb.453: s_bcnt1_i32_b32 s9, s9 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s9 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_454: s_or_b32 exec_lo, exec_lo, s8 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_456 ; %bb.455: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s8, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s8, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_456: ; %Flow628 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s7, s7, s1 v_add_co_u32 v0, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_457: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_459 ; %bb.458: ; in Loop: Header=BB0_457 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_459: ; in Loop: Header=BB0_457 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_461 ; %bb.460: ; in Loop: Header=BB0_457 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_462 .LBB0_461: ; in Loop: Header=BB0_457 Depth=1 s_mov_b32 s1, -1 .LBB0_462: ; %Flow622 ; in Loop: Header=BB0_457 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_457 ; %bb.463: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_467 ; %bb.464: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_467 ; %bb.465: ; %.preheader.i.i.i103.preheader s_mov_b32 s0, 0 .LBB0_466: ; %.preheader.i.i.i103 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_466 .LBB0_467: ; %__ockl_printf_append_args.exit107 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10checkIndexv .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 256 .amdhsa_user_sgpr_count 13 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 1 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 2 .amdhsa_next_free_vgpr 33 .amdhsa_next_free_sgpr 26 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10checkIndexv, .Lfunc_end0-_Z10checkIndexv ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 21660 ; NumSgprs: 28 ; NumVgprs: 33 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 3 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 28 ; NumVGPRsForWavesPerEU: 33 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 13 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "threadIdx:(%d, %d, %d) blockIdx:(%d, %d, %d) blockDim:(%d, %d, %d) gridDim:(%d, %d, %d)\n" .size .str, 89 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: hidden_block_count_x - .offset: 4 .size: 4 .value_kind: hidden_block_count_y - .offset: 8 .size: 4 .value_kind: hidden_block_count_z - .offset: 12 .size: 2 .value_kind: hidden_group_size_x - .offset: 14 .size: 2 .value_kind: hidden_group_size_y - .offset: 16 .size: 2 .value_kind: hidden_group_size_z - .offset: 18 .size: 2 .value_kind: hidden_remainder_x - .offset: 20 .size: 2 .value_kind: hidden_remainder_y - .offset: 22 .size: 2 .value_kind: hidden_remainder_z - .offset: 40 .size: 8 .value_kind: hidden_global_offset_x - .offset: 48 .size: 8 .value_kind: hidden_global_offset_y - .offset: 56 .size: 8 .value_kind: hidden_global_offset_z - .offset: 64 .size: 2 .value_kind: hidden_grid_dims - .offset: 80 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 256 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10checkIndexv .private_segment_fixed_size: 0 .sgpr_count: 28 .sgpr_spill_count: 0 .symbol: _Z10checkIndexv.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 33 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
27046598eb91be204957eb373e650a319b5b434f
// filename: ax.cu // a simple CUDA kernel to add two vectors extern "C" // ensure function name to be exactly "ax" { __global__ void ax(const int lengthC, const double a, const double *b, double *c) { int i = threadIdx.x + blockIdx.x * blockDim.x; if (i<lengthC) { c[i] = a*b[i]; // REMEMBER ZERO INDEXING IN C LANGUAGE!! } } }
.file "tmpxft_002148ae_00000000-6_ax.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z26__device_stub__Z2axidPKdPdidPKdPd .type _Z26__device_stub__Z2axidPKdPdidPKdPd, @function _Z26__device_stub__Z2axidPKdPdidPKdPd: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movl %edi, 28(%rsp) leaq 48(%rsp), %rcx leaq 56(%rsp), %rdi movq %rsi, 8(%rsp) leaq 68(%rsp), %rsi movq %rdx, (%rsp) leaq 40(%rsp), %rdx movsd %xmm0, 16(%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 28(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq ax(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z26__device_stub__Z2axidPKdPdidPKdPd, .-_Z26__device_stub__Z2axidPKdPdidPKdPd .globl ax .type ax, @function ax: .LFB2033: .cfi_startproc endbr64 jmp _Z26__device_stub__Z2axidPKdPdidPKdPd .cfi_endproc .LFE2033: .size ax, .-ax .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "ax" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq ax(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : ax .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */ /* 0x000e280000002100 */ /*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0030*/ IMAD R6, R3, c[0x0][0x0], R6 ; /* 0x0000000003067a24 */ /* 0x001fca00078e0206 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x160], PT ; /* 0x0000580006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x8 ; /* 0x0000000800077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R2, R6, R7, c[0x0][0x170] ; /* 0x00005c0006027625 */ /* 0x000fcc00078e0207 */ /*0090*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e1b00 */ /*00a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x178] ; /* 0x00005e0006067625 */ /* 0x000fe200078e0207 */ /*00b0*/ DMUL R4, R2, c[0x0][0x168] ; /* 0x00005a0002047a28 */ /* 0x004e0e0000000000 */ /*00c0*/ STG.E.64 [R6.64], R4 ; /* 0x0000000406007986 */ /* 0x001fe2000c101b04 */ /*00d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> // filename: ax.cu // a simple CUDA kernel to add two vectors extern "C" // ensure function name to be exactly "ax" { __global__ void ax(const int lengthC, const double a, const double *b, double *c) { int i = threadIdx.x + blockIdx.x * blockDim.x; if (i<lengthC) { c[i] = a*b[i]; // REMEMBER ZERO INDEXING IN C LANGUAGE!! } } }
.text .file "ax.hip" .globl __device_stub__ax # -- Begin function __device_stub__ax .type __device_stub__ax,@function __device_stub__ax: # @__device_stub__ax .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 4(%rsp), %rax movl %edi, (%rax) leaq 40(%rsp), %rcx movsd %xmm0, (%rcx) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rdi, 16(%rbx) movq %rsi, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $ax, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size __device_stub__ax, .Lfunc_end0-__device_stub__ax .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $ax, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type ax,@object # @ax .section .rodata,"a",@progbits .globl ax .p2align 3, 0x0 ax: .quad __device_stub__ax .size ax, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "ax" .size .L__unnamed_1, 3 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __device_stub__ax .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym ax .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected ax ; -- Begin function ax .globl ax .p2align 8 .type ax,@function ax: ; @ax ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x8 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_load_b64 v[2:3], v[2:3], off s_waitcnt vmcnt(0) v_mul_f64 v[2:3], v[2:3], s[4:5] global_store_b64 v[0:1], v[2:3], off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel ax .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size ax, .Lfunc_end0-ax ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 164 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 8 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: ax .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: ax.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
ebd9f48f09486a3110104d77e0bc0fbd44a61888
#include "includes.h" __global__ void dot_cmp_kernaldm(const float* data1, const float* data2, const float* dm, float* device_soln, const int size, const int num_threads, const int offset) { float dot = 0.0f; float nnn = 0.0f; int idx = threadIdx.x + blockIdx.x*num_threads + offset; for(int i = 0; i < size; i++){ int index = i*size + idx % size + ((idx/size)*size*size); //for coalesing if(dm[index] > 0.5){ dot += data1[index]*data2[index]; nnn += 1.0f; } } device_soln[idx] = dot/nnn; }
.file "tmpxft_002b4fcb_00000000-6_dot_cmp_kernaldm.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z48__device_stub__Z16dot_cmp_kernaldmPKfS0_S0_PfiiiPKfS0_S0_Pfiii .type _Z48__device_stub__Z16dot_cmp_kernaldmPKfS0_S0_PfiiiPKfS0_S0_Pfiii, @function _Z48__device_stub__Z16dot_cmp_kernaldmPKfS0_S0_PfiiiPKfS0_S0_Pfiii: .LFB2032: .cfi_startproc endbr64 subq $184, %rsp .cfi_def_cfa_offset 192 movq %rdi, 40(%rsp) leaq 64(%rsp), %rdi movq %rsi, 32(%rsp) leaq 76(%rsp), %rsi movq %rdx, 24(%rsp) leaq 48(%rsp), %rdx movq %rcx, 16(%rsp) leaq 56(%rsp), %rcx movl %r8d, 12(%rsp) movl %r9d, 8(%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 72(%rsp) movq %rax, 112(%rsp) leaq 32(%rsp), %rax movq %rax, 120(%rsp) leaq 24(%rsp), %rax movq %rax, 128(%rsp) leaq 16(%rsp), %rax movq %rax, 136(%rsp) leaq 12(%rsp), %rax movq %rax, 144(%rsp) leaq 8(%rsp), %rax movq %rax, 152(%rsp) leaq 192(%rsp), %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 64(%rsp) movq %rax, 76(%rsp) movl $1, 84(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 56(%rsp) .cfi_def_cfa_offset 200 leaq _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii(%rip), %rdi pushq 56(%rsp) .cfi_def_cfa_offset 208 movq 92(%rsp), %rcx movl 100(%rsp), %r8d movq 80(%rsp), %rsi movl 88(%rsp), %edx leaq 128(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L2: movq 168(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z48__device_stub__Z16dot_cmp_kernaldmPKfS0_S0_PfiiiPKfS0_S0_Pfiii, .-_Z48__device_stub__Z16dot_cmp_kernaldmPKfS0_S0_PfiiiPKfS0_S0_Pfiii .globl _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .type _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii, @function _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii: .LFB2033: .cfi_startproc endbr64 jmp _Z48__device_stub__Z16dot_cmp_kernaldmPKfS0_S0_PfiiiPKfS0_S0_Pfiii .cfi_endproc .LFE2033: .size _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii, .-_Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z16dot_cmp_kernaldmPKfS0_S0_Pfiii" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R15, SR_CTAID.X ; /* 0x00000000000f7919 */ /* 0x000e220000002500 */ /*0020*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff047624 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0040*/ CS2R R12, SRZ ; /* 0x00000000000c7805 */ /* 0x000fe2000001ff00 */ /*0050*/ S2R R16, SR_TID.X ; /* 0x0000000000107919 */ /* 0x000e240000002100 */ /*0060*/ ISETP.GE.AND P0, PT, R4, 0x1, PT ; /* 0x000000010400780c */ /* 0x000fe20003f06270 */ /*0070*/ IMAD R14, R15, c[0x0][0x184], R16 ; /* 0x000061000f0e7a24 */ /* 0x001fca00078e0210 */ /*0080*/ IADD3 R14, R14, c[0x0][0x188], RZ ; /* 0x000062000e0e7a10 */ /* 0x000fce0007ffe0ff */ /*0090*/ @!P0 BRA 0x7e0 ; /* 0x0000074000008947 */ /* 0x000fea0003800000 */ /*00a0*/ IABS R6, c[0x0][0x180] ; /* 0x0000600000067a13 */ /* 0x000fe20000000000 */ /*00b0*/ CS2R R12, SRZ ; /* 0x00000000000c7805 */ /* 0x000fe2000001ff00 */ /*00c0*/ IABS R17, R14 ; /* 0x0000000e00117213 */ /* 0x000fe20000000000 */ /*00d0*/ IMAD.MOV.U32 R23, RZ, RZ, RZ ; /* 0x000000ffff177224 */ /* 0x000fe200078e00ff */ /*00e0*/ I2F.RP R0, R6 ; /* 0x0000000600007306 */ /* 0x000e220000209400 */ /*00f0*/ ISETP.GE.AND P2, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fe40003f46270 */ /*0100*/ ISETP.NE.AND P1, PT, RZ, c[0x0][0x180], PT ; /* 0x00006000ff007a0c */ /* 0x000fca0003f25270 */ /*0110*/ MUFU.RCP R0, R0 ; /* 0x0000000000007308 */ /* 0x001e240000001000 */ /*0120*/ IADD3 R2, R0, 0xffffffe, RZ ; /* 0x0ffffffe00027810 */ /* 0x001fe40007ffe0ff */ /*0130*/ LOP3.LUT R0, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304007812 */ /* 0x000fc800078ec0ff */ /*0140*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */ /* 0x000064000021f000 */ /*0150*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x001fe400078e00ff */ /*0160*/ IMAD.MOV R5, RZ, RZ, -R3 ; /* 0x000000ffff057224 */ /* 0x002fc800078e0a03 */ /*0170*/ IMAD R5, R5, R6, RZ ; /* 0x0000000605057224 */ /* 0x000fc800078e02ff */ /*0180*/ IMAD.HI.U32 R3, R3, R5, R2 ; /* 0x0000000503037227 */ /* 0x000fe200078e0002 */ /*0190*/ IADD3 R2, R4, -0x1, RZ ; /* 0xffffffff04027810 */ /* 0x000fc80007ffe0ff */ /*01a0*/ ISETP.GE.U32.AND P3, PT, R2, 0x3, PT ; /* 0x000000030200780c */ /* 0x000fe20003f66070 */ /*01b0*/ IMAD.HI.U32 R3, R3, R17, RZ ; /* 0x0000001103037227 */ /* 0x000fc800078e00ff */ /*01c0*/ IMAD.MOV R3, RZ, RZ, -R3 ; /* 0x000000ffff037224 */ /* 0x000fc800078e0a03 */ /*01d0*/ IMAD R17, R6, R3, R17 ; /* 0x0000000306117224 */ /* 0x000fca00078e0211 */ /*01e0*/ ISETP.GT.U32.AND P0, PT, R6, R17, PT ; /* 0x000000110600720c */ /* 0x000fda0003f04070 */ /*01f0*/ @!P0 IMAD.IADD R17, R17, 0x1, -R6 ; /* 0x0000000111118824 */ /* 0x000fca00078e0a06 */ /*0200*/ ISETP.GT.U32.AND P0, PT, R6, R17, PT ; /* 0x000000110600720c */ /* 0x000fda0003f04070 */ /*0210*/ @!P0 IMAD.IADD R17, R17, 0x1, -R6 ; /* 0x0000000111118824 */ /* 0x000fe200078e0a06 */ /*0220*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc60003f05270 */ /*0230*/ @!P2 IMAD.MOV R17, RZ, RZ, -R17 ; /* 0x000000ffff11a224 */ /* 0x000fe200078e0a11 */ /*0240*/ @!P1 LOP3.LUT R17, RZ, c[0x0][0x180], RZ, 0x33, !PT ; /* 0x00006000ff119a12 */ /* 0x000fe200078e33ff */ /*0250*/ @!P3 BRA 0x660 ; /* 0x000004000000b947 */ /* 0x000ff00003800000 */ /*0260*/ IADD3 R2, R16, c[0x0][0x188], RZ ; /* 0x0000620010027a10 */ /* 0x000fe20007ffe0ff */ /*0270*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e00ff */ /*0280*/ IADD3 R18, R0, -c[0x0][0x180], RZ ; /* 0x8000600000127a10 */ /* 0x000fe20007ffe0ff */ /*0290*/ IMAD.MOV.U32 R23, RZ, RZ, RZ ; /* 0x000000ffff177224 */ /* 0x000fe400078e00ff */ /*02a0*/ IMAD R2, R15, c[0x0][0x184], R2 ; /* 0x000061000f027a24 */ /* 0x000fca00078e0202 */ /*02b0*/ IADD3 R4, -R17.reuse, 0x3, R2.reuse ; /* 0x0000000311047810 */ /* 0x140fe40007ffe102 */ /*02c0*/ IADD3 R20, -R17.reuse, 0x2, R2.reuse ; /* 0x0000000211147810 */ /* 0x140fe40007ffe102 */ /*02d0*/ IADD3 R6, -R17, 0x1, R2 ; /* 0x0000000111067810 */ /* 0x000fe20007ffe102 */ /*02e0*/ IMAD.IADD R2, R2, 0x1, -R17.reuse ; /* 0x0000000102027824 */ /* 0x100fe400078e0a11 */ /*02f0*/ IMAD R19, R4, c[0x0][0x180], R17.reuse ; /* 0x0000600004137a24 */ /* 0x100fe400078e0211 */ /*0300*/ IMAD R20, R20, c[0x0][0x180], R17.reuse ; /* 0x0000600014147a24 */ /* 0x100fe400078e0211 */ /*0310*/ IMAD R21, R6, c[0x0][0x180], R17 ; /* 0x0000600006157a24 */ /* 0x000fc400078e0211 */ /*0320*/ IMAD R25, R2, c[0x0][0x180], R17 ; /* 0x0000600002197a24 */ /* 0x000fe400078e0211 */ /*0330*/ IMAD.MOV.U32 R24, RZ, RZ, 0x4 ; /* 0x00000004ff187424 */ /* 0x000fc800078e00ff */ /*0340*/ IMAD.WIDE R6, R25, R24, c[0x0][0x170] ; /* 0x00005c0019067625 */ /* 0x000fca00078e0218 */ /*0350*/ LDG.E R11, [R6.64] ; /* 0x00000004060b7981 */ /* 0x000ea2000c1e1900 */ /*0360*/ IMAD.MOV.U32 R22, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff167624 */ /* 0x000fc800078e00ff */ /*0370*/ IMAD.WIDE R8, R22, 0x4, R6 ; /* 0x0000000416087825 */ /* 0x000fcc00078e0206 */ /*0380*/ IMAD.WIDE R2, R22.reuse, 0x4, R8 ; /* 0x0000000416027825 */ /* 0x040fe400078e0208 */ /*0390*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee8000c1e1900 */ /*03a0*/ LDG.E R10, [R2.64] ; /* 0x00000004020a7981 */ /* 0x000f22000c1e1900 */ /*03b0*/ IMAD.WIDE R4, R22, 0x4, R2 ; /* 0x0000000416047825 */ /* 0x000fcc00078e0202 */ /*03c0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000f62000c1e1900 */ /*03d0*/ SHF.R.S32.HI R26, RZ, 0x1f, R25 ; /* 0x0000001fff1a7819 */ /* 0x000fe40000011419 */ /*03e0*/ FSETP.GT.AND P4, PT, R11, 0.5, PT ; /* 0x3f0000000b00780b */ /* 0x004fda0003f84000 */ /*03f0*/ @P4 IMAD.SHL.U32 R11, R25.reuse, 0x4, RZ ; /* 0x00000004190b4824 */ /* 0x040fe200078e00ff */ /*0400*/ @P4 SHF.L.U64.HI R6, R25, 0x2, R26 ; /* 0x0000000219064819 */ /* 0x000fe4000001021a */ /*0410*/ FSETP.GT.AND P3, PT, R8, 0.5, PT ; /* 0x3f0000000800780b */ /* 0x008fe40003f64000 */ /*0420*/ FSETP.GT.AND P2, PT, R10, 0.5, PT ; /* 0x3f0000000a00780b */ /* 0x010fe40003f44000 */ /*0430*/ @P4 IADD3 R28, P1, R11.reuse, c[0x0][0x168], RZ ; /* 0x00005a000b1c4a10 */ /* 0x040fe40007f3e0ff */ /*0440*/ @P4 IADD3 R10, P5, R11, c[0x0][0x160], RZ ; /* 0x000058000b0a4a10 */ /* 0x000fe40007fbe0ff */ /*0450*/ @P4 IADD3.X R29, R6, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b00061d4a10 */ /* 0x000fc40000ffe4ff */ /*0460*/ @P4 IADD3.X R11, R6, c[0x0][0x164], RZ, P5, !PT ; /* 0x00005900060b4a10 */ /* 0x000fe40002ffe4ff */ /*0470*/ FSETP.GT.AND P1, PT, R4, 0.5, PT ; /* 0x3f0000000400780b */ /* 0x020fe20003f24000 */ /*0480*/ @P4 LDG.E R30, [R28.64] ; /* 0x000000041c1e4981 */ /* 0x0000a2000c1e1900 */ /*0490*/ @P3 IMAD.WIDE R2, R21, R24, c[0x0][0x160] ; /* 0x0000580015023625 */ /* 0x000fc600078e0218 */ /*04a0*/ @P4 LDG.E R10, [R10.64] ; /* 0x000000040a0a4981 */ /* 0x000ea2000c1e1900 */ /*04b0*/ @P3 IMAD.WIDE R4, R21, R24, c[0x0][0x168] ; /* 0x00005a0015043625 */ /* 0x000fc600078e0218 */ /*04c0*/ @P3 LDG.E R2, [R2.64] ; /* 0x0000000402023981 */ /* 0x000ee2000c1e1900 */ /*04d0*/ @P2 IMAD.WIDE R6, R20, R24, c[0x0][0x160] ; /* 0x0000580014062625 */ /* 0x000fc600078e0218 */ /*04e0*/ @P3 LDG.E R4, [R4.64] ; /* 0x0000000404043981 */ /* 0x000ee2000c1e1900 */ /*04f0*/ @P2 IMAD.WIDE R8, R20, R24, c[0x0][0x168] ; /* 0x00005a0014082625 */ /* 0x000fc600078e0218 */ /*0500*/ @P2 LDG.E R6, [R6.64] ; /* 0x0000000406062981 */ /* 0x000f22000c1e1900 */ /*0510*/ @P1 IMAD.WIDE R26, R19, R24, c[0x0][0x160] ; /* 0x00005800131a1625 */ /* 0x000fc600078e0218 */ /*0520*/ @P2 LDG.E R8, [R8.64] ; /* 0x0000000408082981 */ /* 0x000f22000c1e1900 */ /*0530*/ @P1 IMAD.WIDE R28, R19, R24, c[0x0][0x168] ; /* 0x00005a00131c1625 */ /* 0x001fc600078e0218 */ /*0540*/ @P1 LDG.E R26, [R26.64] ; /* 0x000000041a1a1981 */ /* 0x000f68000c1e1900 */ /*0550*/ @P1 LDG.E R28, [R28.64] ; /* 0x000000041c1c1981 */ /* 0x000f62000c1e1900 */ /*0560*/ IADD3 R23, R23, 0x4, RZ ; /* 0x0000000417177810 */ /* 0x000fe20007ffe0ff */ /*0570*/ @P4 FADD R12, R12, 1 ; /* 0x3f8000000c0c4421 */ /* 0x000fc80000000000 */ /*0580*/ @P3 FADD R12, R12, 1 ; /* 0x3f8000000c0c3421 */ /* 0x000fc80000000000 */ /*0590*/ @P2 FADD R12, R12, 1 ; /* 0x3f8000000c0c2421 */ /* 0x000fe20000000000 */ /*05a0*/ IMAD R25, R22.reuse, 0x4, R25 ; /* 0x0000000416197824 */ /* 0x040fe400078e0219 */ /*05b0*/ IMAD R21, R22, 0x4, R21 ; /* 0x0000000416157824 */ /* 0x000fe200078e0215 */ /*05c0*/ @P1 FADD R12, R12, 1 ; /* 0x3f8000000c0c1421 */ /* 0x000fe20000000000 */ /*05d0*/ IMAD R20, R22.reuse, 0x4, R20 ; /* 0x0000000416147824 */ /* 0x040fe400078e0214 */ /*05e0*/ IMAD R19, R22, 0x4, R19 ; /* 0x0000000416137824 */ /* 0x000fe200078e0213 */ /*05f0*/ @P4 FFMA R13, R30, R10, R13 ; /* 0x0000000a1e0d4223 */ /* 0x004fe2000000000d */ /*0600*/ IMAD.IADD R10, R18, 0x1, R23 ; /* 0x00000001120a7824 */ /* 0x000fca00078e0217 */ /*0610*/ ISETP.NE.AND P4, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fe20003f85270 */ /*0620*/ @P3 FFMA R13, R4, R2, R13 ; /* 0x00000002040d3223 */ /* 0x008fc8000000000d */ /*0630*/ @P2 FFMA R13, R8, R6, R13 ; /* 0x00000006080d2223 */ /* 0x010fc8000000000d */ /*0640*/ @P1 FFMA R13, R28, R26, R13 ; /* 0x0000001a1c0d1223 */ /* 0x020fc8000000000d */ /*0650*/ @P4 BRA 0x330 ; /* 0xfffffcd000004947 */ /* 0x000fea000383ffff */ /*0660*/ @!P0 BRA 0x7e0 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*0670*/ IADD3 R16, R16, c[0x0][0x188], R23 ; /* 0x0000620010107a10 */ /* 0x000fca0007ffe017 */ /*0680*/ IMAD R16, R15, c[0x0][0x184], R16 ; /* 0x000061000f107a24 */ /* 0x000fc800078e0210 */ /*0690*/ IMAD.IADD R16, R16, 0x1, -R17 ; /* 0x0000000110107824 */ /* 0x000fc800078e0a11 */ /*06a0*/ IMAD R16, R16, c[0x0][0x180], R17 ; /* 0x0000600010107a24 */ /* 0x000fe400078e0211 */ /*06b0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc800078e00ff */ /*06c0*/ IMAD.WIDE R2, R16, R3, c[0x0][0x170] ; /* 0x00005c0010027625 */ /* 0x000fcc00078e0203 */ /*06d0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e1900 */ /*06e0*/ SHF.R.S32.HI R7, RZ, 0x1f, R16 ; /* 0x0000001fff077819 */ /* 0x000fe40000011410 */ /*06f0*/ FSETP.GT.AND P0, PT, R2, 0.5, PT ; /* 0x3f0000000200780b */ /* 0x004fda0003f04000 */ /*0700*/ @P0 IMAD.SHL.U32 R6, R16.reuse, 0x4, RZ ; /* 0x0000000410060824 */ /* 0x040fe200078e00ff */ /*0710*/ @P0 SHF.L.U64.HI R7, R16, 0x2, R7 ; /* 0x0000000210070819 */ /* 0x000fc80000010207 */ /*0720*/ @P0 IADD3 R4, P2, R6.reuse, c[0x0][0x168], RZ ; /* 0x00005a0006040a10 */ /* 0x040fe40007f5e0ff */ /*0730*/ @P0 IADD3 R6, P1, R6, c[0x0][0x160], RZ ; /* 0x0000580006060a10 */ /* 0x000fe40007f3e0ff */ /*0740*/ @P0 IADD3.X R5, R7.reuse, c[0x0][0x16c], RZ, P2, !PT ; /* 0x00005b0007050a10 */ /* 0x040fe400017fe4ff */ /*0750*/ @P0 IADD3.X R7, R7, c[0x0][0x164], RZ, P1, !PT ; /* 0x0000590007070a10 */ /* 0x000fc60000ffe4ff */ /*0760*/ @P0 LDG.E R4, [R4.64] ; /* 0x0000000404040981 */ /* 0x000ea8000c1e1900 */ /*0770*/ @P0 LDG.E R6, [R6.64] ; /* 0x0000000406060981 */ /* 0x000ea2000c1e1900 */ /*0780*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */ /* 0x000fe20007ffe0ff */ /*0790*/ @P0 FADD R12, R12, 1 ; /* 0x3f8000000c0c0421 */ /* 0x000fe20000000000 */ /*07a0*/ IADD3 R16, R16, c[0x0][0x180], RZ ; /* 0x0000600010107a10 */ /* 0x000fe40007ffe0ff */ /*07b0*/ ISETP.NE.AND P1, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fe20003f25270 */ /*07c0*/ @P0 FFMA R13, R4, R6, R13 ; /* 0x00000006040d0223 */ /* 0x004fd8000000000d */ /*07d0*/ @P1 BRA 0x6b0 ; /* 0xfffffed000001947 */ /* 0x000fea000383ffff */ /*07e0*/ MUFU.RCP R3, R12 ; /* 0x0000000c00037308 */ /* 0x000e220000001000 */ /*07f0*/ IMAD.MOV.U32 R15, RZ, RZ, 0x4 ; /* 0x00000004ff0f7424 */ /* 0x000fe200078e00ff */ /*0800*/ BSSY B0, 0x8f0 ; /* 0x000000e000007945 */ /* 0x000fe60003800000 */ /*0810*/ IMAD.WIDE R14, R14, R15, c[0x0][0x178] ; /* 0x00005e000e0e7625 */ /* 0x000fc600078e020f */ /*0820*/ FCHK P0, R13, R12 ; /* 0x0000000c0d007302 */ /* 0x000e620000000000 */ /*0830*/ FFMA R0, R3, -R12, 1 ; /* 0x3f80000003007423 */ /* 0x001fc8000000080c */ /*0840*/ FFMA R0, R3, R0, R3 ; /* 0x0000000003007223 */ /* 0x000fc80000000003 */ /*0850*/ FFMA R3, R0, R13, RZ ; /* 0x0000000d00037223 */ /* 0x000fc800000000ff */ /*0860*/ FFMA R2, R3, -R12, R13 ; /* 0x8000000c03027223 */ /* 0x000fc8000000000d */ /*0870*/ FFMA R3, R0, R2, R3 ; /* 0x0000000200037223 */ /* 0x000fe20000000003 */ /*0880*/ @!P0 BRA 0x8e0 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*0890*/ IMAD.MOV.U32 R0, RZ, RZ, R13 ; /* 0x000000ffff007224 */ /* 0x000fe200078e000d */ /*08a0*/ MOV R2, 0x8d0 ; /* 0x000008d000027802 */ /* 0x000fe20000000f00 */ /*08b0*/ IMAD.MOV.U32 R3, RZ, RZ, R12 ; /* 0x000000ffff037224 */ /* 0x000fe400078e000c */ /*08c0*/ CALL.REL.NOINC 0x910 ; /* 0x0000004000007944 */ /* 0x000fea0003c00000 */ /*08d0*/ IMAD.MOV.U32 R3, RZ, RZ, R5 ; /* 0x000000ffff037224 */ /* 0x001fe400078e0005 */ /*08e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*08f0*/ STG.E [R14.64], R3 ; /* 0x000000030e007986 */ /* 0x000fe2000c101904 */ /*0900*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0910*/ SHF.R.U32.HI R5, RZ, 0x17, R3 ; /* 0x00000017ff057819 */ /* 0x000fe20000011603 */ /*0920*/ BSSY B1, 0xf50 ; /* 0x0000062000017945 */ /* 0x000fe20003800000 */ /*0930*/ SHF.R.U32.HI R4, RZ, 0x17, R0 ; /* 0x00000017ff047819 */ /* 0x000fe40000011600 */ /*0940*/ LOP3.LUT R10, R5, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff050a7812 */ /* 0x000fe400078ec0ff */ /*0950*/ LOP3.LUT R8, R4, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff04087812 */ /* 0x000fc400078ec0ff */ /*0960*/ IADD3 R6, R10, -0x1, RZ ; /* 0xffffffff0a067810 */ /* 0x000fe40007ffe0ff */ /*0970*/ IADD3 R5, R8, -0x1, RZ ; /* 0xffffffff08057810 */ /* 0x000fe40007ffe0ff */ /*0980*/ ISETP.GT.U32.AND P0, PT, R6, 0xfd, PT ; /* 0x000000fd0600780c */ /* 0x000fc80003f04070 */ /*0990*/ ISETP.GT.U32.OR P0, PT, R5, 0xfd, P0 ; /* 0x000000fd0500780c */ /* 0x000fda0000704470 */ /*09a0*/ @!P0 IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff048224 */ /* 0x000fe200078e00ff */ /*09b0*/ @!P0 BRA 0xb30 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*09c0*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fe40003f1c200 */ /*09d0*/ FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fc80003f3c200 */ /*09e0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*09f0*/ @P0 BRA 0xf30 ; /* 0x0000053000000947 */ /* 0x000fea0003800000 */ /*0a00*/ LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fda000780c800 */ /*0a10*/ @!P0 BRA 0xf10 ; /* 0x000004f000008947 */ /* 0x000fea0003800000 */ /*0a20*/ FSETP.NEU.FTZ.AND P0, PT, |R0|.reuse, +INF , PT ; /* 0x7f8000000000780b */ /* 0x040fe40003f1d200 */ /*0a30*/ FSETP.NEU.FTZ.AND P2, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f5d200 */ /*0a40*/ FSETP.NEU.FTZ.AND P1, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fd60003f3d200 */ /*0a50*/ @!P2 BRA !P0, 0xf10 ; /* 0x000004b00000a947 */ /* 0x000fea0004000000 */ /*0a60*/ LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff00ff7812 */ /* 0x000fc8000780c0ff */ /*0a70*/ PLOP3.LUT P0, PT, P2, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0001700572 */ /*0a80*/ @P0 BRA 0xef0 ; /* 0x0000046000000947 */ /* 0x000fea0003800000 */ /*0a90*/ LOP3.LUT P0, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fc8000780c0ff */ /*0aa0*/ PLOP3.LUT P0, PT, P1, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f00572 */ /*0ab0*/ @P0 BRA 0xec0 ; /* 0x0000040000000947 */ /* 0x000fea0003800000 */ /*0ac0*/ ISETP.GE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fe40003f06270 */ /*0ad0*/ ISETP.GE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fd60003f26270 */ /*0ae0*/ @P0 IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff040224 */ /* 0x000fe200078e00ff */ /*0af0*/ @!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000008823 */ /* 0x000fe200000000ff */ /*0b00*/ @!P0 IMAD.MOV.U32 R4, RZ, RZ, -0x40 ; /* 0xffffffc0ff048424 */ /* 0x000fe200078e00ff */ /*0b10*/ @!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003039823 */ /* 0x000fc800000000ff */ /*0b20*/ @!P1 IADD3 R4, R4, 0x40, RZ ; /* 0x0000004004049810 */ /* 0x000fe40007ffe0ff */ /*0b30*/ LEA R6, R10, 0xc0800000, 0x17 ; /* 0xc08000000a067811 */ /* 0x000fe200078eb8ff */ /*0b40*/ BSSY B2, 0xeb0 ; /* 0x0000036000027945 */ /* 0x000fe80003800000 */ /*0b50*/ IMAD.IADD R6, R3, 0x1, -R6 ; /* 0x0000000103067824 */ /* 0x000fe200078e0a06 */ /*0b60*/ IADD3 R3, R8, -0x7f, RZ ; /* 0xffffff8108037810 */ /* 0x000fc60007ffe0ff */ /*0b70*/ MUFU.RCP R5, R6 ; /* 0x0000000600057308 */ /* 0x000e220000001000 */ /*0b80*/ FADD.FTZ R7, -R6, -RZ ; /* 0x800000ff06077221 */ /* 0x000fe20000010100 */ /*0b90*/ IMAD R0, R3.reuse, -0x800000, R0 ; /* 0xff80000003007824 */ /* 0x040fe200078e0200 */ /*0ba0*/ IADD3 R3, R3, 0x7f, -R10 ; /* 0x0000007f03037810 */ /* 0x000fca0007ffe80a */ /*0bb0*/ IMAD.IADD R3, R3, 0x1, R4 ; /* 0x0000000103037824 */ /* 0x000fe200078e0204 */ /*0bc0*/ FFMA R8, R5, R7, 1 ; /* 0x3f80000005087423 */ /* 0x001fc80000000007 */ /*0bd0*/ FFMA R12, R5, R8, R5 ; /* 0x00000008050c7223 */ /* 0x000fc80000000005 */ /*0be0*/ FFMA R5, R0, R12, RZ ; /* 0x0000000c00057223 */ /* 0x000fc800000000ff */ /*0bf0*/ FFMA R8, R7, R5, R0 ; /* 0x0000000507087223 */ /* 0x000fc80000000000 */ /*0c00*/ FFMA R9, R12, R8, R5 ; /* 0x000000080c097223 */ /* 0x000fc80000000005 */ /*0c10*/ FFMA R8, R7, R9, R0 ; /* 0x0000000907087223 */ /* 0x000fc80000000000 */ /*0c20*/ FFMA R5, R12, R8, R9 ; /* 0x000000080c057223 */ /* 0x000fca0000000009 */ /*0c30*/ SHF.R.U32.HI R0, RZ, 0x17, R5 ; /* 0x00000017ff007819 */ /* 0x000fc80000011605 */ /*0c40*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fca00078ec0ff */ /*0c50*/ IMAD.IADD R6, R0, 0x1, R3 ; /* 0x0000000100067824 */ /* 0x000fca00078e0203 */ /*0c60*/ IADD3 R0, R6, -0x1, RZ ; /* 0xffffffff06007810 */ /* 0x000fc80007ffe0ff */ /*0c70*/ ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ; /* 0x000000fe0000780c */ /* 0x000fda0003f06070 */ /*0c80*/ @!P0 BRA 0xe90 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*0c90*/ ISETP.GT.AND P0, PT, R6, 0xfe, PT ; /* 0x000000fe0600780c */ /* 0x000fda0003f04270 */ /*0ca0*/ @P0 BRA 0xe60 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*0cb0*/ ISETP.GE.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */ /* 0x000fda0003f06270 */ /*0cc0*/ @P0 BRA 0xea0 ; /* 0x000001d000000947 */ /* 0x000fea0003800000 */ /*0cd0*/ ISETP.GE.AND P0, PT, R6, -0x18, PT ; /* 0xffffffe80600780c */ /* 0x000fe40003f06270 */ /*0ce0*/ LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005057812 */ /* 0x000fd600078ec0ff */ /*0cf0*/ @!P0 BRA 0xea0 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*0d00*/ FFMA.RZ R0, R12, R8.reuse, R9.reuse ; /* 0x000000080c007223 */ /* 0x180fe2000000c009 */ /*0d10*/ IADD3 R7, R6, 0x20, RZ ; /* 0x0000002006077810 */ /* 0x000fe20007ffe0ff */ /*0d20*/ FFMA.RM R3, R12, R8.reuse, R9.reuse ; /* 0x000000080c037223 */ /* 0x180fe20000004009 */ /*0d30*/ ISETP.NE.AND P2, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f45270 */ /*0d40*/ LOP3.LUT R4, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00047812 */ /* 0x000fe200078ec0ff */ /*0d50*/ FFMA.RP R0, R12, R8, R9 ; /* 0x000000080c007223 */ /* 0x000fe20000008009 */ /*0d60*/ ISETP.NE.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe20003f25270 */ /*0d70*/ IMAD.MOV R6, RZ, RZ, -R6 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0a06 */ /*0d80*/ LOP3.LUT R4, R4, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000004047812 */ /* 0x000fe400078efcff */ /*0d90*/ FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ; /* 0x000000030000720b */ /* 0x000fc40003f1d000 */ /*0da0*/ SHF.L.U32 R7, R4, R7, RZ ; /* 0x0000000704077219 */ /* 0x000fe400000006ff */ /*0db0*/ SEL R3, R6, RZ, P2 ; /* 0x000000ff06037207 */ /* 0x000fe40001000000 */ /*0dc0*/ ISETP.NE.AND P1, PT, R7, RZ, P1 ; /* 0x000000ff0700720c */ /* 0x000fe40000f25270 */ /*0dd0*/ SHF.R.U32.HI R3, RZ, R3, R4 ; /* 0x00000003ff037219 */ /* 0x000fe40000011604 */ /*0de0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40000703570 */ /*0df0*/ SHF.R.U32.HI R7, RZ, 0x1, R3 ; /* 0x00000001ff077819 */ /* 0x000fc40000011603 */ /*0e00*/ SEL R0, RZ, 0x1, !P0 ; /* 0x00000001ff007807 */ /* 0x000fc80004000000 */ /*0e10*/ LOP3.LUT R0, R0, 0x1, R7, 0xf8, !PT ; /* 0x0000000100007812 */ /* 0x000fc800078ef807 */ /*0e20*/ LOP3.LUT R0, R0, R3, RZ, 0xc0, !PT ; /* 0x0000000300007212 */ /* 0x000fca00078ec0ff */ /*0e30*/ IMAD.IADD R0, R7, 0x1, R0 ; /* 0x0000000107007824 */ /* 0x000fca00078e0200 */ /*0e40*/ LOP3.LUT R5, R0, R5, RZ, 0xfc, !PT ; /* 0x0000000500057212 */ /* 0x000fe200078efcff */ /*0e50*/ BRA 0xea0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*0e60*/ LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005057812 */ /* 0x000fc800078ec0ff */ /*0e70*/ LOP3.LUT R5, R5, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000005057812 */ /* 0x000fe200078efcff */ /*0e80*/ BRA 0xea0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0e90*/ IMAD R5, R3, 0x800000, R5 ; /* 0x0080000003057824 */ /* 0x000fe400078e0205 */ /*0ea0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0eb0*/ BRA 0xf40 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*0ec0*/ LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ; /* 0x8000000003007812 */ /* 0x000fc800078e4800 */ /*0ed0*/ LOP3.LUT R5, R0, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000000057812 */ /* 0x000fe200078efcff */ /*0ee0*/ BRA 0xf40 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0ef0*/ LOP3.LUT R5, R3, 0x80000000, R0, 0x48, !PT ; /* 0x8000000003057812 */ /* 0x000fe200078e4800 */ /*0f00*/ BRA 0xf40 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*0f10*/ MUFU.RSQ R5, -QNAN ; /* 0xffc0000000057908 */ /* 0x000e220000001400 */ /*0f20*/ BRA 0xf40 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0f30*/ FADD.FTZ R5, R0, R3 ; /* 0x0000000300057221 */ /* 0x000fe40000010000 */ /*0f40*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0f50*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fc800078e00ff */ /*0f60*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff09002007950 */ /* 0x000fea0003c3ffff */ /*0f70*/ BRA 0xf70; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0f80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fe0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ff0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void dot_cmp_kernaldm(const float* data1, const float* data2, const float* dm, float* device_soln, const int size, const int num_threads, const int offset) { float dot = 0.0f; float nnn = 0.0f; int idx = threadIdx.x + blockIdx.x*num_threads + offset; for(int i = 0; i < size; i++){ int index = i*size + idx % size + ((idx/size)*size*size); //for coalesing if(dm[index] > 0.5){ dot += data1[index]*data2[index]; nnn += 1.0f; } } device_soln[idx] = dot/nnn; }
.text .file "dot_cmp_kernaldm.hip" .globl _Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii # -- Begin function _Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii .type _Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii,@function _Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii: # @_Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $160, %rsp .cfi_def_cfa_offset 208 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 12(%rsp), %rcx movl %r8d, (%rcx) leaq 8(%rsp), %r8 movl %r9d, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 208(%rsp), %rax movq %rax, 48(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z16dot_cmp_kernaldmPKfS0_S0_Pfiii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $176, %rsp .cfi_adjust_cfa_offset -176 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii, .Lfunc_end0-_Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z16dot_cmp_kernaldmPKfS0_S0_Pfiii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii,@object # @_Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .section .rodata,"a",@progbits .globl _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .p2align 3, 0x0 _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii: .quad _Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii .size _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z16dot_cmp_kernaldmPKfS0_S0_Pfiii" .size .L__unnamed_1, 35 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z31__device_stub__dot_cmp_kernaldmPKfS0_S0_Pfiii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii ; -- Begin function _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .globl _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .p2align 8 .type _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii,@function _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii: ; @_Z16dot_cmp_kernaldmPKfS0_S0_Pfiii ; %bb.0: s_clause 0x1 s_load_b128 s[8:11], s[0:1], 0x20 s_load_b256 s[0:7], s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_mul_i32 s15, s15, s9 s_cmp_lt_i32 s8, 1 v_add3_u32 v1, s10, s15, v0 s_delay_alu instid0(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 s_cbranch_scc1 .LBB0_6 ; %bb.1: ; %.lr.ph s_ashr_i32 s9, s8, 31 s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v5, v1, v2 s_add_i32 s11, s8, s9 v_add_nc_u32_e32 v0, v0, v2 s_xor_b32 s9, s11, s9 v_mov_b32_e32 v6, 0 v_cvt_f32_u32_e32 v3, s9 s_sub_i32 s11, 0, s9 v_xor_b32_e32 v5, v5, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v3, v3 s_waitcnt_depctr 0xfff v_mul_f32_e32 v3, 0x4f7ffffe, v3 v_cvt_u32_f32_e32 v3, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v4, s11, v3 v_mul_hi_u32 v4, v3, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v3, v3, v4 v_mul_hi_u32 v3, v5, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v3, v3, s9 v_sub_nc_u32_e32 v3, v5, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_subrev_nc_u32_e32 v4, s9, v3 v_cmp_le_u32_e32 vcc_lo, s9, v3 v_cndmask_b32_e32 v3, v3, v4, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_subrev_nc_u32_e32 v4, s9, v3 v_cmp_le_u32_e32 vcc_lo, s9, v3 s_mov_b32 s9, s8 v_cndmask_b32_e32 v3, v3, v4, vcc_lo v_add3_u32 v4, s15, s10, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_xor_b32_e32 v0, v3, v2 v_sub_nc_u32_e32 v5, v4, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[3:4], null, s8, v5, v[0:1] v_mov_b32_e32 v0, 0 v_sub_nc_u32_e32 v3, v3, v2 .LBB0_2: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 s_mov_b32 s10, exec_lo v_lshlrev_b64 v[4:5], 2, v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, s4, v4 v_add_co_ci_u32_e32 v8, vcc_lo, s5, v5, vcc_lo global_load_b32 v7, v[7:8], off s_waitcnt vmcnt(0) v_cmpx_lt_f32_e32 0.5, v7 s_cbranch_execz .LBB0_4 ; %bb.3: ; in Loop: Header=BB0_2 Depth=1 v_add_co_u32 v7, vcc_lo, s0, v4 v_add_co_ci_u32_e32 v8, vcc_lo, s1, v5, vcc_lo v_add_co_u32 v4, vcc_lo, s2, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo v_add_f32_e32 v6, 1.0, v6 global_load_b32 v7, v[7:8], off global_load_b32 v4, v[4:5], off s_waitcnt vmcnt(0) v_fmac_f32_e32 v0, v7, v4 .LBB0_4: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s10 v_add_nc_u32_e32 v3, s8, v3 s_add_i32 s9, s9, -1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s9, 0 s_cbranch_scc0 .LBB0_2 ; %bb.5: ; %._crit_edge.loopexit v_div_scale_f32 v3, null, v6, v6, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v4, v3 s_waitcnt_depctr 0xfff v_fma_f32 v5, -v3, v4, 1.0 v_fmac_f32_e32 v4, v5, v4 v_div_scale_f32 v5, vcc_lo, v0, v6, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v7, v5, v4 v_fma_f32 v8, -v3, v7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v7, v8, v4 v_fma_f32 v3, -v3, v7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v3, v3, v4, v7 v_div_fixup_f32 v0, v3, v6, v0 s_branch .LBB0_7 .LBB0_6: v_mov_b32_e32 v0, 0x7fc00000 .LBB0_7: ; %Flow s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[1:2], 2, v[1:2] v_add_co_u32 v1, vcc_lo, s6, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo global_store_b32 v[1:2], v0, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 44 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii, .Lfunc_end0-_Z16dot_cmp_kernaldmPKfS0_S0_Pfiii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 528 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .offset: 32 .size: 4 .value_kind: by_value - .offset: 36 .size: 4 .value_kind: by_value - .offset: 40 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 44 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z16dot_cmp_kernaldmPKfS0_S0_Pfiii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 9 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
1ec2b11a6ff2906090c751f01a2018a5a6baa618
/****************************************************************************** *cr *cr (C) Copyright 2010 The Board of Trustees of the *cr University of Illinois *cr All Rights Reserved *cr ******************************************************************************/ #define BLOCK_SIZE 512 __global__ void reduction(float *out, float *in, unsigned size) { /******************************************************************** Load a segment of the input vector into shared memory Traverse the reduction tree Write the computed sum to the output vector at the correct index ********************************************************************/ __shared__ float partialSum[2*BLOCK_SIZE]; unsigned int t = threadIdx.x; unsigned int start = 2*blockIdx.x*blockDim.x; partialSum[t] = in[start + t]; partialSum[blockDim.x + t] = in[start + blockDim.x + t]; for (unsigned int stride = BLOCK_SIZE; stride >= 1; stride /= 2) { __syncthreads(); if (t < stride && t + start + stride < size) partialSum[t]+=partialSum[t+stride]; } if (t == 0) out[blockIdx.x] = partialSum[0]; } // INSERT KERNEL CODE HERE
.file "tmpxft_002a22a4_00000000-6_kernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z31__device_stub__Z9reductionPfS_jPfS_j .type _Z31__device_stub__Z9reductionPfS_jPfS_j, @function _Z31__device_stub__Z9reductionPfS_jPfS_j: .LFB2032: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movl %edx, 12(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 12(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z9reductionPfS_j(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z31__device_stub__Z9reductionPfS_jPfS_j, .-_Z31__device_stub__Z9reductionPfS_jPfS_j .globl _Z9reductionPfS_j .type _Z9reductionPfS_j, @function _Z9reductionPfS_j: .LFB2033: .cfi_startproc endbr64 jmp _Z31__device_stub__Z9reductionPfS_jPfS_j .cfi_endproc .LFE2033: .size _Z9reductionPfS_j, .-_Z9reductionPfS_j .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z9reductionPfS_j" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z9reductionPfS_j(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z9reductionPfS_j .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */ /* 0x000e620000002100 */ /*0040*/ IMAD.SHL.U32 R3, R0, 0x2, RZ ; /* 0x0000000200037824 */ /* 0x001fc800078e00ff */ /*0050*/ IMAD R4, R3, c[0x0][0x0], R2 ; /* 0x0000000003047a24 */ /* 0x002fe400078e0202 */ /*0060*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc600078e00ff */ /*0070*/ IADD3 R8, R4.reuse, c[0x0][0x0], RZ ; /* 0x0000000004087a10 */ /* 0x040fe20007ffe0ff */ /*0080*/ IMAD.WIDE.U32 R6, R4, R3, c[0x0][0x168] ; /* 0x00005a0004067625 */ /* 0x000fc800078e0003 */ /*0090*/ IMAD.WIDE.U32 R8, R8, R3, c[0x0][0x168] ; /* 0x00005a0008087625 */ /* 0x000fe400078e0003 */ /*00a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x0000a8000c1e1900 */ /*00b0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee2000c1e1900 */ /*00c0*/ IADD3 R5, R4, 0x200, RZ ; /* 0x0000020004057810 */ /* 0x000fe20007ffe0ff */ /*00d0*/ IMAD.SHL.U32 R10, R2, 0x4, RZ ; /* 0x00000004020a7824 */ /* 0x000fc600078e00ff */ /*00e0*/ ISETP.GE.U32.AND P0, PT, R5, c[0x0][0x170], PT ; /* 0x00005c0005007a0c */ /* 0x000fe20003f06070 */ /*00f0*/ IMAD R5, R3, c[0x0][0x0], R10 ; /* 0x0000000003057a24 */ /* 0x000fe200078e020a */ /*0100*/ IADD3 R6, R4, 0x100, RZ ; /* 0x0000010004067810 */ /* 0x001fe40007ffe0ff */ /*0110*/ ISETP.GT.U32.OR P0, PT, R2, 0x1ff, P0 ; /* 0x000001ff0200780c */ /* 0x000fe40000704470 */ /*0120*/ ISETP.GE.U32.AND P1, PT, R6, c[0x0][0x170], PT ; /* 0x00005c0006007a0c */ /* 0x000fc80003f26070 */ /*0130*/ ISETP.GT.U32.OR P1, PT, R2, 0xff, P1 ; /* 0x000000ff0200780c */ /* 0x000fe20000f24470 */ /*0140*/ STS [R2.X4], R7 ; /* 0x0000000702007388 */ /* 0x0041e80000004800 */ /*0150*/ STS [R5], R8 ; /* 0x0000000805007388 */ /* 0x0083e80000000800 */ /*0160*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0170*/ IADD3 R7, R4, 0x80, RZ ; /* 0x0000008004077810 */ /* 0x001fc40007ffe0ff */ /*0180*/ IADD3 R8, R4, 0x40, RZ ; /* 0x0000004004087810 */ /* 0x002fc60007ffe0ff */ /*0190*/ @!P0 LDS R10, [R2.X4] ; /* 0x00000000020a8984 */ /* 0x000fe80000004800 */ /*01a0*/ @!P0 LDS R11, [R2.X4+0x800] ; /* 0x00080000020b8984 */ /* 0x000e240000004800 */ /*01b0*/ @!P0 FADD R11, R10, R11 ; /* 0x0000000b0a0b8221 */ /* 0x001fca0000000000 */ /*01c0*/ @!P0 STS [R2.X4], R11 ; /* 0x0000000b02008388 */ /* 0x000fe80000004800 */ /*01d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*01e0*/ ISETP.GE.U32.AND P0, PT, R7, c[0x0][0x170], PT ; /* 0x00005c0007007a0c */ /* 0x000fc80003f06070 */ /*01f0*/ ISETP.GT.U32.OR P0, PT, R2, 0x7f, P0 ; /* 0x0000007f0200780c */ /* 0x000fe20000704470 */ /*0200*/ @!P1 LDS R6, [R2.X4] ; /* 0x0000000002069984 */ /* 0x000fe80000004800 */ /*0210*/ @!P1 LDS R5, [R2.X4+0x400] ; /* 0x0004000002059984 */ /* 0x000e240000004800 */ /*0220*/ @!P1 FADD R5, R6, R5 ; /* 0x0000000506059221 */ /* 0x001fca0000000000 */ /*0230*/ @!P1 STS [R2.X4], R5 ; /* 0x0000000502009388 */ /* 0x000fe80000004800 */ /*0240*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0250*/ ISETP.GE.U32.AND P1, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */ /* 0x000fe40003f26070 */ /*0260*/ IADD3 R8, R4, 0x20, RZ ; /* 0x0000002004087810 */ /* 0x000fe40007ffe0ff */ /*0270*/ ISETP.GT.U32.OR P1, PT, R2, 0x3f, P1 ; /* 0x0000003f0200780c */ /* 0x000fe20000f24470 */ /*0280*/ @!P0 LDS R6, [R2.X4] ; /* 0x0000000002068984 */ /* 0x000fe80000004800 */ /*0290*/ @!P0 LDS R7, [R2.X4+0x200] ; /* 0x0002000002078984 */ /* 0x000e240000004800 */ /*02a0*/ @!P0 FADD R7, R6, R7 ; /* 0x0000000706078221 */ /* 0x001fca0000000000 */ /*02b0*/ @!P0 STS [R2.X4], R7 ; /* 0x0000000702008388 */ /* 0x000fe80000004800 */ /*02c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*02d0*/ ISETP.GE.U32.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */ /* 0x000fe40003f06070 */ /*02e0*/ IADD3 R8, R4, 0x10, RZ ; /* 0x0000001004087810 */ /* 0x000fe40007ffe0ff */ /*02f0*/ ISETP.GT.U32.OR P0, PT, R2, 0x1f, P0 ; /* 0x0000001f0200780c */ /* 0x000fe20000704470 */ /*0300*/ @!P1 LDS R6, [R2.X4] ; /* 0x0000000002069984 */ /* 0x000fe80000004800 */ /*0310*/ @!P1 LDS R5, [R2.X4+0x100] ; /* 0x0001000002059984 */ /* 0x000e240000004800 */ /*0320*/ @!P1 FADD R5, R6, R5 ; /* 0x0000000506059221 */ /* 0x001fca0000000000 */ /*0330*/ @!P1 STS [R2.X4], R5 ; /* 0x0000000502009388 */ /* 0x000fe80000004800 */ /*0340*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0350*/ ISETP.GE.U32.AND P1, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */ /* 0x000fe40003f26070 */ /*0360*/ IADD3 R8, R4, 0x8, RZ ; /* 0x0000000804087810 */ /* 0x000fe40007ffe0ff */ /*0370*/ ISETP.GT.U32.OR P1, PT, R2, 0xf, P1 ; /* 0x0000000f0200780c */ /* 0x000fe20000f24470 */ /*0380*/ @!P0 LDS R6, [R2.X4] ; /* 0x0000000002068984 */ /* 0x000fe80000004800 */ /*0390*/ @!P0 LDS R7, [R2.X4+0x80] ; /* 0x0000800002078984 */ /* 0x000e240000004800 */ /*03a0*/ @!P0 FADD R7, R6, R7 ; /* 0x0000000706078221 */ /* 0x001fca0000000000 */ /*03b0*/ @!P0 STS [R2.X4], R7 ; /* 0x0000000702008388 */ /* 0x000fe80000004800 */ /*03c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*03d0*/ ISETP.GE.U32.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */ /* 0x000fe40003f06070 */ /*03e0*/ IADD3 R8, R4, 0x4, RZ ; /* 0x0000000404087810 */ /* 0x000fe40007ffe0ff */ /*03f0*/ ISETP.GT.U32.OR P0, PT, R2, 0x7, P0 ; /* 0x000000070200780c */ /* 0x000fe20000704470 */ /*0400*/ @!P1 LDS R6, [R2.X4] ; /* 0x0000000002069984 */ /* 0x000fe80000004800 */ /*0410*/ @!P1 LDS R5, [R2.X4+0x40] ; /* 0x0000400002059984 */ /* 0x000e240000004800 */ /*0420*/ @!P1 FADD R5, R6, R5 ; /* 0x0000000506059221 */ /* 0x001fca0000000000 */ /*0430*/ @!P1 STS [R2.X4], R5 ; /* 0x0000000502009388 */ /* 0x000fe80000004800 */ /*0440*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0450*/ ISETP.GE.U32.AND P1, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */ /* 0x000fe40003f26070 */ /*0460*/ IADD3 R8, R4, 0x2, RZ ; /* 0x0000000204087810 */ /* 0x000fe40007ffe0ff */ /*0470*/ ISETP.GT.U32.OR P1, PT, R2, 0x3, P1 ; /* 0x000000030200780c */ /* 0x000fe40000f24470 */ /*0480*/ IADD3 R4, R4, 0x1, RZ ; /* 0x0000000104047810 */ /* 0x000fe20007ffe0ff */ /*0490*/ @!P0 LDS R6, [R2.X4] ; /* 0x0000000002068984 */ /* 0x000fe80000004800 */ /*04a0*/ @!P0 LDS R7, [R2.X4+0x20] ; /* 0x0000200002078984 */ /* 0x000e240000004800 */ /*04b0*/ @!P0 FADD R7, R6, R7 ; /* 0x0000000706078221 */ /* 0x001fca0000000000 */ /*04c0*/ @!P0 STS [R2.X4], R7 ; /* 0x0000000702008388 */ /* 0x000fe80000004800 */ /*04d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*04e0*/ ISETP.GE.U32.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */ /* 0x000fc80003f06070 */ /*04f0*/ ISETP.GT.U32.OR P0, PT, R2, 0x1, P0 ; /* 0x000000010200780c */ /* 0x000fe20000704470 */ /*0500*/ @!P1 LDS R6, [R2.X4] ; /* 0x0000000002069984 */ /* 0x000fe80000004800 */ /*0510*/ @!P1 LDS R5, [R2.X4+0x10] ; /* 0x0000100002059984 */ /* 0x000e240000004800 */ /*0520*/ @!P1 FADD R5, R6, R5 ; /* 0x0000000506059221 */ /* 0x001fca0000000000 */ /*0530*/ @!P1 STS [R2.X4], R5 ; /* 0x0000000502009388 */ /* 0x000fe80000004800 */ /*0540*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0550*/ ISETP.GE.U32.AND P1, PT, R4, c[0x0][0x170], PT ; /* 0x00005c0004007a0c */ /* 0x000fc80003f26070 */ /*0560*/ ISETP.NE.OR P1, PT, R2, RZ, P1 ; /* 0x000000ff0200720c */ /* 0x000fe20000f25670 */ /*0570*/ @!P0 LDS R6, [R2.X4] ; /* 0x0000000002068984 */ /* 0x000fe80000004800 */ /*0580*/ @!P0 LDS R7, [R2.X4+0x8] ; /* 0x0000080002078984 */ /* 0x000e240000004800 */ /*0590*/ @!P0 FADD R7, R6, R7 ; /* 0x0000000706078221 */ /* 0x001fca0000000000 */ /*05a0*/ @!P0 STS [R2.X4], R7 ; /* 0x0000000702008388 */ /* 0x000fe80000004800 */ /*05b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*05c0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fca0003f05270 */ /*05d0*/ @!P1 LDS R4, [0x4] ; /* 0x00000400ff049984 */ /* 0x000fe80000000800 */ /*05e0*/ @!P1 LDS R5, [R2.X4] ; /* 0x0000000002059984 */ /* 0x000e240000004800 */ /*05f0*/ @!P1 FADD R5, R4, R5 ; /* 0x0000000504059221 */ /* 0x001fca0000000000 */ /*0600*/ @!P1 STS [R2.X4], R5 ; /* 0x0000000502009388 */ /* 0x0001e20000004800 */ /*0610*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0620*/ LDS R5, [RZ] ; /* 0x00000000ff057984 */ /* 0x001e220000000800 */ /*0630*/ IMAD.WIDE.U32 R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fca00078e0003 */ /*0640*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x001fe2000c101904 */ /*0650*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0660*/ BRA 0x660; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0670*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0680*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0690*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> /****************************************************************************** *cr *cr (C) Copyright 2010 The Board of Trustees of the *cr University of Illinois *cr All Rights Reserved *cr ******************************************************************************/ #define BLOCK_SIZE 512 __global__ void reduction(float *out, float *in, unsigned size) { /******************************************************************** Load a segment of the input vector into shared memory Traverse the reduction tree Write the computed sum to the output vector at the correct index ********************************************************************/ __shared__ float partialSum[2*BLOCK_SIZE]; unsigned int t = threadIdx.x; unsigned int start = 2*blockIdx.x*blockDim.x; partialSum[t] = in[start + t]; partialSum[blockDim.x + t] = in[start + blockDim.x + t]; for (unsigned int stride = BLOCK_SIZE; stride >= 1; stride /= 2) { __syncthreads(); if (t < stride && t + start + stride < size) partialSum[t]+=partialSum[t+stride]; } if (t == 0) out[blockIdx.x] = partialSum[0]; } // INSERT KERNEL CODE HERE
.text .file "kernel.hip" .globl _Z24__device_stub__reductionPfS_j # -- Begin function _Z24__device_stub__reductionPfS_j .type _Z24__device_stub__reductionPfS_j,@function _Z24__device_stub__reductionPfS_j: # @_Z24__device_stub__reductionPfS_j .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9reductionPfS_j, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z24__device_stub__reductionPfS_j, .Lfunc_end0-_Z24__device_stub__reductionPfS_j .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9reductionPfS_j, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z9reductionPfS_j,@object # @_Z9reductionPfS_j .section .rodata,"a",@progbits .globl _Z9reductionPfS_j .p2align 3, 0x0 _Z9reductionPfS_j: .quad _Z24__device_stub__reductionPfS_j .size _Z9reductionPfS_j, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z9reductionPfS_j" .size .L__unnamed_1, 18 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z24__device_stub__reductionPfS_j .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z9reductionPfS_j .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z9reductionPfS_j ; -- Begin function _Z9reductionPfS_j .globl _Z9reductionPfS_j .p2align 8 .type _Z9reductionPfS_j,@function _Z9reductionPfS_j: ; @_Z9reductionPfS_j ; %bb.0: s_clause 0x2 s_load_b32 s3, s[0:1], 0x24 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b32 s1, s[0:1], 0x10 s_mov_b32 s2, s15 s_waitcnt lgkmcnt(0) s_and_b32 s3, s3, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_i32 s8, s15, s3 v_lshl_add_u32 v1, s8, 1, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s3, v1 v_mov_b32_e32 v4, v2 v_lshlrev_b64 v[5:6], 2, v[1:2] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[2:3], 2, v[3:4] v_add_co_u32 v4, vcc_lo, s6, v5 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v5, vcc_lo, s7, v6, vcc_lo v_add_co_u32 v2, vcc_lo, s6, v2 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo s_clause 0x1 global_load_b32 v4, v[4:5], off global_load_b32 v3, v[2:3], off v_lshlrev_b32_e32 v2, 2, v0 v_lshl_add_u32 v5, s3, 2, v2 s_movk_i32 s3, 0x200 s_waitcnt vmcnt(1) ds_store_b32 v2, v4 s_waitcnt vmcnt(0) ds_store_b32 v5, v3 .LBB0_1: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v3, s3, v1 v_cmp_gt_u32_e32 vcc_lo, s3, v0 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmp_gt_u32_e64 s0, s1, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s6, vcc_lo, s0 s_and_saveexec_b32 s0, s6 s_cbranch_execz .LBB0_3 ; %bb.2: ; in Loop: Header=BB0_1 Depth=1 v_lshl_add_u32 v3, s3, 2, v2 ds_load_b32 v3, v3 ds_load_b32 v4, v2 s_waitcnt lgkmcnt(0) v_add_f32_e32 v3, v3, v4 ds_store_b32 v2, v3 .LBB0_3: ; in Loop: Header=BB0_1 Depth=1 s_or_b32 exec_lo, exec_lo, s0 s_lshr_b32 s0, s3, 1 s_cmp_lt_u32 s3, 2 s_mov_b32 s3, s0 s_cbranch_scc0 .LBB0_1 ; %bb.4: s_mov_b32 s3, 0 s_mov_b32 s0, exec_lo v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB0_6 ; %bb.5: v_mov_b32_e32 v0, 0 s_lshl_b64 s[0:1], s[2:3], 2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s0, s4, s0 s_addc_u32 s1, s5, s1 ds_load_b32 v1, v0 s_waitcnt lgkmcnt(0) global_store_b32 v0, v1, s[0:1] .LBB0_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9reductionPfS_j .amdhsa_group_segment_fixed_size 4096 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z9reductionPfS_j, .Lfunc_end0-_Z9reductionPfS_j ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 364 ; NumSgprs: 18 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 4096 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 4096 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9reductionPfS_j .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z9reductionPfS_j.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
16c2435f3bd397bc1ae4f0c882d6c11adb46f484
#include <cuda.h> #include <stdio.h> __global__ void K(int *p) { *p = 0; printf("%d\n", *p); } int main() { int *x, *y; cudaMalloc(&x, sizeof(int)); K<<<2, 10>>>(x); cudaDeviceSynchronize(); y = x; cudaFree(y); K<<<2, 10>>>(x); cudaDeviceSynchronize(); //cudaError_t err = cudaGetLastError(); //printf("error=%d, %s, %s\n", err, cudaGetErrorName(err), cudaGetErrorString(err)); return 0; }
.file "tmpxft_002b3cdd_00000000-6_gdb3.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z20__device_stub__Z1KPiPi .type _Z20__device_stub__Z1KPiPi, @function _Z20__device_stub__Z1KPiPi: .LFB2052: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq _Z1KPi(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L2: movq 88(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z20__device_stub__Z1KPiPi, .-_Z20__device_stub__Z1KPiPi .globl _Z1KPi .type _Z1KPi, @function _Z1KPi: .LFB2053: .cfi_startproc endbr64 jmp _Z20__device_stub__Z1KPiPi .cfi_endproc .LFE2053: .size _Z1KPi, .-_Z1KPi .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 subq $56, %rsp .cfi_def_cfa_offset 64 movl $4, %esi movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax leaq 8(%rsp), %rdi call cudaMalloc@PLT movl $2147483653, %edx xorl %r9d, %r9d xorl %r8d, %r8d movl $2147483649, %edi addq %rdx, %rdx movl $1, %ecx movl $1, %esi addq %rdi, %rdi movq %rdx, 28(%rsp) movl $1, 36(%rsp) movq %rdi, 16(%rsp) movl $1, 24(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 movq 8(%rsp), %rdi call _Z20__device_stub__Z1KPiPi .L9: call cudaDeviceSynchronize@PLT movq 8(%rsp), %rdi call cudaFree@PLT movl $2147483653, %edx xorl %r9d, %r9d xorl %r8d, %r8d movl $2147483649, %edi addq %rdx, %rdx movl $1, %ecx movl $1, %esi addq %rdi, %rdi movq %rdx, 28(%rsp) movl $1, 36(%rsp) movq %rdi, 16(%rsp) movl $1, 24(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L10 movq 8(%rsp), %rdi call _Z20__device_stub__Z1KPiPi .L10: call cudaDeviceSynchronize@PLT movq 40(%rsp), %rax subq %fs:40, %rax je .L11 call __stack_chk_fail@PLT .L11: xorl %eax, %eax addq $56, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z1KPi" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z1KPi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z1KPi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fca00078e00ff */ /*0010*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */ /* 0x000fe20007ffe0ff */ /*0020*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */ /* 0x000fe200078e00ff */ /*0030*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe20000000f00 */ /*0040*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */ /* 0x000fe200078e00ff */ /*0050*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0060*/ STL [R1], RZ ; /* 0x000000ff01007387 */ /* 0x0001e20000100800 */ /*0070*/ LDC.64 R8, c[0x4][R0] ; /* 0x0100000000087b82 */ /* 0x0000620000000a00 */ /*0080*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fe20007f1e0ff */ /*0090*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*00a0*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e2000c101904 */ /*00b0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x000fc400078e00ff */ /*00c0*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */ /* 0x000fe400000e06ff */ /*00d0*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x001fcc0000000000 */ /*00e0*/ MOV R11, 0x150 ; /* 0x00000150000b7802 */ /* 0x000fe40000000f00 */ /*00f0*/ MOV R20, 0xd0 ; /* 0x000000d000147802 */ /* 0x000fe40000000f00 */ /*0100*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*0110*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*0120*/ IADD3 R20, P0, P1, -R20, R11, R2 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e102 */ /*0130*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*0140*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */ /* 0x002fea0003c00000 */ /*0150*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0160*/ BRA 0x160; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> __global__ void K(int *p) { *p = 0; printf("%d\n", *p); } int main() { int *x, *y; hipMalloc(&x, sizeof(int)); K<<<2, 10>>>(x); hipDeviceSynchronize(); y = x; hipFree(y); K<<<2, 10>>>(x); hipDeviceSynchronize(); //cudaError_t err = cudaGetLastError(); //printf("error=%d, %s, %s\n", err, cudaGetErrorName(err), cudaGetErrorString(err)); return 0; }
.text .file "gdb3.hip" .globl _Z16__device_stub__KPi # -- Begin function _Z16__device_stub__KPi .type _Z16__device_stub__KPi,@function _Z16__device_stub__KPi: # @_Z16__device_stub__KPi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z1KPi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z16__device_stub__KPi, .Lfunc_end0-_Z16__device_stub__KPi .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $16, %rsp .cfi_def_cfa_offset 32 .cfi_offset %rbx, -16 movabsq $4294967298, %rbx # imm = 0x100000002 leaq 8(%rsp), %rdi movl $4, %esi callq hipMalloc leaq 8(%rbx), %rdx movq %rbx, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movq 8(%rsp), %rdi callq _Z16__device_stub__KPi .LBB1_2: callq hipDeviceSynchronize movq 8(%rsp), %rdi callq hipFree leaq 8(%rbx), %rdx movq %rbx, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_4 # %bb.3: movq 8(%rsp), %rdi callq _Z16__device_stub__KPi .LBB1_4: callq hipDeviceSynchronize xorl %eax, %eax addq $16, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z1KPi, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z1KPi,@object # @_Z1KPi .section .rodata,"a",@progbits .globl _Z1KPi .p2align 3, 0x0 _Z1KPi: .quad _Z16__device_stub__KPi .size _Z1KPi, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z1KPi" .size .L__unnamed_1, 7 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z16__device_stub__KPi .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z1KPi .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z1KPi ; -- Begin function _Z1KPi .globl _Z1KPi .p2align 8 .type _Z1KPi,@function _Z1KPi: ; @_Z1KPi ; %bb.0: s_load_b64 s[2:3], s[0:1], 0x0 v_mbcnt_lo_u32_b32 v30, -1, 0 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v1, 0 v_mov_b32_e32 v2, 0 s_delay_alu instid0(VALU_DEP_4) v_mov_b32_e32 v0, v30 s_waitcnt lgkmcnt(0) global_store_b32 v3, v3, s[2:3] s_load_b64 s[2:3], s[0:1], 0x58 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_6 ; %bb.1: s_waitcnt lgkmcnt(0) global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[1:2], v3, s[2:3] offset:40 global_load_b64 v[4:5], v3, s[2:3] s_mov_b32 s4, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v2, v2, v7 v_and_b32_e32 v1, v1, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v2, v2, 24 v_mul_hi_u32 v8, v1, 24 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v2, v8, v2 s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v4, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, v5, v2, vcc_lo global_load_b64 v[4:5], v[1:2], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[1:2], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[1:2], v[6:7] s_cbranch_execz .LBB0_5 ; %bb.2: ; %.preheader3.i.i.i.preheader v_mov_b32_e32 v4, 0 s_mov_b32 s5, 0 .LBB0_3: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] v_dual_mov_b32 v8, v2 :: v_dual_mov_b32 v7, v1 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) v_mad_u64_u32 v[1:2], null, v5, 24, v[9:10] v_and_b32_e32 v9, v6, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v9, 24, v[2:3] v_mov_b32_e32 v2, v5 global_load_b64 v[5:6], v[1:2], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[1:2], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[7:8] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_3 ; %bb.4: ; %Flow318 s_or_b32 exec_lo, exec_lo, s5 .LBB0_5: ; %Flow320 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_6: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[8:9], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] v_readfirstlane_b32 s4, v1 v_readfirstlane_b32 s5, v2 s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_8 ; %bb.7: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, 0 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v2, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[1:2], v[8:11], off offset:8 .LBB0_8: s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v1, 0 s_lshl_b64 s[6:7], s[6:7], 12 s_mov_b32 s12, 0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_mov_b32 s13, s12 v_lshlrev_b64 v[2:3], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s14, s12 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v0, v2 v_mov_b32_e32 v0, 33 s_mov_b32 s15, s12 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo v_mov_b32_e32 v2, v1 v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v8, s12 v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14 v_mov_b32_e32 v11, s15 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_16 ; %bb.9: s_clause 0x1 global_load_b64 v[12:13], v1, s[2:3] offset:32 glc global_load_b64 v[2:3], v1, s[2:3] offset:40 v_mov_b32_e32 v10, s4 s_mov_b32 s7, exec_lo s_waitcnt vmcnt(0) v_dual_mov_b32 v11, s5 :: v_dual_and_b32 v0, s5, v3 v_and_b32_e32 v2, s4, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v0, v0, 24 v_mul_hi_u32 v3, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v0, v3, v0 v_add_co_u32 v8, vcc_lo, v4, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v5, v0, vcc_lo global_store_b64 v[8:9], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v1, v[10:13], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[12:13] s_cbranch_execz .LBB0_12 ; %bb.10: ; %.preheader1.i.i.i.preheader v_mov_b32_e32 v10, 0 s_mov_b32 s10, 0 .LBB0_11: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_11 .LBB0_12: ; %Flow316 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_14 ; %bb.13: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_14: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_16 ; %bb.15: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_16: ; %Flow317 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_17: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_19 ; %bb.18: ; in Loop: Header=BB0_17 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_19: ; in Loop: Header=BB0_17 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_21 ; %bb.20: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_22 .LBB0_21: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, -1 .LBB0_22: ; %Flow311 ; in Loop: Header=BB0_17 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_17 ; %bb.23: global_load_b64 v[0:1], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_27 ; %bb.24: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_27 ; %bb.25: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_26: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_26 .LBB0_27: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[4:5] s_add_u32 s4, s4, .str@rel32@lo+4 s_addc_u32 s5, s5, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[4:5], 0 s_cbranch_scc0 .LBB0_113 ; %bb.28: s_waitcnt vmcnt(0) v_dual_mov_b32 v6, 2 :: v_dual_and_b32 v31, 2, v0 v_dual_mov_b32 v29, 0 :: v_dual_and_b32 v2, -3, v0 v_mov_b32_e32 v3, v1 v_mov_b32_e32 v7, 1 s_mov_b64 s[6:7], 4 .LBB0_29: ; =>This Loop Header: Depth=1 ; Child Loop BB0_32 Depth 2 ; Child Loop BB0_39 Depth 2 ; Child Loop BB0_47 Depth 2 ; Child Loop BB0_55 Depth 2 ; Child Loop BB0_63 Depth 2 ; Child Loop BB0_71 Depth 2 ; Child Loop BB0_79 Depth 2 ; Child Loop BB0_87 Depth 2 ; Child Loop BB0_95 Depth 2 ; Child Loop BB0_101 Depth 2 ; Child Loop BB0_110 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[6:7], 56 ; implicit-def: $vgpr10_vgpr11 ; implicit-def: $sgpr15 s_and_b32 s0, s0, exec_lo s_cselect_b32 s8, s6, 56 s_cselect_b32 s9, s7, 0 s_cmp_gt_u32 s8, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_34 ; %bb.30: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v10, 0 v_mov_b32_e32 v11, 0 s_cmp_eq_u32 s8, 0 s_cbranch_scc1 .LBB0_33 ; %bb.31: ; %.preheader31.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_lshl_b64 s[0:1], s[8:9], 3 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[4:5] .LBB0_32: ; %.preheader31.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v4, v29, s[12:13] s_waitcnt vmcnt(0) v_and_b32_e32 v28, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[28:29] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s0, s10 v_or_b32_e32 v10, v4, v10 v_or_b32_e32 v11, v5, v11 s_cbranch_scc1 .LBB0_32 .LBB0_33: ; %Flow287 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s15, 0 .LBB0_34: ; %Flow289 ; in Loop: Header=BB0_29 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[4:5] s_cbranch_vccnz .LBB0_36 ; %bb.35: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[10:11], v29, s[4:5] s_add_i32 s15, s8, -8 s_add_u32 s0, s4, 8 s_addc_u32 s1, s5, 0 .LBB0_36: ; %.loopexit32.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_41 ; %bb.37: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v12, 0 v_mov_b32_e32 v13, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_40 ; %bb.38: ; %.preheader29.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_39: ; %.preheader29.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v29, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v28, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[28:29] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v12, v4, v12 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v13, v5, v13 s_cbranch_scc1 .LBB0_39 .LBB0_40: ; %Flow282 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_42 .LBB0_41: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $sgpr14 .LBB0_42: ; %Flow284 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_44 ; %bb.43: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[12:13], v29, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_44: ; %.loopexit30.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_49 ; %bb.45: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v14, 0 v_mov_b32_e32 v15, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_48 ; %bb.46: ; %.preheader27.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_47: ; %.preheader27.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v29, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v28, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[28:29] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v14, v4, v14 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v15, v5, v15 s_cbranch_scc1 .LBB0_47 .LBB0_48: ; %Flow277 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_50 .LBB0_49: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_50: ; %Flow279 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_52 ; %bb.51: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[14:15], v29, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_52: ; %.loopexit28.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_57 ; %bb.53: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_56 ; %bb.54: ; %.preheader25.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_55: ; %.preheader25.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v29, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v28, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[28:29] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v16, v4, v16 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v17, v5, v17 s_cbranch_scc1 .LBB0_55 .LBB0_56: ; %Flow272 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_58 .LBB0_57: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr14 .LBB0_58: ; %Flow274 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_60 ; %bb.59: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[16:17], v29, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_60: ; %.loopexit26.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_65 ; %bb.61: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_64 ; %bb.62: ; %.preheader23.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_63: ; %.preheader23.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v29, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v28, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[28:29] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v18, v4, v18 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v19, v5, v19 s_cbranch_scc1 .LBB0_63 .LBB0_64: ; %Flow267 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_66 .LBB0_65: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr15 .LBB0_66: ; %Flow269 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_68 ; %bb.67: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[18:19], v29, s[0:1] s_add_i32 s15, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_68: ; %.loopexit24.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_73 ; %bb.69: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_72 ; %bb.70: ; %.preheader21.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_71: ; %.preheader21.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v29, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v28, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[28:29] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v20, v4, v20 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v21, v5, v21 s_cbranch_scc1 .LBB0_71 .LBB0_72: ; %Flow262 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_74 .LBB0_73: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr20_vgpr21 ; implicit-def: $sgpr14 .LBB0_74: ; %Flow264 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_76 ; %bb.75: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[20:21], v29, s[0:1] s_add_i32 s14, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_76: ; %.loopexit22.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_81 ; %bb.77: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_80 ; %bb.78: ; %.preheader.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[0:1] .LBB0_79: ; %.preheader.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v4, v29, s[12:13] s_add_i32 s14, s14, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v28, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[28:29] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 0 v_or_b32_e32 v22, v4, v22 v_or_b32_e32 v23, v5, v23 s_cbranch_scc1 .LBB0_79 .LBB0_80: ; %Flow257 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_branch .LBB0_82 .LBB0_81: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 .LBB0_82: ; %Flow259 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_84 ; %bb.83: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[22:23], v29, s[0:1] .LBB0_84: ; %.loopexit.i ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v28, v30 s_waitcnt vmcnt(0) v_mov_b32_e32 v4, 0 v_mov_b32_e32 v5, 0 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v28 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v28 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_90 ; %bb.85: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[26:27], v29, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v29, s[2:3] offset:40 global_load_b64 v[8:9], v29, s[2:3] s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v5, v5, v27 v_and_b32_e32 v4, v4, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v5, v5, 24 v_mul_hi_u32 v24, v4, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v24, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[24:25], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v29, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[4:5], v[26:27] s_cbranch_execz .LBB0_89 ; %bb.86: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s11, 0 .LBB0_87: ; %.preheader3.i.i19.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v29, s[2:3] offset:40 global_load_b64 v[24:25], v29, s[2:3] v_dual_mov_b32 v27, v5 :: v_dual_mov_b32 v26, v4 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v26 s_waitcnt vmcnt(0) v_mad_u64_u32 v[4:5], null, v8, 24, v[24:25] v_and_b32_e32 v24, v9, v27 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v24, 24, v[5:6] v_mov_b32_e32 v5, v8 global_load_b64 v[24:25], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v29, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[26:27] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_87 ; %bb.88: ; %Flow252 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_89: ; %Flow254 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 .LBB0_90: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[8:9], v29, s[2:3] offset:40 global_load_b128 v[24:27], v29, s[2:3] v_readfirstlane_b32 s10, v4 v_readfirstlane_b32 s11, v5 s_mov_b32 s16, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s12, v8 v_readfirstlane_b32 s13, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[10:11], s[12:13] s_mul_i32 s1, s13, 24 s_mul_hi_u32 s14, s12, 24 s_mul_i32 s15, s12, 24 s_and_saveexec_b32 s17, s0 s_cbranch_execz .LBB0_92 ; %bb.91: ; in Loop: Header=BB0_29 Depth=1 v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, v29 s_add_i32 s16, s14, s1 s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v24, s15 v_add_co_ci_u32_e32 v9, vcc_lo, s16, v25, vcc_lo global_store_b128 v[8:9], v[4:7], off offset:8 .LBB0_92: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s17 v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56 v_or_b32_e32 v4, 0, v3 v_or_b32_e32 v5, v2, v31 s_lshl_b64 s[12:13], s[12:13], 12 s_lshl_b32 s16, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s16, s16, 28 v_dual_cndmask_b32 v9, v4, v3 :: v_dual_cndmask_b32 v4, v5, v2 v_lshlrev_b64 v[2:3], 6, v[28:29] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v26, s12 v_add_co_ci_u32_e32 v27, vcc_lo, s13, v27, vcc_lo s_and_b32 s16, s16, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v26, vcc_lo, v5, v2 v_and_or_b32 v8, 0xffffff1f, v4, s16 v_add_co_ci_u32_e32 v27, vcc_lo, v27, v3, vcc_lo s_clause 0x3 global_store_b128 v[26:27], v[8:11], off global_store_b128 v[26:27], v[12:15], off offset:16 global_store_b128 v[26:27], v[16:19], off offset:32 global_store_b128 v[26:27], v[20:23], off offset:48 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_100 ; %bb.93: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x1 global_load_b64 v[12:13], v29, s[2:3] offset:32 glc global_load_b64 v[2:3], v29, s[2:3] offset:40 v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v2 v_readfirstlane_b32 s17, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[10:11] s_mul_i32 s13, s17, 24 s_mul_hi_u32 s17, s16, 24 s_mul_i32 s16, s16, 24 s_add_i32 s17, s17, s13 v_add_co_u32 v8, vcc_lo, v24, s16 v_add_co_ci_u32_e32 v9, vcc_lo, s17, v25, vcc_lo s_mov_b32 s13, exec_lo global_store_b64 v[8:9], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v29, v[10:13], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[4:5], v[12:13] s_cbranch_execz .LBB0_96 ; %bb.94: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s16, 0 .LBB0_95: ; %.preheader1.i.i17.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11 s_sleep 1 global_store_b64 v[8:9], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v29, v[2:5], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_or_b32 s16, vcc_lo, s16 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s16 s_cbranch_execnz .LBB0_95 .LBB0_96: ; %Flow250 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s13 global_load_b64 v[2:3], v29, s[2:3] offset:16 s_mov_b32 s16, exec_lo s_mov_b32 s13, exec_lo v_mbcnt_lo_u32_b32 v4, s16, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_98 ; %bb.97: ; in Loop: Header=BB0_29 Depth=1 s_bcnt1_i32_b32 s16, s16 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v28, s16 s_waitcnt vmcnt(0) global_atomic_add_u64 v[2:3], v[28:29], off offset:8 .LBB0_98: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_waitcnt vmcnt(0) global_load_b64 v[4:5], v[2:3], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_cbranch_vccnz .LBB0_100 ; %bb.99: ; in Loop: Header=BB0_29 Depth=1 global_load_b32 v28, v[2:3], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s13, v28 s_waitcnt_vscnt null, 0x0 global_store_b64 v[4:5], v[28:29], off s_and_b32 m0, s13, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_100: ; %Flow251 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_add_i32 s14, s14, s1 v_add_co_u32 v2, vcc_lo, v24, s15 v_add_co_ci_u32_e32 v3, vcc_lo, s14, v25, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v2, 20 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo .LBB0_101: ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v4, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_101 Depth=2 global_load_b32 v4, v[2:3], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v4, 1, v4 .LBB0_103: ; in Loop: Header=BB0_101 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v4 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_105 ; %bb.104: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_106 .LBB0_105: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, -1 .LBB0_106: ; %Flow245 ; in Loop: Header=BB0_101 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_101 ; %bb.107: ; in Loop: Header=BB0_29 Depth=1 global_load_b128 v[2:5], v[26:27], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_111 ; %bb.108: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x2 global_load_b64 v[4:5], v29, s[2:3] offset:40 global_load_b64 v[12:13], v29, s[2:3] offset:24 glc global_load_b64 v[10:11], v29, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v14, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v9, v9, v15 :: v_dual_cndmask_b32 v8, v8, v14 v_and_b32_e32 v5, v9, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v4, v8, v4 v_mul_hi_u32 v14, v4, 24 v_mul_lo_u32 v4, v4, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v4, vcc_lo, v10, v4 v_mov_b32_e32 v10, v12 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v5, v14, v5 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[4:5], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v29, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_111 ; %bb.109: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 .LBB0_110: ; %.preheader.i.i16.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[4:5], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v29, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_110 .LBB0_111: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s6, s6, s8 s_subb_u32 s7, s7, s9 s_add_u32 s4, s4, s8 s_addc_u32 s5, s5, s9 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc1 .LBB0_29 ; %bb.112: ; %Flow290 s_mov_b32 s0, 0 s_branch .LBB0_114 .LBB0_113: s_mov_b32 s0, -1 ; implicit-def: $vgpr2_vgpr3 .LBB0_114: ; %Flow305 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_143 ; %bb.115: s_waitcnt vmcnt(0) v_mov_b32_e32 v2, v30 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v2 v_cmp_eq_u32_e64 s0, s0, v2 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_121 ; %bb.116: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_120 ; %bb.117: ; %.preheader3.i.i.i8.preheader s_mov_b32 s5, 0 .LBB0_118: ; %.preheader3.i.i.i8 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_118 ; %bb.119: ; %Flow302 s_or_b32 exec_lo, exec_lo, s5 .LBB0_120: ; %Flow304 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_121: ; %.loopexit4.i.i.i3 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_123 ; %bb.122: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v3 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_123: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v2, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1f, v0, 32 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo v_mov_b32_e32 v2, v3 v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15 v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_131 ; %bb.124: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s4 v_mov_b32_e32 v12, s5 s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v8, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_127 ; %bb.125: ; %.preheader1.i.i.i6.preheader s_mov_b32 s10, 0 .LBB0_126: ; %.preheader1.i.i.i6 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_126 .LBB0_127: ; %Flow300 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_129 ; %bb.128: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_129: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_131 ; %bb.130: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_131: ; %Flow301 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_132: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_134 ; %bb.133: ; in Loop: Header=BB0_132 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_134: ; in Loop: Header=BB0_132 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_136 ; %bb.135: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_137 .LBB0_136: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, -1 .LBB0_137: ; %Flow295 ; in Loop: Header=BB0_132 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_132 ; %bb.138: global_load_b128 v[2:5], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_142 ; %bb.139: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[0:1], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] v_dual_cndmask_b32 v5, v5, v12 :: v_dual_cndmask_b32 v4, v4, v11 v_and_b32_e32 v1, v5, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v4, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v6, v0 v_mov_b32_e32 v6, v9 v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo v_mov_b32_e32 v7, v10 global_store_b64 v[0:1], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v8, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_142 ; %bb.140: ; %.preheader.i.i.i5.preheader s_mov_b32 s0, 0 .LBB0_141: ; %.preheader.i.i.i5 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[6:7] v_dual_mov_b32 v6, v9 :: v_dual_mov_b32 v7, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_141 .LBB0_142: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_143: ; %__ockl_printf_append_string_n.exit s_waitcnt vmcnt(0) v_mov_b32_e32 v4, v30 v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v4 v_cmp_eq_u32_e64 s0, s0, v4 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_149 ; %bb.144: v_mov_b32_e32 v5, 0 s_mov_b32 s4, exec_lo global_load_b64 v[8:9], v5, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v5, s[2:3] offset:40 global_load_b64 v[6:7], v5, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v0, v0, v8 v_and_b32_e32 v1, v1, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v0, 24 v_mul_lo_u32 v1, v1, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v10, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo global_load_b64 v[6:7], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v5, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[8:9] s_cbranch_execz .LBB0_148 ; %bb.145: ; %.preheader3.i.i.i15.preheader s_mov_b32 s5, 0 .LBB0_146: ; %.preheader3.i.i.i15 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v5, s[2:3] offset:40 global_load_b64 v[10:11], v5, s[2:3] v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v6, v6, v8 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v6, 24, v[10:11] v_and_b32_e32 v10, v7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v10, 24, v[1:2] v_mov_b32_e32 v1, v6 global_load_b64 v[6:7], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v5, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_146 ; %bb.147: ; %Flow238 s_or_b32 exec_lo, exec_lo, s5 .LBB0_148: ; %Flow240 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_149: ; %.loopexit4.i.i.i9 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v5, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v5, s[2:3] offset:40 global_load_b128 v[6:9], v5, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_151 ; %bb.150: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, v5 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v7, vcc_lo v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 global_store_b128 v[0:1], v[10:13], off offset:8 .LBB0_151: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, s6 v_add_co_ci_u32_e32 v8, vcc_lo, s7, v9, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v4, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v2, 0xffffff1d, v2, 34 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_mov_b32_e32 v4, v5 v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15 v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14 s_clause 0x3 global_store_b128 v[0:1], v[2:5], off global_store_b128 v[0:1], v[8:11], off offset:16 global_store_b128 v[0:1], v[8:11], off offset:32 global_store_b128 v[0:1], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_159 ; %bb.152: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v4, vcc_lo, v6, s10 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v7, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[4:5], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_155 ; %bb.153: ; %.preheader1.i.i.i13.preheader s_mov_b32 s10, 0 .LBB0_154: ; %.preheader1.i.i.i13 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_154 .LBB0_155: ; %Flow236 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_157 ; %bb.156: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_157: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_159 ; %bb.158: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_159: ; %Flow237 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_160: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_162 ; %bb.161: ; in Loop: Header=BB0_160 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_162: ; in Loop: Header=BB0_160 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_164 ; %bb.163: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_165 .LBB0_164: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, -1 .LBB0_165: ; %Flow231 ; in Loop: Header=BB0_160 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_160 ; %bb.166: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_170 ; %bb.167: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_170 ; %bb.168: ; %.preheader.i.i.i12.preheader s_mov_b32 s0, 0 .LBB0_169: ; %.preheader.i.i.i12 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_169 .LBB0_170: ; %__ockl_printf_append_args.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z1KPi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 32 .amdhsa_next_free_sgpr 18 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z1KPi, .Lfunc_end0-_Z1KPi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 6692 ; NumSgprs: 20 ; NumVgprs: 32 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 3 ; NumSGPRsForWavesPerEU: 20 ; NumVGPRsForWavesPerEU: 32 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "%d\n" .size .str, 4 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims - .offset: 88 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z1KPi .private_segment_fixed_size: 0 .sgpr_count: 20 .sgpr_spill_count: 0 .symbol: _Z1KPi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 32 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
9b7b7b72ef6d8259f45fbaae4c22892b4f8989e5
#include "includes.h" char* concat(char *s1, char *s2); __global__ void r_final_sum_and_alpha_calculation(float * r_squared ,float * p_sum ,int size) { int index = threadIdx.x ; __shared__ float shared_r_squared[1024] ; __shared__ float shared_p_sum[1024] ; if (index < size) { shared_r_squared[index] = r_squared[index] ; shared_p_sum[index] = p_sum[index] ; } else { shared_r_squared[index] = 0 ; shared_p_sum[index] = 0 ; } __syncthreads() ; for (unsigned int s = blockDim.x/2 ; s> 0 ; s >>= 1) { if (index < s) { shared_r_squared[index] = shared_r_squared[index] + shared_r_squared[index +s] ; shared_p_sum[index] = shared_p_sum[index] + shared_p_sum[index +s] ; __syncthreads() ; } } if(threadIdx.x == 0) { //alpha r_squared[blockIdx.x] = shared_r_squared[0]/shared_p_sum[0] ; } }
.file "tmpxft_002d9d83_00000000-6_r_final_sum_and_alpha_calculation.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z56__device_stub__Z33r_final_sum_and_alpha_calculationPfS_iPfS_i .type _Z56__device_stub__Z33r_final_sum_and_alpha_calculationPfS_iPfS_i, @function _Z56__device_stub__Z33r_final_sum_and_alpha_calculationPfS_iPfS_i: .LFB2032: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movl %edx, 12(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 12(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z33r_final_sum_and_alpha_calculationPfS_i(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z56__device_stub__Z33r_final_sum_and_alpha_calculationPfS_iPfS_i, .-_Z56__device_stub__Z33r_final_sum_and_alpha_calculationPfS_iPfS_i .globl _Z33r_final_sum_and_alpha_calculationPfS_i .type _Z33r_final_sum_and_alpha_calculationPfS_i, @function _Z33r_final_sum_and_alpha_calculationPfS_i: .LFB2033: .cfi_startproc endbr64 jmp _Z56__device_stub__Z33r_final_sum_and_alpha_calculationPfS_iPfS_i .cfi_endproc .LFE2033: .size _Z33r_final_sum_and_alpha_calculationPfS_i, .-_Z33r_final_sum_and_alpha_calculationPfS_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z33r_final_sum_and_alpha_calculationPfS_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z33r_final_sum_and_alpha_calculationPfS_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z33r_final_sum_and_alpha_calculationPfS_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e220000002100 */ /*0020*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0030*/ ISETP.GE.AND P0, PT, R7, c[0x0][0x170], PT ; /* 0x00005c0007007a0c */ /* 0x001fda0003f06270 */ /*0040*/ @!P0 IMAD.MOV.U32 R4, RZ, RZ, 0x4 ; /* 0x00000004ff048424 */ /* 0x000fc800078e00ff */ /*0050*/ @!P0 IMAD.WIDE R2, R7, R4, c[0x0][0x160] ; /* 0x0000580007028625 */ /* 0x000fc800078e0204 */ /*0060*/ @!P0 IMAD.WIDE R4, R7, R4, c[0x0][0x168] ; /* 0x00005a0007048625 */ /* 0x000fe400078e0204 */ /*0070*/ @!P0 LDG.E R2, [R2.64] ; /* 0x0000000602028981 */ /* 0x000ea8000c1e1900 */ /*0080*/ @!P0 LDG.E R4, [R4.64] ; /* 0x0000000604048981 */ /* 0x000ee2000c1e1900 */ /*0090*/ ULDC UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */ /* 0x000fe40000000800 */ /*00a0*/ USHF.R.U32.HI UR4, URZ, 0x1, UR4 ; /* 0x000000013f047899 */ /* 0x000fe20008011604 */ /*00b0*/ @P0 STS [R7.X4], RZ ; /* 0x000000ff07000388 */ /* 0x0001e80000004800 */ /*00c0*/ @P0 STS [R7.X4+0x1000], RZ ; /* 0x001000ff07000388 */ /* 0x0001e80000004800 */ /*00d0*/ @!P0 STS [R7.X4], R2 ; /* 0x0000000207008388 */ /* 0x0041e80000004800 */ /*00e0*/ @!P0 STS [R7.X4+0x1000], R4 ; /* 0x0010000407008388 */ /* 0x0081e80000004800 */ /*00f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0100*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */ /* 0x000fda000bf05270 */ /*0110*/ @!P0 BRA 0x260 ; /* 0x0000014000008947 */ /* 0x000fea0003800000 */ /*0120*/ BSSY B0, 0x260 ; /* 0x0000013000007945 */ /* 0x001fe20003800000 */ /*0130*/ IMAD.SHL.U32 R0, R7, 0x4, RZ ; /* 0x0000000407007824 */ /* 0x000fe400078e00ff */ /*0140*/ IMAD.U32 R3, RZ, RZ, UR4 ; /* 0x00000004ff037e24 */ /* 0x000fca000f8e00ff */ /*0150*/ ISETP.GE.U32.AND P0, PT, R7, R3, PT ; /* 0x000000030700720c */ /* 0x000fda0003f06070 */ /*0160*/ @P0 BRA 0x220 ; /* 0x000000b000000947 */ /* 0x001fea0003800000 */ /*0170*/ IMAD R4, R3, 0x4, R0 ; /* 0x0000000403047824 */ /* 0x000fe200078e0200 */ /*0180*/ LDS R2, [R7.X4] ; /* 0x0000000007027984 */ /* 0x000fe20000004800 */ /*0190*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */ /* 0x000fe60003800000 */ /*01a0*/ LDS R5, [R4] ; /* 0x0000000004057984 */ /* 0x000e280000000800 */ /*01b0*/ LDS R6, [R7.X4+0x1000] ; /* 0x0010000007067984 */ /* 0x000fe20000004800 */ /*01c0*/ FADD R2, R2, R5 ; /* 0x0000000502027221 */ /* 0x001fca0000000000 */ /*01d0*/ STS [R7.X4], R2 ; /* 0x0000000207007388 */ /* 0x000fe80000004800 */ /*01e0*/ LDS R5, [R4+0x1000] ; /* 0x0010000004057984 */ /* 0x000e240000000800 */ /*01f0*/ FADD R5, R5, R6 ; /* 0x0000000605057221 */ /* 0x001fca0000000000 */ /*0200*/ STS [R7.X4+0x1000], R5 ; /* 0x0010000507007388 */ /* 0x0001e80000004800 */ /*0210*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0220*/ SHF.R.U32.HI R3, RZ, 0x1, R3 ; /* 0x00000001ff037819 */ /* 0x000fc80000011603 */ /*0230*/ ISETP.NE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */ /* 0x000fda0003f05270 */ /*0240*/ @P0 BRA 0x150 ; /* 0xffffff0000000947 */ /* 0x000fea000383ffff */ /*0250*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0260*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x001fda0003f05270 */ /*0270*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0280*/ LDS R3, [0x1000] ; /* 0x00100000ff037984 */ /* 0x000e280000000800 */ /*0290*/ LDS R0, [RZ] ; /* 0x00000000ff007984 */ /* 0x000e620000000800 */ /*02a0*/ MUFU.RCP R2, R3 ; /* 0x0000000300027308 */ /* 0x001e300000001000 */ /*02b0*/ FCHK P0, R0, R3 ; /* 0x0000000300007302 */ /* 0x002e620000000000 */ /*02c0*/ FFMA R5, -R3, R2, 1 ; /* 0x3f80000003057423 */ /* 0x001fc80000000102 */ /*02d0*/ FFMA R5, R2, R5, R2 ; /* 0x0000000502057223 */ /* 0x000fc80000000002 */ /*02e0*/ FFMA R2, R0, R5, RZ ; /* 0x0000000500027223 */ /* 0x000fc800000000ff */ /*02f0*/ FFMA R4, -R3, R2, R0 ; /* 0x0000000203047223 */ /* 0x000fc80000000100 */ /*0300*/ FFMA R5, R5, R4, R2 ; /* 0x0000000405057223 */ /* 0x000fe20000000002 */ /*0310*/ @!P0 BRA 0x340 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*0320*/ MOV R2, 0x340 ; /* 0x0000034000027802 */ /* 0x000fe40000000f00 */ /*0330*/ CALL.REL.NOINC 0x390 ; /* 0x0000005000007944 */ /* 0x000fea0003c00000 */ /*0340*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e220000002500 */ /*0350*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc800078e00ff */ /*0360*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x001fca00078e0003 */ /*0370*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101906 */ /*0380*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0390*/ SHF.R.U32.HI R5, RZ, 0x17, R3.reuse ; /* 0x00000017ff057819 */ /* 0x100fe20000011603 */ /*03a0*/ IMAD.MOV.U32 R6, RZ, RZ, R0.reuse ; /* 0x000000ffff067224 */ /* 0x100fe200078e0000 */ /*03b0*/ SHF.R.U32.HI R4, RZ, 0x17, R0 ; /* 0x00000017ff047819 */ /* 0x000fe20000011600 */ /*03c0*/ IMAD.MOV.U32 R7, RZ, RZ, R3 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0003 */ /*03d0*/ LOP3.LUT R5, R5, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff05057812 */ /* 0x000fe400078ec0ff */ /*03e0*/ LOP3.LUT R4, R4, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff04047812 */ /* 0x000fe400078ec0ff */ /*03f0*/ IADD3 R10, R5, -0x1, RZ ; /* 0xffffffff050a7810 */ /* 0x000fe40007ffe0ff */ /*0400*/ IADD3 R9, R4, -0x1, RZ ; /* 0xffffffff04097810 */ /* 0x000fc40007ffe0ff */ /*0410*/ ISETP.GT.U32.AND P0, PT, R10, 0xfd, PT ; /* 0x000000fd0a00780c */ /* 0x000fc80003f04070 */ /*0420*/ ISETP.GT.U32.OR P0, PT, R9, 0xfd, P0 ; /* 0x000000fd0900780c */ /* 0x000fda0000704470 */ /*0430*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff088224 */ /* 0x000fe200078e00ff */ /*0440*/ @!P0 BRA 0x5c0 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*0450*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fe40003f1c200 */ /*0460*/ FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fc80003f3c200 */ /*0470*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0480*/ @P0 BRA 0x9a0 ; /* 0x0000051000000947 */ /* 0x000fea0003800000 */ /*0490*/ LOP3.LUT P0, RZ, R7, 0x7fffffff, R6, 0xc8, !PT ; /* 0x7fffffff07ff7812 */ /* 0x000fda000780c806 */ /*04a0*/ @!P0 BRA 0x980 ; /* 0x000004d000008947 */ /* 0x000fea0003800000 */ /*04b0*/ FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ; /* 0x7f8000000000780b */ /* 0x040fe40003f5d200 */ /*04c0*/ FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f3d200 */ /*04d0*/ FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fd60003f1d200 */ /*04e0*/ @!P1 BRA !P2, 0x980 ; /* 0x0000049000009947 */ /* 0x000fea0005000000 */ /*04f0*/ LOP3.LUT P2, RZ, R6, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff06ff7812 */ /* 0x000fc8000784c0ff */ /*0500*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*0510*/ @P1 BRA 0x960 ; /* 0x0000044000001947 */ /* 0x000fea0003800000 */ /*0520*/ LOP3.LUT P1, RZ, R7, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff07ff7812 */ /* 0x000fc8000782c0ff */ /*0530*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*0540*/ @P0 BRA 0x930 ; /* 0x000003e000000947 */ /* 0x000fea0003800000 */ /*0550*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe40003f06270 */ /*0560*/ ISETP.GE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fd60003f26270 */ /*0570*/ @P0 IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff080224 */ /* 0x000fe200078e00ff */ /*0580*/ @!P0 FFMA R6, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000068823 */ /* 0x000fe200000000ff */ /*0590*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, -0x40 ; /* 0xffffffc0ff088424 */ /* 0x000fe200078e00ff */ /*05a0*/ @!P1 FFMA R7, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003079823 */ /* 0x000fc800000000ff */ /*05b0*/ @!P1 IADD3 R8, R8, 0x40, RZ ; /* 0x0000004008089810 */ /* 0x000fe40007ffe0ff */ /*05c0*/ LEA R0, R5, 0xc0800000, 0x17 ; /* 0xc080000005007811 */ /* 0x000fe400078eb8ff */ /*05d0*/ IADD3 R4, R4, -0x7f, RZ ; /* 0xffffff8104047810 */ /* 0x000fc60007ffe0ff */ /*05e0*/ IMAD.IADD R7, R7, 0x1, -R0 ; /* 0x0000000107077824 */ /* 0x000fe200078e0a00 */ /*05f0*/ IADD3 R5, R4.reuse, 0x7f, -R5 ; /* 0x0000007f04057810 */ /* 0x040fe20007ffe805 */ /*0600*/ IMAD R0, R4, -0x800000, R6 ; /* 0xff80000004007824 */ /* 0x000fe400078e0206 */ /*0610*/ MUFU.RCP R3, R7 ; /* 0x0000000700037308 */ /* 0x000e220000001000 */ /*0620*/ FADD.FTZ R9, -R7, -RZ ; /* 0x800000ff07097221 */ /* 0x000fe20000010100 */ /*0630*/ IMAD.IADD R5, R5, 0x1, R8 ; /* 0x0000000105057824 */ /* 0x000fc600078e0208 */ /*0640*/ FFMA R10, R3, R9, 1 ; /* 0x3f800000030a7423 */ /* 0x001fc80000000009 */ /*0650*/ FFMA R10, R3, R10, R3 ; /* 0x0000000a030a7223 */ /* 0x000fc80000000003 */ /*0660*/ FFMA R3, R0, R10, RZ ; /* 0x0000000a00037223 */ /* 0x000fc800000000ff */ /*0670*/ FFMA R6, R9, R3, R0 ; /* 0x0000000309067223 */ /* 0x000fc80000000000 */ /*0680*/ FFMA R11, R10, R6, R3 ; /* 0x000000060a0b7223 */ /* 0x000fc80000000003 */ /*0690*/ FFMA R6, R9, R11, R0 ; /* 0x0000000b09067223 */ /* 0x000fc80000000000 */ /*06a0*/ FFMA R3, R10, R6, R11 ; /* 0x000000060a037223 */ /* 0x000fca000000000b */ /*06b0*/ SHF.R.U32.HI R0, RZ, 0x17, R3 ; /* 0x00000017ff007819 */ /* 0x000fc80000011603 */ /*06c0*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fca00078ec0ff */ /*06d0*/ IMAD.IADD R8, R0, 0x1, R5 ; /* 0x0000000100087824 */ /* 0x000fca00078e0205 */ /*06e0*/ IADD3 R0, R8, -0x1, RZ ; /* 0xffffffff08007810 */ /* 0x000fc80007ffe0ff */ /*06f0*/ ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ; /* 0x000000fe0000780c */ /* 0x000fda0003f06070 */ /*0700*/ @!P0 BRA 0x910 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*0710*/ ISETP.GT.AND P0, PT, R8, 0xfe, PT ; /* 0x000000fe0800780c */ /* 0x000fda0003f04270 */ /*0720*/ @P0 BRA 0x8e0 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*0730*/ ISETP.GE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */ /* 0x000fda0003f06270 */ /*0740*/ @P0 BRA 0x9b0 ; /* 0x0000026000000947 */ /* 0x000fea0003800000 */ /*0750*/ ISETP.GE.AND P0, PT, R8, -0x18, PT ; /* 0xffffffe80800780c */ /* 0x000fe40003f06270 */ /*0760*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fd600078ec0ff */ /*0770*/ @!P0 BRA 0x9b0 ; /* 0x0000023000008947 */ /* 0x000fea0003800000 */ /*0780*/ FFMA.RZ R0, R10, R6.reuse, R11.reuse ; /* 0x000000060a007223 */ /* 0x180fe2000000c00b */ /*0790*/ IADD3 R7, R8, 0x20, RZ ; /* 0x0000002008077810 */ /* 0x000fe20007ffe0ff */ /*07a0*/ FFMA.RM R5, R10, R6.reuse, R11.reuse ; /* 0x000000060a057223 */ /* 0x180fe2000000400b */ /*07b0*/ ISETP.NE.AND P2, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f45270 */ /*07c0*/ LOP3.LUT R4, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00047812 */ /* 0x000fe200078ec0ff */ /*07d0*/ FFMA.RP R0, R10, R6, R11 ; /* 0x000000060a007223 */ /* 0x000fe2000000800b */ /*07e0*/ IMAD.MOV R6, RZ, RZ, -R8 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0a08 */ /*07f0*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f25270 */ /*0800*/ LOP3.LUT R4, R4, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000004047812 */ /* 0x000fc400078efcff */ /*0810*/ FSETP.NEU.FTZ.AND P0, PT, R0, R5, PT ; /* 0x000000050000720b */ /* 0x000fe40003f1d000 */ /*0820*/ SHF.L.U32 R7, R4, R7, RZ ; /* 0x0000000704077219 */ /* 0x000fe400000006ff */ /*0830*/ SEL R5, R6, RZ, P2 ; /* 0x000000ff06057207 */ /* 0x000fe40001000000 */ /*0840*/ ISETP.NE.AND P1, PT, R7, RZ, P1 ; /* 0x000000ff0700720c */ /* 0x000fe40000f25270 */ /*0850*/ SHF.R.U32.HI R5, RZ, R5, R4 ; /* 0x00000005ff057219 */ /* 0x000fe40000011604 */ /*0860*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40000703570 */ /*0870*/ SHF.R.U32.HI R7, RZ, 0x1, R5 ; /* 0x00000001ff077819 */ /* 0x000fe40000011605 */ /*0880*/ SEL R0, RZ, 0x1, !P0 ; /* 0x00000001ff007807 */ /* 0x000fc80004000000 */ /*0890*/ LOP3.LUT R0, R0, 0x1, R7, 0xf8, !PT ; /* 0x0000000100007812 */ /* 0x000fc800078ef807 */ /*08a0*/ LOP3.LUT R0, R0, R5, RZ, 0xc0, !PT ; /* 0x0000000500007212 */ /* 0x000fca00078ec0ff */ /*08b0*/ IMAD.IADD R0, R7, 0x1, R0 ; /* 0x0000000107007824 */ /* 0x000fca00078e0200 */ /*08c0*/ LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ; /* 0x0000000300037212 */ /* 0x000fe200078efcff */ /*08d0*/ BRA 0x9b0 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*08e0*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fc800078ec0ff */ /*08f0*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*0900*/ BRA 0x9b0 ; /* 0x000000a000007947 */ /* 0x000fea0003800000 */ /*0910*/ IMAD R3, R5, 0x800000, R3 ; /* 0x0080000005037824 */ /* 0x000fe200078e0203 */ /*0920*/ BRA 0x9b0 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*0930*/ LOP3.LUT R3, R7, 0x80000000, R6, 0x48, !PT ; /* 0x8000000007037812 */ /* 0x000fc800078e4806 */ /*0940*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*0950*/ BRA 0x9b0 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0960*/ LOP3.LUT R3, R7, 0x80000000, R6, 0x48, !PT ; /* 0x8000000007037812 */ /* 0x000fe200078e4806 */ /*0970*/ BRA 0x9b0 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*0980*/ MUFU.RSQ R3, -QNAN ; /* 0xffc0000000037908 */ /* 0x000e220000001400 */ /*0990*/ BRA 0x9b0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*09a0*/ FADD.FTZ R3, R0, R3 ; /* 0x0000000300037221 */ /* 0x000fc80000010000 */ /*09b0*/ IMAD.MOV.U32 R5, RZ, RZ, R3 ; /* 0x000000ffff057224 */ /* 0x001fe400078e0003 */ /*09c0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fc800078e00ff */ /*09d0*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff62002007950 */ /* 0x000fea0003c3ffff */ /*09e0*/ BRA 0x9e0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*09f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" char* concat(char *s1, char *s2); __global__ void r_final_sum_and_alpha_calculation(float * r_squared ,float * p_sum ,int size) { int index = threadIdx.x ; __shared__ float shared_r_squared[1024] ; __shared__ float shared_p_sum[1024] ; if (index < size) { shared_r_squared[index] = r_squared[index] ; shared_p_sum[index] = p_sum[index] ; } else { shared_r_squared[index] = 0 ; shared_p_sum[index] = 0 ; } __syncthreads() ; for (unsigned int s = blockDim.x/2 ; s> 0 ; s >>= 1) { if (index < s) { shared_r_squared[index] = shared_r_squared[index] + shared_r_squared[index +s] ; shared_p_sum[index] = shared_p_sum[index] + shared_p_sum[index +s] ; __syncthreads() ; } } if(threadIdx.x == 0) { //alpha r_squared[blockIdx.x] = shared_r_squared[0]/shared_p_sum[0] ; } }
.text .file "r_final_sum_and_alpha_calculation.hip" .globl _Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i # -- Begin function _Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i .type _Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i,@function _Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i: # @_Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z33r_final_sum_and_alpha_calculationPfS_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i, .Lfunc_end0-_Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z33r_final_sum_and_alpha_calculationPfS_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z33r_final_sum_and_alpha_calculationPfS_i,@object # @_Z33r_final_sum_and_alpha_calculationPfS_i .section .rodata,"a",@progbits .globl _Z33r_final_sum_and_alpha_calculationPfS_i .p2align 3, 0x0 _Z33r_final_sum_and_alpha_calculationPfS_i: .quad _Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i .size _Z33r_final_sum_and_alpha_calculationPfS_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z33r_final_sum_and_alpha_calculationPfS_i" .size .L__unnamed_1, 43 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z48__device_stub__r_final_sum_and_alpha_calculationPfS_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z33r_final_sum_and_alpha_calculationPfS_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z33r_final_sum_and_alpha_calculationPfS_i ; -- Begin function _Z33r_final_sum_and_alpha_calculationPfS_i .globl _Z33r_final_sum_and_alpha_calculationPfS_i .p2align 8 .type _Z33r_final_sum_and_alpha_calculationPfS_i,@function _Z33r_final_sum_and_alpha_calculationPfS_i: ; @_Z33r_final_sum_and_alpha_calculationPfS_i ; %bb.0: s_clause 0x1 s_load_b32 s3, s[0:1], 0x10 s_load_b128 s[4:7], s[0:1], 0x0 v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0 v_mov_b32_e32 v3, 0 s_mov_b32 s2, s15 s_waitcnt lgkmcnt(0) v_cmp_gt_i32_e32 vcc_lo, s3, v0 s_and_saveexec_b32 s3, vcc_lo ; %bb.1: s_clause 0x1 global_load_b32 v2, v1, s[4:5] global_load_b32 v3, v1, s[6:7] ; %bb.2: s_or_b32 exec_lo, exec_lo, s3 s_waitcnt vmcnt(0) ds_store_2addr_stride64_b32 v1, v3, v2 offset1:16 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv s_load_b32 s0, s[0:1], 0x24 s_waitcnt lgkmcnt(0) s_and_b32 s0, s0, 0xffff s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lt_u32 s0, 2 s_cbranch_scc1 .LBB0_7 ; %bb.3: ; %.lr.ph v_or_b32_e32 v2, 0x1000, v1 s_lshr_b32 s0, s0, 1 .LBB0_4: ; =>This Inner Loop Header: Depth=1 s_mov_b32 s1, exec_lo v_cmpx_gt_u32_e64 s0, v0 s_cbranch_execz .LBB0_6 ; %bb.5: ; in Loop: Header=BB0_4 Depth=1 s_lshl_b32 s3, s0, 2 s_delay_alu instid0(SALU_CYCLE_1) v_add_nc_u32_e32 v3, s3, v2 v_add_nc_u32_e32 v4, s3, v1 ds_load_b32 v5, v2 ds_load_b32 v3, v3 ds_load_b32 v6, v1 ds_load_b32 v4, v4 s_waitcnt lgkmcnt(0) v_dual_add_f32 v3, v5, v3 :: v_dual_add_f32 v4, v6, v4 ds_store_b32 v2, v3 ds_store_b32 v1, v4 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv .LBB0_6: ; in Loop: Header=BB0_4 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_lshr_b32 s1, s0, 1 s_cmp_lt_u32 s0, 2 s_mov_b32 s0, s1 s_cbranch_scc0 .LBB0_4 .LBB0_7: ; %._crit_edge s_mov_b32 s3, 0 s_mov_b32 s0, exec_lo v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB0_9 ; %bb.8: v_mov_b32_e32 v2, 0 s_lshl_b64 s[0:1], s[2:3], 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) s_add_u32 s0, s4, s0 s_addc_u32 s1, s5, s1 ds_load_2addr_stride64_b32 v[0:1], v2 offset1:16 s_waitcnt lgkmcnt(0) v_div_scale_f32 v3, null, v0, v0, v1 v_rcp_f32_e32 v4, v3 s_waitcnt_depctr 0xfff v_fma_f32 v5, -v3, v4, 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fmac_f32_e32 v4, v5, v4 v_div_scale_f32 v5, vcc_lo, v1, v0, v1 v_mul_f32_e32 v6, v5, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v7, -v3, v6, v5 v_fmac_f32_e32 v6, v7, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v3, -v3, v6, v5 v_div_fmas_f32 v3, v3, v4, v6 s_delay_alu instid0(VALU_DEP_1) v_div_fixup_f32 v0, v3, v0, v1 global_store_b32 v2, v0, s[0:1] .LBB0_9: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z33r_final_sum_and_alpha_calculationPfS_i .amdhsa_group_segment_fixed_size 8192 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 8 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z33r_final_sum_and_alpha_calculationPfS_i, .Lfunc_end0-_Z33r_final_sum_and_alpha_calculationPfS_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 432 ; NumSgprs: 18 ; NumVgprs: 8 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 8192 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 8 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 8192 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z33r_final_sum_and_alpha_calculationPfS_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z33r_final_sum_and_alpha_calculationPfS_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 8 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
a9a14e29a6ee2412b0f48d8a6f4a1737bde274e9
#include "rgb_pixels_factory.cuh" int RgbPixelsFactory::random(int max) { return rand() % max; } unsigned char RgbPixelsFactory::randomChar() { return random(256); } Pixel * RgbPixelsFactory::generate(int count, int maxX, int maxY) { Pixel* pixels = new Pixel[count]; for (int i = 0; i < count; i++) { pixels[i].color.red = randomChar(); pixels[i].color.green = randomChar(); pixels[i].color.blue = randomChar(); pixels[i].point.x = random(maxX); pixels[i].point.y = random(maxY); } return pixels; }
.file "tmpxft_002719bb_00000000-6_rgb_pixels_factory.cudafe1.cpp" .text #APP #NO_APP .align 2 .globl _ZN16RgbPixelsFactory8generateEiii .type _ZN16RgbPixelsFactory8generateEiii, @function _ZN16RgbPixelsFactory8generateEiii: .LFB2034: .cfi_startproc endbr64 movabsq $768614336404564650, %rax pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movslq %esi, %rbx subq $24, %rsp .cfi_def_cfa_offset 80 movl %edx, 12(%rsp) cmpq %rbx, %rax jb .L2 imulq $12, %rbx, %rdi movl %ecx, %r14d movq %rbx, %r12 call _Znam@PLT movq %rax, %r15 jmp .L3 .L2: call __cxa_throw_bad_array_new_length@PLT .L3: subq $1, %rbx jb .L9 xorl %edx, %edx movb $0, 8(%rax) addq $12, %rax movl %edx, -12(%rax) movl %edx, -8(%rax) movb $0, -3(%rax) movb $0, -2(%rax) jmp .L3 .L9: movq %r15, %rbx xorl %r13d, %r13d movl $256, %ebp .L5: cmpl %r12d, %r13d jge .L10 call rand@PLT incl %r13d addq $12, %rbx cltd idivl %ebp movb %dl, -4(%rbx) call rand@PLT cltd idivl %ebp movb %dl, -3(%rbx) call rand@PLT cltd idivl %ebp movb %dl, -2(%rbx) call rand@PLT cltd idivl 12(%rsp) movl %edx, -12(%rbx) call rand@PLT cltd idivl %r14d movl %edx, -8(%rbx) jmp .L5 .L10: addq $24, %rsp .cfi_def_cfa_offset 56 movq %r15, %rax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2034: .size _ZN16RgbPixelsFactory8generateEiii, .-_ZN16RgbPixelsFactory8generateEiii .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2037: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2037: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .align 2 .globl _ZN16RgbPixelsFactory6randomEi .type _ZN16RgbPixelsFactory6randomEi, @function _ZN16RgbPixelsFactory6randomEi: .LFB2032: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %esi, %ebx call rand@PLT cltd idivl %ebx popq %rbx .cfi_def_cfa_offset 8 movl %edx, %eax ret .cfi_endproc .LFE2032: .size _ZN16RgbPixelsFactory6randomEi, .-_ZN16RgbPixelsFactory6randomEi .align 2 .globl _ZN16RgbPixelsFactory10randomCharEv .type _ZN16RgbPixelsFactory10randomCharEv, @function _ZN16RgbPixelsFactory10randomCharEv: .LFB2033: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 call rand@PLT movl $256, %ecx cltd idivl %ecx movl %edx, %eax popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2033: .size _ZN16RgbPixelsFactory10randomCharEv, .-_ZN16RgbPixelsFactory10randomCharEv .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2060: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2060: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .weak _ZTS13PixelsFactory .section .rodata._ZTS13PixelsFactory,"aG",@progbits,_ZTS13PixelsFactory,comdat .align 16 .type _ZTS13PixelsFactory, @object .size _ZTS13PixelsFactory, 16 _ZTS13PixelsFactory: .string "13PixelsFactory" .weak _ZTI13PixelsFactory .section .data.rel.ro._ZTI13PixelsFactory,"awG",@progbits,_ZTI13PixelsFactory,comdat .align 8 .type _ZTI13PixelsFactory, @object .size _ZTI13PixelsFactory, 16 _ZTI13PixelsFactory: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTS13PixelsFactory .weak _ZTS16RgbPixelsFactory .section .rodata._ZTS16RgbPixelsFactory,"aG",@progbits,_ZTS16RgbPixelsFactory,comdat .align 16 .type _ZTS16RgbPixelsFactory, @object .size _ZTS16RgbPixelsFactory, 19 _ZTS16RgbPixelsFactory: .string "16RgbPixelsFactory" .weak _ZTI16RgbPixelsFactory .section .data.rel.ro._ZTI16RgbPixelsFactory,"awG",@progbits,_ZTI16RgbPixelsFactory,comdat .align 8 .type _ZTI16RgbPixelsFactory, @object .size _ZTI16RgbPixelsFactory, 24 _ZTI16RgbPixelsFactory: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTS16RgbPixelsFactory .quad _ZTI13PixelsFactory .weak _ZTV16RgbPixelsFactory .section .data.rel.ro.local._ZTV16RgbPixelsFactory,"awG",@progbits,_ZTV16RgbPixelsFactory,comdat .align 8 .type _ZTV16RgbPixelsFactory, @object .size _ZTV16RgbPixelsFactory, 24 _ZTV16RgbPixelsFactory: .quad 0 .quad _ZTI16RgbPixelsFactory .quad _ZN16RgbPixelsFactory8generateEiii .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> #include "rgb_pixels_factory.cuh" int RgbPixelsFactory::random(int max) { return rand() % max; } unsigned char RgbPixelsFactory::randomChar() { return random(256); } Pixel * RgbPixelsFactory::generate(int count, int maxX, int maxY) { Pixel* pixels = new Pixel[count]; for (int i = 0; i < count; i++) { pixels[i].color.red = randomChar(); pixels[i].color.green = randomChar(); pixels[i].color.blue = randomChar(); pixels[i].point.x = random(maxX); pixels[i].point.y = random(maxY); } return pixels; }
.text .file "rgb_pixels_factory.hip" .globl _ZN16RgbPixelsFactory6randomEi # -- Begin function _ZN16RgbPixelsFactory6randomEi .p2align 1, 0x90 .type _ZN16RgbPixelsFactory6randomEi,@function _ZN16RgbPixelsFactory6randomEi: # @_ZN16RgbPixelsFactory6randomEi .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl %esi, %ebx callq rand cltd idivl %ebx movl %edx, %eax popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _ZN16RgbPixelsFactory6randomEi, .Lfunc_end0-_ZN16RgbPixelsFactory6randomEi .cfi_endproc # -- End function .globl _ZN16RgbPixelsFactory10randomCharEv # -- Begin function _ZN16RgbPixelsFactory10randomCharEv .p2align 1, 0x90 .type _ZN16RgbPixelsFactory10randomCharEv,@function _ZN16RgbPixelsFactory10randomCharEv: # @_ZN16RgbPixelsFactory10randomCharEv .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 callq rand # kill: def $al killed $al killed $eax popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _ZN16RgbPixelsFactory10randomCharEv, .Lfunc_end1-_ZN16RgbPixelsFactory10randomCharEv .cfi_endproc # -- End function .globl _ZN16RgbPixelsFactory8generateEiii # -- Begin function _ZN16RgbPixelsFactory8generateEiii .p2align 1, 0x90 .type _ZN16RgbPixelsFactory8generateEiii,@function _ZN16RgbPixelsFactory8generateEiii: # @_ZN16RgbPixelsFactory8generateEiii .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %ecx, %ebx movl %edx, %ebp movl %esi, %r15d movslq %esi, %r12 movl $12, %ecx movq %r12, %rax mulq %rcx movq $-1, %rdi cmovnoq %rax, %rdi callq _Znam movq %rax, %r14 testl %r12d, %r12d je .LBB2_6 # %bb.1: shlq $2, %r12 leaq (%r12,%r12,2), %rax xorl %ecx, %ecx .LBB2_2: # =>This Inner Loop Header: Depth=1 movl $0, 7(%r14,%rcx) movq $0, (%r14,%rcx) addq $12, %rcx cmpq %rcx, %rax jne .LBB2_2 # %bb.3: # %.loopexit testl %r15d, %r15d jle .LBB2_6 # %bb.4: # %.lr.ph.preheader movl %r15d, %eax shlq $2, %rax leaq (%rax,%rax,2), %r15 xorl %r12d, %r12d .LBB2_5: # %.lr.ph # =>This Inner Loop Header: Depth=1 callq rand movb %al, 8(%r14,%r12) callq rand movb %al, 9(%r14,%r12) callq rand movb %al, 10(%r14,%r12) callq rand cltd idivl %ebp movl %edx, (%r14,%r12) callq rand cltd idivl %ebx movl %edx, 4(%r14,%r12) addq $12, %r12 cmpq %r12, %r15 jne .LBB2_5 .LBB2_6: # %._crit_edge movq %r14, %rax popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _ZN16RgbPixelsFactory8generateEiii, .Lfunc_end2-_ZN16RgbPixelsFactory8generateEiii .cfi_endproc # -- End function .type _ZTV16RgbPixelsFactory,@object # @_ZTV16RgbPixelsFactory .section .rodata,"a",@progbits .globl _ZTV16RgbPixelsFactory .p2align 3, 0x0 _ZTV16RgbPixelsFactory: .quad 0 .quad _ZTI16RgbPixelsFactory .quad _ZN16RgbPixelsFactory8generateEiii .size _ZTV16RgbPixelsFactory, 24 .type _ZTS16RgbPixelsFactory,@object # @_ZTS16RgbPixelsFactory .globl _ZTS16RgbPixelsFactory _ZTS16RgbPixelsFactory: .asciz "16RgbPixelsFactory" .size _ZTS16RgbPixelsFactory, 19 .type _ZTS13PixelsFactory,@object # @_ZTS13PixelsFactory .section .rodata._ZTS13PixelsFactory,"aG",@progbits,_ZTS13PixelsFactory,comdat .weak _ZTS13PixelsFactory _ZTS13PixelsFactory: .asciz "13PixelsFactory" .size _ZTS13PixelsFactory, 16 .type _ZTI13PixelsFactory,@object # @_ZTI13PixelsFactory .section .rodata._ZTI13PixelsFactory,"aG",@progbits,_ZTI13PixelsFactory,comdat .weak _ZTI13PixelsFactory .p2align 3, 0x0 _ZTI13PixelsFactory: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTS13PixelsFactory .size _ZTI13PixelsFactory, 16 .type _ZTI16RgbPixelsFactory,@object # @_ZTI16RgbPixelsFactory .section .rodata,"a",@progbits .globl _ZTI16RgbPixelsFactory .p2align 3, 0x0 _ZTI16RgbPixelsFactory: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTS16RgbPixelsFactory .quad _ZTI13PixelsFactory .size _ZTI16RgbPixelsFactory, 24 .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __gxx_personality_v0 .addrsig_sym _ZTVN10__cxxabiv120__si_class_type_infoE .addrsig_sym _ZTS16RgbPixelsFactory .addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE .addrsig_sym _ZTS13PixelsFactory .addrsig_sym _ZTI13PixelsFactory .addrsig_sym _ZTI16RgbPixelsFactory .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
aafc11177e300badb577fa4a4859855df3440d5c
// // CrossCorrelation.cu // CrossCorrelation // // Created by Vivek Sridhar on 29/06/17. // Copyright © 2017 Vivek Sridhar. All rights reserved. // #include <iostream> #include <fstream> #include <sstream> #include <vector> #include <algorithm> #include <stdio.h> #include <stdlib.h> #include <dirent.h> template <typename T> std::string to_string(const T& value) { std::stringstream ss; ss << value; return ss.str(); } long factorial(long val) { std::cout << val << "\n"; long result = 1; for (long i = 1; i <= val; ++i) { result *= i; } return result; } long combination(long n, long r) { return (factorial(n)) / ((factorial(n - r)) * factorial(r)); } __global__ void kernel(float *x1, float *y1, float *x2, float *y2, float *res, int tau, int na_frames, long nElements) { int index = blockIdx.x * blockDim.x + threadIdx.x; if (tau < 0) { if (index >= -tau+na_frames) { res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau]; } else res[index] = 0.0; } else { if (index < nElements - tau) { res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau]; } else res[index] = 0.0; } } // total measurement points in the time series is defined by nElements #define M 1024 // number of threads per block #define fps 10 // frames per second of input video (used to determine tau) #define time 5 // time in seconds within which time delayed cross correlation is calculated (tau ranges from -time*fps to time*fps) #define n_inds 10 int na_frames = 0; // number of frames in the start with nas int scale = 1; // time window for analysis in seconds; varying this allows us to examine dynamics of leadership across varying timescales; setting scale larger than the entire time series or -1 gives aggregated statistics across the entire duration (otherwise, timescale of analysis is scale*fps) //const int pairs = combination(n_inds, 2); const bool aggregate = false; // this boolean decides whether you output a dynamic time variable leadership network or a static time aggregated network; scale is set to -1 if aggregate is true std::ofstream outputFile1; int main () { DIR *dir; FILE *pFile_x1; FILE *pFile_y1; FILE *pFile_x2; FILE *pFile_y2; long lSize; long nElements; struct dirent *file; float *d_x1, *d_y1, *d_x2, *d_y2, *d_res; float *x1, *y1, *x2, *y2, *res; size_t result_x1, result_y1, result_x2, result_y2; if (aggregate) scale = -1; std::vector<std::string> files; std::string directory = "/home/user/Documents/Vivek/cuda/DirectionalCorrelation/Data/Input/pigeons/10_birds/ffA3/cross_correlation/"; dir = opendir(directory.c_str()); int idx = 0; while ((file = readdir(dir)) != NULL) { if (file->d_name[0] == 'd') { files.push_back(file->d_name); ++idx; } } std::sort(files.begin(), files.begin()+2*n_inds); closedir(dir); // Open output file std::string filename_cc; if (scale != -1) filename_cc = "cross_correlation_01.csv"; else filename_cc = "avgd_cross_correlation.csv"; outputFile1.open(filename_cc.c_str()); // Output file headers if (aggregate || scale == -1) outputFile1 << "id1"<< ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n"; else outputFile1 << "time" << ", " << "id1" << ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n"; //files = {"dir_x00", "dir_x01", "dir_y00", "dir_y01"} for (int a = 0; a < n_inds; ++a) { for (int b = 0; b < n_inds; ++b) { if (b != a) { pFile_x1 = fopen ((directory + files[a]).c_str(), "rb"); pFile_y1 = fopen ((directory + files[a+n_inds]).c_str(), "rb"); pFile_x2 = fopen ((directory + files[b]).c_str(), "rb"); pFile_y2 = fopen ((directory + files[b+n_inds]).c_str(), "rb"); if (pFile_x1==NULL || pFile_y1==NULL || pFile_x2==NULL || pFile_y2==NULL) { fputs ("File error",stderr); exit (1); } // obtain file size fseek (pFile_x1 , 0 , SEEK_END); lSize = ftell (pFile_x1); rewind (pFile_x1); nElements = lSize / sizeof(float); // allocate memory to contain the whole file // device memory cudaMalloc((void **) &d_x1, lSize); cudaMalloc((void **) &d_y1, lSize); cudaMalloc((void **) &d_x2, lSize); cudaMalloc((void **) &d_y2, lSize); cudaMalloc((void **) &d_res, lSize); // host memory x1 = (float*) malloc(lSize); y1 = (float*) malloc(lSize); x2 = (float*) malloc(lSize); y2 = (float*) malloc(lSize); res = (float*) malloc(lSize); if (x1 == NULL || y1==NULL || x2==NULL || y2==NULL || res==NULL) { fputs ("Memory error",stderr); exit (2); } // copy the file into the respective float pointers result_x1 = fread (x1, sizeof(float), nElements, pFile_x1); result_y1 = fread (y1, sizeof(float), nElements, pFile_y1); result_x2 = fread (x2, sizeof(float), nElements, pFile_x2); result_y2 = fread (y2, sizeof(float), nElements, pFile_y2); if (result_x1 != nElements || result_y1 != nElements || result_x2 != nElements || result_y2 != nElements) { fputs ("Reading error",stderr); exit (3); } // the whole files are now loaded in the memory x1, y1, x2 and y2 respectively cudaMemcpy(d_x1, x1, lSize, cudaMemcpyHostToDevice); cudaMemcpy(d_y1, y1, lSize, cudaMemcpyHostToDevice); cudaMemcpy(d_x2, x2, lSize, cudaMemcpyHostToDevice); cudaMemcpy(d_y2, y2, lSize, cudaMemcpyHostToDevice); if (scale*fps > nElements) scale = -1; int tau_max[nElements - scale*fps]; float res_tmp[nElements - scale*fps]; float res_max[nElements - scale*fps]; std::fill_n(tau_max, nElements - scale*fps, 0); std::fill_n(res_tmp, nElements - scale*fps, 0.0); std::fill_n(res_max, nElements - scale*fps, -1.0); for (int tau = -time*fps; tau <= time*fps; ++tau) { kernel<<<(nElements + M - 1) / M, M>>>(d_x1, d_y1, d_x2, d_y2, d_res, tau, na_frames, nElements); cudaMemcpy(res, d_res, lSize, cudaMemcpyDeviceToHost); if (scale == -1) { float res_now = -1.0f; for (int i = na_frames; i < nElements; ++i) { if (res[i] != res[i]) std::cout << x1[i] << " " << y1[i] << " " << i << " " << tau << "\n"; // if nans res_now += res[i]; } outputFile1 << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau << ", " << res_now / nElements << "\n"; } else { std::fill_n(res_tmp, nElements - scale*fps, 0.0); for (int i = na_frames; i < nElements - scale*fps; ++i) { for (int j = i; j < i + scale*fps; ++j) { res_tmp[i] += res[j]; if (j == i + scale*fps - 1 && res_max[i] < res_tmp[i]) { res_max[i] = res_tmp[i]; tau_max[i] = tau; } } } } } if (scale != -1) { for (int t = 0; t < nElements - scale*fps; ++t) { outputFile1 << t + scale*fps/2 << ", " << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau_max[t] << ", " << res_max[t] / (scale*fps) << "\n"; } } fclose(pFile_x1); fclose(pFile_x2); fclose(pFile_y1); fclose(pFile_y2); cudaFree(d_x1); cudaFree(d_y1); cudaFree(d_x2); cudaFree(d_y2); cudaFree(d_res); free(x1); free(y1); free(x2); free(y2); } } } // terminate fclose(pFile_x1); fclose(pFile_y1); fclose(pFile_x2); fclose(pFile_y2); return 0; }
.file "tmpxft_0036a36e_00000000-6_03_DirectionalCorrelation.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB4457: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE4457: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0,"axG",@progbits,_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_,comdat .align 2 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0, @function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0: .LFB5382: .cfi_startproc pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movq %rdi, %rbp movq %rsi, %rdi pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movq %rsi, %rbx call _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@PLT testb %al, %al je .L3 cmpq %rbp, %rbx je .L4 movq 8(%rbx), %rdx testq %rdx, %rdx je .L5 movq (%rbx), %rsi movq 0(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_copyEPcPKcm@PLT .L5: movq 8(%rbx), %rax movq 0(%rbp), %rdx movq %rax, 8(%rbp) movb $0, (%rdx,%rax) jmp .L4 .L3: movq %rbp, %rdi call _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@PLT movl %eax, %edx xorl %eax, %eax testb %dl, %dl jne .L6 movq 0(%rbp), %rax movq 16(%rbp), %r12 .L6: movq (%rbx), %rdx movq %rdx, 0(%rbp) movq 8(%rbx), %rdx movq %rdx, 8(%rbp) movq 16(%rbx), %rdx movq %rdx, 16(%rbp) testq %rax, %rax je .L7 movq %rax, (%rbx) movq %r12, 16(%rbx) jmp .L4 .L7: leaq 16(%rbx), %rax movq %rax, (%rbx) .L4: xorl %eax, %eax movq %rax, 8(%rbx) movq (%rbx), %rax movb $0, (%rax) popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5382: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 .section .rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0.str1.1,"aMS",@progbits,1 .LC0: .string "basic_string::append" .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0,"axG",@progbits,_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_,comdat .align 2 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0, @function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0: .LFB5383: .cfi_startproc movabsq $4611686018427387903, %rax subq 8(%rdi), %rax cmpq %rdx, %rax jnb .L15 pushq %rax .cfi_def_cfa_offset 16 leaq .LC0(%rip), %rdi call _ZSt20__throw_length_errorPKc@PLT .L15: .cfi_def_cfa_offset 8 jmp _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT .cfi_endproc .LFE5383: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0 .section .rodata.str1.1,"aMS",@progbits,1 .LC1: .string "\n" .text .globl _Z9factoriall .type _Z9factoriall, @function _Z9factoriall: .LFB4441: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rsi movq %rdi, %rbx leaq _ZSt4cout(%rip), %rdi call _ZNSo9_M_insertIlEERSoT_@PLT leaq .LC1(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl $1, %eax movl $1, %edx .L20: cmpq %rbx, %rax jg .L23 imulq %rax, %rdx incq %rax jmp .L20 .L23: movq %rdx, %rax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE4441: .size _Z9factoriall, .-_Z9factoriall .globl _Z11combinationll .type _Z11combinationll, @function _Z11combinationll: .LFB4442: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movq %rsi, %r12 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 call _Z9factoriall movq %rbp, %rdi subq %r12, %rdi movq %rax, %rbx call _Z9factoriall movq %r12, %rdi movq %rax, %rbp call _Z9factoriall movq %rbp, %rcx imulq %rax, %rcx movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 cqto popq %r12 .cfi_def_cfa_offset 8 idivq %rcx ret .cfi_endproc .LFE4442: .size _Z11combinationll, .-_Z11combinationll .globl _Z36__device_stub__Z6kernelPfS_S_S_S_iilPfS_S_S_S_iil .type _Z36__device_stub__Z6kernelPfS_S_S_S_iilPfS_S_S_S_iil, @function _Z36__device_stub__Z6kernelPfS_S_S_S_iilPfS_S_S_S_iil: .LFB4479: .cfi_startproc endbr64 subq $200, %rsp .cfi_def_cfa_offset 208 movq %rdi, 40(%rsp) leaq 72(%rsp), %rdi movq %rsi, 32(%rsp) leaq 84(%rsp), %rsi movq %rdx, 24(%rsp) leaq 56(%rsp), %rdx movq %rcx, 16(%rsp) leaq 64(%rsp), %rcx movq %r8, 8(%rsp) movl %r9d, 4(%rsp) movq %fs:40, %rax movq %rax, 184(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 80(%rsp) movq %rax, 120(%rsp) leaq 32(%rsp), %rax movq %rax, 128(%rsp) leaq 24(%rsp), %rax movq %rax, 136(%rsp) leaq 16(%rsp), %rax movq %rax, 144(%rsp) leaq 8(%rsp), %rax movq %rax, 152(%rsp) leaq 4(%rsp), %rax movq %rax, 160(%rsp) leaq 208(%rsp), %rax movq %rax, 168(%rsp) leaq 216(%rsp), %rax movq %rax, 176(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L26 pushq 64(%rsp) .cfi_def_cfa_offset 216 leaq _Z6kernelPfS_S_S_S_iil(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 224 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 136(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 216 popq %rdx .cfi_def_cfa_offset 208 .L26: movq 184(%rsp), %rax subq %fs:40, %rax je .L28 call __stack_chk_fail@PLT .L28: addq $200, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE4479: .size _Z36__device_stub__Z6kernelPfS_S_S_S_iilPfS_S_S_S_iil, .-_Z36__device_stub__Z6kernelPfS_S_S_S_iilPfS_S_S_S_iil .globl _Z6kernelPfS_S_S_S_iil .type _Z6kernelPfS_S_S_S_iil, @function _Z6kernelPfS_S_S_S_iil: .LFB4480: .cfi_startproc endbr64 jmp _Z36__device_stub__Z6kernelPfS_S_S_S_iilPfS_S_S_S_iil .cfi_endproc .LFE4480: .size _Z6kernelPfS_S_S_S_iil, .-_Z6kernelPfS_S_S_S_iil .section .rodata.str1.1 .LC2: .string "_Z6kernelPfS_S_S_S_iil" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB4482: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC2(%rip), %rdx movq %rax, %rdi leaq _Z6kernelPfS_S_S_S_iil(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE4482: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .text._ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev,"axG",@progbits,_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED5Ev,comdat .align 2 .weak _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .type _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev, @function _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev: .LFB4813: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movq 8(%rdi), %r12 movq %rdi, %rbx movq (%rdi), %rbp .L34: cmpq %rbp, %r12 je .L38 movq %rbp, %rdi addq $32, %rbp call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L34 .L38: movq (%rbx), %rdi testq %rdi, %rdi je .L33 movq 16(%rbx), %rsi popq %rbx .cfi_remember_state .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 subq %rdi, %rsi jmp _ZdlPvm@PLT .L33: .cfi_restore_state popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE4813: .size _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev, .-_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .weak _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED1Ev .set _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED1Ev,_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .section .rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1 .LC3: .string "basic_string: construction from null is not valid" .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat .align 2 .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: .LFB4816: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $16, %rsp .cfi_def_cfa_offset 48 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax leaq 16(%rdi), %rax movq %rax, (%rdi) testq %rsi, %rsi jne .L40 movq 8(%rsp), %rax subq %fs:40, %rax jne .L45 leaq .LC3(%rip), %rdi call _ZSt19__throw_logic_errorPKc@PLT .L40: movq %rdi, %rbx movq %rsi, %rdi movq %rsi, %rbp call strlen@PLT movq %rax, (%rsp) leaq 0(%rbp,%rax), %r12 cmpq $15, %rax jbe .L42 movq %rsp, %rsi xorl %edx, %edx movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT movq %rax, (%rbx) movq (%rsp), %rax movq %rax, 16(%rbx) .L42: movq (%rbx), %rdi movq %r12, %rdx movq %rbp, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT movq (%rsp), %rax movq (%rbx), %rdx movq %rax, 8(%rbx) movb $0, (%rdx,%rax) movq 8(%rsp), %rax subq %fs:40, %rax je .L43 .L45: call __stack_chk_fail@PLT .L43: addq $16, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE4816: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .set _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .section .text._ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_,"axG",@progbits,_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_,comdat .weak _ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_ .type _ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_, @function _ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_: .LFB4828: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA4828 endbr64 leaq 16(%rdi), %rax pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movq 8(%rdx), %rbp movq %rdi, %rbx movq 8(%rsi), %r12 movq (%rsi), %r14 movq (%rdx), %r13 movq %rax, (%rdi) xorl %eax, %eax movq %rax, 8(%rdi) leaq 0(%rbp,%r12), %rsi movb $0, 16(%rdi) .LEHB0: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm@PLT movq %r12, %rdx movq %r14, %rsi movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0 movq %rbp, %rdx movq %r13, %rsi movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm.isra.0 .LEHE0: movq %rbx, %rax popq %rbx .cfi_remember_state .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .L49: .cfi_restore_state endbr64 movq %rax, %rbp .L48: movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbp, %rdi .LEHB1: call _Unwind_Resume@PLT .LEHE1: .cfi_endproc .LFE4828: .globl __gxx_personality_v0 .section .gcc_except_table._ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_,"aG",@progbits,_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_,comdat .LLSDA4828: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE4828-.LLSDACSB4828 .LLSDACSB4828: .uleb128 .LEHB0-.LFB4828 .uleb128 .LEHE0-.LEHB0 .uleb128 .L49-.LFB4828 .uleb128 0 .uleb128 .LEHB1-.LFB4828 .uleb128 .LEHE1-.LEHB1 .uleb128 0 .uleb128 0 .LLSDACSE4828: .section .text._ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_,"axG",@progbits,_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_,comdat .size _ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_, .-_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_ .section .text._Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,"axG",@progbits,_Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,comdat .weak _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .type _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_, @function _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_: .LFB4834: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA4834 endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movq %rsi, %r12 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movq %rdi, %rbx subq $416, %rsp .cfi_def_cfa_offset 448 movq %fs:40, %rax movq %rax, 408(%rsp) xorl %eax, %eax leaq 16(%rsp), %rbp movq %rbp, %rdi .LEHB2: call _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev@PLT .LEHE2: movq 32(%rsp), %rax movsbl (%r12), %esi leaq 32(%rsp), %rdi movq -24(%rax), %rax movb %sil, 15(%rsp) cmpq $0, 48(%rsp,%rax) je .L53 leaq 15(%rsp), %rsi movl $1, %edx .LEHB3: call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT .L55: leaq 40(%rsp), %rsi movq %rbx, %rdi call _ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@PLT jmp .L63 .L53: call _ZNSo3putEc@PLT .LEHE3: jmp .L55 .L63: movq %rbp, %rdi call _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT movq 408(%rsp), %rax subq %fs:40, %rax je .L58 jmp .L61 .L59: endbr64 movq %rax, %rbx .L56: movq %rbp, %rdi call _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT movq 408(%rsp), %rax subq %fs:40, %rax jne .L61 movq %rbx, %rdi .LEHB4: call _Unwind_Resume@PLT .LEHE4: .L61: call __stack_chk_fail@PLT .L58: addq $416, %rsp .cfi_def_cfa_offset 32 movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE4834: .section .gcc_except_table._Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,"aG",@progbits,_Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,comdat .LLSDA4834: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE4834-.LLSDACSB4834 .LLSDACSB4834: .uleb128 .LEHB2-.LFB4834 .uleb128 .LEHE2-.LEHB2 .uleb128 0 .uleb128 0 .uleb128 .LEHB3-.LFB4834 .uleb128 .LEHE3-.LEHB3 .uleb128 .L59-.LFB4834 .uleb128 0 .uleb128 .LEHB4-.LFB4834 .uleb128 .LEHE4-.LEHB4 .uleb128 0 .uleb128 0 .LLSDACSE4834: .section .text._Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,"axG",@progbits,_Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,comdat .size _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_, .-_Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .section .rodata._ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_.str1.1,"aMS",@progbits,1 .LC4: .string "vector::_M_realloc_insert" .section .text._ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_,"axG",@progbits,_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_,comdat .align 2 .weak _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_ .type _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_, @function _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_: .LFB5133: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movq %rdx, %r15 movabsq $288230376151711743, %rdx pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $24, %rsp .cfi_def_cfa_offset 80 movq 8(%rdi), %rax movq (%rdi), %r14 movq %rsi, 8(%rsp) movq %rax, %rbx movq %rax, (%rsp) subq %r14, %rbx sarq $5, %rbx cmpq %rdx, %rbx jne .L65 leaq .LC4(%rip), %rdi call _ZSt20__throw_length_errorPKc@PLT .L65: cmpq %r14, (%rsp) movl $1, %eax movq 8(%rsp), %rbp movq %rdi, %r13 cmovne %rbx, %rax addq %rax, %rbx setc %al subq %r14, %rbp movzbl %al, %eax testq %rax, %rax jne .L77 xorl %r12d, %r12d testq %rbx, %rbx je .L70 movabsq $288230376151711743, %rax cmpq %rax, %rbx cmova %rax, %rbx jmp .L69 .L77: movq %rdx, %rbx .L69: movq %rbx, %rdi salq $5, %rdi call _Znwm@PLT movq %rax, %r12 .L70: leaq (%r12,%rbp), %rdi movq %r15, %rsi movq %r14, %rbp call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %r12, %rdi .L71: leaq 32(%rdi), %r15 cmpq %rbp, 8(%rsp) je .L73 movq %rbp, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %rbp, %rdi addq $32, %rbp call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %r15, %rdi jmp .L71 .L73: movq (%rsp), %rax cmpq %rax, %rbp je .L84 movq %rbp, %rsi movq %r15, %rdi addq $32, %r15 call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %rbp, %rdi addq $32, %rbp call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L73 .L84: testq %r14, %r14 je .L75 movq 16(%r13), %rsi movq %r14, %rdi subq %r14, %rsi call _ZdlPvm@PLT .L75: salq $5, %rbx movq %r12, 0(%r13) addq %rbx, %r12 movq %r15, 8(%r13) movq %r12, 16(%r13) addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5133: .size _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_, .-_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_ .section .text._ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_,"axG",@progbits,_ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_,comdat .weak _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ .type _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_, @function _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_: .LFB5325: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 call _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_@PLT popq %rdx .cfi_def_cfa_offset 8 shrl $31, %eax ret .cfi_endproc .LFE5325: .size _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_, .-_ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ .section .text._ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_.isra.0,"axG",@progbits,_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_,comdat .type _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_.isra.0, @function _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_.isra.0: .LFB5397: .cfi_startproc pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movq %rsi, %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rsi, %r13 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movq %rdx, %rbp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movq %rdi, %rbx subq $72, %rsp .cfi_def_cfa_offset 128 movq %rcx, (%rsp) movl $2, %ecx movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax leaq -1(%rdx), %rax cqto idivq %rcx movq %rax, 8(%rsp) .L88: movq 8(%rsp), %rax cmpq %rax, %r13 jge .L99 leaq 1(%r13), %rdx leaq (%rdx,%rdx), %r15 leaq -1(%r15), %r12 movq %r15, %rdi movq %r12, %rsi salq $5, %rdi salq $5, %rsi addq %rbx, %rdi addq %rbx, %rsi call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ testb %al, %al cmove %r15, %r12 salq $5, %r13 leaq (%rbx,%r13), %rdi movq %r12, %rsi movq %r12, %r13 salq $5, %rsi addq %rbx, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 jmp .L88 .L99: testl $1, %ebp jne .L91 leaq -2(%rbp), %rax movl $2, %ecx cqto idivq %rcx cmpq %rax, %r13 jne .L91 leaq 1(%r13,%r13), %rbp salq $5, %r13 movq %rbp, %rsi leaq (%rbx,%r13), %rdi movq %rbp, %r13 salq $5, %rsi addq %rbx, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 .L91: movq (%rsp), %rsi leaq 24(%rsp), %r12 movl $2, %r15d movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT leaq -1(%r13), %rax movl $2, %ecx cqto idivq %rcx movq %rax, %rbp .L93: movq %r13, %rax salq $5, %rax addq %rbx, %rax movq %rax, (%rsp) cmpq %r13, %r14 jge .L92 movq %rbp, %r13 movq %r12, %rsi salq $5, %r13 addq %rbx, %r13 movq %r13, %rdi call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ testb %al, %al je .L92 movq (%rsp), %rdi movq %r13, %rsi movq %rbp, %r13 call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 leaq -1(%rbp), %rax cqto idivq %r15 movq %rax, %rbp jmp .L93 .L92: movq (%rsp), %rdi movq %r12, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L94 call __stack_chk_fail@PLT .L94: addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5397: .size _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_.isra.0, .-_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_.isra.0 .section .text._ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_.isra.0,"axG",@progbits,_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_,comdat .type _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_.isra.0, @function _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_.isra.0: .LFB5399: .cfi_startproc pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movq %rdx, %r12 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movq %rsi, %rbx movq %rdx, %rsi subq %rbp, %rbx subq $88, %rsp .cfi_def_cfa_offset 128 movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 8(%rsp), %r13 movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %r12, %rdi movq %rbp, %rsi leaq 40(%rsp), %r12 call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 movq %r13, %rsi movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %rbx, %rdx xorl %esi, %esi movq %r12, %rcx sarq $5, %rdx movq %rbp, %rdi call _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_.isra.0 movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 72(%rsp), %rax subq %fs:40, %rax je .L101 call __stack_chk_fail@PLT .L101: addq $88, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5399: .size _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_.isra.0, .-_ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_.isra.0 .section .text._ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_.isra.0,"axG",@progbits,_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_,comdat .type _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_.isra.0, @function _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_.isra.0: .LFB5400: .cfi_startproc pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 movq %rdi, %rsi pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movq %rdi, %rbx subq $32, %rbx subq $56, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax leaq 8(%rsp), %rbp movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT .L104: movq %rbx, %rsi movq %rbp, %rdi leaq 32(%rbx), %r12 movq %rbx, %r13 call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ subq $32, %rbx testb %al, %al je .L108 movq %r13, %rsi movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 jmp .L104 .L108: movq %r12, %rdi movq %rbp, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 40(%rsp), %rax subq %fs:40, %rax je .L106 call __stack_chk_fail@PLT .L106: addq $56, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5400: .size _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_.isra.0, .-_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_.isra.0 .section .text._ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_.isra.0,"axG",@progbits,_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_,comdat .type _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_.isra.0, @function _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_.isra.0: .LFB5401: .cfi_startproc pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movq %rdx, %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movq %rdi, %rbx subq $104, %rsp .cfi_def_cfa_offset 160 movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 32(%rdi), %rax movq %rax, 8(%rsp) .L110: movq %rbp, %rax subq %rbx, %rax cmpq $512, %rax jle .L109 movq %rax, %r14 sarq $5, %r14 testq %r12, %r12 jne .L111 leaq -2(%r14), %r12 leaq 24(%rsp), %r13 sarq %r12 .L114: movq %r12, %rsi leaq 56(%rsp), %r15 movq %r13, %rdi salq $5, %rsi addq %rbx, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %r13, %rsi movq %r15, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %rbx, %rdi movq %r15, %rcx movq %r14, %rdx movq %r12, %rsi call _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_.isra.0 movq %r15, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT testq %r12, %r12 jne .L112 movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L113 .L112: movq %r13, %rdi decq %r12 call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L114 .L113: movq %rbp, %rax subq $32, %rbp subq %rbx, %rax cmpq $32, %rax jle .L109 movq %rbp, %rdx movq %rbp, %rsi movq %rbx, %rdi call _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_.isra.0 jmp .L113 .L111: sarq $6, %rax movq 8(%rsp), %r15 leaq -32(%rbp), %r14 salq $5, %rax leaq (%rbx,%rax), %r13 movq %r15, %rdi movq %r13, %rsi call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ movq %r14, %rsi testb %al, %al je .L117 movq %r13, %rdi call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ testb %al, %al jne .L123 movq 8(%rsp), %rdi movq %r14, %rsi call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ testb %al, %al je .L120 jmp .L133 .L117: movq 8(%rsp), %rdi call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ testb %al, %al je .L122 .L120: movq 8(%rsp), %rsi .L132: movq %rbx, %rdi movq %rbp, %r14 call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4swapERS4_@PLT jmp .L121 .L122: movq %r14, %rsi movq %r13, %rdi call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ testb %al, %al je .L123 .L133: movq %r14, %rsi jmp .L132 .L123: movq %r13, %rsi jmp .L132 .L126: movq %r15, %rdi movq %r14, %rsi addq $32, %r15 call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4swapERS4_@PLT .L121: movq %r15, %rax .L124: movq %rbx, %rsi movq %rax, %rdi movq %rax, %r15 call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ movl %eax, %edx leaq 32(%r15), %rax testb %dl, %dl jne .L124 leaq -32(%r14), %r13 .L125: movq %r13, %rsi movq %rbx, %rdi movq %r13, %r14 subq $32, %r13 call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ testb %al, %al jne .L125 cmpq %r14, %r15 jb .L126 decq %r12 movq %rbp, %rsi movq %r15, %rdi movq %r15, %rbp movq %r12, %rdx call _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_.isra.0 jmp .L110 .L109: movq 88(%rsp), %rax subq %fs:40, %rax je .L128 call __stack_chk_fail@PLT .L128: addq $104, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5401: .size _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_.isra.0, .-_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_.isra.0 .section .text._ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_.isra.0,"axG",@progbits,_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_,comdat .type _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_.isra.0, @function _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_.isra.0: .LFB5407: .cfi_startproc pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $56, %rsp .cfi_def_cfa_offset 112 movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax cmpq %rsi, %rdi je .L134 movq %rdi, %rbp leaq 32(%rdi), %rbx leaq 8(%rsp), %r13 movq %rsi, %r12 .L136: cmpq %rbx, %r12 je .L134 movq %rbp, %rsi movq %rbx, %rdi leaq 32(%rbx), %r14 call _ZStltIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EESA_ testb %al, %al je .L137 movq %rbx, %rsi movq %r13, %rdi subq %rbp, %rbx movq %r14, %r15 call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT sarq $5, %rbx .L138: testq %rbx, %rbx jle .L147 leaq -64(%r15), %rsi subq $32, %r15 decq %rbx movq %r15, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 jmp .L138 .L147: movq %rbp, %rdi movq %r13, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_.isra.0 movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L140 .L137: movq %rbx, %rdi call _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_.isra.0 .L140: movq %r14, %rbx jmp .L136 .L134: movq 40(%rsp), %rax subq %fs:40, %rax je .L143 call __stack_chk_fail@PLT .L143: addq $56, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5407: .size _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_.isra.0, .-_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_.isra.0 .section .text._ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_,"axG",@progbits,_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_,comdat .weak _ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_ .type _ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_, @function _ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_: .LFB4821: .cfi_startproc endbr64 cmpq %rdi, %rsi je .L157 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 movq %rsi, %rbp subq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 movq %rsi, %rbx movq %rbp, %rax sarq $5, %rax subq $24, %rsp .cfi_def_cfa_offset 48 bsrq %rax, %rdx xorq $63, %rdx testq %rax, %rax movl $64, %eax movq %rdi, 8(%rsp) cmovne %edx, %eax movl $63, %edx subl %eax, %edx movslq %edx, %rdx addq %rdx, %rdx call _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_.isra.0 cmpq $512, %rbp movq 8(%rsp), %rdi jle .L151 leaq 512(%rdi), %rbp movq %rbp, %rsi call _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_.isra.0 .L152: cmpq %rbx, %rbp je .L160 movq %rbp, %rdi addq $32, %rbp call _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_.isra.0 jmp .L152 .L151: addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 24 movq %rbx, %rsi popq %rbx .cfi_restore 3 .cfi_def_cfa_offset 16 popq %rbp .cfi_restore 6 .cfi_def_cfa_offset 8 jmp _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_.isra.0 .L160: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .L157: .cfi_restore 3 .cfi_restore 6 ret .cfi_endproc .LFE4821: .size _ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_, .-_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_ .section .rodata.str1.1 .LC6: .string "/home/user/Documents/Vivek/cuda/DirectionalCorrelation/Data/Input/pigeons/10_birds/ffA3/cross_correlation/" .LC7: .string "cross_correlation_01.csv" .LC8: .string "avgd_cross_correlation.csv" .LC9: .string "id1" .LC10: .string ", " .LC11: .string "id2" .LC12: .string "tau" .LC13: .string "cc" .LC14: .string "time" .LC15: .string "rb" .LC16: .string "File error" .LC17: .string "Memory error" .LC18: .string "Reading error" .LC20: .string " " .section .text.startup .globl main .type main, @function main: .LFB4443: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA4443 endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 xorl %r9d, %r9d leaq .LC6(%rip), %rsi movq %rsp, %rbp .cfi_def_cfa_register 6 pushq %r15 pushq %r14 leaq -312(%rbp), %rdi pushq %r13 .cfi_offset 15, -24 .cfi_offset 14, -32 .cfi_offset 13, -40 leaq -348(%rbp), %r13 pushq %r12 movq %r13, %rdx pushq %rbx subq $568, %rsp .cfi_offset 12, -48 .cfi_offset 3, -56 movq %fs:40, %rax movq %rax, -56(%rbp) xorl %eax, %eax movq %r9, -336(%rbp) movq %r9, -328(%rbp) movq %r9, -320(%rbp) .LEHB5: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE5: movq -312(%rbp), %rdi .LEHB6: call opendir@PLT movq %rax, %r12 .L163: movq %r12, %rdi call readdir@PLT testq %rax, %rax je .L309 cmpb $100, 19(%rax) jne .L163 leaq -88(%rbp), %rbx leaq 19(%rax), %rsi movq %r13, %rdx movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE6: movq -328(%rbp), %r14 cmpq -320(%rbp), %r14 je .L164 movq %r14, %rdi movq %rbx, %rsi addq $32, %r14 call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %r14, -328(%rbp) jmp .L165 .L164: leaq -336(%rbp), %rdi movq %rbx, %rdx movq %r14, %rsi .LEHB7: call _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_ .LEHE7: .L165: movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L163 .L309: movq -336(%rbp), %rdi leaq 640(%rdi), %rsi call _ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_ movq %r12, %rdi .LEHB8: call closedir@PLT .LEHE8: xorl %r8d, %r8d leaq -264(%rbp), %rax cmpl $-1, scale(%rip) movb $0, -264(%rbp) movq %r8, -272(%rbp) leaq -280(%rbp), %rdi movl $24, %r8d leaq .LC7(%rip), %rcx movq %rax, -280(%rbp) jne .L289 movl $26, %r8d leaq .LC8(%rip), %rcx .L289: xorl %edx, %edx xorl %esi, %esi .LEHB9: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT leaq outputFile1(%rip), %r12 movq -280(%rbp), %rsi movl $16, %edx movq %r12, %rdi call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT cmpl $-1, scale(%rip) leaq .LC9(%rip), %r15 leaq .LC10(%rip), %rbx leaq .LC11(%rip), %r14 leaq .LC12(%rip), %r13 jne .L169 movq %r15, %rsi movq %r12, %rdi jmp .L308 .L169: leaq .LC14(%rip), %rsi movq %r12, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq %rbx, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq %r15, %rsi .L308: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq %rbx, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq %r14, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq %rbx, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq %r13, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq %rbx, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi leaq .LC13(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi leaq .LC1(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT .LEHE9: xorl %edi, %edi movq %rdi, -512(%rbp) .L171: movq -512(%rbp), %rax salq $5, %rax movq %rax, -544(%rbp) addq $320, %rax movq %rax, -600(%rbp) xorl %eax, %eax movq %rax, -504(%rbp) .L221: movl -512(%rbp), %eax cmpl %eax, -504(%rbp) je .L172 movq -544(%rbp), %rax movq -336(%rbp), %r14 leaq -88(%rbp), %rbx movq %rsp, -536(%rbp) movq %rbx, %rdi leaq (%r14,%rax), %r12 leaq -312(%rbp), %rax movq %r12, %rdx movq %rax, %rsi movq %rax, -408(%rbp) .LEHB10: call _ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_ .LEHE10: movq -88(%rbp), %rdi leaq .LC15(%rip), %rsi .LEHB11: call fopen@PLT .LEHE11: movq %rbx, %rdi movq %rax, -416(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -600(%rbp), %rax movq -408(%rbp), %rsi movq %rbx, %rdi leaq (%r14,%rax), %rdx .LEHB12: call _ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_ .LEHE12: movq -88(%rbp), %rdi leaq .LC15(%rip), %rsi .LEHB13: call fopen@PLT .LEHE13: movq %rbx, %rdi movq %rax, -464(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -504(%rbp), %r13 movq -408(%rbp), %rsi movq %rbx, %rdi salq $5, %r13 leaq (%r14,%r13), %r15 movq %r15, %rdx .LEHB14: call _ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_ .LEHE14: movq -88(%rbp), %rdi leaq .LC15(%rip), %rsi .LEHB15: call fopen@PLT .LEHE15: movq %rbx, %rdi movq %rax, -472(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -408(%rbp), %rsi leaq 320(%r14,%r13), %rdx movq %rbx, %rdi .LEHB16: call _ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_ .LEHE16: movq -88(%rbp), %rdi leaq .LC15(%rip), %rsi .LEHB17: call fopen@PLT .LEHE17: movq %rbx, %rdi movq %rax, -480(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT cmpq $0, -416(%rbp) je .L173 cmpq $0, -464(%rbp) je .L173 cmpq $0, -472(%rbp) je .L173 cmpq $0, -480(%rbp) jne .L174 .L173: movq stderr(%rip), %rsi leaq .LC16(%rip), %rdi .LEHB18: call fputs@PLT movl $1, %edi jmp .L293 .L174: movq -416(%rbp), %rdi movl $2, %edx xorl %esi, %esi call fseek@PLT movq -416(%rbp), %rdi call ftell@PLT movq -416(%rbp), %rdi movq %rax, -408(%rbp) call rewind@PLT movq -408(%rbp), %r14 movq -408(%rbp), %rsi leaq -400(%rbp), %rdi shrq $2, %r14 call cudaMalloc@PLT movq -408(%rbp), %rsi leaq -392(%rbp), %rdi call cudaMalloc@PLT movq -408(%rbp), %rsi leaq -384(%rbp), %rdi call cudaMalloc@PLT movq -408(%rbp), %rsi leaq -376(%rbp), %rdi call cudaMalloc@PLT movq -408(%rbp), %rsi leaq -368(%rbp), %rdi call cudaMalloc@PLT movq -408(%rbp), %rdi call malloc@PLT movq -408(%rbp), %rdi movq %rax, -440(%rbp) call malloc@PLT movq -408(%rbp), %rdi movq %rax, -448(%rbp) call malloc@PLT movq -408(%rbp), %rdi movq %rax, -488(%rbp) call malloc@PLT movq -408(%rbp), %rdi movq %rax, -496(%rbp) call malloc@PLT cmpq $0, -440(%rbp) movq %rax, %r13 je .L176 cmpq $0, -448(%rbp) je .L176 cmpq $0, -488(%rbp) sete %al cmpq $0, -496(%rbp) sete %dl orb %dl, %al jne .L176 testq %r13, %r13 jne .L177 .L176: movq stderr(%rip), %rsi leaq .LC17(%rip), %rdi call fputs@PLT movl $2, %edi .L293: call exit@PLT .L177: movq -416(%rbp), %r8 movq -408(%rbp), %rsi movq %r14, %rcx movl $4, %edx movq -440(%rbp), %rdi call __fread_chk@PLT movq -464(%rbp), %r8 movq -408(%rbp), %rsi movq %r14, %rcx movl $4, %edx movq -448(%rbp), %rdi movq %rax, -432(%rbp) call __fread_chk@PLT movq -472(%rbp), %r8 movq -408(%rbp), %rsi movq %r14, %rcx movl $4, %edx movq -488(%rbp), %rdi movq %rax, -424(%rbp) call __fread_chk@PLT movq -480(%rbp), %r8 movq -408(%rbp), %rsi movq %r14, %rcx movq %rax, %rbx movq -496(%rbp), %rdi movl $4, %edx call __fread_chk@PLT movq -432(%rbp), %rcx cmpq %rcx, %r14 jne .L179 movq -424(%rbp), %rcx cmpq %rcx, %r14 jne .L179 cmpq %rbx, %r14 jne .L179 cmpq %rax, %r14 je .L180 .L179: movq stderr(%rip), %rsi leaq .LC18(%rip), %rdi call fputs@PLT movl $3, %edi jmp .L293 .L180: movq -408(%rbp), %rdx movq -440(%rbp), %rsi movl $1, %ecx movq -400(%rbp), %rdi call cudaMemcpy@PLT movq -408(%rbp), %rdx movq -448(%rbp), %rsi movl $1, %ecx movq -392(%rbp), %rdi call cudaMemcpy@PLT movq -408(%rbp), %rdx movq -488(%rbp), %rsi movl $1, %ecx movq -384(%rbp), %rdi call cudaMemcpy@PLT movq -408(%rbp), %rdx movq -496(%rbp), %rsi movl $1, %ecx movq -376(%rbp), %rdi call cudaMemcpy@PLT imull $10, scale(%rip), %eax cltq cmpq %r14, %rax jle .L182 movl $-1, scale(%rip) .L182: imull $10, scale(%rip), %eax movq %r14, %rsi movq %rsp, %rdi cltq subq %rax, %rsi leaq 0(,%rsi,4), %rax leaq 15(%rax), %rcx movq %rcx, %rdx andq $-4096, %rcx andq $-16, %rdx subq %rcx, %rdi .L183: cmpq %rdi, %rsp je .L184 subq $4096, %rsp orq $0, 4088(%rsp) jmp .L183 .L184: andl $4095, %edx subq %rdx, %rsp testq %rdx, %rdx je .L185 orq $0, -8(%rsp,%rdx) .L185: leaq 15(%rax), %rcx movq %rsp, -520(%rbp) movq %rsp, %rdi movq %rcx, %rdx andq $-4096, %rcx andq $-16, %rdx subq %rcx, %rdi .L186: cmpq %rdi, %rsp je .L187 subq $4096, %rsp orq $0, 4088(%rsp) jmp .L186 .L187: andl $4095, %edx subq %rdx, %rsp testq %rdx, %rdx je .L188 orq $0, -8(%rsp,%rdx) .L188: leaq 15(%rax), %rcx movq %rsp, -432(%rbp) movq %rsp, %rdi movq %rcx, %rdx andq $-4096, %rcx andq $-16, %rdx subq %rcx, %rdi .L189: cmpq %rdi, %rsp je .L190 subq $4096, %rsp orq $0, 4088(%rsp) jmp .L189 .L190: andl $4095, %edx subq %rdx, %rsp testq %rdx, %rdx je .L191 orq $0, -8(%rsp,%rdx) .L191: movq %rsp, -456(%rbp) testq %rsi, %rsi jle .L192 movq -520(%rbp), %rcx movq -520(%rbp), %rdx addq %rax, %rcx .L193: cmpq %rdx, %rcx je .L310 xorl %esi, %esi addq $4, %rdx movl %esi, -4(%rdx) jmp .L193 .L310: movq -432(%rbp), %rcx movq -432(%rbp), %rdx addq %rax, %rcx .L195: cmpq %rdx, %rcx je .L311 movl $0x00000000, (%rdx) addq $4, %rdx jmp .L195 .L192: leaq 1023(%r14), %rax movl $-50, -424(%rbp) sarq $10, %rax movl %eax, -528(%rbp) jmp .L198 .L311: movq -456(%rbp), %rcx movss .LC5(%rip), %xmm0 addq %rcx, %rax movq %rcx, %rdx .L199: cmpq %rdx, %rax je .L192 movss %xmm0, (%rdx) addq $4, %rdx jmp .L199 .L314: movq -368(%rbp), %r8 testl %eax, %eax je .L312 .L201: movq -408(%rbp), %rdx movq -368(%rbp), %rsi movl $2, %ecx movq %r13, %rdi call cudaMemcpy@PLT movl scale(%rip), %eax movslq na_frames(%rip), %rbx cmpl $-1, %eax jne .L202 movss .LC5(%rip), %xmm3 movss %xmm3, -524(%rbp) .L203: cmpq %rbx, %r14 jg .L206 leaq -248(%rbp), %rax movq %rax, -552(%rbp) movq (%r12), %rax movq -552(%rbp), %rdi leaq 5(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE18: movq -248(%rbp), %rsi leaq outputFile1(%rip), %rdi .LEHB19: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rbx leaq -216(%rbp), %rax movq %rax, -560(%rbp) movq (%r12), %rax movq -560(%rbp), %rdi leaq 6(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE19: movq -216(%rbp), %rsi movq %rbx, %rdi .LEHB20: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rbx leaq -184(%rbp), %rax movq %rax, -568(%rbp) movq (%r12), %rax movq -568(%rbp), %rdi leaq 7(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE20: movq -184(%rbp), %rsi movq %rbx, %rdi .LEHB21: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi leaq .LC10(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rbx leaq -152(%rbp), %rax movq %rax, -576(%rbp) movq (%r15), %rax movq -576(%rbp), %rdi leaq 5(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE21: movq -152(%rbp), %rsi movq %rbx, %rdi .LEHB22: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rbx leaq -120(%rbp), %rax movq %rax, -584(%rbp) movq (%r15), %rax movq -584(%rbp), %rdi leaq 6(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE22: movq -120(%rbp), %rsi movq %rbx, %rdi .LEHB23: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rbx leaq -88(%rbp), %rax movq %rax, -592(%rbp) movq (%r15), %rax movq -592(%rbp), %rdi leaq 7(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE23: movq -88(%rbp), %rsi movq %rbx, %rdi .LEHB24: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi leaq .LC10(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl -424(%rbp), %esi movq %rax, %rdi call _ZNSolsEi@PLT movq %rax, %rdi leaq .LC10(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT cvtsi2ssq %r14, %xmm1 movss -524(%rbp), %xmm0 movq %rax, %rdi divss %xmm1, %xmm0 cvtss2sd %xmm0, %xmm0 call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi leaq .LC1(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT .LEHE24: leaq -88(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -120(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -152(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -184(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -216(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -248(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT .L207: incl -424(%rbp) cmpl $51, -424(%rbp) je .L313 .L198: movl $4194305, %eax movl $4194305, %edx xorl %r9d, %r9d xorl %r8d, %r8d salq $10, %rax salq $10, %rdx movl $1, %ecx movl $1, -340(%rbp) movq %rax, -348(%rbp) movl -528(%rbp), %eax movl %eax, -360(%rbp) movabsq $4294967297, %rax movq %rax, -356(%rbp) movq -360(%rbp), %rdi movl -352(%rbp), %esi .LEHB25: call __cudaPushCallConfiguration@PLT jmp .L314 .L312: movl na_frames(%rip), %eax movq -376(%rbp), %rcx movq -384(%rbp), %rdx movq -392(%rbp), %rsi movq -400(%rbp), %rdi movl -424(%rbp), %r9d pushq %r14 pushq %rax .cfi_escape 0x2e,0x10 call _Z36__device_stub__Z6kernelPfS_S_S_S_iilPfS_S_S_S_iil popq %rdx popq %rcx jmp .L201 .L206: movss 0(%r13,%rbx,4), %xmm0 ucomiss %xmm0, %xmm0 jnp .L204 movq -440(%rbp), %rax leaq _ZSt4cout(%rip), %rdi cvtss2sd (%rax,%rbx,4), %xmm0 .cfi_escape 0x2e,0 call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi leaq .LC20(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq -448(%rbp), %rax cvtss2sd (%rax,%rbx,4), %xmm0 call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi leaq .LC20(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movl %ebx, %esi call _ZNSolsEi@PLT movq %rax, %rdi leaq .LC20(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl -424(%rbp), %esi movq %rax, %rdi call _ZNSolsEi@PLT movq %rax, %rdi leaq .LC1(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT .L204: movss -524(%rbp), %xmm2 addss 0(%r13,%rbx,4), %xmm2 incq %rbx movss %xmm2, -524(%rbp) jmp .L203 .L202: imull $10, %eax, %eax movq %r14, %rsi movslq %eax, %rdx subq %rdx, %rsi testq %rsi, %rsi jg .L208 .L212: movslq %ebx, %rdx addl %ebx, %eax jmp .L209 .L208: movq -432(%rbp), %rcx movq -432(%rbp), %rdx leaq (%rcx,%rsi,4), %rcx .L210: cmpq %rdx, %rcx je .L212 movl $0x00000000, (%rdx) addq $4, %rdx jmp .L210 .L215: movq -432(%rbp), %rbx movss (%rbx,%rdx,4), %xmm0 addss 0(%r13,%rcx,4), %xmm0 movss %xmm0, (%rbx,%rdx,4) cmpl %edi, %ecx je .L315 .L213: incq %rcx .L216: cmpl %eax, %ecx jl .L215 incq %rdx incl %eax .L209: cmpq %rdx, %rsi jle .L207 movq %rdx, %rcx leal -1(%rax), %edi jmp .L216 .L315: movq -456(%rbp), %rbx comiss (%rbx,%rdx,4), %xmm0 jbe .L213 movss %xmm0, (%rbx,%rdx,4) movl -424(%rbp), %r10d movq -520(%rbp), %rbx movl %r10d, (%rbx,%rdx,4) jmp .L213 .L313: xorl %ebx, %ebx cmpl $-1, scale(%rip) jne .L217 .L220: movq -416(%rbp), %rdi call fclose@PLT jmp .L316 .L219: leal (%rsi,%rsi,4), %esi leaq outputFile1(%rip), %rdi addl %ebx, %esi call _ZNSolsEi@PLT movq %rax, %rdi leaq .LC10(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %r13 movq (%r12), %rax leaq -248(%rbp), %rdi leaq 5(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE25: movq -248(%rbp), %rsi movq %r13, %rdi .LEHB26: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %r13 movq (%r12), %rax leaq -216(%rbp), %rdi leaq 6(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE26: movq -216(%rbp), %rsi movq %r13, %rdi .LEHB27: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %r13 movq (%r12), %rax leaq -184(%rbp), %rdi leaq 7(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE27: movq -184(%rbp), %rsi movq %r13, %rdi .LEHB28: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi leaq .LC10(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %r13 movq (%r15), %rax leaq -152(%rbp), %rdi leaq 5(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE28: movq -152(%rbp), %rsi movq %r13, %rdi .LEHB29: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %r13 movq (%r15), %rax leaq -120(%rbp), %rdi leaq 6(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE29: movq -120(%rbp), %rsi movq %r13, %rdi .LEHB30: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %r13 movq (%r15), %rax leaq -88(%rbp), %rdi leaq 7(%rax), %rsi call _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .LEHE30: movq -88(%rbp), %rsi movq %r13, %rdi .LEHB31: call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi leaq .LC10(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi movq -520(%rbp), %rax movl (%rax,%rbx,4), %esi call _ZNSolsEi@PLT movq %rax, %rdi leaq .LC10(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi imull $10, scale(%rip), %eax cvtsi2ssl %eax, %xmm1 movq -456(%rbp), %rax movss (%rax,%rbx,4), %xmm0 divss %xmm1, %xmm0 cvtss2sd %xmm0, %xmm0 call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi leaq .LC1(%rip), %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT .LEHE31: leaq -88(%rbp), %rdi incq %rbx call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -120(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -152(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -184(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -216(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -248(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT .L217: movl scale(%rip), %esi movq %r14, %rdx imull $10, %esi, %eax cltq subq %rax, %rdx cmpq %rbx, %rdx jg .L219 jmp .L220 .L316: movq -472(%rbp), %rdi .LEHB32: call fclose@PLT movq -464(%rbp), %rdi call fclose@PLT movq -480(%rbp), %rdi call fclose@PLT movq -400(%rbp), %rdi call cudaFree@PLT movq -392(%rbp), %rdi call cudaFree@PLT movq -384(%rbp), %rdi call cudaFree@PLT movq -376(%rbp), %rdi call cudaFree@PLT movq -368(%rbp), %rdi call cudaFree@PLT .LEHE32: movq -440(%rbp), %rdi call free@PLT movq -448(%rbp), %rdi call free@PLT movq -488(%rbp), %rdi call free@PLT movq -496(%rbp), %rdi call free@PLT movq -536(%rbp), %rsp .L172: incq -504(%rbp) cmpq $10, -504(%rbp) jne .L221 incq -512(%rbp) cmpq $10, -512(%rbp) jne .L171 movq -416(%rbp), %rdi .LEHB33: call fclose@PLT movq -464(%rbp), %rdi call fclose@PLT movq -472(%rbp), %rdi call fclose@PLT movq -480(%rbp), %rdi call fclose@PLT .LEHE33: leaq -280(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -312(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT leaq -336(%rbp), %rdi call _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED1Ev movq -56(%rbp), %rax subq %fs:40, %rax je .L245 jmp .L286 .L250: endbr64 movq %rax, %r12 .L223: movq %rbx, %rdi movq %r12, %rbx call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L224 .L252: endbr64 jmp .L296 .L254: endbr64 jmp .L296 .L255: endbr64 jmp .L296 .L256: endbr64 .L296: movq %rax, %r12 .L229: movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %r12, %rax jmp .L226 .L262: endbr64 movq %rax, %rbx .L230: movq -592(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L231 .L261: endbr64 movq %rax, %rbx .L231: movq -584(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbx, %rax jmp .L232 .L260: endbr64 .L232: movq -576(%rbp), %rdi movq %rax, -408(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -408(%rbp), %rax jmp .L233 .L259: endbr64 .L233: movq -568(%rbp), %rdi movq %rax, -408(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -408(%rbp), %rax jmp .L234 .L258: endbr64 .L234: movq -560(%rbp), %rdi movq %rax, -408(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -408(%rbp), %rax jmp .L235 .L257: endbr64 .L235: movq %rax, -408(%rbp) movq -552(%rbp), %rdi jmp .L292 .L268: endbr64 movq %rax, %rbx .L236: leaq -88(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L237 .L267: endbr64 movq %rax, %rbx .L237: leaq -120(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbx, %rax jmp .L238 .L266: endbr64 .L238: leaq -152(%rbp), %rdi movq %rax, -408(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -408(%rbp), %rax jmp .L239 .L265: endbr64 .L239: leaq -184(%rbp), %rdi movq %rax, -408(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -408(%rbp), %rax jmp .L240 .L264: endbr64 .L240: leaq -216(%rbp), %rdi movq %rax, -408(%rbp) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -408(%rbp), %rax jmp .L241 .L263: endbr64 .L241: movq %rax, -408(%rbp) leaq -248(%rbp), %rdi .L292: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq -408(%rbp), %rax jmp .L226 .L253: endbr64 .L226: movq %rax, %rbx movq -536(%rbp), %rsp jmp .L242 .L251: endbr64 movq %rax, %rbx .L242: leaq -280(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L224 .L249: endbr64 movq %rax, %rbx .L224: leaq -312(%rbp), %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L243 .L248: endbr64 movq %rax, %rbx .L243: leaq -336(%rbp), %rdi call _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED1Ev movq -56(%rbp), %rax subq %fs:40, %rax jne .L286 movq %rbx, %rdi .LEHB34: call _Unwind_Resume@PLT .LEHE34: .L286: call __stack_chk_fail@PLT .L245: leaq -40(%rbp), %rsp xorl %eax, %eax popq %rbx popq %r12 popq %r13 popq %r14 popq %r15 popq %rbp .cfi_def_cfa 7, 8 ret .cfi_endproc .LFE4443: .section .gcc_except_table,"a",@progbits .LLSDA4443: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE4443-.LLSDACSB4443 .LLSDACSB4443: .uleb128 .LEHB5-.LFB4443 .uleb128 .LEHE5-.LEHB5 .uleb128 .L248-.LFB4443 .uleb128 0 .uleb128 .LEHB6-.LFB4443 .uleb128 .LEHE6-.LEHB6 .uleb128 .L249-.LFB4443 .uleb128 0 .uleb128 .LEHB7-.LFB4443 .uleb128 .LEHE7-.LEHB7 .uleb128 .L250-.LFB4443 .uleb128 0 .uleb128 .LEHB8-.LFB4443 .uleb128 .LEHE8-.LEHB8 .uleb128 .L249-.LFB4443 .uleb128 0 .uleb128 .LEHB9-.LFB4443 .uleb128 .LEHE9-.LEHB9 .uleb128 .L251-.LFB4443 .uleb128 0 .uleb128 .LEHB10-.LFB4443 .uleb128 .LEHE10-.LEHB10 .uleb128 .L253-.LFB4443 .uleb128 0 .uleb128 .LEHB11-.LFB4443 .uleb128 .LEHE11-.LEHB11 .uleb128 .L252-.LFB4443 .uleb128 0 .uleb128 .LEHB12-.LFB4443 .uleb128 .LEHE12-.LEHB12 .uleb128 .L253-.LFB4443 .uleb128 0 .uleb128 .LEHB13-.LFB4443 .uleb128 .LEHE13-.LEHB13 .uleb128 .L254-.LFB4443 .uleb128 0 .uleb128 .LEHB14-.LFB4443 .uleb128 .LEHE14-.LEHB14 .uleb128 .L253-.LFB4443 .uleb128 0 .uleb128 .LEHB15-.LFB4443 .uleb128 .LEHE15-.LEHB15 .uleb128 .L255-.LFB4443 .uleb128 0 .uleb128 .LEHB16-.LFB4443 .uleb128 .LEHE16-.LEHB16 .uleb128 .L253-.LFB4443 .uleb128 0 .uleb128 .LEHB17-.LFB4443 .uleb128 .LEHE17-.LEHB17 .uleb128 .L256-.LFB4443 .uleb128 0 .uleb128 .LEHB18-.LFB4443 .uleb128 .LEHE18-.LEHB18 .uleb128 .L253-.LFB4443 .uleb128 0 .uleb128 .LEHB19-.LFB4443 .uleb128 .LEHE19-.LEHB19 .uleb128 .L257-.LFB4443 .uleb128 0 .uleb128 .LEHB20-.LFB4443 .uleb128 .LEHE20-.LEHB20 .uleb128 .L258-.LFB4443 .uleb128 0 .uleb128 .LEHB21-.LFB4443 .uleb128 .LEHE21-.LEHB21 .uleb128 .L259-.LFB4443 .uleb128 0 .uleb128 .LEHB22-.LFB4443 .uleb128 .LEHE22-.LEHB22 .uleb128 .L260-.LFB4443 .uleb128 0 .uleb128 .LEHB23-.LFB4443 .uleb128 .LEHE23-.LEHB23 .uleb128 .L261-.LFB4443 .uleb128 0 .uleb128 .LEHB24-.LFB4443 .uleb128 .LEHE24-.LEHB24 .uleb128 .L262-.LFB4443 .uleb128 0 .uleb128 .LEHB25-.LFB4443 .uleb128 .LEHE25-.LEHB25 .uleb128 .L253-.LFB4443 .uleb128 0 .uleb128 .LEHB26-.LFB4443 .uleb128 .LEHE26-.LEHB26 .uleb128 .L263-.LFB4443 .uleb128 0 .uleb128 .LEHB27-.LFB4443 .uleb128 .LEHE27-.LEHB27 .uleb128 .L264-.LFB4443 .uleb128 0 .uleb128 .LEHB28-.LFB4443 .uleb128 .LEHE28-.LEHB28 .uleb128 .L265-.LFB4443 .uleb128 0 .uleb128 .LEHB29-.LFB4443 .uleb128 .LEHE29-.LEHB29 .uleb128 .L266-.LFB4443 .uleb128 0 .uleb128 .LEHB30-.LFB4443 .uleb128 .LEHE30-.LEHB30 .uleb128 .L267-.LFB4443 .uleb128 0 .uleb128 .LEHB31-.LFB4443 .uleb128 .LEHE31-.LEHB31 .uleb128 .L268-.LFB4443 .uleb128 0 .uleb128 .LEHB32-.LFB4443 .uleb128 .LEHE32-.LEHB32 .uleb128 .L253-.LFB4443 .uleb128 0 .uleb128 .LEHB33-.LFB4443 .uleb128 .LEHE33-.LEHB33 .uleb128 .L251-.LFB4443 .uleb128 0 .uleb128 .LEHB34-.LFB4443 .uleb128 .LEHE34-.LEHB34 .uleb128 0 .uleb128 0 .LLSDACSE4443: .section .text.startup .size main, .-main .type _GLOBAL__sub_I__Z9factoriall, @function _GLOBAL__sub_I__Z9factoriall: .LFB5374: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq outputFile1(%rip), %rbx movq %rbx, %rdi call _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT movq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GOTPCREL(%rip), %rdi movq %rbx, %rsi popq %rbx .cfi_def_cfa_offset 8 leaq __dso_handle(%rip), %rdx jmp __cxa_atexit@PLT .cfi_endproc .LFE5374: .size _GLOBAL__sub_I__Z9factoriall, .-_GLOBAL__sub_I__Z9factoriall .section .init_array .align 8 .quad _GLOBAL__sub_I__Z9factoriall .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl outputFile1 .bss .align 32 .type outputFile1, @object .size outputFile1, 512 outputFile1: .zero 512 .globl scale .data .align 4 .type scale, @object .size scale, 4 scale: .long 1 .globl na_frames .bss .align 4 .type na_frames, @object .size na_frames, 4 na_frames: .zero 4 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC5: .long -1082130432 .hidden DW.ref.__gxx_personality_v0 .weak DW.ref.__gxx_personality_v0 .section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat .align 8 .type DW.ref.__gxx_personality_v0, @object .size DW.ref.__gxx_personality_v0, 8 DW.ref.__gxx_personality_v0: .quad __gxx_personality_v0 .hidden __dso_handle .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6kernelPfS_S_S_S_iil .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ISETP.LE.AND P0, PT, RZ, c[0x0][0x188], PT ; /* 0x00006200ff007a0c */ /* 0x000fe20003f03270 */ /*0030*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fd000078e0203 */ /*0060*/ @!P0 BRA 0x280 ; /* 0x0000021000008947 */ /* 0x000fea0003800000 */ /*0070*/ ULDC UR5, c[0x0][0x188] ; /* 0x0000620000057ab9 */ /* 0x000fe20000000800 */ /*0080*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */ /* 0x000fe20000011400 */ /*0090*/ ULDC.64 UR6, c[0x0][0x190] ; /* 0x0000640000067ab9 */ /* 0x000fe40000000a00 */ /*00a0*/ USHF.R.S32.HI UR4, URZ, 0x1f, UR5 ; /* 0x0000001f3f047899 */ /* 0x000fe40008011405 */ /*00b0*/ UIADD3 UR5, UP0, -UR5, UR6, URZ ; /* 0x0000000605057290 */ /* 0x000fc8000ff1e13f */ /*00c0*/ UIADD3.X UR4, ~UR4, UR7, URZ, UP0, !UPT ; /* 0x0000000704047290 */ /* 0x000fe400087fe53f */ /*00d0*/ ISETP.LT.U32.AND P0, PT, R0, UR5, PT ; /* 0x0000000500007c0c */ /* 0x000fc8000bf01070 */ /*00e0*/ IMAD.U32 R2, RZ, RZ, UR4 ; /* 0x00000004ff027e24 */ /* 0x000fca000f8e00ff */ /*00f0*/ ISETP.GT.AND.EX P0, PT, R2, R3, PT, P0 ; /* 0x000000030200720c */ /* 0x000fda0003f04300 */ /*0100*/ @!P0 LEA R4, P1, R0, c[0x0][0x180], 0x2 ; /* 0x0000600000048a11 */ /* 0x000fc800078210ff */ /*0110*/ @!P0 LEA.HI.X R5, R0, c[0x0][0x184], R3, 0x2, P1 ; /* 0x0000610000058a11 */ /* 0x000fca00008f1403 */ /*0120*/ @!P0 STG.E [R4.64], RZ ; /* 0x000000ff04008986 */ /* 0x0001e2000c101908 */ /*0130*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0140*/ IMAD.SHL.U32 R10, R0.reuse, 0x4, RZ ; /* 0x00000004000a7824 */ /* 0x040fe200078e00ff */ /*0150*/ IADD3 R2, R0.reuse, c[0x0][0x188], RZ ; /* 0x0000620000027a10 */ /* 0x040fe20007ffe0ff */ /*0160*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */ /* 0x000fe200078e00ff */ /*0170*/ SHF.L.U64.HI R0, R0, 0x2, R3 ; /* 0x0000000200007819 */ /* 0x000fe40000010203 */ /*0180*/ IADD3 R8, P1, R10, c[0x0][0x168], RZ ; /* 0x00005a000a087a10 */ /* 0x000fe20007f3e0ff */ /*0190*/ IMAD.WIDE R4, R2, R7.reuse, c[0x0][0x178] ; /* 0x00005e0002047625 */ /* 0x081fe200078e0207 */ /*01a0*/ IADD3 R6, P0, R10, c[0x0][0x160], RZ ; /* 0x000058000a067a10 */ /* 0x000fe40007f1e0ff */ /*01b0*/ IADD3.X R9, R0, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b0000097a10 */ /* 0x000fe20000ffe4ff */ /*01c0*/ IMAD.WIDE R2, R2, R7, c[0x0][0x170] ; /* 0x00005c0002027625 */ /* 0x000fe200078e0207 */ /*01d0*/ IADD3.X R7, R0, c[0x0][0x164], RZ, P0, !PT ; /* 0x0000590000077a10 */ /* 0x000fe200007fe4ff */ /*01e0*/ LDG.E R4, [R4.64] ; /* 0x0000000804047981 */ /* 0x000ea8000c1e1900 */ /*01f0*/ LDG.E R9, [R8.64] ; /* 0x0000000808097981 */ /* 0x000ea8000c1e1900 */ /*0200*/ LDG.E R2, [R2.64] ; /* 0x0000000802027981 */ /* 0x000ee8000c1e1900 */ /*0210*/ LDG.E R7, [R6.64] ; /* 0x0000000806077981 */ /* 0x000ee2000c1e1900 */ /*0220*/ IADD3 R10, P0, R10, c[0x0][0x180], RZ ; /* 0x000060000a0a7a10 */ /* 0x000fc80007f1e0ff */ /*0230*/ IADD3.X R11, R0, c[0x0][0x184], RZ, P0, !PT ; /* 0x00006100000b7a10 */ /* 0x000fe200007fe4ff */ /*0240*/ FMUL R13, R4, R9 ; /* 0x00000009040d7220 */ /* 0x004fc80000400000 */ /*0250*/ FFMA R13, R2, R7, R13 ; /* 0x00000007020d7223 */ /* 0x008fca000000000d */ /*0260*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */ /* 0x000fe2000c101908 */ /*0270*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0280*/ ULDC.64 UR4, c[0x0][0x188] ; /* 0x0000620000047ab9 */ /* 0x000fe20000000a00 */ /*0290*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */ /* 0x000fe20000011400 */ /*02a0*/ UIADD3 UR4, -UR4, UR5, URZ ; /* 0x0000000504047290 */ /* 0x000fcc000fffe13f */ /*02b0*/ ISETP.GE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */ /* 0x000fda000bf06270 */ /*02c0*/ @!P0 BRA 0x410 ; /* 0x0000014000008947 */ /* 0x000fea0003800000 */ /*02d0*/ IMAD.SHL.U32 R10, R0.reuse, 0x4, RZ ; /* 0x00000004000a7824 */ /* 0x040fe200078e00ff */ /*02e0*/ IADD3 R2, R0.reuse, c[0x0][0x188], RZ ; /* 0x0000620000027a10 */ /* 0x040fe20007ffe0ff */ /*02f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*0300*/ SHF.L.U64.HI R0, R0, 0x2, R3 ; /* 0x0000000200007819 */ /* 0x000fe40000010203 */ /*0310*/ IADD3 R8, P1, R10, c[0x0][0x168], RZ ; /* 0x00005a000a087a10 */ /* 0x000fe20007f3e0ff */ /*0320*/ IMAD.WIDE R6, R2, R5.reuse, c[0x0][0x178] ; /* 0x00005e0002067625 */ /* 0x080fe200078e0205 */ /*0330*/ IADD3 R4, P0, R10, c[0x0][0x160], RZ ; /* 0x000058000a047a10 */ /* 0x000fe40007f1e0ff */ /*0340*/ IADD3.X R9, R0, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b0000097a10 */ /* 0x000fe20000ffe4ff */ /*0350*/ IMAD.WIDE R2, R2, R5, c[0x0][0x170] ; /* 0x00005c0002027625 */ /* 0x000fe200078e0205 */ /*0360*/ IADD3.X R5, R0, c[0x0][0x164], RZ, P0, !PT ; /* 0x0000590000057a10 */ /* 0x000fe200007fe4ff */ /*0370*/ LDG.E R6, [R6.64] ; /* 0x0000000806067981 */ /* 0x000ea8000c1e1900 */ /*0380*/ LDG.E R9, [R8.64] ; /* 0x0000000808097981 */ /* 0x000ea8000c1e1900 */ /*0390*/ LDG.E R2, [R2.64] ; /* 0x0000000802027981 */ /* 0x000ee8000c1e1900 */ /*03a0*/ LDG.E R5, [R4.64] ; /* 0x0000000804057981 */ /* 0x000ee2000c1e1900 */ /*03b0*/ IADD3 R10, P0, R10, c[0x0][0x180], RZ ; /* 0x000060000a0a7a10 */ /* 0x000fc80007f1e0ff */ /*03c0*/ IADD3.X R11, R0, c[0x0][0x184], RZ, P0, !PT ; /* 0x00006100000b7a10 */ /* 0x000fe200007fe4ff */ /*03d0*/ FMUL R13, R6, R9 ; /* 0x00000009060d7220 */ /* 0x004fc80000400000 */ /*03e0*/ FFMA R13, R2, R5, R13 ; /* 0x00000005020d7223 */ /* 0x008fca000000000d */ /*03f0*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */ /* 0x000fe2000c101908 */ /*0400*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0410*/ LEA R2, P0, R0, c[0x0][0x180], 0x2 ; /* 0x0000600000027a11 */ /* 0x000fc800078010ff */ /*0420*/ LEA.HI.X R3, R0, c[0x0][0x184], R3, 0x2, P0 ; /* 0x0000610000037a11 */ /* 0x000fca00000f1403 */ /*0430*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x000fe2000c101908 */ /*0440*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0450*/ BRA 0x450; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0480*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0490*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
// // CrossCorrelation.cu // CrossCorrelation // // Created by Vivek Sridhar on 29/06/17. // Copyright © 2017 Vivek Sridhar. All rights reserved. // #include <hip/hip_runtime.h> #include <iostream> #include <fstream> #include <sstream> #include <vector> #include <algorithm> #include <stdio.h> #include <stdlib.h> #include <dirent.h> template <typename T> std::string to_string(const T& value) { std::stringstream ss; ss << value; return ss.str(); } long factorial(long val) { std::cout << val << "\n"; long result = 1; for (long i = 1; i <= val; ++i) { result *= i; } return result; } long combination(long n, long r) { return (factorial(n)) / ((factorial(n - r)) * factorial(r)); } __global__ void kernel(float *x1, float *y1, float *x2, float *y2, float *res, int tau, int na_frames, long nElements) { int index = blockIdx.x * blockDim.x + threadIdx.x; if (tau < 0) { if (index >= -tau+na_frames) { res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau]; } else res[index] = 0.0; } else { if (index < nElements - tau) { res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau]; } else res[index] = 0.0; } } // total measurement points in the time series is defined by nElements #define M 1024 // number of threads per block #define fps 10 // frames per second of input video (used to determine tau) #define time 5 // time in seconds within which time delayed cross correlation is calculated (tau ranges from -time*fps to time*fps) #define n_inds 10 int na_frames = 0; // number of frames in the start with nas int scale = 1; // time window for analysis in seconds; varying this allows us to examine dynamics of leadership across varying timescales; setting scale larger than the entire time series or -1 gives aggregated statistics across the entire duration (otherwise, timescale of analysis is scale*fps) //const int pairs = combination(n_inds, 2); const bool aggregate = false; // this boolean decides whether you output a dynamic time variable leadership network or a static time aggregated network; scale is set to -1 if aggregate is true std::ofstream outputFile1; int main () { DIR *dir; FILE *pFile_x1; FILE *pFile_y1; FILE *pFile_x2; FILE *pFile_y2; long lSize; long nElements; struct dirent *file; float *d_x1, *d_y1, *d_x2, *d_y2, *d_res; float *x1, *y1, *x2, *y2, *res; size_t result_x1, result_y1, result_x2, result_y2; if (aggregate) scale = -1; std::vector<std::string> files; std::string directory = "/home/user/Documents/Vivek/cuda/DirectionalCorrelation/Data/Input/pigeons/10_birds/ffA3/cross_correlation/"; dir = opendir(directory.c_str()); int idx = 0; while ((file = readdir(dir)) != NULL) { if (file->d_name[0] == 'd') { files.push_back(file->d_name); ++idx; } } std::sort(files.begin(), files.begin()+2*n_inds); closedir(dir); // Open output file std::string filename_cc; if (scale != -1) filename_cc = "cross_correlation_01.csv"; else filename_cc = "avgd_cross_correlation.csv"; outputFile1.open(filename_cc.c_str()); // Output file headers if (aggregate || scale == -1) outputFile1 << "id1"<< ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n"; else outputFile1 << "time" << ", " << "id1" << ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n"; //files = {"dir_x00", "dir_x01", "dir_y00", "dir_y01"} for (int a = 0; a < n_inds; ++a) { for (int b = 0; b < n_inds; ++b) { if (b != a) { pFile_x1 = fopen ((directory + files[a]).c_str(), "rb"); pFile_y1 = fopen ((directory + files[a+n_inds]).c_str(), "rb"); pFile_x2 = fopen ((directory + files[b]).c_str(), "rb"); pFile_y2 = fopen ((directory + files[b+n_inds]).c_str(), "rb"); if (pFile_x1==NULL || pFile_y1==NULL || pFile_x2==NULL || pFile_y2==NULL) { fputs ("File error",stderr); exit (1); } // obtain file size fseek (pFile_x1 , 0 , SEEK_END); lSize = ftell (pFile_x1); rewind (pFile_x1); nElements = lSize / sizeof(float); // allocate memory to contain the whole file // device memory hipMalloc((void **) &d_x1, lSize); hipMalloc((void **) &d_y1, lSize); hipMalloc((void **) &d_x2, lSize); hipMalloc((void **) &d_y2, lSize); hipMalloc((void **) &d_res, lSize); // host memory x1 = (float*) malloc(lSize); y1 = (float*) malloc(lSize); x2 = (float*) malloc(lSize); y2 = (float*) malloc(lSize); res = (float*) malloc(lSize); if (x1 == NULL || y1==NULL || x2==NULL || y2==NULL || res==NULL) { fputs ("Memory error",stderr); exit (2); } // copy the file into the respective float pointers result_x1 = fread (x1, sizeof(float), nElements, pFile_x1); result_y1 = fread (y1, sizeof(float), nElements, pFile_y1); result_x2 = fread (x2, sizeof(float), nElements, pFile_x2); result_y2 = fread (y2, sizeof(float), nElements, pFile_y2); if (result_x1 != nElements || result_y1 != nElements || result_x2 != nElements || result_y2 != nElements) { fputs ("Reading error",stderr); exit (3); } // the whole files are now loaded in the memory x1, y1, x2 and y2 respectively hipMemcpy(d_x1, x1, lSize, hipMemcpyHostToDevice); hipMemcpy(d_y1, y1, lSize, hipMemcpyHostToDevice); hipMemcpy(d_x2, x2, lSize, hipMemcpyHostToDevice); hipMemcpy(d_y2, y2, lSize, hipMemcpyHostToDevice); if (scale*fps > nElements) scale = -1; int tau_max[nElements - scale*fps]; float res_tmp[nElements - scale*fps]; float res_max[nElements - scale*fps]; std::fill_n(tau_max, nElements - scale*fps, 0); std::fill_n(res_tmp, nElements - scale*fps, 0.0); std::fill_n(res_max, nElements - scale*fps, -1.0); for (int tau = -time*fps; tau <= time*fps; ++tau) { kernel<<<(nElements + M - 1) / M, M>>>(d_x1, d_y1, d_x2, d_y2, d_res, tau, na_frames, nElements); hipMemcpy(res, d_res, lSize, hipMemcpyDeviceToHost); if (scale == -1) { float res_now = -1.0f; for (int i = na_frames; i < nElements; ++i) { if (res[i] != res[i]) std::cout << x1[i] << " " << y1[i] << " " << i << " " << tau << "\n"; // if nans res_now += res[i]; } outputFile1 << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau << ", " << res_now / nElements << "\n"; } else { std::fill_n(res_tmp, nElements - scale*fps, 0.0); for (int i = na_frames; i < nElements - scale*fps; ++i) { for (int j = i; j < i + scale*fps; ++j) { res_tmp[i] += res[j]; if (j == i + scale*fps - 1 && res_max[i] < res_tmp[i]) { res_max[i] = res_tmp[i]; tau_max[i] = tau; } } } } } if (scale != -1) { for (int t = 0; t < nElements - scale*fps; ++t) { outputFile1 << t + scale*fps/2 << ", " << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau_max[t] << ", " << res_max[t] / (scale*fps) << "\n"; } } fclose(pFile_x1); fclose(pFile_x2); fclose(pFile_y1); fclose(pFile_y2); hipFree(d_x1); hipFree(d_y1); hipFree(d_x2); hipFree(d_y2); hipFree(d_res); free(x1); free(y1); free(x2); free(y2); } } } // terminate fclose(pFile_x1); fclose(pFile_y1); fclose(pFile_x2); fclose(pFile_y2); return 0; }
.text .file "03_DirectionalCorrelation.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z9factoriall # -- Begin function _Z9factoriall .type _Z9factoriall,@function _Z9factoriall: # @_Z9factoriall .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rdi, %rbx movl $_ZSt4cout, %edi movq %rbx, %rsi callq _ZNSo9_M_insertIlEERSoT_ movl $1, %r14d movl $.L.str, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l testq %rbx, %rbx jle .LBB0_3 # %bb.1: # %.lr.ph.preheader negq %rbx movl $1, %eax movl $1, %r14d .LBB0_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 imulq %rax, %r14 leaq (%rbx,%rax), %rcx incq %rcx incq %rax cmpq $1, %rcx jne .LBB0_2 .LBB0_3: # %._crit_edge movq %r14, %rax addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z9factoriall, .Lfunc_end0-_Z9factoriall .cfi_endproc # -- End function .globl _Z11combinationll # -- Begin function _Z11combinationll .type _Z11combinationll,@function _Z11combinationll: # @_Z11combinationll .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rsi, %rbx movq %rdi, %r14 callq _Z9factoriall movq %rax, %r15 subq %rbx, %r14 movq %r14, %rdi callq _Z9factoriall movq %rax, %r14 movq %rbx, %rdi callq _Z9factoriall movq %rax, %rcx imulq %r14, %rcx movq %r15, %rax cqto idivq %rcx popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z11combinationll, .Lfunc_end1-_Z11combinationll .cfi_endproc # -- End function .globl _Z21__device_stub__kernelPfS_S_S_S_iil # -- Begin function _Z21__device_stub__kernelPfS_S_S_S_iil .type _Z21__device_stub__kernelPfS_S_S_S_iil,@function _Z21__device_stub__kernelPfS_S_S_S_iil: # @_Z21__device_stub__kernelPfS_S_S_S_iil .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $160, %rsp .cfi_def_cfa_offset 208 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 4(%rsp), %r8 movl %r9d, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 208(%rsp), %rax movq %rax, 48(%rbx) leaq 216(%rsp), %rax movq %rax, 56(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6kernelPfS_S_S_S_iil, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $176, %rsp .cfi_adjust_cfa_offset -176 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z21__device_stub__kernelPfS_S_S_S_iil, .Lfunc_end2-_Z21__device_stub__kernelPfS_S_S_S_iil .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function main .LCPI3_0: .long 0xbf800000 # float -1 .text .globl main .type main,@function main: # @main .Lfunc_begin0: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception0 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset %rbp, -16 movq %rsp, %rbp .cfi_def_cfa_register %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $504, %rsp # imm = 0x1F8 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 xorps %xmm0, %xmm0 movaps %xmm0, -112(%rbp) movq $0, -96(%rbp) leaq -280(%rbp), %rax movq %rax, -16(%rax) .Ltmp0: .cfi_escape 0x2e, 0x00 leaq -296(%rbp), %rdi movl $.L.str.1, %esi movl $.L.str.1+106, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .Ltmp1: # %bb.1: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit movq -296(%rbp), %rdi .cfi_escape 0x2e, 0x00 callq opendir movq %rax, %rbx leaq -328(%rbp), %r14 leaq -112(%rbp), %r15 .LBB3_2: # =>This Inner Loop Header: Depth=1 .Ltmp3: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq readdir .Ltmp4: # %bb.3: # in Loop: Header=BB3_2 Depth=1 movq %rax, %r12 testq %rax, %rax je .LBB3_9 # %bb.4: # in Loop: Header=BB3_2 Depth=1 cmpb $100, 19(%r12) jne .LBB3_2 # %bb.5: # in Loop: Header=BB3_2 Depth=1 addq $19, %r12 leaq -312(%rbp), %rax movq %rax, -328(%rbp) .cfi_escape 0x2e, 0x00 movq %r12, %rdi callq strlen leaq (%rax,%r12), %rdx .Ltmp6: .cfi_escape 0x2e, 0x00 movq %r14, %rdi movq %r12, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .Ltmp7: # %bb.6: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit279 # in Loop: Header=BB3_2 Depth=1 .Ltmp9: .cfi_escape 0x2e, 0x00 movq %r15, %rdi movq %r14, %rsi callq _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_ .Ltmp10: # %bb.7: # %_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE9push_backEOS5_.exit # in Loop: Header=BB3_2 Depth=1 movq -328(%rbp), %rdi leaq -312(%rbp), %rax cmpq %rax, %rdi je .LBB3_2 # %bb.8: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i # in Loop: Header=BB3_2 Depth=1 .cfi_escape 0x2e, 0x00 callq _ZdlPv jmp .LBB3_2 .LBB3_9: movq -112(%rbp), %r14 leaq 640(%r14), %r15 .Ltmp12: .cfi_escape 0x2e, 0x00 movl $8, %edx movq %r14, %rdi movq %r15, %rsi callq _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_ .Ltmp13: # %bb.10: # %.noexc .Ltmp14: .cfi_escape 0x2e, 0x00 movq %r14, %rdi movq %r15, %rsi callq _ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ .Ltmp15: # %bb.11: # %_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEEEvT_SD_.exit .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq closedir leaq -328(%rbp), %rdi leaq -312(%rbp), %rax movq %rax, (%rdi) movq $0, 8(%rdi) movb $0, 16(%rdi) xorl %eax, %eax cmpl $-1, scale(%rip) sete %al movl $.L.str.3, %edx movl $.L.str.2, %ecx cmoveq %rdx, %rcx leaq 24(,%rax,2), %r8 .Ltmp17: .cfi_escape 0x2e, 0x00 xorl %esi, %esi xorl %edx, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm .Ltmp18: # %bb.12: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit movq -328(%rbp), %rsi .Ltmp19: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $16, %edx callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode .Ltmp20: # %bb.13: cmpl $-1, scale(%rip) je .LBB3_16 # %bb.14: .Ltmp21: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.9, %esi movl $4, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp22: # %bb.15: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit303 .Ltmp23: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.5, %esi movl $2, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp24: .LBB3_16: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit305.invoke .Ltmp25: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.4, %esi movl $3, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp26: # %bb.17: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit307.invoke .Ltmp27: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.5, %esi movl $2, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp28: # %bb.18: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit309.invoke .Ltmp29: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.6, %esi movl $3, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp30: # %bb.19: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit311.invoke .Ltmp31: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.5, %esi movl $2, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp32: # %bb.20: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit313.invoke .Ltmp33: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.7, %esi movl $3, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp34: # %bb.21: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit315.invoke .Ltmp35: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.5, %esi movl $2, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp36: # %bb.22: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit317.invoke .Ltmp37: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.8, %esi movl $2, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp38: # %bb.23: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit319.invoke .Ltmp39: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str, %esi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp40: # %bb.24: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit301 xorl %eax, %eax movq %rax, -152(%rbp) # 8-byte Spill leaq -72(%rbp), %r13 # implicit-def: $rax # kill: killed $rax # implicit-def: $rax # kill: killed $rax # implicit-def: $rbx # implicit-def: $r14 .LBB3_25: # %.preheader539 # =>This Loop Header: Depth=1 # Child Loop BB3_26 Depth 2 # Child Loop BB3_73 Depth 3 # Child Loop BB3_75 Depth 3 # Child Loop BB3_84 Depth 4 # Child Loop BB3_86 Depth 5 # Child Loop BB3_94 Depth 4 # Child Loop BB3_151 Depth 3 xorl %eax, %eax .LBB3_26: # Parent Loop BB3_25 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB3_73 Depth 3 # Child Loop BB3_75 Depth 3 # Child Loop BB3_84 Depth 4 # Child Loop BB3_86 Depth 5 # Child Loop BB3_94 Depth 4 # Child Loop BB3_151 Depth 3 cmpq -152(%rbp), %rax # 8-byte Folded Reload je .LBB3_202 # %bb.27: # in Loop: Header=BB3_26 Depth=2 movq %rax, -344(%rbp) # 8-byte Spill movq -112(%rbp), %rax movq -152(%rbp), %rcx # 8-byte Reload shlq $5, %rcx movq -296(%rbp), %r15 movq -288(%rbp), %r12 movq (%rax,%rcx), %rbx movq %rcx, -88(%rbp) # 8-byte Spill movq 8(%rax,%rcx), %r14 leaq -56(%rbp), %rax movq %rax, -72(%rbp) movq $0, -64(%rbp) movb $0, -56(%rbp) leaq (%r14,%r12), %rsi .Ltmp42: .cfi_escape 0x2e, 0x00 movq %r13, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm .Ltmp43: # %bb.28: # in Loop: Header=BB3_26 Depth=2 .Ltmp44: .cfi_escape 0x2e, 0x00 movq %r13, %rdi movq %r15, %rsi movq %r12, %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp45: # %bb.29: # in Loop: Header=BB3_26 Depth=2 .Ltmp46: .cfi_escape 0x2e, 0x00 movq %r13, %rdi movq %rbx, %rsi movq %r14, %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp47: # %bb.30: # %_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_.exit # in Loop: Header=BB3_26 Depth=2 movq -72(%rbp), %rdi .cfi_escape 0x2e, 0x00 movl $.L.str.10, %esi callq fopen movq %rax, -136(%rbp) # 8-byte Spill movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_32 # %bb.31: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i328 # in Loop: Header=BB3_26 Depth=2 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_32: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit330 # in Loop: Header=BB3_26 Depth=2 movq -112(%rbp), %rax movq -296(%rbp), %r15 movq -288(%rbp), %r12 movq -88(%rbp), %rcx # 8-byte Reload movq 320(%rax,%rcx), %rbx movq 328(%rax,%rcx), %r14 leaq -56(%rbp), %rax movq %rax, -72(%rbp) movq $0, -64(%rbp) movb $0, -56(%rbp) leaq (%r14,%r12), %rsi .Ltmp49: .cfi_escape 0x2e, 0x00 leaq -72(%rbp), %r13 movq %r13, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm .Ltmp50: # %bb.33: # in Loop: Header=BB3_26 Depth=2 .Ltmp51: .cfi_escape 0x2e, 0x00 movq %r13, %rdi movq %r15, %rsi movq %r12, %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp52: # %bb.34: # in Loop: Header=BB3_26 Depth=2 .Ltmp53: .cfi_escape 0x2e, 0x00 movq %r13, %rdi movq %rbx, %rsi movq %r14, %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp54: # %bb.35: # %_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_.exit336 # in Loop: Header=BB3_26 Depth=2 movq -72(%rbp), %rdi .cfi_escape 0x2e, 0x00 movl $.L.str.10, %esi callq fopen movq %rax, -168(%rbp) # 8-byte Spill movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_37 # %bb.36: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i337 # in Loop: Header=BB3_26 Depth=2 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_37: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit339 # in Loop: Header=BB3_26 Depth=2 movq -112(%rbp), %rax movq -344(%rbp), %rcx # 8-byte Reload shlq $5, %rcx movq -296(%rbp), %r15 movq -288(%rbp), %r12 movq (%rax,%rcx), %rbx movq %rcx, -200(%rbp) # 8-byte Spill movq 8(%rax,%rcx), %r14 leaq -56(%rbp), %rax movq %rax, -72(%rbp) movq $0, -64(%rbp) movb $0, -56(%rbp) leaq (%r14,%r12), %rsi .Ltmp56: .cfi_escape 0x2e, 0x00 movq %r13, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm .Ltmp57: # %bb.38: # in Loop: Header=BB3_26 Depth=2 .Ltmp58: .cfi_escape 0x2e, 0x00 movq %r13, %rdi movq %r15, %rsi movq %r12, %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp59: # %bb.39: # in Loop: Header=BB3_26 Depth=2 .Ltmp60: .cfi_escape 0x2e, 0x00 movq %r13, %rdi movq %rbx, %rsi movq %r14, %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp61: # %bb.40: # %_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_.exit345 # in Loop: Header=BB3_26 Depth=2 movq -72(%rbp), %rdi .cfi_escape 0x2e, 0x00 movl $.L.str.10, %esi callq fopen movq %rax, -336(%rbp) # 8-byte Spill movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_42 # %bb.41: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i346 # in Loop: Header=BB3_26 Depth=2 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_42: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit348 # in Loop: Header=BB3_26 Depth=2 movq -112(%rbp), %rax movq -296(%rbp), %r15 movq -288(%rbp), %r12 movq -200(%rbp), %rcx # 8-byte Reload movq 320(%rax,%rcx), %rbx movq 328(%rax,%rcx), %r14 leaq -56(%rbp), %rax movq %rax, -72(%rbp) movq $0, -64(%rbp) movb $0, -56(%rbp) leaq (%r14,%r12), %rsi .Ltmp63: .cfi_escape 0x2e, 0x00 movq %r13, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm .Ltmp64: # %bb.43: # in Loop: Header=BB3_26 Depth=2 .Ltmp65: .cfi_escape 0x2e, 0x00 movq %r13, %rdi movq %r15, %rsi movq %r12, %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp66: # %bb.44: # in Loop: Header=BB3_26 Depth=2 .Ltmp67: .cfi_escape 0x2e, 0x00 movq %r13, %rdi movq %rbx, %rsi movq %r14, %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp68: # %bb.45: # %_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_.exit354 # in Loop: Header=BB3_26 Depth=2 movq -72(%rbp), %rdi .cfi_escape 0x2e, 0x00 movl $.L.str.10, %esi callq fopen movq %rax, %r15 movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_47 # %bb.46: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i355 # in Loop: Header=BB3_26 Depth=2 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_47: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit357 # in Loop: Header=BB3_26 Depth=2 cmpq $0, -136(%rbp) # 8-byte Folded Reload movq -336(%rbp), %r14 # 8-byte Reload je .LBB3_210 # %bb.48: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit357 # in Loop: Header=BB3_26 Depth=2 cmpq $0, -168(%rbp) # 8-byte Folded Reload je .LBB3_210 # %bb.49: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit357 # in Loop: Header=BB3_26 Depth=2 testq %r14, %r14 je .LBB3_210 # %bb.50: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit357 # in Loop: Header=BB3_26 Depth=2 testq %r15, %r15 je .LBB3_210 # %bb.51: # in Loop: Header=BB3_26 Depth=2 .cfi_escape 0x2e, 0x00 movq -136(%rbp), %rbx # 8-byte Reload movq %rbx, %rdi xorl %esi, %esi movl $2, %edx callq fseek .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq ftell movq %rax, %r13 .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq rewind .Ltmp70: .cfi_escape 0x2e, 0x00 leaq -256(%rbp), %rdi movq %r13, %rsi callq hipMalloc .Ltmp71: # %bb.52: # in Loop: Header=BB3_26 Depth=2 .Ltmp72: .cfi_escape 0x2e, 0x00 leaq -248(%rbp), %rdi movq %r13, %rsi callq hipMalloc .Ltmp73: # %bb.53: # in Loop: Header=BB3_26 Depth=2 .Ltmp74: .cfi_escape 0x2e, 0x00 leaq -240(%rbp), %rdi movq %r13, %rsi callq hipMalloc .Ltmp75: # %bb.54: # in Loop: Header=BB3_26 Depth=2 .Ltmp76: .cfi_escape 0x2e, 0x00 leaq -232(%rbp), %rdi movq %r13, %rsi callq hipMalloc .Ltmp77: # %bb.55: # in Loop: Header=BB3_26 Depth=2 .Ltmp78: .cfi_escape 0x2e, 0x00 leaq -224(%rbp), %rdi movq %r13, %rsi callq hipMalloc .Ltmp79: # %bb.56: # in Loop: Header=BB3_26 Depth=2 .cfi_escape 0x2e, 0x00 movq %r13, %rdi callq malloc movq %rax, %rbx .cfi_escape 0x2e, 0x00 movq %r13, %rdi callq malloc movq %rax, -128(%rbp) # 8-byte Spill .cfi_escape 0x2e, 0x00 movq %r13, %rdi callq malloc movq %rax, -184(%rbp) # 8-byte Spill .cfi_escape 0x2e, 0x00 movq %r13, %rdi callq malloc movq %rax, -176(%rbp) # 8-byte Spill .cfi_escape 0x2e, 0x00 movq %r13, %rdi callq malloc movq %rax, -144(%rbp) # 8-byte Spill movq %rbx, -160(%rbp) # 8-byte Spill testq %rbx, %rbx je .LBB3_211 # %bb.57: # in Loop: Header=BB3_26 Depth=2 cmpq $0, -128(%rbp) # 8-byte Folded Reload je .LBB3_211 # %bb.58: # in Loop: Header=BB3_26 Depth=2 cmpq $0, -184(%rbp) # 8-byte Folded Reload je .LBB3_211 # %bb.59: # in Loop: Header=BB3_26 Depth=2 cmpq $0, -176(%rbp) # 8-byte Folded Reload je .LBB3_211 # %bb.60: # in Loop: Header=BB3_26 Depth=2 cmpq $0, -144(%rbp) # 8-byte Folded Reload je .LBB3_211 # %bb.61: # in Loop: Header=BB3_26 Depth=2 movq %r13, -360(%rbp) # 8-byte Spill shrq $2, %r13 .cfi_escape 0x2e, 0x00 movl $4, %esi movq -160(%rbp), %rdi # 8-byte Reload movq %r13, %rdx movq -136(%rbp), %rcx # 8-byte Reload callq fread movq %rax, %r12 .cfi_escape 0x2e, 0x00 movl $4, %esi movq -128(%rbp), %rdi # 8-byte Reload movq %r13, %rdx movq -168(%rbp), %rcx # 8-byte Reload callq fread movq %rax, %rbx .cfi_escape 0x2e, 0x00 movl $4, %esi movq -184(%rbp), %rdi # 8-byte Reload movq %r13, %rdx movq %r14, %rcx callq fread movq %rax, %r14 .cfi_escape 0x2e, 0x00 movl $4, %esi movq -176(%rbp), %rdi # 8-byte Reload movq %r13, %rdx movq %r15, %rcx callq fread cmpq %r13, %r12 jne .LBB3_209 # %bb.62: # in Loop: Header=BB3_26 Depth=2 movq %r13, %r12 cmpq %r13, %rbx jne .LBB3_209 # %bb.63: # in Loop: Header=BB3_26 Depth=2 cmpq %r12, %r14 jne .LBB3_209 # %bb.64: # in Loop: Header=BB3_26 Depth=2 cmpq %r12, %rax jne .LBB3_209 # %bb.65: # in Loop: Header=BB3_26 Depth=2 movq -256(%rbp), %rdi .Ltmp80: .cfi_escape 0x2e, 0x00 movq -160(%rbp), %rsi # 8-byte Reload movq -360(%rbp), %r14 # 8-byte Reload movq %r14, %rdx movl $1, %ecx callq hipMemcpy .Ltmp81: # %bb.66: # in Loop: Header=BB3_26 Depth=2 movq -248(%rbp), %rdi .Ltmp82: .cfi_escape 0x2e, 0x00 movq -128(%rbp), %rsi # 8-byte Reload movq %r14, %rdx movl $1, %ecx callq hipMemcpy .Ltmp83: # %bb.67: # in Loop: Header=BB3_26 Depth=2 movq -240(%rbp), %rdi .Ltmp84: .cfi_escape 0x2e, 0x00 movq -184(%rbp), %rsi # 8-byte Reload movq %r14, %rdx movl $1, %ecx callq hipMemcpy .Ltmp85: # %bb.68: # in Loop: Header=BB3_26 Depth=2 movq -232(%rbp), %rdi .Ltmp86: .cfi_escape 0x2e, 0x00 movq -176(%rbp), %rsi # 8-byte Reload movq %r14, %rdx movl $1, %ecx callq hipMemcpy .Ltmp87: # %bb.69: # in Loop: Header=BB3_26 Depth=2 movq %r15, -536(%rbp) # 8-byte Spill movslq scale(%rip), %rax movq %rax, %rcx addq %rax, %rcx leaq (%rcx,%rcx,4), %rcx cmpq %rcx, %r12 jge .LBB3_71 # %bb.70: # in Loop: Header=BB3_26 Depth=2 movl $-1, scale(%rip) movl $-1, %eax .LBB3_71: # in Loop: Header=BB3_26 Depth=2 movq %rsp, -528(%rbp) # 8-byte Spill addl %eax, %eax leal (%rax,%rax,4), %eax cltq movq %r12, %rcx subq %rax, %rcx leaq 15(,%rcx,4), %rax andq $-16, %rax .cfi_escape 0x2e, 0x00 movq %rsp, %rcx subq %rax, %rcx movq %rcx, -216(%rbp) # 8-byte Spill movq %rcx, %rsp movslq scale(%rip), %rax addq %rax, %rax leaq (%rax,%rax,4), %rbx movq %r12, %rax subq %rbx, %rax leaq 15(,%rax,4), %rcx andq $-16, %rcx .cfi_escape 0x2e, 0x00 movq %rsp, %rdx subq %rcx, %rdx movq %rdx, -192(%rbp) # 8-byte Spill movq %rdx, %rsp .cfi_escape 0x2e, 0x00 movq %rsp, %r15 subq %rcx, %r15 movq %r15, %rsp andq $-4, %r14 addq $-4, %r14 movq %r14, -352(%rbp) # 8-byte Spill testq %rax, %rax jle .LBB3_74 # %bb.72: # %_ZSt6fill_nIPiliET_S1_T0_RKT1_.exit # in Loop: Header=BB3_26 Depth=2 shlq $2, %rbx movq -352(%rbp), %r14 # 8-byte Reload subq %rbx, %r14 addq $4, %r14 .cfi_escape 0x2e, 0x00 movq -216(%rbp), %rdi # 8-byte Reload xorl %esi, %esi movq %r14, %rdx callq memset@PLT .cfi_escape 0x2e, 0x00 movq -192(%rbp), %rdi # 8-byte Reload xorl %esi, %esi movq %r14, %rdx callq memset@PLT leaq (,%r12,4), %rax subq %rbx, %rax xorl %ecx, %ecx .LBB3_73: # Parent Loop BB3_25 Depth=1 # Parent Loop BB3_26 Depth=2 # => This Inner Loop Header: Depth=3 movl $-1082130432, (%r15,%rcx) # imm = 0xBF800000 addq $4, %rcx cmpq %rcx, %rax jne .LBB3_73 .LBB3_74: # %_ZSt6fill_nIPfldET_S1_T0_RKT1_.exit365 # in Loop: Header=BB3_26 Depth=2 leaq 1023(%r12), %rax shrq $10, %rax movl %eax, %eax btsq $32, %rax movq %rax, -544(%rbp) # 8-byte Spill cvtsi2ss %r12, %xmm0 movss %xmm0, -260(%rbp) # 4-byte Spill movl $-50, %r13d movq %r12, -208(%rbp) # 8-byte Spill .LBB3_75: # Parent Loop BB3_25 Depth=1 # Parent Loop BB3_26 Depth=2 # => This Loop Header: Depth=3 # Child Loop BB3_84 Depth 4 # Child Loop BB3_86 Depth 5 # Child Loop BB3_94 Depth 4 .Ltmp88: .cfi_escape 0x2e, 0x00 movq -544(%rbp), %rdi # 8-byte Reload movl $1, %esi movabsq $4294968320, %rdx # imm = 0x100000400 movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration .Ltmp89: # %bb.76: # in Loop: Header=BB3_75 Depth=3 testl %eax, %eax jne .LBB3_78 # %bb.77: # in Loop: Header=BB3_75 Depth=3 movq -256(%rbp), %rdi movq -248(%rbp), %rsi movq -240(%rbp), %rdx movq -232(%rbp), %rcx movq -224(%rbp), %r8 movl na_frames(%rip), %eax .Ltmp90: .cfi_escape 0x2e, 0x10 movl %r13d, %r9d pushq %r12 pushq %rax callq _Z21__device_stub__kernelPfS_S_S_S_iil addq $16, %rsp .Ltmp91: .LBB3_78: # in Loop: Header=BB3_75 Depth=3 movq -224(%rbp), %rsi .Ltmp92: .cfi_escape 0x2e, 0x00 movq -144(%rbp), %rdi # 8-byte Reload movq -360(%rbp), %rdx # 8-byte Reload movl $2, %ecx callq hipMemcpy .Ltmp93: # %bb.79: # in Loop: Header=BB3_75 Depth=3 movslq scale(%rip), %r14 cmpq $-1, %r14 je .LBB3_92 # %bb.80: # in Loop: Header=BB3_75 Depth=3 leaq (%r14,%r14), %rax leaq (%rax,%rax,4), %rbx subq %rbx, %r12 jle .LBB3_82 # %bb.81: # %.lr.ph.i.i.i.i446 # in Loop: Header=BB3_75 Depth=3 leaq (,%rbx,4), %rax movq -352(%rbp), %rdx # 8-byte Reload subq %rax, %rdx addq $4, %rdx .cfi_escape 0x2e, 0x00 movq -192(%rbp), %rdi # 8-byte Reload xorl %esi, %esi callq memset@PLT .LBB3_82: # %_ZSt6fill_nIPfldET_S1_T0_RKT1_.exit450 # in Loop: Header=BB3_75 Depth=3 movslq na_frames(%rip), %rax cmpq %rax, %r12 jle .LBB3_147 # %bb.83: # %.preheader.preheader # in Loop: Header=BB3_75 Depth=3 leaq -1(%rbx), %rcx movq -144(%rbp), %rdx # 8-byte Reload leaq (%rdx,%rax,4), %rdx .LBB3_84: # %.preheader # Parent Loop BB3_25 Depth=1 # Parent Loop BB3_26 Depth=2 # Parent Loop BB3_75 Depth=3 # => This Loop Header: Depth=4 # Child Loop BB3_86 Depth 5 testl %r14d, %r14d jle .LBB3_91 # %bb.85: # %.lr.ph # in Loop: Header=BB3_84 Depth=4 leaq (%rax,%rbx), %rsi movq -192(%rbp), %rdi # 8-byte Reload movss (%rdi,%rax,4), %xmm0 # xmm0 = mem[0],zero,zero,zero xorl %edi, %edi .LBB3_86: # Parent Loop BB3_25 Depth=1 # Parent Loop BB3_26 Depth=2 # Parent Loop BB3_75 Depth=3 # Parent Loop BB3_84 Depth=4 # => This Inner Loop Header: Depth=5 addss (%rdx,%rdi,4), %xmm0 cmpq %rdi, %rcx jne .LBB3_89 # %bb.87: # in Loop: Header=BB3_86 Depth=5 ucomiss (%r15,%rax,4), %xmm0 jbe .LBB3_89 # %bb.88: # in Loop: Header=BB3_86 Depth=5 movss %xmm0, (%r15,%rax,4) movq -216(%rbp), %r8 # 8-byte Reload movl %r13d, (%r8,%rax,4) .LBB3_89: # in Loop: Header=BB3_86 Depth=5 leaq (%rax,%rdi), %r8 incq %r8 incq %rdi cmpq %rsi, %r8 jl .LBB3_86 # %bb.90: # %._crit_edge # in Loop: Header=BB3_84 Depth=4 movq -192(%rbp), %rsi # 8-byte Reload movss %xmm0, (%rsi,%rax,4) .LBB3_91: # in Loop: Header=BB3_84 Depth=4 incq %rax addq $4, %rdx cmpq %rax, %r12 jg .LBB3_84 jmp .LBB3_147 .LBB3_92: # in Loop: Header=BB3_75 Depth=3 movslq na_frames(%rip), %r14 movss .LCPI3_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero movss %xmm0, -76(%rbp) # 4-byte Spill cmpq %r14, %r12 movq -200(%rbp), %rbx # 8-byte Reload jle .LBB3_105 # %bb.93: # %.lr.ph1096.preheader # in Loop: Header=BB3_75 Depth=3 movss .LCPI3_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero movss %xmm0, -76(%rbp) # 4-byte Spill .LBB3_94: # %.lr.ph1096 # Parent Loop BB3_25 Depth=1 # Parent Loop BB3_26 Depth=2 # Parent Loop BB3_75 Depth=3 # => This Inner Loop Header: Depth=4 movq -144(%rbp), %rax # 8-byte Reload movss (%rax,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero ucomiss %xmm0, %xmm0 jp .LBB3_96 .LBB3_95: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit376 # in Loop: Header=BB3_94 Depth=4 movss -76(%rbp), %xmm1 # 4-byte Reload # xmm1 = mem[0],zero,zero,zero addss %xmm0, %xmm1 movss %xmm1, -76(%rbp) # 4-byte Spill incq %r14 cmpq %r14, %r12 jg .LBB3_94 jmp .LBB3_105 .LBB3_96: # in Loop: Header=BB3_94 Depth=4 movq -160(%rbp), %rax # 8-byte Reload xorps %xmm0, %xmm0 cvtss2sd (%rax,%r14,4), %xmm0 .Ltmp95: .cfi_escape 0x2e, 0x00 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ .Ltmp96: # %bb.97: # %_ZNSolsEf.exit # in Loop: Header=BB3_94 Depth=4 .Ltmp97: .cfi_escape 0x2e, 0x00 movl $.L.str.14, %esi movl $1, %edx movq %rax, -120(%rbp) # 8-byte Spill movq -120(%rbp), %rdi # 8-byte Reload callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq -120(%rbp), %rdi # 8-byte Reload .Ltmp98: # %bb.98: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit368 # in Loop: Header=BB3_94 Depth=4 movq -128(%rbp), %rax # 8-byte Reload xorps %xmm0, %xmm0 cvtss2sd (%rax,%r14,4), %xmm0 .Ltmp99: .cfi_escape 0x2e, 0x00 callq _ZNSo9_M_insertIdEERSoT_ .Ltmp100: # %bb.99: # %_ZNSolsEf.exit370 # in Loop: Header=BB3_94 Depth=4 .Ltmp101: .cfi_escape 0x2e, 0x00 movl $.L.str.14, %esi movl $1, %edx movq %rax, %rdi movq %rax, -120(%rbp) # 8-byte Spill callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq -120(%rbp), %rdi # 8-byte Reload .Ltmp102: # %bb.100: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit372 # in Loop: Header=BB3_94 Depth=4 .Ltmp103: .cfi_escape 0x2e, 0x00 movl %r14d, %esi callq _ZNSolsEi .Ltmp104: # %bb.101: # in Loop: Header=BB3_94 Depth=4 .Ltmp105: .cfi_escape 0x2e, 0x00 movl $.L.str.14, %esi movl $1, %edx movq %rax, %rdi movq %rax, -120(%rbp) # 8-byte Spill callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq -120(%rbp), %rdi # 8-byte Reload .Ltmp106: # %bb.102: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit374 # in Loop: Header=BB3_94 Depth=4 .Ltmp107: .cfi_escape 0x2e, 0x00 movl %r13d, %esi callq _ZNSolsEi .Ltmp108: # %bb.103: # in Loop: Header=BB3_94 Depth=4 .Ltmp109: .cfi_escape 0x2e, 0x00 movl $.L.str, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp110: # %bb.104: # %._ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit376_crit_edge # in Loop: Header=BB3_94 Depth=4 movq -144(%rbp), %rax # 8-byte Reload movss (%rax,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero jmp .LBB3_95 .LBB3_105: # %._crit_edge1097 # in Loop: Header=BB3_75 Depth=3 movq -112(%rbp), %rax movq -88(%rbp), %rcx # 8-byte Reload movq (%rax,%rcx), %rsi addq $5, %rsi .Ltmp112: .cfi_escape 0x2e, 0x00 leaq -72(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp113: # %bb.106: # in Loop: Header=BB3_75 Depth=3 movq -72(%rbp), %r14 testq %r14, %r14 je .LBB3_108 # %bb.107: # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp115: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp116: jmp .LBB3_109 .LBB3_108: # in Loop: Header=BB3_75 Depth=3 movq outputFile1(%rip), %rax movq -24(%rax), %rax leaq outputFile1(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi .Ltmp117: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp118: .LBB3_109: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit379 # in Loop: Header=BB3_75 Depth=3 movq -112(%rbp), %rax movq -88(%rbp), %rcx # 8-byte Reload movq (%rax,%rcx), %rsi addq $6, %rsi .Ltmp120: .cfi_escape 0x2e, 0x00 leaq -520(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp121: # %bb.110: # in Loop: Header=BB3_75 Depth=3 movq -520(%rbp), %r14 testq %r14, %r14 je .LBB3_112 # %bb.111: # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp123: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp124: jmp .LBB3_113 .LBB3_112: # in Loop: Header=BB3_75 Depth=3 movq outputFile1(%rip), %rax movq -24(%rax), %rax leaq outputFile1(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi .Ltmp125: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp126: .LBB3_113: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit383 # in Loop: Header=BB3_75 Depth=3 movq -112(%rbp), %rax movq -88(%rbp), %rcx # 8-byte Reload movq (%rax,%rcx), %rsi addq $7, %rsi .Ltmp128: .cfi_escape 0x2e, 0x00 leaq -488(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp129: # %bb.114: # in Loop: Header=BB3_75 Depth=3 movq -488(%rbp), %r14 testq %r14, %r14 je .LBB3_116 # %bb.115: # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp131: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp132: jmp .LBB3_117 .LBB3_116: # in Loop: Header=BB3_75 Depth=3 movq outputFile1(%rip), %rax movq -24(%rax), %rax leaq outputFile1(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi .Ltmp133: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp134: .LBB3_117: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit387 # in Loop: Header=BB3_75 Depth=3 .Ltmp135: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.5, %esi movl $2, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp136: # %bb.118: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit389 # in Loop: Header=BB3_75 Depth=3 movq -112(%rbp), %rax movq (%rax,%rbx), %rsi addq $5, %rsi .Ltmp138: .cfi_escape 0x2e, 0x00 leaq -456(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp139: # %bb.119: # in Loop: Header=BB3_75 Depth=3 movq -456(%rbp), %r14 testq %r14, %r14 je .LBB3_121 # %bb.120: # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp141: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp142: jmp .LBB3_122 .LBB3_121: # in Loop: Header=BB3_75 Depth=3 movq outputFile1(%rip), %rax movq -24(%rax), %rax leaq outputFile1(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi .Ltmp143: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp144: .LBB3_122: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit393 # in Loop: Header=BB3_75 Depth=3 movq -112(%rbp), %rax movq (%rax,%rbx), %rsi addq $6, %rsi .Ltmp146: .cfi_escape 0x2e, 0x00 leaq -424(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp147: # %bb.123: # in Loop: Header=BB3_75 Depth=3 movq -424(%rbp), %r14 testq %r14, %r14 je .LBB3_125 # %bb.124: # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp149: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp150: jmp .LBB3_126 .LBB3_125: # in Loop: Header=BB3_75 Depth=3 movq outputFile1(%rip), %rax movq -24(%rax), %rax leaq outputFile1(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi .Ltmp151: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp152: .LBB3_126: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit397 # in Loop: Header=BB3_75 Depth=3 movq -112(%rbp), %rax movq (%rax,%rbx), %rsi addq $7, %rsi .Ltmp154: .cfi_escape 0x2e, 0x00 leaq -392(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp155: # %bb.127: # in Loop: Header=BB3_75 Depth=3 movq -392(%rbp), %r14 testq %r14, %r14 je .LBB3_129 # %bb.128: # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp157: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp158: jmp .LBB3_130 .LBB3_129: # in Loop: Header=BB3_75 Depth=3 movq outputFile1(%rip), %rax movq -24(%rax), %rax leaq outputFile1(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi .Ltmp159: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp160: .LBB3_130: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit401 # in Loop: Header=BB3_75 Depth=3 .Ltmp161: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl $.L.str.5, %esi movl $2, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp162: # %bb.131: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit403 # in Loop: Header=BB3_75 Depth=3 .Ltmp163: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi movl %r13d, %esi callq _ZNSolsEi .Ltmp164: # %bb.132: # in Loop: Header=BB3_75 Depth=3 .Ltmp165: movq %rax, %r14 .cfi_escape 0x2e, 0x00 movl $.L.str.5, %esi movl $2, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp166: # %bb.133: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit405 # in Loop: Header=BB3_75 Depth=3 movss -76(%rbp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero divss -260(%rbp), %xmm0 # 4-byte Folded Reload cvtss2sd %xmm0, %xmm0 .Ltmp167: .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq _ZNSo9_M_insertIdEERSoT_ .Ltmp168: # %bb.134: # %_ZNSolsEf.exit407 # in Loop: Header=BB3_75 Depth=3 .Ltmp169: .cfi_escape 0x2e, 0x00 movl $.L.str, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp170: # %bb.135: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit409 # in Loop: Header=BB3_75 Depth=3 movq -392(%rbp), %rdi leaq -376(%rbp), %rax cmpq %rax, %rdi je .LBB3_137 # %bb.136: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i410 # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_137: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit412 # in Loop: Header=BB3_75 Depth=3 movq -424(%rbp), %rdi leaq -408(%rbp), %rax cmpq %rax, %rdi je .LBB3_139 # %bb.138: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i413 # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_139: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit415 # in Loop: Header=BB3_75 Depth=3 movq -456(%rbp), %rdi leaq -440(%rbp), %rax cmpq %rax, %rdi je .LBB3_141 # %bb.140: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i416 # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_141: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit418 # in Loop: Header=BB3_75 Depth=3 movq -488(%rbp), %rdi leaq -472(%rbp), %rax cmpq %rax, %rdi je .LBB3_143 # %bb.142: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i419 # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_143: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit421 # in Loop: Header=BB3_75 Depth=3 movq -520(%rbp), %rdi leaq -504(%rbp), %rax cmpq %rax, %rdi je .LBB3_145 # %bb.144: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i422 # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_145: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit424 # in Loop: Header=BB3_75 Depth=3 movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_147 # %bb.146: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i425 # in Loop: Header=BB3_75 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_147: # %.loopexit # in Loop: Header=BB3_75 Depth=3 incl %r13d cmpl $51, %r13d movq -208(%rbp), %r12 # 8-byte Reload jne .LBB3_75 # %bb.148: # in Loop: Header=BB3_26 Depth=2 movslq scale(%rip), %rax cmpq $-1, %rax movq -200(%rbp), %r12 # 8-byte Reload je .LBB3_196 # %bb.149: # %.preheader537 # in Loop: Header=BB3_26 Depth=2 leaq (%rax,%rax), %rcx leaq (%rcx,%rcx,4), %rcx cmpq %rcx, -208(%rbp) # 8-byte Folded Reload jle .LBB3_196 # %bb.150: # %.lr.ph1100.preheader # in Loop: Header=BB3_26 Depth=2 xorl %r13d, %r13d .LBB3_151: # %.lr.ph1100 # Parent Loop BB3_25 Depth=1 # Parent Loop BB3_26 Depth=2 # => This Inner Loop Header: Depth=3 leal (%rax,%rax,4), %esi addl %r13d, %esi .Ltmp172: .cfi_escape 0x2e, 0x00 movl $outputFile1, %edi callq _ZNSolsEi .Ltmp173: # %bb.152: # in Loop: Header=BB3_151 Depth=3 .Ltmp174: movq %rax, %rbx .cfi_escape 0x2e, 0x00 movl $.L.str.5, %esi movl $2, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp175: # %bb.153: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit452 # in Loop: Header=BB3_151 Depth=3 movq -112(%rbp), %rax movq -88(%rbp), %rcx # 8-byte Reload movq (%rax,%rcx), %rsi addq $5, %rsi .Ltmp177: .cfi_escape 0x2e, 0x00 leaq -72(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp178: # %bb.154: # in Loop: Header=BB3_151 Depth=3 movq -72(%rbp), %r14 testq %r14, %r14 je .LBB3_156 # %bb.155: # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp180: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp181: jmp .LBB3_157 .LBB3_156: # in Loop: Header=BB3_151 Depth=3 movq (%rbx), %rax movq -24(%rax), %rax leaq (%rbx,%rax), %rdi movl 32(%rbx,%rax), %esi orl $1, %esi .Ltmp182: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp183: .LBB3_157: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit456 # in Loop: Header=BB3_151 Depth=3 movq -112(%rbp), %rax movq -88(%rbp), %rcx # 8-byte Reload movq (%rax,%rcx), %rsi addq $6, %rsi .Ltmp185: .cfi_escape 0x2e, 0x00 leaq -520(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp186: # %bb.158: # in Loop: Header=BB3_151 Depth=3 movq -520(%rbp), %r14 testq %r14, %r14 je .LBB3_160 # %bb.159: # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp188: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp189: jmp .LBB3_161 .LBB3_160: # in Loop: Header=BB3_151 Depth=3 movq (%rbx), %rax movq -24(%rax), %rax leaq (%rbx,%rax), %rdi movl 32(%rbx,%rax), %esi orl $1, %esi .Ltmp190: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp191: .LBB3_161: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit460 # in Loop: Header=BB3_151 Depth=3 movq -112(%rbp), %rax movq -88(%rbp), %rcx # 8-byte Reload movq (%rax,%rcx), %rsi addq $7, %rsi .Ltmp193: .cfi_escape 0x2e, 0x00 leaq -488(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp194: # %bb.162: # in Loop: Header=BB3_151 Depth=3 movq -488(%rbp), %r14 testq %r14, %r14 je .LBB3_164 # %bb.163: # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp196: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp197: jmp .LBB3_165 .LBB3_164: # in Loop: Header=BB3_151 Depth=3 movq (%rbx), %rax movq -24(%rax), %rax leaq (%rbx,%rax), %rdi movl 32(%rbx,%rax), %esi orl $1, %esi .Ltmp198: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp199: .LBB3_165: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit464 # in Loop: Header=BB3_151 Depth=3 .Ltmp200: .cfi_escape 0x2e, 0x00 movl $.L.str.5, %esi movl $2, %edx movq %rbx, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp201: # %bb.166: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit466 # in Loop: Header=BB3_151 Depth=3 movq -112(%rbp), %rax movq (%rax,%r12), %rsi addq $5, %rsi .Ltmp203: .cfi_escape 0x2e, 0x00 leaq -456(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp204: # %bb.167: # in Loop: Header=BB3_151 Depth=3 movq -456(%rbp), %r14 testq %r14, %r14 je .LBB3_169 # %bb.168: # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp206: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp207: jmp .LBB3_170 .LBB3_169: # in Loop: Header=BB3_151 Depth=3 movq (%rbx), %rax movq -24(%rax), %rax leaq (%rbx,%rax), %rdi movl 32(%rbx,%rax), %esi orl $1, %esi .Ltmp208: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp209: .LBB3_170: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit470 # in Loop: Header=BB3_151 Depth=3 movq -112(%rbp), %rax movq (%rax,%r12), %rsi addq $6, %rsi .Ltmp211: .cfi_escape 0x2e, 0x00 leaq -424(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp212: # %bb.171: # in Loop: Header=BB3_151 Depth=3 movq -424(%rbp), %r14 testq %r14, %r14 je .LBB3_173 # %bb.172: # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp214: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp215: jmp .LBB3_174 .LBB3_173: # in Loop: Header=BB3_151 Depth=3 movq (%rbx), %rax movq -24(%rax), %rax leaq (%rbx,%rax), %rdi movl 32(%rbx,%rax), %esi orl $1, %esi .Ltmp216: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp217: .LBB3_174: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit474 # in Loop: Header=BB3_151 Depth=3 movq -112(%rbp), %rax movq (%rax,%r12), %rsi addq $7, %rsi .Ltmp219: .cfi_escape 0x2e, 0x00 leaq -392(%rbp), %rdi callq _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Ltmp220: # %bb.175: # in Loop: Header=BB3_151 Depth=3 movq -392(%rbp), %r14 testq %r14, %r14 je .LBB3_177 # %bb.176: # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq strlen .Ltmp222: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp223: jmp .LBB3_178 .LBB3_177: # in Loop: Header=BB3_151 Depth=3 movq (%rbx), %rax movq -24(%rax), %rax movq %rbx, %rdi addq %rax, %rdi movl 32(%rbx,%rax), %esi orl $1, %esi .Ltmp224: .cfi_escape 0x2e, 0x00 callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .Ltmp225: .LBB3_178: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit478 # in Loop: Header=BB3_151 Depth=3 .Ltmp226: .cfi_escape 0x2e, 0x00 movl $.L.str.5, %esi movl $2, %edx movq %rbx, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp227: # %bb.179: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit480 # in Loop: Header=BB3_151 Depth=3 movq -216(%rbp), %rax # 8-byte Reload movl (%rax,%r13,4), %esi .Ltmp228: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq _ZNSolsEi .Ltmp229: # %bb.180: # in Loop: Header=BB3_151 Depth=3 .Ltmp230: movq %rax, %rbx .cfi_escape 0x2e, 0x00 movl $.L.str.5, %esi movl $2, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp231: # %bb.181: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit482 # in Loop: Header=BB3_151 Depth=3 movl scale(%rip), %eax addl %eax, %eax leal (%rax,%rax,4), %eax cvtsi2ss %eax, %xmm0 movss (%r15,%r13,4), %xmm1 # xmm1 = mem[0],zero,zero,zero divss %xmm0, %xmm1 xorps %xmm0, %xmm0 cvtss2sd %xmm1, %xmm0 .Ltmp232: .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq _ZNSo9_M_insertIdEERSoT_ .Ltmp233: # %bb.182: # %_ZNSolsEf.exit484 # in Loop: Header=BB3_151 Depth=3 .Ltmp234: .cfi_escape 0x2e, 0x00 movl $.L.str, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp235: # %bb.183: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit486 # in Loop: Header=BB3_151 Depth=3 movq -392(%rbp), %rdi leaq -376(%rbp), %rax cmpq %rax, %rdi je .LBB3_185 # %bb.184: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i487 # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_185: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit489 # in Loop: Header=BB3_151 Depth=3 movq -424(%rbp), %rdi leaq -408(%rbp), %rax cmpq %rax, %rdi je .LBB3_187 # %bb.186: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i490 # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_187: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit492 # in Loop: Header=BB3_151 Depth=3 movq -456(%rbp), %rdi leaq -440(%rbp), %rax cmpq %rax, %rdi je .LBB3_189 # %bb.188: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i493 # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_189: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit495 # in Loop: Header=BB3_151 Depth=3 movq -488(%rbp), %rdi leaq -472(%rbp), %rax cmpq %rax, %rdi je .LBB3_191 # %bb.190: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i496 # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_191: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit498 # in Loop: Header=BB3_151 Depth=3 movq -520(%rbp), %rdi leaq -504(%rbp), %rax cmpq %rax, %rdi je .LBB3_193 # %bb.192: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i499 # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_193: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit501 # in Loop: Header=BB3_151 Depth=3 movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_195 # %bb.194: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i502 # in Loop: Header=BB3_151 Depth=3 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_195: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit504 # in Loop: Header=BB3_151 Depth=3 incq %r13 movslq scale(%rip), %rax movq %rax, %rcx addq %rax, %rcx leaq (%rcx,%rcx,4), %rcx movq -208(%rbp), %rdx # 8-byte Reload subq %rcx, %rdx cmpq %r13, %rdx jg .LBB3_151 .LBB3_196: # %.loopexit538 # in Loop: Header=BB3_26 Depth=2 .cfi_escape 0x2e, 0x00 movq -136(%rbp), %rdi # 8-byte Reload callq fclose .cfi_escape 0x2e, 0x00 movq -336(%rbp), %rbx # 8-byte Reload movq %rbx, %rdi callq fclose .cfi_escape 0x2e, 0x00 movq -168(%rbp), %rdi # 8-byte Reload callq fclose .cfi_escape 0x2e, 0x00 movq -536(%rbp), %r14 # 8-byte Reload movq %r14, %rdi callq fclose movq -256(%rbp), %rdi .Ltmp237: .cfi_escape 0x2e, 0x00 callq hipFree .Ltmp238: # %bb.197: # in Loop: Header=BB3_26 Depth=2 movq -248(%rbp), %rdi .Ltmp239: .cfi_escape 0x2e, 0x00 callq hipFree .Ltmp240: # %bb.198: # in Loop: Header=BB3_26 Depth=2 movq -240(%rbp), %rdi .Ltmp241: .cfi_escape 0x2e, 0x00 callq hipFree .Ltmp242: # %bb.199: # in Loop: Header=BB3_26 Depth=2 movq -232(%rbp), %rdi .Ltmp243: .cfi_escape 0x2e, 0x00 callq hipFree .Ltmp244: # %bb.200: # in Loop: Header=BB3_26 Depth=2 movq -224(%rbp), %rdi .Ltmp245: .cfi_escape 0x2e, 0x00 callq hipFree .Ltmp246: # %bb.201: # in Loop: Header=BB3_26 Depth=2 .cfi_escape 0x2e, 0x00 movq -160(%rbp), %rdi # 8-byte Reload callq free .cfi_escape 0x2e, 0x00 movq -128(%rbp), %rdi # 8-byte Reload callq free .cfi_escape 0x2e, 0x00 movq -184(%rbp), %rdi # 8-byte Reload callq free .cfi_escape 0x2e, 0x00 movq -176(%rbp), %rdi # 8-byte Reload callq free movq -528(%rbp), %rsp # 8-byte Reload leaq -72(%rbp), %r13 movq -344(%rbp), %rax # 8-byte Reload .LBB3_202: # in Loop: Header=BB3_26 Depth=2 incq %rax cmpq $10, %rax jne .LBB3_26 # %bb.203: # in Loop: Header=BB3_25 Depth=1 movq -152(%rbp), %rcx # 8-byte Reload incq %rcx movq %rcx, %rax movq %rcx, -152(%rbp) # 8-byte Spill cmpq $10, %rcx jne .LBB3_25 # %bb.204: .cfi_escape 0x2e, 0x00 movq -136(%rbp), %rdi # 8-byte Reload callq fclose .cfi_escape 0x2e, 0x00 movq -168(%rbp), %rdi # 8-byte Reload callq fclose .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq fclose .cfi_escape 0x2e, 0x00 movq %r14, %rdi callq fclose movq -328(%rbp), %rdi leaq -312(%rbp), %rax cmpq %rax, %rdi je .LBB3_206 # %bb.205: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i322 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_206: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit324 movq -296(%rbp), %rdi leaq -280(%rbp), %rax cmpq %rax, %rdi je .LBB3_208 # %bb.207: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i325 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_208: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit327 .cfi_escape 0x2e, 0x00 leaq -112(%rbp), %rdi callq _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev xorl %eax, %eax leaq -40(%rbp), %rsp popq %rbx popq %r12 popq %r13 popq %r14 popq %r15 popq %rbp .cfi_def_cfa %rsp, 8 retq .LBB3_209: .cfi_def_cfa %rbp, 16 movq stderr(%rip), %rsi .cfi_escape 0x2e, 0x00 movl $.L.str.13, %edi callq fputs .cfi_escape 0x2e, 0x00 movl $3, %edi callq exit .LBB3_210: movq stderr(%rip), %rsi .cfi_escape 0x2e, 0x00 movl $.L.str.11, %edi callq fputs .cfi_escape 0x2e, 0x00 movl $1, %edi callq exit .LBB3_211: movq stderr(%rip), %rsi .cfi_escape 0x2e, 0x00 movl $.L.str.12, %edi callq fputs .cfi_escape 0x2e, 0x00 movl $2, %edi callq exit .LBB3_212: .Ltmp2: movq %rax, %rbx jmp .LBB3_295 .LBB3_213: .Ltmp16: jmp .LBB3_220 .LBB3_214: .Ltmp111: jmp .LBB3_289 .LBB3_215: .Ltmp41: jmp .LBB3_289 .LBB3_216: .Ltmp8: jmp .LBB3_220 .LBB3_217: .Ltmp11: movq %rax, %rbx movq -328(%rbp), %rdi leaq -312(%rbp), %rax cmpq %rax, %rdi je .LBB3_293 # %bb.218: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i280 .cfi_escape 0x2e, 0x00 jmp .LBB3_292 .LBB3_219: .Ltmp5: .LBB3_220: movq %rax, %rbx jmp .LBB3_293 .LBB3_221: .Ltmp69: movq %rax, %rbx movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_290 # %bb.222: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i.i349 .cfi_escape 0x2e, 0x00 jmp .LBB3_225 .LBB3_223: .Ltmp48: movq %rax, %rbx movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_290 # %bb.224: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i.i .cfi_escape 0x2e, 0x00 jmp .LBB3_225 .LBB3_226: .Ltmp62: movq %rax, %rbx movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_290 # %bb.227: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i.i340 .cfi_escape 0x2e, 0x00 jmp .LBB3_225 .LBB3_228: .Ltmp55: movq %rax, %rbx movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_290 # %bb.229: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i.i331 .cfi_escape 0x2e, 0x00 jmp .LBB3_225 .LBB3_230: .Ltmp192: jmp .LBB3_231 .LBB3_232: .Ltmp179: jmp .LBB3_289 .LBB3_233: .Ltmp221: jmp .LBB3_243 .LBB3_234: .Ltmp205: jmp .LBB3_261 .LBB3_235: .Ltmp195: .LBB3_231: movq %rax, %rbx jmp .LBB3_272 .LBB3_236: .Ltmp184: jmp .LBB3_237 .LBB3_238: .Ltmp210: jmp .LBB3_239 .LBB3_240: .Ltmp213: .LBB3_239: movq %rax, %rbx jmp .LBB3_268 .LBB3_241: .Ltmp187: .LBB3_237: movq %rax, %rbx jmp .LBB3_274 .LBB3_242: .Ltmp218: .LBB3_243: movq %rax, %rbx jmp .LBB3_266 .LBB3_244: .Ltmp145: jmp .LBB3_245 .LBB3_246: .Ltmp119: jmp .LBB3_247 .LBB3_248: .Ltmp130: jmp .LBB3_255 .LBB3_249: .Ltmp156: jmp .LBB3_253 .LBB3_250: .Ltmp114: jmp .LBB3_289 .LBB3_251: .Ltmp140: jmp .LBB3_263 .LBB3_252: .Ltmp153: .LBB3_253: movq %rax, %rbx jmp .LBB3_278 .LBB3_254: .Ltmp127: .LBB3_255: movq %rax, %rbx jmp .LBB3_284 .LBB3_256: .Ltmp148: .LBB3_245: movq %rax, %rbx jmp .LBB3_280 .LBB3_257: .Ltmp122: .LBB3_247: movq %rax, %rbx jmp .LBB3_286 .LBB3_258: .Ltmp247: jmp .LBB3_289 .LBB3_259: .Ltmp176: jmp .LBB3_289 .LBB3_260: .Ltmp202: .LBB3_261: movq %rax, %rbx jmp .LBB3_270 .LBB3_262: .Ltmp137: .LBB3_263: movq %rax, %rbx jmp .LBB3_282 .LBB3_264: .Ltmp236: movq %rax, %rbx movq -392(%rbp), %rdi leaq -376(%rbp), %rax cmpq %rax, %rdi je .LBB3_266 # %bb.265: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i505 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_266: movq -424(%rbp), %rdi leaq -408(%rbp), %rax cmpq %rax, %rdi je .LBB3_268 # %bb.267: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i508 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_268: movq -456(%rbp), %rdi leaq -440(%rbp), %rax cmpq %rax, %rdi je .LBB3_270 # %bb.269: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i511 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_270: movq -488(%rbp), %rdi leaq -472(%rbp), %rax cmpq %rax, %rdi je .LBB3_272 # %bb.271: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i514 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_272: movq -520(%rbp), %rdi leaq -504(%rbp), %rax cmpq %rax, %rdi je .LBB3_274 # %bb.273: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i517 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_274: movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_290 # %bb.275: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i520 .cfi_escape 0x2e, 0x00 jmp .LBB3_225 .LBB3_276: .Ltmp171: movq %rax, %rbx movq -392(%rbp), %rdi leaq -376(%rbp), %rax cmpq %rax, %rdi je .LBB3_278 # %bb.277: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i428 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_278: movq -424(%rbp), %rdi leaq -408(%rbp), %rax cmpq %rax, %rdi je .LBB3_280 # %bb.279: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i431 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_280: movq -456(%rbp), %rdi leaq -440(%rbp), %rax cmpq %rax, %rdi je .LBB3_282 # %bb.281: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i434 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_282: movq -488(%rbp), %rdi leaq -472(%rbp), %rax cmpq %rax, %rdi je .LBB3_284 # %bb.283: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i437 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_284: movq -520(%rbp), %rdi leaq -504(%rbp), %rax cmpq %rax, %rdi je .LBB3_286 # %bb.285: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i440 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_286: movq -72(%rbp), %rdi leaq -56(%rbp), %rax cmpq %rax, %rdi je .LBB3_290 # %bb.287: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i443 .cfi_escape 0x2e, 0x00 .LBB3_225: callq _ZdlPv jmp .LBB3_290 .LBB3_288: .Ltmp94: .LBB3_289: movq %rax, %rbx .LBB3_290: movq -328(%rbp), %rdi leaq -312(%rbp), %rax cmpq %rax, %rdi je .LBB3_293 # %bb.291: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i523 .cfi_escape 0x2e, 0x00 .LBB3_292: callq _ZdlPv .LBB3_293: movq -296(%rbp), %rdi leaq -280(%rbp), %rax cmpq %rax, %rdi je .LBB3_295 # %bb.294: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i526 .cfi_escape 0x2e, 0x00 callq _ZdlPv .LBB3_295: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit528 .cfi_escape 0x2e, 0x00 leaq -112(%rbp), %rdi callq _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .cfi_escape 0x2e, 0x00 movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end3: .size main, .Lfunc_end3-main .cfi_endproc .section .gcc_except_table,"a",@progbits .p2align 2, 0x0 GCC_except_table3: .Lexception0: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end0-.Lcst_begin0 .Lcst_begin0: .uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 1 << .uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1 .uleb128 .Ltmp2-.Lfunc_begin0 # jumps to .Ltmp2 .byte 0 # On action: cleanup .uleb128 .Ltmp3-.Lfunc_begin0 # >> Call Site 2 << .uleb128 .Ltmp4-.Ltmp3 # Call between .Ltmp3 and .Ltmp4 .uleb128 .Ltmp5-.Lfunc_begin0 # jumps to .Ltmp5 .byte 0 # On action: cleanup .uleb128 .Ltmp6-.Lfunc_begin0 # >> Call Site 3 << .uleb128 .Ltmp7-.Ltmp6 # Call between .Ltmp6 and .Ltmp7 .uleb128 .Ltmp8-.Lfunc_begin0 # jumps to .Ltmp8 .byte 0 # On action: cleanup .uleb128 .Ltmp9-.Lfunc_begin0 # >> Call Site 4 << .uleb128 .Ltmp10-.Ltmp9 # Call between .Ltmp9 and .Ltmp10 .uleb128 .Ltmp11-.Lfunc_begin0 # jumps to .Ltmp11 .byte 0 # On action: cleanup .uleb128 .Ltmp12-.Lfunc_begin0 # >> Call Site 5 << .uleb128 .Ltmp15-.Ltmp12 # Call between .Ltmp12 and .Ltmp15 .uleb128 .Ltmp16-.Lfunc_begin0 # jumps to .Ltmp16 .byte 0 # On action: cleanup .uleb128 .Ltmp17-.Lfunc_begin0 # >> Call Site 6 << .uleb128 .Ltmp40-.Ltmp17 # Call between .Ltmp17 and .Ltmp40 .uleb128 .Ltmp41-.Lfunc_begin0 # jumps to .Ltmp41 .byte 0 # On action: cleanup .uleb128 .Ltmp42-.Lfunc_begin0 # >> Call Site 7 << .uleb128 .Ltmp47-.Ltmp42 # Call between .Ltmp42 and .Ltmp47 .uleb128 .Ltmp48-.Lfunc_begin0 # jumps to .Ltmp48 .byte 0 # On action: cleanup .uleb128 .Ltmp49-.Lfunc_begin0 # >> Call Site 8 << .uleb128 .Ltmp54-.Ltmp49 # Call between .Ltmp49 and .Ltmp54 .uleb128 .Ltmp55-.Lfunc_begin0 # jumps to .Ltmp55 .byte 0 # On action: cleanup .uleb128 .Ltmp56-.Lfunc_begin0 # >> Call Site 9 << .uleb128 .Ltmp61-.Ltmp56 # Call between .Ltmp56 and .Ltmp61 .uleb128 .Ltmp62-.Lfunc_begin0 # jumps to .Ltmp62 .byte 0 # On action: cleanup .uleb128 .Ltmp63-.Lfunc_begin0 # >> Call Site 10 << .uleb128 .Ltmp68-.Ltmp63 # Call between .Ltmp63 and .Ltmp68 .uleb128 .Ltmp69-.Lfunc_begin0 # jumps to .Ltmp69 .byte 0 # On action: cleanup .uleb128 .Ltmp70-.Lfunc_begin0 # >> Call Site 11 << .uleb128 .Ltmp87-.Ltmp70 # Call between .Ltmp70 and .Ltmp87 .uleb128 .Ltmp247-.Lfunc_begin0 # jumps to .Ltmp247 .byte 0 # On action: cleanup .uleb128 .Ltmp87-.Lfunc_begin0 # >> Call Site 12 << .uleb128 .Ltmp88-.Ltmp87 # Call between .Ltmp87 and .Ltmp88 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp88-.Lfunc_begin0 # >> Call Site 13 << .uleb128 .Ltmp93-.Ltmp88 # Call between .Ltmp88 and .Ltmp93 .uleb128 .Ltmp94-.Lfunc_begin0 # jumps to .Ltmp94 .byte 0 # On action: cleanup .uleb128 .Ltmp93-.Lfunc_begin0 # >> Call Site 14 << .uleb128 .Ltmp95-.Ltmp93 # Call between .Ltmp93 and .Ltmp95 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp95-.Lfunc_begin0 # >> Call Site 15 << .uleb128 .Ltmp110-.Ltmp95 # Call between .Ltmp95 and .Ltmp110 .uleb128 .Ltmp111-.Lfunc_begin0 # jumps to .Ltmp111 .byte 0 # On action: cleanup .uleb128 .Ltmp112-.Lfunc_begin0 # >> Call Site 16 << .uleb128 .Ltmp113-.Ltmp112 # Call between .Ltmp112 and .Ltmp113 .uleb128 .Ltmp114-.Lfunc_begin0 # jumps to .Ltmp114 .byte 0 # On action: cleanup .uleb128 .Ltmp115-.Lfunc_begin0 # >> Call Site 17 << .uleb128 .Ltmp118-.Ltmp115 # Call between .Ltmp115 and .Ltmp118 .uleb128 .Ltmp119-.Lfunc_begin0 # jumps to .Ltmp119 .byte 0 # On action: cleanup .uleb128 .Ltmp120-.Lfunc_begin0 # >> Call Site 18 << .uleb128 .Ltmp121-.Ltmp120 # Call between .Ltmp120 and .Ltmp121 .uleb128 .Ltmp122-.Lfunc_begin0 # jumps to .Ltmp122 .byte 0 # On action: cleanup .uleb128 .Ltmp123-.Lfunc_begin0 # >> Call Site 19 << .uleb128 .Ltmp126-.Ltmp123 # Call between .Ltmp123 and .Ltmp126 .uleb128 .Ltmp127-.Lfunc_begin0 # jumps to .Ltmp127 .byte 0 # On action: cleanup .uleb128 .Ltmp128-.Lfunc_begin0 # >> Call Site 20 << .uleb128 .Ltmp129-.Ltmp128 # Call between .Ltmp128 and .Ltmp129 .uleb128 .Ltmp130-.Lfunc_begin0 # jumps to .Ltmp130 .byte 0 # On action: cleanup .uleb128 .Ltmp131-.Lfunc_begin0 # >> Call Site 21 << .uleb128 .Ltmp136-.Ltmp131 # Call between .Ltmp131 and .Ltmp136 .uleb128 .Ltmp137-.Lfunc_begin0 # jumps to .Ltmp137 .byte 0 # On action: cleanup .uleb128 .Ltmp138-.Lfunc_begin0 # >> Call Site 22 << .uleb128 .Ltmp139-.Ltmp138 # Call between .Ltmp138 and .Ltmp139 .uleb128 .Ltmp140-.Lfunc_begin0 # jumps to .Ltmp140 .byte 0 # On action: cleanup .uleb128 .Ltmp141-.Lfunc_begin0 # >> Call Site 23 << .uleb128 .Ltmp144-.Ltmp141 # Call between .Ltmp141 and .Ltmp144 .uleb128 .Ltmp145-.Lfunc_begin0 # jumps to .Ltmp145 .byte 0 # On action: cleanup .uleb128 .Ltmp146-.Lfunc_begin0 # >> Call Site 24 << .uleb128 .Ltmp147-.Ltmp146 # Call between .Ltmp146 and .Ltmp147 .uleb128 .Ltmp148-.Lfunc_begin0 # jumps to .Ltmp148 .byte 0 # On action: cleanup .uleb128 .Ltmp149-.Lfunc_begin0 # >> Call Site 25 << .uleb128 .Ltmp152-.Ltmp149 # Call between .Ltmp149 and .Ltmp152 .uleb128 .Ltmp153-.Lfunc_begin0 # jumps to .Ltmp153 .byte 0 # On action: cleanup .uleb128 .Ltmp154-.Lfunc_begin0 # >> Call Site 26 << .uleb128 .Ltmp155-.Ltmp154 # Call between .Ltmp154 and .Ltmp155 .uleb128 .Ltmp156-.Lfunc_begin0 # jumps to .Ltmp156 .byte 0 # On action: cleanup .uleb128 .Ltmp157-.Lfunc_begin0 # >> Call Site 27 << .uleb128 .Ltmp170-.Ltmp157 # Call between .Ltmp157 and .Ltmp170 .uleb128 .Ltmp171-.Lfunc_begin0 # jumps to .Ltmp171 .byte 0 # On action: cleanup .uleb128 .Ltmp172-.Lfunc_begin0 # >> Call Site 28 << .uleb128 .Ltmp175-.Ltmp172 # Call between .Ltmp172 and .Ltmp175 .uleb128 .Ltmp176-.Lfunc_begin0 # jumps to .Ltmp176 .byte 0 # On action: cleanup .uleb128 .Ltmp177-.Lfunc_begin0 # >> Call Site 29 << .uleb128 .Ltmp178-.Ltmp177 # Call between .Ltmp177 and .Ltmp178 .uleb128 .Ltmp179-.Lfunc_begin0 # jumps to .Ltmp179 .byte 0 # On action: cleanup .uleb128 .Ltmp180-.Lfunc_begin0 # >> Call Site 30 << .uleb128 .Ltmp183-.Ltmp180 # Call between .Ltmp180 and .Ltmp183 .uleb128 .Ltmp184-.Lfunc_begin0 # jumps to .Ltmp184 .byte 0 # On action: cleanup .uleb128 .Ltmp185-.Lfunc_begin0 # >> Call Site 31 << .uleb128 .Ltmp186-.Ltmp185 # Call between .Ltmp185 and .Ltmp186 .uleb128 .Ltmp187-.Lfunc_begin0 # jumps to .Ltmp187 .byte 0 # On action: cleanup .uleb128 .Ltmp188-.Lfunc_begin0 # >> Call Site 32 << .uleb128 .Ltmp191-.Ltmp188 # Call between .Ltmp188 and .Ltmp191 .uleb128 .Ltmp192-.Lfunc_begin0 # jumps to .Ltmp192 .byte 0 # On action: cleanup .uleb128 .Ltmp193-.Lfunc_begin0 # >> Call Site 33 << .uleb128 .Ltmp194-.Ltmp193 # Call between .Ltmp193 and .Ltmp194 .uleb128 .Ltmp195-.Lfunc_begin0 # jumps to .Ltmp195 .byte 0 # On action: cleanup .uleb128 .Ltmp196-.Lfunc_begin0 # >> Call Site 34 << .uleb128 .Ltmp201-.Ltmp196 # Call between .Ltmp196 and .Ltmp201 .uleb128 .Ltmp202-.Lfunc_begin0 # jumps to .Ltmp202 .byte 0 # On action: cleanup .uleb128 .Ltmp203-.Lfunc_begin0 # >> Call Site 35 << .uleb128 .Ltmp204-.Ltmp203 # Call between .Ltmp203 and .Ltmp204 .uleb128 .Ltmp205-.Lfunc_begin0 # jumps to .Ltmp205 .byte 0 # On action: cleanup .uleb128 .Ltmp206-.Lfunc_begin0 # >> Call Site 36 << .uleb128 .Ltmp209-.Ltmp206 # Call between .Ltmp206 and .Ltmp209 .uleb128 .Ltmp210-.Lfunc_begin0 # jumps to .Ltmp210 .byte 0 # On action: cleanup .uleb128 .Ltmp211-.Lfunc_begin0 # >> Call Site 37 << .uleb128 .Ltmp212-.Ltmp211 # Call between .Ltmp211 and .Ltmp212 .uleb128 .Ltmp213-.Lfunc_begin0 # jumps to .Ltmp213 .byte 0 # On action: cleanup .uleb128 .Ltmp214-.Lfunc_begin0 # >> Call Site 38 << .uleb128 .Ltmp217-.Ltmp214 # Call between .Ltmp214 and .Ltmp217 .uleb128 .Ltmp218-.Lfunc_begin0 # jumps to .Ltmp218 .byte 0 # On action: cleanup .uleb128 .Ltmp219-.Lfunc_begin0 # >> Call Site 39 << .uleb128 .Ltmp220-.Ltmp219 # Call between .Ltmp219 and .Ltmp220 .uleb128 .Ltmp221-.Lfunc_begin0 # jumps to .Ltmp221 .byte 0 # On action: cleanup .uleb128 .Ltmp222-.Lfunc_begin0 # >> Call Site 40 << .uleb128 .Ltmp235-.Ltmp222 # Call between .Ltmp222 and .Ltmp235 .uleb128 .Ltmp236-.Lfunc_begin0 # jumps to .Ltmp236 .byte 0 # On action: cleanup .uleb128 .Ltmp237-.Lfunc_begin0 # >> Call Site 41 << .uleb128 .Ltmp246-.Ltmp237 # Call between .Ltmp237 and .Ltmp246 .uleb128 .Ltmp247-.Lfunc_begin0 # jumps to .Ltmp247 .byte 0 # On action: cleanup .uleb128 .Ltmp246-.Lfunc_begin0 # >> Call Site 42 << .uleb128 .Lfunc_end3-.Ltmp246 # Call between .Ltmp246 and .Lfunc_end3 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end0: .p2align 2, 0x0 # -- End function .section .text._Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,"axG",@progbits,_Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,comdat .weak _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ # -- Begin function _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .type _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,@function _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_: # @_Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .Lfunc_begin1: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception1 # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 subq $408, %rsp # imm = 0x198 .cfi_def_cfa_offset 432 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rsi, %r14 movq %rdi, %rbx leaq 16(%rsp), %rdi callq _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1Ev leaq 32(%rsp), %rdi movb (%r14), %al movb %al, 15(%rsp) movq (%rdi), %rcx movq -24(%rcx), %rcx cmpq $0, 48(%rsp,%rcx) je .LBB4_2 # %bb.1: .Ltmp248: leaq 15(%rsp), %rsi movl $1, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l .Ltmp249: jmp .LBB4_3 .LBB4_2: .Ltmp250: movsbl %al, %esi callq _ZNSo3putEc .Ltmp251: .LBB4_3: leaq 40(%rsp), %rsi .Ltmp252: movq %rbx, %rdi callq _ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv .Ltmp253: # %bb.4: # %_ZNKSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv.exit leaq 16(%rsp), %rdi movl $_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE, %esi callq _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev leaq 144(%rsp), %rdi callq _ZNSt8ios_baseD2Ev movq %rbx, %rax addq $408, %rsp # imm = 0x198 .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .LBB4_5: .cfi_def_cfa_offset 432 .Ltmp254: movq %rax, %rbx leaq 16(%rsp), %rdi movl $_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE, %esi callq _ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev leaq 144(%rsp), %rdi callq _ZNSt8ios_baseD2Ev movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end4: .size _Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_, .Lfunc_end4-_Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_ .cfi_endproc .section .gcc_except_table._Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,"aG",@progbits,_Z9to_stringIcENSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKT_,comdat .p2align 2, 0x0 GCC_except_table4: .Lexception1: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end1-.Lcst_begin1 .Lcst_begin1: .uleb128 .Lfunc_begin1-.Lfunc_begin1 # >> Call Site 1 << .uleb128 .Ltmp248-.Lfunc_begin1 # Call between .Lfunc_begin1 and .Ltmp248 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp248-.Lfunc_begin1 # >> Call Site 2 << .uleb128 .Ltmp253-.Ltmp248 # Call between .Ltmp248 and .Ltmp253 .uleb128 .Ltmp254-.Lfunc_begin1 # jumps to .Ltmp254 .byte 0 # On action: cleanup .uleb128 .Ltmp253-.Lfunc_begin1 # >> Call Site 3 << .uleb128 .Lfunc_end4-.Ltmp253 # Call between .Ltmp253 and .Lfunc_end4 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end1: .p2align 2, 0x0 # -- End function .section .text._ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev,"axG",@progbits,_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev,comdat .weak _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev # -- Begin function _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .p2align 1, 0x90 .type _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev,@function _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev: # @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq (%rdi), %rbx movq 8(%rdi), %r15 cmpq %r15, %rbx je .LBB5_6 # %bb.1: # %.lr.ph.i.i.i.preheader movq %rdi, %r14 .LBB5_2: # %.lr.ph.i.i.i # =>This Inner Loop Header: Depth=1 movq (%rbx), %rdi addq $16, %rbx cmpq %rbx, %rdi je .LBB5_4 # %bb.3: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i.i.i.i # in Loop: Header=BB5_2 Depth=1 callq _ZdlPv .LBB5_4: # %_ZSt8_DestroyINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEvPT_.exit.i.i.i # in Loop: Header=BB5_2 Depth=1 addq $16, %rbx cmpq %r15, %rbx jne .LBB5_2 # %bb.5: # %_ZSt8_DestroyIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_EvT_S7_RSaIT0_E.exitthread-pre-split movq (%r14), %rbx .LBB5_6: # %_ZSt8_DestroyIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_EvT_S7_RSaIT0_E.exit testq %rbx, %rbx je .LBB5_7 # %bb.8: movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp _ZdlPv # TAILCALL .LBB5_7: # %_ZNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev.exit .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end5: .size _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev, .Lfunc_end5-_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EED2Ev .cfi_endproc # -- End function .section .text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat .hidden __clang_call_terminate # -- Begin function __clang_call_terminate .weak __clang_call_terminate .type __clang_call_terminate,@function __clang_call_terminate: # @__clang_call_terminate .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 callq __cxa_begin_catch callq _ZSt9terminatev .Lfunc_end6: .size __clang_call_terminate, .Lfunc_end6-__clang_call_terminate .cfi_endproc # -- End function .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .p2align 1, 0x90 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdx, %r14 movq %rsi, %r15 movq %rdi, %rbx subq %rsi, %r14 movq %r14, (%rsp) cmpq $15, %r14 jbe .LBB7_1 # %bb.2: movq %rsp, %r12 movq %rbx, %rdi movq %r12, %rsi xorl %edx, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm movq %rax, (%rbx) movq (%r12), %rcx movq %rcx, 16(%rbx) jmp .LBB7_3 .LBB7_1: # %._crit_edge movq (%rbx), %rax .LBB7_3: testq %r14, %r14 je .LBB7_7 # %bb.4: cmpq $1, %r14 jne .LBB7_6 # %bb.5: movb (%r15), %cl movb %cl, (%rax) jmp .LBB7_7 .LBB7_6: movq %rax, %rdi movq %r15, %rsi movq %r14, %rdx callq memcpy@PLT .LBB7_7: # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit movq (%rsp), %rax movq %rax, 8(%rbx) movq (%rbx), %rcx movb $0, (%rcx,%rax) addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end7: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end7-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .cfi_endproc # -- End function .section .text._ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_,"axG",@progbits,_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_,comdat .weak _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_ # -- Begin function _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_ .p2align 1, 0x90 .type _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_,@function _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_: # @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rsi, %r14 movq %rdi, %rbx movq 8(%rdi), %r15 cmpq 16(%rdi), %r15 je .LBB8_5 # %bb.1: leaq 16(%r15), %rdi movq %rdi, (%r15) movq (%r14), %rsi leaq 16(%r14), %r12 cmpq %r12, %rsi je .LBB8_2 # %bb.3: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i movq %rsi, (%r15) movq (%r12), %rax movq %rax, 16(%r15) jmp .LBB8_4 .LBB8_5: movq %rbx, %rdi movq %r15, %rsi movq %r14, %rdx callq _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_ movq 8(%rbx), %rax jmp .LBB8_6 .LBB8_2: movq 8(%r14), %rdx incq %rdx callq memcpy@PLT .LBB8_4: # %_ZNSt16allocator_traitsISaINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEE9constructIS5_JS5_EEEvRS6_PT_DpOT0_.exit movq 8(%r14), %rax movq %rax, 8(%r15) movq %r12, (%r14) movq $0, 8(%r14) movb $0, 16(%r14) movq 8(%rbx), %rax addq $32, %rax movq %rax, 8(%rbx) .LBB8_6: addq $-32, %rax addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end8: .size _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_, .Lfunc_end8-_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12emplace_backIJS5_EEERS5_DpOT_ .cfi_endproc # -- End function .section .text._ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_,"axG",@progbits,_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_,comdat .weak _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_ # -- Begin function _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_ .p2align 1, 0x90 .type _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_,@function _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_: # @_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_ .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rdx, %rbp movq %rsi, %r12 movq %rdi, %r14 movl $1, %esi movl $.L.str.16, %edx callq _ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc movq (%r14), %rcx movq 8(%r14), %r15 movq %r12, %rbx movq %rcx, (%rsp) # 8-byte Spill subq %rcx, %rbx sarq $5, %rbx testq %rax, %rax movq %r14, 8(%rsp) # 8-byte Spill movq %rax, 16(%rsp) # 8-byte Spill je .LBB9_1 # %bb.2: movq %r14, %rdi movq %rax, %rsi xorl %edx, %edx callq _ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv movq %rax, %r13 jmp .LBB9_3 .LBB9_1: xorl %r13d, %r13d .LBB9_3: # %_ZNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE11_M_allocateEm.exit shlq $5, %rbx leaq (%rbx,%r13), %rdi addq $16, %rdi movq %rdi, -16(%rdi) movq (%rbp), %rsi leaq 16(%rbp), %r14 cmpq %r14, %rsi je .LBB9_4 # %bb.5: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i leaq (%rbx,%r13), %rax movq %rsi, (%rax) movq (%r14), %rax movq %rax, (%rdi) jmp .LBB9_6 .LBB9_4: movq 8(%rbp), %rdx incq %rdx callq memcpy@PLT .LBB9_6: # %_ZNSt16allocator_traitsISaINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEE9constructIS5_JS5_EEEvRS6_PT_DpOT0_.exit movq 8(%rbp), %rax movq %rax, 8(%r13,%rbx) movq %r14, (%rbp) movq $0, 8(%rbp) movb $0, 16(%rbp) movq %r13, %rbp movq (%rsp), %rdi # 8-byte Reload cmpq %r12, %rdi je .LBB9_13 # %bb.7: # %.lr.ph.i.i.i.preheader leaq 16(%r13), %rbp leaq 16(%rdi), %rbx .LBB9_8: # %.lr.ph.i.i.i # =>This Inner Loop Header: Depth=1 movq %rbp, -16(%rbp) movq -16(%rbx), %rsi cmpq %rsi, %rbx je .LBB9_9 # %bb.10: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i.i.i.i.i # in Loop: Header=BB9_8 Depth=1 movq %rsi, -16(%rbp) movq (%rbx), %rax movq %rax, (%rbp) movq -8(%rbx), %r14 jmp .LBB9_11 .LBB9_9: # in Loop: Header=BB9_8 Depth=1 movq -8(%rbx), %r14 leaq 1(%r14), %rdx movq %rbp, %rdi callq memcpy@PLT .LBB9_11: # %_ZSt19__relocate_object_aINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_SaIS5_EEvPT_PT0_RT1_.exit.i.i.i # in Loop: Header=BB9_8 Depth=1 movq %r14, -8(%rbp) movq %rbx, -16(%rbx) movq $0, -8(%rbx) movb $0, (%rbx) addq $32, %rbp leaq 32(%rbx), %rax addq $16, %rbx cmpq %r12, %rbx movq %rax, %rbx jne .LBB9_8 # %bb.12: # %_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE11_S_relocateEPS5_S8_S8_RS6_.exit.loopexit addq $-16, %rbp movq (%rsp), %rdi # 8-byte Reload .LBB9_13: # %_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE11_S_relocateEPS5_S8_S8_RS6_.exit cmpq %r12, %r15 je .LBB9_14 # %bb.15: # %.lr.ph.i.i.i17.preheader addq $48, %rbp addq $16, %r12 movq 8(%rsp), %r14 # 8-byte Reload .LBB9_16: # %.lr.ph.i.i.i17 # =>This Inner Loop Header: Depth=1 movq %rbp, -16(%rbp) movq -16(%r12), %rsi cmpq %rsi, %r12 je .LBB9_17 # %bb.18: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i.i.i.i.i20 # in Loop: Header=BB9_16 Depth=1 movq %rsi, -16(%rbp) movq (%r12), %rax movq %rax, (%rbp) movq -8(%r12), %rbx jmp .LBB9_19 .LBB9_17: # in Loop: Header=BB9_16 Depth=1 movq -8(%r12), %rbx leaq 1(%rbx), %rdx movq %rbp, %rdi callq memcpy@PLT .LBB9_19: # %_ZSt19__relocate_object_aINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_SaIS5_EEvPT_PT0_RT1_.exit.i.i.i23 # in Loop: Header=BB9_16 Depth=1 movq %rbx, -8(%rbp) movq %r12, -16(%r12) movq $0, -8(%r12) movb $0, (%r12) addq $32, %rbp leaq 32(%r12), %rax addq $16, %r12 cmpq %r15, %r12 movq %rax, %r12 jne .LBB9_16 # %bb.20: # %_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE11_S_relocateEPS5_S8_S8_RS6_.exit26.loopexit addq $-16, %rbp movq (%rsp), %rdi # 8-byte Reload jmp .LBB9_21 .LBB9_14: addq $32, %rbp movq 8(%rsp), %r14 # 8-byte Reload .LBB9_21: # %_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE11_S_relocateEPS5_S8_S8_RS6_.exit26 testq %rdi, %rdi je .LBB9_23 # %bb.22: callq _ZdlPv .LBB9_23: # %_ZNSt12_Vector_baseINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE13_M_deallocateEPS5_m.exit movq %r13, (%r14) movq %rbp, 8(%r14) movq 16(%rsp), %rax # 8-byte Reload shlq $5, %rax addq %r13, %rax movq %rax, 16(%r14) addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end9: .size _ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_, .Lfunc_end9-_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE17_M_realloc_insertIJS5_EEEvN9__gnu_cxx17__normal_iteratorIPS5_S7_EEDpOT_ .cfi_endproc # -- End function .section .text._ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc,comdat .weak _ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc .p2align 1, 0x90 .type _ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc,@function _ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc .cfi_startproc # %bb.0: movabsq $288230376151711743, %rcx # imm = 0x3FFFFFFFFFFFFFF movq 8(%rdi), %r8 subq (%rdi), %r8 sarq $5, %r8 movq %rcx, %rax subq %r8, %rax cmpq %rsi, %rax jb .LBB10_2 # %bb.1: cmpq %rsi, %r8 cmovaq %r8, %rsi leaq (%rsi,%r8), %rax cmpq %rcx, %rax cmovaeq %rcx, %rax addq %r8, %rsi cmovbq %rcx, %rax retq .LBB10_2: pushq %rax .cfi_def_cfa_offset 16 movq %rdx, %rdi callq _ZSt20__throw_length_errorPKc .Lfunc_end10: .size _ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc, .Lfunc_end10-_ZNKSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE12_M_check_lenEmPKc .cfi_endproc # -- End function .section .text._ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv,comdat .weak _ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv .p2align 1, 0x90 .type _ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv,@function _ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv: # @_ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movq %rsi, %rax shrq $58, %rax jne .LBB11_1 # %bb.3: shlq $5, %rsi movq %rsi, %rdi popq %rax .cfi_def_cfa_offset 8 jmp _Znwm # TAILCALL .LBB11_1: .cfi_def_cfa_offset 16 shrq $59, %rsi je .LBB11_2 # %bb.4: callq _ZSt28__throw_bad_array_new_lengthv .LBB11_2: callq _ZSt17__throw_bad_allocv .Lfunc_end11: .size _ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv, .Lfunc_end11-_ZNSt15__new_allocatorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEE8allocateEmPKv .cfi_endproc # -- End function .section .text._ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_,"axG",@progbits,_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_,comdat .weak _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_ # -- Begin function _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_ .type _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_,@function _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_: # @_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $16, %rsp .cfi_def_cfa_offset 64 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdx, %r15 movq %rsi, %rdx subq %rdi, %rdx sarq $5, %rdx cmpq $17, %rdx jl .LBB12_6 # %bb.1: # %.lr.ph movq %rsi, %r14 movq %rdi, %rbx leaq 32(%rdi), %r12 decq %r15 .LBB12_2: # =>This Inner Loop Header: Depth=1 cmpq $-1, %r15 je .LBB12_3 # %bb.5: # in Loop: Header=BB12_2 Depth=1 shlq $4, %rdx andq $-32, %rdx addq %rbx, %rdx leaq -32(%r14), %rcx movq %rbx, %rdi movq %r12, %rsi callq _ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_ movq %r12, %rdi movq %r14, %rsi movq %rbx, %rdx callq _ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_ movq %rax, %r13 movq %rax, %rdi movq %r14, %rsi movq %r15, %rdx callq _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_ movq %r13, %rdx subq %rbx, %rdx sarq $5, %rdx decq %r15 movq %r13, %r14 cmpq $16, %rdx jg .LBB12_2 jmp .LBB12_6 .LBB12_3: leaq 15(%rsp), %rdx movq %rbx, %rdi movq %r14, %rsi callq _ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_ movq %r14, %r12 subq %rbx, %r12 addq $-32, %r14 leaq 14(%rsp), %r15 .LBB12_4: # %.lr.ph.i.i # =>This Inner Loop Header: Depth=1 movq %rbx, %rdi movq %r14, %rsi movq %r14, %rdx movq %r15, %rcx callq _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_ addq $-32, %r12 addq $-32, %r14 cmpq $32, %r12 jg .LBB12_4 .LBB12_6: # %.loopexit addq $16, %rsp .cfi_def_cfa_offset 48 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end12: .size _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_, .Lfunc_end12-_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElNS0_5__ops15_Iter_less_iterEEvT_SF_T0_T1_ .cfi_endproc # -- End function .section .text._ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_,"axG",@progbits,_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_,comdat .weak _ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ # -- Begin function _ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ .type _ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_,@function _ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_: # @_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rsi, %rbx movq %rsi, %rax subq %rdi, %rax cmpq $513, %rax # imm = 0x201 jl .LBB13_5 # %bb.1: leaq 512(%rdi), %r14 movq %r14, %rsi callq _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ .LBB13_3: # %.lr.ph.i # =>This Inner Loop Header: Depth=1 cmpq %rbx, %r14 je .LBB13_4 # %bb.2: # %.lr.ph.i # in Loop: Header=BB13_3 Depth=1 movq %r14, %rdi callq _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_ addq $32, %r14 jmp .LBB13_3 .LBB13_5: movq %rbx, %rsi addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ # TAILCALL .LBB13_4: # %_ZSt26__unguarded_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_.exit .cfi_def_cfa_offset 32 addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end13: .size _ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_, .Lfunc_end13-_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ .cfi_endproc # -- End function .section .text._ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_,"axG",@progbits,_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_,comdat .weak _ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_ # -- Begin function _ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_ .type _ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_,@function _ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_: # @_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_ .Lfunc_begin2: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception2 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $72, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rsi, %r14 movq %rdi, %rax movq %rdi, (%rsp) # 8-byte Spill subq %rdi, %r14 sarq $5, %r14 cmpq $2, %r14 jl .LBB14_14 # %bb.1: leaq -2(%r14), %r13 shrq %r13 leaq 24(%rsp), %rbx leaq 56(%rsp), %r12 movq %r13, %rax shlq $5, %rax movq (%rsp), %rcx # 8-byte Reload leaq (%rax,%rcx), %rbp addq $16, %rbp .LBB14_2: # =>This Inner Loop Header: Depth=1 movq %rbx, 8(%rsp) movq -16(%rbp), %rsi cmpq %rsi, %rbp je .LBB14_3 # %bb.4: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i # in Loop: Header=BB14_2 Depth=1 movq %rsi, 8(%rsp) movq (%rbp), %rax movq %rax, 24(%rsp) movq -8(%rbp), %r15 jmp .LBB14_5 .LBB14_3: # in Loop: Header=BB14_2 Depth=1 movq -8(%rbp), %r15 leaq 1(%r15), %rdx movq %rbx, %rdi callq memcpy@PLT movq %rbx, %rsi .LBB14_5: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_.exit # in Loop: Header=BB14_2 Depth=1 movq %rbp, -16(%rbp) movq $0, -8(%rbp) movb $0, (%rbp) movq %r12, 40(%rsp) cmpq %rbx, %rsi je .LBB14_6 # %bb.7: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i10 # in Loop: Header=BB14_2 Depth=1 movq %rsi, 40(%rsp) movq 24(%rsp), %rax movq %rax, 56(%rsp) jmp .LBB14_8 .LBB14_6: # in Loop: Header=BB14_2 Depth=1 leaq 1(%r15), %rdx movq %r12, %rdi movq %rbx, %rsi callq memcpy@PLT .LBB14_8: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_.exit11 # in Loop: Header=BB14_2 Depth=1 movq %r15, 48(%rsp) movq %rbx, 8(%rsp) movq $0, 16(%rsp) movb $0, 24(%rsp) .Ltmp255: movq (%rsp), %rdi # 8-byte Reload movq %r13, %rsi movq %r14, %rdx leaq 40(%rsp), %rcx callq _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_ .Ltmp256: # %bb.9: # in Loop: Header=BB14_2 Depth=1 movq 40(%rsp), %rdi cmpq %r12, %rdi je .LBB14_11 # %bb.10: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i # in Loop: Header=BB14_2 Depth=1 callq _ZdlPv .LBB14_11: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit # in Loop: Header=BB14_2 Depth=1 movq 8(%rsp), %rdi cmpq %rbx, %rdi je .LBB14_13 # %bb.12: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i12 # in Loop: Header=BB14_2 Depth=1 callq _ZdlPv .LBB14_13: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit14 # in Loop: Header=BB14_2 Depth=1 decq %r13 addq $-32, %rbp cmpq $-1, %r13 jne .LBB14_2 .LBB14_14: # %.loopexit addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB14_15: .cfi_def_cfa_offset 128 .Ltmp257: movq %rax, %r14 movq 40(%rsp), %rdi cmpq %r12, %rdi je .LBB14_17 # %bb.16: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i15 callq _ZdlPv .LBB14_17: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit17 movq 8(%rsp), %rdi cmpq %rbx, %rdi je .LBB14_19 # %bb.18: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i18 callq _ZdlPv .LBB14_19: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit20 movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end14: .size _ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_, .Lfunc_end14-_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_ .cfi_endproc .section .gcc_except_table._ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_,"aG",@progbits,_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_RT0_,comdat .p2align 2, 0x0 GCC_except_table14: .Lexception2: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end2-.Lcst_begin2 .Lcst_begin2: .uleb128 .Lfunc_begin2-.Lfunc_begin2 # >> Call Site 1 << .uleb128 .Ltmp255-.Lfunc_begin2 # Call between .Lfunc_begin2 and .Ltmp255 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp255-.Lfunc_begin2 # >> Call Site 2 << .uleb128 .Ltmp256-.Ltmp255 # Call between .Ltmp255 and .Ltmp256 .uleb128 .Ltmp257-.Lfunc_begin2 # jumps to .Ltmp257 .byte 0 # On action: cleanup .uleb128 .Ltmp256-.Lfunc_begin2 # >> Call Site 3 << .uleb128 .Lfunc_end14-.Ltmp256 # Call between .Ltmp256 and .Lfunc_end14 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end2: .p2align 2, 0x0 # -- End function .section .text._ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_,"axG",@progbits,_ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_,comdat .weak _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_ # -- Begin function _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_ .type _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_,@function _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_: # @_ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_ .Lfunc_begin3: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception3 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $72, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rdx, %r12 movq %rsi, %r14 movq %rdi, %r15 leaq 24(%rsp), %rbx movq %rbx, -16(%rbx) movq (%rdx), %rsi leaq 16(%rdx), %r13 cmpq %r13, %rsi je .LBB15_1 # %bb.2: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i movq %rsi, 8(%rsp) movq 16(%r12), %rax movq %rax, 24(%rsp) movq 8(%r12), %rbp jmp .LBB15_3 .LBB15_1: movq 8(%r12), %rbp leaq 1(%rbp), %rdx movq %rbx, %rdi callq memcpy@PLT .LBB15_3: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_.exit movq %rbp, 16(%rsp) movq %r13, (%r12) movq $0, 8(%r12) movb $0, 16(%r12) movq %r12, %rdi movq %r15, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ subq %r15, %r14 sarq $5, %r14 leaq 56(%rsp), %r12 movq %r12, -16(%r12) movq 8(%rsp), %rax cmpq %rbx, %rax je .LBB15_4 # %bb.5: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i2 movq %rax, 40(%rsp) movq 16(%rsp), %r13 movq 24(%rsp), %rax movq %rax, 56(%rsp) jmp .LBB15_6 .LBB15_4: movq 16(%rsp), %r13 leaq 1(%r13), %rdx movq %r12, %rdi movq %rbx, %rsi callq memcpy@PLT .LBB15_6: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_.exit3 leaq 40(%rsp), %rcx movq %r13, 8(%rcx) movq %rbx, 8(%rsp) movq $0, 16(%rsp) movb $0, 24(%rsp) .Ltmp258: movq %r15, %rdi xorl %esi, %esi movq %r14, %rdx callq _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_ .Ltmp259: # %bb.7: movq 40(%rsp), %rdi cmpq %r12, %rdi je .LBB15_9 # %bb.8: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB15_9: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq 8(%rsp), %rdi cmpq %rbx, %rdi je .LBB15_11 # %bb.10: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4 callq _ZdlPv .LBB15_11: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit6 addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB15_12: .cfi_def_cfa_offset 128 .Ltmp260: movq %rax, %r14 movq 40(%rsp), %rdi cmpq %r12, %rdi je .LBB15_14 # %bb.13: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i7 callq _ZdlPv .LBB15_14: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit9 movq 8(%rsp), %rdi cmpq %rbx, %rdi je .LBB15_16 # %bb.15: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i10 callq _ZdlPv .LBB15_16: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit12 movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end15: .size _ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_, .Lfunc_end15-_ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_ .cfi_endproc .section .gcc_except_table._ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_,"aG",@progbits,_ZSt10__pop_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_RT0_,comdat .p2align 2, 0x0 GCC_except_table15: .Lexception3: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end3-.Lcst_begin3 .Lcst_begin3: .uleb128 .Lfunc_begin3-.Lfunc_begin3 # >> Call Site 1 << .uleb128 .Ltmp258-.Lfunc_begin3 # Call between .Lfunc_begin3 and .Ltmp258 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp258-.Lfunc_begin3 # >> Call Site 2 << .uleb128 .Ltmp259-.Ltmp258 # Call between .Ltmp258 and .Ltmp259 .uleb128 .Ltmp260-.Lfunc_begin3 # jumps to .Ltmp260 .byte 0 # On action: cleanup .uleb128 .Ltmp259-.Lfunc_begin3 # >> Call Site 3 << .uleb128 .Lfunc_end15-.Ltmp259 # Call between .Ltmp259 and .Lfunc_end15 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end3: .p2align 2, 0x0 # -- End function .section .text._ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_,"axG",@progbits,_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_,comdat .weak _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_ # -- Begin function _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_ .type _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_,@function _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_: # @_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_ .Lfunc_begin4: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception4 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $56, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rcx, 8(%rsp) # 8-byte Spill movq %rdx, %r13 movq %rdi, %r14 leaq -1(%rdx), %rax shrq $63, %rax leaq (%rdx,%rax), %rbx decq %rbx sarq %rbx movq %rsi, %r15 movq %rsi, 16(%rsp) # 8-byte Spill cmpq %rsi, %rbx jle .LBB16_6 # %bb.1: # %.lr.ph.preheader movq 16(%rsp), %rbp # 8-byte Reload .LBB16_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 leaq 2(,%rbp,2), %r12 movq %r12, %rdi shlq $5, %rdi addq %r14, %rdi leaq 1(,%rbp,2), %r15 movq %r15, %rsi shlq $5, %rsi addq %r14, %rsi .Ltmp261: callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp262: # %bb.3: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit # in Loop: Header=BB16_2 Depth=1 testl %eax, %eax js .LBB16_5 # %bb.4: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit # in Loop: Header=BB16_2 Depth=1 movq %r12, %r15 .LBB16_5: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit # in Loop: Header=BB16_2 Depth=1 movq %r15, %rsi shlq $5, %rsi addq %r14, %rsi shlq $5, %rbp addq %r14, %rbp movq %rbp, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ movq %r15, %rbp cmpq %rbx, %r15 jl .LBB16_2 .LBB16_6: # %._crit_edge testb $1, %r13b jne .LBB16_9 # %bb.7: addq $-2, %r13 sarq %r13 cmpq %r13, %r15 jne .LBB16_9 # %bb.8: leaq 1(,%r15,2), %rbx movq %rbx, %rsi shlq $5, %rsi addq %r14, %rsi shlq $5, %r15 addq %r14, %r15 movq %r15, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ movq %rbx, %r15 .LBB16_9: movq 8(%rsp), %rbp # 8-byte Reload leaq 40(%rsp), %r13 movq %r13, -16(%r13) movq (%rbp), %rsi leaq 16(%rbp), %rbx cmpq %rbx, %rsi je .LBB16_10 # %bb.11: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i movq %rsi, 24(%rsp) movq 16(%rbp), %rax movq %rax, 40(%rsp) movq 8(%rbp), %r12 jmp .LBB16_12 .LBB16_10: movq 8(%rbp), %r12 leaq 1(%r12), %rdx movq %r13, %rdi callq memcpy@PLT .LBB16_12: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_.exit leaq 24(%rsp), %rcx movq %r12, 8(%rcx) movq %rbx, (%rbp) movq $0, 8(%rbp) movb $0, 16(%rbp) .Ltmp264: leaq 7(%rsp), %r8 movq %r14, %rdi movq %r15, %rsi movq 16(%rsp), %rdx # 8-byte Reload callq _ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_ .Ltmp265: # %bb.13: movq 24(%rsp), %rdi cmpq %r13, %rdi je .LBB16_15 # %bb.14: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB16_15: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit addq $56, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB16_16: .cfi_def_cfa_offset 112 .Ltmp266: movq %rax, %rbx movq 24(%rsp), %rdi cmpq %r13, %rdi je .LBB16_18 # %bb.17: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i25 callq _ZdlPv .LBB16_18: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit27 movq %rbx, %rdi callq _Unwind_Resume@PLT .LBB16_19: .Ltmp263: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end16: .size _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_, .Lfunc_end16-_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_ .cfi_endproc .section .gcc_except_table._ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_,"aG",@progbits,_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops15_Iter_less_iterEEvT_T0_SG_T1_T2_,comdat .p2align 2, 0x0 GCC_except_table16: .Lexception4: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase0-.Lttbaseref0 .Lttbaseref0: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end4-.Lcst_begin4 .Lcst_begin4: .uleb128 .Ltmp261-.Lfunc_begin4 # >> Call Site 1 << .uleb128 .Ltmp262-.Ltmp261 # Call between .Ltmp261 and .Ltmp262 .uleb128 .Ltmp263-.Lfunc_begin4 # jumps to .Ltmp263 .byte 1 # On action: 1 .uleb128 .Ltmp262-.Lfunc_begin4 # >> Call Site 2 << .uleb128 .Ltmp264-.Ltmp262 # Call between .Ltmp262 and .Ltmp264 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp264-.Lfunc_begin4 # >> Call Site 3 << .uleb128 .Ltmp265-.Ltmp264 # Call between .Ltmp264 and .Ltmp265 .uleb128 .Ltmp266-.Lfunc_begin4 # jumps to .Ltmp266 .byte 0 # On action: cleanup .uleb128 .Ltmp265-.Lfunc_begin4 # >> Call Site 4 << .uleb128 .Lfunc_end16-.Ltmp265 # Call between .Ltmp265 and .Lfunc_end16 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end4: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase0: .p2align 2, 0x0 # -- End function .section .text._ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_,"axG",@progbits,_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_,comdat .weak _ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_ # -- Begin function _ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_ .type _ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_,@function _ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_: # @_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_ .Lfunc_begin5: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception5 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 pushq %rax .cfi_def_cfa_offset 64 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rcx, %rbx movq %rsi, %r12 movq %rdi, %r14 cmpq %rdx, %rsi jle .LBB17_1 # %bb.2: # %.lr.ph.preheader movq %rdx, %r15 .LBB17_3: # %.lr.ph # =>This Inner Loop Header: Depth=1 leaq -1(%r12), %rax shrq $63, %rax leaq (%r12,%rax), %rbp decq %rbp sarq %rbp movq %rbp, %r13 shlq $5, %r13 addq %r14, %r13 .Ltmp267: movq %r13, %rdi movq %rbx, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp268: # %bb.4: # %_ZNK9__gnu_cxx5__ops14_Iter_less_valclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEES9_EEbT_RT0_.exit # in Loop: Header=BB17_3 Depth=1 testl %eax, %eax jns .LBB17_1 # %bb.5: # in Loop: Header=BB17_3 Depth=1 shlq $5, %r12 addq %r14, %r12 movq %r12, %rdi movq %r13, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ movq %rbp, %r12 cmpq %r15, %rbp jg .LBB17_3 jmp .LBB17_6 .LBB17_1: movq %r12, %rbp .LBB17_6: # %.critedge shlq $5, %rbp addq %rbp, %r14 movq %r14, %rdi movq %rbx, %rsi addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ # TAILCALL .LBB17_7: .cfi_def_cfa_offset 64 .Ltmp269: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end17: .size _ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_, .Lfunc_end17-_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_ .cfi_endproc .section .gcc_except_table._ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_,"aG",@progbits,_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEElS7_NS0_5__ops14_Iter_less_valEEvT_T0_SG_T1_RT2_,comdat .p2align 2, 0x0 GCC_except_table17: .Lexception5: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase1-.Lttbaseref1 .Lttbaseref1: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end5-.Lcst_begin5 .Lcst_begin5: .uleb128 .Ltmp267-.Lfunc_begin5 # >> Call Site 1 << .uleb128 .Ltmp268-.Ltmp267 # Call between .Ltmp267 and .Ltmp268 .uleb128 .Ltmp269-.Lfunc_begin5 # jumps to .Ltmp269 .byte 1 # On action: 1 .Lcst_end5: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase1: .p2align 2, 0x0 # -- End function .section .text._ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_,"axG",@progbits,_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_,comdat .weak _ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_ # -- Begin function _ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_ .type _ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_,@function _ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_: # @_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_ .Lfunc_begin6: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception6 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rcx, %r14 movq %rdx, %r15 movq %rsi, %r12 movq %rdi, %rbx .Ltmp270: movq %rsi, %rdi movq %rdx, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp271: # %bb.1: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit testl %eax, %eax js .LBB18_6 # %bb.2: .Ltmp273: movq %r12, %rdi movq %r14, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp274: # %bb.3: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit28 movq %r12, %rsi testl %eax, %eax js .LBB18_10 # %bb.4: .Ltmp276: movq %r15, %rdi movq %r14, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp277: # %bb.5: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit29 testl %eax, %eax cmovsq %r14, %r15 movq %r15, %rsi jmp .LBB18_10 .LBB18_6: .Ltmp279: movq %r15, %rdi movq %r14, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp280: # %bb.7: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit26 movq %r15, %rsi testl %eax, %eax js .LBB18_10 # %bb.8: .Ltmp282: movq %r12, %rdi movq %r14, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp283: # %bb.9: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit27 testl %eax, %eax cmovsq %r14, %r12 movq %r12, %rsi .LBB18_10: movq %rbx, %rdi addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4swapERS4_ # TAILCALL .LBB18_11: .cfi_def_cfa_offset 48 .Ltmp284: jmp .LBB18_15 .LBB18_12: .Ltmp281: jmp .LBB18_15 .LBB18_13: .Ltmp278: jmp .LBB18_15 .LBB18_14: .Ltmp275: jmp .LBB18_15 .LBB18_16: .Ltmp272: .LBB18_15: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end18: .size _ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_, .Lfunc_end18-_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_ .cfi_endproc .section .gcc_except_table._ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_,"aG",@progbits,_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_SF_SF_T0_,comdat .p2align 2, 0x0 GCC_except_table18: .Lexception6: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase2-.Lttbaseref2 .Lttbaseref2: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end6-.Lcst_begin6 .Lcst_begin6: .uleb128 .Ltmp270-.Lfunc_begin6 # >> Call Site 1 << .uleb128 .Ltmp271-.Ltmp270 # Call between .Ltmp270 and .Ltmp271 .uleb128 .Ltmp272-.Lfunc_begin6 # jumps to .Ltmp272 .byte 1 # On action: 1 .uleb128 .Ltmp273-.Lfunc_begin6 # >> Call Site 2 << .uleb128 .Ltmp274-.Ltmp273 # Call between .Ltmp273 and .Ltmp274 .uleb128 .Ltmp275-.Lfunc_begin6 # jumps to .Ltmp275 .byte 1 # On action: 1 .uleb128 .Ltmp276-.Lfunc_begin6 # >> Call Site 3 << .uleb128 .Ltmp277-.Ltmp276 # Call between .Ltmp276 and .Ltmp277 .uleb128 .Ltmp278-.Lfunc_begin6 # jumps to .Ltmp278 .byte 1 # On action: 1 .uleb128 .Ltmp279-.Lfunc_begin6 # >> Call Site 4 << .uleb128 .Ltmp280-.Ltmp279 # Call between .Ltmp279 and .Ltmp280 .uleb128 .Ltmp281-.Lfunc_begin6 # jumps to .Ltmp281 .byte 1 # On action: 1 .uleb128 .Ltmp282-.Lfunc_begin6 # >> Call Site 5 << .uleb128 .Ltmp283-.Ltmp282 # Call between .Ltmp282 and .Ltmp283 .uleb128 .Ltmp284-.Lfunc_begin6 # jumps to .Ltmp284 .byte 1 # On action: 1 .Lcst_end6: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase2: .p2align 2, 0x0 # -- End function .section .text._ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_,"axG",@progbits,_ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_,comdat .weak _ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_ # -- Begin function _ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_ .type _ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_,@function _ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_: # @_ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_ .Lfunc_begin7: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception7 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r14 .LBB19_1: # =>This Loop Header: Depth=1 # Child Loop BB19_4 Depth 2 .Ltmp285: movq %r14, %rdi movq %rbx, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp286: # %bb.2: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit # in Loop: Header=BB19_1 Depth=1 testl %eax, %eax jns .LBB19_4 .LBB19_3: # in Loop: Header=BB19_1 Depth=1 addq $32, %r14 jmp .LBB19_1 .LBB19_4: # %.preheader # Parent Loop BB19_1 Depth=1 # => This Inner Loop Header: Depth=2 addq $-32, %r15 .Ltmp288: movq %rbx, %rdi movq %r15, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp289: # %bb.5: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit8 # in Loop: Header=BB19_4 Depth=2 testl %eax, %eax js .LBB19_4 # %bb.6: # in Loop: Header=BB19_1 Depth=1 cmpq %r15, %r14 jae .LBB19_8 # %bb.7: # in Loop: Header=BB19_1 Depth=1 movq %r14, %rdi movq %r15, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4swapERS4_ jmp .LBB19_3 .LBB19_8: movq %r14, %rax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB19_9: .cfi_def_cfa_offset 32 .Ltmp290: jmp .LBB19_10 .LBB19_11: .Ltmp287: .LBB19_10: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end19: .size _ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_, .Lfunc_end19-_ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_ .cfi_endproc .section .gcc_except_table._ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_,"aG",@progbits,_ZSt21__unguarded_partitionIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEET_SF_SF_SF_T0_,comdat .p2align 2, 0x0 GCC_except_table19: .Lexception7: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase3-.Lttbaseref3 .Lttbaseref3: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end7-.Lcst_begin7 .Lcst_begin7: .uleb128 .Ltmp285-.Lfunc_begin7 # >> Call Site 1 << .uleb128 .Ltmp286-.Ltmp285 # Call between .Ltmp285 and .Ltmp286 .uleb128 .Ltmp287-.Lfunc_begin7 # jumps to .Ltmp287 .byte 1 # On action: 1 .uleb128 .Ltmp288-.Lfunc_begin7 # >> Call Site 2 << .uleb128 .Ltmp289-.Ltmp288 # Call between .Ltmp288 and .Ltmp289 .uleb128 .Ltmp290-.Lfunc_begin7 # jumps to .Ltmp290 .byte 1 # On action: 1 .Lcst_end7: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase3: .p2align 2, 0x0 # -- End function .section .text._ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_,"axG",@progbits,_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_,comdat .weak _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ # -- Begin function _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ .type _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_,@function _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_: # @_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ .Lfunc_begin8: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception8 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $40, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 cmpq %rsi, %rdi je .LBB20_15 # %bb.1: # %.preheader movq %rsi, %rbx movq %rdi, %r13 leaq 32(%rdi), %r12 cmpq %rsi, %r12 je .LBB20_15 # %bb.2: # %.lr.ph leaq 24(%rsp), %rbp movq %r13, %r14 .LBB20_3: # =>This Loop Header: Depth=1 # Child Loop BB20_10 Depth 2 .Ltmp291: movq %r12, %rdi movq %r13, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp292: # %bb.4: # %_ZNK9__gnu_cxx5__ops15_Iter_less_iterclINS_17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS9_SaIS9_EEEESE_EEbT_T0_.exit # in Loop: Header=BB20_3 Depth=1 testl %eax, %eax js .LBB20_5 # %bb.13: # in Loop: Header=BB20_3 Depth=1 movq %r12, %rdi callq _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_ jmp .LBB20_14 .LBB20_5: # in Loop: Header=BB20_3 Depth=1 movq %rbp, 8(%rsp) movq (%r12), %rsi leaq 48(%r14), %r15 cmpq %r15, %rsi je .LBB20_6 # %bb.7: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i # in Loop: Header=BB20_3 Depth=1 movq %rsi, 8(%rsp) movq (%r15), %rax movq %rax, 24(%rsp) jmp .LBB20_8 .LBB20_6: # in Loop: Header=BB20_3 Depth=1 movq 40(%r14), %rdx incq %rdx movq %rbp, %rdi callq memcpy@PLT .LBB20_8: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_.exit # in Loop: Header=BB20_3 Depth=1 movq 40(%r14), %rax movq %rax, 16(%rsp) movq %r15, (%r12) movq $0, 40(%r14) movb $0, 48(%r14) movq %r12, %r15 subq %r13, %r15 sarq $5, %r15 testq %r15, %r15 jle .LBB20_11 # %bb.9: # %.lr.ph.i.i.i.i.i.preheader # in Loop: Header=BB20_3 Depth=1 incq %r15 movq %r14, %rbp .LBB20_10: # %.lr.ph.i.i.i.i.i # Parent Loop BB20_3 Depth=1 # => This Inner Loop Header: Depth=2 leaq 32(%rbp), %rdi movq %rbp, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ decq %r15 addq $-32, %rbp cmpq $1, %r15 ja .LBB20_10 .LBB20_11: # %.loopexit # in Loop: Header=BB20_3 Depth=1 movq %r13, %rdi leaq 8(%rsp), %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ movq 8(%rsp), %rdi leaq 24(%rsp), %rbp cmpq %rbp, %rdi je .LBB20_14 # %bb.12: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i # in Loop: Header=BB20_3 Depth=1 callq _ZdlPv .LBB20_14: # in Loop: Header=BB20_3 Depth=1 addq $32, %r12 addq $32, %r14 cmpq %rbx, %r12 jne .LBB20_3 .LBB20_15: # %.loopexit18 addq $40, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB20_16: .cfi_def_cfa_offset 96 .Ltmp293: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end20: .size _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_, .Lfunc_end20-_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_ .cfi_endproc .section .gcc_except_table._ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_,"aG",@progbits,_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops15_Iter_less_iterEEvT_SF_T0_,comdat .p2align 2, 0x0 GCC_except_table20: .Lexception8: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase4-.Lttbaseref4 .Lttbaseref4: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end8-.Lcst_begin8 .Lcst_begin8: .uleb128 .Ltmp291-.Lfunc_begin8 # >> Call Site 1 << .uleb128 .Ltmp292-.Ltmp291 # Call between .Ltmp291 and .Ltmp292 .uleb128 .Ltmp293-.Lfunc_begin8 # jumps to .Ltmp293 .byte 1 # On action: 1 .uleb128 .Ltmp292-.Lfunc_begin8 # >> Call Site 2 << .uleb128 .Lfunc_end20-.Ltmp292 # Call between .Ltmp292 and .Lfunc_end20 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end8: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase4: .p2align 2, 0x0 # -- End function .section .text._ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_,"axG",@progbits,_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_,comdat .weak _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_ # -- Begin function _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_ .type _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_,@function _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_: # @_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_ .Lfunc_begin9: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception9 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $32, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdi, %r14 leaq 16(%rsp), %rbx movq %rbx, -16(%rbx) movq (%rdi), %rsi leaq 16(%rdi), %r12 cmpq %r12, %rsi je .LBB21_1 # %bb.2: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i movq %rsi, (%rsp) movq 16(%r14), %rax movq %rax, 16(%rsp) movq 8(%r14), %r13 jmp .LBB21_3 .LBB21_1: movq 8(%r14), %r13 leaq 1(%r13), %rdx movq %rbx, %rdi callq memcpy@PLT .LBB21_3: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_.exit movq %rsp, %r15 movq %r13, 8(%r15) movq %r12, (%r14) movq $0, 8(%r14) movb $0, 16(%r14) .LBB21_4: # =>This Inner Loop Header: Depth=1 leaq -32(%r14), %r12 .Ltmp294: movq %r15, %rdi movq %r12, %rsi callq _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_ .Ltmp295: # %bb.5: # %_ZNK9__gnu_cxx5__ops14_Val_less_iterclINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEENS_17__normal_iteratorIPS8_St6vectorIS8_SaIS8_EEEEEEbRT_T0_.exit # in Loop: Header=BB21_4 Depth=1 testl %eax, %eax jns .LBB21_7 # %bb.6: # in Loop: Header=BB21_4 Depth=1 movq %r14, %rdi movq %r12, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ movq %r12, %r14 jmp .LBB21_4 .LBB21_7: movq %rsp, %r15 movq %r14, %rdi movq %r15, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_ movq (%r15), %rdi cmpq %rbx, %rdi je .LBB21_9 # %bb.8: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB21_9: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit addq $32, %rsp .cfi_def_cfa_offset 48 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB21_10: .cfi_def_cfa_offset 80 .Ltmp296: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end21: .size _ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_, .Lfunc_end21-_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_ .cfi_endproc .section .gcc_except_table._ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_,"aG",@progbits,_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt6vectorIS7_SaIS7_EEEENS0_5__ops14_Val_less_iterEEvT_T0_,comdat .p2align 2, 0x0 GCC_except_table21: .Lexception9: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase5-.Lttbaseref5 .Lttbaseref5: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end9-.Lcst_begin9 .Lcst_begin9: .uleb128 .Lfunc_begin9-.Lfunc_begin9 # >> Call Site 1 << .uleb128 .Ltmp294-.Lfunc_begin9 # Call between .Lfunc_begin9 and .Ltmp294 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp294-.Lfunc_begin9 # >> Call Site 2 << .uleb128 .Ltmp295-.Ltmp294 # Call between .Ltmp294 and .Ltmp295 .uleb128 .Ltmp296-.Lfunc_begin9 # jumps to .Ltmp296 .byte 1 # On action: 1 .Lcst_end9: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase5: .p2align 2, 0x0 # -- End function .section .text.startup,"ax",@progbits .type _GLOBAL__sub_I_03_DirectionalCorrelation.hip,@function # -- Begin function _GLOBAL__sub_I_03_DirectionalCorrelation.hip _GLOBAL__sub_I_03_DirectionalCorrelation.hip: # @_GLOBAL__sub_I_03_DirectionalCorrelation.hip .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movl $outputFile1, %edi callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev movl $_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev, %edi movl $outputFile1, %esi movl $__dso_handle, %edx popq %rax .cfi_def_cfa_offset 8 jmp __cxa_atexit # TAILCALL .Lfunc_end22: .size _GLOBAL__sub_I_03_DirectionalCorrelation.hip, .Lfunc_end22-_GLOBAL__sub_I_03_DirectionalCorrelation.hip .cfi_endproc # -- End function .text .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB23_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB23_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6kernelPfS_S_S_S_iil, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end23: .size __hip_module_ctor, .Lfunc_end23-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB24_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB24_2: retq .Lfunc_end24: .size __hip_module_dtor, .Lfunc_end24-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "\n" .size .L.str, 2 .type _Z6kernelPfS_S_S_S_iil,@object # @_Z6kernelPfS_S_S_S_iil .section .rodata,"a",@progbits .globl _Z6kernelPfS_S_S_S_iil .p2align 3, 0x0 _Z6kernelPfS_S_S_S_iil: .quad _Z21__device_stub__kernelPfS_S_S_S_iil .size _Z6kernelPfS_S_S_S_iil, 8 .type na_frames,@object # @na_frames .bss .globl na_frames .p2align 2, 0x0 na_frames: .long 0 # 0x0 .size na_frames, 4 .type scale,@object # @scale .data .globl scale .p2align 2, 0x0 scale: .long 1 # 0x1 .size scale, 4 .type outputFile1,@object # @outputFile1 .bss .globl outputFile1 .p2align 3, 0x0 outputFile1: .zero 512 .size outputFile1, 512 .hidden __dso_handle .type .L.str.1,@object # @.str.1 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.1: .asciz "/home/user/Documents/Vivek/cuda/DirectionalCorrelation/Data/Input/pigeons/10_birds/ffA3/cross_correlation/" .size .L.str.1, 107 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "cross_correlation_01.csv" .size .L.str.2, 25 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "avgd_cross_correlation.csv" .size .L.str.3, 27 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "id1" .size .L.str.4, 4 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz ", " .size .L.str.5, 3 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "id2" .size .L.str.6, 4 .type .L.str.7,@object # @.str.7 .L.str.7: .asciz "tau" .size .L.str.7, 4 .type .L.str.8,@object # @.str.8 .L.str.8: .asciz "cc" .size .L.str.8, 3 .type .L.str.9,@object # @.str.9 .L.str.9: .asciz "time" .size .L.str.9, 5 .type .L.str.10,@object # @.str.10 .L.str.10: .asciz "rb" .size .L.str.10, 3 .type .L.str.11,@object # @.str.11 .L.str.11: .asciz "File error" .size .L.str.11, 11 .type .L.str.12,@object # @.str.12 .L.str.12: .asciz "Memory error" .size .L.str.12, 13 .type .L.str.13,@object # @.str.13 .L.str.13: .asciz "Reading error" .size .L.str.13, 14 .type .L.str.14,@object # @.str.14 .L.str.14: .asciz " " .size .L.str.14, 2 .type .L.str.16,@object # @.str.16 .L.str.16: .asciz "vector::_M_realloc_insert" .size .L.str.16, 26 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6kernelPfS_S_S_S_iil" .size .L__unnamed_1, 23 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad _GLOBAL__sub_I_03_DirectionalCorrelation.hip .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__kernelPfS_S_S_S_iil .addrsig_sym __gxx_personality_v0 .addrsig_sym _GLOBAL__sub_I_03_DirectionalCorrelation.hip .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Unwind_Resume .addrsig_sym _ZSt4cout .addrsig_sym _Z6kernelPfS_S_S_S_iil .addrsig_sym outputFile1 .addrsig_sym __dso_handle .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6kernelPfS_S_S_S_iil ; -- Begin function _Z6kernelPfS_S_S_S_iil .globl _Z6kernelPfS_S_S_S_iil .p2align 8 .type _Z6kernelPfS_S_S_S_iil,@function _Z6kernelPfS_S_S_S_iil: ; @_Z6kernelPfS_S_S_S_iil ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x44 s_load_b128 s[16:19], s[0:1], 0x20 s_load_b256 s[4:11], s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_cmp_gt_i32 s18, -1 v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_delay_alu instid0(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 s_cbranch_scc0 .LBB0_2 ; %bb.1: s_load_b64 s[0:1], s[0:1], 0x30 s_waitcnt lgkmcnt(0) s_sub_u32 s0, s0, s18 s_subb_u32 s1, s1, 0 s_delay_alu instid0(SALU_CYCLE_1) v_cmp_gt_i64_e32 vcc_lo, s[0:1], v[1:2] s_mov_b32 s1, 0 s_and_b32 s0, vcc_lo, exec_lo s_branch .LBB0_3 .LBB0_2: s_mov_b32 s1, -1 s_mov_b32 s0, 0 .LBB0_3: ; %Flow s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_5 ; %bb.4: s_sub_i32 s1, s19, s18 s_and_not1_b32 s0, s0, exec_lo v_cmp_le_i32_e32 vcc_lo, s1, v1 s_mov_b32 s1, 0 s_and_b32 s2, vcc_lo, exec_lo s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s0, s0, s2 .LBB0_5: ; %Flow82 v_lshlrev_b64 v[2:3], 2, v[1:2] v_mov_b32_e32 v0, s1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_7 ; %bb.6: ; %.sink.split v_add_nc_u32_e32 v0, s18, v1 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, s4, v2 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo v_ashrrev_i32_e32 v1, 31, v0 v_add_co_u32 v6, vcc_lo, s6, v2 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v8, vcc_lo, s10, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, s11, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s8, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo global_load_b32 v6, v[6:7], off global_load_b32 v7, v[8:9], off global_load_b32 v4, v[4:5], off global_load_b32 v1, v[0:1], off s_waitcnt vmcnt(2) v_mul_f32_e32 v0, v6, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fmac_f32_e32 v0, v4, v1 .LBB0_7: s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, s16, v2 v_add_co_ci_u32_e32 v2, vcc_lo, s17, v3, vcc_lo global_store_b32 v[1:2], v0, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6kernelPfS_S_S_S_iil .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 312 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 10 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6kernelPfS_S_S_S_iil, .Lfunc_end0-_Z6kernelPfS_S_S_S_iil ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 336 ; NumSgprs: 22 ; NumVgprs: 10 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 10 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .offset: 40 .size: 4 .value_kind: by_value - .offset: 44 .size: 4 .value_kind: by_value - .offset: 48 .size: 8 .value_kind: by_value - .offset: 56 .size: 4 .value_kind: hidden_block_count_x - .offset: 60 .size: 4 .value_kind: hidden_block_count_y - .offset: 64 .size: 4 .value_kind: hidden_block_count_z - .offset: 68 .size: 2 .value_kind: hidden_group_size_x - .offset: 70 .size: 2 .value_kind: hidden_group_size_y - .offset: 72 .size: 2 .value_kind: hidden_group_size_z - .offset: 74 .size: 2 .value_kind: hidden_remainder_x - .offset: 76 .size: 2 .value_kind: hidden_remainder_y - .offset: 78 .size: 2 .value_kind: hidden_remainder_z - .offset: 96 .size: 8 .value_kind: hidden_global_offset_x - .offset: 104 .size: 8 .value_kind: hidden_global_offset_y - .offset: 112 .size: 8 .value_kind: hidden_global_offset_z - .offset: 120 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 312 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6kernelPfS_S_S_S_iil .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z6kernelPfS_S_S_S_iil.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 10 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
fb444c79d85daeb722bd16f92ddbcc6788e318df
#include "includes.h" /** * @brief cudaCreateBuffer Allocates a cuda buffer and stops the programm on error. * @param size * @return */ __global__ void kernelSetDoubleBuffer(float* gpuBuffPtr, float v, size_t size) { int index = threadIdx.x + blockIdx.x * blockDim.x; if (index < size) gpuBuffPtr[index] = v; }
.file "tmpxft_0028a452_00000000-6_kernelSetDoubleBuffer.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z43__device_stub__Z21kernelSetDoubleBufferPffmPffm .type _Z43__device_stub__Z21kernelSetDoubleBufferPffmPffm, @function _Z43__device_stub__Z21kernelSetDoubleBufferPffmPffm: .LFB2032: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 32(%rsp), %rdx movq %rsi, 8(%rsp) leaq 48(%rsp), %rdi leaq 60(%rsp), %rsi movss %xmm0, 20(%rsp) movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 20(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z21kernelSetDoubleBufferPffm(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z43__device_stub__Z21kernelSetDoubleBufferPffmPffm, .-_Z43__device_stub__Z21kernelSetDoubleBufferPffmPffm .globl _Z21kernelSetDoubleBufferPffm .type _Z21kernelSetDoubleBufferPffm, @function _Z21kernelSetDoubleBufferPffm: .LFB2033: .cfi_startproc endbr64 jmp _Z43__device_stub__Z21kernelSetDoubleBufferPffmPffm .cfi_endproc .LFE2033: .size _Z21kernelSetDoubleBufferPffm, .-_Z21kernelSetDoubleBufferPffm .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z21kernelSetDoubleBufferPffm" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z21kernelSetDoubleBufferPffm(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z21kernelSetDoubleBufferPffm .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e280000002100 */ /*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0030*/ IMAD R0, R3, c[0x0][0x0], R0 ; /* 0x0000000003007a24 */ /* 0x001fca00078e0200 */ /*0040*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */ /* 0x000fe40003f06070 */ /*0050*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */ /* 0x000fc80000011400 */ /*0060*/ ISETP.GE.U32.AND.EX P0, PT, R3, c[0x0][0x174], PT, P0 ; /* 0x00005d0003007a0c */ /* 0x000fda0003f06100 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ LEA R2, P0, R0.reuse, c[0x0][0x160], 0x2 ; /* 0x0000580000027a11 */ /* 0x040fe200078010ff */ /*0090*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff057624 */ /* 0x000fe200078e00ff */ /*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*00b0*/ LEA.HI.X R3, R0, c[0x0][0x164], R3, 0x2, P0 ; /* 0x0000590000037a11 */ /* 0x000fca00000f1403 */ /*00c0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*00d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00e0*/ BRA 0xe0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" /** * @brief cudaCreateBuffer Allocates a cuda buffer and stops the programm on error. * @param size * @return */ __global__ void kernelSetDoubleBuffer(float* gpuBuffPtr, float v, size_t size) { int index = threadIdx.x + blockIdx.x * blockDim.x; if (index < size) gpuBuffPtr[index] = v; }
.text .file "kernelSetDoubleBuffer.hip" .globl _Z36__device_stub__kernelSetDoubleBufferPffm # -- Begin function _Z36__device_stub__kernelSetDoubleBufferPffm .type _Z36__device_stub__kernelSetDoubleBufferPffm,@function _Z36__device_stub__kernelSetDoubleBufferPffm: # @_Z36__device_stub__kernelSetDoubleBufferPffm .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 12(%rsp), %rcx movss %xmm0, (%rcx) leaq 32(%rsp), %rdx movq %rsi, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rdx, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z21kernelSetDoubleBufferPffm, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z36__device_stub__kernelSetDoubleBufferPffm, .Lfunc_end0-_Z36__device_stub__kernelSetDoubleBufferPffm .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z21kernelSetDoubleBufferPffm, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z21kernelSetDoubleBufferPffm,@object # @_Z21kernelSetDoubleBufferPffm .section .rodata,"a",@progbits .globl _Z21kernelSetDoubleBufferPffm .p2align 3, 0x0 _Z21kernelSetDoubleBufferPffm: .quad _Z36__device_stub__kernelSetDoubleBufferPffm .size _Z21kernelSetDoubleBufferPffm, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z21kernelSetDoubleBufferPffm" .size .L__unnamed_1, 30 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z36__device_stub__kernelSetDoubleBufferPffm .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z21kernelSetDoubleBufferPffm .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z21kernelSetDoubleBufferPffm ; -- Begin function _Z21kernelSetDoubleBufferPffm .globl _Z21kernelSetDoubleBufferPffm .p2align 8 .type _Z21kernelSetDoubleBufferPffm,@function _Z21kernelSetDoubleBufferPffm: ; @_Z21kernelSetDoubleBufferPffm ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x24 s_load_b64 s[2:3], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_and_b32 s4, s4, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1] v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_u64_e32 vcc_lo, s[2:3], v[1:2] s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB0_2 ; %bb.1: s_clause 0x1 s_load_b64 s[2:3], s[0:1], 0x0 s_load_b32 s0, s[0:1], 0x8 v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, s2, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo v_mov_b32_e32 v2, s0 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z21kernelSetDoubleBufferPffm .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 3 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z21kernelSetDoubleBufferPffm, .Lfunc_end0-_Z21kernelSetDoubleBufferPffm ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 136 ; NumSgprs: 18 ; NumVgprs: 3 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 3 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 16 .size: 8 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z21kernelSetDoubleBufferPffm .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z21kernelSetDoubleBufferPffm.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 3 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
29b91577349a5b16f6a9050482082c0e305164b8
#include "includes.h" __global__ void MatrixCopy_naive (const float * A , int Acount, int Acols, float * out0 , int out0count) { int id = blockDim.x*blockIdx.y*gridDim.x + blockDim.x*blockIdx.x + threadIdx.x; if (id<out0count) { out0[id] = A[id]; } }
.file "tmpxft_00288d29_00000000-6_MatrixCopy_naive.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z42__device_stub__Z16MatrixCopy_naivePKfiiPfiPKfiiPfi .type _Z42__device_stub__Z16MatrixCopy_naivePKfiiPfiPKfiiPfi, @function _Z42__device_stub__Z16MatrixCopy_naivePKfiiPfiPKfiiPfi: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movl %esi, 20(%rsp) leaq 60(%rsp), %rsi movl %edx, 16(%rsp) leaq 32(%rsp), %rdx movq %rcx, 8(%rsp) leaq 40(%rsp), %rcx movl %r8d, 4(%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 20(%rsp), %rax movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 168 leaq _Z16MatrixCopy_naivePKfiiPfi(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 176 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z42__device_stub__Z16MatrixCopy_naivePKfiiPfiPKfiiPfi, .-_Z42__device_stub__Z16MatrixCopy_naivePKfiiPfiPKfiiPfi .globl _Z16MatrixCopy_naivePKfiiPfi .type _Z16MatrixCopy_naivePKfiiPfi, @function _Z16MatrixCopy_naivePKfiiPfi: .LFB2033: .cfi_startproc endbr64 jmp _Z42__device_stub__Z16MatrixCopy_naivePKfiiPfiPKfiiPfi .cfi_endproc .LFE2033: .size _Z16MatrixCopy_naivePKfiiPfi, .-_Z16MatrixCopy_naivePKfiiPfi .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z16MatrixCopy_naivePKfiiPfi" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z16MatrixCopy_naivePKfiiPfi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z16MatrixCopy_naivePKfiiPfi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e280000002500 */ /*0030*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e620000002100 */ /*0040*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */ /* 0x001fc800078e0203 */ /*0050*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */ /* 0x002fca00078e0205 */ /*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */ /* 0x000fda0003f06270 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*00a0*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fcc00078e0205 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x170] ; /* 0x00005c0000047625 */ /* 0x000fca00078e0205 */ /*00d0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x004fe2000c101904 */ /*00e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void MatrixCopy_naive (const float * A , int Acount, int Acols, float * out0 , int out0count) { int id = blockDim.x*blockIdx.y*gridDim.x + blockDim.x*blockIdx.x + threadIdx.x; if (id<out0count) { out0[id] = A[id]; } }
.text .file "MatrixCopy_naive.hip" .globl _Z31__device_stub__MatrixCopy_naivePKfiiPfi # -- Begin function _Z31__device_stub__MatrixCopy_naivePKfiiPfi .type _Z31__device_stub__MatrixCopy_naivePKfiiPfi,@function _Z31__device_stub__MatrixCopy_naivePKfiiPfi: # @_Z31__device_stub__MatrixCopy_naivePKfiiPfi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 12(%rsp), %rdi movl %esi, (%rdi) leaq 8(%rsp), %rsi movl %edx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 4(%rsp), %rcx movl %r8d, (%rcx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z16MatrixCopy_naivePKfiiPfi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z31__device_stub__MatrixCopy_naivePKfiiPfi, .Lfunc_end0-_Z31__device_stub__MatrixCopy_naivePKfiiPfi .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z16MatrixCopy_naivePKfiiPfi, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z16MatrixCopy_naivePKfiiPfi,@object # @_Z16MatrixCopy_naivePKfiiPfi .section .rodata,"a",@progbits .globl _Z16MatrixCopy_naivePKfiiPfi .p2align 3, 0x0 _Z16MatrixCopy_naivePKfiiPfi: .quad _Z31__device_stub__MatrixCopy_naivePKfiiPfi .size _Z16MatrixCopy_naivePKfiiPfi, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z16MatrixCopy_naivePKfiiPfi" .size .L__unnamed_1, 29 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z31__device_stub__MatrixCopy_naivePKfiiPfi .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z16MatrixCopy_naivePKfiiPfi .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z16MatrixCopy_naivePKfiiPfi ; -- Begin function _Z16MatrixCopy_naivePKfiiPfi .globl _Z16MatrixCopy_naivePKfiiPfi .p2align 8 .type _Z16MatrixCopy_naivePKfiiPfi,@function _Z16MatrixCopy_naivePKfiiPfi: ; @_Z16MatrixCopy_naivePKfiiPfi ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x20 s_load_b32 s3, s[0:1], 0x2c s_load_b32 s4, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_mul_i32 s2, s2, s15 s_and_b32 s3, s3, 0xffff s_add_i32 s2, s2, s14 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s4, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b64 s[2:3], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s2, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_load_b32 v2, v[2:3], off s_waitcnt vmcnt(0) global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z16MatrixCopy_naivePKfiiPfi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z16MatrixCopy_naivePKfiiPfi, .Lfunc_end0-_Z16MatrixCopy_naivePKfiiPfi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 172 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z16MatrixCopy_naivePKfiiPfi .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z16MatrixCopy_naivePKfiiPfi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
88daf02bdf46068e42bc5681ef07488b8d77aca4
// 3D convolution by CUDA __global__ void cu_conv(const float *A,const float *K,const float *B, int kw, int kh, int kn, int cw_rem, int ch_rem, float *C){ // A : input data, K : Kernel, B : bias int cx = threadIdx.x + blockIdx.x*blockDim.x; int cy = threadIdx.y + blockIdx.y*blockDim.y; int cz = blockIdx.z/int(kn*kh*kw); int n = (blockIdx.z%(kn*kh*kw)) / (kh*kw); int j = ((blockIdx.z%(kn*kh*kw)) % (kh*kw)) / kw; int i = ((blockIdx.z%(kn*kh*kw)) % (kh*kw)) % kw; int cw = blockDim.x*gridDim.x + cw_rem; int ch = blockDim.y*gridDim.y + ch_rem; int aw = cw + (kw-1); int ah = ch + (kh-1); int cidx = cx + cy*cw + cz*(cw*ch); int aidx = (cx+i) + (cy+j)*aw + (cz)*(aw*ah); int kidx = i + j*kw + n*(kw*kh); int bidx = n; if (cx < cw && cy < ch){ C[cidx] = A[aidx]*K[kidx] + B[bidx]/(kw*kh); } }
.file "tmpxft_003bb271_00000000-6_convolution3.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z40__device_stub__Z7cu_convPKfS0_S0_iiiiiPfPKfS0_S0_iiiiiPf .type _Z40__device_stub__Z7cu_convPKfS0_S0_iiiiiPfPKfS0_S0_iiiiiPf, @function _Z40__device_stub__Z7cu_convPKfS0_S0_iiiiiPfPKfS0_S0_iiiiiPf: .LFB2032: .cfi_startproc endbr64 subq $200, %rsp .cfi_def_cfa_offset 208 movq 224(%rsp), %rax movq %rdi, 40(%rsp) leaq 64(%rsp), %rdi movq %rsi, 32(%rsp) leaq 76(%rsp), %rsi movq %rdx, 24(%rsp) leaq 48(%rsp), %rdx movl %ecx, 20(%rsp) leaq 56(%rsp), %rcx movl %r8d, 16(%rsp) movl %r9d, 12(%rsp) movq %rax, (%rsp) movq %fs:40, %rax movq %rax, 184(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 72(%rsp) movq %rax, 112(%rsp) leaq 32(%rsp), %rax movq %rax, 120(%rsp) leaq 24(%rsp), %rax movq %rax, 128(%rsp) leaq 20(%rsp), %rax movq %rax, 136(%rsp) leaq 16(%rsp), %rax movq %rax, 144(%rsp) leaq 12(%rsp), %rax movq %rax, 152(%rsp) leaq 208(%rsp), %rax movq %rax, 160(%rsp) leaq 216(%rsp), %rax movq %rax, 168(%rsp) movq %rsp, %rax movq %rax, 176(%rsp) movabsq $4294967297, %rax movq %rax, 64(%rsp) movq %rax, 76(%rsp) movl $1, 84(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 56(%rsp) .cfi_def_cfa_offset 216 leaq _Z7cu_convPKfS0_S0_iiiiiPf(%rip), %rdi pushq 56(%rsp) .cfi_def_cfa_offset 224 movq 92(%rsp), %rcx movl 100(%rsp), %r8d movq 80(%rsp), %rsi movl 88(%rsp), %edx leaq 128(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 216 popq %rdx .cfi_def_cfa_offset 208 .L2: movq 184(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $200, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z40__device_stub__Z7cu_convPKfS0_S0_iiiiiPfPKfS0_S0_iiiiiPf, .-_Z40__device_stub__Z7cu_convPKfS0_S0_iiiiiPfPKfS0_S0_iiiiiPf .globl _Z7cu_convPKfS0_S0_iiiiiPf .type _Z7cu_convPKfS0_S0_iiiiiPf, @function _Z7cu_convPKfS0_S0_iiiiiPf: .LFB2033: .cfi_startproc endbr64 jmp _Z40__device_stub__Z7cu_convPKfS0_S0_iiiiiPfPKfS0_S0_iiiiiPf .cfi_endproc .LFE2033: .size _Z7cu_convPKfS0_S0_iiiiiPf, .-_Z7cu_convPKfS0_S0_iiiiiPf .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z7cu_convPKfS0_S0_iiiiiPf" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z7cu_convPKfS0_S0_iiiiiPf(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7cu_convPKfS0_S0_iiiiiPf .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e220000002600 */ /*0020*/ ULDC UR7, c[0x0][0x10] ; /* 0x0000040000077ab9 */ /* 0x000fe40000000800 */ /*0030*/ ULDC UR8, c[0x0][0x188] ; /* 0x0000620000087ab9 */ /* 0x000fe20000000800 */ /*0040*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e220000002200 */ /*0050*/ ULDC.64 UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */ /* 0x000fe40000000a00 */ /*0060*/ UIMAD UR5, UR5, UR7, UR8 ; /* 0x00000007050572a4 */ /* 0x000fe2000f8e0208 */ /*0070*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */ /* 0x000e620000002100 */ /*0080*/ ULDC UR6, c[0x0][0xc] ; /* 0x0000030000067ab9 */ /* 0x000fe40000000800 */ /*0090*/ ULDC UR7, c[0x0][0x184] ; /* 0x0000610000077ab9 */ /* 0x000fe20000000800 */ /*00a0*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e620000002500 */ /*00b0*/ UIMAD UR4, UR4, UR6, UR7 ; /* 0x00000006040472a4 */ /* 0x000fe2000f8e0207 */ /*00c0*/ IMAD R2, R2, c[0x0][0x4], R5 ; /* 0x0000010002027a24 */ /* 0x001fca00078e0205 */ /*00d0*/ ISETP.GE.AND P0, PT, R2, UR5, PT ; /* 0x0000000502007c0c */ /* 0x000fe2000bf06270 */ /*00e0*/ IMAD R4, R3, c[0x0][0x0], R4 ; /* 0x0000000003047a24 */ /* 0x002fca00078e0204 */ /*00f0*/ ISETP.GE.OR P0, PT, R4, UR4, P0 ; /* 0x0000000404007c0c */ /* 0x000fda0008706670 */ /*0100*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0110*/ ULDC.64 UR8, c[0x0][0x178] ; /* 0x00005e0000087ab9 */ /* 0x000fe20000000a00 */ /*0120*/ S2R R10, SR_CTAID.Z ; /* 0x00000000000a7919 */ /* 0x000e220000002700 */ /*0130*/ UIMAD UR7, UR9, UR8, URZ ; /* 0x00000008090772a4 */ /* 0x000fe2000f8e023f */ /*0140*/ I2F.U32.RP R8, c[0x0][0x178] ; /* 0x00005e0000087b06 */ /* 0x000fe20000209000 */ /*0150*/ ULDC UR6, c[0x0][0x180] ; /* 0x0000600000067ab9 */ /* 0x000fe20000000800 */ /*0160*/ IMAD.MOV.U32 R15, RZ, RZ, 0x4 ; /* 0x00000004ff0f7424 */ /* 0x000fe200078e00ff */ /*0170*/ UIMAD UR6, UR7, UR6, URZ ; /* 0x00000006070672a4 */ /* 0x000fe4000f8e023f */ /*0180*/ IMAD R9, RZ, RZ, -UR7 ; /* 0x80000007ff097e24 */ /* 0x000fe2000f8e02ff */ /*0190*/ ULDC.64 UR10, c[0x0][0x118] ; /* 0x00004600000a7ab9 */ /* 0x000fe40000000a00 */ /*01a0*/ I2F.U32.RP R3, UR7 ; /* 0x0000000700037d06 */ /* 0x000e620008209000 */ /*01b0*/ IMAD R5, RZ, RZ, -UR6 ; /* 0x80000006ff057e24 */ /* 0x000fe2000f8e02ff */ /*01c0*/ ISETP.NE.U32.AND P2, PT, RZ, UR6, PT ; /* 0x00000006ff007c0c */ /* 0x000fcc000bf45070 */ /*01d0*/ I2F.U32.RP R0, UR6 ; /* 0x0000000600007d06 */ /* 0x000eb00008209000 */ /*01e0*/ MUFU.RCP R3, R3 ; /* 0x0000000300037308 */ /* 0x002ff00000001000 */ /*01f0*/ MUFU.RCP R0, R0 ; /* 0x0000000000007308 */ /* 0x004e700000001000 */ /*0200*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x000fe20000001000 */ /*0210*/ IADD3 R6, R0, 0xffffffe, RZ ; /* 0x0ffffffe00067810 */ /* 0x002fce0007ffe0ff */ /*0220*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */ /* 0x0002a4000021f000 */ /*0230*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x002fe400078e00ff */ /*0240*/ IMAD R5, R5, R7, RZ ; /* 0x0000000705057224 */ /* 0x004fc800078e02ff */ /*0250*/ IMAD.HI.U32 R5, R7, R5, R6 ; /* 0x0000000507057227 */ /* 0x000fe200078e0006 */ /*0260*/ IADD3 R6, R3, 0xffffffe, RZ ; /* 0x0ffffffe03067810 */ /* 0x000fca0007ffe0ff */ /*0270*/ IMAD.HI.U32 R5, R5, R10, RZ ; /* 0x0000000a05057227 */ /* 0x001fc800078e00ff */ /*0280*/ IMAD.MOV R7, RZ, RZ, -R5 ; /* 0x000000ffff077224 */ /* 0x000fc800078e0a05 */ /*0290*/ IMAD R0, R7, UR6, R10 ; /* 0x0000000607007c24 */ /* 0x000fe4000f8e020a */ /*02a0*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */ /* 0x000066000021f000 */ /*02b0*/ ISETP.GE.U32.AND P0, PT, R0, UR6, PT ; /* 0x0000000600007c0c */ /* 0x000fe2000bf06070 */ /*02c0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x001fd800078e00ff */ /*02d0*/ @P0 IADD3 R0, R0, -UR6, RZ ; /* 0x8000000600000c10 */ /* 0x000fe2000fffe0ff */ /*02e0*/ IMAD R9, R9, R7, RZ ; /* 0x0000000709097224 */ /* 0x002fe200078e02ff */ /*02f0*/ @P0 IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105050810 */ /* 0x000fe40007ffe0ff */ /*0300*/ ISETP.GE.U32.AND P1, PT, R0, UR6, PT ; /* 0x0000000600007c0c */ /* 0x000fe2000bf26070 */ /*0310*/ IMAD.HI.U32 R7, R7, R9, R6 ; /* 0x0000000907077227 */ /* 0x000fe200078e0006 */ /*0320*/ IADD3 R6, R8, 0xffffffe, RZ ; /* 0x0ffffffe08067810 */ /* 0x000fd60007ffe0ff */ /*0330*/ @P1 IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105051810 */ /* 0x000fe40007ffe0ff */ /*0340*/ @!P2 LOP3.LUT R5, RZ, UR6, RZ, 0x33, !PT ; /* 0x00000006ff05ac12 */ /* 0x000fe4000f8e33ff */ /*0350*/ ISETP.NE.U32.AND P2, PT, RZ, UR7, PT ; /* 0x00000007ff007c0c */ /* 0x000fc6000bf45070 */ /*0360*/ IMAD.MOV R3, RZ, RZ, -R5 ; /* 0x000000ffff037224 */ /* 0x000fc800078e0a05 */ /*0370*/ IMAD R0, R3, UR6, R10 ; /* 0x0000000603007c24 */ /* 0x000fe2000f8e020a */ /*0380*/ UIADD3 UR6, UR5, UR9, URZ ; /* 0x0000000905067290 */ /* 0x000fc6000fffe03f */ /*0390*/ IMAD.HI.U32 R12, R7, R0, RZ ; /* 0x00000000070c7227 */ /* 0x000fe200078e00ff */ /*03a0*/ UIADD3 UR6, UR6, -0x1, URZ ; /* 0xffffffff06067890 */ /* 0x000fe2000fffe03f */ /*03b0*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */ /* 0x000064000021f000 */ /*03c0*/ IMAD.MOV R3, RZ, RZ, -R12 ; /* 0x000000ffff037224 */ /* 0x000fc800078e0a0c */ /*03d0*/ IMAD R3, R3, UR7, R0 ; /* 0x0000000703037c24 */ /* 0x000fe4000f8e0200 */ /*03e0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x001fc600078e00ff */ /*03f0*/ ISETP.GE.U32.AND P0, PT, R3, UR7, PT ; /* 0x0000000703007c0c */ /* 0x000fe2000bf06070 */ /*0400*/ IMAD.MOV R9, RZ, RZ, -R7 ; /* 0x000000ffff097224 */ /* 0x002fc800078e0a07 */ /*0410*/ IMAD R9, R9, c[0x0][0x178], RZ ; /* 0x00005e0009097a24 */ /* 0x000fd000078e02ff */ /*0420*/ @P0 IADD3 R3, R3, -UR7, RZ ; /* 0x8000000703030c10 */ /* 0x000fe2000fffe0ff */ /*0430*/ IMAD.HI.U32 R7, R7, R9, R6 ; /* 0x0000000907077227 */ /* 0x000fe200078e0006 */ /*0440*/ @P0 IADD3 R12, R12, 0x1, RZ ; /* 0x000000010c0c0810 */ /* 0x000fe40007ffe0ff */ /*0450*/ ISETP.GE.U32.AND P1, PT, R3, UR7, PT ; /* 0x0000000703007c0c */ /* 0x000fe2000bf26070 */ /*0460*/ IMAD R9, R5, UR6, R2 ; /* 0x0000000605097c24 */ /* 0x000fe2000f8e0202 */ /*0470*/ UIADD3 UR6, UR4, UR8, URZ ; /* 0x0000000804067290 */ /* 0x000fd6000fffe03f */ /*0480*/ @P1 IADD3 R12, R12, 0x1, RZ ; /* 0x000000010c0c1810 */ /* 0x000fe40007ffe0ff */ /*0490*/ @!P2 LOP3.LUT R12, RZ, UR7, RZ, 0x33, !PT ; /* 0x00000007ff0cac12 */ /* 0x000fe4000f8e33ff */ /*04a0*/ ISETP.NE.U32.AND P2, PT, RZ, c[0x0][0x178], PT ; /* 0x00005e00ff007a0c */ /* 0x000fc60003f45070 */ /*04b0*/ IMAD R3, R12.reuse, UR7, RZ ; /* 0x000000070c037c24 */ /* 0x040fe4000f8e02ff */ /*04c0*/ IMAD.WIDE R12, R12, R15, c[0x0][0x170] ; /* 0x00005c000c0c7625 */ /* 0x000fc800078e020f */ /*04d0*/ IMAD.IADD R0, R0, 0x1, -R3 ; /* 0x0000000100007824 */ /* 0x000fc800078e0a03 */ /*04e0*/ IMAD.HI.U32 R6, R7, R0, RZ ; /* 0x0000000007067227 */ /* 0x000fc800078e00ff */ /*04f0*/ IMAD.MOV R7, RZ, RZ, -R6 ; /* 0x000000ffff077224 */ /* 0x000fc800078e0a06 */ /*0500*/ IMAD R7, R7, c[0x0][0x178], R0 ; /* 0x00005e0007077a24 */ /* 0x000fca00078e0200 */ /*0510*/ ISETP.GE.U32.AND P0, PT, R7, c[0x0][0x178], PT ; /* 0x00005e0007007a0c */ /* 0x000fda0003f06070 */ /*0520*/ @P0 IADD3 R7, R7, -c[0x0][0x178], RZ ; /* 0x80005e0007070a10 */ /* 0x000fe40007ffe0ff */ /*0530*/ @P0 IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106060810 */ /* 0x000fe40007ffe0ff */ /*0540*/ ISETP.GE.U32.AND P1, PT, R7, c[0x0][0x178], PT ; /* 0x00005e0007007a0c */ /* 0x000fda0003f26070 */ /*0550*/ @P1 IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106061810 */ /* 0x000fe40007ffe0ff */ /*0560*/ @!P2 LOP3.LUT R6, RZ, c[0x0][0x178], RZ, 0x33, !PT ; /* 0x00005e00ff06aa12 */ /* 0x000fca00078e33ff */ /*0570*/ IMAD.MOV R7, RZ, RZ, -R6 ; /* 0x000000ffff077224 */ /* 0x000fc800078e0a06 */ /*0580*/ IMAD R7, R7, c[0x0][0x178], R0 ; /* 0x00005e0007077a24 */ /* 0x000fe400078e0200 */ /*0590*/ LDG.E R0, [R12.64] ; /* 0x0000000a0c007981 */ /* 0x0000a2000c1e1900 */ /*05a0*/ IMAD.IADD R8, R6.reuse, 0x1, R9 ; /* 0x0000000106087824 */ /* 0x040fe200078e0209 */ /*05b0*/ UIADD3 UR6, UR6, -0x1, URZ ; /* 0xffffffff06067890 */ /* 0x000fe2000fffe03f */ /*05c0*/ IMAD R6, R6, c[0x0][0x178], R3 ; /* 0x00005e0006067a24 */ /* 0x000fe400078e0203 */ /*05d0*/ IMAD.IADD R3, R4, 0x1, R7 ; /* 0x0000000104037824 */ /* 0x000fe400078e0207 */ /*05e0*/ IMAD.IADD R6, R7, 0x1, R6 ; /* 0x0000000107067824 */ /* 0x000fe400078e0206 */ /*05f0*/ IMAD R8, R8, UR6, R3 ; /* 0x0000000608087c24 */ /* 0x000fc4000f8e0203 */ /*0600*/ IMAD.WIDE R10, R6, R15, c[0x0][0x168] ; /* 0x00005a00060a7625 */ /* 0x000fc800078e020f */ /*0610*/ IMAD.WIDE R8, R8, R15, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x000fe200078e020f */ /*0620*/ LDG.E R6, [R10.64] ; /* 0x0000000a0a067981 */ /* 0x000368000c1e1900 */ /*0630*/ LDG.E R7, [R8.64] ; /* 0x0000000a08077981 */ /* 0x000362000c1e1900 */ /*0640*/ I2FP.F32.S32 R3, UR7 ; /* 0x0000000700037c45 */ /* 0x000fc80008201400 */ /*0650*/ MUFU.RCP R12, R3 ; /* 0x00000003000c7308 */ /* 0x001e240000001000 */ /*0660*/ FFMA R13, -R3, R12, 1 ; /* 0x3f800000030d7423 */ /* 0x001fc8000000010c */ /*0670*/ FFMA R13, R12, R13, R12 ; /* 0x0000000d0c0d7223 */ /* 0x000fe4000000000c */ /*0680*/ FCHK P0, R0, R3 ; /* 0x0000000300007302 */ /* 0x004e240000000000 */ /*0690*/ FFMA R12, R0, R13, RZ ; /* 0x0000000d000c7223 */ /* 0x000fc800000000ff */ /*06a0*/ FFMA R14, -R3, R12, R0 ; /* 0x0000000c030e7223 */ /* 0x000fc80000000100 */ /*06b0*/ FFMA R13, R13, R14, R12 ; /* 0x0000000e0d0d7223 */ /* 0x000fe2000000000c */ /*06c0*/ @!P0 BRA 0x700 ; /* 0x0000003000008947 */ /* 0x001fea0003800000 */ /*06d0*/ MOV R8, 0x6f0 ; /* 0x000006f000087802 */ /* 0x002fe40000000f00 */ /*06e0*/ CALL.REL.NOINC 0x770 ; /* 0x0000008000007944 */ /* 0x020fea0003c00000 */ /*06f0*/ IMAD.MOV.U32 R13, RZ, RZ, R11 ; /* 0x000000ffff0d7224 */ /* 0x001fc600078e000b */ /*0700*/ IMAD R5, R5, UR5, R2 ; /* 0x0000000505057c24 */ /* 0x002fe2000f8e0202 */ /*0710*/ FFMA R7, R6, R7, R13 ; /* 0x0000000706077223 */ /* 0x020fe2000000000d */ /*0720*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fe400078e00ff */ /*0730*/ IMAD R2, R5, UR4, R4 ; /* 0x0000000405027c24 */ /* 0x000fc8000f8e0204 */ /*0740*/ IMAD.WIDE R2, R2, R3, c[0x0][0x190] ; /* 0x0000640002027625 */ /* 0x000fca00078e0203 */ /*0750*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x000fe2000c10190a */ /*0760*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0770*/ SHF.R.U32.HI R10, RZ, 0x17, R3.reuse ; /* 0x00000017ff0a7819 */ /* 0x100fe20000011603 */ /*0780*/ IMAD.MOV.U32 R11, RZ, RZ, R0.reuse ; /* 0x000000ffff0b7224 */ /* 0x100fe200078e0000 */ /*0790*/ SHF.R.U32.HI R9, RZ, 0x17, R0 ; /* 0x00000017ff097819 */ /* 0x000fe20000011600 */ /*07a0*/ IMAD.MOV.U32 R12, RZ, RZ, R3 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0003 */ /*07b0*/ LOP3.LUT R10, R10, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0a0a7812 */ /* 0x000fe400078ec0ff */ /*07c0*/ LOP3.LUT R9, R9, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff09097812 */ /* 0x000fe400078ec0ff */ /*07d0*/ IADD3 R15, R10, -0x1, RZ ; /* 0xffffffff0a0f7810 */ /* 0x000fe40007ffe0ff */ /*07e0*/ IADD3 R14, R9, -0x1, RZ ; /* 0xffffffff090e7810 */ /* 0x000fc40007ffe0ff */ /*07f0*/ ISETP.GT.U32.AND P0, PT, R15, 0xfd, PT ; /* 0x000000fd0f00780c */ /* 0x000fc80003f04070 */ /*0800*/ ISETP.GT.U32.OR P0, PT, R14, 0xfd, P0 ; /* 0x000000fd0e00780c */ /* 0x000fda0000704470 */ /*0810*/ @!P0 IMAD.MOV.U32 R13, RZ, RZ, RZ ; /* 0x000000ffff0d8224 */ /* 0x000fe200078e00ff */ /*0820*/ @!P0 BRA 0x9a0 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*0830*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fe40003f1c200 */ /*0840*/ FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fc80003f3c200 */ /*0850*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0860*/ @P0 BRA 0xd80 ; /* 0x0000051000000947 */ /* 0x000fea0003800000 */ /*0870*/ LOP3.LUT P0, RZ, R12, 0x7fffffff, R11, 0xc8, !PT ; /* 0x7fffffff0cff7812 */ /* 0x000fda000780c80b */ /*0880*/ @!P0 BRA 0xd60 ; /* 0x000004d000008947 */ /* 0x000fea0003800000 */ /*0890*/ FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ; /* 0x7f8000000000780b */ /* 0x040fe40003f5d200 */ /*08a0*/ FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f3d200 */ /*08b0*/ FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fd60003f1d200 */ /*08c0*/ @!P1 BRA !P2, 0xd60 ; /* 0x0000049000009947 */ /* 0x000fea0005000000 */ /*08d0*/ LOP3.LUT P2, RZ, R11, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0bff7812 */ /* 0x000fc8000784c0ff */ /*08e0*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*08f0*/ @P1 BRA 0xd40 ; /* 0x0000044000001947 */ /* 0x000fea0003800000 */ /*0900*/ LOP3.LUT P1, RZ, R12, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0cff7812 */ /* 0x000fc8000782c0ff */ /*0910*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*0920*/ @P0 BRA 0xd10 ; /* 0x000003e000000947 */ /* 0x000fea0003800000 */ /*0930*/ ISETP.GE.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fe40003f06270 */ /*0940*/ ISETP.GE.AND P1, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */ /* 0x000fd60003f26270 */ /*0950*/ @P0 IMAD.MOV.U32 R13, RZ, RZ, RZ ; /* 0x000000ffff0d0224 */ /* 0x000fe200078e00ff */ /*0960*/ @!P0 FFMA R11, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f800000000b8823 */ /* 0x000fe200000000ff */ /*0970*/ @!P0 IMAD.MOV.U32 R13, RZ, RZ, -0x40 ; /* 0xffffffc0ff0d8424 */ /* 0x000fe200078e00ff */ /*0980*/ @!P1 FFMA R12, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f800000030c9823 */ /* 0x000fc800000000ff */ /*0990*/ @!P1 IADD3 R13, R13, 0x40, RZ ; /* 0x000000400d0d9810 */ /* 0x000fe40007ffe0ff */ /*09a0*/ LEA R3, R10, 0xc0800000, 0x17 ; /* 0xc08000000a037811 */ /* 0x000fe400078eb8ff */ /*09b0*/ IADD3 R9, R9, -0x7f, RZ ; /* 0xffffff8109097810 */ /* 0x000fc60007ffe0ff */ /*09c0*/ IMAD.IADD R3, R12, 0x1, -R3 ; /* 0x000000010c037824 */ /* 0x000fe200078e0a03 */ /*09d0*/ IADD3 R10, R9.reuse, 0x7f, -R10 ; /* 0x0000007f090a7810 */ /* 0x040fe20007ffe80a */ /*09e0*/ IMAD R0, R9, -0x800000, R11 ; /* 0xff80000009007824 */ /* 0x000fe400078e020b */ /*09f0*/ MUFU.RCP R12, R3 ; /* 0x00000003000c7308 */ /* 0x000e220000001000 */ /*0a00*/ FADD.FTZ R15, -R3, -RZ ; /* 0x800000ff030f7221 */ /* 0x000fe20000010100 */ /*0a10*/ IMAD.IADD R10, R10, 0x1, R13 ; /* 0x000000010a0a7824 */ /* 0x000fc600078e020d */ /*0a20*/ FFMA R17, R12, R15, 1 ; /* 0x3f8000000c117423 */ /* 0x001fc8000000000f */ /*0a30*/ FFMA R14, R12, R17, R12 ; /* 0x000000110c0e7223 */ /* 0x000fc8000000000c */ /*0a40*/ FFMA R11, R0, R14, RZ ; /* 0x0000000e000b7223 */ /* 0x000fc800000000ff */ /*0a50*/ FFMA R12, R15, R11, R0 ; /* 0x0000000b0f0c7223 */ /* 0x000fc80000000000 */ /*0a60*/ FFMA R17, R14, R12, R11 ; /* 0x0000000c0e117223 */ /* 0x000fc8000000000b */ /*0a70*/ FFMA R12, R15, R17, R0 ; /* 0x000000110f0c7223 */ /* 0x000fc80000000000 */ /*0a80*/ FFMA R11, R14, R12, R17 ; /* 0x0000000c0e0b7223 */ /* 0x000fca0000000011 */ /*0a90*/ SHF.R.U32.HI R0, RZ, 0x17, R11 ; /* 0x00000017ff007819 */ /* 0x000fc8000001160b */ /*0aa0*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fca00078ec0ff */ /*0ab0*/ IMAD.IADD R13, R0, 0x1, R10 ; /* 0x00000001000d7824 */ /* 0x000fca00078e020a */ /*0ac0*/ IADD3 R0, R13, -0x1, RZ ; /* 0xffffffff0d007810 */ /* 0x000fc80007ffe0ff */ /*0ad0*/ ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ; /* 0x000000fe0000780c */ /* 0x000fda0003f06070 */ /*0ae0*/ @!P0 BRA 0xcf0 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*0af0*/ ISETP.GT.AND P0, PT, R13, 0xfe, PT ; /* 0x000000fe0d00780c */ /* 0x000fda0003f04270 */ /*0b00*/ @P0 BRA 0xcc0 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*0b10*/ ISETP.GE.AND P0, PT, R13, 0x1, PT ; /* 0x000000010d00780c */ /* 0x000fda0003f06270 */ /*0b20*/ @P0 BRA 0xd90 ; /* 0x0000026000000947 */ /* 0x000fea0003800000 */ /*0b30*/ ISETP.GE.AND P0, PT, R13, -0x18, PT ; /* 0xffffffe80d00780c */ /* 0x000fe40003f06270 */ /*0b40*/ LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ; /* 0x800000000b0b7812 */ /* 0x000fd600078ec0ff */ /*0b50*/ @!P0 BRA 0xd90 ; /* 0x0000023000008947 */ /* 0x000fea0003800000 */ /*0b60*/ FFMA.RZ R0, R14.reuse, R12.reuse, R17.reuse ; /* 0x0000000c0e007223 */ /* 0x1c0fe2000000c011 */ /*0b70*/ IADD3 R10, R13.reuse, 0x20, RZ ; /* 0x000000200d0a7810 */ /* 0x040fe20007ffe0ff */ /*0b80*/ FFMA.RM R3, R14, R12.reuse, R17.reuse ; /* 0x0000000c0e037223 */ /* 0x180fe20000004011 */ /*0b90*/ ISETP.NE.AND P2, PT, R13.reuse, RZ, PT ; /* 0x000000ff0d00720c */ /* 0x040fe40003f45270 */ /*0ba0*/ LOP3.LUT R9, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00097812 */ /* 0x000fe200078ec0ff */ /*0bb0*/ FFMA.RP R0, R14, R12, R17 ; /* 0x0000000c0e007223 */ /* 0x000fe20000008011 */ /*0bc0*/ IMAD.MOV R12, RZ, RZ, -R13 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0a0d */ /*0bd0*/ ISETP.NE.AND P1, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */ /* 0x000fe40003f25270 */ /*0be0*/ LOP3.LUT R9, R9, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000009097812 */ /* 0x000fc400078efcff */ /*0bf0*/ FSETP.NEU.FTZ.AND P0, PT, R0, R3, PT ; /* 0x000000030000720b */ /* 0x000fe40003f1d000 */ /*0c00*/ SHF.L.U32 R10, R9, R10, RZ ; /* 0x0000000a090a7219 */ /* 0x000fe400000006ff */ /*0c10*/ SEL R0, R12, RZ, P2 ; /* 0x000000ff0c007207 */ /* 0x000fe40001000000 */ /*0c20*/ ISETP.NE.AND P1, PT, R10, RZ, P1 ; /* 0x000000ff0a00720c */ /* 0x000fe40000f25270 */ /*0c30*/ SHF.R.U32.HI R0, RZ, R0, R9 ; /* 0x00000000ff007219 */ /* 0x000fe40000011609 */ /*0c40*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40000703570 */ /*0c50*/ SHF.R.U32.HI R10, RZ, 0x1, R0 ; /* 0x00000001ff0a7819 */ /* 0x000fe40000011600 */ /*0c60*/ SEL R3, RZ, 0x1, !P0 ; /* 0x00000001ff037807 */ /* 0x000fc80004000000 */ /*0c70*/ LOP3.LUT R3, R3, 0x1, R10, 0xf8, !PT ; /* 0x0000000103037812 */ /* 0x000fc800078ef80a */ /*0c80*/ LOP3.LUT R3, R3, R0, RZ, 0xc0, !PT ; /* 0x0000000003037212 */ /* 0x000fca00078ec0ff */ /*0c90*/ IMAD.IADD R10, R10, 0x1, R3 ; /* 0x000000010a0a7824 */ /* 0x000fca00078e0203 */ /*0ca0*/ LOP3.LUT R11, R10, R11, RZ, 0xfc, !PT ; /* 0x0000000b0a0b7212 */ /* 0x000fe200078efcff */ /*0cb0*/ BRA 0xd90 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*0cc0*/ LOP3.LUT R11, R11, 0x80000000, RZ, 0xc0, !PT ; /* 0x800000000b0b7812 */ /* 0x000fc800078ec0ff */ /*0cd0*/ LOP3.LUT R11, R11, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f8000000b0b7812 */ /* 0x000fe200078efcff */ /*0ce0*/ BRA 0xd90 ; /* 0x000000a000007947 */ /* 0x000fea0003800000 */ /*0cf0*/ IMAD R11, R10, 0x800000, R11 ; /* 0x008000000a0b7824 */ /* 0x000fe200078e020b */ /*0d00*/ BRA 0xd90 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*0d10*/ LOP3.LUT R11, R12, 0x80000000, R11, 0x48, !PT ; /* 0x800000000c0b7812 */ /* 0x000fc800078e480b */ /*0d20*/ LOP3.LUT R11, R11, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f8000000b0b7812 */ /* 0x000fe200078efcff */ /*0d30*/ BRA 0xd90 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0d40*/ LOP3.LUT R11, R12, 0x80000000, R11, 0x48, !PT ; /* 0x800000000c0b7812 */ /* 0x000fe200078e480b */ /*0d50*/ BRA 0xd90 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*0d60*/ MUFU.RSQ R11, -QNAN ; /* 0xffc00000000b7908 */ /* 0x000e220000001400 */ /*0d70*/ BRA 0xd90 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0d80*/ FADD.FTZ R11, R0, R3 ; /* 0x00000003000b7221 */ /* 0x000fe20000010000 */ /*0d90*/ IMAD.MOV.U32 R9, RZ, RZ, 0x0 ; /* 0x00000000ff097424 */ /* 0x000fc800078e00ff */ /*0da0*/ RET.REL.NODEC R8 0x0 ; /* 0xfffff25008007950 */ /* 0x000fea0003c3ffff */ /*0db0*/ BRA 0xdb0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0dc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0dd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0de0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0df0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> // 3D convolution by CUDA __global__ void cu_conv(const float *A,const float *K,const float *B, int kw, int kh, int kn, int cw_rem, int ch_rem, float *C){ // A : input data, K : Kernel, B : bias int cx = threadIdx.x + blockIdx.x*blockDim.x; int cy = threadIdx.y + blockIdx.y*blockDim.y; int cz = blockIdx.z/int(kn*kh*kw); int n = (blockIdx.z%(kn*kh*kw)) / (kh*kw); int j = ((blockIdx.z%(kn*kh*kw)) % (kh*kw)) / kw; int i = ((blockIdx.z%(kn*kh*kw)) % (kh*kw)) % kw; int cw = blockDim.x*gridDim.x + cw_rem; int ch = blockDim.y*gridDim.y + ch_rem; int aw = cw + (kw-1); int ah = ch + (kh-1); int cidx = cx + cy*cw + cz*(cw*ch); int aidx = (cx+i) + (cy+j)*aw + (cz)*(aw*ah); int kidx = i + j*kw + n*(kw*kh); int bidx = n; if (cx < cw && cy < ch){ C[cidx] = A[aidx]*K[kidx] + B[bidx]/(kw*kh); } }
.text .file "convolution3.hip" .globl _Z22__device_stub__cu_convPKfS0_S0_iiiiiPf # -- Begin function _Z22__device_stub__cu_convPKfS0_S0_iiiiiPf .type _Z22__device_stub__cu_convPKfS0_S0_iiiiiPf,@function _Z22__device_stub__cu_convPKfS0_S0_iiiiiPf: # @_Z22__device_stub__cu_convPKfS0_S0_iiiiiPf .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $176, %rsp .cfi_def_cfa_offset 224 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 20(%rsp), %rdx movl %ecx, (%rdx) leaq 16(%rsp), %rcx movl %r8d, (%rcx) leaq 12(%rsp), %r8 movl %r9d, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 224(%rsp), %rax movq %rax, 48(%rbx) leaq 232(%rsp), %rax movq %rax, 56(%rbx) leaq 240(%rsp), %rax movq %rax, 64(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7cu_convPKfS0_S0_iiiiiPf, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $192, %rsp .cfi_adjust_cfa_offset -192 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z22__device_stub__cu_convPKfS0_S0_iiiiiPf, .Lfunc_end0-_Z22__device_stub__cu_convPKfS0_S0_iiiiiPf .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7cu_convPKfS0_S0_iiiiiPf, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z7cu_convPKfS0_S0_iiiiiPf,@object # @_Z7cu_convPKfS0_S0_iiiiiPf .section .rodata,"a",@progbits .globl _Z7cu_convPKfS0_S0_iiiiiPf .p2align 3, 0x0 _Z7cu_convPKfS0_S0_iiiiiPf: .quad _Z22__device_stub__cu_convPKfS0_S0_iiiiiPf .size _Z7cu_convPKfS0_S0_iiiiiPf, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z7cu_convPKfS0_S0_iiiiiPf" .size .L__unnamed_1, 27 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__cu_convPKfS0_S0_iiiiiPf .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7cu_convPKfS0_S0_iiiiiPf .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7cu_convPKfS0_S0_iiiiiPf ; -- Begin function _Z7cu_convPKfS0_S0_iiiiiPf .globl _Z7cu_convPKfS0_S0_iiiiiPf .p2align 8 .type _Z7cu_convPKfS0_S0_iiiiiPf,@function _Z7cu_convPKfS0_S0_iiiiiPf: ; @_Z7cu_convPKfS0_S0_iiiiiPf ; %bb.0: s_clause 0x3 s_load_b32 s8, s[0:1], 0x44 s_load_b64 s[2:3], s[0:1], 0x38 s_load_b128 s[4:7], s[0:1], 0x18 s_load_b32 s9, s[0:1], 0x28 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s10, s8, 16 s_and_b32 s8, s8, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s13, s8, v[2:3] v_mad_u64_u32 v[1:2], null, s14, s10, v[3:4] s_mul_i32 s2, s2, s8 s_mul_i32 s8, s3, s10 s_add_i32 s3, s2, s7 s_add_i32 s7, s8, s9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s3, v0 v_cmp_gt_i32_e64 s2, s7, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s8, s2 s_cbranch_execz .LBB0_2 ; %bb.1: s_mul_i32 s2, s5, s4 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3) s_mul_i32 s6, s2, s6 v_cvt_f32_u32_e32 v3, s2 v_cvt_f32_u32_e32 v2, s6 s_sub_i32 s9, 0, s6 v_cvt_f32_i32_e32 v6, s2 v_rcp_iflag_f32_e32 v3, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v2, v2 s_waitcnt_depctr 0xfff v_dual_mul_f32 v3, 0x4f7ffffe, v3 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2 v_cvt_u32_f32_e32 v3, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_u32_f32_e32 v2, v2 v_readfirstlane_b32 s12, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s8, v2 v_cvt_f32_u32_e32 v2, s4 s_mul_i32 s9, s9, s8 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_rcp_iflag_f32_e32 v2, v2 s_mul_hi_u32 s9, s8, s9 s_add_i32 s8, s8, s9 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_hi_u32 s8, s15, s8 s_mul_i32 s9, s8, s6 s_add_i32 s10, s8, 1 s_sub_i32 s9, s15, s9 s_waitcnt_depctr 0xfff v_mul_f32_e32 v2, 0x4f7ffffe, v2 s_sub_i32 s11, s9, s6 s_cmp_ge_u32 s9, s6 s_cselect_b32 s8, s10, s8 s_cselect_b32 s9, s11, s9 s_add_i32 s10, s8, 1 s_cmp_ge_u32 s9, s6 v_cvt_u32_f32_e32 v2, v2 s_cselect_b32 s14, s10, s8 s_sub_i32 s8, 0, s2 s_mul_i32 s6, s14, s6 s_mul_i32 s8, s8, s12 s_sub_i32 s6, s15, s6 s_mul_hi_u32 s8, s12, s8 v_readfirstlane_b32 s13, v2 s_add_i32 s12, s12, s8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_hi_u32 s8, s6, s12 s_mul_i32 s9, s8, s2 s_add_i32 s10, s8, 1 s_sub_i32 s9, s6, s9 s_delay_alu instid0(SALU_CYCLE_1) s_sub_i32 s11, s9, s2 s_cmp_ge_u32 s9, s2 s_cselect_b32 s8, s10, s8 s_cselect_b32 s9, s11, s9 s_add_i32 s10, s8, 1 s_cmp_ge_u32 s9, s2 s_cselect_b32 s12, s10, s8 s_sub_i32 s8, 0, s4 s_mul_i32 s15, s12, s2 s_mul_i32 s8, s8, s13 s_sub_i32 s6, s6, s15 s_mul_hi_u32 s8, s13, s8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_add_i32 s13, s13, s8 s_mul_hi_u32 s8, s6, s13 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_mul_i32 s9, s8, s4 s_add_i32 s10, s8, 1 s_sub_i32 s9, s6, s9 s_sub_i32 s11, s9, s4 s_cmp_ge_u32 s9, s4 s_cselect_b32 s8, s10, s8 s_cselect_b32 s9, s11, s9 s_add_i32 s10, s8, 1 s_cmp_ge_u32 s9, s4 s_cselect_b32 s8, s10, s8 s_add_i32 s5, s5, s7 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_add_i32 s5, s5, -1 s_mul_i32 s5, s14, s5 s_delay_alu instid0(SALU_CYCLE_1) v_add3_u32 v2, s5, s8, v1 s_add_i32 s5, s4, s3 s_mul_i32 s4, s8, s4 s_add_i32 s5, s5, -1 s_load_b128 s[8:11], s[0:1], 0x0 v_mul_lo_u32 v2, v2, s5 s_sub_i32 s4, s6, s4 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_add3_u32 v2, s4, v0, v2 s_clause 0x1 s_load_b64 s[4:5], s[0:1], 0x10 s_load_b64 s[0:1], s[0:1], 0x30 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v3, 31, v2 v_lshlrev_b64 v[2:3], 2, v[2:3] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s8, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo s_add_i32 s8, s6, s15 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_ashr_i32 s9, s8, 31 global_load_b32 v5, v[2:3], off s_lshl_b64 s[8:9], s[8:9], 2 s_add_u32 s8, s10, s8 s_addc_u32 s9, s11, s9 s_ashr_i32 s13, s12, 31 s_load_b32 s2, s[8:9], 0x0 s_lshl_b64 s[10:11], s[12:13], 2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s4, s4, s10 s_addc_u32 s5, s5, s11 s_load_b32 s4, s[4:5], 0x0 s_waitcnt lgkmcnt(0) v_div_scale_f32 v7, null, v6, v6, s4 v_div_scale_f32 v9, vcc_lo, s4, v6, s4 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v8, v7 s_waitcnt_depctr 0xfff v_fma_f32 v2, -v7, v8, 1.0 v_fmac_f32_e32 v8, v2, v8 v_mad_u64_u32 v[2:3], null, s14, s7, v[1:2] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v10, v9, v8 v_fma_f32 v1, -v7, v10, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4) v_fmac_f32_e32 v10, v1, v8 v_mad_u64_u32 v[3:4], null, v2, s3, v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v0, -v7, v10, v9 v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v0, v0, v8, v10 v_div_fixup_f32 v2, v0, v6, s4 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[3:4] v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_fmac_f32_e32 v2, s2, v5 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7cu_convPKfS0_S0_iiiiiPf .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 312 .amdhsa_user_sgpr_count 13 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 1 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7cu_convPKfS0_S0_iiiiiPf, .Lfunc_end0-_Z7cu_convPKfS0_S0_iiiiiPf ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 832 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 13 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: by_value - .offset: 36 .size: 4 .value_kind: by_value - .offset: 40 .size: 4 .value_kind: by_value - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .offset: 56 .size: 4 .value_kind: hidden_block_count_x - .offset: 60 .size: 4 .value_kind: hidden_block_count_y - .offset: 64 .size: 4 .value_kind: hidden_block_count_z - .offset: 68 .size: 2 .value_kind: hidden_group_size_x - .offset: 70 .size: 2 .value_kind: hidden_group_size_y - .offset: 72 .size: 2 .value_kind: hidden_group_size_z - .offset: 74 .size: 2 .value_kind: hidden_remainder_x - .offset: 76 .size: 2 .value_kind: hidden_remainder_y - .offset: 78 .size: 2 .value_kind: hidden_remainder_z - .offset: 96 .size: 8 .value_kind: hidden_global_offset_x - .offset: 104 .size: 8 .value_kind: hidden_global_offset_y - .offset: 112 .size: 8 .value_kind: hidden_global_offset_z - .offset: 120 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 312 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7cu_convPKfS0_S0_iiiiiPf .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z7cu_convPKfS0_S0_iiiiiPf.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
67beb4ab3142c1cbd3014ce6705c1c270f3590f8
#include <iostream> using namespace std; int main(void) { cout << "Hello nvcc!" << endl; return 0; }
.file "tmpxft_00390fb4_00000000-6_helloworld.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3638: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3638: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "Hello nvcc!" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB3635: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq .LC0(%rip), %rsi leaq _ZSt4cout(%rip), %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT xorl %eax, %eax popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3635: .size main, .-main .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3661: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3661: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> #include <iostream> using namespace std; int main(void) { cout << "Hello nvcc!" << endl; return 0; }
.text .file "helloworld.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl $_ZSt4cout, %ebx movl $_ZSt4cout, %edi movl $.L.str, %esi movl $11, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq _ZSt4cout(%rip), %rax movq -24(%rax), %rdi addq %rbx, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movl $_ZSt4cout, %edi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size main, .Lfunc_end0-main .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Hello nvcc!" .size .L.str, 12 .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _ZSt4cout .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
0a3702adf12c19b408f63f6953d3b160683cb711
__global__ void print_values(const int* ints, const double* dbls, int* result) { int i = threadIdx.x; result[i] = ints[i] + (dbls[i] > 0.0); }
.file "tmpxft_002d1642_00000000-6_run-noprintf.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z38__device_stub__Z12print_valuesPKiPKdPiPKiPKdPi .type _Z38__device_stub__Z12print_valuesPKiPKdPiPKiPKdPi, @function _Z38__device_stub__Z12print_valuesPKiPKdPiPKiPKdPi: .LFB2032: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z12print_valuesPKiPKdPi(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z38__device_stub__Z12print_valuesPKiPKdPiPKiPKdPi, .-_Z38__device_stub__Z12print_valuesPKiPKdPiPKiPKdPi .globl _Z12print_valuesPKiPKdPi .type _Z12print_valuesPKiPKdPi, @function _Z12print_valuesPKiPKdPi: .LFB2033: .cfi_startproc endbr64 jmp _Z38__device_stub__Z12print_valuesPKiPKdPiPKiPKdPi .cfi_endproc .LFE2033: .size _Z12print_valuesPKiPKdPi, .-_Z12print_valuesPKiPKdPi .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z12print_valuesPKiPKdPi" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z12print_valuesPKiPKdPi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z12print_valuesPKiPKdPi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */ /* 0x000e220000002100 */ /*0020*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0040*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fc60000000f00 */ /*0050*/ IMAD.WIDE R4, R6, R5, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x001fcc00078e0205 */ /*0060*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea2000c1e1b00 */ /*0070*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x000fcc00078e0207 */ /*0080*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ee2000c1e1900 */ /*0090*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00a0*/ DSETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400722a */ /* 0x004e220003f04000 */ /*00b0*/ IADD3 R9, R2, 0x1, RZ ; /* 0x0000000102097810 */ /* 0x008fda0007ffe0ff */ /*00c0*/ @!P0 IADD3 R9, R2, RZ, RZ ; /* 0x000000ff02098210 */ /* 0x001fca0007ffe0ff */ /*00d0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> __global__ void print_values(const int* ints, const double* dbls, int* result) { int i = threadIdx.x; result[i] = ints[i] + (dbls[i] > 0.0); }
.text .file "run-noprintf.hip" .globl _Z27__device_stub__print_valuesPKiPKdPi # -- Begin function _Z27__device_stub__print_valuesPKiPKdPi .type _Z27__device_stub__print_valuesPKiPKdPi,@function _Z27__device_stub__print_valuesPKiPKdPi: # @_Z27__device_stub__print_valuesPKiPKdPi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z12print_valuesPKiPKdPi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z27__device_stub__print_valuesPKiPKdPi, .Lfunc_end0-_Z27__device_stub__print_valuesPKiPKdPi .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z12print_valuesPKiPKdPi, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z12print_valuesPKiPKdPi,@object # @_Z12print_valuesPKiPKdPi .section .rodata,"a",@progbits .globl _Z12print_valuesPKiPKdPi .p2align 3, 0x0 _Z12print_valuesPKiPKdPi: .quad _Z27__device_stub__print_valuesPKiPKdPi .size _Z12print_valuesPKiPKdPi, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z12print_valuesPKiPKdPi" .size .L__unnamed_1, 25 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z27__device_stub__print_valuesPKiPKdPi .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z12print_valuesPKiPKdPi .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z12print_valuesPKiPKdPi ; -- Begin function _Z12print_valuesPKiPKdPi .globl _Z12print_valuesPKiPKdPi .p2align 8 .type _Z12print_valuesPKiPKdPi,@function _Z12print_valuesPKiPKdPi: ; @_Z12print_valuesPKiPKdPi ; %bb.0: s_load_b128 s[4:7], s[0:1], 0x0 v_lshlrev_b32_e32 v1, 3, v0 v_lshlrev_b32_e32 v2, 2, v0 s_load_b64 s[0:1], s[0:1], 0x10 s_waitcnt lgkmcnt(0) global_load_b64 v[0:1], v1, s[6:7] global_load_b32 v3, v2, s[4:5] s_waitcnt vmcnt(1) v_cmp_lt_f64_e32 vcc_lo, 0, v[0:1] s_waitcnt vmcnt(0) v_add_co_ci_u32_e32 v0, vcc_lo, 0, v3, vcc_lo global_store_b32 v2, v0, s[0:1] s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z12print_valuesPKiPKdPi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 24 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 8 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z12print_valuesPKiPKdPi, .Lfunc_end0-_Z12print_valuesPKiPKdPi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 80 ; NumSgprs: 10 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 1 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 10 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 24 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z12print_valuesPKiPKdPi .private_segment_fixed_size: 0 .sgpr_count: 10 .sgpr_spill_count: 0 .symbol: _Z12print_valuesPKiPKdPi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
db9cfa521c75a270d5e5471af8c6fe5e3ddd7e4f
#include <stdio.h> #include <cuda_runtime_api.h> #include <cuda.h> #include <cstdlib> #include <ctime> #include <iostream> __global__ void matmul(float* matA, float* matB, float* matC, int width){ float pVal = 0; for(int i=0; i<width; ++i){ float elementMatA = matA[threadIdx.y*width+i]; float elementMatB = matB[i*width+threadIdx.x]; pVal += elementMatA * elementMatB; } matC[threadIdx.y*width+threadIdx.x] = pVal; } void matriksMul(float* mA, float* mB, float* mC, int width){ //Device pointer float* a_d, *b_d, *c_d; //Matriks size int size = width * width *sizeof(float) ; //allocate dan copy matriks a int cudaError = cudaMalloc((void**)&a_d, size); if (cudaError != cudaSuccess) { fprintf(stderr, "Error invoking cudaMemcpy (ERRCODE %d)\n", cudaError); } fprintf(stderr, "cudaMemcpy (ERRCODE %d)\n", cudaError); cudaMemcpy(a_d, mA, size , cudaMemcpyHostToDevice ); //allocate dan copy matriks b cudaMalloc((void**)&b_d, size); cudaMemcpy(b_d, mB, size , cudaMemcpyHostToDevice ); //allocate memory to device c cudaMalloc((void**)&c_d, size); dim3 dimGrid(1, 1); dim3 dimBlock(width, width); matmul<<<dimGrid,dimBlock>>>(a_d,b_d,c_d,width); cudaMemcpy(mC,c_d,size, cudaMemcpyDeviceToHost ); cudaFree(a_d); cudaFree(b_d); cudaFree(c_d); } int main(void){ void matriksMul(float *, float *, float *, int); const int width = 10; float* M, *N, *P; size_t size = width * width *sizeof(float); // allocate arrays on host M = (float *) malloc(size); N = (float *) malloc(size); P = (float *) malloc(size); // float M[width*width], N[width*width], P[width*width]; for(int i = 0; i < (width*width) ; i++) { M[i] = i; N[i] = width*width - i; P[i] = 0.f; // printf("%3f %3f %3f\n", M[i], N[i], P[i]); } matriksMul(M, N, P, width); for(int i = 0; i < (width*width) ; i++) { printf("%f", P[i]); if( i%width ==0){ printf("\n"); } } free(M); free(N); free(P); return 0; }
.file "tmpxft_0030060c_00000000-6_matriksMul.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3639: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3639: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z30__device_stub__Z6matmulPfS_S_iPfS_S_i .type _Z30__device_stub__Z6matmulPfS_S_iPfS_S_i, @function _Z30__device_stub__Z6matmulPfS_S_iPfS_S_i: .LFB3661: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z6matmulPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3661: .size _Z30__device_stub__Z6matmulPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6matmulPfS_S_iPfS_S_i .globl _Z6matmulPfS_S_i .type _Z6matmulPfS_S_i, @function _Z6matmulPfS_S_i: .LFB3662: .cfi_startproc endbr64 jmp _Z30__device_stub__Z6matmulPfS_S_iPfS_S_i .cfi_endproc .LFE3662: .size _Z6matmulPfS_S_i, .-_Z6matmulPfS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "Error invoking cudaMemcpy (ERRCODE %d)\n" .LC1: .string "cudaMemcpy (ERRCODE %d)\n" .text .globl _Z10matriksMulPfS_S_i .type _Z10matriksMulPfS_S_i, @function _Z10matriksMulPfS_S_i: .LFB3635: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movq %rdi, %r15 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movq %rsi, %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rdx, %r13 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movl %ecx, %ebp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %ecx, %ebx imull %ecx, %ebx subq $72, %rsp .cfi_def_cfa_offset 128 movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax sall $2, %ebx leaq 8(%rsp), %rdi movslq %ebx, %rbx movq %rbx, %rsi call cudaMalloc@PLT movl %eax, %r12d testl %eax, %eax je .L9 movq stderr(%rip), %rdi movl %eax, %ecx movl $2, %esi xorl %eax, %eax leaq .LC0(%rip), %rdx call __fprintf_chk@PLT .L9: movq stderr(%rip), %rdi movl %r12d, %ecx movl $2, %esi xorl %eax, %eax leaq .LC1(%rip), %rdx call __fprintf_chk@PLT movq 8(%rsp), %rdi movq %rbx, %rdx movq %r15, %rsi movl $1, %ecx call cudaMemcpy@PLT leaq 16(%rsp), %rdi movq %rbx, %rsi call cudaMalloc@PLT movq 16(%rsp), %rdi movq %rbx, %rdx movq %r14, %rsi movl $1, %ecx call cudaMemcpy@PLT leaq 24(%rsp), %rdi movq %rbx, %rsi call cudaMalloc@PLT movl %ebp, 44(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movl %ebp, 48(%rsp) movq 44(%rsp), %rdx movl $1, %ecx movabsq $4294967297, %rdi movl $1, %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L10 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movl %ebp, %ecx movq 8(%rsp), %rdi call _Z30__device_stub__Z6matmulPfS_S_iPfS_S_i .L10: movq 24(%rsp), %rsi movl $2, %ecx movq %rbx, %rdx movq %r13, %rdi call cudaMemcpy@PLT movq 8(%rsp), %rdi call cudaFree@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call cudaFree@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L11 call __stack_chk_fail@PLT .L11: addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3635: .size _Z10matriksMulPfS_S_i, .-_Z10matriksMulPfS_S_i .section .rodata.str1.1 .LC2: .string "%f" .LC3: .string "\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB3636: .cfi_startproc endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 movl $400, %edi pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 call malloc@PLT movl $400, %edi movq %rax, %r13 call malloc@PLT movl $400, %edi movq %rax, %r12 call malloc@PLT xorl %ecx, %ecx movl $100, %edx movq %rax, %rbx .L17: cvtsi2ssl %ecx, %xmm0 movl %edx, %eax subl %ecx, %eax movss %xmm0, 0(%r13,%rcx,4) cvtsi2ssl %eax, %xmm0 movss %xmm0, (%r12,%rcx,4) incq %rcx cmpq $100, %rcx jne .L17 xorl %eax, %eax movq %rbx, %rdi movq %rbx, %rdx movq %r12, %rsi rep stosl movl $10, %ecx movq %r13, %rdi xorl %ebp, %ebp leaq .LC2(%rip), %r14 call _Z10matriksMulPfS_S_i .L19: movq %r14, %rsi movl $2, %edi movb $1, %al cvtss2sd (%rbx,%rbp,4), %xmm0 call __printf_chk@PLT movl %ebp, %eax movl $10, %ecx cltd idivl %ecx testl %edx, %edx jne .L18 leaq .LC3(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L18: incq %rbp cmpq $100, %rbp jne .L19 movq %r13, %rdi call free@PLT movq %r12, %rdi call free@PLT movq %rbx, %rdi call free@PLT popq %rbx .cfi_def_cfa_offset 40 xorl %eax, %eax popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3636: .size main, .-main .section .rodata.str1.1 .LC4: .string "_Z6matmulPfS_S_i" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3664: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi leaq _Z6matmulPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3664: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6matmulPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R4, SR_TID.Y ; /* 0x0000000000047919 */ /* 0x000e220000002200 */ /*0020*/ ISETP.LT.AND P0, PT, RZ, c[0x0][0x178], PT ; /* 0x00005e00ff007a0c */ /* 0x000fe20003f01270 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fd80000000a00 */ /*0040*/ @!P0 IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff008224 */ /* 0x000fe200078e00ff */ /*0050*/ @!P0 BRA 0x460 ; /* 0x0000040000008947 */ /* 0x000fea0003800000 */ /*0060*/ MOV R19, c[0x0][0x178] ; /* 0x00005e0000137a02 */ /* 0x000fe20000000f00 */ /*0070*/ S2R R18, SR_TID.X ; /* 0x0000000000127919 */ /* 0x000e620000002100 */ /*0080*/ MOV R17, RZ ; /* 0x000000ff00117202 */ /* 0x000fe40000000f00 */ /*0090*/ IADD3 R0, R19.reuse, -0x1, RZ ; /* 0xffffffff13007810 */ /* 0x040fe40007ffe0ff */ /*00a0*/ LOP3.LUT R5, R19, 0x3, RZ, 0xc0, !PT ; /* 0x0000000313057812 */ /* 0x000fe400078ec0ff */ /*00b0*/ ISETP.GE.U32.AND P1, PT, R0, 0x3, PT ; /* 0x000000030000780c */ /* 0x000fe20003f26070 */ /*00c0*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*00d0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fd60003f05270 */ /*00e0*/ @!P1 BRA 0x380 ; /* 0x0000029000009947 */ /* 0x000fea0003800000 */ /*00f0*/ IMAD R21, R4, R19, 0x3 ; /* 0x0000000304157424 */ /* 0x001fe200078e0213 */ /*0100*/ IADD3 R26, R18, c[0x0][0x178], RZ ; /* 0x00005e00121a7a10 */ /* 0x002fe20007ffe0ff */ /*0110*/ IMAD R16, R19, 0x2, R18.reuse ; /* 0x0000000213107824 */ /* 0x100fe200078e0212 */ /*0120*/ IADD3 R24, R5, -c[0x0][0x178], RZ ; /* 0x80005e0005187a10 */ /* 0x000fe20007ffe0ff */ /*0130*/ IMAD R20, R19, 0x3, R18.reuse ; /* 0x0000000313147824 */ /* 0x100fe200078e0212 */ /*0140*/ MOV R0, RZ ; /* 0x000000ff00007202 */ /* 0x000fe20000000f00 */ /*0150*/ IMAD.MOV.U32 R22, RZ, RZ, R18 ; /* 0x000000ffff167224 */ /* 0x000fe200078e0012 */ /*0160*/ MOV R17, RZ ; /* 0x000000ff00117202 */ /* 0x000fe40000000f00 */ /*0170*/ IADD3 R30, R21.reuse, -0x3, RZ ; /* 0xfffffffd151e7810 */ /* 0x040fe40007ffe0ff */ /*0180*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */ /* 0x000fe40000000f00 */ /*0190*/ IADD3 R14, R21, -0x2, RZ ; /* 0xfffffffe150e7810 */ /* 0x000fc40007ffe0ff */ /*01a0*/ IADD3 R6, R21, -0x1, RZ ; /* 0xffffffff15067810 */ /* 0x000fe20007ffe0ff */ /*01b0*/ IMAD.WIDE.U32 R30, R30, R13, c[0x0][0x160] ; /* 0x000058001e1e7625 */ /* 0x000fc800078e000d */ /*01c0*/ IMAD.WIDE.U32 R28, R22, R13.reuse, c[0x0][0x168] ; /* 0x00005a00161c7625 */ /* 0x080fe400078e000d */ /*01d0*/ LDG.E R30, [R30.64] ; /* 0x000000041e1e7981 */ /* 0x000ea4000c1e1900 */ /*01e0*/ IMAD.WIDE.U32 R14, R14, R13.reuse, c[0x0][0x160] ; /* 0x000058000e0e7625 */ /* 0x080fe400078e000d */ /*01f0*/ LDG.E R29, [R28.64] ; /* 0x000000041c1d7981 */ /* 0x000ea4000c1e1900 */ /*0200*/ IMAD.WIDE.U32 R8, R26, R13.reuse, c[0x0][0x168] ; /* 0x00005a001a087625 */ /* 0x080fe400078e000d */ /*0210*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000ee4000c1e1900 */ /*0220*/ IMAD.WIDE.U32 R6, R6, R13, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x000fc400078e000d */ /*0230*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee4000c1e1900 */ /*0240*/ IMAD.WIDE.U32 R2, R16, R13.reuse, c[0x0][0x168] ; /* 0x00005a0010027625 */ /* 0x080fe400078e000d */ /*0250*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000f24000c1e1900 */ /*0260*/ IMAD.WIDE.U32 R10, R21, R13.reuse, c[0x0][0x160] ; /* 0x00005800150a7625 */ /* 0x080fe400078e000d */ /*0270*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000f24000c1e1900 */ /*0280*/ IMAD.WIDE.U32 R12, R20, R13, c[0x0][0x168] ; /* 0x00005a00140c7625 */ /* 0x000fc400078e000d */ /*0290*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000f68000c1e1900 */ /*02a0*/ LDG.E R13, [R12.64] ; /* 0x000000040c0d7981 */ /* 0x000f62000c1e1900 */ /*02b0*/ IADD3 R17, R17, 0x4, RZ ; /* 0x0000000411117810 */ /* 0x000fe20007ffe0ff */ /*02c0*/ IMAD R26, R19.reuse, 0x4, R26 ; /* 0x00000004131a7824 */ /* 0x040fe200078e021a */ /*02d0*/ LEA R16, R19.reuse, R16, 0x2 ; /* 0x0000001013107211 */ /* 0x040fe200078e10ff */ /*02e0*/ IMAD R20, R19.reuse, 0x4, R20 ; /* 0x0000000413147824 */ /* 0x040fe200078e0214 */ /*02f0*/ LEA R22, R19, R22, 0x2 ; /* 0x0000001613167211 */ /* 0x000fe400078e10ff */ /*0300*/ IADD3 R21, R21, 0x4, RZ ; /* 0x0000000415157810 */ /* 0x000fe20007ffe0ff */ /*0310*/ FFMA R29, R29, R30, R0 ; /* 0x0000001e1d1d7223 */ /* 0x004fe20000000000 */ /*0320*/ IADD3 R0, R24, R17, RZ ; /* 0x0000001118007210 */ /* 0x000fc80007ffe0ff */ /*0330*/ ISETP.NE.AND P1, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fe20003f25270 */ /*0340*/ FFMA R14, R8, R14, R29 ; /* 0x0000000e080e7223 */ /* 0x008fc8000000001d */ /*0350*/ FFMA R14, R3, R6, R14 ; /* 0x00000006030e7223 */ /* 0x010fc8000000000e */ /*0360*/ FFMA R0, R13, R10, R14 ; /* 0x0000000a0d007223 */ /* 0x020fc8000000000e */ /*0370*/ @P1 BRA 0x170 ; /* 0xfffffdf000001947 */ /* 0x000fea000383ffff */ /*0380*/ @!P0 BRA 0x460 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*0390*/ IMAD R18, R17, c[0x0][0x178], R18 ; /* 0x00005e0011127a24 */ /* 0x002fe400078e0212 */ /*03a0*/ IMAD R17, R4, c[0x0][0x178], R17 ; /* 0x00005e0004117a24 */ /* 0x001fe400078e0211 */ /*03b0*/ MOV R6, 0x4 ; /* 0x0000000400067802 */ /* 0x000fca0000000f00 */ /*03c0*/ IMAD.WIDE.U32 R2, R17, R6, c[0x0][0x160] ; /* 0x0000580011027625 */ /* 0x000fc800078e0006 */ /*03d0*/ IMAD.WIDE.U32 R6, R18, R6, c[0x0][0x168] ; /* 0x00005a0012067625 */ /* 0x000fe400078e0006 */ /*03e0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*03f0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x000ea2000c1e1900 */ /*0400*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */ /* 0x000fe40007ffe0ff */ /*0410*/ IADD3 R17, R17, 0x1, RZ ; /* 0x0000000111117810 */ /* 0x000fe40007ffe0ff */ /*0420*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fc40003f05270 */ /*0430*/ IADD3 R18, R18, c[0x0][0x178], RZ ; /* 0x00005e0012127a10 */ /* 0x000fe20007ffe0ff */ /*0440*/ FFMA R0, R7, R2, R0 ; /* 0x0000000207007223 */ /* 0x004fd40000000000 */ /*0450*/ @P0 BRA 0x3b0 ; /* 0xffffff5000000947 */ /* 0x000fea000383ffff */ /*0460*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000ea20000002100 */ /*0470*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0480*/ IMAD R2, R4, c[0x0][0x178], R3 ; /* 0x00005e0004027a24 */ /* 0x005fc800078e0203 */ /*0490*/ IMAD.WIDE.U32 R2, R2, R5, c[0x0][0x170] ; /* 0x00005c0002027625 */ /* 0x000fca00078e0005 */ /*04a0*/ STG.E [R2.64], R0 ; /* 0x0000000002007986 */ /* 0x000fe2000c101904 */ /*04b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*04c0*/ BRA 0x4c0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*04d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0500*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0510*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <hip/hip_runtime_api.h> #include <hip/hip_runtime.h> #include <cstdlib> #include <ctime> #include <iostream> __global__ void matmul(float* matA, float* matB, float* matC, int width){ float pVal = 0; for(int i=0; i<width; ++i){ float elementMatA = matA[threadIdx.y*width+i]; float elementMatB = matB[i*width+threadIdx.x]; pVal += elementMatA * elementMatB; } matC[threadIdx.y*width+threadIdx.x] = pVal; } void matriksMul(float* mA, float* mB, float* mC, int width){ //Device pointer float* a_d, *b_d, *c_d; //Matriks size int size = width * width *sizeof(float) ; //allocate dan copy matriks a int hipError_t = hipMalloc((void**)&a_d, size); if (hipError_t != hipSuccess) { fprintf(stderr, "Error invoking hipMemcpy (ERRCODE %d)\n", hipError_t); } fprintf(stderr, "hipMemcpy (ERRCODE %d)\n", hipError_t); hipMemcpy(a_d, mA, size , hipMemcpyHostToDevice ); //allocate dan copy matriks b hipMalloc((void**)&b_d, size); hipMemcpy(b_d, mB, size , hipMemcpyHostToDevice ); //allocate memory to device c hipMalloc((void**)&c_d, size); dim3 dimGrid(1, 1); dim3 dimBlock(width, width); matmul<<<dimGrid,dimBlock>>>(a_d,b_d,c_d,width); hipMemcpy(mC,c_d,size, hipMemcpyDeviceToHost ); hipFree(a_d); hipFree(b_d); hipFree(c_d); } int main(void){ void matriksMul(float *, float *, float *, int); const int width = 10; float* M, *N, *P; size_t size = width * width *sizeof(float); // allocate arrays on host M = (float *) malloc(size); N = (float *) malloc(size); P = (float *) malloc(size); // float M[width*width], N[width*width], P[width*width]; for(int i = 0; i < (width*width) ; i++) { M[i] = i; N[i] = width*width - i; P[i] = 0.f; // printf("%3f %3f %3f\n", M[i], N[i], P[i]); } matriksMul(M, N, P, width); for(int i = 0; i < (width*width) ; i++) { printf("%f", P[i]); if( i%width ==0){ printf("\n"); } } free(M); free(N); free(P); return 0; }
.text .file "matriksMul.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z21__device_stub__matmulPfS_S_i # -- Begin function _Z21__device_stub__matmulPfS_S_i .type _Z21__device_stub__matmulPfS_S_i,@function _Z21__device_stub__matmulPfS_S_i: # @_Z21__device_stub__matmulPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6matmulPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__matmulPfS_S_i, .Lfunc_end0-_Z21__device_stub__matmulPfS_S_i .cfi_endproc # -- End function .globl _Z10matriksMulPfS_S_i # -- Begin function _Z10matriksMulPfS_S_i .type _Z10matriksMulPfS_S_i,@function _Z10matriksMulPfS_S_i: # @_Z10matriksMulPfS_S_i .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %ecx, %ebp movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r12 movl %ecx, %eax imull %ecx, %eax shll $2, %eax movslq %eax, %r14 leaq 8(%rsp), %rdi movq %r14, %rsi callq hipMalloc movl %eax, %r13d testl %eax, %eax je .LBB1_2 # %bb.1: movq stderr(%rip), %rdi movl $.L.str, %esi movl %r13d, %edx xorl %eax, %eax callq fprintf .LBB1_2: movq stderr(%rip), %rdi movl $.L.str.1, %esi movl %r13d, %edx xorl %eax, %eax callq fprintf movq 8(%rsp), %rdi movq %r12, %rsi movq %r14, %rdx movl $1, %ecx callq hipMemcpy leaq 16(%rsp), %r12 movq %r12, %rdi movq %r14, %rsi callq hipMalloc movq (%r12), %rdi movq %r15, %rsi movq %r14, %rdx movl $1, %ecx callq hipMemcpy movq %rsp, %rdi movq %r14, %rsi callq hipMalloc movl %ebp, %eax movq %rax, %rdx shlq $32, %rdx orq %rax, %rdx movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_4 # %bb.3: movq 8(%rsp), %rdi movq 16(%rsp), %rsi movq (%rsp), %rdx movl %ebp, %ecx callq _Z21__device_stub__matmulPfS_S_i .LBB1_4: movq (%rsp), %rsi movq %rbx, %rdi movq %r14, %rdx movl $2, %ecx callq hipMemcpy movq 8(%rsp), %rdi callq hipFree movq 16(%rsp), %rdi callq hipFree movq (%rsp), %rdi callq hipFree addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z10matriksMulPfS_S_i, .Lfunc_end1-_Z10matriksMulPfS_S_i .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 pushq %rax .cfi_def_cfa_offset 64 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $400, %edi # imm = 0x190 callq malloc movq %rax, %rbx movl $400, %edi # imm = 0x190 callq malloc movq %rax, %r14 movl $1, %edi movl $400, %esi # imm = 0x190 callq calloc@PLT movq %rax, %r15 movl $100, %eax xorl %ecx, %ecx .LBB2_1: # =>This Inner Loop Header: Depth=1 xorps %xmm0, %xmm0 cvtsi2ss %ecx, %xmm0 xorps %xmm1, %xmm1 cvtsi2ss %eax, %xmm1 movss %xmm0, (%rbx,%rcx,4) movss %xmm1, (%r14,%rcx,4) incq %rcx decq %rax jne .LBB2_1 # %bb.2: movq %rbx, %rdi movq %r14, %rsi movq %r15, %rdx movl $10, %ecx callq _Z10matriksMulPfS_S_i xorl %r12d, %r12d xorl %r13d, %r13d .LBB2_3: # =>This Inner Loop Header: Depth=1 movzbl %r13b, %eax imull $205, %eax, %eax shrl $10, %eax andl $-2, %eax leal (%rax,%rax,4), %ebp xorps %xmm0, %xmm0 cvtss2sd (%r15,%r13,4), %xmm0 movl $.L.str.2, %edi movb $1, %al callq printf addb %r12b, %bpl jne .LBB2_5 # %bb.4: # in Loop: Header=BB2_3 Depth=1 movl $10, %edi callq putchar@PLT .LBB2_5: # in Loop: Header=BB2_3 Depth=1 incq %r13 decb %r12b cmpq $100, %r13 jne .LBB2_3 # %bb.6: movq %rbx, %rdi callq free movq %r14, %rdi callq free movq %r15, %rdi callq free xorl %eax, %eax addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6matmulPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z6matmulPfS_S_i,@object # @_Z6matmulPfS_S_i .section .rodata,"a",@progbits .globl _Z6matmulPfS_S_i .p2align 3, 0x0 _Z6matmulPfS_S_i: .quad _Z21__device_stub__matmulPfS_S_i .size _Z6matmulPfS_S_i, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Error invoking hipMemcpy (ERRCODE %d)\n" .size .L.str, 39 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "hipMemcpy (ERRCODE %d)\n" .size .L.str.1, 24 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "%f" .size .L.str.2, 3 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6matmulPfS_S_i" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__matmulPfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6matmulPfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6matmulPfS_S_i ; -- Begin function _Z6matmulPfS_S_i .globl _Z6matmulPfS_S_i .p2align 8 .type _Z6matmulPfS_S_i,@function _Z6matmulPfS_S_i: ; @_Z6matmulPfS_S_i ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x18 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 v_bfe_u32 v1, v0, 10, 10 v_dual_mov_b32 v6, 0 :: v_dual_and_b32 v5, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_2) v_mul_lo_u32 v4, v1, s2 s_cmp_lt_i32 s2, 1 s_cbranch_scc1 .LBB0_3 ; %bb.1: ; %.lr.ph.preheader v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, v5 s_mov_b32 s3, 0 .LBB0_2: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_dual_mov_b32 v3, v1 :: v_dual_add_nc_u32 v0, s3, v4 s_add_i32 s3, s3, 1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_eq_u32 s2, s3 v_lshlrev_b64 v[7:8], 2, v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_lshlrev_b64 v[9:10], 2, v[2:3] v_add_nc_u32_e32 v2, s2, v2 v_add_co_u32 v7, vcc_lo, s4, v7 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo v_add_co_u32 v9, vcc_lo, s6, v9 v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo global_load_b32 v0, v[7:8], off global_load_b32 v3, v[9:10], off s_waitcnt vmcnt(0) v_fmac_f32_e32 v6, v0, v3 s_cbranch_scc0 .LBB0_2 .LBB0_3: ; %Flow35 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v4, v5 v_lshlrev_b64 v[0:1], 2, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b32 v[0:1], v6, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6matmulPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 28 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 8 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6matmulPfS_S_i, .Lfunc_end0-_Z6matmulPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 244 ; NumSgprs: 10 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 1 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 10 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 28 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6matmulPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 10 .sgpr_spill_count: 0 .symbol: _Z6matmulPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
0e9228c9eca70fe8fcda9d6de9bc6c3521bf09f1
#include <stdio.h> #include <stdlib.h> #define NUM_BLOCKS 32 #define BLOCK_WIDTH 1 __global__ void hello() { printf("Hello world! I'm thread %d in block %d\n", threadIdx.x, blockIdx.x); } int main(int argc,char **argv) { int num_blocks = NUM_BLOCKS, block_width = BLOCK_WIDTH; if(argc>1){ num_blocks = atoi(argv[1]); block_width = atoi(argv[2]); } // launch the kernel hello<<<num_blocks, block_width>>>(); // force the printf()s to flush cudaDeviceSynchronize(); return 0; }
.file "tmpxft_003798bf_00000000-6_block.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z23__device_stub__Z5hellovv .type _Z23__device_stub__Z5hellovv, @function _Z23__device_stub__Z5hellovv: .LFB2052: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 72(%rsp) movabsq $4294967297, %rax leaq 8(%rsp), %rcx movq %rsp, %rdx leaq 28(%rsp), %rsi leaq 16(%rsp), %rdi movl $1, 24(%rsp) movl $1, 36(%rsp) movq %rax, 16(%rsp) movq %rax, 28(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 8(%rsp) .cfi_def_cfa_offset 104 leaq _Z5hellov(%rip), %rdi pushq 8(%rsp) .cfi_def_cfa_offset 112 movq 44(%rsp), %rcx movl 52(%rsp), %r8d movq 32(%rsp), %rsi movl 40(%rsp), %edx leaq 80(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L2: movq 72(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z23__device_stub__Z5hellovv, .-_Z23__device_stub__Z5hellovv .globl _Z5hellov .type _Z5hellov, @function _Z5hellov: .LFB2053: .cfi_startproc endbr64 jmp _Z23__device_stub__Z5hellovv .cfi_endproc .LFE2053: .size _Z5hellov, .-_Z5hellov .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 subq $40, %rsp .cfi_def_cfa_offset 64 decl %edi jle .L11 movq 8(%rsi), %rdi movq %rsi, %rbp call atoi@PLT movq 16(%rbp), %rdi movl %eax, %ebx call atoi@PLT jmp .L9 .L11: movl $1, %eax movl $32, %ebx .L9: movl %eax, 20(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rax movq %rax, 24(%rsp) movl 28(%rsp), %ecx movq %rax, 12(%rsp) movq 20(%rsp), %rdx movl %ebx, 8(%rsp) movl 16(%rsp), %esi movq 8(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L10 call _Z23__device_stub__Z5hellovv .L10: call cudaDeviceSynchronize@PLT addq $40, %rsp .cfi_def_cfa_offset 24 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z5hellov" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z5hellov(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z5hellov .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fc800078e00ff */ /*0010*/ S2R R9, SR_CTAID.X ; /* 0x0000000000097919 */ /* 0x000e220000002500 */ /*0020*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */ /* 0x000fe20007ffe0ff */ /*0030*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*0040*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe20000000f00 */ /*0050*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */ /* 0x000e220000002100 */ /*0060*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fe20007f1e0ff */ /*0070*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x000fe200078e00ff */ /*0080*/ LDC.64 R2, c[0x4][R0] ; /* 0x0100000000027b82 */ /* 0x0002a60000000a00 */ /*0090*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */ /* 0x000fe200000e06ff */ /*00a0*/ STL.64 [R1], R8 ; /* 0x0000000801007387 */ /* 0x0013e80000100a00 */ /*00b0*/ LEPC R8 ; /* 0x000000000008734e */ /* 0x002fc60000000000 */ /*00c0*/ MOV R11, 0x130 ; /* 0x00000130000b7802 */ /* 0x000fe40000000f00 */ /*00d0*/ MOV R20, 0xb0 ; /* 0x000000b000147802 */ /* 0x000fc40000000f00 */ /*00e0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*00f0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*0100*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e108 */ /*0110*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2509 */ /*0120*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */ /* 0x004fea0003c00000 */ /*0130*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0140*/ BRA 0x140; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #define NUM_BLOCKS 32 #define BLOCK_WIDTH 1 __global__ void hello() { printf("Hello world! I'm thread %d in block %d\n", threadIdx.x, blockIdx.x); } int main(int argc,char **argv) { int num_blocks = NUM_BLOCKS, block_width = BLOCK_WIDTH; if(argc>1){ num_blocks = atoi(argv[1]); block_width = atoi(argv[2]); } // launch the kernel hello<<<num_blocks, block_width>>>(); // force the printf()s to flush hipDeviceSynchronize(); return 0; }
.text .file "block.hip" .globl _Z20__device_stub__hellov # -- Begin function _Z20__device_stub__hellov .type _Z20__device_stub__hellov,@function _Z20__device_stub__hellov: # @_Z20__device_stub__hellov .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $56, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rbx leaq 24(%rsp), %r14 leaq 16(%rsp), %r15 leaq 8(%rsp), %r12 movq %rbx, %rdi movq %r14, %rsi movq %r15, %rdx movq %r12, %rcx callq __hipPopCallConfiguration movq (%rbx), %rsi movl 8(%rbx), %edx movq (%r14), %rcx movl 8(%r14), %r8d movq %rsp, %r9 movl $_Z5hellov, %edi pushq (%r12) .cfi_adjust_cfa_offset 8 pushq (%r15) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $72, %rsp .cfi_adjust_cfa_offset -72 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z20__device_stub__hellov, .Lfunc_end0-_Z20__device_stub__hellov .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movabsq $4294967296, %rbx # imm = 0x100000000 cmpl $2, %edi jl .LBB1_1 # %bb.2: movq %rsi, %r14 movq 8(%rsi), %rdi callq atoi movl %eax, %ebp movq 16(%r14), %rdi callq atoi movl %ebp, %ecx orq %rbx, %rcx movl %eax, %edx orq %rbx, %rdx movq %rcx, %rbx jmp .LBB1_3 .LBB1_1: leaq 1(%rbx), %rdx orq $32, %rbx .LBB1_3: movq %rbx, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_5 # %bb.4: callq _Z20__device_stub__hellov .LBB1_5: callq hipDeviceSynchronize xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z5hellov, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z5hellov,@object # @_Z5hellov .section .rodata,"a",@progbits .globl _Z5hellov .p2align 3, 0x0 _Z5hellov: .quad _Z20__device_stub__hellov .size _Z5hellov, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z5hellov" .size .L__unnamed_1, 10 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z20__device_stub__hellov .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z5hellov .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z5hellov ; -- Begin function _Z5hellov .globl _Z5hellov .p2align 8 .type _Z5hellov,@function _Z5hellov: ; @_Z5hellov ; %bb.0: s_load_b64 s[2:3], s[0:1], 0x50 v_mbcnt_lo_u32_b32 v2, -1, 0 v_mov_b32_e32 v9, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v7, v2 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v7 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_6 ; %bb.1: v_mov_b32_e32 v1, 0 s_mov_b32 s4, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[5:6], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[8:9], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v3, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v10, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v10, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v8, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v9, v4, vcc_lo global_load_b64 v[3:4], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[9:10], v1, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[9:10], v[5:6] s_cbranch_execz .LBB0_5 ; %bb.2: ; %.preheader3.i.i.i.preheader s_mov_b32 s5, 0 .LBB0_3: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v6, v10 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v3, v3, v5 s_waitcnt vmcnt(0) v_mad_u64_u32 v[8:9], null, v3, 24, v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v3, v9 :: v_dual_and_b32 v4, v4, v6 v_mad_u64_u32 v[9:10], null, v4, 24, v[3:4] global_load_b64 v[3:4], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[9:10], v1, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[5:6] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_3 ; %bb.4: ; %Flow364 s_or_b32 exec_lo, exec_lo, s5 .LBB0_5: ; %Flow366 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_6: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v8, 0 v_readfirstlane_b32 s4, v9 v_readfirstlane_b32 s5, v10 s_mov_b32 s10, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:40 global_load_b128 v[3:6], v8, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v11 v_readfirstlane_b32 s7, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_8 ; %bb.7: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, v8 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v13, vcc_lo, v3, s9 v_add_co_ci_u32_e32 v14, vcc_lo, s10, v4, vcc_lo v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1 global_store_b128 v[13:14], v[9:12], off offset:8 .LBB0_8: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[9:10], 6, v[7:8] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v5, s6 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v6, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v1, v9 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_add_co_ci_u32_e32 v12, vcc_lo, v5, v10, vcc_lo v_dual_mov_b32 v7, 33 :: v_dual_mov_b32 v10, v8 v_mov_b32_e32 v9, v8 v_dual_mov_b32 v13, s16 :: v_dual_mov_b32 v16, s19 v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s18 s_clause 0x3 global_store_b128 v[11:12], v[7:10], off global_store_b128 v[11:12], v[13:16], off offset:16 global_store_b128 v[11:12], v[13:16], off offset:32 global_store_b128 v[11:12], v[13:16], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_16 ; %bb.9: v_mov_b32_e32 v1, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[15:16], v1, s[2:3] offset:32 glc global_load_b64 v[5:6], v1, s[2:3] offset:40 v_dual_mov_b32 v14, s5 :: v_dual_mov_b32 v13, s4 s_waitcnt vmcnt(0) v_and_b32_e32 v6, s5, v6 v_and_b32_e32 v5, s4, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v6, v6, 24 v_mul_hi_u32 v7, v5, 24 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v6, v7, v6 v_add_co_u32 v9, vcc_lo, v3, v5 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v10, vcc_lo, v4, v6, vcc_lo global_store_b64 v[9:10], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v1, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[7:8], v[15:16] s_cbranch_execz .LBB0_12 ; %bb.10: ; %.preheader1.i.i.i.preheader s_mov_b32 s10, 0 .LBB0_11: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v5, s4 :: v_dual_mov_b32 v6, s5 s_sleep 1 global_store_b64 v[9:10], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8] v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_11 .LBB0_12: ; %Flow362 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v8, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v1, s10, 0 global_load_b64 v[5:6], v8, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v1 s_cbranch_execz .LBB0_14 ; %bb.13: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v7, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[5:6], v[7:8], off offset:8 .LBB0_14: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[5:6], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_16 ; %bb.15: global_load_b32 v5, v[5:6], off offset:24 v_mov_b32_e32 v6, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v5 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[5:6], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_16: ; %Flow363 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v1, vcc_lo, v3, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v4, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_17: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_19 ; %bb.18: ; in Loop: Header=BB0_17 Depth=1 global_load_b32 v1, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v1, 1, v1 .LBB0_19: ; in Loop: Header=BB0_17 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v1 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_21 ; %bb.20: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_22 .LBB0_21: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, -1 .LBB0_22: ; %Flow357 ; in Loop: Header=BB0_17 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_17 ; %bb.23: global_load_b64 v[3:4], v[11:12], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_27 ; %bb.24: v_mov_b32_e32 v1, 0 s_clause 0x2 global_load_b64 v[7:8], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] offset:24 glc global_load_b64 v[9:10], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v7, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v13, s4 v_add_co_ci_u32_e32 v6, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v14 :: v_dual_cndmask_b32 v5, v5, v13 v_and_b32_e32 v8, v6, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v7, v5, v7 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v7, 24 v_mul_lo_u32 v7, v7, 24 v_add_nc_u32_e32 v8, v13, v8 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v9, vcc_lo, v9, v7 v_mov_b32_e32 v7, v11 v_add_co_ci_u32_e32 v10, vcc_lo, v10, v8, vcc_lo v_mov_b32_e32 v8, v12 global_store_b64 v[9:10], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v1, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_27 ; %bb.25: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_26: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[9:10], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v1, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[7:8] v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v8, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_26 .LBB0_27: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[4:5] s_add_u32 s4, s4, .str@rel32@lo+4 s_addc_u32 s5, s5, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[4:5], 0 s_cbranch_scc0 .LBB0_113 ; %bb.28: s_waitcnt vmcnt(0) v_dual_mov_b32 v32, 0 :: v_dual_and_b32 v1, 2, v3 v_dual_mov_b32 v6, v4 :: v_dual_and_b32 v5, -3, v3 v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1 s_mov_b64 s[6:7], 40 .LBB0_29: ; =>This Loop Header: Depth=1 ; Child Loop BB0_32 Depth 2 ; Child Loop BB0_39 Depth 2 ; Child Loop BB0_47 Depth 2 ; Child Loop BB0_55 Depth 2 ; Child Loop BB0_63 Depth 2 ; Child Loop BB0_71 Depth 2 ; Child Loop BB0_79 Depth 2 ; Child Loop BB0_87 Depth 2 ; Child Loop BB0_95 Depth 2 ; Child Loop BB0_101 Depth 2 ; Child Loop BB0_110 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[6:7], 56 ; implicit-def: $vgpr13_vgpr14 ; implicit-def: $sgpr16 s_and_b32 s0, s0, exec_lo s_cselect_b32 s8, s6, 56 s_cselect_b32 s9, s7, 0 s_cmp_gt_u32 s8, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_34 ; %bb.30: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v13, 0 v_mov_b32_e32 v14, 0 s_cmp_eq_u32 s8, 0 s_cbranch_scc1 .LBB0_33 ; %bb.31: ; %.preheader31.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_lshl_b64 s[0:1], s[8:9], 3 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[4:5] .LBB0_32: ; %.preheader31.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v7, v32, s[12:13] s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[31:32] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s0, s10 v_or_b32_e32 v13, v7, v13 v_or_b32_e32 v14, v8, v14 s_cbranch_scc1 .LBB0_32 .LBB0_33: ; %Flow333 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s16, 0 .LBB0_34: ; %Flow335 ; in Loop: Header=BB0_29 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[4:5] s_cbranch_vccnz .LBB0_36 ; %bb.35: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[13:14], v32, s[4:5] s_add_i32 s16, s8, -8 s_add_u32 s0, s4, 8 s_addc_u32 s1, s5, 0 .LBB0_36: ; %.loopexit32.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_41 ; %bb.37: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v15, 0 v_mov_b32_e32 v16, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_40 ; %bb.38: ; %.preheader29.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_39: ; %.preheader29.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v7, v32, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[31:32] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s16, s12 v_or_b32_e32 v15, v7, v15 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v16, v8, v16 s_cbranch_scc1 .LBB0_39 .LBB0_40: ; %Flow328 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_42 .LBB0_41: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr15_vgpr16 ; implicit-def: $sgpr14 .LBB0_42: ; %Flow330 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_44 ; %bb.43: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[15:16], v32, s[0:1] s_add_i32 s14, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_44: ; %.loopexit30.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_49 ; %bb.45: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v17, 0 v_mov_b32_e32 v18, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_48 ; %bb.46: ; %.preheader27.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_47: ; %.preheader27.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v7, v32, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[31:32] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v17, v7, v17 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v18, v8, v18 s_cbranch_scc1 .LBB0_47 .LBB0_48: ; %Flow323 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s16, 0 s_branch .LBB0_50 .LBB0_49: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr16 .LBB0_50: ; %Flow325 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_52 ; %bb.51: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[17:18], v32, s[0:1] s_add_i32 s16, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_52: ; %.loopexit28.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_57 ; %bb.53: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v19, 0 v_mov_b32_e32 v20, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_56 ; %bb.54: ; %.preheader25.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_55: ; %.preheader25.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v7, v32, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[31:32] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s16, s12 v_or_b32_e32 v19, v7, v19 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v20, v8, v20 s_cbranch_scc1 .LBB0_55 .LBB0_56: ; %Flow318 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_58 .LBB0_57: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr19_vgpr20 ; implicit-def: $sgpr14 .LBB0_58: ; %Flow320 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_60 ; %bb.59: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[19:20], v32, s[0:1] s_add_i32 s14, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_60: ; %.loopexit26.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_65 ; %bb.61: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v21, 0 v_mov_b32_e32 v22, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_64 ; %bb.62: ; %.preheader23.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_63: ; %.preheader23.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v7, v32, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[31:32] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s14, s12 v_or_b32_e32 v21, v7, v21 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v22, v8, v22 s_cbranch_scc1 .LBB0_63 .LBB0_64: ; %Flow313 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s16, 0 s_branch .LBB0_66 .LBB0_65: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr16 .LBB0_66: ; %Flow315 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_68 ; %bb.67: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[21:22], v32, s[0:1] s_add_i32 s16, s14, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_68: ; %.loopexit24.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_73 ; %bb.69: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v23, 0 v_mov_b32_e32 v24, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_72 ; %bb.70: ; %.preheader21.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_71: ; %.preheader21.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v7, v32, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[31:32] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s16, s12 v_or_b32_e32 v23, v7, v23 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v24, v8, v24 s_cbranch_scc1 .LBB0_71 .LBB0_72: ; %Flow308 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s14, 0 s_branch .LBB0_74 .LBB0_73: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr23_vgpr24 ; implicit-def: $sgpr14 .LBB0_74: ; %Flow310 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_76 ; %bb.75: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[23:24], v32, s[0:1] s_add_i32 s14, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_76: ; %.loopexit22.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s14, 7 s_cbranch_scc1 .LBB0_81 ; %bb.77: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v25, 0 v_mov_b32_e32 v26, 0 s_cmp_eq_u32 s14, 0 s_cbranch_scc1 .LBB0_80 ; %bb.78: ; %.preheader.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[0:1] .LBB0_79: ; %.preheader.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v7, v32, s[12:13] s_add_i32 s14, s14, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v31, 0xffff, v7 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[31:32] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s14, 0 v_or_b32_e32 v25, v7, v25 v_or_b32_e32 v26, v8, v26 s_cbranch_scc1 .LBB0_79 .LBB0_80: ; %Flow303 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_branch .LBB0_82 .LBB0_81: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 .LBB0_82: ; %Flow305 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_84 ; %bb.83: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[25:26], v32, s[0:1] .LBB0_84: ; %.loopexit.i ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v31, v2 s_waitcnt vmcnt(0) v_mov_b32_e32 v7, 0 v_mov_b32_e32 v8, 0 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v31 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v31 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_90 ; %bb.85: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[29:30], v32, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[7:8], v32, s[2:3] offset:40 global_load_b64 v[11:12], v32, s[2:3] s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v8, v8, v30 v_and_b32_e32 v7, v7, v29 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v8, v8, 24 v_mul_hi_u32 v27, v7, 24 v_mul_lo_u32 v7, v7, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v8, v27, v8 s_waitcnt vmcnt(0) v_add_co_u32 v7, vcc_lo, v11, v7 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, v12, v8, vcc_lo global_load_b64 v[27:28], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v32, v[27:30], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[7:8], v[29:30] s_cbranch_execz .LBB0_89 ; %bb.86: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s11, 0 .LBB0_87: ; %.preheader3.i.i19.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[11:12], v32, s[2:3] offset:40 global_load_b64 v[27:28], v32, s[2:3] v_dual_mov_b32 v30, v8 :: v_dual_mov_b32 v29, v7 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v11, v11, v29 s_waitcnt vmcnt(0) v_mad_u64_u32 v[7:8], null, v11, 24, v[27:28] v_and_b32_e32 v27, v12, v30 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v27, 24, v[8:9] v_mov_b32_e32 v8, v11 global_load_b64 v[27:28], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v32, v[27:30], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[29:30] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_87 ; %bb.88: ; %Flow298 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_89: ; %Flow300 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 .LBB0_90: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[11:12], v32, s[2:3] offset:40 global_load_b128 v[27:30], v32, s[2:3] v_readfirstlane_b32 s10, v7 v_readfirstlane_b32 s11, v8 s_mov_b32 s17, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s12, v11 v_readfirstlane_b32 s13, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[10:11], s[12:13] s_mul_i32 s1, s13, 24 s_mul_hi_u32 s14, s12, 24 s_mul_i32 s16, s12, 24 s_and_saveexec_b32 s18, s0 s_cbranch_execz .LBB0_92 ; %bb.91: ; in Loop: Header=BB0_29 Depth=1 v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v8, v32 s_add_i32 s17, s14, s1 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v27, s16 v_add_co_ci_u32_e32 v12, vcc_lo, s17, v28, vcc_lo global_store_b128 v[11:12], v[7:10], off offset:8 .LBB0_92: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s18 v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56 v_or_b32_e32 v7, 0, v6 v_or_b32_e32 v8, v5, v1 s_lshl_b64 s[12:13], s[12:13], 12 s_lshl_b32 s17, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s17, s17, 28 v_dual_cndmask_b32 v12, v7, v6 :: v_dual_cndmask_b32 v7, v8, v5 v_lshlrev_b64 v[5:6], 6, v[31:32] s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v29, s12 v_add_co_ci_u32_e32 v30, vcc_lo, s13, v30, vcc_lo s_and_b32 s17, s17, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v29, vcc_lo, v8, v5 v_and_or_b32 v11, 0xffffff1f, v7, s17 v_add_co_ci_u32_e32 v30, vcc_lo, v30, v6, vcc_lo s_clause 0x3 global_store_b128 v[29:30], v[11:14], off global_store_b128 v[29:30], v[15:18], off offset:16 global_store_b128 v[29:30], v[19:22], off offset:32 global_store_b128 v[29:30], v[23:26], off offset:48 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_100 ; %bb.93: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x1 global_load_b64 v[15:16], v32, s[2:3] offset:32 glc global_load_b64 v[5:6], v32, s[2:3] offset:40 v_dual_mov_b32 v13, s10 :: v_dual_mov_b32 v14, s11 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v5 v_readfirstlane_b32 s19, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[10:11] s_mul_i32 s13, s19, 24 s_mul_hi_u32 s17, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s17, s17, s13 v_add_co_u32 v11, vcc_lo, v27, s18 v_add_co_ci_u32_e32 v12, vcc_lo, s17, v28, vcc_lo s_mov_b32 s13, exec_lo global_store_b64 v[11:12], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v32, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[7:8], v[15:16] s_cbranch_execz .LBB0_96 ; %bb.94: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s17, 0 .LBB0_95: ; %.preheader1.i.i17.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v6, s11 s_sleep 1 global_store_b64 v[11:12], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v32, v[5:8], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8] v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5 s_or_b32 s17, vcc_lo, s17 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s17 s_cbranch_execnz .LBB0_95 .LBB0_96: ; %Flow296 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s13 global_load_b64 v[5:6], v32, s[2:3] offset:16 s_mov_b32 s17, exec_lo s_mov_b32 s13, exec_lo v_mbcnt_lo_u32_b32 v7, s17, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v7 s_cbranch_execz .LBB0_98 ; %bb.97: ; in Loop: Header=BB0_29 Depth=1 s_bcnt1_i32_b32 s17, s17 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v31, s17 s_waitcnt vmcnt(0) global_atomic_add_u64 v[5:6], v[31:32], off offset:8 .LBB0_98: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[5:6], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_100 ; %bb.99: ; in Loop: Header=BB0_29 Depth=1 global_load_b32 v31, v[5:6], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s13, v31 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[31:32], off s_and_b32 m0, s13, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_100: ; %Flow297 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_add_i32 s14, s14, s1 v_add_co_u32 v5, vcc_lo, v27, s16 v_add_co_ci_u32_e32 v6, vcc_lo, s14, v28, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v5, 20 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo .LBB0_101: ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v7, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_101 Depth=2 global_load_b32 v7, v[5:6], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v7, 1, v7 .LBB0_103: ; in Loop: Header=BB0_101 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v7 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_105 ; %bb.104: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_106 .LBB0_105: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, -1 .LBB0_106: ; %Flow291 ; in Loop: Header=BB0_101 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_101 ; %bb.107: ; in Loop: Header=BB0_29 Depth=1 global_load_b128 v[5:8], v[29:30], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_111 ; %bb.108: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x2 global_load_b64 v[7:8], v32, s[2:3] offset:40 global_load_b64 v[15:16], v32, s[2:3] offset:24 glc global_load_b64 v[13:14], v32, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v17, vcc_lo, v7, 1 v_add_co_ci_u32_e32 v18, vcc_lo, 0, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v17, s10 v_add_co_ci_u32_e32 v12, vcc_lo, s11, v18, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[11:12] v_dual_cndmask_b32 v12, v12, v18 :: v_dual_cndmask_b32 v11, v11, v17 v_and_b32_e32 v8, v12, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v11, v7 v_mul_hi_u32 v17, v7, 24 v_mul_lo_u32 v7, v7, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v7, vcc_lo, v13, v7 v_mov_b32_e32 v13, v15 v_mul_lo_u32 v8, v8, 24 v_add_nc_u32_e32 v8, v17, v8 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v8, vcc_lo, v14, v8, vcc_lo v_mov_b32_e32 v14, v16 global_store_b64 v[7:8], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[13:14], v32, v[11:14], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[13:14], v[15:16] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_111 ; %bb.109: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 .LBB0_110: ; %.preheader.i.i16.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[7:8], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v32, v[11:14], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[13:14] v_dual_mov_b32 v13, v15 :: v_dual_mov_b32 v14, v16 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_110 .LBB0_111: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s6, s6, s8 s_subb_u32 s7, s7, s9 s_add_u32 s4, s4, s8 s_addc_u32 s5, s5, s9 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc1 .LBB0_29 ; %bb.112: ; %Flow336 s_mov_b32 s0, 0 s_branch .LBB0_114 .LBB0_113: s_mov_b32 s0, -1 ; implicit-def: $vgpr5_vgpr6 .LBB0_114: ; %Flow351 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_143 ; %bb.115: s_waitcnt vmcnt(0) v_mov_b32_e32 v5, v2 v_mov_b32_e32 v11, 0 v_mov_b32_e32 v12, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v5 v_cmp_eq_u32_e64 s0, s0, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_121 ; %bb.116: v_mov_b32_e32 v1, 0 s_mov_b32 s4, exec_lo global_load_b64 v[8:9], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[10:11], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v6, v6, v8 v_and_b32_e32 v7, v7, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v6, 24 v_mul_lo_u32 v7, v7, 24 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v7, v12, v7 s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v10, v6 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo global_load_b64 v[6:7], v[6:7], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[8:9] s_cbranch_execz .LBB0_120 ; %bb.117: ; %.preheader3.i.i.i6.preheader s_mov_b32 s5, 0 .LBB0_118: ; %.preheader3.i.i.i6 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[13:14], v1, s[2:3] v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v6, v6, v8 v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[10:11], null, v6, 24, v[13:14] v_mov_b32_e32 v6, v11 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v7, 24, v[6:7] global_load_b64 v[6:7], v[10:11], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_118 ; %bb.119: ; %Flow348 s_or_b32 exec_lo, exec_lo, s5 .LBB0_120: ; %Flow350 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_121: ; %.loopexit4.i.i.i1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s4, v11 v_readfirstlane_b32 s5, v12 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[13:14], v6, s[2:3] offset:40 global_load_b128 v[7:10], v6, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v13 v_readfirstlane_b32 s7, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_123 ; %bb.122: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v12, v6 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v7, s9 v_add_co_ci_u32_e32 v16, vcc_lo, s10, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[15:16], v[11:14], off offset:8 .LBB0_123: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[11:12], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v9, s6 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v10, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v9, vcc_lo, v1, v11 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v10, vcc_lo, v5, v12, vcc_lo v_mov_b32_e32 v5, v6 v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v14, s19 v_dual_mov_b32 v12, s17 :: v_dual_mov_b32 v13, s18 s_clause 0x3 global_store_b128 v[9:10], v[3:6], off global_store_b128 v[9:10], v[11:14], off offset:16 global_store_b128 v[9:10], v[11:14], off offset:32 global_store_b128 v[9:10], v[11:14], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_131 ; %bb.124: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v14, s5 v_mov_b32_e32 v13, s4 s_clause 0x1 global_load_b64 v[15:16], v1, s[2:3] offset:32 glc global_load_b64 v[3:4], v1, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v11, vcc_lo, v7, s10 v_add_co_ci_u32_e32 v12, vcc_lo, s11, v8, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[11:12], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v1, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[15:16] s_cbranch_execz .LBB0_127 ; %bb.125: ; %.preheader1.i.i.i4.preheader s_mov_b32 s10, 0 .LBB0_126: ; %.preheader1.i.i.i4 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s5 s_sleep 1 global_store_b64 v[11:12], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v1, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_126 .LBB0_127: ; %Flow346 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v6, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v1, s10, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v1 s_cbranch_execz .LBB0_129 ; %bb.128: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_129: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_131 ; %bb.130: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_131: ; %Flow347 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v1, vcc_lo, v7, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_132: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_134 ; %bb.133: ; in Loop: Header=BB0_132 Depth=1 global_load_b32 v1, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v1, 1, v1 .LBB0_134: ; in Loop: Header=BB0_132 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v1 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_136 ; %bb.135: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_137 .LBB0_136: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, -1 .LBB0_137: ; %Flow341 ; in Loop: Header=BB0_132 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_132 ; %bb.138: global_load_b128 v[5:8], v[9:10], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_142 ; %bb.139: v_mov_b32_e32 v1, 0 s_clause 0x2 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] offset:24 glc global_load_b64 v[9:10], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v4, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, v13, s4 v_add_co_ci_u32_e32 v8, vcc_lo, s5, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] v_dual_cndmask_b32 v8, v8, v14 :: v_dual_cndmask_b32 v7, v7, v13 v_and_b32_e32 v4, v8, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v7, v3 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v3, 24 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v4, v13, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v3, vcc_lo, v9, v3 v_mov_b32_e32 v9, v11 v_add_co_ci_u32_e32 v4, vcc_lo, v10, v4, vcc_lo v_mov_b32_e32 v10, v12 global_store_b64 v[3:4], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v1, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[9:10], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_142 ; %bb.140: ; %.preheader.i.i.i3.preheader s_mov_b32 s0, 0 .LBB0_141: ; %.preheader.i.i.i3 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[3:4], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v1, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[9:10] v_dual_mov_b32 v9, v11 :: v_dual_mov_b32 v10, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_141 .LBB0_142: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_143: ; %__ockl_printf_append_string_n.exit s_waitcnt vmcnt(0) v_mov_b32_e32 v7, v2 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v7 v_cmp_eq_u32_e64 s0, s0, v7 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_149 ; %bb.144: v_mov_b32_e32 v1, 0 s_mov_b32 s4, exec_lo global_load_b64 v[10:11], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[8:9], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v11 v_and_b32_e32 v3, v3, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v12, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v12, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v8, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v9, v4, vcc_lo global_load_b64 v[8:9], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[10:11] s_cbranch_execz .LBB0_148 ; %bb.145: ; %.preheader3.i.i.i13.preheader s_mov_b32 s5, 0 .LBB0_146: ; %.preheader3.i.i.i13 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v1, s[2:3] offset:40 global_load_b64 v[12:13], v1, s[2:3] v_dual_mov_b32 v11, v4 :: v_dual_mov_b32 v10, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v10 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v8, 24, v[12:13] v_and_b32_e32 v12, v9, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v12, 24, v[4:5] v_mov_b32_e32 v4, v8 global_load_b64 v[8:9], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[10:11] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_146 ; %bb.147: ; %Flow284 s_or_b32 exec_lo, exec_lo, s5 .LBB0_148: ; %Flow286 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_149: ; %.loopexit4.i.i.i7 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v8, 0 v_readfirstlane_b32 s4, v3 v_readfirstlane_b32 s5, v4 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[13:14], v8, s[2:3] offset:40 global_load_b128 v[9:12], v8, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v13 v_readfirstlane_b32 s7, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_151 ; %bb.150: v_dual_mov_b32 v13, s10 :: v_dual_mov_b32 v14, v8 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v9, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s10, v10, vcc_lo v_dual_mov_b32 v15, 2 :: v_dual_mov_b32 v16, 1 global_store_b128 v[3:4], v[13:16], off offset:8 .LBB0_151: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[7:8] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v11, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v12, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v11, vcc_lo, v1, v3 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v5, 0xffffff1f, v5, 32 v_add_co_ci_u32_e32 v12, vcc_lo, v7, v4, vcc_lo v_mov_b32_e32 v7, v0 v_dual_mov_b32 v13, s16 :: v_dual_mov_b32 v16, s19 v_dual_mov_b32 v14, s17 :: v_dual_mov_b32 v15, s18 s_clause 0x3 global_store_b128 v[11:12], v[5:8], off global_store_b128 v[11:12], v[13:16], off offset:16 global_store_b128 v[11:12], v[13:16], off offset:32 global_store_b128 v[11:12], v[13:16], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_159 ; %bb.152: v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v14, s5 v_mov_b32_e32 v13, s4 s_clause 0x1 global_load_b64 v[15:16], v7, s[2:3] offset:32 glc global_load_b64 v[0:1], v7, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v0, vcc_lo, v9, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s11, v10, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[0:1], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v7, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[15:16] s_cbranch_execz .LBB0_155 ; %bb.153: ; %.preheader1.i.i.i11.preheader s_mov_b32 s10, 0 .LBB0_154: ; %.preheader1.i.i.i11 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s5 s_sleep 1 global_store_b64 v[0:1], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v7, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_154 .LBB0_155: ; %Flow282 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v4, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v3, s10, 0 global_load_b64 v[0:1], v4, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB0_157 ; %bb.156: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v3, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[3:4], off offset:8 .LBB0_157: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[3:4], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] s_cbranch_vccnz .LBB0_159 ; %bb.158: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[3:4], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_159: ; %Flow283 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v9, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v10, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_160: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v3, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_162 ; %bb.161: ; in Loop: Header=BB0_160 Depth=1 global_load_b32 v3, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v3, 1, v3 .LBB0_162: ; in Loop: Header=BB0_160 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v3 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_164 ; %bb.163: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_165 .LBB0_164: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, -1 .LBB0_165: ; %Flow277 ; in Loop: Header=BB0_160 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_160 ; %bb.166: global_load_b64 v[0:1], v[11:12], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_170 ; %bb.167: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[5:6], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v5, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v12, s4 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_and_b32_e32 v6, v4, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v3, v5 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v5, 24 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, v7, v5 v_mov_b32_e32 v5, v10 v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo v_mov_b32_e32 v6, v11 global_store_b64 v[7:8], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_170 ; %bb.168: ; %.preheader.i.i.i10.preheader s_mov_b32 s0, 0 .LBB0_169: ; %.preheader.i.i.i10 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6] v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_169 .LBB0_170: ; %__ockl_printf_append_args.exit s_or_b32 exec_lo, exec_lo, s1 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v2 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v2 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_176 ; %bb.171: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_175 ; %bb.172: ; %.preheader3.i.i.i20.preheader s_mov_b32 s5, 0 .LBB0_173: ; %.preheader3.i.i.i20 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_173 ; %bb.174: ; %Flow270 s_or_b32 exec_lo, exec_lo, s5 .LBB0_175: ; %Flow272 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_176: ; %.loopexit4.i.i.i14 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_178 ; %bb.177: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v3 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_178: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v2, v8 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v0, 0xffffff1d, v0, 34 v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo v_mov_b32_e32 v2, s15 v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v9, s19 v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v8, s18 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_186 ; %bb.179: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v6, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_182 ; %bb.180: ; %.preheader1.i.i.i18.preheader s_mov_b32 s10, 0 .LBB0_181: ; %.preheader1.i.i.i18 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_181 .LBB0_182: ; %Flow268 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_184 ; %bb.183: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_184: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_186 ; %bb.185: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_186: ; %Flow269 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_187: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_189 ; %bb.188: ; in Loop: Header=BB0_187 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_189: ; in Loop: Header=BB0_187 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_191 ; %bb.190: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_192 .LBB0_191: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, -1 .LBB0_192: ; %Flow263 ; in Loop: Header=BB0_187 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_187 ; %bb.193: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_197 ; %bb.194: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_197 ; %bb.195: ; %.preheader.i.i.i17.preheader s_mov_b32 s0, 0 .LBB0_196: ; %.preheader.i.i.i17 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_196 .LBB0_197: ; %__ockl_printf_append_args.exit21 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z5hellov .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 256 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 33 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z5hellov, .Lfunc_end0-_Z5hellov ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 8016 ; NumSgprs: 22 ; NumVgprs: 33 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 33 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "Hello world! I'm thread %d in block %d\n" .size .str, 40 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: hidden_block_count_x - .offset: 4 .size: 4 .value_kind: hidden_block_count_y - .offset: 8 .size: 4 .value_kind: hidden_block_count_z - .offset: 12 .size: 2 .value_kind: hidden_group_size_x - .offset: 14 .size: 2 .value_kind: hidden_group_size_y - .offset: 16 .size: 2 .value_kind: hidden_group_size_z - .offset: 18 .size: 2 .value_kind: hidden_remainder_x - .offset: 20 .size: 2 .value_kind: hidden_remainder_y - .offset: 22 .size: 2 .value_kind: hidden_remainder_z - .offset: 40 .size: 8 .value_kind: hidden_global_offset_x - .offset: 48 .size: 8 .value_kind: hidden_global_offset_y - .offset: 56 .size: 8 .value_kind: hidden_global_offset_z - .offset: 64 .size: 2 .value_kind: hidden_grid_dims - .offset: 80 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 256 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z5hellov .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z5hellov.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 33 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
e0a533ed6fdc57fbfd76a291ed3838860b4cf9af
#include "includes.h" __global__ void add( double *a, double *b, double *c, int n ) { int tid = threadIdx.x + blockIdx.x * blockDim.x; // handle the data at this index while (tid < n) { c[tid] = a[tid] + b[tid]; tid += blockDim.x * gridDim.x; } //printf("Value of *ip variable: %f\n", a[tid] ); }
.file "tmpxft_0027872a_00000000-6_add.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z27__device_stub__Z3addPdS_S_iPdS_S_i .type _Z27__device_stub__Z3addPdS_S_iPdS_S_i, @function _Z27__device_stub__Z3addPdS_S_iPdS_S_i: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z3addPdS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z27__device_stub__Z3addPdS_S_iPdS_S_i, .-_Z27__device_stub__Z3addPdS_S_iPdS_S_i .globl _Z3addPdS_S_i .type _Z3addPdS_S_i, @function _Z3addPdS_S_i: .LFB2033: .cfi_startproc endbr64 jmp _Z27__device_stub__Z3addPdS_S_iPdS_S_i .cfi_endproc .LFE2033: .size _Z3addPdS_S_i, .-_Z3addPdS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z3addPdS_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z3addPdS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z3addPdS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0070*/ MOV R9, 0x8 ; /* 0x0000000800097802 */ /* 0x001fca0000000f00 */ /*0080*/ IMAD.WIDE R2, R0, R9, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fc800078e0209 */ /*0090*/ IMAD.WIDE R4, R0.reuse, R9.reuse, c[0x0][0x168] ; /* 0x00005a0000047625 */ /* 0x0c0fe400078e0209 */ /*00a0*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1b00 */ /*00b0*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea2000c1e1b00 */ /*00c0*/ IMAD.WIDE R8, R0, R9, c[0x0][0x170] ; /* 0x00005c0000087625 */ /* 0x000fe200078e0209 */ /*00d0*/ MOV R11, c[0x0][0x0] ; /* 0x00000000000b7a02 */ /* 0x000fca0000000f00 */ /*00e0*/ IMAD R0, R11, c[0x0][0xc], R0 ; /* 0x000003000b007a24 */ /* 0x000fca00078e0200 */ /*00f0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */ /* 0x000fe20003f06270 */ /*0100*/ DADD R6, R4, R2 ; /* 0x0000000004067229 */ /* 0x004e0e0000000002 */ /*0110*/ STG.E.64 [R8.64], R6 ; /* 0x0000000608007986 */ /* 0x0011ea000c101b04 */ /*0120*/ @!P0 BRA 0x70 ; /* 0xffffff4000008947 */ /* 0x000fea000383ffff */ /*0130*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0140*/ BRA 0x140; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void add( double *a, double *b, double *c, int n ) { int tid = threadIdx.x + blockIdx.x * blockDim.x; // handle the data at this index while (tid < n) { c[tid] = a[tid] + b[tid]; tid += blockDim.x * gridDim.x; } //printf("Value of *ip variable: %f\n", a[tid] ); }
.text .file "add.hip" .globl _Z18__device_stub__addPdS_S_i # -- Begin function _Z18__device_stub__addPdS_S_i .type _Z18__device_stub__addPdS_S_i,@function _Z18__device_stub__addPdS_S_i: # @_Z18__device_stub__addPdS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z3addPdS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z18__device_stub__addPdS_S_i, .Lfunc_end0-_Z18__device_stub__addPdS_S_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z3addPdS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z3addPdS_S_i,@object # @_Z3addPdS_S_i .section .rodata,"a",@progbits .globl _Z3addPdS_S_i .p2align 3, 0x0 _Z3addPdS_S_i: .quad _Z18__device_stub__addPdS_S_i .size _Z3addPdS_S_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z3addPdS_S_i" .size .L__unnamed_1, 14 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z18__device_stub__addPdS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z3addPdS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z3addPdS_S_i ; -- Begin function _Z3addPdS_S_i .globl _Z3addPdS_S_i .p2align 8 .type _Z3addPdS_S_i,@function _Z3addPdS_S_i: ; @_Z3addPdS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x2c s_load_b32 s8, s[0:1], 0x18 s_add_u32 s2, s0, 32 s_addc_u32 s3, s1, 0 s_waitcnt lgkmcnt(0) s_and_b32 s9, s4, 0xffff s_mov_b32 s4, exec_lo v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1] s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_i32_e64 s8, v1 s_cbranch_execz .LBB0_3 ; %bb.1: ; %.lr.ph s_load_b32 s10, s[2:3], 0x0 s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[2:3], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_mul_i32 s1, s10, s9 s_mov_b32 s9, 0 .LBB0_2: ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[2:3], 3, v[1:2] v_add_nc_u32_e32 v1, s1, v1 v_add_co_u32 v4, vcc_lo, s4, v2 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo v_add_co_u32 v6, vcc_lo, s6, v2 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo v_cmp_le_i32_e32 vcc_lo, s8, v1 global_load_b64 v[4:5], v[4:5], off global_load_b64 v[6:7], v[6:7], off v_add_co_u32 v2, s0, s2, v2 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v3, s0, s3, v3, s0 s_or_b32 s9, vcc_lo, s9 s_waitcnt vmcnt(0) v_add_f64 v[4:5], v[4:5], v[6:7] global_store_b64 v[2:3], v[4:5], off s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_2 .LBB0_3: ; %._crit_edge s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z3addPdS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 8 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z3addPdS_S_i, .Lfunc_end0-_Z3addPdS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 240 ; NumSgprs: 18 ; NumVgprs: 8 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 8 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z3addPdS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z3addPdS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 8 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
bd39bad5899222d8ec16bb2270456b3ef642e277
#include <stdio.h> #define BLOCK_SIZE 256 #define NUM_ELEMENTS (4096*100) // CUDA API error checking macro #define cudaCheck(error) \ if (error != cudaSuccess) { \ printf("Fatal error: %s at %s:%d\n", \ cudaGetErrorString(error), \ __FILE__, __LINE__); \ exit(1); \ } __global__ void reverse_1d(int *in, int *out) { __shared__ int temp[BLOCK_SIZE]; int gindex = threadIdx.x + (blockIdx.x * blockDim.x); int lindex = threadIdx.x; temp[BLOCK_SIZE - lindex - 1] = in[gindex]; __syncthreads(); out[BLOCK_SIZE * (gridDim.x - 1 - blockIdx.x) + threadIdx.x] = temp[lindex]; } __global__ void reverse_1Drection(int *in, int *out) { int gindex = threadIdx.x + (blockIdx.x * blockDim.x); out[NUM_ELEMENTS - gindex - 1] = in[gindex]; } int main() { unsigned int i; int h_in[NUM_ELEMENTS], h_out[NUM_ELEMENTS]; int *d_in, *d_out; // Initialize host data for( i = 0; i < (NUM_ELEMENTS); ++i ) h_in[i] = i; // Allocate space on the device cudaCheck( cudaMalloc( &d_in, (NUM_ELEMENTS) * sizeof(int)) ); cudaCheck( cudaMalloc( &d_out, NUM_ELEMENTS * sizeof(int)) ); // Copy input data to device cudaCheck( cudaMemcpy( d_in, h_in, (NUM_ELEMENTS) * sizeof(int), cudaMemcpyHostToDevice) ); /*cuda timing*/ cudaEvent_t start, stop; float time; cudaEventCreate(&start); cudaEventCreate(&stop); cudaEventRecord(start, 0); /* end start timing */ reverse_1d<<< (NUM_ELEMENTS + BLOCK_SIZE - 1)/BLOCK_SIZE, BLOCK_SIZE >>> (d_in, d_out); /*cuda timing stop*/ cudaEventRecord(stop, 0); cudaEventSynchronize(stop); cudaEventElapsedTime(&time, start, stop); cudaEventDestroy(start); cudaEventDestroy(stop); cudaCheck( cudaMemcpy( h_out, d_out, NUM_ELEMENTS * sizeof(int), cudaMemcpyDeviceToHost) ); // Verify every out value is 7 for( i = 0; i < NUM_ELEMENTS; ++i ) if (h_out[i] != h_in[NUM_ELEMENTS-i-1]) { printf("Element h_out[%d] == %d ERROR\n", i, h_out[i]); break; } if (i == NUM_ELEMENTS) printf("[SHARED] SUCCESS! %f\n", time); // Free out memory cudaFree(d_out); cudaCheck( cudaMalloc( &d_out, NUM_ELEMENTS * sizeof(int)) ); /*cuda timing*/ cudaEvent_t start1, stop1; cudaEventCreate(&start1); cudaEventCreate(&stop1); cudaEventRecord(start1, 0); /* end start timing */ reverse_1Drection<<< (NUM_ELEMENTS + BLOCK_SIZE - 1)/BLOCK_SIZE, BLOCK_SIZE >>> (d_in, d_out); /*cuda timing stop*/ cudaEventRecord(stop1, 0); cudaEventSynchronize(stop1); cudaEventElapsedTime(&time, start1, stop1); cudaEventDestroy(start1); cudaEventDestroy(stop1); cudaCheck( cudaMemcpy( h_out, d_out, NUM_ELEMENTS * sizeof(int), cudaMemcpyDeviceToHost) ); // Verify every out value is 7 for( i = 0; i < NUM_ELEMENTS; ++i ) if (h_out[i] != h_in[NUM_ELEMENTS-i-1]) { printf("Element h_out[%d] == %d ERROR\n", i, h_out[i]); break; } if (i == NUM_ELEMENTS) printf("[PRIVATE] SUCCESS! %f\n", time); // Free out memory cudaFree(d_in); cudaFree(d_out); return 0; }
.file "tmpxft_0026341d_00000000-6_tp4_corrige.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z32__device_stub__Z10reverse_1dPiS_PiS_ .type _Z32__device_stub__Z10reverse_1dPiS_PiS_, @function _Z32__device_stub__Z10reverse_1dPiS_PiS_: .LFB2052: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z10reverse_1dPiS_(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L2: movq 104(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z32__device_stub__Z10reverse_1dPiS_PiS_, .-_Z32__device_stub__Z10reverse_1dPiS_PiS_ .globl _Z10reverse_1dPiS_ .type _Z10reverse_1dPiS_, @function _Z10reverse_1dPiS_: .LFB2053: .cfi_startproc endbr64 jmp _Z32__device_stub__Z10reverse_1dPiS_PiS_ .cfi_endproc .LFE2053: .size _Z10reverse_1dPiS_, .-_Z10reverse_1dPiS_ .globl _Z39__device_stub__Z17reverse_1DrectionPiS_PiS_ .type _Z39__device_stub__Z17reverse_1DrectionPiS_PiS_, @function _Z39__device_stub__Z17reverse_1DrectionPiS_PiS_: .LFB2054: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L8 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z17reverse_1DrectionPiS_(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L8: movq 104(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2054: .size _Z39__device_stub__Z17reverse_1DrectionPiS_PiS_, .-_Z39__device_stub__Z17reverse_1DrectionPiS_PiS_ .globl _Z17reverse_1DrectionPiS_ .type _Z17reverse_1DrectionPiS_, @function _Z17reverse_1DrectionPiS_: .LFB2055: .cfi_startproc endbr64 jmp _Z39__device_stub__Z17reverse_1DrectionPiS_PiS_ .cfi_endproc .LFE2055: .size _Z17reverse_1DrectionPiS_, .-_Z17reverse_1DrectionPiS_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "/home/ubuntu/Datasets/stackv2/train-structured/zhoupeikun/Parallel-Programming/master/TP4/tp4_corrige.cu" .LC1: .string "Fatal error: %s at %s:%d\n" .LC2: .string "Element h_out[%d] == %d ERROR\n" .LC3: .string "[SHARED] SUCCESS! %f\n" .LC4: .string "[PRIVATE] SUCCESS! %f\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 leaq -3276800(%rsp), %r11 .cfi_def_cfa 11, 3276840 .LPSRL0: subq $4096, %rsp orq $0, (%rsp) cmpq %r11, %rsp jne .LPSRL0 .cfi_def_cfa_register 7 subq $104, %rsp .cfi_def_cfa_offset 3276944 movq %fs:40, %rax movq %rax, 3276888(%rsp) xorl %eax, %eax leaq 88(%rsp), %rbx .L14: movl %eax, (%rbx,%rax,4) incq %rax cmpq $409600, %rax jne .L14 leaq 16(%rsp), %rbp movl $1638400, %esi movq %rbp, %rdi call cudaMalloc@PLT testl %eax, %eax je .L15 movl $1638400, %esi movq %rbp, %rdi call cudaMalloc@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $46, %r8d movq %rax, %rdx jmp .L36 .L15: leaq 24(%rsp), %r12 movl $1638400, %esi movq %r12, %rdi call cudaMalloc@PLT testl %eax, %eax je .L16 movl $1638400, %esi movq %r12, %rdi call cudaMalloc@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $47, %r8d movq %rax, %rdx .L36: movl $2, %edi leaq .LC0(%rip), %rcx leaq .LC1(%rip), %rsi xorl %eax, %eax call __printf_chk@PLT movl $1, %edi call exit@PLT .L16: movq 16(%rsp), %rdi movl $1, %ecx movl $1638400, %edx movq %rbx, %rsi call cudaMemcpy@PLT testl %eax, %eax je .L17 movq 16(%rsp), %rdi movl $1638400, %edx movl $1, %ecx movq %rbx, %rsi call cudaMemcpy@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $50, %r8d movq %rax, %rdx jmp .L36 .L17: leaq 32(%rsp), %rdi call cudaEventCreate@PLT leaq 40(%rsp), %rdi call cudaEventCreate@PLT movq 32(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movl $16777217, %edx xorl %r9d, %r9d xorl %r8d, %r8d movl $67108889, %edi salq $8, %rdx movl $1, %ecx movl $1, %esi salq $6, %rdi movq %rdx, 76(%rsp) movl $1, 84(%rsp) movq %rdi, 64(%rsp) movl $1, 72(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L18 movq 24(%rsp), %rsi movq 16(%rsp), %rdi call _Z32__device_stub__Z10reverse_1dPiS_PiS_ .L18: movq 40(%rsp), %rdi xorl %esi, %esi leaq 12(%rsp), %r13 leaq 1638488(%rsp), %rbp call cudaEventRecord@PLT movq 40(%rsp), %rdi call cudaEventSynchronize@PLT movq 40(%rsp), %rdx movq 32(%rsp), %rsi movq %r13, %rdi call cudaEventElapsedTime@PLT movq 32(%rsp), %rdi call cudaEventDestroy@PLT movq 40(%rsp), %rdi call cudaEventDestroy@PLT movq 24(%rsp), %rsi movl $2, %ecx movq %rbp, %rdi movl $1638400, %edx call cudaMemcpy@PLT testl %eax, %eax je .L19 movq 24(%rsp), %rsi movl $1638400, %edx movl $2, %ecx movq %rbp, %rdi call cudaMemcpy@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $68, %r8d movq %rax, %rdx jmp .L36 .L19: movq %rbx, %rax xorl %edx, %edx .L22: movl 0(%rbp,%rdx,4), %ecx cmpl 1638396(%rax), %ecx je .L20 leaq .LC2(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L21 .L20: incq %rdx subq $4, %rax cmpq $409600, %rdx jne .L22 leaq .LC3(%rip), %rsi movl $2, %edi movb $1, %al cvtss2sd 12(%rsp), %xmm0 call __printf_chk@PLT .L21: movq 24(%rsp), %rdi call cudaFree@PLT movl $1638400, %esi movq %r12, %rdi call cudaMalloc@PLT testl %eax, %eax je .L23 movl $1638400, %esi movq %r12, %rdi call cudaMalloc@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $84, %r8d movq %rax, %rdx jmp .L36 .L23: leaq 48(%rsp), %rdi call cudaEventCreate@PLT leaq 56(%rsp), %rdi call cudaEventCreate@PLT movq 48(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movl $16777217, %edx xorl %r9d, %r9d xorl %r8d, %r8d movl $67108889, %edi salq $8, %rdx movl $1, %ecx movl $1, %esi salq $6, %rdi movq %rdx, 76(%rsp) movl $1, 84(%rsp) movq %rdi, 64(%rsp) movl $1, 72(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L24 movq 24(%rsp), %rsi movq 16(%rsp), %rdi call _Z39__device_stub__Z17reverse_1DrectionPiS_PiS_ .L24: movq 56(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movq 56(%rsp), %rdi call cudaEventSynchronize@PLT movq 56(%rsp), %rdx movq 48(%rsp), %rsi movq %r13, %rdi call cudaEventElapsedTime@PLT movq 48(%rsp), %rdi call cudaEventDestroy@PLT movq 56(%rsp), %rdi call cudaEventDestroy@PLT movq 24(%rsp), %rsi movl $1638400, %edx movq %rbp, %rdi movl $2, %ecx call cudaMemcpy@PLT xorl %edx, %edx testl %eax, %eax je .L25 movq 24(%rsp), %rsi movl $1638400, %edx movl $2, %ecx movq %rbp, %rdi call cudaMemcpy@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $101, %r8d movq %rax, %rdx jmp .L36 .L25: movl 0(%rbp,%rdx,4), %ecx cmpl 1638396(%rbx), %ecx je .L26 leaq .LC2(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L27 .L26: incq %rdx subq $4, %rbx cmpq $409600, %rdx jne .L25 leaq .LC4(%rip), %rsi movl $2, %edi movb $1, %al cvtss2sd 12(%rsp), %xmm0 call __printf_chk@PLT .L27: movq 16(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call cudaFree@PLT movq 3276888(%rsp), %rax subq %fs:40, %rax je .L28 call __stack_chk_fail@PLT .L28: addq $3276904, %rsp .cfi_def_cfa_offset 40 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC5: .string "_Z17reverse_1DrectionPiS_" .LC6: .string "_Z10reverse_1dPiS_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2057: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC5(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z17reverse_1DrectionPiS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC6(%rip), %rdx orl $-1, %r8d leaq _Z10reverse_1dPiS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2057: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z17reverse_1DrectionPiS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0020*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0050*/ IMAD R0, R3, c[0x0][0x0], R0 ; /* 0x0000000003007a24 */ /* 0x001fc800078e0200 */ /*0060*/ IMAD.WIDE R2, R0, R5, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fcc00078e0205 */ /*0070*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*0080*/ IADD3 R4, -R0, 0x63fff, RZ ; /* 0x00063fff00047810 */ /* 0x000fca0007ffe1ff */ /*0090*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */ /* 0x000fca00078e0205 */ /*00a0*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x004fe2000c101904 */ /*00b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z10reverse_1dPiS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */ /* 0x000e220000002100 */ /*0020*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e240000002500 */ /*0050*/ IMAD R2, R0, c[0x0][0x0], R11 ; /* 0x0000000000027a24 */ /* 0x001fc800078e020b */ /*0060*/ IMAD.WIDE R2, R2, R5, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fcc00078e0205 */ /*0070*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e1900 */ /*0080*/ IADD3 R7, -R11, 0xff, RZ ; /* 0x000000ff0b077810 */ /* 0x000fe40007ffe1ff */ /*0090*/ LOP3.LUT R0, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff007212 */ /* 0x000fc800078e33ff */ /*00a0*/ IADD3 R0, R0, c[0x0][0xc], RZ ; /* 0x0000030000007a10 */ /* 0x000fc80007ffe0ff */ /*00b0*/ LEA R0, R0, R11, 0x8 ; /* 0x0000000b00007211 */ /* 0x000fca00078e40ff */ /*00c0*/ IMAD.WIDE.U32 R4, R0, R5, c[0x0][0x168] ; /* 0x00005a0000047625 */ /* 0x000fe200078e0005 */ /*00d0*/ STS [R7.X4], R2 ; /* 0x0000000207007388 */ /* 0x004fe80000004800 */ /*00e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*00f0*/ LDS R9, [R11.X4] ; /* 0x000000000b097984 */ /* 0x000e280000004800 */ /*0100*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */ /* 0x001fe2000c101904 */ /*0110*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0120*/ BRA 0x120; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> #define BLOCK_SIZE 256 #define NUM_ELEMENTS (4096*100) // CUDA API error checking macro #define cudaCheck(error) \ if (error != hipSuccess) { \ printf("Fatal error: %s at %s:%d\n", \ hipGetErrorString(error), \ __FILE__, __LINE__); \ exit(1); \ } __global__ void reverse_1d(int *in, int *out) { __shared__ int temp[BLOCK_SIZE]; int gindex = threadIdx.x + (blockIdx.x * blockDim.x); int lindex = threadIdx.x; temp[BLOCK_SIZE - lindex - 1] = in[gindex]; __syncthreads(); out[BLOCK_SIZE * (gridDim.x - 1 - blockIdx.x) + threadIdx.x] = temp[lindex]; } __global__ void reverse_1Drection(int *in, int *out) { int gindex = threadIdx.x + (blockIdx.x * blockDim.x); out[NUM_ELEMENTS - gindex - 1] = in[gindex]; } int main() { unsigned int i; int h_in[NUM_ELEMENTS], h_out[NUM_ELEMENTS]; int *d_in, *d_out; // Initialize host data for( i = 0; i < (NUM_ELEMENTS); ++i ) h_in[i] = i; // Allocate space on the device cudaCheck( hipMalloc( &d_in, (NUM_ELEMENTS) * sizeof(int)) ); cudaCheck( hipMalloc( &d_out, NUM_ELEMENTS * sizeof(int)) ); // Copy input data to device cudaCheck( hipMemcpy( d_in, h_in, (NUM_ELEMENTS) * sizeof(int), hipMemcpyHostToDevice) ); /*cuda timing*/ hipEvent_t start, stop; float time; hipEventCreate(&start); hipEventCreate(&stop); hipEventRecord(start, 0); /* end start timing */ reverse_1d<<< (NUM_ELEMENTS + BLOCK_SIZE - 1)/BLOCK_SIZE, BLOCK_SIZE >>> (d_in, d_out); /*cuda timing stop*/ hipEventRecord(stop, 0); hipEventSynchronize(stop); hipEventElapsedTime(&time, start, stop); hipEventDestroy(start); hipEventDestroy(stop); cudaCheck( hipMemcpy( h_out, d_out, NUM_ELEMENTS * sizeof(int), hipMemcpyDeviceToHost) ); // Verify every out value is 7 for( i = 0; i < NUM_ELEMENTS; ++i ) if (h_out[i] != h_in[NUM_ELEMENTS-i-1]) { printf("Element h_out[%d] == %d ERROR\n", i, h_out[i]); break; } if (i == NUM_ELEMENTS) printf("[SHARED] SUCCESS! %f\n", time); // Free out memory hipFree(d_out); cudaCheck( hipMalloc( &d_out, NUM_ELEMENTS * sizeof(int)) ); /*cuda timing*/ hipEvent_t start1, stop1; hipEventCreate(&start1); hipEventCreate(&stop1); hipEventRecord(start1, 0); /* end start timing */ reverse_1Drection<<< (NUM_ELEMENTS + BLOCK_SIZE - 1)/BLOCK_SIZE, BLOCK_SIZE >>> (d_in, d_out); /*cuda timing stop*/ hipEventRecord(stop1, 0); hipEventSynchronize(stop1); hipEventElapsedTime(&time, start1, stop1); hipEventDestroy(start1); hipEventDestroy(stop1); cudaCheck( hipMemcpy( h_out, d_out, NUM_ELEMENTS * sizeof(int), hipMemcpyDeviceToHost) ); // Verify every out value is 7 for( i = 0; i < NUM_ELEMENTS; ++i ) if (h_out[i] != h_in[NUM_ELEMENTS-i-1]) { printf("Element h_out[%d] == %d ERROR\n", i, h_out[i]); break; } if (i == NUM_ELEMENTS) printf("[PRIVATE] SUCCESS! %f\n", time); // Free out memory hipFree(d_in); hipFree(d_out); return 0; }
.text .file "tp4_corrige.hip" .globl _Z25__device_stub__reverse_1dPiS_ # -- Begin function _Z25__device_stub__reverse_1dPiS_ .type _Z25__device_stub__reverse_1dPiS_,@function _Z25__device_stub__reverse_1dPiS_: # @_Z25__device_stub__reverse_1dPiS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10reverse_1dPiS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z25__device_stub__reverse_1dPiS_, .Lfunc_end0-_Z25__device_stub__reverse_1dPiS_ .cfi_endproc # -- End function .globl _Z32__device_stub__reverse_1DrectionPiS_ # -- Begin function _Z32__device_stub__reverse_1DrectionPiS_ .type _Z32__device_stub__reverse_1DrectionPiS_,@function _Z32__device_stub__reverse_1DrectionPiS_: # @_Z32__device_stub__reverse_1DrectionPiS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z17reverse_1DrectionPiS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z32__device_stub__reverse_1DrectionPiS_, .Lfunc_end1-_Z32__device_stub__reverse_1DrectionPiS_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $3276864, %rsp # imm = 0x320040 .cfi_def_cfa_offset 3276896 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 xorl %eax, %eax .LBB2_1: # =>This Inner Loop Header: Depth=1 movl %eax, 1638464(%rsp,%rax,4) incq %rax cmpq $409600, %rax # imm = 0x64000 jne .LBB2_1 # %bb.2: leaq 24(%rsp), %rdi movl $1638400, %esi # imm = 0x190000 callq hipMalloc testl %eax, %eax jne .LBB2_3 # %bb.5: leaq 8(%rsp), %rdi movl $1638400, %esi # imm = 0x190000 callq hipMalloc testl %eax, %eax jne .LBB2_6 # %bb.7: movq 24(%rsp), %rdi leaq 1638464(%rsp), %rsi movl $1638400, %edx # imm = 0x190000 movl $1, %ecx callq hipMemcpy testl %eax, %eax jne .LBB2_8 # %bb.9: movabsq $4294967552, %rbx # imm = 0x100000100 leaq 56(%rsp), %r14 movq %r14, %rdi callq hipEventCreate leaq 40(%rsp), %rdi callq hipEventCreate movq (%r14), %rdi xorl %esi, %esi callq hipEventRecord leaq 1344(%rbx), %r14 movq %r14, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_11 # %bb.10: movq 24(%rsp), %rdi movq 8(%rsp), %rsi callq _Z25__device_stub__reverse_1dPiS_ .LBB2_11: movq 40(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movq 40(%rsp), %rdi callq hipEventSynchronize movq 56(%rsp), %rsi movq 40(%rsp), %rdx leaq 20(%rsp), %rdi callq hipEventElapsedTime movq 56(%rsp), %rdi callq hipEventDestroy movq 40(%rsp), %rdi callq hipEventDestroy movq 8(%rsp), %rsi leaq 64(%rsp), %rdi movl $1638400, %edx # imm = 0x190000 movl $2, %ecx callq hipMemcpy testl %eax, %eax jne .LBB2_28 # %bb.12: # %.preheader45.preheader leaq 3276860(%rsp), %rax xorl %esi, %esi .LBB2_13: # %.preheader45 # =>This Inner Loop Header: Depth=1 movl 64(%rsp,%rsi,4), %edx cmpl (%rax), %edx jne .LBB2_14 # %bb.15: # in Loop: Header=BB2_13 Depth=1 incq %rsi addq $-4, %rax cmpq $409600, %rsi # imm = 0x64000 jne .LBB2_13 # %bb.16: cvtss2sd 20(%rsp), %xmm0 movl $.L.str.3, %edi movb $1, %al callq printf jmp .LBB2_17 .LBB2_14: # %.thread movl $.L.str.2, %edi # kill: def $esi killed $esi killed $rsi xorl %eax, %eax callq printf .LBB2_17: leaq 8(%rsp), %r15 movq (%r15), %rdi callq hipFree movl $1638400, %esi # imm = 0x190000 movq %r15, %rdi callq hipMalloc testl %eax, %eax jne .LBB2_18 # %bb.19: leaq 48(%rsp), %r15 movq %r15, %rdi callq hipEventCreate leaq 32(%rsp), %rdi callq hipEventCreate movq (%r15), %rdi xorl %esi, %esi callq hipEventRecord movq %r14, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_21 # %bb.20: movq 24(%rsp), %rdi movq 8(%rsp), %rsi callq _Z32__device_stub__reverse_1DrectionPiS_ .LBB2_21: movq 32(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movq 32(%rsp), %rdi callq hipEventSynchronize movq 48(%rsp), %rsi movq 32(%rsp), %rdx leaq 20(%rsp), %rdi callq hipEventElapsedTime movq 48(%rsp), %rdi callq hipEventDestroy movq 32(%rsp), %rdi callq hipEventDestroy movq 8(%rsp), %rsi leaq 64(%rsp), %rdi movl $1638400, %edx # imm = 0x190000 movl $2, %ecx callq hipMemcpy testl %eax, %eax jne .LBB2_29 # %bb.22: # %.preheader.preheader leaq 3276860(%rsp), %rax xorl %esi, %esi .LBB2_23: # %.preheader # =>This Inner Loop Header: Depth=1 movl 64(%rsp,%rsi,4), %edx cmpl (%rax), %edx jne .LBB2_24 # %bb.25: # in Loop: Header=BB2_23 Depth=1 incq %rsi addq $-4, %rax cmpq $409600, %rsi # imm = 0x64000 jne .LBB2_23 # %bb.26: xorps %xmm0, %xmm0 cvtss2sd 20(%rsp), %xmm0 movl $.L.str.4, %edi movb $1, %al callq printf jmp .LBB2_27 .LBB2_24: # %.thread44 movl $.L.str.2, %edi # kill: def $esi killed $esi killed $rsi xorl %eax, %eax callq printf .LBB2_27: movq 24(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree xorl %eax, %eax addq $3276864, %rsp # imm = 0x320040 .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB2_3: .cfi_def_cfa_offset 3276896 leaq 24(%rsp), %rdi callq _ZL9hipMallocIiE10hipError_tPPT_m movl %eax, %edi callq hipGetErrorString movl $.L.str, %edi movl $.L.str.1, %edx movq %rax, %rsi movl $48, %ecx jmp .LBB2_4 .LBB2_6: leaq 8(%rsp), %rdi callq _ZL9hipMallocIiE10hipError_tPPT_m movl %eax, %edi callq hipGetErrorString movl $.L.str, %edi movl $.L.str.1, %edx movq %rax, %rsi movl $49, %ecx jmp .LBB2_4 .LBB2_8: movq 24(%rsp), %rdi leaq 1638464(%rsp), %rsi movl $1638400, %edx # imm = 0x190000 movl $1, %ecx callq hipMemcpy movl %eax, %edi callq hipGetErrorString movl $.L.str, %edi movl $.L.str.1, %edx movq %rax, %rsi movl $52, %ecx jmp .LBB2_4 .LBB2_28: movq 8(%rsp), %rsi leaq 64(%rsp), %rdi movl $1638400, %edx # imm = 0x190000 movl $2, %ecx callq hipMemcpy movl %eax, %edi callq hipGetErrorString movl $.L.str, %edi movl $.L.str.1, %edx movq %rax, %rsi movl $70, %ecx jmp .LBB2_4 .LBB2_18: leaq 8(%rsp), %rdi callq _ZL9hipMallocIiE10hipError_tPPT_m movl %eax, %edi callq hipGetErrorString movl $.L.str, %edi movl $.L.str.1, %edx movq %rax, %rsi movl $86, %ecx jmp .LBB2_4 .LBB2_29: movq 8(%rsp), %rsi leaq 64(%rsp), %rdi movl $1638400, %edx # imm = 0x190000 movl $2, %ecx callq hipMemcpy movl %eax, %edi callq hipGetErrorString movl $.L.str, %edi movl $.L.str.1, %edx movq %rax, %rsi movl $103, %ecx .LBB2_4: xorl %eax, %eax callq printf movl $1, %edi callq exit .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .type _ZL9hipMallocIiE10hipError_tPPT_m,@function # -- Begin function _ZL9hipMallocIiE10hipError_tPPT_m _ZL9hipMallocIiE10hipError_tPPT_m: # @_ZL9hipMallocIiE10hipError_tPPT_m .cfi_startproc # %bb.0: movl $1638400, %esi # imm = 0x190000 jmp hipMalloc # TAILCALL .Lfunc_end3: .size _ZL9hipMallocIiE10hipError_tPPT_m, .Lfunc_end3-_ZL9hipMallocIiE10hipError_tPPT_m .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB4_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB4_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10reverse_1dPiS_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z17reverse_1DrectionPiS_, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end4: .size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB5_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB5_2: retq .Lfunc_end5: .size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor .cfi_endproc # -- End function .type _Z10reverse_1dPiS_,@object # @_Z10reverse_1dPiS_ .section .rodata,"a",@progbits .globl _Z10reverse_1dPiS_ .p2align 3, 0x0 _Z10reverse_1dPiS_: .quad _Z25__device_stub__reverse_1dPiS_ .size _Z10reverse_1dPiS_, 8 .type _Z17reverse_1DrectionPiS_,@object # @_Z17reverse_1DrectionPiS_ .globl _Z17reverse_1DrectionPiS_ .p2align 3, 0x0 _Z17reverse_1DrectionPiS_: .quad _Z32__device_stub__reverse_1DrectionPiS_ .size _Z17reverse_1DrectionPiS_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Fatal error: %s at %s:%d\n" .size .L.str, 26 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/zhoupeikun/Parallel-Programming/master/TP4/tp4_corrige.hip" .size .L.str.1, 121 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "Element h_out[%d] == %d ERROR\n" .size .L.str.2, 31 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "[SHARED] SUCCESS! %f\n" .size .L.str.3, 22 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "[PRIVATE] SUCCESS! %f\n" .size .L.str.4, 23 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z10reverse_1dPiS_" .size .L__unnamed_1, 19 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z17reverse_1DrectionPiS_" .size .L__unnamed_2, 26 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__reverse_1dPiS_ .addrsig_sym _Z32__device_stub__reverse_1DrectionPiS_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z10reverse_1dPiS_ .addrsig_sym _Z17reverse_1DrectionPiS_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10reverse_1dPiS_ ; -- Begin function _Z10reverse_1dPiS_ .globl _Z10reverse_1dPiS_ .p2align 8 .type _Z10reverse_1dPiS_,@function _Z10reverse_1dPiS_: ; @_Z10reverse_1dPiS_ ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x1c s_load_b128 s[4:7], s[0:1], 0x0 s_load_b32 s0, s[0:1], 0x10 s_not_b32 s1, s15 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_add_i32 s0, s0, s1 v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[1:2], 2, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, s4, v1 v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo global_load_b32 v1, v[1:2], off v_lshlrev_b32_e32 v2, 2, v0 v_lshl_add_u32 v0, s0, 8, v0 s_delay_alu instid0(VALU_DEP_2) v_sub_nc_u32_e32 v3, 0, v2 s_waitcnt vmcnt(0) ds_store_b32 v3, v1 offset:1020 v_mov_b32_e32 v1, 0 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv ds_load_b32 v2, v2 v_lshlrev_b64 v[0:1], 2, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo s_waitcnt lgkmcnt(0) global_store_b32 v[0:1], v2, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10reverse_1dPiS_ .amdhsa_group_segment_fixed_size 1024 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10reverse_1dPiS_, .Lfunc_end0-_Z10reverse_1dPiS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 204 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 1024 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z17reverse_1DrectionPiS_ ; -- Begin function _Z17reverse_1DrectionPiS_ .globl _Z17reverse_1DrectionPiS_ .p2align 8 .type _Z17reverse_1DrectionPiS_,@function _Z17reverse_1DrectionPiS_: ; @_Z17reverse_1DrectionPiS_ ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x1c s_load_b128 s[0:3], s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_and_b32 s4, s4, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1] v_ashrrev_i32_e32 v2, 31, v1 v_sub_nc_u32_e32 v0, 0x63fff, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[2:3], 2, v[1:2] v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v2, vcc_lo, s0, v2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo v_add_co_u32 v0, vcc_lo, s2, v0 global_load_b32 v2, v[2:3], off v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo s_waitcnt vmcnt(0) global_store_b32 v[0:1], v2, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z17reverse_1DrectionPiS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z17reverse_1DrectionPiS_, .Lfunc_end1-_Z17reverse_1DrectionPiS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 144 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 1024 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10reverse_1dPiS_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z10reverse_1dPiS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z17reverse_1DrectionPiS_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z17reverse_1DrectionPiS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
af265ca7ae8d6cc81b3cd369efe01468693313fd
/* File: vec_add.cu * Purpose: Implement vector addition on a gpu using cuda */ #include <stdio.h> #include <stdlib.h> #include <math.h> #include <iostream> #include <chrono> using namespace std; using namespace std::chrono; /* Kernel for vector addition */ __global__ void Vec_add(float x[], float y[], float z[], int n) { /* blockDim.x = threads_per_block */ /* First block gets first threads_per_block components. */ /* Second block gets next threads_per_block components, etc. */ int i = blockDim.x * blockIdx.x + threadIdx.x; /* block_count*threads_per_block may be >= n */ if (i < n) z[i] = x[i] + y[i]; } /* Vec_add */ /* Host code */ int main() { //create some vectors, run the test for each one and report the output. This will be good C++ and CUDA practice. int n, i; float *h_x, *h_y, *h_z; float *d_x, *d_y, *d_z; int threads_per_block; int block_count; size_t size; n = 10000000; // Number of elements in vector size = n*sizeof(float); // Vector size /* Allocate input vectors in host memory */ h_x = (float*) malloc(size); h_y = (float*) malloc(size); h_z = (float*) malloc(size); /* Initialize input vectors */ for (i = 0; i < n; i++) { h_x[i] = i+1; h_y[i] = n-i; } /* Allocate vectors in device memory */ // We use host pointers as a pointer to the on-device memory. cudaMalloc(&d_x, size); cudaMalloc(&d_y, size); cudaMalloc(&d_z, size); /* Copy vectors from host memory to device memory */ cudaMemcpy(d_x, h_x, size, cudaMemcpyHostToDevice); cudaMemcpy(d_y, h_y, size, cudaMemcpyHostToDevice); /* Define block size */ threads_per_block = 256; /* Define grid size. If we just computed n/threads_per_block */ /* we might get fewer threads than vector components. Using */ /* ceil(n/threads_per_block) guarantees at least one thread */ /* per vector component. The following formula is a kludge */ /* since it appears that the CUDA ceil function doesn't work */ /* correctly. */ block_count = (n + threads_per_block - 1)/threads_per_block; // just enough blocks that there is a thread per element /* Invoke kernel using block_count blocks, each of which */ /* contains threads_per_block threads */ Vec_add<<<block_count, threads_per_block>>>(d_x, d_y, d_z, n); cudaThreadSynchronize(); int numTests = 10000; high_resolution_clock::time_point t1 = high_resolution_clock::now(); for (int i =0; i<numTests; i++){ Vec_add<<<block_count, threads_per_block>>>(d_x, d_y, d_z, n); /* Wait for the kernel to complete */ } cudaThreadSynchronize(); high_resolution_clock::time_point t2 = high_resolution_clock::now(); auto duration = duration_cast<microseconds>( t2 - t1 ).count(); cout << (duration/1000) << " ms" << endl; float numSeconds = (float) duration / 1e6; long long numFlops = long(n) * long(numTests); float flopsPerSecond = (float)numFlops / numSeconds; float MflopsPerSecond = flopsPerSecond / 1e6; cout << "MFLOP/s = " << MflopsPerSecond << endl; /* Copy result from device memory to host memory */ /* h_z contains the result in host memory */ cudaMemcpy(h_z, d_z, size, cudaMemcpyDeviceToHost); float expectedSum = n + 1; printf("Testing...."); for (i = 0; i < n; i++){ if(h_z[i] != expectedSum){ printf("Failure at %i ", i); } } printf("\n"); /* Free device memory */ cudaFree(d_x); cudaFree(d_y); cudaFree(d_z); /* Free host memory */ free(h_x); free(h_y); free(h_z); return 0; } /* main */
.file "tmpxft_002dfe32_00000000-6_vecadd.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3739: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3739: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z31__device_stub__Z7Vec_addPfS_S_iPfS_S_i .type _Z31__device_stub__Z7Vec_addPfS_S_iPfS_S_i, @function _Z31__device_stub__Z7Vec_addPfS_S_iPfS_S_i: .LFB3761: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z7Vec_addPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3761: .size _Z31__device_stub__Z7Vec_addPfS_S_iPfS_S_i, .-_Z31__device_stub__Z7Vec_addPfS_S_iPfS_S_i .globl _Z7Vec_addPfS_S_i .type _Z7Vec_addPfS_S_i, @function _Z7Vec_addPfS_S_i: .LFB3762: .cfi_startproc endbr64 jmp _Z31__device_stub__Z7Vec_addPfS_S_iPfS_S_i .cfi_endproc .LFE3762: .size _Z7Vec_addPfS_S_i, .-_Z7Vec_addPfS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string " ms" .LC3: .string "MFLOP/s = " .LC4: .string "Testing...." .LC6: .string "Failure at %i " .LC7: .string "\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB3734: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl $40000000, %edi pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $88, %rsp .cfi_def_cfa_offset 144 movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax call malloc@PLT movl $40000000, %edi movq %rax, %r13 call malloc@PLT movl $40000000, %edi movq %rax, %r12 call malloc@PLT movl $10000001, %ecx movq %rax, %rbp movl $1, %eax .L9: cvtsi2ssl %eax, %xmm0 movl %ecx, %edx subl %eax, %edx movss %xmm0, -4(%r13,%rax,4) cvtsi2ssl %edx, %xmm0 movss %xmm0, -4(%r12,%rax,4) incq %rax cmpq $10000001, %rax jne .L9 leaq 24(%rsp), %rdi movl $40000000, %esi call cudaMalloc@PLT leaq 32(%rsp), %rdi movl $40000000, %esi call cudaMalloc@PLT leaq 40(%rsp), %rdi movl $40000000, %esi call cudaMalloc@PLT movq 24(%rsp), %rdi movl $1, %ecx movq %r13, %rsi movl $40000000, %edx call cudaMemcpy@PLT movq 32(%rsp), %rdi movl $1, %ecx movq %r12, %rsi movl $40000000, %edx call cudaMemcpy@PLT movl $16777217, %edx xorl %r9d, %r9d xorl %r8d, %r8d salq $8, %rdx movl $1, %ecx movabsq $4295006359, %rdi movl $1, %esi movq %rdx, 60(%rsp) movl $1, 68(%rsp) movq %rdi, 48(%rsp) movl $1, 56(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L10 movq 40(%rsp), %rdx movq 32(%rsp), %rsi movl $10000000, %ecx movq 24(%rsp), %rdi call _Z31__device_stub__Z7Vec_addPfS_S_iPfS_S_i .L10: call cudaThreadSynchronize@PLT movl $10000, %ebx movabsq $4294967552, %r15 call _ZNSt6chrono3_V212system_clock3nowEv@PLT movq %rax, %r14 .L12: xorl %r9d, %r9d xorl %r8d, %r8d movq %r15, %rdx movl $1, %ecx movabsq $4295006359, %rdi movl $1, %esi movq %r15, 60(%rsp) movl $1, 68(%rsp) movq %rdi, 48(%rsp) movl $1, 56(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L11 movq 40(%rsp), %rdx movq 32(%rsp), %rsi movl $10000000, %ecx movq 24(%rsp), %rdi call _Z31__device_stub__Z7Vec_addPfS_S_iPfS_S_i .L11: decl %ebx jne .L12 call cudaThreadSynchronize@PLT call _ZNSt6chrono3_V212system_clock3nowEv@PLT movl $1000000, %ecx subq %r14, %rax leaq _ZSt4cout(%rip), %r14 cqto movq %rax, %rbx movq %r14, %rdi idivq %rcx movq %rax, %rsi call _ZNSo9_M_insertIlEERSoT_@PLT leaq .LC0(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movq %rbx, %rax movl $1000, %ecx movq %r14, %rdi cqto leaq .LC3(%rip), %rsi xorl %ebx, %ebx movss .LC1(%rip), %xmm2 idivq %rcx movss .LC2(%rip), %xmm0 leaq .LC6(%rip), %r14 cvtsi2ssq %rax, %xmm1 divss %xmm2, %xmm1 divss %xmm1, %xmm0 divss %xmm2, %xmm0 movss %xmm0, 12(%rsp) call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movss 12(%rsp), %xmm0 movq %rax, %rdi cvtss2sd %xmm0, %xmm0 call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movq 40(%rsp), %rsi movl $2, %ecx movq %rbp, %rdi movl $40000000, %edx call cudaMemcpy@PLT leaq .LC4(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L15: movss 0(%rbp,%rbx,4), %xmm0 ucomiss .LC5(%rip), %xmm0 jp .L17 je .L13 .L17: movl %ebx, %edx movq %r14, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L13: incq %rbx cmpq $10000000, %rbx jne .L15 leaq .LC7(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq 24(%rsp), %rdi call cudaFree@PLT movq 32(%rsp), %rdi call cudaFree@PLT movq 40(%rsp), %rdi call cudaFree@PLT movq %r13, %rdi call free@PLT movq %r12, %rdi call free@PLT movq %rbp, %rdi call free@PLT movq 72(%rsp), %rax subq %fs:40, %rax je .L16 call __stack_chk_fail@PLT .L16: addq $88, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3734: .size main, .-main .section .rodata.str1.1 .LC8: .string "_Z7Vec_addPfS_S_i" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3764: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC8(%rip), %rdx movq %rax, %rdi leaq _Z7Vec_addPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3764: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC1: .long 1232348160 .align 4 .LC2: .long 1371161527 .align 4 .LC5: .long 1259902593 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7Vec_addPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */ /* 0x004fca0000000000 */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
/* File: vec_add.cu * Purpose: Implement vector addition on a gpu using cuda */ #include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #include <math.h> #include <iostream> #include <chrono> using namespace std; using namespace std::chrono; /* Kernel for vector addition */ __global__ void Vec_add(float x[], float y[], float z[], int n) { /* blockDim.x = threads_per_block */ /* First block gets first threads_per_block components. */ /* Second block gets next threads_per_block components, etc. */ int i = blockDim.x * blockIdx.x + threadIdx.x; /* block_count*threads_per_block may be >= n */ if (i < n) z[i] = x[i] + y[i]; } /* Vec_add */ /* Host code */ int main() { //create some vectors, run the test for each one and report the output. This will be good C++ and CUDA practice. int n, i; float *h_x, *h_y, *h_z; float *d_x, *d_y, *d_z; int threads_per_block; int block_count; size_t size; n = 10000000; // Number of elements in vector size = n*sizeof(float); // Vector size /* Allocate input vectors in host memory */ h_x = (float*) malloc(size); h_y = (float*) malloc(size); h_z = (float*) malloc(size); /* Initialize input vectors */ for (i = 0; i < n; i++) { h_x[i] = i+1; h_y[i] = n-i; } /* Allocate vectors in device memory */ // We use host pointers as a pointer to the on-device memory. hipMalloc(&d_x, size); hipMalloc(&d_y, size); hipMalloc(&d_z, size); /* Copy vectors from host memory to device memory */ hipMemcpy(d_x, h_x, size, hipMemcpyHostToDevice); hipMemcpy(d_y, h_y, size, hipMemcpyHostToDevice); /* Define block size */ threads_per_block = 256; /* Define grid size. If we just computed n/threads_per_block */ /* we might get fewer threads than vector components. Using */ /* ceil(n/threads_per_block) guarantees at least one thread */ /* per vector component. The following formula is a kludge */ /* since it appears that the CUDA ceil function doesn't work */ /* correctly. */ block_count = (n + threads_per_block - 1)/threads_per_block; // just enough blocks that there is a thread per element /* Invoke kernel using block_count blocks, each of which */ /* contains threads_per_block threads */ Vec_add<<<block_count, threads_per_block>>>(d_x, d_y, d_z, n); hipDeviceSynchronize(); int numTests = 10000; high_resolution_clock::time_point t1 = high_resolution_clock::now(); for (int i =0; i<numTests; i++){ Vec_add<<<block_count, threads_per_block>>>(d_x, d_y, d_z, n); /* Wait for the kernel to complete */ } hipDeviceSynchronize(); high_resolution_clock::time_point t2 = high_resolution_clock::now(); auto duration = duration_cast<microseconds>( t2 - t1 ).count(); cout << (duration/1000) << " ms" << endl; float numSeconds = (float) duration / 1e6; long long numFlops = long(n) * long(numTests); float flopsPerSecond = (float)numFlops / numSeconds; float MflopsPerSecond = flopsPerSecond / 1e6; cout << "MFLOP/s = " << MflopsPerSecond << endl; /* Copy result from device memory to host memory */ /* h_z contains the result in host memory */ hipMemcpy(h_z, d_z, size, hipMemcpyDeviceToHost); float expectedSum = n + 1; printf("Testing...."); for (i = 0; i < n; i++){ if(h_z[i] != expectedSum){ printf("Failure at %i ", i); } } printf("\n"); /* Free device memory */ hipFree(d_x); hipFree(d_y); hipFree(d_z); /* Free host memory */ free(h_x); free(h_y); free(h_z); return 0; } /* main */
.text .file "vecadd.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z22__device_stub__Vec_addPfS_S_i # -- Begin function _Z22__device_stub__Vec_addPfS_S_i .type _Z22__device_stub__Vec_addPfS_S_i,@function _Z22__device_stub__Vec_addPfS_S_i: # @_Z22__device_stub__Vec_addPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7Vec_addPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z22__device_stub__Vec_addPfS_S_i, .Lfunc_end0-_Z22__device_stub__Vec_addPfS_S_i .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function main .LCPI1_0: .long 0x49742400 # float 1.0E+6 .LCPI1_1: .long 0x51ba43b7 # float 9.99999979E+10 .LCPI1_2: .long 0x4b189681 # float 10000001 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $40, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $40000000, %edi # imm = 0x2625A00 callq malloc movq %rax, %rbx movl $40000000, %edi # imm = 0x2625A00 callq malloc movq %rax, %r14 movl $40000000, %edi # imm = 0x2625A00 callq malloc movq %rax, %r15 movl $10000000, %eax # imm = 0x989680 xorl %ecx, %ecx .LBB1_1: # =>This Inner Loop Header: Depth=1 leaq 1(%rcx), %rdx xorps %xmm0, %xmm0 cvtsi2ss %edx, %xmm0 xorps %xmm1, %xmm1 cvtsi2ss %eax, %xmm1 movss %xmm0, (%rbx,%rcx,4) movss %xmm1, (%r14,%rcx,4) movq %rdx, %rcx decq %rax jne .LBB1_1 # %bb.2: movabsq $4294967552, %r12 # imm = 0x100000100 leaq 32(%rsp), %r13 movl $40000000, %esi # imm = 0x2625A00 movq %r13, %rdi callq hipMalloc leaq 24(%rsp), %rbp movl $40000000, %esi # imm = 0x2625A00 movq %rbp, %rdi callq hipMalloc leaq 8(%rsp), %rdi movl $40000000, %esi # imm = 0x2625A00 callq hipMalloc movq (%r13), %rdi movl $40000000, %edx # imm = 0x2625A00 movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movq (%rbp), %rdi movl $40000000, %edx # imm = 0x2625A00 movq %r14, %rsi movl $1, %ecx callq hipMemcpy leaq 38807(%r12), %r13 movq %r13, %rdi movl $1, %esi movq %r12, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_4 # %bb.3: movq 32(%rsp), %rdi movq 24(%rsp), %rsi movq 8(%rsp), %rdx movl $10000000, %ecx # imm = 0x989680 callq _Z22__device_stub__Vec_addPfS_S_i .LBB1_4: callq hipDeviceSynchronize movl $10000, %ebp # imm = 0x2710 callq _ZNSt6chrono3_V212system_clock3nowEv movq %rax, 16(%rsp) # 8-byte Spill .LBB1_5: # =>This Inner Loop Header: Depth=1 movq %r13, %rdi movl $1, %esi movq %r12, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_7 # %bb.6: # in Loop: Header=BB1_5 Depth=1 movq 32(%rsp), %rdi movq 24(%rsp), %rsi movq 8(%rsp), %rdx movl $10000000, %ecx # imm = 0x989680 callq _Z22__device_stub__Vec_addPfS_S_i .LBB1_7: # in Loop: Header=BB1_5 Depth=1 decl %ebp jne .LBB1_5 # %bb.8: callq hipDeviceSynchronize callq _ZNSt6chrono3_V212system_clock3nowEv movq %rax, %rcx subq 16(%rsp), %rcx # 8-byte Folded Reload movabsq $2361183241434822607, %rdx # imm = 0x20C49BA5E353F7CF movq %rcx, %rax imulq %rdx movq %rdx, %r12 movq %rdx, %rax shrq $63, %rax sarq $7, %r12 addq %rax, %r12 movabsq $4835703278458516699, %rdx # imm = 0x431BDE82D7B634DB movq %rcx, %rax imulq %rdx movq %rdx, %rsi shrq $63, %rsi sarq $18, %rdx addq %rdx, %rsi movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIlEERSoT_ movq %rax, %r13 movl $.L.str, %esi movl $3, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq (%r13), %rax movq -24(%rax), %rdi addq %r13, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r13, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv cvtsi2ss %r12, %xmm0 movss .LCPI1_0(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero divss %xmm1, %xmm0 movss .LCPI1_1(%rip), %xmm2 # xmm2 = mem[0],zero,zero,zero divss %xmm0, %xmm2 divss %xmm1, %xmm2 movss %xmm2, 16(%rsp) # 4-byte Spill movl $_ZSt4cout, %edi movl $.L.str.1, %esi movl $10, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l xorps %xmm0, %xmm0 cvtss2sd 16(%rsp), %xmm0 # 4-byte Folded Reload movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r12 movq (%rax), %rax movq -24(%rax), %rdi addq %r12, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r12, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv movq 8(%rsp), %rsi movl $40000000, %edx # imm = 0x2625A00 movq %r15, %rdi movl $2, %ecx callq hipMemcpy movl $.L.str.2, %edi xorl %eax, %eax callq printf xorl %r12d, %r12d .LBB1_9: # =>This Inner Loop Header: Depth=1 movss (%r15,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero ucomiss .LCPI1_2(%rip), %xmm0 jne .LBB1_10 jnp .LBB1_11 .LBB1_10: # in Loop: Header=BB1_9 Depth=1 movl $.L.str.3, %edi movl %r12d, %esi xorl %eax, %eax callq printf .LBB1_11: # in Loop: Header=BB1_9 Depth=1 incq %r12 cmpq $10000000, %r12 # imm = 0x989680 jne .LBB1_9 # %bb.12: movl $10, %edi callq putchar@PLT movq 32(%rsp), %rdi callq hipFree movq 24(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree movq %rbx, %rdi callq free movq %r14, %rdi callq free movq %r15, %rdi callq free xorl %eax, %eax addq $40, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7Vec_addPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z7Vec_addPfS_S_i,@object # @_Z7Vec_addPfS_S_i .section .rodata,"a",@progbits .globl _Z7Vec_addPfS_S_i .p2align 3, 0x0 _Z7Vec_addPfS_S_i: .quad _Z22__device_stub__Vec_addPfS_S_i .size _Z7Vec_addPfS_S_i, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz " ms" .size .L.str, 4 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "MFLOP/s = " .size .L.str.1, 11 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "Testing...." .size .L.str.2, 12 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "Failure at %i " .size .L.str.3, 15 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z7Vec_addPfS_S_i" .size .L__unnamed_1, 18 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__Vec_addPfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7Vec_addPfS_S_i .addrsig_sym _ZSt4cout .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7Vec_addPfS_S_i ; -- Begin function _Z7Vec_addPfS_S_i .globl _Z7Vec_addPfS_S_i .p2align 8 .type _Z7Vec_addPfS_S_i,@function _Z7Vec_addPfS_S_i: ; @_Z7Vec_addPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7Vec_addPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7Vec_addPfS_S_i, .Lfunc_end0-_Z7Vec_addPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 180 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7Vec_addPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z7Vec_addPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
6e58ac7c6e8ad2d4474e7ae315124f9d7a71f54e
#include <iostream> #include <cstdio> using namespace std; #include <cuda_runtime.h> #define TIMES 24 ////////////////////////////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////HELP FUNCTIONS///////////////////////////////////////////////// void RandomInit(float* data, int n) { for (int i=0; i<n; i++) { data[i] = rand() / (float)RAND_MAX; } } void RandomInit(unsigned* data, int n) { for (int i=0; i<n; i++) { data[i] = rand() % n; } } #define checkCudaErrors(err) __checkCudaErrors (err, __FILE__, __LINE__) inline void __checkCudaErrors(cudaError err, const char *file, const int line ) { if(cudaSuccess != err) { fprintf(stderr, "%s(%i) : CUDA Runtime API error %d: %s.\n",file, line, (int)err, cudaGetErrorString( err ) ); exit(-1); } } // This will output the proper error string when calling cudaGetLastError #define getLastCudaError(msg) __getLastCudaError (msg, __FILE__, __LINE__) inline void __getLastCudaError(const char *errorMessage, const char *file, const int line ) { cudaError_t err = cudaGetLastError(); if (cudaSuccess != err) { fprintf(stderr, "%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\n", file, line, errorMessage, (int)err, cudaGetErrorString( err ) ); exit(-1); } } //////////////////////////////////////////////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////_VECTOR_ADDITION_/////////////////////////////////////////////////////// // Device code __global__ void irreguler(const float* A, float* C, float* F) { int i = blockDim.x * blockIdx.x + threadIdx.x; if(i == 0) { C[i] = A[i]; __syncthreads(); //high latncy C[i] = C[i] + A[i]; __syncthreads(); F[i] = C[i+1]; } } __global__ void mb2(float* A, float* C) { int i = blockDim.x * blockIdx.x + threadIdx.x; if(i == 0) { C[i] = A[i]; //write to C[i] is a miss (cache line is missing) __syncthreads(); C[i+1] = A[i]; //write to C[i+1] is a hit (cache line is found) __syncthreads(); C[i] = C[i] + A[i]; //read of C[i] is a miss (entire sector is missing, fetch it from memory) __syncthreads(); A[i] = C[i] + C[i+1]; //read C[i] and C[i+1] are hits (entire sector exists) } } __global__ void l1(float* A, float* C) { int i = blockDim.x * blockIdx.x + threadIdx.x; if(i == 0) { C[i] = A[i] + A[i+32]; __syncthreads(); C[i] = A[i] + A[i+32] + C[i]; } } // Host code void VectorAddition(int N, int threadsPerBlock) { cout<<"Vector Addition for input size "<<N<<" :\n"; // Variables float* h_A; float* h_C; float* d_A; float* d_C; float total_time=0; size_t size = N * sizeof(float); // Allocate input vectors h_A and h_B in host memory h_A = (float*)malloc(size); h_C = (float*)malloc(size); // Initialize input vectors RandomInit(h_A, N); // Allocate vectors in device memory checkCudaErrors( cudaMalloc((void**)&d_A, size) ); checkCudaErrors( cudaMalloc((void**)&d_C, size) ); // Copy vectors from host memory to device memory checkCudaErrors( cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice) ); checkCudaErrors(cudaThreadSynchronize()); // Invoke kernel cout<<"Invoke Kernel\n"; //int threads = 128; int blocksPerGrid = ((N+ threadsPerBlock-1) / threadsPerBlock); for (int i = 0; i < 1; i++) { l1<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_C); getLastCudaError("kernel launch failure"); checkCudaErrors(cudaThreadSynchronize()); } float dSeconds = total_time/((float)TIMES * 1000); float dNumOps = N; float gflops = 1.0e-9 * dNumOps/dSeconds; cout<<"Time = "<<dSeconds*1.0e3<< "msec"<<endl<<"gflops = "<<gflops<<endl; // Copy result from device memory to host memory // h_C contains the result in host memory checkCudaErrors( cudaMemcpy(h_C, d_C, size, cudaMemcpyDeviceToHost) ); // Verify result int i; for (i = 0; i < N; ++i) { float sum = h_A[i]; if (fabs(h_C[i] - sum) > 1e-5) break; } // Free device memory if (d_A) cudaFree(d_A); if (d_C) cudaFree(d_C); // Free host memory if (h_A) free(h_A); if (h_C) free(h_C); cudaDeviceReset(); if(i == N) cout<<"SUCCSESS"<<endl; else cout<<"FAILED"<<endl; } ////////////////////////////////////////////////////// int main(int argc,char *argv[]) { if(argc < 3) printf("Unsuffcient number of arguments!\n"); else { VectorAddition(atoi(argv[1]), atoi(argv[2])); } }
.file "tmpxft_00226b62_00000000-6_l2_write_policy.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3643: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3643: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z10RandomInitPfi .type _Z10RandomInitPfi, @function _Z10RandomInitPfi: .LFB3635: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movq %rdi, %r12 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movl %esi, %ebp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 xorl %ebx, %ebx .L3: cmpl %ebx, %ebp jle .L7 call rand@PLT cvtsi2ssl %eax, %xmm0 mulss .LC0(%rip), %xmm0 movss %xmm0, (%r12,%rbx,4) incq %rbx jmp .L3 .L7: popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3635: .size _Z10RandomInitPfi, .-_Z10RandomInitPfi .globl _Z10RandomInitPji .type _Z10RandomInitPji, @function _Z10RandomInitPji: .LFB3636: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movq %rdi, %r12 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 xorl %ebp, %ebp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movl %esi, %ebx .L9: cmpl %ebp, %ebx jle .L12 call rand@PLT cltd idivl %ebx movl %edx, (%r12,%rbp,4) incq %rbp jmp .L9 .L12: popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3636: .size _Z10RandomInitPji, .-_Z10RandomInitPji .section .rodata._Z17__checkCudaErrors9cudaErrorPKci.str1.1,"aMS",@progbits,1 .LC1: .string "%s(%i) : CUDA Runtime API error %d: %s.\n" .section .text._Z17__checkCudaErrors9cudaErrorPKci,"axG",@progbits,_Z17__checkCudaErrors9cudaErrorPKci,comdat .weak _Z17__checkCudaErrors9cudaErrorPKci .type _Z17__checkCudaErrors9cudaErrorPKci, @function _Z17__checkCudaErrors9cudaErrorPKci: .LFB3637: .cfi_startproc endbr64 testl %edi, %edi je .L13 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rsi, %rbx subq $16, %rsp .cfi_def_cfa_offset 32 movl %edx, 12(%rsp) movl %edi, 8(%rsp) call cudaGetErrorString@PLT movq stderr(%rip), %rdi movq %rbx, %rcx movl $2, %esi pushq %rdx .cfi_def_cfa_offset 40 leaq .LC1(%rip), %rdx pushq %rax .cfi_def_cfa_offset 48 movl 24(%rsp), %r9d xorl %eax, %eax movl 28(%rsp), %r8d call __fprintf_chk@PLT orl $-1, %edi call exit@PLT .L13: .cfi_def_cfa_offset 8 .cfi_restore 3 ret .cfi_endproc .LFE3637: .size _Z17__checkCudaErrors9cudaErrorPKci, .-_Z17__checkCudaErrors9cudaErrorPKci .text .globl _Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_ .type _Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_, @function _Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_: .LFB3665: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L18 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z9irregulerPKfPfS1_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L18: movq 120(%rsp), %rax subq %fs:40, %rax je .L20 call __stack_chk_fail@PLT .L20: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3665: .size _Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_, .-_Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_ .globl _Z9irregulerPKfPfS1_ .type _Z9irregulerPKfPfS1_, @function _Z9irregulerPKfPfS1_: .LFB3666: .cfi_startproc endbr64 jmp _Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_ .cfi_endproc .LFE3666: .size _Z9irregulerPKfPfS1_, .-_Z9irregulerPKfPfS1_ .globl _Z24__device_stub__Z3mb2PfS_PfS_ .type _Z24__device_stub__Z3mb2PfS_PfS_, @function _Z24__device_stub__Z3mb2PfS_PfS_: .LFB3667: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L23 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z3mb2PfS_(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L23: movq 104(%rsp), %rax subq %fs:40, %rax je .L25 call __stack_chk_fail@PLT .L25: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3667: .size _Z24__device_stub__Z3mb2PfS_PfS_, .-_Z24__device_stub__Z3mb2PfS_PfS_ .globl _Z3mb2PfS_ .type _Z3mb2PfS_, @function _Z3mb2PfS_: .LFB3668: .cfi_startproc endbr64 jmp _Z24__device_stub__Z3mb2PfS_PfS_ .cfi_endproc .LFE3668: .size _Z3mb2PfS_, .-_Z3mb2PfS_ .globl _Z23__device_stub__Z2l1PfS_PfS_ .type _Z23__device_stub__Z2l1PfS_PfS_, @function _Z23__device_stub__Z2l1PfS_PfS_: .LFB3669: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L28 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z2l1PfS_(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L28: movq 104(%rsp), %rax subq %fs:40, %rax je .L30 call __stack_chk_fail@PLT .L30: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3669: .size _Z23__device_stub__Z2l1PfS_PfS_, .-_Z23__device_stub__Z2l1PfS_PfS_ .globl _Z2l1PfS_ .type _Z2l1PfS_, @function _Z2l1PfS_: .LFB3670: .cfi_startproc endbr64 jmp _Z23__device_stub__Z2l1PfS_PfS_ .cfi_endproc .LFE3670: .size _Z2l1PfS_, .-_Z2l1PfS_ .section .rodata.str1.1,"aMS",@progbits,1 .LC2: .string "Vector Addition for input size " .LC3: .string " :\n" .LC4: .string "/home/ubuntu/Datasets/stackv2/train-structured/shen203/GPU_Microbenchmark/master/write_policy/l2_write_policy.cu" .LC5: .string "Invoke Kernel\n" .LC6: .string "kernel launch failure" .LC7: .string "%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\n" .LC10: .string "Time = " .LC11: .string "msec" .LC12: .string "gflops = " .LC15: .string "SUCCSESS" .LC16: .string "FAILED" .text .globl _Z14VectorAdditionii .type _Z14VectorAdditionii, @function _Z14VectorAdditionii: .LFB3639: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 leaq _ZSt4cout(%rip), %r15 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movl %esi, %r13d leaq .LC2(%rip), %rsi pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movslq %edi, %rbp movq %r15, %rdi pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movq %rbp, %rbx subq $72, %rsp .cfi_def_cfa_offset 128 movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl %ebp, %esi movq %rax, %rdi call _ZNSolsEi@PLT leaq .LC3(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT leaq 0(,%rbp,4), %rax movq %rax, %rdi movq %rax, (%rsp) call malloc@PLT movq (%rsp), %rdi movq %rax, %r12 call malloc@PLT movl %ebp, %esi movq %r12, %rdi movq %rax, %r14 call _Z10RandomInitPfi movq (%rsp), %rsi leaq 16(%rsp), %rdi call cudaMalloc@PLT movl $123, %edx leaq .LC4(%rip), %rsi movl %eax, %edi call _Z17__checkCudaErrors9cudaErrorPKci movq (%rsp), %rsi leaq 24(%rsp), %rdi call cudaMalloc@PLT movl $124, %edx leaq .LC4(%rip), %rsi movl %eax, %edi call _Z17__checkCudaErrors9cudaErrorPKci movq (%rsp), %rdx movq 16(%rsp), %rdi movq %r12, %rsi movl $1, %ecx call cudaMemcpy@PLT movl $128, %edx leaq .LC4(%rip), %rsi movl %eax, %edi call _Z17__checkCudaErrors9cudaErrorPKci call cudaThreadSynchronize@PLT movl $130, %edx leaq .LC4(%rip), %rsi movl %eax, %edi call _Z17__checkCudaErrors9cudaErrorPKci leaq .LC5(%rip), %rsi movq %r15, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT leal -1(%rbp,%r13), %eax xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rcx cltd movl %r13d, 44(%rsp) idivl %r13d movq %rcx, 36(%rsp) movl 40(%rsp), %esi movq %rcx, 48(%rsp) movl 52(%rsp), %ecx movq 44(%rsp), %rdx movl %eax, 32(%rsp) movq 32(%rsp), %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L34 movq 24(%rsp), %rsi movq 16(%rsp), %rdi call _Z23__device_stub__Z2l1PfS_PfS_ .L34: call cudaGetLastError@PLT movl %eax, %ebp testl %eax, %eax je .L35 movl %eax, %edi call cudaGetErrorString@PLT movl $139, %r8d movq stderr(%rip), %rdi leaq .LC6(%rip), %r9 pushq %rax .cfi_remember_state .cfi_def_cfa_offset 136 leaq .LC4(%rip), %rcx leaq .LC7(%rip), %rdx xorl %eax, %eax pushq %rbp .cfi_def_cfa_offset 144 movl $2, %esi call __fprintf_chk@PLT orl $-1, %edi call exit@PLT .L35: .cfi_restore_state call cudaThreadSynchronize@PLT movl $140, %edx leaq .LC4(%rip), %rsi xorl %ebp, %ebp movl %eax, %edi call _Z17__checkCudaErrors9cudaErrorPKci cvtsi2ssl %ebx, %xmm1 xorps %xmm0, %xmm0 movq %r15, %rdi leaq .LC10(%rip), %rsi cvtss2sd %xmm1, %xmm1 mulsd .LC8(%rip), %xmm1 divsd %xmm0, %xmm1 cvtsd2ss %xmm1, %xmm1 movss %xmm1, 12(%rsp) call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT xorps %xmm0, %xmm0 movq %rax, %rdi call _ZNSo9_M_insertIdEERSoT_@PLT leaq .LC11(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi movq %rax, %rdi call _ZNSolsEPFRSoS_E@PLT leaq .LC12(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movss 12(%rsp), %xmm1 movq %rax, %rdi cvtss2sd %xmm1, %xmm0 call _ZNSo9_M_insertIdEERSoT_@PLT movq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi movq %rax, %rdi call _ZNSolsEPFRSoS_E@PLT movq (%rsp), %rdx movq 24(%rsp), %rsi movq %r14, %rdi movl $2, %ecx call cudaMemcpy@PLT movl $150, %edx leaq .LC4(%rip), %rsi movl %eax, %edi call _Z17__checkCudaErrors9cudaErrorPKci movsd .LC14(%rip), %xmm2 movss .LC13(%rip), %xmm1 .L36: cmpl %ebp, %ebx jle .L41 movss (%r14,%rbp,4), %xmm0 subss (%r12,%rbp,4), %xmm0 leaq 1(%rbp), %rax andps %xmm1, %xmm0 cvtss2sd %xmm0, %xmm0 comisd %xmm2, %xmm0 jbe .L58 .L41: movq 16(%rsp), %rdi testq %rdi, %rdi je .L39 call cudaFree@PLT jmp .L39 .L58: movq %rax, %rbp jmp .L36 .L39: movq 24(%rsp), %rdi testq %rdi, %rdi je .L42 call cudaFree@PLT .L42: testq %r12, %r12 je .L43 movq %r12, %rdi call free@PLT .L43: testq %r14, %r14 je .L44 movq %r14, %rdi call free@PLT .L44: call cudaDeviceReset@PLT leaq .LC15(%rip), %rsi cmpl %ebp, %ebx je .L60 leaq .LC16(%rip), %rsi .L60: movq %r15, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi movq %rax, %rdi call _ZNSolsEPFRSoS_E@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L47 call __stack_chk_fail@PLT .L47: addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3639: .size _Z14VectorAdditionii, .-_Z14VectorAdditionii .section .rodata.str1.1 .LC17: .string "Unsuffcient number of arguments!\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB3640: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 pushq %rcx .cfi_def_cfa_offset 32 cmpl $2, %edi jg .L62 leaq .LC17(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L63 .L62: movq 16(%rsi), %rdi movq %rsi, %rbx call atoi@PLT movq 8(%rbx), %rdi movl %eax, %ebp call atoi@PLT movl %ebp, %esi movl %eax, %edi call _Z14VectorAdditionii .L63: popq %rdx .cfi_def_cfa_offset 24 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3640: .size main, .-main .section .rodata.str1.1 .LC18: .string "_Z2l1PfS_" .LC19: .string "_Z3mb2PfS_" .LC20: .string "_Z9irregulerPKfPfS1_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3672: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC18(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z2l1PfS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC19(%rip), %rdx orl $-1, %r8d leaq _Z3mb2PfS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC20(%rip), %rdx orl $-1, %r8d leaq _Z9irregulerPKfPfS1_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3672: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC0: .long 805306368 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC8: .long -400107883 .long 1041313291 .section .rodata.cst16,"aM",@progbits,16 .align 16 .LC13: .long 2147483647 .long 0 .long 0 .long 0 .section .rodata.cst8 .align 8 .LC14: .long -1998362383 .long 1055193269 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z2l1PfS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */ /* 0x000e220000002500 */ /*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e620000002100 */ /*0030*/ ULDC UR5, c[0x0][0x0] ; /* 0x0000000000057ab9 */ /* 0x000fe40000000800 */ /*0040*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */ /* 0x001fe2000f8e023f */ /*0050*/ IADD3 R0, -R0, RZ, RZ ; /* 0x000000ff00007210 */ /* 0x002fca0007ffe1ff */ /*0060*/ ISETP.NE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */ /* 0x000fda000bf05270 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */ /* 0x000fe20000000f00 */ /*0090*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */ /* 0x000fe200078e00ff */ /*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*00b0*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea8000c1e1900 */ /*00c0*/ LDG.E R7, [R2.64+0x80] ; /* 0x0000800402077981 */ /* 0x000ea2000c1e1900 */ /*00d0*/ MOV R4, c[0x0][0x168] ; /* 0x00005a0000047a02 */ /* 0x000fe20000000f00 */ /*00e0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff057624 */ /* 0x000fe200078e00ff */ /*00f0*/ FADD R7, R0, R7 ; /* 0x0000000700077221 */ /* 0x004fca0000000000 */ /*0100*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x000fe8000c101904 */ /*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0120*/ LDG.E R0, [R2.64+0x80] ; /* 0x0000800402007981 */ /* 0x000ea8000c1e1900 */ /*0130*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */ /* 0x000ea8000c1e1900 */ /*0140*/ LDG.E R11, [R4.64] ; /* 0x00000004040b7981 */ /* 0x000ee2000c1e1900 */ /*0150*/ FADD R0, R0, R9 ; /* 0x0000000900007221 */ /* 0x004fc80000000000 */ /*0160*/ FADD R11, R0, R11 ; /* 0x0000000b000b7221 */ /* 0x008fca0000000000 */ /*0170*/ STG.E [R4.64], R11 ; /* 0x0000000b04007986 */ /* 0x000fe2000c101904 */ /*0180*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0190*/ BRA 0x190; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z3mb2PfS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */ /* 0x000e220000002500 */ /*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e620000002100 */ /*0030*/ ULDC UR5, c[0x0][0x0] ; /* 0x0000000000057ab9 */ /* 0x000fe40000000800 */ /*0040*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */ /* 0x001fe2000f8e023f */ /*0050*/ IADD3 R0, -R0, RZ, RZ ; /* 0x000000ff00007210 */ /* 0x002fca0007ffe1ff */ /*0060*/ ISETP.NE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */ /* 0x000fda000bf05270 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */ /* 0x000fe20000000f00 */ /*0090*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */ /* 0x000fe200078e00ff */ /*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*00b0*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ MOV R4, c[0x0][0x168] ; /* 0x00005a0000047a02 */ /* 0x000fe20000000f00 */ /*00d0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff057624 */ /* 0x000fca00078e00ff */ /*00e0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x0041e8000c101904 */ /*00f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0100*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */ /* 0x000ea8000c1e1900 */ /*0110*/ STG.E [R4.64+0x4], R9 ; /* 0x0000040904007986 */ /* 0x004fe8000c101904 */ /*0120*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0130*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea8000c1e1900 */ /*0140*/ LDG.E R11, [R4.64] ; /* 0x00000004040b7981 */ /* 0x000ea4000c1e1900 */ /*0150*/ FADD R11, R0, R11 ; /* 0x0000000b000b7221 */ /* 0x004fca0000000000 */ /*0160*/ STG.E [R4.64], R11 ; /* 0x0000000b04007986 */ /* 0x000fe8000c101904 */ /*0170*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0180*/ LDG.E R0, [R4.64+0x4] ; /* 0x0000040404007981 */ /* 0x000ea8000c1e1900 */ /*0190*/ LDG.E R7, [R4.64] ; /* 0x0000000404077981 */ /* 0x001ea4000c1e1900 */ /*01a0*/ FADD R7, R0, R7 ; /* 0x0000000700077221 */ /* 0x004fca0000000000 */ /*01b0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x000fe2000c101904 */ /*01c0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01d0*/ BRA 0x1d0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z9irregulerPKfPfS1_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */ /* 0x000e220000002500 */ /*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e620000002100 */ /*0030*/ ULDC UR5, c[0x0][0x0] ; /* 0x0000000000057ab9 */ /* 0x000fe40000000800 */ /*0040*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */ /* 0x001fe2000f8e023f */ /*0050*/ IMAD.MOV R0, RZ, RZ, -R0 ; /* 0x000000ffff007224 */ /* 0x002fca00078e0a00 */ /*0060*/ ISETP.NE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */ /* 0x000fda000bf05270 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */ /* 0x000fe20000000f00 */ /*0090*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */ /* 0x000fe200078e00ff */ /*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*00b0*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ MOV R4, c[0x0][0x168] ; /* 0x00005a0000047a02 */ /* 0x000fe20000000f00 */ /*00d0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x16c] ; /* 0x00005b00ff057624 */ /* 0x000fca00078e00ff */ /*00e0*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */ /* 0x004fe8000c101904 */ /*00f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0100*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea8000c1e1900 */ /*0110*/ LDG.E R7, [R4.64] ; /* 0x0000000404077981 */ /* 0x000ea4000c1e1900 */ /*0120*/ FADD R11, R0, R7 ; /* 0x00000007000b7221 */ /* 0x004fca0000000000 */ /*0130*/ STG.E [R4.64], R11 ; /* 0x0000000b04007986 */ /* 0x000fe8000c101904 */ /*0140*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0150*/ LDG.E R13, [R4.64+0x4] ; /* 0x00000404040d7981 */ /* 0x000ea2000c1e1900 */ /*0160*/ MOV R6, c[0x0][0x170] ; /* 0x00005c0000067a02 */ /* 0x000fc40000000f00 */ /*0170*/ MOV R7, c[0x0][0x174] ; /* 0x00005d0000077a02 */ /* 0x000fca0000000f00 */ /*0180*/ STG.E [R6.64], R13 ; /* 0x0000000d06007986 */ /* 0x004fe2000c101904 */ /*0190*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01a0*/ BRA 0x1a0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <iostream> #include <cstdio> using namespace std; #include <hip/hip_runtime.h> #define TIMES 24 ////////////////////////////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////HELP FUNCTIONS///////////////////////////////////////////////// void RandomInit(float* data, int n) { for (int i=0; i<n; i++) { data[i] = rand() / (float)RAND_MAX; } } void RandomInit(unsigned* data, int n) { for (int i=0; i<n; i++) { data[i] = rand() % n; } } #define checkCudaErrors(err) __checkCudaErrors (err, __FILE__, __LINE__) inline void __checkCudaErrors(hipError_t err, const char *file, const int line ) { if(hipSuccess != err) { fprintf(stderr, "%s(%i) : CUDA Runtime API error %d: %s.\n",file, line, (int)err, hipGetErrorString( err ) ); exit(-1); } } // This will output the proper error string when calling cudaGetLastError #define getLastCudaError(msg) __getLastCudaError (msg, __FILE__, __LINE__) inline void __getLastCudaError(const char *errorMessage, const char *file, const int line ) { hipError_t err = hipGetLastError(); if (hipSuccess != err) { fprintf(stderr, "%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\n", file, line, errorMessage, (int)err, hipGetErrorString( err ) ); exit(-1); } } //////////////////////////////////////////////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////_VECTOR_ADDITION_/////////////////////////////////////////////////////// // Device code __global__ void irreguler(const float* A, float* C, float* F) { int i = blockDim.x * blockIdx.x + threadIdx.x; if(i == 0) { C[i] = A[i]; __syncthreads(); //high latncy C[i] = C[i] + A[i]; __syncthreads(); F[i] = C[i+1]; } } __global__ void mb2(float* A, float* C) { int i = blockDim.x * blockIdx.x + threadIdx.x; if(i == 0) { C[i] = A[i]; //write to C[i] is a miss (cache line is missing) __syncthreads(); C[i+1] = A[i]; //write to C[i+1] is a hit (cache line is found) __syncthreads(); C[i] = C[i] + A[i]; //read of C[i] is a miss (entire sector is missing, fetch it from memory) __syncthreads(); A[i] = C[i] + C[i+1]; //read C[i] and C[i+1] are hits (entire sector exists) } } __global__ void l1(float* A, float* C) { int i = blockDim.x * blockIdx.x + threadIdx.x; if(i == 0) { C[i] = A[i] + A[i+32]; __syncthreads(); C[i] = A[i] + A[i+32] + C[i]; } } // Host code void VectorAddition(int N, int threadsPerBlock) { cout<<"Vector Addition for input size "<<N<<" :\n"; // Variables float* h_A; float* h_C; float* d_A; float* d_C; float total_time=0; size_t size = N * sizeof(float); // Allocate input vectors h_A and h_B in host memory h_A = (float*)malloc(size); h_C = (float*)malloc(size); // Initialize input vectors RandomInit(h_A, N); // Allocate vectors in device memory checkCudaErrors( hipMalloc((void**)&d_A, size) ); checkCudaErrors( hipMalloc((void**)&d_C, size) ); // Copy vectors from host memory to device memory checkCudaErrors( hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice) ); checkCudaErrors(hipDeviceSynchronize()); // Invoke kernel cout<<"Invoke Kernel\n"; //int threads = 128; int blocksPerGrid = ((N+ threadsPerBlock-1) / threadsPerBlock); for (int i = 0; i < 1; i++) { l1<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_C); getLastCudaError("kernel launch failure"); checkCudaErrors(hipDeviceSynchronize()); } float dSeconds = total_time/((float)TIMES * 1000); float dNumOps = N; float gflops = 1.0e-9 * dNumOps/dSeconds; cout<<"Time = "<<dSeconds*1.0e3<< "msec"<<endl<<"gflops = "<<gflops<<endl; // Copy result from device memory to host memory // h_C contains the result in host memory checkCudaErrors( hipMemcpy(h_C, d_C, size, hipMemcpyDeviceToHost) ); // Verify result int i; for (i = 0; i < N; ++i) { float sum = h_A[i]; if (fabs(h_C[i] - sum) > 1e-5) break; } // Free device memory if (d_A) hipFree(d_A); if (d_C) hipFree(d_C); // Free host memory if (h_A) free(h_A); if (h_C) free(h_C); hipDeviceReset(); if(i == N) cout<<"SUCCSESS"<<endl; else cout<<"FAILED"<<endl; } ////////////////////////////////////////////////////// int main(int argc,char *argv[]) { if(argc < 3) printf("Unsuffcient number of arguments!\n"); else { VectorAddition(atoi(argv[1]), atoi(argv[2])); } }
.text .file "l2_write_policy.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function _Z10RandomInitPfi .LCPI0_0: .long 0x30000000 # float 4.65661287E-10 .text .globl _Z10RandomInitPfi .type _Z10RandomInitPfi,@function _Z10RandomInitPfi: # @_Z10RandomInitPfi .cfi_startproc # %bb.0: testl %esi, %esi jle .LBB0_4 # %bb.1: # %.lr.ph.preheader pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdi, %rbx movl %esi, %r14d xorl %r15d, %r15d .LBB0_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 callq rand xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 mulss .LCPI0_0(%rip), %xmm0 movss %xmm0, (%rbx,%r15,4) incq %r15 cmpq %r15, %r14 jne .LBB0_2 # %bb.3: popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 .cfi_restore %rbx .cfi_restore %r14 .cfi_restore %r15 .LBB0_4: # %._crit_edge retq .Lfunc_end0: .size _Z10RandomInitPfi, .Lfunc_end0-_Z10RandomInitPfi .cfi_endproc # -- End function .globl _Z10RandomInitPji # -- Begin function _Z10RandomInitPji .type _Z10RandomInitPji,@function _Z10RandomInitPji: # @_Z10RandomInitPji .cfi_startproc # %bb.0: testl %esi, %esi jle .LBB1_4 # %bb.1: # %.lr.ph.preheader pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl %esi, %ebx movq %rdi, %r14 movl %esi, %r15d xorl %r12d, %r12d .LBB1_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 callq rand cltd idivl %ebx movl %edx, (%r14,%r12,4) incq %r12 cmpq %r12, %r15 jne .LBB1_2 # %bb.3: addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 .cfi_restore %rbx .cfi_restore %r12 .cfi_restore %r14 .cfi_restore %r15 .LBB1_4: # %._crit_edge retq .Lfunc_end1: .size _Z10RandomInitPji, .Lfunc_end1-_Z10RandomInitPji .cfi_endproc # -- End function .globl _Z24__device_stub__irregulerPKfPfS1_ # -- Begin function _Z24__device_stub__irregulerPKfPfS1_ .type _Z24__device_stub__irregulerPKfPfS1_,@function _Z24__device_stub__irregulerPKfPfS1_: # @_Z24__device_stub__irregulerPKfPfS1_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9irregulerPKfPfS1_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z24__device_stub__irregulerPKfPfS1_, .Lfunc_end2-_Z24__device_stub__irregulerPKfPfS1_ .cfi_endproc # -- End function .globl _Z18__device_stub__mb2PfS_ # -- Begin function _Z18__device_stub__mb2PfS_ .type _Z18__device_stub__mb2PfS_,@function _Z18__device_stub__mb2PfS_: # @_Z18__device_stub__mb2PfS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z3mb2PfS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _Z18__device_stub__mb2PfS_, .Lfunc_end3-_Z18__device_stub__mb2PfS_ .cfi_endproc # -- End function .globl _Z17__device_stub__l1PfS_ # -- Begin function _Z17__device_stub__l1PfS_ .type _Z17__device_stub__l1PfS_,@function _Z17__device_stub__l1PfS_: # @_Z17__device_stub__l1PfS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z2l1PfS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size _Z17__device_stub__l1PfS_, .Lfunc_end4-_Z17__device_stub__l1PfS_ .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function _Z14VectorAdditionii .LCPI5_0: .long 0x30000000 # float 4.65661287E-10 .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 .LCPI5_1: .quad 0x3e112e0be826d695 # double 1.0000000000000001E-9 .LCPI5_3: .quad 0x3ee4f8b588e368f1 # double 1.0000000000000001E-5 .section .rodata.cst16,"aM",@progbits,16 .p2align 4, 0x0 .LCPI5_2: .long 0x7fffffff # float NaN .long 0x7fffffff # float NaN .long 0x7fffffff # float NaN .long 0x7fffffff # float NaN .text .globl _Z14VectorAdditionii .type _Z14VectorAdditionii,@function _Z14VectorAdditionii: # @_Z14VectorAdditionii .cfi_startproc # %bb.0: # %.critedge pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $56, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %esi, %r13d movl %edi, %ebx movl $_ZSt4cout, %edi movl $.L.str, %esi movl $31, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movl %ebx, %esi callq _ZNSolsEi movl $.L.str.1, %esi movl $3, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq %rbx, 40(%rsp) # 8-byte Spill movslq %ebx, %rbp leaq (,%rbp,4), %r12 movq %r12, %rdi callq malloc movq %rax, %r15 movq %r12, %rdi callq malloc movq %rax, %r14 movl %ebp, %ebx testl %ebp, %ebp jle .LBB5_3 # %bb.1: # %.lr.ph.preheader.i xorl %ebp, %ebp .LBB5_2: # %.lr.ph.i # =>This Inner Loop Header: Depth=1 callq rand xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 mulss .LCPI5_0(%rip), %xmm0 movss %xmm0, (%r15,%rbp,4) incq %rbp cmpq %rbp, %rbx jne .LBB5_2 .LBB5_3: # %_Z10RandomInitPfi.exit leaq 24(%rsp), %rdi movq %r12, %rsi callq hipMalloc testl %eax, %eax jne .LBB5_30 # %bb.4: # %_Z17__checkCudaErrors10hipError_tPKci.exit leaq 16(%rsp), %rdi movq %r12, %rsi callq hipMalloc testl %eax, %eax jne .LBB5_31 # %bb.5: # %_Z17__checkCudaErrors10hipError_tPKci.exit52 movq 24(%rsp), %rdi movq %r15, %rsi movq %r12, %rdx movl $1, %ecx callq hipMemcpy testl %eax, %eax jne .LBB5_32 # %bb.6: # %_Z17__checkCudaErrors10hipError_tPKci.exit54 callq hipDeviceSynchronize testl %eax, %eax jne .LBB5_33 # %bb.7: # %_Z17__checkCudaErrors10hipError_tPKci.exit56 movl $_ZSt4cout, %edi movl $.L.str.3, %esi movl $14, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq 40(%rsp), %rax # 8-byte Reload addl %r13d, %eax decl %eax cltd idivl %r13d # kill: def $eax killed $eax def $rax btsq $32, %rax movl %r13d, %edx btsq $32, %rdx movq %rax, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB5_9 # %bb.8: movq 24(%rsp), %rdi movq 16(%rsp), %rsi callq _Z17__device_stub__l1PfS_ .LBB5_9: callq hipGetLastError testl %eax, %eax jne .LBB5_34 # %bb.10: # %_Z18__getLastCudaErrorPKcS0_i.exit movq %r12, 48(%rsp) # 8-byte Spill callq hipDeviceSynchronize testl %eax, %eax jne .LBB5_35 # %bb.11: # %_Z17__checkCudaErrors10hipError_tPKci.exit59 movq 40(%rsp), %r12 # 8-byte Reload xorps %xmm0, %xmm0 cvtsi2ss %r12d, %xmm0 cvtss2sd %xmm0, %xmm0 mulsd .LCPI5_1(%rip), %xmm0 xorpd %xmm1, %xmm1 divsd %xmm1, %xmm0 cvtsd2ss %xmm0, %xmm0 movss %xmm0, 36(%rsp) # 4-byte Spill movl $_ZSt4cout, %edi movl $.L.str.5, %esi movl $7, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi xorps %xmm0, %xmm0 callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r13 movl $.L.str.6, %esi movl $4, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq (%r13), %rax movq -24(%rax), %rdi addq %r13, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r13, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv movq %rax, %r13 movl $.L.str.7, %esi movl $9, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l xorps %xmm0, %xmm0 cvtss2sd 36(%rsp), %xmm0 # 4-byte Folded Reload movq %r13, %rdi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r13 movq (%rax), %rax movq -24(%rax), %rdi addq %r13, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r13, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv movq 16(%rsp), %rsi movq %r14, %rdi movq 48(%rsp), %rdx # 8-byte Reload movl $2, %ecx callq hipMemcpy testl %eax, %eax jne .LBB5_36 # %bb.12: # %_Z17__checkCudaErrors10hipError_tPKci.exit61.preheader testl %r12d, %r12d movq %r12, %r13 jle .LBB5_17 # %bb.13: # %.lr.ph.preheader xorl %r12d, %r12d movaps .LCPI5_2(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN] movsd .LCPI5_3(%rip), %xmm1 # xmm1 = mem[0],zero .LBB5_14: # %.lr.ph # =>This Inner Loop Header: Depth=1 movss (%r14,%r12,4), %xmm2 # xmm2 = mem[0],zero,zero,zero subss (%r15,%r12,4), %xmm2 andps %xmm0, %xmm2 cvtss2sd %xmm2, %xmm2 ucomisd %xmm1, %xmm2 ja .LBB5_18 # %bb.15: # %_Z17__checkCudaErrors10hipError_tPKci.exit61 # in Loop: Header=BB5_14 Depth=1 incq %r12 cmpq %r12, %rbx jne .LBB5_14 # %bb.16: # %._crit_edge.loopexit movl %ebx, %r12d jmp .LBB5_18 .LBB5_17: xorl %r12d, %r12d .LBB5_18: # %._crit_edge movq 24(%rsp), %rdi testq %rdi, %rdi je .LBB5_20 # %bb.19: callq hipFree .LBB5_20: movq 16(%rsp), %rdi testq %rdi, %rdi je .LBB5_22 # %bb.21: callq hipFree .LBB5_22: testq %r15, %r15 je .LBB5_24 # %bb.23: movq %r15, %rdi callq free .LBB5_24: testq %r14, %r14 je .LBB5_26 # %bb.25: movq %r14, %rdi callq free .LBB5_26: callq hipDeviceReset movl $_ZSt4cout, %edi cmpl %r13d, %r12d jne .LBB5_28 # %bb.27: movl $.L.str.8, %esi movl $8, %edx jmp .LBB5_29 .LBB5_28: movl $.L.str.9, %esi movl $6, %edx .LBB5_29: callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq _ZSt4cout(%rip), %rax movl $_ZSt4cout, %ecx movq -24(%rax), %rdi addq %rcx, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movl $_ZSt4cout, %edi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv addq $56, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB5_30: .cfi_def_cfa_offset 112 movl %eax, %ebp movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.11, %esi movl $.L.str.2, %edx movq %rbx, %rdi movl $123, %ecx jmp .LBB5_37 .LBB5_31: movl %eax, %ebp movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.11, %esi movl $.L.str.2, %edx movq %rbx, %rdi movl $124, %ecx jmp .LBB5_37 .LBB5_32: movl %eax, %ebp movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.11, %esi movl $.L.str.2, %edx movq %rbx, %rdi movl $128, %ecx jmp .LBB5_37 .LBB5_33: movl %eax, %ebp movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.11, %esi movl $.L.str.2, %edx movq %rbx, %rdi movl $130, %ecx jmp .LBB5_37 .LBB5_34: movl %eax, %ebp movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movq %rax, (%rsp) movl $.L.str.12, %esi movl $.L.str.2, %edx movl $.L.str.4, %r8d movq %rbx, %rdi movl $139, %ecx movl %ebp, %r9d xorl %eax, %eax callq fprintf jmp .LBB5_38 .LBB5_35: movl %eax, %ebp movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.11, %esi movl $.L.str.2, %edx movq %rbx, %rdi movl $140, %ecx jmp .LBB5_37 .LBB5_36: movl %eax, %ebp movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.11, %esi movl $.L.str.2, %edx movq %rbx, %rdi movl $150, %ecx .LBB5_37: movl %ebp, %r8d movq %rax, %r9 xorl %eax, %eax callq fprintf .LBB5_38: movl $-1, %edi callq exit .Lfunc_end5: .size _Z14VectorAdditionii, .Lfunc_end5-_Z14VectorAdditionii .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %rbp, -16 cmpl $2, %edi jg .LBB6_2 # %bb.1: movl $.Lstr, %edi callq puts@PLT jmp .LBB6_3 .LBB6_2: movq %rsi, %rbx movq 8(%rsi), %rdi callq atoi movl %eax, %ebp movq 16(%rbx), %rdi callq atoi movl %ebp, %edi movl %eax, %esi callq _Z14VectorAdditionii .LBB6_3: xorl %eax, %eax addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end6: .size main, .Lfunc_end6-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB7_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB7_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9irregulerPKfPfS1_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z3mb2PfS_, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z2l1PfS_, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end7: .size __hip_module_ctor, .Lfunc_end7-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB8_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB8_2: retq .Lfunc_end8: .size __hip_module_dtor, .Lfunc_end8-__hip_module_dtor .cfi_endproc # -- End function .type _Z9irregulerPKfPfS1_,@object # @_Z9irregulerPKfPfS1_ .section .rodata,"a",@progbits .globl _Z9irregulerPKfPfS1_ .p2align 3, 0x0 _Z9irregulerPKfPfS1_: .quad _Z24__device_stub__irregulerPKfPfS1_ .size _Z9irregulerPKfPfS1_, 8 .type _Z3mb2PfS_,@object # @_Z3mb2PfS_ .globl _Z3mb2PfS_ .p2align 3, 0x0 _Z3mb2PfS_: .quad _Z18__device_stub__mb2PfS_ .size _Z3mb2PfS_, 8 .type _Z2l1PfS_,@object # @_Z2l1PfS_ .globl _Z2l1PfS_ .p2align 3, 0x0 _Z2l1PfS_: .quad _Z17__device_stub__l1PfS_ .size _Z2l1PfS_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Vector Addition for input size " .size .L.str, 32 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz " :\n" .size .L.str.1, 4 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/shen203/GPU_Microbenchmark/master/write_policy/l2_write_policy.hip" .size .L.str.2, 129 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "Invoke Kernel\n" .size .L.str.3, 15 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "kernel launch failure" .size .L.str.4, 22 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "Time = " .size .L.str.5, 8 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "msec" .size .L.str.6, 5 .type .L.str.7,@object # @.str.7 .L.str.7: .asciz "gflops = " .size .L.str.7, 10 .type .L.str.8,@object # @.str.8 .L.str.8: .asciz "SUCCSESS" .size .L.str.8, 9 .type .L.str.9,@object # @.str.9 .L.str.9: .asciz "FAILED" .size .L.str.9, 7 .type .L.str.11,@object # @.str.11 .L.str.11: .asciz "%s(%i) : CUDA Runtime API error %d: %s.\n" .size .L.str.11, 41 .type .L.str.12,@object # @.str.12 .L.str.12: .asciz "%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\n" .size .L.str.12, 56 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z9irregulerPKfPfS1_" .size .L__unnamed_1, 21 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z3mb2PfS_" .size .L__unnamed_2, 11 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "_Z2l1PfS_" .size .L__unnamed_3, 10 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "Unsuffcient number of arguments!" .size .Lstr, 33 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z24__device_stub__irregulerPKfPfS1_ .addrsig_sym _Z18__device_stub__mb2PfS_ .addrsig_sym _Z17__device_stub__l1PfS_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z9irregulerPKfPfS1_ .addrsig_sym _Z3mb2PfS_ .addrsig_sym _Z2l1PfS_ .addrsig_sym _ZSt4cout .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z9irregulerPKfPfS1_ ; -- Begin function _Z9irregulerPKfPfS1_ .globl _Z9irregulerPKfPfS1_ .p2align 8 .type _Z9irregulerPKfPfS1_,@function _Z9irregulerPKfPfS1_: ; @_Z9irregulerPKfPfS1_ ; %bb.0: s_load_b32 s2, s[0:1], 0x24 v_sub_nc_u32_e32 v0, 0, v0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) s_mul_i32 s15, s15, s2 s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e64 s15, v0 s_cbranch_execz .LBB0_2 ; %bb.1: s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_load_b32 s2, s[4:5], 0x0 s_waitcnt lgkmcnt(0) v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 global_store_b32 v0, v1, s[6:7] s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv s_clause 0x1 global_load_b32 v1, v0, s[6:7] global_load_b32 v2, v0, s[4:5] s_waitcnt vmcnt(0) v_add_f32_e32 v1, v1, v2 global_store_b32 v0, v1, s[6:7] s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv s_load_b32 s2, s[6:7], 0x4 s_waitcnt lgkmcnt(0) v_mov_b32_e32 v1, s2 global_store_b32 v0, v1, s[0:1] .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9irregulerPKfPfS1_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 3 .amdhsa_next_free_sgpr 16 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z9irregulerPKfPfS1_, .Lfunc_end0-_Z9irregulerPKfPfS1_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 204 ; NumSgprs: 16 ; NumVgprs: 3 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 1 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 16 ; NumVGPRsForWavesPerEU: 3 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z3mb2PfS_ ; -- Begin function _Z3mb2PfS_ .globl _Z3mb2PfS_ .p2align 8 .type _Z3mb2PfS_,@function _Z3mb2PfS_: ; @_Z3mb2PfS_ ; %bb.0: s_load_b32 s2, s[0:1], 0x1c v_sub_nc_u32_e32 v0, 0, v0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) s_mul_i32 s15, s15, s2 s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e64 s15, v0 s_cbranch_execz .LBB1_2 ; %bb.1: s_load_b128 s[0:3], s[0:1], 0x0 v_mov_b32_e32 v2, 0 s_waitcnt lgkmcnt(0) s_load_b32 s4, s[0:1], 0x0 s_waitcnt lgkmcnt(0) v_mov_b32_e32 v0, s4 global_store_b32 v2, v0, s[2:3] s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv global_load_b32 v0, v2, s[0:1] s_waitcnt vmcnt(0) global_store_b32 v2, v0, s[2:3] offset:4 s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv s_clause 0x1 global_load_b32 v0, v2, s[2:3] global_load_b32 v1, v2, s[0:1] s_waitcnt vmcnt(0) v_add_f32_e32 v0, v0, v1 global_store_b32 v2, v0, s[2:3] s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv global_load_b64 v[0:1], v2, s[2:3] s_waitcnt vmcnt(0) v_add_f32_e32 v0, v0, v1 global_store_b32 v2, v0, s[0:1] .LBB1_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z3mb2PfS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 3 .amdhsa_next_free_sgpr 16 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z3mb2PfS_, .Lfunc_end1-_Z3mb2PfS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 228 ; NumSgprs: 16 ; NumVgprs: 3 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 1 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 16 ; NumVGPRsForWavesPerEU: 3 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z2l1PfS_ ; -- Begin function _Z2l1PfS_ .globl _Z2l1PfS_ .p2align 8 .type _Z2l1PfS_,@function _Z2l1PfS_: ; @_Z2l1PfS_ ; %bb.0: s_load_b32 s2, s[0:1], 0x1c v_sub_nc_u32_e32 v0, 0, v0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) s_mul_i32 s15, s15, s2 s_mov_b32 s2, exec_lo v_cmpx_eq_u32_e64 s15, v0 s_cbranch_execz .LBB2_2 ; %bb.1: s_load_b128 s[0:3], s[0:1], 0x0 v_mov_b32_e32 v0, 0 s_waitcnt lgkmcnt(0) s_clause 0x1 s_load_b32 s4, s[0:1], 0x0 s_load_b32 s5, s[0:1], 0x80 s_waitcnt lgkmcnt(0) v_add_f32_e64 v1, s4, s5 global_store_b32 v0, v1, s[2:3] s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv s_clause 0x2 global_load_b32 v1, v0, s[0:1] global_load_b32 v2, v0, s[0:1] offset:128 global_load_b32 v3, v0, s[2:3] s_waitcnt vmcnt(1) v_add_f32_e32 v1, v1, v2 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_add_f32_e32 v1, v1, v3 global_store_b32 v0, v1, s[2:3] .LBB2_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z2l1PfS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end2: .size _Z2l1PfS_, .Lfunc_end2-_Z2l1PfS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 188 ; NumSgprs: 16 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 1 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 16 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9irregulerPKfPfS1_ .private_segment_fixed_size: 0 .sgpr_count: 16 .sgpr_spill_count: 0 .symbol: _Z9irregulerPKfPfS1_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 3 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z3mb2PfS_ .private_segment_fixed_size: 0 .sgpr_count: 16 .sgpr_spill_count: 0 .symbol: _Z3mb2PfS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 3 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z2l1PfS_ .private_segment_fixed_size: 0 .sgpr_count: 16 .sgpr_spill_count: 0 .symbol: _Z2l1PfS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
af77742540605847eb23d6c7d92856f3e0cd9b59
#include "includes.h" __global__ void stencil_1d(int *in, int *out) { // within a block, threads share data via shared memory ("global memory") // data is not visible to threads in other blocks // use __shared__ to declare a var/array in shared memory __shared__ int temp[BLOCK_SIZE + 2 * RADIUS]; // each thread processs one output element (blockDim.x elements per block) int gindex = threadIdx.x + (blockIdx.x * blockDim.x) + RADIUS; int lindex = threadIdx.x + RADIUS; // read input elements into shared memory temp[lindex] = in[gindex]; if (threadIdx.x < RADIUS) { temp[lindex - RADIUS] = in[gindex - RADIUS]; temp[lindex + BLOCK_SIZE] = in[gindex + BLOCK_SIZE]; } // synchronize all threads in the block : ensure all data is available __syncthreads(); // apply the stencil int result = 0; for (int offset = -RADIUS ; offset <= RADIUS ; offset++) { result += temp[lindex + offset]; } // store the result out[gindex-RADIUS] = result; }
.file "tmpxft_00283921_00000000-6_stencil_1d.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z32__device_stub__Z10stencil_1dPiS_PiS_ .type _Z32__device_stub__Z10stencil_1dPiS_PiS_, @function _Z32__device_stub__Z10stencil_1dPiS_PiS_: .LFB2032: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z10stencil_1dPiS_(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L2: movq 104(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z32__device_stub__Z10stencil_1dPiS_PiS_, .-_Z32__device_stub__Z10stencil_1dPiS_PiS_ .globl _Z10stencil_1dPiS_ .type _Z10stencil_1dPiS_, @function _Z10stencil_1dPiS_: .LFB2033: .cfi_startproc endbr64 jmp _Z32__device_stub__Z10stencil_1dPiS_PiS_ .cfi_endproc .LFE2033: .size _Z10stencil_1dPiS_, .-_Z10stencil_1dPiS_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z10stencil_1dPiS_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z10stencil_1dPiS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10stencil_1dPiS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R15, SR_TID.X ; /* 0x00000000000f7919 */ /* 0x000e220000002100 */ /*0020*/ MOV R17, 0x4 ; /* 0x0000000400117802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e620000002500 */ /*0050*/ ISETP.GE.U32.AND P0, PT, R15, 0x3, PT ; /* 0x000000030f00780c */ /* 0x001fe20003f06070 */ /*0060*/ IMAD R0, R0, c[0x0][0x0], R15 ; /* 0x0000000000007a24 */ /* 0x002fc800078e020f */ /*0070*/ IMAD.WIDE R2, R0, R17, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fca00078e0211 */ /*0080*/ LDG.E R4, [R2.64+0xc] ; /* 0x00000c0402047981 */ /* 0x0000a8000c1e1900 */ /*0090*/ @!P0 LDG.E R5, [R2.64] ; /* 0x0000000402058981 */ /* 0x0000e8000c1e1900 */ /*00a0*/ @!P0 LDG.E R6, [R2.64+0x40c] ; /* 0x00040c0402068981 */ /* 0x000124000c1e1900 */ /*00b0*/ IMAD.WIDE R2, R0, R17, c[0x0][0x168] ; /* 0x00005a0000027625 */ /* 0x001fc400078e0211 */ /*00c0*/ STS [R15.X4+0xc], R4 ; /* 0x00000c040f007388 */ /* 0x004fe80000004800 */ /*00d0*/ @!P0 STS [R15.X4], R5 ; /* 0x000000050f008388 */ /* 0x008fe80000004800 */ /*00e0*/ @!P0 STS [R15.X4+0x40c], R6 ; /* 0x00040c060f008388 */ /* 0x010fe80000004800 */ /*00f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0100*/ LDS R7, [R15.X4+0x4] ; /* 0x000004000f077984 */ /* 0x000fe80000004800 */ /*0110*/ LDS R8, [R15.X4] ; /* 0x000000000f087984 */ /* 0x000fe80000004800 */ /*0120*/ LDS R9, [R15.X4+0x8] ; /* 0x000008000f097984 */ /* 0x000e280000004800 */ /*0130*/ LDS R10, [R15.X4+0xc] ; /* 0x00000c000f0a7984 */ /* 0x000fe80000004800 */ /*0140*/ LDS R11, [R15.X4+0x10] ; /* 0x000010000f0b7984 */ /* 0x000e680000004800 */ /*0150*/ LDS R12, [R15.X4+0x14] ; /* 0x000014000f0c7984 */ /* 0x000fe80000004800 */ /*0160*/ LDS R13, [R15.X4+0x18] ; /* 0x000018000f0d7984 */ /* 0x000ea20000004800 */ /*0170*/ IADD3 R7, R9, R7, R8 ; /* 0x0000000709077210 */ /* 0x001fc80007ffe008 */ /*0180*/ IADD3 R7, R11, R10, R7 ; /* 0x0000000a0b077210 */ /* 0x002fc80007ffe007 */ /*0190*/ IADD3 R7, R13, R12, R7 ; /* 0x0000000c0d077210 */ /* 0x004fca0007ffe007 */ /*01a0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x000fe2000c101904 */ /*01b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01c0*/ BRA 0x1c0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void stencil_1d(int *in, int *out) { // within a block, threads share data via shared memory ("global memory") // data is not visible to threads in other blocks // use __shared__ to declare a var/array in shared memory __shared__ int temp[BLOCK_SIZE + 2 * RADIUS]; // each thread processs one output element (blockDim.x elements per block) int gindex = threadIdx.x + (blockIdx.x * blockDim.x) + RADIUS; int lindex = threadIdx.x + RADIUS; // read input elements into shared memory temp[lindex] = in[gindex]; if (threadIdx.x < RADIUS) { temp[lindex - RADIUS] = in[gindex - RADIUS]; temp[lindex + BLOCK_SIZE] = in[gindex + BLOCK_SIZE]; } // synchronize all threads in the block : ensure all data is available __syncthreads(); // apply the stencil int result = 0; for (int offset = -RADIUS ; offset <= RADIUS ; offset++) { result += temp[lindex + offset]; } // store the result out[gindex-RADIUS] = result; }
.text .file "stencil_1d.hip" .globl _Z25__device_stub__stencil_1dPiS_ # -- Begin function _Z25__device_stub__stencil_1dPiS_ .type _Z25__device_stub__stencil_1dPiS_,@function _Z25__device_stub__stencil_1dPiS_: # @_Z25__device_stub__stencil_1dPiS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10stencil_1dPiS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z25__device_stub__stencil_1dPiS_, .Lfunc_end0-_Z25__device_stub__stencil_1dPiS_ .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10stencil_1dPiS_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z10stencil_1dPiS_,@object # @_Z10stencil_1dPiS_ .section .rodata,"a",@progbits .globl _Z10stencil_1dPiS_ .p2align 3, 0x0 _Z10stencil_1dPiS_: .quad _Z25__device_stub__stencil_1dPiS_ .size _Z10stencil_1dPiS_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z10stencil_1dPiS_" .size .L__unnamed_1, 19 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__stencil_1dPiS_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z10stencil_1dPiS_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10stencil_1dPiS_ ; -- Begin function _Z10stencil_1dPiS_ .globl _Z10stencil_1dPiS_ .p2align 8 .type _Z10stencil_1dPiS_,@function _Z10stencil_1dPiS_: ; @_Z10stencil_1dPiS_ ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x1c s_load_b128 s[0:3], s[0:1], 0x0 v_lshlrev_b32_e32 v5, 2, v0 s_waitcnt lgkmcnt(0) s_and_b32 s4, s4, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1] v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[1:2], 2, v[1:2] v_add_co_u32 v3, vcc_lo, s0, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo s_mov_b32 s0, exec_lo global_load_b32 v6, v[3:4], off offset:12 s_waitcnt vmcnt(0) ds_store_b32 v5, v6 offset:12 v_cmpx_gt_u32_e32 3, v0 s_cbranch_execz .LBB0_2 ; %bb.1: s_clause 0x1 global_load_b32 v0, v[3:4], off global_load_b32 v3, v[3:4], off offset:1036 s_waitcnt vmcnt(1) ds_store_b32 v5, v0 s_waitcnt vmcnt(0) ds_store_b32 v5, v3 offset:1036 .LBB0_2: s_or_b32 exec_lo, exec_lo, s0 v_mov_b32_e32 v0, 0 s_movk_i32 s0, 0xffe4 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv .LBB0_3: ; =>This Inner Loop Header: Depth=1 v_add_nc_u32_e32 v3, s0, v5 s_add_i32 s0, s0, 4 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s0, 0 ds_load_b32 v3, v3 offset:28 s_waitcnt lgkmcnt(0) v_add_nc_u32_e32 v0, v3, v0 s_cbranch_scc0 .LBB0_3 ; %bb.4: v_add_co_u32 v1, vcc_lo, s2, v1 v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo global_store_b32 v[1:2], v0, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10stencil_1dPiS_ .amdhsa_group_segment_fixed_size 1048 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10stencil_1dPiS_, .Lfunc_end0-_Z10stencil_1dPiS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 252 ; NumSgprs: 18 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 1048 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 1048 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10stencil_1dPiS_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z10stencil_1dPiS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
9fb32cc74d2583e36a6f2a2277e5c640c80dee9a
#include <stdio.h> #include <stdlib.h> #include <stdbool.h> #include <limits> #include <sys/time.h> #define ARRAY_SIZE 10000 #define BLOCK_SIZE 256 #define MICROSECONDS(start, end) ((end.tv_sec - start.tv_sec) * 1000000LL + end.tv_usec - start.tv_usec) #define MILLISECONDS(start, end) MICROSECONDS(start, end) / 1000.0 #define SECONDS(start, end) MILLISECONDS(start, end) / 1000.0 void cpu_saxpy(const float *x, float *y, const float a) { for (unsigned int i = 0; i < ARRAY_SIZE; i++) { y[i] += a * x[i]; } } __global__ void gpu_saxpy(const float *x, float *y, const float a) { const unsigned int i = blockIdx.x * blockDim.x + threadIdx.x; if (i < ARRAY_SIZE) { y[i] += a * x[i]; } } double cpuSecond() { struct timeval tp; gettimeofday(&tp, NULL); return ((double)tp.tv_sec + (double)tp.tv_usec * 1.e-6); } int main(int argc, char **argv) { // Initialize data. struct timeval start, end; float *x = (float *)malloc(ARRAY_SIZE * sizeof(float)); float *y = (float *)malloc(ARRAY_SIZE * sizeof(float)); const float a = static_cast<float>(rand()) / static_cast<float>(RAND_MAX); for (unsigned int i = 0; i < ARRAY_SIZE; i++) { x[i] = static_cast<float>(rand()) / static_cast<float>(RAND_MAX); y[i] = static_cast<float>(rand()) / static_cast<float>(RAND_MAX); } // Copy data for CPU. float *cpu_x = (float *)malloc(ARRAY_SIZE * sizeof(float)); float *cpu_y = (float *)malloc(ARRAY_SIZE * sizeof(float)); memcpy(cpu_x, x, ARRAY_SIZE); memcpy(cpu_y, y, ARRAY_SIZE); // Run CPU SAXPY. printf("Computing SAXPY on the CPU... "); gettimeofday(&start, NULL); cpu_saxpy(cpu_x, cpu_y, a); gettimeofday(&end, NULL); printf("Done! Took %lfms.\n", MILLISECONDS(start, end)); // Copy data for GPU. float *gpu_x = (float *)malloc(ARRAY_SIZE * sizeof(float)); float *gpu_y = (float *)malloc(ARRAY_SIZE * sizeof(float)); memcpy(gpu_x, x, ARRAY_SIZE); memcpy(gpu_y, y, ARRAY_SIZE); float *cuda_x; float *cuda_y; cudaMalloc(&cuda_x, ARRAY_SIZE * sizeof(float)); cudaMalloc(&cuda_y, ARRAY_SIZE * sizeof(float)); cudaMemcpy(cuda_x, gpu_x, ARRAY_SIZE * sizeof(float), cudaMemcpyHostToDevice); cudaMemcpy(cuda_y, gpu_y, ARRAY_SIZE * sizeof(float), cudaMemcpyHostToDevice); // Run GPU SAXPY. printf("Computing SAXPY on the GPU... "); // Make sure that the grid size is enough to fit all elements. gettimeofday(&start, NULL); gpu_saxpy<<<(ARRAY_SIZE + BLOCK_SIZE - 1) / BLOCK_SIZE, BLOCK_SIZE>>>(cuda_x, cuda_y, a); cudaDeviceSynchronize(); gettimeofday(&end, NULL); printf("Done! Took %lfms.\n", MILLISECONDS(start, end)); cudaMemcpy(gpu_x, cuda_x, ARRAY_SIZE * sizeof(float), cudaMemcpyDeviceToHost); cudaMemcpy(gpu_y, cuda_y, ARRAY_SIZE * sizeof(float), cudaMemcpyDeviceToHost); // Compare CPU/GPU SAXPY. bool success = true; float epsilon = std::numeric_limits<float>::epsilon(); printf("Comparing the output for each implementation... "); for (unsigned int i = 0; i < 25; i++) { if (abs(cpu_y[i] - gpu_y[i]) > epsilon) { success = false; break; } } printf(success ? "Correct!\n" : "Incorrect!\n"); // Free resources. free(x); free(y); free(cpu_x); free(cpu_y); free(gpu_x); free(gpu_y); cudaFree(x); cudaFree(y); return 0; }
.file "tmpxft_0031ecb1_00000000-6_exercise_2.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2032: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2032: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z9cpu_saxpyPKfPff .type _Z9cpu_saxpyPKfPff, @function _Z9cpu_saxpyPKfPff: .LFB2027: .cfi_startproc endbr64 xorl %eax, %eax .L3: movss (%rdi,%rax), %xmm1 mulss %xmm0, %xmm1 addss (%rsi,%rax), %xmm1 movss %xmm1, (%rsi,%rax) addq $4, %rax cmpq $40000, %rax jne .L3 ret .cfi_endproc .LFE2027: .size _Z9cpu_saxpyPKfPff, .-_Z9cpu_saxpyPKfPff .globl _Z9cpuSecondv .type _Z9cpuSecondv, @function _Z9cpuSecondv: .LFB2028: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 xorl %esi, %esi movq %fs:40, %rax movq %rax, 24(%rsp) xorl %eax, %eax leaq 8(%rsp), %rdi call gettimeofday@PLT cvtsi2sdq 16(%rsp), %xmm0 mulsd .LC0(%rip), %xmm0 cvtsi2sdq 8(%rsp), %xmm1 addsd %xmm1, %xmm0 movq 24(%rsp), %rax subq %fs:40, %rax je .L7 call __stack_chk_fail@PLT .L7: addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size _Z9cpuSecondv, .-_Z9cpuSecondv .globl _Z32__device_stub__Z9gpu_saxpyPKfPffPKfPff .type _Z32__device_stub__Z9gpu_saxpyPKfPffPKfPff, @function _Z32__device_stub__Z9gpu_saxpyPKfPffPKfPff: .LFB2054: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 32(%rsp), %rdx movq %rsi, 16(%rsp) leaq 48(%rsp), %rdi leaq 60(%rsp), %rsi movss %xmm0, 12(%rsp) movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 12(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L9 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z9gpu_saxpyPKfPff(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L9: movq 120(%rsp), %rax subq %fs:40, %rax je .L11 call __stack_chk_fail@PLT .L11: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2054: .size _Z32__device_stub__Z9gpu_saxpyPKfPffPKfPff, .-_Z32__device_stub__Z9gpu_saxpyPKfPffPKfPff .globl _Z9gpu_saxpyPKfPff .type _Z9gpu_saxpyPKfPff, @function _Z9gpu_saxpyPKfPff: .LFB2055: .cfi_startproc endbr64 jmp _Z32__device_stub__Z9gpu_saxpyPKfPffPKfPff .cfi_endproc .LFE2055: .size _Z9gpu_saxpyPKfPff, .-_Z9gpu_saxpyPKfPff .section .rodata.str1.1,"aMS",@progbits,1 .LC1: .string "Correct!\n" .LC2: .string "Incorrect!\n" .LC4: .string "Computing SAXPY on the CPU... " .LC6: .string "Done! Took %lfms.\n" .LC7: .string "Computing SAXPY on the GPU... " .LC8: .string "Comparing the output for each implementation... " .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2029: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl $40000, %edi pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 xorl %r12d, %r12d pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $120, %rsp .cfi_def_cfa_offset 176 movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax call malloc@PLT movl $40000, %edi movq %rax, %rbp call malloc@PLT movq %rax, %rbx call rand@PLT cvtsi2ssl %eax, %xmm0 mulss .LC3(%rip), %xmm0 movss %xmm0, 28(%rsp) .L15: call rand@PLT cvtsi2ssl %eax, %xmm0 mulss .LC3(%rip), %xmm0 movss %xmm0, 0(%rbp,%r12) call rand@PLT cvtsi2ssl %eax, %xmm0 mulss .LC3(%rip), %xmm0 movss %xmm0, (%rbx,%r12) addq $4, %r12 cmpq $40000, %r12 jne .L15 movl $40000, %edi leaq 72(%rsp), %r15 leaq 88(%rsp), %r14 call malloc@PLT movl $40000, %edi movq %rax, 16(%rsp) call malloc@PLT movq 16(%rsp), %rdi movl $2500, %ecx movq %rbp, %rsi rep movsl movq %rax, %rdi movl $2500, %ecx movq %rbx, %rsi rep movsl movq %rax, %r13 leaq .LC4(%rip), %rsi xorl %eax, %eax movl $2, %edi call __printf_chk@PLT xorl %esi, %esi movq %r15, %rdi call gettimeofday@PLT movss 28(%rsp), %xmm0 movq 16(%rsp), %rdi movq %r13, %rsi call _Z9cpu_saxpyPKfPff xorl %esi, %esi movq %r14, %rdi call gettimeofday@PLT movq 88(%rsp), %rax subq 72(%rsp), %rax leaq .LC6(%rip), %rsi imulq $1000000, %rax, %rax addq 96(%rsp), %rax subq 80(%rsp), %rax movl $2, %edi cvtsi2sdq %rax, %xmm0 movb $1, %al divsd .LC5(%rip), %xmm0 call __printf_chk@PLT movl $40000, %edi call malloc@PLT movl $40000, %edi movq %rax, 8(%rsp) call malloc@PLT movq 8(%rsp), %rdi movl $2500, %ecx movq %rbp, %rsi rep movsl movq %rax, %rdi movl $2500, %ecx movq %rbx, %rsi rep movsl leaq 32(%rsp), %rdi movl $40000, %esi movq %rax, %r12 call cudaMalloc@PLT leaq 40(%rsp), %rdi movl $40000, %esi call cudaMalloc@PLT movq 8(%rsp), %rsi movq 32(%rsp), %rdi movl $1, %ecx movl $40000, %edx call cudaMemcpy@PLT movq 40(%rsp), %rdi movl $1, %ecx movq %r12, %rsi movl $40000, %edx call cudaMemcpy@PLT leaq .LC7(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT xorl %esi, %esi movq %r15, %rdi call gettimeofday@PLT movl $16777217, %edx xorl %r9d, %r9d xorl %r8d, %r8d movl $536870917, %edi salq $8, %rdx movl $1, %ecx movl $1, %esi salq $3, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L16 movss 28(%rsp), %xmm0 movq 40(%rsp), %rsi movq 32(%rsp), %rdi call _Z32__device_stub__Z9gpu_saxpyPKfPffPKfPff .L16: call cudaDeviceSynchronize@PLT xorl %esi, %esi movq %r14, %rdi call gettimeofday@PLT movq 88(%rsp), %rax subq 72(%rsp), %rax leaq .LC6(%rip), %rsi imulq $1000000, %rax, %rax addq 96(%rsp), %rax subq 80(%rsp), %rax movl $2, %edi cvtsi2sdq %rax, %xmm0 movb $1, %al divsd .LC5(%rip), %xmm0 call __printf_chk@PLT movq 32(%rsp), %rsi movq 8(%rsp), %rdi movl $2, %ecx movl $40000, %edx call cudaMemcpy@PLT movq 40(%rsp), %rsi movl $2, %ecx movq %r12, %rdi movl $40000, %edx call cudaMemcpy@PLT leaq .LC8(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT xorl %eax, %eax movss .LC9(%rip), %xmm1 .L18: movss 0(%r13,%rax), %xmm0 subss (%r12,%rax), %xmm0 andps %xmm1, %xmm0 comiss .LC10(%rip), %xmm0 ja .L20 addq $4, %rax cmpq $100, %rax jne .L18 leaq .LC1(%rip), %rsi jmp .L17 .L20: leaq .LC2(%rip), %rsi .L17: movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq %rbp, %rdi call free@PLT movq %rbx, %rdi call free@PLT movq 16(%rsp), %rdi call free@PLT movq %r13, %rdi call free@PLT movq 8(%rsp), %rdi call free@PLT movq %r12, %rdi call free@PLT movq %rbp, %rdi call cudaFree@PLT movq %rbx, %rdi call cudaFree@PLT movq 104(%rsp), %rax subq %fs:40, %rax je .L19 call __stack_chk_fail@PLT .L19: addq $120, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size main, .-main .section .rodata.str1.1 .LC11: .string "_Z9gpu_saxpyPKfPff" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2057: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC11(%rip), %rdx movq %rax, %rdi leaq _Z9gpu_saxpyPKfPff(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2057: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC0: .long -1598689907 .long 1051772663 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC3: .long 805306368 .section .rodata.cst8 .align 8 .LC5: .long 0 .long 1083129856 .section .rodata.cst16,"aM",@progbits,16 .align 16 .LC9: .long 2147483647 .long 0 .long 0 .long 0 .section .rodata.cst4 .align 4 .LC10: .long 872415232 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z9gpu_saxpyPKfPff .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R4, R4, c[0x0][0x0], R3 ; /* 0x0000000004047a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GT.U32.AND P0, PT, R4, 0x270f, PT ; /* 0x0000270f0400780c */ /* 0x000fda0003f04070 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE.U32 R2, R4, R5, c[0x0][0x160] ; /* 0x0000580004027625 */ /* 0x000fc800078e0005 */ /*0090*/ IMAD.WIDE.U32 R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */ /* 0x000fe400078e0005 */ /*00a0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R7, [R4.64] ; /* 0x0000000404077981 */ /* 0x000ea4000c1e1900 */ /*00c0*/ FFMA R7, R2, c[0x0][0x170], R7 ; /* 0x00005c0002077a23 */ /* 0x004fca0000000007 */ /*00d0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x000fe2000c101904 */ /*00e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #include <stdbool.h> #include <limits> #include <sys/time.h> #define ARRAY_SIZE 10000 #define BLOCK_SIZE 256 #define MICROSECONDS(start, end) ((end.tv_sec - start.tv_sec) * 1000000LL + end.tv_usec - start.tv_usec) #define MILLISECONDS(start, end) MICROSECONDS(start, end) / 1000.0 #define SECONDS(start, end) MILLISECONDS(start, end) / 1000.0 void cpu_saxpy(const float *x, float *y, const float a) { for (unsigned int i = 0; i < ARRAY_SIZE; i++) { y[i] += a * x[i]; } } __global__ void gpu_saxpy(const float *x, float *y, const float a) { const unsigned int i = blockIdx.x * blockDim.x + threadIdx.x; if (i < ARRAY_SIZE) { y[i] += a * x[i]; } } double cpuSecond() { struct timeval tp; gettimeofday(&tp, NULL); return ((double)tp.tv_sec + (double)tp.tv_usec * 1.e-6); } int main(int argc, char **argv) { // Initialize data. struct timeval start, end; float *x = (float *)malloc(ARRAY_SIZE * sizeof(float)); float *y = (float *)malloc(ARRAY_SIZE * sizeof(float)); const float a = static_cast<float>(rand()) / static_cast<float>(RAND_MAX); for (unsigned int i = 0; i < ARRAY_SIZE; i++) { x[i] = static_cast<float>(rand()) / static_cast<float>(RAND_MAX); y[i] = static_cast<float>(rand()) / static_cast<float>(RAND_MAX); } // Copy data for CPU. float *cpu_x = (float *)malloc(ARRAY_SIZE * sizeof(float)); float *cpu_y = (float *)malloc(ARRAY_SIZE * sizeof(float)); memcpy(cpu_x, x, ARRAY_SIZE); memcpy(cpu_y, y, ARRAY_SIZE); // Run CPU SAXPY. printf("Computing SAXPY on the CPU... "); gettimeofday(&start, NULL); cpu_saxpy(cpu_x, cpu_y, a); gettimeofday(&end, NULL); printf("Done! Took %lfms.\n", MILLISECONDS(start, end)); // Copy data for GPU. float *gpu_x = (float *)malloc(ARRAY_SIZE * sizeof(float)); float *gpu_y = (float *)malloc(ARRAY_SIZE * sizeof(float)); memcpy(gpu_x, x, ARRAY_SIZE); memcpy(gpu_y, y, ARRAY_SIZE); float *cuda_x; float *cuda_y; hipMalloc(&cuda_x, ARRAY_SIZE * sizeof(float)); hipMalloc(&cuda_y, ARRAY_SIZE * sizeof(float)); hipMemcpy(cuda_x, gpu_x, ARRAY_SIZE * sizeof(float), hipMemcpyHostToDevice); hipMemcpy(cuda_y, gpu_y, ARRAY_SIZE * sizeof(float), hipMemcpyHostToDevice); // Run GPU SAXPY. printf("Computing SAXPY on the GPU... "); // Make sure that the grid size is enough to fit all elements. gettimeofday(&start, NULL); gpu_saxpy<<<(ARRAY_SIZE + BLOCK_SIZE - 1) / BLOCK_SIZE, BLOCK_SIZE>>>(cuda_x, cuda_y, a); hipDeviceSynchronize(); gettimeofday(&end, NULL); printf("Done! Took %lfms.\n", MILLISECONDS(start, end)); hipMemcpy(gpu_x, cuda_x, ARRAY_SIZE * sizeof(float), hipMemcpyDeviceToHost); hipMemcpy(gpu_y, cuda_y, ARRAY_SIZE * sizeof(float), hipMemcpyDeviceToHost); // Compare CPU/GPU SAXPY. bool success = true; float epsilon = std::numeric_limits<float>::epsilon(); printf("Comparing the output for each implementation... "); for (unsigned int i = 0; i < 25; i++) { if (abs(cpu_y[i] - gpu_y[i]) > epsilon) { success = false; break; } } printf(success ? "Correct!\n" : "Incorrect!\n"); // Free resources. free(x); free(y); free(cpu_x); free(cpu_y); free(gpu_x); free(gpu_y); hipFree(x); hipFree(y); return 0; }
.text .file "exercise_2.hip" .globl _Z9cpu_saxpyPKfPff # -- Begin function _Z9cpu_saxpyPKfPff .type _Z9cpu_saxpyPKfPff,@function _Z9cpu_saxpyPKfPff: # @_Z9cpu_saxpyPKfPff .cfi_startproc # %bb.0: xorl %eax, %eax .LBB0_1: # =>This Inner Loop Header: Depth=1 movss (%rdi,%rax,4), %xmm1 # xmm1 = mem[0],zero,zero,zero mulss %xmm0, %xmm1 addss (%rsi,%rax,4), %xmm1 movss %xmm1, (%rsi,%rax,4) incq %rax cmpq $10000, %rax # imm = 0x2710 jne .LBB0_1 # %bb.2: retq .Lfunc_end0: .size _Z9cpu_saxpyPKfPff, .Lfunc_end0-_Z9cpu_saxpyPKfPff .cfi_endproc # -- End function .globl _Z24__device_stub__gpu_saxpyPKfPff # -- Begin function _Z24__device_stub__gpu_saxpyPKfPff .type _Z24__device_stub__gpu_saxpyPKfPff,@function _Z24__device_stub__gpu_saxpyPKfPff: # @_Z24__device_stub__gpu_saxpyPKfPff .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 12(%rsp), %rdx movss %xmm0, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rdx, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9gpu_saxpyPKfPff, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z24__device_stub__gpu_saxpyPKfPff, .Lfunc_end1-_Z24__device_stub__gpu_saxpyPKfPff .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _Z9cpuSecondv .LCPI2_0: .quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7 .text .globl _Z9cpuSecondv .type _Z9cpuSecondv,@function _Z9cpuSecondv: # @_Z9cpuSecondv .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $16, %rsp .cfi_def_cfa_offset 32 .cfi_offset %rbx, -16 movq %rsp, %rbx movq %rbx, %rdi xorl %esi, %esi callq gettimeofday cvtsi2sdq (%rbx), %xmm1 cvtsi2sdq 8(%rbx), %xmm0 mulsd .LCPI2_0(%rip), %xmm0 addsd %xmm1, %xmm0 addq $16, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z9cpuSecondv, .Lfunc_end2-_Z9cpuSecondv .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function main .LCPI3_0: .long 0x30000000 # float 4.65661287E-10 .LCPI3_3: .long 0x34000000 # float 1.1920929E-7 .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 .LCPI3_1: .quad 0x408f400000000000 # double 1000 .section .rodata.cst16,"aM",@progbits,16 .p2align 4, 0x0 .LCPI3_2: .long 0x7fffffff # float NaN .long 0x7fffffff # float NaN .long 0x7fffffff # float NaN .long 0x7fffffff # float NaN .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $72, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $40000, %edi # imm = 0x9C40 callq malloc movq %rax, %rbx movl $40000, %edi # imm = 0x9C40 callq malloc movq %rax, %r14 callq rand cvtsi2ss %eax, %xmm0 movss %xmm0, 12(%rsp) # 4-byte Spill xorl %r15d, %r15d .LBB3_1: # =>This Inner Loop Header: Depth=1 callq rand xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 movss .LCPI3_0(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero mulss %xmm1, %xmm0 movss %xmm0, (%rbx,%r15,4) callq rand xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 mulss .LCPI3_0(%rip), %xmm0 movss %xmm0, (%r14,%r15,4) incq %r15 cmpq $10000, %r15 # imm = 0x2710 jne .LBB3_1 # %bb.2: movss 12(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero mulss .LCPI3_0(%rip), %xmm0 movss %xmm0, 12(%rsp) # 4-byte Spill movl $40000, %edi # imm = 0x9C40 callq malloc movq %rax, %r15 movl $40000, %edi # imm = 0x9C40 callq malloc movq %rax, %r12 movl $10000, %edx # imm = 0x2710 movq %r15, %rdi movq %rbx, %rsi callq memcpy@PLT movl $10000, %edx # imm = 0x2710 movq %r12, %rdi movq %r14, %rsi callq memcpy@PLT xorl %r13d, %r13d movl $.L.str, %edi xorl %eax, %eax callq printf leaq 40(%rsp), %rdi xorl %esi, %esi callq gettimeofday movss 12(%rsp), %xmm1 # 4-byte Reload # xmm1 = mem[0],zero,zero,zero .LBB3_3: # =>This Inner Loop Header: Depth=1 movss (%r15,%r13,4), %xmm0 # xmm0 = mem[0],zero,zero,zero mulss %xmm1, %xmm0 addss (%r12,%r13,4), %xmm0 movss %xmm0, (%r12,%r13,4) incq %r13 cmpq $10000, %r13 # imm = 0x2710 jne .LBB3_3 # %bb.4: # %_Z9cpu_saxpyPKfPff.exit leaq 56(%rsp), %r13 movq %r13, %rdi xorl %esi, %esi callq gettimeofday movq (%r13), %rax leaq 40(%rsp), %rcx subq (%rcx), %rax imulq $1000000, %rax, %rax # imm = 0xF4240 addq 8(%r13), %rax subq 8(%rcx), %rax xorps %xmm0, %xmm0 cvtsi2sd %rax, %xmm0 divsd .LCPI3_1(%rip), %xmm0 movl $.L.str.1, %edi movb $1, %al callq printf movl $40000, %edi # imm = 0x9C40 callq malloc movq %rax, %r13 movl $40000, %edi # imm = 0x9C40 callq malloc movq %rax, %rbp movl $10000, %edx # imm = 0x2710 movq %r13, %rdi movq %rbx, %rsi callq memcpy@PLT movl $10000, %edx # imm = 0x2710 movq %rbp, %rdi movq %r14, %rsi callq memcpy@PLT leaq 24(%rsp), %rdi movl $40000, %esi # imm = 0x9C40 callq hipMalloc leaq 16(%rsp), %rdi movl $40000, %esi # imm = 0x9C40 callq hipMalloc leaq 24(%rsp), %rax movq (%rax), %rdi movl $40000, %edx # imm = 0x9C40 movq %r13, 32(%rsp) # 8-byte Spill movq %r13, %rsi movl $1, %ecx callq hipMemcpy leaq 16(%rsp), %rax movq (%rax), %rdi movl $40000, %edx # imm = 0x9C40 movq %rbp, %rsi movl $1, %ecx callq hipMemcpy movl $.L.str.2, %edi xorl %eax, %eax callq printf leaq 40(%rsp), %rdi xorl %esi, %esi callq gettimeofday movabsq $4294967336, %rdi # imm = 0x100000028 leaq 216(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB3_6 # %bb.5: movq 24(%rsp), %rdi movq 16(%rsp), %rsi movss 12(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero callq _Z24__device_stub__gpu_saxpyPKfPff .LBB3_6: callq hipDeviceSynchronize xorl %r13d, %r13d leaq 56(%rsp), %rdi xorl %esi, %esi callq gettimeofday leaq 56(%rsp), %rcx movq (%rcx), %rax subq 40(%rsp), %rax imulq $1000000, %rax, %rax # imm = 0xF4240 addq 8(%rcx), %rax subq 48(%rsp), %rax xorps %xmm0, %xmm0 cvtsi2sd %rax, %xmm0 divsd .LCPI3_1(%rip), %xmm0 movl $.L.str.1, %edi movb $1, %al callq printf movq 24(%rsp), %rsi movl $40000, %edx # imm = 0x9C40 movq 32(%rsp), %rdi # 8-byte Reload movl $2, %ecx callq hipMemcpy movq 16(%rsp), %rsi movl $40000, %edx # imm = 0x9C40 movq %rbp, %rdi movl $2, %ecx callq hipMemcpy movl $.L.str.3, %edi xorl %eax, %eax callq printf movaps .LCPI3_2(%rip), %xmm0 # xmm0 = [NaN,NaN,NaN,NaN] movss .LCPI3_3(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero .LBB3_7: # =>This Inner Loop Header: Depth=1 movss (%r12,%r13,4), %xmm2 # xmm2 = mem[0],zero,zero,zero subss (%rbp,%r13,4), %xmm2 andps %xmm0, %xmm2 ucomiss %xmm1, %xmm2 ja .LBB3_10 # %bb.8: # in Loop: Header=BB3_7 Depth=1 incq %r13 cmpq $25, %r13 jne .LBB3_7 # %bb.9: movl $.L.str.4, %edi jmp .LBB3_11 .LBB3_10: movl $.L.str.5, %edi .LBB3_11: xorl %eax, %eax callq printf movq %rbx, %rdi callq free movq %r14, %rdi callq free movq %r15, %rdi callq free movq %r12, %rdi callq free movq 32(%rsp), %rdi # 8-byte Reload callq free movq %rbp, %rdi callq free movq %rbx, %rdi callq hipFree movq %r14, %rdi callq hipFree xorl %eax, %eax addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size main, .Lfunc_end3-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB4_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB4_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9gpu_saxpyPKfPff, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end4: .size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB5_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB5_2: retq .Lfunc_end5: .size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor .cfi_endproc # -- End function .type _Z9gpu_saxpyPKfPff,@object # @_Z9gpu_saxpyPKfPff .section .rodata,"a",@progbits .globl _Z9gpu_saxpyPKfPff .p2align 3, 0x0 _Z9gpu_saxpyPKfPff: .quad _Z24__device_stub__gpu_saxpyPKfPff .size _Z9gpu_saxpyPKfPff, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Computing SAXPY on the CPU... " .size .L.str, 31 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "Done! Took %lfms.\n" .size .L.str.1, 19 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "Computing SAXPY on the GPU... " .size .L.str.2, 31 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "Comparing the output for each implementation... " .size .L.str.3, 49 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "Correct!\n" .size .L.str.4, 10 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "Incorrect!\n" .size .L.str.5, 12 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z9gpu_saxpyPKfPff" .size .L__unnamed_1, 19 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z24__device_stub__gpu_saxpyPKfPff .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z9gpu_saxpyPKfPff .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z9gpu_saxpyPKfPff ; -- Begin function _Z9gpu_saxpyPKfPff .globl _Z9gpu_saxpyPKfPff .p2align 8 .type _Z9gpu_saxpyPKfPff,@function _Z9gpu_saxpyPKfPff: ; @_Z9gpu_saxpyPKfPff ; %bb.0: s_load_b32 s2, s[0:1], 0x24 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_u32_e32 0x2710, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_mov_b32_e32 v2, 0 s_load_b32 s0, s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo global_load_b32 v2, v[2:3], off global_load_b32 v3, v[0:1], off s_waitcnt vmcnt(0) v_fmac_f32_e32 v3, s0, v2 global_store_b32 v[0:1], v3, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9gpu_saxpyPKfPff .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z9gpu_saxpyPKfPff, .Lfunc_end0-_Z9gpu_saxpyPKfPff ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 156 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9gpu_saxpyPKfPff .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z9gpu_saxpyPKfPff.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
c18ec89616fb5bd06f93a7ecd9e90cb93f43b484
int main() { const unsigned int N = 1048576; const unsigned int bytes = N * sizeof(int); int *h_a = (int*)malloc(bytes); int *d_a; cudaMalloc((int**)&d_a, bytes); memset(h_a, 0, bytes); cudaMemcpy(d_a, h_a, bytes, cudaMemcpyHostToDevice); cudaMemcpy(h_a, d_a, bytes, cudaMemcpyDeviceToHost); return 0; } /* Run these next commands to run the program: $ nvcc profile.cu -o profile_test $ nvprof ./profile_test */
.file "tmpxft_00385a49_00000000-6_profile.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2011: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2011: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2008: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl $4194304, %edi subq $16, %rsp .cfi_def_cfa_offset 32 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax call malloc@PLT movq %rsp, %rdi movl $4194304, %esi movq %rax, %rbx call cudaMalloc@PLT xorl %eax, %eax movl $1048576, %ecx movq %rbx, %rdi rep stosl movq (%rsp), %rdi movl $1, %ecx movl $4194304, %edx movq %rbx, %rsi call cudaMemcpy@PLT movq (%rsp), %rsi movl $2, %ecx movq %rbx, %rdi movl $4194304, %edx call cudaMemcpy@PLT movq 8(%rsp), %rax subq %fs:40, %rax je .L3 call __stack_chk_fail@PLT .L3: addq $16, %rsp .cfi_def_cfa_offset 16 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2008: .size main, .-main .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2034: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2034: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> int main() { const unsigned int N = 1048576; const unsigned int bytes = N * sizeof(int); int *h_a = (int*)malloc(bytes); int *d_a; hipMalloc((int**)&d_a, bytes); memset(h_a, 0, bytes); hipMemcpy(d_a, h_a, bytes, hipMemcpyHostToDevice); hipMemcpy(h_a, d_a, bytes, hipMemcpyDeviceToHost); return 0; } /* Run these next commands to run the program: $ nvcc profile.cu -o profile_test $ nvprof ./profile_test */
.text .file "profile.hip" .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movl $1, %edi movl $4194304, %esi # imm = 0x400000 callq calloc@PLT movq %rax, %rbx movq %rsp, %r14 movl $4194304, %esi # imm = 0x400000 movq %r14, %rdi callq hipMalloc movq (%r14), %rdi movl $4194304, %edx # imm = 0x400000 movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movq (%r14), %rsi movl $4194304, %edx # imm = 0x400000 movq %rbx, %rdi movl $2, %ecx callq hipMemcpy xorl %eax, %eax addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size main, .Lfunc_end0-main .cfi_endproc # -- End function .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
6209d22ea6e9d515df3771a8c19c5eea6a0eeb92
#include "Logger.cuh" #include <stdlib.h> #include <string.h> #include <stdarg.h> #include <stdio.h> #include <time.h> #define PREFIX_SIZE 256 // Do not change order. It matches the values of LOGGER_LEVEL_XXXXX static char* level_name_by_level[] = { "ERROR", "WARN", "INFO", "DEBUG" }; static void logger_print(const char *log_name, unsigned int level, unsigned int level_message, char* fmt, va_list args) { if (level < level_message) return; // Create a "prefixed" format string, by appending the log level and the log name char* prefixed_fmt = (char*) malloc(PREFIX_SIZE + (strlen(log_name) + 1) + (strlen(fmt) + 1)); char* log_level = level_name_by_level[level_message]; time_t t = time(NULL); struct tm tm = *localtime(&t); sprintf( prefixed_fmt, "%02d/%02d/%04d %02d:%02d:%02d - [%5s] - %s - %s \n", tm.tm_mday, // day tm.tm_mon + 1, // month tm.tm_year + 1900, // year tm.tm_hour, tm.tm_min, tm.tm_sec, // hour:minutes:seconds log_level, log_name, fmt ); vprintf(prefixed_fmt, args); free(prefixed_fmt); } Logger::Logger(char* name, unsigned int level) { unsigned int name_size = strlen(name) + 1; this->name = (char *) malloc(name_size * sizeof(char)); strcpy(this->name, name); this->level = level; } void Logger::info(char* fmt, ...) { va_list args; va_start(args, fmt); logger_print(this->name, this->level, LOGGER_LEVEL_INFO, fmt, args); va_end(args); } void Logger::warn(char* fmt, ...) { va_list args; va_start(args, fmt); logger_print(this->name, this->level, LOGGER_LEVEL_WARN, fmt, args); va_end(args); } void Logger::error(char* fmt, ...) { va_list args; va_start(args, fmt); logger_print(this->name, this->level, LOGGER_LEVEL_ERROR, fmt, args); va_end(args); } void Logger::debug(char* fmt, ...) { va_list args; va_start(args, fmt); logger_print(this->name, this->level, LOGGER_LEVEL_DEBUG, fmt, args); va_end(args); } Logger::~Logger() { free(this->name); }
.file "tmpxft_002e02f4_00000000-6_Logger.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2040: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2040: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "%02d/%02d/%04d %02d:%02d:%02d - [%5s] - %s - %s \n" .text .type _ZL12logger_printPKcjjPcP13__va_list_tag, @function _ZL12logger_printPKcjjPcP13__va_list_tag: .LFB2027: .cfi_startproc pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %edx, %ebx subq $24, %rsp .cfi_def_cfa_offset 80 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax cmpl %ebx, %esi jb .L2 movq %rcx, %r12 movq %r8, %r13 movq %rdi, %r15 call strlen@PLT movq %r12, %rdi movq %rax, %rbp call strlen@PLT leaq 258(%rbp,%rax), %r14 movq %r14, %rdi call malloc@PLT xorl %edi, %edi movq %rax, %rbp leaq _ZL19level_name_by_level(%rip), %rax movq (%rax,%rbx,8), %rbx call time@PLT movq %rsp, %rdi movq %rax, (%rsp) call localtime@PLT movl $2, %esi movq %rbp, %rdi movl 16(%rax), %edx movl 12(%rax), %r8d pushq %rcx .cfi_def_cfa_offset 88 pushq %r12 .cfi_def_cfa_offset 96 pushq %r15 .cfi_def_cfa_offset 104 leal 1(%rdx), %r9d movq %r14, %rdx pushq %rbx .cfi_def_cfa_offset 112 movl (%rax), %ecx pushq %rcx .cfi_def_cfa_offset 120 movl 4(%rax), %ecx pushq %rcx .cfi_def_cfa_offset 128 movl 8(%rax), %ecx pushq %rcx .cfi_def_cfa_offset 136 movl 20(%rax), %eax leaq .LC0(%rip), %rcx addl $1900, %eax pushq %rax .cfi_def_cfa_offset 144 xorl %eax, %eax call __sprintf_chk@PLT addq $64, %rsp .cfi_def_cfa_offset 80 movq %r13, %rdx movq %rbp, %rsi movl $2, %edi call __vprintf_chk@PLT movq 8(%rsp), %rax subq %fs:40, %rax jne .L7 addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 56 movq %rbp, %rdi popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp free@PLT .L2: .cfi_restore_state movq 8(%rsp), %rax subq %fs:40, %rax je .L5 .L7: call __stack_chk_fail@PLT .L5: addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _ZL12logger_printPKcjjPcP13__va_list_tag, .-_ZL12logger_printPKcjjPcP13__va_list_tag .align 2 .globl _ZN6LoggerC2EPcj .type _ZN6LoggerC2EPcj, @function _ZN6LoggerC2EPcj: .LFB2029: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movl %edx, %r12d pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movq %rdi, %rbx movq %rsi, %rdi subq $16, %rsp .cfi_def_cfa_offset 48 movq %rsi, 8(%rsp) call strlen@PLT leal 1(%rax), %r13d movq %r13, %rdi call malloc@PLT movq 8(%rsp), %rsi movq %r13, %rdx movq %rax, (%rbx) movq %rax, %rdi call __strcpy_chk@PLT movl %r12d, 8(%rbx) addq $16, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size _ZN6LoggerC2EPcj, .-_ZN6LoggerC2EPcj .globl _ZN6LoggerC1EPcj .set _ZN6LoggerC1EPcj,_ZN6LoggerC2EPcj .align 2 .globl _ZN6Logger4infoEPcz .type _ZN6Logger4infoEPcz, @function _ZN6Logger4infoEPcz: .LFB2031: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq %rdx, 48(%rsp) movq %rcx, 56(%rsp) movq %r8, 64(%rsp) movq %r9, 72(%rsp) testb %al, %al je .L12 movaps %xmm0, 80(%rsp) movaps %xmm1, 96(%rsp) movaps %xmm2, 112(%rsp) movaps %xmm3, 128(%rsp) movaps %xmm4, 144(%rsp) movaps %xmm5, 160(%rsp) movaps %xmm6, 176(%rsp) movaps %xmm7, 192(%rsp) .L12: movq %fs:40, %rax movq %rax, 24(%rsp) xorl %eax, %eax movq %rsi, %rcx leaq 224(%rsp), %rax movl 8(%rdi), %esi movq (%rdi), %rdi movq %rax, 8(%rsp) movq %rsp, %r8 leaq 32(%rsp), %rax movl $2, %edx movq %rax, 16(%rsp) movl $16, (%rsp) movl $48, 4(%rsp) call _ZL12logger_printPKcjjPcP13__va_list_tag movq 24(%rsp), %rax subq %fs:40, %rax je .L13 call __stack_chk_fail@PLT .L13: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2031: .size _ZN6Logger4infoEPcz, .-_ZN6Logger4infoEPcz .align 2 .globl _ZN6Logger4warnEPcz .type _ZN6Logger4warnEPcz, @function _ZN6Logger4warnEPcz: .LFB2032: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq %rdx, 48(%rsp) movq %rcx, 56(%rsp) movq %r8, 64(%rsp) movq %r9, 72(%rsp) testb %al, %al je .L16 movaps %xmm0, 80(%rsp) movaps %xmm1, 96(%rsp) movaps %xmm2, 112(%rsp) movaps %xmm3, 128(%rsp) movaps %xmm4, 144(%rsp) movaps %xmm5, 160(%rsp) movaps %xmm6, 176(%rsp) movaps %xmm7, 192(%rsp) .L16: movq %fs:40, %rax movq %rax, 24(%rsp) xorl %eax, %eax movq %rsi, %rcx leaq 224(%rsp), %rax movl 8(%rdi), %esi movq (%rdi), %rdi movq %rax, 8(%rsp) movq %rsp, %r8 leaq 32(%rsp), %rax movl $1, %edx movq %rax, 16(%rsp) movl $16, (%rsp) movl $48, 4(%rsp) call _ZL12logger_printPKcjjPcP13__va_list_tag movq 24(%rsp), %rax subq %fs:40, %rax je .L17 call __stack_chk_fail@PLT .L17: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _ZN6Logger4warnEPcz, .-_ZN6Logger4warnEPcz .align 2 .globl _ZN6Logger5errorEPcz .type _ZN6Logger5errorEPcz, @function _ZN6Logger5errorEPcz: .LFB2033: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq %rdx, 48(%rsp) movq %rcx, 56(%rsp) movq %r8, 64(%rsp) movq %r9, 72(%rsp) testb %al, %al je .L20 movaps %xmm0, 80(%rsp) movaps %xmm1, 96(%rsp) movaps %xmm2, 112(%rsp) movaps %xmm3, 128(%rsp) movaps %xmm4, 144(%rsp) movaps %xmm5, 160(%rsp) movaps %xmm6, 176(%rsp) movaps %xmm7, 192(%rsp) .L20: movq %fs:40, %rax movq %rax, 24(%rsp) xorl %eax, %eax movq %rsi, %rcx leaq 224(%rsp), %rax movl 8(%rdi), %esi movq (%rdi), %rdi movq %rax, 8(%rsp) xorl %edx, %edx leaq 32(%rsp), %rax movq %rsp, %r8 movq %rax, 16(%rsp) movl $16, (%rsp) movl $48, 4(%rsp) call _ZL12logger_printPKcjjPcP13__va_list_tag movq 24(%rsp), %rax subq %fs:40, %rax je .L21 call __stack_chk_fail@PLT .L21: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2033: .size _ZN6Logger5errorEPcz, .-_ZN6Logger5errorEPcz .align 2 .globl _ZN6Logger5debugEPcz .type _ZN6Logger5debugEPcz, @function _ZN6Logger5debugEPcz: .LFB2034: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq %rdx, 48(%rsp) movq %rcx, 56(%rsp) movq %r8, 64(%rsp) movq %r9, 72(%rsp) testb %al, %al je .L24 movaps %xmm0, 80(%rsp) movaps %xmm1, 96(%rsp) movaps %xmm2, 112(%rsp) movaps %xmm3, 128(%rsp) movaps %xmm4, 144(%rsp) movaps %xmm5, 160(%rsp) movaps %xmm6, 176(%rsp) movaps %xmm7, 192(%rsp) .L24: movq %fs:40, %rax movq %rax, 24(%rsp) xorl %eax, %eax movq %rsi, %rcx leaq 224(%rsp), %rax movl 8(%rdi), %esi movq (%rdi), %rdi movq %rax, 8(%rsp) movq %rsp, %r8 leaq 32(%rsp), %rax movl $3, %edx movq %rax, 16(%rsp) movl $16, (%rsp) movl $48, 4(%rsp) call _ZL12logger_printPKcjjPcP13__va_list_tag movq 24(%rsp), %rax subq %fs:40, %rax je .L25 call __stack_chk_fail@PLT .L25: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2034: .size _ZN6Logger5debugEPcz, .-_ZN6Logger5debugEPcz .align 2 .globl _ZN6LoggerD2Ev .type _ZN6LoggerD2Ev, @function _ZN6LoggerD2Ev: .LFB2036: .cfi_startproc endbr64 movq (%rdi), %rdi jmp free@PLT .cfi_endproc .LFE2036: .size _ZN6LoggerD2Ev, .-_ZN6LoggerD2Ev .globl _ZN6LoggerD1Ev .set _ZN6LoggerD1Ev,_ZN6LoggerD2Ev .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2063: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2063: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.str1.1 .LC1: .string "ERROR" .LC2: .string "WARN" .LC3: .string "INFO" .LC4: .string "DEBUG" .section .data.rel.ro.local,"aw" .align 32 .type _ZL19level_name_by_level, @object .size _ZL19level_name_by_level, 32 _ZL19level_name_by_level: .quad .LC1 .quad .LC2 .quad .LC3 .quad .LC4 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> #include "Logger.cuh" #include <stdlib.h> #include <string.h> #include <stdarg.h> #include <stdio.h> #include <time.h> #define PREFIX_SIZE 256 // Do not change order. It matches the values of LOGGER_LEVEL_XXXXX static char* level_name_by_level[] = { "ERROR", "WARN", "INFO", "DEBUG" }; static void logger_print(const char *log_name, unsigned int level, unsigned int level_message, char* fmt, va_list args) { if (level < level_message) return; // Create a "prefixed" format string, by appending the log level and the log name char* prefixed_fmt = (char*) malloc(PREFIX_SIZE + (strlen(log_name) + 1) + (strlen(fmt) + 1)); char* log_level = level_name_by_level[level_message]; time_t t = time(NULL); struct tm tm = *localtime(&t); sprintf( prefixed_fmt, "%02d/%02d/%04d %02d:%02d:%02d - [%5s] - %s - %s \n", tm.tm_mday, // day tm.tm_mon + 1, // month tm.tm_year + 1900, // year tm.tm_hour, tm.tm_min, tm.tm_sec, // hour:minutes:seconds log_level, log_name, fmt ); vprintf(prefixed_fmt, args); free(prefixed_fmt); } Logger::Logger(char* name, unsigned int level) { unsigned int name_size = strlen(name) + 1; this->name = (char *) malloc(name_size * sizeof(char)); strcpy(this->name, name); this->level = level; } void Logger::info(char* fmt, ...) { va_list args; va_start(args, fmt); logger_print(this->name, this->level, LOGGER_LEVEL_INFO, fmt, args); va_end(args); } void Logger::warn(char* fmt, ...) { va_list args; va_start(args, fmt); logger_print(this->name, this->level, LOGGER_LEVEL_WARN, fmt, args); va_end(args); } void Logger::error(char* fmt, ...) { va_list args; va_start(args, fmt); logger_print(this->name, this->level, LOGGER_LEVEL_ERROR, fmt, args); va_end(args); } void Logger::debug(char* fmt, ...) { va_list args; va_start(args, fmt); logger_print(this->name, this->level, LOGGER_LEVEL_DEBUG, fmt, args); va_end(args); } Logger::~Logger() { free(this->name); }
.text .file "Logger.hip" .globl _ZN6LoggerC2EPcj # -- Begin function _ZN6LoggerC2EPcj .p2align 1, 0x90 .type _ZN6LoggerC2EPcj,@function _ZN6LoggerC2EPcj: # @_ZN6LoggerC2EPcj .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl %edx, %ebx movq %rsi, %r14 movq %rdi, %r15 movq %rsi, %rdi callq strlen leal 1(%rax), %edi callq malloc movq %rax, (%r15) movq %rax, %rdi movq %r14, %rsi callq strcpy movl %ebx, 8(%r15) popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _ZN6LoggerC2EPcj, .Lfunc_end0-_ZN6LoggerC2EPcj .cfi_endproc # -- End function .globl _ZN6Logger4infoEPcz # -- Begin function _ZN6Logger4infoEPcz .p2align 1, 0x90 .type _ZN6Logger4infoEPcz,@function _ZN6Logger4infoEPcz: # @_ZN6Logger4infoEPcz .cfi_startproc # %bb.0: subq $216, %rsp .cfi_def_cfa_offset 224 movq %rsi, %r10 leaq 32(%rsp), %rsi movq %rdx, 16(%rsi) movq %rcx, 24(%rsi) movq %r8, 32(%rsi) movq %r9, 40(%rsi) testb %al, %al je .LBB1_2 # %bb.1: movaps %xmm0, 80(%rsp) movaps %xmm1, 96(%rsp) movaps %xmm2, 112(%rsp) movaps %xmm3, 128(%rsp) movaps %xmm4, 144(%rsp) movaps %xmm5, 160(%rsp) movaps %xmm6, 176(%rsp) movaps %xmm7, 192(%rsp) .LBB1_2: movq %rsp, %r8 movq %rsi, 16(%r8) leaq 224(%rsp), %rax movq %rax, 8(%r8) movabsq $206158430224, %rax # imm = 0x3000000010 movq %rax, (%r8) movq (%rdi), %rax movl 8(%rdi), %esi movq %rax, %rdi movl $2, %edx movq %r10, %rcx callq _ZL12logger_printPKcjjPcP13__va_list_tag addq $216, %rsp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _ZN6Logger4infoEPcz, .Lfunc_end1-_ZN6Logger4infoEPcz .cfi_endproc # -- End function .type _ZL12logger_printPKcjjPcP13__va_list_tag,@function # -- Begin function _ZL12logger_printPKcjjPcP13__va_list_tag _ZL12logger_printPKcjjPcP13__va_list_tag: # @_ZL12logger_printPKcjjPcP13__va_list_tag .cfi_startproc # %bb.0: cmpl %edx, %esi jb .LBB2_2 # %bb.1: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 pushq %rax .cfi_def_cfa_offset 64 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %r8, %rbx movq %rcx, %r14 movl %edx, %ebp movq %rdi, %r15 callq strlen movq %rax, %r12 movq %r14, %rdi callq strlen leaq (%r12,%rax), %rdi addq $258, %rdi # imm = 0x102 callq malloc movq %rax, %r12 movl %ebp, %eax movq _ZL19level_name_by_level(,%rax,8), %r13 xorl %edi, %edi callq time movq %rsp, %rdi movq %rax, (%rdi) callq localtime movl (%rax), %r10d movl 4(%rax), %r11d movl 8(%rax), %r9d movl 12(%rax), %edx movl 16(%rax), %ecx incl %ecx movl $1900, %r8d # imm = 0x76C addl 20(%rax), %r8d subq $8, %rsp .cfi_adjust_cfa_offset 8 movl $.L.str, %esi movq %r12, %rdi xorl %eax, %eax pushq %r14 .cfi_adjust_cfa_offset 8 pushq %r15 .cfi_adjust_cfa_offset 8 pushq %r13 .cfi_adjust_cfa_offset 8 pushq %r10 .cfi_adjust_cfa_offset 8 pushq %r11 .cfi_adjust_cfa_offset 8 callq sprintf addq $48, %rsp .cfi_adjust_cfa_offset -48 movq %r12, %rdi movq %rbx, %rsi callq vprintf movq %r12, %rdi callq free addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 .cfi_restore %rbx .cfi_restore %r12 .cfi_restore %r13 .cfi_restore %r14 .cfi_restore %r15 .cfi_restore %rbp .LBB2_2: retq .Lfunc_end2: .size _ZL12logger_printPKcjjPcP13__va_list_tag, .Lfunc_end2-_ZL12logger_printPKcjjPcP13__va_list_tag .cfi_endproc # -- End function .globl _ZN6Logger4warnEPcz # -- Begin function _ZN6Logger4warnEPcz .p2align 1, 0x90 .type _ZN6Logger4warnEPcz,@function _ZN6Logger4warnEPcz: # @_ZN6Logger4warnEPcz .cfi_startproc # %bb.0: subq $216, %rsp .cfi_def_cfa_offset 224 movq %rsi, %r10 leaq 32(%rsp), %rsi movq %rdx, 16(%rsi) movq %rcx, 24(%rsi) movq %r8, 32(%rsi) movq %r9, 40(%rsi) testb %al, %al je .LBB3_2 # %bb.1: movaps %xmm0, 80(%rsp) movaps %xmm1, 96(%rsp) movaps %xmm2, 112(%rsp) movaps %xmm3, 128(%rsp) movaps %xmm4, 144(%rsp) movaps %xmm5, 160(%rsp) movaps %xmm6, 176(%rsp) movaps %xmm7, 192(%rsp) .LBB3_2: movq %rsp, %r8 movq %rsi, 16(%r8) leaq 224(%rsp), %rax movq %rax, 8(%r8) movabsq $206158430224, %rax # imm = 0x3000000010 movq %rax, (%r8) movq (%rdi), %rax movl 8(%rdi), %esi movq %rax, %rdi movl $1, %edx movq %r10, %rcx callq _ZL12logger_printPKcjjPcP13__va_list_tag addq $216, %rsp .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _ZN6Logger4warnEPcz, .Lfunc_end3-_ZN6Logger4warnEPcz .cfi_endproc # -- End function .globl _ZN6Logger5errorEPcz # -- Begin function _ZN6Logger5errorEPcz .p2align 1, 0x90 .type _ZN6Logger5errorEPcz,@function _ZN6Logger5errorEPcz: # @_ZN6Logger5errorEPcz .cfi_startproc # %bb.0: subq $216, %rsp .cfi_def_cfa_offset 224 movq %rsi, %r10 leaq 32(%rsp), %rsi movq %rdx, 16(%rsi) movq %rcx, 24(%rsi) movq %r8, 32(%rsi) movq %r9, 40(%rsi) testb %al, %al je .LBB4_2 # %bb.1: movaps %xmm0, 80(%rsp) movaps %xmm1, 96(%rsp) movaps %xmm2, 112(%rsp) movaps %xmm3, 128(%rsp) movaps %xmm4, 144(%rsp) movaps %xmm5, 160(%rsp) movaps %xmm6, 176(%rsp) movaps %xmm7, 192(%rsp) .LBB4_2: movq %rsp, %r8 movq %rsi, 16(%r8) leaq 224(%rsp), %rax movq %rax, 8(%r8) movabsq $206158430224, %rax # imm = 0x3000000010 movq %rax, (%r8) movq (%rdi), %rax movl 8(%rdi), %esi movq %rax, %rdi xorl %edx, %edx movq %r10, %rcx callq _ZL12logger_printPKcjjPcP13__va_list_tag addq $216, %rsp .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size _ZN6Logger5errorEPcz, .Lfunc_end4-_ZN6Logger5errorEPcz .cfi_endproc # -- End function .globl _ZN6Logger5debugEPcz # -- Begin function _ZN6Logger5debugEPcz .p2align 1, 0x90 .type _ZN6Logger5debugEPcz,@function _ZN6Logger5debugEPcz: # @_ZN6Logger5debugEPcz .cfi_startproc # %bb.0: subq $216, %rsp .cfi_def_cfa_offset 224 movq %rsi, %r10 leaq 32(%rsp), %rsi movq %rdx, 16(%rsi) movq %rcx, 24(%rsi) movq %r8, 32(%rsi) movq %r9, 40(%rsi) testb %al, %al je .LBB5_2 # %bb.1: movaps %xmm0, 80(%rsp) movaps %xmm1, 96(%rsp) movaps %xmm2, 112(%rsp) movaps %xmm3, 128(%rsp) movaps %xmm4, 144(%rsp) movaps %xmm5, 160(%rsp) movaps %xmm6, 176(%rsp) movaps %xmm7, 192(%rsp) .LBB5_2: movq %rsp, %r8 movq %rsi, 16(%r8) leaq 224(%rsp), %rax movq %rax, 8(%r8) movabsq $206158430224, %rax # imm = 0x3000000010 movq %rax, (%r8) movq (%rdi), %rax movl 8(%rdi), %esi movq %rax, %rdi movl $3, %edx movq %r10, %rcx callq _ZL12logger_printPKcjjPcP13__va_list_tag addq $216, %rsp .cfi_def_cfa_offset 8 retq .Lfunc_end5: .size _ZN6Logger5debugEPcz, .Lfunc_end5-_ZN6Logger5debugEPcz .cfi_endproc # -- End function .globl _ZN6LoggerD2Ev # -- Begin function _ZN6LoggerD2Ev .p2align 1, 0x90 .type _ZN6LoggerD2Ev,@function _ZN6LoggerD2Ev: # @_ZN6LoggerD2Ev .cfi_startproc # %bb.0: movq (%rdi), %rdi jmp free # TAILCALL .Lfunc_end6: .size _ZN6LoggerD2Ev, .Lfunc_end6-_ZN6LoggerD2Ev .cfi_endproc # -- End function .type _ZL19level_name_by_level,@object # @_ZL19level_name_by_level .section .rodata,"a",@progbits .p2align 4, 0x0 _ZL19level_name_by_level: .quad .L.str.1 .quad .L.str.2 .quad .L.str.3 .quad .L.str.4 .size _ZL19level_name_by_level, 32 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%02d/%02d/%04d %02d:%02d:%02d - [%5s] - %s - %s \n" .size .L.str, 50 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "ERROR" .size .L.str.1, 6 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "WARN" .size .L.str.2, 5 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "INFO" .size .L.str.3, 5 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "DEBUG" .size .L.str.4, 6 .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .globl _ZN6LoggerC1EPcj .type _ZN6LoggerC1EPcj,@function .set _ZN6LoggerC1EPcj, _ZN6LoggerC2EPcj .globl _ZN6LoggerD1Ev .type _ZN6LoggerD1Ev,@function .set _ZN6LoggerD1Ev, _ZN6LoggerD2Ev .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
008c027bf56093c36b8df71ef3b9b589f8954906
#include <stdlib.h> #include <stdio.h> #include <time.h> //#include "cutil.h" void checkCUDAError(const char *msg) { cudaError_t err = cudaGetLastError(); if (cudaSuccess != err) { printf("Cuda error: %s: %s.\n", msg, cudaGetErrorString(err)); printf("\nPress ENTER to exit...\n"); getchar(); exit(-1); } } //name of the input file #define INPUT_FILE_NAME "input.txt" //name of the compressed file #define COMPRESSED_FILE_NAME "compressed.txt" #define COMPRESSED_FILE_NAME_GPU "compressed_gpu.txt" //name of the uncompressed file #define DECOMPRESSED_FILE_NAME "decompressed.txt" //name of the config file #define CONFIG_FILE_NAME "config.txt" //max number of characters #define MAX_CHAR 256 //#define MAX_CHAR 30 //max lenght of the number which can occur in char_frequency or char_huffman_table) #define MAX_LENGTH_OF_NUMBER 10 //lenght of the array in shared memory on device #define SHARED_MEMORY_SIZE 256 //lenght of the array in const memory on device #define CONST_MEMORY_SIZE 15000 //(MAX_CHAR*(MAX_CHAR-1)) //To fill and pass the file as an array to GPU #define MAX_FILE_CHARS 50000 #define BLOCK_SIZE 256 struct node { int val; int weight; struct node * right, * left; }; //keeps frequency of particular characters (index - symbof of the character, value - frequency of the character) int char_frequency[MAX_CHAR]; //keeps huffman table int char_huffman_table[MAX_CHAR][MAX_CHAR-1]; //keeps number which tells how many bits were unused in last byte (variable is set after call compress_file()) int last_byte_padding=0; //for writing gpu output int last_byte_padding_gpu = 0; //keeps number of characters in current input file - file has to have less than 2,147,483,647 characters (variable is set after call read_file()) int number_of_char=0 ; //To fill and pass the file as an array to GPU unsigned char *h_input=0,*d_input=0; // To read char_huffman_table at the GPU int *d_char_huffman_table=0; int copiedarray2[MAX_CHAR][MAX_CHAR-1]; __device__ int char_huffman_table_gpu[MAX_CHAR][MAX_CHAR-1]; //To write the output from compression in GPU //char *compressedfile_array=0; bool *compressedfile_array=0; bool *finalcompressed_array=0; // To keep track of how many characters each block wrote int *block_cntr_array=0; int *block_cntr_array_check=0; int *d_last_byte_padding=0; int *finalsize=0; int *orig_number_of_char=0; int *huffman_check = (int *)malloc((MAX_CHAR)*(MAX_CHAR-1) *sizeof(int)); bool *d_bool = 0; bool *h_bool = 0; __global__ void final_compression(int *block_cntr_array,bool *compressedfile_array,bool *finalcompressed_array,int number_of_char) //__device__ void final_compression(int *block_cntr_array,bool *compressedfile_array,bool *finalcompressed_array) { int index_blocks=blockIdx.x*blockDim.x+threadIdx.x; int index_file=(blockIdx.x*blockDim.x+threadIdx.x)*255; int final_index=0; if(index_blocks < number_of_char) { for(int i=0;i<index_blocks;i++) { final_index = final_index+ block_cntr_array[i]; } for(int i=0;i<block_cntr_array[index_blocks];i++) { finalcompressed_array[final_index+i]=compressedfile_array[index_file+i]; } } } //__global__ void computearray_size(int* block_cntr_array,int *finalsize,int *orig_number_of_char) __device__ void computearray_size(int* block_cntr_array,int *finalsize,int *orig_number_of_char) { *finalsize = 0; for(int i=0;i<*orig_number_of_char;i++) { (*finalsize)=(*finalsize) + block_cntr_array[i]; } } /*__global__ void compress_file_gpu(unsigned char *d_input,char *compressedfile_array,int *char_huffman_table2,int *block_cntr_array,int* d_last_byte_padding) { int write_counter=0,block_counter=0; //how many bits have been written in specific byte unsigned char input_char; unsigned char output_char = 0x0; unsigned char end_of_file = 255; unsigned char mask = 0x01; //00000001; int index_file=(blockIdx.x*blockDim.x+threadIdx.x)*255; int index_blocks=blockIdx.x*blockDim.x+threadIdx.x; //for(int i=0;i<MAX_CHAR;i++) //{ //int *row = (int*)((char*)char_huffman_table2 + i * pitch); //for (int c = 0; c < MAX_CHAR-1; ++c) { // char_huffman_table_gpu[i][c] = row[c]; //} //} input_char = d_input[index_blocks]; for(int i = 0 ; i < (MAX_CHAR - 1) ; i++) { if(char_huffman_table2[input_char*255+i] == 0) //detect if current character on particular position has 0 or 1 { output_char = output_char << 1; //if 0 then shift bits one position to left (last bit after shifting is 0) write_counter++; block_counter++; } else if(char_huffman_table2[input_char*255+i] == 1) { output_char = output_char << 1; //if 1 then shift bits one position to left... output_char = output_char | mask; //...and last bit change to: 1 write_counter++; block_counter++; } else //-1 { //if(input_char == end_of_file) //if EOF is detected then write current result to file //{ if(write_counter != 0) { output_char = output_char << (8-write_counter); compressedfile_array[index_file]=output_char; output_char = 0x0; } else //write_counter == 0 { compressedfile_array[index_file]=output_char; } //} break; } if(write_counter == 8) //if result achieved 8 (size of char) then write it to compressed_file { compressedfile_array[index_file]=output_char; output_char = 0x0; write_counter = 0; } } block_cntr_array[index_blocks]=block_counter; *d_last_byte_padding = write_counter; //to decompress file we have to know how many bits in last byte have been written //update_config(write_counter); //TODO to zakomentowac przy ostatecznych pomiarach }*/ //__global__ void compress_file_gpu(unsigned char *d_input,bool *compressedfile_array,int *char_huffman_table2,int *block_cntr_array,int* d_last_byte_padding) __global__ void compress_file_gpu(unsigned char *d_input,bool *compressedfile_array,int *char_huffman_table2,int *block_cntr_array,int* d_last_byte_padding,int *finalsize,int *orig_number_of_char,int number_of_char) { //int write_counter=0, int block_counter=0; //how many bits have been written in specific byte unsigned char input_char; //unsigned char output_char = 0x0; //unsigned char end_of_file = 255; //unsigned char mask = 0x01; //00000001; int index_file=(blockIdx.x*blockDim.x+threadIdx.x)*255; int index_blocks=blockIdx.x*blockDim.x+threadIdx.x; if(index_blocks < number_of_char) { //for(int i=0;i<MAX_CHAR;i++) //{ //int *row = (int*)((char*)char_huffman_table2 + i * pitch); //for (int c = 0; c < MAX_CHAR-1; ++c) { // char_huffman_table_gpu[i][c] = row[c]; //} //} input_char = d_input[index_blocks]; for(int i = 0 ; i < (MAX_CHAR - 1) ; i++) { if(char_huffman_table2[input_char*255+i] == 0) //detect if current character on particular position has 0 or 1 { //output_char = output_char << 1; //if 0 then shift bits one position to left (last bit after shifting is 0) compressedfile_array[index_file+i] = false; //write_counter++; block_counter++; } else if(char_huffman_table2[input_char*255+i] == 1) { //output_char = output_char << 1; //if 1 then shift bits one position to left... //output_char = output_char | mask; //...and last bit change to: 1 //write_counter++; compressedfile_array[index_file+i] = true; block_counter++; } else //-1 { /*if(input_char == end_of_file) //if EOF is detected then write current result to file { if(write_counter != 0) { output_char = output_char << (8-write_counter); compressedfile_array[index_file]=output_char; output_char = 0x0; } else //write_counter == 0 { compressedfile_array[index_file]=output_char; } }*/ break; } /*if(write_counter == 8) //if result achieved 8 (size of char) then write it to compressed_file { compressedfile_array[index_file]=output_char; output_char = 0x0; write_counter = 0; }*/ } block_cntr_array[index_blocks]=block_counter; //*d_last_byte_padding = write_counter; //to decompress file we have to know how many bits in last byte have been written //update_config(write_counter); //TODO to zakomentowac przy ostatecznych pomiarach computearray_size(block_cntr_array,finalsize,orig_number_of_char); //final_compression(block_cntr_array,compressedfile_array,finalcompressed_array); } } void write_GPU_compressed(bool *final_compressed_cpu,int *finalsize_cpu) { FILE *compressed_file; int write_counter=0; //how many bits have been written in specific byte //unsigned char input_char; unsigned char output_char = 0x0; //unsigned char end_of_file = 255; unsigned char mask = 0x01; //00000001; compressed_file = fopen(COMPRESSED_FILE_NAME_GPU, "wb"); if ((compressed_file==NULL)) { perror ("Error reading file"); } else { for(int i = 0 ; i < (*finalsize_cpu) ; i++) { if(int(final_compressed_cpu[i]) == 0) { output_char = output_char << 1; //if 0 then shift bits one position to left (last bit after shifting is 0) write_counter++; } else if (int(final_compressed_cpu[i]) == 1) { output_char = output_char << 1; //if 1 then shift bits one position to left... output_char = output_char | mask; //...and last bit change to: 1 write_counter++; } if(write_counter == 8) //if result achieved 8 (size of char) then write it to compressed_file { printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); output_char = 0x0; write_counter = 0; } } if(write_counter != 0) { output_char = output_char << (8-write_counter); printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); output_char = 0x0; } } fclose(compressed_file); last_byte_padding_gpu = write_counter; } void print_dchar_huffman_table() { printf("\n dchar huffman table "); getchar(); bool flag = false; printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printf("Huffman table:\n"); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); for(int i = 0 ; i < MAX_CHAR ; i++) { flag = false; for(int j = 0 ; j < (MAX_CHAR -1) ; j++) { if(copiedarray2[i][j] != -1) { if(!flag) { if(i == 10)//new line { printf("\\n:\t"); } else { printf("%c:\t",i); } } flag = true; printf("%d ", copiedarray2[i][j]); } } if(flag) printf("\n"); } printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); getchar(); } //Huffman table construction+++++++++++++++++++++++++++++++++++++++++++++++++++ void insertion_sort(node **forest, int length) { for(int i = 1; i < length ; i++) { node *tmp = forest[i]; int j = i - 1; bool done = false; do { if(forest[j]->weight < tmp->weight) //> ascending order; < descending order { forest[j+1] = forest[j]; j = j-1; if(j < 0) { done = true; } } else { done = true; } }while(!done); forest[j+1] = tmp; } } void print_char_frequency() { printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printf("character frequency:\n"); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); for(int i = 0 ; i < MAX_CHAR ; i++) { if(char_frequency[i] != 0) { if(i == 10)//new line { printf("%d)\tval: \\n\tfreq: %d\n",i, char_frequency[i]); } else { printf("%d)\tval: %c\tfreq: %d\n",i, i, char_frequency[i]); } } } printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); } void print_char_huffman_table() { bool flag = false; printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printf("Huffman table:\n"); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); for(int i = 0 ; i < MAX_CHAR ; i++) { flag = false; for(int j = 0 ; j < (MAX_CHAR -1) ; j++) { if(char_huffman_table[i][j] != -1) { if(!flag) { if(i == 10)//new line { printf("\\n:\t"); } else { printf("%c:\t",i); } } flag = true; printf("%d ", char_huffman_table[i][j]); } } if(flag) printf("\n"); } printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); } void printout_inorder(node * tree) { if(tree->left) printout_inorder(tree->left); if(tree->val != NULL) { if(tree->val == '\n') { printf("weight: %d\tvalue: \\n\n",tree->weight); } else { printf("weight: %d\tvalue: %c\n",tree->weight, tree->val); } } else { printf("weight: %d\tvalue: NULL\n",tree->weight); } if(tree->right) printout_inorder(tree->right); } void read_file() { FILE *file; unsigned char end_of_file = 255; unsigned char c; file = fopen(INPUT_FILE_NAME, "r"); if (file==NULL) { perror ("Error reading file"); } else { //storing the file contents into h_input h_input = (unsigned char *)malloc(MAX_FILE_CHARS*sizeof(char)); do { c = getc (file); //if(c == end_of_file) printf("\n Found EOF \n"); //printf("c before putting into array is %c\n",c); h_input[number_of_char]=c; number_of_char++; char_frequency[c]++; } while (c != end_of_file); fclose (file); } // h_input[number_of_char] = end_of_file; char_frequency[end_of_file] = 0; //to avoid problems with several EOF in one file //EOF is not needed ; so going to decrement number_of_char--; } void traverse_preorder(node *root, int *path) { if(root->val != NULL) { for(int i = 0 ; i < MAX_CHAR -1 ; i++) { char_huffman_table[root->val][i] = path[i]; } } if(root->left)//left 1 { int counter = 0; for(int i = 0 ; i < MAX_CHAR - 1 ; i++) { if(path[i] == -1) { break; } counter++; } path[counter] = 1; traverse_preorder(root->left, path); path[counter] = -1; } if(root->right)//right 0 { int counter = 0; for(int i = 0 ; i < MAX_CHAR - 1 ; i++) { if(path[i] == -1) { break; } counter++; } path[counter] = 0; traverse_preorder(root->right, path); path[counter] = -1; } } void construct_huffman_table(node *root) { int path[MAX_CHAR - 1]; for(int i = 0 ; i < MAX_CHAR - 1 ; i++) { path[i] = -1; } traverse_preorder(root, path); } void build_binary_tree() { int forest_counter = 0; node *forest[MAX_CHAR]; node *curr; for(int i = 0 ; i < MAX_CHAR ; i++) //initial forest { if(char_frequency[i] != 0) { curr = (node *)malloc(sizeof(node)); curr->left = curr->right = NULL; curr->val = i; curr->weight = char_frequency[i]; forest[forest_counter] = curr; forest_counter++; } } insertion_sort(forest, forest_counter);//sorted initial forest while(forest_counter > 1)//build final tree { node *parent; parent = (node *)malloc(sizeof(node)); parent->right = forest[forest_counter-1]; parent->left = forest[forest_counter-2]; parent->weight = forest[forest_counter-1]->weight + forest[forest_counter-2]->weight; parent->val = NULL; forest[forest_counter-1] = NULL; forest[forest_counter-2] = parent; forest_counter--; insertion_sort(forest, forest_counter); } printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printf("Huffman tree (inorder traversal sequence):\n"); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printout_inorder(forest[0]); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); construct_huffman_table(forest[0]); //delete_binary_tree_postorder(forest[0]); //after building Huffman table we do not need Huffman tree anymore } void array_initializer() { for(int i = 0 ; i < MAX_CHAR ; i++) { char_frequency[i] = 0; } for(int i = 0 ; i < MAX_CHAR ; i++) { for(int j = 0 ; j < (MAX_CHAR-1) ; j++) { char_huffman_table[i][j] = -1; } } } //+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ //Calculation on CPU+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ void compress_file() { FILE *input_file; FILE *compressed_file; unsigned char output_char; int write_counter; //how many bits have been written in specific byte unsigned char input_char; unsigned char end_of_file ; unsigned char mask ; //00000001; input_file = fopen(INPUT_FILE_NAME, "rb"); compressed_file = fopen(COMPRESSED_FILE_NAME, "wb"); // apend file (add text to a file or create a file if it does not exist) output_char= 0x0; write_counter = 0; end_of_file = 255; mask = 0x01; if ((input_file==NULL)||(compressed_file==NULL)) { perror ("Error reading file"); } else { do { input_char = getc (input_file); //read one character from input file for(int i = 0 ; i < (MAX_CHAR - 1) ; i++) { if(char_huffman_table[input_char][i] == 0) //detect if current character on particular position has 0 or 1 { output_char = output_char << 1; //if 0 then shift bits one position to left (last bit after shifting is 0) write_counter++; } else if(char_huffman_table[input_char][i] == 1) { output_char = output_char << 1; //if 1 then shift bits one position to left... output_char = output_char | mask; //...and last bit change to: 1 write_counter++; } else //-1 { if(input_char == end_of_file) //if EOF is detected then write current result to file { if(write_counter != 0) { output_char = output_char << (8-write_counter); printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); output_char = 0x0; } else //write_counter == 0 { printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); } } break; } if(write_counter == 8) //if result achieved 8 (size of char) then write it to compressed_file { printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); output_char = 0x0; write_counter = 0; } } } while (input_char != end_of_file); fclose (input_file); fclose(compressed_file); last_byte_padding = write_counter; //to decompress file we have to know how many bits in last byte have been written //update_config(write_counter); //TODO to zakomentowac przy ostatecznych pomiarach } } void print_gpu_compressed_file(char *final_compressed_cpu,int finalsize_cpu) { FILE *compressed_file; compressed_file = fopen(COMPRESSED_FILE_NAME_GPU, "wb"); for(int i=0;i<finalsize_cpu;i++) { char c=final_compressed_cpu[i]; printf("i is %d and c is %c",i,c); putc(c,compressed_file); } fclose(compressed_file); } void decompress_file() { FILE *compressed_file; FILE *decompressed_file; unsigned char end_of_file = 255; unsigned char mask = 0x7F; //01111111; unsigned char curr; unsigned char next; int written_char_counter=0; int pattern[MAX_CHAR - 1]; for(int i = 0 ; i < (MAX_CHAR - 1); i++) { pattern[i] = -1; } compressed_file = fopen(COMPRESSED_FILE_NAME, "rb"); decompressed_file = fopen(DECOMPRESSED_FILE_NAME, "wb"); if ((compressed_file==NULL)||(decompressed_file==NULL)) { perror ("Error reading file"); } else { int bit_counter=0; unsigned char first_bit; bool read_next = true; curr = getc (compressed_file); next = getc (compressed_file); //we have to read one byte in advance due to padding // for(int i = 0 ; i < (MAX_CHAR - 1) ; i++) //builds a pattern and chcecks if it matches to char_huffman_table int pattern_counter=-1; while(pattern_counter < (MAX_CHAR - 1)) { pattern_counter++; first_bit = curr | mask; //check if first bit is 0 or 1 curr = curr << 1; if(bit_counter == 7) { bit_counter = 0; curr = next; if(read_next) { next = getc (compressed_file); if(next == end_of_file) { if((number_of_char - written_char_counter) < 8) { read_next = false; bit_counter = 7 - last_byte_padding; } } } if((curr == end_of_file) && ((number_of_char - written_char_counter) < 8)) { break; } } else { bit_counter++; } if(first_bit == 255) { pattern[pattern_counter] = 1; } else { pattern[pattern_counter] = 0; } bool flag = true; for(int j = 0 ; j < MAX_CHAR ; j++) { flag = true; for(int k = 0 ; k < (MAX_CHAR - 1) ; k++) { if(char_huffman_table[j][k] != pattern[k]) { flag = false; break; } } if(flag == true) { written_char_counter++; putc(j, decompressed_file); for(int i = 0 ; i < (MAX_CHAR - 1); i++) { pattern[i] = -1; } pattern_counter = -1; break; } } } fclose (compressed_file); fclose (decompressed_file); } } void initialize() { array_initializer(); read_file(); print_char_frequency(); build_binary_tree(); print_char_huffman_table(); } /*__global__ void compress(int *d_input,int number_of_char,int *d_char_huffman_table,int MAX_CHAR) { int i=0; extern __shared__ int my2DArray[32][32]; //size need to be coded a development time though my2DArray[threadIdx.x][threadIdx.y] = flatArray[blockDim.x * threadIdx.y + threadIdx.x]; }*/ __global__ void read2darray(int *devPtr,int pitch) { int elements[2][2]; for (int r = 0; r < 2; ++r) { int* row = (int*)((char*)devPtr + r * pitch); for (int c = 0; c < 2; ++c) { elements[r][c] = row[c]; } } } __global__ void check_bool(bool *d_bool) { d_bool[0]=false; d_bool[1]=false; } void print_huffman() { printf(" \n Huffman after copying back \n " ); unsigned char input_char1; unsigned char input_char2; unsigned char input_char3; unsigned char input_char4; input_char1 = h_input[0]; input_char2 = h_input[1]; input_char3 = h_input[2]; input_char4 = h_input[3]; for (int i=0;i < MAX_CHAR-1;i++) { if(huffman_check[ input_char1*255+i]!= -1 ) printf ("\t%c code is %d \n", input_char1,huffman_check[ input_char1*255+i]); } for (int i=0;i < MAX_CHAR-1;i++) { if(huffman_check[ input_char2*255+i]!= -1) printf ("\t%c code is %d \n",input_char2, huffman_check[ input_char2*255+i]); } for (int i=0;i < MAX_CHAR-1;i++) { if(huffman_check[ input_char3*255+i]!= -1 ) printf ("\t%c code is %d \n", input_char3,huffman_check[ input_char3*255+i]); } for (int i=0;i < MAX_CHAR-1;i++) { if(huffman_check[ input_char4*255+i]!= -1 ) printf ("\t%c code is %d \n", input_char4,huffman_check[ input_char4*255+i]); } } int main(int argc, char* argv[]) { int *finalsize_cpu=0; unsigned char end_of_file = 255; printf("start\n"); initialize(); cudaEvent_t start, stop; // cuda events to measure time float elapsed_time,elapsed_time_Cont; cudaEventCreate(&start); // timing objects cudaEventCreate(&stop); unsigned int timer2=0; time_t seconds; // In initialize in cpu,we put the file chars into array, fill huffman table and char_freq_arrays //copy the input contents into an array cudaMalloc((void **)&d_input,number_of_char*sizeof(char)); checkCUDAError("Error in allocating d_input"); cudaMemcpy(d_input,h_input,number_of_char*sizeof(char),cudaMemcpyHostToDevice); checkCUDAError("Error in copying d_input"); // Allocate space for the compressed file to be used in GPU cudaMalloc((void **)&compressedfile_array,number_of_char*(MAX_CHAR -1)*sizeof(bool)); checkCUDAError("Error in allocating compressedfile_array"); // cudaMalloc((void **)&d_char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1) * sizeof(int)); checkCUDAError("Error in allocating d_char_huffman_table"); cudaMemcpy(d_char_huffman_table,char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1) * sizeof(int),cudaMemcpyHostToDevice); checkCUDAError("Error in copying d_char_huffman_table"); cudaMemcpy(huffman_check,d_char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1) * sizeof(int),cudaMemcpyDeviceToHost); checkCUDAError("Error in copying back"); cudaMalloc((void **)&block_cntr_array,number_of_char*sizeof(int)); checkCUDAError("Error in allocating block_cntr_array"); cudaMalloc((void **)&d_last_byte_padding,sizeof(int)); checkCUDAError("Error in allocating d_last_byte_padding"); cudaMalloc((void **)&finalsize,sizeof(int)); checkCUDAError("Error in allocating finalsize"); cudaMalloc((void **)&orig_number_of_char,sizeof(int)); checkCUDAError("Error in allocating orig_number_of_char"); cudaMemcpy(orig_number_of_char,&number_of_char,sizeof(int),cudaMemcpyHostToDevice); checkCUDAError("Error in copying orig_number_of_char"); // check if i can make a boolean array h_bool=(bool *) malloc(2*sizeof(bool)); h_bool[0]=true; h_bool[1]=true; printf("bool1 is %d and bool2 is %d \n",h_bool[0],h_bool[1]); cudaMalloc((void **)&d_bool,2*sizeof(bool)); checkCUDAError("Error in d_bool"); cudaMemcpy(d_bool,h_bool,2*sizeof(bool),cudaMemcpyHostToDevice); checkCUDAError("Error in copying d_bool"); //check_bool<<<1,1>>>(d_bool); checkCUDAError("Error in kernel changing d_bool"); cudaThreadSynchronize(); checkCUDAError("Error in cudaThreadSynchronize"); cudaMemcpy(h_bool,d_bool,2*sizeof(bool),cudaMemcpyDeviceToHost); checkCUDAError("Error in copying d_bool back"); printf("Now bool1 is %d and bool2 is %d \n",h_bool[0],h_bool[1]); int checkhuff[2][3]= { {0, 0, 0}, {1, 1, 1} }; bool flag = true; for(int j=0;j<2;j++) { flag = true; for(int k=0;k<2;k++) { printf("h_bool is %d \t checkhuff is %d \n",int(h_bool[k]),checkhuff[j][k]); if(checkhuff[j][k] != int(h_bool[k])) { flag = false; break; } } if(flag == true) { printf("pattern for %d is found\n",checkhuff[j][0]); } } //copy and send the huffman table as a 2d array to GPU Device //int *darray=0; //size_t pitch; //cudaMallocPitch( (void**)&darray, &pitch, 2 * sizeof(int), 2); //cudaMemcpy2D(darray,pitch,harray,2*sizeof(int),2*sizeof(int),2,cudaMemcpyHostToDevice); //cudaMalloc((void **)&darray,4*sizeof(int)); //cudaMemcpy(darray,harray,4*sizeof(int),cudaMemcpyHostToDevice); //cudaMemcpy2D(copiedarray,2*sizeof(int),darray,pitch,pitch,2,cudaMemcpyDeviceToHost); // cudaMemcpy2D(copiedarray,2*sizeof(int),darray,pitch,2*sizeof(int),2,cudaMemcpyDeviceToHost); //printf("After copying back %d, \t %d, \t %d, \t %d \n",copiedarray[0][0],copiedarray[0][1],copiedarray[1][0],copiedarray[1][1]); //int *darray_2d=0; //cudaMalloc((void **)&darray_2d,4*sizeof(int)); //cudaMemcpy(darray,harray,4*sizeof(int),cudaMemcpyHostToDevice); // read2darray<<<1,1>>>(darray, pitch); //size_t pitch2; //cudaMallocPitch( (void**)&d_char_huffman_table, &pitch2, (MAX_CHAR-1) * sizeof(int), MAX_CHAR); //cudaMemcpy2D(d_char_huffman_table,pitch2,char_huffman_table,(MAX_CHAR-1) * sizeof(int),(MAX_CHAR-1) * sizeof(int),MAX_CHAR,cudaMemcpyHostToDevice); //cudaMemcpy2D(char_huffman_table_gpu,(MAX_CHAR-1) * sizeof(int),char_huffman_table,(MAX_CHAR-1) * sizeof(int),(MAX_CHAR-1) * sizeof(int),MAX_CHAR,cudaMemcpyHostToDevice); //checkCUDAError("Error in char_huffman_table_gpu"); //cudaMemcpy2D(copiedarray2,(MAX_CHAR-1)*sizeof(int),d_char_huffman_table,pitch2,(MAX_CHAR-1)*sizeof(int),MAX_CHAR,cudaMemcpyDeviceToHost); //cudaMemcpy2D(copiedarray2,(MAX_CHAR-1)*sizeof(int),char_huffman_table_gpu,(MAX_CHAR-1) * sizeof(int),(MAX_CHAR-1) * sizeof(int),MAX_CHAR,cudaMemcpyDeviceToHost); //cudaMemcpy(orig_number_of_char,&number_of_char,sizeof(int),cudaMemcpyHostToDevice); // checkCUDAError("Error in copiedarray2"); // print_dchar_huffman_table(); printf("\n the number of characters in the input file is %d \n",number_of_char); getchar(); /*for(int i=0;i<number_of_char;i++) { if( h_input[i] == end_of_file ) printf(" EOF \n"); printf(" Copying into array: i is %d and c is %c \n",i,h_input[i]); }*/ getchar(); print_huffman(); int no_of_blocks = (number_of_char + BLOCK_SIZE -1)/BLOCK_SIZE; printf("no_of_blocksis %d \n", no_of_blocks); if(no_of_blocks == 0) no_of_blocks =1; //compress_file_gpu<<<number_of_char,1>>>(d_input,compressedfile_array,d_char_huffman_table,block_cntr_array,d_last_byte_padding); cudaEventRecord(start, 0); // start time checkCUDAError("Error in cudaEventRecord start \n"); compress_file_gpu<<<no_of_blocks,BLOCK_SIZE>>>(d_input,compressedfile_array,d_char_huffman_table,block_cntr_array,d_last_byte_padding,finalsize,orig_number_of_char,number_of_char); checkCUDAError("Error in compress_file_gpu \n"); cudaThreadSynchronize(); //cudaMalloc((void **)&block_cntr_array_check,number_of_char*sizeof(int)); //checkCUDAError("Error in allocating block_cntr_array_check"); block_cntr_array_check = (int *) malloc(number_of_char*sizeof(int)); cudaMemcpy(block_cntr_array_check,block_cntr_array,number_of_char*sizeof(int),cudaMemcpyDeviceToHost); checkCUDAError("Error in copying back block_cntr_array_check"); for(int i=0; i < number_of_char; i++) { printf(" block size for i = %d is %d \n",i, block_cntr_array_check[i]); } // computearray_size<<<1,1>>>(block_cntr_array,finalsize,orig_number_of_char); checkCUDAError("Error in Compute array \n"); finalsize_cpu = (int *)malloc(sizeof(int)); cudaMemcpy(finalsize_cpu,finalsize,sizeof(int),cudaMemcpyDeviceToHost); printf("The final compressed array size is %d \n ", *finalsize_cpu); checkCUDAError("Error in finalsize_cpu"); int block = *finalsize_cpu; //allocate space for the final compressed array cudaMalloc((void **)&finalcompressed_array,((*finalsize_cpu)*sizeof(bool))); checkCUDAError("cudaMemcpyHostToDevice"); final_compression<<<no_of_blocks,BLOCK_SIZE>>>(block_cntr_array,compressedfile_array,finalcompressed_array,number_of_char); checkCUDAError("Error in final_compression call \n"); cudaThreadSynchronize(); checkCUDAError("Error in cudaThreadSynchronize \n"); cudaEventRecord(stop, 0); checkCUDAError("Error in cudaEventRecord stop \n"); cudaEventSynchronize(stop); cudaEventElapsedTime(&elapsed_time, start, stop); printf("Time to calculate results: %f ms.\n", elapsed_time); // print out execution time bool *final_compressed_cpu=0; final_compressed_cpu = (bool *)malloc((*finalsize_cpu)*sizeof(bool)); cudaMemcpy(final_compressed_cpu,finalcompressed_array,((*finalsize_cpu)*sizeof(bool)),cudaMemcpyDeviceToHost); checkCUDAError("Error in copying final_compressed_cpu\n"); //print_gpu_compressed_file(final_compressed_cpu,*finalsize_cpu); printf("The compressed value in binary is "); write_GPU_compressed(final_compressed_cpu,finalsize_cpu); for(int i=0;i<*finalsize_cpu;i++) // sprintf(compress_file+i,final_compressed_cpu[i]); //printf("i is %d and val is %d \n",i,final_compressed_cpu[i]); printf("\n"); // cudaMalloc((void **)&d_char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1)*sizeof(int)); // cudaMemcpy(d_char_huffman_table,char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1)*sizeof(int),cudaMemcpyHostToDevice); // printf("\n Going to compress on the GPU "); // compress<<<number_of_char,1>>>(d_input,number_of_char,d_char_huffman_table,MAX_CHAR); //test ends printf("compressing on CPU...\n"); //timer2=0; // CUT_SAFE_CALL(cutCreateTimer(&timer2)); //CUT_SAFE_CALL(cutStartTimer(timer2)); /*clock_t Linuxclock_start,Linuxclock_end; // clock return type cudaEvent_t CUDAevent_start, CUDAevent_end; float CUDAEvents_time; cudaEventRecord(CUDAevent_start, 0 ); cudaEventSynchronize(CUDAevent_start); Linuxclock_start = clock();*/ /*time_t before,after; before = time (NULL);*/ clock_t start1, stop1; start1 = clock(); compress_file(); stop1 = clock(); float elapsedTime = (float)(stop1 - start1) / (float)CLOCKS_PER_SEC * 1000.0f; printf( "Time in cpu : %3.1f ms\n", elapsedTime ); printf("Time to calculate results: %f ms.\n", elapsed_time); // print out execution time printf("Speedup achieved is %lf \n", elapsedTime/elapsed_time ); /*after = time (NULL); double dif; dif = difftime (after,before); printf ("It took you %.9lf seconds to type your name.\n", dif );*/ /*Linuxclock_end = clock(); cudaEventRecord(CUDAevent_end, 0 ); // instrument code to measure end time cudaEventSynchronize(CUDAevent_end); cudaEventElapsedTime(&CUDAEvents_time, CUDAevent_start, CUDAevent_end); printf("CPU Time using CUDA events: %f ms\n", CUDAEvents_time); // time_CUDAEvents is in ms printf("CPU Time using Linux clock: %f ms\n", ((double) (Linuxclock_end - Linuxclock_start) * 1000)/CLOCKS_PER_SEC); //Linuxclock in sec cudaEventDestroy(CUDAevent_start); cudaEventDestroy(CUDAevent_end);*/ //CUT_SAFE_CALL(cutStopTimer(timer2)); //float time2=cutGetAverageTimerValue(timer2); //printf(" Time on Host %f\n", time2); printf("decompressing on CPU...\n"); decompress_file(); getchar(); return 0; }
.file "tmpxft_0024e64e_00000000-6_gpulab1_1.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2048: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2048: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "Cuda error: %s: %s.\n" .LC1: .string "\nPress ENTER to exit...\n" .text .globl _Z14checkCUDAErrorPKc .type _Z14checkCUDAErrorPKc, @function _Z14checkCUDAErrorPKc: .LFB2027: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx call cudaGetLastError@PLT testl %eax, %eax je .L2 movl %eax, %edi call cudaGetErrorString@PLT movq %rbx, %rdx movl $2, %edi leaq .LC0(%rip), %rsi movq %rax, %rcx xorl %eax, %eax call __printf_chk@PLT movl $2, %edi leaq .LC1(%rip), %rsi xorl %eax, %eax call __printf_chk@PLT call getchar@PLT orl $-1, %edi call exit@PLT .L2: popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc .globl _Z17computearray_sizePiS_S_ .type _Z17computearray_sizePiS_S_, @function _Z17computearray_sizePiS_S_: .LFB2028: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2028: .size _Z17computearray_sizePiS_S_, .-_Z17computearray_sizePiS_S_ .section .rodata.str1.1 .LC2: .string "wb" .LC3: .string "compressed_gpu.txt" .LC4: .string "Error reading file" .LC5: .string "Compressed char in decimal is %d \n" .text .globl _Z20write_GPU_compressedPbPi .type _Z20write_GPU_compressedPbPi, @function _Z20write_GPU_compressedPbPi: .LFB2029: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rdi, %r13 leaq .LC3(%rip), %rdi pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movq %rsi, %r12 leaq .LC2(%rip), %rsi pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 pushq %rdx .cfi_def_cfa_offset 64 call fopen@PLT movq %rax, %rbp testq %rax, %rax jne .L15 leaq .LC4(%rip), %rdi xorl %r15d, %r15d call perror@PLT jmp .L10 .L15: xorl %ebx, %ebx xorl %eax, %eax leaq .LC5(%rip), %r14 xorl %r15d, %r15d .L9: cmpl %ebx, (%r12) jle .L17 incl %r15d addl %eax, %eax orb 0(%r13,%rbx), %al cmpl $8, %r15d jne .L11 movzbl %al, %r15d movq %r14, %rsi movl $2, %edi xorl %eax, %eax movl %r15d, %edx call __printf_chk@PLT movl %r15d, %edi movq %rbp, %rsi xorl %r15d, %r15d call putc@PLT xorl %eax, %eax .L11: incq %rbx jmp .L9 .L17: testl %r15d, %r15d je .L10 movl $8, %ecx movzbl %al, %ebx movl $2, %edi xorl %eax, %eax subl %r15d, %ecx leaq .LC5(%rip), %rsi sall %cl, %ebx movzbl %bl, %ebx movl %ebx, %edx call __printf_chk@PLT movq %rbp, %rsi movl %ebx, %edi call putc@PLT .L10: movq %rbp, %rdi call fclose@PLT movl %r15d, last_byte_padding_gpu(%rip) popq %rax .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size _Z20write_GPU_compressedPbPi, .-_Z20write_GPU_compressedPbPi .section .rodata.str1.1 .LC6: .string "\n dchar huffman table " .LC7: .string "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n" .LC8: .string "Huffman table:\n" .LC9: .string "\\n:\t" .LC10: .string "%c:\t" .LC11: .string "%d " .LC12: .string "\n" .text .globl _Z25print_dchar_huffman_tablev .type _Z25print_dchar_huffman_tablev, @function _Z25print_dchar_huffman_tablev: .LFB2030: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 leaq .LC6(%rip), %rsi movl $2, %edi xorl %eax, %eax pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 leaq .LC11(%rip), %r15 leaq copiedarray2(%rip), %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 leaq .LC7(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 xorl %ebx, %ebx pushq %rdx .cfi_def_cfa_offset 64 call __printf_chk@PLT call getchar@PLT movq %r12, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT leaq .LC8(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq %r12, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L19: movq %r14, %rbp movl $255, %r13d xorl %eax, %eax .L23: cmpl $-1, 0(%rbp) je .L20 testb %al, %al jne .L21 cmpl $10, %ebx jne .L22 leaq .LC9(%rip), %rsi movl $2, %edi call __printf_chk@PLT jmp .L21 .L22: movl %ebx, %edx leaq .LC10(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L21: movl 0(%rbp), %edx movq %r15, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movb $1, %al .L20: addq $4, %rbp decl %r13d jne .L23 testb %al, %al je .L24 leaq .LC12(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L24: incl %ebx addq $1020, %r14 cmpl $256, %ebx jne .L19 movq %r12, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT popq %rax .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp getchar@PLT .cfi_endproc .LFE2030: .size _Z25print_dchar_huffman_tablev, .-_Z25print_dchar_huffman_tablev .globl _Z14insertion_sortPP4nodei .type _Z14insertion_sortPP4nodei, @function _Z14insertion_sortPP4nodei: .LFB2031: .cfi_startproc endbr64 movl $1, %ecx .L32: cmpl %ecx, %esi jle .L37 movq (%rdi,%rcx,8), %r8 leaq -1(%rcx), %rax movl 4(%r8), %r9d .L35: movq (%rdi,%rax,8), %rdx cmpl %r9d, 4(%rdx) jge .L33 movq %rdx, 8(%rdi,%rax,8) decq %rax movl %eax, %edx cmpl $-1, %eax jne .L35 jmp .L34 .L33: movl %eax, %edx .L34: incl %edx incq %rcx movslq %edx, %rdx movq %r8, (%rdi,%rdx,8) jmp .L32 .L37: ret .cfi_endproc .LFE2031: .size _Z14insertion_sortPP4nodei, .-_Z14insertion_sortPP4nodei .section .rodata.str1.1 .LC13: .string "character frequency:\n" .LC14: .string "%d)\tval: \\n\tfreq: %d\n" .LC15: .string "%d)\tval: %c\tfreq: %d\n" .text .globl _Z20print_char_frequencyv .type _Z20print_char_frequencyv, @function _Z20print_char_frequencyv: .LFB2032: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movl $2, %edi xorl %eax, %eax leaq char_frequency(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 leaq .LC7(%rip), %rbp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movq %rbp, %rsi xorl %ebx, %ebx call __printf_chk@PLT leaq .LC13(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq %rbp, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L43: movl (%r12,%rbx,4), %r8d testl %r8d, %r8d je .L39 cmpq $10, %rbx jne .L40 movl %r8d, %ecx movl $10, %edx movl $2, %edi xorl %eax, %eax leaq .LC14(%rip), %rsi movl $11, %ebx call __printf_chk@PLT jmp .L43 .L40: movl %ebx, %edx movl %ebx, %ecx leaq .LC15(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L39: incq %rbx cmpq $256, %rbx jne .L43 popq %rbx .cfi_def_cfa_offset 24 movq %rbp, %rsi movl $2, %edi popq %rbp .cfi_def_cfa_offset 16 xorl %eax, %eax popq %r12 .cfi_def_cfa_offset 8 jmp __printf_chk@PLT .cfi_endproc .LFE2032: .size _Z20print_char_frequencyv, .-_Z20print_char_frequencyv .globl _Z24print_char_huffman_tablev .type _Z24print_char_huffman_tablev, @function _Z24print_char_huffman_tablev: .LFB2033: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl $2, %edi xorl %eax, %eax leaq .LC11(%rip), %r15 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 leaq char_huffman_table(%rip), %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 leaq .LC7(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movq %r12, %rsi pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 xorl %ebx, %ebx pushq %rcx .cfi_def_cfa_offset 64 call __printf_chk@PLT leaq .LC8(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq %r12, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L49: movq %r14, %rbp movl $255, %r13d xorl %eax, %eax .L53: cmpl $-1, 0(%rbp) je .L50 testb %al, %al jne .L51 cmpl $10, %ebx jne .L52 leaq .LC9(%rip), %rsi movl $2, %edi call __printf_chk@PLT jmp .L51 .L52: movl %ebx, %edx leaq .LC10(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L51: movl 0(%rbp), %edx movq %r15, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movb $1, %al .L50: addq $4, %rbp decl %r13d jne .L53 testb %al, %al je .L54 leaq .LC12(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L54: incl %ebx addq $1020, %r14 cmpl $256, %ebx jne .L49 popq %rdx .cfi_def_cfa_offset 56 movq %r12, %rsi popq %rbx .cfi_def_cfa_offset 48 movl $2, %edi popq %rbp .cfi_def_cfa_offset 40 xorl %eax, %eax popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp __printf_chk@PLT .cfi_endproc .LFE2033: .size _Z24print_char_huffman_tablev, .-_Z24print_char_huffman_tablev .section .rodata.str1.1 .LC16: .string "weight: %d\tvalue: \\n\n" .LC17: .string "weight: %d\tvalue: %c\n" .LC18: .string "weight: %d\tvalue: NULL\n" .text .globl _Z16printout_inorderP4node .type _Z16printout_inorderP4node, @function _Z16printout_inorderP4node: .LFB2034: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 leaq .LC18(%rip), %rbp pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 movq %rdi, %rbx pushq %rdx .cfi_def_cfa_offset 32 .L66: movq 16(%rbx), %rdi testq %rdi, %rdi je .L62 call _Z16printout_inorderP4node .L62: movl (%rbx), %ecx movl 4(%rbx), %edx testl %ecx, %ecx je .L63 leaq .LC16(%rip), %rsi cmpl $10, %ecx je .L72 leaq .LC17(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L65 .L63: movq %rbp, %rsi .L72: movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L65: movq 8(%rbx), %rbx testq %rbx, %rbx jne .L66 popq %rax .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2034: .size _Z16printout_inorderP4node, .-_Z16printout_inorderP4node .section .rodata.str1.1 .LC19: .string "r" .LC20: .string "input.txt" .text .globl _Z9read_filev .type _Z9read_filev, @function _Z9read_filev: .LFB2035: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 leaq .LC19(%rip), %rsi leaq .LC20(%rip), %rdi pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 pushq %rcx .cfi_def_cfa_offset 32 call fopen@PLT testq %rax, %rax jne .L74 leaq .LC4(%rip), %rdi call perror@PLT jmp .L75 .L74: movl $50000, %edi movq %rax, %rbx leaq char_frequency(%rip), %rbp call malloc@PLT movq %rax, h_input(%rip) .L76: movq %rbx, %rdi call getc@PLT movslq number_of_char(%rip), %rdx movq h_input(%rip), %rcx movb %al, (%rcx,%rdx) movzbl %al, %edx incl number_of_char(%rip) incl 0(%rbp,%rdx,4) incb %al jne .L76 movq %rbx, %rdi call fclose@PLT .L75: xorl %eax, %eax decl number_of_char(%rip) movl %eax, 1020+char_frequency(%rip) popq %rdx .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2035: .size _Z9read_filev, .-_Z9read_filev .globl _Z17traverse_preorderP4nodePi .type _Z17traverse_preorderP4nodePi, @function _Z17traverse_preorderP4nodePi: .LFB2036: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movq %rdi, %rbp subq $24, %rsp .cfi_def_cfa_offset 48 cmpl $0, (%rdi) je .L80 xorl %eax, %eax leaq char_huffman_table(%rip), %rcx .L81: movslq 0(%rbp), %rdx movl (%rsi,%rax,4), %r8d movslq %eax, %rdi incq %rax imulq $255, %rdx, %rdx addq %rdi, %rdx movl %r8d, (%rcx,%rdx,4) cmpq $255, %rax jne .L81 .L80: movq 16(%rbp), %rdi testq %rdi, %rdi je .L82 xorl %eax, %eax .L84: cmpl $-1, (%rsi,%rax,4) je .L85 incq %rax cmpq $255, %rax jne .L84 .L85: cltq movq %rsi, 8(%rsp) leaq (%rsi,%rax,4), %r12 movl $1, (%r12) call _Z17traverse_preorderP4nodePi movl $-1, (%r12) movq 8(%rsp), %rsi .L82: movq 8(%rbp), %rdi testq %rdi, %rdi je .L79 xorl %eax, %eax .L88: cmpl $-1, (%rsi,%rax,4) je .L89 incq %rax cmpq $255, %rax jne .L88 .L89: cltq leaq (%rsi,%rax,4), %rbp xorl %eax, %eax movl %eax, 0(%rbp) call _Z17traverse_preorderP4nodePi movl $-1, 0(%rbp) .L79: addq $24, %rsp .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2036: .size _Z17traverse_preorderP4nodePi, .-_Z17traverse_preorderP4nodePi .globl _Z23construct_huffman_tableP4node .type _Z23construct_huffman_tableP4node, @function _Z23construct_huffman_tableP4node: .LFB2037: .cfi_startproc endbr64 subq $1048, %rsp .cfi_def_cfa_offset 1056 movq %rdi, %rdx movl $1020, %ecx movq %fs:40, %rax movq %rax, 1032(%rsp) xorl %eax, %eax leaq 12(%rsp), %rsi movb $-1, %al movq %rsi, %rdi rep stosb movq %rdx, %rdi call _Z17traverse_preorderP4nodePi movq 1032(%rsp), %rax subq %fs:40, %rax je .L101 call __stack_chk_fail@PLT .L101: addq $1048, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2037: .size _Z23construct_huffman_tableP4node, .-_Z23construct_huffman_tableP4node .section .rodata.str1.1 .LC21: .string "Huffman tree (inorder traversal sequence):\n" .text .globl _Z17build_binary_treev .type _Z17build_binary_treev, @function _Z17build_binary_treev: .LFB2038: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 leaq char_frequency(%rip), %r13 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 xorl %ebp, %ebp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 xorl %ebx, %ebx subq $2072, %rsp .cfi_def_cfa_offset 2112 movq %fs:40, %rax movq %rax, 2056(%rsp) xorl %eax, %eax .L105: movl 0(%r13,%rbp,4), %r12d testl %r12d, %r12d je .L104 movl $24, %edi call malloc@PLT xorl %esi, %esi movslq %ebx, %rdx incl %ebx movq %rsi, 8(%rax) movq %rsi, 16(%rax) movl %ebp, (%rax) movl %r12d, 4(%rax) movq %rax, 8(%rsp,%rdx,8) .L104: incq %rbp cmpq $256, %rbp jne .L105 leaq 8(%rsp), %rbp movl %ebx, %esi movslq %ebx, %rbx movq %rbp, %rdi call _Z14insertion_sortPP4nodei .L106: decq %rbx leal 1(%rbx), %eax decl %eax jle .L115 movl $24, %edi call malloc@PLT movq 0(%rbp,%rbx,8), %rcx movl %ebx, %esi movq %rbp, %rdi movq -8(%rbp,%rbx,8), %rdx movq %rax, -8(%rbp,%rbx,8) movq %rcx, 8(%rax) movq %rdx, 16(%rax) movl 4(%rdx), %edx addl 4(%rcx), %edx xorl %ecx, %ecx movl %edx, 4(%rax) xorl %edx, %edx movl %edx, (%rax) movq %rcx, 0(%rbp,%rbx,8) call _Z14insertion_sortPP4nodei jmp .L106 .L115: leaq .LC7(%rip), %rbx movl $2, %edi xorl %eax, %eax movq %rbx, %rsi call __printf_chk@PLT leaq .LC21(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq %rbx, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq 8(%rsp), %rbp movq %rbp, %rdi call _Z16printout_inorderP4node xorl %eax, %eax movq %rbx, %rsi movl $2, %edi call __printf_chk@PLT movq 2056(%rsp), %rax subq %fs:40, %rax je .L108 call __stack_chk_fail@PLT .L108: addq $2072, %rsp .cfi_def_cfa_offset 40 movq %rbp, %rdi popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 jmp _Z23construct_huffman_tableP4node .cfi_endproc .LFE2038: .size _Z17build_binary_treev, .-_Z17build_binary_treev .globl _Z17array_initializerv .type _Z17array_initializerv, @function _Z17array_initializerv: .LFB2039: .cfi_startproc endbr64 leaq char_frequency(%rip), %rdx xorl %eax, %eax movl $256, %ecx movq %rdx, %rdi leaq char_huffman_table(%rip), %rdx rep stosl movl $261120, %ecx movb $-1, %al movq %rdx, %rdi rep stosb ret .cfi_endproc .LFE2039: .size _Z17array_initializerv, .-_Z17array_initializerv .section .rodata.str1.1 .LC22: .string "rb" .LC23: .string "compressed.txt" .text .globl _Z13compress_filev .type _Z13compress_filev, @function _Z13compress_filev: .LFB2040: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 leaq .LC22(%rip), %rsi leaq .LC20(%rip), %rdi pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $24, %rsp .cfi_def_cfa_offset 80 call fopen@PLT leaq .LC2(%rip), %rsi leaq .LC23(%rip), %rdi movq %rax, %r12 call fopen@PLT testq %r12, %r12 je .L130 movq %rax, %rbp xorl %ebx, %ebx leaq char_huffman_table(%rip), %r14 xorl %edx, %edx testq %rax, %rax jne .L118 .L130: addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 56 leaq .LC4(%rip), %rdi popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp perror@PLT .L122: .cfi_restore_state incb %r15b je .L135 .L118: movq %r12, %rdi movb %dl, 15(%rsp) call getc@PLT movb 15(%rsp), %dl movzbl %al, %r13d movl %eax, %r15d imulq $1020, %r13, %r13 leaq 0(%r13,%r14), %rax xorl %r13d, %r13d movq %rax, (%rsp) .L127: movq (%rsp), %rax movl (%rax,%r13,4), %eax testl %eax, %eax jne .L120 addl %edx, %edx jmp .L134 .L120: decl %eax jne .L122 leal 1(%rdx,%rdx), %edx .L134: incl %ebx cmpl $8, %ebx jne .L126 movzbl %dl, %ebx leaq .LC5(%rip), %rsi movl $2, %edi xorl %eax, %eax movl %ebx, %edx call __printf_chk@PLT movl %ebx, %edi movq %rbp, %rsi xorl %ebx, %ebx call putc@PLT xorl %edx, %edx jmp .L126 .L135: testl %ebx, %ebx movzbl %dl, %r13d leaq .LC5(%rip), %rsi je .L124 movl $8, %ecx movl %r13d, %edx subl %ebx, %ecx sall %cl, %edx movzbl %dl, %r13d .L124: movl %r13d, %edx movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq %rbp, %rsi movl %r13d, %edi call putc@PLT jmp .L128 .L126: incq %r13 cmpq $255, %r13 jne .L127 incb %r15b jne .L118 .L128: movq %r12, %rdi call fclose@PLT movq %rbp, %rdi call fclose@PLT movl %ebx, last_byte_padding(%rip) addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2040: .size _Z13compress_filev, .-_Z13compress_filev .section .rodata.str1.1 .LC24: .string "i is %d and c is %c" .text .globl _Z25print_gpu_compressed_filePci .type _Z25print_gpu_compressed_filePci, @function _Z25print_gpu_compressed_filePci: .LFB2041: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 leaq .LC24(%rip), %r15 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rdi, %r13 leaq .LC3(%rip), %rdi pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movl %esi, %r12d leaq .LC2(%rip), %rsi pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 xorl %ebx, %ebx pushq %rdx .cfi_def_cfa_offset 64 call fopen@PLT movq %rax, %rbp .L137: movl %ebx, %edx cmpl %ebx, %r12d jle .L140 movsbl 0(%r13,%rbx), %r14d movq %r15, %rsi movl $2, %edi xorl %eax, %eax incq %rbx movl %r14d, %ecx call __printf_chk@PLT movq %rbp, %rsi movl %r14d, %edi call putc@PLT jmp .L137 .L140: popq %rax .cfi_def_cfa_offset 56 movq %rbp, %rdi popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp fclose@PLT .cfi_endproc .LFE2041: .size _Z25print_gpu_compressed_filePci, .-_Z25print_gpu_compressed_filePci .section .rodata.str1.1 .LC25: .string "decompressed.txt" .text .globl _Z15decompress_filev .type _Z15decompress_filev, @function _Z15decompress_filev: .LFB2042: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl $1020, %ecx leaq .LC22(%rip), %rsi pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $1080, %rsp .cfi_def_cfa_offset 1136 movq %fs:40, %rax movq %rax, 1064(%rsp) xorl %eax, %eax leaq 44(%rsp), %r12 movb $-1, %al movq %r12, %rdi rep stosb leaq .LC23(%rip), %rdi call fopen@PLT leaq .LC2(%rip), %rsi leaq .LC25(%rip), %rdi movq %rax, 8(%rsp) call fopen@PLT cmpq $0, 8(%rsp) movq %rax, 16(%rsp) sete %al cmpq $0, 16(%rsp) sete %dl orb %dl, %al je .L142 movq 1064(%rsp), %rax subq %fs:40, %rax jne .L167 addq $1080, %rsp .cfi_remember_state .cfi_def_cfa_offset 56 leaq .LC4(%rip), %rdi popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp perror@PLT .L142: .cfi_restore_state movq 8(%rsp), %rdi movb $1, %r13b xorl %ebp, %ebp xorl %ebx, %ebx call getc@PLT movq 8(%rsp), %rdi movl %eax, %r15d call getc@PLT orl $-1, %esi movl %eax, %r14d .L153: movl %r15d, %eax incl %esi orl $127, %eax movb %al, 27(%rsp) cmpl $7, %ebp jne .L144 movl %r14d, %r10d testb %r13b, %r13b je .L145 movq 8(%rsp), %rdi movl %esi, 28(%rsp) call getc@PLT movl 28(%rsp), %esi movl %eax, %r10d incb %al jne .L145 movl number_of_char(%rip), %eax subl %ebx, %eax cmpl $7, %eax jg .L145 cmpb $-1, %r14b je .L146 subl last_byte_padding(%rip), %ebp xorl %r13d, %r13d jmp .L147 .L145: xorl %ebp, %ebp cmpb $-1, %r14b jne .L147 movl number_of_char(%rip), %eax subl %ebx, %eax cmpl $7, %eax jg .L147 jmp .L146 .L144: movl %r14d, %r10d incl %ebp leal (%r15,%r15), %r14d .L147: xorl %ecx, %ecx cmpb $-1, 27(%rsp) movslq %esi, %rax sete %cl xorl %edi, %edi movl %ecx, 44(%rsp,%rax,4) leaq char_huffman_table(%rip), %rax .L148: xorl %r15d, %r15d .L150: movl (%r12,%r15), %edx cmpl %edx, (%rax,%r15) jne .L149 addq $4, %r15 cmpq $1020, %r15 jne .L150 movq 16(%rsp), %rsi movb %r10b, 27(%rsp) incl %ebx call putc@PLT movq %r12, %rdi movq %r15, %rcx movb $-1, %al rep stosb movb 27(%rsp), %r10b orl $-1, %esi jmp .L151 .L149: incl %edi addq $1020, %rax cmpl $256, %edi jne .L148 cmpl $255, %esi je .L146 .L151: movl %r14d, %r15d movl %r10d, %r14d jmp .L153 .L146: movq 8(%rsp), %rdi call fclose@PLT movq 1064(%rsp), %rax subq %fs:40, %rax je .L154 .L167: call __stack_chk_fail@PLT .L154: movq 16(%rsp), %rdi addq $1080, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp fclose@PLT .cfi_endproc .LFE2042: .size _Z15decompress_filev, .-_Z15decompress_filev .globl _Z10initializev .type _Z10initializev, @function _Z10initializev: .LFB2043: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 call _Z17array_initializerv call _Z9read_filev call _Z20print_char_frequencyv call _Z17build_binary_treev popq %rdx .cfi_def_cfa_offset 8 jmp _Z24print_char_huffman_tablev .cfi_endproc .LFE2043: .size _Z10initializev, .-_Z10initializev .section .rodata.str1.1 .LC26: .string " \n Huffman after copying back \n " .LC27: .string "\t%c code is %d \n" .text .globl _Z13print_huffmanv .type _Z13print_huffmanv, @function _Z13print_huffmanv: .LFB2044: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl $2, %edi leaq .LC26(%rip), %rsi xorl %eax, %eax pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 leaq .LC27(%rip), %r15 xorl %r14d, %r14d pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $24, %rsp .cfi_def_cfa_offset 80 call __printf_chk@PLT movq h_input(%rip), %rdx movzbl (%rdx), %edi movzbl 1(%rdx), %r12d movzbl 2(%rdx), %ebp movzbl 3(%rdx), %ebx movl %edi, 12(%rsp) imulq $1020, %rdi, %r13 .L172: leaq 0(,%r14,4), %rax addq huffman_check(%rip), %rax movl (%rax,%r13), %ecx cmpl $-1, %ecx je .L171 movl 12(%rsp), %edx movq %r15, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L171: incq %r14 cmpq $255, %r14 jne .L172 movzbl %r12b, %r13d imulq $1020, %r12, %r12 xorl %r14d, %r14d leaq .LC27(%rip), %r15 .L174: leaq 0(,%r14,4), %rax addq huffman_check(%rip), %rax movl (%rax,%r12), %ecx cmpl $-1, %ecx je .L173 movl %r13d, %edx movq %r15, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L173: incq %r14 cmpq $255, %r14 jne .L174 movzbl %bpl, %r13d imulq $1020, %rbp, %rbp xorl %r12d, %r12d leaq .LC27(%rip), %r14 .L176: leaq 0(,%r12,4), %rax addq huffman_check(%rip), %rax movl (%rax,%rbp), %ecx cmpl $-1, %ecx je .L175 movl %r13d, %edx movq %r14, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L175: incq %r12 cmpq $255, %r12 jne .L176 movzbl %bl, %r12d imulq $1020, %rbx, %rbx xorl %ebp, %ebp leaq .LC27(%rip), %r13 .L178: leaq 0(,%rbp,4), %rax addq huffman_check(%rip), %rax movl (%rax,%rbx), %ecx cmpl $-1, %ecx je .L177 movl %r12d, %edx movq %r13, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L177: incq %rbp cmpq $255, %rbp jne .L178 addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2044: .size _Z13print_huffmanv, .-_Z13print_huffmanv .globl _Z43__device_stub__Z17final_compressionPiPbS0_iPiPbS0_i .type _Z43__device_stub__Z17final_compressionPiPbS0_iPiPbS0_i, @function _Z43__device_stub__Z17final_compressionPiPbS0_iPiPbS0_i: .LFB2070: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L196 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z17final_compressionPiPbS0_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L196: movq 136(%rsp), %rax subq %fs:40, %rax je .L198 call __stack_chk_fail@PLT .L198: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2070: .size _Z43__device_stub__Z17final_compressionPiPbS0_iPiPbS0_i, .-_Z43__device_stub__Z17final_compressionPiPbS0_iPiPbS0_i .globl _Z17final_compressionPiPbS0_i .type _Z17final_compressionPiPbS0_i, @function _Z17final_compressionPiPbS0_i: .LFB2071: .cfi_startproc endbr64 jmp _Z43__device_stub__Z17final_compressionPiPbS0_iPiPbS0_i .cfi_endproc .LFE2071: .size _Z17final_compressionPiPbS0_i, .-_Z17final_compressionPiPbS0_i .globl _Z54__device_stub__Z17compress_file_gpuPhPbPiS1_S1_S1_S1_iPhPbPiS1_S1_S1_S1_i .type _Z54__device_stub__Z17compress_file_gpuPhPbPiS1_S1_S1_S1_iPhPbPiS1_S1_S1_S1_i, @function _Z54__device_stub__Z17compress_file_gpuPhPbPiS1_S1_S1_S1_iPhPbPiS1_S1_S1_S1_i: .LFB2072: .cfi_startproc endbr64 subq $216, %rsp .cfi_def_cfa_offset 224 movq 224(%rsp), %rax movq %rdi, 56(%rsp) leaq 88(%rsp), %rdi movq %rsi, 48(%rsp) leaq 100(%rsp), %rsi movq %rdx, 40(%rsp) leaq 72(%rsp), %rdx movq %rcx, 32(%rsp) leaq 80(%rsp), %rcx movq %r8, 24(%rsp) movq %r9, 16(%rsp) movq %rax, 8(%rsp) movq %fs:40, %rax movq %rax, 200(%rsp) xorl %eax, %eax leaq 56(%rsp), %rax movl $1, 96(%rsp) movq %rax, 136(%rsp) leaq 48(%rsp), %rax movq %rax, 144(%rsp) leaq 40(%rsp), %rax movq %rax, 152(%rsp) leaq 32(%rsp), %rax movq %rax, 160(%rsp) leaq 24(%rsp), %rax movq %rax, 168(%rsp) leaq 16(%rsp), %rax movq %rax, 176(%rsp) leaq 8(%rsp), %rax movq %rax, 184(%rsp) leaq 232(%rsp), %rax movq %rax, 192(%rsp) movabsq $4294967297, %rax movq %rax, 88(%rsp) movq %rax, 100(%rsp) movl $1, 108(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L201 pushq 80(%rsp) .cfi_def_cfa_offset 232 leaq _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i(%rip), %rdi pushq 80(%rsp) .cfi_def_cfa_offset 240 movq 116(%rsp), %rcx movl 124(%rsp), %r8d movq 104(%rsp), %rsi movl 112(%rsp), %edx leaq 152(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 232 popq %rdx .cfi_def_cfa_offset 224 .L201: movq 200(%rsp), %rax subq %fs:40, %rax je .L203 call __stack_chk_fail@PLT .L203: addq $216, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2072: .size _Z54__device_stub__Z17compress_file_gpuPhPbPiS1_S1_S1_S1_iPhPbPiS1_S1_S1_S1_i, .-_Z54__device_stub__Z17compress_file_gpuPhPbPiS1_S1_S1_S1_iPhPbPiS1_S1_S1_S1_i .globl _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .type _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i, @function _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i: .LFB2073: .cfi_startproc endbr64 jmp _Z54__device_stub__Z17compress_file_gpuPhPbPiS1_S1_S1_S1_iPhPbPiS1_S1_S1_S1_i .cfi_endproc .LFE2073: .size _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i, .-_Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .section .rodata.str1.1 .LC28: .string "start\n" .LC29: .string "Error in allocating d_input" .LC30: .string "Error in copying d_input" .LC31: .string "Error in allocating compressedfile_array" .LC32: .string "Error in allocating d_char_huffman_table" .LC33: .string "Error in copying d_char_huffman_table" .LC34: .string "Error in copying back" .LC35: .string "Error in allocating block_cntr_array" .LC36: .string "Error in allocating d_last_byte_padding" .LC37: .string "Error in allocating finalsize" .LC38: .string "Error in allocating orig_number_of_char" .LC39: .string "Error in copying orig_number_of_char" .LC40: .string "bool1 is %d and bool2 is %d \n" .LC41: .string "Error in d_bool" .LC42: .string "Error in copying d_bool" .LC43: .string "Error in kernel changing d_bool" .LC44: .string "Error in cudaThreadSynchronize" .LC45: .string "Error in copying d_bool back" .LC46: .string "Now bool1 is %d and bool2 is %d \n" .LC47: .string "h_bool is %d \t checkhuff is %d \n" .LC48: .string "pattern for %d is found\n" .LC49: .string "\n the number of characters in the input file is %d \n" .LC50: .string "no_of_blocksis %d \n" .LC51: .string "Error in cudaEventRecord start \n" .LC52: .string "Error in compress_file_gpu \n" .LC53: .string "Error in copying back block_cntr_array_check" .LC54: .string " block size for i = %d is %d \n" .LC55: .string "Error in Compute array \n" .LC56: .string "The final compressed array size is %d \n " .LC57: .string "Error in finalsize_cpu" .LC58: .string "cudaMemcpyHostToDevice" .LC59: .string "Error in final_compression call \n" .LC60: .string "Error in cudaThreadSynchronize \n" .LC61: .string "Error in cudaEventRecord stop \n" .LC62: .string "Time to calculate results: %f ms.\n" .LC63: .string "Error in copying final_compressed_cpu\n" .LC64: .string "The compressed value in binary is " .LC65: .string "compressing on CPU...\n" .LC68: .string "Time in cpu : %3.1f ms\n" .LC69: .string "Speedup achieved is %lf \n" .LC70: .string "decompressing on CPU...\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2045: .cfi_startproc endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 leaq .LC28(%rip), %rsi movl $2, %edi pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 leaq .LC47(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 subq $96, %rsp .cfi_def_cfa_offset 144 movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 64(%rsp), %rbx leaq 88(%rsp), %r14 call __printf_chk@PLT call _Z10initializev leaq 24(%rsp), %rdi call cudaEventCreate@PLT leaq 32(%rsp), %rdi call cudaEventCreate@PLT movslq number_of_char(%rip), %rsi leaq d_input(%rip), %rdi call cudaMalloc@PLT leaq .LC29(%rip), %rdi call _Z14checkCUDAErrorPKc movslq number_of_char(%rip), %rdx movl $1, %ecx movq h_input(%rip), %rsi movq d_input(%rip), %rdi call cudaMemcpy@PLT leaq .LC30(%rip), %rdi call _Z14checkCUDAErrorPKc leaq compressedfile_array(%rip), %rdi imull $255, number_of_char(%rip), %esi movslq %esi, %rsi call cudaMalloc@PLT leaq .LC31(%rip), %rdi call _Z14checkCUDAErrorPKc movl $261120, %esi leaq d_char_huffman_table(%rip), %rdi call cudaMalloc@PLT leaq .LC32(%rip), %rdi call _Z14checkCUDAErrorPKc movl $1, %ecx movq d_char_huffman_table(%rip), %rdi movl $261120, %edx leaq char_huffman_table(%rip), %rsi call cudaMemcpy@PLT leaq .LC33(%rip), %rdi call _Z14checkCUDAErrorPKc movl $2, %ecx movl $261120, %edx movq d_char_huffman_table(%rip), %rsi movq huffman_check(%rip), %rdi call cudaMemcpy@PLT leaq .LC34(%rip), %rdi call _Z14checkCUDAErrorPKc movslq number_of_char(%rip), %rsi leaq block_cntr_array(%rip), %rdi salq $2, %rsi call cudaMalloc@PLT leaq .LC35(%rip), %rdi call _Z14checkCUDAErrorPKc movl $4, %esi leaq d_last_byte_padding(%rip), %rdi call cudaMalloc@PLT leaq .LC36(%rip), %rdi call _Z14checkCUDAErrorPKc movl $4, %esi leaq finalsize(%rip), %rdi call cudaMalloc@PLT leaq .LC37(%rip), %rdi call _Z14checkCUDAErrorPKc movl $4, %esi leaq orig_number_of_char(%rip), %rdi call cudaMalloc@PLT leaq .LC38(%rip), %rdi call _Z14checkCUDAErrorPKc movl $1, %ecx movq orig_number_of_char(%rip), %rdi movl $4, %edx leaq number_of_char(%rip), %rsi call cudaMemcpy@PLT leaq .LC39(%rip), %rdi call _Z14checkCUDAErrorPKc movl $2, %edi call malloc@PLT movl $1, %ecx movl $1, %edx leaq .LC40(%rip), %rsi movw $257, (%rax) movl $2, %edi movq %rax, h_bool(%rip) xorl %eax, %eax call __printf_chk@PLT movl $2, %esi leaq d_bool(%rip), %rdi call cudaMalloc@PLT leaq .LC41(%rip), %rdi call _Z14checkCUDAErrorPKc movl $1, %ecx movl $2, %edx movq h_bool(%rip), %rsi movq d_bool(%rip), %rdi call cudaMemcpy@PLT leaq .LC42(%rip), %rdi call _Z14checkCUDAErrorPKc leaq .LC43(%rip), %rdi call _Z14checkCUDAErrorPKc call cudaThreadSynchronize@PLT leaq .LC44(%rip), %rdi call _Z14checkCUDAErrorPKc movl $2, %ecx movl $2, %edx movq d_bool(%rip), %rsi movq h_bool(%rip), %rdi call cudaMemcpy@PLT leaq .LC45(%rip), %rdi call _Z14checkCUDAErrorPKc movq h_bool(%rip), %rax movl $2, %edi leaq .LC46(%rip), %rsi movzbl 1(%rax), %ecx movzbl (%rax), %edx xorl %eax, %eax call __printf_chk@PLT movl $1, %eax xorl %ecx, %ecx salq $32, %rax movq %rcx, 64(%rsp) movq %rax, 72(%rsp) incq %rax movq %rax, 80(%rsp) .L207: movq h_bool(%rip), %rax movl (%rbx), %ebp movq %r12, %rsi movl $2, %edi movzbl (%rax), %edx movl %ebp, %ecx xorl %eax, %eax call __printf_chk@PLT movq h_bool(%rip), %rax movzbl (%rax), %edx cmpl %edx, %ebp jne .L209 movl 4(%rbx), %r13d movzbl 1(%rax), %edx movq %r12, %rsi movl $2, %edi xorl %eax, %eax movl %r13d, %ecx call __printf_chk@PLT movq h_bool(%rip), %rax movzbl 1(%rax), %eax cmpl %eax, %r13d jne .L209 movl %ebp, %edx leaq .LC48(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L209: addq $12, %rbx cmpq %rbx, %r14 jne .L207 movl number_of_char(%rip), %edx leaq .LC49(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT call getchar@PLT call getchar@PLT call _Z13print_huffmanv movl number_of_char(%rip), %eax movl $256, %ecx leaq .LC50(%rip), %rsi movl $2, %edi addl $255, %eax cltd idivl %ecx movl %eax, %ebx movl %eax, %edx xorl %eax, %eax call __printf_chk@PLT testl %ebx, %ebx jne .L213 movl $1, %ebx .L213: movq 24(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT leaq .LC51(%rip), %rdi call _Z14checkCUDAErrorPKc movl %ebx, 40(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rax movl $16777217, %edx movl $1, %ecx movl $1, 60(%rsp) movq %rax, 44(%rsp) movq 40(%rsp), %rdi salq $8, %rdx movl 48(%rsp), %esi movq %rdx, 52(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L214 movl number_of_char(%rip), %eax movq d_char_huffman_table(%rip), %rdx movq finalsize(%rip), %r9 movq d_last_byte_padding(%rip), %r8 movq block_cntr_array(%rip), %rcx movq compressedfile_array(%rip), %rsi pushq %rax .cfi_def_cfa_offset 152 pushq orig_number_of_char(%rip) .cfi_def_cfa_offset 160 movq d_input(%rip), %rdi call _Z54__device_stub__Z17compress_file_gpuPhPbPiS1_S1_S1_S1_iPhPbPiS1_S1_S1_S1_i popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L214: leaq .LC52(%rip), %rdi leaq .LC54(%rip), %r12 call _Z14checkCUDAErrorPKc call cudaThreadSynchronize@PLT movslq number_of_char(%rip), %rbp salq $2, %rbp movq %rbp, %rdi call malloc@PLT movq block_cntr_array(%rip), %rsi movq %rbp, %rdx movl $2, %ecx movq %rax, %rdi movq %rax, block_cntr_array_check(%rip) xorl %ebp, %ebp call cudaMemcpy@PLT leaq .LC53(%rip), %rdi call _Z14checkCUDAErrorPKc .L215: cmpl %ebp, number_of_char(%rip) movl %ebp, %edx jle .L224 movq block_cntr_array_check(%rip), %rax movq %r12, %rsi movl $2, %edi movl (%rax,%rbp,4), %ecx xorl %eax, %eax incq %rbp call __printf_chk@PLT jmp .L215 .L224: leaq .LC55(%rip), %rdi call _Z14checkCUDAErrorPKc movl $4, %edi call malloc@PLT movl $2, %ecx movl $4, %edx movq finalsize(%rip), %rsi movq %rax, %rbp movq %rax, %rdi call cudaMemcpy@PLT movl 0(%rbp), %edx movl $2, %edi xorl %eax, %eax leaq .LC56(%rip), %rsi call __printf_chk@PLT leaq .LC57(%rip), %rdi call _Z14checkCUDAErrorPKc movslq 0(%rbp), %rsi leaq finalcompressed_array(%rip), %rdi call cudaMalloc@PLT leaq .LC58(%rip), %rdi call _Z14checkCUDAErrorPKc movl %ebx, 40(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rax movl $16777217, %edx movl $1, %ecx movl $1, 60(%rsp) movq %rax, 44(%rsp) movq 40(%rsp), %rdi salq $8, %rdx movl 48(%rsp), %esi movq %rdx, 52(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L217 movl number_of_char(%rip), %ecx movq finalcompressed_array(%rip), %rdx movq compressedfile_array(%rip), %rsi movq block_cntr_array(%rip), %rdi call _Z43__device_stub__Z17final_compressionPiPbS0_iPiPbS0_i .L217: leaq .LC59(%rip), %rdi leaq .LC62(%rip), %r12 call _Z14checkCUDAErrorPKc call cudaThreadSynchronize@PLT leaq .LC60(%rip), %rdi call _Z14checkCUDAErrorPKc movq 32(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT leaq .LC61(%rip), %rdi call _Z14checkCUDAErrorPKc movq 32(%rsp), %rdi call cudaEventSynchronize@PLT movq 32(%rsp), %rdx movq 24(%rsp), %rsi leaq 52(%rsp), %rdi call cudaEventElapsedTime@PLT movq %r12, %rsi movl $2, %edi movb $1, %al cvtss2sd 52(%rsp), %xmm0 call __printf_chk@PLT movslq 0(%rbp), %r13 movq %r13, %rdi call malloc@PLT movq finalcompressed_array(%rip), %rsi movq %r13, %rdx movl $2, %ecx movq %rax, %rdi movq %rax, %rbx leaq .LC12(%rip), %r13 call cudaMemcpy@PLT leaq .LC63(%rip), %rdi call _Z14checkCUDAErrorPKc leaq .LC64(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq %rbx, %rdi movq %rbp, %rsi xorl %ebx, %ebx call _Z20write_GPU_compressedPbPi .L218: cmpl %ebx, 0(%rbp) jle .L225 movq %r13, %rsi movl $2, %edi xorl %eax, %eax incl %ebx call __printf_chk@PLT jmp .L218 .L225: leaq .LC65(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT call clock@PLT movq %rax, %rbx call _Z13compress_filev call clock@PLT leaq .LC68(%rip), %rsi movl $2, %edi subq %rbx, %rax cvtsi2ssq %rax, %xmm1 divss .LC66(%rip), %xmm1 movb $1, %al mulss .LC67(%rip), %xmm1 cvtss2sd %xmm1, %xmm0 movss %xmm1, 12(%rsp) call __printf_chk@PLT movq %r12, %rsi movl $2, %edi movb $1, %al cvtss2sd 52(%rsp), %xmm0 call __printf_chk@PLT movl $2, %edi movb $1, %al leaq .LC69(%rip), %rsi movss 12(%rsp), %xmm1 divss 52(%rsp), %xmm1 cvtss2sd %xmm1, %xmm0 call __printf_chk@PLT leaq .LC70(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT call _Z15decompress_filev call getchar@PLT movq 88(%rsp), %rax subq %fs:40, %rax je .L220 call __stack_chk_fail@PLT .L220: addq $96, %rsp .cfi_def_cfa_offset 48 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2045: .size main, .-main .text .globl _Z32__device_stub__Z11read2darrayPiiPii .type _Z32__device_stub__Z11read2darrayPiiPii, @function _Z32__device_stub__Z11read2darrayPiiPii: .LFB2074: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movl %esi, 4(%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) leaq 4(%rsp), %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L226 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z11read2darrayPii(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L226: movq 104(%rsp), %rax subq %fs:40, %rax je .L228 call __stack_chk_fail@PLT .L228: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2074: .size _Z32__device_stub__Z11read2darrayPiiPii, .-_Z32__device_stub__Z11read2darrayPiiPii .globl _Z11read2darrayPii .type _Z11read2darrayPii, @function _Z11read2darrayPii: .LFB2075: .cfi_startproc endbr64 jmp _Z32__device_stub__Z11read2darrayPiiPii .cfi_endproc .LFE2075: .size _Z11read2darrayPii, .-_Z11read2darrayPii .globl _Z30__device_stub__Z10check_boolPbPb .type _Z30__device_stub__Z10check_boolPbPb, @function _Z30__device_stub__Z10check_boolPbPb: .LFB2076: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L231 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq _Z10check_boolPb(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L231: movq 88(%rsp), %rax subq %fs:40, %rax je .L233 call __stack_chk_fail@PLT .L233: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2076: .size _Z30__device_stub__Z10check_boolPbPb, .-_Z30__device_stub__Z10check_boolPbPb .globl _Z10check_boolPb .type _Z10check_boolPb, @function _Z10check_boolPb: .LFB2077: .cfi_startproc endbr64 jmp _Z30__device_stub__Z10check_boolPbPb .cfi_endproc .LFE2077: .size _Z10check_boolPb, .-_Z10check_boolPb .section .rodata.str1.1 .LC71: .string "_Z10check_boolPb" .LC72: .string "_Z11read2darrayPii" .LC73: .string "_Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i" .LC74: .string "_Z17final_compressionPiPbS0_i" .LC75: .string "char_huffman_table_gpu" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2079: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC71(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z10check_boolPb(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC72(%rip), %rdx orl $-1, %r8d leaq _Z11read2darrayPii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC73(%rip), %rdx orl $-1, %r8d leaq _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC74(%rip), %rdx orl $-1, %r8d leaq _Z17final_compressionPiPbS0_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC75(%rip), %rdx movl $261120, %r9d leaq _ZL22char_huffman_table_gpu(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx call __cudaRegisterVar@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2079: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .text.startup .type _GLOBAL__sub_I__Z14checkCUDAErrorPKc, @function _GLOBAL__sub_I__Z14checkCUDAErrorPKc: .LFB2196: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 movl $261120, %edi call malloc@PLT movq %rax, huffman_check(%rip) popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2196: .size _GLOBAL__sub_I__Z14checkCUDAErrorPKc, .-_GLOBAL__sub_I__Z14checkCUDAErrorPKc .section .init_array .align 8 .quad _GLOBAL__sub_I__Z14checkCUDAErrorPKc .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl h_bool .bss .align 8 .type h_bool, @object .size h_bool, 8 h_bool: .zero 8 .globl d_bool .align 8 .type d_bool, @object .size d_bool, 8 d_bool: .zero 8 .globl huffman_check .align 8 .type huffman_check, @object .size huffman_check, 8 huffman_check: .zero 8 .globl orig_number_of_char .align 8 .type orig_number_of_char, @object .size orig_number_of_char, 8 orig_number_of_char: .zero 8 .globl finalsize .align 8 .type finalsize, @object .size finalsize, 8 finalsize: .zero 8 .globl d_last_byte_padding .align 8 .type d_last_byte_padding, @object .size d_last_byte_padding, 8 d_last_byte_padding: .zero 8 .globl block_cntr_array_check .align 8 .type block_cntr_array_check, @object .size block_cntr_array_check, 8 block_cntr_array_check: .zero 8 .globl block_cntr_array .align 8 .type block_cntr_array, @object .size block_cntr_array, 8 block_cntr_array: .zero 8 .globl finalcompressed_array .align 8 .type finalcompressed_array, @object .size finalcompressed_array, 8 finalcompressed_array: .zero 8 .globl compressedfile_array .align 8 .type compressedfile_array, @object .size compressedfile_array, 8 compressedfile_array: .zero 8 .local _ZL22char_huffman_table_gpu .comm _ZL22char_huffman_table_gpu,261120,32 .globl copiedarray2 .align 32 .type copiedarray2, @object .size copiedarray2, 261120 copiedarray2: .zero 261120 .globl d_char_huffman_table .align 8 .type d_char_huffman_table, @object .size d_char_huffman_table, 8 d_char_huffman_table: .zero 8 .globl d_input .align 8 .type d_input, @object .size d_input, 8 d_input: .zero 8 .globl h_input .align 8 .type h_input, @object .size h_input, 8 h_input: .zero 8 .globl number_of_char .align 4 .type number_of_char, @object .size number_of_char, 4 number_of_char: .zero 4 .globl last_byte_padding_gpu .align 4 .type last_byte_padding_gpu, @object .size last_byte_padding_gpu, 4 last_byte_padding_gpu: .zero 4 .globl last_byte_padding .align 4 .type last_byte_padding, @object .size last_byte_padding, 4 last_byte_padding: .zero 4 .globl char_huffman_table .align 32 .type char_huffman_table, @object .size char_huffman_table, 261120 char_huffman_table: .zero 261120 .globl char_frequency .align 32 .type char_frequency, @object .size char_frequency, 1024 char_frequency: .zero 1024 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC66: .long 1232348160 .align 4 .LC67: .long 1148846080 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10check_boolPb .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */ /* 0x000fe20000000f00 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0030*/ MOV R3, c[0x0][0x164] ; /* 0x0000590000037a02 */ /* 0x000fca0000000f00 */ /*0040*/ STG.E.U8 [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x000fe8000c101104 */ /*0050*/ STG.E.U8 [R2.64+0x1], RZ ; /* 0x000001ff02007986 */ /* 0x000fe2000c101104 */ /*0060*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0070*/ BRA 0x70; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11read2darrayPii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0020*/ BRA 0x20; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR8, c[0x0][0x178] ; /* 0x00005e0000087ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0040*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0050*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x198], PT ; /* 0x0000660000007a0c */ /* 0x000fda0003f06270 */ /*0060*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0070*/ SHF.R.S32.HI R11, RZ, 0x1f, R0 ; /* 0x0000001fff0b7819 */ /* 0x000fe20000011400 */ /*0080*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0090*/ IADD3 R2, P0, R0, c[0x0][0x160], RZ ; /* 0x0000580000027a10 */ /* 0x000fc80007f1e0ff */ /*00a0*/ IADD3.X R3, R11, c[0x0][0x164], RZ, P0, !PT ; /* 0x000059000b037a10 */ /* 0x000fca00007fe4ff */ /*00b0*/ LDG.E.U8 R6, [R2.64] ; /* 0x0000000602067981 */ /* 0x000162000c1e1100 */ /*00c0*/ BSSY B1, 0x500 ; /* 0x0000043000017945 */ /* 0x000fe20003800000 */ /*00d0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x000fe400078e00ff */ /*00e0*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */ /* 0x000fe400078e00ff */ /*00f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe400078e00ff */ /*0100*/ IMAD R4, R6, 0xff, R7 ; /* 0x000000ff06047824 */ /* 0x021fc800078e0207 */ /*0110*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x000fca00078e0205 */ /*0120*/ LDG.E R8, [R4.64] ; /* 0x0000000604087981 */ /* 0x000ea2000c1e1900 */ /*0130*/ IMAD R3, R0, 0xff, R7 ; /* 0x000000ff00037824 */ /* 0x001fe200078e0207 */ /*0140*/ BSSY B0, 0x210 ; /* 0x000000c000007945 */ /* 0x000fe80003800000 */ /*0150*/ IADD3 R2, P1, R3, c[0x0][0x168], RZ ; /* 0x00005a0003027a10 */ /* 0x000fc80007f3e0ff */ /*0160*/ LEA.HI.X.SX32 R3, R3, c[0x0][0x16c], 0x1, P1 ; /* 0x00005b0003037a11 */ /* 0x000fe400008f0eff */ /*0170*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x004fda0003f05270 */ /*0180*/ @!P0 BRA 0x1f0 ; /* 0x0000006000008947 */ /* 0x000fea0003800000 */ /*0190*/ ISETP.NE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */ /* 0x000fda0003f05270 */ /*01a0*/ @P0 BREAK B0 ; /* 0x0000000000000942 */ /* 0x000fe20003800000 */ /*01b0*/ @P0 BRA 0x4f0 ; /* 0x0000033000000947 */ /* 0x000fea0003800000 */ /*01c0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */ /* 0x000fca00078e00ff */ /*01d0*/ STG.E.U8 [R2.64], R8 ; /* 0x0000000802007986 */ /* 0x0001e2000c101106 */ /*01e0*/ BRA 0x200 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*01f0*/ STG.E.U8 [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e4000c101106 */ /*0200*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0210*/ LDG.E R8, [R4.64+0x4] ; /* 0x0000040604087981 */ /* 0x001ea2000c1e1900 */ /*0220*/ BSSY B2, 0x2e0 ; /* 0x000000b000027945 */ /* 0x000fe20003800000 */ /*0230*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x004fda0003f05270 */ /*0240*/ @!P0 BRA 0x2c0 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*0250*/ ISETP.NE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */ /* 0x000fe20003f05270 */ /*0260*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */ /* 0x000fd800078e00ff */ /*0270*/ @!P0 STG.E.U8 [R2.64+0x1], R8 ; /* 0x0000010802008986 */ /* 0x0001e2000c101106 */ /*0280*/ @P0 BREAK B2 ; /* 0x0000000000020942 */ /* 0x000fe20003800000 */ /*0290*/ @!P0 BRA 0x2d0 ; /* 0x0000003000008947 */ /* 0x000fea0003800000 */ /*02a0*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */ /* 0x000fe20007ffe0ff */ /*02b0*/ BRA 0x4f0 ; /* 0x0000023000007947 */ /* 0x000fea0003800000 */ /*02c0*/ STG.E.U8 [R2.64+0x1], RZ ; /* 0x000001ff02007986 */ /* 0x0001e4000c101106 */ /*02d0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*02e0*/ LDG.E R8, [R4.64+0x8] ; /* 0x0000080604087981 */ /* 0x001ea2000c1e1900 */ /*02f0*/ BSSY B2, 0x3b0 ; /* 0x000000b000027945 */ /* 0x000fe20003800000 */ /*0300*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x004fda0003f05270 */ /*0310*/ @!P0 BRA 0x390 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*0320*/ ISETP.NE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */ /* 0x000fe20003f05270 */ /*0330*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */ /* 0x000fd800078e00ff */ /*0340*/ @!P0 STG.E.U8 [R2.64+0x2], R8 ; /* 0x0000020802008986 */ /* 0x0001e2000c101106 */ /*0350*/ @P0 BREAK B2 ; /* 0x0000000000020942 */ /* 0x000fe20003800000 */ /*0360*/ @!P0 BRA 0x3a0 ; /* 0x0000003000008947 */ /* 0x000fea0003800000 */ /*0370*/ IADD3 R9, R9, 0x2, RZ ; /* 0x0000000209097810 */ /* 0x000fe20007ffe0ff */ /*0380*/ BRA 0x4f0 ; /* 0x0000016000007947 */ /* 0x000fea0003800000 */ /*0390*/ STG.E.U8 [R2.64+0x2], RZ ; /* 0x000002ff02007986 */ /* 0x0001e4000c101106 */ /*03a0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*03b0*/ IADD3 R8, R7, 0x3, RZ ; /* 0x0000000307087810 */ /* 0x001fc80007ffe0ff */ /*03c0*/ ISETP.GE.U32.AND P0, PT, R8, 0xff, PT ; /* 0x000000ff0800780c */ /* 0x000fda0003f06070 */ /*03d0*/ @P0 BRA 0x4e0 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*03e0*/ LDG.E R4, [R4.64+0xc] ; /* 0x00000c0604047981 */ /* 0x000ea2000c1e1900 */ /*03f0*/ BSSY B2, 0x4b0 ; /* 0x000000b000027945 */ /* 0x000fe20003800000 */ /*0400*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x004fda0003f05270 */ /*0410*/ @!P0 BRA 0x490 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*0420*/ ISETP.NE.AND P0, PT, R4, 0x1, PT ; /* 0x000000010400780c */ /* 0x000fe20003f05270 */ /*0430*/ IMAD.MOV.U32 R4, RZ, RZ, 0x1 ; /* 0x00000001ff047424 */ /* 0x000fd800078e00ff */ /*0440*/ @!P0 STG.E.U8 [R2.64+0x3], R4 ; /* 0x0000030402008986 */ /* 0x0001e2000c101106 */ /*0450*/ @P0 BREAK B2 ; /* 0x0000000000020942 */ /* 0x000fe20003800000 */ /*0460*/ @!P0 BRA 0x4a0 ; /* 0x0000003000008947 */ /* 0x000fea0003800000 */ /*0470*/ IADD3 R9, R9, 0x3, RZ ; /* 0x0000000309097810 */ /* 0x000fe20007ffe0ff */ /*0480*/ BRA 0x4f0 ; /* 0x0000006000007947 */ /* 0x000fea0003800000 */ /*0490*/ STG.E.U8 [R2.64+0x3], RZ ; /* 0x000003ff02007986 */ /* 0x0001e4000c101106 */ /*04a0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*04b0*/ IADD3 R9, R9, 0x4, RZ ; /* 0x0000000409097810 */ /* 0x000fe40007ffe0ff */ /*04c0*/ IADD3 R7, R7, 0x4, RZ ; /* 0x0000000407077810 */ /* 0x000fe20007ffe0ff */ /*04d0*/ BRA 0xf0 ; /* 0xfffffc1000007947 */ /* 0x000fea000383ffff */ /*04e0*/ IADD3 R9, R9, 0x3, RZ ; /* 0x0000000309097810 */ /* 0x000fe40007ffe0ff */ /*04f0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0500*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */ /* 0x000fe20003800000 */ /*0510*/ LEA R4, P0, R0.reuse, c[0x0][0x178], 0x2 ; /* 0x00005e0000047a11 */ /* 0x041fe200078010ff */ /*0520*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x188] ; /* 0x00006200ff027624 */ /* 0x000fe400078e00ff */ /*0530*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x18c] ; /* 0x00006300ff037624 */ /* 0x000fe200078e00ff */ /*0540*/ LEA.HI.X R5, R0, c[0x0][0x17c], R11, 0x2, P0 ; /* 0x00005f0000057a11 */ /* 0x000fe200000f140b */ /*0550*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x190] ; /* 0x00006400ff0a7624 */ /* 0x000fc400078e00ff */ /*0560*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x194] ; /* 0x00006500ff0b7624 */ /* 0x000fe400078e00ff */ /*0570*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */ /* 0x0001e8000c101906 */ /*0580*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e8000c101906 */ /*0590*/ LDG.E R0, [R10.64] ; /* 0x000000060a007981 */ /* 0x000ea4000c1e1900 */ /*05a0*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */ /* 0x004fda0003f06270 */ /*05b0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*05c0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x001fe200078e00ff */ /*05d0*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe40008000000 */ /*05e0*/ IMAD.U32 R4, RZ, RZ, UR8 ; /* 0x00000008ff047e24 */ /* 0x000fe4000f8e00ff */ /*05f0*/ IMAD.U32 R5, RZ, RZ, UR9 ; /* 0x00000009ff057e24 */ /* 0x000fca000f8e00ff */ /*0600*/ LDG.E R4, [R4.64] ; /* 0x0000000604047981 */ /* 0x000ea4000c1e1900 */ /*0610*/ IMAD.IADD R7, R4, 0x1, R7 ; /* 0x0000000104077824 */ /* 0x004fca00078e0207 */ /*0620*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0001e8000c101906 */ /*0630*/ LDG.E R0, [R10.64] ; /* 0x000000060a007981 */ /* 0x000ea2000c1e1900 */ /*0640*/ UIADD3 UR4, UR4, 0x1, URZ ; /* 0x0000000104047890 */ /* 0x000fe4000fffe03f */ /*0650*/ UIADD3 UR8, UP0, UR8, 0x4, URZ ; /* 0x0000000408087890 */ /* 0x000fc8000ff1e03f */ /*0660*/ UIADD3.X UR9, URZ, UR9, URZ, UP0, !UPT ; /* 0x000000093f097290 */ /* 0x000fe200087fe43f */ /*0670*/ ISETP.LE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */ /* 0x004fda000bf03270 */ /*0680*/ @!P0 BRA 0x5e0 ; /* 0xffffff5000008947 */ /* 0x001fea000383ffff */ /*0690*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*06a0*/ BRA 0x6a0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*06b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0700*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0710*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0720*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0730*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0740*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0750*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0760*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0770*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z17final_compressionPiPbS0_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */ /* 0x000fe20003f06270 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0080*/ BSSY B2, 0x760 ; /* 0x000006d000027945 */ /* 0x000fe20003800000 */ /*0090*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */ /* 0x000fd400078e00ff */ /*00a0*/ @!P0 BRA 0x750 ; /* 0x000006a000008947 */ /* 0x000fea0003800000 */ /*00b0*/ IADD3 R2, R0.reuse, -0x1, RZ ; /* 0xffffffff00027810 */ /* 0x040fe20007ffe0ff */ /*00c0*/ BSSY B1, 0x680 ; /* 0x000005b000017945 */ /* 0x000fe20003800000 */ /*00d0*/ LOP3.LUT R5, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300057812 */ /* 0x000fe200078ec0ff */ /*00e0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fe200078e00ff */ /*00f0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */ /* 0x000fe20003f06070 */ /*0100*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */ /* 0x000fd800078e00ff */ /*0110*/ @!P0 BRA 0x670 ; /* 0x0000055000008947 */ /* 0x000fea0003800000 */ /*0120*/ IMAD.IADD R7, R0, 0x1, -R5 ; /* 0x0000000100077824 */ /* 0x000fe200078e0a05 */ /*0130*/ BSSY B0, 0x590 ; /* 0x0000045000007945 */ /* 0x000fe20003800000 */ /*0140*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fe400078e00ff */ /*0150*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */ /* 0x000fe200078e00ff */ /*0160*/ ISETP.GT.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe20003f04270 */ /*0170*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */ /* 0x000fd800078e00ff */ /*0180*/ @!P0 BRA 0x580 ; /* 0x000003f000008947 */ /* 0x000fea0003800000 */ /*0190*/ ISETP.GT.AND P1, PT, R7, 0xc, PT ; /* 0x0000000c0700780c */ /* 0x000fe20003f24270 */ /*01a0*/ BSSY B3, 0x3e0 ; /* 0x0000023000037945 */ /* 0x000fe20003800000 */ /*01b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*01c0*/ @!P1 BRA 0x3d0 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*01d0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*01e0*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */ /* 0x000ea8000c1e1900 */ /*01f0*/ LDG.E R8, [R2.64+0x4] ; /* 0x0000040402087981 */ /* 0x000ea8000c1e1900 */ /*0200*/ LDG.E R11, [R2.64+0x8] ; /* 0x00000804020b7981 */ /* 0x0000e8000c1e1900 */ /*0210*/ LDG.E R10, [R2.64+0xc] ; /* 0x00000c04020a7981 */ /* 0x0000e8000c1e1900 */ /*0220*/ LDG.E R13, [R2.64+0x10] ; /* 0x00001004020d7981 */ /* 0x000128000c1e1900 */ /*0230*/ LDG.E R12, [R2.64+0x14] ; /* 0x00001404020c7981 */ /* 0x000128000c1e1900 */ /*0240*/ LDG.E R15, [R2.64+0x18] ; /* 0x00001804020f7981 */ /* 0x000168000c1e1900 */ /*0250*/ LDG.E R14, [R2.64+0x1c] ; /* 0x00001c04020e7981 */ /* 0x000168000c1e1900 */ /*0260*/ LDG.E R17, [R2.64+0x20] ; /* 0x0000200402117981 */ /* 0x000168000c1e1900 */ /*0270*/ LDG.E R16, [R2.64+0x24] ; /* 0x0000240402107981 */ /* 0x000168000c1e1900 */ /*0280*/ LDG.E R19, [R2.64+0x28] ; /* 0x0000280402137981 */ /* 0x000168000c1e1900 */ /*0290*/ LDG.E R18, [R2.64+0x2c] ; /* 0x00002c0402127981 */ /* 0x000168000c1e1900 */ /*02a0*/ LDG.E R21, [R2.64+0x30] ; /* 0x0000300402157981 */ /* 0x000168000c1e1900 */ /*02b0*/ LDG.E R20, [R2.64+0x34] ; /* 0x0000340402147981 */ /* 0x000168000c1e1900 */ /*02c0*/ LDG.E R23, [R2.64+0x38] ; /* 0x0000380402177981 */ /* 0x000168000c1e1900 */ /*02d0*/ LDG.E R22, [R2.64+0x3c] ; /* 0x00003c0402167981 */ /* 0x000162000c1e1900 */ /*02e0*/ IADD3 R7, R7, -0x10, RZ ; /* 0xfffffff007077810 */ /* 0x000fc40007ffe0ff */ /*02f0*/ IADD3 R6, R6, 0x10, RZ ; /* 0x0000001006067810 */ /* 0x000fe40007ffe0ff */ /*0300*/ ISETP.GT.AND P1, PT, R7, 0xc, PT ; /* 0x0000000c0700780c */ /* 0x000fe40003f24270 */ /*0310*/ IADD3 R8, R8, R9, R4 ; /* 0x0000000908087210 */ /* 0x004fe40007ffe004 */ /*0320*/ IADD3 R9, P2, R2, 0x40, RZ ; /* 0x0000004002097810 */ /* 0x000fca0007f5e0ff */ /*0330*/ IMAD.X R3, RZ, RZ, R3, P2 ; /* 0x000000ffff037224 */ /* 0x001fe200010e0603 */ /*0340*/ IADD3 R8, R10, R11, R8 ; /* 0x0000000b0a087210 */ /* 0x008fe20007ffe008 */ /*0350*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ; /* 0x000000ffff027224 */ /* 0x000fc600078e0009 */ /*0360*/ IADD3 R8, R12, R13, R8 ; /* 0x0000000d0c087210 */ /* 0x010fc80007ffe008 */ /*0370*/ IADD3 R8, R14, R15, R8 ; /* 0x0000000f0e087210 */ /* 0x020fc80007ffe008 */ /*0380*/ IADD3 R8, R16, R17, R8 ; /* 0x0000001110087210 */ /* 0x000fc80007ffe008 */ /*0390*/ IADD3 R8, R18, R19, R8 ; /* 0x0000001312087210 */ /* 0x000fc80007ffe008 */ /*03a0*/ IADD3 R8, R20, R21, R8 ; /* 0x0000001514087210 */ /* 0x000fc80007ffe008 */ /*03b0*/ IADD3 R4, R22, R23, R8 ; /* 0x0000001716047210 */ /* 0x000fe20007ffe008 */ /*03c0*/ @P1 BRA 0x1e0 ; /* 0xfffffe1000001947 */ /* 0x000fea000383ffff */ /*03d0*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*03e0*/ ISETP.GT.AND P1, PT, R7, 0x4, PT ; /* 0x000000040700780c */ /* 0x000fe20003f24270 */ /*03f0*/ BSSY B3, 0x550 ; /* 0x0000015000037945 */ /* 0x000fd80003800000 */ /*0400*/ @!P1 BRA 0x540 ; /* 0x0000013000009947 */ /* 0x000fea0003800000 */ /*0410*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */ /* 0x000ea8000c1e1900 */ /*0420*/ LDG.E R8, [R2.64+0x4] ; /* 0x0000040402087981 */ /* 0x000ea8000c1e1900 */ /*0430*/ LDG.E R11, [R2.64+0x8] ; /* 0x00000804020b7981 */ /* 0x0000e8000c1e1900 */ /*0440*/ LDG.E R10, [R2.64+0xc] ; /* 0x00000c04020a7981 */ /* 0x0000e8000c1e1900 */ /*0450*/ LDG.E R13, [R2.64+0x10] ; /* 0x00001004020d7981 */ /* 0x000128000c1e1900 */ /*0460*/ LDG.E R12, [R2.64+0x14] ; /* 0x00001404020c7981 */ /* 0x000128000c1e1900 */ /*0470*/ LDG.E R15, [R2.64+0x18] ; /* 0x00001804020f7981 */ /* 0x000168000c1e1900 */ /*0480*/ LDG.E R14, [R2.64+0x1c] ; /* 0x00001c04020e7981 */ /* 0x000162000c1e1900 */ /*0490*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40003f0e170 */ /*04a0*/ IADD3 R6, R6, 0x8, RZ ; /* 0x0000000806067810 */ /* 0x000fe40007ffe0ff */ /*04b0*/ IADD3 R7, R7, -0x8, RZ ; /* 0xfffffff807077810 */ /* 0x000fe40007ffe0ff */ /*04c0*/ IADD3 R8, R8, R9, R4 ; /* 0x0000000908087210 */ /* 0x004fe40007ffe004 */ /*04d0*/ IADD3 R9, P1, R2, 0x20, RZ ; /* 0x0000002002097810 */ /* 0x000fca0007f3e0ff */ /*04e0*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ; /* 0x000000ffff027224 */ /* 0x001fe200078e0009 */ /*04f0*/ IADD3 R8, R10, R11, R8 ; /* 0x0000000b0a087210 */ /* 0x008fe20007ffe008 */ /*0500*/ IMAD.X R10, RZ, RZ, R3, P1 ; /* 0x000000ffff0a7224 */ /* 0x000fc800008e0603 */ /*0510*/ IMAD.MOV.U32 R3, RZ, RZ, R10 ; /* 0x000000ffff037224 */ /* 0x000fe200078e000a */ /*0520*/ IADD3 R8, R12, R13, R8 ; /* 0x0000000d0c087210 */ /* 0x010fc80007ffe008 */ /*0530*/ IADD3 R4, R14, R15, R8 ; /* 0x0000000f0e047210 */ /* 0x020fe40007ffe008 */ /*0540*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*0550*/ ISETP.NE.OR P0, PT, R7, RZ, P0 ; /* 0x000000ff0700720c */ /* 0x000fda0000705670 */ /*0560*/ @!P0 BREAK B0 ; /* 0x0000000000008942 */ /* 0x000fe20003800000 */ /*0570*/ @!P0 BRA 0x670 ; /* 0x000000f000008947 */ /* 0x000fea0003800000 */ /*0580*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0590*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */ /* 0x0000a8000c1e1900 */ /*05a0*/ LDG.E R8, [R2.64+0x4] ; /* 0x0000040402087981 */ /* 0x0000a8000c1e1900 */ /*05b0*/ LDG.E R11, [R2.64+0x8] ; /* 0x00000804020b7981 */ /* 0x0000e8000c1e1900 */ /*05c0*/ LDG.E R10, [R2.64+0xc] ; /* 0x00000c04020a7981 */ /* 0x0000e2000c1e1900 */ /*05d0*/ IADD3 R7, R7, -0x4, RZ ; /* 0xfffffffc07077810 */ /* 0x000fc40007ffe0ff */ /*05e0*/ IADD3 R12, P1, R2, 0x10, RZ ; /* 0x00000010020c7810 */ /* 0x000fe40007f3e0ff */ /*05f0*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*0600*/ IADD3 R6, R6, 0x4, RZ ; /* 0x0000000406067810 */ /* 0x000fe20007ffe0ff */ /*0610*/ IMAD.X R13, RZ, RZ, R3, P1 ; /* 0x000000ffff0d7224 */ /* 0x000fe400008e0603 */ /*0620*/ IMAD.MOV.U32 R2, RZ, RZ, R12 ; /* 0x000000ffff027224 */ /* 0x001fe400078e000c */ /*0630*/ IMAD.MOV.U32 R3, RZ, RZ, R13 ; /* 0x000000ffff037224 */ /* 0x000fe200078e000d */ /*0640*/ IADD3 R4, R8, R9, R4 ; /* 0x0000000908047210 */ /* 0x004fc80007ffe004 */ /*0650*/ IADD3 R4, R10, R11, R4 ; /* 0x0000000b0a047210 */ /* 0x008fe20007ffe004 */ /*0660*/ @P0 BRA 0x590 ; /* 0xffffff2000000947 */ /* 0x000fea000383ffff */ /*0670*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0680*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fda0003f05270 */ /*0690*/ @!P0 BRA 0x750 ; /* 0x000000b000008947 */ /* 0x000fea0003800000 */ /*06a0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */ /* 0x000fc800078e00ff */ /*06b0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x000fc800078e0207 */ /*06c0*/ IMAD.MOV.U32 R3, RZ, RZ, R7 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0007 */ /*06d0*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */ /* 0x000fca00078e0006 */ /*06e0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*06f0*/ IADD3 R5, R5, -0x1, RZ ; /* 0xffffffff05057810 */ /* 0x000fe40007ffe0ff */ /*0700*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */ /* 0x000fe40007f3e0ff */ /*0710*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fc60003f05270 */ /*0720*/ IMAD.X R7, RZ, RZ, R7, P1 ; /* 0x000000ffff077224 */ /* 0x000fe400008e0607 */ /*0730*/ IMAD.IADD R4, R3, 0x1, R4 ; /* 0x0000000103047824 */ /* 0x004fd000078e0204 */ /*0740*/ @P0 BRA 0x6c0 ; /* 0xffffff7000000947 */ /* 0x000fea000383ffff */ /*0750*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0760*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */ /* 0x000fe20003800000 */ /*0770*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc800078e00ff */ /*0780*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fca00078e0203 */ /*0790*/ LDG.E R5, [R2.64] ; /* 0x0000000402057981 */ /* 0x000ea4000c1e1900 */ /*07a0*/ ISETP.GE.AND P0, PT, R5, 0x1, PT ; /* 0x000000010500780c */ /* 0x004fda0003f06270 */ /*07b0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*07c0*/ IMAD R0, R0, 0xff, RZ ; /* 0x000000ff00007824 */ /* 0x000fe200078e02ff */ /*07d0*/ IADD3 R8, P1, R4, c[0x0][0x170], RZ ; /* 0x00005c0004087a10 */ /* 0x000fe20007f3e0ff */ /*07e0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fc600078e00ff */ /*07f0*/ IADD3 R10, P0, R0, c[0x0][0x168], RZ ; /* 0x00005a00000a7a10 */ /* 0x000fe40007f1e0ff */ /*0800*/ LEA.HI.X.SX32 R11, R4, c[0x0][0x174], 0x1, P1 ; /* 0x00005d00040b7a11 */ /* 0x000fe400008f0eff */ /*0810*/ LEA.HI.X.SX32 R13, R0, c[0x0][0x16c], 0x1, P0 ; /* 0x00005b00000d7a11 */ /* 0x000fc600000f0eff */ /*0820*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ; /* 0x000000ffff047224 */ /* 0x000fe400078e000a */ /*0830*/ IMAD.MOV.U32 R5, RZ, RZ, R13 ; /* 0x000000ffff057224 */ /* 0x000fca00078e000d */ /*0840*/ LDG.E.U8 R7, [R4.64] ; /* 0x0000000404077981 */ /* 0x0000a4000c1e1100 */ /*0850*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x001fe400078e0008 */ /*0860*/ IMAD.MOV.U32 R5, RZ, RZ, R11 ; /* 0x000000ffff057224 */ /* 0x000fca00078e000b */ /*0870*/ STG.E.U8 [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x0041e8000c101104 */ /*0880*/ LDG.E R9, [R2.64] ; /* 0x0000000402097981 */ /* 0x000ea2000c1e1900 */ /*0890*/ IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106067810 */ /* 0x000fe40007ffe0ff */ /*08a0*/ IADD3 R10, P1, R10, 0x1, RZ ; /* 0x000000010a0a7810 */ /* 0x000fe40007f3e0ff */ /*08b0*/ IADD3 R8, P2, R8, 0x1, RZ ; /* 0x0000000108087810 */ /* 0x000fc60007f5e0ff */ /*08c0*/ IMAD.X R13, RZ, RZ, R13, P1 ; /* 0x000000ffff0d7224 */ /* 0x000fe400008e060d */ /*08d0*/ IMAD.X R11, RZ, RZ, R11, P2 ; /* 0x000000ffff0b7224 */ /* 0x000fe200010e060b */ /*08e0*/ ISETP.GE.AND P0, PT, R6, R9, PT ; /* 0x000000090600720c */ /* 0x004fda0003f06270 */ /*08f0*/ @!P0 BRA 0x820 ; /* 0xffffff2000008947 */ /* 0x001fea000383ffff */ /*0900*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0910*/ BRA 0x910; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0920*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0930*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0940*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0950*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0960*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0970*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0980*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0990*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdlib.h> #include <stdio.h> #include <time.h> //#include "cutil.h" void checkCUDAError(const char *msg) { hipError_t err = hipGetLastError(); if (hipSuccess != err) { printf("Cuda error: %s: %s.\n", msg, hipGetErrorString(err)); printf("\nPress ENTER to exit...\n"); getchar(); exit(-1); } } //name of the input file #define INPUT_FILE_NAME "input.txt" //name of the compressed file #define COMPRESSED_FILE_NAME "compressed.txt" #define COMPRESSED_FILE_NAME_GPU "compressed_gpu.txt" //name of the uncompressed file #define DECOMPRESSED_FILE_NAME "decompressed.txt" //name of the config file #define CONFIG_FILE_NAME "config.txt" //max number of characters #define MAX_CHAR 256 //#define MAX_CHAR 30 //max lenght of the number which can occur in char_frequency or char_huffman_table) #define MAX_LENGTH_OF_NUMBER 10 //lenght of the array in shared memory on device #define SHARED_MEMORY_SIZE 256 //lenght of the array in const memory on device #define CONST_MEMORY_SIZE 15000 //(MAX_CHAR*(MAX_CHAR-1)) //To fill and pass the file as an array to GPU #define MAX_FILE_CHARS 50000 #define BLOCK_SIZE 256 struct node { int val; int weight; struct node * right, * left; }; //keeps frequency of particular characters (index - symbof of the character, value - frequency of the character) int char_frequency[MAX_CHAR]; //keeps huffman table int char_huffman_table[MAX_CHAR][MAX_CHAR-1]; //keeps number which tells how many bits were unused in last byte (variable is set after call compress_file()) int last_byte_padding=0; //for writing gpu output int last_byte_padding_gpu = 0; //keeps number of characters in current input file - file has to have less than 2,147,483,647 characters (variable is set after call read_file()) int number_of_char=0 ; //To fill and pass the file as an array to GPU unsigned char *h_input=0,*d_input=0; // To read char_huffman_table at the GPU int *d_char_huffman_table=0; int copiedarray2[MAX_CHAR][MAX_CHAR-1]; __device__ int char_huffman_table_gpu[MAX_CHAR][MAX_CHAR-1]; //To write the output from compression in GPU //char *compressedfile_array=0; bool *compressedfile_array=0; bool *finalcompressed_array=0; // To keep track of how many characters each block wrote int *block_cntr_array=0; int *block_cntr_array_check=0; int *d_last_byte_padding=0; int *finalsize=0; int *orig_number_of_char=0; int *huffman_check = (int *)malloc((MAX_CHAR)*(MAX_CHAR-1) *sizeof(int)); bool *d_bool = 0; bool *h_bool = 0; __global__ void final_compression(int *block_cntr_array,bool *compressedfile_array,bool *finalcompressed_array,int number_of_char) //__device__ void final_compression(int *block_cntr_array,bool *compressedfile_array,bool *finalcompressed_array) { int index_blocks=blockIdx.x*blockDim.x+threadIdx.x; int index_file=(blockIdx.x*blockDim.x+threadIdx.x)*255; int final_index=0; if(index_blocks < number_of_char) { for(int i=0;i<index_blocks;i++) { final_index = final_index+ block_cntr_array[i]; } for(int i=0;i<block_cntr_array[index_blocks];i++) { finalcompressed_array[final_index+i]=compressedfile_array[index_file+i]; } } } //__global__ void computearray_size(int* block_cntr_array,int *finalsize,int *orig_number_of_char) __device__ void computearray_size(int* block_cntr_array,int *finalsize,int *orig_number_of_char) { *finalsize = 0; for(int i=0;i<*orig_number_of_char;i++) { (*finalsize)=(*finalsize) + block_cntr_array[i]; } } /*__global__ void compress_file_gpu(unsigned char *d_input,char *compressedfile_array,int *char_huffman_table2,int *block_cntr_array,int* d_last_byte_padding) { int write_counter=0,block_counter=0; //how many bits have been written in specific byte unsigned char input_char; unsigned char output_char = 0x0; unsigned char end_of_file = 255; unsigned char mask = 0x01; //00000001; int index_file=(blockIdx.x*blockDim.x+threadIdx.x)*255; int index_blocks=blockIdx.x*blockDim.x+threadIdx.x; //for(int i=0;i<MAX_CHAR;i++) //{ //int *row = (int*)((char*)char_huffman_table2 + i * pitch); //for (int c = 0; c < MAX_CHAR-1; ++c) { // char_huffman_table_gpu[i][c] = row[c]; //} //} input_char = d_input[index_blocks]; for(int i = 0 ; i < (MAX_CHAR - 1) ; i++) { if(char_huffman_table2[input_char*255+i] == 0) //detect if current character on particular position has 0 or 1 { output_char = output_char << 1; //if 0 then shift bits one position to left (last bit after shifting is 0) write_counter++; block_counter++; } else if(char_huffman_table2[input_char*255+i] == 1) { output_char = output_char << 1; //if 1 then shift bits one position to left... output_char = output_char | mask; //...and last bit change to: 1 write_counter++; block_counter++; } else //-1 { //if(input_char == end_of_file) //if EOF is detected then write current result to file //{ if(write_counter != 0) { output_char = output_char << (8-write_counter); compressedfile_array[index_file]=output_char; output_char = 0x0; } else //write_counter == 0 { compressedfile_array[index_file]=output_char; } //} break; } if(write_counter == 8) //if result achieved 8 (size of char) then write it to compressed_file { compressedfile_array[index_file]=output_char; output_char = 0x0; write_counter = 0; } } block_cntr_array[index_blocks]=block_counter; *d_last_byte_padding = write_counter; //to decompress file we have to know how many bits in last byte have been written //update_config(write_counter); //TODO to zakomentowac przy ostatecznych pomiarach }*/ //__global__ void compress_file_gpu(unsigned char *d_input,bool *compressedfile_array,int *char_huffman_table2,int *block_cntr_array,int* d_last_byte_padding) __global__ void compress_file_gpu(unsigned char *d_input,bool *compressedfile_array,int *char_huffman_table2,int *block_cntr_array,int* d_last_byte_padding,int *finalsize,int *orig_number_of_char,int number_of_char) { //int write_counter=0, int block_counter=0; //how many bits have been written in specific byte unsigned char input_char; //unsigned char output_char = 0x0; //unsigned char end_of_file = 255; //unsigned char mask = 0x01; //00000001; int index_file=(blockIdx.x*blockDim.x+threadIdx.x)*255; int index_blocks=blockIdx.x*blockDim.x+threadIdx.x; if(index_blocks < number_of_char) { //for(int i=0;i<MAX_CHAR;i++) //{ //int *row = (int*)((char*)char_huffman_table2 + i * pitch); //for (int c = 0; c < MAX_CHAR-1; ++c) { // char_huffman_table_gpu[i][c] = row[c]; //} //} input_char = d_input[index_blocks]; for(int i = 0 ; i < (MAX_CHAR - 1) ; i++) { if(char_huffman_table2[input_char*255+i] == 0) //detect if current character on particular position has 0 or 1 { //output_char = output_char << 1; //if 0 then shift bits one position to left (last bit after shifting is 0) compressedfile_array[index_file+i] = false; //write_counter++; block_counter++; } else if(char_huffman_table2[input_char*255+i] == 1) { //output_char = output_char << 1; //if 1 then shift bits one position to left... //output_char = output_char | mask; //...and last bit change to: 1 //write_counter++; compressedfile_array[index_file+i] = true; block_counter++; } else //-1 { /*if(input_char == end_of_file) //if EOF is detected then write current result to file { if(write_counter != 0) { output_char = output_char << (8-write_counter); compressedfile_array[index_file]=output_char; output_char = 0x0; } else //write_counter == 0 { compressedfile_array[index_file]=output_char; } }*/ break; } /*if(write_counter == 8) //if result achieved 8 (size of char) then write it to compressed_file { compressedfile_array[index_file]=output_char; output_char = 0x0; write_counter = 0; }*/ } block_cntr_array[index_blocks]=block_counter; //*d_last_byte_padding = write_counter; //to decompress file we have to know how many bits in last byte have been written //update_config(write_counter); //TODO to zakomentowac przy ostatecznych pomiarach computearray_size(block_cntr_array,finalsize,orig_number_of_char); //final_compression(block_cntr_array,compressedfile_array,finalcompressed_array); } } void write_GPU_compressed(bool *final_compressed_cpu,int *finalsize_cpu) { FILE *compressed_file; int write_counter=0; //how many bits have been written in specific byte //unsigned char input_char; unsigned char output_char = 0x0; //unsigned char end_of_file = 255; unsigned char mask = 0x01; //00000001; compressed_file = fopen(COMPRESSED_FILE_NAME_GPU, "wb"); if ((compressed_file==NULL)) { perror ("Error reading file"); } else { for(int i = 0 ; i < (*finalsize_cpu) ; i++) { if(int(final_compressed_cpu[i]) == 0) { output_char = output_char << 1; //if 0 then shift bits one position to left (last bit after shifting is 0) write_counter++; } else if (int(final_compressed_cpu[i]) == 1) { output_char = output_char << 1; //if 1 then shift bits one position to left... output_char = output_char | mask; //...and last bit change to: 1 write_counter++; } if(write_counter == 8) //if result achieved 8 (size of char) then write it to compressed_file { printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); output_char = 0x0; write_counter = 0; } } if(write_counter != 0) { output_char = output_char << (8-write_counter); printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); output_char = 0x0; } } fclose(compressed_file); last_byte_padding_gpu = write_counter; } void print_dchar_huffman_table() { printf("\n dchar huffman table "); getchar(); bool flag = false; printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printf("Huffman table:\n"); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); for(int i = 0 ; i < MAX_CHAR ; i++) { flag = false; for(int j = 0 ; j < (MAX_CHAR -1) ; j++) { if(copiedarray2[i][j] != -1) { if(!flag) { if(i == 10)//new line { printf("\\n:\t"); } else { printf("%c:\t",i); } } flag = true; printf("%d ", copiedarray2[i][j]); } } if(flag) printf("\n"); } printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); getchar(); } //Huffman table construction+++++++++++++++++++++++++++++++++++++++++++++++++++ void insertion_sort(node **forest, int length) { for(int i = 1; i < length ; i++) { node *tmp = forest[i]; int j = i - 1; bool done = false; do { if(forest[j]->weight < tmp->weight) //> ascending order; < descending order { forest[j+1] = forest[j]; j = j-1; if(j < 0) { done = true; } } else { done = true; } }while(!done); forest[j+1] = tmp; } } void print_char_frequency() { printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printf("character frequency:\n"); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); for(int i = 0 ; i < MAX_CHAR ; i++) { if(char_frequency[i] != 0) { if(i == 10)//new line { printf("%d)\tval: \\n\tfreq: %d\n",i, char_frequency[i]); } else { printf("%d)\tval: %c\tfreq: %d\n",i, i, char_frequency[i]); } } } printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); } void print_char_huffman_table() { bool flag = false; printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printf("Huffman table:\n"); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); for(int i = 0 ; i < MAX_CHAR ; i++) { flag = false; for(int j = 0 ; j < (MAX_CHAR -1) ; j++) { if(char_huffman_table[i][j] != -1) { if(!flag) { if(i == 10)//new line { printf("\\n:\t"); } else { printf("%c:\t",i); } } flag = true; printf("%d ", char_huffman_table[i][j]); } } if(flag) printf("\n"); } printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); } void printout_inorder(node * tree) { if(tree->left) printout_inorder(tree->left); if(tree->val != NULL) { if(tree->val == '\n') { printf("weight: %d\tvalue: \\n\n",tree->weight); } else { printf("weight: %d\tvalue: %c\n",tree->weight, tree->val); } } else { printf("weight: %d\tvalue: NULL\n",tree->weight); } if(tree->right) printout_inorder(tree->right); } void read_file() { FILE *file; unsigned char end_of_file = 255; unsigned char c; file = fopen(INPUT_FILE_NAME, "r"); if (file==NULL) { perror ("Error reading file"); } else { //storing the file contents into h_input h_input = (unsigned char *)malloc(MAX_FILE_CHARS*sizeof(char)); do { c = getc (file); //if(c == end_of_file) printf("\n Found EOF \n"); //printf("c before putting into array is %c\n",c); h_input[number_of_char]=c; number_of_char++; char_frequency[c]++; } while (c != end_of_file); fclose (file); } // h_input[number_of_char] = end_of_file; char_frequency[end_of_file] = 0; //to avoid problems with several EOF in one file //EOF is not needed ; so going to decrement number_of_char--; } void traverse_preorder(node *root, int *path) { if(root->val != NULL) { for(int i = 0 ; i < MAX_CHAR -1 ; i++) { char_huffman_table[root->val][i] = path[i]; } } if(root->left)//left 1 { int counter = 0; for(int i = 0 ; i < MAX_CHAR - 1 ; i++) { if(path[i] == -1) { break; } counter++; } path[counter] = 1; traverse_preorder(root->left, path); path[counter] = -1; } if(root->right)//right 0 { int counter = 0; for(int i = 0 ; i < MAX_CHAR - 1 ; i++) { if(path[i] == -1) { break; } counter++; } path[counter] = 0; traverse_preorder(root->right, path); path[counter] = -1; } } void construct_huffman_table(node *root) { int path[MAX_CHAR - 1]; for(int i = 0 ; i < MAX_CHAR - 1 ; i++) { path[i] = -1; } traverse_preorder(root, path); } void build_binary_tree() { int forest_counter = 0; node *forest[MAX_CHAR]; node *curr; for(int i = 0 ; i < MAX_CHAR ; i++) //initial forest { if(char_frequency[i] != 0) { curr = (node *)malloc(sizeof(node)); curr->left = curr->right = NULL; curr->val = i; curr->weight = char_frequency[i]; forest[forest_counter] = curr; forest_counter++; } } insertion_sort(forest, forest_counter);//sorted initial forest while(forest_counter > 1)//build final tree { node *parent; parent = (node *)malloc(sizeof(node)); parent->right = forest[forest_counter-1]; parent->left = forest[forest_counter-2]; parent->weight = forest[forest_counter-1]->weight + forest[forest_counter-2]->weight; parent->val = NULL; forest[forest_counter-1] = NULL; forest[forest_counter-2] = parent; forest_counter--; insertion_sort(forest, forest_counter); } printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printf("Huffman tree (inorder traversal sequence):\n"); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); printout_inorder(forest[0]); printf("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"); construct_huffman_table(forest[0]); //delete_binary_tree_postorder(forest[0]); //after building Huffman table we do not need Huffman tree anymore } void array_initializer() { for(int i = 0 ; i < MAX_CHAR ; i++) { char_frequency[i] = 0; } for(int i = 0 ; i < MAX_CHAR ; i++) { for(int j = 0 ; j < (MAX_CHAR-1) ; j++) { char_huffman_table[i][j] = -1; } } } //+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ //Calculation on CPU+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ void compress_file() { FILE *input_file; FILE *compressed_file; unsigned char output_char; int write_counter; //how many bits have been written in specific byte unsigned char input_char; unsigned char end_of_file ; unsigned char mask ; //00000001; input_file = fopen(INPUT_FILE_NAME, "rb"); compressed_file = fopen(COMPRESSED_FILE_NAME, "wb"); // apend file (add text to a file or create a file if it does not exist) output_char= 0x0; write_counter = 0; end_of_file = 255; mask = 0x01; if ((input_file==NULL)||(compressed_file==NULL)) { perror ("Error reading file"); } else { do { input_char = getc (input_file); //read one character from input file for(int i = 0 ; i < (MAX_CHAR - 1) ; i++) { if(char_huffman_table[input_char][i] == 0) //detect if current character on particular position has 0 or 1 { output_char = output_char << 1; //if 0 then shift bits one position to left (last bit after shifting is 0) write_counter++; } else if(char_huffman_table[input_char][i] == 1) { output_char = output_char << 1; //if 1 then shift bits one position to left... output_char = output_char | mask; //...and last bit change to: 1 write_counter++; } else //-1 { if(input_char == end_of_file) //if EOF is detected then write current result to file { if(write_counter != 0) { output_char = output_char << (8-write_counter); printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); output_char = 0x0; } else //write_counter == 0 { printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); } } break; } if(write_counter == 8) //if result achieved 8 (size of char) then write it to compressed_file { printf("Compressed char in decimal is %d \n", output_char); putc(output_char, compressed_file); output_char = 0x0; write_counter = 0; } } } while (input_char != end_of_file); fclose (input_file); fclose(compressed_file); last_byte_padding = write_counter; //to decompress file we have to know how many bits in last byte have been written //update_config(write_counter); //TODO to zakomentowac przy ostatecznych pomiarach } } void print_gpu_compressed_file(char *final_compressed_cpu,int finalsize_cpu) { FILE *compressed_file; compressed_file = fopen(COMPRESSED_FILE_NAME_GPU, "wb"); for(int i=0;i<finalsize_cpu;i++) { char c=final_compressed_cpu[i]; printf("i is %d and c is %c",i,c); putc(c,compressed_file); } fclose(compressed_file); } void decompress_file() { FILE *compressed_file; FILE *decompressed_file; unsigned char end_of_file = 255; unsigned char mask = 0x7F; //01111111; unsigned char curr; unsigned char next; int written_char_counter=0; int pattern[MAX_CHAR - 1]; for(int i = 0 ; i < (MAX_CHAR - 1); i++) { pattern[i] = -1; } compressed_file = fopen(COMPRESSED_FILE_NAME, "rb"); decompressed_file = fopen(DECOMPRESSED_FILE_NAME, "wb"); if ((compressed_file==NULL)||(decompressed_file==NULL)) { perror ("Error reading file"); } else { int bit_counter=0; unsigned char first_bit; bool read_next = true; curr = getc (compressed_file); next = getc (compressed_file); //we have to read one byte in advance due to padding // for(int i = 0 ; i < (MAX_CHAR - 1) ; i++) //builds a pattern and chcecks if it matches to char_huffman_table int pattern_counter=-1; while(pattern_counter < (MAX_CHAR - 1)) { pattern_counter++; first_bit = curr | mask; //check if first bit is 0 or 1 curr = curr << 1; if(bit_counter == 7) { bit_counter = 0; curr = next; if(read_next) { next = getc (compressed_file); if(next == end_of_file) { if((number_of_char - written_char_counter) < 8) { read_next = false; bit_counter = 7 - last_byte_padding; } } } if((curr == end_of_file) && ((number_of_char - written_char_counter) < 8)) { break; } } else { bit_counter++; } if(first_bit == 255) { pattern[pattern_counter] = 1; } else { pattern[pattern_counter] = 0; } bool flag = true; for(int j = 0 ; j < MAX_CHAR ; j++) { flag = true; for(int k = 0 ; k < (MAX_CHAR - 1) ; k++) { if(char_huffman_table[j][k] != pattern[k]) { flag = false; break; } } if(flag == true) { written_char_counter++; putc(j, decompressed_file); for(int i = 0 ; i < (MAX_CHAR - 1); i++) { pattern[i] = -1; } pattern_counter = -1; break; } } } fclose (compressed_file); fclose (decompressed_file); } } void initialize() { array_initializer(); read_file(); print_char_frequency(); build_binary_tree(); print_char_huffman_table(); } /*__global__ void compress(int *d_input,int number_of_char,int *d_char_huffman_table,int MAX_CHAR) { int i=0; extern __shared__ int my2DArray[32][32]; //size need to be coded a development time though my2DArray[threadIdx.x][threadIdx.y] = flatArray[blockDim.x * threadIdx.y + threadIdx.x]; }*/ __global__ void read2darray(int *devPtr,int pitch) { int elements[2][2]; for (int r = 0; r < 2; ++r) { int* row = (int*)((char*)devPtr + r * pitch); for (int c = 0; c < 2; ++c) { elements[r][c] = row[c]; } } } __global__ void check_bool(bool *d_bool) { d_bool[0]=false; d_bool[1]=false; } void print_huffman() { printf(" \n Huffman after copying back \n " ); unsigned char input_char1; unsigned char input_char2; unsigned char input_char3; unsigned char input_char4; input_char1 = h_input[0]; input_char2 = h_input[1]; input_char3 = h_input[2]; input_char4 = h_input[3]; for (int i=0;i < MAX_CHAR-1;i++) { if(huffman_check[ input_char1*255+i]!= -1 ) printf ("\t%c code is %d \n", input_char1,huffman_check[ input_char1*255+i]); } for (int i=0;i < MAX_CHAR-1;i++) { if(huffman_check[ input_char2*255+i]!= -1) printf ("\t%c code is %d \n",input_char2, huffman_check[ input_char2*255+i]); } for (int i=0;i < MAX_CHAR-1;i++) { if(huffman_check[ input_char3*255+i]!= -1 ) printf ("\t%c code is %d \n", input_char3,huffman_check[ input_char3*255+i]); } for (int i=0;i < MAX_CHAR-1;i++) { if(huffman_check[ input_char4*255+i]!= -1 ) printf ("\t%c code is %d \n", input_char4,huffman_check[ input_char4*255+i]); } } int main(int argc, char* argv[]) { int *finalsize_cpu=0; unsigned char end_of_file = 255; printf("start\n"); initialize(); hipEvent_t start, stop; // cuda events to measure time float elapsed_time,elapsed_time_Cont; hipEventCreate(&start); // timing objects hipEventCreate(&stop); unsigned int timer2=0; time_t seconds; // In initialize in cpu,we put the file chars into array, fill huffman table and char_freq_arrays //copy the input contents into an array hipMalloc((void **)&d_input,number_of_char*sizeof(char)); checkCUDAError("Error in allocating d_input"); hipMemcpy(d_input,h_input,number_of_char*sizeof(char),hipMemcpyHostToDevice); checkCUDAError("Error in copying d_input"); // Allocate space for the compressed file to be used in GPU hipMalloc((void **)&compressedfile_array,number_of_char*(MAX_CHAR -1)*sizeof(bool)); checkCUDAError("Error in allocating compressedfile_array"); // hipMalloc((void **)&d_char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1) * sizeof(int)); checkCUDAError("Error in allocating d_char_huffman_table"); hipMemcpy(d_char_huffman_table,char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1) * sizeof(int),hipMemcpyHostToDevice); checkCUDAError("Error in copying d_char_huffman_table"); hipMemcpy(huffman_check,d_char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1) * sizeof(int),hipMemcpyDeviceToHost); checkCUDAError("Error in copying back"); hipMalloc((void **)&block_cntr_array,number_of_char*sizeof(int)); checkCUDAError("Error in allocating block_cntr_array"); hipMalloc((void **)&d_last_byte_padding,sizeof(int)); checkCUDAError("Error in allocating d_last_byte_padding"); hipMalloc((void **)&finalsize,sizeof(int)); checkCUDAError("Error in allocating finalsize"); hipMalloc((void **)&orig_number_of_char,sizeof(int)); checkCUDAError("Error in allocating orig_number_of_char"); hipMemcpy(orig_number_of_char,&number_of_char,sizeof(int),hipMemcpyHostToDevice); checkCUDAError("Error in copying orig_number_of_char"); // check if i can make a boolean array h_bool=(bool *) malloc(2*sizeof(bool)); h_bool[0]=true; h_bool[1]=true; printf("bool1 is %d and bool2 is %d \n",h_bool[0],h_bool[1]); hipMalloc((void **)&d_bool,2*sizeof(bool)); checkCUDAError("Error in d_bool"); hipMemcpy(d_bool,h_bool,2*sizeof(bool),hipMemcpyHostToDevice); checkCUDAError("Error in copying d_bool"); //check_bool<<<1,1>>>(d_bool); checkCUDAError("Error in kernel changing d_bool"); hipDeviceSynchronize(); checkCUDAError("Error in hipDeviceSynchronize"); hipMemcpy(h_bool,d_bool,2*sizeof(bool),hipMemcpyDeviceToHost); checkCUDAError("Error in copying d_bool back"); printf("Now bool1 is %d and bool2 is %d \n",h_bool[0],h_bool[1]); int checkhuff[2][3]= { {0, 0, 0}, {1, 1, 1} }; bool flag = true; for(int j=0;j<2;j++) { flag = true; for(int k=0;k<2;k++) { printf("h_bool is %d \t checkhuff is %d \n",int(h_bool[k]),checkhuff[j][k]); if(checkhuff[j][k] != int(h_bool[k])) { flag = false; break; } } if(flag == true) { printf("pattern for %d is found\n",checkhuff[j][0]); } } //copy and send the huffman table as a 2d array to GPU Device //int *darray=0; //size_t pitch; //cudaMallocPitch( (void**)&darray, &pitch, 2 * sizeof(int), 2); //cudaMemcpy2D(darray,pitch,harray,2*sizeof(int),2*sizeof(int),2,cudaMemcpyHostToDevice); //cudaMalloc((void **)&darray,4*sizeof(int)); //cudaMemcpy(darray,harray,4*sizeof(int),cudaMemcpyHostToDevice); //cudaMemcpy2D(copiedarray,2*sizeof(int),darray,pitch,pitch,2,cudaMemcpyDeviceToHost); // cudaMemcpy2D(copiedarray,2*sizeof(int),darray,pitch,2*sizeof(int),2,cudaMemcpyDeviceToHost); //printf("After copying back %d, \t %d, \t %d, \t %d \n",copiedarray[0][0],copiedarray[0][1],copiedarray[1][0],copiedarray[1][1]); //int *darray_2d=0; //cudaMalloc((void **)&darray_2d,4*sizeof(int)); //cudaMemcpy(darray,harray,4*sizeof(int),cudaMemcpyHostToDevice); // read2darray<<<1,1>>>(darray, pitch); //size_t pitch2; //cudaMallocPitch( (void**)&d_char_huffman_table, &pitch2, (MAX_CHAR-1) * sizeof(int), MAX_CHAR); //cudaMemcpy2D(d_char_huffman_table,pitch2,char_huffman_table,(MAX_CHAR-1) * sizeof(int),(MAX_CHAR-1) * sizeof(int),MAX_CHAR,cudaMemcpyHostToDevice); //cudaMemcpy2D(char_huffman_table_gpu,(MAX_CHAR-1) * sizeof(int),char_huffman_table,(MAX_CHAR-1) * sizeof(int),(MAX_CHAR-1) * sizeof(int),MAX_CHAR,cudaMemcpyHostToDevice); //checkCUDAError("Error in char_huffman_table_gpu"); //cudaMemcpy2D(copiedarray2,(MAX_CHAR-1)*sizeof(int),d_char_huffman_table,pitch2,(MAX_CHAR-1)*sizeof(int),MAX_CHAR,cudaMemcpyDeviceToHost); //cudaMemcpy2D(copiedarray2,(MAX_CHAR-1)*sizeof(int),char_huffman_table_gpu,(MAX_CHAR-1) * sizeof(int),(MAX_CHAR-1) * sizeof(int),MAX_CHAR,cudaMemcpyDeviceToHost); //cudaMemcpy(orig_number_of_char,&number_of_char,sizeof(int),cudaMemcpyHostToDevice); // checkCUDAError("Error in copiedarray2"); // print_dchar_huffman_table(); printf("\n the number of characters in the input file is %d \n",number_of_char); getchar(); /*for(int i=0;i<number_of_char;i++) { if( h_input[i] == end_of_file ) printf(" EOF \n"); printf(" Copying into array: i is %d and c is %c \n",i,h_input[i]); }*/ getchar(); print_huffman(); int no_of_blocks = (number_of_char + BLOCK_SIZE -1)/BLOCK_SIZE; printf("no_of_blocksis %d \n", no_of_blocks); if(no_of_blocks == 0) no_of_blocks =1; //compress_file_gpu<<<number_of_char,1>>>(d_input,compressedfile_array,d_char_huffman_table,block_cntr_array,d_last_byte_padding); hipEventRecord(start, 0); // start time checkCUDAError("Error in hipEventRecord start \n"); compress_file_gpu<<<no_of_blocks,BLOCK_SIZE>>>(d_input,compressedfile_array,d_char_huffman_table,block_cntr_array,d_last_byte_padding,finalsize,orig_number_of_char,number_of_char); checkCUDAError("Error in compress_file_gpu \n"); hipDeviceSynchronize(); //cudaMalloc((void **)&block_cntr_array_check,number_of_char*sizeof(int)); //checkCUDAError("Error in allocating block_cntr_array_check"); block_cntr_array_check = (int *) malloc(number_of_char*sizeof(int)); hipMemcpy(block_cntr_array_check,block_cntr_array,number_of_char*sizeof(int),hipMemcpyDeviceToHost); checkCUDAError("Error in copying back block_cntr_array_check"); for(int i=0; i < number_of_char; i++) { printf(" block size for i = %d is %d \n",i, block_cntr_array_check[i]); } // computearray_size<<<1,1>>>(block_cntr_array,finalsize,orig_number_of_char); checkCUDAError("Error in Compute array \n"); finalsize_cpu = (int *)malloc(sizeof(int)); hipMemcpy(finalsize_cpu,finalsize,sizeof(int),hipMemcpyDeviceToHost); printf("The final compressed array size is %d \n ", *finalsize_cpu); checkCUDAError("Error in finalsize_cpu"); int block = *finalsize_cpu; //allocate space for the final compressed array hipMalloc((void **)&finalcompressed_array,((*finalsize_cpu)*sizeof(bool))); checkCUDAError("hipMemcpyHostToDevice"); final_compression<<<no_of_blocks,BLOCK_SIZE>>>(block_cntr_array,compressedfile_array,finalcompressed_array,number_of_char); checkCUDAError("Error in final_compression call \n"); hipDeviceSynchronize(); checkCUDAError("Error in hipDeviceSynchronize \n"); hipEventRecord(stop, 0); checkCUDAError("Error in hipEventRecord stop \n"); hipEventSynchronize(stop); hipEventElapsedTime(&elapsed_time, start, stop); printf("Time to calculate results: %f ms.\n", elapsed_time); // print out execution time bool *final_compressed_cpu=0; final_compressed_cpu = (bool *)malloc((*finalsize_cpu)*sizeof(bool)); hipMemcpy(final_compressed_cpu,finalcompressed_array,((*finalsize_cpu)*sizeof(bool)),hipMemcpyDeviceToHost); checkCUDAError("Error in copying final_compressed_cpu\n"); //print_gpu_compressed_file(final_compressed_cpu,*finalsize_cpu); printf("The compressed value in binary is "); write_GPU_compressed(final_compressed_cpu,finalsize_cpu); for(int i=0;i<*finalsize_cpu;i++) // sprintf(compress_file+i,final_compressed_cpu[i]); //printf("i is %d and val is %d \n",i,final_compressed_cpu[i]); printf("\n"); // cudaMalloc((void **)&d_char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1)*sizeof(int)); // cudaMemcpy(d_char_huffman_table,char_huffman_table,(MAX_CHAR)*(MAX_CHAR-1)*sizeof(int),cudaMemcpyHostToDevice); // printf("\n Going to compress on the GPU "); // compress<<<number_of_char,1>>>(d_input,number_of_char,d_char_huffman_table,MAX_CHAR); //test ends printf("compressing on CPU...\n"); //timer2=0; // CUT_SAFE_CALL(cutCreateTimer(&timer2)); //CUT_SAFE_CALL(cutStartTimer(timer2)); /*clock_t Linuxclock_start,Linuxclock_end; // clock return type cudaEvent_t CUDAevent_start, CUDAevent_end; float CUDAEvents_time; cudaEventRecord(CUDAevent_start, 0 ); cudaEventSynchronize(CUDAevent_start); Linuxclock_start = clock();*/ /*time_t before,after; before = time (NULL);*/ clock_t start1, stop1; start1 = clock(); compress_file(); stop1 = clock(); float elapsedTime = (float)(stop1 - start1) / (float)CLOCKS_PER_SEC * 1000.0f; printf( "Time in cpu : %3.1f ms\n", elapsedTime ); printf("Time to calculate results: %f ms.\n", elapsed_time); // print out execution time printf("Speedup achieved is %lf \n", elapsedTime/elapsed_time ); /*after = time (NULL); double dif; dif = difftime (after,before); printf ("It took you %.9lf seconds to type your name.\n", dif );*/ /*Linuxclock_end = clock(); cudaEventRecord(CUDAevent_end, 0 ); // instrument code to measure end time cudaEventSynchronize(CUDAevent_end); cudaEventElapsedTime(&CUDAEvents_time, CUDAevent_start, CUDAevent_end); printf("CPU Time using CUDA events: %f ms\n", CUDAEvents_time); // time_CUDAEvents is in ms printf("CPU Time using Linux clock: %f ms\n", ((double) (Linuxclock_end - Linuxclock_start) * 1000)/CLOCKS_PER_SEC); //Linuxclock in sec cudaEventDestroy(CUDAevent_start); cudaEventDestroy(CUDAevent_end);*/ //CUT_SAFE_CALL(cutStopTimer(timer2)); //float time2=cutGetAverageTimerValue(timer2); //printf(" Time on Host %f\n", time2); printf("decompressing on CPU...\n"); decompress_file(); getchar(); return 0; }
.text .file "gpulab1_1.hip" .globl _Z14checkCUDAErrorPKc # -- Begin function _Z14checkCUDAErrorPKc .type _Z14checkCUDAErrorPKc,@function _Z14checkCUDAErrorPKc: # @_Z14checkCUDAErrorPKc .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx callq hipGetLastError testl %eax, %eax jne .LBB0_2 # %bb.1: popq %rbx .cfi_def_cfa_offset 8 retq .LBB0_2: .cfi_def_cfa_offset 16 movl %eax, %edi callq hipGetErrorString movl $.L.str, %edi movq %rbx, %rsi movq %rax, %rdx xorl %eax, %eax callq printf movl $.Lstr, %edi callq puts@PLT callq getchar movl $-1, %edi callq exit .Lfunc_end0: .size _Z14checkCUDAErrorPKc, .Lfunc_end0-_Z14checkCUDAErrorPKc .cfi_endproc # -- End function .globl _Z32__device_stub__final_compressionPiPbS0_i # -- Begin function _Z32__device_stub__final_compressionPiPbS0_i .type _Z32__device_stub__final_compressionPiPbS0_i,@function _Z32__device_stub__final_compressionPiPbS0_i: # @_Z32__device_stub__final_compressionPiPbS0_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z17final_compressionPiPbS0_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z32__device_stub__final_compressionPiPbS0_i, .Lfunc_end1-_Z32__device_stub__final_compressionPiPbS0_i .cfi_endproc # -- End function .globl _Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i # -- Begin function _Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i .type _Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i,@function _Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i: # @_Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $160, %rsp .cfi_def_cfa_offset 208 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 16(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 208(%rsp), %rax movq %rax, 48(%rbx) leaq 216(%rsp), %rax movq %rax, 56(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $176, %rsp .cfi_adjust_cfa_offset -176 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i, .Lfunc_end2-_Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i .cfi_endproc # -- End function .globl _Z20write_GPU_compressedPbPi # -- Begin function _Z20write_GPU_compressedPbPi .type _Z20write_GPU_compressedPbPi,@function _Z20write_GPU_compressedPbPi: # @_Z20write_GPU_compressedPbPi .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 pushq %rax .cfi_def_cfa_offset 64 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rsi, %r14 movq %rdi, %r15 movl $.L.str.2, %edi movl $.L.str.3, %esi callq fopen movq %rax, %rbx testq %rax, %rax je .LBB3_9 # %bb.1: # %.preheader movl (%r14), %eax testl %eax, %eax jle .LBB3_2 # %bb.3: # %.lr.ph.outer.preheader xorl %r13d, %r13d .LBB3_4: # %.lr.ph.outer # =>This Loop Header: Depth=1 # Child Loop BB3_5 Depth 2 cltq movl $-8, %r12d xorl %ecx, %ecx .LBB3_5: # %.lr.ph # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 addb %cl, %cl orb (%r15,%r13), %cl movzbl %cl, %ebp cmpl $-1, %r12d je .LBB3_10 # %bb.6: # in Loop: Header=BB3_5 Depth=2 incq %r13 incl %r12d cmpq %rax, %r13 jl .LBB3_5 jmp .LBB3_7 .LBB3_10: # %.thread # in Loop: Header=BB3_4 Depth=1 xorl %r12d, %r12d movl $.L.str.5, %edi movl %ebp, %esi xorl %eax, %eax callq printf movl %ebp, %edi movq %rbx, %rsi callq putc movslq (%r14), %rax incq %r13 cmpq %rax, %r13 jl .LBB3_4 jmp .LBB3_8 .LBB3_7: # %._crit_edge movl %r12d, %ecx negb %cl shll %cl, %ebp movzbl %bpl, %ebp movl $.L.str.5, %edi movl %ebp, %esi xorl %eax, %eax callq printf movl %ebp, %edi movq %rbx, %rsi callq putc addl $8, %r12d jmp .LBB3_8 .LBB3_9: movl $.L.str.4, %edi callq perror .LBB3_2: xorl %r12d, %r12d .LBB3_8: # %._crit_edge.thread43 movq %rbx, %rdi callq fclose movl %r12d, last_byte_padding_gpu(%rip) addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _Z20write_GPU_compressedPbPi, .Lfunc_end3-_Z20write_GPU_compressedPbPi .cfi_endproc # -- End function .globl _Z25print_dchar_huffman_tablev # -- Begin function _Z25print_dchar_huffman_tablev .type _Z25print_dchar_huffman_tablev,@function _Z25print_dchar_huffman_tablev: # @_Z25print_dchar_huffman_tablev .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl $.L.str.6, %edi xorl %eax, %eax callq printf callq getchar movl $.Lstr.16, %edi callq puts@PLT movl $.Lstr.10, %edi callq puts@PLT movl $.Lstr.16, %edi callq puts@PLT movl $copiedarray2, %r14d xorl %ebx, %ebx .LBB4_1: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB4_2 Depth 2 xorl %r15d, %r15d xorl %eax, %eax .LBB4_2: # Parent Loop BB4_1 Depth=1 # => This Inner Loop Header: Depth=2 cmpl $-1, (%r14,%r15,4) je .LBB4_8 # %bb.3: # in Loop: Header=BB4_2 Depth=2 testb $1, %al jne .LBB4_7 # %bb.4: # in Loop: Header=BB4_2 Depth=2 cmpq $10, %rbx jne .LBB4_6 # %bb.5: # in Loop: Header=BB4_2 Depth=2 movl $.L.str.9, %edi xorl %eax, %eax callq printf jmp .LBB4_7 .LBB4_6: # in Loop: Header=BB4_2 Depth=2 movl $.L.str.10, %edi movl %ebx, %esi xorl %eax, %eax callq printf .LBB4_7: # in Loop: Header=BB4_2 Depth=2 movl (%r14,%r15,4), %esi movl $.L.str.11, %edi xorl %eax, %eax callq printf movb $1, %al .LBB4_8: # in Loop: Header=BB4_2 Depth=2 incq %r15 cmpq $255, %r15 jne .LBB4_2 # %bb.9: # in Loop: Header=BB4_1 Depth=1 testb $1, %al je .LBB4_11 # %bb.10: # in Loop: Header=BB4_1 Depth=1 movl $10, %edi callq putchar@PLT .LBB4_11: # in Loop: Header=BB4_1 Depth=1 incq %rbx addq $1020, %r14 # imm = 0x3FC cmpq $256, %rbx # imm = 0x100 jne .LBB4_1 # %bb.12: movl $.Lstr.16, %edi callq puts@PLT popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp getchar # TAILCALL .Lfunc_end4: .size _Z25print_dchar_huffman_tablev, .Lfunc_end4-_Z25print_dchar_huffman_tablev .cfi_endproc # -- End function .globl _Z14insertion_sortPP4nodei # -- Begin function _Z14insertion_sortPP4nodei .type _Z14insertion_sortPP4nodei,@function _Z14insertion_sortPP4nodei: # @_Z14insertion_sortPP4nodei .cfi_startproc # %bb.0: # kill: def $esi killed $esi def $rsi cmpl $2, %esi jl .LBB5_8 # %bb.1: # %.lr.ph.preheader pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 decl %esi movl $1, %eax xorl %ecx, %ecx movl $1, %edx .LBB5_2: # %.lr.ph # =>This Loop Header: Depth=1 # Child Loop BB5_3 Depth 2 movq (%rdi,%rax,8), %r8 movl 4(%r8), %r9d xorl %r10d, %r10d movq %rcx, %r11 .LBB5_3: # Parent Loop BB5_2 Depth=1 # => This Inner Loop Header: Depth=2 movq (%rdi,%r11,8), %rbx cmpl %r9d, 4(%rbx) jge .LBB5_6 # %bb.4: # in Loop: Header=BB5_3 Depth=2 movq %rbx, 8(%rdi,%r11,8) leaq -1(%r11), %rbx testq %r11, %r11 movzbl %r10b, %r10d cmovlel %edx, %r10d movq %rbx, %r11 testb $1, %r10b je .LBB5_3 # %bb.5: # %.thread.loopexit # in Loop: Header=BB5_2 Depth=1 movl %ebx, %r11d .LBB5_6: # %.thread # in Loop: Header=BB5_2 Depth=1 movslq %r11d, %r9 movq %r8, 8(%rdi,%r9,8) incq %rax incq %rcx cmpq %rsi, %rcx jne .LBB5_2 # %bb.7: popq %rbx .cfi_def_cfa_offset 8 .cfi_restore %rbx .LBB5_8: # %._crit_edge retq .Lfunc_end5: .size _Z14insertion_sortPP4nodei, .Lfunc_end5-_Z14insertion_sortPP4nodei .cfi_endproc # -- End function .globl _Z20print_char_frequencyv # -- Begin function _Z20print_char_frequencyv .type _Z20print_char_frequencyv,@function _Z20print_char_frequencyv: # @_Z20print_char_frequencyv .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl $.Lstr.16, %edi callq puts@PLT movl $.Lstr.6, %edi callq puts@PLT movl $.Lstr.16, %edi callq puts@PLT xorl %ebx, %ebx .LBB6_1: # =>This Inner Loop Header: Depth=1 movl char_frequency(,%rbx,4), %ecx testl %ecx, %ecx je .LBB6_5 # %bb.2: # in Loop: Header=BB6_1 Depth=1 cmpq $10, %rbx jne .LBB6_4 # %bb.3: # in Loop: Header=BB6_1 Depth=1 movl $.L.str.14, %edi movl $10, %esi movl %ecx, %edx xorl %eax, %eax callq printf jmp .LBB6_5 .LBB6_4: # in Loop: Header=BB6_1 Depth=1 movl $.L.str.15, %edi movl %ebx, %esi movl %ebx, %edx xorl %eax, %eax callq printf .LBB6_5: # in Loop: Header=BB6_1 Depth=1 incq %rbx cmpq $256, %rbx # imm = 0x100 jne .LBB6_1 # %bb.6: movl $.Lstr.16, %edi popq %rbx .cfi_def_cfa_offset 8 jmp puts@PLT # TAILCALL .Lfunc_end6: .size _Z20print_char_frequencyv, .Lfunc_end6-_Z20print_char_frequencyv .cfi_endproc # -- End function .globl _Z24print_char_huffman_tablev # -- Begin function _Z24print_char_huffman_tablev .type _Z24print_char_huffman_tablev,@function _Z24print_char_huffman_tablev: # @_Z24print_char_huffman_tablev .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl $.Lstr.16, %edi callq puts@PLT movl $.Lstr.10, %edi callq puts@PLT movl $.Lstr.16, %edi callq puts@PLT movl $char_huffman_table, %r14d xorl %ebx, %ebx .LBB7_1: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB7_2 Depth 2 xorl %r15d, %r15d xorl %eax, %eax .LBB7_2: # Parent Loop BB7_1 Depth=1 # => This Inner Loop Header: Depth=2 cmpl $-1, (%r14,%r15,4) je .LBB7_8 # %bb.3: # in Loop: Header=BB7_2 Depth=2 testb $1, %al jne .LBB7_7 # %bb.4: # in Loop: Header=BB7_2 Depth=2 cmpq $10, %rbx jne .LBB7_6 # %bb.5: # in Loop: Header=BB7_2 Depth=2 movl $.L.str.9, %edi xorl %eax, %eax callq printf jmp .LBB7_7 .LBB7_6: # in Loop: Header=BB7_2 Depth=2 movl $.L.str.10, %edi movl %ebx, %esi xorl %eax, %eax callq printf .LBB7_7: # in Loop: Header=BB7_2 Depth=2 movl (%r14,%r15,4), %esi movl $.L.str.11, %edi xorl %eax, %eax callq printf movb $1, %al .LBB7_8: # in Loop: Header=BB7_2 Depth=2 incq %r15 cmpq $255, %r15 jne .LBB7_2 # %bb.9: # in Loop: Header=BB7_1 Depth=1 testb $1, %al je .LBB7_11 # %bb.10: # in Loop: Header=BB7_1 Depth=1 movl $10, %edi callq putchar@PLT .LBB7_11: # in Loop: Header=BB7_1 Depth=1 incq %rbx addq $1020, %r14 # imm = 0x3FC cmpq $256, %rbx # imm = 0x100 jne .LBB7_1 # %bb.12: movl $.Lstr.16, %edi popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp puts@PLT # TAILCALL .Lfunc_end7: .size _Z24print_char_huffman_tablev, .Lfunc_end7-_Z24print_char_huffman_tablev .cfi_endproc # -- End function .globl _Z16printout_inorderP4node # -- Begin function _Z16printout_inorderP4node .type _Z16printout_inorderP4node,@function _Z16printout_inorderP4node: # @_Z16printout_inorderP4node .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx .LBB8_1: # %tailrecurse # =>This Inner Loop Header: Depth=1 movq 16(%rbx), %rdi testq %rdi, %rdi je .LBB8_3 # %bb.2: # in Loop: Header=BB8_1 Depth=1 callq _Z16printout_inorderP4node .LBB8_3: # in Loop: Header=BB8_1 Depth=1 movl (%rbx), %edx movl 4(%rbx), %esi testl %edx, %edx je .LBB8_7 # %bb.4: # in Loop: Header=BB8_1 Depth=1 cmpl $10, %edx jne .LBB8_6 # %bb.5: # in Loop: Header=BB8_1 Depth=1 movl $.L.str.16, %edi jmp .LBB8_8 .LBB8_7: # in Loop: Header=BB8_1 Depth=1 movl $.L.str.18, %edi .LBB8_8: # in Loop: Header=BB8_1 Depth=1 xorl %eax, %eax callq printf jmp .LBB8_9 .LBB8_6: # in Loop: Header=BB8_1 Depth=1 movl $.L.str.17, %edi xorl %eax, %eax callq printf .LBB8_9: # in Loop: Header=BB8_1 Depth=1 movq 8(%rbx), %rbx testq %rbx, %rbx jne .LBB8_1 # %bb.10: popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end8: .size _Z16printout_inorderP4node, .Lfunc_end8-_Z16printout_inorderP4node .cfi_endproc # -- End function .globl _Z9read_filev # -- Begin function _Z9read_filev .type _Z9read_filev,@function _Z9read_filev: # @_Z9read_filev .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %rbp, -16 movl $.L.str.19, %edi movl $.L.str.20, %esi callq fopen testq %rax, %rax je .LBB9_1 # %bb.2: movq %rax, %rbx movl $50000, %edi # imm = 0xC350 callq malloc movq %rax, h_input(%rip) movl $255, %ebp .LBB9_3: # =>This Inner Loop Header: Depth=1 movq %rbx, %rdi callq getc # kill: def $eax killed $eax def $rax movq h_input(%rip), %rcx movslq number_of_char(%rip), %rdx movb %al, (%rcx,%rdx) incl number_of_char(%rip) andl %ebp, %eax incl char_frequency(,%rax,4) cmpl %ebp, %eax jne .LBB9_3 # %bb.4: movq %rbx, %rdi callq fclose .LBB9_5: movl $0, char_frequency+1020(%rip) decl number_of_char(%rip) addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB9_1: .cfi_def_cfa_offset 32 movl $.L.str.4, %edi callq perror jmp .LBB9_5 .Lfunc_end9: .size _Z9read_filev, .Lfunc_end9-_Z9read_filev .cfi_endproc # -- End function .globl _Z17traverse_preorderP4nodePi # -- Begin function _Z17traverse_preorderP4nodePi .type _Z17traverse_preorderP4nodePi,@function _Z17traverse_preorderP4nodePi: # @_Z17traverse_preorderP4nodePi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rsi, %rbx movq %rdi, %r14 cmpl $0, (%rdi) je .LBB10_3 # %bb.1: # %.preheader37.preheader xorl %eax, %eax .LBB10_2: # %.preheader37 # =>This Inner Loop Header: Depth=1 movl (%rbx,%rax,4), %ecx movslq (%r14), %rdx imulq $1020, %rdx, %rdx # imm = 0x3FC movl %ecx, char_huffman_table(%rdx,%rax,4) incq %rax cmpq $255, %rax jne .LBB10_2 .LBB10_3: # %.loopexit movq 16(%r14), %rdi testq %rdi, %rdi je .LBB10_9 # %bb.4: # %.preheader36.preheader xorl %eax, %eax .LBB10_5: # %.preheader36 # =>This Inner Loop Header: Depth=1 cmpl $-1, (%rbx,%rax,4) je .LBB10_8 # %bb.6: # in Loop: Header=BB10_5 Depth=1 incq %rax cmpq $255, %rax jne .LBB10_5 # %bb.7: movl $255, %eax .LBB10_8: movl %eax, %r15d movl $1, (%rbx,%r15,4) movq %rbx, %rsi callq _Z17traverse_preorderP4nodePi movl $-1, (%rbx,%r15,4) .LBB10_9: movq 8(%r14), %rdi testq %rdi, %rdi je .LBB10_15 # %bb.10: # %.preheader.preheader xorl %eax, %eax .LBB10_11: # %.preheader # =>This Inner Loop Header: Depth=1 cmpl $-1, (%rbx,%rax,4) je .LBB10_14 # %bb.12: # in Loop: Header=BB10_11 Depth=1 incq %rax cmpq $255, %rax jne .LBB10_11 # %bb.13: movl $255, %eax .LBB10_14: movl %eax, %r14d movl $0, (%rbx,%r14,4) movq %rbx, %rsi callq _Z17traverse_preorderP4nodePi movl $-1, (%rbx,%r14,4) .LBB10_15: # %common.ret56 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end10: .size _Z17traverse_preorderP4nodePi, .Lfunc_end10-_Z17traverse_preorderP4nodePi .cfi_endproc # -- End function .globl _Z23construct_huffman_tableP4node # -- Begin function _Z23construct_huffman_tableP4node .type _Z23construct_huffman_tableP4node,@function _Z23construct_huffman_tableP4node: # @_Z23construct_huffman_tableP4node .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 subq $1032, %rsp # imm = 0x408 .cfi_def_cfa_offset 1056 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rdi, %rbx movq %rsp, %r14 movl $1020, %edx # imm = 0x3FC movq %r14, %rdi movl $255, %esi callq memset@PLT movq %rbx, %rdi movq %r14, %rsi callq _Z17traverse_preorderP4nodePi addq $1032, %rsp # imm = 0x408 .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end11: .size _Z23construct_huffman_tableP4node, .Lfunc_end11-_Z23construct_huffman_tableP4node .cfi_endproc # -- End function .section .rodata.cst16,"aM",@progbits,16 .p2align 4, 0x0 # -- Begin function _Z17build_binary_treev .LCPI12_0: .zero 16 .text .globl _Z17build_binary_treev .type _Z17build_binary_treev,@function _Z17build_binary_treev: # @_Z17build_binary_treev .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $3080, %rsp # imm = 0xC08 .cfi_def_cfa_offset 3120 .cfi_offset %rbx, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 xorl %r14d, %r14d xorl %ebx, %ebx .LBB12_1: # =>This Inner Loop Header: Depth=1 movl char_frequency(,%r14,4), %ebp testl %ebp, %ebp je .LBB12_3 # %bb.2: # in Loop: Header=BB12_1 Depth=1 movl $24, %edi callq malloc xorps %xmm0, %xmm0 movups %xmm0, 8(%rax) movl %r14d, (%rax) movl %ebp, 4(%rax) movslq %ebx, %rbx movq %rax, (%rsp,%rbx,8) incl %ebx .LBB12_3: # in Loop: Header=BB12_1 Depth=1 incq %r14 cmpq $256, %r14 # imm = 0x100 jne .LBB12_1 # %bb.4: movq %rsp, %rdi movl %ebx, %esi callq _Z14insertion_sortPP4nodei cmpl $2, %ebx jl .LBB12_7 # %bb.5: # %.lr.ph.preheader movl %ebx, %r15d movq %rsp, %rbx .LBB12_6: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl $24, %edi callq malloc leaq -1(%r15), %r14 movq -8(%rsp,%r15,8), %rcx movq %rcx, 8(%rax) movq -16(%rsp,%r15,8), %rdx movq %rdx, 16(%rax) movl 4(%rdx), %edx addl 4(%rcx), %edx movl %edx, 4(%rax) movl $0, (%rax) movq $0, -8(%rsp,%r15,8) movq %rax, -16(%rsp,%r15,8) movq %rbx, %rdi movl %r14d, %esi callq _Z14insertion_sortPP4nodei cmpq $2, %r15 movq %r14, %r15 ja .LBB12_6 .LBB12_7: # %._crit_edge movl $.Lstr.16, %edi callq puts@PLT movl $.Lstr.14, %edi callq puts@PLT movl $.Lstr.16, %edi callq puts@PLT movq (%rsp), %rbx movq %rbx, %rdi callq _Z16printout_inorderP4node movl $.Lstr.16, %edi callq puts@PLT leaq 2048(%rsp), %r14 movl $1020, %edx # imm = 0x3FC movq %r14, %rdi movl $255, %esi callq memset@PLT movq %rbx, %rdi movq %r14, %rsi callq _Z17traverse_preorderP4nodePi addq $3080, %rsp # imm = 0xC08 .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end12: .size _Z17build_binary_treev, .Lfunc_end12-_Z17build_binary_treev .cfi_endproc # -- End function .globl _Z17array_initializerv # -- Begin function _Z17array_initializerv .type _Z17array_initializerv,@function _Z17array_initializerv: # @_Z17array_initializerv .cfi_startproc # %bb.0: # %.preheader.preheader pushq %rax .cfi_def_cfa_offset 16 movl $char_frequency, %edi movl $1024, %edx # imm = 0x400 xorl %esi, %esi callq memset@PLT movl $char_huffman_table, %edi movl $261120, %edx # imm = 0x3FC00 movl $255, %esi popq %rax .cfi_def_cfa_offset 8 jmp memset@PLT # TAILCALL .Lfunc_end13: .size _Z17array_initializerv, .Lfunc_end13-_Z17array_initializerv .cfi_endproc # -- End function .globl _Z13compress_filev # -- Begin function _Z13compress_filev .type _Z13compress_filev,@function _Z13compress_filev: # @_Z13compress_filev .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 pushq %rax .cfi_def_cfa_offset 64 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $.L.str.19, %edi movl $.L.str.22, %esi callq fopen movq %rax, %rbx movl $.L.str.23, %edi movl $.L.str.3, %esi callq fopen movq %rbx, (%rsp) # 8-byte Spill testq %rbx, %rbx je .LBB14_15 # %bb.1: movq %rax, %r14 testq %rax, %rax je .LBB14_15 # %bb.2: # %.preheader.preheader xorl %r15d, %r15d xorl %ebp, %ebp .LBB14_3: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB14_4 Depth 2 movq (%rsp), %rdi # 8-byte Reload callq getc movzbl %al, %r12d imulq $1020, %r12, %r13 # imm = 0x3FC xorl %ebx, %ebx .LBB14_4: # Parent Loop BB14_3 Depth=1 # => This Inner Loop Header: Depth=2 movl char_huffman_table(%r13,%rbx,4), %eax cmpl $1, %eax je .LBB14_9 # %bb.5: # in Loop: Header=BB14_4 Depth=2 testl %eax, %eax jne .LBB14_7 # %bb.6: # in Loop: Header=BB14_4 Depth=2 addb %bpl, %bpl jmp .LBB14_10 .LBB14_9: # in Loop: Header=BB14_4 Depth=2 addb %bpl, %bpl orb $1, %bpl .LBB14_10: # in Loop: Header=BB14_4 Depth=2 incl %r15d cmpl $8, %r15d jne .LBB14_12 # %bb.11: # in Loop: Header=BB14_4 Depth=2 movzbl %bpl, %ebp xorl %r15d, %r15d movl $.L.str.5, %edi movl %ebp, %esi xorl %eax, %eax callq printf movl %ebp, %edi movq %r14, %rsi callq putc xorl %ebp, %ebp .LBB14_12: # in Loop: Header=BB14_4 Depth=2 incq %rbx cmpq $255, %rbx jne .LBB14_4 jmp .LBB14_13 .LBB14_7: # in Loop: Header=BB14_3 Depth=1 cmpl $255, %r12d je .LBB14_8 .LBB14_13: # %.loopexit # in Loop: Header=BB14_3 Depth=1 cmpl $255, %r12d jne .LBB14_3 jmp .LBB14_14 .LBB14_8: # %.loopexit.thread.sink.split movzbl %bpl, %eax movb $8, %cl subb %r15b, %cl movl %eax, %edx shll %cl, %edx testl %r15d, %r15d movzbl %dl, %ebp cmovel %eax, %ebp movl $.L.str.5, %edi movl %ebp, %esi xorl %eax, %eax callq printf movl %ebp, %edi movq %r14, %rsi callq putc .LBB14_14: # %.loopexit.thread movq (%rsp), %rdi # 8-byte Reload callq fclose movq %r14, %rdi callq fclose movl %r15d, last_byte_padding(%rip) addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB14_15: .cfi_def_cfa_offset 64 movl $.L.str.4, %edi addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp perror # TAILCALL .Lfunc_end14: .size _Z13compress_filev, .Lfunc_end14-_Z13compress_filev .cfi_endproc # -- End function .globl _Z25print_gpu_compressed_filePci # -- Begin function _Z25print_gpu_compressed_filePci .type _Z25print_gpu_compressed_filePci,@function _Z25print_gpu_compressed_filePci: # @_Z25print_gpu_compressed_filePci .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %esi, %ebp movq %rdi, %rbx movl $.L.str.2, %edi movl $.L.str.3, %esi callq fopen movq %rax, %r14 testl %ebp, %ebp jle .LBB15_3 # %bb.1: # %.lr.ph.preheader movl %ebp, %r12d xorl %r15d, %r15d .LBB15_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movsbl (%rbx,%r15), %ebp movl $.L.str.24, %edi movl %r15d, %esi movl %ebp, %edx xorl %eax, %eax callq printf movl %ebp, %edi movq %r14, %rsi callq putc incq %r15 cmpq %r15, %r12 jne .LBB15_2 .LBB15_3: # %._crit_edge movq %r14, %rdi popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp fclose # TAILCALL .Lfunc_end15: .size _Z25print_gpu_compressed_filePci, .Lfunc_end15-_Z25print_gpu_compressed_filePci .cfi_endproc # -- End function .globl _Z15decompress_filev # -- Begin function _Z15decompress_filev .type _Z15decompress_filev,@function _Z15decompress_filev: # @_Z15decompress_filev .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $1064, %rsp # imm = 0x428 .cfi_def_cfa_offset 1120 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 leaq 32(%rsp), %rdi movl $1020, %edx # imm = 0x3FC movl $255, %esi callq memset@PLT movl $.L.str.23, %edi movl $.L.str.22, %esi callq fopen movq %rax, %rbx movl $.L.str.25, %edi movl $.L.str.3, %esi callq fopen movq %rbx, 16(%rsp) # 8-byte Spill testq %rbx, %rbx je .LBB16_19 # %bb.1: testq %rax, %rax je .LBB16_19 # %bb.2: movq %rax, 24(%rsp) # 8-byte Spill movq 16(%rsp), %rbx # 8-byte Reload movq %rbx, %rdi callq getc movl %eax, %r13d movq %rbx, %rdi callq getc movl %eax, %ebp xorl %ebx, %ebx movb $1, %al movl %eax, 12(%rsp) # 4-byte Spill movl $-1, %r14d xorl %r15d, %r15d .LBB16_3: # =>This Loop Header: Depth=1 # Child Loop BB16_13 Depth 2 # Child Loop BB16_15 Depth 3 cmpl $7, %ebx je .LBB16_4 # %bb.11: # in Loop: Header=BB16_3 Depth=1 movl %ebp, %r12d leal (,%r13,2), %ebp incl %ebx # kill: def $bpl killed $bpl killed $ebp def $ebp jmp .LBB16_12 .LBB16_4: # in Loop: Header=BB16_3 Depth=1 xorl %ebx, %ebx testb $1, 12(%rsp) # 1-byte Folded Reload jne .LBB16_6 # %bb.5: # in Loop: Header=BB16_3 Depth=1 movl %ebp, %r12d jmp .LBB16_9 .LBB16_6: # in Loop: Header=BB16_3 Depth=1 movq 16(%rsp), %rdi # 8-byte Reload callq getc movl %eax, %r12d cmpb $-1, %r12b jne .LBB16_9 # %bb.7: # in Loop: Header=BB16_3 Depth=1 movl number_of_char(%rip), %eax subl %r15d, %eax cmpl $7, %eax jg .LBB16_9 # %bb.8: # in Loop: Header=BB16_3 Depth=1 movl $7, %ebx subl last_byte_padding(%rip), %ebx movl $0, 12(%rsp) # 4-byte Folded Spill .LBB16_9: # in Loop: Header=BB16_3 Depth=1 cmpb $-1, %bpl jne .LBB16_12 # %bb.10: # in Loop: Header=BB16_3 Depth=1 movl number_of_char(%rip), %eax subl %r15d, %eax movb $-1, %bpl cmpl $8, %eax jl .LBB16_18 .LBB16_12: # in Loop: Header=BB16_3 Depth=1 incl %r14d movslq %r14d, %rax shrb $7, %r13b movzbl %r13b, %ecx movl %ecx, 32(%rsp,%rax,4) movl $char_huffman_table, %eax xorl %edi, %edi .LBB16_13: # %.preheader # Parent Loop BB16_3 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB16_15 Depth 3 xorl %ecx, %ecx .LBB16_15: # Parent Loop BB16_3 Depth=1 # Parent Loop BB16_13 Depth=2 # => This Inner Loop Header: Depth=3 movl (%rax,%rcx,4), %edx cmpl 32(%rsp,%rcx,4), %edx jne .LBB16_16 # %bb.14: # in Loop: Header=BB16_15 Depth=3 incq %rcx cmpq $255, %rcx jne .LBB16_15 jmp .LBB16_20 .LBB16_16: # in Loop: Header=BB16_13 Depth=2 incq %rdi addq $1020, %rax # imm = 0x3FC cmpq $256, %rdi # imm = 0x100 jne .LBB16_13 jmp .LBB16_17 .LBB16_20: # %.critedge # in Loop: Header=BB16_3 Depth=1 # kill: def $edi killed $edi killed $rdi movq 24(%rsp), %rsi # 8-byte Reload callq putc movl $1020, %edx # imm = 0x3FC leaq 32(%rsp), %rdi movl $255, %esi callq memset@PLT incl %r15d movl $-1, %r14d .LBB16_17: # %.loopexit # in Loop: Header=BB16_3 Depth=1 movl %ebp, %r13d movl %r12d, %ebp cmpl $255, %r14d jl .LBB16_3 .LBB16_18: movq 16(%rsp), %rdi # 8-byte Reload callq fclose movq 24(%rsp), %rdi # 8-byte Reload addq $1064, %rsp # imm = 0x428 .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp fclose # TAILCALL .LBB16_19: .cfi_def_cfa_offset 1120 movl $.L.str.4, %edi addq $1064, %rsp # imm = 0x428 .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp perror # TAILCALL .Lfunc_end16: .size _Z15decompress_filev, .Lfunc_end16-_Z15decompress_filev .cfi_endproc # -- End function .globl _Z10initializev # -- Begin function _Z10initializev .type _Z10initializev,@function _Z10initializev: # @_Z10initializev .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movl $char_frequency, %edi movl $1024, %edx # imm = 0x400 xorl %esi, %esi callq memset@PLT movl $char_huffman_table, %edi movl $261120, %edx # imm = 0x3FC00 movl $255, %esi callq memset@PLT callq _Z9read_filev callq _Z20print_char_frequencyv callq _Z17build_binary_treev popq %rax .cfi_def_cfa_offset 8 jmp _Z24print_char_huffman_tablev # TAILCALL .Lfunc_end17: .size _Z10initializev, .Lfunc_end17-_Z10initializev .cfi_endproc # -- End function .globl _Z26__device_stub__read2darrayPii # -- Begin function _Z26__device_stub__read2darrayPii .type _Z26__device_stub__read2darrayPii,@function _Z26__device_stub__read2darrayPii: # @_Z26__device_stub__read2darrayPii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 4(%rsp), %rcx movl %esi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11read2darrayPii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end18: .size _Z26__device_stub__read2darrayPii, .Lfunc_end18-_Z26__device_stub__read2darrayPii .cfi_endproc # -- End function .globl _Z25__device_stub__check_boolPb # -- Begin function _Z25__device_stub__check_boolPb .type _Z25__device_stub__check_boolPb,@function _Z25__device_stub__check_boolPb: # @_Z25__device_stub__check_boolPb .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10check_boolPb, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end19: .size _Z25__device_stub__check_boolPb, .Lfunc_end19-_Z25__device_stub__check_boolPb .cfi_endproc # -- End function .globl _Z13print_huffmanv # -- Begin function _Z13print_huffmanv .type _Z13print_huffmanv,@function _Z13print_huffmanv: # @_Z13print_huffmanv .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 pushq %rax .cfi_def_cfa_offset 64 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $.L.str.26, %edi xorl %eax, %eax callq printf movq h_input(%rip), %rax movzbl (%rax), %r15d movzbl 1(%rax), %r14d movzbl 2(%rax), %ebp movzbl 3(%rax), %ebx movq huffman_check(%rip), %rax imulq $1020, %r15, %r12 # imm = 0x3FC xorl %r13d, %r13d .LBB20_1: # =>This Inner Loop Header: Depth=1 leaq (%rax,%r12), %rcx movl (%rcx,%r13,4), %edx cmpl $-1, %edx je .LBB20_3 # %bb.2: # in Loop: Header=BB20_1 Depth=1 movl $.L.str.27, %edi movl %r15d, %esi xorl %eax, %eax callq printf movq huffman_check(%rip), %rax .LBB20_3: # in Loop: Header=BB20_1 Depth=1 incq %r13 cmpq $255, %r13 jne .LBB20_1 # %bb.4: # %.preheader39 movl %r14d, %ecx imulq $1020, %rcx, %r15 # imm = 0x3FC xorl %r12d, %r12d .LBB20_5: # =>This Inner Loop Header: Depth=1 leaq (%rax,%r15), %rcx movl (%rcx,%r12,4), %edx cmpl $-1, %edx je .LBB20_7 # %bb.6: # in Loop: Header=BB20_5 Depth=1 movl $.L.str.27, %edi movl %r14d, %esi xorl %eax, %eax callq printf movq huffman_check(%rip), %rax .LBB20_7: # in Loop: Header=BB20_5 Depth=1 incq %r12 cmpq $255, %r12 jne .LBB20_5 # %bb.8: # %.preheader38 movl %ebp, %ecx imulq $1020, %rcx, %r14 # imm = 0x3FC xorl %r15d, %r15d .LBB20_9: # =>This Inner Loop Header: Depth=1 leaq (%rax,%r14), %rcx movl (%rcx,%r15,4), %edx cmpl $-1, %edx je .LBB20_11 # %bb.10: # in Loop: Header=BB20_9 Depth=1 movl $.L.str.27, %edi movl %ebp, %esi xorl %eax, %eax callq printf movq huffman_check(%rip), %rax .LBB20_11: # in Loop: Header=BB20_9 Depth=1 incq %r15 cmpq $255, %r15 jne .LBB20_9 # %bb.12: # %.preheader movl %ebx, %ecx imulq $1020, %rcx, %r14 # imm = 0x3FC xorl %r15d, %r15d .LBB20_13: # =>This Inner Loop Header: Depth=1 leaq (%rax,%r14), %rcx movl (%rcx,%r15,4), %edx cmpl $-1, %edx je .LBB20_15 # %bb.14: # in Loop: Header=BB20_13 Depth=1 movl $.L.str.27, %edi movl %ebx, %esi xorl %eax, %eax callq printf movq huffman_check(%rip), %rax .LBB20_15: # in Loop: Header=BB20_13 Depth=1 incq %r15 cmpq $255, %r15 jne .LBB20_13 # %bb.16: addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end20: .size _Z13print_huffmanv, .Lfunc_end20-_Z13print_huffmanv .cfi_endproc # -- End function .section .rodata.cst16,"aM",@progbits,16 .p2align 4, 0x0 # -- Begin function main .LCPI21_0: .long 0 # 0x0 .long 1 # 0x1 .long 1 # 0x1 .long 1 # 0x1 .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 .LCPI21_1: .long 0x49742400 # float 1.0E+6 .LCPI21_2: .long 0x447a0000 # float 1000 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $56, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $.Lstr.17, %edi callq puts@PLT callq _Z10initializev leaq 24(%rsp), %rdi callq hipEventCreate leaq 8(%rsp), %rdi callq hipEventCreate movslq number_of_char(%rip), %rsi movl $d_input, %edi callq hipMalloc movl $.L.str.29, %edi callq _Z14checkCUDAErrorPKc movq d_input(%rip), %rdi movq h_input(%rip), %rsi movslq number_of_char(%rip), %rdx movl $1, %ecx callq hipMemcpy movl $.L.str.30, %edi callq _Z14checkCUDAErrorPKc movslq number_of_char(%rip), %rax movq %rax, %rsi shlq $8, %rsi subq %rax, %rsi movl $compressedfile_array, %edi callq hipMalloc movl $.L.str.31, %edi callq _Z14checkCUDAErrorPKc movl $d_char_huffman_table, %edi movl $261120, %esi # imm = 0x3FC00 callq hipMalloc movl $.L.str.32, %edi callq _Z14checkCUDAErrorPKc movq d_char_huffman_table(%rip), %rdi movl $char_huffman_table, %esi movl $261120, %edx # imm = 0x3FC00 movl $1, %ecx callq hipMemcpy movl $.L.str.33, %edi callq _Z14checkCUDAErrorPKc movq huffman_check(%rip), %rdi movq d_char_huffman_table(%rip), %rsi movl $261120, %edx # imm = 0x3FC00 movl $2, %ecx callq hipMemcpy movl $.L.str.34, %edi callq _Z14checkCUDAErrorPKc movslq number_of_char(%rip), %rsi shlq $2, %rsi movl $block_cntr_array, %edi callq hipMalloc movl $.L.str.35, %edi callq _Z14checkCUDAErrorPKc movl $d_last_byte_padding, %edi movl $4, %esi callq hipMalloc movl $.L.str.36, %edi callq _Z14checkCUDAErrorPKc movl $finalsize, %edi movl $4, %esi callq hipMalloc movl $.L.str.37, %edi callq _Z14checkCUDAErrorPKc movl $orig_number_of_char, %edi movl $4, %esi callq hipMalloc movl $.L.str.38, %edi callq _Z14checkCUDAErrorPKc movq orig_number_of_char(%rip), %rdi movl $number_of_char, %esi movl $4, %edx movl $1, %ecx callq hipMemcpy movl $.L.str.39, %edi callq _Z14checkCUDAErrorPKc movl $2, %edi callq malloc movq %rax, h_bool(%rip) movw $257, (%rax) # imm = 0x101 movl $.L.str.40, %edi movl $1, %esi movl $1, %edx xorl %eax, %eax callq printf movl $d_bool, %edi movl $2, %esi callq hipMalloc movl $.L.str.41, %edi callq _Z14checkCUDAErrorPKc movq d_bool(%rip), %rdi movq h_bool(%rip), %rsi movl $2, %edx movl $1, %ecx callq hipMemcpy movl $.L.str.42, %edi callq _Z14checkCUDAErrorPKc movl $.L.str.43, %edi callq _Z14checkCUDAErrorPKc callq hipDeviceSynchronize movl $.L.str.44, %edi callq _Z14checkCUDAErrorPKc movq h_bool(%rip), %rdi movq d_bool(%rip), %rsi movl $2, %edx movl $2, %ecx callq hipMemcpy movl $.L.str.45, %edi callq _Z14checkCUDAErrorPKc movq h_bool(%rip), %rax movzbl (%rax), %esi movzbl 1(%rax), %edx movl $.L.str.46, %edi xorl %eax, %eax callq printf movaps .LCPI21_0(%rip), %xmm0 # xmm0 = [0,1,1,1] movups %xmm0, 40(%rsp) movq $0, 32(%rsp) movb $1, %bpl movq h_bool(%rip), %rax xorl %ecx, %ecx .LBB21_1: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB21_3 Depth 2 leaq (%rcx,%rcx,2), %r14 leaq (%rsp,%r14,4), %r15 addq $32, %r15 movb $1, %r12b xorl %r13d, %r13d .LBB21_3: # Parent Loop BB21_1 Depth=1 # => This Inner Loop Header: Depth=2 movzbl (%rax,%r13), %esi movl (%r15,%r13,4), %ebx movl $.L.str.47, %edi movl %ebx, %edx xorl %eax, %eax callq printf movq h_bool(%rip), %rax movzbl (%rax,%r13), %ecx cmpl %ecx, %ebx jne .LBB21_5 # %bb.2: # in Loop: Header=BB21_3 Depth=2 movl $1, %r13d testb $1, %r12b movl $0, %r12d jne .LBB21_3 # %bb.4: # %.critedge # in Loop: Header=BB21_1 Depth=1 movl 32(%rsp,%r14,4), %esi movl $.L.str.48, %edi xorl %eax, %eax callq printf movq h_bool(%rip), %rax .LBB21_5: # %.loopexit # in Loop: Header=BB21_1 Depth=1 movl $1, %ecx testb $1, %bpl movl $0, %ebp jne .LBB21_1 # %bb.6: movabsq $4294967552, %rbx # imm = 0x100000100 movl number_of_char(%rip), %esi movl $.L.str.49, %edi xorl %eax, %eax callq printf callq getchar callq getchar callq _Z13print_huffmanv movl number_of_char(%rip), %r15d leal 255(%r15), %r14d addl $510, %r15d # imm = 0x1FE testl %r14d, %r14d cmovsl %r15d, %r14d sarl $8, %r14d movl $.L.str.50, %edi movl %r14d, %esi xorl %eax, %eax callq printf cmpl $511, %r15d # imm = 0x1FF movl $1, %eax cmovbl %eax, %r14d movq 24(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movl $.L.str.51, %edi callq _Z14checkCUDAErrorPKc leaq (%r14,%rbx), %r15 addq $-256, %r15 movq %r15, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB21_8 # %bb.7: movq d_input(%rip), %rdi movq compressedfile_array(%rip), %rsi movq d_char_huffman_table(%rip), %rdx movq block_cntr_array(%rip), %rcx movq d_last_byte_padding(%rip), %r8 movq finalsize(%rip), %r9 movl number_of_char(%rip), %eax pushq %rax .cfi_adjust_cfa_offset 8 pushq orig_number_of_char(%rip) .cfi_adjust_cfa_offset 8 callq _Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i addq $16, %rsp .cfi_adjust_cfa_offset -16 .LBB21_8: movl $.L.str.52, %edi callq _Z14checkCUDAErrorPKc callq hipDeviceSynchronize movslq number_of_char(%rip), %r14 shlq $2, %r14 movq %r14, %rdi callq malloc movq %rax, block_cntr_array_check(%rip) movq block_cntr_array(%rip), %rsi movq %rax, %rdi movq %r14, %rdx movl $2, %ecx callq hipMemcpy movl $.L.str.53, %edi callq _Z14checkCUDAErrorPKc cmpl $0, number_of_char(%rip) jle .LBB21_11 # %bb.9: # %.lr.ph.preheader xorl %r14d, %r14d .LBB21_10: # %.lr.ph # =>This Inner Loop Header: Depth=1 movq block_cntr_array_check(%rip), %rax movl (%rax,%r14,4), %edx movl $.L.str.54, %edi movl %r14d, %esi xorl %eax, %eax callq printf incq %r14 movslq number_of_char(%rip), %rax cmpq %rax, %r14 jl .LBB21_10 .LBB21_11: # %._crit_edge movl $.L.str.55, %edi callq _Z14checkCUDAErrorPKc movl $4, %edi callq malloc movq %rax, %r14 movq finalsize(%rip), %rsi movl $4, %edx movq %rax, %rdi movl $2, %ecx callq hipMemcpy movl (%r14), %esi movl $.L.str.56, %edi xorl %eax, %eax callq printf movl $.L.str.57, %edi callq _Z14checkCUDAErrorPKc movslq (%r14), %rsi movl $finalcompressed_array, %edi callq hipMalloc movl $.L.str.58, %edi callq _Z14checkCUDAErrorPKc movq %r15, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB21_13 # %bb.12: movq block_cntr_array(%rip), %rdi movq compressedfile_array(%rip), %rsi movq finalcompressed_array(%rip), %rdx movl number_of_char(%rip), %ecx callq _Z32__device_stub__final_compressionPiPbS0_i .LBB21_13: movl $.L.str.59, %edi callq _Z14checkCUDAErrorPKc callq hipDeviceSynchronize movl $.L.str.60, %edi callq _Z14checkCUDAErrorPKc movq 8(%rsp), %rdi xorl %r12d, %r12d xorl %esi, %esi callq hipEventRecord movl $.L.str.61, %edi callq _Z14checkCUDAErrorPKc movq 8(%rsp), %rdi callq hipEventSynchronize movq 24(%rsp), %rsi movq 8(%rsp), %rdx leaq 4(%rsp), %rbx movq %rbx, %rdi callq hipEventElapsedTime cvtss2sd (%rbx), %xmm0 movl $.L.str.62, %edi movb $1, %al callq printf movslq (%r14), %rbx movq %rbx, %rdi callq malloc movq %rax, %r15 movq finalcompressed_array(%rip), %rsi movq %rax, %rdi movq %rbx, %rdx movl $2, %ecx callq hipMemcpy movl $.L.str.63, %edi callq _Z14checkCUDAErrorPKc movl $.L.str.64, %edi xorl %eax, %eax callq printf movq %r15, %rdi movq %r14, %rsi callq _Z20write_GPU_compressedPbPi cmpl $0, (%r14) jle .LBB21_15 .LBB21_14: # %.lr.ph64 # =>This Inner Loop Header: Depth=1 movl $10, %edi callq putchar@PLT incl %r12d cmpl (%r14), %r12d jl .LBB21_14 .LBB21_15: # %._crit_edge65 movl $.Lstr.18, %edi callq puts@PLT callq clock movq %rax, %rbx callq _Z13compress_filev callq clock subq %rbx, %rax xorps %xmm0, %xmm0 cvtsi2ss %rax, %xmm0 divss .LCPI21_1(%rip), %xmm0 mulss .LCPI21_2(%rip), %xmm0 movss %xmm0, 20(%rsp) # 4-byte Spill cvtss2sd %xmm0, %xmm0 movl $.L.str.66, %edi movb $1, %al callq printf xorps %xmm0, %xmm0 cvtss2sd 4(%rsp), %xmm0 movl $.L.str.62, %edi movb $1, %al callq printf movss 20(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero divss 4(%rsp), %xmm0 cvtss2sd %xmm0, %xmm0 movl $.L.str.67, %edi movb $1, %al callq printf movl $.Lstr.19, %edi callq puts@PLT callq _Z15decompress_filev callq getchar xorl %eax, %eax addq $56, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end21: .size main, .Lfunc_end21-main .cfi_endproc # -- End function .section .text.startup,"ax",@progbits .type _GLOBAL__sub_I_gpulab1_1.hip,@function # -- Begin function _GLOBAL__sub_I_gpulab1_1.hip _GLOBAL__sub_I_gpulab1_1.hip: # @_GLOBAL__sub_I_gpulab1_1.hip .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movl $261120, %edi # imm = 0x3FC00 callq malloc movq %rax, huffman_check(%rip) popq %rax .cfi_def_cfa_offset 8 retq .Lfunc_end22: .size _GLOBAL__sub_I_gpulab1_1.hip, .Lfunc_end22-_GLOBAL__sub_I_gpulab1_1.hip .cfi_endproc # -- End function .text .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB23_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB23_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z17final_compressionPiPbS0_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11read2darrayPii, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10check_boolPb, %esi movl $.L__unnamed_4, %edx movl $.L__unnamed_4, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $0, 8(%rsp) movl $0, (%rsp) movl $char_huffman_table_gpu, %esi movl $.L__unnamed_5, %edx movl $.L__unnamed_5, %ecx movl $261120, %r9d # imm = 0x3FC00 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end23: .size __hip_module_ctor, .Lfunc_end23-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB24_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB24_2: retq .Lfunc_end24: .size __hip_module_dtor, .Lfunc_end24-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Cuda error: %s: %s.\n" .size .L.str, 21 .type char_frequency,@object # @char_frequency .bss .globl char_frequency .p2align 4, 0x0 char_frequency: .zero 1024 .size char_frequency, 1024 .type char_huffman_table,@object # @char_huffman_table .globl char_huffman_table .p2align 4, 0x0 char_huffman_table: .zero 261120 .size char_huffman_table, 261120 .type last_byte_padding,@object # @last_byte_padding .globl last_byte_padding .p2align 2, 0x0 last_byte_padding: .long 0 # 0x0 .size last_byte_padding, 4 .type last_byte_padding_gpu,@object # @last_byte_padding_gpu .globl last_byte_padding_gpu .p2align 2, 0x0 last_byte_padding_gpu: .long 0 # 0x0 .size last_byte_padding_gpu, 4 .type number_of_char,@object # @number_of_char .globl number_of_char .p2align 2, 0x0 number_of_char: .long 0 # 0x0 .size number_of_char, 4 .type h_input,@object # @h_input .globl h_input .p2align 3, 0x0 h_input: .quad 0 .size h_input, 8 .type d_input,@object # @d_input .globl d_input .p2align 3, 0x0 d_input: .quad 0 .size d_input, 8 .type d_char_huffman_table,@object # @d_char_huffman_table .globl d_char_huffman_table .p2align 3, 0x0 d_char_huffman_table: .quad 0 .size d_char_huffman_table, 8 .type copiedarray2,@object # @copiedarray2 .globl copiedarray2 .p2align 4, 0x0 copiedarray2: .zero 261120 .size copiedarray2, 261120 .type char_huffman_table_gpu,@object # @char_huffman_table_gpu .local char_huffman_table_gpu .comm char_huffman_table_gpu,261120,16 .type compressedfile_array,@object # @compressedfile_array .globl compressedfile_array .p2align 3, 0x0 compressedfile_array: .quad 0 .size compressedfile_array, 8 .type finalcompressed_array,@object # @finalcompressed_array .globl finalcompressed_array .p2align 3, 0x0 finalcompressed_array: .quad 0 .size finalcompressed_array, 8 .type block_cntr_array,@object # @block_cntr_array .globl block_cntr_array .p2align 3, 0x0 block_cntr_array: .quad 0 .size block_cntr_array, 8 .type block_cntr_array_check,@object # @block_cntr_array_check .globl block_cntr_array_check .p2align 3, 0x0 block_cntr_array_check: .quad 0 .size block_cntr_array_check, 8 .type d_last_byte_padding,@object # @d_last_byte_padding .globl d_last_byte_padding .p2align 3, 0x0 d_last_byte_padding: .quad 0 .size d_last_byte_padding, 8 .type finalsize,@object # @finalsize .globl finalsize .p2align 3, 0x0 finalsize: .quad 0 .size finalsize, 8 .type orig_number_of_char,@object # @orig_number_of_char .globl orig_number_of_char .p2align 3, 0x0 orig_number_of_char: .quad 0 .size orig_number_of_char, 8 .type huffman_check,@object # @huffman_check .globl huffman_check .p2align 3, 0x0 huffman_check: .quad 0 .size huffman_check, 8 .type d_bool,@object # @d_bool .globl d_bool .p2align 3, 0x0 d_bool: .quad 0 .size d_bool, 8 .type h_bool,@object # @h_bool .globl h_bool .p2align 3, 0x0 h_bool: .quad 0 .size h_bool, 8 .type _Z17final_compressionPiPbS0_i,@object # @_Z17final_compressionPiPbS0_i .section .rodata,"a",@progbits .globl _Z17final_compressionPiPbS0_i .p2align 3, 0x0 _Z17final_compressionPiPbS0_i: .quad _Z32__device_stub__final_compressionPiPbS0_i .size _Z17final_compressionPiPbS0_i, 8 .type _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i,@object # @_Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .globl _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .p2align 3, 0x0 _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i: .quad _Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i .size _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i, 8 .type .L.str.2,@object # @.str.2 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.2: .asciz "compressed_gpu.txt" .size .L.str.2, 19 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "wb" .size .L.str.3, 3 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "Error reading file" .size .L.str.4, 19 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "Compressed char in decimal is %d \n" .size .L.str.5, 35 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "\n dchar huffman table " .size .L.str.6, 23 .type .L.str.9,@object # @.str.9 .L.str.9: .asciz "\\n:\t" .size .L.str.9, 5 .type .L.str.10,@object # @.str.10 .L.str.10: .asciz "%c:\t" .size .L.str.10, 5 .type .L.str.11,@object # @.str.11 .L.str.11: .asciz "%d " .size .L.str.11, 4 .type .L.str.14,@object # @.str.14 .L.str.14: .asciz "%d)\tval: \\n\tfreq: %d\n" .size .L.str.14, 22 .type .L.str.15,@object # @.str.15 .L.str.15: .asciz "%d)\tval: %c\tfreq: %d\n" .size .L.str.15, 22 .type .L.str.16,@object # @.str.16 .L.str.16: .asciz "weight: %d\tvalue: \\n\n" .size .L.str.16, 22 .type .L.str.17,@object # @.str.17 .L.str.17: .asciz "weight: %d\tvalue: %c\n" .size .L.str.17, 22 .type .L.str.18,@object # @.str.18 .L.str.18: .asciz "weight: %d\tvalue: NULL\n" .size .L.str.18, 24 .type .L.str.19,@object # @.str.19 .L.str.19: .asciz "input.txt" .size .L.str.19, 10 .type .L.str.20,@object # @.str.20 .L.str.20: .asciz "r" .size .L.str.20, 2 .type .L.str.22,@object # @.str.22 .L.str.22: .asciz "rb" .size .L.str.22, 3 .type .L.str.23,@object # @.str.23 .L.str.23: .asciz "compressed.txt" .size .L.str.23, 15 .type .L.str.24,@object # @.str.24 .L.str.24: .asciz "i is %d and c is %c" .size .L.str.24, 20 .type .L.str.25,@object # @.str.25 .L.str.25: .asciz "decompressed.txt" .size .L.str.25, 17 .type _Z11read2darrayPii,@object # @_Z11read2darrayPii .section .rodata,"a",@progbits .globl _Z11read2darrayPii .p2align 3, 0x0 _Z11read2darrayPii: .quad _Z26__device_stub__read2darrayPii .size _Z11read2darrayPii, 8 .type _Z10check_boolPb,@object # @_Z10check_boolPb .globl _Z10check_boolPb .p2align 3, 0x0 _Z10check_boolPb: .quad _Z25__device_stub__check_boolPb .size _Z10check_boolPb, 8 .type .L.str.26,@object # @.str.26 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.26: .asciz " \n Huffman after copying back \n " .size .L.str.26, 33 .type .L.str.27,@object # @.str.27 .L.str.27: .asciz "\t%c code is %d \n" .size .L.str.27, 19 .type .L.str.29,@object # @.str.29 .L.str.29: .asciz "Error in allocating d_input" .size .L.str.29, 28 .type .L.str.30,@object # @.str.30 .L.str.30: .asciz "Error in copying d_input" .size .L.str.30, 25 .type .L.str.31,@object # @.str.31 .L.str.31: .asciz "Error in allocating compressedfile_array" .size .L.str.31, 41 .type .L.str.32,@object # @.str.32 .L.str.32: .asciz "Error in allocating d_char_huffman_table" .size .L.str.32, 41 .type .L.str.33,@object # @.str.33 .L.str.33: .asciz "Error in copying d_char_huffman_table" .size .L.str.33, 38 .type .L.str.34,@object # @.str.34 .L.str.34: .asciz "Error in copying back" .size .L.str.34, 22 .type .L.str.35,@object # @.str.35 .L.str.35: .asciz "Error in allocating block_cntr_array" .size .L.str.35, 37 .type .L.str.36,@object # @.str.36 .L.str.36: .asciz "Error in allocating d_last_byte_padding" .size .L.str.36, 40 .type .L.str.37,@object # @.str.37 .L.str.37: .asciz "Error in allocating finalsize" .size .L.str.37, 30 .type .L.str.38,@object # @.str.38 .L.str.38: .asciz "Error in allocating orig_number_of_char" .size .L.str.38, 40 .type .L.str.39,@object # @.str.39 .L.str.39: .asciz "Error in copying orig_number_of_char" .size .L.str.39, 37 .type .L.str.40,@object # @.str.40 .L.str.40: .asciz "bool1 is %d and bool2 is %d \n" .size .L.str.40, 30 .type .L.str.41,@object # @.str.41 .L.str.41: .asciz "Error in d_bool" .size .L.str.41, 16 .type .L.str.42,@object # @.str.42 .L.str.42: .asciz "Error in copying d_bool" .size .L.str.42, 24 .type .L.str.43,@object # @.str.43 .L.str.43: .asciz "Error in kernel changing d_bool" .size .L.str.43, 32 .type .L.str.44,@object # @.str.44 .L.str.44: .asciz "Error in hipDeviceSynchronize" .size .L.str.44, 30 .type .L.str.45,@object # @.str.45 .L.str.45: .asciz "Error in copying d_bool back" .size .L.str.45, 29 .type .L.str.46,@object # @.str.46 .L.str.46: .asciz "Now bool1 is %d and bool2 is %d \n" .size .L.str.46, 34 .type .L.str.47,@object # @.str.47 .L.str.47: .asciz "h_bool is %d \t checkhuff is %d \n" .size .L.str.47, 33 .type .L.str.48,@object # @.str.48 .L.str.48: .asciz "pattern for %d is found\n" .size .L.str.48, 25 .type .L.str.49,@object # @.str.49 .L.str.49: .asciz "\n the number of characters in the input file is %d \n" .size .L.str.49, 53 .type .L.str.50,@object # @.str.50 .L.str.50: .asciz "no_of_blocksis %d \n" .size .L.str.50, 20 .type .L.str.51,@object # @.str.51 .L.str.51: .asciz "Error in hipEventRecord start \n" .size .L.str.51, 32 .type .L.str.52,@object # @.str.52 .L.str.52: .asciz "Error in compress_file_gpu \n" .size .L.str.52, 29 .type .L.str.53,@object # @.str.53 .L.str.53: .asciz "Error in copying back block_cntr_array_check" .size .L.str.53, 45 .type .L.str.54,@object # @.str.54 .L.str.54: .asciz " block size for i = %d is %d \n" .size .L.str.54, 31 .type .L.str.55,@object # @.str.55 .L.str.55: .asciz "Error in Compute array \n" .size .L.str.55, 25 .type .L.str.56,@object # @.str.56 .L.str.56: .asciz "The final compressed array size is %d \n " .size .L.str.56, 41 .type .L.str.57,@object # @.str.57 .L.str.57: .asciz "Error in finalsize_cpu" .size .L.str.57, 23 .type .L.str.58,@object # @.str.58 .L.str.58: .asciz "hipMemcpyHostToDevice" .size .L.str.58, 22 .type .L.str.59,@object # @.str.59 .L.str.59: .asciz "Error in final_compression call \n" .size .L.str.59, 34 .type .L.str.60,@object # @.str.60 .L.str.60: .asciz "Error in hipDeviceSynchronize \n" .size .L.str.60, 32 .type .L.str.61,@object # @.str.61 .L.str.61: .asciz "Error in hipEventRecord stop \n" .size .L.str.61, 31 .type .L.str.62,@object # @.str.62 .L.str.62: .asciz "Time to calculate results: %f ms.\n" .size .L.str.62, 35 .type .L.str.63,@object # @.str.63 .L.str.63: .asciz "Error in copying final_compressed_cpu\n" .size .L.str.63, 39 .type .L.str.64,@object # @.str.64 .L.str.64: .asciz "The compressed value in binary is " .size .L.str.64, 35 .type .L.str.66,@object # @.str.66 .L.str.66: .asciz "Time in cpu : %3.1f ms\n" .size .L.str.66, 24 .type .L.str.67,@object # @.str.67 .L.str.67: .asciz "Speedup achieved is %lf \n" .size .L.str.67, 26 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z17final_compressionPiPbS0_i" .size .L__unnamed_1, 30 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i" .size .L__unnamed_2, 41 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "_Z11read2darrayPii" .size .L__unnamed_3, 19 .type .L__unnamed_4,@object # @3 .L__unnamed_4: .asciz "_Z10check_boolPb" .size .L__unnamed_4, 17 .type .L__unnamed_5,@object # @4 .L__unnamed_5: .asciz "char_huffman_table_gpu" .size .L__unnamed_5, 23 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad _GLOBAL__sub_I_gpulab1_1.hip .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "\nPress ENTER to exit..." .size .Lstr, 24 .type .Lstr.6,@object # @str.6 .Lstr.6: .asciz "character frequency:" .size .Lstr.6, 21 .type .Lstr.10,@object # @str.10 .Lstr.10: .asciz "Huffman table:" .size .Lstr.10, 15 .type .Lstr.14,@object # @str.14 .Lstr.14: .asciz "Huffman tree (inorder traversal sequence):" .size .Lstr.14, 43 .type .Lstr.16,@object # @str.16 .Lstr.16: .asciz "+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++" .size .Lstr.16, 78 .type .Lstr.17,@object # @str.17 .Lstr.17: .asciz "start" .size .Lstr.17, 6 .type .Lstr.18,@object # @str.18 .Lstr.18: .asciz "compressing on CPU..." .size .Lstr.18, 22 .type .Lstr.19,@object # @str.19 .Lstr.19: .asciz "decompressing on CPU..." .size .Lstr.19, 24 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z32__device_stub__final_compressionPiPbS0_i .addrsig_sym _Z32__device_stub__compress_file_gpuPhPbPiS1_S1_S1_S1_i .addrsig_sym _Z26__device_stub__read2darrayPii .addrsig_sym _Z25__device_stub__check_boolPb .addrsig_sym _GLOBAL__sub_I_gpulab1_1.hip .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym char_huffman_table .addrsig_sym number_of_char .addrsig_sym d_input .addrsig_sym d_char_huffman_table .addrsig_sym char_huffman_table_gpu .addrsig_sym compressedfile_array .addrsig_sym finalcompressed_array .addrsig_sym block_cntr_array .addrsig_sym d_last_byte_padding .addrsig_sym finalsize .addrsig_sym orig_number_of_char .addrsig_sym d_bool .addrsig_sym _Z17final_compressionPiPbS0_i .addrsig_sym _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .addrsig_sym _Z11read2darrayPii .addrsig_sym _Z10check_boolPb .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z17final_compressionPiPbS0_i ; -- Begin function _Z17final_compressionPiPbS0_i .globl _Z17final_compressionPiPbS0_i .p2align 8 .type _Z17final_compressionPiPbS0_i,@function _Z17final_compressionPiPbS0_i: ; @_Z17final_compressionPiPbS0_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_8 ; %bb.1: ; %.preheader23 s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 v_mov_b32_e32 v0, 0 s_mov_b32 s9, 0 s_mov_b32 s8, exec_lo v_cmpx_lt_i32_e32 0, v1 s_cbranch_execz .LBB0_5 ; %bb.2: ; %.lr.ph.preheader v_mov_b32_e32 v2, v1 s_waitcnt lgkmcnt(0) s_mov_b32 s2, s4 s_mov_b32 s3, s5 s_mov_b32 s10, 0 .LBB0_3: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 s_load_b32 s11, s[2:3], 0x0 v_add_nc_u32_e32 v2, -1, v2 s_delay_alu instid0(VALU_DEP_1) v_cmp_eq_u32_e32 vcc_lo, 0, v2 s_waitcnt lgkmcnt(0) s_add_i32 s10, s11, s10 s_add_u32 s2, s2, 4 v_mov_b32_e32 v0, s10 s_addc_u32 s3, s3, 0 s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_3 ; %bb.4: ; %Flow49 s_or_b32 exec_lo, exec_lo, s9 .LBB0_5: ; %Flow50 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s8 v_ashrrev_i32_e32 v2, 31, v1 s_mov_b32 s2, 0 v_lshlrev_b64 v[2:3], 2, v[1:2] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s4, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo global_load_b32 v4, v[2:3], off s_waitcnt vmcnt(0) v_cmp_lt_i32_e32 vcc_lo, 0, v4 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_8 ; %bb.6: ; %.lr.ph27.preheader v_mul_lo_u32 v2, 0xff, v1 v_ashrrev_i32_e32 v1, 31, v0 v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo v_ashrrev_i32_e32 v3, 31, v2 v_add_co_u32 v2, vcc_lo, s6, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo .LBB0_7: ; %.lr.ph27 ; =>This Inner Loop Header: Depth=1 global_load_u8 v5, v[2:3], off v_add_nc_u32_e32 v4, -1, v4 v_add_co_u32 v2, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_cmp_eq_u32_e32 vcc_lo, 0, v4 s_or_b32 s2, vcc_lo, s2 s_waitcnt vmcnt(0) global_store_b8 v[0:1], v5, off v_add_co_u32 v0, s0, v0, 1 v_add_co_ci_u32_e64 v1, s0, 0, v1, s0 s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB0_7 .LBB0_8: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z17final_compressionPiPbS0_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z17final_compressionPiPbS0_i, .Lfunc_end0-_Z17final_compressionPiPbS0_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 384 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i ; -- Begin function _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .globl _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .p2align 8 .type _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i,@function _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i: ; @_Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x4c s_load_b32 s3, s[0:1], 0x38 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_i32 s2, s15, s2 v_add_nc_u32_e32 v1, s2, v0 s_delay_alu instid0(VALU_DEP_1) v_cmp_gt_i32_e32 vcc_lo, s3, v1 s_and_saveexec_b32 s3, vcc_lo s_cbranch_execz .LBB1_16 ; %bb.1: s_load_b256 s[4:11], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_mulk_i32 s2, 0xff ; implicit-def: $sgpr3 s_delay_alu instid0(SALU_CYCLE_1) v_mad_u32_u24 v0, 0xff, v0, s2 s_waitcnt lgkmcnt(0) v_add_co_u32 v3, vcc_lo, s4, v1 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo s_mov_b32 s5, 0 ; implicit-def: $sgpr4 global_load_u8 v3, v[3:4], off s_waitcnt vmcnt(0) v_mul_u32_u24_e32 v3, 0xff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v3, 2, v3 v_add_co_u32 v3, s2, s8, v3 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v4, null, s9, 0, s2 s_mov_b32 s2, 0 .LBB1_2: ; %NodeBlock ; =>This Inner Loop Header: Depth=1 global_load_b32 v7, v[3:4], off s_mov_b32 s8, 0 s_mov_b32 s13, exec_lo ; implicit-def: $sgpr9 ; implicit-def: $sgpr12 s_waitcnt vmcnt(0) v_cmpx_lt_i32_e32 0, v7 s_xor_b32 s13, exec_lo, s13 s_cbranch_execz .LBB1_6 ; %bb.3: ; %LeafBlock63 ; in Loop: Header=BB1_2 Depth=1 s_mov_b32 s9, exec_lo ; implicit-def: $sgpr12 v_cmpx_eq_u32_e32 1, v7 ; %bb.4: ; in Loop: Header=BB1_2 Depth=1 s_mov_b32 s8, exec_lo s_mov_b32 s12, 1 ; %bb.5: ; %Flow67 ; in Loop: Header=BB1_2 Depth=1 s_or_b32 exec_lo, exec_lo, s9 s_mov_b32 s9, -1 s_and_b32 s8, s8, exec_lo ; implicit-def: $vgpr7 .LBB1_6: ; %Flow66 ; in Loop: Header=BB1_2 Depth=1 s_or_saveexec_b32 s13, s13 v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v6, s12 s_xor_b32 exec_lo, exec_lo, s13 ; %bb.7: ; %LeafBlock ; in Loop: Header=BB1_2 Depth=1 v_cmp_eq_u32_e32 vcc_lo, 0, v7 v_dual_mov_b32 v5, s5 :: v_dual_mov_b32 v6, 0 s_and_not1_b32 s8, s8, exec_lo s_or_b32 s9, s9, exec_lo s_and_b32 s12, vcc_lo, exec_lo s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 s8, s8, s12 ; %bb.8: ; %Flow68 ; in Loop: Header=BB1_2 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s4, s4, exec_lo s_and_b32 s9, s9, exec_lo s_mov_b32 s13, -1 s_or_b32 s4, s4, s9 ; implicit-def: $sgpr12 s_and_saveexec_b32 s9, s8 s_cbranch_execz .LBB1_10 ; %bb.9: ; in Loop: Header=BB1_2 Depth=1 v_add_nc_u32_e32 v5, s5, v0 v_add_co_u32 v3, vcc_lo, v3, 4 s_add_i32 s8, s5, 1 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_ashrrev_i32_e32 v8, 31, v5 v_add_co_u32 v7, vcc_lo, s6, v5 s_cmpk_eq_i32 s8, 0xff v_mov_b32_e32 v5, s5 v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo s_cselect_b32 s13, -1, 0 s_movk_i32 s12, 0xff s_and_not1_b32 s4, s4, exec_lo s_or_not1_b32 s13, s13, exec_lo s_mov_b32 s5, s8 global_store_b8 v[7:8], v6, off .LBB1_10: ; %Flow69 ; in Loop: Header=BB1_2 Depth=1 s_or_b32 exec_lo, exec_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) s_and_b32 s8, exec_lo, s13 v_mov_b32_e32 v6, s12 s_or_b32 s2, s8, s2 s_and_not1_b32 s3, s3, exec_lo s_and_b32 s8, s4, exec_lo s_or_b32 s3, s3, s8 s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB1_2 ; %bb.11: ; %loop.exit.guard s_or_b32 exec_lo, exec_lo, s2 s_and_saveexec_b32 s2, s3 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s2, exec_lo, s2 ; %bb.12: ; %._crit_edge v_mov_b32_e32 v6, v5 ; %bb.13: s_or_b32 exec_lo, exec_lo, s2 s_load_b128 s[0:3], s[0:1], 0x28 v_lshlrev_b64 v[0:1], 2, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s10, v0 v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo v_mov_b32_e32 v0, 0 global_store_b32 v[2:3], v6, off s_waitcnt lgkmcnt(0) global_store_b32 v0, v0, s[0:1] global_load_b32 v1, v0, s[2:3] s_waitcnt vmcnt(0) v_cmp_gt_i32_e32 vcc_lo, 1, v1 s_cbranch_vccnz .LBB1_16 ; %bb.14: ; %.lr.ph.i.preheader v_mov_b32_e32 v1, 0 s_mov_b32 s4, 0 .LBB1_15: ; %.lr.ph.i ; =>This Inner Loop Header: Depth=1 global_load_b32 v2, v0, s[10:11] s_add_i32 s4, s4, 1 s_add_u32 s10, s10, 4 s_addc_u32 s11, s11, 0 s_waitcnt vmcnt(0) v_add_nc_u32_e32 v1, v2, v1 global_store_b32 v0, v1, s[0:1] global_load_b32 v2, v0, s[2:3] s_waitcnt vmcnt(0) v_cmp_lt_i32_e32 vcc_lo, s4, v2 s_cbranch_vccnz .LBB1_15 .LBB1_16: ; %_Z17computearray_sizePiS_S_.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 320 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i, .Lfunc_end1-_Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 596 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z11read2darrayPii ; -- Begin function _Z11read2darrayPii .globl _Z11read2darrayPii .p2align 8 .type _Z11read2darrayPii,@function _Z11read2darrayPii: ; @_Z11read2darrayPii ; %bb.0: s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11read2darrayPii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 12 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 1 .amdhsa_next_free_sgpr 1 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end2: .size _Z11read2darrayPii, .Lfunc_end2-_Z11read2darrayPii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 4 ; NumSgprs: 0 ; NumVgprs: 0 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 1 ; NumVGPRsForWavesPerEU: 1 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z10check_boolPb ; -- Begin function _Z10check_boolPb .globl _Z10check_boolPb .p2align 8 .type _Z10check_boolPb,@function _Z10check_boolPb: ; @_Z10check_boolPb ; %bb.0: s_load_b64 s[0:1], s[0:1], 0x0 v_mov_b32_e32 v0, 0 s_waitcnt lgkmcnt(0) global_store_b16 v0, v0, s[0:1] s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10check_boolPb .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 8 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 1 .amdhsa_next_free_sgpr 2 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end3: .size _Z10check_boolPb, .Lfunc_end3-_Z10check_boolPb ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 36 ; NumSgprs: 2 ; NumVgprs: 1 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 2 ; NumVGPRsForWavesPerEU: 1 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .protected char_huffman_table_gpu ; @char_huffman_table_gpu .type char_huffman_table_gpu,@object .section .bss,"aw",@nobits .globl char_huffman_table_gpu .p2align 4, 0x0 char_huffman_table_gpu: .zero 261120 .size char_huffman_table_gpu, 261120 .type __hip_cuid_,@object ; @__hip_cuid_ .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z17final_compressionPiPbS0_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z17final_compressionPiPbS0_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .offset: 56 .size: 4 .value_kind: by_value - .offset: 64 .size: 4 .value_kind: hidden_block_count_x - .offset: 68 .size: 4 .value_kind: hidden_block_count_y - .offset: 72 .size: 4 .value_kind: hidden_block_count_z - .offset: 76 .size: 2 .value_kind: hidden_group_size_x - .offset: 78 .size: 2 .value_kind: hidden_group_size_y - .offset: 80 .size: 2 .value_kind: hidden_group_size_z - .offset: 82 .size: 2 .value_kind: hidden_remainder_x - .offset: 84 .size: 2 .value_kind: hidden_remainder_y - .offset: 86 .size: 2 .value_kind: hidden_remainder_z - .offset: 104 .size: 8 .value_kind: hidden_global_offset_x - .offset: 112 .size: 8 .value_kind: hidden_global_offset_y - .offset: 120 .size: 8 .value_kind: hidden_global_offset_z - .offset: 128 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 320 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z17compress_file_gpuPhPbPiS1_S1_S1_S1_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 9 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 12 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11read2darrayPii .private_segment_fixed_size: 0 .sgpr_count: 0 .sgpr_spill_count: 0 .symbol: _Z11read2darrayPii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 0 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 8 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10check_boolPb .private_segment_fixed_size: 0 .sgpr_count: 2 .sgpr_spill_count: 0 .symbol: _Z10check_boolPb.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 1 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
bc216959a0c25b653af0d3dda07fe2f7a1b8de9c
#include <stdio.h> #include <cuda_runtime.h> void printMatrix(int *C, const int nx, const int ny){ int *ic = C; printf("\n Matrix:(%d, %d)\n",nx,ny); for(int i =0; i < ny; i++){ for(int j =0; j < nx; j++){ printf("%3d",ic[j + i*nx]); } printf("\n"); } printf("\n"); } __global__ void printThreadIndex(int *A, const int nx, const int ny){ int ix = threadIdx.x + blockDim.x * blockIdx.x; int iy = threadIdx.y + blockDim.y * blockIdx.y; unsigned int idx = ix + iy*nx; printf("thread_id:(%d,%d),block_id:(%d,%d), coordinate(%d,%d) global index %2d ival %2d\n", threadIdx.x,threadIdx.y, blockIdx.x,blockIdx.y,ix,iy,idx,A[idx]); } void initInt(int *ip, int size){ for(int i =0; i < size; i++) ip[i] = i; } int main(){ printf("Starting ....\n"); // set device int dev = 0; cudaDeviceProp deviceProp; cudaSetDevice(dev); // set matrix dimension int nx = 8, ny = 6; int nxy = nx * ny, nBytes = nxy*sizeof(int); // malloc host memory int *h_A; h_A = (int *)malloc(nBytes); // init host matrix with integer initInt(h_A,nxy); printMatrix(h_A,nx,ny); // malloc device memory int *d_A; cudaMalloc((void **)&d_A, nBytes); // cp data from host to device cudaMemcpy(d_A,h_A,nBytes,cudaMemcpyHostToDevice); // set up execution configuration dim3 block(4,2); dim3 grid((nx + block.x - 1)/block.x, (ny + block.y -1)/block.y); // invoke the kernel printThreadIndex<<<grid,block>>>(d_A,nx,ny); cudaDeviceSynchronize(); // free host and device memory cudaFree(d_A); free(h_A); // reset device cudaDeviceReset(); return 0; }
.file "tmpxft_0029469a_00000000-6_checkThreadIndex.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2032: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2032: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "\n Matrix:(%d, %d)\n" .LC1: .string "%3d" .LC2: .string "\n" .text .globl _Z11printMatrixPiii .type _Z11printMatrixPiii, @function _Z11printMatrixPiii: .LFB2027: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl %edx, %ecx xorl %eax, %eax pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 xorl %r14d, %r14d pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 xorl %r13d, %r13d pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movq %rdi, %r12 movl $2, %edi pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movl %edx, %ebp movl %esi, %edx pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %esi, %ebx leaq .LC0(%rip), %rsi subq $24, %rsp .cfi_def_cfa_offset 80 call __printf_chk@PLT .L3: cmpl %ebp, %r14d jge .L5 movslq %r13d, %rax xorl %r15d, %r15d leaq (%r12,%rax,4), %r8 .L6: cmpl %r15d, %ebx jle .L9 movl (%r8,%r15,4), %edx leaq .LC1(%rip), %rsi xorl %eax, %eax incq %r15 movl $2, %edi movq %r8, 8(%rsp) call __printf_chk@PLT movq 8(%rsp), %r8 jmp .L6 .L9: leaq .LC2(%rip), %rsi xorl %eax, %eax incl %r14d addl %ebx, %r13d movl $2, %edi call __printf_chk@PLT jmp .L3 .L5: addq $24, %rsp .cfi_def_cfa_offset 56 leaq .LC2(%rip), %rsi movl $2, %edi xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp __printf_chk@PLT .cfi_endproc .LFE2027: .size _Z11printMatrixPiii, .-_Z11printMatrixPiii .globl _Z7initIntPii .type _Z7initIntPii, @function _Z7initIntPii: .LFB2028: .cfi_startproc endbr64 xorl %eax, %eax .L11: cmpl %eax, %esi jle .L13 movl %eax, (%rdi,%rax,4) incq %rax jmp .L11 .L13: ret .cfi_endproc .LFE2028: .size _Z7initIntPii, .-_Z7initIntPii .globl _Z38__device_stub__Z16printThreadIndexPiiiPiii .type _Z38__device_stub__Z16printThreadIndexPiiiPiii, @function _Z38__device_stub__Z16printThreadIndexPiiiPiii: .LFB2054: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 32(%rsp), %rdi movl %esi, 4(%rsp) leaq 44(%rsp), %rsi movl %edx, (%rsp) leaq 16(%rsp), %rdx movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) leaq 4(%rsp), %rax movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L14 pushq 24(%rsp) .cfi_def_cfa_offset 136 leaq _Z16printThreadIndexPiii(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 144 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L14: movq 104(%rsp), %rax subq %fs:40, %rax je .L16 call __stack_chk_fail@PLT .L16: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2054: .size _Z38__device_stub__Z16printThreadIndexPiiiPiii, .-_Z38__device_stub__Z16printThreadIndexPiiiPiii .globl _Z16printThreadIndexPiii .type _Z16printThreadIndexPiii, @function _Z16printThreadIndexPiii: .LFB2055: .cfi_startproc endbr64 jmp _Z38__device_stub__Z16printThreadIndexPiiiPiii .cfi_endproc .LFE2055: .size _Z16printThreadIndexPiii, .-_Z16printThreadIndexPiii .section .rodata.str1.1 .LC3: .string "Starting ....\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2029: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq .LC3(%rip), %rsi movl $2, %edi subq $48, %rsp .cfi_def_cfa_offset 64 movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax call __printf_chk@PLT xorl %edi, %edi call cudaSetDevice@PLT movl $192, %edi call malloc@PLT movl $48, %esi movl $6, %edx movq %rax, %rdi movq %rax, %rbx call _Z7initIntPii movl $8, %esi call _Z11printMatrixPiii leaq 8(%rsp), %rdi movl $192, %esi call cudaMalloc@PLT movq 8(%rsp), %rdi movl $1, %ecx movq %rbx, %rsi movl $192, %edx call cudaMemcpy@PLT movl $2147483649, %edx xorl %r9d, %r9d xorl %r8d, %r8d salq $2, %rdx movl $1, %ecx movl $1, %esi movabsq $12884901890, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L20 movq 8(%rsp), %rdi movl $6, %edx movl $8, %esi call _Z38__device_stub__Z16printThreadIndexPiiiPiii .L20: call cudaDeviceSynchronize@PLT movq 8(%rsp), %rdi call cudaFree@PLT movq %rbx, %rdi call free@PLT call cudaDeviceReset@PLT movq 40(%rsp), %rax subq %fs:40, %rax je .L21 call __stack_chk_fail@PLT .L21: addq $48, %rsp .cfi_def_cfa_offset 16 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size main, .-main .section .rodata.str1.1 .LC4: .string "_Z16printThreadIndexPiii" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2057: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi leaq _Z16printThreadIndexPiii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2057: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z16printThreadIndexPiii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R17, SR_TID.Y ; /* 0x0000000000117919 */ /* 0x000e220000002200 */ /*0020*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0040*/ IADD3 R1, R1, -0x20, RZ ; /* 0xffffffe001017810 */ /* 0x000fe20007ffe0ff */ /*0050*/ S2R R16, SR_TID.X ; /* 0x0000000000107919 */ /* 0x000e680000002100 */ /*0060*/ S2R R18, SR_CTAID.X ; /* 0x0000000000127919 */ /* 0x000e680000002500 */ /*0070*/ S2R R19, SR_CTAID.Y ; /* 0x0000000000137919 */ /* 0x000e220000002600 */ /*0080*/ IMAD R8, R18, c[0x0][0x0], R16 ; /* 0x0000000012087a24 */ /* 0x002fc400078e0210 */ /*0090*/ IMAD R9, R19, c[0x0][0x4], R17 ; /* 0x0000010013097a24 */ /* 0x001fc800078e0211 */ /*00a0*/ IMAD R10, R9, c[0x0][0x168], R8 ; /* 0x00005a00090a7a24 */ /* 0x000fc800078e0208 */ /*00b0*/ IMAD.WIDE.U32 R2, R10, R3, c[0x0][0x160] ; /* 0x000058000a027625 */ /* 0x000fca00078e0003 */ /*00c0*/ LDG.E R11, [R2.64] ; /* 0x00000004020b7981 */ /* 0x000ea2000c1e1900 */ /*00d0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe20000000f00 */ /*00e0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*00f0*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fe20007f1e0ff */ /*0100*/ STL.128 [R1], R16 ; /* 0x0000001001007387 */ /* 0x0001e20000100c00 */ /*0110*/ LDC.64 R12, c[0x4][R0] ; /* 0x01000000000c7b82 */ /* 0x0000620000000a00 */ /*0120*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x000fe400078e00ff */ /*0130*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */ /* 0x000fe200000e06ff */ /*0140*/ STL.128 [R1+0x10], R8 ; /* 0x0000100801007387 */ /* 0x0041e80000100c00 */ /*0150*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x002fc60000000000 */ /*0160*/ MOV R9, 0x1d0 ; /* 0x000001d000097802 */ /* 0x001fe40000000f00 */ /*0170*/ MOV R20, 0x150 ; /* 0x0000015000147802 */ /* 0x000fc40000000f00 */ /*0180*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*0190*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*01a0*/ IADD3 R20, P0, P1, -R20, R9, R2 ; /* 0x0000000914147210 */ /* 0x000fc8000791e102 */ /*01b0*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*01c0*/ CALL.ABS.NOINC R12 ; /* 0x000000000c007343 */ /* 0x000fea0003c00000 */ /*01d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01e0*/ BRA 0x1e0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <hip/hip_runtime.h> void printMatrix(int *C, const int nx, const int ny){ int *ic = C; printf("\n Matrix:(%d, %d)\n",nx,ny); for(int i =0; i < ny; i++){ for(int j =0; j < nx; j++){ printf("%3d",ic[j + i*nx]); } printf("\n"); } printf("\n"); } __global__ void printThreadIndex(int *A, const int nx, const int ny){ int ix = threadIdx.x + blockDim.x * blockIdx.x; int iy = threadIdx.y + blockDim.y * blockIdx.y; unsigned int idx = ix + iy*nx; printf("thread_id:(%d,%d),block_id:(%d,%d), coordinate(%d,%d) global index %2d ival %2d\n", threadIdx.x,threadIdx.y, blockIdx.x,blockIdx.y,ix,iy,idx,A[idx]); } void initInt(int *ip, int size){ for(int i =0; i < size; i++) ip[i] = i; } int main(){ printf("Starting ....\n"); // set device int dev = 0; hipDeviceProp_t deviceProp; hipSetDevice(dev); // set matrix dimension int nx = 8, ny = 6; int nxy = nx * ny, nBytes = nxy*sizeof(int); // malloc host memory int *h_A; h_A = (int *)malloc(nBytes); // init host matrix with integer initInt(h_A,nxy); printMatrix(h_A,nx,ny); // malloc device memory int *d_A; hipMalloc((void **)&d_A, nBytes); // cp data from host to device hipMemcpy(d_A,h_A,nBytes,hipMemcpyHostToDevice); // set up execution configuration dim3 block(4,2); dim3 grid((nx + block.x - 1)/block.x, (ny + block.y -1)/block.y); // invoke the kernel printThreadIndex<<<grid,block>>>(d_A,nx,ny); hipDeviceSynchronize(); // free host and device memory hipFree(d_A); free(h_A); // reset device hipDeviceReset(); return 0; }
.text .file "checkThreadIndex.hip" .globl _Z11printMatrixPiii # -- Begin function _Z11printMatrixPiii .type _Z11printMatrixPiii,@function _Z11printMatrixPiii: # @_Z11printMatrixPiii .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %edx, %ebp movl %esi, %ebx movq %rdi, 8(%rsp) # 8-byte Spill movl $.L.str, %edi xorl %eax, %eax callq printf testl %ebp, %ebp jle .LBB0_6 # %bb.1: # %.preheader.lr.ph movl %ebp, %eax movq %rax, 16(%rsp) # 8-byte Spill movl %ebx, %r12d xorl %ebp, %ebp xorl %r13d, %r13d .LBB0_2: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB0_4 Depth 2 testl %ebx, %ebx jle .LBB0_5 # %bb.3: # %.lr.ph # in Loop: Header=BB0_2 Depth=1 movl %ebp, %eax movq 8(%rsp), %rcx # 8-byte Reload leaq (%rcx,%rax,4), %r14 xorl %r15d, %r15d .LBB0_4: # Parent Loop BB0_2 Depth=1 # => This Inner Loop Header: Depth=2 movl (%r14,%r15,4), %esi movl $.L.str.1, %edi xorl %eax, %eax callq printf incq %r15 cmpq %r15, %r12 jne .LBB0_4 .LBB0_5: # %._crit_edge # in Loop: Header=BB0_2 Depth=1 movl $10, %edi callq putchar@PLT incq %r13 addl %ebx, %ebp cmpq 16(%rsp), %r13 # 8-byte Folded Reload jne .LBB0_2 .LBB0_6: # %._crit_edge17 movl $10, %edi addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 jmp putchar@PLT # TAILCALL .Lfunc_end0: .size _Z11printMatrixPiii, .Lfunc_end0-_Z11printMatrixPiii .cfi_endproc # -- End function .globl _Z31__device_stub__printThreadIndexPiii # -- Begin function _Z31__device_stub__printThreadIndexPiii .type _Z31__device_stub__printThreadIndexPiii,@function _Z31__device_stub__printThreadIndexPiii: # @_Z31__device_stub__printThreadIndexPiii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $96, %rsp .cfi_def_cfa_offset 144 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 4(%rsp), %rcx movl %esi, (%rcx) movq %rsp, %rsi movl %edx, (%rsi) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z16printThreadIndexPiii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $112, %rsp .cfi_adjust_cfa_offset -112 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z31__device_stub__printThreadIndexPiii, .Lfunc_end1-_Z31__device_stub__printThreadIndexPiii .cfi_endproc # -- End function .globl _Z7initIntPii # -- Begin function _Z7initIntPii .type _Z7initIntPii,@function _Z7initIntPii: # @_Z7initIntPii .cfi_startproc # %bb.0: testl %esi, %esi jle .LBB2_3 # %bb.1: # %.lr.ph.preheader movl %esi, %eax xorl %ecx, %ecx .LBB2_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl %ecx, (%rdi,%rcx,4) incq %rcx cmpq %rcx, %rax jne .LBB2_2 .LBB2_3: # %._crit_edge retq .Lfunc_end2: .size _Z7initIntPii, .Lfunc_end2-_Z7initIntPii .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movl $.Lstr, %edi callq puts@PLT xorl %r14d, %r14d xorl %edi, %edi callq hipSetDevice movl $192, %edi callq malloc movq %rax, %rbx .LBB3_1: # %.lr.ph.i # =>This Inner Loop Header: Depth=1 movl %r14d, (%rbx,%r14,4) incq %r14 cmpq $48, %r14 jne .LBB3_1 # %bb.2: # %_Z7initIntPii.exit movq %rbx, %rdi movl $8, %esi movl $6, %edx callq _Z11printMatrixPiii movq %rsp, %r14 movl $192, %esi movq %r14, %rdi callq hipMalloc movq (%r14), %rdi movl $192, %edx movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movabsq $12884901890, %rdi # imm = 0x300000002 movabsq $8589934596, %rdx # imm = 0x200000004 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB3_4 # %bb.3: movq (%rsp), %rdi movl $8, %esi movl $6, %edx callq _Z31__device_stub__printThreadIndexPiii .LBB3_4: callq hipDeviceSynchronize movq (%rsp), %rdi callq hipFree movq %rbx, %rdi callq free callq hipDeviceReset xorl %eax, %eax addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size main, .Lfunc_end3-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB4_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB4_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z16printThreadIndexPiii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end4: .size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB5_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB5_2: retq .Lfunc_end5: .size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "\n Matrix:(%d, %d)\n" .size .L.str, 19 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "%3d" .size .L.str.1, 4 .type _Z16printThreadIndexPiii,@object # @_Z16printThreadIndexPiii .section .rodata,"a",@progbits .globl _Z16printThreadIndexPiii .p2align 3, 0x0 _Z16printThreadIndexPiii: .quad _Z31__device_stub__printThreadIndexPiii .size _Z16printThreadIndexPiii, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z16printThreadIndexPiii" .size .L__unnamed_1, 25 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "Starting ...." .size .Lstr, 14 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z31__device_stub__printThreadIndexPiii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z16printThreadIndexPiii .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z16printThreadIndexPiii ; -- Begin function _Z16printThreadIndexPiii .globl _Z16printThreadIndexPiii .p2align 8 .type _Z16printThreadIndexPiii,@function _Z16printThreadIndexPiii: ; @_Z16printThreadIndexPiii ; %bb.0: s_clause 0x2 s_load_b32 s4, s[0:1], 0x1c s_load_b32 s5, s[0:1], 0x8 s_load_b64 s[2:3], s[0:1], 0x60 v_and_b32_e32 v1, 0x3ff, v0 v_bfe_u32 v15, v0, 10, 10 s_load_b64 s[0:1], s[0:1], 0x0 v_mbcnt_lo_u32_b32 v44, -1, 0 s_waitcnt lgkmcnt(0) s_lshr_b32 s6, s4, 16 s_and_b32 s4, s4, 0xffff v_mad_u64_u32 v[9:10], null, s15, s6, v[15:16] v_mad_u64_u32 v[12:13], null, s14, s4, v[1:2] v_mov_b32_e32 v16, v44 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v9, s5, v[12:13] v_mov_b32_e32 v6, 0 v_lshlrev_b64 v[2:3], 2, v[5:6] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s0, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo global_load_b32 v2, v[2:3], off v_mov_b32_e32 v3, 0 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v16 v_mov_b32_e32 v4, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v16 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_6 ; %bb.1: global_load_b64 v[19:20], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_mov_b32 s4, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v0, v4, v20 v_and_b32_e32 v3, v3, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v0, v0, 24 v_mul_hi_u32 v4, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v0, v4, v0 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v7, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v8, v0, vcc_lo global_load_b64 v[17:18], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v6, v[17:20], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[19:20] s_cbranch_execz .LBB0_5 ; %bb.2: ; %.preheader3.i.i.i.preheader v_mov_b32_e32 v0, 0 s_mov_b32 s5, 0 .LBB0_3: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v0, s[2:3] offset:40 global_load_b64 v[10:11], v0, s[2:3] v_dual_mov_b32 v20, v4 :: v_dual_mov_b32 v19, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v19 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v7, 24, v[10:11] v_and_b32_e32 v10, v8, v20 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v10, 24, v[4:5] v_mov_b32_e32 v4, v7 global_load_b64 v[17:18], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v0, v[17:20], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[19:20] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_3 ; %bb.4: ; %Flow671 s_or_b32 exec_lo, exec_lo, s5 .LBB0_5: ; %Flow673 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_6: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b128 v[20:23], v6, s[2:3] v_readfirstlane_b32 s4, v3 v_readfirstlane_b32 s5, v4 s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v7 v_readfirstlane_b32 s7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_8 ; %bb.7: v_dual_mov_b32 v24, s10 :: v_dual_mov_b32 v25, 0 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v20, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s10, v21, vcc_lo v_dual_mov_b32 v26, 2 :: v_dual_mov_b32 v27, 1 global_store_b128 v[3:4], v[24:27], off offset:8 .LBB0_8: s_or_b32 exec_lo, exec_lo, s11 v_mov_b32_e32 v17, 0 s_lshl_b64 s[6:7], s[6:7], 12 s_mov_b32 s16, 0 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v22, s6 v_lshlrev_b64 v[3:4], 6, v[16:17] v_mov_b32_e32 v16, 33 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v23, vcc_lo s_mov_b32 s19, s16 s_mov_b32 s17, s16 s_delay_alu instid0(VALU_DEP_3) v_add_co_u32 v3, vcc_lo, v0, v3 s_mov_b32 s18, s16 v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo v_dual_mov_b32 v18, v17 :: v_dual_mov_b32 v25, s19 v_dual_mov_b32 v19, v17 :: v_dual_mov_b32 v24, s18 v_dual_mov_b32 v23, s17 :: v_dual_mov_b32 v22, s16 s_clause 0x3 global_store_b128 v[3:4], v[16:19], off global_store_b128 v[3:4], v[22:25], off offset:16 global_store_b128 v[3:4], v[22:25], off offset:32 global_store_b128 v[3:4], v[22:25], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_16 ; %bb.9: s_clause 0x1 global_load_b64 v[24:25], v17, s[2:3] offset:32 glc global_load_b64 v[7:8], v17, s[2:3] offset:40 s_mov_b32 s7, exec_lo v_dual_mov_b32 v22, s4 :: v_dual_mov_b32 v23, s5 s_waitcnt vmcnt(0) v_and_b32_e32 v0, s5, v8 v_and_b32_e32 v7, s4, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v0, v0, 24 v_mul_hi_u32 v8, v7, 24 v_mul_lo_u32 v7, v7, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v0, v8, v0 v_add_co_u32 v7, vcc_lo, v20, v7 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, v21, v0, vcc_lo global_store_b64 v[7:8], v[24:25], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v17, v[22:25], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[18:19], v[24:25] s_cbranch_execz .LBB0_12 ; %bb.10: ; %.preheader1.i.i.i.preheader v_mov_b32_e32 v0, 0 s_mov_b32 s10, 0 .LBB0_11: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s5 s_sleep 1 global_store_b64 v[7:8], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v0, v[16:19], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[18:19] v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v18, v10 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_11 .LBB0_12: ; %Flow669 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v11, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v0, s10, 0 global_load_b64 v[7:8], v11, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB0_14 ; %bb.13: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v10, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[7:8], v[10:11], off offset:8 .LBB0_14: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[10:11], v[7:8], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] s_cbranch_vccnz .LBB0_16 ; %bb.15: global_load_b32 v7, v[7:8], off offset:24 v_mov_b32_e32 v8, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v7 s_waitcnt_vscnt null, 0x0 global_store_b64 v[10:11], v[7:8], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_16: ; %Flow670 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v20, s9 v_add_co_ci_u32_e32 v8, vcc_lo, s8, v21, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo .LBB0_17: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v0, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_19 ; %bb.18: ; in Loop: Header=BB0_17 Depth=1 global_load_b32 v0, v[7:8], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v0, 1, v0 .LBB0_19: ; in Loop: Header=BB0_17 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v0 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_21 ; %bb.20: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_22 .LBB0_21: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, -1 .LBB0_22: ; %Flow664 ; in Loop: Header=BB0_17 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_17 ; %bb.23: global_load_b64 v[16:17], v[3:4], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_27 ; %bb.24: v_mov_b32_e32 v0, 0 s_clause 0x2 global_load_b64 v[3:4], v0, s[2:3] offset:40 global_load_b64 v[7:8], v0, s[2:3] offset:24 glc global_load_b64 v[10:11], v0, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v18, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v19, vcc_lo, 0, v4, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v21, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v13, vcc_lo, v18, s4 v_add_co_ci_u32_e32 v14, vcc_lo, s5, v19, vcc_lo v_mov_b32_e32 v20, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14] v_dual_cndmask_b32 v19, v14, v19 :: v_dual_cndmask_b32 v18, v13, v18 v_and_b32_e32 v4, v19, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v18, v3 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v3, 24 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v4, v13, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v10, v3 v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo global_store_b64 v[3:4], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[20:21], v0, v[18:21], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[20:21], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_27 ; %bb.25: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_26: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[3:4], v[20:21], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v0, v[18:21], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[20:21] v_dual_mov_b32 v21, v8 :: v_dual_mov_b32 v20, v7 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_26 .LBB0_27: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[4:5] s_add_u32 s4, s4, .str@rel32@lo+4 s_addc_u32 s5, s5, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[4:5], 0 s_cbranch_scc0 .LBB0_113 ; %bb.28: s_waitcnt vmcnt(0) v_dual_mov_b32 v19, v17 :: v_dual_and_b32 v0, 2, v16 v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v23, 1 v_and_b32_e32 v18, -3, v16 v_mov_b32_e32 v22, 2 s_mov_b64 s[6:7], 0x51 .LBB0_29: ; =>This Loop Header: Depth=1 ; Child Loop BB0_32 Depth 2 ; Child Loop BB0_39 Depth 2 ; Child Loop BB0_47 Depth 2 ; Child Loop BB0_55 Depth 2 ; Child Loop BB0_63 Depth 2 ; Child Loop BB0_71 Depth 2 ; Child Loop BB0_79 Depth 2 ; Child Loop BB0_87 Depth 2 ; Child Loop BB0_95 Depth 2 ; Child Loop BB0_101 Depth 2 ; Child Loop BB0_110 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[6:7], 56 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $sgpr17 s_and_b32 s0, s0, exec_lo s_cselect_b32 s8, s6, 56 s_cselect_b32 s9, s7, 0 s_cmp_gt_u32 s8, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_34 ; %bb.30: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v26, 0 v_mov_b32_e32 v27, 0 s_cmp_eq_u32 s8, 0 s_cbranch_scc1 .LBB0_33 ; %bb.31: ; %.preheader31.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_lshl_b64 s[0:1], s[8:9], 3 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[4:5] .LBB0_32: ; %.preheader31.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v3, v4, s[12:13] s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[3:4] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s0, s10 v_or_b32_e32 v26, v7, v26 v_or_b32_e32 v27, v8, v27 s_cbranch_scc1 .LBB0_32 .LBB0_33: ; %Flow640 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s17, 0 .LBB0_34: ; %Flow642 ; in Loop: Header=BB0_29 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[4:5] s_cbranch_vccnz .LBB0_36 ; %bb.35: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[26:27], v4, s[4:5] s_add_i32 s17, s8, -8 s_add_u32 s0, s4, 8 s_addc_u32 s1, s5, 0 .LBB0_36: ; %.loopexit32.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s17, 7 s_cbranch_scc1 .LBB0_41 ; %bb.37: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v28, 0 v_mov_b32_e32 v29, 0 s_cmp_eq_u32 s17, 0 s_cbranch_scc1 .LBB0_40 ; %bb.38: ; %.preheader29.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_39: ; %.preheader29.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v3, v4, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[3:4] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s17, s12 v_or_b32_e32 v28, v7, v28 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v29, v8, v29 s_cbranch_scc1 .LBB0_39 .LBB0_40: ; %Flow635 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s16, 0 s_branch .LBB0_42 .LBB0_41: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr28_vgpr29 ; implicit-def: $sgpr16 .LBB0_42: ; %Flow637 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_44 ; %bb.43: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[28:29], v4, s[0:1] s_add_i32 s16, s17, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_44: ; %.loopexit30.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_49 ; %bb.45: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v30, 0 v_mov_b32_e32 v31, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_48 ; %bb.46: ; %.preheader27.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_47: ; %.preheader27.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v3, v4, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[3:4] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s16, s12 v_or_b32_e32 v30, v7, v30 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v31, v8, v31 s_cbranch_scc1 .LBB0_47 .LBB0_48: ; %Flow630 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s17, 0 s_branch .LBB0_50 .LBB0_49: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr17 .LBB0_50: ; %Flow632 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_52 ; %bb.51: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[30:31], v4, s[0:1] s_add_i32 s17, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_52: ; %.loopexit28.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s17, 7 s_cbranch_scc1 .LBB0_57 ; %bb.53: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v32, 0 v_mov_b32_e32 v33, 0 s_cmp_eq_u32 s17, 0 s_cbranch_scc1 .LBB0_56 ; %bb.54: ; %.preheader25.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_55: ; %.preheader25.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v3, v4, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[3:4] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s17, s12 v_or_b32_e32 v32, v7, v32 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v33, v8, v33 s_cbranch_scc1 .LBB0_55 .LBB0_56: ; %Flow625 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s16, 0 s_branch .LBB0_58 .LBB0_57: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr32_vgpr33 ; implicit-def: $sgpr16 .LBB0_58: ; %Flow627 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_60 ; %bb.59: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[32:33], v4, s[0:1] s_add_i32 s16, s17, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_60: ; %.loopexit26.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_65 ; %bb.61: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v34, 0 v_mov_b32_e32 v35, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_64 ; %bb.62: ; %.preheader23.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_63: ; %.preheader23.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v3, v4, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[3:4] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s16, s12 v_or_b32_e32 v34, v7, v34 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v35, v8, v35 s_cbranch_scc1 .LBB0_63 .LBB0_64: ; %Flow620 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s17, 0 s_branch .LBB0_66 .LBB0_65: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr17 .LBB0_66: ; %Flow622 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_68 ; %bb.67: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[34:35], v4, s[0:1] s_add_i32 s17, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_68: ; %.loopexit24.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s17, 7 s_cbranch_scc1 .LBB0_73 ; %bb.69: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v36, 0 v_mov_b32_e32 v37, 0 s_cmp_eq_u32 s17, 0 s_cbranch_scc1 .LBB0_72 ; %bb.70: ; %.preheader21.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_71: ; %.preheader21.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v3, v4, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[3:4] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s17, s12 v_or_b32_e32 v36, v7, v36 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v37, v8, v37 s_cbranch_scc1 .LBB0_71 .LBB0_72: ; %Flow615 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s16, 0 s_branch .LBB0_74 .LBB0_73: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr36_vgpr37 ; implicit-def: $sgpr16 .LBB0_74: ; %Flow617 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_76 ; %bb.75: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[36:37], v4, s[0:1] s_add_i32 s16, s17, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_76: ; %.loopexit22.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_81 ; %bb.77: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v38, 0 v_mov_b32_e32 v39, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_80 ; %bb.78: ; %.preheader.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[0:1] .LBB0_79: ; %.preheader.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v3, v4, s[12:13] s_add_i32 s16, s16, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[7:8], s10, v[3:4] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s16, 0 v_or_b32_e32 v38, v7, v38 v_or_b32_e32 v39, v8, v39 s_cbranch_scc1 .LBB0_79 .LBB0_80: ; %Flow610 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, 0 s_branch .LBB0_82 .LBB0_81: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s10, -1 .LBB0_82: ; %Flow612 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_84 ; %bb.83: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[38:39], v4, s[0:1] .LBB0_84: ; %.loopexit.i ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v3, v44 v_mov_b32_e32 v7, 0 v_mov_b32_e32 v8, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v3 v_cmp_eq_u32_e64 s0, s0, v3 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_90 ; %bb.85: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[42:43], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[7:8], v4, s[2:3] offset:40 global_load_b64 v[10:11], v4, s[2:3] s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v8, v8, v43 v_and_b32_e32 v7, v7, v42 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v8, v8, 24 v_mul_hi_u32 v13, v7, 24 v_mul_lo_u32 v7, v7, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v8, v13, v8 s_waitcnt vmcnt(0) v_add_co_u32 v7, vcc_lo, v10, v7 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, v11, v8, vcc_lo global_load_b64 v[40:41], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v4, v[40:43], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[7:8], v[42:43] s_cbranch_execz .LBB0_89 ; %bb.86: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s11, 0 .LBB0_87: ; %.preheader3.i.i19.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[10:11], v4, s[2:3] offset:40 global_load_b64 v[13:14], v4, s[2:3] v_dual_mov_b32 v43, v8 :: v_dual_mov_b32 v42, v7 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v10, v10, v42 s_waitcnt vmcnt(0) v_mad_u64_u32 v[7:8], null, v10, 24, v[13:14] v_and_b32_e32 v13, v11, v43 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[10:11], null, v13, 24, v[8:9] v_mov_b32_e32 v8, v10 global_load_b64 v[40:41], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v4, v[40:43], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[42:43] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_87 ; %bb.88: ; %Flow605 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_89: ; %Flow607 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 .LBB0_90: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[10:11], v4, s[2:3] offset:40 global_load_b128 v[40:43], v4, s[2:3] v_readfirstlane_b32 s10, v7 v_readfirstlane_b32 s11, v8 s_mov_b32 s18, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s12, v10 v_readfirstlane_b32 s13, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[10:11], s[12:13] s_mul_i32 s1, s13, 24 s_mul_hi_u32 s16, s12, 24 s_mul_i32 s17, s12, 24 s_and_saveexec_b32 s19, s0 s_cbranch_execz .LBB0_92 ; %bb.91: ; in Loop: Header=BB0_29 Depth=1 v_dual_mov_b32 v20, s18 :: v_dual_mov_b32 v21, v4 s_add_i32 s18, s16, s1 s_waitcnt vmcnt(0) v_add_co_u32 v7, vcc_lo, v40, s17 v_add_co_ci_u32_e32 v8, vcc_lo, s18, v41, vcc_lo global_store_b128 v[7:8], v[20:23], off offset:8 .LBB0_92: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s19 v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56 v_or_b32_e32 v7, 0, v19 v_or_b32_e32 v8, v18, v0 s_lshl_b64 s[12:13], s[12:13], 12 s_lshl_b32 s18, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s18, s18, 28 v_dual_cndmask_b32 v25, v7, v19 :: v_dual_cndmask_b32 v10, v8, v18 v_lshlrev_b64 v[7:8], 6, v[3:4] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v42, s12 v_add_co_ci_u32_e32 v11, vcc_lo, s13, v43, vcc_lo s_and_b32 s18, s18, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, v3, v7 v_and_or_b32 v24, 0xffffff1f, v10, s18 v_add_co_ci_u32_e32 v8, vcc_lo, v11, v8, vcc_lo s_clause 0x3 global_store_b128 v[7:8], v[24:27], off global_store_b128 v[7:8], v[28:31], off offset:16 global_store_b128 v[7:8], v[32:35], off offset:32 global_store_b128 v[7:8], v[36:39], off offset:48 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_100 ; %bb.93: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x1 global_load_b64 v[26:27], v4, s[2:3] offset:32 glc global_load_b64 v[10:11], v4, s[2:3] offset:40 v_dual_mov_b32 v24, s10 :: v_dual_mov_b32 v25, s11 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v10 v_readfirstlane_b32 s19, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[10:11] s_mul_i32 s13, s19, 24 s_mul_hi_u32 s19, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s19, s19, s13 v_add_co_u32 v10, vcc_lo, v40, s18 v_add_co_ci_u32_e32 v11, vcc_lo, s19, v41, vcc_lo s_mov_b32 s13, exec_lo global_store_b64 v[10:11], v[26:27], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[20:21], v4, v[24:27], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[20:21], v[26:27] s_cbranch_execz .LBB0_96 ; %bb.94: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s18, 0 .LBB0_95: ; %.preheader1.i.i17.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v18, s10 :: v_dual_mov_b32 v19, s11 s_sleep 1 global_store_b64 v[10:11], v[20:21], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[13:14], v4, v[18:21], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[20:21] v_dual_mov_b32 v21, v14 :: v_dual_mov_b32 v20, v13 s_or_b32 s18, vcc_lo, s18 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB0_95 .LBB0_96: ; %Flow603 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s13 global_load_b64 v[10:11], v4, s[2:3] offset:16 s_mov_b32 s18, exec_lo s_mov_b32 s13, exec_lo v_mbcnt_lo_u32_b32 v3, s18, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB0_98 ; %bb.97: ; in Loop: Header=BB0_29 Depth=1 s_bcnt1_i32_b32 s18, s18 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v3, s18 s_waitcnt vmcnt(0) global_atomic_add_u64 v[10:11], v[3:4], off offset:8 .LBB0_98: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_waitcnt vmcnt(0) global_load_b64 v[13:14], v[10:11], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14] s_cbranch_vccnz .LBB0_100 ; %bb.99: ; in Loop: Header=BB0_29 Depth=1 global_load_b32 v3, v[10:11], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s13, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[13:14], v[3:4], off s_and_b32 m0, s13, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_100: ; %Flow604 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_add_i32 s16, s16, s1 v_add_co_u32 v3, vcc_lo, v40, s17 v_add_co_ci_u32_e32 v11, vcc_lo, s16, v41, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo .LBB0_101: ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v3, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_101 Depth=2 global_load_b32 v3, v[10:11], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v3, 1, v3 .LBB0_103: ; in Loop: Header=BB0_101 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v3 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_105 ; %bb.104: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_106 .LBB0_105: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, -1 .LBB0_106: ; %Flow598 ; in Loop: Header=BB0_101 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_101 ; %bb.107: ; in Loop: Header=BB0_29 Depth=1 global_load_b128 v[18:21], v[7:8], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_111 ; %bb.108: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x2 global_load_b64 v[7:8], v4, s[2:3] offset:40 global_load_b64 v[10:11], v4, s[2:3] offset:24 glc global_load_b64 v[13:14], v4, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v3, vcc_lo, v7, 1 v_add_co_ci_u32_e32 v24, vcc_lo, 0, v8, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v27, v11 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v20, vcc_lo, v3, s10 v_add_co_ci_u32_e32 v21, vcc_lo, s11, v24, vcc_lo v_mov_b32_e32 v26, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[20:21] v_dual_cndmask_b32 v25, v21, v24 :: v_dual_cndmask_b32 v24, v20, v3 v_and_b32_e32 v3, v25, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v7, v24, v7 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v8, v7, 24 v_mul_lo_u32 v7, v7, 24 v_add_nc_u32_e32 v3, v8, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, v13, v7 v_add_co_ci_u32_e32 v8, vcc_lo, v14, v3, vcc_lo global_store_b64 v[7:8], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[26:27], v4, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[26:27], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_111 ; %bb.109: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 .LBB0_110: ; %.preheader.i.i16.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[7:8], v[26:27], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v4, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[26:27] v_dual_mov_b32 v27, v11 :: v_dual_mov_b32 v26, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_110 .LBB0_111: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s6, s6, s8 s_subb_u32 s7, s7, s9 s_add_u32 s4, s4, s8 s_addc_u32 s5, s5, s9 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc1 .LBB0_29 ; %bb.112: ; %Flow643 s_mov_b32 s0, 0 s_branch .LBB0_114 .LBB0_113: s_mov_b32 s0, -1 ; implicit-def: $vgpr18_vgpr19 .LBB0_114: ; %Flow658 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_143 ; %bb.115: s_waitcnt vmcnt(0) v_dual_mov_b32 v18, v44 :: v_dual_mov_b32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v18 v_mov_b32_e32 v4, 0 v_cmp_eq_u32_e64 s0, s0, v18 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_121 ; %bb.116: v_mov_b32_e32 v0, 0 s_mov_b32 s4, exec_lo global_load_b64 v[21:22], v0, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v0, s[2:3] offset:40 global_load_b64 v[7:8], v0, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v3, v3, v21 v_and_b32_e32 v4, v4, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v3, 24 v_mul_lo_u32 v4, v4, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v10, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v7, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo global_load_b64 v[19:20], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v0, v[19:22], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[21:22] s_cbranch_execz .LBB0_120 ; %bb.117: ; %.preheader3.i.i.i14.preheader s_mov_b32 s5, 0 .LBB0_118: ; %.preheader3.i.i.i14 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v0, s[2:3] offset:40 global_load_b64 v[10:11], v0, s[2:3] v_dual_mov_b32 v22, v4 :: v_dual_mov_b32 v21, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v21 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v7, 24, v[10:11] v_and_b32_e32 v10, v8, v22 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v10, 24, v[4:5] v_mov_b32_e32 v4, v7 global_load_b64 v[19:20], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v0, v[19:22], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[21:22] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_118 ; %bb.119: ; %Flow655 s_or_b32 exec_lo, exec_lo, s5 .LBB0_120: ; %Flow657 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_121: ; %.loopexit4.i.i.i9 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v19, 0 v_readfirstlane_b32 s4, v3 v_readfirstlane_b32 s5, v4 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[7:8], v19, s[2:3] offset:40 global_load_b128 v[20:23], v19, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v7 v_readfirstlane_b32 s7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_123 ; %bb.122: v_dual_mov_b32 v24, s10 :: v_dual_mov_b32 v25, v19 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v20, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s10, v21, vcc_lo v_dual_mov_b32 v26, 2 :: v_dual_mov_b32 v27, 1 global_store_b128 v[3:4], v[24:27], off offset:8 .LBB0_123: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[18:19] s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v22, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v23, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v0, v3 s_mov_b32 s19, s16 s_mov_b32 s17, s16 s_mov_b32 s18, s16 v_and_or_b32 v16, 0xffffff1f, v16, 32 v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo v_dual_mov_b32 v18, v19 :: v_dual_mov_b32 v25, s19 v_dual_mov_b32 v24, s18 :: v_dual_mov_b32 v23, s17 v_mov_b32_e32 v22, s16 s_clause 0x3 global_store_b128 v[3:4], v[16:19], off global_store_b128 v[3:4], v[22:25], off offset:16 global_store_b128 v[3:4], v[22:25], off offset:32 global_store_b128 v[3:4], v[22:25], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_131 ; %bb.124: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v23, s5 v_mov_b32_e32 v22, s4 s_clause 0x1 global_load_b64 v[24:25], v0, s[2:3] offset:32 glc global_load_b64 v[7:8], v0, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v7 v_readfirstlane_b32 s11, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v7, vcc_lo, v20, s10 v_add_co_ci_u32_e32 v8, vcc_lo, s11, v21, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[7:8], v[24:25], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v0, v[22:25], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[18:19], v[24:25] s_cbranch_execz .LBB0_127 ; %bb.125: ; %.preheader1.i.i.i12.preheader s_mov_b32 s10, 0 .LBB0_126: ; %.preheader1.i.i.i12 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s5 s_sleep 1 global_store_b64 v[7:8], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v0, v[16:19], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[18:19] v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v18, v10 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_126 .LBB0_127: ; %Flow653 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v11, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v0, s10, 0 global_load_b64 v[7:8], v11, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB0_129 ; %bb.128: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v10, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[7:8], v[10:11], off offset:8 .LBB0_129: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[10:11], v[7:8], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] s_cbranch_vccnz .LBB0_131 ; %bb.130: global_load_b32 v7, v[7:8], off offset:24 v_mov_b32_e32 v8, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v7 s_waitcnt_vscnt null, 0x0 global_store_b64 v[10:11], v[7:8], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_131: ; %Flow654 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v20, s9 v_add_co_ci_u32_e32 v8, vcc_lo, s8, v21, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo .LBB0_132: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v0, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_134 ; %bb.133: ; in Loop: Header=BB0_132 Depth=1 global_load_b32 v0, v[7:8], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v0, 1, v0 .LBB0_134: ; in Loop: Header=BB0_132 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v0 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_136 ; %bb.135: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_137 .LBB0_136: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, -1 .LBB0_137: ; %Flow648 ; in Loop: Header=BB0_132 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_132 ; %bb.138: global_load_b128 v[18:21], v[3:4], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_142 ; %bb.139: v_mov_b32_e32 v0, 0 s_clause 0x2 global_load_b64 v[3:4], v0, s[2:3] offset:40 global_load_b64 v[7:8], v0, s[2:3] offset:24 glc global_load_b64 v[10:11], v0, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v16, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v17, vcc_lo, 0, v4, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v23, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v13, vcc_lo, v16, s4 v_add_co_ci_u32_e32 v14, vcc_lo, s5, v17, vcc_lo v_mov_b32_e32 v22, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14] v_dual_cndmask_b32 v21, v14, v17 :: v_dual_cndmask_b32 v20, v13, v16 v_and_b32_e32 v4, v21, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v3, v20, v3 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v3, 24 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v4, v13, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v10, v3 v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo global_store_b64 v[3:4], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[22:23], v0, v[20:23], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[22:23], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_142 ; %bb.140: ; %.preheader.i.i.i11.preheader s_mov_b32 s0, 0 .LBB0_141: ; %.preheader.i.i.i11 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[3:4], v[22:23], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v0, v[20:23], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[22:23] v_dual_mov_b32 v23, v8 :: v_dual_mov_b32 v22, v7 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_141 .LBB0_142: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_143: ; %__ockl_printf_append_string_n.exit s_waitcnt vmcnt(0) v_dual_mov_b32 v20, v44 :: v_dual_mov_b32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v20 v_mov_b32_e32 v4, 0 v_cmp_eq_u32_e64 s0, s0, v20 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_149 ; %bb.144: v_mov_b32_e32 v0, 0 s_mov_b32 s4, exec_lo global_load_b64 v[23:24], v0, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v0, s[2:3] offset:40 global_load_b64 v[7:8], v0, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v3, v3, v23 v_and_b32_e32 v4, v4, v24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v3, 24 v_mul_lo_u32 v4, v4, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v10, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v7, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo global_load_b64 v[21:22], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v0, v[21:24], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[23:24] s_cbranch_execz .LBB0_148 ; %bb.145: ; %.preheader3.i.i.i21.preheader s_mov_b32 s5, 0 .LBB0_146: ; %.preheader3.i.i.i21 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v0, s[2:3] offset:40 global_load_b64 v[10:11], v0, s[2:3] v_dual_mov_b32 v24, v4 :: v_dual_mov_b32 v23, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v23 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v7, 24, v[10:11] v_and_b32_e32 v10, v8, v24 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v10, 24, v[4:5] v_mov_b32_e32 v4, v7 global_load_b64 v[21:22], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v0, v[21:24], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[23:24] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_146 ; %bb.147: ; %Flow591 s_or_b32 exec_lo, exec_lo, s5 .LBB0_148: ; %Flow593 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_149: ; %.loopexit4.i.i.i15 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v21, 0 v_readfirstlane_b32 s4, v3 v_readfirstlane_b32 s5, v4 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[7:8], v21, s[2:3] offset:40 global_load_b128 v[22:25], v21, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v7 v_readfirstlane_b32 s7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_151 ; %bb.150: v_dual_mov_b32 v26, s10 :: v_dual_mov_b32 v27, v21 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v22, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s10, v23, vcc_lo v_dual_mov_b32 v28, 2 :: v_dual_mov_b32 v29, 1 global_store_b128 v[3:4], v[26:29], off offset:8 .LBB0_151: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[3:4], 6, v[20:21] s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v24, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v25, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v0, v3 s_mov_b32 s19, s16 s_mov_b32 s17, s16 s_mov_b32 s18, s16 v_and_or_b32 v18, 0xffffff1f, v18, 32 v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo v_dual_mov_b32 v20, v1 :: v_dual_mov_b32 v27, s19 v_dual_mov_b32 v26, s18 :: v_dual_mov_b32 v25, s17 v_mov_b32_e32 v24, s16 s_clause 0x3 global_store_b128 v[3:4], v[18:21], off global_store_b128 v[3:4], v[24:27], off offset:16 global_store_b128 v[3:4], v[24:27], off offset:32 global_store_b128 v[3:4], v[24:27], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_159 ; %bb.152: v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v18, s4 v_mov_b32_e32 v19, s5 s_clause 0x1 global_load_b64 v[20:21], v7, s[2:3] offset:32 glc global_load_b64 v[0:1], v7, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v0, vcc_lo, v22, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s11, v23, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[0:1], v[20:21], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v7, v[18:21], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[18:19], v[20:21] s_cbranch_execz .LBB0_155 ; %bb.153: ; %.preheader1.i.i.i19.preheader s_mov_b32 s10, 0 .LBB0_154: ; %.preheader1.i.i.i19 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v16, s4 :: v_dual_mov_b32 v17, s5 s_sleep 1 global_store_b64 v[0:1], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v7, v[16:19], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[18:19] v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v18, v10 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_154 .LBB0_155: ; %Flow589 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v8, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v7, s10, 0 global_load_b64 v[0:1], v8, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v7 s_cbranch_execz .LBB0_157 ; %bb.156: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v7, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[7:8], off offset:8 .LBB0_157: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_159 ; %bb.158: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_159: ; %Flow590 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v22, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v23, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_160: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v7, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_162 ; %bb.161: ; in Loop: Header=BB0_160 Depth=1 global_load_b32 v7, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v7, 1, v7 .LBB0_162: ; in Loop: Header=BB0_160 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v7 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_164 ; %bb.163: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_165 .LBB0_164: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, -1 .LBB0_165: ; %Flow584 ; in Loop: Header=BB0_160 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_160 ; %bb.166: global_load_b64 v[13:14], v[3:4], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_170 ; %bb.167: v_mov_b32_e32 v3, 0 s_clause 0x2 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[7:8], v3, s[2:3] offset:24 glc global_load_b64 v[10:11], v3, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v4, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v18, vcc_lo, 0, v1, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v19, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v16, vcc_lo, v4, s4 v_add_co_ci_u32_e32 v17, vcc_lo, s5, v18, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_eq_u64_e32 vcc_lo, 0, v[16:17] v_dual_cndmask_b32 v16, v16, v4 :: v_dual_cndmask_b32 v17, v17, v18 v_mov_b32_e32 v18, v7 v_and_b32_e32 v0, v16, v0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v17, v1 v_mul_hi_u32 v4, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v4, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v10, v0 v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v3, v[16:19], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[18:19], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_170 ; %bb.168: ; %.preheader.i.i.i18.preheader s_mov_b32 s0, 0 .LBB0_169: ; %.preheader.i.i.i18 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v3, v[16:19], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[18:19] v_dual_mov_b32 v19, v8 :: v_dual_mov_b32 v18, v7 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_169 .LBB0_170: ; %__ockl_printf_append_args.exit s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v3, v44 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v3 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v3 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_176 ; %bb.171: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[18:19], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[7:8], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v19 v_and_b32_e32 v0, v0, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v10, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v10, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[16:17], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[16:19], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[18:19] s_cbranch_execz .LBB0_175 ; %bb.172: ; %.preheader3.i.i.i28.preheader s_mov_b32 s5, 0 .LBB0_173: ; %.preheader3.i.i.i28 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v4, s[2:3] offset:40 global_load_b64 v[10:11], v4, s[2:3] v_dual_mov_b32 v19, v1 :: v_dual_mov_b32 v18, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v18 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[10:11] v_and_b32_e32 v10, v8, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v10, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[16:17], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[16:19], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[18:19] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_173 ; %bb.174: ; %Flow577 s_or_b32 exec_lo, exec_lo, s5 .LBB0_175: ; %Flow579 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_176: ; %.loopexit4.i.i.i22 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v4, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[7:8], v4, s[2:3] offset:40 global_load_b128 v[17:20], v4, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v7 v_readfirstlane_b32 s7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_178 ; %bb.177: v_dual_mov_b32 v21, s10 :: v_dual_mov_b32 v22, v4 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v17, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v18, vcc_lo v_dual_mov_b32 v23, 2 :: v_dual_mov_b32 v24, 1 global_store_b128 v[0:1], v[21:24], off offset:8 .LBB0_178: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[3:4] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v19, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v20, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, v0 s_mov_b32 s19, s16 s_mov_b32 s17, s16 s_mov_b32 s18, s16 v_and_or_b32 v13, 0xffffff1f, v13, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo v_mov_b32_e32 v16, v4 v_dual_mov_b32 v22, s19 :: v_dual_mov_b32 v19, s16 v_dual_mov_b32 v21, s18 :: v_dual_mov_b32 v20, s17 s_clause 0x3 global_store_b128 v[0:1], v[13:16], off global_store_b128 v[0:1], v[19:22], off offset:16 global_store_b128 v[0:1], v[19:22], off offset:32 global_store_b128 v[0:1], v[19:22], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_186 ; %bb.179: v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v20, s5 v_mov_b32_e32 v19, s4 s_clause 0x1 global_load_b64 v[21:22], v7, s[2:3] offset:32 glc global_load_b64 v[3:4], v7, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v17, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v18, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[21:22], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v7, v[19:22], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[15:16], v[21:22] s_cbranch_execz .LBB0_182 ; %bb.180: ; %.preheader1.i.i.i26.preheader s_mov_b32 s10, 0 .LBB0_181: ; %.preheader1.i.i.i26 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v13, s4 :: v_dual_mov_b32 v14, s5 s_sleep 1 global_store_b64 v[3:4], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v7, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[15:16] v_dual_mov_b32 v16, v11 :: v_dual_mov_b32 v15, v10 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_181 .LBB0_182: ; %Flow575 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v8, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v7, s10, 0 global_load_b64 v[3:4], v8, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v7 s_cbranch_execz .LBB0_184 ; %bb.183: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v7, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[7:8], off offset:8 .LBB0_184: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_186 ; %bb.185: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_186: ; %Flow576 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v17, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v18, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_187: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v7, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_189 ; %bb.188: ; in Loop: Header=BB0_187 Depth=1 global_load_b32 v7, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v7, 1, v7 .LBB0_189: ; in Loop: Header=BB0_187 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v7 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_191 ; %bb.190: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_192 .LBB0_191: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, -1 .LBB0_192: ; %Flow570 ; in Loop: Header=BB0_187 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_187 ; %bb.193: global_load_b64 v[13:14], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_197 ; %bb.194: v_mov_b32_e32 v3, 0 s_clause 0x2 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[7:8], v3, s[2:3] offset:24 glc global_load_b64 v[10:11], v3, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v4, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v17, vcc_lo, 0, v1, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v18, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v15, vcc_lo, v4, s4 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v17, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16] v_dual_cndmask_b32 v16, v16, v17 :: v_dual_cndmask_b32 v15, v15, v4 v_mov_b32_e32 v17, v7 v_and_b32_e32 v1, v16, v1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v15, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v4, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v10, v0 v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[17:18], v3, v[15:18], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[17:18], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_197 ; %bb.195: ; %.preheader.i.i.i25.preheader s_mov_b32 s0, 0 .LBB0_196: ; %.preheader.i.i.i25 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[17:18], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v3, v[15:18], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[17:18] v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v17, v7 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_196 .LBB0_197: ; %__ockl_printf_append_args.exit29 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v15, v44 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v15 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v15 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_203 ; %bb.198: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[18:19], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[7:8], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v0, v0, v18 v_and_b32_e32 v1, v1, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v1, v1, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v4, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[16:17], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v3, v[16:19], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[18:19] s_cbranch_execz .LBB0_202 ; %bb.199: ; %.preheader3.i.i.i36.preheader s_mov_b32 s5, 0 .LBB0_200: ; %.preheader3.i.i.i36 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v19, v1 :: v_dual_mov_b32 v18, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v4, v7, v18 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v4, 24, v[10:11] v_and_b32_e32 v4, v8, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v4, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[16:17], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v3, v[16:19], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[18:19] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_200 ; %bb.201: ; %Flow563 s_or_b32 exec_lo, exec_lo, s5 .LBB0_202: ; %Flow565 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_203: ; %.loopexit4.i.i.i30 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v16, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[3:4], v16, s[2:3] offset:40 global_load_b128 v[17:20], v16, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v3 v_readfirstlane_b32 s7, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_205 ; %bb.204: v_dual_mov_b32 v21, s10 :: v_dual_mov_b32 v22, v16 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v17, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v18, vcc_lo v_dual_mov_b32 v23, 2 :: v_dual_mov_b32 v24, 1 global_store_b128 v[0:1], v[21:24], off offset:8 .LBB0_205: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[15:16] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v19, s6 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v20, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, v0 s_mov_b32 s19, s16 s_mov_b32 s17, s16 s_mov_b32 s18, s16 v_and_or_b32 v13, 0xffffff1f, v13, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo v_dual_mov_b32 v15, s14 :: v_dual_mov_b32 v22, s19 v_dual_mov_b32 v21, s18 :: v_dual_mov_b32 v20, s17 v_mov_b32_e32 v19, s16 s_clause 0x3 global_store_b128 v[0:1], v[13:16], off global_store_b128 v[0:1], v[19:22], off offset:16 global_store_b128 v[0:1], v[19:22], off offset:32 global_store_b128 v[0:1], v[19:22], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_213 ; %bb.206: v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v20, s5 v_mov_b32_e32 v19, s4 s_clause 0x1 global_load_b64 v[21:22], v7, s[2:3] offset:32 glc global_load_b64 v[3:4], v7, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v17, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v18, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[21:22], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v7, v[19:22], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[15:16], v[21:22] s_cbranch_execz .LBB0_209 ; %bb.207: ; %.preheader1.i.i.i34.preheader s_mov_b32 s10, 0 .LBB0_208: ; %.preheader1.i.i.i34 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v13, s4 :: v_dual_mov_b32 v14, s5 s_sleep 1 global_store_b64 v[3:4], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v7, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[15:16] v_dual_mov_b32 v16, v11 :: v_dual_mov_b32 v15, v10 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_208 .LBB0_209: ; %Flow561 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v8, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v7, s10, 0 global_load_b64 v[3:4], v8, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v7 s_cbranch_execz .LBB0_211 ; %bb.210: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v7, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[7:8], off offset:8 .LBB0_211: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_213 ; %bb.212: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_213: ; %Flow562 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v17, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v18, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_214: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v7, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_216 ; %bb.215: ; in Loop: Header=BB0_214 Depth=1 global_load_b32 v7, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v7, 1, v7 .LBB0_216: ; in Loop: Header=BB0_214 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v7 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_218 ; %bb.217: ; in Loop: Header=BB0_214 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_219 .LBB0_218: ; in Loop: Header=BB0_214 Depth=1 s_mov_b32 s1, -1 .LBB0_219: ; %Flow556 ; in Loop: Header=BB0_214 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_214 ; %bb.220: global_load_b64 v[13:14], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_224 ; %bb.221: v_mov_b32_e32 v3, 0 s_clause 0x2 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[7:8], v3, s[2:3] offset:24 glc global_load_b64 v[10:11], v3, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v4, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v17, vcc_lo, 0, v1, vcc_lo s_waitcnt vmcnt(1) v_mov_b32_e32 v18, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v15, vcc_lo, v4, s4 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v17, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16] v_dual_cndmask_b32 v16, v16, v17 :: v_dual_cndmask_b32 v15, v15, v4 v_mov_b32_e32 v17, v7 v_and_b32_e32 v1, v16, v1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v15, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v4, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v10, v0 v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[17:18], v3, v[15:18], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[17:18], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_224 ; %bb.222: ; %.preheader.i.i.i33.preheader s_mov_b32 s0, 0 .LBB0_223: ; %.preheader.i.i.i33 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[17:18], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v3, v[15:18], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[17:18] v_dual_mov_b32 v18, v8 :: v_dual_mov_b32 v17, v7 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_223 .LBB0_224: ; %__ockl_printf_append_args.exit37 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v15, v44 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v15 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v15 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_230 ; %bb.225: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[18:19], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[7:8], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v0, v0, v18 v_and_b32_e32 v1, v1, v19 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v1, v1, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v4, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[16:17], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v3, v[16:19], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[18:19] s_cbranch_execz .LBB0_229 ; %bb.226: ; %.preheader3.i.i.i44.preheader s_mov_b32 s5, 0 .LBB0_227: ; %.preheader3.i.i.i44 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v19, v1 :: v_dual_mov_b32 v18, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v4, v7, v18 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v4, 24, v[10:11] v_and_b32_e32 v4, v8, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v4, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[16:17], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v3, v[16:19], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[18:19] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_227 ; %bb.228: ; %Flow549 s_or_b32 exec_lo, exec_lo, s5 .LBB0_229: ; %Flow551 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_230: ; %.loopexit4.i.i.i38 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v16, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[3:4], v16, s[2:3] offset:40 global_load_b128 v[17:20], v16, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v3 v_readfirstlane_b32 s7, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_232 ; %bb.231: v_dual_mov_b32 v21, s10 :: v_dual_mov_b32 v22, v16 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v17, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v18, vcc_lo v_dual_mov_b32 v23, 2 :: v_dual_mov_b32 v24, 1 global_store_b128 v[0:1], v[21:24], off offset:8 .LBB0_232: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[15:16] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v19, s6 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v20, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, v0 s_mov_b32 s19, s16 s_mov_b32 s17, s16 s_mov_b32 s18, s16 v_and_or_b32 v13, 0xffffff1f, v13, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo v_dual_mov_b32 v15, s15 :: v_dual_mov_b32 v22, s19 v_dual_mov_b32 v21, s18 :: v_dual_mov_b32 v20, s17 v_mov_b32_e32 v19, s16 s_clause 0x3 global_store_b128 v[0:1], v[13:16], off global_store_b128 v[0:1], v[19:22], off offset:16 global_store_b128 v[0:1], v[19:22], off offset:32 global_store_b128 v[0:1], v[19:22], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_240 ; %bb.233: v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v20, s5 v_mov_b32_e32 v19, s4 s_clause 0x1 global_load_b64 v[21:22], v7, s[2:3] offset:32 glc global_load_b64 v[3:4], v7, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v17, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v18, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[21:22], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v7, v[19:22], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[15:16], v[21:22] s_cbranch_execz .LBB0_236 ; %bb.234: ; %.preheader1.i.i.i42.preheader s_mov_b32 s10, 0 .LBB0_235: ; %.preheader1.i.i.i42 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v13, s4 :: v_dual_mov_b32 v14, s5 s_sleep 1 global_store_b64 v[3:4], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v7, v[13:16], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[15:16] v_dual_mov_b32 v16, v11 :: v_dual_mov_b32 v15, v10 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_235 .LBB0_236: ; %Flow547 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v8, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v7, s10, 0 global_load_b64 v[3:4], v8, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v7 s_cbranch_execz .LBB0_238 ; %bb.237: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v7, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[7:8], off offset:8 .LBB0_238: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_240 ; %bb.239: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_240: ; %Flow548 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v17, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v18, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_241: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v7, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_243 ; %bb.242: ; in Loop: Header=BB0_241 Depth=1 global_load_b32 v7, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v7, 1, v7 .LBB0_243: ; in Loop: Header=BB0_241 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v7 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_245 ; %bb.244: ; in Loop: Header=BB0_241 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_246 .LBB0_245: ; in Loop: Header=BB0_241 Depth=1 s_mov_b32 s1, -1 .LBB0_246: ; %Flow542 ; in Loop: Header=BB0_241 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_241 ; %bb.247: global_load_b64 v[10:11], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_251 ; %bb.248: v_mov_b32_e32 v3, 0 s_clause 0x2 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[7:8], v3, s[2:3] offset:24 glc global_load_b64 v[15:16], v3, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v4, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v17, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v13, vcc_lo, v4, s4 v_add_co_ci_u32_e32 v14, vcc_lo, s5, v17, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14] v_dual_cndmask_b32 v14, v14, v17 :: v_dual_cndmask_b32 v13, v13, v4 v_and_b32_e32 v1, v14, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v13, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v4, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v15, v0 v_mov_b32_e32 v15, v7 v_add_co_ci_u32_e32 v1, vcc_lo, v16, v1, vcc_lo v_mov_b32_e32 v16, v8 global_store_b64 v[0:1], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[15:16], v3, v[13:16], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[15:16], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_251 ; %bb.249: ; %.preheader.i.i.i41.preheader s_mov_b32 s0, 0 .LBB0_250: ; %.preheader.i.i.i41 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[15:16], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v3, v[13:16], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[15:16] v_dual_mov_b32 v16, v8 :: v_dual_mov_b32 v15, v7 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_250 .LBB0_251: ; %__ockl_printf_append_args.exit45 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v3, v44 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v3 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v3 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_257 ; %bb.252: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[15:16], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[7:8], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v16 v_and_b32_e32 v0, v0, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v13, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v13, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[13:14], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[13:16], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[15:16] s_cbranch_execz .LBB0_256 ; %bb.253: ; %.preheader3.i.i.i52.preheader s_mov_b32 s5, 0 .LBB0_254: ; %.preheader3.i.i.i52 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v4, s[2:3] offset:40 global_load_b64 v[13:14], v4, s[2:3] v_dual_mov_b32 v16, v1 :: v_dual_mov_b32 v15, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v15 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[13:14] v_and_b32_e32 v13, v8, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v13, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[13:14], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[13:16], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[15:16] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_254 ; %bb.255: ; %Flow535 s_or_b32 exec_lo, exec_lo, s5 .LBB0_256: ; %Flow537 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_257: ; %.loopexit4.i.i.i46 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v4, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[7:8], v4, s[2:3] offset:40 global_load_b128 v[14:17], v4, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v7 v_readfirstlane_b32 s7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_259 ; %bb.258: v_dual_mov_b32 v18, s10 :: v_dual_mov_b32 v19, v4 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v14, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v15, vcc_lo v_dual_mov_b32 v20, 2 :: v_dual_mov_b32 v21, 1 global_store_b128 v[0:1], v[18:21], off offset:8 .LBB0_259: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[3:4] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v16, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v17, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, v0 s_mov_b32 s15, s12 s_mov_b32 s13, s12 s_mov_b32 s14, s12 v_and_or_b32 v10, 0xffffff1f, v10, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo v_mov_b32_e32 v13, v4 v_dual_mov_b32 v19, s15 :: v_dual_mov_b32 v16, s12 v_dual_mov_b32 v18, s14 :: v_dual_mov_b32 v17, s13 s_clause 0x3 global_store_b128 v[0:1], v[10:13], off global_store_b128 v[0:1], v[16:19], off offset:16 global_store_b128 v[0:1], v[16:19], off offset:32 global_store_b128 v[0:1], v[16:19], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_267 ; %bb.260: v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v16, s4 v_mov_b32_e32 v17, s5 s_clause 0x1 global_load_b64 v[18:19], v7, s[2:3] offset:32 glc global_load_b64 v[3:4], v7, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v14, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v15, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v7, v[16:19], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[12:13], v[18:19] s_cbranch_execz .LBB0_263 ; %bb.261: ; %.preheader1.i.i.i50.preheader s_mov_b32 s10, 0 .LBB0_262: ; %.preheader1.i.i.i50 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v10, s4 :: v_dual_mov_b32 v11, s5 s_sleep 1 global_store_b64 v[3:4], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v7, v[10:13], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[12:13] v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_262 .LBB0_263: ; %Flow533 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v8, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v7, s10, 0 global_load_b64 v[3:4], v8, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v7 s_cbranch_execz .LBB0_265 ; %bb.264: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v7, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[7:8], off offset:8 .LBB0_265: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_267 ; %bb.266: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_267: ; %Flow534 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v14, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v15, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_268: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v7, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_270 ; %bb.269: ; in Loop: Header=BB0_268 Depth=1 global_load_b32 v7, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v7, 1, v7 .LBB0_270: ; in Loop: Header=BB0_268 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v7 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_272 ; %bb.271: ; in Loop: Header=BB0_268 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_273 .LBB0_272: ; in Loop: Header=BB0_268 Depth=1 s_mov_b32 s1, -1 .LBB0_273: ; %Flow528 ; in Loop: Header=BB0_268 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_268 ; %bb.274: global_load_b64 v[7:8], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_278 ; %bb.275: v_mov_b32_e32 v3, 0 s_clause 0x2 global_load_b64 v[0:1], v3, s[2:3] offset:40 global_load_b64 v[14:15], v3, s[2:3] offset:24 glc global_load_b64 v[12:13], v3, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v4, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v16, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v4, s4 v_add_co_ci_u32_e32 v11, vcc_lo, s5, v16, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] v_cndmask_b32_e32 v10, v10, v4, vcc_lo v_cndmask_b32_e32 v11, v11, v16, vcc_lo v_and_b32_e32 v0, v10, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mul_hi_u32 v4, v0, 24 v_mul_lo_u32 v0, v0, 24 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v12, v0 v_dual_mov_b32 v12, v14 :: v_dual_and_b32 v1, v11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v1, v1, 24 v_add_nc_u32_e32 v1, v4, v1 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v1, vcc_lo, v13, v1, vcc_lo v_mov_b32_e32 v13, v15 global_store_b64 v[0:1], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v3, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[12:13], v[14:15] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_278 ; %bb.276: ; %.preheader.i.i.i49.preheader s_mov_b32 s0, 0 .LBB0_277: ; %.preheader.i.i.i49 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[14:15], v3, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[14:15], v[12:13] v_dual_mov_b32 v12, v14 :: v_dual_mov_b32 v13, v15 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_277 .LBB0_278: ; %__ockl_printf_append_args.exit53 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v3, v44 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v3 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v3 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_284 ; %bb.279: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[12:13], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[10:11], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v13 v_and_b32_e32 v0, v0, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v14, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v14, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v10, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo global_load_b64 v[10:11], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[12:13] s_cbranch_execz .LBB0_283 ; %bb.280: ; %.preheader3.i.i.i60.preheader s_mov_b32 s5, 0 .LBB0_281: ; %.preheader3.i.i.i60 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[10:11], v4, s[2:3] offset:40 global_load_b64 v[14:15], v4, s[2:3] v_dual_mov_b32 v13, v1 :: v_dual_mov_b32 v12, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v10, v10, v12 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v10, 24, v[14:15] v_and_b32_e32 v14, v11, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[10:11], null, v14, 24, v[1:2] v_mov_b32_e32 v1, v10 global_load_b64 v[10:11], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[12:13] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_281 ; %bb.282: ; %Flow521 s_or_b32 exec_lo, exec_lo, s5 .LBB0_283: ; %Flow523 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_284: ; %.loopexit4.i.i.i54 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v4, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[15:16], v4, s[2:3] offset:40 global_load_b128 v[11:14], v4, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v15 v_readfirstlane_b32 s7, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_286 ; %bb.285: v_dual_mov_b32 v15, s10 :: v_dual_mov_b32 v16, v4 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v11, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v12, vcc_lo v_dual_mov_b32 v17, 2 :: v_dual_mov_b32 v18, 1 global_store_b128 v[0:1], v[15:18], off offset:8 .LBB0_286: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[3:4] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v13, s6 v_add_co_ci_u32_e32 v10, vcc_lo, s7, v14, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, v0 s_mov_b32 s15, s12 s_mov_b32 s13, s12 s_mov_b32 s14, s12 v_and_or_b32 v7, 0xffffff1f, v7, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v10, v1, vcc_lo v_mov_b32_e32 v10, v4 v_dual_mov_b32 v16, s15 :: v_dual_mov_b32 v13, s12 v_dual_mov_b32 v15, s14 :: v_dual_mov_b32 v14, s13 s_clause 0x3 global_store_b128 v[0:1], v[7:10], off global_store_b128 v[0:1], v[13:16], off offset:16 global_store_b128 v[0:1], v[13:16], off offset:32 global_store_b128 v[0:1], v[13:16], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_294 ; %bb.287: v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v14, s4 v_mov_b32_e32 v15, s5 s_clause 0x1 global_load_b64 v[16:17], v13, s[2:3] offset:32 glc global_load_b64 v[3:4], v13, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v3, vcc_lo, v11, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v12, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[3:4], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v13, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[9:10], v[16:17] s_cbranch_execz .LBB0_290 ; %bb.288: ; %.preheader1.i.i.i58.preheader s_mov_b32 s10, 0 .LBB0_289: ; %.preheader1.i.i.i58 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v7, s4 :: v_dual_mov_b32 v8, s5 s_sleep 1 global_store_b64 v[3:4], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v13, v[7:10], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10] v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_289 .LBB0_290: ; %Flow519 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v8, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v7, s10, 0 global_load_b64 v[3:4], v8, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v7 s_cbranch_execz .LBB0_292 ; %bb.291: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v7, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[7:8], off offset:8 .LBB0_292: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[7:8], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] s_cbranch_vccnz .LBB0_294 ; %bb.293: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[7:8], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_294: ; %Flow520 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v11, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v12, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_295: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v7, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_297 ; %bb.296: ; in Loop: Header=BB0_295 Depth=1 global_load_b32 v7, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v7, 1, v7 .LBB0_297: ; in Loop: Header=BB0_295 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v7 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_299 ; %bb.298: ; in Loop: Header=BB0_295 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_300 .LBB0_299: ; in Loop: Header=BB0_295 Depth=1 s_mov_b32 s1, -1 .LBB0_300: ; %Flow514 ; in Loop: Header=BB0_295 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_295 ; %bb.301: global_load_b64 v[3:4], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_305 ; %bb.302: v_mov_b32_e32 v11, 0 s_clause 0x2 global_load_b64 v[0:1], v11, s[2:3] offset:40 global_load_b64 v[12:13], v11, s[2:3] offset:24 glc global_load_b64 v[9:10], v11, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, v14, s4 v_add_co_ci_u32_e32 v8, vcc_lo, s5, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[7:8] v_dual_cndmask_b32 v8, v8, v15 :: v_dual_cndmask_b32 v7, v7, v14 v_and_b32_e32 v1, v8, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v7, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v14, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v14, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v9, v0 v_mov_b32_e32 v9, v12 v_add_co_ci_u32_e32 v1, vcc_lo, v10, v1, vcc_lo v_mov_b32_e32 v10, v13 global_store_b64 v[0:1], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v11, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[9:10], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_305 ; %bb.303: ; %.preheader.i.i.i57.preheader s_mov_b32 s0, 0 .LBB0_304: ; %.preheader.i.i.i57 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v11, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[9:10] v_dual_mov_b32 v9, v12 :: v_dual_mov_b32 v10, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_304 .LBB0_305: ; %__ockl_printf_append_args.exit61 s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v0, v44 :: v_dual_mov_b32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v0 v_mov_b32_e32 v12, 0 v_cmp_eq_u32_e64 s0, s0, v0 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_311 ; %bb.306: v_mov_b32_e32 v1, 0 s_mov_b32 s4, exec_lo global_load_b64 v[9:10], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[7:8], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v8, v8, v10 v_and_b32_e32 v7, v7, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v8, v8, 24 v_mul_hi_u32 v13, v7, 24 v_mul_lo_u32 v7, v7, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v8, v13, v8 s_waitcnt vmcnt(0) v_add_co_u32 v7, vcc_lo, v11, v7 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, v12, v8, vcc_lo global_load_b64 v[7:8], v[7:8], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[11:12], v[9:10] s_cbranch_execz .LBB0_310 ; %bb.307: ; %.preheader3.i.i.i68.preheader s_mov_b32 s5, 0 .LBB0_308: ; %.preheader3.i.i.i68 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v1, s[2:3] offset:40 global_load_b64 v[13:14], v1, s[2:3] v_dual_mov_b32 v9, v11 :: v_dual_mov_b32 v10, v12 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v7, v7, v9 v_and_b32_e32 v8, v8, v10 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[11:12], null, v7, 24, v[13:14] v_mov_b32_e32 v7, v12 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[12:13], null, v8, 24, v[7:8] global_load_b64 v[7:8], v[11:12], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[11:12], v1, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[9:10] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_308 ; %bb.309: ; %Flow507 s_or_b32 exec_lo, exec_lo, s5 .LBB0_310: ; %Flow509 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_311: ; %.loopexit4.i.i.i62 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v1, 0 v_readfirstlane_b32 s4, v11 v_readfirstlane_b32 s5, v12 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[13:14], v1, s[2:3] offset:40 global_load_b128 v[7:10], v1, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v13 v_readfirstlane_b32 s7, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_313 ; %bb.312: v_dual_mov_b32 v11, s10 :: v_dual_mov_b32 v12, v1 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v15, vcc_lo, v7, s9 v_add_co_ci_u32_e32 v16, vcc_lo, s10, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[15:16], v[11:14], off offset:8 .LBB0_313: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[0:1] s_waitcnt vmcnt(0) v_add_co_u32 v9, vcc_lo, v9, s6 v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v10, v1, vcc_lo v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13 v_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_321 ; %bb.314: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s4 v_mov_b32_e32 v13, s5 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v3 v_readfirstlane_b32 s11, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v9, vcc_lo, v7, s10 v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_317 ; %bb.315: ; %.preheader1.i.i.i66.preheader s_mov_b32 s10, 0 .LBB0_316: ; %.preheader1.i.i.i66 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s4 :: v_dual_mov_b32 v4, s5 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_316 .LBB0_317: ; %Flow505 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v6, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v5, s10, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_319 ; %bb.318: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_319: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_321 ; %bb.320: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_321: ; %Flow506 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v3, vcc_lo, v7, s9 v_add_co_ci_u32_e32 v4, vcc_lo, s8, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_322: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_324 ; %bb.323: ; in Loop: Header=BB0_322 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_324: ; in Loop: Header=BB0_322 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_326 ; %bb.325: ; in Loop: Header=BB0_322 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_327 .LBB0_326: ; in Loop: Header=BB0_322 Depth=1 s_mov_b32 s1, -1 .LBB0_327: ; %Flow500 ; in Loop: Header=BB0_322 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_322 ; %bb.328: global_load_b64 v[0:1], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_332 ; %bb.329: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[5:6], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v5, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v12, s4 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_and_b32_e32 v6, v4, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v3, v5 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v5, 24 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, v7, v5 v_mov_b32_e32 v5, v10 v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo v_mov_b32_e32 v6, v11 global_store_b64 v[7:8], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_332 ; %bb.330: ; %.preheader.i.i.i65.preheader s_mov_b32 s0, 0 .LBB0_331: ; %.preheader.i.i.i65 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6] v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_331 .LBB0_332: ; %__ockl_printf_append_args.exit69 s_or_b32 exec_lo, exec_lo, s1 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v44 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v44 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_338 ; %bb.333: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_337 ; %bb.334: ; %.preheader3.i.i.i76.preheader s_mov_b32 s5, 0 .LBB0_335: ; %.preheader3.i.i.i76 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_335 ; %bb.336: ; %Flow493 s_or_b32 exec_lo, exec_lo, s5 .LBB0_337: ; %Flow495 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_338: ; %.loopexit4.i.i.i70 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v45, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v45, s[2:3] offset:40 global_load_b128 v[4:7], v45, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_340 ; %bb.339: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v45 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_340: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[44:45] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v3, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1d, v0, 34 v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo v_dual_mov_b32 v3, v45 :: v_dual_mov_b32 v6, s12 v_dual_mov_b32 v7, s13 :: v_dual_mov_b32 v8, s14 v_mov_b32_e32 v9, s15 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_348 ; %bb.341: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v6, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_344 ; %bb.342: ; %.preheader1.i.i.i74.preheader s_mov_b32 s10, 0 .LBB0_343: ; %.preheader1.i.i.i74 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_343 .LBB0_344: ; %Flow491 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_346 ; %bb.345: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_346: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_348 ; %bb.347: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_348: ; %Flow492 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_349: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_351 ; %bb.350: ; in Loop: Header=BB0_349 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_351: ; in Loop: Header=BB0_349 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_353 ; %bb.352: ; in Loop: Header=BB0_349 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_354 .LBB0_353: ; in Loop: Header=BB0_349 Depth=1 s_mov_b32 s1, -1 .LBB0_354: ; %Flow486 ; in Loop: Header=BB0_349 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_349 ; %bb.355: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_359 ; %bb.356: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_359 ; %bb.357: ; %.preheader.i.i.i73.preheader s_mov_b32 s0, 0 .LBB0_358: ; %.preheader.i.i.i73 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_358 .LBB0_359: ; %__ockl_printf_append_args.exit77 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z16printThreadIndexPiii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 46 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z16printThreadIndexPiii, .Lfunc_end0-_Z16printThreadIndexPiii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 16288 ; NumSgprs: 22 ; NumVgprs: 46 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 5 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 46 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "thread_id:(%d,%d),block_id:(%d,%d), coordinate(%d,%d) global index %2d ival %2d\n" .size .str, 81 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 12 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims - .offset: 96 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z16printThreadIndexPiii .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z16printThreadIndexPiii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 46 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
fb29adb66578c2c094799237e692d6eaa25d83cf
#include <cuda.h> /* Size of a block */ #define BLOCK_X 32 #define BLOCK_Y 16 __global__ void kernadd (float* mout, float* min1, float *min2, int nx, int ny, size_t pitch) { int i, j, index; /* UP TO YOU edit line below so that the index is correctly evaluated */ i = blockDim.x * blockIdx.x +threadIdx.x; j = blockDim.y * blockIdx.y +threadIdx.y; index= i + j * pitch/sizeof(float); if ((i < nx) && (j < ny)) mout[index] = min1[index] + min2[index]; } /* extern "C" below is because this file follows C++ linking conventions */ /* whereas the companion C file (addition.c) follows C linking conventions */ /* which are different */ extern "C" void AddOnGpu(float* mat_out, float *mat_in1, float *mat_in2,\ int nx, int ny) { size_t pitch; /* Same pitch for all matrices, since they all have same size */ /* Matrix allocation on device */ float *mat_out_gpu, *mat_in1_gpu, *mat_in2_gpu; /* UP TO YOU : do the allocation below, using cudaMallocPitch ()*/ cudaMallocPitch(&mat_out_gpu, &pitch, sizeof(float)*nx, ny); cudaMallocPitch(&mat_in1_gpu, &pitch, sizeof(float)*nx, ny); cudaMallocPitch(&mat_in2_gpu, &pitch, sizeof(float)*nx, ny); /* The arguments mat_in1 and mat_in2 passed above are on the host. */ /* UP TO YOU : write below the instructions to copy it to the device */ /* You'll need to google the function cudaMemcpy2D () */ cudaMemcpy2D(mat_in1_gpu, pitch, mat_in1, nx*sizeof(float), nx*sizeof(float), ny, cudaMemcpyHostToDevice); cudaMemcpy2D(mat_in2_gpu, pitch, mat_in2, nx*sizeof(float), nx*sizeof(float), ny, cudaMemcpyHostToDevice); /* Grid topology below */ /* A block is BLOCK_X threads wide by BLOCK_Y threads high */ dim3 block (BLOCK_X, BLOCK_Y); /* UP TO YOU : complete the number of blocks below */ int n1 = (nx+BLOCK_X-1/BLOCK_X); int n2 = (nx+BLOCK_Y-1/BLOCK_Y); dim3 grid (n1,n2); /* UP TO YOU : kernel invocation */ kernadd <<< grid, block >>> (mat_out_gpu,mat_in1_gpu, mat_in2_gpu, nx, ny, pitch); cudaThreadSynchronize(); /* We now transfer back the matrix from the device to the host */ /* UP TO YOU : write cudaMemcpy2D () instruction below */ cudaMemcpy2D(mat_out, nx * sizeof(float), mat_out_gpu, pitch, nx * sizeof(float),ny,cudaMemcpyDeviceToHost); /* free memory */ cudaFree(mat_out_gpu); cudaFree(mat_in1_gpu); cudaFree(mat_in2_gpu); }
.file "tmpxft_002a471b_00000000-6_addongpu.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2011: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2011: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z33__device_stub__Z7kernaddPfS_S_iimPfS_S_iim .type _Z33__device_stub__Z7kernaddPfS_S_iimPfS_S_iim, @function _Z33__device_stub__Z7kernaddPfS_S_iimPfS_S_iim: .LFB2033: .cfi_startproc endbr64 subq $184, %rsp .cfi_def_cfa_offset 192 movq %rdi, 40(%rsp) leaq 72(%rsp), %rdi movq %rsi, 32(%rsp) leaq 84(%rsp), %rsi movq %rdx, 24(%rsp) leaq 56(%rsp), %rdx movl %ecx, 20(%rsp) leaq 64(%rsp), %rcx movl %r8d, 16(%rsp) movq %r9, 8(%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 80(%rsp) movq %rax, 120(%rsp) leaq 32(%rsp), %rax movq %rax, 128(%rsp) leaq 24(%rsp), %rax movq %rax, 136(%rsp) leaq 20(%rsp), %rax movq %rax, 144(%rsp) leaq 16(%rsp), %rax movq %rax, 152(%rsp) leaq 8(%rsp), %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 64(%rsp) .cfi_def_cfa_offset 200 leaq _Z7kernaddPfS_S_iim(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 208 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 136(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L2: movq 168(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2033: .size _Z33__device_stub__Z7kernaddPfS_S_iimPfS_S_iim, .-_Z33__device_stub__Z7kernaddPfS_S_iimPfS_S_iim .globl _Z7kernaddPfS_S_iim .type _Z7kernaddPfS_S_iim, @function _Z7kernaddPfS_S_iim: .LFB2034: .cfi_startproc endbr64 jmp _Z33__device_stub__Z7kernaddPfS_S_iimPfS_S_iim .cfi_endproc .LFE2034: .size _Z7kernaddPfS_S_iim, .-_Z7kernaddPfS_S_iim .globl AddOnGpu .type AddOnGpu, @function AddOnGpu: .LFB2008: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movq %rsi, %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rdx, %r13 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movl %ecx, %ebp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movslq %r8d, %rbx subq $88, %rsp .cfi_def_cfa_offset 144 movq %rdi, 8(%rsp) leaq 16(%rsp), %r15 leaq 24(%rsp), %rdi movq %r15, %rsi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax movslq %ecx, %rax movq %rbx, %rcx salq $2, %rax movq %rax, %rdx movq %rax, (%rsp) call cudaMallocPitch@PLT movq (%rsp), %rdx movq %rbx, %rcx movq %r15, %rsi leaq 32(%rsp), %rdi call cudaMallocPitch@PLT movq (%rsp), %rdx movq %r15, %rsi movq %rbx, %rcx leaq 40(%rsp), %rdi call cudaMallocPitch@PLT movq %rbx, %r9 movq %r14, %rdx pushq %rsi .cfi_def_cfa_offset 152 pushq $1 .cfi_def_cfa_offset 160 movq 16(%rsp), %r8 movq 32(%rsp), %rsi movq 48(%rsp), %rdi movq %r8, %rcx call cudaMemcpy2D@PLT movq 16(%rsp), %r8 movq %rbx, %r9 movq %r13, %rdx movq 32(%rsp), %rsi movq 56(%rsp), %rdi movl $1, (%rsp) movq %r8, %rcx call cudaMemcpy2D@PLT leal 32(%rbp), %eax movl $2147483649, %edx xorl %r9d, %r9d movl %eax, 76(%rsp) leal 16(%rbp), %eax salq $5, %rdx movl $1, %ecx movl %eax, 80(%rsp) popq %rdi .cfi_def_cfa_offset 152 movl $1, %esi popq %r8 .cfi_def_cfa_offset 144 movq 60(%rsp), %rdi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 movq 16(%rsp), %r9 movq 40(%rsp), %rdx movl %ebx, %r8d movl %ebp, %ecx movq 32(%rsp), %rsi movq 24(%rsp), %rdi call _Z33__device_stub__Z7kernaddPfS_S_iimPfS_S_iim .L9: call cudaThreadSynchronize@PLT movq %rbx, %r9 pushq %rax .cfi_def_cfa_offset 152 pushq $2 .cfi_def_cfa_offset 160 movq 16(%rsp), %r8 movq 24(%rsp), %rdi movq 32(%rsp), %rcx movq 40(%rsp), %rdx movq %r8, %rsi call cudaMemcpy2D@PLT popq %rdx .cfi_def_cfa_offset 152 popq %rcx .cfi_def_cfa_offset 144 movq 24(%rsp), %rdi call cudaFree@PLT movq 32(%rsp), %rdi call cudaFree@PLT movq 40(%rsp), %rdi call cudaFree@PLT movq 72(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $88, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2008: .size AddOnGpu, .-AddOnGpu .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z7kernaddPfS_S_iim" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2036: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z7kernaddPfS_S_iim(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2036: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7kernaddPfS_S_iim .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e280000002600 */ /*0020*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002200 */ /*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e680000002500 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e620000002100 */ /*0050*/ IMAD R2, R2, c[0x0][0x4], R5 ; /* 0x0000010002027a24 */ /* 0x001fca00078e0205 */ /*0060*/ SHF.R.S32.HI R4, RZ, 0x1f, R2 ; /* 0x0000001fff047819 */ /* 0x000fe40000011402 */ /*0070*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x17c], PT ; /* 0x00005f0002007a0c */ /* 0x000fe20003f06270 */ /*0080*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x002fe400078e0203 */ /*0090*/ IMAD R5, R4, c[0x0][0x180], RZ ; /* 0x0000600004057a24 */ /* 0x000fc600078e02ff */ /*00a0*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */ /* 0x000fe20000706670 */ /*00b0*/ IMAD R5, R2.reuse, c[0x0][0x184], R5 ; /* 0x0000610002057a24 */ /* 0x040fe400078e0205 */ /*00c0*/ IMAD.WIDE.U32 R2, R2, c[0x0][0x180], RZ ; /* 0x0000600002027a25 */ /* 0x000fca00078e00ff */ /*00d0*/ IADD3 R3, R3, R5, RZ ; /* 0x0000000503037210 */ /* 0x000fc80007ffe0ff */ /*00e0*/ SHF.R.U64 R3, R2, 0x2, R3 ; /* 0x0000000202037819 */ /* 0x000fe20000001203 */ /*00f0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fec0003800000 */ /*0100*/ IADD3 R0, R0, R3, RZ ; /* 0x0000000300007210 */ /* 0x000fe20007ffe0ff */ /*0110*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0120*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fca0000000f00 */ /*0130*/ IMAD.WIDE R4, R0, R7, c[0x0][0x170] ; /* 0x00005c0000047625 */ /* 0x000fc800078e0207 */ /*0140*/ IMAD.WIDE R2, R0.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0000027625 */ /* 0x0c0fe400078e0207 */ /*0150*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*0160*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*0170*/ IMAD.WIDE R6, R0, R7, c[0x0][0x160] ; /* 0x0000580000067625 */ /* 0x000fe200078e0207 */ /*0180*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */ /* 0x004fca0000000000 */ /*0190*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*01a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01b0*/ BRA 0x1b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> /* Size of a block */ #define BLOCK_X 32 #define BLOCK_Y 16 __global__ void kernadd (float* mout, float* min1, float *min2, int nx, int ny, size_t pitch) { int i, j, index; /* UP TO YOU edit line below so that the index is correctly evaluated */ i = blockDim.x * blockIdx.x +threadIdx.x; j = blockDim.y * blockIdx.y +threadIdx.y; index= i + j * pitch/sizeof(float); if ((i < nx) && (j < ny)) mout[index] = min1[index] + min2[index]; } /* extern "C" below is because this file follows C++ linking conventions */ /* whereas the companion C file (addition.c) follows C linking conventions */ /* which are different */ extern "C" void AddOnGpu(float* mat_out, float *mat_in1, float *mat_in2,\ int nx, int ny) { size_t pitch; /* Same pitch for all matrices, since they all have same size */ /* Matrix allocation on device */ float *mat_out_gpu, *mat_in1_gpu, *mat_in2_gpu; /* UP TO YOU : do the allocation below, using cudaMallocPitch ()*/ hipMallocPitch(&mat_out_gpu, &pitch, sizeof(float)*nx, ny); hipMallocPitch(&mat_in1_gpu, &pitch, sizeof(float)*nx, ny); hipMallocPitch(&mat_in2_gpu, &pitch, sizeof(float)*nx, ny); /* The arguments mat_in1 and mat_in2 passed above are on the host. */ /* UP TO YOU : write below the instructions to copy it to the device */ /* You'll need to google the function cudaMemcpy2D () */ hipMemcpy2D(mat_in1_gpu, pitch, mat_in1, nx*sizeof(float), nx*sizeof(float), ny, hipMemcpyHostToDevice); hipMemcpy2D(mat_in2_gpu, pitch, mat_in2, nx*sizeof(float), nx*sizeof(float), ny, hipMemcpyHostToDevice); /* Grid topology below */ /* A block is BLOCK_X threads wide by BLOCK_Y threads high */ dim3 block (BLOCK_X, BLOCK_Y); /* UP TO YOU : complete the number of blocks below */ int n1 = (nx+BLOCK_X-1/BLOCK_X); int n2 = (nx+BLOCK_Y-1/BLOCK_Y); dim3 grid (n1,n2); /* UP TO YOU : kernel invocation */ kernadd <<< grid, block >>> (mat_out_gpu,mat_in1_gpu, mat_in2_gpu, nx, ny, pitch); hipDeviceSynchronize(); /* We now transfer back the matrix from the device to the host */ /* UP TO YOU : write cudaMemcpy2D () instruction below */ hipMemcpy2D(mat_out, nx * sizeof(float), mat_out_gpu, pitch, nx * sizeof(float),ny,hipMemcpyDeviceToHost); /* free memory */ hipFree(mat_out_gpu); hipFree(mat_in1_gpu); hipFree(mat_in2_gpu); }
.text .file "addongpu.hip" .globl _Z22__device_stub__kernaddPfS_S_iim # -- Begin function _Z22__device_stub__kernaddPfS_S_iim .type _Z22__device_stub__kernaddPfS_S_iim,@function _Z22__device_stub__kernaddPfS_S_iim: # @_Z22__device_stub__kernaddPfS_S_iim .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $144, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 12(%rsp), %rdx movl %ecx, (%rdx) leaq 8(%rsp), %rcx movl %r8d, (%rcx) leaq 32(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7kernaddPfS_S_iim, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $160, %rsp .cfi_adjust_cfa_offset -160 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z22__device_stub__kernaddPfS_S_iim, .Lfunc_end0-_Z22__device_stub__kernaddPfS_S_iim .cfi_endproc # -- End function .globl AddOnGpu # -- Begin function AddOnGpu .type AddOnGpu,@function AddOnGpu: # @AddOnGpu .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $72, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rdx, 56(%rsp) # 8-byte Spill movq %rsi, 48(%rsp) # 8-byte Spill movq %rdi, 64(%rsp) # 8-byte Spill movl %ecx, 16(%rsp) # 4-byte Spill movslq %ecx, %r13 leaq (,%r13,4), %rbx movl %r8d, 20(%rsp) # 4-byte Spill movslq %r8d, %r14 leaq 8(%rsp), %rdi leaq 40(%rsp), %r12 movq %r12, %rsi movq %rbx, %rdx movq %r14, %rcx callq hipMallocPitch leaq 32(%rsp), %r15 movq %r15, %rdi movq %r12, %rsi movq %rbx, %rdx movq %r14, %rcx callq hipMallocPitch leaq 24(%rsp), %rbp movq %rbp, %rdi movq %r12, %rsi movq %rbx, %rdx movq %r14, %rcx callq hipMallocPitch movq (%r15), %rdi movq (%r12), %rsi movl $1, %r15d movl %r15d, (%rsp) movq 48(%rsp), %rdx # 8-byte Reload movq %rbx, %rcx movq %rbx, %r8 movq %r14, %r9 callq hipMemcpy2D movq (%rbp), %rdi movq (%r12), %rsi movl %r15d, (%rsp) movq 56(%rsp), %rdx # 8-byte Reload movq %rbx, %rcx movq %rbx, %r8 movq %r14, %r9 callq hipMemcpy2D leal 32(%r13), %eax addl $16, %r13d shlq $32, %r13 orq %rax, %r13 movabsq $68719476768, %rdx # imm = 0x1000000020 movq %r13, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movq 8(%rsp), %rdi movq 32(%rsp), %rsi movq 24(%rsp), %rdx movq 40(%rsp), %r9 movl 16(%rsp), %ecx # 4-byte Reload movl 20(%rsp), %r8d # 4-byte Reload callq _Z22__device_stub__kernaddPfS_S_iim .LBB1_2: callq hipDeviceSynchronize movq 8(%rsp), %rdx movq 40(%rsp), %rcx movl $2, (%rsp) movq 64(%rsp), %rdi # 8-byte Reload movq %rbx, %rsi movq %rbx, %r8 movq %r14, %r9 callq hipMemcpy2D movq 8(%rsp), %rdi callq hipFree movq 32(%rsp), %rdi callq hipFree movq 24(%rsp), %rdi callq hipFree addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size AddOnGpu, .Lfunc_end1-AddOnGpu .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7kernaddPfS_S_iim, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z7kernaddPfS_S_iim,@object # @_Z7kernaddPfS_S_iim .section .rodata,"a",@progbits .globl _Z7kernaddPfS_S_iim .p2align 3, 0x0 _Z7kernaddPfS_S_iim: .quad _Z22__device_stub__kernaddPfS_S_iim .size _Z7kernaddPfS_S_iim, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z7kernaddPfS_S_iim" .size .L__unnamed_1, 20 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__kernaddPfS_S_iim .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7kernaddPfS_S_iim .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7kernaddPfS_S_iim ; -- Begin function _Z7kernaddPfS_S_iim .globl _Z7kernaddPfS_S_iim .p2align 8 .type _Z7kernaddPfS_S_iim,@function _Z7kernaddPfS_S_iim: ; @_Z7kernaddPfS_S_iim ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x34 s_load_b64 s[2:3], s[0:1], 0x18 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s5, s4, 16 s_and_b32 s4, s4, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, s2, v0 v_cmp_gt_i32_e64 s2, s3, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b64 s[2:3], s[0:1], 0x20 v_ashrrev_i32_e32 v2, 31, v1 s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 s_waitcnt lgkmcnt(0) v_mul_lo_u32 v4, v1, s3 v_mul_lo_u32 v5, v2, s2 v_mad_u64_u32 v[2:3], null, v1, s2, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v1, v3, v4, v5 v_alignbit_b32 v1, v1, v2, 2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v0, v0, v1 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v2, vcc_lo, s6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_u32 v0, vcc_lo, s4, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7kernaddPfS_S_iim .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 296 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7kernaddPfS_S_iim, .Lfunc_end0-_Z7kernaddPfS_S_iim ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 292 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 8 .value_kind: by_value - .offset: 40 .size: 4 .value_kind: hidden_block_count_x - .offset: 44 .size: 4 .value_kind: hidden_block_count_y - .offset: 48 .size: 4 .value_kind: hidden_block_count_z - .offset: 52 .size: 2 .value_kind: hidden_group_size_x - .offset: 54 .size: 2 .value_kind: hidden_group_size_y - .offset: 56 .size: 2 .value_kind: hidden_group_size_z - .offset: 58 .size: 2 .value_kind: hidden_remainder_x - .offset: 60 .size: 2 .value_kind: hidden_remainder_y - .offset: 62 .size: 2 .value_kind: hidden_remainder_z - .offset: 80 .size: 8 .value_kind: hidden_global_offset_x - .offset: 88 .size: 8 .value_kind: hidden_global_offset_y - .offset: 96 .size: 8 .value_kind: hidden_global_offset_z - .offset: 104 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 296 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7kernaddPfS_S_iim .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z7kernaddPfS_S_iim.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
9215a4bd8cfe5f62d7f92eb179f815f10d2e219e
//2 layered neural network with LIF neurons //computing Vm in parallel, Computing Isyn //all-all connectivity between 2 layers //starting point of reading mnist set by 'start' #include<stdio.h> #include<math.h> #include<time.h> #include<stdlib.h> #include "device_launch_parameters.h" #include "cuda_runtime_api.h" #define C 300E-12 #define gL 30E-9 #define VT 20E-3 #define EL -70E-3 #define Rp 3E-3 #define dt 1E-4 #define decay 0.9802 #define decays 0.9231 #define decay1 0.9048 #define WT 5E-9 #define w_lat -1.0E-9 //inhibitory lateral strength //num of neurons in layer 1 and layer 2 #define p 28 #define q 28 #define N_imgs 50000 #define N2 10 //no. of neurons in 2nd layer //Convolution parameters #define Nw 3 #define L (p-Nw+1) //square matrix #define N1 (12*L*L) //no. of neurons in 1st layer #define Nthrds 1024 //use max no. of threads available per SM #define Nsyns N1*N2 //no. of connections #define T 0.1 #define M 1000 //Training parameters: #define r 20.0E-11 //Learning Rate for 100ms #define max_epochs 20 //1 complete presentation of all images //Variables for image reading unsigned char *pix_spks_d; int *d_imgs_lin, img_lin[N_imgs*(p*q+1)]; int test_set[N_imgs][p*q+1]; __device__ int d_imgs[N_imgs][p*q+1]; __device__ double img_spks[p*q][M]; __device__ double syn1[256], syn1s[256], syn[256][M]; __device__ unsigned char in_spk[N1]; __device__ double Isyn[N1][N2], weight[N1][N2]; __device__ double Isyn_tot[N2], Isyn_lat[N2]; __device__ double I_lat[N2]; //weight update variables: __device__ unsigned char D_op[N2][M]; __device__ signed char err[N2]; __device__ unsigned char Y_op[N2]; __device__ double del_w[N1][N2]; __device__ double ci[N1], d_hat[N1]; __device__ double cis[N1], norm_dh; __device__ double cil[N2], cils[N2]; __device__ double d_hat_sq[N1]; //Neuron variables: __device__ int ref_time1[N1],ref_time2[N2]; __device__ double Vm1[N1],Vm2[N2]; ////////////CUDA Kernels/////////// __global__ void img_readKernel(int *img) { for(int i=0; i<N_imgs; i++){ for(int j=0; j<(p*q+1); j++){ d_imgs[i][j]=img[i*(p*q+1)+j]; } } } __device__ unsigned char pix_spks[256][M]; unsigned char pix_spks_h[256*M]; //uniformly spaced spikes __global__ void convert2Spks(unsigned char *pix_spks_d) { for(int i=0; i<256; i++) { syn1[i]=0.0; syn1s[i]=0.0; for(int l=0; l<M; l++) { pix_spks[i][l]=pix_spks_d[i*M+l]; } } //Compute the synaptic kernels: for(int i=0; i<256; i++) { for(int l=0; l<M; l++) { syn1[i]*=decay; syn1s[i]*=decays; if(pix_spks[i][l]==1) { syn1[i]+=1.0; syn1s[i]+=1.0; } syn[i][l]=syn1[i]-syn1s[i]; } } } unsigned char pixspks[256*M]; __global__ void pix2spks(int k, int i) { int tx=threadIdx.x+blockIdx.x*blockDim.x; if(tx<(p*q)) { img_spks[tx][i]=syn[d_imgs[k][tx+1]][i]; __syncthreads(); } } __global__ void createDes(int k) { int tx=threadIdx.x+blockIdx.x*blockDim.x; if(tx<N2) { for(int i=0; i<M;i++) { D_op[tx][i]=0; } if(tx==d_imgs[k][0]) { for(int i=100; i<M; i+=35) D_op[tx][i]=1; } } } /*__global__ void pix2spks(int k) { //Load the spikes trains for the corresponding pixels: for(int i=1; i<(p*q+1); i++) { for(int l=0; l<M; l++) { img_spks[i-1][l]=syn[d_imgs[k][i]][l]; } } //Create the desired spike trains: for(int j=0; j<N2; j++) { for(int i=0; i<M; i++) { D_op[j][i]=0; } if(j==d_imgs[k][0]) { //for(int i=100; i<M; i+=50) for(int i=100; i<M; i+=35) D_op[j][i]=1; } } }*/ __device__ double I_in[N1]; __global__ void clear_vars() { int tx=threadIdx.x+blockIdx.x*blockDim.x; int ty=threadIdx.y+blockIdx.y*blockDim.y; if(tx<N1 && ty<N2) { Vm2[ty]=EL; Isyn_tot[ty]=0.0; ref_time2[ty]=0.0; Vm1[tx]=EL; ref_time1[tx]=0.0; I_in[tx]=0.0; del_w[tx][ty]=0.0; Isyn[tx][ty]=0.0; ci[tx]=0.0; cis[tx]=0.0; d_hat[tx]=0.0; cil[ty]=0.0; cils[ty]=0.0; Isyn_lat[ty]=0.0; } } __global__ void LifKernel1(int i) { int j = blockIdx.x * blockDim.x + threadIdx.x; double k1, k2; if(j<N1) { if(ref_time1[j]<i) ref_time1[j]=0; k1=(-gL*(Vm1[j]-EL)+I_in[j])/C; k2=(-gL*((Vm1[j]+dt*k1)-EL)+I_in[j])/C; Vm1[j]+=(dt*(k1+k2)/2)*(ref_time1[j]==0); if(Vm1[j]<EL) Vm1[j]=EL; if(Vm1[j]>=VT) { Vm1[j]=EL; ref_time1[j]=i+round(Rp/dt); in_spk[j]=1; } else { in_spk[j]=0; } __syncthreads(); } } __global__ void LifKernel2(int i) { int j = blockIdx.x * blockDim.x + threadIdx.x; double k1, k2; if(j<N2) { if(ref_time2[j]<i) ref_time2[j]=0; k1=(-gL*(Vm2[j]-EL)+Isyn_tot[j]+Isyn_lat[j])/C; k2=(-gL*((Vm2[j]+dt*k1)-EL)+Isyn_tot[j]+Isyn_lat[j])/C; Vm2[j]+=(dt*(k1+k2)/2)*(ref_time2[j]==0); if(Vm2[j]<EL) Vm2[j]=EL; if(Vm2[j]>=VT) { Vm2[j]=EL; ref_time2[j]=i+round(Rp/dt); Y_op[j]=1; } else { Y_op[j]=0; } //compute the error: err[j]=D_op[j][i]-Y_op[j]; __syncthreads(); } } //kernels for the total synapses in the network __global__ void SynKernel(int i) { int ix=blockIdx.x*blockDim.x + threadIdx.x; int iy=blockIdx.y*blockDim.y + threadIdx.y; if(ix<N1 && iy<N2) { if(iy==0) { ci[ix]=ci[ix]*decay; cis[ix]=cis[ix]*decays; if(in_spk[ix]==1) { ci[ix]+=1.0; cis[ix]+=1.0; } d_hat[ix]=d_hat[ix]*decay1 + ((ci[ix]-cis[ix])*dt)/C; d_hat_sq[ix]=d_hat[ix]*d_hat[ix]; } __syncthreads(); Isyn[ix][iy]=(ci[ix]-cis[ix])*weight[ix][iy]; } } __global__ void Lat_curr(int i) { int ix=blockIdx.x*blockDim.x+threadIdx.x; if(ix<N2) { cil[ix]=cil[ix]*decay; cils[ix]=cils[ix]*decays; if(Y_op[ix]==1) { cil[ix]+=1.0; cils[ix]+=1.0; } I_lat[ix]=w_lat*(cil[ix]-cils[ix]); Isyn_lat[ix]=0; for(int k=0; k<N2; k++) { if(k!=ix) { Isyn_lat[ix]+=I_lat[k]; } } } } __device__ double total_curr[8][N2]; __device__ double total_dhatsq[8]; //optimized version __global__ void IsynRedKernel(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int tid=threadIdx.x; for(unsigned int s=blockDim.x/2;s>0;s>>=1) { if(iy<N2 && tid<s && (ix+s)<N1) { Isyn[ix][iy]+=Isyn[ix+s][iy]; } if(iy==0 && tid<s && (ix+s)<N1) { d_hat_sq[ix]+=d_hat_sq[ix+s]; } __syncthreads(); } if(tid==0 && iy<N2) { total_curr[blockIdx.x][iy]=Isyn[ix][iy]; if(iy==0) { total_dhatsq[blockIdx.x]=d_hat_sq[ix]; } } } __global__ void reduce1(int i) { int tx=threadIdx.x+blockIdx.x*blockDim.x; if(tx<N2) { double total1=0.0; for(int k=0; k<8; k++) { total1+=total_curr[k][tx]; } Isyn_tot[tx]=total1; if(tx==0) { double total2=0.0; for(int j=0; j<8; j++) total2+=total_dhatsq[j]; norm_dh=sqrt(total2); } } } __global__ void CalcUpdate(int i, double l_rate) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; if(ix<N1 && iy<N2) { if(norm_dh!=0 && err[iy]!=0) { del_w[ix][iy]+=(err[iy]*l_rate*d_hat[ix]/norm_dh); } __syncthreads(); } } __global__ void WtUpdt() { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; if(ix<N1 && iy<N2) { weight[ix][iy]+=del_w[ix][iy]; } } __global__ void cpyWts(double *wts) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; if(ix<N1 && iy<N2) { wts[ix*N2+iy]=weight[ix][iy]; } } __device__ double w_conv1[Nw][Nw], w_conv2[Nw][Nw]; __device__ double w_conv3[Nw][Nw], w_conv4[Nw][Nw]; __device__ double w_conv5[Nw][Nw], w_conv6[Nw][Nw]; __device__ double w_conv7[Nw][Nw], w_conv8[Nw][Nw]; __device__ double w_conv9[Nw][Nw], w_conv10[Nw][Nw]; __device__ double w_conv11[Nw][Nw], w_conv12[Nw][Nw]; __global__ void initialize2D(double *d_wts, double *c_wts) { for(int i=0; i<N1; i++) { for(int j=0; j<N2; j++) { weight[i][j]=d_wts[i*N2+j]; } } for(int i=0; i<(12*Nw); i++) { for(int j=0; j<Nw; j++) { if(i<Nw) { w_conv1[i][j]=c_wts[i*Nw+j]; } else if(i>=Nw && i<(2*Nw)) { w_conv2[i-Nw][j]=c_wts[i*Nw+j]; } else if(i>=(2*Nw) && i<(3*Nw)) { w_conv3[i-(2*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(3*Nw) && i<(4*Nw)){ w_conv4[i-(3*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(4*Nw) && i<(5*Nw)){ w_conv5[i-(4*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(5*Nw) && i<(6*Nw)){ w_conv6[i-(5*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(6*Nw) && i<(7*Nw)){ w_conv7[i-(6*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(7*Nw) && i<(8*Nw)){ w_conv8[i-(7*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(8*Nw) && i<(9*Nw)){ w_conv9[i-(8*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(9*Nw) && i<(10*Nw)){ w_conv10[i-(9*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(10*Nw) && i<(11*Nw)){ w_conv11[i-(10*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(11*Nw) && i<(12*Nw)){ w_conv12[i-(11*Nw)][j]=c_wts[i*Nw+j]; } } } } __global__ void convKernel1(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv1[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[ix*L+iy]=temp; } } __global__ void convKernel2(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv2[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[L*L+ix*L+iy]=temp; } } __global__ void convKernel3(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv3[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[2*L*L+ix*L+iy]=temp; } } __global__ void convKernel4(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv4[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[3*L*L+ix*L+iy]=temp; } } __global__ void convKernel5(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv5[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[4*L*L+ix*L+iy]=temp; } } __global__ void convKernel6(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv6[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[5*L*L+ix*L+iy]=temp; } } __global__ void convKernel7(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv7[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[6*L*L+ix*L+iy]=temp; } } __global__ void convKernel8(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv8[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[7*L*L+ix*L+iy]=temp; } } __global__ void convKernel9(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv9[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[8*L*L+ix*L+iy]=temp; } } __global__ void convKernel10(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv10[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[9*L*L+ix*L+iy]=temp; } } __global__ void convKernel11(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv11[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[10*L*L+ix*L+iy]=temp; } } __global__ void convKernel12(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv12[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[11*L*L+ix*L+iy]=temp; } } long timediff(clock_t t1, clock_t t2) { long elapsed; elapsed = ((double)t2 - t1) / CLOCKS_PER_SEC * 1000; return elapsed; } double h_wts[N1*N2], *d_wts; double *dcwts; double h_wts_saved[N1*N2], *d_wts_saved; double c_wts[12*Nw*Nw]; int main(int argc, char *argv[]) { int start=atoi(argv[1]); FILE *FW, *FWI; //to load initial wts and store final wts FILE *conv_wt; clock_t t1, t2; long elapsed=0; FILE *F_train, *F_lif_spks; //for concurrent execution of different kernels: cudaStream_t stream2, stream3, stream4, stream5, stream6; cudaStream_t stream7, stream8, stream9, stream10, stream11, stream12; cudaStream_t stream13, stream14,stream15; //set the gpu device: cudaSetDevice(4); cudaStreamCreate(&stream2); cudaStreamCreate(&stream3); cudaStreamCreate(&stream4); cudaStreamCreate(&stream5); cudaStreamCreate(&stream6); cudaStreamCreate(&stream7); cudaStreamCreate(&stream8); cudaStreamCreate(&stream9); cudaStreamCreate(&stream10); cudaStreamCreate(&stream11); cudaStreamCreate(&stream12); cudaStreamCreate(&stream13); cudaStreamCreate(&stream14); cudaStreamCreate(&stream15); F_lif_spks = fopen("pixels_spks.csv","r"); if(F_lif_spks == NULL) { perror("Error while opening file pixels_spks.csv\n"); exit(EXIT_FAILURE); } F_train = fopen("mnist_train.csv","r"); //F_test = fopen("mnist_test.csv","r"); if(F_train == NULL) { perror("Error while opening file mnist_train.csv\n"); exit(EXIT_FAILURE); } FWI = fopen("wts_initial.csv","r"); if(FWI == NULL) { perror("Error while opening file wts_trained.csv\n"); exit(EXIT_FAILURE); } conv_wt=fopen("kernels_3x3.csv","r"); if(conv_wt==NULL) { perror("Error while opening file kernel.csv\n"); exit(EXIT_FAILURE); } printf("Total no. of neurons=%d, no. of synapses to be trained=%d\n",(N1+N2), N1*N2); cudaMalloc((void**)&d_imgs_lin,sizeof(int)*(N_imgs*(p*q+1))); cudaMalloc((void**)&d_wts,N1*N2*sizeof(double)); cudaMalloc((void**)&dcwts,12*Nw*Nw*sizeof(double)); cudaMalloc((void**)&d_wts_saved,N1*N2*sizeof(double)); cudaMalloc((void**)&pix_spks_d,256*M*sizeof(unsigned char)); //Read the initial weights: //printf("Reading final trained weights from file\n"); for(int i=0; i<N1; i++) { for(int j=0; j<N2; j++) { fscanf(FWI,"%lf,",&h_wts[i*N2+j]); } } fclose(FWI); for(int i=0; i<(12*Nw); i++) { for(int j=0; j<Nw; j++) { fscanf(conv_wt,"%lf,",&c_wts[i*Nw+j]); } } fclose(conv_wt); for(int i=0; i<(256); i++) { for(int j=0; j<M; j++) { fscanf(F_lif_spks,"%d,",&pix_spks_h[i*M+j]); } } fclose(F_lif_spks); cudaMemcpy(pix_spks_d,pix_spks_h,256*M*sizeof(unsigned char),cudaMemcpyHostToDevice); cudaMemcpy(d_wts,h_wts,N1*N2*sizeof(double),cudaMemcpyHostToDevice); cudaMemcpy(dcwts,c_wts,12*Nw*Nw*sizeof(double),cudaMemcpyHostToDevice); initialize2D<<<1,1>>>(d_wts,dcwts); cudaDeviceSynchronize(); cudaFree(d_wts); cudaFree(dcwts); //Read the images from file: for(int n=0;n<N_imgs;n++) { for(int j=0;j<(p*q+1);j++) { fscanf(F_train,"%d,",&test_set[n][j]); } } fclose(F_train); //convert 2D matrix to 1D for transfer to device: for(int n=0; n<(N_imgs);n++) { for(int j=0;j<(p*q+1);j++) { img_lin[n*(p*q+1)+j]=test_set[n][j]; } } cudaMemcpy(d_imgs_lin,img_lin,sizeof(int)*(N_imgs*(p*q+1)),cudaMemcpyHostToDevice); //call cuda kernel to read in the images: img_readKernel<<<1,1>>>(d_imgs_lin); cudaThreadSynchronize(); cudaFree(d_imgs_lin); int NBlks=(N1/Nthrds)+1; //printf("blocks=%d, threads=%d\n",NBlks,Nthrds); dim3 dimGrid(82,1,1); dim3 dimBlock(100,10,1); dim3 grid_syn(NBlks,10,1); dim3 block_syn(Nthrds,1,1); //convert pixel values 0 to 255 into spike trains convert2Spks<<<1,1>>>(pix_spks_d); cudaDeviceSynchronize(); cudaFree(pix_spks_d); dim3 convGrid(1,1,1); dim3 convBlks(26,26,1); double learn=r; //CPU time required for computation t1 = clock(); int l=0; //image index for(int n=0; n<max_epochs; n++) { printf("Epoch=%d\n",n); if(n<3) learn=r; else if(n>=3 && n<6) learn=r/2; else if(n>=6 && n<9) learn=r/4; else if(n>=9 && n<12) learn=r/8; else if(n>=12 && n<15) learn=r/16; else if(n>=15 && n<18) learn=r/32; else learn=r/64; for(l=0; l<N_imgs; l++) { printf("l=%d image %d\n",l,test_set[l][0]); createDes<<<1,10>>>(l); clear_vars<<<dimGrid,dimBlock>>>(); cudaDeviceSynchronize(); //simulate for all time steps for(int i=0; i<M; i++) { pix2spks<<<1,784>>>(l,i); /////////////////////////////////////////////////// cudaDeviceSynchronize(); convKernel1<<<convGrid,convBlks,0,stream2>>>(i); convKernel2<<<convGrid,convBlks,0,stream3>>>(i); convKernel3<<<convGrid,convBlks,0,stream4>>>(i); convKernel4<<<convGrid,convBlks,0,stream5>>>(i); convKernel5<<<convGrid,convBlks,0,stream6>>>(i); convKernel6<<<convGrid,convBlks,0,stream7>>>(i); convKernel7<<<convGrid,convBlks,0,stream8>>>(i); convKernel8<<<convGrid,convBlks,0,stream9>>>(i); convKernel9<<<convGrid,convBlks,0,stream10>>>(i); convKernel10<<<convGrid,convBlks,0,stream11>>>(i); convKernel11<<<convGrid,convBlks,0,stream12>>>(i); convKernel12<<<convGrid,convBlks,0,stream13>>>(i); ///////////////////////////////////////////////////// cudaDeviceSynchronize(); LifKernel1<<<NBlks,Nthrds>>>(i); //////////////////////////////////////////////// cudaDeviceSynchronize(); SynKernel<<<dimGrid,dimBlock,0,stream14>>>(i); Lat_curr<<<1,10,0,stream15>>>(i); //////////////////////////////////////////////// cudaDeviceSynchronize(); IsynRedKernel<<<grid_syn,block_syn>>>(i); reduce1<<<10,1>>>(i); /////////////////////////////////////////////// cudaDeviceSynchronize(); LifKernel2<<<1,10>>>(i); //////////////////////////////////////////////////// cudaDeviceSynchronize(); CalcUpdate<<<dimGrid,dimBlock>>>(i,learn); } ////////////////////////////////////////////////////////////////////////////// WtUpdt<<<dimGrid,dimBlock>>>(); //cudaDeviceSynchronize(); } //end of loops over N_imgs t2 = clock(); elapsed += timediff(t1,t2); printf("Elapsed time: %ld ms\n", elapsed); char wts_file[25]; sprintf(wts_file,"wts_gpu%d.txt",n); if((FW=fopen(wts_file,"w"))==NULL) { printf("Failed to open file wts_gpu_sample%d.txt\n",n); } printf("Copying the trained weights to the host for analysis\n"); cpyWts<<<dimGrid,dimBlock>>>(d_wts_saved); cudaMemcpy(h_wts_saved,d_wts_saved,N1*N2*sizeof(double), cudaMemcpyDeviceToHost); //save the weights in a file: for(int i=0; i<N1; i++) { for(int j=0; j<N2; j++) { fprintf(FW,"%0.14f,",h_wts_saved[i*N2+j]); } fprintf(FW,"\n"); } fclose(FW); } //end of n epochs loops cudaFree(d_wts_saved); cudaDeviceReset(); return(0); }
.file "tmpxft_002799a7_00000000-6_snn_train.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .type _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0: .LFB2224: .cfi_startproc jmp cudaLaunchKernel@PLT .cfi_endproc .LFE2224: .size _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 .globl _Z8timediffll .type _Z8timediffll, @function _Z8timediffll: .LFB2027: .cfi_startproc endbr64 cvtsi2sdq %rsi, %xmm0 cvtsi2sdq %rdi, %xmm1 subsd %xmm1, %xmm0 divsd .LC0(%rip), %xmm0 mulsd .LC1(%rip), %xmm0 cvttsd2siq %xmm0, %rax ret .cfi_endproc .LFE2027: .size _Z8timediffll, .-_Z8timediffll .globl _Z34__device_stub__Z14img_readKernelPiPi .type _Z34__device_stub__Z14img_readKernelPiPi, @function _Z34__device_stub__Z14img_readKernelPiPi: .LFB2053: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L4 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z14img_readKernelPi(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L4: movq 72(%rsp), %rax subq %fs:40, %rax je .L6 call __stack_chk_fail@PLT .L6: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z34__device_stub__Z14img_readKernelPiPi, .-_Z34__device_stub__Z14img_readKernelPiPi .globl _Z14img_readKernelPi .type _Z14img_readKernelPi, @function _Z14img_readKernelPi: .LFB2054: .cfi_startproc endbr64 jmp _Z34__device_stub__Z14img_readKernelPiPi .cfi_endproc .LFE2054: .size _Z14img_readKernelPi, .-_Z14img_readKernelPi .globl _Z32__device_stub__Z12convert2SpksPhPh .type _Z32__device_stub__Z12convert2SpksPhPh, @function _Z32__device_stub__Z12convert2SpksPhPh: .LFB2055: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L10 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z12convert2SpksPh(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L10: movq 72(%rsp), %rax subq %fs:40, %rax je .L12 call __stack_chk_fail@PLT .L12: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2055: .size _Z32__device_stub__Z12convert2SpksPhPh, .-_Z32__device_stub__Z12convert2SpksPhPh .globl _Z12convert2SpksPh .type _Z12convert2SpksPh, @function _Z12convert2SpksPh: .LFB2056: .cfi_startproc endbr64 jmp _Z32__device_stub__Z12convert2SpksPhPh .cfi_endproc .LFE2056: .size _Z12convert2SpksPh, .-_Z12convert2SpksPh .globl _Z27__device_stub__Z8pix2spksiiii .type _Z27__device_stub__Z8pix2spksiiii, @function _Z27__device_stub__Z8pix2spksiiii: .LFB2057: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx movl %esi, 8(%rsp) leaq 32(%rsp), %rdi leaq 44(%rsp), %rsi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 40(%rsp) movq %rax, 56(%rsp) leaq 8(%rsp), %rax movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L15 pushq 24(%rsp) .cfi_def_cfa_offset 104 leaq _Z8pix2spksii(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 112 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 72(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L15: movq 72(%rsp), %rax subq %fs:40, %rax je .L17 call __stack_chk_fail@PLT .L17: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2057: .size _Z27__device_stub__Z8pix2spksiiii, .-_Z27__device_stub__Z8pix2spksiiii .globl _Z8pix2spksii .type _Z8pix2spksii, @function _Z8pix2spksii: .LFB2058: .cfi_startproc endbr64 jmp _Z27__device_stub__Z8pix2spksiiii .cfi_endproc .LFE2058: .size _Z8pix2spksii, .-_Z8pix2spksii .globl _Z27__device_stub__Z9createDesii .type _Z27__device_stub__Z9createDesii, @function _Z27__device_stub__Z9createDesii: .LFB2059: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L20 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z9createDesi(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L20: movq 72(%rsp), %rax subq %fs:40, %rax je .L22 call __stack_chk_fail@PLT .L22: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2059: .size _Z27__device_stub__Z9createDesii, .-_Z27__device_stub__Z9createDesii .globl _Z9createDesi .type _Z9createDesi, @function _Z9createDesi: .LFB2060: .cfi_startproc endbr64 jmp _Z27__device_stub__Z9createDesii .cfi_endproc .LFE2060: .size _Z9createDesi, .-_Z9createDesi .globl _Z29__device_stub__Z10clear_varsvv .type _Z29__device_stub__Z10clear_varsvv, @function _Z29__device_stub__Z10clear_varsvv: .LFB2061: .cfi_startproc endbr64 subq $72, %rsp .cfi_def_cfa_offset 80 movq %fs:40, %rax movq %rax, 56(%rsp) movabsq $4294967297, %rax leaq 16(%rsp), %rcx leaq 8(%rsp), %rdx movl $1, 32(%rsp) leaq 36(%rsp), %rsi leaq 24(%rsp), %rdi movl $1, 44(%rsp) movq %rax, 24(%rsp) movq %rax, 36(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L25 pushq 16(%rsp) .cfi_def_cfa_offset 88 leaq _Z10clear_varsv(%rip), %rdi pushq 16(%rsp) .cfi_def_cfa_offset 96 movq 52(%rsp), %rcx movl 60(%rsp), %r8d movq 40(%rsp), %rsi movl 48(%rsp), %edx leaq 64(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 88 popq %rdx .cfi_def_cfa_offset 80 .L25: movq 56(%rsp), %rax subq %fs:40, %rax je .L27 call __stack_chk_fail@PLT .L27: addq $72, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2061: .size _Z29__device_stub__Z10clear_varsvv, .-_Z29__device_stub__Z10clear_varsvv .globl _Z10clear_varsv .type _Z10clear_varsv, @function _Z10clear_varsv: .LFB2062: .cfi_startproc endbr64 jmp _Z29__device_stub__Z10clear_varsvv .cfi_endproc .LFE2062: .size _Z10clear_varsv, .-_Z10clear_varsv .globl _Z29__device_stub__Z10LifKernel1ii .type _Z29__device_stub__Z10LifKernel1ii, @function _Z29__device_stub__Z10LifKernel1ii: .LFB2063: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L30 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z10LifKernel1i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L30: movq 72(%rsp), %rax subq %fs:40, %rax je .L32 call __stack_chk_fail@PLT .L32: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2063: .size _Z29__device_stub__Z10LifKernel1ii, .-_Z29__device_stub__Z10LifKernel1ii .globl _Z10LifKernel1i .type _Z10LifKernel1i, @function _Z10LifKernel1i: .LFB2064: .cfi_startproc endbr64 jmp _Z29__device_stub__Z10LifKernel1ii .cfi_endproc .LFE2064: .size _Z10LifKernel1i, .-_Z10LifKernel1i .globl _Z29__device_stub__Z10LifKernel2ii .type _Z29__device_stub__Z10LifKernel2ii, @function _Z29__device_stub__Z10LifKernel2ii: .LFB2065: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L35 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z10LifKernel2i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L35: movq 72(%rsp), %rax subq %fs:40, %rax je .L37 call __stack_chk_fail@PLT .L37: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2065: .size _Z29__device_stub__Z10LifKernel2ii, .-_Z29__device_stub__Z10LifKernel2ii .globl _Z10LifKernel2i .type _Z10LifKernel2i, @function _Z10LifKernel2i: .LFB2066: .cfi_startproc endbr64 jmp _Z29__device_stub__Z10LifKernel2ii .cfi_endproc .LFE2066: .size _Z10LifKernel2i, .-_Z10LifKernel2i .globl _Z27__device_stub__Z9SynKernelii .type _Z27__device_stub__Z9SynKernelii, @function _Z27__device_stub__Z9SynKernelii: .LFB2067: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L40 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z9SynKerneli(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L40: movq 72(%rsp), %rax subq %fs:40, %rax je .L42 call __stack_chk_fail@PLT .L42: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2067: .size _Z27__device_stub__Z9SynKernelii, .-_Z27__device_stub__Z9SynKernelii .globl _Z9SynKerneli .type _Z9SynKerneli, @function _Z9SynKerneli: .LFB2068: .cfi_startproc endbr64 jmp _Z27__device_stub__Z9SynKernelii .cfi_endproc .LFE2068: .size _Z9SynKerneli, .-_Z9SynKerneli .globl _Z26__device_stub__Z8Lat_currii .type _Z26__device_stub__Z8Lat_currii, @function _Z26__device_stub__Z8Lat_currii: .LFB2069: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L45 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z8Lat_curri(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L45: movq 72(%rsp), %rax subq %fs:40, %rax je .L47 call __stack_chk_fail@PLT .L47: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2069: .size _Z26__device_stub__Z8Lat_currii, .-_Z26__device_stub__Z8Lat_currii .globl _Z8Lat_curri .type _Z8Lat_curri, @function _Z8Lat_curri: .LFB2070: .cfi_startproc endbr64 jmp _Z26__device_stub__Z8Lat_currii .cfi_endproc .LFE2070: .size _Z8Lat_curri, .-_Z8Lat_curri .globl _Z32__device_stub__Z13IsynRedKernelii .type _Z32__device_stub__Z13IsynRedKernelii, @function _Z32__device_stub__Z13IsynRedKernelii: .LFB2071: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L50 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z13IsynRedKerneli(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L50: movq 72(%rsp), %rax subq %fs:40, %rax je .L52 call __stack_chk_fail@PLT .L52: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2071: .size _Z32__device_stub__Z13IsynRedKernelii, .-_Z32__device_stub__Z13IsynRedKernelii .globl _Z13IsynRedKerneli .type _Z13IsynRedKerneli, @function _Z13IsynRedKerneli: .LFB2072: .cfi_startproc endbr64 jmp _Z32__device_stub__Z13IsynRedKernelii .cfi_endproc .LFE2072: .size _Z13IsynRedKerneli, .-_Z13IsynRedKerneli .globl _Z25__device_stub__Z7reduce1ii .type _Z25__device_stub__Z7reduce1ii, @function _Z25__device_stub__Z7reduce1ii: .LFB2073: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L55 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z7reduce1i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L55: movq 72(%rsp), %rax subq %fs:40, %rax je .L57 call __stack_chk_fail@PLT .L57: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2073: .size _Z25__device_stub__Z7reduce1ii, .-_Z25__device_stub__Z7reduce1ii .globl _Z7reduce1i .type _Z7reduce1i, @function _Z7reduce1i: .LFB2074: .cfi_startproc endbr64 jmp _Z25__device_stub__Z7reduce1ii .cfi_endproc .LFE2074: .size _Z7reduce1i, .-_Z7reduce1i .globl _Z30__device_stub__Z10CalcUpdateidid .type _Z30__device_stub__Z10CalcUpdateidid, @function _Z30__device_stub__Z10CalcUpdateidid: .LFB2075: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx movsd %xmm0, (%rsp) leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 40(%rsp) movq %rax, 56(%rsp) movq %rsp, %rax movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L60 pushq 24(%rsp) .cfi_def_cfa_offset 104 leaq _Z10CalcUpdateid(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 112 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 72(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L60: movq 72(%rsp), %rax subq %fs:40, %rax je .L62 call __stack_chk_fail@PLT .L62: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2075: .size _Z30__device_stub__Z10CalcUpdateidid, .-_Z30__device_stub__Z10CalcUpdateidid .globl _Z10CalcUpdateid .type _Z10CalcUpdateid, @function _Z10CalcUpdateid: .LFB2076: .cfi_startproc endbr64 jmp _Z30__device_stub__Z10CalcUpdateidid .cfi_endproc .LFE2076: .size _Z10CalcUpdateid, .-_Z10CalcUpdateid .globl _Z24__device_stub__Z6WtUpdtvv .type _Z24__device_stub__Z6WtUpdtvv, @function _Z24__device_stub__Z6WtUpdtvv: .LFB2077: .cfi_startproc endbr64 subq $72, %rsp .cfi_def_cfa_offset 80 movq %fs:40, %rax movq %rax, 56(%rsp) movabsq $4294967297, %rax leaq 16(%rsp), %rcx leaq 8(%rsp), %rdx movl $1, 32(%rsp) leaq 36(%rsp), %rsi leaq 24(%rsp), %rdi movl $1, 44(%rsp) movq %rax, 24(%rsp) movq %rax, 36(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L65 pushq 16(%rsp) .cfi_def_cfa_offset 88 leaq _Z6WtUpdtv(%rip), %rdi pushq 16(%rsp) .cfi_def_cfa_offset 96 movq 52(%rsp), %rcx movl 60(%rsp), %r8d movq 40(%rsp), %rsi movl 48(%rsp), %edx leaq 64(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 88 popq %rdx .cfi_def_cfa_offset 80 .L65: movq 56(%rsp), %rax subq %fs:40, %rax je .L67 call __stack_chk_fail@PLT .L67: addq $72, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2077: .size _Z24__device_stub__Z6WtUpdtvv, .-_Z24__device_stub__Z6WtUpdtvv .globl _Z6WtUpdtv .type _Z6WtUpdtv, @function _Z6WtUpdtv: .LFB2078: .cfi_startproc endbr64 jmp _Z24__device_stub__Z6WtUpdtvv .cfi_endproc .LFE2078: .size _Z6WtUpdtv, .-_Z6WtUpdtv .globl _Z25__device_stub__Z6cpyWtsPdPd .type _Z25__device_stub__Z6cpyWtsPdPd, @function _Z25__device_stub__Z6cpyWtsPdPd: .LFB2079: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L70 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z6cpyWtsPd(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L70: movq 72(%rsp), %rax subq %fs:40, %rax je .L72 call __stack_chk_fail@PLT .L72: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2079: .size _Z25__device_stub__Z6cpyWtsPdPd, .-_Z25__device_stub__Z6cpyWtsPdPd .globl _Z6cpyWtsPd .type _Z6cpyWtsPd, @function _Z6cpyWtsPd: .LFB2080: .cfi_startproc endbr64 jmp _Z25__device_stub__Z6cpyWtsPdPd .cfi_endproc .LFE2080: .size _Z6cpyWtsPd, .-_Z6cpyWtsPd .globl _Z34__device_stub__Z12initialize2DPdS_PdS_ .type _Z34__device_stub__Z12initialize2DPdS_PdS_, @function _Z34__device_stub__Z12initialize2DPdS_PdS_: .LFB2081: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx movq %rsi, (%rsp) leaq 32(%rsp), %rdi leaq 44(%rsp), %rsi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 56(%rsp) movq %rsp, %rax movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L75 pushq 24(%rsp) .cfi_def_cfa_offset 104 leaq _Z12initialize2DPdS_(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 112 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 72(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L75: movq 72(%rsp), %rax subq %fs:40, %rax je .L77 call __stack_chk_fail@PLT .L77: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2081: .size _Z34__device_stub__Z12initialize2DPdS_PdS_, .-_Z34__device_stub__Z12initialize2DPdS_PdS_ .globl _Z12initialize2DPdS_ .type _Z12initialize2DPdS_, @function _Z12initialize2DPdS_: .LFB2082: .cfi_startproc endbr64 jmp _Z34__device_stub__Z12initialize2DPdS_PdS_ .cfi_endproc .LFE2082: .size _Z12initialize2DPdS_, .-_Z12initialize2DPdS_ .globl _Z30__device_stub__Z11convKernel1ii .type _Z30__device_stub__Z11convKernel1ii, @function _Z30__device_stub__Z11convKernel1ii: .LFB2083: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L80 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel1i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L80: movq 72(%rsp), %rax subq %fs:40, %rax je .L82 call __stack_chk_fail@PLT .L82: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2083: .size _Z30__device_stub__Z11convKernel1ii, .-_Z30__device_stub__Z11convKernel1ii .globl _Z11convKernel1i .type _Z11convKernel1i, @function _Z11convKernel1i: .LFB2084: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel1ii .cfi_endproc .LFE2084: .size _Z11convKernel1i, .-_Z11convKernel1i .globl _Z30__device_stub__Z11convKernel2ii .type _Z30__device_stub__Z11convKernel2ii, @function _Z30__device_stub__Z11convKernel2ii: .LFB2085: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L85 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel2i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L85: movq 72(%rsp), %rax subq %fs:40, %rax je .L87 call __stack_chk_fail@PLT .L87: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2085: .size _Z30__device_stub__Z11convKernel2ii, .-_Z30__device_stub__Z11convKernel2ii .globl _Z11convKernel2i .type _Z11convKernel2i, @function _Z11convKernel2i: .LFB2086: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel2ii .cfi_endproc .LFE2086: .size _Z11convKernel2i, .-_Z11convKernel2i .globl _Z30__device_stub__Z11convKernel3ii .type _Z30__device_stub__Z11convKernel3ii, @function _Z30__device_stub__Z11convKernel3ii: .LFB2087: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L90 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel3i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L90: movq 72(%rsp), %rax subq %fs:40, %rax je .L92 call __stack_chk_fail@PLT .L92: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2087: .size _Z30__device_stub__Z11convKernel3ii, .-_Z30__device_stub__Z11convKernel3ii .globl _Z11convKernel3i .type _Z11convKernel3i, @function _Z11convKernel3i: .LFB2088: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel3ii .cfi_endproc .LFE2088: .size _Z11convKernel3i, .-_Z11convKernel3i .globl _Z30__device_stub__Z11convKernel4ii .type _Z30__device_stub__Z11convKernel4ii, @function _Z30__device_stub__Z11convKernel4ii: .LFB2089: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L95 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel4i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L95: movq 72(%rsp), %rax subq %fs:40, %rax je .L97 call __stack_chk_fail@PLT .L97: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2089: .size _Z30__device_stub__Z11convKernel4ii, .-_Z30__device_stub__Z11convKernel4ii .globl _Z11convKernel4i .type _Z11convKernel4i, @function _Z11convKernel4i: .LFB2090: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel4ii .cfi_endproc .LFE2090: .size _Z11convKernel4i, .-_Z11convKernel4i .globl _Z30__device_stub__Z11convKernel5ii .type _Z30__device_stub__Z11convKernel5ii, @function _Z30__device_stub__Z11convKernel5ii: .LFB2091: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L100 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel5i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L100: movq 72(%rsp), %rax subq %fs:40, %rax je .L102 call __stack_chk_fail@PLT .L102: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2091: .size _Z30__device_stub__Z11convKernel5ii, .-_Z30__device_stub__Z11convKernel5ii .globl _Z11convKernel5i .type _Z11convKernel5i, @function _Z11convKernel5i: .LFB2092: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel5ii .cfi_endproc .LFE2092: .size _Z11convKernel5i, .-_Z11convKernel5i .globl _Z30__device_stub__Z11convKernel6ii .type _Z30__device_stub__Z11convKernel6ii, @function _Z30__device_stub__Z11convKernel6ii: .LFB2093: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L105 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel6i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L105: movq 72(%rsp), %rax subq %fs:40, %rax je .L107 call __stack_chk_fail@PLT .L107: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2093: .size _Z30__device_stub__Z11convKernel6ii, .-_Z30__device_stub__Z11convKernel6ii .globl _Z11convKernel6i .type _Z11convKernel6i, @function _Z11convKernel6i: .LFB2094: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel6ii .cfi_endproc .LFE2094: .size _Z11convKernel6i, .-_Z11convKernel6i .globl _Z30__device_stub__Z11convKernel7ii .type _Z30__device_stub__Z11convKernel7ii, @function _Z30__device_stub__Z11convKernel7ii: .LFB2095: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L110 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel7i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L110: movq 72(%rsp), %rax subq %fs:40, %rax je .L112 call __stack_chk_fail@PLT .L112: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2095: .size _Z30__device_stub__Z11convKernel7ii, .-_Z30__device_stub__Z11convKernel7ii .globl _Z11convKernel7i .type _Z11convKernel7i, @function _Z11convKernel7i: .LFB2096: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel7ii .cfi_endproc .LFE2096: .size _Z11convKernel7i, .-_Z11convKernel7i .globl _Z30__device_stub__Z11convKernel8ii .type _Z30__device_stub__Z11convKernel8ii, @function _Z30__device_stub__Z11convKernel8ii: .LFB2097: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L115 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel8i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L115: movq 72(%rsp), %rax subq %fs:40, %rax je .L117 call __stack_chk_fail@PLT .L117: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2097: .size _Z30__device_stub__Z11convKernel8ii, .-_Z30__device_stub__Z11convKernel8ii .globl _Z11convKernel8i .type _Z11convKernel8i, @function _Z11convKernel8i: .LFB2098: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel8ii .cfi_endproc .LFE2098: .size _Z11convKernel8i, .-_Z11convKernel8i .globl _Z30__device_stub__Z11convKernel9ii .type _Z30__device_stub__Z11convKernel9ii, @function _Z30__device_stub__Z11convKernel9ii: .LFB2099: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L120 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z11convKernel9i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L120: movq 72(%rsp), %rax subq %fs:40, %rax je .L122 call __stack_chk_fail@PLT .L122: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2099: .size _Z30__device_stub__Z11convKernel9ii, .-_Z30__device_stub__Z11convKernel9ii .globl _Z11convKernel9i .type _Z11convKernel9i, @function _Z11convKernel9i: .LFB2100: .cfi_startproc endbr64 jmp _Z30__device_stub__Z11convKernel9ii .cfi_endproc .LFE2100: .size _Z11convKernel9i, .-_Z11convKernel9i .globl _Z31__device_stub__Z12convKernel10ii .type _Z31__device_stub__Z12convKernel10ii, @function _Z31__device_stub__Z12convKernel10ii: .LFB2101: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L125 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z12convKernel10i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L125: movq 72(%rsp), %rax subq %fs:40, %rax je .L127 call __stack_chk_fail@PLT .L127: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2101: .size _Z31__device_stub__Z12convKernel10ii, .-_Z31__device_stub__Z12convKernel10ii .globl _Z12convKernel10i .type _Z12convKernel10i, @function _Z12convKernel10i: .LFB2102: .cfi_startproc endbr64 jmp _Z31__device_stub__Z12convKernel10ii .cfi_endproc .LFE2102: .size _Z12convKernel10i, .-_Z12convKernel10i .globl _Z31__device_stub__Z12convKernel11ii .type _Z31__device_stub__Z12convKernel11ii, @function _Z31__device_stub__Z12convKernel11ii: .LFB2103: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L130 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z12convKernel11i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L130: movq 72(%rsp), %rax subq %fs:40, %rax je .L132 call __stack_chk_fail@PLT .L132: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2103: .size _Z31__device_stub__Z12convKernel11ii, .-_Z31__device_stub__Z12convKernel11ii .globl _Z12convKernel11i .type _Z12convKernel11i, @function _Z12convKernel11i: .LFB2104: .cfi_startproc endbr64 jmp _Z31__device_stub__Z12convKernel11ii .cfi_endproc .LFE2104: .size _Z12convKernel11i, .-_Z12convKernel11i .globl _Z31__device_stub__Z12convKernel12ii .type _Z31__device_stub__Z12convKernel12ii, @function _Z31__device_stub__Z12convKernel12ii: .LFB2105: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movl %edi, 12(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx leaq 52(%rsp), %rsi leaq 40(%rsp), %rdi movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax movl $1, 48(%rsp) movq %rax, 64(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L135 pushq 32(%rsp) .cfi_def_cfa_offset 104 leaq _Z12convKernel12i(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 112 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 80(%rsp), %r9 call _Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0 popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L135: movq 72(%rsp), %rax subq %fs:40, %rax je .L137 call __stack_chk_fail@PLT .L137: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2105: .size _Z31__device_stub__Z12convKernel12ii, .-_Z31__device_stub__Z12convKernel12ii .globl _Z12convKernel12i .type _Z12convKernel12i, @function _Z12convKernel12i: .LFB2106: .cfi_startproc endbr64 jmp _Z31__device_stub__Z12convKernel12ii .cfi_endproc .LFE2106: .size _Z12convKernel12i, .-_Z12convKernel12i .section .rodata.str1.1,"aMS",@progbits,1 .LC4: .string "r" .LC5: .string "pixels_spks.csv" .LC6: .string "Error while opening file pixels_spks.csv\n" .LC7: .string "mnist_train.csv" .LC8: .string "Error while opening file mnist_train.csv\n" .LC9: .string "wts_initial.csv" .LC10: .string "Error while opening file wts_trained.csv\n" .LC11: .string "kernels_3x3.csv" .LC12: .string "Error while opening file kernel.csv\n" .LC13: .string "Total no. of neurons=%d, no. of synapses to be trained=%d\n" .LC14: .string "%lf," .LC15: .string "%d," .LC16: .string "Epoch=%d\n" .LC17: .string "l=%d image %d\n" .LC18: .string "Elapsed time: %ld ms\n" .LC19: .string "wts_gpu%d.txt" .LC20: .string "w" .LC21: .string "Failed to open file wts_gpu_sample%d.txt\n" .LC22: .string "Copying the trained weights to the host for analysis\n" .LC23: .string "%0.14f," .LC24: .string "\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 movl $4, %edi pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 leaq .LC4(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $296, %rsp .cfi_def_cfa_offset 352 movq %fs:40, %rax movq %rax, 280(%rsp) xorl %eax, %eax call cudaSetDevice@PLT leaq 40(%rsp), %rdi call cudaStreamCreate@PLT leaq 48(%rsp), %rdi call cudaStreamCreate@PLT leaq 56(%rsp), %rdi call cudaStreamCreate@PLT leaq 64(%rsp), %rdi call cudaStreamCreate@PLT leaq 72(%rsp), %rdi call cudaStreamCreate@PLT leaq 80(%rsp), %rdi call cudaStreamCreate@PLT leaq 88(%rsp), %rdi call cudaStreamCreate@PLT leaq 96(%rsp), %rdi call cudaStreamCreate@PLT leaq 104(%rsp), %rdi call cudaStreamCreate@PLT leaq 112(%rsp), %rdi call cudaStreamCreate@PLT leaq 120(%rsp), %rdi call cudaStreamCreate@PLT leaq 128(%rsp), %rdi call cudaStreamCreate@PLT leaq 136(%rsp), %rdi call cudaStreamCreate@PLT leaq 144(%rsp), %rdi call cudaStreamCreate@PLT leaq .LC5(%rip), %rdi movq %r12, %rsi call fopen@PLT leaq .LC6(%rip), %rdi testq %rax, %rax je .L204 movq %r12, %rsi leaq .LC7(%rip), %rdi movq %rax, %rbp call fopen@PLT movq %rax, %rbx testq %rax, %rax jne .L142 leaq .LC8(%rip), %rdi .L204: call perror@PLT movl $1, %edi call exit@PLT .L142: leaq .LC9(%rip), %rdi movq %r12, %rsi call fopen@PLT leaq .LC10(%rip), %rdi movq %rax, %r13 testq %rax, %rax je .L204 movq %r12, %rsi leaq .LC11(%rip), %rdi call fopen@PLT leaq .LC12(%rip), %rdi movq %rax, %r12 testq %rax, %rax je .L204 movl $81120, %ecx movl $8122, %edx leaq .LC13(%rip), %rsi xorl %eax, %eax movl $2, %edi leaq h_wts(%rip), %r14 call __printf_chk@PLT movl $157000000, %esi leaq d_imgs_lin(%rip), %rdi call cudaMalloc@PLT movl $648960, %esi leaq d_wts(%rip), %rdi call cudaMalloc@PLT movl $864, %esi leaq dcwts(%rip), %rdi call cudaMalloc@PLT movl $648960, %esi leaq d_wts_saved(%rip), %rdi call cudaMalloc@PLT movl $256000, %esi leaq pix_spks_d(%rip), %rdi call cudaMalloc@PLT xorl %ecx, %ecx .L145: imulq $80, %rcx, %r15 leaq (%r15,%r14), %rax movl $10, %r15d movq %rax, 8(%rsp) .L146: movq 8(%rsp), %rdx xorl %eax, %eax movq %r13, %rdi movq %rcx, 16(%rsp) leaq .LC14(%rip), %rsi call __isoc23_fscanf@PLT addq $8, 8(%rsp) decl %r15d movq 16(%rsp), %rcx jne .L146 incq %rcx cmpq $8112, %rcx jne .L145 movq %r13, %rdi leaq c_wts(%rip), %r15 call fclose@PLT xorl %ecx, %ecx .L148: imulq $24, %rcx, %r13 leaq 0(%r13,%r15), %rax movl $3, %r13d movq %rax, 8(%rsp) .L149: movq 8(%rsp), %rdx xorl %eax, %eax movq %r12, %rdi movq %rcx, 16(%rsp) leaq .LC14(%rip), %rsi call __isoc23_fscanf@PLT addq $8, 8(%rsp) decl %r13d movq 16(%rsp), %rcx jne .L149 incq %rcx cmpq $36, %rcx jne .L148 movq %r12, %rdi leaq pix_spks_h(%rip), %r13 call fclose@PLT .L151: xorl %r12d, %r12d .L152: leaq (%r12,%r13), %rdx xorl %eax, %eax leaq .LC15(%rip), %rsi movq %rbp, %rdi call __isoc23_fscanf@PLT incq %r12 leaq 256000+pix_spks_h(%rip), %r9 cmpq $1000, %r12 jne .L152 addq $1000, %r13 cmpq %r9, %r13 jne .L151 movq %rbp, %rdi call fclose@PLT movl $1, %ecx movq pix_spks_d(%rip), %rdi movl $256000, %edx leaq pix_spks_h(%rip), %rsi call cudaMemcpy@PLT movq d_wts(%rip), %rdi movl $1, %ecx movq %r14, %rsi movl $648960, %edx call cudaMemcpy@PLT movq dcwts(%rip), %rdi movl $1, %ecx movq %r15, %rsi movl $864, %edx call cudaMemcpy@PLT xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $4294967297, %rdi movl $1, %esi movl $1, 248(%rsp) movq %rdi, %rdx movq %rdi, 240(%rsp) movq %rdi, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L154 movq dcwts(%rip), %rsi movq d_wts(%rip), %rdi call _Z34__device_stub__Z12initialize2DPdS_PdS_ .L154: call cudaDeviceSynchronize@PLT movq d_wts(%rip), %rdi xorl %ebp, %ebp call cudaFree@PLT movq dcwts(%rip), %rdi call cudaFree@PLT .L155: leaq test_set(%rip), %rax movl $785, %r13d leaq (%rax,%rbp,4), %r14 .L156: movq %r14, %rdx leaq .LC15(%rip), %rsi movq %rbx, %rdi xorl %eax, %eax call __isoc23_fscanf@PLT addq $4, %r14 decl %r13d jne .L156 addq $785, %rbp cmpq $39250000, %rbp jne .L155 movq %rbx, %rdi call fclose@PLT leaq img_lin(%rip), %rdi movq %rbp, %rcx leaq test_set(%rip), %rsi rep movsl movq d_imgs_lin(%rip), %rdi movl $1, %ecx movl $157000000, %edx leaq img_lin(%rip), %rsi call cudaMemcpy@PLT xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $4294967297, %rdi movl $1, %esi movl $1, 248(%rsp) movq %rdi, %rdx movq %rdi, 240(%rsp) movq %rdi, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L158 movq d_imgs_lin(%rip), %rdi call _Z34__device_stub__Z14img_readKernelPiPi .L158: call cudaThreadSynchronize@PLT movq d_imgs_lin(%rip), %rdi call cudaFree@PLT movl $2147483689, %eax xorl %r9d, %r9d xorl %r8d, %r8d addq %rax, %rax movl $1, %ecx movl $1, %esi movabsq $4294967297, %rdi movq %rax, 156(%rsp) movq %rdi, %rdx movabsq $42949673060, %rax movq %rax, 168(%rsp) subq $92, %rax movq %rax, 180(%rsp) movl $4194305, %eax salq $10, %rax movl $1, 164(%rsp) movl $1, 176(%rsp) movl $1, 188(%rsp) movq %rax, 192(%rsp) movl $1, 200(%rsp) movq %rdi, 240(%rsp) movl $1, 248(%rsp) movq %rdi, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L159 movq pix_spks_d(%rip), %rdi call _Z32__device_stub__Z12convert2SpksPhPh .L159: call cudaDeviceSynchronize@PLT movq pix_spks_d(%rip), %rdi xorl %r12d, %r12d call cudaFree@PLT movabsq $4294967297, %rax movl $1, 212(%rsp) movq %rax, 204(%rsp) movabsq $111669149722, %rax movq %rax, 216(%rsp) movl $1, 224(%rsp) call clock@PLT movq %rax, 24(%rsp) xorl %eax, %eax movq %rax, 16(%rsp) .L191: movl %r12d, %edx leaq .LC16(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movsd .LC2(%rip), %xmm1 movsd %xmm1, 8(%rsp) cmpl $2, %r12d jle .L160 movsd .LC3(%rip), %xmm2 leal -3(%r12), %eax movsd %xmm2, 8(%rsp) cmpl $14, %eax ja .L160 leaq CSWTCH.241(%rip), %rdx movsd (%rdx,%rax,8), %xmm3 movsd %xmm3, 8(%rsp) .L160: leaq test_set(%rip), %r15 xorl %r14d, %r14d movabsq $4294967306, %r13 movabsq $4294967297, %rbp .L185: movl (%r15), %ecx movl %r14d, %edx leaq .LC17(%rip), %rsi xorl %eax, %eax movl $2, %edi call __printf_chk@PLT xorl %r9d, %r9d xorl %r8d, %r8d movq %r13, %rdx movl $1, %ecx movq %rbp, %rdi movl $1, %esi movq %r13, 240(%rsp) movl $1, 248(%rsp) movq %rbp, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L161 movl %r14d, %edi call _Z27__device_stub__Z9createDesii .L161: movl 176(%rsp), %ecx xorl %r9d, %r9d xorl %r8d, %r8d movq 168(%rsp), %rdx movq 156(%rsp), %rdi movl 164(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L162 call _Z29__device_stub__Z10clear_varsvv .L162: call cudaDeviceSynchronize@PLT xorl %ebx, %ebx .L183: movl $268435505, %eax xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx salq $4, %rax movq %rbp, %rdi movl $1, %esi movl $1, 248(%rsp) movq %rax, %rdx movq %rax, 240(%rsp) movq %rbp, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L163 movl %ebx, %esi movl %r14d, %edi call _Z27__device_stub__Z8pix2spksiiii .L163: call cudaDeviceSynchronize@PLT movl 224(%rsp), %ecx xorl %r8d, %r8d movq 40(%rsp), %r9 movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L164 movl %ebx, %edi call _Z30__device_stub__Z11convKernel1ii .L164: movl 224(%rsp), %ecx movq 48(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L165 movl %ebx, %edi call _Z30__device_stub__Z11convKernel2ii .L165: movl 224(%rsp), %ecx movq 56(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L166 movl %ebx, %edi call _Z30__device_stub__Z11convKernel3ii .L166: movl 224(%rsp), %ecx movq 64(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L167 movl %ebx, %edi call _Z30__device_stub__Z11convKernel4ii .L167: movl 224(%rsp), %ecx movq 72(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L168 movl %ebx, %edi call _Z30__device_stub__Z11convKernel5ii .L168: movl 224(%rsp), %ecx movq 80(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L169 movl %ebx, %edi call _Z30__device_stub__Z11convKernel6ii .L169: movl 224(%rsp), %ecx movq 88(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L170 movl %ebx, %edi call _Z30__device_stub__Z11convKernel7ii .L170: movl 224(%rsp), %ecx movq 96(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L171 movl %ebx, %edi call _Z30__device_stub__Z11convKernel8ii .L171: movl 224(%rsp), %ecx movq 104(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L172 movl %ebx, %edi call _Z30__device_stub__Z11convKernel9ii .L172: movl 224(%rsp), %ecx movq 112(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L173 movl %ebx, %edi call _Z31__device_stub__Z12convKernel10ii .L173: movl 224(%rsp), %ecx movq 120(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L174 movl %ebx, %edi call _Z31__device_stub__Z12convKernel11ii .L174: movl 224(%rsp), %ecx movq 128(%rsp), %r9 xorl %r8d, %r8d movq 216(%rsp), %rdx movq 204(%rsp), %rdi movl 212(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L175 movl %ebx, %edi call _Z31__device_stub__Z12convKernel12ii .L175: call cudaDeviceSynchronize@PLT movl $4194305, %eax xorl %r9d, %r9d xorl %r8d, %r8d salq $10, %rax movl $536870913, %edi movl $1, %ecx movl $1, %esi salq $3, %rdi movq %rax, %rdx movq %rax, 240(%rsp) movl $1, 248(%rsp) movq %rdi, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L176 movl %ebx, %edi call _Z29__device_stub__Z10LifKernel1ii .L176: call cudaDeviceSynchronize@PLT movl 176(%rsp), %ecx xorl %r8d, %r8d movq 136(%rsp), %r9 movq 168(%rsp), %rdx movq 156(%rsp), %rdi movl 164(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L177 movl %ebx, %edi call _Z27__device_stub__Z9SynKernelii .L177: xorl %r8d, %r8d movq %r13, %rdx movl $1, %ecx movq %rbp, %rdi movq 144(%rsp), %r9 movl $1, %esi movq %r13, 240(%rsp) movl $1, 248(%rsp) movq %rbp, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L178 movl %ebx, %edi call _Z26__device_stub__Z8Lat_currii .L178: call cudaDeviceSynchronize@PLT movl 200(%rsp), %ecx xorl %r9d, %r9d movq 192(%rsp), %rdx movq 180(%rsp), %rdi movl 188(%rsp), %esi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L179 movl %ebx, %edi call _Z32__device_stub__Z13IsynRedKernelii .L179: xorl %r9d, %r9d xorl %r8d, %r8d movq %rbp, %rdx movl $1, %ecx movq %r13, %rdi movl $1, %esi movq %rbp, 240(%rsp) movl $1, 248(%rsp) movq %r13, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L180 movl %ebx, %edi call _Z25__device_stub__Z7reduce1ii .L180: call cudaDeviceSynchronize@PLT xorl %r9d, %r9d xorl %r8d, %r8d movq %r13, %rdx movl $1, %ecx movq %rbp, %rdi movl $1, %esi movq %r13, 240(%rsp) movl $1, 248(%rsp) movq %rbp, 228(%rsp) movl $1, 236(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L181 movl %ebx, %edi call _Z29__device_stub__Z10LifKernel2ii .L181: call cudaDeviceSynchronize@PLT movl 176(%rsp), %ecx xorl %r9d, %r9d movq 168(%rsp), %rdx movq 156(%rsp), %rdi movl 164(%rsp), %esi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L182 movsd 8(%rsp), %xmm0 movl %ebx, %edi call _Z30__device_stub__Z10CalcUpdateidid .L182: incl %ebx cmpl $1000, %ebx jne .L183 movl 176(%rsp), %ecx xorl %r9d, %r9d xorl %r8d, %r8d movq 168(%rsp), %rdx movq 156(%rsp), %rdi movl 164(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L184 call _Z24__device_stub__Z6WtUpdtvv .L184: incl %r14d addq $3140, %r15 cmpl $50000, %r14d jne .L185 call clock@PLT movq 24(%rsp), %rdi leaq 255(%rsp), %rbx movq %rax, %rsi call _Z8timediffll addq %rax, 16(%rsp) movq 16(%rsp), %rdx xorl %eax, %eax leaq .LC18(%rip), %rsi movl $2, %edi call __printf_chk@PLT movq %rbx, %rdi movl %r12d, %r8d movl $25, %edx leaq .LC19(%rip), %rcx movl $2, %esi xorl %eax, %eax call __sprintf_chk@PLT movq %rbx, %rdi leaq .LC20(%rip), %rsi call fopen@PLT movq %rax, %rbx testq %rax, %rax jne .L186 movl %r12d, %edx leaq .LC21(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L186: leaq .LC22(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl 176(%rsp), %ecx xorl %r9d, %r9d movq 168(%rsp), %rdx movq 156(%rsp), %rdi movl 164(%rsp), %esi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L187 movq d_wts_saved(%rip), %rdi call _Z25__device_stub__Z6cpyWtsPdPd .L187: movq d_wts_saved(%rip), %rsi leaq h_wts_saved(%rip), %r13 movl $2, %ecx xorl %ebp, %ebp movl $648960, %edx movq %r13, %rdi call cudaMemcpy@PLT .L188: imulq $80, %rbp, %rcx xorl %r15d, %r15d leaq 0(%r13,%rcx), %r14 .L189: movsd (%r14,%r15,8), %xmm0 movl $2, %esi movq %rbx, %rdi movb $1, %al leaq .LC23(%rip), %rdx incq %r15 call __fprintf_chk@PLT cmpq $10, %r15 jne .L189 leaq .LC24(%rip), %rdx movq %rbx, %rdi xorl %eax, %eax incq %rbp movl $2, %esi call __fprintf_chk@PLT cmpq $8112, %rbp jne .L188 movq %rbx, %rdi incl %r12d call fclose@PLT cmpl $20, %r12d jne .L191 movq d_wts_saved(%rip), %rdi call cudaFree@PLT call cudaDeviceReset@PLT movq 280(%rsp), %rax subq %fs:40, %rax je .L192 call __stack_chk_fail@PLT .L192: addq $296, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .section .rodata.str1.1 .LC27: .string "_Z12convKernel12i" .LC28: .string "_Z12convKernel11i" .LC29: .string "_Z12convKernel10i" .LC30: .string "_Z11convKernel9i" .LC31: .string "_Z11convKernel8i" .LC32: .string "_Z11convKernel7i" .LC33: .string "_Z11convKernel6i" .LC34: .string "_Z11convKernel5i" .LC35: .string "_Z11convKernel4i" .LC36: .string "_Z11convKernel3i" .LC37: .string "_Z11convKernel2i" .LC38: .string "_Z11convKernel1i" .LC39: .string "_Z12initialize2DPdS_" .LC40: .string "_Z6cpyWtsPd" .LC41: .string "_Z6WtUpdtv" .LC42: .string "_Z10CalcUpdateid" .LC43: .string "_Z7reduce1i" .LC44: .string "_Z13IsynRedKerneli" .LC45: .string "_Z8Lat_curri" .LC46: .string "_Z9SynKerneli" .LC47: .string "_Z10LifKernel2i" .LC48: .string "_Z10LifKernel1i" .LC49: .string "_Z10clear_varsv" .LC50: .string "_Z9createDesi" .LC51: .string "_Z8pix2spksii" .LC52: .string "_Z12convert2SpksPh" .LC53: .string "_Z14img_readKernelPi" .LC54: .string "d_imgs" .LC55: .string "img_spks" .LC56: .string "syn1" .LC57: .string "syn1s" .LC58: .string "syn" .LC59: .string "in_spk" .LC60: .string "Isyn" .LC61: .string "weight" .LC62: .string "Isyn_tot" .LC63: .string "Isyn_lat" .LC64: .string "I_lat" .LC65: .string "D_op" .LC66: .string "err" .LC67: .string "Y_op" .LC68: .string "del_w" .LC69: .string "ci" .LC70: .string "d_hat" .LC71: .string "cis" .LC72: .string "norm_dh" .LC73: .string "cil" .LC74: .string "cils" .LC75: .string "d_hat_sq" .LC76: .string "ref_time1" .LC77: .string "ref_time2" .LC78: .string "Vm1" .LC79: .string "Vm2" .LC80: .string "pix_spks" .LC81: .string "I_in" .LC82: .string "total_curr" .LC83: .string "total_dhatsq" .LC84: .string "w_conv1" .LC85: .string "w_conv2" .LC86: .string "w_conv3" .LC87: .string "w_conv4" .LC88: .string "w_conv5" .LC89: .string "w_conv6" .LC90: .string "w_conv7" .LC91: .string "w_conv8" .LC92: .string "w_conv9" .LC93: .string "w_conv10" .LC94: .string "w_conv11" .LC95: .string "w_conv12" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2108: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC27(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z12convKernel12i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC28(%rip), %rdx movq %rbx, %rdi leaq _Z12convKernel11i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC29(%rip), %rdx movq %rbx, %rdi leaq _Z12convKernel10i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC30(%rip), %rdx movq %rbx, %rdi leaq _Z11convKernel9i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC31(%rip), %rdx movq %rbx, %rdi leaq _Z11convKernel8i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC32(%rip), %rdx movq %rbx, %rdi leaq _Z11convKernel7i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC33(%rip), %rdx movq %rbx, %rdi leaq _Z11convKernel6i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC34(%rip), %rdx movq %rbx, %rdi leaq _Z11convKernel5i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi leaq .LC35(%rip), %rdx pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 32 leaq _Z11convKernel4i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC36(%rip), %rdx movq %rbx, %rdi leaq _Z11convKernel3i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC37(%rip), %rdx movq %rbx, %rdi leaq _Z11convKernel2i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC38(%rip), %rdx movq %rbx, %rdi leaq _Z11convKernel1i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC39(%rip), %rdx movq %rbx, %rdi leaq _Z12initialize2DPdS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC40(%rip), %rdx movq %rbx, %rdi leaq _Z6cpyWtsPd(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC41(%rip), %rdx movq %rbx, %rdi leaq _Z6WtUpdtv(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC42(%rip), %rdx movq %rbx, %rdi leaq _Z10CalcUpdateid(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi leaq .LC43(%rip), %rdx pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 32 leaq _Z7reduce1i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC44(%rip), %rdx movq %rbx, %rdi leaq _Z13IsynRedKerneli(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC45(%rip), %rdx movq %rbx, %rdi leaq _Z8Lat_curri(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC46(%rip), %rdx movq %rbx, %rdi leaq _Z9SynKerneli(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC47(%rip), %rdx movq %rbx, %rdi leaq _Z10LifKernel2i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC48(%rip), %rdx movq %rbx, %rdi leaq _Z10LifKernel1i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC49(%rip), %rdx movq %rbx, %rdi leaq _Z10clear_varsv(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC50(%rip), %rdx movq %rbx, %rdi leaq _Z9createDesi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi leaq .LC51(%rip), %rdx pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 32 leaq _Z8pix2spksii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC52(%rip), %rdx movq %rbx, %rdi leaq _Z12convert2SpksPh(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC53(%rip), %rdx movq %rbx, %rdi leaq _Z14img_readKernelPi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r8d, %r8d movq %rbx, %rdi pushq $0 .cfi_def_cfa_offset 24 leaq .LC54(%rip), %rdx movl $157000000, %r9d leaq _ZL6d_imgs(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC55(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $6272000, %r9d leaq _ZL8img_spks(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC56(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $2048, %r9d leaq _ZL4syn1(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC57(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $2048, %r9d leaq _ZL5syn1s(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC58(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $2048000, %r9d leaq _ZL3syn(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC59(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8112, %r9d leaq _ZL6in_spk(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC60(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $648960, %r9d leaq _ZL4Isyn(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC61(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $648960, %r9d leaq _ZL6weight(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC62(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $80, %r9d leaq _ZL8Isyn_tot(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC63(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $80, %r9d leaq _ZL8Isyn_lat(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC64(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $80, %r9d leaq _ZL5I_lat(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC65(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $10000, %r9d leaq _ZL4D_op(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC66(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $10, %r9d leaq _ZL3err(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC67(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $10, %r9d leaq _ZL4Y_op(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC68(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $648960, %r9d leaq _ZL5del_w(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC69(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $64896, %r9d leaq _ZL2ci(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC70(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $64896, %r9d leaq _ZL5d_hat(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC71(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $64896, %r9d leaq _ZL3cis(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC72(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $8, %r9d leaq _ZL7norm_dh(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC73(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $80, %r9d leaq _ZL3cil(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC74(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $80, %r9d leaq _ZL4cils(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC75(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $64896, %r9d leaq _ZL8d_hat_sq(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC76(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $32448, %r9d leaq _ZL9ref_time1(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC77(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $40, %r9d leaq _ZL9ref_time2(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC78(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $64896, %r9d leaq _ZL3Vm1(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC79(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $80, %r9d leaq _ZL3Vm2(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC80(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $256000, %r9d leaq _ZL8pix_spks(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC81(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $64896, %r9d leaq _ZL4I_in(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC82(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $640, %r9d leaq _ZL10total_curr(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC83(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $64, %r9d leaq _ZL12total_dhatsq(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC84(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv1(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC85(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv2(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC86(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv3(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC87(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv4(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC88(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv5(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC89(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv6(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC90(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv7(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC91(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv8(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC92(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL7w_conv9(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC93(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL8w_conv10(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC94(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $72, %r9d leaq _ZL8w_conv11(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC95(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $72, %r9d leaq _ZL8w_conv12(%rip), %rsi call __cudaRegisterVar@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2108: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .rodata .align 32 .type CSWTCH.241, @object .size CSWTCH.241, 120 CSWTCH.241: .long -640172613 .long 1037794527 .long -640172613 .long 1037794527 .long -640172613 .long 1037794527 .long -640172613 .long 1036745951 .long -640172613 .long 1036745951 .long -640172613 .long 1036745951 .long -640172613 .long 1035697375 .long -640172613 .long 1035697375 .long -640172613 .long 1035697375 .long -640172613 .long 1034648799 .long -640172613 .long 1034648799 .long -640172613 .long 1034648799 .long -640172613 .long 1033600223 .long -640172613 .long 1033600223 .long -640172613 .long 1033600223 .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl c_wts .bss .align 32 .type c_wts, @object .size c_wts, 864 c_wts: .zero 864 .globl d_wts_saved .align 8 .type d_wts_saved, @object .size d_wts_saved, 8 d_wts_saved: .zero 8 .globl h_wts_saved .align 32 .type h_wts_saved, @object .size h_wts_saved, 648960 h_wts_saved: .zero 648960 .globl dcwts .align 8 .type dcwts, @object .size dcwts, 8 dcwts: .zero 8 .globl d_wts .align 8 .type d_wts, @object .size d_wts, 8 d_wts: .zero 8 .globl h_wts .align 32 .type h_wts, @object .size h_wts, 648960 h_wts: .zero 648960 .local _ZL8w_conv12 .comm _ZL8w_conv12,72,32 .local _ZL8w_conv11 .comm _ZL8w_conv11,72,32 .local _ZL8w_conv10 .comm _ZL8w_conv10,72,32 .local _ZL7w_conv9 .comm _ZL7w_conv9,72,32 .local _ZL7w_conv8 .comm _ZL7w_conv8,72,32 .local _ZL7w_conv7 .comm _ZL7w_conv7,72,32 .local _ZL7w_conv6 .comm _ZL7w_conv6,72,32 .local _ZL7w_conv5 .comm _ZL7w_conv5,72,32 .local _ZL7w_conv4 .comm _ZL7w_conv4,72,32 .local _ZL7w_conv3 .comm _ZL7w_conv3,72,32 .local _ZL7w_conv2 .comm _ZL7w_conv2,72,32 .local _ZL7w_conv1 .comm _ZL7w_conv1,72,32 .local _ZL12total_dhatsq .comm _ZL12total_dhatsq,64,32 .local _ZL10total_curr .comm _ZL10total_curr,640,32 .local _ZL4I_in .comm _ZL4I_in,64896,32 .globl pixspks .align 32 .type pixspks, @object .size pixspks, 256000 pixspks: .zero 256000 .globl pix_spks_h .align 32 .type pix_spks_h, @object .size pix_spks_h, 256000 pix_spks_h: .zero 256000 .local _ZL8pix_spks .comm _ZL8pix_spks,256000,32 .local _ZL3Vm2 .comm _ZL3Vm2,80,32 .local _ZL3Vm1 .comm _ZL3Vm1,64896,32 .local _ZL9ref_time2 .comm _ZL9ref_time2,40,32 .local _ZL9ref_time1 .comm _ZL9ref_time1,32448,32 .local _ZL8d_hat_sq .comm _ZL8d_hat_sq,64896,32 .local _ZL4cils .comm _ZL4cils,80,32 .local _ZL3cil .comm _ZL3cil,80,32 .local _ZL7norm_dh .comm _ZL7norm_dh,8,8 .local _ZL3cis .comm _ZL3cis,64896,32 .local _ZL5d_hat .comm _ZL5d_hat,64896,32 .local _ZL2ci .comm _ZL2ci,64896,32 .local _ZL5del_w .comm _ZL5del_w,648960,32 .local _ZL4Y_op .comm _ZL4Y_op,10,8 .local _ZL3err .comm _ZL3err,10,8 .local _ZL4D_op .comm _ZL4D_op,10000,32 .local _ZL5I_lat .comm _ZL5I_lat,80,32 .local _ZL8Isyn_lat .comm _ZL8Isyn_lat,80,32 .local _ZL8Isyn_tot .comm _ZL8Isyn_tot,80,32 .local _ZL6weight .comm _ZL6weight,648960,32 .local _ZL4Isyn .comm _ZL4Isyn,648960,32 .local _ZL6in_spk .comm _ZL6in_spk,8112,32 .local _ZL3syn .comm _ZL3syn,2048000,32 .local _ZL5syn1s .comm _ZL5syn1s,2048,32 .local _ZL4syn1 .comm _ZL4syn1,2048,32 .local _ZL8img_spks .comm _ZL8img_spks,6272000,32 .local _ZL6d_imgs .comm _ZL6d_imgs,157000000,32 .globl test_set .align 32 .type test_set, @object .size test_set, 157000000 test_set: .zero 157000000 .globl img_lin .align 32 .type img_lin, @object .size img_lin, 157000000 img_lin: .zero 157000000 .globl d_imgs_lin .align 8 .type d_imgs_lin, @object .size d_imgs_lin, 8 d_imgs_lin: .zero 8 .globl pix_spks_d .align 8 .type pix_spks_d, @object .size pix_spks_d, 8 pix_spks_d: .zero 8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC0: .long 0 .long 1093567616 .align 8 .LC1: .long 0 .long 1083129856 .align 8 .LC2: .long -640172613 .long 1038843103 .align 8 .LC3: .long -640172613 .long 1032551647 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z12convKernel12i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x148] ; /* 0x01005200001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x14c] ; /* 0x01005300001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0xe860], R2 ; /* 0x00e8600204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z12convKernel11i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x140] ; /* 0x01005000001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x144] ; /* 0x01005100001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0xd340], R2 ; /* 0x00d3400204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z12convKernel10i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x138] ; /* 0x01004e00001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x13c] ; /* 0x01004f00001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0xbe20], R2 ; /* 0x00be200204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel9i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x130] ; /* 0x01004c00001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x134] ; /* 0x01004d00001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0xa900], R2 ; /* 0x00a9000204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel8i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x128] ; /* 0x01004a00001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x12c] ; /* 0x01004b00001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0x93e0], R2 ; /* 0x0093e00204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel7i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x120] ; /* 0x01004800001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x124] ; /* 0x01004900001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0x7ec0], R2 ; /* 0x007ec00204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel6i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x118] ; /* 0x01004600001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x11c] ; /* 0x01004700001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0x69a0], R2 ; /* 0x0069a00204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel5i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x110] ; /* 0x01004400001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x114] ; /* 0x01004500001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0x5480], R2 ; /* 0x0054800204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel4i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x108] ; /* 0x01004200001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x10c] ; /* 0x01004300001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0x3f60], R2 ; /* 0x003f600204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel3i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0x100] ; /* 0x01004000001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0x104] ; /* 0x01004100001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0x2a40], R2 ; /* 0x002a400204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel2i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0xf8] ; /* 0x01003e00001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0xfc] ; /* 0x01003f00001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64+0x1520], R2 ; /* 0x0015200204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z11convKernel1i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0030*/ S2R R23, SR_TID.X ; /* 0x0000000000177919 */ /* 0x000e680000002100 */ /*0040*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x19, PT ; /* 0x000000190000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R23, R2, c[0x0][0x0], R23 ; /* 0x0000000002177a24 */ /* 0x002fca00078e0217 */ /*0080*/ ISETP.GT.OR P0, PT, R23, 0x19, P0 ; /* 0x000000191700780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x1f40 ; /* 0x00001f4000157802 */ /* 0x000fe20000000f00 */ /*00b0*/ IMAD R20, R23, 0x1c, R0 ; /* 0x0000001c17147824 */ /* 0x000fe200078e0200 */ /*00c0*/ MOV R30, c[0x4][0xf0] ; /* 0x01003c00001e7a02 */ /* 0x000fe20000000f00 */ /*00d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00e0*/ MOV R31, c[0x4][0xf4] ; /* 0x01003d00001f7a02 */ /* 0x000fe20000000f00 */ /*00f0*/ IMAD.WIDE R20, R20, R21, c[0x4][0x8] ; /* 0x0100020014147625 */ /* 0x000fe200078e0215 */ /*0100*/ MOV R3, c[0x0][0x160] ; /* 0x0000580000037a02 */ /* 0x000fc60000000f00 */ /*0110*/ LDG.E.64 R4, [R30.64] ; /* 0x000000041e047981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ IMAD.WIDE R20, R3, 0x8, R20 ; /* 0x0000000803147825 */ /* 0x000fe400078e0214 */ /*0130*/ LDG.E.64 R26, [R30.64+0x8] ; /* 0x000008041e1a7981 */ /* 0x000ee8000c1e1b00 */ /*0140*/ LDG.E.64 R8, [R20.64] ; /* 0x0000000414087981 */ /* 0x000f28000c1e1b00 */ /*0150*/ LDG.E.64 R28, [R20.64+0x1f40] ; /* 0x001f4004141c7981 */ /* 0x000f68000c1e1b00 */ /*0160*/ LDG.E.64 R2, [R30.64+0x10] ; /* 0x000010041e027981 */ /* 0x000f68000c1e1b00 */ /*0170*/ LDG.E.64 R18, [R20.64+0x3e80] ; /* 0x003e800414127981 */ /* 0x000f68000c1e1b00 */ /*0180*/ LDG.E.64 R14, [R30.64+0x18] ; /* 0x000018041e0e7981 */ /* 0x000f68000c1e1b00 */ /*0190*/ LDG.E.64 R16, [R20.64+0x36b00] ; /* 0x036b000414107981 */ /* 0x000f68000c1e1b00 */ /*01a0*/ LDG.E.64 R10, [R30.64+0x20] ; /* 0x000020041e0a7981 */ /* 0x000f68000c1e1b00 */ /*01b0*/ LDG.E.64 R12, [R20.64+0x38a40] ; /* 0x038a4004140c7981 */ /* 0x000f68000c1e1b00 */ /*01c0*/ LDG.E.64 R6, [R30.64+0x28] ; /* 0x000028041e067981 */ /* 0x000f68000c1e1b00 */ /*01d0*/ LDG.E.64 R32, [R30.64+0x40] ; /* 0x000040041e207981 */ /* 0x000f68000c1e1b00 */ /*01e0*/ LDG.E.64 R34, [R20.64+0x6f540] ; /* 0x06f5400414227981 */ /* 0x000f68000c1e1b00 */ /*01f0*/ LDG.E.64 R36, [R20.64+0x71480] ; /* 0x0714800414247981 */ /* 0x000f62000c1e1b00 */ /*0200*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x004f080000000000 */ /*0210*/ DMUL R26, R26, c[0x2][0x0] ; /* 0x008000001a1a7a28 */ /* 0x008fc80000000000 */ /*0220*/ DFMA R24, R4, R8, RZ ; /* 0x000000080418722b */ /* 0x01016400000000ff */ /*0230*/ LDG.E.64 R8, [R20.64+0x3a980] ; /* 0x03a9800414087981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ LDG.E.64 R4, [R30.64+0x30] ; /* 0x000030041e047981 */ /* 0x000ee2000c1e1b00 */ /*0250*/ DFMA R28, R26, R28, R24 ; /* 0x0000001c1a1c722b */ /* 0x0201c60000000018 */ /*0260*/ LDG.E.64 R26, [R20.64+0x6d600] ; /* 0x06d60004141a7981 */ /* 0x001f28000c1e1b00 */ /*0270*/ LDG.E.64 R24, [R30.64+0x38] ; /* 0x000038041e187981 */ /* 0x000f62000c1e1b00 */ /*0280*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x000e080000000000 */ /*0290*/ DMUL R14, R14, c[0x2][0x0] ; /* 0x008000000e0e7a28 */ /* 0x000fc80000000000 */ /*02a0*/ DFMA R2, R2, R18, R28 ; /* 0x000000120202722b */ /* 0x001e08000000001c */ /*02b0*/ DMUL R10, R10, c[0x2][0x0] ; /* 0x008000000a0a7a28 */ /* 0x000fc80000000000 */ /*02c0*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x001e080000000002 */ /*02d0*/ DMUL R6, R6, c[0x2][0x0] ; /* 0x0080000006067a28 */ /* 0x000fc80000000000 */ /*02e0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e880000000002 */ /*02f0*/ DMUL R32, R32, c[0x2][0x0] ; /* 0x0080000020207a28 */ /* 0x000fc80000000000 */ /*0300*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x004fc80000000002 */ /*0310*/ DMUL R4, R4, c[0x2][0x0] ; /* 0x0080000004047a28 */ /* 0x008f0c0000000000 */ /*0320*/ DFMA R2, R4, R26, R2 ; /* 0x0000001a0402722b */ /* 0x0101c80000000002 */ /*0330*/ DMUL R24, R24, c[0x2][0x0] ; /* 0x0080000018187a28 */ /* 0x020e620000000000 */ /*0340*/ MOV R5, 0x8 ; /* 0x0000000800057802 */ /* 0x001fe20000000f00 */ /*0350*/ IMAD R4, R23, 0x1a, R0 ; /* 0x0000001a17047824 */ /* 0x000fc800078e0200 */ /*0360*/ DFMA R2, R24, R34, R2 ; /* 0x000000221802722b */ /* 0x002e220000000002 */ /*0370*/ IMAD.WIDE R4, R4, R5, c[0x4][0xd8] ; /* 0x0100360004047625 */ /* 0x000fca00078e0205 */ /*0380*/ DFMA R2, R32, R36, R2 ; /* 0x000000242002722b */ /* 0x001e0e0000000002 */ /*0390*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */ /* 0x001fe2000c101b04 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z12initialize2DPdS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R12, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff0c7624 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IMAD.MOV.U32 R13, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff0d7624 */ /* 0x000fe400078e00ff */ /*0040*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe400078e00ff */ /*0050*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x4][0x38] ; /* 0x01000e00ff0a7624 */ /* 0x000fe400078e00ff */ /*0060*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x4][0x3c] ; /* 0x01000f00ff0b7624 */ /* 0x000fe400078e00ff */ /*0070*/ MOV R4, R12 ; /* 0x0000000c00047202 */ /* 0x000fe20000000f00 */ /*0080*/ IMAD.MOV.U32 R5, RZ, RZ, R13 ; /* 0x000000ffff057224 */ /* 0x000fca00078e000d */ /*0090*/ LDG.E.64 R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x010ea2000c1e1b00 */ /*00a0*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ; /* 0x000000ffff027224 */ /* 0x000fe400078e000a */ /*00b0*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */ /* 0x000fca00078e000b */ /*00c0*/ STG.E.64 [R2.64], R6 ; /* 0x0000000602007986 */ /* 0x0041e8000c101b04 */ /*00d0*/ LDG.E.64 R8, [R4.64+0x8] ; /* 0x0000080404087981 */ /* 0x000ea8000c1e1b00 */ /*00e0*/ STG.E.64 [R2.64+0x8], R8 ; /* 0x0000080802007986 */ /* 0x0043e8000c101b04 */ /*00f0*/ LDG.E.64 R10, [R4.64+0x10] ; /* 0x00001004040a7981 */ /* 0x000ea8000c1e1b00 */ /*0100*/ STG.E.64 [R2.64+0x10], R10 ; /* 0x0000100a02007986 */ /* 0x0045e8000c101b04 */ /*0110*/ LDG.E.64 R12, [R4.64+0x18] ; /* 0x00001804040c7981 */ /* 0x000ee8000c1e1b00 */ /*0120*/ STG.E.64 [R2.64+0x18], R12 ; /* 0x0000180c02007986 */ /* 0x0087e8000c101b04 */ /*0130*/ LDG.E.64 R14, [R4.64+0x20] ; /* 0x00002004040e7981 */ /* 0x000f28000c1e1b00 */ /*0140*/ STG.E.64 [R2.64+0x20], R14 ; /* 0x0000200e02007986 */ /* 0x0109e8000c101b04 */ /*0150*/ LDG.E.64 R16, [R4.64+0x28] ; /* 0x0000280404107981 */ /* 0x000f68000c1e1b00 */ /*0160*/ STG.E.64 [R2.64+0x28], R16 ; /* 0x0000281002007986 */ /* 0x020be8000c101b04 */ /*0170*/ LDG.E.64 R6, [R4.64+0x30] ; /* 0x0000300404067981 */ /* 0x001ea8000c1e1b00 */ /*0180*/ STG.E.64 [R2.64+0x30], R6 ; /* 0x0000300602007986 */ /* 0x0041e8000c101b04 */ /*0190*/ LDG.E.64 R8, [R4.64+0x38] ; /* 0x0000380404087981 */ /* 0x002ea8000c1e1b00 */ /*01a0*/ STG.E.64 [R2.64+0x38], R8 ; /* 0x0000380802007986 */ /* 0x0043e8000c101b04 */ /*01b0*/ LDG.E.64 R10, [R4.64+0x40] ; /* 0x00004004040a7981 */ /* 0x000ea8000c1e1b00 */ /*01c0*/ STG.E.64 [R2.64+0x40], R10 ; /* 0x0000400a02007986 */ /* 0x0045e8000c101b04 */ /*01d0*/ LDG.E.64 R12, [R4.64+0x48] ; /* 0x00004804040c7981 */ /* 0x008ee8000c1e1b00 */ /*01e0*/ STG.E.64 [R2.64+0x48], R12 ; /* 0x0000480c02007986 */ /* 0x0087e8000c101b04 */ /*01f0*/ LDG.E.64 R14, [R4.64+0x50] ; /* 0x00005004040e7981 */ /* 0x010f28000c1e1b00 */ /*0200*/ STG.E.64 [R2.64+0x50], R14 ; /* 0x0000500e02007986 */ /* 0x0109e8000c101b04 */ /*0210*/ LDG.E.64 R16, [R4.64+0x58] ; /* 0x0000580404107981 */ /* 0x020f68000c1e1b00 */ /*0220*/ STG.E.64 [R2.64+0x58], R16 ; /* 0x0000581002007986 */ /* 0x020be8000c101b04 */ /*0230*/ LDG.E.64 R6, [R4.64+0x60] ; /* 0x0000600404067981 */ /* 0x001ea8000c1e1b00 */ /*0240*/ STG.E.64 [R2.64+0x60], R6 ; /* 0x0000600602007986 */ /* 0x0041e8000c101b04 */ /*0250*/ LDG.E.64 R8, [R4.64+0x68] ; /* 0x0000680404087981 */ /* 0x002ea8000c1e1b00 */ /*0260*/ STG.E.64 [R2.64+0x68], R8 ; /* 0x0000680802007986 */ /* 0x0043e8000c101b04 */ /*0270*/ LDG.E.64 R10, [R4.64+0x70] ; /* 0x00007004040a7981 */ /* 0x000ea8000c1e1b00 */ /*0280*/ STG.E.64 [R2.64+0x70], R10 ; /* 0x0000700a02007986 */ /* 0x0045e8000c101b04 */ /*0290*/ LDG.E.64 R12, [R4.64+0x78] ; /* 0x00007804040c7981 */ /* 0x008ee8000c1e1b00 */ /*02a0*/ STG.E.64 [R2.64+0x78], R12 ; /* 0x0000780c02007986 */ /* 0x0087e8000c101b04 */ /*02b0*/ LDG.E.64 R14, [R4.64+0x80] ; /* 0x00008004040e7981 */ /* 0x010f28000c1e1b00 */ /*02c0*/ STG.E.64 [R2.64+0x80], R14 ; /* 0x0000800e02007986 */ /* 0x0109e8000c101b04 */ /*02d0*/ LDG.E.64 R16, [R4.64+0x88] ; /* 0x0000880404107981 */ /* 0x020f68000c1e1b00 */ /*02e0*/ STG.E.64 [R2.64+0x88], R16 ; /* 0x0000881002007986 */ /* 0x0209e8000c101b04 */ /*02f0*/ LDG.E.64 R6, [R4.64+0x90] ; /* 0x0000900404067981 */ /* 0x001f62000c1e1b00 */ /*0300*/ IADD3 R0, R0, 0x2, RZ ; /* 0x0000000200007810 */ /* 0x000fc80007ffe0ff */ /*0310*/ ISETP.NE.AND P0, PT, R0, 0x1fb0, PT ; /* 0x00001fb00000780c */ /* 0x000fe20003f05270 */ /*0320*/ STG.E.64 [R2.64+0x90], R6 ; /* 0x0000900602007986 */ /* 0x0209e8000c101b04 */ /*0330*/ LDG.E.64 R8, [R4.64+0x98] ; /* 0x0000980404087981 */ /* 0x002f62000c1e1b00 */ /*0340*/ IADD3 R10, P1, R2, 0xa0, RZ ; /* 0x000000a0020a7810 */ /* 0x004fe40007f3e0ff */ /*0350*/ IADD3 R12, P2, R4, 0xa0, RZ ; /* 0x000000a0040c7810 */ /* 0x008fc60007f5e0ff */ /*0360*/ IMAD.X R11, RZ, RZ, R3, P1 ; /* 0x000000ffff0b7224 */ /* 0x000fe400008e0603 */ /*0370*/ IMAD.X R13, RZ, RZ, R5, P2 ; /* 0x000000ffff0d7224 */ /* 0x000fe200010e0605 */ /*0380*/ STG.E.64 [R2.64+0x98], R8 ; /* 0x0000980802007986 */ /* 0x0209e2000c101b04 */ /*0390*/ @P0 BRA 0x70 ; /* 0xfffffcd000000947 */ /* 0x000fea000383ffff */ /*03a0*/ IMAD.MOV.U32 R28, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff1c7624 */ /* 0x000fe200078e00ff */ /*03b0*/ MOV R29, c[0x0][0x16c] ; /* 0x00005b00001d7a02 */ /* 0x000fe20000000f00 */ /*03c0*/ IMAD.MOV.U32 R27, RZ, RZ, RZ ; /* 0x000000ffff1b7224 */ /* 0x000fe200078e00ff */ /*03d0*/ MOV R10, c[0x4][0x100] ; /* 0x01004000000a7a02 */ /* 0x000fe20000000f00 */ /*03e0*/ IMAD.MOV.U32 R26, RZ, RZ, c[0x4][0xf0] ; /* 0x01003c00ff1a7624 */ /* 0x000fe200078e00ff */ /*03f0*/ MOV R4, c[0x4][0x110] ; /* 0x0100440000047a02 */ /* 0x000fe20000000f00 */ /*0400*/ IMAD.MOV.U32 R13, RZ, RZ, c[0x4][0xf4] ; /* 0x01003d00ff0d7624 */ /* 0x000fe200078e00ff */ /*0410*/ MOV R18, c[0x4][0x120] ; /* 0x0100480000127a02 */ /* 0x000fe20000000f00 */ /*0420*/ IMAD.MOV.U32 R12, RZ, RZ, c[0x4][0xf8] ; /* 0x01003e00ff0c7624 */ /* 0x000fe200078e00ff */ /*0430*/ MOV R24, c[0x4][0x130] ; /* 0x01004c0000187a02 */ /* 0x000fe20000000f00 */ /*0440*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x4][0xfc] ; /* 0x01003f00ff0b7624 */ /* 0x000fc400078e00ff */ /*0450*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x4][0x104] ; /* 0x01004100ff097624 */ /* 0x010fe400078e00ff */ /*0460*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x4][0x108] ; /* 0x01004200ff087624 */ /* 0x000fe400078e00ff */ /*0470*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x4][0x10c] ; /* 0x01004300ff077624 */ /* 0x000fe400078e00ff */ /*0480*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x4][0x148] ; /* 0x01005200ff067624 */ /* 0x000fe400078e00ff */ /*0490*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x14c] ; /* 0x01005300ff057624 */ /* 0x000fe400078e00ff */ /*04a0*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x4][0x114] ; /* 0x01004500ff037624 */ /* 0x000fc400078e00ff */ /*04b0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x4][0x118] ; /* 0x01004600ff027624 */ /* 0x000fe400078e00ff */ /*04c0*/ IMAD.MOV.U32 R15, RZ, RZ, c[0x4][0x11c] ; /* 0x01004700ff0f7624 */ /* 0x000fe400078e00ff */ /*04d0*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x4][0x140] ; /* 0x01005000ff007624 */ /* 0x000fe400078e00ff */ /*04e0*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x4][0x144] ; /* 0x01005100ff117624 */ /* 0x000fe400078e00ff */ /*04f0*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x4][0x124] ; /* 0x01004900ff137624 */ /* 0x000fe400078e00ff */ /*0500*/ IMAD.MOV.U32 R20, RZ, RZ, c[0x4][0x128] ; /* 0x01004a00ff147624 */ /* 0x000fc400078e00ff */ /*0510*/ IMAD.MOV.U32 R21, RZ, RZ, c[0x4][0x12c] ; /* 0x01004b00ff157624 */ /* 0x000fe400078e00ff */ /*0520*/ IMAD.MOV.U32 R22, RZ, RZ, c[0x4][0x138] ; /* 0x01004e00ff167624 */ /* 0x000fe400078e00ff */ /*0530*/ IMAD.MOV.U32 R23, RZ, RZ, c[0x4][0x13c] ; /* 0x01004f00ff177624 */ /* 0x000fe400078e00ff */ /*0540*/ IMAD.MOV.U32 R25, RZ, RZ, c[0x4][0x134] ; /* 0x01004d00ff197624 */ /* 0x000fe400078e00ff */ /*0550*/ ISETP.GE.U32.AND P0, PT, R27, 0x3, PT ; /* 0x000000031b00780c */ /* 0x000fe20003f06070 */ /*0560*/ LDG.E.64 R38, [R28.64] ; /* 0x000000041c267981 */ /* 0x000162000c1e1b00 */ /*0570*/ IMAD.MOV.U32 R42, RZ, RZ, R26 ; /* 0x000000ffff2a7224 */ /* 0x000fe200078e001a */ /*0580*/ MOV R36, R10 ; /* 0x0000000a00247202 */ /* 0x000fe20000000f00 */ /*0590*/ IMAD.MOV.U32 R43, RZ, RZ, R13 ; /* 0x000000ffff2b7224 */ /* 0x000fe200078e000d */ /*05a0*/ MOV R30, R4 ; /* 0x00000004001e7202 */ /* 0x000fe20000000f00 */ /*05b0*/ IMAD.MOV.U32 R40, RZ, RZ, R12 ; /* 0x000000ffff287224 */ /* 0x000fc400078e000c */ /*05c0*/ IMAD.MOV.U32 R41, RZ, RZ, R11 ; /* 0x000000ffff297224 */ /* 0x000fe400078e000b */ /*05d0*/ IMAD.MOV.U32 R37, RZ, RZ, R9 ; /* 0x000000ffff257224 */ /* 0x000fe400078e0009 */ /*05e0*/ IMAD.MOV.U32 R34, RZ, RZ, R8 ; /* 0x000000ffff227224 */ /* 0x000fe400078e0008 */ /*05f0*/ IMAD.MOV.U32 R35, RZ, RZ, R7 ; /* 0x000000ffff237224 */ /* 0x000fe400078e0007 */ /*0600*/ IMAD.MOV.U32 R32, RZ, RZ, R6 ; /* 0x000000ffff207224 */ /* 0x000fe400078e0006 */ /*0610*/ IMAD.MOV.U32 R33, RZ, RZ, R5 ; /* 0x000000ffff217224 */ /* 0x000fc400078e0005 */ /*0620*/ IMAD.MOV.U32 R31, RZ, RZ, R3 ; /* 0x000000ffff1f7224 */ /* 0x000fe400078e0003 */ /*0630*/ IMAD.MOV.U32 R14, RZ, RZ, R2 ; /* 0x000000ffff0e7224 */ /* 0x000fe400078e0002 */ /*0640*/ IMAD.MOV.U32 R16, RZ, RZ, R0 ; /* 0x000000ffff107224 */ /* 0x000fe200078e0000 */ /*0650*/ @!P0 BRA 0xdc0 ; /* 0x0000076000008947 */ /* 0x000fea0003800000 */ /*0660*/ ISETP.GE.U32.AND P0, PT, R27, 0x6, PT ; /* 0x000000061b00780c */ /* 0x001fda0003f06070 */ /*0670*/ @!P0 BRA 0x8c0 ; /* 0x0000024000008947 */ /* 0x000fea0003800000 */ /*0680*/ ISETP.GE.U32.AND P1, PT, R27, 0x9, PT ; /* 0x000000091b00780c */ /* 0x000fda0003f26070 */ /*0690*/ @!P1 BRA 0x8a0 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*06a0*/ ISETP.GE.U32.AND P1, PT, R27, 0xc, PT ; /* 0x0000000c1b00780c */ /* 0x000fda0003f26070 */ /*06b0*/ @!P1 BRA 0x880 ; /* 0x000001c000009947 */ /* 0x000fea0003800000 */ /*06c0*/ ISETP.GE.U32.AND P1, PT, R27, 0xf, PT ; /* 0x0000000f1b00780c */ /* 0x000fda0003f26070 */ /*06d0*/ @!P1 BRA 0x860 ; /* 0x0000018000009947 */ /* 0x000fea0003800000 */ /*06e0*/ ISETP.GE.U32.AND P1, PT, R27, 0x12, PT ; /* 0x000000121b00780c */ /* 0x000fda0003f26070 */ /*06f0*/ @!P1 BRA 0x840 ; /* 0x0000014000009947 */ /* 0x000fea0003800000 */ /*0700*/ ISETP.GE.U32.AND P1, PT, R27, 0x15, PT ; /* 0x000000151b00780c */ /* 0x000fda0003f26070 */ /*0710*/ @!P1 BRA 0x820 ; /* 0x0000010000009947 */ /* 0x000fea0003800000 */ /*0720*/ ISETP.GE.U32.AND P1, PT, R27, 0x18, PT ; /* 0x000000181b00780c */ /* 0x000fda0003f26070 */ /*0730*/ @!P1 BRA 0x800 ; /* 0x000000c000009947 */ /* 0x000fea0003800000 */ /*0740*/ ISETP.GE.U32.AND P1, PT, R27, 0x1b, PT ; /* 0x0000001b1b00780c */ /* 0x000fda0003f26070 */ /*0750*/ @!P1 BRA 0x7e0 ; /* 0x0000008000009947 */ /* 0x000fea0003800000 */ /*0760*/ ISETP.GE.U32.AND P1, PT, R27, 0x1e, PT ; /* 0x0000001e1b00780c */ /* 0x000fda0003f26070 */ /*0770*/ @!P1 BRA 0x7c0 ; /* 0x0000004000009947 */ /* 0x000fea0003800000 */ /*0780*/ ISETP.GE.U32.AND P1, PT, R27, 0x21, PT ; /* 0x000000211b00780c */ /* 0x000fda0003f26070 */ /*0790*/ @P1 STG.E.64 [R32.64+-0x318], R38 ; /* 0xfffce82620001986 */ /* 0x0201e8000c101b04 */ /*07a0*/ @!P1 STG.E.64 [R16.64+-0x2d0], R38 ; /* 0xfffd302610009986 */ /* 0x0001e2000c101b04 */ /*07b0*/ BRA 0x8d0 ; /* 0x0000011000007947 */ /* 0x000fea0003800000 */ /*07c0*/ STG.E.64 [R22.64+-0x288], R38 ; /* 0xfffd782616007986 */ /* 0x0201e2000c101b04 */ /*07d0*/ BRA 0x8d0 ; /* 0x000000f000007947 */ /* 0x000fea0003800000 */ /*07e0*/ STG.E.64 [R24.64+-0x240], R38 ; /* 0xfffdc02618007986 */ /* 0x0201e2000c101b04 */ /*07f0*/ BRA 0x8d0 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*0800*/ STG.E.64 [R20.64+-0x1f8], R38 ; /* 0xfffe082614007986 */ /* 0x0201e2000c101b04 */ /*0810*/ BRA 0x8d0 ; /* 0x000000b000007947 */ /* 0x000fea0003800000 */ /*0820*/ STG.E.64 [R18.64+-0x1b0], R38 ; /* 0xfffe502612007986 */ /* 0x0201e2000c101b04 */ /*0830*/ BRA 0x8d0 ; /* 0x0000009000007947 */ /* 0x000fea0003800000 */ /*0840*/ STG.E.64 [R14.64+-0x168], R38 ; /* 0xfffe98260e007986 */ /* 0x0201e2000c101b04 */ /*0850*/ BRA 0x8d0 ; /* 0x0000007000007947 */ /* 0x000fea0003800000 */ /*0860*/ STG.E.64 [R30.64+-0x120], R38 ; /* 0xfffee0261e007986 */ /* 0x0201e2000c101b04 */ /*0870*/ BRA 0x8d0 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0880*/ STG.E.64 [R34.64+-0xd8], R38 ; /* 0xffff282622007986 */ /* 0x0201e2000c101b04 */ /*0890*/ BRA 0x8d0 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*08a0*/ STG.E.64 [R36.64+-0x90], R38 ; /* 0xffff702624007986 */ /* 0x0201e2000c101b04 */ /*08b0*/ BRA 0x8d0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*08c0*/ STG.E.64 [R40.64+-0x48], R38 ; /* 0xffffb82628007986 */ /* 0x0201e4000c101b04 */ /*08d0*/ LDG.E.64 R2, [R28.64+0x8] ; /* 0x000008041c027981 */ /* 0x000362000c1e1b00 */ /*08e0*/ @!P0 BRA 0xb30 ; /* 0x0000024000008947 */ /* 0x000fea0003800000 */ /*08f0*/ ISETP.GE.U32.AND P1, PT, R27, 0x9, PT ; /* 0x000000091b00780c */ /* 0x000fda0003f26070 */ /*0900*/ @!P1 BRA 0xb10 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*0910*/ ISETP.GE.U32.AND P1, PT, R27, 0xc, PT ; /* 0x0000000c1b00780c */ /* 0x000fda0003f26070 */ /*0920*/ @!P1 BRA 0xaf0 ; /* 0x000001c000009947 */ /* 0x000fea0003800000 */ /*0930*/ ISETP.GE.U32.AND P1, PT, R27, 0xf, PT ; /* 0x0000000f1b00780c */ /* 0x000fda0003f26070 */ /*0940*/ @!P1 BRA 0xad0 ; /* 0x0000018000009947 */ /* 0x000fea0003800000 */ /*0950*/ ISETP.GE.U32.AND P1, PT, R27, 0x12, PT ; /* 0x000000121b00780c */ /* 0x000fda0003f26070 */ /*0960*/ @!P1 BRA 0xab0 ; /* 0x0000014000009947 */ /* 0x000fea0003800000 */ /*0970*/ ISETP.GE.U32.AND P1, PT, R27, 0x15, PT ; /* 0x000000151b00780c */ /* 0x000fda0003f26070 */ /*0980*/ @!P1 BRA 0xa90 ; /* 0x0000010000009947 */ /* 0x000fea0003800000 */ /*0990*/ ISETP.GE.U32.AND P1, PT, R27, 0x18, PT ; /* 0x000000181b00780c */ /* 0x000fda0003f26070 */ /*09a0*/ @!P1 BRA 0xa70 ; /* 0x000000c000009947 */ /* 0x000fea0003800000 */ /*09b0*/ ISETP.GE.U32.AND P1, PT, R27, 0x1b, PT ; /* 0x0000001b1b00780c */ /* 0x000fda0003f26070 */ /*09c0*/ @!P1 BRA 0xa50 ; /* 0x0000008000009947 */ /* 0x000fea0003800000 */ /*09d0*/ ISETP.GE.U32.AND P1, PT, R27, 0x1e, PT ; /* 0x0000001e1b00780c */ /* 0x000fda0003f26070 */ /*09e0*/ @!P1 BRA 0xa30 ; /* 0x0000004000009947 */ /* 0x000fea0003800000 */ /*09f0*/ ISETP.GE.U32.AND P1, PT, R27, 0x21, PT ; /* 0x000000211b00780c */ /* 0x000fda0003f26070 */ /*0a00*/ @P1 STG.E.64 [R32.64+-0x310], R2 ; /* 0xfffcf00220001986 */ /* 0x0205e8000c101b04 */ /*0a10*/ @!P1 STG.E.64 [R16.64+-0x2c8], R2 ; /* 0xfffd380210009986 */ /* 0x0005e2000c101b04 */ /*0a20*/ BRA 0xb40 ; /* 0x0000011000007947 */ /* 0x000fea0003800000 */ /*0a30*/ STG.E.64 [R22.64+-0x280], R2 ; /* 0xfffd800216007986 */ /* 0x0205e2000c101b04 */ /*0a40*/ BRA 0xb40 ; /* 0x000000f000007947 */ /* 0x000fea0003800000 */ /*0a50*/ STG.E.64 [R24.64+-0x238], R2 ; /* 0xfffdc80218007986 */ /* 0x0205e2000c101b04 */ /*0a60*/ BRA 0xb40 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*0a70*/ STG.E.64 [R20.64+-0x1f0], R2 ; /* 0xfffe100214007986 */ /* 0x0205e2000c101b04 */ /*0a80*/ BRA 0xb40 ; /* 0x000000b000007947 */ /* 0x000fea0003800000 */ /*0a90*/ STG.E.64 [R18.64+-0x1a8], R2 ; /* 0xfffe580212007986 */ /* 0x0205e2000c101b04 */ /*0aa0*/ BRA 0xb40 ; /* 0x0000009000007947 */ /* 0x000fea0003800000 */ /*0ab0*/ STG.E.64 [R14.64+-0x160], R2 ; /* 0xfffea0020e007986 */ /* 0x0205e2000c101b04 */ /*0ac0*/ BRA 0xb40 ; /* 0x0000007000007947 */ /* 0x000fea0003800000 */ /*0ad0*/ STG.E.64 [R30.64+-0x118], R2 ; /* 0xfffee8021e007986 */ /* 0x0205e2000c101b04 */ /*0ae0*/ BRA 0xb40 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0af0*/ STG.E.64 [R34.64+-0xd0], R2 ; /* 0xffff300222007986 */ /* 0x0205e2000c101b04 */ /*0b00*/ BRA 0xb40 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*0b10*/ STG.E.64 [R36.64+-0x88], R2 ; /* 0xffff780224007986 */ /* 0x0205e2000c101b04 */ /*0b20*/ BRA 0xb40 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0b30*/ STG.E.64 [R40.64+-0x40], R2 ; /* 0xffffc00228007986 */ /* 0x0205e4000c101b04 */ /*0b40*/ LDG.E.64 R2, [R28.64+0x10] ; /* 0x000010041c027981 */ /* 0x004562000c1e1b00 */ /*0b50*/ @!P0 BRA 0xda0 ; /* 0x0000024000008947 */ /* 0x000fea0003800000 */ /*0b60*/ ISETP.GE.U32.AND P0, PT, R27, 0x9, PT ; /* 0x000000091b00780c */ /* 0x000fda0003f06070 */ /*0b70*/ @!P0 BRA 0xd80 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*0b80*/ ISETP.GE.U32.AND P0, PT, R27, 0xc, PT ; /* 0x0000000c1b00780c */ /* 0x000fda0003f06070 */ /*0b90*/ @!P0 BRA 0xd60 ; /* 0x000001c000008947 */ /* 0x000fea0003800000 */ /*0ba0*/ ISETP.GE.U32.AND P0, PT, R27, 0xf, PT ; /* 0x0000000f1b00780c */ /* 0x000fda0003f06070 */ /*0bb0*/ @!P0 BRA 0xd40 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*0bc0*/ ISETP.GE.U32.AND P0, PT, R27, 0x12, PT ; /* 0x000000121b00780c */ /* 0x000fda0003f06070 */ /*0bd0*/ @!P0 BRA 0xd20 ; /* 0x0000014000008947 */ /* 0x000fea0003800000 */ /*0be0*/ ISETP.GE.U32.AND P0, PT, R27, 0x15, PT ; /* 0x000000151b00780c */ /* 0x000fda0003f06070 */ /*0bf0*/ @!P0 BRA 0xd00 ; /* 0x0000010000008947 */ /* 0x000fea0003800000 */ /*0c00*/ ISETP.GE.U32.AND P0, PT, R27, 0x18, PT ; /* 0x000000181b00780c */ /* 0x000fda0003f06070 */ /*0c10*/ @!P0 BRA 0xce0 ; /* 0x000000c000008947 */ /* 0x000fea0003800000 */ /*0c20*/ ISETP.GE.U32.AND P0, PT, R27, 0x1b, PT ; /* 0x0000001b1b00780c */ /* 0x000fda0003f06070 */ /*0c30*/ @!P0 BRA 0xcc0 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*0c40*/ ISETP.GE.U32.AND P0, PT, R27, 0x1e, PT ; /* 0x0000001e1b00780c */ /* 0x000fda0003f06070 */ /*0c50*/ @!P0 BRA 0xca0 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*0c60*/ ISETP.GE.U32.AND P0, PT, R27, 0x21, PT ; /* 0x000000211b00780c */ /* 0x000fda0003f06070 */ /*0c70*/ @P0 STG.E.64 [R32.64+-0x308], R2 ; /* 0xfffcf80220000986 */ /* 0x0207e8000c101b04 */ /*0c80*/ @!P0 STG.E.64 [R16.64+-0x2c0], R2 ; /* 0xfffd400210008986 */ /* 0x0007e2000c101b04 */ /*0c90*/ BRA 0xe10 ; /* 0x0000017000007947 */ /* 0x000fea0003800000 */ /*0ca0*/ STG.E.64 [R22.64+-0x278], R2 ; /* 0xfffd880216007986 */ /* 0x0207e2000c101b04 */ /*0cb0*/ BRA 0xe10 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*0cc0*/ STG.E.64 [R24.64+-0x230], R2 ; /* 0xfffdd00218007986 */ /* 0x0207e2000c101b04 */ /*0cd0*/ BRA 0xe10 ; /* 0x0000013000007947 */ /* 0x000fea0003800000 */ /*0ce0*/ STG.E.64 [R20.64+-0x1e8], R2 ; /* 0xfffe180214007986 */ /* 0x0207e2000c101b04 */ /*0cf0*/ BRA 0xe10 ; /* 0x0000011000007947 */ /* 0x000fea0003800000 */ /*0d00*/ STG.E.64 [R18.64+-0x1a0], R2 ; /* 0xfffe600212007986 */ /* 0x0207e2000c101b04 */ /*0d10*/ BRA 0xe10 ; /* 0x000000f000007947 */ /* 0x000fea0003800000 */ /*0d20*/ STG.E.64 [R14.64+-0x158], R2 ; /* 0xfffea8020e007986 */ /* 0x0207e2000c101b04 */ /*0d30*/ BRA 0xe10 ; /* 0x000000d000007947 */ /* 0x000fea0003800000 */ /*0d40*/ STG.E.64 [R30.64+-0x110], R2 ; /* 0xfffef0021e007986 */ /* 0x0207e2000c101b04 */ /*0d50*/ BRA 0xe10 ; /* 0x000000b000007947 */ /* 0x000fea0003800000 */ /*0d60*/ STG.E.64 [R34.64+-0xc8], R2 ; /* 0xffff380222007986 */ /* 0x0207e2000c101b04 */ /*0d70*/ BRA 0xe10 ; /* 0x0000009000007947 */ /* 0x000fea0003800000 */ /*0d80*/ STG.E.64 [R36.64+-0x80], R2 ; /* 0xffff800224007986 */ /* 0x0207e2000c101b04 */ /*0d90*/ BRA 0xe10 ; /* 0x0000007000007947 */ /* 0x000fea0003800000 */ /*0da0*/ STG.E.64 [R40.64+-0x38], R2 ; /* 0xffffc80228007986 */ /* 0x0207e2000c101b04 */ /*0db0*/ BRA 0xe10 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0dc0*/ STG.E.64 [R42.64], R38 ; /* 0x000000262a007986 */ /* 0x0211e8000c101b04 */ /*0dd0*/ LDG.E.64 R2, [R28.64+0x8] ; /* 0x000008041c027981 */ /* 0x000ea8000c1e1b00 */ /*0de0*/ STG.E.64 [R42.64+0x8], R2 ; /* 0x000008022a007986 */ /* 0x0041e8000c101b04 */ /*0df0*/ LDG.E.64 R4, [R28.64+0x10] ; /* 0x000010041c047981 */ /* 0x000ea8000c1e1b00 */ /*0e00*/ STG.E.64 [R42.64+0x10], R4 ; /* 0x000010042a007986 */ /* 0x0041e4000c101b04 */ /*0e10*/ IADD3 R26, P0, R42, 0x18, RZ ; /* 0x000000182a1a7810 */ /* 0x000fe40007f1e0ff */ /*0e20*/ IADD3 R27, R27, 0x1, RZ ; /* 0x000000011b1b7810 */ /* 0x000fc40007ffe0ff */ /*0e30*/ IADD3 R10, P3, R36, 0x18, RZ ; /* 0x00000018240a7810 */ /* 0x000fe20007f7e0ff */ /*0e40*/ IMAD.X R13, RZ, RZ, R43, P0 ; /* 0x000000ffff0d7224 */ /* 0x000fe200000e062b */ /*0e50*/ IADD3 R8, P0, R34, 0x18, RZ ; /* 0x0000001822087810 */ /* 0x000fe40007f1e0ff */ /*0e60*/ IADD3 R12, P1, R40, 0x18, RZ ; /* 0x00000018280c7810 */ /* 0x000fe20007f3e0ff */ /*0e70*/ IMAD.X R9, RZ, RZ, R37, P3 ; /* 0x000000ffff097224 */ /* 0x000fe200018e0625 */ /*0e80*/ IADD3 R28, P2, R28, 0x18, RZ ; /* 0x000000181c1c7810 */ /* 0x006fe20007f5e0ff */ /*0e90*/ IMAD.X R7, RZ, RZ, R35, P0 ; /* 0x000000ffff077224 */ /* 0x000fe200000e0623 */ /*0ea0*/ ISETP.NE.AND P0, PT, R27, 0x24, PT ; /* 0x000000241b00780c */ /* 0x000fe20003f05270 */ /*0eb0*/ IMAD.X R11, RZ, RZ, R41, P1 ; /* 0x000000ffff0b7224 */ /* 0x000fe200008e0629 */ /*0ec0*/ IADD3.X R29, RZ, R29, RZ, P2, !PT ; /* 0x0000001dff1d7210 */ /* 0x000fc400017fe4ff */ /*0ed0*/ IADD3 R4, P2, R30, 0x18, RZ ; /* 0x000000181e047810 */ /* 0x001fe40007f5e0ff */ /*0ee0*/ IADD3 R2, P3, R14, 0x18, RZ ; /* 0x000000180e027810 */ /* 0x008fe40007f7e0ff */ /*0ef0*/ IADD3 R6, P1, R32, 0x18, RZ ; /* 0x0000001820067810 */ /* 0x000fe20007f3e0ff */ /*0f00*/ IMAD.X R3, RZ, RZ, R31, P2 ; /* 0x000000ffff037224 */ /* 0x000fe200010e061f */ /*0f10*/ IADD3 R18, P2, R18, 0x18, RZ ; /* 0x0000001812127810 */ /* 0x000fe20007f5e0ff */ /*0f20*/ IMAD.X R15, RZ, RZ, R15, P3 ; /* 0x000000ffff0f7224 */ /* 0x000fe200018e060f */ /*0f30*/ IADD3 R20, P3, R20, 0x18, RZ ; /* 0x0000001814147810 */ /* 0x000fe20007f7e0ff */ /*0f40*/ IMAD.X R5, RZ, RZ, R33, P1 ; /* 0x000000ffff057224 */ /* 0x000fe200008e0621 */ /*0f50*/ IADD3 R22, P4, R22, 0x18, RZ ; /* 0x0000001816167810 */ /* 0x000fe20007f9e0ff */ /*0f60*/ IMAD.X R19, RZ, RZ, R19, P2 ; /* 0x000000ffff137224 */ /* 0x000fe200010e0613 */ /*0f70*/ IADD3 R24, P5, R24, 0x18, RZ ; /* 0x0000001818187810 */ /* 0x000fe20007fbe0ff */ /*0f80*/ IMAD.X R21, RZ, RZ, R21, P3 ; /* 0x000000ffff157224 */ /* 0x000fe200018e0615 */ /*0f90*/ IADD3 R0, P1, R16, 0x18, RZ ; /* 0x0000001810007810 */ /* 0x000fe20007f3e0ff */ /*0fa0*/ IMAD.X R23, RZ, RZ, R23, P4 ; /* 0x000000ffff177224 */ /* 0x000fc400020e0617 */ /*0fb0*/ IMAD.X R25, RZ, RZ, R25, P5 ; /* 0x000000ffff197224 */ /* 0x000fe200028e0619 */ /*0fc0*/ IADD3.X R17, RZ, R17, RZ, P1, !PT ; /* 0x00000011ff117210 */ /* 0x000fe20000ffe4ff */ /*0fd0*/ @!P0 CALL.REL.NOINC 0xff0 ; /* 0x0000001000008944 */ /* 0x000fe20003c00000 */ /*0fe0*/ BRA 0x550 ; /* 0xfffff56000007947 */ /* 0x000fea000383ffff */ /*0ff0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1000*/ BRA 0x1000; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1010*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1020*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z6cpyWtsPd .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002600 */ /*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */ /* 0x000e280000002200 */ /*0030*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e680000002100 */ /*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R5, R5, c[0x0][0x4], R2 ; /* 0x0000010005057a24 */ /* 0x001fca00078e0202 */ /*0060*/ ISETP.GT.AND P0, PT, R5, 0x9, PT ; /* 0x000000090500780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R0, R3, c[0x0][0x0], R0 ; /* 0x0000000003007a24 */ /* 0x002fca00078e0200 */ /*0080*/ ISETP.GT.OR P0, PT, R0, 0x1faf, P0 ; /* 0x00001faf0000780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R3, 0x50 ; /* 0x0000005000037802 */ /* 0x000fe20000000f00 */ /*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*00c0*/ IMAD.WIDE R2, R0, R3, c[0x4][0x38] ; /* 0x01000e0000027625 */ /* 0x000fcc00078e0203 */ /*00d0*/ IMAD.WIDE R2, R5, 0x8, R2 ; /* 0x0000000805027825 */ /* 0x000fcc00078e0202 */ /*00e0*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e1b00 */ /*00f0*/ MOV R4, 0x8 ; /* 0x0000000800047802 */ /* 0x000fe20000000f00 */ /*0100*/ IMAD R5, R0, 0xa, R5 ; /* 0x0000000a00057824 */ /* 0x000fc800078e0205 */ /*0110*/ IMAD.WIDE R4, R5, R4, c[0x0][0x160] ; /* 0x0000580005047625 */ /* 0x000fca00078e0204 */ /*0120*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */ /* 0x004fe2000c101b04 */ /*0130*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0140*/ BRA 0x140; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z6WtUpdtv .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R7, SR_CTAID.Y ; /* 0x0000000000077919 */ /* 0x000e280000002600 */ /*0020*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002200 */ /*0030*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */ /* 0x000e680000002100 */ /*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R7, R7, c[0x0][0x4], R0 ; /* 0x0000010007077a24 */ /* 0x001fca00078e0200 */ /*0060*/ ISETP.GT.AND P0, PT, R7, 0x9, PT ; /* 0x000000090700780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R4, R3, c[0x0][0x0], R4 ; /* 0x0000000003047a24 */ /* 0x002fca00078e0204 */ /*0080*/ ISETP.GT.OR P0, PT, R4, 0x1faf, P0 ; /* 0x00001faf0400780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R5, 0x50 ; /* 0x0000005000057802 */ /* 0x000fe20000000f00 */ /*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*00c0*/ IMAD.WIDE R2, R4, R5, c[0x4][0x70] ; /* 0x01001c0004027625 */ /* 0x000fc800078e0205 */ /*00d0*/ IMAD.WIDE R4, R4, R5, c[0x4][0x38] ; /* 0x01000e0004047625 */ /* 0x000fc800078e0205 */ /*00e0*/ IMAD.WIDE R2, R7, 0x8, R2 ; /* 0x0000000807027825 */ /* 0x000fc800078e0202 */ /*00f0*/ IMAD.WIDE R4, R7, 0x8, R4 ; /* 0x0000000807047825 */ /* 0x000fe400078e0204 */ /*0100*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1b00 */ /*0110*/ LDG.E.64 R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ DADD R6, R6, R2 ; /* 0x0000000006067229 */ /* 0x004e0e0000000002 */ /*0130*/ STG.E.64 [R4.64], R6 ; /* 0x0000000604007986 */ /* 0x001fe2000c101b04 */ /*0140*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0150*/ BRA 0x150; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z10CalcUpdateid .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002200 */ /*0030*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */ /* 0x000e680000002100 */ /*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R5 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0205 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x9, PT ; /* 0x000000090000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R4, R3, c[0x0][0x0], R4 ; /* 0x0000000003047a24 */ /* 0x002fca00078e0204 */ /*0080*/ ISETP.GT.OR P0, PT, R4, 0x1faf, P0 ; /* 0x00001faf0400780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x4][0x90] ; /* 0x01002400ff067624 */ /* 0x000fe200078e00ff */ /*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00c0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x4][0x94] ; /* 0x01002500ff077624 */ /* 0x000fcc00078e00ff */ /*00d0*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ea4000c1e1b00 */ /*00e0*/ DSETP.NEU.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600722a */ /* 0x004e1c0003f0d000 */ /*00f0*/ @!P0 BRA 0x390 ; /* 0x0000029000008947 */ /* 0x001fea0003800000 */ /*0100*/ SHF.R.S32.HI R5, RZ, 0x1f, R0 ; /* 0x0000001fff057819 */ /* 0x000fe40000011400 */ /*0110*/ IADD3 R2, P0, R0, c[0x4][0x60], RZ ; /* 0x0100180000027a10 */ /* 0x000fc80007f1e0ff */ /*0120*/ IADD3.X R3, R5, c[0x4][0x64], RZ, P0, !PT ; /* 0x0100190005037a10 */ /* 0x000fca00007fe4ff */ /*0130*/ LDG.E.U8 R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea2000c1e1100 */ /*0140*/ BSSY B0, 0x390 ; /* 0x0000024000007945 */ /* 0x000fe20003800000 */ /*0150*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x004fda0003f05270 */ /*0160*/ @!P0 BRA 0x380 ; /* 0x0000021000008947 */ /* 0x000fea0003800000 */ /*0170*/ IMAD.MOV.U32 R9, RZ, RZ, 0x8 ; /* 0x00000008ff097424 */ /* 0x000fc800078e00ff */ /*0180*/ IMAD.WIDE R8, R4, R9, c[0x4][0x80] ; /* 0x0100200004087625 */ /* 0x000fcc00078e0209 */ /*0190*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ea2000c1e1b00 */ /*01a0*/ MUFU.RCP64H R11, R7 ; /* 0x00000007000b7308 */ /* 0x000e220000001800 */ /*01b0*/ PRMT R14, R2, 0x8880, RZ ; /* 0x00008880020e7816 */ /* 0x000fe200000000ff */ /*01c0*/ IMAD.MOV.U32 R10, RZ, RZ, 0x1 ; /* 0x00000001ff0a7424 */ /* 0x000fe200078e00ff */ /*01d0*/ BSSY B1, 0x310 ; /* 0x0000013000017945 */ /* 0x000fe40003800000 */ /*01e0*/ PRMT R14, R14, 0x7710, RZ ; /* 0x000077100e0e7816 */ /* 0x000fc800000000ff */ /*01f0*/ I2F.F64.S16 R2, R14 ; /* 0x0000000e00027312 */ /* 0x000e620000101c00 */ /*0200*/ DFMA R12, -R6, R10, 1 ; /* 0x3ff00000060c742b */ /* 0x001e0c000000010a */ /*0210*/ DFMA R12, R12, R12, R12 ; /* 0x0000000c0c0c722b */ /* 0x001e08000000000c */ /*0220*/ DMUL R2, R2, c[0x0][0x168] ; /* 0x00005a0002027a28 */ /* 0x002fc80000000000 */ /*0230*/ DFMA R12, R10, R12, R10 ; /* 0x0000000c0a0c722b */ /* 0x001e0c000000000a */ /*0240*/ DFMA R10, -R6, R12, 1 ; /* 0x3ff00000060a742b */ /* 0x001e0c000000010c */ /*0250*/ DFMA R10, R12, R10, R12 ; /* 0x0000000a0c0a722b */ /* 0x001fc8000000000c */ /*0260*/ DMUL R8, R2, R8 ; /* 0x0000000802087228 */ /* 0x004e0c0000000000 */ /*0270*/ DMUL R2, R8, R10 ; /* 0x0000000a08027228 */ /* 0x001e080000000000 */ /*0280*/ FSETP.GEU.AND P1, PT, |R9|, 6.5827683646048100446e-37, PT ; /* 0x036000000900780b */ /* 0x000fe40003f2e200 */ /*0290*/ DFMA R12, -R6, R2, R8 ; /* 0x00000002060c722b */ /* 0x001e0c0000000108 */ /*02a0*/ DFMA R2, R10, R12, R2 ; /* 0x0000000c0a02722b */ /* 0x001e140000000002 */ /*02b0*/ FFMA R10, RZ, R7, R3 ; /* 0x00000007ff0a7223 */ /* 0x001fca0000000003 */ /*02c0*/ FSETP.GT.AND P0, PT, |R10|, 1.469367938527859385e-39, PT ; /* 0x001000000a00780b */ /* 0x000fda0003f04200 */ /*02d0*/ @P0 BRA P1, 0x300 ; /* 0x0000002000000947 */ /* 0x000fea0000800000 */ /*02e0*/ MOV R10, 0x300 ; /* 0x00000300000a7802 */ /* 0x000fe40000000f00 */ /*02f0*/ CALL.REL.NOINC 0x3b0 ; /* 0x000000b000007944 */ /* 0x000fea0003c00000 */ /*0300*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0310*/ IMAD.MOV.U32 R7, RZ, RZ, 0x50 ; /* 0x00000050ff077424 */ /* 0x000fc800078e00ff */ /*0320*/ IMAD.WIDE R6, R4, R7, c[0x4][0x70] ; /* 0x01001c0004067625 */ /* 0x000fca00078e0207 */ /*0330*/ LEA R4, P0, R0, R6, 0x3 ; /* 0x0000000600047211 */ /* 0x000fc800078018ff */ /*0340*/ LEA.HI.X R5, R0, R7, R5, 0x3, P0 ; /* 0x0000000700057211 */ /* 0x000fca00000f1c05 */ /*0350*/ LDG.E.64 R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea4000c1e1b00 */ /*0360*/ DADD R6, R6, R2 ; /* 0x0000000006067229 */ /* 0x004e0e0000000002 */ /*0370*/ STG.E.64 [R4.64], R6 ; /* 0x0000000604007986 */ /* 0x0011e8000c101b04 */ /*0380*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0390*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ FSETP.GEU.AND P0, PT, |R7|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000700780b */ /* 0x040fe20003f0e200 */ /*03c0*/ IMAD.MOV.U32 R14, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff0e7424 */ /* 0x000fe200078e00ff */ /*03d0*/ LOP3.LUT R2, R7, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff07027812 */ /* 0x000fe200078ec0ff */ /*03e0*/ IMAD.MOV.U32 R16, RZ, RZ, 0x1 ; /* 0x00000001ff107424 */ /* 0x000fe200078e00ff */ /*03f0*/ FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000900780b */ /* 0x040fe20003f4e200 */ /*0400*/ BSSY B2, 0x940 ; /* 0x0000053000027945 */ /* 0x000fe20003800000 */ /*0410*/ LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000002037812 */ /* 0x000fe200078efcff */ /*0420*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0006 */ /*0430*/ LOP3.LUT R11, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000090b7812 */ /* 0x000fc400078ec0ff */ /*0440*/ LOP3.LUT R22, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000007167812 */ /* 0x000fc600078ec0ff */ /*0450*/ @!P0 DMUL R2, R6, 8.98846567431157953865e+307 ; /* 0x7fe0000006028828 */ /* 0x000e220000000000 */ /*0460*/ ISETP.GE.U32.AND P1, PT, R11, R22, PT ; /* 0x000000160b00720c */ /* 0x000fe20003f26070 */ /*0470*/ IMAD.MOV.U32 R23, RZ, RZ, R11 ; /* 0x000000ffff177224 */ /* 0x000fe400078e000b */ /*0480*/ @!P2 LOP3.LUT R12, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000070ca812 */ /* 0x000fe200078ec0ff */ /*0490*/ @!P2 IMAD.MOV.U32 R18, RZ, RZ, RZ ; /* 0x000000ffff12a224 */ /* 0x000fe200078e00ff */ /*04a0*/ MUFU.RCP64H R17, R3 ; /* 0x0000000300117308 */ /* 0x001e220000001800 */ /*04b0*/ SEL R15, R14, 0x63400000, !P1 ; /* 0x634000000e0f7807 */ /* 0x000fe40004800000 */ /*04c0*/ @!P2 ISETP.GE.U32.AND P3, PT, R11, R12, PT ; /* 0x0000000c0b00a20c */ /* 0x000fe40003f66070 */ /*04d0*/ @!P0 LOP3.LUT R22, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000003168812 */ /* 0x000fc400078ec0ff */ /*04e0*/ @!P2 SEL R19, R14, 0x63400000, !P3 ; /* 0x634000000e13a807 */ /* 0x000fe40005800000 */ /*04f0*/ IADD3 R24, R22, -0x1, RZ ; /* 0xffffffff16187810 */ /* 0x000fe40007ffe0ff */ /*0500*/ @!P2 LOP3.LUT R19, R19, 0x80000000, R9, 0xf8, !PT ; /* 0x800000001313a812 */ /* 0x000fc800078ef809 */ /*0510*/ @!P2 LOP3.LUT R19, R19, 0x100000, RZ, 0xfc, !PT ; /* 0x001000001313a812 */ /* 0x000fe200078efcff */ /*0520*/ DFMA R12, R16, -R2, 1 ; /* 0x3ff00000100c742b */ /* 0x001e0c0000000802 */ /*0530*/ DFMA R20, R12, R12, R12 ; /* 0x0000000c0c14722b */ /* 0x001064000000000c */ /*0540*/ LOP3.LUT R13, R15, 0x800fffff, R9, 0xf8, !PT ; /* 0x800fffff0f0d7812 */ /* 0x001fe200078ef809 */ /*0550*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x000fc600078e0008 */ /*0560*/ DFMA R20, R16, R20, R16 ; /* 0x000000141014722b */ /* 0x002e080000000010 */ /*0570*/ @!P2 DFMA R12, R12, 2, -R18 ; /* 0x400000000c0ca82b */ /* 0x000e480000000812 */ /*0580*/ DFMA R16, R20, -R2, 1 ; /* 0x3ff000001410742b */ /* 0x001e0c0000000802 */ /*0590*/ @!P2 LOP3.LUT R23, R13, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000d17a812 */ /* 0x002fe200078ec0ff */ /*05a0*/ DFMA R16, R20, R16, R20 ; /* 0x000000101410722b */ /* 0x001e060000000014 */ /*05b0*/ IADD3 R15, R23, -0x1, RZ ; /* 0xffffffff170f7810 */ /* 0x000fc60007ffe0ff */ /*05c0*/ DMUL R18, R16, R12 ; /* 0x0000000c10127228 */ /* 0x001e220000000000 */ /*05d0*/ ISETP.GT.U32.AND P0, PT, R15, 0x7feffffe, PT ; /* 0x7feffffe0f00780c */ /* 0x000fc80003f04070 */ /*05e0*/ ISETP.GT.U32.OR P0, PT, R24, 0x7feffffe, P0 ; /* 0x7feffffe1800780c */ /* 0x000fe20000704470 */ /*05f0*/ DFMA R20, R18, -R2, R12 ; /* 0x800000021214722b */ /* 0x001e0c000000000c */ /*0600*/ DFMA R16, R16, R20, R18 ; /* 0x000000141010722b */ /* 0x00104c0000000012 */ /*0610*/ @P0 BRA 0x7e0 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*0620*/ LOP3.LUT R18, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000007127812 */ /* 0x003fc800078ec0ff */ /*0630*/ ISETP.GE.U32.AND P0, PT, R11.reuse, R18, PT ; /* 0x000000120b00720c */ /* 0x040fe20003f06070 */ /*0640*/ IMAD.IADD R8, R11, 0x1, -R18 ; /* 0x000000010b087824 */ /* 0x000fc600078e0a12 */ /*0650*/ SEL R11, R14, 0x63400000, !P0 ; /* 0x634000000e0b7807 */ /* 0x000fe40004000000 */ /*0660*/ IMNMX R8, R8, -0x46a00000, !PT ; /* 0xb960000008087817 */ /* 0x000fc80007800200 */ /*0670*/ IMNMX R8, R8, 0x46a00000, PT ; /* 0x46a0000008087817 */ /* 0x000fca0003800200 */ /*0680*/ IMAD.IADD R11, R8, 0x1, -R11 ; /* 0x00000001080b7824 */ /* 0x000fe400078e0a0b */ /*0690*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x000fc600078e00ff */ /*06a0*/ IADD3 R9, R11, 0x7fe00000, RZ ; /* 0x7fe000000b097810 */ /* 0x000fcc0007ffe0ff */ /*06b0*/ DMUL R14, R16, R8 ; /* 0x00000008100e7228 */ /* 0x000e140000000000 */ /*06c0*/ FSETP.GTU.AND P0, PT, |R15|, 1.469367938527859385e-39, PT ; /* 0x001000000f00780b */ /* 0x001fda0003f0c200 */ /*06d0*/ @P0 BRA 0x930 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*06e0*/ DFMA R2, R16, -R2, R12 ; /* 0x800000021002722b */ /* 0x000e22000000000c */ /*06f0*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x000fd200078e00ff */ /*0700*/ FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT ; /* 0x000000ff0300720b */ /* 0x041fe40003f0d000 */ /*0710*/ LOP3.LUT R7, R3, 0x80000000, R7, 0x48, !PT ; /* 0x8000000003077812 */ /* 0x000fc800078e4807 */ /*0720*/ LOP3.LUT R9, R7, R9, RZ, 0xfc, !PT ; /* 0x0000000907097212 */ /* 0x000fce00078efcff */ /*0730*/ @!P0 BRA 0x930 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*0740*/ IMAD.MOV R3, RZ, RZ, -R11 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0a0b */ /*0750*/ DMUL.RP R8, R16, R8 ; /* 0x0000000810087228 */ /* 0x000e220000008000 */ /*0760*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fe200078e00ff */ /*0770*/ IADD3 R11, -R11, -0x43300000, RZ ; /* 0xbcd000000b0b7810 */ /* 0x000fca0007ffe1ff */ /*0780*/ DFMA R2, R14, -R2, R16 ; /* 0x800000020e02722b */ /* 0x000e460000000010 */ /*0790*/ LOP3.LUT R7, R9, R7, RZ, 0x3c, !PT ; /* 0x0000000709077212 */ /* 0x001fce00078e3cff */ /*07a0*/ FSETP.NEU.AND P0, PT, |R3|, R11, PT ; /* 0x0000000b0300720b */ /* 0x002fc80003f0d200 */ /*07b0*/ FSEL R14, R8, R14, !P0 ; /* 0x0000000e080e7208 */ /* 0x000fe40004000000 */ /*07c0*/ FSEL R15, R7, R15, !P0 ; /* 0x0000000f070f7208 */ /* 0x000fe20004000000 */ /*07d0*/ BRA 0x930 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*07e0*/ DSETP.NAN.AND P0, PT, R8, R8, PT ; /* 0x000000080800722a */ /* 0x003e1c0003f08000 */ /*07f0*/ @P0 BRA 0x910 ; /* 0x0000011000000947 */ /* 0x001fea0003800000 */ /*0800*/ DSETP.NAN.AND P0, PT, R6, R6, PT ; /* 0x000000060600722a */ /* 0x000e1c0003f08000 */ /*0810*/ @P0 BRA 0x8e0 ; /* 0x000000c000000947 */ /* 0x001fea0003800000 */ /*0820*/ ISETP.NE.AND P0, PT, R23, R22, PT ; /* 0x000000161700720c */ /* 0x000fe20003f05270 */ /*0830*/ IMAD.MOV.U32 R14, RZ, RZ, 0x0 ; /* 0x00000000ff0e7424 */ /* 0x000fe400078e00ff */ /*0840*/ IMAD.MOV.U32 R15, RZ, RZ, -0x80000 ; /* 0xfff80000ff0f7424 */ /* 0x000fd400078e00ff */ /*0850*/ @!P0 BRA 0x930 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*0860*/ ISETP.NE.AND P0, PT, R23, 0x7ff00000, PT ; /* 0x7ff000001700780c */ /* 0x000fe40003f05270 */ /*0870*/ LOP3.LUT R15, R9, 0x80000000, R7, 0x48, !PT ; /* 0x80000000090f7812 */ /* 0x000fe400078e4807 */ /*0880*/ ISETP.EQ.OR P0, PT, R22, RZ, !P0 ; /* 0x000000ff1600720c */ /* 0x000fda0004702670 */ /*0890*/ @P0 LOP3.LUT R2, R15, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000000f020812 */ /* 0x000fe200078efcff */ /*08a0*/ @!P0 IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e8224 */ /* 0x000fe400078e00ff */ /*08b0*/ @P0 IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e0224 */ /* 0x000fe400078e00ff */ /*08c0*/ @P0 IMAD.MOV.U32 R15, RZ, RZ, R2 ; /* 0x000000ffff0f0224 */ /* 0x000fe200078e0002 */ /*08d0*/ BRA 0x930 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*08e0*/ LOP3.LUT R15, R7, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000070f7812 */ /* 0x000fe200078efcff */ /*08f0*/ IMAD.MOV.U32 R14, RZ, RZ, R6 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e0006 */ /*0900*/ BRA 0x930 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*0910*/ LOP3.LUT R15, R9, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000090f7812 */ /* 0x000fe200078efcff */ /*0920*/ IMAD.MOV.U32 R14, RZ, RZ, R8 ; /* 0x000000ffff0e7224 */ /* 0x000fe400078e0008 */ /*0930*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0940*/ IMAD.MOV.U32 R11, RZ, RZ, 0x0 ; /* 0x00000000ff0b7424 */ /* 0x000fe400078e00ff */ /*0950*/ IMAD.MOV.U32 R2, RZ, RZ, R14 ; /* 0x000000ffff027224 */ /* 0x000fc400078e000e */ /*0960*/ IMAD.MOV.U32 R3, RZ, RZ, R15 ; /* 0x000000ffff037224 */ /* 0x000fe200078e000f */ /*0970*/ RET.REL.NODEC R10 0x0 ; /* 0xfffff6800a007950 */ /* 0x000fec0003c3ffff */ /*0980*/ BRA 0x980; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0990*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*09f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z7reduce1i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e280000002100 */ /*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0030*/ IMAD R0, R3, c[0x0][0x0], R0 ; /* 0x0000000003007a24 */ /* 0x001fca00078e0200 */ /*0040*/ ISETP.GT.AND P0, PT, R0, 0x9, PT ; /* 0x000000090000780c */ /* 0x000fda0003f04270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ IMAD.MOV.U32 R21, RZ, RZ, 0x8 ; /* 0x00000008ff157424 */ /* 0x000fe200078e00ff */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0080*/ IMAD.WIDE R2, R0, R21, c[0x4][0xe0] ; /* 0x0100380000027625 */ /* 0x000fca00078e0215 */ /*0090*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000402047981 */ /* 0x000ea8000c1e1b00 */ /*00a0*/ LDG.E.64 R6, [R2.64+0x50] ; /* 0x0000500402067981 */ /* 0x000ee8000c1e1b00 */ /*00b0*/ LDG.E.64 R8, [R2.64+0xa0] ; /* 0x0000a00402087981 */ /* 0x000f28000c1e1b00 */ /*00c0*/ LDG.E.64 R10, [R2.64+0xf0] ; /* 0x0000f004020a7981 */ /* 0x000f68000c1e1b00 */ /*00d0*/ LDG.E.64 R12, [R2.64+0x140] ; /* 0x00014004020c7981 */ /* 0x000f68000c1e1b00 */ /*00e0*/ LDG.E.64 R14, [R2.64+0x190] ; /* 0x00019004020e7981 */ /* 0x000f68000c1e1b00 */ /*00f0*/ LDG.E.64 R16, [R2.64+0x1e0] ; /* 0x0001e00402107981 */ /* 0x000f68000c1e1b00 */ /*0100*/ LDG.E.64 R18, [R2.64+0x230] ; /* 0x0002300402127981 */ /* 0x000f62000c1e1b00 */ /*0110*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fe20003f05270 */ /*0120*/ DADD R4, RZ, R4 ; /* 0x00000000ff047229 */ /* 0x004ecc0000000004 */ /*0130*/ DADD R4, R4, R6 ; /* 0x0000000004047229 */ /* 0x0081240000000006 */ /*0140*/ IMAD.WIDE R6, R0, R21, c[0x4][0x40] ; /* 0x0100100000067625 */ /* 0x001fc800078e0215 */ /*0150*/ DADD R4, R4, R8 ; /* 0x0000000004047229 */ /* 0x010f4c0000000008 */ /*0160*/ DADD R4, R4, R10 ; /* 0x0000000004047229 */ /* 0x020e0c000000000a */ /*0170*/ DADD R4, R4, R12 ; /* 0x0000000004047229 */ /* 0x001e0c000000000c */ /*0180*/ DADD R4, R4, R14 ; /* 0x0000000004047229 */ /* 0x001e0c000000000e */ /*0190*/ DADD R4, R4, R16 ; /* 0x0000000004047229 */ /* 0x001e0c0000000010 */ /*01a0*/ DADD R4, R4, R18 ; /* 0x0000000004047229 */ /* 0x001e0e0000000012 */ /*01b0*/ STG.E.64 [R6.64], R4 ; /* 0x0000000406007986 */ /* 0x0011e2000c101b04 */ /*01c0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*01d0*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x4][0xe8] ; /* 0x01003a00ff027624 */ /* 0x000fe200078e00ff */ /*01e0*/ MOV R3, c[0x4][0xec] ; /* 0x01003b0000037a02 */ /* 0x000fca0000000f00 */ /*01f0*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000402047981 */ /* 0x001ea8000c1e1b00 */ /*0200*/ LDG.E.64 R6, [R2.64+0x8] ; /* 0x0000080402067981 */ /* 0x000ee8000c1e1b00 */ /*0210*/ LDG.E.64 R8, [R2.64+0x10] ; /* 0x0000100402087981 */ /* 0x000f28000c1e1b00 */ /*0220*/ LDG.E.64 R10, [R2.64+0x18] ; /* 0x00001804020a7981 */ /* 0x000f68000c1e1b00 */ /*0230*/ LDG.E.64 R12, [R2.64+0x20] ; /* 0x00002004020c7981 */ /* 0x000f68000c1e1b00 */ /*0240*/ LDG.E.64 R14, [R2.64+0x28] ; /* 0x00002804020e7981 */ /* 0x000f68000c1e1b00 */ /*0250*/ LDG.E.64 R16, [R2.64+0x30] ; /* 0x0000300402107981 */ /* 0x000f68000c1e1b00 */ /*0260*/ LDG.E.64 R18, [R2.64+0x38] ; /* 0x0000380402127981 */ /* 0x000f62000c1e1b00 */ /*0270*/ DADD R4, RZ, R4 ; /* 0x00000000ff047229 */ /* 0x004ecc0000000004 */ /*0280*/ DADD R4, R4, R6 ; /* 0x0000000004047229 */ /* 0x008f0c0000000006 */ /*0290*/ DADD R4, R4, R8 ; /* 0x0000000004047229 */ /* 0x0101640000000008 */ /*02a0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x0 ; /* 0x00000000ff087424 */ /* 0x001fe400078e00ff */ /*02b0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x3fd80000 ; /* 0x3fd80000ff097424 */ /* 0x000fe400078e00ff */ /*02c0*/ DADD R4, R4, R10 ; /* 0x0000000004047229 */ /* 0x020e0c000000000a */ /*02d0*/ DADD R4, R4, R12 ; /* 0x0000000004047229 */ /* 0x001e0c000000000c */ /*02e0*/ DADD R4, R4, R14 ; /* 0x0000000004047229 */ /* 0x001e0c000000000e */ /*02f0*/ DADD R4, R4, R16 ; /* 0x0000000004047229 */ /* 0x001e0c0000000010 */ /*0300*/ DADD R4, R4, R18 ; /* 0x0000000004047229 */ /* 0x001e0c0000000012 */ /*0310*/ MUFU.RSQ64H R7, R5 ; /* 0x0000000500077308 */ /* 0x001e280000001c00 */ /*0320*/ IADD3 R6, R5, -0x3500000, RZ ; /* 0xfcb0000005067810 */ /* 0x000fc80007ffe0ff */ /*0330*/ ISETP.GE.U32.AND P0, PT, R6, 0x7ca00000, PT ; /* 0x7ca000000600780c */ /* 0x000fe40003f06070 */ /*0340*/ DMUL R2, R6, R6 ; /* 0x0000000606027228 */ /* 0x001e0c0000000000 */ /*0350*/ DFMA R2, R4, -R2, 1 ; /* 0x3ff000000402742b */ /* 0x001e0c0000000802 */ /*0360*/ DFMA R8, R2, R8, 0.5 ; /* 0x3fe000000208742b */ /* 0x001fc80000000008 */ /*0370*/ DMUL R2, R6, R2 ; /* 0x0000000206027228 */ /* 0x000e0c0000000000 */ /*0380*/ DFMA R2, R8, R2, R6 ; /* 0x000000020802722b */ /* 0x001e0c0000000006 */ /*0390*/ DMUL R8, R4, R2 ; /* 0x0000000204087228 */ /* 0x001e080000000000 */ /*03a0*/ IADD3 R15, R3, -0x100000, RZ ; /* 0xfff00000030f7810 */ /* 0x000fe40007ffe0ff */ /*03b0*/ DFMA R10, R8, -R8, R4 ; /* 0x80000008080a722b */ /* 0x001e220000000004 */ /*03c0*/ MOV R14, R2 ; /* 0x00000002000e7202 */ /* 0x000fcc0000000f00 */ /*03d0*/ DFMA R12, R10, R14, R8 ; /* 0x0000000e0a0c722b */ /* 0x0010620000000008 */ /*03e0*/ @!P0 BRA 0x410 ; /* 0x0000002000008947 */ /* 0x000fea0003800000 */ /*03f0*/ MOV R0, 0x410 ; /* 0x0000041000007802 */ /* 0x000fca0000000f00 */ /*0400*/ CALL.REL.NOINC 0x450 ; /* 0x0000004000007944 */ /* 0x003fea0003c00000 */ /*0410*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x4][0x90] ; /* 0x01002400ff027624 */ /* 0x000fe400078e00ff */ /*0420*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x4][0x94] ; /* 0x01002500ff037624 */ /* 0x000fca00078e00ff */ /*0430*/ STG.E.64 [R2.64], R12 ; /* 0x0000000c02007986 */ /* 0x002fe2000c101b04 */ /*0440*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0450*/ ISETP.GE.U32.AND P0, PT, R6, -0x3400000, PT ; /* 0xfcc000000600780c */ /* 0x000fe40003f06070 */ /*0460*/ MOV R3, R15 ; /* 0x0000000f00037202 */ /* 0x000fd60000000f00 */ /*0470*/ @!P0 BRA 0x500 ; /* 0x0000008000008947 */ /* 0x000fea0003800000 */ /*0480*/ DFMA.RM R2, R10, R2, R8 ; /* 0x000000020a02722b */ /* 0x000e140000004008 */ /*0490*/ IADD3 R6, P0, R2, 0x1, RZ ; /* 0x0000000102067810 */ /* 0x001fca0007f1e0ff */ /*04a0*/ IMAD.X R7, RZ, RZ, R3, P0 ; /* 0x000000ffff077224 */ /* 0x000fcc00000e0603 */ /*04b0*/ DFMA.RP R4, -R2, R6, R4 ; /* 0x000000060204722b */ /* 0x000e0c0000008104 */ /*04c0*/ DSETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400722a */ /* 0x001e0c0003f04000 */ /*04d0*/ FSEL R2, R6, R2, P0 ; /* 0x0000000206027208 */ /* 0x001fe40000000000 */ /*04e0*/ FSEL R3, R7, R3, P0 ; /* 0x0000000307037208 */ /* 0x000fe20000000000 */ /*04f0*/ BRA 0x690 ; /* 0x0000019000007947 */ /* 0x000fea0003800000 */ /*0500*/ DSETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400722a */ /* 0x000e1c0003f05000 */ /*0510*/ @!P0 BRA 0x680 ; /* 0x0000016000008947 */ /* 0x001fea0003800000 */ /*0520*/ ISETP.GE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fda0003f06270 */ /*0530*/ @!P0 IMAD.MOV.U32 R2, RZ, RZ, 0x0 ; /* 0x00000000ff028424 */ /* 0x000fe200078e00ff */ /*0540*/ @!P0 MOV R3, 0xfff80000 ; /* 0xfff8000000038802 */ /* 0x000fe20000000f00 */ /*0550*/ @!P0 BRA 0x690 ; /* 0x0000013000008947 */ /* 0x000fea0003800000 */ /*0560*/ ISETP.GT.AND P0, PT, R5, 0x7fefffff, PT ; /* 0x7fefffff0500780c */ /* 0x000fda0003f04270 */ /*0570*/ @P0 BRA 0x680 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*0580*/ DMUL R4, R4, 8.11296384146066816958e+31 ; /* 0x4690000004047828 */ /* 0x000e220000000000 */ /*0590*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fe200078e00ff */ /*05a0*/ MOV R9, 0x3fd80000 ; /* 0x3fd8000000097802 */ /* 0x000fe20000000f00 */ /*05b0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x0 ; /* 0x00000000ff087424 */ /* 0x000fc600078e00ff */ /*05c0*/ MUFU.RSQ64H R3, R5 ; /* 0x0000000500037308 */ /* 0x001e240000001c00 */ /*05d0*/ DMUL R6, R2, R2 ; /* 0x0000000202067228 */ /* 0x001e0c0000000000 */ /*05e0*/ DFMA R6, R4, -R6, 1 ; /* 0x3ff000000406742b */ /* 0x001e0c0000000806 */ /*05f0*/ DFMA R8, R6, R8, 0.5 ; /* 0x3fe000000608742b */ /* 0x001fc80000000008 */ /*0600*/ DMUL R6, R2, R6 ; /* 0x0000000602067228 */ /* 0x000e0c0000000000 */ /*0610*/ DFMA R6, R8, R6, R2 ; /* 0x000000060806722b */ /* 0x001e0c0000000002 */ /*0620*/ DMUL R2, R4, R6 ; /* 0x0000000604027228 */ /* 0x0010480000000000 */ /*0630*/ IADD3 R7, R7, -0x100000, RZ ; /* 0xfff0000007077810 */ /* 0x001fe40007ffe0ff */ /*0640*/ DFMA R8, R2, -R2, R4 ; /* 0x800000020208722b */ /* 0x002e0c0000000004 */ /*0650*/ DFMA R2, R6, R8, R2 ; /* 0x000000080602722b */ /* 0x001e140000000002 */ /*0660*/ IADD3 R3, R3, -0x3500000, RZ ; /* 0xfcb0000003037810 */ /* 0x001fe20007ffe0ff */ /*0670*/ BRA 0x690 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0680*/ DADD R2, R4, R4 ; /* 0x0000000004027229 */ /* 0x0000540000000004 */ /*0690*/ IMAD.MOV.U32 R12, RZ, RZ, R2 ; /* 0x000000ffff0c7224 */ /* 0x002fe200078e0002 */ /*06a0*/ MOV R2, R0 ; /* 0x0000000000027202 */ /* 0x000fe20000000f00 */ /*06b0*/ IMAD.MOV.U32 R13, RZ, RZ, R3 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e0003 */ /*06c0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fc800078e00ff */ /*06d0*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff92002007950 */ /* 0x000fea0003c3ffff */ /*06e0*/ BRA 0x6e0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*06f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0700*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0710*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0720*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0730*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0740*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0750*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0760*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0770*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z13IsynRedKerneli .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R17, SR_TID.X ; /* 0x0000000000117919 */ /* 0x000e220000002100 */ /*0020*/ ULDC UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */ /* 0x000fe20000000800 */ /*0030*/ IMAD.MOV.U32 R7, RZ, RZ, 0x50 ; /* 0x00000050ff077424 */ /* 0x000fe200078e00ff */ /*0040*/ USHF.R.U32.HI UR4, URZ, 0x1, UR4 ; /* 0x000000013f047899 */ /* 0x000fe20008011604 */ /*0050*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0060*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fc60000000a00 */ /*0070*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */ /* 0x000e620000002600 */ /*0080*/ ISETP.NE.AND P1, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */ /* 0x000fc6000bf25270 */ /*0090*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e620000002200 */ /*00a0*/ IMAD R16, R0, c[0x0][0x0], R17 ; /* 0x0000000000107a24 */ /* 0x001fc800078e0211 */ /*00b0*/ IMAD.WIDE R6, R16, R7, c[0x4][0x30] ; /* 0x01000c0010067625 */ /* 0x000fc800078e0207 */ /*00c0*/ IMAD R4, R4, c[0x0][0x4], R3 ; /* 0x0000010004047a24 */ /* 0x002fe400078e0203 */ /*00d0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x8 ; /* 0x00000008ff037424 */ /* 0x000fe400078e00ff */ /*00e0*/ IMAD.WIDE R6, R4.reuse, 0x8, R6 ; /* 0x0000000804067825 */ /* 0x040fe200078e0206 */ /*00f0*/ ISETP.GT.AND P0, PT, R4, 0x9, PT ; /* 0x000000090400780c */ /* 0x000fe40003f04270 */ /*0100*/ SHF.R.S32.HI R5, RZ, 0x1f, R4 ; /* 0x0000001fff057819 */ /* 0x000fe20000011404 */ /*0110*/ IMAD.WIDE R2, R16, R3, c[0x4][0xa8] ; /* 0x01002a0010027625 */ /* 0x000fe200078e0203 */ /*0120*/ ISETP.NE.OR P0, PT, R17, RZ, P0 ; /* 0x000000ff1100720c */ /* 0x000fe20000705670 */ /*0130*/ @!P1 BRA 0x2d0 ; /* 0x0000019000009947 */ /* 0x000fd80003800000 */ /*0140*/ SHF.L.U64.HI R19, R4, 0x3, R5 ; /* 0x0000000304137819 */ /* 0x000fe40000010205 */ /*0150*/ ISETP.GE.U32.AND P2, PT, R17, UR4, PT ; /* 0x0000000411007c0c */ /* 0x000fe4000bf46070 */ /*0160*/ IADD3 R12, R16, UR4, RZ ; /* 0x00000004100c7c10 */ /* 0x001fc4000fffe0ff */ /*0170*/ ISETP.GT.OR P1, PT, R4, 0x9, P2 ; /* 0x000000090400780c */ /* 0x000fc80001724670 */ /*0180*/ ISETP.GT.U32.OR P1, PT, R12, 0x1faf, P1 ; /* 0x00001faf0c00780c */ /* 0x000fda0000f24470 */ /*0190*/ @!P1 IMAD.MOV.U32 R9, RZ, RZ, 0x50 ; /* 0x00000050ff099424 */ /* 0x000fc800078e00ff */ /*01a0*/ @!P1 IMAD.WIDE.U32 R8, R12, R9, c[0x4][0x30] ; /* 0x01000c000c089625 */ /* 0x000fca00078e0009 */ /*01b0*/ @!P1 LEA R14, P3, R4, R8, 0x3 ; /* 0x00000008040e9211 */ /* 0x000fca00078618ff */ /*01c0*/ @!P1 IMAD.X R15, R9, 0x1, R19, P3 ; /* 0x00000001090f9824 */ /* 0x000fe400018e0613 */ /*01d0*/ @!P1 LDG.E.64 R8, [R6.64] ; /* 0x0000000606089981 */ /* 0x000ea8000c1e1b00 */ /*01e0*/ @!P1 LDG.E.64 R10, [R14.64] ; /* 0x000000060e0a9981 */ /* 0x000ea2000c1e1b00 */ /*01f0*/ ISETP.NE.OR P2, PT, R4, RZ, P2 ; /* 0x000000ff0400720c */ /* 0x000fc80001745670 */ /*0200*/ ISETP.GT.U32.OR P2, PT, R12, 0x1faf, P2 ; /* 0x00001faf0c00780c */ /* 0x000fda0001744470 */ /*0210*/ @!P2 IMAD.MOV.U32 R13, RZ, RZ, 0x8 ; /* 0x00000008ff0da424 */ /* 0x000fe200078e00ff */ /*0220*/ @!P1 DADD R8, R8, R10 ; /* 0x0000000008089229 */ /* 0x004046000000000a */ /*0230*/ @!P2 IMAD.WIDE.U32 R10, R12, R13, c[0x4][0xa8] ; /* 0x01002a000c0aa625 */ /* 0x001fc800078e000d */ /*0240*/ @!P1 STG.E.64 [R6.64], R8 ; /* 0x0000000806009986 */ /* 0x0021e8000c101b06 */ /*0250*/ @!P2 LDG.E.64 R10, [R10.64] ; /* 0x000000060a0aa981 */ /* 0x000ea8000c1e1b00 */ /*0260*/ @!P2 LDG.E.64 R12, [R2.64] ; /* 0x00000006020ca981 */ /* 0x000ea2000c1e1b00 */ /*0270*/ USHF.R.U32.HI UR4, URZ, 0x1, UR4 ; /* 0x000000013f047899 */ /* 0x000fcc0008011604 */ /*0280*/ ISETP.NE.AND P1, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */ /* 0x000fe2000bf25270 */ /*0290*/ @!P2 DADD R12, R12, R10 ; /* 0x000000000c0ca229 */ /* 0x004e4e000000000a */ /*02a0*/ @!P2 STG.E.64 [R2.64], R12 ; /* 0x0000000c0200a986 */ /* 0x0021e8000c101b06 */ /*02b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*02c0*/ @P1 BRA 0x150 ; /* 0xfffffe8000001947 */ /* 0x000fea000383ffff */ /*02d0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*02e0*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000606067981 */ /* 0x001ea2000c1e1b00 */ /*02f0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x50 ; /* 0x00000050ff097424 */ /* 0x000fe200078e00ff */ /*0300*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fc60003f05270 */ /*0310*/ IMAD.WIDE.U32 R8, R0, R9, c[0x4][0xe0] ; /* 0x0100380000087625 */ /* 0x000fca00078e0009 */ /*0320*/ LEA R8, P1, R4, R8, 0x3 ; /* 0x0000000804087211 */ /* 0x000fc800078218ff */ /*0330*/ LEA.HI.X R9, R4, R9, R5, 0x3, P1 ; /* 0x0000000904097211 */ /* 0x000fca00008f1c05 */ /*0340*/ STG.E.64 [R8.64], R6 ; /* 0x0000000608007986 */ /* 0x0041e2000c101b06 */ /*0350*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0360*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000ea2000c1e1b00 */ /*0370*/ LEA R4, P0, R0, c[0x4][0xe8], 0x3 ; /* 0x01003a0000047a11 */ /* 0x000fc800078018ff */ /*0380*/ LEA.HI.X R5, R0, c[0x4][0xec], RZ, 0x3, P0 ; /* 0x01003b0000057a11 */ /* 0x000fca00000f1cff */ /*0390*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */ /* 0x004fe2000c101b06 */ /*03a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*03b0*/ BRA 0x3b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0400*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0410*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0420*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0430*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0440*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0450*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z8Lat_curri .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GT.AND P0, PT, R0, 0x9, PT ; /* 0x000000090000780c */ /* 0x000fda0003f04270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ IMAD.MOV.U32 R7, RZ, RZ, 0x8 ; /* 0x00000008ff077424 */ /* 0x000fe200078e00ff */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0080*/ IMAD.WIDE R2, R0, R7, c[0x4][0x98] ; /* 0x0100260000027625 */ /* 0x000fca00078e0207 */ /*0090*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000402047981 */ /* 0x000ea4000c1e1b00 */ /*00a0*/ DMUL R8, R4, c[0x2][0x0] ; /* 0x0080000004087a28 */ /* 0x0040640000000000 */ /*00b0*/ IMAD.WIDE R4, R0, R7, c[0x4][0xa0] ; /* 0x0100280000047625 */ /* 0x001fca00078e0207 */ /*00c0*/ STG.E.64 [R2.64], R8 ; /* 0x0000000802007986 */ /* 0x0021e8000c101b04 */ /*00d0*/ LDG.E.64 R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea2000c1e1b00 */ /*00e0*/ SHF.R.S32.HI R15, RZ, 0x1f, R0 ; /* 0x0000001fff0f7819 */ /* 0x000fe40000011400 */ /*00f0*/ IADD3 R12, P0, R0, c[0x4][0x68], RZ ; /* 0x01001a00000c7a10 */ /* 0x000fc80007f1e0ff */ /*0100*/ IADD3.X R13, R15, c[0x4][0x6c], RZ, P0, !PT ; /* 0x01001b000f0d7a10 */ /* 0x000fe200007fe4ff */ /*0110*/ DMUL R6, R6, c[0x2][0x8] ; /* 0x0080020006067a28 */ /* 0x004e4e0000000000 */ /*0120*/ STG.E.64 [R4.64], R6 ; /* 0x0000000604007986 */ /* 0x0023e8000c101b04 */ /*0130*/ LDG.E.U8 R12, [R12.64] ; /* 0x000000040c0c7981 */ /* 0x000ea2000c1e1100 */ /*0140*/ IMAD.SHL.U32 R16, R0.reuse, 0x8, RZ ; /* 0x0000000800107824 */ /* 0x040fe200078e00ff */ /*0150*/ SHF.L.U64.HI R17, R0.reuse, 0x3, R15 ; /* 0x0000000300117819 */ /* 0x040fe2000001020f */ /*0160*/ BSSY B0, 0x350 ; /* 0x000001e000007945 */ /* 0x000fe20003800000 */ /*0170*/ ISETP.NE.AND P2, PT, R0, 0x3, PT ; /* 0x000000030000780c */ /* 0x000fe40003f45270 */ /*0180*/ IADD3 R14, P1, R16, c[0x4][0x50], RZ ; /* 0x01001400100e7a10 */ /* 0x000fc40007f3e0ff */ /*0190*/ ISETP.NE.AND P6, PT, R0.reuse, 0x1, PT ; /* 0x000000010000780c */ /* 0x040fe40003fc5270 */ /*01a0*/ IADD3.X R15, R17, c[0x4][0x54], RZ, P1, !PT ; /* 0x01001500110f7a10 */ /* 0x000fe40000ffe4ff */ /*01b0*/ ISETP.NE.AND P5, PT, R0.reuse, 0x2, PT ; /* 0x000000020000780c */ /* 0x040fe40003fa5270 */ /*01c0*/ ISETP.NE.AND P4, PT, R0.reuse, 0x4, PT ; /* 0x000000040000780c */ /* 0x040fe40003f85270 */ /*01d0*/ ISETP.NE.AND P3, PT, R0, 0x5, PT ; /* 0x000000050000780c */ /* 0x000fe40003f65270 */ /*01e0*/ ISETP.NE.AND P0, PT, R12, 0x1, PT ; /* 0x000000010c00780c */ /* 0x004fc40003f05270 */ /*01f0*/ IADD3 R12, P1, R16, c[0x4][0x48], RZ ; /* 0x01001200100c7a10 */ /* 0x000fc80007f3e0ff */ /*0200*/ IADD3.X R13, R17, c[0x4][0x4c], RZ, P1, !PT ; /* 0x01001300110d7a10 */ /* 0x000fe40000ffe4ff */ /*0210*/ ISETP.NE.AND P1, PT, R0, 0x7, PT ; /* 0x000000070000780c */ /* 0x000fca0003f25270 */ /*0220*/ @!P0 DADD R8, R8, 1 ; /* 0x3ff0000008088429 */ /* 0x001e080000000000 */ /*0230*/ @!P0 DADD R6, R6, 1 ; /* 0x3ff0000006068429 */ /* 0x002e460000000000 */ /*0240*/ @!P0 STG.E.64 [R2.64], R8 ; /* 0x0000000802008986 */ /* 0x0011e6000c101b04 */ /*0250*/ DADD R10, -R6, R8 ; /* 0x00000000060a7229 */ /* 0x002e620000000108 */ /*0260*/ @!P0 STG.E.64 [R4.64], R6 ; /* 0x0000000604008986 */ /* 0x0005e2000c101b04 */ /*0270*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fc80003f05270 */ /*0280*/ DMUL R10, R10, c[0x2][0x10] ; /* 0x008004000a0a7a28 */ /* 0x002e620000000000 */ /*0290*/ P2R R2, PR, RZ, 0x4 ; /* 0x00000004ff027803 */ /* 0x001fe20000000000 */ /*02a0*/ CS2R R2, SRZ ; /* 0x0000000000027805 */ /* 0x000fca000001ff00 */ /*02b0*/ STG.E.64 [R14.64], R10 ; /* 0x0000000a0e007986 */ /* 0x0021e2000c101b04 */ /*02c0*/ ISETP.NE.AND P2, PT, R0, 0x6, PT ; /* 0x000000060000780c */ /* 0x000fe20003f45270 */ /*02d0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x50] ; /* 0x01001400ff047624 */ /* 0x004fe400078e00ff */ /*02e0*/ STG.E.64 [R12.64], RZ ; /* 0x000000ff0c007986 */ /* 0x0001e2000c101b04 */ /*02f0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x54] ; /* 0x01001500ff057624 */ /* 0x000fe200078e00ff */ /*0300*/ @!P0 BRA 0x340 ; /* 0x0000003000008947 */ /* 0x000fea0003800000 */ /*0310*/ LDG.E.64 R2, [R4.64] ; /* 0x0000000404027981 */ /* 0x000ea4000c1e1b00 */ /*0320*/ DADD R2, RZ, R2 ; /* 0x00000000ff027229 */ /* 0x004e4e0000000002 */ /*0330*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*0340*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0350*/ BSSY B0, 0x3c0 ; /* 0x0000006000007945 */ /* 0x000fe20003800000 */ /*0360*/ ISETP.NE.AND P0, PT, R0, 0x8, PT ; /* 0x000000080000780c */ /* 0x000fe20003f05270 */ /*0370*/ @!P6 BRA 0x3b0 ; /* 0x000000300000e947 */ /* 0x000fee0003800000 */ /*0380*/ LDG.E.64 R6, [R4.64+0x8] ; /* 0x0000080404067981 */ /* 0x000ea4000c1e1b00 */ /*0390*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */ /* 0x006e4e0000000006 */ /*03a0*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*03b0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*03c0*/ BSSY B0, 0x430 ; /* 0x0000006000007945 */ /* 0x000fe20003800000 */ /*03d0*/ ISETP.NE.AND P6, PT, R0, 0x9, PT ; /* 0x000000090000780c */ /* 0x000fe20003fc5270 */ /*03e0*/ @!P5 BRA 0x420 ; /* 0x000000300000d947 */ /* 0x000fee0003800000 */ /*03f0*/ LDG.E.64 R6, [R4.64+0x10] ; /* 0x0000100404067981 */ /* 0x000ea4000c1e1b00 */ /*0400*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */ /* 0x006e4e0000000006 */ /*0410*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*0420*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0430*/ ISETP.NE.AND P5, PT, R0, 0x3, PT ; /* 0x000000030000780c */ /* 0x000fe20003fa5270 */ /*0440*/ BSSY B0, 0x4a0 ; /* 0x0000005000007945 */ /* 0x000fd80003800000 */ /*0450*/ @!P5 BRA 0x490 ; /* 0x000000300000d947 */ /* 0x000fea0003800000 */ /*0460*/ LDG.E.64 R6, [R4.64+0x18] ; /* 0x0000180404067981 */ /* 0x000ea4000c1e1b00 */ /*0470*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */ /* 0x006e4e0000000006 */ /*0480*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*0490*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*04a0*/ BSSY B0, 0x500 ; /* 0x0000005000007945 */ /* 0x000fe20003800000 */ /*04b0*/ @!P4 BRA 0x4f0 ; /* 0x000000300000c947 */ /* 0x000fea0003800000 */ /*04c0*/ LDG.E.64 R6, [R4.64+0x20] ; /* 0x0000200404067981 */ /* 0x000ea4000c1e1b00 */ /*04d0*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */ /* 0x006e4e0000000006 */ /*04e0*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*04f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0500*/ BSSY B0, 0x560 ; /* 0x0000005000007945 */ /* 0x000fe20003800000 */ /*0510*/ @!P3 BRA 0x550 ; /* 0x000000300000b947 */ /* 0x000fea0003800000 */ /*0520*/ LDG.E.64 R6, [R4.64+0x28] ; /* 0x0000280404067981 */ /* 0x000ea4000c1e1b00 */ /*0530*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */ /* 0x006e4e0000000006 */ /*0540*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*0550*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0560*/ BSSY B0, 0x5c0 ; /* 0x0000005000007945 */ /* 0x000fe20003800000 */ /*0570*/ @!P2 BRA 0x5b0 ; /* 0x000000300000a947 */ /* 0x000fea0003800000 */ /*0580*/ LDG.E.64 R6, [R4.64+0x30] ; /* 0x0000300404067981 */ /* 0x000ea4000c1e1b00 */ /*0590*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */ /* 0x006e4e0000000006 */ /*05a0*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*05b0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*05c0*/ BSSY B0, 0x620 ; /* 0x0000005000007945 */ /* 0x000fe20003800000 */ /*05d0*/ @!P1 BRA 0x610 ; /* 0x0000003000009947 */ /* 0x000fea0003800000 */ /*05e0*/ LDG.E.64 R6, [R4.64+0x38] ; /* 0x0000380404067981 */ /* 0x000ea4000c1e1b00 */ /*05f0*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */ /* 0x006e4e0000000006 */ /*0600*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*0610*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0620*/ BSSY B0, 0x680 ; /* 0x0000005000007945 */ /* 0x000fe20003800000 */ /*0630*/ @!P0 BRA 0x670 ; /* 0x0000003000008947 */ /* 0x000fea0003800000 */ /*0640*/ LDG.E.64 R6, [R4.64+0x40] ; /* 0x0000400404067981 */ /* 0x000ea4000c1e1b00 */ /*0650*/ DADD R2, R2, R6 ; /* 0x0000000002027229 */ /* 0x006e4e0000000006 */ /*0660*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x0023e8000c101b04 */ /*0670*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0680*/ @!P6 EXIT ; /* 0x000000000000e94d */ /* 0x000fea0003800000 */ /*0690*/ LDG.E.64 R4, [R4.64+0x48] ; /* 0x0000480404047981 */ /* 0x000ea4000c1e1b00 */ /*06a0*/ DADD R2, R4, R2 ; /* 0x0000000004027229 */ /* 0x006e4e0000000002 */ /*06b0*/ STG.E.64 [R12.64], R2 ; /* 0x000000020c007986 */ /* 0x002fe2000c101b04 */ /*06c0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*06d0*/ BRA 0x6d0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*06e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*06f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0700*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0710*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0720*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0730*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0740*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0750*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0760*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0770*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z9SynKerneli .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002200 */ /*0030*/ S2R R16, SR_CTAID.X ; /* 0x0000000000107919 */ /* 0x000e680000002500 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e620000002100 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R5 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0205 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x9, PT ; /* 0x000000090000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R16, R16, c[0x0][0x0], R3 ; /* 0x0000000010107a24 */ /* 0x002fca00078e0203 */ /*0080*/ ISETP.GT.OR P0, PT, R16, 0x1faf, P0 ; /* 0x00001faf1000780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fe20003f05270 */ /*00b0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x8 ; /* 0x00000008ff0b7424 */ /* 0x000fe200078e00ff */ /*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00d0*/ BSSY B0, 0x420 ; /* 0x0000034000007945 */ /* 0x000fe20003800000 */ /*00e0*/ SHF.R.S32.HI R17, RZ, 0x1f, R16 ; /* 0x0000001fff117819 */ /* 0x000fe20000011410 */ /*00f0*/ IMAD.WIDE R8, R16, R11, c[0x4][0x78] ; /* 0x01001e0010087625 */ /* 0x000fc800078e020b */ /*0100*/ IMAD.WIDE R10, R16, R11, c[0x4][0x88] ; /* 0x01002200100a7625 */ /* 0x000fc800078e020b */ /*0110*/ @P0 BRA 0x410 ; /* 0x000002f000000947 */ /* 0x000fea0003800000 */ /*0120*/ LDG.E.64 R2, [R8.64] ; /* 0x0000000408027981 */ /* 0x000ea4000c1e1b00 */ /*0130*/ DMUL R2, R2, c[0x2][0x0] ; /* 0x0080000002027a28 */ /* 0x004e0e0000000000 */ /*0140*/ STG.E.64 [R8.64], R2 ; /* 0x0000000208007986 */ /* 0x0011e8000c101b04 */ /*0150*/ LDG.E.64 R12, [R10.64] ; /* 0x000000040a0c7981 */ /* 0x000ea2000c1e1b00 */ /*0160*/ IADD3 R14, P0, R16, c[0x4][0x28], RZ ; /* 0x01000a00100e7a10 */ /* 0x000fc80007f1e0ff */ /*0170*/ IADD3.X R15, R17, c[0x4][0x2c], RZ, P0, !PT ; /* 0x01000b00110f7a10 */ /* 0x000fe200007fe4ff */ /*0180*/ DMUL R12, R12, c[0x2][0x8] ; /* 0x008002000c0c7a28 */ /* 0x004e4e0000000000 */ /*0190*/ STG.E.64 [R10.64], R12 ; /* 0x0000000c0a007986 */ /* 0x0023e8000c101b04 */ /*01a0*/ LDG.E.U8 R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x0004e2000c1e1100 */ /*01b0*/ IMAD.SHL.U32 R18, R16.reuse, 0x8, RZ ; /* 0x0000000810127824 */ /* 0x040fe200078e00ff */ /*01c0*/ SHF.L.U64.HI R19, R16, 0x3, R17 ; /* 0x0000000310137819 */ /* 0x000fc80000010211 */ /*01d0*/ IADD3 R6, P1, R18, c[0x4][0x80], RZ ; /* 0x0100200012067a10 */ /* 0x000fc80007f3e0ff */ /*01e0*/ IADD3.X R7, R19, c[0x4][0x84], RZ, P1, !PT ; /* 0x0100210013077a10 */ /* 0x000fe20000ffe4ff */ /*01f0*/ MUFU.RCP64H R15, 2.999998027775063747e-10 ; /* 0x3df49da7000f7908 */ /* 0x004ea20000001800 */ /*0200*/ IMAD.MOV.U32 R22, RZ, RZ, -0x1c9e31b4 ; /* 0xe361ce4cff167424 */ /* 0x000fe400078e00ff */ /*0210*/ IMAD.MOV.U32 R23, RZ, RZ, 0x3df49da7 ; /* 0x3df49da7ff177424 */ /* 0x000fe200078e00ff */ /*0220*/ ISETP.NE.AND P0, PT, R14, 0x1, PT ; /* 0x000000010e00780c */ /* 0x008fda0003f05270 */ /*0230*/ @!P0 DADD R2, R2, 1 ; /* 0x3ff0000002028429 */ /* 0x001e080000000000 */ /*0240*/ @!P0 DADD R12, R12, 1 ; /* 0x3ff000000c0c8429 */ /* 0x002e460000000000 */ /*0250*/ @!P0 STG.E.64 [R8.64], R2 ; /* 0x0000000208008986 */ /* 0x0011e8000c101b04 */ /*0260*/ @!P0 STG.E.64 [R10.64], R12 ; /* 0x0000000c0a008986 */ /* 0x0023e8000c101b04 */ /*0270*/ LDG.E.64 R4, [R6.64] ; /* 0x0000000406047981 */ /* 0x000762000c1e1b00 */ /*0280*/ IMAD.MOV.U32 R14, RZ, RZ, 0x1 ; /* 0x00000001ff0e7424 */ /* 0x000fe200078e00ff */ /*0290*/ BSSY B1, 0x3b0 ; /* 0x0000011000017945 */ /* 0x000fea0003800000 */ /*02a0*/ DFMA R20, R14, -R22, 1 ; /* 0x3ff000000e14742b */ /* 0x004e8c0000000816 */ /*02b0*/ DFMA R20, R20, R20, R20 ; /* 0x000000141414722b */ /* 0x004e8c0000000014 */ /*02c0*/ DFMA R20, R14, R20, R14 ; /* 0x000000140e14722b */ /* 0x004e88000000000e */ /*02d0*/ DADD R14, -R12, R2 ; /* 0x000000000c0e7229 */ /* 0x000f080000000102 */ /*02e0*/ DFMA R22, R20, -R22, 1 ; /* 0x3ff000001416742b */ /* 0x004e880000000816 */ /*02f0*/ DMUL R24, R14, c[0x2][0x10] ; /* 0x008004000e187a28 */ /* 0x010fc80000000000 */ /*0300*/ DFMA R22, R20, R22, R20 ; /* 0x000000161416722b */ /* 0x004e0c0000000014 */ /*0310*/ DMUL R2, R24, R22 ; /* 0x0000001618027228 */ /* 0x001e620000000000 */ /*0320*/ FSETP.GEU.AND P1, PT, |R25|, 6.5827683646048100446e-37, PT ; /* 0x036000001900780b */ /* 0x000fca0003f2e200 */ /*0330*/ DFMA R12, R2, c[0x2][0x18], R24 ; /* 0x00800600020c7a2b */ /* 0x002e0c0000000018 */ /*0340*/ DFMA R2, R22, R12, R2 ; /* 0x0000000c1602722b */ /* 0x001e140000000002 */ /*0350*/ FFMA R12, RZ, 0.11944132298231124878, R3 ; /* 0x3df49da7ff0c7823 */ /* 0x001fca0000000003 */ /*0360*/ FSETP.GT.AND P0, PT, |R12|, 1.469367938527859385e-39, PT ; /* 0x001000000c00780b */ /* 0x000fda0003f04200 */ /*0370*/ @P0 BRA P1, 0x3a0 ; /* 0x0000002000000947 */ /* 0x000fea0000800000 */ /*0380*/ MOV R20, 0x3a0 ; /* 0x000003a000147802 */ /* 0x008fe40000000f00 */ /*0390*/ CALL.REL.NOINC 0x520 ; /* 0x0000018000007944 */ /* 0x020fea0003c00000 */ /*03a0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x008fea0003800000 */ /*03b0*/ DFMA R4, R4, c[0x2][0x20], R2 ; /* 0x0080080004047a2b */ /* 0x020e220000000002 */ /*03c0*/ IADD3 R18, P0, R18, c[0x4][0xa8], RZ ; /* 0x01002a0012127a10 */ /* 0x000fc80007f1e0ff */ /*03d0*/ IADD3.X R19, R19, c[0x4][0xac], RZ, P0, !PT ; /* 0x01002b0013137a10 */ /* 0x000fe200007fe4ff */ /*03e0*/ DMUL R2, R4, R4 ; /* 0x0000000404027228 */ /* 0x001e220000000000 */ /*03f0*/ STG.E.64 [R6.64], R4 ; /* 0x0000000406007986 */ /* 0x0003ec000c101b04 */ /*0400*/ STG.E.64 [R18.64], R2 ; /* 0x0000000212007986 */ /* 0x0013e8000c101b04 */ /*0410*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0420*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0430*/ IMAD.MOV.U32 R13, RZ, RZ, 0x50 ; /* 0x00000050ff0d7424 */ /* 0x000fe400078e00ff */ /*0440*/ IMAD R7, R17, 0x50, RZ ; /* 0x0000005011077824 */ /* 0x002fc400078e02ff */ /*0450*/ IMAD.WIDE.U32 R2, R16, R13, c[0x4][0x38] ; /* 0x01000e0010027625 */ /* 0x000fc800078e000d */ /*0460*/ IMAD.IADD R3, R3, 0x1, R7 ; /* 0x0000000103037824 */ /* 0x000fc800078e0207 */ /*0470*/ IMAD.WIDE R4, R0, 0x8, R2 ; /* 0x0000000800047825 */ /* 0x000fe200078e0202 */ /*0480*/ LDG.E.64 R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ea8000c1e1b00 */ /*0490*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ea8000c1e1b00 */ /*04a0*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ee2000c1e1b00 */ /*04b0*/ IMAD.WIDE.U32 R16, R16, R13, c[0x4][0x30] ; /* 0x01000c0010107625 */ /* 0x000fc800078e000d */ /*04c0*/ IMAD.IADD R17, R7, 0x1, R17 ; /* 0x0000000107117824 */ /* 0x000fc800078e0211 */ /*04d0*/ IMAD.WIDE R6, R0, 0x8, R16 ; /* 0x0000000800067825 */ /* 0x000fe200078e0210 */ /*04e0*/ DADD R2, -R10, R8 ; /* 0x000000000a027229 */ /* 0x004ecc0000000108 */ /*04f0*/ DMUL R2, R2, R4 ; /* 0x0000000402027228 */ /* 0x008e0e0000000000 */ /*0500*/ STG.E.64 [R6.64], R2 ; /* 0x0000000206007986 */ /* 0x001fe2000c101b04 */ /*0510*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0520*/ IMAD.MOV.U32 R3, RZ, RZ, 0x3ff49da7 ; /* 0x3ff49da7ff037424 */ /* 0x000fe200078e00ff */ /*0530*/ BSSY B2, 0xa00 ; /* 0x000004c000027945 */ /* 0x000fe20003800000 */ /*0540*/ IMAD.MOV.U32 R13, RZ, RZ, R25 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e0019 */ /*0550*/ MUFU.RCP64H R15, R3 ; /* 0x00000003000f7308 */ /* 0x000e220000001800 */ /*0560*/ IMAD.MOV.U32 R2, RZ, RZ, -0x1c9e31b4 ; /* 0xe361ce4cff027424 */ /* 0x000fe400078e00ff */ /*0570*/ IMAD.MOV.U32 R14, RZ, RZ, 0x1 ; /* 0x00000001ff0e7424 */ /* 0x000fe200078e00ff */ /*0580*/ FSETP.GEU.AND P1, PT, |R13|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000d00780b */ /* 0x040fe20003f2e200 */ /*0590*/ IMAD.MOV.U32 R26, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff1a7424 */ /* 0x000fe200078e00ff */ /*05a0*/ LOP3.LUT R21, R13, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000d157812 */ /* 0x000fe200078ec0ff */ /*05b0*/ IMAD.MOV.U32 R12, RZ, RZ, R24 ; /* 0x000000ffff0c7224 */ /* 0x000fc400078e0018 */ /*05c0*/ IMAD.MOV.U32 R31, RZ, RZ, 0x3df00000 ; /* 0x3df00000ff1f7424 */ /* 0x000fe200078e00ff */ /*05d0*/ ISETP.GE.U32.AND P0, PT, R21, 0x3df00000, PT ; /* 0x3df000001500780c */ /* 0x000fe20003f06070 */ /*05e0*/ IMAD.MOV.U32 R30, RZ, RZ, R21 ; /* 0x000000ffff1e7224 */ /* 0x000fc600078e0015 */ /*05f0*/ IADD3 R32, R31, -0x1, RZ ; /* 0xffffffff1f207810 */ /* 0x000fe20007ffe0ff */ /*0600*/ DFMA R22, R14, -R2, 1 ; /* 0x3ff000000e16742b */ /* 0x001e0c0000000802 */ /*0610*/ DFMA R24, R22, R22, R22 ; /* 0x000000161618722b */ /* 0x0010640000000016 */ /*0620*/ SEL R23, R26, 0x63400000, !P0 ; /* 0x634000001a177807 */ /* 0x001fc80004000000 */ /*0630*/ @!P1 LOP3.LUT R26, R23.reuse, 0x80000000, R13.reuse, 0xf8, !PT ; /* 0x80000000171a9812 */ /* 0x140fe200078ef80d */ /*0640*/ DFMA R24, R14, R24, R14 ; /* 0x000000180e18722b */ /* 0x002064000000000e */ /*0650*/ LOP3.LUT R15, R23, 0x800fffff, R13, 0xf8, !PT ; /* 0x800fffff170f7812 */ /* 0x001fe200078ef80d */ /*0660*/ IMAD.MOV.U32 R14, RZ, RZ, R12 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e000c */ /*0670*/ @!P1 LOP3.LUT R27, R26, 0x100000, RZ, 0xfc, !PT ; /* 0x001000001a1b9812 */ /* 0x000fe200078efcff */ /*0680*/ @!P1 IMAD.MOV.U32 R26, RZ, RZ, RZ ; /* 0x000000ffff1a9224 */ /* 0x000fe200078e00ff */ /*0690*/ DFMA R28, R24, -R2, 1 ; /* 0x3ff00000181c742b */ /* 0x002e0a0000000802 */ /*06a0*/ @!P1 DFMA R14, R14, 2, -R26 ; /* 0x400000000e0e982b */ /* 0x000e48000000081a */ /*06b0*/ DFMA R24, R24, R28, R24 ; /* 0x0000001c1818722b */ /* 0x001e0c0000000018 */ /*06c0*/ @!P1 LOP3.LUT R30, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f1e9812 */ /* 0x002fe200078ec0ff */ /*06d0*/ DMUL R26, R24, R14 ; /* 0x0000000e181a7228 */ /* 0x001e060000000000 */ /*06e0*/ IADD3 R22, R30, -0x1, RZ ; /* 0xffffffff1e167810 */ /* 0x000fc60007ffe0ff */ /*06f0*/ DFMA R28, R26, -R2, R14 ; /* 0x800000021a1c722b */ /* 0x001e22000000000e */ /*0700*/ ISETP.GT.U32.AND P0, PT, R22, 0x7feffffe, PT ; /* 0x7feffffe1600780c */ /* 0x000fc80003f04070 */ /*0710*/ ISETP.GT.U32.OR P0, PT, R32, 0x7feffffe, P0 ; /* 0x7feffffe2000780c */ /* 0x000fe20000704470 */ /*0720*/ DFMA R24, R24, R28, R26 ; /* 0x0000001c1818722b */ /* 0x001058000000001a */ /*0730*/ @P0 BRA 0x8e0 ; /* 0x000001a000000947 */ /* 0x000fea0003800000 */ /*0740*/ IADD3 R21, R21, -0x3df00000, RZ ; /* 0xc210000015157810 */ /* 0x003fc80007ffe0ff */ /*0750*/ IMNMX R21, R21, -0x46a00000, !PT ; /* 0xb960000015157817 */ /* 0x000fc80007800200 */ /*0760*/ IMNMX R12, R21, 0x46a00000, PT ; /* 0x46a00000150c7817 */ /* 0x000fca0003800200 */ /*0770*/ IMAD.IADD R21, R12, 0x1, -R23 ; /* 0x000000010c157824 */ /* 0x000fe400078e0a17 */ /*0780*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x000fc600078e00ff */ /*0790*/ IADD3 R13, R21, 0x7fe00000, RZ ; /* 0x7fe00000150d7810 */ /* 0x000fcc0007ffe0ff */ /*07a0*/ DMUL R22, R24, R12 ; /* 0x0000000c18167228 */ /* 0x000e140000000000 */ /*07b0*/ FSETP.GTU.AND P0, PT, |R23|, 1.469367938527859385e-39, PT ; /* 0x001000001700780b */ /* 0x001fda0003f0c200 */ /*07c0*/ @P0 BRA 0x9f0 ; /* 0x0000022000000947 */ /* 0x000fea0003800000 */ /*07d0*/ DFMA R2, R24, -R2, R14 ; /* 0x800000021802722b */ /* 0x000e22000000000e */ /*07e0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x000fd200078e00ff */ /*07f0*/ FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT ; /* 0x000000ff0300720b */ /* 0x041fe40003f0d000 */ /*0800*/ LOP3.LUT R2, R3, 0x3df49da7, RZ, 0x3c, !PT ; /* 0x3df49da703027812 */ /* 0x000fc800078e3cff */ /*0810*/ LOP3.LUT R15, R2, 0x80000000, RZ, 0xc0, !PT ; /* 0x80000000020f7812 */ /* 0x000fc800078ec0ff */ /*0820*/ LOP3.LUT R13, R15, R13, RZ, 0xfc, !PT ; /* 0x0000000d0f0d7212 */ /* 0x000fc600078efcff */ /*0830*/ @!P0 BRA 0x9f0 ; /* 0x000001b000008947 */ /* 0x000fea0003800000 */ /*0840*/ IMAD.MOV R3, RZ, RZ, -R21 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0a15 */ /*0850*/ DMUL.RP R12, R24, R12 ; /* 0x0000000c180c7228 */ /* 0x000e220000008000 */ /*0860*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fcc00078e00ff */ /*0870*/ DFMA R2, R22, -R2, R24 ; /* 0x800000021602722b */ /* 0x000e460000000018 */ /*0880*/ LOP3.LUT R15, R13, R15, RZ, 0x3c, !PT ; /* 0x0000000f0d0f7212 */ /* 0x001fc600078e3cff */ /*0890*/ IADD3 R2, -R21, -0x43300000, RZ ; /* 0xbcd0000015027810 */ /* 0x002fc80007ffe1ff */ /*08a0*/ FSETP.NEU.AND P0, PT, |R3|, R2, PT ; /* 0x000000020300720b */ /* 0x000fc80003f0d200 */ /*08b0*/ FSEL R22, R12, R22, !P0 ; /* 0x000000160c167208 */ /* 0x000fe40004000000 */ /*08c0*/ FSEL R23, R15, R23, !P0 ; /* 0x000000170f177208 */ /* 0x000fe20004000000 */ /*08d0*/ BRA 0x9f0 ; /* 0x0000011000007947 */ /* 0x000fea0003800000 */ /*08e0*/ DSETP.NAN.AND P0, PT, R12, R12, PT ; /* 0x0000000c0c00722a */ /* 0x003e1c0003f08000 */ /*08f0*/ @P0 BRA 0x9d0 ; /* 0x000000d000000947 */ /* 0x001fea0003800000 */ /*0900*/ ISETP.NE.AND P0, PT, R30, R31, PT ; /* 0x0000001f1e00720c */ /* 0x000fe20003f05270 */ /*0910*/ IMAD.MOV.U32 R22, RZ, RZ, 0x0 ; /* 0x00000000ff167424 */ /* 0x000fe400078e00ff */ /*0920*/ IMAD.MOV.U32 R23, RZ, RZ, -0x80000 ; /* 0xfff80000ff177424 */ /* 0x000fd400078e00ff */ /*0930*/ @!P0 BRA 0x9f0 ; /* 0x000000b000008947 */ /* 0x000fea0003800000 */ /*0940*/ ISETP.NE.AND P0, PT, R30, 0x7ff00000, PT ; /* 0x7ff000001e00780c */ /* 0x000fe40003f05270 */ /*0950*/ LOP3.LUT R12, R13, 0x3df49da7, RZ, 0x3c, !PT ; /* 0x3df49da70d0c7812 */ /* 0x000fe400078e3cff */ /*0960*/ ISETP.EQ.OR P0, PT, R31, RZ, !P0 ; /* 0x000000ff1f00720c */ /* 0x000fe40004702670 */ /*0970*/ LOP3.LUT R23, R12, 0x80000000, RZ, 0xc0, !PT ; /* 0x800000000c177812 */ /* 0x000fd600078ec0ff */ /*0980*/ @P0 LOP3.LUT R2, R23, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff0000017020812 */ /* 0x000fe200078efcff */ /*0990*/ @!P0 IMAD.MOV.U32 R22, RZ, RZ, RZ ; /* 0x000000ffff168224 */ /* 0x000fe400078e00ff */ /*09a0*/ @P0 IMAD.MOV.U32 R22, RZ, RZ, RZ ; /* 0x000000ffff160224 */ /* 0x000fe400078e00ff */ /*09b0*/ @P0 IMAD.MOV.U32 R23, RZ, RZ, R2 ; /* 0x000000ffff170224 */ /* 0x000fe200078e0002 */ /*09c0*/ BRA 0x9f0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*09d0*/ LOP3.LUT R23, R13, 0x80000, RZ, 0xfc, !PT ; /* 0x000800000d177812 */ /* 0x000fe200078efcff */ /*09e0*/ IMAD.MOV.U32 R22, RZ, RZ, R12 ; /* 0x000000ffff167224 */ /* 0x000fe400078e000c */ /*09f0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0a00*/ IMAD.MOV.U32 R21, RZ, RZ, 0x0 ; /* 0x00000000ff157424 */ /* 0x000fe400078e00ff */ /*0a10*/ IMAD.MOV.U32 R2, RZ, RZ, R22 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0016 */ /*0a20*/ IMAD.MOV.U32 R3, RZ, RZ, R23 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0017 */ /*0a30*/ RET.REL.NODEC R20 0x0 ; /* 0xfffff5c014007950 */ /* 0x000fec0003c3ffff */ /*0a40*/ BRA 0xa40; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0a50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0aa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ab0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ac0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ad0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ae0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0af0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z10LifKernel2i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */ /* 0x000e280000002500 */ /*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R5, R5, c[0x0][0x0], R0 ; /* 0x0000000005057a24 */ /* 0x001fca00078e0200 */ /*0040*/ ISETP.GT.AND P0, PT, R5, 0x9, PT ; /* 0x000000090500780c */ /* 0x000fda0003f04270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ IMAD.MOV.U32 R18, RZ, RZ, 0x4 ; /* 0x00000004ff127424 */ /* 0x000fe200078e00ff */ /*0070*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fc60000000a00 */ /*0080*/ IMAD.WIDE R18, R5, R18, c[0x4][0xb8] ; /* 0x01002e0005127625 */ /* 0x000fca00078e0212 */ /*0090*/ LDG.E R6, [R18.64] ; /* 0x0000000612067981 */ /* 0x000ea2000c1e1900 */ /*00a0*/ IMAD.SHL.U32 R10, R5, 0x8, RZ ; /* 0x00000008050a7824 */ /* 0x000fe200078e00ff */ /*00b0*/ SHF.R.S32.HI R8, RZ, 0x1f, R5 ; /* 0x0000001fff087819 */ /* 0x000fc80000011405 */ /*00c0*/ IADD3 R16, P1, R10.reuse, c[0x4][0xc8], RZ ; /* 0x010032000a107a10 */ /* 0x040fe40007f3e0ff */ /*00d0*/ SHF.L.U64.HI R0, R5, 0x3, R8 ; /* 0x0000000305007819 */ /* 0x000fe40000010208 */ /*00e0*/ IADD3 R12, P2, R10, c[0x4][0x40], RZ ; /* 0x010010000a0c7a10 */ /* 0x000fe40007f5e0ff */ /*00f0*/ IADD3.X R17, R0.reuse, c[0x4][0xcc], RZ, P1, !PT ; /* 0x0100330000117a10 */ /* 0x040fe40000ffe4ff */ /*0100*/ IADD3.X R13, R0, c[0x4][0x44], RZ, P2, !PT ; /* 0x01001100000d7a10 */ /* 0x000fe400017fe4ff */ /*0110*/ IADD3 R10, P1, R10, c[0x4][0x48], RZ ; /* 0x010012000a0a7a10 */ /* 0x000fc80007f3e0ff */ /*0120*/ IADD3.X R11, R0, c[0x4][0x4c], RZ, P1, !PT ; /* 0x01001300000b7a10 */ /* 0x000fe40000ffe4ff */ /*0130*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x160], PT ; /* 0x0000580006007a0c */ /* 0x004fda0003f06270 */ /*0140*/ @!P0 STG.E [R18.64], RZ ; /* 0x000000ff12008986 */ /* 0x0001e8000c101906 */ /*0150*/ LDG.E.64 R14, [R16.64] ; /* 0x00000006100e7981 */ /* 0x000ea8000c1e1b00 */ /*0160*/ LDG.E.64 R12, [R12.64] ; /* 0x000000060c0c7981 */ /* 0x000ee8000c1e1b00 */ /*0170*/ LDG.E.64 R10, [R10.64] ; /* 0x000000060a0a7981 */ /* 0x000f22000c1e1b00 */ /*0180*/ MUFU.RCP64H R3, 2.999998027775063747e-10 ; /* 0x3df49da700037908 */ /* 0x000e620000001800 */ /*0190*/ IMAD.MOV.U32 R22, RZ, RZ, -0x1c9e31b4 ; /* 0xe361ce4cff167424 */ /* 0x000fe200078e00ff */ /*01a0*/ UMOV UR4, 0xe361ce4c ; /* 0xe361ce4c00047882 */ /* 0x000fe20000000000 */ /*01b0*/ IMAD.MOV.U32 R23, RZ, RZ, 0x3df49da7 ; /* 0x3df49da7ff177424 */ /* 0x000fe200078e00ff */ /*01c0*/ BSSY B0, 0x360 ; /* 0x0000019000007945 */ /* 0x000fe20003800000 */ /*01d0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */ /* 0x000fc400078e00ff */ /*01e0*/ @!P0 IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff068224 */ /* 0x000fc800078e00ff */ /*01f0*/ DFMA R20, R2, -R22, 1 ; /* 0x3ff000000214742b */ /* 0x002e4c0000000816 */ /*0200*/ DFMA R20, R20, R20, R20 ; /* 0x000000141414722b */ /* 0x002e4c0000000014 */ /*0210*/ DFMA R20, R2, R20, R2 ; /* 0x000000140214722b */ /* 0x002e4c0000000002 */ /*0220*/ DFMA R22, R20, -R22, 1 ; /* 0x3ff000001416742b */ /* 0x002e4c0000000816 */ /*0230*/ DFMA R22, R20, R22, R20 ; /* 0x000000161416722b */ /* 0x002fc80000000014 */ /*0240*/ DADD R2, R14, c[0x2][0x0] ; /* 0x008000000e027629 */ /* 0x004ecc0000000000 */ /*0250*/ DFMA R2, R2, c[0x2][0x8], R12 ; /* 0x0080020002027a2b */ /* 0x008f0c000000000c */ /*0260*/ DADD R20, R2, R10 ; /* 0x0000000002147229 */ /* 0x010e4c000000000a */ /*0270*/ DMUL R2, R20, R22 ; /* 0x0000001614027228 */ /* 0x002e480000000000 */ /*0280*/ FSETP.GEU.AND P2, PT, |R21|, 6.5827683646048100446e-37, PT ; /* 0x036000001500780b */ /* 0x000fe40003f4e200 */ /*0290*/ DFMA R24, R2, c[0x2][0x10], R20 ; /* 0x0080040002187a2b */ /* 0x002e4c0000000014 */ /*02a0*/ DFMA R2, R22, R24, R2 ; /* 0x000000181602722b */ /* 0x0022a40000000002 */ /*02b0*/ IMAD.MOV.U32 R23, RZ, RZ, 0x3df49da7 ; /* 0x3df49da7ff177424 */ /* 0x002fd000078e00ff */ /*02c0*/ FFMA R0, RZ, 0.11944132298231124878, R3 ; /* 0x3df49da7ff007823 */ /* 0x004fca0000000003 */ /*02d0*/ FSETP.GT.AND P1, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f24200 */ /*02e0*/ @P1 BRA P2, 0x350 ; /* 0x0000006000001947 */ /* 0x000fea0001000000 */ /*02f0*/ IMAD.MOV.U32 R24, RZ, RZ, R20 ; /* 0x000000ffff187224 */ /* 0x001fe200078e0014 */ /*0300*/ MOV R4, 0x330 ; /* 0x0000033000047802 */ /* 0x000fe20000000f00 */ /*0310*/ IMAD.MOV.U32 R25, RZ, RZ, R21 ; /* 0x000000ffff197224 */ /* 0x000fe400078e0015 */ /*0320*/ CALL.REL.NOINC 0x800 ; /* 0x000004d000007944 */ /* 0x000fea0003c00000 */ /*0330*/ IMAD.MOV.U32 R2, RZ, RZ, R28 ; /* 0x000000ffff027224 */ /* 0x000fe400078e001c */ /*0340*/ IMAD.MOV.U32 R3, RZ, RZ, R29 ; /* 0x000000ffff037224 */ /* 0x000fe400078e001d */ /*0350*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*0360*/ MUFU.RCP64H R25, 2.999998027775063747e-10 ; /* 0x3df49da700197908 */ /* 0x000e220000001800 */ /*0370*/ IMAD.MOV.U32 R26, RZ, RZ, -0x1c9e31b4 ; /* 0xe361ce4cff1a7424 */ /* 0x000fe200078e00ff */ /*0380*/ DFMA R20, R2, c[0x2][0x18], R14 ; /* 0x0080060002147a2b */ /* 0x000ea2000000000e */ /*0390*/ IMAD.MOV.U32 R27, RZ, RZ, 0x3df49da7 ; /* 0x3df49da7ff1b7424 */ /* 0x000fe200078e00ff */ /*03a0*/ BSSY B0, 0x520 ; /* 0x0000017000007945 */ /* 0x000fe20003800000 */ /*03b0*/ IMAD.MOV.U32 R24, RZ, RZ, 0x1 ; /* 0x00000001ff187424 */ /* 0x000fc600078e00ff */ /*03c0*/ DADD R20, R20, c[0x2][0x0] ; /* 0x0080000014147629 */ /* 0x004e8c0000000000 */ /*03d0*/ DFMA R20, R20, c[0x2][0x8], R12 ; /* 0x0080020014147a2b */ /* 0x004e88000000000c */ /*03e0*/ DFMA R28, R24, -R26, 1 ; /* 0x3ff00000181c742b */ /* 0x001e08000000081a */ /*03f0*/ DADD R20, R10, R20 ; /* 0x000000000a147229 */ /* 0x004fc80000000014 */ /*0400*/ DFMA R28, R28, R28, R28 ; /* 0x0000001c1c1c722b */ /* 0x001e0c000000001c */ /*0410*/ DFMA R28, R24, R28, R24 ; /* 0x0000001c181c722b */ /* 0x001e220000000018 */ /*0420*/ FSETP.GEU.AND P1, PT, |R21|, 6.5827683646048100446e-37, PT ; /* 0x036000001500780b */ /* 0x000fca0003f2e200 */ /*0430*/ DFMA R26, R28, -R26, 1 ; /* 0x3ff000001c1a742b */ /* 0x001e0c000000081a */ /*0440*/ DFMA R26, R28, R26, R28 ; /* 0x0000001a1c1a722b */ /* 0x001e0c000000001c */ /*0450*/ DMUL R10, R26, R20 ; /* 0x000000141a0a7228 */ /* 0x001e0c0000000000 */ /*0460*/ DFMA R12, R10, c[0x2][0x10], R20 ; /* 0x008004000a0c7a2b */ /* 0x001e0c0000000014 */ /*0470*/ DFMA R10, R26, R12, R10 ; /* 0x0000000c1a0a722b */ /* 0x001e14000000000a */ /*0480*/ FFMA R0, RZ, 0.11944132298231124878, R11 ; /* 0x3df49da7ff007823 */ /* 0x001fca000000000b */ /*0490*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*04a0*/ @P0 BRA P1, 0x510 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*04b0*/ IMAD.MOV.U32 R24, RZ, RZ, R20 ; /* 0x000000ffff187224 */ /* 0x000fe200078e0014 */ /*04c0*/ MOV R4, 0x4f0 ; /* 0x000004f000047802 */ /* 0x000fe20000000f00 */ /*04d0*/ IMAD.MOV.U32 R25, RZ, RZ, R21 ; /* 0x000000ffff197224 */ /* 0x000fe400078e0015 */ /*04e0*/ CALL.REL.NOINC 0x800 ; /* 0x0000031000007944 */ /* 0x002fea0003c00000 */ /*04f0*/ IMAD.MOV.U32 R10, RZ, RZ, R28 ; /* 0x000000ffff0a7224 */ /* 0x000fe400078e001c */ /*0500*/ IMAD.MOV.U32 R11, RZ, RZ, R29 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e001d */ /*0510*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0520*/ DADD R2, R10, R2 ; /* 0x000000000a027229 */ /* 0x000e220000000002 */ /*0530*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe20003f05270 */ /*0540*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fe200078e00ff */ /*0550*/ BSSY B0, 0x700 ; /* 0x000001a000007945 */ /* 0x000fe40003800000 */ /*0560*/ FSEL R7, RZ, 1.875, P0 ; /* 0x3ff00000ff077808 */ /* 0x000fe20000000000 */ /*0570*/ DMUL R2, R2, c[0x2][0x18] ; /* 0x0080060002027a28 */ /* 0x001e0c0000000000 */ /*0580*/ DMUL R2, R2, 0.5 ; /* 0x3fe0000002027828 */ /* 0x001e0c0000000000 */ /*0590*/ DFMA R2, R2, R6, R14 ; /* 0x000000060202722b */ /* 0x0010a4000000000e */ /*05a0*/ IADD3 R6, P1, R5, c[0x4][0x68], RZ ; /* 0x01001a0005067a10 */ /* 0x001fc80007f3e0ff */ /*05b0*/ DSETP.GEU.AND P0, PT, R2, c[0x2][0x20], PT ; /* 0x008008000200762a */ /* 0x004e220003f0e000 */ /*05c0*/ IADD3.X R7, R8, c[0x4][0x6c], RZ, P1, !PT ; /* 0x01001b0008077a10 */ /* 0x000fca0000ffe4ff */ /*05d0*/ FSEL R2, R2, 1.9515639880220904081e-20, P0 ; /* 0x1eb851ec02027808 */ /* 0x001fe40000000000 */ /*05e0*/ FSEL R3, R3, -1.3899999856948852539, P0 ; /* 0xbfb1eb8503037808 */ /* 0x000fca0000000000 */ /*05f0*/ STG.E.64 [R16.64], R2 ; /* 0x0000000210007986 */ /* 0x0001e2000c101b06 */ /*0600*/ DSETP.GE.AND P0, PT, R2, c[0x2][0x28], PT ; /* 0x00800a000200762a */ /* 0x000e9c0003f06000 */ /*0610*/ @!P0 BRA 0x6d0 ; /* 0x000000b000008947 */ /* 0x004fea0003800000 */ /*0620*/ I2F.F64 R2, c[0x0][0x160] ; /* 0x0000580000027b12 */ /* 0x001e220000201c00 */ /*0630*/ IMAD.MOV.U32 R10, RZ, RZ, 0x1eb851ec ; /* 0x1eb851ecff0a7424 */ /* 0x000fe400078e00ff */ /*0640*/ IMAD.MOV.U32 R11, RZ, RZ, -0x404e147b ; /* 0xbfb1eb85ff0b7424 */ /* 0x000fe400078e00ff */ /*0650*/ IMAD.MOV.U32 R4, RZ, RZ, 0x1 ; /* 0x00000001ff047424 */ /* 0x000fe400078e00ff */ /*0660*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff007424 */ /* 0x000fe200078e00ff */ /*0670*/ STG.E.64 [R16.64], R10 ; /* 0x0000000a10007986 */ /* 0x0005e2000c101b06 */ /*0680*/ DADD R2, R2, 30 ; /* 0x403e000002027429 */ /* 0x001e140000000000 */ /*0690*/ F2I.F64.TRUNC R3, R2 ; /* 0x0000000200037311 */ /* 0x001e24000030d100 */ /*06a0*/ STG.E [R18.64], R3 ; /* 0x0000000312007986 */ /* 0x0015e8000c101906 */ /*06b0*/ STG.E.U8 [R6.64], R4 ; /* 0x0000000406007986 */ /* 0x0005e2000c101106 */ /*06c0*/ BRA 0x6f0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*06d0*/ STG.E.U8 [R6.64], RZ ; /* 0x000000ff06007986 */ /* 0x0011e2000c101106 */ /*06e0*/ PRMT R0, RZ, 0x7610, R0 ; /* 0x00007610ff007816 */ /* 0x000fc60000000000 */ /*06f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0700*/ IMAD.MOV.U32 R2, RZ, RZ, 0x3e8 ; /* 0x000003e8ff027424 */ /* 0x000fe200078e00ff */ /*0710*/ ULDC UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */ /* 0x000fe20000000800 */ /*0720*/ IMAD R7, R8, 0x3e8, RZ ; /* 0x000003e808077824 */ /* 0x005fe200078e02ff */ /*0730*/ USHF.R.S32.HI UR4, URZ, 0x1f, UR4 ; /* 0x0000001f3f047899 */ /* 0x000fe20008011404 */ /*0740*/ IMAD.WIDE.U32 R2, R5, R2, c[0x4][0x58] ; /* 0x0100160005027625 */ /* 0x000fca00078e0002 */ /*0750*/ IADD3 R2, P0, R2, c[0x0][0x160], RZ ; /* 0x0000580002027a10 */ /* 0x000fc80007f1e0ff */ /*0760*/ IADD3.X R3, R3, UR4, R7, P0, !PT ; /* 0x0000000403037c10 */ /* 0x000fca00087fe407 */ /*0770*/ LDG.E.U8 R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000ea2000c1e1100 */ /*0780*/ IMAD.MOV R0, RZ, RZ, -R0 ; /* 0x000000ffff007224 */ /* 0x000fe200078e0a00 */ /*0790*/ IADD3 R4, P0, R5, c[0x4][0x60], RZ ; /* 0x0100180005047a10 */ /* 0x000fc80007f1e0ff */ /*07a0*/ PRMT R7, R0, 0x7710, RZ ; /* 0x0000771000077816 */ /* 0x000fe400000000ff */ /*07b0*/ IADD3.X R5, R8, c[0x4][0x64], RZ, P0, !PT ; /* 0x0100190008057a10 */ /* 0x000fc600007fe4ff */ /*07c0*/ IMAD.IADD R7, R2, 0x1, R7 ; /* 0x0000000102077824 */ /* 0x004fca00078e0207 */ /*07d0*/ STG.E.U8 [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x000fe8000c101106 */ /*07e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*07f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0800*/ FSETP.GEU.AND P0, PT, |R23|, 1.469367938527859385e-39, PT ; /* 0x001000001700780b */ /* 0x000fe20003f0e200 */ /*0810*/ IMAD.U32 R22, RZ, RZ, UR4 ; /* 0x00000004ff167e24 */ /* 0x000fe2000f8e00ff */ /*0820*/ FSETP.GEU.AND P2, PT, |R25|, 1.469367938527859385e-39, PT ; /* 0x001000001900780b */ /* 0x000fe20003f4e200 */ /*0830*/ IMAD.U32 R20, RZ, RZ, UR4 ; /* 0x00000004ff147e24 */ /* 0x000fe2000f8e00ff */ /*0840*/ LOP3.LUT R0, R23, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff17007812 */ /* 0x000fe200078ec0ff */ /*0850*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff097424 */ /* 0x000fe200078e00ff */ /*0860*/ LOP3.LUT R7, R25, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000019077812 */ /* 0x000fe200078ec0ff */ /*0870*/ IMAD.MOV.U32 R34, RZ, RZ, 0x1 ; /* 0x00000001ff227424 */ /* 0x000fe200078e00ff */ /*0880*/ LOP3.LUT R21, R0, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000000157812 */ /* 0x000fe200078efcff */ /*0890*/ IMAD.MOV.U32 R26, RZ, RZ, R24 ; /* 0x000000ffff1a7224 */ /* 0x000fe200078e0018 */ /*08a0*/ LOP3.LUT R32, R23, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000017207812 */ /* 0x000fe200078ec0ff */ /*08b0*/ BSSY B1, 0xdb0 ; /* 0x000004f000017945 */ /* 0x000fe40003800000 */ /*08c0*/ @!P0 DMUL R20, R22, 8.98846567431157953865e+307 ; /* 0x7fe0000016148828 */ /* 0x000e220000000000 */ /*08d0*/ ISETP.GE.U32.AND P1, PT, R7, R32, PT ; /* 0x000000200700720c */ /* 0x000fe20003f26070 */ /*08e0*/ @!P2 IMAD.MOV.U32 R28, RZ, RZ, RZ ; /* 0x000000ffff1ca224 */ /* 0x000fe200078e00ff */ /*08f0*/ @!P2 LOP3.LUT R0, R23, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001700a812 */ /* 0x000fc400078ec0ff */ /*0900*/ SEL R27, R9, 0x63400000, !P1 ; /* 0x63400000091b7807 */ /* 0x000fe20004800000 */ /*0910*/ MUFU.RCP64H R35, R21 ; /* 0x0000001500237308 */ /* 0x001e220000001800 */ /*0920*/ @!P2 ISETP.GE.U32.AND P3, PT, R7, R0, PT ; /* 0x000000000700a20c */ /* 0x000fe20003f66070 */ /*0930*/ IMAD.MOV.U32 R0, RZ, RZ, R7 ; /* 0x000000ffff007224 */ /* 0x000fe200078e0007 */ /*0940*/ LOP3.LUT R27, R27, 0x800fffff, R25, 0xf8, !PT ; /* 0x800fffff1b1b7812 */ /* 0x000fe400078ef819 */ /*0950*/ @!P2 SEL R29, R9, 0x63400000, !P3 ; /* 0x63400000091da807 */ /* 0x000fc80005800000 */ /*0960*/ @!P2 LOP3.LUT R29, R29, 0x80000000, R25, 0xf8, !PT ; /* 0x800000001d1da812 */ /* 0x000fc800078ef819 */ /*0970*/ @!P2 LOP3.LUT R29, R29, 0x100000, RZ, 0xfc, !PT ; /* 0x001000001d1da812 */ /* 0x000fe200078efcff */ /*0980*/ DFMA R30, R34, -R20, 1 ; /* 0x3ff00000221e742b */ /* 0x001e0a0000000814 */ /*0990*/ @!P2 DFMA R26, R26, 2, -R28 ; /* 0x400000001a1aa82b */ /* 0x000fc8000000081c */ /*09a0*/ DFMA R30, R30, R30, R30 ; /* 0x0000001e1e1e722b */ /* 0x001e0c000000001e */ /*09b0*/ DFMA R30, R34, R30, R34 ; /* 0x0000001e221e722b */ /* 0x0010620000000022 */ /*09c0*/ @!P2 LOP3.LUT R0, R27, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001b00a812 */ /* 0x000fe200078ec0ff */ /*09d0*/ IMAD.MOV.U32 R35, RZ, RZ, R32 ; /* 0x000000ffff237224 */ /* 0x001fe200078e0020 */ /*09e0*/ @!P0 LOP3.LUT R35, R21, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000015238812 */ /* 0x000fe400078ec0ff */ /*09f0*/ IADD3 R32, R0, -0x1, RZ ; /* 0xffffffff00207810 */ /* 0x000fe20007ffe0ff */ /*0a00*/ DFMA R28, R30, -R20, 1 ; /* 0x3ff000001e1c742b */ /* 0x002e220000000814 */ /*0a10*/ IADD3 R34, R35, -0x1, RZ ; /* 0xffffffff23227810 */ /* 0x000fe40007ffe0ff */ /*0a20*/ ISETP.GT.U32.AND P0, PT, R32, 0x7feffffe, PT ; /* 0x7feffffe2000780c */ /* 0x000fc60003f04070 */ /*0a30*/ DFMA R28, R30, R28, R30 ; /* 0x0000001c1e1c722b */ /* 0x001e22000000001e */ /*0a40*/ ISETP.GT.U32.OR P0, PT, R34, 0x7feffffe, P0 ; /* 0x7feffffe2200780c */ /* 0x000fca0000704470 */ /*0a50*/ DMUL R30, R28, R26 ; /* 0x0000001a1c1e7228 */ /* 0x001e0c0000000000 */ /*0a60*/ DFMA R32, R30, -R20, R26 ; /* 0x800000141e20722b */ /* 0x001e0c000000001a */ /*0a70*/ DFMA R32, R28, R32, R30 ; /* 0x000000201c20722b */ /* 0x001062000000001e */ /*0a80*/ @P0 BRA 0xc50 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*0a90*/ LOP3.LUT R24, R23, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000017187812 */ /* 0x000fc800078ec0ff */ /*0aa0*/ ISETP.GE.U32.AND P0, PT, R7.reuse, R24, PT ; /* 0x000000180700720c */ /* 0x040fe20003f06070 */ /*0ab0*/ IMAD.IADD R0, R7, 0x1, -R24 ; /* 0x0000000107007824 */ /* 0x000fe400078e0a18 */ /*0ac0*/ IMAD.MOV.U32 R24, RZ, RZ, RZ ; /* 0x000000ffff187224 */ /* 0x000fe200078e00ff */ /*0ad0*/ SEL R9, R9, 0x63400000, !P0 ; /* 0x6340000009097807 */ /* 0x000fe40004000000 */ /*0ae0*/ IMNMX R0, R0, -0x46a00000, !PT ; /* 0xb960000000007817 */ /* 0x000fc80007800200 */ /*0af0*/ IMNMX R0, R0, 0x46a00000, PT ; /* 0x46a0000000007817 */ /* 0x000fca0003800200 */ /*0b00*/ IMAD.IADD R0, R0, 0x1, -R9 ; /* 0x0000000100007824 */ /* 0x000fca00078e0a09 */ /*0b10*/ IADD3 R25, R0, 0x7fe00000, RZ ; /* 0x7fe0000000197810 */ /* 0x000fcc0007ffe0ff */ /*0b20*/ DMUL R28, R32, R24 ; /* 0x00000018201c7228 */ /* 0x003e140000000000 */ /*0b30*/ FSETP.GTU.AND P0, PT, |R29|, 1.469367938527859385e-39, PT ; /* 0x001000001d00780b */ /* 0x001fda0003f0c200 */ /*0b40*/ @P0 BRA 0xda0 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*0b50*/ DFMA R20, R32, -R20, R26 ; /* 0x800000142014722b */ /* 0x000e22000000001a */ /*0b60*/ IMAD.MOV.U32 R24, RZ, RZ, RZ ; /* 0x000000ffff187224 */ /* 0x000fd200078e00ff */ /*0b70*/ FSETP.NEU.AND P0, PT, R21.reuse, RZ, PT ; /* 0x000000ff1500720b */ /* 0x041fe40003f0d000 */ /*0b80*/ LOP3.LUT R7, R21, 0x80000000, R23, 0x48, !PT ; /* 0x8000000015077812 */ /* 0x000fc800078e4817 */ /*0b90*/ LOP3.LUT R25, R7, R25, RZ, 0xfc, !PT ; /* 0x0000001907197212 */ /* 0x000fce00078efcff */ /*0ba0*/ @!P0 BRA 0xda0 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*0bb0*/ IMAD.MOV R21, RZ, RZ, -R0 ; /* 0x000000ffff157224 */ /* 0x000fe200078e0a00 */ /*0bc0*/ DMUL.RP R24, R32, R24 ; /* 0x0000001820187228 */ /* 0x000e220000008000 */ /*0bd0*/ IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff147224 */ /* 0x000fe200078e00ff */ /*0be0*/ IADD3 R9, -R0, -0x43300000, RZ ; /* 0xbcd0000000097810 */ /* 0x000fca0007ffe1ff */ /*0bf0*/ DFMA R20, R28, -R20, R32 ; /* 0x800000141c14722b */ /* 0x000e460000000020 */ /*0c00*/ LOP3.LUT R7, R25, R7, RZ, 0x3c, !PT ; /* 0x0000000719077212 */ /* 0x001fce00078e3cff */ /*0c10*/ FSETP.NEU.AND P0, PT, |R21|, R9, PT ; /* 0x000000091500720b */ /* 0x002fc80003f0d200 */ /*0c20*/ FSEL R28, R24, R28, !P0 ; /* 0x0000001c181c7208 */ /* 0x000fe40004000000 */ /*0c30*/ FSEL R29, R7, R29, !P0 ; /* 0x0000001d071d7208 */ /* 0x000fe20004000000 */ /*0c40*/ BRA 0xda0 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*0c50*/ DSETP.NAN.AND P0, PT, R24, R24, PT ; /* 0x000000181800722a */ /* 0x000e9c0003f08000 */ /*0c60*/ @P0 BRA 0xd80 ; /* 0x0000011000000947 */ /* 0x004fea0003800000 */ /*0c70*/ DSETP.NAN.AND P0, PT, R22, R22, PT ; /* 0x000000161600722a */ /* 0x000e9c0003f08000 */ /*0c80*/ @P0 BRA 0xd50 ; /* 0x000000c000000947 */ /* 0x004fea0003800000 */ /*0c90*/ ISETP.NE.AND P0, PT, R0, R35, PT ; /* 0x000000230000720c */ /* 0x000fe20003f05270 */ /*0ca0*/ IMAD.MOV.U32 R28, RZ, RZ, 0x0 ; /* 0x00000000ff1c7424 */ /* 0x001fe400078e00ff */ /*0cb0*/ IMAD.MOV.U32 R29, RZ, RZ, -0x80000 ; /* 0xfff80000ff1d7424 */ /* 0x000fd400078e00ff */ /*0cc0*/ @!P0 BRA 0xda0 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*0cd0*/ ISETP.NE.AND P0, PT, R0, 0x7ff00000, PT ; /* 0x7ff000000000780c */ /* 0x000fe40003f05270 */ /*0ce0*/ LOP3.LUT R29, R25, 0x80000000, R23, 0x48, !PT ; /* 0x80000000191d7812 */ /* 0x000fe400078e4817 */ /*0cf0*/ ISETP.EQ.OR P0, PT, R35, RZ, !P0 ; /* 0x000000ff2300720c */ /* 0x000fda0004702670 */ /*0d00*/ @P0 LOP3.LUT R0, R29, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000001d000812 */ /* 0x000fe200078efcff */ /*0d10*/ @!P0 IMAD.MOV.U32 R28, RZ, RZ, RZ ; /* 0x000000ffff1c8224 */ /* 0x000fe400078e00ff */ /*0d20*/ @P0 IMAD.MOV.U32 R28, RZ, RZ, RZ ; /* 0x000000ffff1c0224 */ /* 0x000fe400078e00ff */ /*0d30*/ @P0 IMAD.MOV.U32 R29, RZ, RZ, R0 ; /* 0x000000ffff1d0224 */ /* 0x000fe200078e0000 */ /*0d40*/ BRA 0xda0 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0d50*/ LOP3.LUT R29, R23, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000171d7812 */ /* 0x001fe200078efcff */ /*0d60*/ IMAD.MOV.U32 R28, RZ, RZ, R22 ; /* 0x000000ffff1c7224 */ /* 0x000fe200078e0016 */ /*0d70*/ BRA 0xda0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*0d80*/ LOP3.LUT R29, R25, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000191d7812 */ /* 0x001fe200078efcff */ /*0d90*/ IMAD.MOV.U32 R28, RZ, RZ, R24 ; /* 0x000000ffff1c7224 */ /* 0x000fe400078e0018 */ /*0da0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0db0*/ IMAD.MOV.U32 R20, RZ, RZ, R4 ; /* 0x000000ffff147224 */ /* 0x000fe400078e0004 */ /*0dc0*/ IMAD.MOV.U32 R21, RZ, RZ, 0x0 ; /* 0x00000000ff157424 */ /* 0x000fc800078e00ff */ /*0dd0*/ RET.REL.NODEC R20 0x0 ; /* 0xfffff22014007950 */ /* 0x000fea0003c3ffff */ /*0de0*/ BRA 0xde0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0df0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z10LifKernel1i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R26, SR_CTAID.X ; /* 0x00000000001a7919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R26, R26, c[0x0][0x0], R3 ; /* 0x000000001a1a7a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GT.AND P0, PT, R26, 0x1faf, PT ; /* 0x00001faf1a00780c */ /* 0x000fda0003f04270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0080*/ IMAD.WIDE R4, R26, R5, c[0x4][0xb0] ; /* 0x01002c001a047625 */ /* 0x000fca00078e0205 */ /*0090*/ LDG.E R27, [R4.64] ; /* 0x00000004041b7981 */ /* 0x000ea2000c1e1900 */ /*00a0*/ IMAD.SHL.U32 R10, R26, 0x8, RZ ; /* 0x000000081a0a7824 */ /* 0x000fe200078e00ff */ /*00b0*/ SHF.R.S32.HI R29, RZ, 0x1f, R26 ; /* 0x0000001fff1d7819 */ /* 0x000fc8000001141a */ /*00c0*/ IADD3 R6, P1, R10, c[0x4][0xc0], RZ ; /* 0x010030000a067a10 */ /* 0x000fe40007f3e0ff */ /*00d0*/ SHF.L.U64.HI R0, R26, 0x3, R29 ; /* 0x000000031a007819 */ /* 0x000fe4000001021d */ /*00e0*/ IADD3 R10, P2, R10, c[0x4][0xd8], RZ ; /* 0x010036000a0a7a10 */ /* 0x000fe40007f5e0ff */ /*00f0*/ IADD3.X R7, R0.reuse, c[0x4][0xc4], RZ, P1, !PT ; /* 0x0100310000077a10 */ /* 0x040fe40000ffe4ff */ /*0100*/ IADD3.X R11, R0, c[0x4][0xdc], RZ, P2, !PT ; /* 0x01003700000b7a10 */ /* 0x000fe200017fe4ff */ /*0110*/ MUFU.RCP64H R3, 2.999998027775063747e-10 ; /* 0x3df49da700037908 */ /* 0x000e220000001800 */ /*0120*/ ISETP.GE.AND P0, PT, R27, c[0x0][0x160], PT ; /* 0x000058001b007a0c */ /* 0x004fda0003f06270 */ /*0130*/ @!P0 STG.E [R4.64], RZ ; /* 0x000000ff04008986 */ /* 0x0003e8000c101904 */ /*0140*/ LDG.E.64 R8, [R6.64] ; /* 0x0000000406087981 */ /* 0x000ea8000c1e1b00 */ /*0150*/ LDG.E.64 R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee2000c1e1b00 */ /*0160*/ IMAD.MOV.U32 R14, RZ, RZ, -0x1c9e31b4 ; /* 0xe361ce4cff0e7424 */ /* 0x000fe200078e00ff */ /*0170*/ UMOV UR6, 0xe361ce4c ; /* 0xe361ce4c00067882 */ /* 0x000fe20000000000 */ /*0180*/ IMAD.MOV.U32 R15, RZ, RZ, 0x3df49da7 ; /* 0x3df49da7ff0f7424 */ /* 0x000fe200078e00ff */ /*0190*/ BSSY B0, 0x320 ; /* 0x0000018000007945 */ /* 0x000fe20003800000 */ /*01a0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */ /* 0x000fc400078e00ff */ /*01b0*/ @!P0 IMAD.MOV.U32 R27, RZ, RZ, RZ ; /* 0x000000ffff1b8224 */ /* 0x000fc800078e00ff */ /*01c0*/ DFMA R12, R2, -R14, 1 ; /* 0x3ff00000020c742b */ /* 0x001e0c000000080e */ /*01d0*/ DFMA R12, R12, R12, R12 ; /* 0x0000000c0c0c722b */ /* 0x001e0c000000000c */ /*01e0*/ DFMA R12, R2, R12, R2 ; /* 0x0000000c020c722b */ /* 0x001e0c0000000002 */ /*01f0*/ DFMA R14, R12, -R14, 1 ; /* 0x3ff000000c0e742b */ /* 0x001e0c000000080e */ /*0200*/ DFMA R14, R12, R14, R12 ; /* 0x0000000e0c0e722b */ /* 0x001fc8000000000c */ /*0210*/ DADD R2, R8, c[0x2][0x0] ; /* 0x0080000008027629 */ /* 0x004ecc0000000000 */ /*0220*/ DFMA R12, R2, c[0x2][0x8], R10 ; /* 0x00800200020c7a2b */ /* 0x008e0c000000000a */ /*0230*/ DMUL R2, R12, R14 ; /* 0x0000000e0c027228 */ /* 0x001e080000000000 */ /*0240*/ FSETP.GEU.AND P2, PT, |R13|, 6.5827683646048100446e-37, PT ; /* 0x036000000d00780b */ /* 0x000fe40003f4e200 */ /*0250*/ DFMA R16, R2, c[0x2][0x10], R12 ; /* 0x0080040002107a2b */ /* 0x001e0c000000000c */ /*0260*/ DFMA R2, R14, R16, R2 ; /* 0x000000100e02722b */ /* 0x0010a40000000002 */ /*0270*/ IMAD.MOV.U32 R15, RZ, RZ, 0x3df49da7 ; /* 0x3df49da7ff0f7424 */ /* 0x001fd000078e00ff */ /*0280*/ FFMA R0, RZ, 0.11944132298231124878, R3 ; /* 0x3df49da7ff007823 */ /* 0x004fca0000000003 */ /*0290*/ FSETP.GT.AND P1, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f24200 */ /*02a0*/ @P1 BRA P2, 0x310 ; /* 0x0000006000001947 */ /* 0x000fea0001000000 */ /*02b0*/ IMAD.MOV.U32 R16, RZ, RZ, R12 ; /* 0x000000ffff107224 */ /* 0x002fe200078e000c */ /*02c0*/ MOV R0, 0x2f0 ; /* 0x000002f000007802 */ /* 0x000fe20000000f00 */ /*02d0*/ IMAD.MOV.U32 R17, RZ, RZ, R13 ; /* 0x000000ffff117224 */ /* 0x000fe400078e000d */ /*02e0*/ CALL.REL.NOINC 0x690 ; /* 0x000003a000007944 */ /* 0x000fea0003c00000 */ /*02f0*/ IMAD.MOV.U32 R2, RZ, RZ, R20 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0014 */ /*0300*/ IMAD.MOV.U32 R3, RZ, RZ, R21 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0015 */ /*0310*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x002fea0003800000 */ /*0320*/ MUFU.RCP64H R17, 2.999998027775063747e-10 ; /* 0x3df49da700117908 */ /* 0x000e220000001800 */ /*0330*/ IMAD.MOV.U32 R18, RZ, RZ, -0x1c9e31b4 ; /* 0xe361ce4cff127424 */ /* 0x000fe200078e00ff */ /*0340*/ BSSY B0, 0x4b0 ; /* 0x0000016000007945 */ /* 0x000fe20003800000 */ /*0350*/ IMAD.MOV.U32 R19, RZ, RZ, 0x3df49da7 ; /* 0x3df49da7ff137424 */ /* 0x000fe400078e00ff */ /*0360*/ IMAD.MOV.U32 R16, RZ, RZ, 0x1 ; /* 0x00000001ff107424 */ /* 0x000fcc00078e00ff */ /*0370*/ DFMA R12, R16, -R18, 1 ; /* 0x3ff00000100c742b */ /* 0x001e0c0000000812 */ /*0380*/ DFMA R20, R12, R12, R12 ; /* 0x0000000c0c14722b */ /* 0x001e08000000000c */ /*0390*/ DFMA R12, R2, c[0x2][0x18], R8 ; /* 0x00800600020c7a2b */ /* 0x000e480000000008 */ /*03a0*/ DFMA R20, R16, R20, R16 ; /* 0x000000141014722b */ /* 0x001e080000000010 */ /*03b0*/ DADD R12, R12, c[0x2][0x0] ; /* 0x008000000c0c7629 */ /* 0x002e480000000000 */ /*03c0*/ DFMA R18, R20, -R18, 1 ; /* 0x3ff000001412742b */ /* 0x001e080000000812 */ /*03d0*/ DFMA R16, R12, c[0x2][0x8], R10 ; /* 0x008002000c107a2b */ /* 0x002fc8000000000a */ /*03e0*/ DFMA R18, R20, R18, R20 ; /* 0x000000121412722b */ /* 0x001e0c0000000014 */ /*03f0*/ DMUL R10, R18, R16 ; /* 0x00000010120a7228 */ /* 0x001e220000000000 */ /*0400*/ FSETP.GEU.AND P1, PT, |R17|, 6.5827683646048100446e-37, PT ; /* 0x036000001100780b */ /* 0x000fca0003f2e200 */ /*0410*/ DFMA R12, R10, c[0x2][0x10], R16 ; /* 0x008004000a0c7a2b */ /* 0x001e0c0000000010 */ /*0420*/ DFMA R10, R18, R12, R10 ; /* 0x0000000c120a722b */ /* 0x001e14000000000a */ /*0430*/ FFMA R0, RZ, 0.11944132298231124878, R11 ; /* 0x3df49da7ff007823 */ /* 0x001fca000000000b */ /*0440*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0450*/ @P0 BRA P1, 0x4a0 ; /* 0x0000004000000947 */ /* 0x000fea0000800000 */ /*0460*/ MOV R0, 0x480 ; /* 0x0000048000007802 */ /* 0x000fe40000000f00 */ /*0470*/ CALL.REL.NOINC 0x690 ; /* 0x0000021000007944 */ /* 0x000fea0003c00000 */ /*0480*/ IMAD.MOV.U32 R10, RZ, RZ, R20 ; /* 0x000000ffff0a7224 */ /* 0x000fe400078e0014 */ /*0490*/ IMAD.MOV.U32 R11, RZ, RZ, R21 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e0015 */ /*04a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*04b0*/ DADD R2, R10, R2 ; /* 0x000000000a027229 */ /* 0x0000a20000000002 */ /*04c0*/ ISETP.NE.AND P0, PT, R27, RZ, PT ; /* 0x000000ff1b00720c */ /* 0x000fe20003f05270 */ /*04d0*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x001fe200078e00ff */ /*04e0*/ IADD3 R26, P1, R26, c[0x4][0x28], RZ ; /* 0x01000a001a1a7a10 */ /* 0x000fe20007f3e0ff */ /*04f0*/ BSSY B0, 0x670 ; /* 0x0000017000007945 */ /* 0x000fe20003800000 */ /*0500*/ FSEL R11, RZ, 1.875, P0 ; /* 0x3ff00000ff0b7808 */ /* 0x000fe20000000000 */ /*0510*/ DMUL R2, R2, c[0x2][0x18] ; /* 0x0080060002027a28 */ /* 0x004e220000000000 */ /*0520*/ IADD3.X R27, R29, c[0x4][0x2c], RZ, P1, !PT ; /* 0x01000b001d1b7a10 */ /* 0x000fca0000ffe4ff */ /*0530*/ DMUL R2, R2, 0.5 ; /* 0x3fe0000002027828 */ /* 0x001e0c0000000000 */ /*0540*/ DFMA R2, R2, R10, R8 ; /* 0x0000000a0202722b */ /* 0x001e0c0000000008 */ /*0550*/ DSETP.GEU.AND P0, PT, R2, c[0x2][0x20], PT ; /* 0x008008000200762a */ /* 0x001e0c0003f0e000 */ /*0560*/ FSEL R2, R2, 1.9515639880220904081e-20, P0 ; /* 0x1eb851ec02027808 */ /* 0x001fe40000000000 */ /*0570*/ FSEL R3, R3, -1.3899999856948852539, P0 ; /* 0xbfb1eb8503037808 */ /* 0x000fca0000000000 */ /*0580*/ STG.E.64 [R6.64], R2 ; /* 0x0000000206007986 */ /* 0x0001e2000c101b04 */ /*0590*/ DSETP.GE.AND P0, PT, R2, c[0x2][0x28], PT ; /* 0x00800a000200762a */ /* 0x000e9c0003f06000 */ /*05a0*/ @!P0 BRA 0x650 ; /* 0x000000a000008947 */ /* 0x004fea0003800000 */ /*05b0*/ I2F.F64 R2, c[0x0][0x160] ; /* 0x0000580000027b12 */ /* 0x001e220000201c00 */ /*05c0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1eb851ec ; /* 0x1eb851ecff087424 */ /* 0x000fe400078e00ff */ /*05d0*/ IMAD.MOV.U32 R9, RZ, RZ, -0x404e147b ; /* 0xbfb1eb85ff097424 */ /* 0x000fe400078e00ff */ /*05e0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x1 ; /* 0x00000001ff0d7424 */ /* 0x000fc600078e00ff */ /*05f0*/ STG.E.64 [R6.64], R8 ; /* 0x0000000806007986 */ /* 0x0005e2000c101b04 */ /*0600*/ DADD R2, R2, 30 ; /* 0x403e000002027429 */ /* 0x001e140000000000 */ /*0610*/ F2I.F64.TRUNC R3, R2 ; /* 0x0000000200037311 */ /* 0x001e24000030d100 */ /*0620*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x0015e8000c101904 */ /*0630*/ STG.E.U8 [R26.64], R13 ; /* 0x0000000d1a007986 */ /* 0x0005e2000c101104 */ /*0640*/ BRA 0x660 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0650*/ STG.E.U8 [R26.64], RZ ; /* 0x000000ff1a007986 */ /* 0x0011e4000c101104 */ /*0660*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0670*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0680*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0690*/ FSETP.GEU.AND P0, PT, |R15|, 1.469367938527859385e-39, PT ; /* 0x001000000f00780b */ /* 0x000fe20003f0e200 */ /*06a0*/ IMAD.U32 R14, RZ, RZ, UR6 ; /* 0x00000006ff0e7e24 */ /* 0x000fe2000f8e00ff */ /*06b0*/ FSETP.GEU.AND P2, PT, |R17|, 1.469367938527859385e-39, PT ; /* 0x001000001100780b */ /* 0x000fe20003f4e200 */ /*06c0*/ IMAD.U32 R12, RZ, RZ, UR6 ; /* 0x00000006ff0c7e24 */ /* 0x000fe2000f8e00ff */ /*06d0*/ LOP3.LUT R13, R15, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff0f0d7812 */ /* 0x000fe200078ec0ff */ /*06e0*/ IMAD.MOV.U32 R30, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff1e7424 */ /* 0x000fe200078e00ff */ /*06f0*/ LOP3.LUT R28, R17, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000111c7812 */ /* 0x000fe200078ec0ff */ /*0700*/ IMAD.MOV.U32 R20, RZ, RZ, 0x1 ; /* 0x00000001ff147424 */ /* 0x000fe200078e00ff */ /*0710*/ LOP3.LUT R13, R13, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff000000d0d7812 */ /* 0x000fe200078efcff */ /*0720*/ IMAD.MOV.U32 R18, RZ, RZ, R16 ; /* 0x000000ffff127224 */ /* 0x000fe200078e0010 */ /*0730*/ LOP3.LUT R31, R15.reuse, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f1f7812 */ /* 0x040fe200078ec0ff */ /*0740*/ IMAD.MOV.U32 R32, RZ, RZ, R28 ; /* 0x000000ffff207224 */ /* 0x000fe200078e001c */ /*0750*/ BSSY B1, 0xc30 ; /* 0x000004d000017945 */ /* 0x000fe20003800000 */ /*0760*/ @!P0 DMUL R12, R14, 8.98846567431157953865e+307 ; /* 0x7fe000000e0c8828 */ /* 0x000e220000000000 */ /*0770*/ ISETP.GE.U32.AND P1, PT, R28, R31, PT ; /* 0x0000001f1c00720c */ /* 0x000fe20003f26070 */ /*0780*/ @!P2 IMAD.MOV.U32 R24, RZ, RZ, RZ ; /* 0x000000ffff18a224 */ /* 0x000fe200078e00ff */ /*0790*/ @!P2 LOP3.LUT R19, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f13a812 */ /* 0x000fc600078ec0ff */ /*07a0*/ MUFU.RCP64H R21, R13 ; /* 0x0000000d00157308 */ /* 0x001e220000001800 */ /*07b0*/ @!P2 ISETP.GE.U32.AND P3, PT, R28, R19, PT ; /* 0x000000131c00a20c */ /* 0x000fe40003f66070 */ /*07c0*/ SEL R19, R30.reuse, 0x63400000, !P1 ; /* 0x634000001e137807 */ /* 0x040fe40004800000 */ /*07d0*/ @!P2 SEL R25, R30, 0x63400000, !P3 ; /* 0x634000001e19a807 */ /* 0x000fe40005800000 */ /*07e0*/ LOP3.LUT R19, R19, 0x800fffff, R17.reuse, 0xf8, !PT ; /* 0x800fffff13137812 */ /* 0x100fe400078ef811 */ /*07f0*/ @!P2 LOP3.LUT R25, R25, 0x80000000, R17, 0xf8, !PT ; /* 0x800000001919a812 */ /* 0x000fe400078ef811 */ /*0800*/ @!P0 LOP3.LUT R31, R13, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000d1f8812 */ /* 0x000fc400078ec0ff */ /*0810*/ @!P2 LOP3.LUT R25, R25, 0x100000, RZ, 0xfc, !PT ; /* 0x001000001919a812 */ /* 0x000fe400078efcff */ /*0820*/ IADD3 R33, R31, -0x1, RZ ; /* 0xffffffff1f217810 */ /* 0x000fe20007ffe0ff */ /*0830*/ DFMA R22, R20, -R12, 1 ; /* 0x3ff000001416742b */ /* 0x001e08000000080c */ /*0840*/ @!P2 DFMA R18, R18, 2, -R24 ; /* 0x400000001212a82b */ /* 0x000fc80000000818 */ /*0850*/ DFMA R22, R22, R22, R22 ; /* 0x000000161616722b */ /* 0x001e0c0000000016 */ /*0860*/ DFMA R20, R20, R22, R20 ; /* 0x000000161414722b */ /* 0x001e220000000014 */ /*0870*/ @!P2 LOP3.LUT R32, R19, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000001320a812 */ /* 0x000fc800078ec0ff */ /*0880*/ IADD3 R24, R32, -0x1, RZ ; /* 0xffffffff20187810 */ /* 0x000fe20007ffe0ff */ /*0890*/ DFMA R22, R20, -R12, 1 ; /* 0x3ff000001416742b */ /* 0x001e06000000080c */ /*08a0*/ ISETP.GT.U32.AND P0, PT, R24, 0x7feffffe, PT ; /* 0x7feffffe1800780c */ /* 0x000fc60003f04070 */ /*08b0*/ DFMA R20, R20, R22, R20 ; /* 0x000000161414722b */ /* 0x001e220000000014 */ /*08c0*/ ISETP.GT.U32.OR P0, PT, R33, 0x7feffffe, P0 ; /* 0x7feffffe2100780c */ /* 0x000fca0000704470 */ /*08d0*/ DMUL R22, R20, R18 ; /* 0x0000001214167228 */ /* 0x001e0c0000000000 */ /*08e0*/ DFMA R24, R22, -R12, R18 ; /* 0x8000000c1618722b */ /* 0x001e0c0000000012 */ /*08f0*/ DFMA R24, R20, R24, R22 ; /* 0x000000181418722b */ /* 0x0010620000000016 */ /*0900*/ @P0 BRA 0xad0 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*0910*/ LOP3.LUT R17, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f117812 */ /* 0x000fe200078ec0ff */ /*0920*/ IMAD.MOV.U32 R22, RZ, RZ, RZ ; /* 0x000000ffff167224 */ /* 0x001fc600078e00ff */ /*0930*/ ISETP.GE.U32.AND P0, PT, R28.reuse, R17, PT ; /* 0x000000111c00720c */ /* 0x040fe20003f06070 */ /*0940*/ IMAD.IADD R16, R28, 0x1, -R17 ; /* 0x000000011c107824 */ /* 0x000fc600078e0a11 */ /*0950*/ SEL R17, R30, 0x63400000, !P0 ; /* 0x634000001e117807 */ /* 0x000fe40004000000 */ /*0960*/ IMNMX R16, R16, -0x46a00000, !PT ; /* 0xb960000010107817 */ /* 0x000fc80007800200 */ /*0970*/ IMNMX R16, R16, 0x46a00000, PT ; /* 0x46a0000010107817 */ /* 0x000fca0003800200 */ /*0980*/ IMAD.IADD R16, R16, 0x1, -R17 ; /* 0x0000000110107824 */ /* 0x000fca00078e0a11 */ /*0990*/ IADD3 R23, R16, 0x7fe00000, RZ ; /* 0x7fe0000010177810 */ /* 0x000fcc0007ffe0ff */ /*09a0*/ DMUL R20, R24, R22 ; /* 0x0000001618147228 */ /* 0x002e140000000000 */ /*09b0*/ FSETP.GTU.AND P0, PT, |R21|, 1.469367938527859385e-39, PT ; /* 0x001000001500780b */ /* 0x001fda0003f0c200 */ /*09c0*/ @P0 BRA 0xc20 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*09d0*/ DFMA R12, R24, -R12, R18 ; /* 0x8000000c180c722b */ /* 0x000e220000000012 */ /*09e0*/ IMAD.MOV.U32 R22, RZ, RZ, RZ ; /* 0x000000ffff167224 */ /* 0x000fd200078e00ff */ /*09f0*/ FSETP.NEU.AND P0, PT, R13.reuse, RZ, PT ; /* 0x000000ff0d00720b */ /* 0x041fe40003f0d000 */ /*0a00*/ LOP3.LUT R17, R13, 0x80000000, R15, 0x48, !PT ; /* 0x800000000d117812 */ /* 0x000fc800078e480f */ /*0a10*/ LOP3.LUT R23, R17, R23, RZ, 0xfc, !PT ; /* 0x0000001711177212 */ /* 0x000fce00078efcff */ /*0a20*/ @!P0 BRA 0xc20 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*0a30*/ IMAD.MOV R13, RZ, RZ, -R16 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e0a10 */ /*0a40*/ DMUL.RP R22, R24, R22 ; /* 0x0000001618167228 */ /* 0x000e220000008000 */ /*0a50*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x000fcc00078e00ff */ /*0a60*/ DFMA R12, R20, -R12, R24 ; /* 0x8000000c140c722b */ /* 0x000e460000000018 */ /*0a70*/ LOP3.LUT R17, R23, R17, RZ, 0x3c, !PT ; /* 0x0000001117117212 */ /* 0x001fc600078e3cff */ /*0a80*/ IADD3 R12, -R16, -0x43300000, RZ ; /* 0xbcd00000100c7810 */ /* 0x002fc80007ffe1ff */ /*0a90*/ FSETP.NEU.AND P0, PT, |R13|, R12, PT ; /* 0x0000000c0d00720b */ /* 0x000fc80003f0d200 */ /*0aa0*/ FSEL R20, R22, R20, !P0 ; /* 0x0000001416147208 */ /* 0x000fe40004000000 */ /*0ab0*/ FSEL R21, R17, R21, !P0 ; /* 0x0000001511157208 */ /* 0x000fe20004000000 */ /*0ac0*/ BRA 0xc20 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*0ad0*/ DSETP.NAN.AND P0, PT, R16, R16, PT ; /* 0x000000101000722a */ /* 0x000e9c0003f08000 */ /*0ae0*/ @P0 BRA 0xc00 ; /* 0x0000011000000947 */ /* 0x004fea0003800000 */ /*0af0*/ DSETP.NAN.AND P0, PT, R14, R14, PT ; /* 0x0000000e0e00722a */ /* 0x000e9c0003f08000 */ /*0b00*/ @P0 BRA 0xbd0 ; /* 0x000000c000000947 */ /* 0x004fea0003800000 */ /*0b10*/ ISETP.NE.AND P0, PT, R32, R31, PT ; /* 0x0000001f2000720c */ /* 0x000fe20003f05270 */ /*0b20*/ IMAD.MOV.U32 R20, RZ, RZ, 0x0 ; /* 0x00000000ff147424 */ /* 0x001fe400078e00ff */ /*0b30*/ IMAD.MOV.U32 R21, RZ, RZ, -0x80000 ; /* 0xfff80000ff157424 */ /* 0x000fd400078e00ff */ /*0b40*/ @!P0 BRA 0xc20 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*0b50*/ ISETP.NE.AND P0, PT, R32, 0x7ff00000, PT ; /* 0x7ff000002000780c */ /* 0x000fe40003f05270 */ /*0b60*/ LOP3.LUT R21, R17, 0x80000000, R15, 0x48, !PT ; /* 0x8000000011157812 */ /* 0x000fe400078e480f */ /*0b70*/ ISETP.EQ.OR P0, PT, R31, RZ, !P0 ; /* 0x000000ff1f00720c */ /* 0x000fda0004702670 */ /*0b80*/ @P0 LOP3.LUT R12, R21, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff00000150c0812 */ /* 0x000fe200078efcff */ /*0b90*/ @!P0 IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff148224 */ /* 0x000fe400078e00ff */ /*0ba0*/ @P0 IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff140224 */ /* 0x000fe400078e00ff */ /*0bb0*/ @P0 IMAD.MOV.U32 R21, RZ, RZ, R12 ; /* 0x000000ffff150224 */ /* 0x000fe200078e000c */ /*0bc0*/ BRA 0xc20 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*0bd0*/ LOP3.LUT R21, R15, 0x80000, RZ, 0xfc, !PT ; /* 0x000800000f157812 */ /* 0x001fe200078efcff */ /*0be0*/ IMAD.MOV.U32 R20, RZ, RZ, R14 ; /* 0x000000ffff147224 */ /* 0x000fe200078e000e */ /*0bf0*/ BRA 0xc20 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*0c00*/ LOP3.LUT R21, R17, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000011157812 */ /* 0x001fe200078efcff */ /*0c10*/ IMAD.MOV.U32 R20, RZ, RZ, R16 ; /* 0x000000ffff147224 */ /* 0x000fe400078e0010 */ /*0c20*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0c30*/ IMAD.MOV.U32 R12, RZ, RZ, R0 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e0000 */ /*0c40*/ IMAD.MOV.U32 R13, RZ, RZ, 0x0 ; /* 0x00000000ff0d7424 */ /* 0x000fc800078e00ff */ /*0c50*/ RET.REL.NODEC R12 0x0 ; /* 0xfffff3a00c007950 */ /* 0x000fea0003c3ffff */ /*0c60*/ BRA 0xc60; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0c70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ca0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ce0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0cf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z10clear_varsv .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e280000002200 */ /*0030*/ S2R R20, SR_TID.X ; /* 0x0000000000147919 */ /* 0x000e680000002100 */ /*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e620000002500 */ /*0050*/ IMAD R0, R0, c[0x0][0x4], R5 ; /* 0x0000010000007a24 */ /* 0x001fca00078e0205 */ /*0060*/ ISETP.GT.AND P0, PT, R0, 0x9, PT ; /* 0x000000090000780c */ /* 0x000fe20003f04270 */ /*0070*/ IMAD R20, R3, c[0x0][0x0], R20 ; /* 0x0000000003147a24 */ /* 0x002fca00078e0214 */ /*0080*/ ISETP.GT.OR P0, PT, R20, 0x1faf, P0 ; /* 0x00001faf1400780c */ /* 0x000fda0000704670 */ /*0090*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00a0*/ MOV R21, 0x8 ; /* 0x0000000800157802 */ /* 0x000fe20000000f00 */ /*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00c0*/ MOV R17, 0x50 ; /* 0x0000005000117802 */ /* 0x000fe40000000f00 */ /*00d0*/ MOV R11, 0x4 ; /* 0x00000004000b7802 */ /* 0x000fe20000000f00 */ /*00e0*/ IMAD.WIDE R2, R0, R21, c[0x4][0xc8] ; /* 0x0100320000027625 */ /* 0x000fe200078e0215 */ /*00f0*/ MOV R18, 0x1eb851ec ; /* 0x1eb851ec00127802 */ /* 0x000fe40000000f00 */ /*0100*/ MOV R19, 0xbfb1eb85 ; /* 0xbfb1eb8500137802 */ /* 0x000fe20000000f00 */ /*0110*/ IMAD.WIDE R14, R20, R17, c[0x4][0x70] ; /* 0x01001c00140e7625 */ /* 0x000fc800078e0211 */ /*0120*/ IMAD.WIDE R4, R0, R21, c[0x4][0x40] ; /* 0x0100100000047625 */ /* 0x000fe200078e0215 */ /*0130*/ STG.E.64 [R2.64], R18 ; /* 0x0000001202007986 */ /* 0x0001e6000c101b04 */ /*0140*/ IMAD.WIDE R16, R20, R17, c[0x4][0x30] ; /* 0x01000c0014107625 */ /* 0x000fe200078e0211 */ /*0150*/ STG.E.64 [R4.64], RZ ; /* 0x000000ff04007986 */ /* 0x0003e6000c101b04 */ /*0160*/ IMAD.WIDE R6, R0, R11, c[0x4][0xb8] ; /* 0x01002e0000067625 */ /* 0x000fc800078e020b */ /*0170*/ IMAD.WIDE R8, R20.reuse, R21, c[0x4][0xc0] ; /* 0x0100300014087625 */ /* 0x040fe200078e0215 */ /*0180*/ STG.E [R6.64], RZ ; /* 0x000000ff06007986 */ /* 0x0005e6000c101904 */ /*0190*/ IMAD.WIDE R10, R20.reuse, R11, c[0x4][0xb0] ; /* 0x01002c00140a7625 */ /* 0x040fe200078e020b */ /*01a0*/ STG.E.64 [R8.64], R18 ; /* 0x0000001208007986 */ /* 0x0007e6000c101b04 */ /*01b0*/ IMAD.WIDE R12, R20, R21.reuse, c[0x4][0xd8] ; /* 0x01003600140c7625 */ /* 0x080fe200078e0215 */ /*01c0*/ STG.E [R10.64], RZ ; /* 0x000000ff0a007986 */ /* 0x0009e6000c101904 */ /*01d0*/ IMAD.WIDE R14, R0.reuse, 0x8, R14 ; /* 0x00000008000e7825 */ /* 0x040fe200078e020e */ /*01e0*/ STG.E.64 [R12.64], RZ ; /* 0x000000ff0c007986 */ /* 0x000fe6000c101b04 */ /*01f0*/ IMAD.WIDE R16, R0, 0x8, R16 ; /* 0x0000000800107825 */ /* 0x000fe200078e0210 */ /*0200*/ STG.E.64 [R14.64], RZ ; /* 0x000000ff0e007986 */ /* 0x000fe6000c101b04 */ /*0210*/ IMAD.WIDE R2, R20.reuse, R21.reuse, c[0x4][0x78] ; /* 0x01001e0014027625 */ /* 0x0c1fe200078e0215 */ /*0220*/ STG.E.64 [R16.64], RZ ; /* 0x000000ff10007986 */ /* 0x000fe6000c101b04 */ /*0230*/ IMAD.WIDE R4, R20.reuse, R21.reuse, c[0x4][0x88] ; /* 0x0100220014047625 */ /* 0x0c2fe200078e0215 */ /*0240*/ STG.E.64 [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x000fe6000c101b04 */ /*0250*/ IMAD.WIDE R6, R20, R21.reuse, c[0x4][0x80] ; /* 0x0100200014067625 */ /* 0x084fe200078e0215 */ /*0260*/ STG.E.64 [R4.64], RZ ; /* 0x000000ff04007986 */ /* 0x000fe6000c101b04 */ /*0270*/ IMAD.WIDE R8, R0.reuse, R21.reuse, c[0x4][0x98] ; /* 0x0100260000087625 */ /* 0x0c8fe200078e0215 */ /*0280*/ STG.E.64 [R6.64], RZ ; /* 0x000000ff06007986 */ /* 0x000fe6000c101b04 */ /*0290*/ IMAD.WIDE R18, R0.reuse, R21.reuse, c[0x4][0xa0] ; /* 0x0100280000127625 */ /* 0x0c0fe200078e0215 */ /*02a0*/ STG.E.64 [R8.64], RZ ; /* 0x000000ff08007986 */ /* 0x000fe6000c101b04 */ /*02b0*/ IMAD.WIDE R10, R0, R21, c[0x4][0x48] ; /* 0x01001200000a7625 */ /* 0x010fe200078e0215 */ /*02c0*/ STG.E.64 [R18.64], RZ ; /* 0x000000ff12007986 */ /* 0x000fe8000c101b04 */ /*02d0*/ STG.E.64 [R10.64], RZ ; /* 0x000000ff0a007986 */ /* 0x000fe2000c101b04 */ /*02e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*02f0*/ BRA 0x2f0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0300*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0310*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0320*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0330*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0340*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0350*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0360*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0370*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z9createDesi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e280000002100 */ /*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0030*/ IMAD R0, R3, c[0x0][0x0], R0 ; /* 0x0000000003007a24 */ /* 0x001fca00078e0200 */ /*0040*/ ISETP.GT.AND P0, PT, R0, 0x9, PT ; /* 0x000000090000780c */ /* 0x000fda0003f04270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R9, 0x3e8 ; /* 0x000003e800097802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0080*/ SHF.R.S32.HI R5, RZ, 0x1f, R0 ; /* 0x0000001fff057819 */ /* 0x000fe40000011400 */ /*0090*/ MOV R4, 0x28 ; /* 0x0000002800047802 */ /* 0x000fe20000000f00 */ /*00a0*/ IMAD.WIDE R2, R0, R9, c[0x4][0x58] ; /* 0x0100160000027625 */ /* 0x000fca00078e0209 */ /*00b0*/ STG.E.U8 [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e2000c101104 */ /*00c0*/ IADD3 R6, P0, R2, 0x2b, RZ ; /* 0x0000002b02067810 */ /* 0x000fc60007f1e0ff */ /*00d0*/ STG.E.U8 [R2.64+0x1], RZ ; /* 0x000001ff02007986 */ /* 0x0001e4000c101104 */ /*00e0*/ IMAD.X R7, RZ, RZ, R3, P0 ; /* 0x000000ffff077224 */ /* 0x000fe400000e0603 */ /*00f0*/ STG.E.U8 [R2.64+0x2], RZ ; /* 0x000002ff02007986 */ /* 0x0001e8000c101104 */ /*0100*/ STG.E.U8 [R2.64+0x3], RZ ; /* 0x000003ff02007986 */ /* 0x0001e8000c101104 */ /*0110*/ STG.E.U8 [R2.64+0x4], RZ ; /* 0x000004ff02007986 */ /* 0x0001e8000c101104 */ /*0120*/ STG.E.U8 [R2.64+0x5], RZ ; /* 0x000005ff02007986 */ /* 0x0001e8000c101104 */ /*0130*/ STG.E.U8 [R2.64+0x6], RZ ; /* 0x000006ff02007986 */ /* 0x0001e8000c101104 */ /*0140*/ STG.E.U8 [R2.64+0x7], RZ ; /* 0x000007ff02007986 */ /* 0x0001e8000c101104 */ /*0150*/ STG.E.U8 [R2.64+0x8], RZ ; /* 0x000008ff02007986 */ /* 0x0001e8000c101104 */ /*0160*/ STG.E.U8 [R2.64+0x9], RZ ; /* 0x000009ff02007986 */ /* 0x0001e8000c101104 */ /*0170*/ STG.E.U8 [R2.64+0xa], RZ ; /* 0x00000aff02007986 */ /* 0x0001e8000c101104 */ /*0180*/ STG.E.U8 [R2.64+0xb], RZ ; /* 0x00000bff02007986 */ /* 0x0001e8000c101104 */ /*0190*/ STG.E.U8 [R2.64+0xc], RZ ; /* 0x00000cff02007986 */ /* 0x0001e8000c101104 */ /*01a0*/ STG.E.U8 [R2.64+0xd], RZ ; /* 0x00000dff02007986 */ /* 0x0001e8000c101104 */ /*01b0*/ STG.E.U8 [R2.64+0xe], RZ ; /* 0x00000eff02007986 */ /* 0x0001e8000c101104 */ /*01c0*/ STG.E.U8 [R2.64+0xf], RZ ; /* 0x00000fff02007986 */ /* 0x0001e8000c101104 */ /*01d0*/ STG.E.U8 [R2.64+0x10], RZ ; /* 0x000010ff02007986 */ /* 0x0001e8000c101104 */ /*01e0*/ STG.E.U8 [R2.64+0x11], RZ ; /* 0x000011ff02007986 */ /* 0x0001e8000c101104 */ /*01f0*/ STG.E.U8 [R2.64+0x12], RZ ; /* 0x000012ff02007986 */ /* 0x0001e8000c101104 */ /*0200*/ STG.E.U8 [R2.64+0x13], RZ ; /* 0x000013ff02007986 */ /* 0x0001e8000c101104 */ /*0210*/ STG.E.U8 [R2.64+0x14], RZ ; /* 0x000014ff02007986 */ /* 0x0001e8000c101104 */ /*0220*/ STG.E.U8 [R2.64+0x15], RZ ; /* 0x000015ff02007986 */ /* 0x0001e8000c101104 */ /*0230*/ STG.E.U8 [R2.64+0x16], RZ ; /* 0x000016ff02007986 */ /* 0x0001e8000c101104 */ /*0240*/ STG.E.U8 [R2.64+0x17], RZ ; /* 0x000017ff02007986 */ /* 0x0001e8000c101104 */ /*0250*/ STG.E.U8 [R2.64+0x18], RZ ; /* 0x000018ff02007986 */ /* 0x0001e8000c101104 */ /*0260*/ STG.E.U8 [R2.64+0x19], RZ ; /* 0x000019ff02007986 */ /* 0x0001e8000c101104 */ /*0270*/ STG.E.U8 [R2.64+0x1a], RZ ; /* 0x00001aff02007986 */ /* 0x0001e8000c101104 */ /*0280*/ STG.E.U8 [R2.64+0x1b], RZ ; /* 0x00001bff02007986 */ /* 0x0001e8000c101104 */ /*0290*/ STG.E.U8 [R2.64+0x1c], RZ ; /* 0x00001cff02007986 */ /* 0x0001e8000c101104 */ /*02a0*/ STG.E.U8 [R2.64+0x1d], RZ ; /* 0x00001dff02007986 */ /* 0x0001e8000c101104 */ /*02b0*/ STG.E.U8 [R2.64+0x1e], RZ ; /* 0x00001eff02007986 */ /* 0x0001e8000c101104 */ /*02c0*/ STG.E.U8 [R2.64+0x1f], RZ ; /* 0x00001fff02007986 */ /* 0x0001e8000c101104 */ /*02d0*/ STG.E.U8 [R2.64+0x20], RZ ; /* 0x000020ff02007986 */ /* 0x0001e8000c101104 */ /*02e0*/ STG.E.U8 [R2.64+0x21], RZ ; /* 0x000021ff02007986 */ /* 0x0001e8000c101104 */ /*02f0*/ STG.E.U8 [R2.64+0x22], RZ ; /* 0x000022ff02007986 */ /* 0x0001e8000c101104 */ /*0300*/ STG.E.U8 [R2.64+0x23], RZ ; /* 0x000023ff02007986 */ /* 0x0001e8000c101104 */ /*0310*/ STG.E.U8 [R2.64+0x24], RZ ; /* 0x000024ff02007986 */ /* 0x0001e8000c101104 */ /*0320*/ STG.E.U8 [R2.64+0x25], RZ ; /* 0x000025ff02007986 */ /* 0x0001e8000c101104 */ /*0330*/ STG.E.U8 [R2.64+0x26], RZ ; /* 0x000026ff02007986 */ /* 0x0001e8000c101104 */ /*0340*/ STG.E.U8 [R2.64+0x27], RZ ; /* 0x000027ff02007986 */ /* 0x0001e4000c101104 */ /*0350*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ; /* 0x000000ffff027224 */ /* 0x001fe200078e0006 */ /*0360*/ MOV R3, R7 ; /* 0x0000000700037202 */ /* 0x000fc40000000f00 */ /*0370*/ IADD3 R4, R4, 0x78, RZ ; /* 0x0000007804047810 */ /* 0x000fe40007ffe0ff */ /*0380*/ IADD3 R6, P1, R2, 0x78, RZ ; /* 0x0000007802067810 */ /* 0x000fe20007f3e0ff */ /*0390*/ STG.E.U8 [R2.64+-0x3], RZ ; /* 0xfffffdff02007986 */ /* 0x0001e2000c101104 */ /*03a0*/ ISETP.NE.AND P0, PT, R4, 0x3e8, PT ; /* 0x000003e80400780c */ /* 0x000fc60003f05270 */ /*03b0*/ STG.E.U8 [R2.64+-0x2], RZ ; /* 0xfffffeff02007986 */ /* 0x0001e2000c101104 */ /*03c0*/ IMAD.X R7, RZ, RZ, R3, P1 ; /* 0x000000ffff077224 */ /* 0x000fc600008e0603 */ /*03d0*/ STG.E.U8 [R2.64+-0x1], RZ ; /* 0xffffffff02007986 */ /* 0x0001e8000c101104 */ /*03e0*/ STG.E.U8 [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e8000c101104 */ /*03f0*/ STG.E.U8 [R2.64+0x1], RZ ; /* 0x000001ff02007986 */ /* 0x0001e8000c101104 */ /*0400*/ STG.E.U8 [R2.64+0x2], RZ ; /* 0x000002ff02007986 */ /* 0x0001e8000c101104 */ /*0410*/ STG.E.U8 [R2.64+0x3], RZ ; /* 0x000003ff02007986 */ /* 0x0001e8000c101104 */ /*0420*/ STG.E.U8 [R2.64+0x4], RZ ; /* 0x000004ff02007986 */ /* 0x0001e8000c101104 */ /*0430*/ STG.E.U8 [R2.64+0x5], RZ ; /* 0x000005ff02007986 */ /* 0x0001e8000c101104 */ /*0440*/ STG.E.U8 [R2.64+0x6], RZ ; /* 0x000006ff02007986 */ /* 0x0001e8000c101104 */ /*0450*/ STG.E.U8 [R2.64+0x7], RZ ; /* 0x000007ff02007986 */ /* 0x0001e8000c101104 */ /*0460*/ STG.E.U8 [R2.64+0x8], RZ ; /* 0x000008ff02007986 */ /* 0x0001e8000c101104 */ /*0470*/ STG.E.U8 [R2.64+0x9], RZ ; /* 0x000009ff02007986 */ /* 0x0001e8000c101104 */ /*0480*/ STG.E.U8 [R2.64+0xa], RZ ; /* 0x00000aff02007986 */ /* 0x0001e8000c101104 */ /*0490*/ STG.E.U8 [R2.64+0xb], RZ ; /* 0x00000bff02007986 */ /* 0x0001e8000c101104 */ /*04a0*/ STG.E.U8 [R2.64+0xc], RZ ; /* 0x00000cff02007986 */ /* 0x0001e8000c101104 */ /*04b0*/ STG.E.U8 [R2.64+0xd], RZ ; /* 0x00000dff02007986 */ /* 0x0001e8000c101104 */ /*04c0*/ STG.E.U8 [R2.64+0xe], RZ ; /* 0x00000eff02007986 */ /* 0x0001e8000c101104 */ /*04d0*/ STG.E.U8 [R2.64+0xf], RZ ; /* 0x00000fff02007986 */ /* 0x0001e8000c101104 */ /*04e0*/ STG.E.U8 [R2.64+0x10], RZ ; /* 0x000010ff02007986 */ /* 0x0001e8000c101104 */ /*04f0*/ STG.E.U8 [R2.64+0x11], RZ ; /* 0x000011ff02007986 */ /* 0x0001e8000c101104 */ /*0500*/ STG.E.U8 [R2.64+0x12], RZ ; /* 0x000012ff02007986 */ /* 0x0001e8000c101104 */ /*0510*/ STG.E.U8 [R2.64+0x13], RZ ; /* 0x000013ff02007986 */ /* 0x0001e8000c101104 */ /*0520*/ STG.E.U8 [R2.64+0x14], RZ ; /* 0x000014ff02007986 */ /* 0x0001e8000c101104 */ /*0530*/ STG.E.U8 [R2.64+0x15], RZ ; /* 0x000015ff02007986 */ /* 0x0001e8000c101104 */ /*0540*/ STG.E.U8 [R2.64+0x16], RZ ; /* 0x000016ff02007986 */ /* 0x0001e8000c101104 */ /*0550*/ STG.E.U8 [R2.64+0x17], RZ ; /* 0x000017ff02007986 */ /* 0x0001e8000c101104 */ /*0560*/ STG.E.U8 [R2.64+0x18], RZ ; /* 0x000018ff02007986 */ /* 0x0001e8000c101104 */ /*0570*/ STG.E.U8 [R2.64+0x19], RZ ; /* 0x000019ff02007986 */ /* 0x0001e8000c101104 */ /*0580*/ STG.E.U8 [R2.64+0x1a], RZ ; /* 0x00001aff02007986 */ /* 0x0001e8000c101104 */ /*0590*/ STG.E.U8 [R2.64+0x1b], RZ ; /* 0x00001bff02007986 */ /* 0x0001e8000c101104 */ /*05a0*/ STG.E.U8 [R2.64+0x1c], RZ ; /* 0x00001cff02007986 */ /* 0x0001e8000c101104 */ /*05b0*/ STG.E.U8 [R2.64+0x1d], RZ ; /* 0x00001dff02007986 */ /* 0x0001e8000c101104 */ /*05c0*/ STG.E.U8 [R2.64+0x1e], RZ ; /* 0x00001eff02007986 */ /* 0x0001e8000c101104 */ /*05d0*/ STG.E.U8 [R2.64+0x1f], RZ ; /* 0x00001fff02007986 */ /* 0x0001e8000c101104 */ /*05e0*/ STG.E.U8 [R2.64+0x20], RZ ; /* 0x000020ff02007986 */ /* 0x0001e8000c101104 */ /*05f0*/ STG.E.U8 [R2.64+0x21], RZ ; /* 0x000021ff02007986 */ /* 0x0001e8000c101104 */ /*0600*/ STG.E.U8 [R2.64+0x22], RZ ; /* 0x000022ff02007986 */ /* 0x0001e8000c101104 */ /*0610*/ STG.E.U8 [R2.64+0x23], RZ ; /* 0x000023ff02007986 */ /* 0x0001e8000c101104 */ /*0620*/ STG.E.U8 [R2.64+0x24], RZ ; /* 0x000024ff02007986 */ /* 0x0001e8000c101104 */ /*0630*/ STG.E.U8 [R2.64+0x25], RZ ; /* 0x000025ff02007986 */ /* 0x0001e8000c101104 */ /*0640*/ STG.E.U8 [R2.64+0x26], RZ ; /* 0x000026ff02007986 */ /* 0x0001e8000c101104 */ /*0650*/ STG.E.U8 [R2.64+0x27], RZ ; /* 0x000027ff02007986 */ /* 0x0001e8000c101104 */ /*0660*/ STG.E.U8 [R2.64+0x28], RZ ; /* 0x000028ff02007986 */ /* 0x0001e8000c101104 */ /*0670*/ STG.E.U8 [R2.64+0x29], RZ ; /* 0x000029ff02007986 */ /* 0x0001e8000c101104 */ /*0680*/ STG.E.U8 [R2.64+0x2a], RZ ; /* 0x00002aff02007986 */ /* 0x0001e8000c101104 */ /*0690*/ STG.E.U8 [R2.64+0x2b], RZ ; /* 0x00002bff02007986 */ /* 0x0001e8000c101104 */ /*06a0*/ STG.E.U8 [R2.64+0x2c], RZ ; /* 0x00002cff02007986 */ /* 0x0001e8000c101104 */ /*06b0*/ STG.E.U8 [R2.64+0x2d], RZ ; /* 0x00002dff02007986 */ /* 0x0001e8000c101104 */ /*06c0*/ STG.E.U8 [R2.64+0x2e], RZ ; /* 0x00002eff02007986 */ /* 0x0001e8000c101104 */ /*06d0*/ STG.E.U8 [R2.64+0x2f], RZ ; /* 0x00002fff02007986 */ /* 0x0001e8000c101104 */ /*06e0*/ STG.E.U8 [R2.64+0x30], RZ ; /* 0x000030ff02007986 */ /* 0x0001e8000c101104 */ /*06f0*/ STG.E.U8 [R2.64+0x31], RZ ; /* 0x000031ff02007986 */ /* 0x0001e8000c101104 */ /*0700*/ STG.E.U8 [R2.64+0x32], RZ ; /* 0x000032ff02007986 */ /* 0x0001e8000c101104 */ /*0710*/ STG.E.U8 [R2.64+0x33], RZ ; /* 0x000033ff02007986 */ /* 0x0001e8000c101104 */ /*0720*/ STG.E.U8 [R2.64+0x34], RZ ; /* 0x000034ff02007986 */ /* 0x0001e8000c101104 */ /*0730*/ STG.E.U8 [R2.64+0x35], RZ ; /* 0x000035ff02007986 */ /* 0x0001e8000c101104 */ /*0740*/ STG.E.U8 [R2.64+0x36], RZ ; /* 0x000036ff02007986 */ /* 0x0001e8000c101104 */ /*0750*/ STG.E.U8 [R2.64+0x37], RZ ; /* 0x000037ff02007986 */ /* 0x0001e8000c101104 */ /*0760*/ STG.E.U8 [R2.64+0x38], RZ ; /* 0x000038ff02007986 */ /* 0x0001e8000c101104 */ /*0770*/ STG.E.U8 [R2.64+0x39], RZ ; /* 0x000039ff02007986 */ /* 0x0001e8000c101104 */ /*0780*/ STG.E.U8 [R2.64+0x3a], RZ ; /* 0x00003aff02007986 */ /* 0x0001e8000c101104 */ /*0790*/ STG.E.U8 [R2.64+0x3b], RZ ; /* 0x00003bff02007986 */ /* 0x0001e8000c101104 */ /*07a0*/ STG.E.U8 [R2.64+0x3c], RZ ; /* 0x00003cff02007986 */ /* 0x0001e8000c101104 */ /*07b0*/ STG.E.U8 [R2.64+0x3d], RZ ; /* 0x00003dff02007986 */ /* 0x0001e8000c101104 */ /*07c0*/ STG.E.U8 [R2.64+0x3e], RZ ; /* 0x00003eff02007986 */ /* 0x0001e8000c101104 */ /*07d0*/ STG.E.U8 [R2.64+0x3f], RZ ; /* 0x00003fff02007986 */ /* 0x0001e8000c101104 */ /*07e0*/ STG.E.U8 [R2.64+0x40], RZ ; /* 0x000040ff02007986 */ /* 0x0001e8000c101104 */ /*07f0*/ STG.E.U8 [R2.64+0x41], RZ ; /* 0x000041ff02007986 */ /* 0x0001e8000c101104 */ /*0800*/ STG.E.U8 [R2.64+0x42], RZ ; /* 0x000042ff02007986 */ /* 0x0001e8000c101104 */ /*0810*/ STG.E.U8 [R2.64+0x43], RZ ; /* 0x000043ff02007986 */ /* 0x0001e8000c101104 */ /*0820*/ STG.E.U8 [R2.64+0x44], RZ ; /* 0x000044ff02007986 */ /* 0x0001e8000c101104 */ /*0830*/ STG.E.U8 [R2.64+0x45], RZ ; /* 0x000045ff02007986 */ /* 0x0001e8000c101104 */ /*0840*/ STG.E.U8 [R2.64+0x46], RZ ; /* 0x000046ff02007986 */ /* 0x0001e8000c101104 */ /*0850*/ STG.E.U8 [R2.64+0x47], RZ ; /* 0x000047ff02007986 */ /* 0x0001e8000c101104 */ /*0860*/ STG.E.U8 [R2.64+0x48], RZ ; /* 0x000048ff02007986 */ /* 0x0001e8000c101104 */ /*0870*/ STG.E.U8 [R2.64+0x49], RZ ; /* 0x000049ff02007986 */ /* 0x0001e8000c101104 */ /*0880*/ STG.E.U8 [R2.64+0x4a], RZ ; /* 0x00004aff02007986 */ /* 0x0001e8000c101104 */ /*0890*/ STG.E.U8 [R2.64+0x4b], RZ ; /* 0x00004bff02007986 */ /* 0x0001e8000c101104 */ /*08a0*/ STG.E.U8 [R2.64+0x4c], RZ ; /* 0x00004cff02007986 */ /* 0x0001e8000c101104 */ /*08b0*/ STG.E.U8 [R2.64+0x4d], RZ ; /* 0x00004dff02007986 */ /* 0x0001e8000c101104 */ /*08c0*/ STG.E.U8 [R2.64+0x4e], RZ ; /* 0x00004eff02007986 */ /* 0x0001e8000c101104 */ /*08d0*/ STG.E.U8 [R2.64+0x4f], RZ ; /* 0x00004fff02007986 */ /* 0x0001e8000c101104 */ /*08e0*/ STG.E.U8 [R2.64+0x50], RZ ; /* 0x000050ff02007986 */ /* 0x0001e8000c101104 */ /*08f0*/ STG.E.U8 [R2.64+0x51], RZ ; /* 0x000051ff02007986 */ /* 0x0001e8000c101104 */ /*0900*/ STG.E.U8 [R2.64+0x52], RZ ; /* 0x000052ff02007986 */ /* 0x0001e8000c101104 */ /*0910*/ STG.E.U8 [R2.64+0x53], RZ ; /* 0x000053ff02007986 */ /* 0x0001e8000c101104 */ /*0920*/ STG.E.U8 [R2.64+0x54], RZ ; /* 0x000054ff02007986 */ /* 0x0001e8000c101104 */ /*0930*/ STG.E.U8 [R2.64+0x55], RZ ; /* 0x000055ff02007986 */ /* 0x0001e8000c101104 */ /*0940*/ STG.E.U8 [R2.64+0x56], RZ ; /* 0x000056ff02007986 */ /* 0x0001e8000c101104 */ /*0950*/ STG.E.U8 [R2.64+0x57], RZ ; /* 0x000057ff02007986 */ /* 0x0001e8000c101104 */ /*0960*/ STG.E.U8 [R2.64+0x58], RZ ; /* 0x000058ff02007986 */ /* 0x0001e8000c101104 */ /*0970*/ STG.E.U8 [R2.64+0x59], RZ ; /* 0x000059ff02007986 */ /* 0x0001e8000c101104 */ /*0980*/ STG.E.U8 [R2.64+0x5a], RZ ; /* 0x00005aff02007986 */ /* 0x0001e8000c101104 */ /*0990*/ STG.E.U8 [R2.64+0x5b], RZ ; /* 0x00005bff02007986 */ /* 0x0001e8000c101104 */ /*09a0*/ STG.E.U8 [R2.64+0x5c], RZ ; /* 0x00005cff02007986 */ /* 0x0001e8000c101104 */ /*09b0*/ STG.E.U8 [R2.64+0x5d], RZ ; /* 0x00005dff02007986 */ /* 0x0001e8000c101104 */ /*09c0*/ STG.E.U8 [R2.64+0x5e], RZ ; /* 0x00005eff02007986 */ /* 0x0001e8000c101104 */ /*09d0*/ STG.E.U8 [R2.64+0x5f], RZ ; /* 0x00005fff02007986 */ /* 0x0001e8000c101104 */ /*09e0*/ STG.E.U8 [R2.64+0x60], RZ ; /* 0x000060ff02007986 */ /* 0x0001e8000c101104 */ /*09f0*/ STG.E.U8 [R2.64+0x61], RZ ; /* 0x000061ff02007986 */ /* 0x0001e8000c101104 */ /*0a00*/ STG.E.U8 [R2.64+0x62], RZ ; /* 0x000062ff02007986 */ /* 0x0001e8000c101104 */ /*0a10*/ STG.E.U8 [R2.64+0x63], RZ ; /* 0x000063ff02007986 */ /* 0x0001e8000c101104 */ /*0a20*/ STG.E.U8 [R2.64+0x64], RZ ; /* 0x000064ff02007986 */ /* 0x0001e8000c101104 */ /*0a30*/ STG.E.U8 [R2.64+0x65], RZ ; /* 0x000065ff02007986 */ /* 0x0001e8000c101104 */ /*0a40*/ STG.E.U8 [R2.64+0x66], RZ ; /* 0x000066ff02007986 */ /* 0x0001e8000c101104 */ /*0a50*/ STG.E.U8 [R2.64+0x67], RZ ; /* 0x000067ff02007986 */ /* 0x0001e8000c101104 */ /*0a60*/ STG.E.U8 [R2.64+0x68], RZ ; /* 0x000068ff02007986 */ /* 0x0001e8000c101104 */ /*0a70*/ STG.E.U8 [R2.64+0x69], RZ ; /* 0x000069ff02007986 */ /* 0x0001e8000c101104 */ /*0a80*/ STG.E.U8 [R2.64+0x6a], RZ ; /* 0x00006aff02007986 */ /* 0x0001e8000c101104 */ /*0a90*/ STG.E.U8 [R2.64+0x6b], RZ ; /* 0x00006bff02007986 */ /* 0x0001e8000c101104 */ /*0aa0*/ STG.E.U8 [R2.64+0x6c], RZ ; /* 0x00006cff02007986 */ /* 0x0001e8000c101104 */ /*0ab0*/ STG.E.U8 [R2.64+0x6d], RZ ; /* 0x00006dff02007986 */ /* 0x0001e8000c101104 */ /*0ac0*/ STG.E.U8 [R2.64+0x6e], RZ ; /* 0x00006eff02007986 */ /* 0x0001e8000c101104 */ /*0ad0*/ STG.E.U8 [R2.64+0x6f], RZ ; /* 0x00006fff02007986 */ /* 0x0001e8000c101104 */ /*0ae0*/ STG.E.U8 [R2.64+0x70], RZ ; /* 0x000070ff02007986 */ /* 0x0001e8000c101104 */ /*0af0*/ STG.E.U8 [R2.64+0x71], RZ ; /* 0x000071ff02007986 */ /* 0x0001e8000c101104 */ /*0b00*/ STG.E.U8 [R2.64+0x72], RZ ; /* 0x000072ff02007986 */ /* 0x0001e8000c101104 */ /*0b10*/ STG.E.U8 [R2.64+0x73], RZ ; /* 0x000073ff02007986 */ /* 0x0001e8000c101104 */ /*0b20*/ STG.E.U8 [R2.64+0x74], RZ ; /* 0x000074ff02007986 */ /* 0x0001e2000c101104 */ /*0b30*/ @P0 BRA 0x350 ; /* 0xfffff81000000947 */ /* 0x000fea000383ffff */ /*0b40*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */ /* 0x001fe20000000f00 */ /*0b50*/ IMAD.MOV.U32 R3, RZ, RZ, 0xc44 ; /* 0x00000c44ff037424 */ /* 0x000fc800078e00ff */ /*0b60*/ IMAD.WIDE R2, R2, R3, c[0x4][0x0] ; /* 0x0100000002027625 */ /* 0x000fcc00078e0203 */ /*0b70*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea4000c1e1900 */ /*0b80*/ ISETP.NE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x004fda0003f05270 */ /*0b90*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0ba0*/ IMAD.WIDE.U32 R2, R0, R9, c[0x4][0x58] ; /* 0x0100160000027625 */ /* 0x000fe200078e0009 */ /*0bb0*/ MOV R0, 0x1 ; /* 0x0000000100007802 */ /* 0x000fc60000000f00 */ /*0bc0*/ IMAD R5, R5, 0x3e8, RZ ; /* 0x000003e805057824 */ /* 0x000fc800078e02ff */ /*0bd0*/ IMAD.IADD R3, R3, 0x1, R5 ; /* 0x0000000103037824 */ /* 0x000fca00078e0205 */ /*0be0*/ STG.E.U8 [R2.64+0x64], R0 ; /* 0x0000640002007986 */ /* 0x000fe8000c101104 */ /*0bf0*/ STG.E.U8 [R2.64+0x87], R0 ; /* 0x0000870002007986 */ /* 0x000fe8000c101104 */ /*0c00*/ STG.E.U8 [R2.64+0xaa], R0 ; /* 0x0000aa0002007986 */ /* 0x000fe8000c101104 */ /*0c10*/ STG.E.U8 [R2.64+0xcd], R0 ; /* 0x0000cd0002007986 */ /* 0x000fe8000c101104 */ /*0c20*/ STG.E.U8 [R2.64+0xf0], R0 ; /* 0x0000f00002007986 */ /* 0x000fe8000c101104 */ /*0c30*/ STG.E.U8 [R2.64+0x113], R0 ; /* 0x0001130002007986 */ /* 0x000fe8000c101104 */ /*0c40*/ STG.E.U8 [R2.64+0x136], R0 ; /* 0x0001360002007986 */ /* 0x000fe8000c101104 */ /*0c50*/ STG.E.U8 [R2.64+0x159], R0 ; /* 0x0001590002007986 */ /* 0x000fe8000c101104 */ /*0c60*/ STG.E.U8 [R2.64+0x17c], R0 ; /* 0x00017c0002007986 */ /* 0x000fe8000c101104 */ /*0c70*/ STG.E.U8 [R2.64+0x19f], R0 ; /* 0x00019f0002007986 */ /* 0x000fe8000c101104 */ /*0c80*/ STG.E.U8 [R2.64+0x1c2], R0 ; /* 0x0001c20002007986 */ /* 0x000fe8000c101104 */ /*0c90*/ STG.E.U8 [R2.64+0x1e5], R0 ; /* 0x0001e50002007986 */ /* 0x000fe8000c101104 */ /*0ca0*/ STG.E.U8 [R2.64+0x208], R0 ; /* 0x0002080002007986 */ /* 0x000fe8000c101104 */ /*0cb0*/ STG.E.U8 [R2.64+0x22b], R0 ; /* 0x00022b0002007986 */ /* 0x000fe8000c101104 */ /*0cc0*/ STG.E.U8 [R2.64+0x24e], R0 ; /* 0x00024e0002007986 */ /* 0x000fe8000c101104 */ /*0cd0*/ STG.E.U8 [R2.64+0x271], R0 ; /* 0x0002710002007986 */ /* 0x000fe8000c101104 */ /*0ce0*/ STG.E.U8 [R2.64+0x294], R0 ; /* 0x0002940002007986 */ /* 0x000fe8000c101104 */ /*0cf0*/ STG.E.U8 [R2.64+0x2b7], R0 ; /* 0x0002b70002007986 */ /* 0x000fe8000c101104 */ /*0d00*/ STG.E.U8 [R2.64+0x2da], R0 ; /* 0x0002da0002007986 */ /* 0x000fe8000c101104 */ /*0d10*/ STG.E.U8 [R2.64+0x2fd], R0 ; /* 0x0002fd0002007986 */ /* 0x000fe8000c101104 */ /*0d20*/ STG.E.U8 [R2.64+0x320], R0 ; /* 0x0003200002007986 */ /* 0x000fe8000c101104 */ /*0d30*/ STG.E.U8 [R2.64+0x343], R0 ; /* 0x0003430002007986 */ /* 0x000fe8000c101104 */ /*0d40*/ STG.E.U8 [R2.64+0x366], R0 ; /* 0x0003660002007986 */ /* 0x000fe8000c101104 */ /*0d50*/ STG.E.U8 [R2.64+0x389], R0 ; /* 0x0003890002007986 */ /* 0x000fe8000c101104 */ /*0d60*/ STG.E.U8 [R2.64+0x3ac], R0 ; /* 0x0003ac0002007986 */ /* 0x000fe8000c101104 */ /*0d70*/ STG.E.U8 [R2.64+0x3cf], R0 ; /* 0x0003cf0002007986 */ /* 0x000fe2000c101104 */ /*0d80*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0d90*/ BRA 0xd90; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0da0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0db0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0dc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0dd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0de0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0df0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0e70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z8pix2spksii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e280000002100 */ /*0020*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e240000002500 */ /*0030*/ IMAD R7, R0, c[0x0][0x0], R7 ; /* 0x0000000000077a24 */ /* 0x001fca00078e0207 */ /*0040*/ ISETP.GT.AND P0, PT, R7, 0x30f, PT ; /* 0x0000030f0700780c */ /* 0x000fda0003f04270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0080*/ MOV R3, 0xc44 ; /* 0x00000c4400037802 */ /* 0x000fca0000000f00 */ /*0090*/ IMAD.WIDE R2, R2, R3, c[0x4][0x0] ; /* 0x0100000002027625 */ /* 0x000fcc00078e0203 */ /*00a0*/ IMAD.WIDE R2, R7, 0x4, R2 ; /* 0x0000000407027825 */ /* 0x000fcc00078e0202 */ /*00b0*/ LDG.E R2, [R2.64+0x4] ; /* 0x0000040402027981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ MOV R6, 0x1f40 ; /* 0x00001f4000067802 */ /* 0x000fe40000000f00 */ /*00d0*/ MOV R9, c[0x0][0x164] ; /* 0x0000590000097a02 */ /* 0x000fc60000000f00 */ /*00e0*/ IMAD.WIDE R4, R2, R6, c[0x4][0x20] ; /* 0x0100080002047625 */ /* 0x004fcc00078e0206 */ /*00f0*/ IMAD.WIDE R4, R9, 0x8, R4 ; /* 0x0000000809047825 */ /* 0x000fcc00078e0204 */ /*0100*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea2000c1e1b00 */ /*0110*/ IMAD.WIDE R6, R7, R6, c[0x4][0x8] ; /* 0x0100020007067625 */ /* 0x000fcc00078e0206 */ /*0120*/ IMAD.WIDE R6, R9, 0x8, R6 ; /* 0x0000000809067825 */ /* 0x000fca00078e0206 */ /*0130*/ STG.E.64 [R6.64], R4 ; /* 0x0000000406007986 */ /* 0x004fe8000c101b04 */ /*0140*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0150*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0160*/ BRA 0x160; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z12convert2SpksPh .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0030*/ IMAD.MOV.U32 R7, RZ, RZ, 0x8 ; /* 0x00000008ff077424 */ /* 0x010fe200078e00ff */ /*0040*/ SHF.R.S32.HI R2, RZ, 0x1f, R0 ; /* 0x0000001fff027819 */ /* 0x000fe20000011400 */ /*0050*/ IMAD.MOV.U32 R3, RZ, RZ, RZ ; /* 0x000000ffff037224 */ /* 0x000fe400078e00ff */ /*0060*/ IMAD.WIDE R4, R0, R7, c[0x4][0x10] ; /* 0x0100040000047625 */ /* 0x000fc800078e0207 */ /*0070*/ IMAD.WIDE R6, R0, R7, c[0x4][0x18] ; /* 0x0100060000067625 */ /* 0x000fe200078e0207 */ /*0080*/ STG.E.64 [R4.64], RZ ; /* 0x000000ff04007986 */ /* 0x0001e8000c101b04 */ /*0090*/ STG.E.64 [R6.64], RZ ; /* 0x000000ff06007986 */ /* 0x0001e4000c101b04 */ /*00a0*/ IMAD R7, R0, 0x3e8, R3 ; /* 0x000003e800077824 */ /* 0x011fca00078e0203 */ /*00b0*/ IADD3 R12, P0, R7, c[0x0][0x160], RZ ; /* 0x00005800070c7a10 */ /* 0x000fc80007f1e0ff */ /*00c0*/ LEA.HI.X.SX32 R13, R7, c[0x0][0x164], 0x1, P0 ; /* 0x00005900070d7a11 */ /* 0x000fca00000f0eff */ /*00d0*/ LDG.E.U8 R9, [R12.64] ; /* 0x000000040c097981 */ /* 0x000ea2000c1e1100 */ /*00e0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3e8 ; /* 0x000003e8ff057424 */ /* 0x000fe400078e00ff */ /*00f0*/ IMAD R11, R2, 0x3e8, RZ ; /* 0x000003e8020b7824 */ /* 0x000fe400078e02ff */ /*0100*/ IMAD.WIDE.U32 R4, R0, R5, c[0x4][0xd0] ; /* 0x0100340000047625 */ /* 0x000fc800078e0005 */ /*0110*/ IMAD.IADD R6, R5, 0x1, R11 ; /* 0x0000000105067824 */ /* 0x000fe200078e020b */ /*0120*/ IADD3 R14, P0, R3, R4, RZ ; /* 0x00000004030e7210 */ /* 0x000fc80007f1e0ff */ /*0130*/ LEA.HI.X.SX32 R15, R3, R6, 0x1, P0 ; /* 0x00000006030f7211 */ /* 0x000fca00000f0eff */ /*0140*/ STG.E.U8 [R14.64], R9 ; /* 0x000000090e007986 */ /* 0x0041e8000c101104 */ /*0150*/ LDG.E.U8 R5, [R12.64+0x1] ; /* 0x000001040c057981 */ /* 0x000ea8000c1e1100 */ /*0160*/ STG.E.U8 [R14.64+0x1], R5 ; /* 0x000001050e007986 */ /* 0x0043e8000c101104 */ /*0170*/ LDG.E.U8 R11, [R12.64+0x2] ; /* 0x000002040c0b7981 */ /* 0x000ea8000c1e1100 */ /*0180*/ STG.E.U8 [R14.64+0x2], R11 ; /* 0x0000020b0e007986 */ /* 0x0045e8000c101104 */ /*0190*/ LDG.E.U8 R17, [R12.64+0x3] ; /* 0x000003040c117981 */ /* 0x000ee8000c1e1100 */ /*01a0*/ STG.E.U8 [R14.64+0x3], R17 ; /* 0x000003110e007986 */ /* 0x0087e8000c101104 */ /*01b0*/ LDG.E.U8 R19, [R12.64+0x4] ; /* 0x000004040c137981 */ /* 0x000f28000c1e1100 */ /*01c0*/ STG.E.U8 [R14.64+0x4], R19 ; /* 0x000004130e007986 */ /* 0x0109e8000c101104 */ /*01d0*/ LDG.E.U8 R21, [R12.64+0x5] ; /* 0x000005040c157981 */ /* 0x000f68000c1e1100 */ /*01e0*/ STG.E.U8 [R14.64+0x5], R21 ; /* 0x000005150e007986 */ /* 0x020be8000c101104 */ /*01f0*/ LDG.E.U8 R23, [R12.64+0x6] ; /* 0x000006040c177981 */ /* 0x000ea2000c1e1100 */ /*0200*/ IADD3 R9, R7, 0x8, RZ ; /* 0x0000000807097810 */ /* 0x001fc80007ffe0ff */ /*0210*/ IADD3 R8, P0, R9.reuse, c[0x0][0x160], RZ ; /* 0x0000580009087a10 */ /* 0x040fe20007f1e0ff */ /*0220*/ STG.E.U8 [R14.64+0x6], R23 ; /* 0x000006170e007986 */ /* 0x004fe8000c101104 */ /*0230*/ LDG.E.U8 R5, [R12.64+0x7] ; /* 0x000007040c057981 */ /* 0x002ea2000c1e1100 */ /*0240*/ LEA.HI.X.SX32 R9, R9, c[0x0][0x164], 0x1, P0 ; /* 0x0000590009097a11 */ /* 0x000fe400000f0eff */ /*0250*/ IADD3 R11, R3, 0x8, RZ ; /* 0x00000008030b7810 */ /* 0x000fc80007ffe0ff */ /*0260*/ IADD3 R10, P0, R11.reuse, R4, RZ ; /* 0x000000040b0a7210 */ /* 0x040fe20007f1e0ff */ /*0270*/ STG.E.U8 [R14.64+0x7], R5 ; /* 0x000007050e007986 */ /* 0x0041e8000c101104 */ /*0280*/ LDG.E.U8 R17, [R8.64] ; /* 0x0000000408117981 */ /* 0x008ea2000c1e1100 */ /*0290*/ LEA.HI.X.SX32 R11, R11, R6, 0x1, P0 ; /* 0x000000060b0b7211 */ /* 0x000fca00000f0eff */ /*02a0*/ STG.E.U8 [R10.64], R17 ; /* 0x000000110a007986 */ /* 0x0043e8000c101104 */ /*02b0*/ LDG.E.U8 R19, [R8.64+0x1] ; /* 0x0000010408137981 */ /* 0x010ea8000c1e1100 */ /*02c0*/ STG.E.U8 [R10.64+0x1], R19 ; /* 0x000001130a007986 */ /* 0x0045e8000c101104 */ /*02d0*/ LDG.E.U8 R13, [R8.64+0x2] ; /* 0x00000204080d7981 */ /* 0x000ee8000c1e1100 */ /*02e0*/ STG.E.U8 [R10.64+0x2], R13 ; /* 0x0000020d0a007986 */ /* 0x0087e8000c101104 */ /*02f0*/ LDG.E.U8 R21, [R8.64+0x3] ; /* 0x0000030408157981 */ /* 0x020f28000c1e1100 */ /*0300*/ STG.E.U8 [R10.64+0x3], R21 ; /* 0x000003150a007986 */ /* 0x010fe8000c101104 */ /*0310*/ LDG.E.U8 R5, [R8.64+0x4] ; /* 0x0000040408057981 */ /* 0x001f28000c1e1100 */ /*0320*/ STG.E.U8 [R10.64+0x4], R5 ; /* 0x000004050a007986 */ /* 0x0101e8000c101104 */ /*0330*/ LDG.E.U8 R23, [R8.64+0x5] ; /* 0x0000050408177981 */ /* 0x000f28000c1e1100 */ /*0340*/ STG.E.U8 [R10.64+0x5], R23 ; /* 0x000005170a007986 */ /* 0x010fe8000c101104 */ /*0350*/ LDG.E.U8 R17, [R8.64+0x6] ; /* 0x0000060408117981 */ /* 0x002f22000c1e1100 */ /*0360*/ IADD3 R14, R7, 0x10, RZ ; /* 0x00000010070e7810 */ /* 0x000fc80007ffe0ff */ /*0370*/ IADD3 R12, P0, R14.reuse, c[0x0][0x160], RZ ; /* 0x000058000e0c7a10 */ /* 0x040fe20007f1e0ff */ /*0380*/ STG.E.U8 [R10.64+0x6], R17 ; /* 0x000006110a007986 */ /* 0x0103e8000c101104 */ /*0390*/ LDG.E.U8 R19, [R8.64+0x7] ; /* 0x0000070408137981 */ /* 0x004ea2000c1e1100 */ /*03a0*/ LEA.HI.X.SX32 R13, R14, c[0x0][0x164], 0x1, P0 ; /* 0x000059000e0d7a11 */ /* 0x008fe400000f0eff */ /*03b0*/ IADD3 R5, R3, 0x10, RZ ; /* 0x0000001003057810 */ /* 0x001fc80007ffe0ff */ /*03c0*/ IADD3 R14, P0, R5.reuse, R4, RZ ; /* 0x00000004050e7210 */ /* 0x040fe20007f1e0ff */ /*03d0*/ STG.E.U8 [R10.64+0x7], R19 ; /* 0x000007130a007986 */ /* 0x0041e8000c101104 */ /*03e0*/ LDG.E.U8 R21, [R12.64] ; /* 0x000000040c157981 */ /* 0x000ea2000c1e1100 */ /*03f0*/ LEA.HI.X.SX32 R15, R5, R6, 0x1, P0 ; /* 0x00000006050f7211 */ /* 0x000fca00000f0eff */ /*0400*/ STG.E.U8 [R14.64], R21 ; /* 0x000000150e007986 */ /* 0x0045e8000c101104 */ /*0410*/ LDG.E.U8 R5, [R12.64+0x1] ; /* 0x000001040c057981 */ /* 0x000ee8000c1e1100 */ /*0420*/ STG.E.U8 [R14.64+0x1], R5 ; /* 0x000001050e007986 */ /* 0x0087e8000c101104 */ /*0430*/ LDG.E.U8 R9, [R12.64+0x2] ; /* 0x000002040c097981 */ /* 0x000f28000c1e1100 */ /*0440*/ STG.E.U8 [R14.64+0x2], R9 ; /* 0x000002090e007986 */ /* 0x0109e8000c101104 */ /*0450*/ LDG.E.U8 R17, [R12.64+0x3] ; /* 0x000003040c117981 */ /* 0x002f68000c1e1100 */ /*0460*/ STG.E.U8 [R14.64+0x3], R17 ; /* 0x000003110e007986 */ /* 0x020fe8000c101104 */ /*0470*/ LDG.E.U8 R11, [R12.64+0x4] ; /* 0x000004040c0b7981 */ /* 0x001f68000c1e1100 */ /*0480*/ STG.E.U8 [R14.64+0x4], R11 ; /* 0x0000040b0e007986 */ /* 0x0201e8000c101104 */ /*0490*/ LDG.E.U8 R19, [R12.64+0x5] ; /* 0x000005040c137981 */ /* 0x000f68000c1e1100 */ /*04a0*/ STG.E.U8 [R14.64+0x5], R19 ; /* 0x000005130e007986 */ /* 0x0203e8000c101104 */ /*04b0*/ LDG.E.U8 R21, [R12.64+0x6] ; /* 0x000006040c157981 */ /* 0x004ea2000c1e1100 */ /*04c0*/ IADD3 R10, R7, 0x18, RZ ; /* 0x00000018070a7810 */ /* 0x000fc80007ffe0ff */ /*04d0*/ IADD3 R8, P0, R10.reuse, c[0x0][0x160], RZ ; /* 0x000058000a087a10 */ /* 0x040fe20007f1e0ff */ /*04e0*/ STG.E.U8 [R14.64+0x6], R21 ; /* 0x000006150e007986 */ /* 0x0045e8000c101104 */ /*04f0*/ LDG.E.U8 R5, [R12.64+0x7] ; /* 0x000007040c057981 */ /* 0x008ee2000c1e1100 */ /*0500*/ LEA.HI.X.SX32 R9, R10, c[0x0][0x164], 0x1, P0 ; /* 0x000059000a097a11 */ /* 0x010fe400000f0eff */ /*0510*/ IADD3 R11, R3, 0x18, RZ ; /* 0x00000018030b7810 */ /* 0x001fc80007ffe0ff */ /*0520*/ IADD3 R10, P0, R11.reuse, R4, RZ ; /* 0x000000040b0a7210 */ /* 0x040fe20007f1e0ff */ /*0530*/ STG.E.U8 [R14.64+0x7], R5 ; /* 0x000007050e007986 */ /* 0x0081e8000c101104 */ /*0540*/ LDG.E.U8 R17, [R8.64] ; /* 0x0000000408117981 */ /* 0x000ee2000c1e1100 */ /*0550*/ LEA.HI.X.SX32 R11, R11, R6, 0x1, P0 ; /* 0x000000060b0b7211 */ /* 0x000fca00000f0eff */ /*0560*/ STG.E.U8 [R10.64], R17 ; /* 0x000000110a007986 */ /* 0x0087e8000c101104 */ /*0570*/ LDG.E.U8 R19, [R8.64+0x1] ; /* 0x0000010408137981 */ /* 0x002f28000c1e1100 */ /*0580*/ STG.E.U8 [R10.64+0x1], R19 ; /* 0x000001130a007986 */ /* 0x0103e8000c101104 */ /*0590*/ LDG.E.U8 R13, [R8.64+0x2] ; /* 0x00000204080d7981 */ /* 0x000f28000c1e1100 */ /*05a0*/ STG.E.U8 [R10.64+0x2], R13 ; /* 0x0000020d0a007986 */ /* 0x0109e8000c101104 */ /*05b0*/ LDG.E.U8 R21, [R8.64+0x3] ; /* 0x0000030408157981 */ /* 0x004ea8000c1e1100 */ /*05c0*/ STG.E.U8 [R10.64+0x3], R21 ; /* 0x000003150a007986 */ /* 0x004fe8000c101104 */ /*05d0*/ LDG.E.U8 R5, [R8.64+0x4] ; /* 0x0000040408057981 */ /* 0x001ea8000c1e1100 */ /*05e0*/ STG.E.U8 [R10.64+0x4], R5 ; /* 0x000004050a007986 */ /* 0x0041e8000c101104 */ /*05f0*/ LDG.E.U8 R15, [R8.64+0x5] ; /* 0x00000504080f7981 */ /* 0x000ea8000c1e1100 */ /*0600*/ STG.E.U8 [R10.64+0x5], R15 ; /* 0x0000050f0a007986 */ /* 0x0045e8000c101104 */ /*0610*/ LDG.E.U8 R17, [R8.64+0x6] ; /* 0x0000060408117981 */ /* 0x008ee2000c1e1100 */ /*0620*/ IADD3 R7, R7, 0x20, RZ ; /* 0x0000002007077810 */ /* 0x000fc80007ffe0ff */ /*0630*/ IADD3 R12, P0, R7.reuse, c[0x0][0x160], RZ ; /* 0x00005800070c7a10 */ /* 0x040fe20007f1e0ff */ /*0640*/ STG.E.U8 [R10.64+0x6], R17 ; /* 0x000006110a007986 */ /* 0x0087e8000c101104 */ /*0650*/ LDG.E.U8 R19, [R8.64+0x7] ; /* 0x0000070408137981 */ /* 0x002f62000c1e1100 */ /*0660*/ LEA.HI.X.SX32 R13, R7, c[0x0][0x164], 0x1, P0 ; /* 0x00005900070d7a11 */ /* 0x010fe400000f0eff */ /*0670*/ IADD3 R5, R3, 0x20, RZ ; /* 0x0000002003057810 */ /* 0x001fc80007ffe0ff */ /*0680*/ IADD3 R4, P0, R5.reuse, R4, RZ ; /* 0x0000000405047210 */ /* 0x040fe20007f1e0ff */ /*0690*/ STG.E.U8 [R10.64+0x7], R19 ; /* 0x000007130a007986 */ /* 0x0201e8000c101104 */ /*06a0*/ LDG.E.U8 R7, [R12.64] ; /* 0x000000040c077981 */ /* 0x000f22000c1e1100 */ /*06b0*/ LEA.HI.X.SX32 R5, R5, R6, 0x1, P0 ; /* 0x0000000605057211 */ /* 0x000fca00000f0eff */ /*06c0*/ STG.E.U8 [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x0103e8000c101104 */ /*06d0*/ LDG.E.U8 R15, [R12.64+0x1] ; /* 0x000001040c0f7981 */ /* 0x004ea8000c1e1100 */ /*06e0*/ STG.E.U8 [R4.64+0x1], R15 ; /* 0x0000010f04007986 */ /* 0x0045e8000c101104 */ /*06f0*/ LDG.E.U8 R9, [R12.64+0x2] ; /* 0x000002040c097981 */ /* 0x000f28000c1e1100 */ /*0700*/ STG.E.U8 [R4.64+0x2], R9 ; /* 0x0000020904007986 */ /* 0x0109e8000c101104 */ /*0710*/ LDG.E.U8 R17, [R12.64+0x3] ; /* 0x000003040c117981 */ /* 0x008ee8000c1e1100 */ /*0720*/ STG.E.U8 [R4.64+0x3], R17 ; /* 0x0000031104007986 */ /* 0x0089e8000c101104 */ /*0730*/ LDG.E.U8 R11, [R12.64+0x4] ; /* 0x000004040c0b7981 */ /* 0x001ee8000c1e1100 */ /*0740*/ STG.E.U8 [R4.64+0x4], R11 ; /* 0x0000040b04007986 */ /* 0x0089e8000c101104 */ /*0750*/ LDG.E.U8 R19, [R12.64+0x5] ; /* 0x000005040c137981 */ /* 0x000ee8000c1e1100 */ /*0760*/ STG.E.U8 [R4.64+0x5], R19 ; /* 0x0000051304007986 */ /* 0x0089e8000c101104 */ /*0770*/ LDG.E.U8 R7, [R12.64+0x6] ; /* 0x000006040c077981 */ /* 0x002ee2000c1e1100 */ /*0780*/ IADD3 R3, R3, 0x28, RZ ; /* 0x0000002803037810 */ /* 0x000fc80007ffe0ff */ /*0790*/ ISETP.NE.AND P0, PT, R3, 0x3e8, PT ; /* 0x000003e80300780c */ /* 0x000fe20003f05270 */ /*07a0*/ STG.E.U8 [R4.64+0x6], R7 ; /* 0x0000060704007986 */ /* 0x0089e8000c101104 */ /*07b0*/ LDG.E.U8 R15, [R12.64+0x7] ; /* 0x000007040c0f7981 */ /* 0x004ea8000c1e1100 */ /*07c0*/ STG.E.U8 [R4.64+0x7], R15 ; /* 0x0000070f04007986 */ /* 0x0049e8000c101104 */ /*07d0*/ @P0 BRA 0xa0 ; /* 0xfffff8c000000947 */ /* 0x000fea000383ffff */ /*07e0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fc80007ffe0ff */ /*07f0*/ ISETP.GE.U32.AND P0, PT, R0, 0x100, PT ; /* 0x000001000000780c */ /* 0x000fda0003f06070 */ /*0800*/ @!P0 BRA 0x30 ; /* 0xfffff82000008947 */ /* 0x000fea000383ffff */ /*0810*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe400078e00ff */ /*0820*/ IMAD.MOV.U32 R3, RZ, RZ, 0x8 ; /* 0x00000008ff037424 */ /* 0x002fc800078e00ff */ /*0830*/ IMAD.WIDE R8, R0, R3, c[0x4][0x10] ; /* 0x0100040000087625 */ /* 0x010fc800078e0203 */ /*0840*/ IMAD.WIDE R10, R0.reuse, R3, c[0x4][0x18] ; /* 0x01000600000a7625 */ /* 0x040fe400078e0203 */ /*0850*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000f68000c1e1b00 */ /*0860*/ LDG.E.64 R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000f62000c1e1b00 */ /*0870*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3e8 ; /* 0x000003e8ff057424 */ /* 0x000fe400078e00ff */ /*0880*/ IMAD.MOV.U32 R7, RZ, RZ, 0x1f40 ; /* 0x00001f40ff077424 */ /* 0x001fe400078e00ff */ /*0890*/ IMAD.WIDE R4, R0, R5, c[0x4][0xd0] ; /* 0x0100340000047625 */ /* 0x000fc800078e0205 */ /*08a0*/ IMAD.WIDE R6, R0, R7, c[0x4][0x20] ; /* 0x0100080000067625 */ /* 0x000fe200078e0207 */ /*08b0*/ IADD3 R4, P0, R4, 0x3, RZ ; /* 0x0000000304047810 */ /* 0x000fc60007f1e0ff */ /*08c0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fe200078e00ff */ /*08d0*/ IADD3 R14, P1, R6, 0x20, RZ ; /* 0x00000020060e7810 */ /* 0x000fe20007f3e0ff */ /*08e0*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */ /* 0x000fc800000e0605 */ /*08f0*/ IMAD.X R15, RZ, RZ, R7, P1 ; /* 0x000000ffff0f7224 */ /* 0x000fe400008e0607 */ /*0900*/ LDG.E.U8 R16, [R4.64+-0x3] ; /* 0xfffffd0404107981 */ /* 0x000ea2000c1e1100 */ /*0910*/ DMUL R10, R10, c[0x2][0x8] ; /* 0x008002000a0a7a28 */ /* 0x021e080000000000 */ /*0920*/ DMUL R8, R8, c[0x2][0x0] ; /* 0x0080000008087a28 */ /* 0x000e480000000000 */ /*0930*/ DADD R12, R10, 1 ; /* 0x3ff000000a0c7429 */ /* 0x001e080000000000 */ /*0940*/ DADD R6, R8, 1 ; /* 0x3ff0000008067429 */ /* 0x002e620000000000 */ /*0950*/ ISETP.NE.AND P0, PT, R16, 0x1, PT ; /* 0x000000011000780c */ /* 0x004fca0003f05270 */ /*0960*/ FSEL R10, R12, R10, !P0 ; /* 0x0000000a0c0a7208 */ /* 0x001fe40004000000 */ /*0970*/ FSEL R11, R13, R11, !P0 ; /* 0x0000000b0d0b7208 */ /* 0x000fe40004000000 */ /*0980*/ FSEL R8, R6, R8, !P0 ; /* 0x0000000806087208 */ /* 0x002fe20004000000 */ /*0990*/ IMAD.MOV.U32 R6, RZ, RZ, R14 ; /* 0x000000ffff067224 */ /* 0x000fe200078e000e */ /*09a0*/ FSEL R9, R7, R9, !P0 ; /* 0x0000000907097208 */ /* 0x000fe20004000000 */ /*09b0*/ IMAD.MOV.U32 R7, RZ, RZ, R15 ; /* 0x000000ffff077224 */ /* 0x000fca00078e000f */ /*09c0*/ DADD R12, -R10, R8 ; /* 0x000000000a0c7229 */ /* 0x000e0e0000000108 */ /*09d0*/ STG.E.64 [R6.64+-0x20], R12 ; /* 0xffffe00c06007986 */ /* 0x0011e8000c101b04 */ /*09e0*/ LDG.E.U8 R18, [R4.64+-0x2] ; /* 0xfffffe0404127981 */ /* 0x000ea2000c1e1100 */ /*09f0*/ DMUL R10, R10, c[0x2][0x8] ; /* 0x008002000a0a7a28 */ /* 0x000e480000000000 */ /*0a00*/ DMUL R8, R8, c[0x2][0x0] ; /* 0x0080000008087a28 */ /* 0x000ec80000000000 */ /*0a10*/ DADD R16, R10, 1 ; /* 0x3ff000000a107429 */ /* 0x002e480000000000 */ /*0a20*/ DADD R14, R8, 1 ; /* 0x3ff00000080e7429 */ /* 0x008ee20000000000 */ /*0a30*/ ISETP.NE.AND P0, PT, R18, 0x1, PT ; /* 0x000000011200780c */ /* 0x004fca0003f05270 */ /*0a40*/ FSEL R10, R16, R10, !P0 ; /* 0x0000000a100a7208 */ /* 0x002fe40004000000 */ /*0a50*/ FSEL R11, R17, R11, !P0 ; /* 0x0000000b110b7208 */ /* 0x000fe40004000000 */ /*0a60*/ FSEL R8, R14, R8, !P0 ; /* 0x000000080e087208 */ /* 0x008fe40004000000 */ /*0a70*/ FSEL R9, R15, R9, !P0 ; /* 0x000000090f097208 */ /* 0x000fcc0004000000 */ /*0a80*/ DADD R12, -R10, R8 ; /* 0x000000000a0c7229 */ /* 0x001e0e0000000108 */ /*0a90*/ STG.E.64 [R6.64+-0x18], R12 ; /* 0xffffe80c06007986 */ /* 0x0011e8000c101b04 */ /*0aa0*/ LDG.E.U8 R18, [R4.64+-0x1] ; /* 0xffffff0404127981 */ /* 0x000ea2000c1e1100 */ /*0ab0*/ DMUL R10, R10, c[0x2][0x8] ; /* 0x008002000a0a7a28 */ /* 0x000e480000000000 */ /*0ac0*/ DMUL R8, R8, c[0x2][0x0] ; /* 0x0080000008087a28 */ /* 0x000ec80000000000 */ /*0ad0*/ DADD R16, R10, 1 ; /* 0x3ff000000a107429 */ /* 0x002e480000000000 */ /*0ae0*/ DADD R14, R8, 1 ; /* 0x3ff00000080e7429 */ /* 0x008ee20000000000 */ /*0af0*/ ISETP.NE.AND P0, PT, R18, 0x1, PT ; /* 0x000000011200780c */ /* 0x004fca0003f05270 */ /*0b00*/ FSEL R10, R16, R10, !P0 ; /* 0x0000000a100a7208 */ /* 0x002fe40004000000 */ /*0b10*/ FSEL R11, R17, R11, !P0 ; /* 0x0000000b110b7208 */ /* 0x000fe40004000000 */ /*0b20*/ FSEL R8, R14, R8, !P0 ; /* 0x000000080e087208 */ /* 0x008fe40004000000 */ /*0b30*/ FSEL R9, R15, R9, !P0 ; /* 0x000000090f097208 */ /* 0x000fcc0004000000 */ /*0b40*/ DADD R12, -R10, R8 ; /* 0x000000000a0c7229 */ /* 0x001e0e0000000108 */ /*0b50*/ STG.E.64 [R6.64+-0x10], R12 ; /* 0xfffff00c06007986 */ /* 0x0011e8000c101b04 */ /*0b60*/ LDG.E.U8 R18, [R4.64] ; /* 0x0000000404127981 */ /* 0x000ea2000c1e1100 */ /*0b70*/ DMUL R10, R10, c[0x2][0x8] ; /* 0x008002000a0a7a28 */ /* 0x000e480000000000 */ /*0b80*/ DMUL R8, R8, c[0x2][0x0] ; /* 0x0080000008087a28 */ /* 0x000ec80000000000 */ /*0b90*/ DADD R16, R10, 1 ; /* 0x3ff000000a107429 */ /* 0x002e480000000000 */ /*0ba0*/ DADD R14, R8, 1 ; /* 0x3ff00000080e7429 */ /* 0x008ee20000000000 */ /*0bb0*/ ISETP.NE.AND P0, PT, R18, 0x1, PT ; /* 0x000000011200780c */ /* 0x004fca0003f05270 */ /*0bc0*/ FSEL R10, R16, R10, !P0 ; /* 0x0000000a100a7208 */ /* 0x002fe40004000000 */ /*0bd0*/ FSEL R11, R17, R11, !P0 ; /* 0x0000000b110b7208 */ /* 0x000fe40004000000 */ /*0be0*/ FSEL R8, R14, R8, !P0 ; /* 0x000000080e087208 */ /* 0x008fe40004000000 */ /*0bf0*/ FSEL R9, R15, R9, !P0 ; /* 0x000000090f097208 */ /* 0x000fcc0004000000 */ /*0c00*/ DADD R12, -R10, R8 ; /* 0x000000000a0c7229 */ /* 0x001e0e0000000108 */ /*0c10*/ STG.E.64 [R6.64+-0x8], R12 ; /* 0xfffff80c06007986 */ /* 0x0011e8000c101b04 */ /*0c20*/ LDG.E.U8 R18, [R4.64+0x1] ; /* 0x0000010404127981 */ /* 0x000ea2000c1e1100 */ /*0c30*/ DMUL R10, R10, c[0x2][0x8] ; /* 0x008002000a0a7a28 */ /* 0x000e480000000000 */ /*0c40*/ DMUL R8, R8, c[0x2][0x0] ; /* 0x0080000008087a28 */ /* 0x000ec80000000000 */ /*0c50*/ DADD R16, R10, 1 ; /* 0x3ff000000a107429 */ /* 0x002e480000000000 */ /*0c60*/ DADD R14, R8, 1 ; /* 0x3ff00000080e7429 */ /* 0x008ee20000000000 */ /*0c70*/ ISETP.NE.AND P0, PT, R18, 0x1, PT ; /* 0x000000011200780c */ /* 0x004fca0003f05270 */ /*0c80*/ FSEL R10, R16, R10, !P0 ; /* 0x0000000a100a7208 */ /* 0x002fe40004000000 */ /*0c90*/ FSEL R11, R17, R11, !P0 ; /* 0x0000000b110b7208 */ /* 0x000fe40004000000 */ /*0ca0*/ FSEL R8, R14, R8, !P0 ; /* 0x000000080e087208 */ /* 0x008fe40004000000 */ /*0cb0*/ FSEL R9, R15, R9, !P0 ; /* 0x000000090f097208 */ /* 0x000fcc0004000000 */ /*0cc0*/ DADD R12, -R10, R8 ; /* 0x000000000a0c7229 */ /* 0x001e0e0000000108 */ /*0cd0*/ STG.E.64 [R6.64], R12 ; /* 0x0000000c06007986 */ /* 0x0011e8000c101b04 */ /*0ce0*/ LDG.E.U8 R18, [R4.64+0x2] ; /* 0x0000020404127981 */ /* 0x000ea2000c1e1100 */ /*0cf0*/ DMUL R10, R10, c[0x2][0x8] ; /* 0x008002000a0a7a28 */ /* 0x000e480000000000 */ /*0d00*/ DMUL R8, R8, c[0x2][0x0] ; /* 0x0080000008087a28 */ /* 0x000ec80000000000 */ /*0d10*/ DADD R16, R10, 1 ; /* 0x3ff000000a107429 */ /* 0x002e480000000000 */ /*0d20*/ DADD R14, R8, 1 ; /* 0x3ff00000080e7429 */ /* 0x008ee20000000000 */ /*0d30*/ ISETP.NE.AND P0, PT, R18, 0x1, PT ; /* 0x000000011200780c */ /* 0x004fca0003f05270 */ /*0d40*/ FSEL R10, R16, R10, !P0 ; /* 0x0000000a100a7208 */ /* 0x002fe40004000000 */ /*0d50*/ FSEL R11, R17, R11, !P0 ; /* 0x0000000b110b7208 */ /* 0x000fe40004000000 */ /*0d60*/ FSEL R8, R14, R8, !P0 ; /* 0x000000080e087208 */ /* 0x008fe40004000000 */ /*0d70*/ FSEL R9, R15, R9, !P0 ; /* 0x000000090f097208 */ /* 0x000fcc0004000000 */ /*0d80*/ DADD R12, -R10, R8 ; /* 0x000000000a0c7229 */ /* 0x001e0e0000000108 */ /*0d90*/ STG.E.64 [R6.64+0x8], R12 ; /* 0x0000080c06007986 */ /* 0x0011e8000c101b04 */ /*0da0*/ LDG.E.U8 R18, [R4.64+0x3] ; /* 0x0000030404127981 */ /* 0x000ea2000c1e1100 */ /*0db0*/ DMUL R10, R10, c[0x2][0x8] ; /* 0x008002000a0a7a28 */ /* 0x000e480000000000 */ /*0dc0*/ DMUL R8, R8, c[0x2][0x0] ; /* 0x0080000008087a28 */ /* 0x000ec80000000000 */ /*0dd0*/ DADD R16, R10, 1 ; /* 0x3ff000000a107429 */ /* 0x002e480000000000 */ /*0de0*/ DADD R14, R8, 1 ; /* 0x3ff00000080e7429 */ /* 0x008ee20000000000 */ /*0df0*/ ISETP.NE.AND P0, PT, R18, 0x1, PT ; /* 0x000000011200780c */ /* 0x004fca0003f05270 */ /*0e00*/ FSEL R10, R16, R10, !P0 ; /* 0x0000000a100a7208 */ /* 0x002fe40004000000 */ /*0e10*/ FSEL R11, R17, R11, !P0 ; /* 0x0000000b110b7208 */ /* 0x000fe40004000000 */ /*0e20*/ FSEL R8, R14, R8, !P0 ; /* 0x000000080e087208 */ /* 0x008fe40004000000 */ /*0e30*/ FSEL R9, R15, R9, !P0 ; /* 0x000000090f097208 */ /* 0x000fcc0004000000 */ /*0e40*/ DADD R12, -R10, R8 ; /* 0x000000000a0c7229 */ /* 0x001e0e0000000108 */ /*0e50*/ STG.E.64 [R6.64+0x10], R12 ; /* 0x0000100c06007986 */ /* 0x0011e8000c101b04 */ /*0e60*/ LDG.E.U8 R18, [R4.64+0x4] ; /* 0x0000040404127981 */ /* 0x0002a2000c1e1100 */ /*0e70*/ DMUL R10, R10, c[0x2][0x8] ; /* 0x008002000a0a7a28 */ /* 0x000ee20000000000 */ /*0e80*/ IADD3 R2, R2, 0x8, RZ ; /* 0x0000000802027810 */ /* 0x000fc60007ffe0ff */ /*0e90*/ DMUL R8, R8, c[0x2][0x0] ; /* 0x0080000008087a28 */ /* 0x000f080000000000 */ /*0ea0*/ DADD R16, R10, 1 ; /* 0x3ff000000a107429 */ /* 0x008ee20000000000 */ /*0eb0*/ IADD3 R4, P1, R4, 0x8, RZ ; /* 0x0000000804047810 */ /* 0x002fc60007f3e0ff */ /*0ec0*/ DADD R14, R8, 1 ; /* 0x3ff00000080e7429 */ /* 0x010e640000000000 */ /*0ed0*/ IMAD.X R5, RZ, RZ, R5, P1 ; /* 0x000000ffff057224 */ /* 0x000fe200008e0605 */ /*0ee0*/ ISETP.NE.AND P0, PT, R18, 0x1, PT ; /* 0x000000011200780c */ /* 0x004fc80003f05270 */ /*0ef0*/ FSEL R10, R16, R10, !P0 ; /* 0x0000000a100a7208 */ /* 0x008fe40004000000 */ /*0f00*/ FSEL R11, R17, R11, !P0 ; /* 0x0000000b110b7208 */ /* 0x000fe40004000000 */ /*0f10*/ FSEL R8, R14, R8, !P0 ; /* 0x000000080e087208 */ /* 0x002fe40004000000 */ /*0f20*/ FSEL R9, R15, R9, !P0 ; /* 0x000000090f097208 */ /* 0x000fe40004000000 */ /*0f30*/ ISETP.NE.AND P0, PT, R2, 0x3e8, PT ; /* 0x000003e80200780c */ /* 0x000fe40003f05270 */ /*0f40*/ IADD3 R14, P2, R6, 0x40, RZ ; /* 0x00000040060e7810 */ /* 0x000fc40007f5e0ff */ /*0f50*/ DADD R12, -R10, R8 ; /* 0x000000000a0c7229 */ /* 0x001e060000000108 */ /*0f60*/ IMAD.X R15, RZ, RZ, R7, P2 ; /* 0x000000ffff0f7224 */ /* 0x000fc800010e0607 */ /*0f70*/ STG.E.64 [R6.64+0x18], R12 ; /* 0x0000180c06007986 */ /* 0x0011e4000c101b04 */ /*0f80*/ @P0 BRA 0x900 ; /* 0xfffff97000000947 */ /* 0x000fea000383ffff */ /*0f90*/ IMAD.WIDE R4, R0, R3, c[0x4][0x10] ; /* 0x0100040000047625 */ /* 0x000fc800078e0203 */ /*0fa0*/ IMAD.WIDE R2, R0.reuse, R3, c[0x4][0x18] ; /* 0x0100060000027625 */ /* 0x040fe200078e0203 */ /*0fb0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fe20007ffe0ff */ /*0fc0*/ STG.E.64 [R4.64], R8 ; /* 0x0000000804007986 */ /* 0x0003e6000c101b04 */ /*0fd0*/ ISETP.GE.U32.AND P0, PT, R0, 0x100, PT ; /* 0x000001000000780c */ /* 0x000fe20003f06070 */ /*0fe0*/ STG.E.64 [R2.64], R10 ; /* 0x0000000a02007986 */ /* 0x0003d8000c101b04 */ /*0ff0*/ @!P0 BRA 0x820 ; /* 0xfffff82000008947 */ /* 0x000fea000383ffff */ /*1000*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1010*/ BRA 0x1010; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1020*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*10f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z14img_readKernelPi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0030*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x000fe20000000f00 */ /*0040*/ IMAD R2, R0, 0x311, RZ ; /* 0x0000031100027824 */ /* 0x000fc800078e02ff */ /*0050*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fca00078e0203 */ /*0060*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */ /* 0x000ea2000c1e1900 */ /*0070*/ IMAD.MOV.U32 R5, RZ, RZ, 0xc44 ; /* 0x00000c44ff057424 */ /* 0x010fc800078e00ff */ /*0080*/ IMAD.WIDE R4, R0, R5, c[0x4][0x0] ; /* 0x0100000000047625 */ /* 0x000fca00078e0205 */ /*0090*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x0041e8000c101904 */ /*00a0*/ LDG.E R9, [R2.64+0x4] ; /* 0x0000040402097981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ STG.E [R4.64+0x4], R9 ; /* 0x0000040904007986 */ /* 0x0043e8000c101904 */ /*00c0*/ LDG.E R11, [R2.64+0x8] ; /* 0x00000804020b7981 */ /* 0x000ea8000c1e1900 */ /*00d0*/ STG.E [R4.64+0x8], R11 ; /* 0x0000080b04007986 */ /* 0x0045e8000c101904 */ /*00e0*/ LDG.E R13, [R2.64+0xc] ; /* 0x00000c04020d7981 */ /* 0x000ee8000c1e1900 */ /*00f0*/ STG.E [R4.64+0xc], R13 ; /* 0x00000c0d04007986 */ /* 0x0085e8000c101904 */ /*0100*/ LDG.E R15, [R2.64+0x10] ; /* 0x00001004020f7981 */ /* 0x000ee2000c1e1900 */ /*0110*/ IADD3 R12, P1, R2, 0x10, RZ ; /* 0x00000010020c7810 */ /* 0x000fe20007f3e0ff */ /*0120*/ IMAD.MOV.U32 R6, RZ, RZ, 0x4 ; /* 0x00000004ff067424 */ /* 0x000fe200078e00ff */ /*0130*/ IADD3 R8, P3, R4, 0x10, RZ ; /* 0x0000001004087810 */ /* 0x000fc40007f7e0ff */ /*0140*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fe20007ffe0ff */ /*0150*/ IMAD.X R7, RZ, RZ, R3, P1 ; /* 0x000000ffff077224 */ /* 0x001fe200008e0603 */ /*0160*/ IADD3 R10, P2, R4, 0x18, RZ ; /* 0x00000018040a7810 */ /* 0x000fe20007f5e0ff */ /*0170*/ IMAD.X R9, RZ, RZ, R5, P3 ; /* 0x000000ffff097224 */ /* 0x002fe200018e0605 */ /*0180*/ ISETP.GE.U32.AND P0, PT, R0, 0xc350, PT ; /* 0x0000c3500000780c */ /* 0x000fe40003f06070 */ /*0190*/ IADD3.X R17, RZ, R5, RZ, P2, !PT ; /* 0x00000005ff117210 */ /* 0x000fe200017fe4ff */ /*01a0*/ STG.E [R4.64+0x10], R15 ; /* 0x0000100f04007986 */ /* 0x0085e8000c101904 */ /*01b0*/ MOV R2, R12 ; /* 0x0000000c00027202 */ /* 0x000fe20000000f00 */ /*01c0*/ IMAD.MOV.U32 R3, RZ, RZ, R7 ; /* 0x000000ffff037224 */ /* 0x000fca00078e0007 */ /*01d0*/ LDG.E R7, [R2.64+0x4] ; /* 0x0000040402077981 */ /* 0x000ee2000c1e1900 */ /*01e0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ; /* 0x000000ffff047224 */ /* 0x014fe200078e0008 */ /*01f0*/ MOV R5, R9 ; /* 0x0000000900057202 */ /* 0x000fca0000000f00 */ /*0200*/ STG.E [R4.64+0x4], R7 ; /* 0x0000040704007986 */ /* 0x008fe8000c101904 */ /*0210*/ LDG.E R9, [R2.64+0x8] ; /* 0x0000080402097981 */ /* 0x000ea8000c1e1900 */ /*0220*/ STG.E [R4.64+0x8], R9 ; /* 0x0000080904007986 */ /* 0x004fe8000c101904 */ /*0230*/ LDG.E R11, [R2.64+0xc] ; /* 0x00000c04020b7981 */ /* 0x000ea8000c1e1900 */ /*0240*/ STG.E [R4.64+0xc], R11 ; /* 0x00000c0b04007986 */ /* 0x0041e8000c101904 */ /*0250*/ LDG.E R13, [R2.64+0x10] ; /* 0x00001004020d7981 */ /* 0x000ea2000c1e1900 */ /*0260*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ; /* 0x000000ffff047224 */ /* 0x001fc400078e000a */ /*0270*/ IMAD.MOV.U32 R5, RZ, RZ, R17 ; /* 0x000000ffff057224 */ /* 0x000fca00078e0011 */ /*0280*/ STG.E [R4.64+0x8], R13 ; /* 0x0000080d04007986 */ /* 0x0041e8000c101904 */ /*0290*/ LDG.E R15, [R2.64+0x14] ; /* 0x00001404020f7981 */ /* 0x000ea8000c1e1900 */ /*02a0*/ STG.E [R4.64+0xc], R15 ; /* 0x00000c0f04007986 */ /* 0x0043e8000c101904 */ /*02b0*/ LDG.E R17, [R2.64+0x18] ; /* 0x0000180402117981 */ /* 0x000ea8000c1e1900 */ /*02c0*/ STG.E [R4.64+0x10], R17 ; /* 0x0000101104007986 */ /* 0x0045e8000c101904 */ /*02d0*/ LDG.E R7, [R2.64+0x1c] ; /* 0x00001c0402077981 */ /* 0x000ee8000c1e1900 */ /*02e0*/ STG.E [R4.64+0x14], R7 ; /* 0x0000140704007986 */ /* 0x0087e8000c101904 */ /*02f0*/ LDG.E R9, [R2.64+0x20] ; /* 0x0000200402097981 */ /* 0x000f28000c1e1900 */ /*0300*/ STG.E [R4.64+0x18], R9 ; /* 0x0000180904007986 */ /* 0x0109e8000c101904 */ /*0310*/ LDG.E R11, [R2.64+0x24] ; /* 0x00002404020b7981 */ /* 0x000f68000c1e1900 */ /*0320*/ STG.E [R4.64+0x1c], R11 ; /* 0x00001c0b04007986 */ /* 0x020be8000c101904 */ /*0330*/ LDG.E R13, [R2.64+0x28] ; /* 0x00002804020d7981 */ /* 0x001ea8000c1e1900 */ /*0340*/ STG.E [R4.64+0x20], R13 ; /* 0x0000200d04007986 */ /* 0x0041e8000c101904 */ /*0350*/ LDG.E R15, [R2.64+0x2c] ; /* 0x00002c04020f7981 */ /* 0x002ea8000c1e1900 */ /*0360*/ STG.E [R4.64+0x24], R15 ; /* 0x0000240f04007986 */ /* 0x0043e8000c101904 */ /*0370*/ LDG.E R17, [R2.64+0x30] ; /* 0x0000300402117981 */ /* 0x000ea8000c1e1900 */ /*0380*/ STG.E [R4.64+0x28], R17 ; /* 0x0000281104007986 */ /* 0x0045e8000c101904 */ /*0390*/ LDG.E R7, [R2.64+0x34] ; /* 0x0000340402077981 */ /* 0x008ee8000c1e1900 */ /*03a0*/ STG.E [R4.64+0x2c], R7 ; /* 0x00002c0704007986 */ /* 0x0087e8000c101904 */ /*03b0*/ LDG.E R9, [R2.64+0x38] ; /* 0x0000380402097981 */ /* 0x010f28000c1e1900 */ /*03c0*/ STG.E [R4.64+0x30], R9 ; /* 0x0000300904007986 */ /* 0x0109e8000c101904 */ /*03d0*/ LDG.E R11, [R2.64+0x3c] ; /* 0x00003c04020b7981 */ /* 0x020f68000c1e1900 */ /*03e0*/ STG.E [R4.64+0x34], R11 ; /* 0x0000340b04007986 */ /* 0x020be8000c101904 */ /*03f0*/ LDG.E R13, [R2.64+0x40] ; /* 0x00004004020d7981 */ /* 0x001ea8000c1e1900 */ /*0400*/ STG.E [R4.64+0x38], R13 ; /* 0x0000380d04007986 */ /* 0x0041e8000c101904 */ /*0410*/ LDG.E R15, [R2.64+0x44] ; /* 0x00004404020f7981 */ /* 0x002ea8000c1e1900 */ /*0420*/ STG.E [R4.64+0x3c], R15 ; /* 0x00003c0f04007986 */ /* 0x0043e8000c101904 */ /*0430*/ LDG.E R17, [R2.64+0x48] ; /* 0x0000480402117981 */ /* 0x000ea8000c1e1900 */ /*0440*/ STG.E [R4.64+0x40], R17 ; /* 0x0000401104007986 */ /* 0x0045e8000c101904 */ /*0450*/ LDG.E R7, [R2.64+0x4c] ; /* 0x00004c0402077981 */ /* 0x008ee8000c1e1900 */ /*0460*/ STG.E [R4.64+0x44], R7 ; /* 0x0000440704007986 */ /* 0x0087e8000c101904 */ /*0470*/ LDG.E R9, [R2.64+0x50] ; /* 0x0000500402097981 */ /* 0x010f28000c1e1900 */ /*0480*/ STG.E [R4.64+0x48], R9 ; /* 0x0000480904007986 */ /* 0x0109e8000c101904 */ /*0490*/ LDG.E R11, [R2.64+0x54] ; /* 0x00005404020b7981 */ /* 0x020f68000c1e1900 */ /*04a0*/ STG.E [R4.64+0x4c], R11 ; /* 0x00004c0b04007986 */ /* 0x020be8000c101904 */ /*04b0*/ LDG.E R13, [R2.64+0x58] ; /* 0x00005804020d7981 */ /* 0x001ea8000c1e1900 */ /*04c0*/ STG.E [R4.64+0x50], R13 ; /* 0x0000500d04007986 */ /* 0x0041e8000c101904 */ /*04d0*/ LDG.E R15, [R2.64+0x5c] ; /* 0x00005c04020f7981 */ /* 0x002ea8000c1e1900 */ /*04e0*/ STG.E [R4.64+0x54], R15 ; /* 0x0000540f04007986 */ /* 0x0043e8000c101904 */ /*04f0*/ LDG.E R17, [R2.64+0x60] ; /* 0x0000600402117981 */ /* 0x000ea8000c1e1900 */ /*0500*/ STG.E [R4.64+0x58], R17 ; /* 0x0000581104007986 */ /* 0x0045e8000c101904 */ /*0510*/ LDG.E R7, [R2.64+0x64] ; /* 0x0000640402077981 */ /* 0x008ee8000c1e1900 */ /*0520*/ STG.E [R4.64+0x5c], R7 ; /* 0x00005c0704007986 */ /* 0x0087e8000c101904 */ /*0530*/ LDG.E R9, [R2.64+0x68] ; /* 0x0000680402097981 */ /* 0x010f28000c1e1900 */ /*0540*/ STG.E [R4.64+0x60], R9 ; /* 0x0000600904007986 */ /* 0x0109e8000c101904 */ /*0550*/ LDG.E R11, [R2.64+0x6c] ; /* 0x00006c04020b7981 */ /* 0x020f68000c1e1900 */ /*0560*/ STG.E [R4.64+0x64], R11 ; /* 0x0000640b04007986 */ /* 0x020be8000c101904 */ /*0570*/ LDG.E R13, [R2.64+0x70] ; /* 0x00007004020d7981 */ /* 0x001ea8000c1e1900 */ /*0580*/ STG.E [R4.64+0x68], R13 ; /* 0x0000680d04007986 */ /* 0x0041e8000c101904 */ /*0590*/ LDG.E R15, [R2.64+0x74] ; /* 0x00007404020f7981 */ /* 0x002ea8000c1e1900 */ /*05a0*/ STG.E [R4.64+0x6c], R15 ; /* 0x00006c0f04007986 */ /* 0x0043e8000c101904 */ /*05b0*/ LDG.E R17, [R2.64+0x78] ; /* 0x0000780402117981 */ /* 0x000ea8000c1e1900 */ /*05c0*/ STG.E [R4.64+0x70], R17 ; /* 0x0000701104007986 */ /* 0x0045e8000c101904 */ /*05d0*/ LDG.E R7, [R2.64+0x7c] ; /* 0x00007c0402077981 */ /* 0x008ee8000c1e1900 */ /*05e0*/ STG.E [R4.64+0x74], R7 ; /* 0x0000740704007986 */ /* 0x0087e8000c101904 */ /*05f0*/ LDG.E R9, [R2.64+0x80] ; /* 0x0000800402097981 */ /* 0x010f28000c1e1900 */ /*0600*/ STG.E [R4.64+0x78], R9 ; /* 0x0000780904007986 */ /* 0x0109e8000c101904 */ /*0610*/ LDG.E R11, [R2.64+0x84] ; /* 0x00008404020b7981 */ /* 0x020f68000c1e1900 */ /*0620*/ STG.E [R4.64+0x7c], R11 ; /* 0x00007c0b04007986 */ /* 0x020be8000c101904 */ /*0630*/ LDG.E R13, [R2.64+0x88] ; /* 0x00008804020d7981 */ /* 0x001ea8000c1e1900 */ /*0640*/ STG.E [R4.64+0x80], R13 ; /* 0x0000800d04007986 */ /* 0x0041e8000c101904 */ /*0650*/ LDG.E R15, [R2.64+0x8c] ; /* 0x00008c04020f7981 */ /* 0x002ea8000c1e1900 */ /*0660*/ STG.E [R4.64+0x84], R15 ; /* 0x0000840f04007986 */ /* 0x0043e8000c101904 */ /*0670*/ LDG.E R17, [R2.64+0x90] ; /* 0x0000900402117981 */ /* 0x000ea8000c1e1900 */ /*0680*/ STG.E [R4.64+0x88], R17 ; /* 0x0000881104007986 */ /* 0x0045e8000c101904 */ /*0690*/ LDG.E R7, [R2.64+0x94] ; /* 0x0000940402077981 */ /* 0x008ee8000c1e1900 */ /*06a0*/ STG.E [R4.64+0x8c], R7 ; /* 0x00008c0704007986 */ /* 0x0087e8000c101904 */ /*06b0*/ LDG.E R9, [R2.64+0x98] ; /* 0x0000980402097981 */ /* 0x010f28000c1e1900 */ /*06c0*/ STG.E [R4.64+0x90], R9 ; /* 0x0000900904007986 */ /* 0x0109e8000c101904 */ /*06d0*/ LDG.E R11, [R2.64+0x9c] ; /* 0x00009c04020b7981 */ /* 0x020f68000c1e1900 */ /*06e0*/ STG.E [R4.64+0x94], R11 ; /* 0x0000940b04007986 */ /* 0x020be8000c101904 */ /*06f0*/ LDG.E R13, [R2.64+0xa0] ; /* 0x0000a004020d7981 */ /* 0x001ea8000c1e1900 */ /*0700*/ STG.E [R4.64+0x98], R13 ; /* 0x0000980d04007986 */ /* 0x0041e8000c101904 */ /*0710*/ LDG.E R15, [R2.64+0xa4] ; /* 0x0000a404020f7981 */ /* 0x002ea8000c1e1900 */ /*0720*/ STG.E [R4.64+0x9c], R15 ; /* 0x00009c0f04007986 */ /* 0x0043e8000c101904 */ /*0730*/ LDG.E R17, [R2.64+0xa8] ; /* 0x0000a80402117981 */ /* 0x000ea8000c1e1900 */ /*0740*/ STG.E [R4.64+0xa0], R17 ; /* 0x0000a01104007986 */ /* 0x0045e8000c101904 */ /*0750*/ LDG.E R7, [R2.64+0xac] ; /* 0x0000ac0402077981 */ /* 0x008ee8000c1e1900 */ /*0760*/ STG.E [R4.64+0xa4], R7 ; /* 0x0000a40704007986 */ /* 0x0087e8000c101904 */ /*0770*/ LDG.E R9, [R2.64+0xb0] ; /* 0x0000b00402097981 */ /* 0x010f28000c1e1900 */ /*0780*/ STG.E [R4.64+0xa8], R9 ; /* 0x0000a80904007986 */ /* 0x0109e8000c101904 */ /*0790*/ LDG.E R11, [R2.64+0xb4] ; /* 0x0000b404020b7981 */ /* 0x020f68000c1e1900 */ /*07a0*/ STG.E [R4.64+0xac], R11 ; /* 0x0000ac0b04007986 */ /* 0x020be8000c101904 */ /*07b0*/ LDG.E R13, [R2.64+0xb8] ; /* 0x0000b804020d7981 */ /* 0x001ea8000c1e1900 */ /*07c0*/ STG.E [R4.64+0xb0], R13 ; /* 0x0000b00d04007986 */ /* 0x0041e8000c101904 */ /*07d0*/ LDG.E R15, [R2.64+0xbc] ; /* 0x0000bc04020f7981 */ /* 0x002ea8000c1e1900 */ /*07e0*/ STG.E [R4.64+0xb4], R15 ; /* 0x0000b40f04007986 */ /* 0x0043e8000c101904 */ /*07f0*/ LDG.E R17, [R2.64+0xc0] ; /* 0x0000c00402117981 */ /* 0x000ea8000c1e1900 */ /*0800*/ STG.E [R4.64+0xb8], R17 ; /* 0x0000b81104007986 */ /* 0x0045e8000c101904 */ /*0810*/ LDG.E R7, [R2.64+0xc4] ; /* 0x0000c40402077981 */ /* 0x008ee8000c1e1900 */ /*0820*/ STG.E [R4.64+0xbc], R7 ; /* 0x0000bc0704007986 */ /* 0x0087e8000c101904 */ /*0830*/ LDG.E R9, [R2.64+0xc8] ; /* 0x0000c80402097981 */ /* 0x010f28000c1e1900 */ /*0840*/ STG.E [R4.64+0xc0], R9 ; /* 0x0000c00904007986 */ /* 0x0109e8000c101904 */ /*0850*/ LDG.E R11, [R2.64+0xcc] ; /* 0x0000cc04020b7981 */ /* 0x020f68000c1e1900 */ /*0860*/ STG.E [R4.64+0xc4], R11 ; /* 0x0000c40b04007986 */ /* 0x020be8000c101904 */ /*0870*/ LDG.E R13, [R2.64+0xd0] ; /* 0x0000d004020d7981 */ /* 0x001ea8000c1e1900 */ /*0880*/ STG.E [R4.64+0xc8], R13 ; /* 0x0000c80d04007986 */ /* 0x0041e8000c101904 */ /*0890*/ LDG.E R15, [R2.64+0xd4] ; /* 0x0000d404020f7981 */ /* 0x002ea8000c1e1900 */ /*08a0*/ STG.E [R4.64+0xcc], R15 ; /* 0x0000cc0f04007986 */ /* 0x004fe8000c101904 */ /*08b0*/ LDG.E R17, [R2.64+0xd8] ; /* 0x0000d80402117981 */ /* 0x000ea8000c1e1900 */ /*08c0*/ STG.E [R4.64+0xd0], R17 ; /* 0x0000d01104007986 */ /* 0x0043e8000c101904 */ /*08d0*/ LDG.E R19, [R2.64+0xdc] ; /* 0x0000dc0402137981 */ /* 0x000ea8000c1e1900 */ /*08e0*/ STG.E [R4.64+0xd4], R19 ; /* 0x0000d41304007986 */ /* 0x004fe8000c101904 */ /*08f0*/ LDG.E R21, [R2.64+0xe0] ; /* 0x0000e00402157981 */ /* 0x000ea8000c1e1900 */ /*0900*/ STG.E [R4.64+0xd8], R21 ; /* 0x0000d81504007986 */ /* 0x004fe8000c101904 */ /*0910*/ LDG.E R7, [R2.64+0xe4] ; /* 0x0000e40402077981 */ /* 0x008ea8000c1e1900 */ /*0920*/ STG.E [R4.64+0xdc], R7 ; /* 0x0000dc0704007986 */ /* 0x0045e8000c101904 */ /*0930*/ LDG.E R9, [R2.64+0xe8] ; /* 0x0000e80402097981 */ /* 0x010ee8000c1e1900 */ /*0940*/ STG.E [R4.64+0xe0], R9 ; /* 0x0000e00904007986 */ /* 0x0087e8000c101904 */ /*0950*/ LDG.E R11, [R2.64+0xec] ; /* 0x0000ec04020b7981 */ /* 0x020f22000c1e1900 */ /*0960*/ IADD3 R6, R6, 0x3c, RZ ; /* 0x0000003c06067810 */ /* 0x000fc80007ffe0ff */ /*0970*/ ISETP.NE.AND P1, PT, R6, 0x310, PT ; /* 0x000003100600780c */ /* 0x000fe20003f25270 */ /*0980*/ STG.E [R4.64+0xe4], R11 ; /* 0x0000e40b04007986 */ /* 0x0109e8000c101904 */ /*0990*/ LDG.E R13, [R2.64+0xf0] ; /* 0x0000f004020d7981 */ /* 0x001f62000c1e1900 */ /*09a0*/ IADD3 R10, P3, R4, 0xf0, RZ ; /* 0x000000f0040a7810 */ /* 0x000fe40007f7e0ff */ /*09b0*/ IADD3 R12, P2, R2, 0xf0, RZ ; /* 0x000000f0020c7810 */ /* 0x000fe40007f5e0ff */ /*09c0*/ IADD3 R8, P4, R4, 0xe8, RZ ; /* 0x000000e804087810 */ /* 0x000fe20007f9e0ff */ /*09d0*/ IMAD.X R17, RZ, RZ, R5, P3 ; /* 0x000000ffff117224 */ /* 0x002fe200018e0605 */ /*09e0*/ IADD3.X R7, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff077210 */ /* 0x004fc400017fe4ff */ /*09f0*/ IADD3.X R9, RZ, R5, RZ, P4, !PT ; /* 0x00000005ff097210 */ /* 0x008fe200027fe4ff */ /*0a00*/ STG.E [R4.64+0xe8], R13 ; /* 0x0000e80d04007986 */ /* 0x0209e2000c101904 */ /*0a10*/ @P1 BRA 0x1b0 ; /* 0xfffff79000001947 */ /* 0x000fea000383ffff */ /*0a20*/ @!P0 BRA 0x30 ; /* 0xfffff60000008947 */ /* 0x000fea000383ffff */ /*0a30*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0a40*/ BRA 0xa40; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0a50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0a90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0aa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ab0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ac0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ad0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ae0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0af0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
//2 layered neural network with LIF neurons //computing Vm in parallel, Computing Isyn //all-all connectivity between 2 layers //starting point of reading mnist set by 'start' #include <hip/hip_runtime.h> #include<stdio.h> #include<math.h> #include<time.h> #include<stdlib.h> #include "hip/hip_runtime_api.h" #define C 300E-12 #define gL 30E-9 #define VT 20E-3 #define EL -70E-3 #define Rp 3E-3 #define dt 1E-4 #define decay 0.9802 #define decays 0.9231 #define decay1 0.9048 #define WT 5E-9 #define w_lat -1.0E-9 //inhibitory lateral strength //num of neurons in layer 1 and layer 2 #define p 28 #define q 28 #define N_imgs 50000 #define N2 10 //no. of neurons in 2nd layer //Convolution parameters #define Nw 3 #define L (p-Nw+1) //square matrix #define N1 (12*L*L) //no. of neurons in 1st layer #define Nthrds 1024 //use max no. of threads available per SM #define Nsyns N1*N2 //no. of connections #define T 0.1 #define M 1000 //Training parameters: #define r 20.0E-11 //Learning Rate for 100ms #define max_epochs 20 //1 complete presentation of all images //Variables for image reading unsigned char *pix_spks_d; int *d_imgs_lin, img_lin[N_imgs*(p*q+1)]; int test_set[N_imgs][p*q+1]; __device__ int d_imgs[N_imgs][p*q+1]; __device__ double img_spks[p*q][M]; __device__ double syn1[256], syn1s[256], syn[256][M]; __device__ unsigned char in_spk[N1]; __device__ double Isyn[N1][N2], weight[N1][N2]; __device__ double Isyn_tot[N2], Isyn_lat[N2]; __device__ double I_lat[N2]; //weight update variables: __device__ unsigned char D_op[N2][M]; __device__ signed char err[N2]; __device__ unsigned char Y_op[N2]; __device__ double del_w[N1][N2]; __device__ double ci[N1], d_hat[N1]; __device__ double cis[N1], norm_dh; __device__ double cil[N2], cils[N2]; __device__ double d_hat_sq[N1]; //Neuron variables: __device__ int ref_time1[N1],ref_time2[N2]; __device__ double Vm1[N1],Vm2[N2]; ////////////CUDA Kernels/////////// __global__ void img_readKernel(int *img) { for(int i=0; i<N_imgs; i++){ for(int j=0; j<(p*q+1); j++){ d_imgs[i][j]=img[i*(p*q+1)+j]; } } } __device__ unsigned char pix_spks[256][M]; unsigned char pix_spks_h[256*M]; //uniformly spaced spikes __global__ void convert2Spks(unsigned char *pix_spks_d) { for(int i=0; i<256; i++) { syn1[i]=0.0; syn1s[i]=0.0; for(int l=0; l<M; l++) { pix_spks[i][l]=pix_spks_d[i*M+l]; } } //Compute the synaptic kernels: for(int i=0; i<256; i++) { for(int l=0; l<M; l++) { syn1[i]*=decay; syn1s[i]*=decays; if(pix_spks[i][l]==1) { syn1[i]+=1.0; syn1s[i]+=1.0; } syn[i][l]=syn1[i]-syn1s[i]; } } } unsigned char pixspks[256*M]; __global__ void pix2spks(int k, int i) { int tx=threadIdx.x+blockIdx.x*blockDim.x; if(tx<(p*q)) { img_spks[tx][i]=syn[d_imgs[k][tx+1]][i]; __syncthreads(); } } __global__ void createDes(int k) { int tx=threadIdx.x+blockIdx.x*blockDim.x; if(tx<N2) { for(int i=0; i<M;i++) { D_op[tx][i]=0; } if(tx==d_imgs[k][0]) { for(int i=100; i<M; i+=35) D_op[tx][i]=1; } } } /*__global__ void pix2spks(int k) { //Load the spikes trains for the corresponding pixels: for(int i=1; i<(p*q+1); i++) { for(int l=0; l<M; l++) { img_spks[i-1][l]=syn[d_imgs[k][i]][l]; } } //Create the desired spike trains: for(int j=0; j<N2; j++) { for(int i=0; i<M; i++) { D_op[j][i]=0; } if(j==d_imgs[k][0]) { //for(int i=100; i<M; i+=50) for(int i=100; i<M; i+=35) D_op[j][i]=1; } } }*/ __device__ double I_in[N1]; __global__ void clear_vars() { int tx=threadIdx.x+blockIdx.x*blockDim.x; int ty=threadIdx.y+blockIdx.y*blockDim.y; if(tx<N1 && ty<N2) { Vm2[ty]=EL; Isyn_tot[ty]=0.0; ref_time2[ty]=0.0; Vm1[tx]=EL; ref_time1[tx]=0.0; I_in[tx]=0.0; del_w[tx][ty]=0.0; Isyn[tx][ty]=0.0; ci[tx]=0.0; cis[tx]=0.0; d_hat[tx]=0.0; cil[ty]=0.0; cils[ty]=0.0; Isyn_lat[ty]=0.0; } } __global__ void LifKernel1(int i) { int j = blockIdx.x * blockDim.x + threadIdx.x; double k1, k2; if(j<N1) { if(ref_time1[j]<i) ref_time1[j]=0; k1=(-gL*(Vm1[j]-EL)+I_in[j])/C; k2=(-gL*((Vm1[j]+dt*k1)-EL)+I_in[j])/C; Vm1[j]+=(dt*(k1+k2)/2)*(ref_time1[j]==0); if(Vm1[j]<EL) Vm1[j]=EL; if(Vm1[j]>=VT) { Vm1[j]=EL; ref_time1[j]=i+round(Rp/dt); in_spk[j]=1; } else { in_spk[j]=0; } __syncthreads(); } } __global__ void LifKernel2(int i) { int j = blockIdx.x * blockDim.x + threadIdx.x; double k1, k2; if(j<N2) { if(ref_time2[j]<i) ref_time2[j]=0; k1=(-gL*(Vm2[j]-EL)+Isyn_tot[j]+Isyn_lat[j])/C; k2=(-gL*((Vm2[j]+dt*k1)-EL)+Isyn_tot[j]+Isyn_lat[j])/C; Vm2[j]+=(dt*(k1+k2)/2)*(ref_time2[j]==0); if(Vm2[j]<EL) Vm2[j]=EL; if(Vm2[j]>=VT) { Vm2[j]=EL; ref_time2[j]=i+round(Rp/dt); Y_op[j]=1; } else { Y_op[j]=0; } //compute the error: err[j]=D_op[j][i]-Y_op[j]; __syncthreads(); } } //kernels for the total synapses in the network __global__ void SynKernel(int i) { int ix=blockIdx.x*blockDim.x + threadIdx.x; int iy=blockIdx.y*blockDim.y + threadIdx.y; if(ix<N1 && iy<N2) { if(iy==0) { ci[ix]=ci[ix]*decay; cis[ix]=cis[ix]*decays; if(in_spk[ix]==1) { ci[ix]+=1.0; cis[ix]+=1.0; } d_hat[ix]=d_hat[ix]*decay1 + ((ci[ix]-cis[ix])*dt)/C; d_hat_sq[ix]=d_hat[ix]*d_hat[ix]; } __syncthreads(); Isyn[ix][iy]=(ci[ix]-cis[ix])*weight[ix][iy]; } } __global__ void Lat_curr(int i) { int ix=blockIdx.x*blockDim.x+threadIdx.x; if(ix<N2) { cil[ix]=cil[ix]*decay; cils[ix]=cils[ix]*decays; if(Y_op[ix]==1) { cil[ix]+=1.0; cils[ix]+=1.0; } I_lat[ix]=w_lat*(cil[ix]-cils[ix]); Isyn_lat[ix]=0; for(int k=0; k<N2; k++) { if(k!=ix) { Isyn_lat[ix]+=I_lat[k]; } } } } __device__ double total_curr[8][N2]; __device__ double total_dhatsq[8]; //optimized version __global__ void IsynRedKernel(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int tid=threadIdx.x; for(unsigned int s=blockDim.x/2;s>0;s>>=1) { if(iy<N2 && tid<s && (ix+s)<N1) { Isyn[ix][iy]+=Isyn[ix+s][iy]; } if(iy==0 && tid<s && (ix+s)<N1) { d_hat_sq[ix]+=d_hat_sq[ix+s]; } __syncthreads(); } if(tid==0 && iy<N2) { total_curr[blockIdx.x][iy]=Isyn[ix][iy]; if(iy==0) { total_dhatsq[blockIdx.x]=d_hat_sq[ix]; } } } __global__ void reduce1(int i) { int tx=threadIdx.x+blockIdx.x*blockDim.x; if(tx<N2) { double total1=0.0; for(int k=0; k<8; k++) { total1+=total_curr[k][tx]; } Isyn_tot[tx]=total1; if(tx==0) { double total2=0.0; for(int j=0; j<8; j++) total2+=total_dhatsq[j]; norm_dh=sqrt(total2); } } } __global__ void CalcUpdate(int i, double l_rate) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; if(ix<N1 && iy<N2) { if(norm_dh!=0 && err[iy]!=0) { del_w[ix][iy]+=(err[iy]*l_rate*d_hat[ix]/norm_dh); } __syncthreads(); } } __global__ void WtUpdt() { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; if(ix<N1 && iy<N2) { weight[ix][iy]+=del_w[ix][iy]; } } __global__ void cpyWts(double *wts) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; if(ix<N1 && iy<N2) { wts[ix*N2+iy]=weight[ix][iy]; } } __device__ double w_conv1[Nw][Nw], w_conv2[Nw][Nw]; __device__ double w_conv3[Nw][Nw], w_conv4[Nw][Nw]; __device__ double w_conv5[Nw][Nw], w_conv6[Nw][Nw]; __device__ double w_conv7[Nw][Nw], w_conv8[Nw][Nw]; __device__ double w_conv9[Nw][Nw], w_conv10[Nw][Nw]; __device__ double w_conv11[Nw][Nw], w_conv12[Nw][Nw]; __global__ void initialize2D(double *d_wts, double *c_wts) { for(int i=0; i<N1; i++) { for(int j=0; j<N2; j++) { weight[i][j]=d_wts[i*N2+j]; } } for(int i=0; i<(12*Nw); i++) { for(int j=0; j<Nw; j++) { if(i<Nw) { w_conv1[i][j]=c_wts[i*Nw+j]; } else if(i>=Nw && i<(2*Nw)) { w_conv2[i-Nw][j]=c_wts[i*Nw+j]; } else if(i>=(2*Nw) && i<(3*Nw)) { w_conv3[i-(2*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(3*Nw) && i<(4*Nw)){ w_conv4[i-(3*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(4*Nw) && i<(5*Nw)){ w_conv5[i-(4*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(5*Nw) && i<(6*Nw)){ w_conv6[i-(5*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(6*Nw) && i<(7*Nw)){ w_conv7[i-(6*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(7*Nw) && i<(8*Nw)){ w_conv8[i-(7*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(8*Nw) && i<(9*Nw)){ w_conv9[i-(8*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(9*Nw) && i<(10*Nw)){ w_conv10[i-(9*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(10*Nw) && i<(11*Nw)){ w_conv11[i-(10*Nw)][j]=c_wts[i*Nw+j]; } else if(i>=(11*Nw) && i<(12*Nw)){ w_conv12[i-(11*Nw)][j]=c_wts[i*Nw+j]; } } } } __global__ void convKernel1(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv1[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[ix*L+iy]=temp; } } __global__ void convKernel2(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv2[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[L*L+ix*L+iy]=temp; } } __global__ void convKernel3(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv3[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[2*L*L+ix*L+iy]=temp; } } __global__ void convKernel4(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv4[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[3*L*L+ix*L+iy]=temp; } } __global__ void convKernel5(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv5[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[4*L*L+ix*L+iy]=temp; } } __global__ void convKernel6(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv6[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[5*L*L+ix*L+iy]=temp; } } __global__ void convKernel7(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv7[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[6*L*L+ix*L+iy]=temp; } } __global__ void convKernel8(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv8[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[7*L*L+ix*L+iy]=temp; } } __global__ void convKernel9(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv9[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[8*L*L+ix*L+iy]=temp; } } __global__ void convKernel10(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv10[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[9*L*L+ix*L+iy]=temp; } } __global__ void convKernel11(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv11[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[10*L*L+ix*L+iy]=temp; } } __global__ void convKernel12(int i) { int ix=threadIdx.x+blockIdx.x*blockDim.x; int iy=threadIdx.y+blockIdx.y*blockDim.y; int x, y; if(ix<L && iy<L) { double temp=0.0; for(x=0; x<Nw; x++) { for(y=0; y<Nw; y++) { temp+=WT*w_conv12[x][y]*img_spks[(ix+x)*q+iy+y][i]; } } I_in[11*L*L+ix*L+iy]=temp; } } long timediff(clock_t t1, clock_t t2) { long elapsed; elapsed = ((double)t2 - t1) / CLOCKS_PER_SEC * 1000; return elapsed; } double h_wts[N1*N2], *d_wts; double *dcwts; double h_wts_saved[N1*N2], *d_wts_saved; double c_wts[12*Nw*Nw]; int main(int argc, char *argv[]) { int start=atoi(argv[1]); FILE *FW, *FWI; //to load initial wts and store final wts FILE *conv_wt; clock_t t1, t2; long elapsed=0; FILE *F_train, *F_lif_spks; //for concurrent execution of different kernels: hipStream_t stream2, stream3, stream4, stream5, stream6; hipStream_t stream7, stream8, stream9, stream10, stream11, stream12; hipStream_t stream13, stream14,stream15; //set the gpu device: hipSetDevice(4); hipStreamCreate(&stream2); hipStreamCreate(&stream3); hipStreamCreate(&stream4); hipStreamCreate(&stream5); hipStreamCreate(&stream6); hipStreamCreate(&stream7); hipStreamCreate(&stream8); hipStreamCreate(&stream9); hipStreamCreate(&stream10); hipStreamCreate(&stream11); hipStreamCreate(&stream12); hipStreamCreate(&stream13); hipStreamCreate(&stream14); hipStreamCreate(&stream15); F_lif_spks = fopen("pixels_spks.csv","r"); if(F_lif_spks == NULL) { perror("Error while opening file pixels_spks.csv\n"); exit(EXIT_FAILURE); } F_train = fopen("mnist_train.csv","r"); //F_test = fopen("mnist_test.csv","r"); if(F_train == NULL) { perror("Error while opening file mnist_train.csv\n"); exit(EXIT_FAILURE); } FWI = fopen("wts_initial.csv","r"); if(FWI == NULL) { perror("Error while opening file wts_trained.csv\n"); exit(EXIT_FAILURE); } conv_wt=fopen("kernels_3x3.csv","r"); if(conv_wt==NULL) { perror("Error while opening file kernel.csv\n"); exit(EXIT_FAILURE); } printf("Total no. of neurons=%d, no. of synapses to be trained=%d\n",(N1+N2), N1*N2); hipMalloc((void**)&d_imgs_lin,sizeof(int)*(N_imgs*(p*q+1))); hipMalloc((void**)&d_wts,N1*N2*sizeof(double)); hipMalloc((void**)&dcwts,12*Nw*Nw*sizeof(double)); hipMalloc((void**)&d_wts_saved,N1*N2*sizeof(double)); hipMalloc((void**)&pix_spks_d,256*M*sizeof(unsigned char)); //Read the initial weights: //printf("Reading final trained weights from file\n"); for(int i=0; i<N1; i++) { for(int j=0; j<N2; j++) { fscanf(FWI,"%lf,",&h_wts[i*N2+j]); } } fclose(FWI); for(int i=0; i<(12*Nw); i++) { for(int j=0; j<Nw; j++) { fscanf(conv_wt,"%lf,",&c_wts[i*Nw+j]); } } fclose(conv_wt); for(int i=0; i<(256); i++) { for(int j=0; j<M; j++) { fscanf(F_lif_spks,"%d,",&pix_spks_h[i*M+j]); } } fclose(F_lif_spks); hipMemcpy(pix_spks_d,pix_spks_h,256*M*sizeof(unsigned char),hipMemcpyHostToDevice); hipMemcpy(d_wts,h_wts,N1*N2*sizeof(double),hipMemcpyHostToDevice); hipMemcpy(dcwts,c_wts,12*Nw*Nw*sizeof(double),hipMemcpyHostToDevice); initialize2D<<<1,1>>>(d_wts,dcwts); hipDeviceSynchronize(); hipFree(d_wts); hipFree(dcwts); //Read the images from file: for(int n=0;n<N_imgs;n++) { for(int j=0;j<(p*q+1);j++) { fscanf(F_train,"%d,",&test_set[n][j]); } } fclose(F_train); //convert 2D matrix to 1D for transfer to device: for(int n=0; n<(N_imgs);n++) { for(int j=0;j<(p*q+1);j++) { img_lin[n*(p*q+1)+j]=test_set[n][j]; } } hipMemcpy(d_imgs_lin,img_lin,sizeof(int)*(N_imgs*(p*q+1)),hipMemcpyHostToDevice); //call cuda kernel to read in the images: img_readKernel<<<1,1>>>(d_imgs_lin); hipDeviceSynchronize(); hipFree(d_imgs_lin); int NBlks=(N1/Nthrds)+1; //printf("blocks=%d, threads=%d\n",NBlks,Nthrds); dim3 dimGrid(82,1,1); dim3 dimBlock(100,10,1); dim3 grid_syn(NBlks,10,1); dim3 block_syn(Nthrds,1,1); //convert pixel values 0 to 255 into spike trains convert2Spks<<<1,1>>>(pix_spks_d); hipDeviceSynchronize(); hipFree(pix_spks_d); dim3 convGrid(1,1,1); dim3 convBlks(26,26,1); double learn=r; //CPU time required for computation t1 = clock(); int l=0; //image index for(int n=0; n<max_epochs; n++) { printf("Epoch=%d\n",n); if(n<3) learn=r; else if(n>=3 && n<6) learn=r/2; else if(n>=6 && n<9) learn=r/4; else if(n>=9 && n<12) learn=r/8; else if(n>=12 && n<15) learn=r/16; else if(n>=15 && n<18) learn=r/32; else learn=r/64; for(l=0; l<N_imgs; l++) { printf("l=%d image %d\n",l,test_set[l][0]); createDes<<<1,10>>>(l); clear_vars<<<dimGrid,dimBlock>>>(); hipDeviceSynchronize(); //simulate for all time steps for(int i=0; i<M; i++) { pix2spks<<<1,784>>>(l,i); /////////////////////////////////////////////////// hipDeviceSynchronize(); convKernel1<<<convGrid,convBlks,0,stream2>>>(i); convKernel2<<<convGrid,convBlks,0,stream3>>>(i); convKernel3<<<convGrid,convBlks,0,stream4>>>(i); convKernel4<<<convGrid,convBlks,0,stream5>>>(i); convKernel5<<<convGrid,convBlks,0,stream6>>>(i); convKernel6<<<convGrid,convBlks,0,stream7>>>(i); convKernel7<<<convGrid,convBlks,0,stream8>>>(i); convKernel8<<<convGrid,convBlks,0,stream9>>>(i); convKernel9<<<convGrid,convBlks,0,stream10>>>(i); convKernel10<<<convGrid,convBlks,0,stream11>>>(i); convKernel11<<<convGrid,convBlks,0,stream12>>>(i); convKernel12<<<convGrid,convBlks,0,stream13>>>(i); ///////////////////////////////////////////////////// hipDeviceSynchronize(); LifKernel1<<<NBlks,Nthrds>>>(i); //////////////////////////////////////////////// hipDeviceSynchronize(); SynKernel<<<dimGrid,dimBlock,0,stream14>>>(i); Lat_curr<<<1,10,0,stream15>>>(i); //////////////////////////////////////////////// hipDeviceSynchronize(); IsynRedKernel<<<grid_syn,block_syn>>>(i); reduce1<<<10,1>>>(i); /////////////////////////////////////////////// hipDeviceSynchronize(); LifKernel2<<<1,10>>>(i); //////////////////////////////////////////////////// hipDeviceSynchronize(); CalcUpdate<<<dimGrid,dimBlock>>>(i,learn); } ////////////////////////////////////////////////////////////////////////////// WtUpdt<<<dimGrid,dimBlock>>>(); //cudaDeviceSynchronize(); } //end of loops over N_imgs t2 = clock(); elapsed += timediff(t1,t2); printf("Elapsed time: %ld ms\n", elapsed); char wts_file[25]; sprintf(wts_file,"wts_gpu%d.txt",n); if((FW=fopen(wts_file,"w"))==NULL) { printf("Failed to open file wts_gpu_sample%d.txt\n",n); } printf("Copying the trained weights to the host for analysis\n"); cpyWts<<<dimGrid,dimBlock>>>(d_wts_saved); hipMemcpy(h_wts_saved,d_wts_saved,N1*N2*sizeof(double), hipMemcpyDeviceToHost); //save the weights in a file: for(int i=0; i<N1; i++) { for(int j=0; j<N2; j++) { fprintf(FW,"%0.14f,",h_wts_saved[i*N2+j]); } fprintf(FW,"\n"); } fclose(FW); } //end of n epochs loops hipFree(d_wts_saved); hipDeviceReset(); return(0); }
.text .file "snn_train.hip" .globl _Z29__device_stub__img_readKernelPi # -- Begin function _Z29__device_stub__img_readKernelPi .type _Z29__device_stub__img_readKernelPi,@function _Z29__device_stub__img_readKernelPi: # @_Z29__device_stub__img_readKernelPi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z14img_readKernelPi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z29__device_stub__img_readKernelPi, .Lfunc_end0-_Z29__device_stub__img_readKernelPi .cfi_endproc # -- End function .globl _Z27__device_stub__convert2SpksPh # -- Begin function _Z27__device_stub__convert2SpksPh .type _Z27__device_stub__convert2SpksPh,@function _Z27__device_stub__convert2SpksPh: # @_Z27__device_stub__convert2SpksPh .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z12convert2SpksPh, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z27__device_stub__convert2SpksPh, .Lfunc_end1-_Z27__device_stub__convert2SpksPh .cfi_endproc # -- End function .globl _Z23__device_stub__pix2spksii # -- Begin function _Z23__device_stub__pix2spksii .type _Z23__device_stub__pix2spksii,@function _Z23__device_stub__pix2spksii: # @_Z23__device_stub__pix2spksii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 8(%rsp), %rcx movl %esi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z8pix2spksii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z23__device_stub__pix2spksii, .Lfunc_end2-_Z23__device_stub__pix2spksii .cfi_endproc # -- End function .globl _Z24__device_stub__createDesi # -- Begin function _Z24__device_stub__createDesi .type _Z24__device_stub__createDesi,@function _Z24__device_stub__createDesi: # @_Z24__device_stub__createDesi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9createDesi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _Z24__device_stub__createDesi, .Lfunc_end3-_Z24__device_stub__createDesi .cfi_endproc # -- End function .globl _Z25__device_stub__clear_varsv # -- Begin function _Z25__device_stub__clear_varsv .type _Z25__device_stub__clear_varsv,@function _Z25__device_stub__clear_varsv: # @_Z25__device_stub__clear_varsv .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $56, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rbx leaq 24(%rsp), %r14 leaq 16(%rsp), %r15 leaq 8(%rsp), %r12 movq %rbx, %rdi movq %r14, %rsi movq %r15, %rdx movq %r12, %rcx callq __hipPopCallConfiguration movq (%rbx), %rsi movl 8(%rbx), %edx movq (%r14), %rcx movl 8(%r14), %r8d movq %rsp, %r9 movl $_Z10clear_varsv, %edi pushq (%r12) .cfi_adjust_cfa_offset 8 pushq (%r15) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $72, %rsp .cfi_adjust_cfa_offset -72 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size _Z25__device_stub__clear_varsv, .Lfunc_end4-_Z25__device_stub__clear_varsv .cfi_endproc # -- End function .globl _Z25__device_stub__LifKernel1i # -- Begin function _Z25__device_stub__LifKernel1i .type _Z25__device_stub__LifKernel1i,@function _Z25__device_stub__LifKernel1i: # @_Z25__device_stub__LifKernel1i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10LifKernel1i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end5: .size _Z25__device_stub__LifKernel1i, .Lfunc_end5-_Z25__device_stub__LifKernel1i .cfi_endproc # -- End function .globl _Z25__device_stub__LifKernel2i # -- Begin function _Z25__device_stub__LifKernel2i .type _Z25__device_stub__LifKernel2i,@function _Z25__device_stub__LifKernel2i: # @_Z25__device_stub__LifKernel2i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10LifKernel2i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end6: .size _Z25__device_stub__LifKernel2i, .Lfunc_end6-_Z25__device_stub__LifKernel2i .cfi_endproc # -- End function .globl _Z24__device_stub__SynKerneli # -- Begin function _Z24__device_stub__SynKerneli .type _Z24__device_stub__SynKerneli,@function _Z24__device_stub__SynKerneli: # @_Z24__device_stub__SynKerneli .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9SynKerneli, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end7: .size _Z24__device_stub__SynKerneli, .Lfunc_end7-_Z24__device_stub__SynKerneli .cfi_endproc # -- End function .globl _Z23__device_stub__Lat_curri # -- Begin function _Z23__device_stub__Lat_curri .type _Z23__device_stub__Lat_curri,@function _Z23__device_stub__Lat_curri: # @_Z23__device_stub__Lat_curri .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z8Lat_curri, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end8: .size _Z23__device_stub__Lat_curri, .Lfunc_end8-_Z23__device_stub__Lat_curri .cfi_endproc # -- End function .globl _Z28__device_stub__IsynRedKerneli # -- Begin function _Z28__device_stub__IsynRedKerneli .type _Z28__device_stub__IsynRedKerneli,@function _Z28__device_stub__IsynRedKerneli: # @_Z28__device_stub__IsynRedKerneli .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z13IsynRedKerneli, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end9: .size _Z28__device_stub__IsynRedKerneli, .Lfunc_end9-_Z28__device_stub__IsynRedKerneli .cfi_endproc # -- End function .globl _Z22__device_stub__reduce1i # -- Begin function _Z22__device_stub__reduce1i .type _Z22__device_stub__reduce1i,@function _Z22__device_stub__reduce1i: # @_Z22__device_stub__reduce1i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7reduce1i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end10: .size _Z22__device_stub__reduce1i, .Lfunc_end10-_Z22__device_stub__reduce1i .cfi_endproc # -- End function .globl _Z25__device_stub__CalcUpdateid # -- Begin function _Z25__device_stub__CalcUpdateid .type _Z25__device_stub__CalcUpdateid,@function _Z25__device_stub__CalcUpdateid: # @_Z25__device_stub__CalcUpdateid .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 4(%rsp), %rax movl %edi, (%rax) leaq 24(%rsp), %rcx movsd %xmm0, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10CalcUpdateid, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end11: .size _Z25__device_stub__CalcUpdateid, .Lfunc_end11-_Z25__device_stub__CalcUpdateid .cfi_endproc # -- End function .globl _Z21__device_stub__WtUpdtv # -- Begin function _Z21__device_stub__WtUpdtv .type _Z21__device_stub__WtUpdtv,@function _Z21__device_stub__WtUpdtv: # @_Z21__device_stub__WtUpdtv .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $56, %rsp .cfi_def_cfa_offset 96 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rbx leaq 24(%rsp), %r14 leaq 16(%rsp), %r15 leaq 8(%rsp), %r12 movq %rbx, %rdi movq %r14, %rsi movq %r15, %rdx movq %r12, %rcx callq __hipPopCallConfiguration movq (%rbx), %rsi movl 8(%rbx), %edx movq (%r14), %rcx movl 8(%r14), %r8d movq %rsp, %r9 movl $_Z6WtUpdtv, %edi pushq (%r12) .cfi_adjust_cfa_offset 8 pushq (%r15) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $72, %rsp .cfi_adjust_cfa_offset -72 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end12: .size _Z21__device_stub__WtUpdtv, .Lfunc_end12-_Z21__device_stub__WtUpdtv .cfi_endproc # -- End function .globl _Z21__device_stub__cpyWtsPd # -- Begin function _Z21__device_stub__cpyWtsPd .type _Z21__device_stub__cpyWtsPd,@function _Z21__device_stub__cpyWtsPd: # @_Z21__device_stub__cpyWtsPd .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6cpyWtsPd, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end13: .size _Z21__device_stub__cpyWtsPd, .Lfunc_end13-_Z21__device_stub__cpyWtsPd .cfi_endproc # -- End function .globl _Z27__device_stub__initialize2DPdS_ # -- Begin function _Z27__device_stub__initialize2DPdS_ .type _Z27__device_stub__initialize2DPdS_,@function _Z27__device_stub__initialize2DPdS_: # @_Z27__device_stub__initialize2DPdS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z12initialize2DPdS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end14: .size _Z27__device_stub__initialize2DPdS_, .Lfunc_end14-_Z27__device_stub__initialize2DPdS_ .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel1i # -- Begin function _Z26__device_stub__convKernel1i .type _Z26__device_stub__convKernel1i,@function _Z26__device_stub__convKernel1i: # @_Z26__device_stub__convKernel1i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel1i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end15: .size _Z26__device_stub__convKernel1i, .Lfunc_end15-_Z26__device_stub__convKernel1i .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel2i # -- Begin function _Z26__device_stub__convKernel2i .type _Z26__device_stub__convKernel2i,@function _Z26__device_stub__convKernel2i: # @_Z26__device_stub__convKernel2i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel2i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end16: .size _Z26__device_stub__convKernel2i, .Lfunc_end16-_Z26__device_stub__convKernel2i .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel3i # -- Begin function _Z26__device_stub__convKernel3i .type _Z26__device_stub__convKernel3i,@function _Z26__device_stub__convKernel3i: # @_Z26__device_stub__convKernel3i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel3i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end17: .size _Z26__device_stub__convKernel3i, .Lfunc_end17-_Z26__device_stub__convKernel3i .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel4i # -- Begin function _Z26__device_stub__convKernel4i .type _Z26__device_stub__convKernel4i,@function _Z26__device_stub__convKernel4i: # @_Z26__device_stub__convKernel4i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel4i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end18: .size _Z26__device_stub__convKernel4i, .Lfunc_end18-_Z26__device_stub__convKernel4i .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel5i # -- Begin function _Z26__device_stub__convKernel5i .type _Z26__device_stub__convKernel5i,@function _Z26__device_stub__convKernel5i: # @_Z26__device_stub__convKernel5i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel5i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end19: .size _Z26__device_stub__convKernel5i, .Lfunc_end19-_Z26__device_stub__convKernel5i .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel6i # -- Begin function _Z26__device_stub__convKernel6i .type _Z26__device_stub__convKernel6i,@function _Z26__device_stub__convKernel6i: # @_Z26__device_stub__convKernel6i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel6i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end20: .size _Z26__device_stub__convKernel6i, .Lfunc_end20-_Z26__device_stub__convKernel6i .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel7i # -- Begin function _Z26__device_stub__convKernel7i .type _Z26__device_stub__convKernel7i,@function _Z26__device_stub__convKernel7i: # @_Z26__device_stub__convKernel7i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel7i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end21: .size _Z26__device_stub__convKernel7i, .Lfunc_end21-_Z26__device_stub__convKernel7i .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel8i # -- Begin function _Z26__device_stub__convKernel8i .type _Z26__device_stub__convKernel8i,@function _Z26__device_stub__convKernel8i: # @_Z26__device_stub__convKernel8i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel8i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end22: .size _Z26__device_stub__convKernel8i, .Lfunc_end22-_Z26__device_stub__convKernel8i .cfi_endproc # -- End function .globl _Z26__device_stub__convKernel9i # -- Begin function _Z26__device_stub__convKernel9i .type _Z26__device_stub__convKernel9i,@function _Z26__device_stub__convKernel9i: # @_Z26__device_stub__convKernel9i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11convKernel9i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end23: .size _Z26__device_stub__convKernel9i, .Lfunc_end23-_Z26__device_stub__convKernel9i .cfi_endproc # -- End function .globl _Z27__device_stub__convKernel10i # -- Begin function _Z27__device_stub__convKernel10i .type _Z27__device_stub__convKernel10i,@function _Z27__device_stub__convKernel10i: # @_Z27__device_stub__convKernel10i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z12convKernel10i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end24: .size _Z27__device_stub__convKernel10i, .Lfunc_end24-_Z27__device_stub__convKernel10i .cfi_endproc # -- End function .globl _Z27__device_stub__convKernel11i # -- Begin function _Z27__device_stub__convKernel11i .type _Z27__device_stub__convKernel11i,@function _Z27__device_stub__convKernel11i: # @_Z27__device_stub__convKernel11i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z12convKernel11i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end25: .size _Z27__device_stub__convKernel11i, .Lfunc_end25-_Z27__device_stub__convKernel11i .cfi_endproc # -- End function .globl _Z27__device_stub__convKernel12i # -- Begin function _Z27__device_stub__convKernel12i .type _Z27__device_stub__convKernel12i,@function _Z27__device_stub__convKernel12i: # @_Z27__device_stub__convKernel12i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z12convKernel12i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end26: .size _Z27__device_stub__convKernel12i, .Lfunc_end26-_Z27__device_stub__convKernel12i .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _Z8timediffll .LCPI27_0: .quad 0x412e848000000000 # double 1.0E+6 .LCPI27_1: .quad 0x408f400000000000 # double 1000 .text .globl _Z8timediffll .type _Z8timediffll,@function _Z8timediffll: # @_Z8timediffll .cfi_startproc # %bb.0: cvtsi2sd %rsi, %xmm0 cvtsi2sd %rdi, %xmm1 subsd %xmm1, %xmm0 divsd .LCPI27_0(%rip), %xmm0 mulsd .LCPI27_1(%rip), %xmm0 cvttsd2si %xmm0, %rax retq .Lfunc_end27: .size _Z8timediffll, .Lfunc_end27-_Z8timediffll .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI28_0: .quad 0x3deb7cdfd9d7bdbb # double 2.0000000000000001E-10 .LCPI28_1: .quad 0x3ddb7cdfd9d7bdbb # double 1.0E-10 .LCPI28_2: .quad 0x3dcb7cdfd9d7bdbb # double 5.0000000000000002E-11 .LCPI28_3: .quad 0x3dbb7cdfd9d7bdbb # double 2.5000000000000001E-11 .LCPI28_4: .quad 0x3dab7cdfd9d7bdbb # double 1.25E-11 .LCPI28_6: .quad 0x412e848000000000 # double 1.0E+6 .LCPI28_7: .quad 0x408f400000000000 # double 1000 .section .rodata.cst16,"aM",@progbits,16 .p2align 3, 0x0 .LCPI28_5: .quad 0x3d8b7cdfd9d7bdbb # double 3.1250000000000001E-12 .quad 0x3d9b7cdfd9d7bdbb # double 6.2500000000000002E-12 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $216, %rsp .cfi_def_cfa_offset 272 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $4, %edi callq hipSetDevice leaq 168(%rsp), %rdi callq hipStreamCreate leaq 160(%rsp), %rdi callq hipStreamCreate leaq 152(%rsp), %rdi callq hipStreamCreate leaq 144(%rsp), %rdi callq hipStreamCreate leaq 136(%rsp), %rdi callq hipStreamCreate leaq 128(%rsp), %rdi callq hipStreamCreate leaq 120(%rsp), %rdi callq hipStreamCreate leaq 112(%rsp), %rdi callq hipStreamCreate leaq 104(%rsp), %rdi callq hipStreamCreate leaq 96(%rsp), %rdi callq hipStreamCreate leaq 88(%rsp), %rdi callq hipStreamCreate leaq 80(%rsp), %rdi callq hipStreamCreate leaq 72(%rsp), %rdi callq hipStreamCreate leaq 64(%rsp), %rdi callq hipStreamCreate movl $.L.str, %edi movl $.L.str.1, %esi callq fopen testq %rax, %rax je .LBB28_1 # %bb.3: movq %rax, %r15 movl $.L.str.3, %edi movl $.L.str.1, %esi callq fopen testq %rax, %rax je .LBB28_4 # %bb.5: movq %rax, %rbx movl $.L.str.5, %edi movl $.L.str.1, %esi callq fopen testq %rax, %rax je .LBB28_6 # %bb.7: movq %rax, %r12 movq %rbx, (%rsp) # 8-byte Spill movl $.L.str.7, %edi movl $.L.str.1, %esi callq fopen testq %rax, %rax je .LBB28_8 # %bb.9: movq %rax, %rbx movl $.L.str.9, %edi movl $8122, %esi # imm = 0x1FBA movl $81120, %edx # imm = 0x13CE0 xorl %eax, %eax callq printf movl $d_imgs_lin, %edi movl $157000000, %esi # imm = 0x95BA140 callq hipMalloc movl $d_wts, %edi movl $648960, %esi # imm = 0x9E700 callq hipMalloc movl $dcwts, %edi movl $864, %esi # imm = 0x360 callq hipMalloc movl $d_wts_saved, %edi movl $648960, %esi # imm = 0x9E700 callq hipMalloc movl $pix_spks_d, %edi movl $256000, %esi # imm = 0x3E800 callq hipMalloc movl $h_wts, %r13d xorl %ebp, %ebp .LBB28_10: # %.preheader462 # =>This Loop Header: Depth=1 # Child Loop BB28_11 Depth 2 xorl %r14d, %r14d .LBB28_11: # Parent Loop BB28_10 Depth=1 # => This Inner Loop Header: Depth=2 leaq (%r14,%r13), %rdx movl $.L.str.10, %esi movq %r12, %rdi xorl %eax, %eax callq __isoc23_fscanf addq $8, %r14 cmpq $80, %r14 jne .LBB28_11 # %bb.12: # in Loop: Header=BB28_10 Depth=1 incq %rbp addq $80, %r13 cmpq $8112, %rbp # imm = 0x1FB0 jne .LBB28_10 # %bb.13: movq %r12, %rdi callq fclose movl $c_wts, %r12d xorl %r13d, %r13d .LBB28_14: # %.preheader461 # =>This Loop Header: Depth=1 # Child Loop BB28_15 Depth 2 xorl %r14d, %r14d .LBB28_15: # Parent Loop BB28_14 Depth=1 # => This Inner Loop Header: Depth=2 leaq (%r12,%r14), %rdx movl $.L.str.10, %esi movq %rbx, %rdi xorl %eax, %eax callq __isoc23_fscanf addq $8, %r14 cmpq $24, %r14 jne .LBB28_15 # %bb.16: # in Loop: Header=BB28_14 Depth=1 incq %r13 addq $24, %r12 cmpq $36, %r13 jne .LBB28_14 # %bb.17: movq %rbx, %rdi callq fclose movl $pix_spks_h, %ebx xorl %r12d, %r12d movq (%rsp), %r13 # 8-byte Reload .LBB28_18: # %.preheader460 # =>This Loop Header: Depth=1 # Child Loop BB28_19 Depth 2 xorl %r14d, %r14d .LBB28_19: # Parent Loop BB28_18 Depth=1 # => This Inner Loop Header: Depth=2 leaq (%rbx,%r14), %rdx movl $.L.str.11, %esi movq %r15, %rdi xorl %eax, %eax callq __isoc23_fscanf incq %r14 cmpq $1000, %r14 # imm = 0x3E8 jne .LBB28_19 # %bb.20: # in Loop: Header=BB28_18 Depth=1 incq %r12 addq $1000, %rbx # imm = 0x3E8 cmpq $256, %r12 # imm = 0x100 jne .LBB28_18 # %bb.21: movabsq $4294967297, %rbx # imm = 0x100000001 movq %r15, %rdi callq fclose movq pix_spks_d(%rip), %rdi movl $pix_spks_h, %esi movl $256000, %edx # imm = 0x3E800 movl $1, %ecx callq hipMemcpy movq d_wts(%rip), %rdi movl $h_wts, %esi movl $648960, %edx # imm = 0x9E700 movl $1, %ecx callq hipMemcpy movq dcwts(%rip), %rdi movl $c_wts, %esi movl $864, %edx # imm = 0x360 movl $1, %ecx callq hipMemcpy movq %rbx, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_23 # %bb.22: movq d_wts(%rip), %rdi movq dcwts(%rip), %rsi callq _Z27__device_stub__initialize2DPdS_ .LBB28_23: callq hipDeviceSynchronize movq d_wts(%rip), %rdi callq hipFree movq dcwts(%rip), %rdi callq hipFree movl $test_set, %r15d xorl %r12d, %r12d .LBB28_24: # %.preheader459 # =>This Loop Header: Depth=1 # Child Loop BB28_25 Depth 2 xorl %r14d, %r14d .LBB28_25: # Parent Loop BB28_24 Depth=1 # => This Inner Loop Header: Depth=2 leaq (%r15,%r14), %rdx movl $.L.str.11, %esi movq %r13, %rdi xorl %eax, %eax callq __isoc23_fscanf addq $4, %r14 cmpq $3140, %r14 # imm = 0xC44 jne .LBB28_25 # %bb.26: # in Loop: Header=BB28_24 Depth=1 incq %r12 addq $3140, %r15 # imm = 0xC44 cmpq $50000, %r12 # imm = 0xC350 jne .LBB28_24 # %bb.27: movq %r13, %rdi callq fclose xorl %r14d, %r14d .LBB28_28: # %.preheader458 # =>This Inner Loop Header: Depth=1 leaq img_lin(%r14), %rdi leaq test_set(%r14), %rsi movl $3140, %edx # imm = 0xC44 callq memcpy@PLT addq $3140, %r14 # imm = 0xC44 cmpq $157000000, %r14 # imm = 0x95BA140 jne .LBB28_28 # %bb.29: movq d_imgs_lin(%rip), %rdi movl $img_lin, %esi movl $157000000, %edx # imm = 0x95BA140 movl $1, %ecx callq hipMemcpy movq %rbx, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_31 # %bb.30: movq d_imgs_lin(%rip), %rdi callq _Z29__device_stub__img_readKernelPi .LBB28_31: callq hipDeviceSynchronize movq d_imgs_lin(%rip), %rdi callq hipFree movq %rbx, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_33 # %bb.32: movq pix_spks_d(%rip), %rdi callq _Z27__device_stub__convert2SpksPh .LBB28_33: movabsq $111669149722, %r14 # imm = 0x1A0000001A movabsq $42949673060, %r13 # imm = 0xA00000064 callq hipDeviceSynchronize movq pix_spks_d(%rip), %rdi callq hipFree callq clock cvtsi2sd %rax, %xmm0 movsd %xmm0, 40(%rsp) # 8-byte Spill leaq 9(%rbx), %r12 leaq 81(%rbx), %rax movq %rax, (%rsp) # 8-byte Spill leaq 783(%rbx), %rax movq %rax, 56(%rsp) # 8-byte Spill leaq 7(%rbx), %rax movq %rax, 48(%rsp) # 8-byte Spill xorl %eax, %eax movq %rax, 32(%rsp) # 8-byte Spill xorl %ebp, %ebp .LBB28_34: # =>This Loop Header: Depth=1 # Child Loop BB28_41 Depth 2 # Child Loop BB28_46 Depth 3 # Child Loop BB28_95 Depth 2 # Child Loop BB28_96 Depth 3 movl $.L.str.12, %edi movl %ebp, %esi xorl %eax, %eax callq printf movsd .LCPI28_0(%rip), %xmm0 # xmm0 = mem[0],zero movsd %xmm0, 16(%rsp) # 8-byte Spill cmpl $3, %ebp jb .LBB28_40 # %bb.35: # in Loop: Header=BB28_34 Depth=1 movsd .LCPI28_1(%rip), %xmm0 # xmm0 = mem[0],zero movsd %xmm0, 16(%rsp) # 8-byte Spill cmpl $6, %ebp jb .LBB28_40 # %bb.36: # in Loop: Header=BB28_34 Depth=1 movsd .LCPI28_2(%rip), %xmm0 # xmm0 = mem[0],zero movsd %xmm0, 16(%rsp) # 8-byte Spill cmpl $9, %ebp jb .LBB28_40 # %bb.37: # in Loop: Header=BB28_34 Depth=1 movsd .LCPI28_3(%rip), %xmm0 # xmm0 = mem[0],zero movsd %xmm0, 16(%rsp) # 8-byte Spill cmpl $12, %ebp jb .LBB28_40 # %bb.38: # in Loop: Header=BB28_34 Depth=1 movsd .LCPI28_4(%rip), %xmm0 # xmm0 = mem[0],zero movsd %xmm0, 16(%rsp) # 8-byte Spill cmpl $15, %ebp jb .LBB28_40 # %bb.39: # in Loop: Header=BB28_34 Depth=1 xorl %eax, %eax cmpl $18, %ebp setb %al movsd .LCPI28_5(,%rax,8), %xmm0 # xmm0 = mem[0],zero movsd %xmm0, 16(%rsp) # 8-byte Spill .LBB28_40: # in Loop: Header=BB28_34 Depth=1 movl %ebp, 12(%rsp) # 4-byte Spill xorl %r15d, %r15d .LBB28_41: # Parent Loop BB28_34 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB28_46 Depth 3 imulq $3140, %r15, %rax # imm = 0xC44 movl test_set(%rax), %edx movl $.L.str.13, %edi movl %r15d, %esi xorl %eax, %eax callq printf movq %rbx, %rdi movl $1, %esi movq %r12, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_43 # %bb.42: # in Loop: Header=BB28_41 Depth=2 movl %r15d, %edi callq _Z24__device_stub__createDesi .LBB28_43: # in Loop: Header=BB28_41 Depth=2 movq %r15, 24(%rsp) # 8-byte Spill movq (%rsp), %rdi # 8-byte Reload movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_45 # %bb.44: # in Loop: Header=BB28_41 Depth=2 callq _Z25__device_stub__clear_varsv .LBB28_45: # in Loop: Header=BB28_41 Depth=2 callq hipDeviceSynchronize xorl %ebp, %ebp .LBB28_46: # Parent Loop BB28_34 Depth=1 # Parent Loop BB28_41 Depth=2 # => This Inner Loop Header: Depth=3 movq %rbx, %rdi movl $1, %esi movq 56(%rsp), %rdx # 8-byte Reload movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_48 # %bb.47: # in Loop: Header=BB28_46 Depth=3 movq 24(%rsp), %rdi # 8-byte Reload # kill: def $edi killed $edi killed $rdi movl %ebp, %esi callq _Z23__device_stub__pix2spksii .LBB28_48: # in Loop: Header=BB28_46 Depth=3 callq hipDeviceSynchronize movq 168(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_50 # %bb.49: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel1i .LBB28_50: # in Loop: Header=BB28_46 Depth=3 movq 160(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_52 # %bb.51: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel2i .LBB28_52: # in Loop: Header=BB28_46 Depth=3 movq 152(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_54 # %bb.53: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel3i .LBB28_54: # in Loop: Header=BB28_46 Depth=3 movq 144(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_56 # %bb.55: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel4i .LBB28_56: # in Loop: Header=BB28_46 Depth=3 movq 136(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_58 # %bb.57: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel5i .LBB28_58: # in Loop: Header=BB28_46 Depth=3 movq 128(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_60 # %bb.59: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel6i .LBB28_60: # in Loop: Header=BB28_46 Depth=3 movq 120(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_62 # %bb.61: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel7i .LBB28_62: # in Loop: Header=BB28_46 Depth=3 movq 112(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_64 # %bb.63: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel8i .LBB28_64: # in Loop: Header=BB28_46 Depth=3 movq 104(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_66 # %bb.65: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z26__device_stub__convKernel9i .LBB28_66: # in Loop: Header=BB28_46 Depth=3 movq 96(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_68 # %bb.67: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z27__device_stub__convKernel10i .LBB28_68: # in Loop: Header=BB28_46 Depth=3 movq 88(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_70 # %bb.69: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z27__device_stub__convKernel11i .LBB28_70: # in Loop: Header=BB28_46 Depth=3 movq 80(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r14, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_72 # %bb.71: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z27__device_stub__convKernel12i .LBB28_72: # in Loop: Header=BB28_46 Depth=3 callq hipDeviceSynchronize leaq 1023(%rbx), %r15 movq 48(%rsp), %rdi # 8-byte Reload movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_74 # %bb.73: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z25__device_stub__LifKernel1i .LBB28_74: # in Loop: Header=BB28_46 Depth=3 callq hipDeviceSynchronize movq 72(%rsp), %r9 movq (%rsp), %rdi # 8-byte Reload movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_76 # %bb.75: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z24__device_stub__SynKerneli .LBB28_76: # in Loop: Header=BB28_46 Depth=3 movq 64(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %r12, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_78 # %bb.77: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z23__device_stub__Lat_curri .LBB28_78: # in Loop: Header=BB28_46 Depth=3 callq hipDeviceSynchronize leaq -92(%r13), %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_80 # %bb.79: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z28__device_stub__IsynRedKerneli .LBB28_80: # in Loop: Header=BB28_46 Depth=3 movq %r12, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_82 # %bb.81: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z22__device_stub__reduce1i .LBB28_82: # in Loop: Header=BB28_46 Depth=3 callq hipDeviceSynchronize movq %rbx, %rdi movl $1, %esi movq %r12, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_84 # %bb.83: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi callq _Z25__device_stub__LifKernel2i .LBB28_84: # in Loop: Header=BB28_46 Depth=3 callq hipDeviceSynchronize movq (%rsp), %rdi # 8-byte Reload movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_86 # %bb.85: # in Loop: Header=BB28_46 Depth=3 movl %ebp, %edi movsd 16(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero callq _Z25__device_stub__CalcUpdateid .LBB28_86: # in Loop: Header=BB28_46 Depth=3 incl %ebp cmpl $1000, %ebp # imm = 0x3E8 jne .LBB28_46 # %bb.87: # in Loop: Header=BB28_41 Depth=2 movq (%rsp), %rdi # 8-byte Reload movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_89 # %bb.88: # in Loop: Header=BB28_41 Depth=2 callq _Z21__device_stub__WtUpdtv .LBB28_89: # in Loop: Header=BB28_41 Depth=2 movq 24(%rsp), %r15 # 8-byte Reload incq %r15 cmpq $50000, %r15 # imm = 0xC350 jne .LBB28_41 # %bb.90: # in Loop: Header=BB28_34 Depth=1 callq clock xorps %xmm0, %xmm0 cvtsi2sd %rax, %xmm0 subsd 40(%rsp), %xmm0 # 8-byte Folded Reload divsd .LCPI28_6(%rip), %xmm0 mulsd .LCPI28_7(%rip), %xmm0 cvttsd2si %xmm0, %rax movq 32(%rsp), %rsi # 8-byte Reload addq %rax, %rsi movl $.L.str.14, %edi movq %rsi, 32(%rsp) # 8-byte Spill xorl %eax, %eax callq printf movl $.L.str.15, %esi leaq 176(%rsp), %r15 movq %r15, %rdi movl 12(%rsp), %edx # 4-byte Reload xorl %eax, %eax callq sprintf movl $.L.str.16, %esi movq %r15, %rdi callq fopen movq %rax, %rbp testq %rax, %rax jne .LBB28_92 # %bb.91: # in Loop: Header=BB28_34 Depth=1 movl $.L.str.17, %edi movl 12(%rsp), %esi # 4-byte Reload xorl %eax, %eax callq printf .LBB28_92: # in Loop: Header=BB28_34 Depth=1 movl $.Lstr, %edi callq puts@PLT movq (%rsp), %rdi # 8-byte Reload movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB28_94 # %bb.93: # in Loop: Header=BB28_34 Depth=1 movq d_wts_saved(%rip), %rdi callq _Z21__device_stub__cpyWtsPd .LBB28_94: # in Loop: Header=BB28_34 Depth=1 movq d_wts_saved(%rip), %rsi movl $h_wts_saved, %r15d movl $h_wts_saved, %edi movl $648960, %edx # imm = 0x9E700 movl $2, %ecx callq hipMemcpy xorl %eax, %eax .LBB28_95: # %.preheader # Parent Loop BB28_34 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB28_96 Depth 3 movq %rax, 24(%rsp) # 8-byte Spill xorl %r13d, %r13d .LBB28_96: # Parent Loop BB28_34 Depth=1 # Parent Loop BB28_95 Depth=2 # => This Inner Loop Header: Depth=3 movsd (%r15,%r13,8), %xmm0 # xmm0 = mem[0],zero movl $.L.str.19, %esi movq %rbp, %rdi movb $1, %al callq fprintf incq %r13 cmpq $10, %r13 jne .LBB28_96 # %bb.97: # in Loop: Header=BB28_95 Depth=2 movl $10, %edi movq %rbp, %rsi callq fputc@PLT movq 24(%rsp), %rax # 8-byte Reload incq %rax addq $80, %r15 cmpq $8112, %rax # imm = 0x1FB0 jne .LBB28_95 # %bb.98: # in Loop: Header=BB28_34 Depth=1 movq %rbp, %rdi callq fclose movl 12(%rsp), %ebp # 4-byte Reload incl %ebp cmpl $20, %ebp movabsq $42949673060, %r13 # imm = 0xA00000064 jne .LBB28_34 # %bb.99: movq d_wts_saved(%rip), %rdi callq hipFree callq hipDeviceReset xorl %eax, %eax addq $216, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB28_1: .cfi_def_cfa_offset 272 movl $.L.str.2, %edi jmp .LBB28_2 .LBB28_4: movl $.L.str.4, %edi jmp .LBB28_2 .LBB28_6: movl $.L.str.6, %edi jmp .LBB28_2 .LBB28_8: movl $.L.str.8, %edi .LBB28_2: callq perror movl $1, %edi callq exit .Lfunc_end28: .size main, .Lfunc_end28-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB29_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB29_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z14img_readKernelPi, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z12convert2SpksPh, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z8pix2spksii, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9createDesi, %esi movl $.L__unnamed_4, %edx movl $.L__unnamed_4, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10clear_varsv, %esi movl $.L__unnamed_5, %edx movl $.L__unnamed_5, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10LifKernel1i, %esi movl $.L__unnamed_6, %edx movl $.L__unnamed_6, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10LifKernel2i, %esi movl $.L__unnamed_7, %edx movl $.L__unnamed_7, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9SynKerneli, %esi movl $.L__unnamed_8, %edx movl $.L__unnamed_8, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z8Lat_curri, %esi movl $.L__unnamed_9, %edx movl $.L__unnamed_9, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z13IsynRedKerneli, %esi movl $.L__unnamed_10, %edx movl $.L__unnamed_10, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7reduce1i, %esi movl $.L__unnamed_11, %edx movl $.L__unnamed_11, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10CalcUpdateid, %esi movl $.L__unnamed_12, %edx movl $.L__unnamed_12, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6WtUpdtv, %esi movl $.L__unnamed_13, %edx movl $.L__unnamed_13, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6cpyWtsPd, %esi movl $.L__unnamed_14, %edx movl $.L__unnamed_14, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z12initialize2DPdS_, %esi movl $.L__unnamed_15, %edx movl $.L__unnamed_15, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel1i, %esi movl $.L__unnamed_16, %edx movl $.L__unnamed_16, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel2i, %esi movl $.L__unnamed_17, %edx movl $.L__unnamed_17, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel3i, %esi movl $.L__unnamed_18, %edx movl $.L__unnamed_18, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel4i, %esi movl $.L__unnamed_19, %edx movl $.L__unnamed_19, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel5i, %esi movl $.L__unnamed_20, %edx movl $.L__unnamed_20, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel6i, %esi movl $.L__unnamed_21, %edx movl $.L__unnamed_21, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel7i, %esi movl $.L__unnamed_22, %edx movl $.L__unnamed_22, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel8i, %esi movl $.L__unnamed_23, %edx movl $.L__unnamed_23, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11convKernel9i, %esi movl $.L__unnamed_24, %edx movl $.L__unnamed_24, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z12convKernel10i, %esi movl $.L__unnamed_25, %edx movl $.L__unnamed_25, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z12convKernel11i, %esi movl $.L__unnamed_26, %edx movl $.L__unnamed_26, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z12convKernel12i, %esi movl $.L__unnamed_27, %edx movl $.L__unnamed_27, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $0, 8(%rsp) movl $0, (%rsp) movl $d_imgs, %esi movl $.L__unnamed_28, %edx movl $.L__unnamed_28, %ecx movl $157000000, %r9d # imm = 0x95BA140 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $img_spks, %esi movl $.L__unnamed_29, %edx movl $.L__unnamed_29, %ecx movl $6272000, %r9d # imm = 0x5FB400 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $syn1, %esi movl $.L__unnamed_30, %edx movl $.L__unnamed_30, %ecx movl $2048, %r9d # imm = 0x800 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $syn1s, %esi movl $.L__unnamed_31, %edx movl $.L__unnamed_31, %ecx movl $2048, %r9d # imm = 0x800 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $syn, %esi movl $.L__unnamed_32, %edx movl $.L__unnamed_32, %ecx movl $2048000, %r9d # imm = 0x1F4000 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $in_spk, %esi movl $.L__unnamed_33, %edx movl $.L__unnamed_33, %ecx movl $8112, %r9d # imm = 0x1FB0 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $Isyn, %esi movl $.L__unnamed_34, %edx movl $.L__unnamed_34, %ecx movl $648960, %r9d # imm = 0x9E700 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $weight, %esi movl $.L__unnamed_35, %edx movl $.L__unnamed_35, %ecx movl $648960, %r9d # imm = 0x9E700 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $Isyn_tot, %esi movl $.L__unnamed_36, %edx movl $.L__unnamed_36, %ecx movl $80, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $Isyn_lat, %esi movl $.L__unnamed_37, %edx movl $.L__unnamed_37, %ecx movl $80, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $I_lat, %esi movl $.L__unnamed_38, %edx movl $.L__unnamed_38, %ecx movl $80, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $D_op, %esi movl $.L__unnamed_39, %edx movl $.L__unnamed_39, %ecx movl $10000, %r9d # imm = 0x2710 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $err, %esi movl $.L__unnamed_40, %edx movl $.L__unnamed_40, %ecx movl $10, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $Y_op, %esi movl $.L__unnamed_41, %edx movl $.L__unnamed_41, %ecx movl $10, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $del_w, %esi movl $.L__unnamed_42, %edx movl $.L__unnamed_42, %ecx movl $648960, %r9d # imm = 0x9E700 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $ci, %esi movl $.L__unnamed_43, %edx movl $.L__unnamed_43, %ecx movl $64896, %r9d # imm = 0xFD80 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $d_hat, %esi movl $.L__unnamed_44, %edx movl $.L__unnamed_44, %ecx movl $64896, %r9d # imm = 0xFD80 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $cis, %esi movl $.L__unnamed_45, %edx movl $.L__unnamed_45, %ecx movl $64896, %r9d # imm = 0xFD80 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $norm_dh, %esi movl $.L__unnamed_46, %edx movl $.L__unnamed_46, %ecx movl $8, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $cil, %esi movl $.L__unnamed_47, %edx movl $.L__unnamed_47, %ecx movl $80, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $cils, %esi movl $.L__unnamed_48, %edx movl $.L__unnamed_48, %ecx movl $80, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $d_hat_sq, %esi movl $.L__unnamed_49, %edx movl $.L__unnamed_49, %ecx movl $64896, %r9d # imm = 0xFD80 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $ref_time1, %esi movl $.L__unnamed_50, %edx movl $.L__unnamed_50, %ecx movl $32448, %r9d # imm = 0x7EC0 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $ref_time2, %esi movl $.L__unnamed_51, %edx movl $.L__unnamed_51, %ecx movl $40, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $Vm1, %esi movl $.L__unnamed_52, %edx movl $.L__unnamed_52, %ecx movl $64896, %r9d # imm = 0xFD80 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $Vm2, %esi movl $.L__unnamed_53, %edx movl $.L__unnamed_53, %ecx movl $80, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $pix_spks, %esi movl $.L__unnamed_54, %edx movl $.L__unnamed_54, %ecx movl $256000, %r9d # imm = 0x3E800 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $I_in, %esi movl $.L__unnamed_55, %edx movl $.L__unnamed_55, %ecx movl $64896, %r9d # imm = 0xFD80 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $total_curr, %esi movl $.L__unnamed_56, %edx movl $.L__unnamed_56, %ecx movl $640, %r9d # imm = 0x280 movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $total_dhatsq, %esi movl $.L__unnamed_57, %edx movl $.L__unnamed_57, %ecx movl $64, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv1, %esi movl $.L__unnamed_58, %edx movl $.L__unnamed_58, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv2, %esi movl $.L__unnamed_59, %edx movl $.L__unnamed_59, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv3, %esi movl $.L__unnamed_60, %edx movl $.L__unnamed_60, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv4, %esi movl $.L__unnamed_61, %edx movl $.L__unnamed_61, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv5, %esi movl $.L__unnamed_62, %edx movl $.L__unnamed_62, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv6, %esi movl $.L__unnamed_63, %edx movl $.L__unnamed_63, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv7, %esi movl $.L__unnamed_64, %edx movl $.L__unnamed_64, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv8, %esi movl $.L__unnamed_65, %edx movl $.L__unnamed_65, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv9, %esi movl $.L__unnamed_66, %edx movl $.L__unnamed_66, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv10, %esi movl $.L__unnamed_67, %edx movl $.L__unnamed_67, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv11, %esi movl $.L__unnamed_68, %edx movl $.L__unnamed_68, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $0, 8(%rsp) movl $0, (%rsp) movl $w_conv12, %esi movl $.L__unnamed_69, %edx movl $.L__unnamed_69, %ecx movl $72, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end29: .size __hip_module_ctor, .Lfunc_end29-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB30_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB30_2: retq .Lfunc_end30: .size __hip_module_dtor, .Lfunc_end30-__hip_module_dtor .cfi_endproc # -- End function .type pix_spks_d,@object # @pix_spks_d .bss .globl pix_spks_d .p2align 3, 0x0 pix_spks_d: .quad 0 .size pix_spks_d, 8 .type d_imgs_lin,@object # @d_imgs_lin .globl d_imgs_lin .p2align 3, 0x0 d_imgs_lin: .quad 0 .size d_imgs_lin, 8 .type img_lin,@object # @img_lin .globl img_lin .p2align 4, 0x0 img_lin: .zero 157000000 .size img_lin, 157000000 .type test_set,@object # @test_set .globl test_set .p2align 4, 0x0 test_set: .zero 157000000 .size test_set, 157000000 .type d_imgs,@object # @d_imgs .local d_imgs .comm d_imgs,157000000,16 .type img_spks,@object # @img_spks .local img_spks .comm img_spks,6272000,16 .type syn1,@object # @syn1 .local syn1 .comm syn1,2048,16 .type syn1s,@object # @syn1s .local syn1s .comm syn1s,2048,16 .type syn,@object # @syn .local syn .comm syn,2048000,16 .type in_spk,@object # @in_spk .local in_spk .comm in_spk,8112,16 .type Isyn,@object # @Isyn .local Isyn .comm Isyn,648960,16 .type weight,@object # @weight .local weight .comm weight,648960,16 .type Isyn_tot,@object # @Isyn_tot .local Isyn_tot .comm Isyn_tot,80,16 .type Isyn_lat,@object # @Isyn_lat .local Isyn_lat .comm Isyn_lat,80,16 .type I_lat,@object # @I_lat .local I_lat .comm I_lat,80,16 .type D_op,@object # @D_op .local D_op .comm D_op,10000,16 .type err,@object # @err .local err .comm err,10,1 .type Y_op,@object # @Y_op .local Y_op .comm Y_op,10,1 .type del_w,@object # @del_w .local del_w .comm del_w,648960,16 .type ci,@object # @ci .local ci .comm ci,64896,16 .type d_hat,@object # @d_hat .local d_hat .comm d_hat,64896,16 .type cis,@object # @cis .local cis .comm cis,64896,16 .type norm_dh,@object # @norm_dh .local norm_dh .comm norm_dh,8,8 .type cil,@object # @cil .local cil .comm cil,80,16 .type cils,@object # @cils .local cils .comm cils,80,16 .type d_hat_sq,@object # @d_hat_sq .local d_hat_sq .comm d_hat_sq,64896,16 .type ref_time1,@object # @ref_time1 .local ref_time1 .comm ref_time1,32448,16 .type ref_time2,@object # @ref_time2 .local ref_time2 .comm ref_time2,40,16 .type Vm1,@object # @Vm1 .local Vm1 .comm Vm1,64896,16 .type Vm2,@object # @Vm2 .local Vm2 .comm Vm2,80,16 .type _Z14img_readKernelPi,@object # @_Z14img_readKernelPi .section .rodata,"a",@progbits .globl _Z14img_readKernelPi .p2align 3, 0x0 _Z14img_readKernelPi: .quad _Z29__device_stub__img_readKernelPi .size _Z14img_readKernelPi, 8 .type pix_spks,@object # @pix_spks .local pix_spks .comm pix_spks,256000,16 .type pix_spks_h,@object # @pix_spks_h .bss .globl pix_spks_h .p2align 4, 0x0 pix_spks_h: .zero 256000 .size pix_spks_h, 256000 .type _Z12convert2SpksPh,@object # @_Z12convert2SpksPh .section .rodata,"a",@progbits .globl _Z12convert2SpksPh .p2align 3, 0x0 _Z12convert2SpksPh: .quad _Z27__device_stub__convert2SpksPh .size _Z12convert2SpksPh, 8 .type pixspks,@object # @pixspks .bss .globl pixspks .p2align 4, 0x0 pixspks: .zero 256000 .size pixspks, 256000 .type _Z8pix2spksii,@object # @_Z8pix2spksii .section .rodata,"a",@progbits .globl _Z8pix2spksii .p2align 3, 0x0 _Z8pix2spksii: .quad _Z23__device_stub__pix2spksii .size _Z8pix2spksii, 8 .type _Z9createDesi,@object # @_Z9createDesi .globl _Z9createDesi .p2align 3, 0x0 _Z9createDesi: .quad _Z24__device_stub__createDesi .size _Z9createDesi, 8 .type I_in,@object # @I_in .local I_in .comm I_in,64896,16 .type _Z10clear_varsv,@object # @_Z10clear_varsv .globl _Z10clear_varsv .p2align 3, 0x0 _Z10clear_varsv: .quad _Z25__device_stub__clear_varsv .size _Z10clear_varsv, 8 .type _Z10LifKernel1i,@object # @_Z10LifKernel1i .globl _Z10LifKernel1i .p2align 3, 0x0 _Z10LifKernel1i: .quad _Z25__device_stub__LifKernel1i .size _Z10LifKernel1i, 8 .type _Z10LifKernel2i,@object # @_Z10LifKernel2i .globl _Z10LifKernel2i .p2align 3, 0x0 _Z10LifKernel2i: .quad _Z25__device_stub__LifKernel2i .size _Z10LifKernel2i, 8 .type _Z9SynKerneli,@object # @_Z9SynKerneli .globl _Z9SynKerneli .p2align 3, 0x0 _Z9SynKerneli: .quad _Z24__device_stub__SynKerneli .size _Z9SynKerneli, 8 .type _Z8Lat_curri,@object # @_Z8Lat_curri .globl _Z8Lat_curri .p2align 3, 0x0 _Z8Lat_curri: .quad _Z23__device_stub__Lat_curri .size _Z8Lat_curri, 8 .type total_curr,@object # @total_curr .local total_curr .comm total_curr,640,16 .type total_dhatsq,@object # @total_dhatsq .local total_dhatsq .comm total_dhatsq,64,16 .type _Z13IsynRedKerneli,@object # @_Z13IsynRedKerneli .globl _Z13IsynRedKerneli .p2align 3, 0x0 _Z13IsynRedKerneli: .quad _Z28__device_stub__IsynRedKerneli .size _Z13IsynRedKerneli, 8 .type _Z7reduce1i,@object # @_Z7reduce1i .globl _Z7reduce1i .p2align 3, 0x0 _Z7reduce1i: .quad _Z22__device_stub__reduce1i .size _Z7reduce1i, 8 .type _Z10CalcUpdateid,@object # @_Z10CalcUpdateid .globl _Z10CalcUpdateid .p2align 3, 0x0 _Z10CalcUpdateid: .quad _Z25__device_stub__CalcUpdateid .size _Z10CalcUpdateid, 8 .type _Z6WtUpdtv,@object # @_Z6WtUpdtv .globl _Z6WtUpdtv .p2align 3, 0x0 _Z6WtUpdtv: .quad _Z21__device_stub__WtUpdtv .size _Z6WtUpdtv, 8 .type _Z6cpyWtsPd,@object # @_Z6cpyWtsPd .globl _Z6cpyWtsPd .p2align 3, 0x0 _Z6cpyWtsPd: .quad _Z21__device_stub__cpyWtsPd .size _Z6cpyWtsPd, 8 .type w_conv1,@object # @w_conv1 .local w_conv1 .comm w_conv1,72,16 .type w_conv2,@object # @w_conv2 .local w_conv2 .comm w_conv2,72,16 .type w_conv3,@object # @w_conv3 .local w_conv3 .comm w_conv3,72,16 .type w_conv4,@object # @w_conv4 .local w_conv4 .comm w_conv4,72,16 .type w_conv5,@object # @w_conv5 .local w_conv5 .comm w_conv5,72,16 .type w_conv6,@object # @w_conv6 .local w_conv6 .comm w_conv6,72,16 .type w_conv7,@object # @w_conv7 .local w_conv7 .comm w_conv7,72,16 .type w_conv8,@object # @w_conv8 .local w_conv8 .comm w_conv8,72,16 .type w_conv9,@object # @w_conv9 .local w_conv9 .comm w_conv9,72,16 .type w_conv10,@object # @w_conv10 .local w_conv10 .comm w_conv10,72,16 .type w_conv11,@object # @w_conv11 .local w_conv11 .comm w_conv11,72,16 .type w_conv12,@object # @w_conv12 .local w_conv12 .comm w_conv12,72,16 .type _Z12initialize2DPdS_,@object # @_Z12initialize2DPdS_ .globl _Z12initialize2DPdS_ .p2align 3, 0x0 _Z12initialize2DPdS_: .quad _Z27__device_stub__initialize2DPdS_ .size _Z12initialize2DPdS_, 8 .type _Z11convKernel1i,@object # @_Z11convKernel1i .globl _Z11convKernel1i .p2align 3, 0x0 _Z11convKernel1i: .quad _Z26__device_stub__convKernel1i .size _Z11convKernel1i, 8 .type _Z11convKernel2i,@object # @_Z11convKernel2i .globl _Z11convKernel2i .p2align 3, 0x0 _Z11convKernel2i: .quad _Z26__device_stub__convKernel2i .size _Z11convKernel2i, 8 .type _Z11convKernel3i,@object # @_Z11convKernel3i .globl _Z11convKernel3i .p2align 3, 0x0 _Z11convKernel3i: .quad _Z26__device_stub__convKernel3i .size _Z11convKernel3i, 8 .type _Z11convKernel4i,@object # @_Z11convKernel4i .globl _Z11convKernel4i .p2align 3, 0x0 _Z11convKernel4i: .quad _Z26__device_stub__convKernel4i .size _Z11convKernel4i, 8 .type _Z11convKernel5i,@object # @_Z11convKernel5i .globl _Z11convKernel5i .p2align 3, 0x0 _Z11convKernel5i: .quad _Z26__device_stub__convKernel5i .size _Z11convKernel5i, 8 .type _Z11convKernel6i,@object # @_Z11convKernel6i .globl _Z11convKernel6i .p2align 3, 0x0 _Z11convKernel6i: .quad _Z26__device_stub__convKernel6i .size _Z11convKernel6i, 8 .type _Z11convKernel7i,@object # @_Z11convKernel7i .globl _Z11convKernel7i .p2align 3, 0x0 _Z11convKernel7i: .quad _Z26__device_stub__convKernel7i .size _Z11convKernel7i, 8 .type _Z11convKernel8i,@object # @_Z11convKernel8i .globl _Z11convKernel8i .p2align 3, 0x0 _Z11convKernel8i: .quad _Z26__device_stub__convKernel8i .size _Z11convKernel8i, 8 .type _Z11convKernel9i,@object # @_Z11convKernel9i .globl _Z11convKernel9i .p2align 3, 0x0 _Z11convKernel9i: .quad _Z26__device_stub__convKernel9i .size _Z11convKernel9i, 8 .type _Z12convKernel10i,@object # @_Z12convKernel10i .globl _Z12convKernel10i .p2align 3, 0x0 _Z12convKernel10i: .quad _Z27__device_stub__convKernel10i .size _Z12convKernel10i, 8 .type _Z12convKernel11i,@object # @_Z12convKernel11i .globl _Z12convKernel11i .p2align 3, 0x0 _Z12convKernel11i: .quad _Z27__device_stub__convKernel11i .size _Z12convKernel11i, 8 .type _Z12convKernel12i,@object # @_Z12convKernel12i .globl _Z12convKernel12i .p2align 3, 0x0 _Z12convKernel12i: .quad _Z27__device_stub__convKernel12i .size _Z12convKernel12i, 8 .type h_wts,@object # @h_wts .bss .globl h_wts .p2align 4, 0x0 h_wts: .zero 648960 .size h_wts, 648960 .type d_wts,@object # @d_wts .globl d_wts .p2align 3, 0x0 d_wts: .quad 0 .size d_wts, 8 .type dcwts,@object # @dcwts .globl dcwts .p2align 3, 0x0 dcwts: .quad 0 .size dcwts, 8 .type h_wts_saved,@object # @h_wts_saved .globl h_wts_saved .p2align 4, 0x0 h_wts_saved: .zero 648960 .size h_wts_saved, 648960 .type d_wts_saved,@object # @d_wts_saved .globl d_wts_saved .p2align 3, 0x0 d_wts_saved: .quad 0 .size d_wts_saved, 8 .type c_wts,@object # @c_wts .globl c_wts .p2align 4, 0x0 c_wts: .zero 864 .size c_wts, 864 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "pixels_spks.csv" .size .L.str, 16 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "r" .size .L.str.1, 2 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "Error while opening file pixels_spks.csv\n" .size .L.str.2, 42 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "mnist_train.csv" .size .L.str.3, 16 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "Error while opening file mnist_train.csv\n" .size .L.str.4, 42 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "wts_initial.csv" .size .L.str.5, 16 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "Error while opening file wts_trained.csv\n" .size .L.str.6, 42 .type .L.str.7,@object # @.str.7 .L.str.7: .asciz "kernels_3x3.csv" .size .L.str.7, 16 .type .L.str.8,@object # @.str.8 .L.str.8: .asciz "Error while opening file kernel.csv\n" .size .L.str.8, 37 .type .L.str.9,@object # @.str.9 .L.str.9: .asciz "Total no. of neurons=%d, no. of synapses to be trained=%d\n" .size .L.str.9, 59 .type .L.str.10,@object # @.str.10 .L.str.10: .asciz "%lf," .size .L.str.10, 5 .type .L.str.11,@object # @.str.11 .L.str.11: .asciz "%d," .size .L.str.11, 4 .type .L.str.12,@object # @.str.12 .L.str.12: .asciz "Epoch=%d\n" .size .L.str.12, 10 .type .L.str.13,@object # @.str.13 .L.str.13: .asciz "l=%d image %d\n" .size .L.str.13, 15 .type .L.str.14,@object # @.str.14 .L.str.14: .asciz "Elapsed time: %ld ms\n" .size .L.str.14, 22 .type .L.str.15,@object # @.str.15 .L.str.15: .asciz "wts_gpu%d.txt" .size .L.str.15, 14 .type .L.str.16,@object # @.str.16 .L.str.16: .asciz "w" .size .L.str.16, 2 .type .L.str.17,@object # @.str.17 .L.str.17: .asciz "Failed to open file wts_gpu_sample%d.txt\n" .size .L.str.17, 42 .type .L.str.19,@object # @.str.19 .L.str.19: .asciz "%0.14f," .size .L.str.19, 8 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z14img_readKernelPi" .size .L__unnamed_1, 21 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z12convert2SpksPh" .size .L__unnamed_2, 19 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "_Z8pix2spksii" .size .L__unnamed_3, 14 .type .L__unnamed_4,@object # @3 .L__unnamed_4: .asciz "_Z9createDesi" .size .L__unnamed_4, 14 .type .L__unnamed_5,@object # @4 .L__unnamed_5: .asciz "_Z10clear_varsv" .size .L__unnamed_5, 16 .type .L__unnamed_6,@object # @5 .L__unnamed_6: .asciz "_Z10LifKernel1i" .size .L__unnamed_6, 16 .type .L__unnamed_7,@object # @6 .L__unnamed_7: .asciz "_Z10LifKernel2i" .size .L__unnamed_7, 16 .type .L__unnamed_8,@object # @7 .L__unnamed_8: .asciz "_Z9SynKerneli" .size .L__unnamed_8, 14 .type .L__unnamed_9,@object # @8 .L__unnamed_9: .asciz "_Z8Lat_curri" .size .L__unnamed_9, 13 .type .L__unnamed_10,@object # @9 .L__unnamed_10: .asciz "_Z13IsynRedKerneli" .size .L__unnamed_10, 19 .type .L__unnamed_11,@object # @10 .L__unnamed_11: .asciz "_Z7reduce1i" .size .L__unnamed_11, 12 .type .L__unnamed_12,@object # @11 .L__unnamed_12: .asciz "_Z10CalcUpdateid" .size .L__unnamed_12, 17 .type .L__unnamed_13,@object # @12 .L__unnamed_13: .asciz "_Z6WtUpdtv" .size .L__unnamed_13, 11 .type .L__unnamed_14,@object # @13 .L__unnamed_14: .asciz "_Z6cpyWtsPd" .size .L__unnamed_14, 12 .type .L__unnamed_15,@object # @14 .L__unnamed_15: .asciz "_Z12initialize2DPdS_" .size .L__unnamed_15, 21 .type .L__unnamed_16,@object # @15 .L__unnamed_16: .asciz "_Z11convKernel1i" .size .L__unnamed_16, 17 .type .L__unnamed_17,@object # @16 .L__unnamed_17: .asciz "_Z11convKernel2i" .size .L__unnamed_17, 17 .type .L__unnamed_18,@object # @17 .L__unnamed_18: .asciz "_Z11convKernel3i" .size .L__unnamed_18, 17 .type .L__unnamed_19,@object # @18 .L__unnamed_19: .asciz "_Z11convKernel4i" .size .L__unnamed_19, 17 .type .L__unnamed_20,@object # @19 .L__unnamed_20: .asciz "_Z11convKernel5i" .size .L__unnamed_20, 17 .type .L__unnamed_21,@object # @20 .L__unnamed_21: .asciz "_Z11convKernel6i" .size .L__unnamed_21, 17 .type .L__unnamed_22,@object # @21 .L__unnamed_22: .asciz "_Z11convKernel7i" .size .L__unnamed_22, 17 .type .L__unnamed_23,@object # @22 .L__unnamed_23: .asciz "_Z11convKernel8i" .size .L__unnamed_23, 17 .type .L__unnamed_24,@object # @23 .L__unnamed_24: .asciz "_Z11convKernel9i" .size .L__unnamed_24, 17 .type .L__unnamed_25,@object # @24 .L__unnamed_25: .asciz "_Z12convKernel10i" .size .L__unnamed_25, 18 .type .L__unnamed_26,@object # @25 .L__unnamed_26: .asciz "_Z12convKernel11i" .size .L__unnamed_26, 18 .type .L__unnamed_27,@object # @26 .L__unnamed_27: .asciz "_Z12convKernel12i" .size .L__unnamed_27, 18 .type .L__unnamed_28,@object # @27 .L__unnamed_28: .asciz "d_imgs" .size .L__unnamed_28, 7 .type .L__unnamed_29,@object # @28 .L__unnamed_29: .asciz "img_spks" .size .L__unnamed_29, 9 .type .L__unnamed_30,@object # @29 .L__unnamed_30: .asciz "syn1" .size .L__unnamed_30, 5 .type .L__unnamed_31,@object # @30 .L__unnamed_31: .asciz "syn1s" .size .L__unnamed_31, 6 .type .L__unnamed_32,@object # @31 .L__unnamed_32: .asciz "syn" .size .L__unnamed_32, 4 .type .L__unnamed_33,@object # @32 .L__unnamed_33: .asciz "in_spk" .size .L__unnamed_33, 7 .type .L__unnamed_34,@object # @33 .L__unnamed_34: .asciz "Isyn" .size .L__unnamed_34, 5 .type .L__unnamed_35,@object # @34 .L__unnamed_35: .asciz "weight" .size .L__unnamed_35, 7 .type .L__unnamed_36,@object # @35 .L__unnamed_36: .asciz "Isyn_tot" .size .L__unnamed_36, 9 .type .L__unnamed_37,@object # @36 .L__unnamed_37: .asciz "Isyn_lat" .size .L__unnamed_37, 9 .type .L__unnamed_38,@object # @37 .L__unnamed_38: .asciz "I_lat" .size .L__unnamed_38, 6 .type .L__unnamed_39,@object # @38 .L__unnamed_39: .asciz "D_op" .size .L__unnamed_39, 5 .type .L__unnamed_40,@object # @39 .L__unnamed_40: .asciz "err" .size .L__unnamed_40, 4 .type .L__unnamed_41,@object # @40 .L__unnamed_41: .asciz "Y_op" .size .L__unnamed_41, 5 .type .L__unnamed_42,@object # @41 .L__unnamed_42: .asciz "del_w" .size .L__unnamed_42, 6 .type .L__unnamed_43,@object # @42 .L__unnamed_43: .asciz "ci" .size .L__unnamed_43, 3 .type .L__unnamed_44,@object # @43 .L__unnamed_44: .asciz "d_hat" .size .L__unnamed_44, 6 .type .L__unnamed_45,@object # @44 .L__unnamed_45: .asciz "cis" .size .L__unnamed_45, 4 .type .L__unnamed_46,@object # @45 .L__unnamed_46: .asciz "norm_dh" .size .L__unnamed_46, 8 .type .L__unnamed_47,@object # @46 .L__unnamed_47: .asciz "cil" .size .L__unnamed_47, 4 .type .L__unnamed_48,@object # @47 .L__unnamed_48: .asciz "cils" .size .L__unnamed_48, 5 .type .L__unnamed_49,@object # @48 .L__unnamed_49: .asciz "d_hat_sq" .size .L__unnamed_49, 9 .type .L__unnamed_50,@object # @49 .L__unnamed_50: .asciz "ref_time1" .size .L__unnamed_50, 10 .type .L__unnamed_51,@object # @50 .L__unnamed_51: .asciz "ref_time2" .size .L__unnamed_51, 10 .type .L__unnamed_52,@object # @51 .L__unnamed_52: .asciz "Vm1" .size .L__unnamed_52, 4 .type .L__unnamed_53,@object # @52 .L__unnamed_53: .asciz "Vm2" .size .L__unnamed_53, 4 .type .L__unnamed_54,@object # @53 .L__unnamed_54: .asciz "pix_spks" .size .L__unnamed_54, 9 .type .L__unnamed_55,@object # @54 .L__unnamed_55: .asciz "I_in" .size .L__unnamed_55, 5 .type .L__unnamed_56,@object # @55 .L__unnamed_56: .asciz "total_curr" .size .L__unnamed_56, 11 .type .L__unnamed_57,@object # @56 .L__unnamed_57: .asciz "total_dhatsq" .size .L__unnamed_57, 13 .type .L__unnamed_58,@object # @57 .L__unnamed_58: .asciz "w_conv1" .size .L__unnamed_58, 8 .type .L__unnamed_59,@object # @58 .L__unnamed_59: .asciz "w_conv2" .size .L__unnamed_59, 8 .type .L__unnamed_60,@object # @59 .L__unnamed_60: .asciz "w_conv3" .size .L__unnamed_60, 8 .type .L__unnamed_61,@object # @60 .L__unnamed_61: .asciz "w_conv4" .size .L__unnamed_61, 8 .type .L__unnamed_62,@object # @61 .L__unnamed_62: .asciz "w_conv5" .size .L__unnamed_62, 8 .type .L__unnamed_63,@object # @62 .L__unnamed_63: .asciz "w_conv6" .size .L__unnamed_63, 8 .type .L__unnamed_64,@object # @63 .L__unnamed_64: .asciz "w_conv7" .size .L__unnamed_64, 8 .type .L__unnamed_65,@object # @64 .L__unnamed_65: .asciz "w_conv8" .size .L__unnamed_65, 8 .type .L__unnamed_66,@object # @65 .L__unnamed_66: .asciz "w_conv9" .size .L__unnamed_66, 8 .type .L__unnamed_67,@object # @66 .L__unnamed_67: .asciz "w_conv10" .size .L__unnamed_67, 9 .type .L__unnamed_68,@object # @67 .L__unnamed_68: .asciz "w_conv11" .size .L__unnamed_68, 9 .type .L__unnamed_69,@object # @68 .L__unnamed_69: .asciz "w_conv12" .size .L__unnamed_69, 9 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "Copying the trained weights to the host for analysis" .size .Lstr, 53 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z29__device_stub__img_readKernelPi .addrsig_sym _Z27__device_stub__convert2SpksPh .addrsig_sym _Z23__device_stub__pix2spksii .addrsig_sym _Z24__device_stub__createDesi .addrsig_sym _Z25__device_stub__clear_varsv .addrsig_sym _Z25__device_stub__LifKernel1i .addrsig_sym _Z25__device_stub__LifKernel2i .addrsig_sym _Z24__device_stub__SynKerneli .addrsig_sym _Z23__device_stub__Lat_curri .addrsig_sym _Z28__device_stub__IsynRedKerneli .addrsig_sym _Z22__device_stub__reduce1i .addrsig_sym _Z25__device_stub__CalcUpdateid .addrsig_sym _Z21__device_stub__WtUpdtv .addrsig_sym _Z21__device_stub__cpyWtsPd .addrsig_sym _Z27__device_stub__initialize2DPdS_ .addrsig_sym _Z26__device_stub__convKernel1i .addrsig_sym _Z26__device_stub__convKernel2i .addrsig_sym _Z26__device_stub__convKernel3i .addrsig_sym _Z26__device_stub__convKernel4i .addrsig_sym _Z26__device_stub__convKernel5i .addrsig_sym _Z26__device_stub__convKernel6i .addrsig_sym _Z26__device_stub__convKernel7i .addrsig_sym _Z26__device_stub__convKernel8i .addrsig_sym _Z26__device_stub__convKernel9i .addrsig_sym _Z27__device_stub__convKernel10i .addrsig_sym _Z27__device_stub__convKernel11i .addrsig_sym _Z27__device_stub__convKernel12i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym pix_spks_d .addrsig_sym d_imgs_lin .addrsig_sym img_lin .addrsig_sym test_set .addrsig_sym d_imgs .addrsig_sym img_spks .addrsig_sym syn1 .addrsig_sym syn1s .addrsig_sym syn .addrsig_sym in_spk .addrsig_sym Isyn .addrsig_sym weight .addrsig_sym Isyn_tot .addrsig_sym Isyn_lat .addrsig_sym I_lat .addrsig_sym D_op .addrsig_sym err .addrsig_sym Y_op .addrsig_sym del_w .addrsig_sym ci .addrsig_sym d_hat .addrsig_sym cis .addrsig_sym norm_dh .addrsig_sym cil .addrsig_sym cils .addrsig_sym d_hat_sq .addrsig_sym ref_time1 .addrsig_sym ref_time2 .addrsig_sym Vm1 .addrsig_sym Vm2 .addrsig_sym _Z14img_readKernelPi .addrsig_sym pix_spks .addrsig_sym pix_spks_h .addrsig_sym _Z12convert2SpksPh .addrsig_sym _Z8pix2spksii .addrsig_sym _Z9createDesi .addrsig_sym I_in .addrsig_sym _Z10clear_varsv .addrsig_sym _Z10LifKernel1i .addrsig_sym _Z10LifKernel2i .addrsig_sym _Z9SynKerneli .addrsig_sym _Z8Lat_curri .addrsig_sym total_curr .addrsig_sym total_dhatsq .addrsig_sym _Z13IsynRedKerneli .addrsig_sym _Z7reduce1i .addrsig_sym _Z10CalcUpdateid .addrsig_sym _Z6WtUpdtv .addrsig_sym _Z6cpyWtsPd .addrsig_sym w_conv1 .addrsig_sym w_conv2 .addrsig_sym w_conv3 .addrsig_sym w_conv4 .addrsig_sym w_conv5 .addrsig_sym w_conv6 .addrsig_sym w_conv7 .addrsig_sym w_conv8 .addrsig_sym w_conv9 .addrsig_sym w_conv10 .addrsig_sym w_conv11 .addrsig_sym w_conv12 .addrsig_sym _Z12initialize2DPdS_ .addrsig_sym _Z11convKernel1i .addrsig_sym _Z11convKernel2i .addrsig_sym _Z11convKernel3i .addrsig_sym _Z11convKernel4i .addrsig_sym _Z11convKernel5i .addrsig_sym _Z11convKernel6i .addrsig_sym _Z11convKernel7i .addrsig_sym _Z11convKernel8i .addrsig_sym _Z11convKernel9i .addrsig_sym _Z12convKernel10i .addrsig_sym _Z12convKernel11i .addrsig_sym _Z12convKernel12i .addrsig_sym h_wts .addrsig_sym d_wts .addrsig_sym dcwts .addrsig_sym h_wts_saved .addrsig_sym d_wts_saved .addrsig_sym c_wts .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z14img_readKernelPi ; -- Begin function _Z14img_readKernelPi .globl _Z14img_readKernelPi .p2align 8 .type _Z14img_readKernelPi,@function _Z14img_readKernelPi: ; @_Z14img_readKernelPi ; %bb.0: s_load_b64 s[0:1], s[0:1], 0x0 v_mov_b32_e32 v0, 0 s_mov_b32 s6, 0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, d_imgs@rel32@lo+4 s_addc_u32 s3, s3, d_imgs@rel32@hi+12 .LBB0_1: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB0_2 Depth 2 s_mov_b64 s[4:5], 0 .LBB0_2: ; Parent Loop BB0_1 Depth=1 ; => This Inner Loop Header: Depth=2 s_waitcnt lgkmcnt(0) s_add_u32 s8, s0, s4 s_addc_u32 s9, s1, s5 global_load_b32 v1, v0, s[8:9] s_add_u32 s8, s2, s4 s_addc_u32 s9, s3, s5 s_add_u32 s4, s4, 4 s_addc_u32 s5, s5, 0 s_cmpk_eq_i32 s4, 0xc44 s_waitcnt vmcnt(0) global_store_b32 v0, v1, s[8:9] s_cbranch_scc0 .LBB0_2 ; %bb.3: ; in Loop: Header=BB0_1 Depth=1 s_add_i32 s6, s6, 1 s_add_u32 s0, s0, 0xc44 s_addc_u32 s1, s1, 0 s_add_u32 s2, s2, 0xc44 s_addc_u32 s3, s3, 0 s_cmpk_eq_u32 s6, 0xc350 s_cbranch_scc0 .LBB0_1 ; %bb.4: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z14img_readKernelPi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 8 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 2 .amdhsa_next_free_sgpr 10 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z14img_readKernelPi, .Lfunc_end0-_Z14img_readKernelPi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 144 ; NumSgprs: 10 ; NumVgprs: 2 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 1 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 10 ; NumVGPRsForWavesPerEU: 2 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z12convert2SpksPh ; -- Begin function _Z12convert2SpksPh .globl _Z12convert2SpksPh .p2align 8 .type _Z12convert2SpksPh,@function _Z12convert2SpksPh: ; @_Z12convert2SpksPh ; %bb.0: s_load_b64 s[0:1], s[0:1], 0x0 v_mov_b32_e32 v0, 0 s_mov_b32 s5, 0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, pix_spks@rel32@lo+4 s_addc_u32 s3, s3, pix_spks@rel32@hi+12 s_mov_b32 s4, s5 .LBB1_1: ; =>This Loop Header: Depth=1 ; Child Loop BB1_2 Depth 2 s_getpc_b64 s[6:7] s_add_u32 s6, s6, syn1@rel32@lo+4 s_addc_u32 s7, s7, syn1@rel32@hi+12 s_lshl_b64 s[8:9], s[4:5], 3 s_mov_b32 s10, s5 s_mov_b32 s11, s5 s_add_u32 s12, s8, s6 s_addc_u32 s13, s9, s7 v_dual_mov_b32 v1, s10 :: v_dual_mov_b32 v2, s11 s_getpc_b64 s[6:7] s_add_u32 s6, s6, syn1s@rel32@lo+4 s_addc_u32 s7, s7, syn1s@rel32@hi+12 s_add_u32 s8, s8, s6 s_addc_u32 s9, s9, s7 s_mov_b64 s[6:7], 0 s_clause 0x1 global_store_b64 v0, v[1:2], s[12:13] global_store_b64 v0, v[1:2], s[8:9] .LBB1_2: ; Parent Loop BB1_1 Depth=1 ; => This Inner Loop Header: Depth=2 s_waitcnt lgkmcnt(0) s_add_u32 s8, s0, s6 s_addc_u32 s9, s1, s7 global_load_u8 v1, v0, s[8:9] s_add_u32 s8, s2, s6 s_addc_u32 s9, s3, s7 s_add_u32 s6, s6, 1 s_addc_u32 s7, s7, 0 s_cmpk_eq_i32 s6, 0x3e8 s_waitcnt vmcnt(0) global_store_b8 v0, v1, s[8:9] s_cbranch_scc0 .LBB1_2 ; %bb.3: ; in Loop: Header=BB1_1 Depth=1 s_add_i32 s4, s4, 1 s_add_u32 s0, s0, 0x3e8 s_addc_u32 s1, s1, 0 s_add_u32 s2, s2, 0x3e8 s_addc_u32 s3, s3, 0 s_cmpk_lg_i32 s4, 0x100 s_cbranch_scc1 .LBB1_1 ; %bb.4: ; %.preheader.preheader v_mov_b32_e32 v4, 0 s_mov_b32 s9, 0 s_mov_b32 s4, 0x63f14120 s_mov_b32 s6, 0x2de00d2 s_mov_b32 s5, 0x3fef5dcc s_mov_b32 s7, 0x3fed8a09 s_mov_b32 s8, s9 s_getpc_b64 s[0:1] s_add_u32 s0, s0, pix_spks@rel32@lo+4 s_addc_u32 s1, s1, pix_spks@rel32@hi+12 s_getpc_b64 s[2:3] s_add_u32 s2, s2, syn@rel32@lo+4 s_addc_u32 s3, s3, syn@rel32@hi+12 .LBB1_5: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB1_6 Depth 2 s_getpc_b64 s[10:11] s_add_u32 s10, s10, syn1@rel32@lo+4 s_addc_u32 s11, s11, syn1@rel32@hi+12 s_lshl_b64 s[12:13], s[8:9], 3 s_mov_b64 s[16:17], s[2:3] s_add_u32 s10, s12, s10 s_addc_u32 s11, s13, s11 s_getpc_b64 s[14:15] s_add_u32 s14, s14, syn1s@rel32@lo+4 s_addc_u32 s15, s15, syn1s@rel32@hi+12 s_add_u32 s12, s12, s14 s_addc_u32 s13, s13, s15 s_clause 0x1 global_load_b64 v[2:3], v4, s[10:11] global_load_b64 v[0:1], v4, s[12:13] s_mov_b64 s[14:15], 0 .LBB1_6: ; Parent Loop BB1_5 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s14 s_addc_u32 s19, s1, s15 s_waitcnt vmcnt(1) v_mul_f64 v[2:3], v[2:3], s[4:5] global_load_u8 v5, v4, s[18:19] s_waitcnt vmcnt(1) v_mul_f64 v[0:1], v[0:1], s[6:7] s_waitcnt vmcnt(0) v_cmp_ne_u16_e32 vcc_lo, 1, v5 s_cbranch_vccnz .LBB1_8 ; %bb.7: ; in Loop: Header=BB1_6 Depth=2 v_add_f64 v[2:3], v[2:3], 1.0 s_delay_alu instid0(VALU_DEP_3) v_add_f64 v[0:1], v[0:1], 1.0 .LBB1_8: ; in Loop: Header=BB1_6 Depth=2 s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[5:6], v[2:3], -v[0:1] s_add_u32 s14, s14, 1 s_addc_u32 s15, s15, 0 global_store_b64 v4, v[5:6], s[16:17] s_add_u32 s16, s16, 8 s_addc_u32 s17, s17, 0 s_cmpk_eq_i32 s14, 0x3e8 s_cbranch_scc0 .LBB1_6 ; %bb.9: ; in Loop: Header=BB1_5 Depth=1 s_add_i32 s8, s8, 1 s_add_u32 s0, s0, 0x3e8 s_addc_u32 s1, s1, 0 s_add_u32 s2, s2, 0x1f40 s_addc_u32 s3, s3, 0 s_cmpk_eq_i32 s8, 0x100 s_clause 0x1 global_store_b64 v4, v[2:3], s[10:11] global_store_b64 v4, v[0:1], s[12:13] s_cbranch_scc0 .LBB1_5 ; %bb.10: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z12convert2SpksPh .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 8 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z12convert2SpksPh, .Lfunc_end1-_Z12convert2SpksPh ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 592 ; NumSgprs: 22 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z8pix2spksii ; -- Begin function _Z8pix2spksii .globl _Z8pix2spksii .p2align 8 .type _Z8pix2spksii,@function _Z8pix2spksii: ; @_Z8pix2spksii ; %bb.0: s_load_b32 s2, s[0:1], 0x14 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e32 0x310, v1 s_cbranch_execz .LBB2_2 ; %bb.1: s_load_b64 s[0:1], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[2:3] s_add_u32 s2, s2, d_imgs@rel32@lo+4 s_addc_u32 s3, s3, d_imgs@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[1:2] s_waitcnt lgkmcnt(0) s_mul_i32 s4, s0, 0xc44 s_mul_hi_i32 s0, s0, 0xc44 s_add_u32 s2, s4, s2 s_addc_u32 s0, s0, s3 v_add_co_u32 v2, vcc_lo, s2, v2 v_add_co_ci_u32_e32 v3, vcc_lo, s0, v3, vcc_lo s_getpc_b64 s[2:3] s_add_u32 s2, s2, syn@rel32@lo+4 s_addc_u32 s3, s3, syn@rel32@hi+12 s_mov_b32 s0, s1 s_ashr_i32 s1, s1, 31 global_load_b32 v0, v[2:3], off offset:4 s_lshl_b64 s[0:1], s[0:1], 3 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s2, s0, s2 s_addc_u32 s3, s1, s3 s_waitcnt vmcnt(0) v_mad_i64_i32 v[2:3], null, 0x1f40, v0, s[2:3] s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 s_add_u32 s0, s0, s2 s_addc_u32 s1, s1, s3 s_delay_alu instid0(SALU_CYCLE_1) v_mad_i64_i32 v[4:5], null, 0x1f40, v1, s[0:1] global_load_b64 v[2:3], v[2:3], off s_waitcnt vmcnt(0) global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv .LBB2_2: s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z8pix2spksii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end2: .size _Z8pix2spksii, .Lfunc_end2-_Z8pix2spksii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 284 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z9createDesi ; -- Begin function _Z9createDesi .globl _Z9createDesi .p2align 8 .type _Z9createDesi,@function _Z9createDesi: ; @_Z9createDesi ; %bb.0: s_load_b32 s2, s[0:1], 0x14 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e32 10, v2 s_cbranch_execz .LBB3_6 ; %bb.1: ; %.preheader13 s_getpc_b64 s[2:3] s_add_u32 s2, s2, D_op@rel32@lo+4 s_addc_u32 s3, s3, D_op@rel32@hi+12 v_mov_b32_e32 v3, 0 v_mad_i64_i32 v[0:1], null, 0x3e8, v2, s[2:3] s_mov_b64 s[2:3], 0 .LBB3_2: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_add_co_u32 v4, vcc_lo, v0, s2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo s_add_u32 s2, s2, 1 s_addc_u32 s3, s3, 0 s_cmpk_eq_i32 s2, 0x3e8 global_store_b8 v[4:5], v3, off s_cbranch_scc0 .LBB3_2 ; %bb.3: s_load_b32 s2, s[0:1], 0x0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, d_imgs@rel32@lo+4 s_addc_u32 s1, s1, d_imgs@rel32@hi+12 s_waitcnt lgkmcnt(0) s_mul_i32 s3, s2, 0xc44 s_mul_hi_i32 s2, s2, 0xc44 s_add_u32 s0, s3, s0 s_addc_u32 s1, s2, s1 s_load_b32 s0, s[0:1], 0x0 s_waitcnt lgkmcnt(0) v_cmp_eq_u32_e32 vcc_lo, s0, v2 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB3_6 ; %bb.4: ; %.preheader.preheader v_mov_b32_e32 v2, 1 s_mov_b64 s[0:1], 0x64 .LBB3_5: ; %.preheader ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v3, vcc_lo, v0, s0 v_add_co_ci_u32_e32 v4, vcc_lo, s1, v1, vcc_lo s_add_u32 s2, s0, 35 s_addc_u32 s3, s1, 0 s_cmpk_lt_u32 s0, 0x3c5 s_mov_b64 s[0:1], s[2:3] global_store_b8 v[3:4], v2, off s_cbranch_scc1 .LBB3_5 .LBB3_6: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9createDesi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end3: .size _Z9createDesi, .Lfunc_end3-_Z9createDesi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 276 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z10clear_varsv ; -- Begin function _Z10clear_varsv .globl _Z10clear_varsv .p2align 8 .type _Z10clear_varsv,@function _Z10clear_varsv: ; @_Z10clear_varsv ; %bb.0: s_load_b32 s0, s[0:1], 0xc v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s1, s0, 16 s_and_b32 s0, s0, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s0, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s1, v[3:4] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, 0x1fb0, v0 v_cmp_gt_i32_e64 s0, 10, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, vcc_lo, s0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB4_2 ; %bb.1: v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, Vm2@rel32@lo+4 s_addc_u32 s1, s1, Vm2@rel32@hi+12 s_getpc_b64 s[4:5] s_add_u32 s4, s4, Isyn_tot@rel32@lo+4 s_addc_u32 s5, s5, Isyn_tot@rel32@hi+12 s_mov_b32 s2, 0x1eb851ec s_mov_b32 s6, 0 v_lshlrev_b64 v[3:4], 3, v[1:2] v_lshlrev_b64 v[9:10], 2, v[1:2] v_ashrrev_i32_e32 v1, 31, v0 s_mov_b32 s3, 0xbfb1eb85 s_mov_b32 s7, s6 v_dual_mov_b32 v6, s3 :: v_dual_mov_b32 v5, s2 v_add_co_u32 v7, vcc_lo, v3, s0 v_add_co_ci_u32_e32 v8, vcc_lo, s1, v4, vcc_lo v_add_co_u32 v11, vcc_lo, v3, s4 v_lshlrev_b64 v[15:16], 3, v[0:1] s_getpc_b64 s[0:1] s_add_u32 s0, s0, ref_time2@rel32@lo+4 s_addc_u32 s1, s1, ref_time2@rel32@hi+12 v_add_co_ci_u32_e32 v12, vcc_lo, s5, v4, vcc_lo v_add_co_u32 v9, vcc_lo, v9, s0 v_lshlrev_b64 v[1:2], 2, v[0:1] v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo s_getpc_b64 s[0:1] s_add_u32 s0, s0, Vm1@rel32@lo+4 s_addc_u32 s1, s1, Vm1@rel32@hi+12 v_add_co_u32 v17, vcc_lo, v15, s0 v_dual_mov_b32 v14, s7 :: v_dual_mov_b32 v13, s6 s_getpc_b64 s[2:3] s_add_u32 s2, s2, ref_time1@rel32@lo+4 s_addc_u32 s3, s3, ref_time1@rel32@hi+12 v_add_co_ci_u32_e32 v18, vcc_lo, s1, v16, vcc_lo v_mov_b32_e32 v19, 0 v_add_co_u32 v1, vcc_lo, v1, s2 v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo global_store_b64 v[7:8], v[5:6], off global_store_b64 v[11:12], v[13:14], off global_store_b32 v[9:10], v19, off global_store_b64 v[17:18], v[5:6], off global_store_b32 v[1:2], v19, off v_mad_i64_i32 v[1:2], null, 0x50, v0, v[3:4] s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 v_add_co_u32 v5, vcc_lo, v15, s0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, del_w@rel32@lo+4 s_addc_u32 s3, s3, del_w@rel32@hi+12 v_add_co_ci_u32_e32 v6, vcc_lo, s1, v16, vcc_lo v_add_co_u32 v7, vcc_lo, v1, s2 s_getpc_b64 s[0:1] s_add_u32 s0, s0, Isyn@rel32@lo+4 s_addc_u32 s1, s1, Isyn@rel32@hi+12 v_add_co_ci_u32_e32 v8, vcc_lo, s3, v2, vcc_lo v_add_co_u32 v0, vcc_lo, v1, s0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, ci@rel32@lo+4 s_addc_u32 s3, s3, ci@rel32@hi+12 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo v_add_co_u32 v9, vcc_lo, v15, s2 v_add_co_ci_u32_e32 v10, vcc_lo, s3, v16, vcc_lo s_getpc_b64 s[0:1] s_add_u32 s0, s0, cis@rel32@lo+4 s_addc_u32 s1, s1, cis@rel32@hi+12 global_store_b64 v[5:6], v[13:14], off global_store_b64 v[7:8], v[13:14], off global_store_b64 v[0:1], v[13:14], off global_store_b64 v[9:10], v[13:14], off v_add_co_u32 v0, vcc_lo, v15, s0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, d_hat@rel32@lo+4 s_addc_u32 s3, s3, d_hat@rel32@hi+12 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v16, vcc_lo v_add_co_u32 v5, vcc_lo, v15, s2 s_getpc_b64 s[0:1] s_add_u32 s0, s0, cil@rel32@lo+4 s_addc_u32 s1, s1, cil@rel32@hi+12 v_add_co_ci_u32_e32 v6, vcc_lo, s3, v16, vcc_lo v_add_co_u32 v7, vcc_lo, v3, s0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, cils@rel32@lo+4 s_addc_u32 s3, s3, cils@rel32@hi+12 v_add_co_ci_u32_e32 v8, vcc_lo, s1, v4, vcc_lo v_add_co_u32 v9, vcc_lo, v3, s2 s_getpc_b64 s[0:1] s_add_u32 s0, s0, Isyn_lat@rel32@lo+4 s_addc_u32 s1, s1, Isyn_lat@rel32@hi+12 v_add_co_ci_u32_e32 v10, vcc_lo, s3, v4, vcc_lo v_add_co_u32 v2, vcc_lo, v3, s0 v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo global_store_b64 v[0:1], v[13:14], off global_store_b64 v[5:6], v[13:14], off global_store_b64 v[7:8], v[13:14], off global_store_b64 v[9:10], v[13:14], off global_store_b64 v[2:3], v[13:14], off .LBB4_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10clear_varsv .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 256 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 20 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end4: .size _Z10clear_varsv, .Lfunc_end4-_Z10clear_varsv ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 764 ; NumSgprs: 18 ; NumVgprs: 20 ; ScratchSize: 0 ; MemoryBound: 1 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 20 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z10LifKernel1i ; -- Begin function _Z10LifKernel1i .globl _Z10LifKernel1i .p2align 8 .type _Z10LifKernel1i,@function _Z10LifKernel1i: ; @_Z10LifKernel1i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e32 0x1fb0, v1 s_cbranch_execz .LBB5_6 ; %bb.1: v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[2:3] s_add_u32 s2, s2, ref_time1@rel32@lo+4 s_addc_u32 s3, s3, ref_time1@rel32@hi+12 s_load_b32 s0, s[0:1], 0x0 s_mov_b32 s1, exec_lo v_lshlrev_b64 v[3:4], 2, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo global_load_b32 v0, v[3:4], off s_waitcnt vmcnt(0) lgkmcnt(0) v_cmpx_gt_i32_e64 s0, v0 s_cbranch_execz .LBB5_3 ; %bb.2: v_mov_b32_e32 v0, 0 global_store_b32 v[3:4], v0, off .LBB5_3: s_or_b32 exec_lo, exec_lo, s1 v_lshlrev_b64 v[7:8], 3, v[1:2] s_getpc_b64 s[2:3] s_add_u32 s2, s2, Vm1@rel32@lo+4 s_addc_u32 s3, s3, Vm1@rel32@hi+12 s_mov_b32 s4, 0x29a4692b s_mov_b32 s5, 0xbe601b2b s_mov_b32 s6, 0xe361ce4c s_mov_b32 s7, 0x3df49da7 v_add_co_u32 v5, vcc_lo, v7, s2 v_add_co_ci_u32_e32 v6, vcc_lo, s3, v8, vcc_lo s_getpc_b64 s[2:3] s_add_u32 s2, s2, I_in@rel32@lo+4 s_addc_u32 s3, s3, I_in@rel32@hi+12 v_add_co_u32 v7, vcc_lo, v7, s2 global_load_b64 v[9:10], v[5:6], off v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo s_mov_b32 s3, 0x3fb1eb85 s_mov_b32 s2, 0x1eb851ec s_mov_b32 s8, 0xeb1c432d global_load_b64 v[7:8], v[7:8], off s_mov_b32 s9, 0x3f1a36e2 s_mov_b32 s1, exec_lo s_waitcnt vmcnt(1) v_add_f64 v[11:12], v[9:10], s[2:3] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[11:12], v[11:12], s[4:5], v[7:8] v_div_scale_f64 v[13:14], null, s[6:7], s[6:7], v[11:12] v_div_scale_f64 v[19:20], vcc_lo, v[11:12], s[6:7], v[11:12] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[15:16], v[13:14] s_waitcnt_depctr 0xfff v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0 v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0 v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[17:18], v[19:20], v[15:16] v_fma_f64 v[13:14], -v[13:14], v[17:18], v[19:20] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[13:14], v[13:14], v[15:16], v[17:18] v_div_fixup_f64 v[11:12], v[13:14], s[6:7], v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[13:14], v[11:12], s[8:9], v[9:10] v_add_f64 v[13:14], v[13:14], s[2:3] s_mov_b32 s3, 0xbfb1eb85 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[7:8], v[13:14], s[4:5], v[7:8] v_div_scale_f64 v[13:14], null, s[6:7], s[6:7], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[15:16], v[13:14] s_waitcnt_depctr 0xfff v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0 v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[17:18], -v[13:14], v[15:16], 1.0 v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16] v_div_scale_f64 v[17:18], vcc_lo, v[7:8], s[6:7], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[19:20], v[17:18], v[15:16] v_fma_f64 v[13:14], -v[13:14], v[19:20], v[17:18] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[13:14], v[13:14], v[15:16], v[19:20] v_cmp_eq_u32_e32 vcc_lo, 0, v0 v_div_fixup_f64 v[7:8], v[13:14], s[6:7], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[7:8], v[11:12], v[7:8] v_mul_f64 v[7:8], v[7:8], s[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mul_f64 v[11:12], v[7:8], 0.5 v_cndmask_b32_e64 v8, 0, 0x3ff00000, vcc_lo v_mov_b32_e32 v7, 0 v_fma_f64 v[8:9], v[11:12], v[7:8], v[9:10] s_delay_alu instid0(VALU_DEP_1) v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[8:9] s_mov_b32 s2, 0x47ae147b s_mov_b32 s3, 0x3f947ae1 v_cndmask_b32_e32 v8, 0x1eb851ec, v8, vcc_lo v_cndmask_b32_e32 v9, 0xbfb1eb85, v9, vcc_lo global_store_b64 v[5:6], v[8:9], off v_cmpx_le_f64_e32 s[2:3], v[8:9] s_cbranch_execz .LBB5_5 ; %bb.4: s_add_i32 s0, s0, 30 v_dual_mov_b32 v8, 0x1eb851ec :: v_dual_mov_b32 v7, 1 v_dual_mov_b32 v9, 0xbfb1eb85 :: v_dual_mov_b32 v0, s0 global_store_b64 v[5:6], v[8:9], off global_store_b32 v[3:4], v0, off .LBB5_5: s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, in_spk@rel32@lo+4 s_addc_u32 s1, s1, in_spk@rel32@hi+12 v_add_co_u32 v0, vcc_lo, v1, s0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo global_store_b8 v[0:1], v7, off s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv .LBB5_6: s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10LifKernel1i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 21 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end5: .size _Z10LifKernel1i, .Lfunc_end5-_Z10LifKernel1i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 804 ; NumSgprs: 18 ; NumVgprs: 21 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 21 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z10LifKernel2i ; -- Begin function _Z10LifKernel2i .globl _Z10LifKernel2i .p2align 8 .type _Z10LifKernel2i,@function _Z10LifKernel2i: ; @_Z10LifKernel2i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e32 10, v1 s_cbranch_execz .LBB6_6 ; %bb.1: v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[2:3] s_add_u32 s2, s2, ref_time2@rel32@lo+4 s_addc_u32 s3, s3, ref_time2@rel32@hi+12 s_load_b32 s0, s[0:1], 0x0 s_mov_b32 s1, exec_lo v_lshlrev_b64 v[3:4], 2, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo global_load_b32 v0, v[3:4], off s_waitcnt vmcnt(0) lgkmcnt(0) v_cmpx_gt_i32_e64 s0, v0 s_cbranch_execz .LBB6_3 ; %bb.2: v_mov_b32_e32 v0, 0 global_store_b32 v[3:4], v0, off .LBB6_3: s_or_b32 exec_lo, exec_lo, s1 v_lshlrev_b64 v[7:8], 3, v[1:2] s_getpc_b64 s[2:3] s_add_u32 s2, s2, Vm2@rel32@lo+4 s_addc_u32 s3, s3, Vm2@rel32@hi+12 s_mov_b32 s4, 0x29a4692b s_mov_b32 s5, 0xbe601b2b s_mov_b32 s6, 0xe361ce4c s_mov_b32 s7, 0x3df49da7 v_add_co_u32 v5, vcc_lo, v7, s2 v_add_co_ci_u32_e32 v6, vcc_lo, s3, v8, vcc_lo s_getpc_b64 s[2:3] s_add_u32 s2, s2, Isyn_tot@rel32@lo+4 s_addc_u32 s3, s3, Isyn_tot@rel32@hi+12 v_add_co_u32 v11, vcc_lo, v7, s2 global_load_b64 v[9:10], v[5:6], off v_add_co_ci_u32_e32 v12, vcc_lo, s3, v8, vcc_lo s_getpc_b64 s[2:3] s_add_u32 s2, s2, Isyn_lat@rel32@lo+4 s_addc_u32 s3, s3, Isyn_lat@rel32@hi+12 v_add_co_u32 v7, vcc_lo, v7, s2 global_load_b64 v[11:12], v[11:12], off v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo s_mov_b32 s3, 0x3fb1eb85 s_mov_b32 s2, 0x1eb851ec s_mov_b32 s8, 0xeb1c432d global_load_b64 v[7:8], v[7:8], off s_mov_b32 s9, 0x3f1a36e2 s_mov_b32 s1, exec_lo s_waitcnt vmcnt(2) v_add_f64 v[13:14], v[9:10], s[2:3] s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[13:14], v[13:14], s[4:5], v[11:12] s_waitcnt vmcnt(0) v_add_f64 v[13:14], v[7:8], v[13:14] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f64 v[15:16], null, s[6:7], s[6:7], v[13:14] v_div_scale_f64 v[21:22], vcc_lo, v[13:14], s[6:7], v[13:14] v_rcp_f64_e32 v[17:18], v[15:16] s_waitcnt_depctr 0xfff v_fma_f64 v[19:20], -v[15:16], v[17:18], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18] v_fma_f64 v[19:20], -v[15:16], v[17:18], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18] v_mul_f64 v[19:20], v[21:22], v[17:18] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[15:16], -v[15:16], v[19:20], v[21:22] v_div_fmas_f64 v[15:16], v[15:16], v[17:18], v[19:20] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fixup_f64 v[13:14], v[15:16], s[6:7], v[13:14] v_fma_f64 v[15:16], v[13:14], s[8:9], v[9:10] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_f64 v[15:16], v[15:16], s[2:3] s_mov_b32 s3, 0xbfb1eb85 v_fma_f64 v[11:12], v[15:16], s[4:5], v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[7:8], v[7:8], v[11:12] v_div_scale_f64 v[11:12], null, s[6:7], s[6:7], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[15:16], v[11:12] s_waitcnt_depctr 0xfff v_fma_f64 v[17:18], -v[11:12], v[15:16], 1.0 v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[17:18], -v[11:12], v[15:16], 1.0 v_fma_f64 v[15:16], v[15:16], v[17:18], v[15:16] v_div_scale_f64 v[17:18], vcc_lo, v[7:8], s[6:7], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[19:20], v[17:18], v[15:16] v_fma_f64 v[11:12], -v[11:12], v[19:20], v[17:18] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_fmas_f64 v[11:12], v[11:12], v[15:16], v[19:20] v_cmp_eq_u32_e32 vcc_lo, 0, v0 v_div_fixup_f64 v[7:8], v[11:12], s[6:7], v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[7:8], v[13:14], v[7:8] v_mul_f64 v[7:8], v[7:8], s[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_mul_f64 v[11:12], v[7:8], 0.5 v_cndmask_b32_e64 v8, 0, 0x3ff00000, vcc_lo v_mov_b32_e32 v7, 0 v_fma_f64 v[8:9], v[11:12], v[7:8], v[9:10] s_delay_alu instid0(VALU_DEP_1) v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[8:9] s_mov_b32 s2, 0x47ae147b s_mov_b32 s3, 0x3f947ae1 v_cndmask_b32_e32 v8, 0x1eb851ec, v8, vcc_lo v_cndmask_b32_e32 v9, 0xbfb1eb85, v9, vcc_lo global_store_b64 v[5:6], v[8:9], off v_cmpx_le_f64_e32 s[2:3], v[8:9] s_cbranch_execz .LBB6_5 ; %bb.4: s_add_i32 s2, s0, 30 v_dual_mov_b32 v8, 0x1eb851ec :: v_dual_mov_b32 v7, 1 v_dual_mov_b32 v9, 0xbfb1eb85 :: v_dual_mov_b32 v0, s2 global_store_b64 v[5:6], v[8:9], off global_store_b32 v[3:4], v0, off .LBB6_5: s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[2:3] s_add_u32 s2, s2, D_op@rel32@lo+4 s_addc_u32 s3, s3, D_op@rel32@hi+12 s_getpc_b64 s[4:5] s_add_u32 s4, s4, Y_op@rel32@lo+4 s_addc_u32 s5, s5, Y_op@rel32@hi+12 s_ashr_i32 s1, s0, 31 s_add_u32 s0, s0, s2 s_addc_u32 s1, s1, s3 s_delay_alu instid0(SALU_CYCLE_1) v_mad_i64_i32 v[3:4], null, 0x3e8, v1, s[0:1] s_getpc_b64 s[0:1] s_add_u32 s0, s0, err@rel32@lo+4 s_addc_u32 s1, s1, err@rel32@hi+12 global_load_u8 v5, v[3:4], off v_add_co_u32 v3, vcc_lo, v1, s4 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo v_add_co_u32 v0, vcc_lo, v1, s0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo s_waitcnt vmcnt(0) v_sub_nc_u16 v2, v5, v7 global_store_b8 v[3:4], v7, off global_store_b8 v[0:1], v2, off s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv .LBB6_6: s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10LifKernel2i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 23 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end6: .size _Z10LifKernel2i, .Lfunc_end6-_Z10LifKernel2i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 972 ; NumSgprs: 18 ; NumVgprs: 23 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 23 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z9SynKerneli ; -- Begin function _Z9SynKerneli .globl _Z9SynKerneli .p2align 8 .type _Z9SynKerneli,@function _Z9SynKerneli: ; @_Z9SynKerneli ; %bb.0: s_load_b32 s0, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v4, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s1, s0, 16 s_and_b32 s0, s0, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[0:1], null, s14, s0, v[2:3] v_mad_u64_u32 v[2:3], null, s15, s1, v[4:5] v_cmp_gt_i32_e32 vcc_lo, 0x1fb0, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_i32_e64 s0, 10, v2 s_and_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB7_6 ; %bb.1: v_ashrrev_i32_e32 v1, 31, v0 s_mov_b32 s0, exec_lo s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[3:4], 3, v[0:1] v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB7_5 ; %bb.2: s_getpc_b64 s[2:3] s_add_u32 s2, s2, ci@rel32@lo+4 s_addc_u32 s3, s3, ci@rel32@hi+12 v_add_co_u32 v5, vcc_lo, v3, s2 s_getpc_b64 s[4:5] s_add_u32 s4, s4, cis@rel32@lo+4 s_addc_u32 s5, s5, cis@rel32@hi+12 v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo v_add_co_u32 v7, vcc_lo, v3, s4 v_add_co_ci_u32_e32 v8, vcc_lo, s5, v4, vcc_lo global_load_b64 v[9:10], v[5:6], off global_load_b64 v[11:12], v[7:8], off s_getpc_b64 s[2:3] s_add_u32 s2, s2, in_spk@rel32@lo+4 s_addc_u32 s3, s3, in_spk@rel32@hi+12 v_add_co_u32 v13, vcc_lo, v0, s2 v_add_co_ci_u32_e32 v14, vcc_lo, s3, v1, vcc_lo s_mov_b32 s2, 0x63f14120 s_mov_b32 s4, 0x2de00d2 s_mov_b32 s3, 0x3fef5dcc global_load_u8 v1, v[13:14], off s_mov_b32 s5, 0x3fed8a09 s_mov_b32 s1, exec_lo s_waitcnt vmcnt(2) v_mul_f64 v[9:10], v[9:10], s[2:3] s_waitcnt vmcnt(1) v_mul_f64 v[11:12], v[11:12], s[4:5] global_store_b64 v[5:6], v[9:10], off global_store_b64 v[7:8], v[11:12], off s_waitcnt vmcnt(0) v_cmpx_eq_u16_e32 1, v1 s_cbranch_execz .LBB7_4 ; %bb.3: v_add_f64 v[9:10], v[9:10], 1.0 v_add_f64 v[11:12], v[11:12], 1.0 global_store_b64 v[5:6], v[9:10], off global_store_b64 v[7:8], v[11:12], off .LBB7_4: s_or_b32 exec_lo, exec_lo, s1 v_add_f64 v[5:6], v[9:10], -v[11:12] s_mov_b32 s2, 0xeb1c432d s_mov_b32 s3, 0x3f1a36e2 s_getpc_b64 s[4:5] s_add_u32 s4, s4, d_hat@rel32@lo+4 s_addc_u32 s5, s5, d_hat@rel32@hi+12 v_add_co_u32 v11, vcc_lo, v3, s4 v_add_co_ci_u32_e32 v12, vcc_lo, s5, v4, vcc_lo global_load_b64 v[13:14], v[11:12], off v_mul_f64 v[5:6], v[5:6], s[2:3] s_mov_b32 s2, 0xe361ce4c s_mov_b32 s3, 0x3df49da7 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_div_scale_f64 v[7:8], null, s[2:3], s[2:3], v[5:6] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[9:10], v[7:8] s_waitcnt_depctr 0xfff v_fma_f64 v[15:16], -v[7:8], v[9:10], 1.0 v_fma_f64 v[9:10], v[9:10], v[15:16], v[9:10] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[15:16], -v[7:8], v[9:10], 1.0 v_fma_f64 v[9:10], v[9:10], v[15:16], v[9:10] v_div_scale_f64 v[15:16], vcc_lo, v[5:6], s[2:3], v[5:6] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[17:18], v[15:16], v[9:10] v_fma_f64 v[7:8], -v[7:8], v[17:18], v[15:16] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[17:18] v_div_fixup_f64 v[5:6], v[7:8], s[2:3], v[5:6] s_mov_b32 s2, 0x212d7732 s_mov_b32 s3, 0x3fecf41f s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[5:6], v[13:14], s[2:3], v[5:6] s_getpc_b64 s[2:3] s_add_u32 s2, s2, d_hat_sq@rel32@lo+4 s_addc_u32 s3, s3, d_hat_sq@rel32@hi+12 v_add_co_u32 v9, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v10, vcc_lo, s3, v4, vcc_lo s_delay_alu instid0(VALU_DEP_3) v_mul_f64 v[7:8], v[5:6], v[5:6] global_store_b64 v[11:12], v[5:6], off global_store_b64 v[9:10], v[7:8], off .LBB7_5: ; %Flow s_or_b32 exec_lo, exec_lo, s0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, ci@rel32@lo+4 s_addc_u32 s1, s1, ci@rel32@hi+12 v_add_co_u32 v5, vcc_lo, v3, s0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, cis@rel32@lo+4 s_addc_u32 s3, s3, cis@rel32@hi+12 v_add_co_ci_u32_e32 v6, vcc_lo, s1, v4, vcc_lo v_add_co_u32 v3, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv global_load_b64 v[5:6], v[5:6], off global_load_b64 v[7:8], v[3:4], off v_ashrrev_i32_e32 v3, 31, v2 s_getpc_b64 s[0:1] s_add_u32 s0, s0, weight@rel32@lo+4 s_addc_u32 s1, s1, weight@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[1:2], 3, v[2:3] v_mad_i64_i32 v[3:4], null, 0x50, v0, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v3, s0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo s_getpc_b64 s[0:1] s_add_u32 s0, s0, Isyn@rel32@lo+4 s_addc_u32 s1, s1, Isyn@rel32@hi+12 v_add_co_u32 v2, vcc_lo, v3, s0 global_load_b64 v[0:1], v[0:1], off v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo s_waitcnt vmcnt(1) v_add_f64 v[5:6], v[5:6], -v[7:8] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_mul_f64 v[0:1], v[5:6], v[0:1] global_store_b64 v[2:3], v[0:1], off .LBB7_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9SynKerneli .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 19 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end7: .size _Z9SynKerneli, .Lfunc_end7-_Z9SynKerneli ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 908 ; NumSgprs: 18 ; NumVgprs: 19 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 19 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z8Lat_curri ; -- Begin function _Z8Lat_curri .globl _Z8Lat_curri .p2align 8 .type _Z8Lat_curri,@function _Z8Lat_curri: ; @_Z8Lat_curri ; %bb.0: s_load_b32 s0, s[0:1], 0x14 s_waitcnt lgkmcnt(0) s_and_b32 s0, s0, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1] s_mov_b32 s0, exec_lo v_cmpx_gt_i32_e32 10, v1 s_cbranch_execz .LBB8_7 ; %bb.1: v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, cil@rel32@lo+4 s_addc_u32 s1, s1, cil@rel32@hi+12 s_getpc_b64 s[2:3] s_add_u32 s2, s2, cils@rel32@lo+4 s_addc_u32 s3, s3, cils@rel32@hi+12 v_lshlrev_b64 v[3:4], 3, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v3, s0 v_add_co_ci_u32_e32 v6, vcc_lo, s1, v4, vcc_lo v_add_co_u32 v7, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v8, vcc_lo, s3, v4, vcc_lo s_getpc_b64 s[0:1] s_add_u32 s0, s0, Y_op@rel32@lo+4 s_addc_u32 s1, s1, Y_op@rel32@hi+12 global_load_b64 v[9:10], v[5:6], off global_load_b64 v[11:12], v[7:8], off v_add_co_u32 v13, vcc_lo, v1, s0 v_add_co_ci_u32_e32 v14, vcc_lo, s1, v2, vcc_lo s_mov_b32 s0, 0x63f14120 s_mov_b32 s2, 0x2de00d2 s_mov_b32 s1, 0x3fef5dcc global_load_u8 v0, v[13:14], off s_mov_b32 s3, 0x3fed8a09 s_waitcnt vmcnt(2) v_mul_f64 v[9:10], v[9:10], s[0:1] s_waitcnt vmcnt(1) v_mul_f64 v[11:12], v[11:12], s[2:3] s_mov_b32 s0, exec_lo global_store_b64 v[5:6], v[9:10], off global_store_b64 v[7:8], v[11:12], off s_waitcnt vmcnt(0) v_cmpx_eq_u16_e32 1, v0 s_cbranch_execz .LBB8_3 ; %bb.2: v_add_f64 v[9:10], v[9:10], 1.0 v_add_f64 v[11:12], v[11:12], 1.0 global_store_b64 v[5:6], v[9:10], off global_store_b64 v[7:8], v[11:12], off .LBB8_3: s_or_b32 exec_lo, exec_lo, s0 v_add_f64 v[5:6], v[9:10], -v[11:12] s_mov_b32 s0, 0xe826d695 s_mov_b32 s1, 0xbe112e0b v_mov_b32_e32 v2, 0 s_delay_alu instid0(VALU_DEP_2) v_mul_f64 v[9:10], v[5:6], s[0:1] v_mov_b32_e32 v5, 0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_lat@rel32@lo+4 s_addc_u32 s1, s1, I_lat@rel32@hi+12 v_add_co_u32 v11, vcc_lo, v3, s0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, Isyn_lat@rel32@lo+4 s_addc_u32 s3, s3, Isyn_lat@rel32@hi+12 v_add_co_ci_u32_e32 v12, vcc_lo, s1, v4, vcc_lo v_add_co_u32 v7, vcc_lo, v3, s2 v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v3, v2 v_add_co_ci_u32_e32 v8, vcc_lo, s3, v4, vcc_lo s_mov_b32 s2, 0 global_store_b64 v[11:12], v[9:10], off global_store_b64 v[7:8], v[2:3], off .LBB8_4: ; =>This Inner Loop Header: Depth=1 s_mov_b32 s3, exec_lo v_cmpx_ne_u32_e64 s2, v1 s_cbranch_execz .LBB8_6 ; %bb.5: ; in Loop: Header=BB8_4 Depth=1 global_load_b64 v[3:4], v2, s[0:1] s_waitcnt vmcnt(0) v_add_f64 v[5:6], v[3:4], v[5:6] global_store_b64 v[7:8], v[5:6], off .LBB8_6: ; in Loop: Header=BB8_4 Depth=1 s_or_b32 exec_lo, exec_lo, s3 s_add_i32 s2, s2, 1 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_cmp_lg_u32 s2, 10 s_cbranch_scc1 .LBB8_4 .LBB8_7: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z8Lat_curri .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 15 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end8: .size _Z8Lat_curri, .Lfunc_end8-_Z8Lat_curri ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 520 ; NumSgprs: 18 ; NumVgprs: 15 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 15 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z13IsynRedKerneli ; -- Begin function _Z13IsynRedKerneli .globl _Z13IsynRedKerneli .p2align 8 .type _Z13IsynRedKerneli,@function _Z13IsynRedKerneli: ; @_Z13IsynRedKerneli ; %bb.0: s_load_b32 s0, s[0:1], 0x14 v_and_b32_e32 v4, 0x3ff, v0 v_bfe_u32 v5, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s1, s0, 16 s_and_b32 s3, s0, 0xffff s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mad_u64_u32 v[2:3], null, s15, s1, v[5:6] v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5] v_cmp_lt_u16_e64 s0, s0, 2 v_ashrrev_i32_e32 v3, 31, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) s_and_b32 vcc_lo, exec_lo, s0 v_ashrrev_i32_e32 v1, 31, v0 v_cmp_gt_i32_e64 s0, 10, v2 v_cmp_eq_u32_e64 s1, 0, v2 s_cbranch_vccnz .LBB9_7 ; %bb.1: ; %.lr.ph v_lshlrev_b64 v[5:6], 3, v[2:3] v_lshlrev_b64 v[7:8], 3, v[0:1] s_getpc_b64 s[4:5] s_add_u32 s4, s4, d_hat_sq@rel32@lo+4 s_addc_u32 s5, s5, d_hat_sq@rel32@hi+12 s_getpc_b64 s[6:7] s_add_u32 s6, s6, Isyn@rel32@lo+4 s_addc_u32 s7, s7, Isyn@rel32@hi+12 v_mov_b32_e32 v12, 0 v_mad_i64_i32 v[9:10], null, 0x50, v0, v[5:6] v_add_co_u32 v7, vcc_lo, v7, s4 v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v9, vcc_lo, v9, s6 v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo .LBB9_2: ; =>This Inner Loop Header: Depth=1 s_lshr_b32 s4, s3, 1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v11, s4, v0 v_cmp_gt_u32_e32 vcc_lo, s4, v4 v_cmp_gt_u32_e64 s2, 0x1fb0, v11 s_and_b32 s5, s0, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_b32 s2, s5, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB9_4 ; %bb.3: ; in Loop: Header=BB9_2 Depth=1 v_mad_u64_u32 v[13:14], null, 0x50, v11, v[5:6] s_getpc_b64 s[6:7] s_add_u32 s6, s6, Isyn@rel32@lo+4 s_addc_u32 s7, s7, Isyn@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v13, s2, v13, s6 v_add_co_ci_u32_e64 v14, s2, s7, v14, s2 s_clause 0x1 global_load_b64 v[13:14], v[13:14], off global_load_b64 v[15:16], v[9:10], off s_waitcnt vmcnt(0) v_add_f64 v[13:14], v[13:14], v[15:16] global_store_b64 v[9:10], v[13:14], off .LBB9_4: ; in Loop: Header=BB9_2 Depth=1 s_or_b32 exec_lo, exec_lo, s5 v_cmp_gt_u32_e64 s2, 0x1fb0, v11 s_and_b32 s5, s1, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_and_b32 s5, s5, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s2, s5 s_cbranch_execz .LBB9_6 ; %bb.5: ; in Loop: Header=BB9_2 Depth=1 v_lshlrev_b64 v[13:14], 3, v[11:12] s_getpc_b64 s[6:7] s_add_u32 s6, s6, d_hat_sq@rel32@lo+4 s_addc_u32 s7, s7, d_hat_sq@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v13, vcc_lo, v13, s6 v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo s_clause 0x1 global_load_b64 v[13:14], v[13:14], off global_load_b64 v[15:16], v[7:8], off s_waitcnt vmcnt(0) v_add_f64 v[13:14], v[13:14], v[15:16] global_store_b64 v[7:8], v[13:14], off .LBB9_6: ; in Loop: Header=BB9_2 Depth=1 s_or_b32 exec_lo, exec_lo, s2 s_cmp_lt_u32 s3, 4 s_mov_b32 s3, s4 s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv s_cbranch_scc0 .LBB9_2 .LBB9_7: ; %._crit_edge v_cmp_eq_u32_e32 vcc_lo, 0, v4 v_cmp_gt_i32_e64 s0, 10, v2 s_mov_b32 s15, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, vcc_lo, s0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB9_10 ; %bb.8: v_lshlrev_b64 v[3:4], 3, v[2:3] s_getpc_b64 s[0:1] s_add_u32 s0, s0, Isyn@rel32@lo+4 s_addc_u32 s1, s1, Isyn@rel32@hi+12 s_mul_i32 s2, s14, 0x50 s_mul_hi_u32 s3, s14, 0x50 v_mad_i64_i32 v[5:6], null, 0x50, v0, v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v5, s0 v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo s_getpc_b64 s[0:1] s_add_u32 s0, s0, total_curr@rel32@lo+4 s_addc_u32 s1, s1, total_curr@rel32@hi+12 s_add_u32 s0, s2, s0 s_addc_u32 s1, s3, s1 global_load_b64 v[5:6], v[5:6], off v_add_co_u32 v3, vcc_lo, s0, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v2 s_waitcnt vmcnt(0) global_store_b64 v[3:4], v[5:6], off s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB9_10 ; %bb.9: s_getpc_b64 s[0:1] s_add_u32 s0, s0, total_dhatsq@rel32@lo+4 s_addc_u32 s1, s1, total_dhatsq@rel32@hi+12 v_lshlrev_b64 v[0:1], 3, v[0:1] s_lshl_b64 s[2:3], s[14:15], 3 v_mov_b32_e32 v2, 0 s_add_u32 s0, s2, s0 s_addc_u32 s1, s3, s1 s_getpc_b64 s[2:3] s_add_u32 s2, s2, d_hat_sq@rel32@lo+4 s_addc_u32 s3, s3, d_hat_sq@rel32@hi+12 v_add_co_u32 v0, vcc_lo, v0, s2 v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo global_load_b64 v[0:1], v[0:1], off s_waitcnt vmcnt(0) global_store_b64 v2, v[0:1], s[0:1] .LBB9_10: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z13IsynRedKerneli .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 17 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end9: .size _Z13IsynRedKerneli, .Lfunc_end9-_Z13IsynRedKerneli ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 788 ; NumSgprs: 18 ; NumVgprs: 17 ; ScratchSize: 0 ; MemoryBound: 1 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 17 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z7reduce1i ; -- Begin function _Z7reduce1i .globl _Z7reduce1i .p2align 8 .type _Z7reduce1i,@function _Z7reduce1i: ; @_Z7reduce1i ; %bb.0: s_load_b32 s0, s[0:1], 0x14 s_waitcnt lgkmcnt(0) s_and_b32 s0, s0, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1] s_mov_b32 s0, exec_lo v_cmpx_gt_i32_e32 10, v1 s_cbranch_execz .LBB10_7 ; %bb.1: ; %.preheader17 v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, total_curr@rel32@lo+4 s_addc_u32 s1, s1, total_curr@rel32@hi+12 v_mov_b32_e32 v4, 0 v_mov_b32_e32 v5, 0 v_lshlrev_b64 v[2:3], 3, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v2, s0 v_add_co_ci_u32_e32 v6, vcc_lo, s1, v3, vcc_lo s_mov_b64 s[0:1], 0 .LBB10_2: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) v_add_co_u32 v7, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, s1, v6, vcc_lo s_add_u32 s0, s0, 0x50 s_addc_u32 s1, s1, 0 s_cmpk_eq_i32 s0, 0x280 global_load_b64 v[7:8], v[7:8], off s_waitcnt vmcnt(0) v_add_f64 v[4:5], v[4:5], v[7:8] s_cbranch_scc0 .LBB10_2 ; %bb.3: s_getpc_b64 s[0:1] s_add_u32 s0, s0, Isyn_tot@rel32@lo+4 s_addc_u32 s1, s1, Isyn_tot@rel32@hi+12 v_add_co_u32 v2, vcc_lo, v2, s0 v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo v_cmp_eq_u32_e32 vcc_lo, 0, v1 global_store_b64 v[2:3], v[4:5], off s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB10_7 ; %bb.4: ; %.preheader.preheader v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 s_mov_b64 s[0:1], 0 .LBB10_5: ; %.preheader ; =>This Inner Loop Header: Depth=1 s_getpc_b64 s[2:3] s_add_u32 s2, s2, total_dhatsq@rel32@lo+4 s_addc_u32 s3, s3, total_dhatsq@rel32@hi+12 s_add_u32 s2, s0, s2 s_addc_u32 s3, s1, s3 s_add_u32 s0, s0, 8 s_load_b64 s[2:3], s[2:3], 0x0 s_addc_u32 s1, s1, 0 s_cmp_eq_u32 s0, 64 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[0:1], v[0:1], s[2:3] s_cbranch_scc0 .LBB10_5 ; %bb.6: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[0:1] v_cndmask_b32_e64 v2, 0, 1, vcc_lo s_and_b32 s0, vcc_lo, exec_lo s_cselect_b32 s0, 0xffffff80, 0 v_lshlrev_b32_e32 v2, 8, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ldexp_f64 v[0:1], v[0:1], v2 v_rsq_f64_e32 v[2:3], v[0:1] v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x260 s_waitcnt_depctr 0xfff v_mul_f64 v[4:5], v[0:1], v[2:3] v_mul_f64 v[2:3], v[2:3], 0.5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[6:7], -v[2:3], v[4:5], 0.5 v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5] v_fma_f64 v[2:3], v[2:3], v[6:7], v[2:3] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1] v_fma_f64 v[4:5], v[6:7], v[2:3], v[4:5] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[6:7], -v[4:5], v[4:5], v[0:1] v_fma_f64 v[2:3], v[6:7], v[2:3], v[4:5] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_ldexp_f64 v[2:3], v[2:3], s0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, norm_dh@rel32@lo+4 s_addc_u32 s1, s1, norm_dh@rel32@hi+12 v_dual_cndmask_b32 v1, v3, v1 :: v_dual_cndmask_b32 v0, v2, v0 v_mov_b32_e32 v2, 0 global_store_b64 v2, v[0:1], s[0:1] .LBB10_7: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7reduce1i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end10: .size _Z7reduce1i, .Lfunc_end10-_Z7reduce1i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 512 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z10CalcUpdateid ; -- Begin function _Z10CalcUpdateid .globl _Z10CalcUpdateid .p2align 8 .type _Z10CalcUpdateid,@function _Z10CalcUpdateid: ; @_Z10CalcUpdateid ; %bb.0: s_load_b32 s2, s[0:1], 0x1c v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v4, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5] v_cmp_gt_i32_e32 vcc_lo, 0x1fb0, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_i32_e64 s2, 10, v2 s_and_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB11_5 ; %bb.1: s_getpc_b64 s[2:3] s_add_u32 s2, s2, norm_dh@rel32@lo+4 s_addc_u32 s3, s3, norm_dh@rel32@hi+12 s_load_b64 s[2:3], s[2:3], 0x0 s_waitcnt lgkmcnt(0) v_cmp_eq_f64_e64 s4, s[2:3], 0 s_delay_alu instid0(VALU_DEP_1) s_and_b32 vcc_lo, exec_lo, s4 s_cbranch_vccnz .LBB11_4 ; %bb.2: v_ashrrev_i32_e32 v3, 31, v2 s_getpc_b64 s[4:5] s_add_u32 s4, s4, err@rel32@lo+4 s_addc_u32 s5, s5, err@rel32@hi+12 v_add_co_u32 v4, vcc_lo, v2, s4 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo global_load_u8 v4, v[4:5], off s_waitcnt vmcnt(0) v_cmp_ne_u16_e32 vcc_lo, 0, v4 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB11_4 ; %bb.3: v_ashrrev_i32_e32 v1, 31, v0 s_getpc_b64 s[4:5] s_add_u32 s4, s4, d_hat@rel32@lo+4 s_addc_u32 s5, s5, d_hat@rel32@hi+12 s_load_b64 s[0:1], s[0:1], 0x8 v_lshlrev_b64 v[5:6], 3, v[0:1] v_bfe_i32 v1, v4, 0, 8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_bfe_i32 v1, v1, 0, 16 v_add_co_u32 v5, vcc_lo, v5, s4 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo v_cvt_f64_i32_e32 v[7:8], v1 v_lshlrev_b64 v[1:2], 3, v[2:3] global_load_b64 v[5:6], v[5:6], off v_mad_i64_i32 v[10:11], null, 0x50, v0, v[1:2] s_waitcnt lgkmcnt(0) v_mul_f64 v[7:8], v[7:8], s[0:1] s_getpc_b64 s[0:1] s_add_u32 s0, s0, del_w@rel32@lo+4 s_addc_u32 s1, s1, del_w@rel32@hi+12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v10, s0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v11, vcc_lo global_load_b64 v[2:3], v[0:1], off s_waitcnt vmcnt(1) v_mul_f64 v[4:5], v[7:8], v[5:6] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_scale_f64 v[6:7], null, s[2:3], s[2:3], v[4:5] v_rcp_f64_e32 v[8:9], v[6:7] s_waitcnt_depctr 0xfff v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9] v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9] v_div_scale_f64 v[10:11], vcc_lo, v[4:5], s[2:3], v[4:5] v_mul_f64 v[12:13], v[10:11], v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11] v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_div_fixup_f64 v[4:5], v[6:7], s[2:3], v[4:5] s_waitcnt vmcnt(0) v_add_f64 v[2:3], v[2:3], v[4:5] global_store_b64 v[0:1], v[2:3], off .LBB11_4: s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv .LBB11_5: s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10CalcUpdateid .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 14 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end11: .size _Z10CalcUpdateid, .Lfunc_end11-_Z10CalcUpdateid ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 532 ; NumSgprs: 18 ; NumVgprs: 14 ; ScratchSize: 0 ; MemoryBound: 1 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 14 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z6WtUpdtv ; -- Begin function _Z6WtUpdtv .globl _Z6WtUpdtv .p2align 8 .type _Z6WtUpdtv,@function _Z6WtUpdtv: ; @_Z6WtUpdtv ; %bb.0: s_load_b32 s0, s[0:1], 0xc v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s1, s0, 16 s_and_b32 s0, s0, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s0, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s1, v[3:4] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, 0x1fb0, v0 v_cmp_gt_i32_e64 s0, 10, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, vcc_lo, s0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB12_2 ; %bb.1: v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, del_w@rel32@lo+4 s_addc_u32 s1, s1, del_w@rel32@hi+12 s_getpc_b64 s[2:3] s_add_u32 s2, s2, weight@rel32@lo+4 s_addc_u32 s3, s3, weight@rel32@hi+12 v_lshlrev_b64 v[1:2], 3, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_i64_i32 v[3:4], null, 0x50, v0, v[1:2] v_add_co_u32 v0, vcc_lo, v3, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo v_add_co_u32 v2, vcc_lo, v3, s2 v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo global_load_b64 v[0:1], v[0:1], off global_load_b64 v[4:5], v[2:3], off s_waitcnt vmcnt(0) v_add_f64 v[0:1], v[0:1], v[4:5] global_store_b64 v[2:3], v[0:1], off .LBB12_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6WtUpdtv .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 256 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end12: .size _Z6WtUpdtv, .Lfunc_end12-_Z6WtUpdtv ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 240 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z6cpyWtsPd ; -- Begin function _Z6cpyWtsPd .globl _Z6cpyWtsPd .p2align 8 .type _Z6cpyWtsPd,@function _Z6cpyWtsPd: ; @_Z6cpyWtsPd ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_i32_e32 vcc_lo, 0x1fb0, v0 v_cmp_gt_i32_e64 s2, 10, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, vcc_lo, s2 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB13_2 ; %bb.1: v_ashrrev_i32_e32 v2, 31, v1 s_getpc_b64 s[2:3] s_add_u32 s2, s2, weight@rel32@lo+4 s_addc_u32 s3, s3, weight@rel32@hi+12 s_load_b64 s[0:1], s[0:1], 0x0 v_lshlrev_b64 v[2:3], 3, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_i64_i32 v[4:5], null, 0x50, v0, v[2:3] v_add_co_u32 v2, vcc_lo, v4, s2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v3, vcc_lo, s3, v5, vcc_lo global_load_b64 v[2:3], v[2:3], off s_waitcnt vmcnt(0) v_mad_u64_u32 v[4:5], null, v0, 10, v[1:2] v_ashrrev_i32_e32 v5, 31, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[4:5] s_waitcnt lgkmcnt(0) v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB13_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6cpyWtsPd .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end13: .size _Z6cpyWtsPd, .Lfunc_end13-_Z6cpyWtsPd ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 244 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z12initialize2DPdS_ ; -- Begin function _Z12initialize2DPdS_ .globl _Z12initialize2DPdS_ .p2align 8 .type _Z12initialize2DPdS_,@function _Z12initialize2DPdS_: ; @_Z12initialize2DPdS_ ; %bb.0: s_load_b128 s[12:15], s[0:1], 0x0 v_mov_b32_e32 v0, 0 s_mov_b32 s4, 0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, weight@rel32@lo+4 s_addc_u32 s1, s1, weight@rel32@hi+12 .LBB14_1: ; %.preheader122 ; =>This Loop Header: Depth=1 ; Child Loop BB14_2 Depth 2 s_mov_b64 s[2:3], 0 .LBB14_2: ; Parent Loop BB14_1 Depth=1 ; => This Inner Loop Header: Depth=2 s_waitcnt lgkmcnt(0) s_add_u32 s6, s12, s2 s_addc_u32 s7, s13, s3 global_load_b64 v[1:2], v0, s[6:7] s_add_u32 s6, s0, s2 s_addc_u32 s7, s1, s3 s_add_u32 s2, s2, 8 s_addc_u32 s3, s3, 0 s_cmpk_eq_i32 s2, 0x50 s_waitcnt vmcnt(0) global_store_b64 v0, v[1:2], s[6:7] s_cbranch_scc0 .LBB14_2 ; %bb.3: ; in Loop: Header=BB14_1 Depth=1 s_add_i32 s4, s4, 1 s_add_u32 s12, s12, 0x50 s_addc_u32 s13, s13, 0 s_add_u32 s0, s0, 0x50 s_addc_u32 s1, s1, 0 s_cmpk_lg_i32 s4, 0x1fb0 s_cbranch_scc1 .LBB14_1 ; %bb.4: ; %.preheader.preheader v_mov_b32_e32 v2, 0 s_mov_b32 s13, 0 s_mov_b32 s11, -3 s_mov_b32 s20, s13 .LBB14_5: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB14_6 Depth 2 s_mul_i32 s2, s11, 24 s_getpc_b64 s[0:1] s_add_u32 s0, s0, w_conv2@rel32@lo+4 s_addc_u32 s1, s1, w_conv2@rel32@hi+12 s_mul_hi_u32 s3, s11, 24 s_add_u32 s21, s2, s0 s_addc_u32 s22, s3, s1 s_cmp_gt_u32 s20, 2 s_mov_b64 s[16:17], 0 s_cselect_b32 s0, -1, 0 s_cmp_gt_u32 s20, 5 s_cselect_b32 s1, -1, 0 s_cmp_gt_u32 s20, 8 s_cselect_b32 s2, -1, 0 s_cmp_gt_u32 s20, 11 s_cselect_b32 s3, -1, 0 s_cmp_gt_u32 s20, 14 s_cselect_b32 s4, -1, 0 s_cmp_gt_u32 s20, 17 s_cselect_b32 s5, -1, 0 s_cmp_gt_u32 s20, 20 s_cselect_b32 s6, -1, 0 s_cmp_gt_u32 s20, 23 s_cselect_b32 s7, -1, 0 s_cmp_gt_u32 s20, 26 s_cselect_b32 s8, -1, 0 s_cmp_gt_u32 s20, 29 s_cselect_b32 s9, -1, 0 s_cmp_gt_u32 s20, 32 s_cselect_b32 s10, -1, 0 s_sub_i32 s12, s20, 33 s_sub_i32 s18, s20, 30 s_sub_i32 s19, s20, 27 s_sub_i32 s37, s20, 24 s_sub_i32 s23, s20, 21 s_sub_i32 s24, s20, 18 s_add_i32 s25, s20, -15 s_add_i32 s26, s20, -12 s_add_i32 s27, s20, -9 s_add_i32 s28, s20, -6 s_and_b32 s0, exec_lo, s0 s_and_b32 s1, exec_lo, s1 s_and_b32 s2, exec_lo, s2 s_and_b32 s3, exec_lo, s3 s_and_b32 s4, exec_lo, s4 s_and_b32 s5, exec_lo, s5 s_and_b32 s6, exec_lo, s6 s_and_b32 s7, exec_lo, s7 s_and_b32 s8, exec_lo, s8 s_and_b32 s9, exec_lo, s9 s_and_b32 s10, exec_lo, s10 s_mul_hi_u32 s29, s12, 24 s_mul_i32 s30, s12, 24 s_mul_hi_u32 s31, s18, 24 s_mul_i32 s33, s18, 24 s_mul_hi_u32 s34, s19, 24 s_mul_i32 s35, s19, 24 s_mul_hi_u32 s36, s37, 24 s_mul_i32 s37, s37, 24 s_mov_b32 s12, s13 .LBB14_6: ; Parent Loop BB14_5 Depth=1 ; => This Inner Loop Header: Depth=2 s_add_u32 s18, s14, s16 s_addc_u32 s19, s15, s17 s_mov_b32 s38, -1 global_load_b64 v[0:1], v2, s[18:19] s_mov_b32 vcc_lo, s0 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_48 ; %bb.7: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s1 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_45 ; %bb.8: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s2 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_42 ; %bb.9: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s3 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_39 ; %bb.10: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s4 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_36 ; %bb.11: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s5 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_33 ; %bb.12: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s6 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_30 ; %bb.13: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s7 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_27 ; %bb.14: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s8 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_24 ; %bb.15: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s9 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_21 ; %bb.16: ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 vcc_lo, s10 ; implicit-def: $sgpr18_sgpr19 s_cbranch_vccz .LBB14_18 ; %bb.17: ; in Loop: Header=BB14_6 Depth=2 s_lshl_b64 s[18:19], s[12:13], 3 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s38, s30, s18 s_addc_u32 s39, s29, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv12@rel32@lo+4 s_addc_u32 s19, s19, w_conv12@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 s_mov_b32 s38, 0 .LBB14_18: ; %Flow ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_20 ; %bb.19: ; in Loop: Header=BB14_6 Depth=2 s_lshl_b64 s[18:19], s[12:13], 3 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s38, s33, s18 s_addc_u32 s39, s31, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv11@rel32@lo+4 s_addc_u32 s19, s19, w_conv11@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_20: ; %Flow150 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_21: ; %Flow151 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_23 ; %bb.22: ; in Loop: Header=BB14_6 Depth=2 s_lshl_b64 s[18:19], s[12:13], 3 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s38, s35, s18 s_addc_u32 s39, s34, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv10@rel32@lo+4 s_addc_u32 s19, s19, w_conv10@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_23: ; %Flow152 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_24: ; %Flow153 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_26 ; %bb.25: ; in Loop: Header=BB14_6 Depth=2 s_lshl_b64 s[18:19], s[12:13], 3 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s38, s37, s18 s_addc_u32 s39, s36, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv9@rel32@lo+4 s_addc_u32 s19, s19, w_conv9@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_26: ; %Flow154 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_27: ; %Flow155 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_29 ; %bb.28: ; in Loop: Header=BB14_6 Depth=2 s_mul_i32 s38, s23, 24 s_lshl_b64 s[18:19], s[12:13], 3 s_mul_hi_u32 s39, s23, 24 s_add_u32 s38, s38, s18 s_addc_u32 s39, s39, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv8@rel32@lo+4 s_addc_u32 s19, s19, w_conv8@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_29: ; %Flow156 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_30: ; %Flow157 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_32 ; %bb.31: ; in Loop: Header=BB14_6 Depth=2 s_mul_i32 s38, s24, 24 s_lshl_b64 s[18:19], s[12:13], 3 s_mul_hi_u32 s39, s24, 24 s_add_u32 s38, s38, s18 s_addc_u32 s39, s39, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv7@rel32@lo+4 s_addc_u32 s19, s19, w_conv7@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_32: ; %Flow158 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_33: ; %Flow159 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_35 ; %bb.34: ; in Loop: Header=BB14_6 Depth=2 s_mul_i32 s38, s25, 24 s_lshl_b64 s[18:19], s[12:13], 3 s_mul_hi_u32 s39, s25, 24 s_add_u32 s38, s38, s18 s_addc_u32 s39, s39, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv6@rel32@lo+4 s_addc_u32 s19, s19, w_conv6@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_35: ; %Flow160 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_36: ; %Flow161 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_38 ; %bb.37: ; in Loop: Header=BB14_6 Depth=2 s_mul_i32 s38, s26, 24 s_lshl_b64 s[18:19], s[12:13], 3 s_mul_hi_u32 s39, s26, 24 s_add_u32 s38, s38, s18 s_addc_u32 s39, s39, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv5@rel32@lo+4 s_addc_u32 s19, s19, w_conv5@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_38: ; %Flow162 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_39: ; %Flow163 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_41 ; %bb.40: ; in Loop: Header=BB14_6 Depth=2 s_mul_i32 s38, s27, 24 s_lshl_b64 s[18:19], s[12:13], 3 s_mul_hi_u32 s39, s27, 24 s_add_u32 s38, s38, s18 s_addc_u32 s39, s39, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv4@rel32@lo+4 s_addc_u32 s19, s19, w_conv4@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_41: ; %Flow164 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_42: ; %Flow165 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_44 ; %bb.43: ; in Loop: Header=BB14_6 Depth=2 s_mul_i32 s38, s28, 24 s_lshl_b64 s[18:19], s[12:13], 3 s_mul_hi_u32 s39, s28, 24 s_add_u32 s38, s38, s18 s_addc_u32 s39, s39, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv3@rel32@lo+4 s_addc_u32 s19, s19, w_conv3@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_44: ; %Flow166 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_45: ; %Flow167 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_47 ; %bb.46: ; in Loop: Header=BB14_6 Depth=2 s_add_u32 s18, s21, s16 s_addc_u32 s19, s22, s17 .LBB14_47: ; %Flow168 ; in Loop: Header=BB14_6 Depth=2 s_mov_b32 s38, 0 .LBB14_48: ; %Flow169 ; in Loop: Header=BB14_6 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s38 s_cbranch_vccnz .LBB14_50 ; %bb.49: ; in Loop: Header=BB14_6 Depth=2 s_mul_i32 s38, s20, 24 s_lshl_b64 s[18:19], s[12:13], 3 s_mul_hi_u32 s39, s20, 24 s_add_u32 s38, s38, s18 s_addc_u32 s39, s39, s19 s_getpc_b64 s[18:19] s_add_u32 s18, s18, w_conv1@rel32@lo+4 s_addc_u32 s19, s19, w_conv1@rel32@hi+12 s_add_u32 s18, s38, s18 s_addc_u32 s19, s39, s19 .LBB14_50: ; in Loop: Header=BB14_6 Depth=2 s_add_i32 s12, s12, 1 s_add_u32 s16, s16, 8 s_addc_u32 s17, s17, 0 s_cmp_eq_u32 s16, 24 s_waitcnt vmcnt(0) global_store_b64 v2, v[0:1], s[18:19] s_cbranch_scc0 .LBB14_6 ; %bb.51: ; in Loop: Header=BB14_5 Depth=1 s_add_i32 s20, s20, 1 s_add_u32 s14, s14, 24 s_addc_u32 s15, s15, 0 s_add_i32 s11, s11, 1 s_cmp_eq_u32 s20, 36 s_cbranch_scc0 .LBB14_5 ; %bb.52: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z12initialize2DPdS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 16 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 3 .amdhsa_next_free_sgpr 40 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end14: .size _Z12initialize2DPdS_, .Lfunc_end14-_Z12initialize2DPdS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1268 ; NumSgprs: 42 ; NumVgprs: 3 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 5 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 42 ; NumVGPRsForWavesPerEU: 3 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z11convKernel1i ; -- Begin function _Z11convKernel1i .globl _Z11convKernel1i .p2align 8 .type _Z11convKernel1i,@function _Z11convKernel1i: ; @_Z11convKernel1i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB15_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv1@rel32@lo+4 s_addc_u32 s5, s5, w_conv1@rel32@hi+12 .LBB15_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB15_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB15_3: ; Parent Loop BB15_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB15_3 ; %bb.4: ; in Loop: Header=BB15_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB15_2 ; %bb.5: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_mad_u64_u32 v[4:5], null, v0, 26, v[1:2] s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 v_ashrrev_i32_e32 v5, 31, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[4:5] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB15_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel1i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end15: .size _Z11convKernel1i, .Lfunc_end15-_Z11convKernel1i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 396 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z11convKernel2i ; -- Begin function _Z11convKernel2i .globl _Z11convKernel2i .p2align 8 .type _Z11convKernel2i,@function _Z11convKernel2i: ; @_Z11convKernel2i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB16_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv2@rel32@lo+4 s_addc_u32 s5, s5, w_conv2@rel32@hi+12 .LBB16_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB16_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB16_3: ; Parent Loop BB16_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB16_3 ; %bb.4: ; in Loop: Header=BB16_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB16_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0x2a4 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB16_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel2i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end16: .size _Z11convKernel2i, .Lfunc_end16-_Z11convKernel2i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z11convKernel3i ; -- Begin function _Z11convKernel3i .globl _Z11convKernel3i .p2align 8 .type _Z11convKernel3i,@function _Z11convKernel3i: ; @_Z11convKernel3i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB17_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv3@rel32@lo+4 s_addc_u32 s5, s5, w_conv3@rel32@hi+12 .LBB17_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB17_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB17_3: ; Parent Loop BB17_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB17_3 ; %bb.4: ; in Loop: Header=BB17_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB17_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0x548 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB17_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel3i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end17: .size _Z11convKernel3i, .Lfunc_end17-_Z11convKernel3i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z11convKernel4i ; -- Begin function _Z11convKernel4i .globl _Z11convKernel4i .p2align 8 .type _Z11convKernel4i,@function _Z11convKernel4i: ; @_Z11convKernel4i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB18_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv4@rel32@lo+4 s_addc_u32 s5, s5, w_conv4@rel32@hi+12 .LBB18_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB18_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB18_3: ; Parent Loop BB18_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB18_3 ; %bb.4: ; in Loop: Header=BB18_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB18_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0x7ec v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB18_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel4i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end18: .size _Z11convKernel4i, .Lfunc_end18-_Z11convKernel4i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z11convKernel5i ; -- Begin function _Z11convKernel5i .globl _Z11convKernel5i .p2align 8 .type _Z11convKernel5i,@function _Z11convKernel5i: ; @_Z11convKernel5i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB19_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv5@rel32@lo+4 s_addc_u32 s5, s5, w_conv5@rel32@hi+12 .LBB19_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB19_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB19_3: ; Parent Loop BB19_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB19_3 ; %bb.4: ; in Loop: Header=BB19_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB19_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0xa90 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB19_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel5i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end19: .size _Z11convKernel5i, .Lfunc_end19-_Z11convKernel5i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z11convKernel6i ; -- Begin function _Z11convKernel6i .globl _Z11convKernel6i .p2align 8 .type _Z11convKernel6i,@function _Z11convKernel6i: ; @_Z11convKernel6i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB20_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv6@rel32@lo+4 s_addc_u32 s5, s5, w_conv6@rel32@hi+12 .LBB20_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB20_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB20_3: ; Parent Loop BB20_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB20_3 ; %bb.4: ; in Loop: Header=BB20_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB20_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0xd34 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB20_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel6i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end20: .size _Z11convKernel6i, .Lfunc_end20-_Z11convKernel6i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z11convKernel7i ; -- Begin function _Z11convKernel7i .globl _Z11convKernel7i .p2align 8 .type _Z11convKernel7i,@function _Z11convKernel7i: ; @_Z11convKernel7i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB21_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv7@rel32@lo+4 s_addc_u32 s5, s5, w_conv7@rel32@hi+12 .LBB21_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB21_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB21_3: ; Parent Loop BB21_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB21_3 ; %bb.4: ; in Loop: Header=BB21_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB21_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0xfd8 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB21_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel7i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end21: .size _Z11convKernel7i, .Lfunc_end21-_Z11convKernel7i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z11convKernel8i ; -- Begin function _Z11convKernel8i .globl _Z11convKernel8i .p2align 8 .type _Z11convKernel8i,@function _Z11convKernel8i: ; @_Z11convKernel8i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB22_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv8@rel32@lo+4 s_addc_u32 s5, s5, w_conv8@rel32@hi+12 .LBB22_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB22_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB22_3: ; Parent Loop BB22_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB22_3 ; %bb.4: ; in Loop: Header=BB22_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB22_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0x127c v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB22_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel8i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end22: .size _Z11convKernel8i, .Lfunc_end22-_Z11convKernel8i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z11convKernel9i ; -- Begin function _Z11convKernel9i .globl _Z11convKernel9i .p2align 8 .type _Z11convKernel9i,@function _Z11convKernel9i: ; @_Z11convKernel9i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB23_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv9@rel32@lo+4 s_addc_u32 s5, s5, w_conv9@rel32@hi+12 .LBB23_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB23_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB23_3: ; Parent Loop BB23_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB23_3 ; %bb.4: ; in Loop: Header=BB23_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB23_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0x1520 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB23_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11convKernel9i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end23: .size _Z11convKernel9i, .Lfunc_end23-_Z11convKernel9i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z12convKernel10i ; -- Begin function _Z12convKernel10i .globl _Z12convKernel10i .p2align 8 .type _Z12convKernel10i,@function _Z12convKernel10i: ; @_Z12convKernel10i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB24_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv10@rel32@lo+4 s_addc_u32 s5, s5, w_conv10@rel32@hi+12 .LBB24_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB24_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB24_3: ; Parent Loop BB24_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB24_3 ; %bb.4: ; in Loop: Header=BB24_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB24_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0x17c4 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB24_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z12convKernel10i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end24: .size _Z12convKernel10i, .Lfunc_end24-_Z12convKernel10i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z12convKernel11i ; -- Begin function _Z12convKernel11i .globl _Z12convKernel11i .p2align 8 .type _Z12convKernel11i,@function _Z12convKernel11i: ; @_Z12convKernel11i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB25_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv11@rel32@lo+4 s_addc_u32 s5, s5, w_conv11@rel32@hi+12 .LBB25_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB25_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB25_3: ; Parent Loop BB25_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB25_3 ; %bb.4: ; in Loop: Header=BB25_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB25_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0x1a68 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB25_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z12convKernel11i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end25: .size _Z12convKernel11i, .Lfunc_end25-_Z12convKernel11i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z12convKernel12i ; -- Begin function _Z12convKernel12i .globl _Z12convKernel12i .p2align 8 .type _Z12convKernel12i,@function _Z12convKernel12i: ; @_Z12convKernel12i ; %bb.0: s_load_b32 s2, s[0:1], 0x14 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4] s_mov_b32 s2, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_max_i32_e32 v2, v0, v1 v_cmpx_gt_i32_e32 26, v2 s_cbranch_execz .LBB26_6 ; %bb.1: ; %.preheader22 s_load_b32 s0, s[0:1], 0x0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, img_spks@rel32@lo+4 s_addc_u32 s3, s3, img_spks@rel32@hi+12 v_mad_u64_u32 v[4:5], null, v0, 28, v[1:2] v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s8, 0 s_waitcnt lgkmcnt(0) s_ashr_i32 s1, s0, 31 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b64 s[4:5], s[0:1], 3 s_mov_b32 s0, 0xe2308c3a s_add_u32 s2, s4, s2 s_mov_b32 s1, 0x3e35798e s_addc_u32 s3, s5, s3 s_getpc_b64 s[4:5] s_add_u32 s4, s4, w_conv12@rel32@lo+4 s_addc_u32 s5, s5, w_conv12@rel32@hi+12 .LBB26_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB26_3 Depth 2 v_mad_i64_i32 v[5:6], null, 0x1f40, v4, s[2:3] s_mov_b64 s[6:7], 0 .LBB26_3: ; Parent Loop BB26_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[7:8], v[5:6], off s_add_u32 s10, s4, s6 s_addc_u32 s11, s5, s7 v_add_co_u32 v5, vcc_lo, 0x1f40, v5 s_load_b64 s[10:11], s[10:11], 0x0 v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo s_add_u32 s6, s6, 8 s_addc_u32 s7, s7, 0 s_cmp_lg_u32 s6, 24 s_waitcnt lgkmcnt(0) v_mul_f64 v[9:10], s[10:11], s[0:1] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3] s_cbranch_scc1 .LBB26_3 ; %bb.4: ; in Loop: Header=BB26_2 Depth=1 s_add_i32 s8, s8, 1 v_add_nc_u32_e32 v4, 28, v4 s_add_u32 s4, s4, 24 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s8, 3 s_cbranch_scc1 .LBB26_2 ; %bb.5: v_mul_lo_u32 v0, v0, 26 s_getpc_b64 s[0:1] s_add_u32 s0, s0, I_in@rel32@lo+4 s_addc_u32 s1, s1, I_in@rel32@hi+12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v0, v0, v1, 0x1d0c v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[0:1] v_add_co_u32 v0, vcc_lo, v0, s0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[2:3], off .LBB26_6: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z12convKernel12i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 11 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end26: .size _Z12convKernel12i, .Lfunc_end26-_Z12convKernel12i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 11 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 11 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .protected d_imgs ; @d_imgs .type d_imgs,@object .section .bss,"aw",@nobits .globl d_imgs .p2align 4, 0x0 d_imgs: .zero 157000000 .size d_imgs, 157000000 .protected img_spks ; @img_spks .type img_spks,@object .globl img_spks .p2align 4, 0x0 img_spks: .zero 6272000 .size img_spks, 6272000 .protected syn1 ; @syn1 .type syn1,@object .globl syn1 .p2align 4, 0x0 syn1: .zero 2048 .size syn1, 2048 .protected syn1s ; @syn1s .type syn1s,@object .globl syn1s .p2align 4, 0x0 syn1s: .zero 2048 .size syn1s, 2048 .protected syn ; @syn .type syn,@object .globl syn .p2align 4, 0x0 syn: .zero 2048000 .size syn, 2048000 .protected in_spk ; @in_spk .type in_spk,@object .globl in_spk .p2align 4, 0x0 in_spk: .zero 8112 .size in_spk, 8112 .protected Isyn ; @Isyn .type Isyn,@object .globl Isyn .p2align 4, 0x0 Isyn: .zero 648960 .size Isyn, 648960 .protected weight ; @weight .type weight,@object .globl weight .p2align 4, 0x0 weight: .zero 648960 .size weight, 648960 .protected Isyn_tot ; @Isyn_tot .type Isyn_tot,@object .globl Isyn_tot .p2align 4, 0x0 Isyn_tot: .zero 80 .size Isyn_tot, 80 .protected Isyn_lat ; @Isyn_lat .type Isyn_lat,@object .globl Isyn_lat .p2align 4, 0x0 Isyn_lat: .zero 80 .size Isyn_lat, 80 .protected I_lat ; @I_lat .type I_lat,@object .globl I_lat .p2align 4, 0x0 I_lat: .zero 80 .size I_lat, 80 .protected D_op ; @D_op .type D_op,@object .globl D_op .p2align 4, 0x0 D_op: .zero 10000 .size D_op, 10000 .protected err ; @err .type err,@object .globl err err: .zero 10 .size err, 10 .protected Y_op ; @Y_op .type Y_op,@object .globl Y_op Y_op: .zero 10 .size Y_op, 10 .protected del_w ; @del_w .type del_w,@object .globl del_w .p2align 4, 0x0 del_w: .zero 648960 .size del_w, 648960 .protected ci ; @ci .type ci,@object .globl ci .p2align 4, 0x0 ci: .zero 64896 .size ci, 64896 .protected d_hat ; @d_hat .type d_hat,@object .globl d_hat .p2align 4, 0x0 d_hat: .zero 64896 .size d_hat, 64896 .protected cis ; @cis .type cis,@object .globl cis .p2align 4, 0x0 cis: .zero 64896 .size cis, 64896 .protected norm_dh ; @norm_dh .type norm_dh,@object .globl norm_dh .p2align 3, 0x0 norm_dh: .quad 0x0000000000000000 ; double 0 .size norm_dh, 8 .protected cil ; @cil .type cil,@object .globl cil .p2align 4, 0x0 cil: .zero 80 .size cil, 80 .protected cils ; @cils .type cils,@object .globl cils .p2align 4, 0x0 cils: .zero 80 .size cils, 80 .protected d_hat_sq ; @d_hat_sq .type d_hat_sq,@object .globl d_hat_sq .p2align 4, 0x0 d_hat_sq: .zero 64896 .size d_hat_sq, 64896 .protected ref_time1 ; @ref_time1 .type ref_time1,@object .globl ref_time1 .p2align 4, 0x0 ref_time1: .zero 32448 .size ref_time1, 32448 .protected ref_time2 ; @ref_time2 .type ref_time2,@object .globl ref_time2 .p2align 4, 0x0 ref_time2: .zero 40 .size ref_time2, 40 .protected Vm1 ; @Vm1 .type Vm1,@object .globl Vm1 .p2align 4, 0x0 Vm1: .zero 64896 .size Vm1, 64896 .protected Vm2 ; @Vm2 .type Vm2,@object .globl Vm2 .p2align 4, 0x0 Vm2: .zero 80 .size Vm2, 80 .protected pix_spks ; @pix_spks .type pix_spks,@object .globl pix_spks .p2align 4, 0x0 pix_spks: .zero 256000 .size pix_spks, 256000 .protected I_in ; @I_in .type I_in,@object .globl I_in .p2align 4, 0x0 I_in: .zero 64896 .size I_in, 64896 .protected total_curr ; @total_curr .type total_curr,@object .globl total_curr .p2align 4, 0x0 total_curr: .zero 640 .size total_curr, 640 .protected total_dhatsq ; @total_dhatsq .type total_dhatsq,@object .globl total_dhatsq .p2align 4, 0x0 total_dhatsq: .zero 64 .size total_dhatsq, 64 .protected w_conv1 ; @w_conv1 .type w_conv1,@object .globl w_conv1 .p2align 4, 0x0 w_conv1: .zero 72 .size w_conv1, 72 .protected w_conv2 ; @w_conv2 .type w_conv2,@object .globl w_conv2 .p2align 4, 0x0 w_conv2: .zero 72 .size w_conv2, 72 .protected w_conv3 ; @w_conv3 .type w_conv3,@object .globl w_conv3 .p2align 4, 0x0 w_conv3: .zero 72 .size w_conv3, 72 .protected w_conv4 ; @w_conv4 .type w_conv4,@object .globl w_conv4 .p2align 4, 0x0 w_conv4: .zero 72 .size w_conv4, 72 .protected w_conv5 ; @w_conv5 .type w_conv5,@object .globl w_conv5 .p2align 4, 0x0 w_conv5: .zero 72 .size w_conv5, 72 .protected w_conv6 ; @w_conv6 .type w_conv6,@object .globl w_conv6 .p2align 4, 0x0 w_conv6: .zero 72 .size w_conv6, 72 .protected w_conv7 ; @w_conv7 .type w_conv7,@object .globl w_conv7 .p2align 4, 0x0 w_conv7: .zero 72 .size w_conv7, 72 .protected w_conv8 ; @w_conv8 .type w_conv8,@object .globl w_conv8 .p2align 4, 0x0 w_conv8: .zero 72 .size w_conv8, 72 .protected w_conv9 ; @w_conv9 .type w_conv9,@object .globl w_conv9 .p2align 4, 0x0 w_conv9: .zero 72 .size w_conv9, 72 .protected w_conv10 ; @w_conv10 .type w_conv10,@object .globl w_conv10 .p2align 4, 0x0 w_conv10: .zero 72 .size w_conv10, 72 .protected w_conv11 ; @w_conv11 .type w_conv11,@object .globl w_conv11 .p2align 4, 0x0 w_conv11: .zero 72 .size w_conv11, 72 .protected w_conv12 ; @w_conv12 .type w_conv12,@object .globl w_conv12 .p2align 4, 0x0 w_conv12: .zero 72 .size w_conv12, 72 .type __hip_cuid_,@object ; @__hip_cuid_ .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym d_imgs .addrsig_sym img_spks .addrsig_sym syn1 .addrsig_sym syn1s .addrsig_sym syn .addrsig_sym in_spk .addrsig_sym Isyn .addrsig_sym weight .addrsig_sym Isyn_tot .addrsig_sym Isyn_lat .addrsig_sym I_lat .addrsig_sym D_op .addrsig_sym err .addrsig_sym Y_op .addrsig_sym del_w .addrsig_sym ci .addrsig_sym d_hat .addrsig_sym cis .addrsig_sym norm_dh .addrsig_sym cil .addrsig_sym cils .addrsig_sym d_hat_sq .addrsig_sym ref_time1 .addrsig_sym ref_time2 .addrsig_sym Vm1 .addrsig_sym Vm2 .addrsig_sym pix_spks .addrsig_sym I_in .addrsig_sym total_curr .addrsig_sym total_dhatsq .addrsig_sym w_conv1 .addrsig_sym w_conv2 .addrsig_sym w_conv3 .addrsig_sym w_conv4 .addrsig_sym w_conv5 .addrsig_sym w_conv6 .addrsig_sym w_conv7 .addrsig_sym w_conv8 .addrsig_sym w_conv9 .addrsig_sym w_conv10 .addrsig_sym w_conv11 .addrsig_sym w_conv12 .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 8 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z14img_readKernelPi .private_segment_fixed_size: 0 .sgpr_count: 10 .sgpr_spill_count: 0 .symbol: _Z14img_readKernelPi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 2 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 8 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z12convert2SpksPh .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z12convert2SpksPh.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 4 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z8pix2spksii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z8pix2spksii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: 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.private_segment_fixed_size: 0 .sgpr_count: 42 .sgpr_spill_count: 0 .symbol: _Z12initialize2DPdS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 3 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel1i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel1i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel2i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel2i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel3i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel3i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel4i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel4i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel5i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel5i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel6i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel6i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel7i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel7i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel8i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel8i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11convKernel9i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11convKernel9i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z12convKernel10i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z12convKernel10i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z12convKernel11i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z12convKernel11i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z12convKernel12i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z12convKernel12i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 11 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
7eebccfdede41934f2520af61442bf77693505c4
#include <string.h> #include <stdio.h> #include <iostream> struct DataElement { char *name; int value; }; __global__ void Kernel(DataElement *elem) { printf("On device: name=%s, value=%d\n", elem->name, elem->value); elem->name[0] = 'd'; elem->value++; } void launch(DataElement *elem, cudaStream_t &stream) { Kernel<<< 1, 1, 0, stream >>>(elem); //cudaDeviceSynchronize(); } void iteration(cudaStream_t &stream) { DataElement *e; cudaMallocManaged((void**)&e, sizeof(DataElement)); e->value = 10; cudaMallocManaged((void**)&(e->name), sizeof(char) * (strlen("hello") + 1) ); strcpy(e->name, "hello"); launch(e, stream); printf("On host: name=%s, value=%d\n", e->name, e->value); cudaFree(e->name); cudaFree(e); } int main(void) { cudaError_t err; int count = 0; err = cudaGetDeviceCount(&count); std::cout << count << " devices found." << std::endl; for (int d=0;d<count;d++) { err = cudaSetDevice(d); if (err != cudaSuccess) { std::cout << "error setting device, #=" << cudaGetErrorString(err) << std::endl; } cudaDeviceProp deviceProp; err = cudaGetDeviceProperties(&deviceProp, d); if (err != cudaSuccess) { std::cout << "error getting device properties, #=" << cudaGetErrorString(err) << std::endl; } std::cout << "Using device " << d << ", name: " << deviceProp.name << std::endl; for (int s = 0 ; s < 10 ; s++) { cudaStream_t stream; err = cudaStreamCreate(&stream); if (err != cudaSuccess) { std::cout << "error in stream creation, #=" << cudaGetErrorString(err) << std::endl; } iteration(stream); cudaStreamDestroy(stream); } } }
.file "tmpxft_0036c3b4_00000000-6_dataElem_um.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3640: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3640: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .align 2 .type _ZNSolsEPFRSoS_E.isra.0, @function _ZNSolsEPFRSoS_E.isra.0: .LFB4294: .cfi_startproc jmp *%rsi .cfi_endproc .LFE4294: .size _ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0 .globl _Z37__device_stub__Z6KernelP11DataElementP11DataElement .type _Z37__device_stub__Z6KernelP11DataElementP11DataElement, @function _Z37__device_stub__Z6KernelP11DataElementP11DataElement: .LFB3662: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L3 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq _Z6KernelP11DataElement(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L3: movq 88(%rsp), %rax subq %fs:40, %rax je .L5 call __stack_chk_fail@PLT .L5: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3662: .size _Z37__device_stub__Z6KernelP11DataElementP11DataElement, .-_Z37__device_stub__Z6KernelP11DataElementP11DataElement .globl _Z6KernelP11DataElement .type _Z6KernelP11DataElement, @function _Z6KernelP11DataElement: .LFB3663: .cfi_startproc endbr64 jmp _Z37__device_stub__Z6KernelP11DataElementP11DataElement .cfi_endproc .LFE3663: .size _Z6KernelP11DataElement, .-_Z6KernelP11DataElement .globl _Z6launchP11DataElementRP11CUstream_st .type _Z6launchP11DataElementRP11CUstream_st, @function _Z6launchP11DataElementRP11CUstream_st: .LFB3635: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx xorl %r8d, %r8d movl $1, %ecx movabsq $4294967297, %rdi movq %rdi, %rdx subq $32, %rsp .cfi_def_cfa_offset 48 movq (%rsi), %r9 movl $1, %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 addq $32, %rsp .cfi_remember_state .cfi_def_cfa_offset 16 movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _Z37__device_stub__Z6KernelP11DataElementP11DataElement .L9: .cfi_restore_state addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3635: .size _Z6launchP11DataElementRP11CUstream_st, .-_Z6launchP11DataElementRP11CUstream_st .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "On host: name=%s, value=%d\n" .text .globl _Z9iterationRP11CUstream_st .type _Z9iterationRP11CUstream_st, @function _Z9iterationRP11CUstream_st: .LFB3636: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl $1, %edx movq %rdi, %rbx movl $16, %esi subq $16, %rsp .cfi_def_cfa_offset 32 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax movq %rsp, %rdi call cudaMallocManaged@PLT movq (%rsp), %rdi movl $1, %edx movl $6, %esi movl $10, 8(%rdi) call cudaMallocManaged@PLT movq (%rsp), %rax movq %rbx, %rsi movq (%rax), %rax movl $1819043176, (%rax) movw $111, 4(%rax) movq (%rsp), %rdi call _Z6launchP11DataElementRP11CUstream_st movq (%rsp), %rax movl $2, %edi leaq .LC0(%rip), %rsi movl 8(%rax), %ecx movq (%rax), %rdx xorl %eax, %eax call __printf_chk@PLT movq (%rsp), %rax movq (%rax), %rdi call cudaFree@PLT movq (%rsp), %rdi call cudaFree@PLT movq 8(%rsp), %rax subq %fs:40, %rax je .L13 call __stack_chk_fail@PLT .L13: addq $16, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3636: .size _Z9iterationRP11CUstream_st, .-_Z9iterationRP11CUstream_st .section .rodata.str1.1 .LC1: .string " devices found." .LC2: .string "error setting device, #=" .LC3: .string "error getting device properties, #=" .LC4: .string "Using device " .LC5: .string ", name: " .LC6: .string "error in stream creation, #=" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB3637: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 leaq .LC2(%rip), %r14 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 xorl %ebx, %ebx subq $1080, %rsp .cfi_def_cfa_offset 1136 movq %fs:40, %rax movq %rax, 1064(%rsp) xorl %eax, %eax leaq 20(%rsp), %rdi xorl %eax, %eax movl %eax, 20(%rsp) call cudaGetDeviceCount@PLT movl 20(%rsp), %esi leaq _ZSt4cout(%rip), %rdi call _ZNSolsEi@PLT leaq .LC1(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi movq %rax, %rdi call _ZNSolsEPFRSoS_E.isra.0 .L16: cmpl %ebx, 20(%rsp) jle .L34 movl %ebx, %edi call cudaSetDevice@PLT movl %eax, %ebp testl %eax, %eax je .L17 movq %r14, %rsi leaq _ZSt4cout(%rip), %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl %ebp, %edi movq %rax, %r12 call cudaGetErrorString@PLT movq %r12, %rdi movq %rax, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi movq %rax, %rdi call _ZNSolsEPFRSoS_E.isra.0 .L17: leaq 32(%rsp), %r12 movl %ebx, %esi movq %r12, %rdi call cudaGetDeviceProperties_v2@PLT movl %eax, %ebp testl %eax, %eax je .L18 leaq .LC3(%rip), %rsi leaq _ZSt4cout(%rip), %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl %ebp, %edi movq %rax, %r13 call cudaGetErrorString@PLT movq %r13, %rdi movq %rax, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi movq %rax, %rdi call _ZNSolsEPFRSoS_E.isra.0 .L18: leaq .LC4(%rip), %rsi leaq _ZSt4cout(%rip), %rdi movl $10, %ebp call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl %ebx, %esi leaq .LC6(%rip), %r15 movq %rax, %rdi call _ZNSolsEi@PLT leaq .LC5(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %r12, %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi movq %rax, %rdi call _ZNSolsEPFRSoS_E.isra.0 .L20: leaq 24(%rsp), %r13 movq %r13, %rdi call cudaStreamCreate@PLT movl %eax, %r12d testl %eax, %eax je .L19 movq %r15, %rsi leaq _ZSt4cout(%rip), %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl %r12d, %edi movq %rax, 8(%rsp) call cudaGetErrorString@PLT movq 8(%rsp), %rdi movq %rax, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi movq %rax, %rdi call _ZNSolsEPFRSoS_E.isra.0 .L19: movq %r13, %rdi call _Z9iterationRP11CUstream_st movq 24(%rsp), %rdi call cudaStreamDestroy@PLT decl %ebp jne .L20 incl %ebx jmp .L16 .L34: movq 1064(%rsp), %rax subq %fs:40, %rax je .L22 call __stack_chk_fail@PLT .L22: addq $1080, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3637: .size main, .-main .section .rodata.str1.1 .LC7: .string "_Z6KernelP11DataElement" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3665: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC7(%rip), %rdx movq %rax, %rdi leaq _Z6KernelP11DataElement(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3665: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6KernelP11DataElement .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IMAD.MOV.U32 R16, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff107624 */ /* 0x000fe200078e00ff */ /*0020*/ ULDC.64 UR36, c[0x0][0x118] ; /* 0x0000460000247ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff117624 */ /* 0x000fe200078e00ff */ /*0040*/ IADD3 R1, R1, -0x10, RZ ; /* 0xfffffff001017810 */ /* 0x000fc80007ffe0ff */ /*0050*/ LDG.E.64 R2, [R16.64] ; /* 0x0000002410027981 */ /* 0x000ea8000c1e1b00 */ /*0060*/ LDG.E R0, [R16.64+0x8] ; /* 0x0000082410007981 */ /* 0x000ee2000c1e1900 */ /*0070*/ MOV R8, 0x0 ; /* 0x0000000000087802 */ /* 0x000fe20000000f00 */ /*0080*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*0090*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fe20007f1e0ff */ /*00a0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x000fc600078e00ff */ /*00b0*/ LDC.64 R8, c[0x4][R8] ; /* 0x0100000008087b82 */ /* 0x000e220000000a00 */ /*00c0*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */ /* 0x000fe200000e06ff */ /*00d0*/ STL.64 [R1], R2 ; /* 0x0000000201007387 */ /* 0x0043e80000100a00 */ /*00e0*/ STL [R1+0x8], R0 ; /* 0x0000080001007387 */ /* 0x0083e60000100800 */ /*00f0*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x003fe20000000000 */ /*0100*/ MOV R11, 0x170 ; /* 0x00000170000b7802 */ /* 0x000fe40000000f00 */ /*0110*/ MOV R20, 0xf0 ; /* 0x000000f000147802 */ /* 0x000fe40000000f00 */ /*0120*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fc40000000f00 */ /*0130*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*0140*/ IADD3 R20, P0, P1, -R20, R11, R2 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e102 */ /*0150*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*0160*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */ /* 0x000fea0003c00000 */ /*0170*/ LDG.E.64 R2, [R16.64] ; /* 0x0000002410027981 */ /* 0x000ea2000c1e1b00 */ /*0180*/ IMAD.MOV.U32 R4, RZ, RZ, 0x64 ; /* 0x00000064ff047424 */ /* 0x000fca00078e00ff */ /*0190*/ ST.E.U8 [R2.64], R4 ; /* 0x0000000402007985 */ /* 0x004fe8000c101124 */ /*01a0*/ LDG.E R0, [R16.64+0x8] ; /* 0x0000082410007981 */ /* 0x000ea4000c1e1900 */ /*01b0*/ IADD3 R5, R0, 0x1, RZ ; /* 0x0000000100057810 */ /* 0x004fca0007ffe0ff */ /*01c0*/ STG.E [R16.64+0x8], R5 ; /* 0x0000080510007986 */ /* 0x000fe2000c101924 */ /*01d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01e0*/ BRA 0x1e0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <string.h> #include <stdio.h> #include <iostream> struct DataElement { char *name; int value; }; __global__ void Kernel(DataElement *elem) { printf("On device: name=%s, value=%d\n", elem->name, elem->value); elem->name[0] = 'd'; elem->value++; } void launch(DataElement *elem, hipStream_t &stream) { Kernel<<< 1, 1, 0, stream >>>(elem); //cudaDeviceSynchronize(); } void iteration(hipStream_t &stream) { DataElement *e; hipMallocManaged((void**)&e, sizeof(DataElement)); e->value = 10; hipMallocManaged((void**)&(e->name), sizeof(char) * (strlen("hello") + 1) ); strcpy(e->name, "hello"); launch(e, stream); printf("On host: name=%s, value=%d\n", e->name, e->value); hipFree(e->name); hipFree(e); } int main(void) { hipError_t err; int count = 0; err = hipGetDeviceCount(&count); std::cout << count << " devices found." << std::endl; for (int d=0;d<count;d++) { err = hipSetDevice(d); if (err != hipSuccess) { std::cout << "error setting device, #=" << hipGetErrorString(err) << std::endl; } hipDeviceProp_t deviceProp; err = hipGetDeviceProperties(&deviceProp, d); if (err != hipSuccess) { std::cout << "error getting device properties, #=" << hipGetErrorString(err) << std::endl; } std::cout << "Using device " << d << ", name: " << deviceProp.name << std::endl; for (int s = 0 ; s < 10 ; s++) { hipStream_t stream; err = hipStreamCreate(&stream); if (err != hipSuccess) { std::cout << "error in stream creation, #=" << hipGetErrorString(err) << std::endl; } iteration(stream); hipStreamDestroy(stream); } } }
.text .file "dataElem_um.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z21__device_stub__KernelP11DataElement # -- Begin function _Z21__device_stub__KernelP11DataElement .type _Z21__device_stub__KernelP11DataElement,@function _Z21__device_stub__KernelP11DataElement: # @_Z21__device_stub__KernelP11DataElement .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6KernelP11DataElement, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__KernelP11DataElement, .Lfunc_end0-_Z21__device_stub__KernelP11DataElement .cfi_endproc # -- End function .globl _Z6launchP11DataElementRP12ihipStream_t # -- Begin function _Z6launchP11DataElementRP12ihipStream_t .type _Z6launchP11DataElementRP12ihipStream_t,@function _Z6launchP11DataElementRP12ihipStream_t: # @_Z6launchP11DataElementRP12ihipStream_t .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq (%rsi), %r9 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax je .LBB1_2 # %bb.1: popq %rbx .cfi_def_cfa_offset 8 retq .LBB1_2: .cfi_def_cfa_offset 16 movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _Z21__device_stub__KernelP11DataElement # TAILCALL .Lfunc_end1: .size _Z6launchP11DataElementRP12ihipStream_t, .Lfunc_end1-_Z6launchP11DataElementRP12ihipStream_t .cfi_endproc # -- End function .globl _Z9iterationRP12ihipStream_t # -- Begin function _Z9iterationRP12ihipStream_t .type _Z9iterationRP12ihipStream_t,@function _Z9iterationRP12ihipStream_t: # @_Z9iterationRP12ihipStream_t .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rdi, %r14 movq %rsp, %rbx movl $16, %esi movq %rbx, %rdi movl $1, %edx callq hipMallocManaged movq (%rbx), %rdi movl $10, 8(%rdi) movl $6, %esi movl $1, %edx callq hipMallocManaged movq (%rbx), %rax movq (%rax), %rax movw $111, 4(%rax) movl $1819043176, (%rax) # imm = 0x6C6C6568 movq (%rbx), %rdi movq %r14, %rsi callq _Z6launchP11DataElementRP12ihipStream_t movq (%rbx), %rax movq (%rax), %rsi movl 8(%rax), %edx movl $.L.str.1, %edi xorl %eax, %eax callq printf movq (%rbx), %rax movq (%rax), %rdi callq hipFree movq (%rbx), %rdi callq hipFree addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z9iterationRP12ihipStream_t, .Lfunc_end2-_Z9iterationRP12ihipStream_t .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $1496, %rsp # imm = 0x5D8 .cfi_def_cfa_offset 1552 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 leaq 12(%rsp), %rbx movl $0, (%rbx) movq %rbx, %rdi callq hipGetDeviceCount movl (%rbx), %esi movl $_ZSt4cout, %r13d movl $_ZSt4cout, %edi callq _ZNSolsEi movq %rax, %r14 movl $.L.str.2, %esi movl $15, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq (%r14), %rax movq -24(%rax), %rdi addq %r14, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r14, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv cmpl $0, (%rbx) jle .LBB3_17 # %bb.1: # %.lr.ph.preheader xorl %ebx, %ebx leaq 24(%rsp), %r14 leaq 16(%rsp), %r15 .LBB3_2: # %.lr.ph # =>This Loop Header: Depth=1 # Child Loop BB3_13 Depth 2 movl %ebx, %edi callq hipSetDevice testl %eax, %eax je .LBB3_7 # %bb.3: # in Loop: Header=BB3_2 Depth=1 movl %eax, %ebp movl $_ZSt4cout, %edi movl $.L.str.3, %esi movl $24, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl %ebp, %edi callq hipGetErrorString testq %rax, %rax je .LBB3_4 # %bb.5: # in Loop: Header=BB3_2 Depth=1 movq %rax, %r12 movq %rax, %rdi callq strlen movl $_ZSt4cout, %edi movq %r12, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB3_6 .LBB3_4: # in Loop: Header=BB3_2 Depth=1 movq _ZSt4cout(%rip), %rax movq -24(%rax), %rax leaq _ZSt4cout(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .LBB3_6: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit # in Loop: Header=BB3_2 Depth=1 movq _ZSt4cout(%rip), %rax movq -24(%rax), %rdi addq %r13, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movl $_ZSt4cout, %edi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv .LBB3_7: # in Loop: Header=BB3_2 Depth=1 movq %r14, %rdi movl %ebx, %esi callq hipGetDevicePropertiesR0600 testl %eax, %eax je .LBB3_12 # %bb.8: # in Loop: Header=BB3_2 Depth=1 movl %eax, %ebp movl $_ZSt4cout, %edi movl $.L.str.4, %esi movl $35, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl %ebp, %edi callq hipGetErrorString testq %rax, %rax je .LBB3_9 # %bb.10: # in Loop: Header=BB3_2 Depth=1 movq %rax, %r12 movq %rax, %rdi callq strlen movl $_ZSt4cout, %edi movq %r12, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB3_11 .LBB3_9: # in Loop: Header=BB3_2 Depth=1 movq _ZSt4cout(%rip), %rax movq -24(%rax), %rax leaq _ZSt4cout(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .LBB3_11: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit21 # in Loop: Header=BB3_2 Depth=1 movq _ZSt4cout(%rip), %rax movq -24(%rax), %rdi addq %r13, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movl $_ZSt4cout, %edi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv .LBB3_12: # in Loop: Header=BB3_2 Depth=1 movl $_ZSt4cout, %edi movl $.L.str.5, %esi movl $13, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl $_ZSt4cout, %edi movl %ebx, %esi callq _ZNSolsEi movq %rax, %r12 movl $.L.str.6, %esi movl $8, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq %r14, %rdi callq strlen movq %r12, %rdi movq %r14, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq (%r12), %rax movq -24(%rax), %rdi addq %r12, %rdi movl $10, %r14d movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r12, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv .LBB3_13: # Parent Loop BB3_2 Depth=1 # => This Inner Loop Header: Depth=2 movq %r15, %rdi callq hipStreamCreate testl %eax, %eax je .LBB3_20 # %bb.14: # in Loop: Header=BB3_13 Depth=2 movl %eax, %ebp movl $_ZSt4cout, %edi movl $.L.str.7, %esi movl $28, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movl %ebp, %edi callq hipGetErrorString testq %rax, %rax je .LBB3_15 # %bb.18: # in Loop: Header=BB3_13 Depth=2 movq %rax, %r12 movq %rax, %rdi callq strlen movl $_ZSt4cout, %edi movq %r12, %rsi movq %rax, %rdx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l jmp .LBB3_19 .LBB3_15: # in Loop: Header=BB3_13 Depth=2 movq _ZSt4cout(%rip), %rax movq -24(%rax), %rax leaq _ZSt4cout(%rax), %rdi movl 32(%rdi), %esi orl $1, %esi callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate .LBB3_19: # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit24 # in Loop: Header=BB3_13 Depth=2 movq _ZSt4cout(%rip), %rax movq -24(%rax), %rdi addq %r13, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movl $_ZSt4cout, %edi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv .LBB3_20: # in Loop: Header=BB3_13 Depth=2 movq %r15, %rdi callq _Z9iterationRP12ihipStream_t movq 16(%rsp), %rdi callq hipStreamDestroy decl %r14d jne .LBB3_13 # %bb.16: # in Loop: Header=BB3_2 Depth=1 incl %ebx cmpl 12(%rsp), %ebx leaq 24(%rsp), %r14 jl .LBB3_2 .LBB3_17: # %._crit_edge xorl %eax, %eax addq $1496, %rsp # imm = 0x5D8 .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size main, .Lfunc_end3-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB4_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB4_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6KernelP11DataElement, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end4: .size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB5_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB5_2: retq .Lfunc_end5: .size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor .cfi_endproc # -- End function .type _Z6KernelP11DataElement,@object # @_Z6KernelP11DataElement .section .rodata,"a",@progbits .globl _Z6KernelP11DataElement .p2align 3, 0x0 _Z6KernelP11DataElement: .quad _Z21__device_stub__KernelP11DataElement .size _Z6KernelP11DataElement, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "hello" .size .L.str, 6 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "On host: name=%s, value=%d\n" .size .L.str.1, 28 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz " devices found." .size .L.str.2, 16 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "error setting device, #=" .size .L.str.3, 25 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "error getting device properties, #=" .size .L.str.4, 36 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "Using device " .size .L.str.5, 14 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz ", name: " .size .L.str.6, 9 .type .L.str.7,@object # @.str.7 .L.str.7: .asciz "error in stream creation, #=" .size .L.str.7, 29 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6KernelP11DataElement" .size .L__unnamed_1, 24 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__KernelP11DataElement .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6KernelP11DataElement .addrsig_sym _ZSt4cout .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .p2align 2 ; -- Begin function __ockl_printf_append_string_n .type __ockl_printf_append_string_n,@function __ockl_printf_append_string_n: ; @__ockl_printf_append_string_n ; %bb.0: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2 v_mov_b32_e32 v8, v0 s_mov_b32 s0, exec_lo s_delay_alu instid0(VALU_DEP_2) v_cmpx_ne_u64_e32 0, v[6:7] s_xor_b32 s10, exec_lo, s0 s_cbranch_execz .LBB0_87 ; %bb.1: s_load_b64 s[2:3], s[8:9], 0x50 v_dual_mov_b32 v29, 0 :: v_dual_and_b32 v32, 2, v8 v_dual_mov_b32 v11, 1 :: v_dual_and_b32 v0, -3, v8 v_mbcnt_lo_u32_b32 v33, -1, 0 v_mov_b32_e32 v10, 2 s_mov_b32 s12, 0 s_mov_b32 s11, 0 .LBB0_2: ; =>This Loop Header: Depth=1 ; Child Loop BB0_5 Depth 2 ; Child Loop BB0_13 Depth 2 ; Child Loop BB0_21 Depth 2 ; Child Loop BB0_29 Depth 2 ; Child Loop BB0_37 Depth 2 ; Child Loop BB0_45 Depth 2 ; Child Loop BB0_53 Depth 2 ; Child Loop BB0_61 Depth 2 ; Child Loop BB0_69 Depth 2 ; Child Loop BB0_75 Depth 2 ; Child Loop BB0_84 Depth 2 v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5] ; implicit-def: $vgpr2_vgpr3 ; implicit-def: $sgpr4 s_mov_b32 s0, exec_lo v_dual_cndmask_b32 v31, 0, v5 :: v_dual_cndmask_b32 v30, 56, v4 s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_u32_e32 8, v30 s_xor_b32 s1, exec_lo, s0 s_cbranch_execz .LBB0_8 ; %bb.3: ; in Loop: Header=BB0_2 Depth=1 s_waitcnt vmcnt(0) v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_mov_b32 s6, exec_lo v_cmpx_ne_u32_e32 0, v30 s_cbranch_execz .LBB0_7 ; %bb.4: ; %.preheader31.preheader ; in Loop: Header=BB0_2 Depth=1 v_lshlrev_b64 v[8:9], 3, v[30:31] v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v13, v7 v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v12, v6 s_mov_b64 s[4:5], 0 s_mov_b32 s7, 0 .LBB0_5: ; %.preheader31 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 flat_load_u8 v9, v[12:13] v_mov_b32_e32 v15, s12 v_add_co_u32 v12, vcc_lo, v12, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo s_waitcnt vmcnt(0) lgkmcnt(0) v_and_b32_e32 v14, 0xffff, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_lshlrev_b64 v[14:15], s4, v[14:15] s_add_u32 s4, s4, 8 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e64 s0, s4, v8 v_or_b32_e32 v3, v15, v3 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_or_b32_e32 v2, v14, v2 s_or_b32 s7, s0, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB0_5 ; %bb.6: ; %Flow172 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s7 .LBB0_7: ; %Flow174 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 s_mov_b32 s4, 0 .LBB0_8: ; %Flow176 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s1 v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v9, v7 v_mov_b32_e32 v8, v6 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_10 ; %bb.9: ; in Loop: Header=BB0_2 Depth=1 s_waitcnt vmcnt(0) s_clause 0x5 flat_load_u8 v2, v[6:7] flat_load_u8 v3, v[6:7] offset:1 flat_load_u8 v8, v[6:7] offset:2 flat_load_u8 v9, v[6:7] offset:3 flat_load_u8 v12, v[6:7] offset:5 flat_load_u8 v13, v[6:7] offset:4 s_waitcnt vmcnt(5) lgkmcnt(0) v_dual_mov_b32 v15, v29 :: v_dual_and_b32 v2, 0xffff, v2 s_clause 0x1 flat_load_u8 v14, v[6:7] offset:7 flat_load_d16_hi_u8 v15, v[6:7] offset:6 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v3, 8, v3 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v8, 16, v8 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v9, 24, v9 v_or_b32_e32 v2, v3, v2 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v3, 8, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_or3_b32 v2, v2, v8, v9 s_waitcnt vmcnt(2) v_or3_b32 v3, 0, v13, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v2, v2, 0, 0 v_or3_b32 v2, v2, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v8, 24, v14 v_add_nc_u32_e32 v14, -8, v30 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_2) v_or3_b32 v3, v3, v15, v8 v_add_co_u32 v8, vcc_lo, v6, 8 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo .LBB0_10: ; %.loopexit32 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v14 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_16 ; %bb.11: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v12, 0 v_mov_b32_e32 v13, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v14 s_cbranch_execz .LBB0_15 ; %bb.12: ; %.preheader29.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v12, 0 v_mov_b32_e32 v13, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s13, 0 s_mov_b64 s[4:5], 0 .LBB0_13: ; %.preheader29 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v15, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v16, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v14 flat_load_u8 v15, v[15:16] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v16, s12 :: v_dual_and_b32 v15, 0xffff, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[15:16], s0, v[15:16] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s13, vcc_lo, s13 v_or_b32_e32 v13, v16, v13 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v12, v15, v12 s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_13 ; %bb.14: ; %Flow167 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s13 .LBB0_15: ; %Flow169 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr14 .LBB0_16: ; %Flow171 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v16, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_18 ; %bb.17: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v12, v[8:9] flat_load_u8 v13, v[8:9] offset:1 flat_load_u8 v15, v[8:9] offset:2 flat_load_u8 v16, v[8:9] offset:3 flat_load_u8 v17, v[8:9] offset:5 flat_load_u8 v18, v[8:9] offset:4 s_waitcnt vmcnt(5) lgkmcnt(0) v_dual_mov_b32 v19, v29 :: v_dual_and_b32 v12, 0xffff, v12 s_clause 0x1 flat_load_u8 v20, v[8:9] offset:7 flat_load_d16_hi_u8 v19, v[8:9] offset:6 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v13, 8, v13 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v15, 16, v15 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v16, 24, v16 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v12, v13, v12 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v13, 8, v17 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_or3_b32 v12, v12, v15, v16 s_waitcnt vmcnt(2) v_or3_b32 v13, 0, v18, v13 v_add_nc_u32_e32 v16, -8, v14 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v12, v12, 0, 0 v_or3_b32 v12, v12, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v15, 24, v20 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v13, v13, v19, v15 .LBB0_18: ; %.loopexit30 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v16 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_24 ; %bb.19: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v14, 0 v_mov_b32_e32 v15, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v16 s_cbranch_execz .LBB0_23 ; %bb.20: ; %.preheader27.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v14, 0 v_mov_b32_e32 v15, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s13, 0 s_mov_b64 s[4:5], 0 .LBB0_21: ; %.preheader27 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v17, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v18, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v16 flat_load_u8 v17, v[17:18] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v18, s12 :: v_dual_and_b32 v17, 0xffff, v17 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[17:18], s0, v[17:18] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s13, vcc_lo, s13 v_or_b32_e32 v15, v18, v15 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v14, v17, v14 s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_21 ; %bb.22: ; %Flow162 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s13 .LBB0_23: ; %Flow164 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr16 .LBB0_24: ; %Flow166 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v18, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_26 ; %bb.25: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v14, v[8:9] flat_load_u8 v15, v[8:9] offset:1 flat_load_u8 v17, v[8:9] offset:2 flat_load_u8 v18, v[8:9] offset:3 flat_load_u8 v19, v[8:9] offset:5 flat_load_u8 v20, v[8:9] offset:4 s_waitcnt vmcnt(5) lgkmcnt(0) v_dual_mov_b32 v21, v29 :: v_dual_and_b32 v14, 0xffff, v14 s_clause 0x1 flat_load_u8 v22, v[8:9] offset:7 flat_load_d16_hi_u8 v21, v[8:9] offset:6 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v15, 8, v15 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v17, 16, v17 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v18, 24, v18 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v14, v15, v14 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v15, 8, v19 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_or3_b32 v14, v14, v17, v18 s_waitcnt vmcnt(2) v_or3_b32 v15, 0, v20, v15 v_add_nc_u32_e32 v18, -8, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v14, v14, 0, 0 v_or3_b32 v14, v14, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v17, 24, v22 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v15, v15, v21, v17 .LBB0_26: ; %.loopexit28 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v18 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_32 ; %bb.27: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v18 s_cbranch_execz .LBB0_31 ; %bb.28: ; %.preheader25.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s13, 0 s_mov_b64 s[4:5], 0 .LBB0_29: ; %.preheader25 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v19, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v20, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v18 flat_load_u8 v19, v[19:20] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v20, s12 :: v_dual_and_b32 v19, 0xffff, v19 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[19:20], s0, v[19:20] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s13, vcc_lo, s13 v_or_b32_e32 v17, v20, v17 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v16, v19, v16 s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_29 ; %bb.30: ; %Flow157 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s13 .LBB0_31: ; %Flow159 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr18 .LBB0_32: ; %Flow161 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v20, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_34 ; %bb.33: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v16, v[8:9] flat_load_u8 v17, v[8:9] offset:1 flat_load_u8 v19, v[8:9] offset:2 flat_load_u8 v20, v[8:9] offset:3 flat_load_u8 v21, v[8:9] offset:5 flat_load_u8 v22, v[8:9] offset:4 s_waitcnt vmcnt(5) lgkmcnt(0) v_dual_mov_b32 v23, v29 :: v_dual_and_b32 v16, 0xffff, v16 s_clause 0x1 flat_load_u8 v24, v[8:9] offset:7 flat_load_d16_hi_u8 v23, v[8:9] offset:6 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v17, 8, v17 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v19, 16, v19 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v20, 24, v20 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v16, v17, v16 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v17, 8, v21 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_or3_b32 v16, v16, v19, v20 s_waitcnt vmcnt(2) v_or3_b32 v17, 0, v22, v17 v_add_nc_u32_e32 v20, -8, v18 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v16, v16, 0, 0 v_or3_b32 v16, v16, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v19, 24, v24 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v17, v17, v23, v19 .LBB0_34: ; %.loopexit26 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v20 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_40 ; %bb.35: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v20 s_cbranch_execz .LBB0_39 ; %bb.36: ; %.preheader23.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s13, 0 s_mov_b64 s[4:5], 0 .LBB0_37: ; %.preheader23 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v21, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v22, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v20 flat_load_u8 v21, v[21:22] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v22, s12 :: v_dual_and_b32 v21, 0xffff, v21 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[21:22], s0, v[21:22] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s13, vcc_lo, s13 v_or_b32_e32 v19, v22, v19 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v18, v21, v18 s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_37 ; %bb.38: ; %Flow152 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s13 .LBB0_39: ; %Flow154 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr20 .LBB0_40: ; %Flow156 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v22, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_42 ; %bb.41: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v18, v[8:9] flat_load_u8 v19, v[8:9] offset:1 flat_load_u8 v21, v[8:9] offset:2 flat_load_u8 v22, v[8:9] offset:3 flat_load_u8 v23, v[8:9] offset:5 flat_load_u8 v24, v[8:9] offset:4 s_waitcnt vmcnt(5) lgkmcnt(0) v_dual_mov_b32 v25, v29 :: v_dual_and_b32 v18, 0xffff, v18 s_clause 0x1 flat_load_u8 v26, v[8:9] offset:7 flat_load_d16_hi_u8 v25, v[8:9] offset:6 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v19, 8, v19 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v21, 16, v21 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v22, 24, v22 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v18, v19, v18 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v19, 8, v23 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_or3_b32 v18, v18, v21, v22 s_waitcnt vmcnt(2) v_or3_b32 v19, 0, v24, v19 v_add_nc_u32_e32 v22, -8, v20 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v18, v18, 0, 0 v_or3_b32 v18, v18, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v21, 24, v26 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v19, v19, v25, v21 .LBB0_42: ; %.loopexit24 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 ; implicit-def: $vgpr20_vgpr21 ; implicit-def: $sgpr1 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v22 s_xor_b32 s6, exec_lo, s0 s_cbranch_execz .LBB0_48 ; %bb.43: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_mov_b32 s7, exec_lo v_cmpx_ne_u32_e32 0, v22 s_cbranch_execz .LBB0_47 ; %bb.44: ; %.preheader21.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s13, 0 s_mov_b64 s[4:5], 0 .LBB0_45: ; %.preheader21 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v23, vcc_lo, v8, s4 v_add_co_ci_u32_e32 v24, vcc_lo, s5, v9, vcc_lo s_add_u32 s4, s4, 1 s_addc_u32 s5, s5, 0 v_cmp_eq_u32_e32 vcc_lo, s4, v22 flat_load_u8 v23, v[23:24] s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_mov_b32 v24, s12 :: v_dual_and_b32 v23, 0xffff, v23 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[23:24], s0, v[23:24] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s13, vcc_lo, s13 v_or_b32_e32 v21, v24, v21 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v20, v23, v20 s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_45 ; %bb.46: ; %Flow147 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s13 .LBB0_47: ; %Flow149 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s7 s_mov_b32 s1, 0 ; implicit-def: $vgpr22 .LBB0_48: ; %Flow151 ; in Loop: Header=BB0_2 Depth=1 s_or_saveexec_b32 s0, s6 v_mov_b32_e32 v24, s1 s_xor_b32 exec_lo, exec_lo, s0 s_cbranch_execz .LBB0_50 ; %bb.49: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v20, v[8:9] flat_load_u8 v21, v[8:9] offset:1 flat_load_u8 v23, v[8:9] offset:2 flat_load_u8 v24, v[8:9] offset:3 flat_load_u8 v25, v[8:9] offset:5 flat_load_u8 v26, v[8:9] offset:4 s_waitcnt vmcnt(5) lgkmcnt(0) v_dual_mov_b32 v27, v29 :: v_dual_and_b32 v20, 0xffff, v20 s_clause 0x1 flat_load_u8 v28, v[8:9] offset:7 flat_load_d16_hi_u8 v27, v[8:9] offset:6 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v21, 8, v21 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v23, 16, v23 s_waitcnt vmcnt(4) v_lshlrev_b32_e32 v24, 24, v24 v_add_co_u32 v8, vcc_lo, v8, 8 v_or_b32_e32 v20, v21, v20 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v21, 8, v25 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_or3_b32 v20, v20, v23, v24 s_waitcnt vmcnt(2) v_or3_b32 v21, 0, v26, v21 v_add_nc_u32_e32 v24, -8, v22 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_or3_b32 v20, v20, 0, 0 v_or3_b32 v20, v20, 0, 0 s_waitcnt vmcnt(1) lgkmcnt(1) v_lshlrev_b32_e32 v23, 24, v28 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v21, v21, v27, v23 .LBB0_50: ; %.loopexit22 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s0, exec_lo v_cmpx_gt_u32_e32 8, v24 s_xor_b32 s4, exec_lo, s0 s_cbranch_execz .LBB0_56 ; %bb.51: ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_mov_b32 s5, exec_lo v_cmpx_ne_u32_e32 0, v24 s_cbranch_execz .LBB0_55 ; %bb.52: ; %.preheader.preheader ; in Loop: Header=BB0_2 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_mov_b64 s[0:1], 0 s_mov_b32 s6, 0 .LBB0_53: ; %.preheader ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 flat_load_u8 v25, v[8:9] v_mov_b32_e32 v26, s12 v_add_nc_u32_e32 v24, -1, v24 v_add_co_u32 v8, vcc_lo, v8, 1 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_cmp_eq_u32_e32 vcc_lo, 0, v24 s_waitcnt vmcnt(0) lgkmcnt(0) v_and_b32_e32 v25, 0xffff, v25 v_lshlrev_b64 v[25:26], s0, v[25:26] s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_or_b32_e32 v23, v26, v23 v_or_b32_e32 v22, v25, v22 s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_53 ; %bb.54: ; %Flow142 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s6 .LBB0_55: ; %Flow144 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 ; implicit-def: $vgpr8_vgpr9 .LBB0_56: ; %Flow146 ; in Loop: Header=BB0_2 Depth=1 s_and_not1_saveexec_b32 s0, s4 s_cbranch_execz .LBB0_58 ; %bb.57: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x5 flat_load_u8 v22, v[8:9] flat_load_u8 v23, v[8:9] offset:1 flat_load_u8 v24, v[8:9] offset:2 flat_load_u8 v25, v[8:9] offset:3 flat_load_u8 v26, v[8:9] offset:5 flat_load_u8 v27, v[8:9] offset:4 v_mov_b32_e32 v28, v29 s_clause 0x1 flat_load_u8 v34, v[8:9] offset:7 flat_load_d16_hi_u8 v28, v[8:9] offset:6 s_waitcnt vmcnt(7) lgkmcnt(0) v_and_b32_e32 v8, 0xffff, v22 s_waitcnt vmcnt(6) v_lshlrev_b32_e32 v9, 8, v23 s_waitcnt vmcnt(5) v_lshlrev_b32_e32 v22, 16, v24 s_waitcnt vmcnt(3) v_lshlrev_b32_e32 v23, 8, v26 v_or_b32_e32 v8, v9, v8 v_lshlrev_b32_e32 v9, 24, v25 s_delay_alu instid0(VALU_DEP_1) v_or3_b32 v8, v8, v22, v9 s_waitcnt vmcnt(2) v_or3_b32 v9, 0, v27, v23 s_waitcnt vmcnt(1) v_lshlrev_b32_e32 v22, 24, v34 v_or3_b32 v8, v8, 0, 0 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_or3_b32 v23, v9, v28, v22 v_or3_b32 v22, v8, 0, 0 .LBB0_58: ; %.loopexit ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 v_mov_b32_e32 v28, v33 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v28 v_cmp_eq_u32_e64 s0, s0, v28 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_64 ; %bb.59: ; in Loop: Header=BB0_2 Depth=1 s_waitcnt lgkmcnt(0) global_load_b64 v[26:27], v29, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[8:9], v29, s[2:3] offset:40 global_load_b64 v[24:25], v29, s[2:3] s_mov_b32 s4, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v9, v9, v27 v_and_b32_e32 v8, v8, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v9, v9, 24 v_mul_hi_u32 v34, v8, 24 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v9, v34, v9 s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v24, v8 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v25, v9, vcc_lo global_load_b64 v[24:25], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v29, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[26:27] s_cbranch_execz .LBB0_63 ; %bb.60: ; %.preheader3.i.i19.preheader ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s5, 0 .LBB0_61: ; %.preheader3.i.i19 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[24:25], v29, s[2:3] offset:40 global_load_b64 v[34:35], v29, s[2:3] v_dual_mov_b32 v27, v9 :: v_dual_mov_b32 v26, v8 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v24, v24, v26 s_waitcnt vmcnt(0) v_mad_u64_u32 v[8:9], null, v24, 24, v[34:35] v_and_b32_e32 v34, v25, v27 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[24:25], null, v34, 24, v[9:10] v_mov_b32_e32 v9, v24 global_load_b64 v[24:25], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v29, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[26:27] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_61 ; %bb.62: ; %Flow139 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s5 .LBB0_63: ; %Flow141 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_64: ; %.loopexit4.i.i14 ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[34:35], v29, s[2:3] offset:40 global_load_b128 v[24:27], v29, s[2:3] v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s15, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v34 v_readfirstlane_b32 s7, v35 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s13, s6, 24 s_mul_i32 s14, s6, 24 s_and_saveexec_b32 s16, s0 s_cbranch_execz .LBB0_66 ; %bb.65: ; in Loop: Header=BB0_2 Depth=1 s_add_i32 s17, s13, s1 s_waitcnt vmcnt(0) v_add_co_u32 v34, vcc_lo, v24, s14 v_add_co_ci_u32_e32 v35, vcc_lo, s17, v25, vcc_lo v_dual_mov_b32 v8, s15 :: v_dual_mov_b32 v9, v29 global_store_b128 v[34:35], v[8:11], off offset:8 .LBB0_66: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s16 v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5] v_or_b32_e32 v8, 0, v1 v_or_b32_e32 v9, v0, v32 v_lshl_add_u32 v34, v30, 2, 28 s_lshl_b64 s[6:7], s[6:7], 12 s_delay_alu instid0(VALU_DEP_2) v_dual_cndmask_b32 v1, v8, v1 :: v_dual_cndmask_b32 v0, v9, v0 v_lshlrev_b64 v[8:9], 6, v[28:29] s_waitcnt vmcnt(0) v_add_co_u32 v26, vcc_lo, v26, s6 v_and_b32_e32 v34, 0x1e0, v34 v_add_co_ci_u32_e32 v27, vcc_lo, s7, v27, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v8, vcc_lo, v26, v8 v_and_or_b32 v0, 0xffffff1f, v0, v34 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v9, vcc_lo, v27, v9, vcc_lo s_clause 0x3 global_store_b128 v[8:9], v[0:3], off global_store_b128 v[8:9], v[12:15], off offset:16 global_store_b128 v[8:9], v[16:19], off offset:32 global_store_b128 v[8:9], v[20:23], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_74 ; %bb.67: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x1 global_load_b64 v[16:17], v29, s[2:3] offset:32 glc global_load_b64 v[0:1], v29, s[2:3] offset:40 v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v15, s5 s_waitcnt vmcnt(0) v_readfirstlane_b32 s16, v0 v_readfirstlane_b32 s17, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[16:17], s[16:17], s[4:5] s_mul_i32 s7, s17, 24 s_mul_hi_u32 s15, s16, 24 s_mul_i32 s16, s16, 24 s_add_i32 s15, s15, s7 v_add_co_u32 v12, vcc_lo, v24, s16 v_add_co_ci_u32_e32 v13, vcc_lo, s15, v25, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[12:13], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v29, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[16:17] s_cbranch_execz .LBB0_70 ; %bb.68: ; %.preheader1.i.i17.preheader ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s15, 0 .LBB0_69: ; %.preheader1.i.i17 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[12:13], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v29, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s15, vcc_lo, s15 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s15 s_cbranch_execnz .LBB0_69 .LBB0_70: ; %Flow137 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s7 global_load_b64 v[0:1], v29, s[2:3] offset:16 s_mov_b32 s15, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s15, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_72 ; %bb.71: ; in Loop: Header=BB0_2 Depth=1 s_bcnt1_i32_b32 s15, s15 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v28, s15 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[28:29], off offset:8 .LBB0_72: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_74 ; %bb.73: ; in Loop: Header=BB0_2 Depth=1 global_load_b32 v28, v[0:1], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v28 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[28:29], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_74: ; %Flow138 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s13, s13, s1 v_add_co_u32 v0, vcc_lo, v24, s14 v_add_co_ci_u32_e32 v1, vcc_lo, s13, v25, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_75: ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_77 ; %bb.76: ; in Loop: Header=BB0_75 Depth=2 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_77: ; in Loop: Header=BB0_75 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_79 ; %bb.78: ; in Loop: Header=BB0_75 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_80 .LBB0_79: ; in Loop: Header=BB0_75 Depth=2 s_mov_b32 s1, -1 .LBB0_80: ; %Flow132 ; in Loop: Header=BB0_75 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_75 ; %bb.81: ; in Loop: Header=BB0_2 Depth=1 global_load_b128 v[0:3], v[8:9], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_85 ; %bb.82: ; in Loop: Header=BB0_2 Depth=1 s_clause 0x2 global_load_b64 v[2:3], v29, s[2:3] offset:40 global_load_b64 v[8:9], v29, s[2:3] offset:24 glc global_load_b64 v[14:15], v29, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v16, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v17, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v12, vcc_lo, v16, s4 v_add_co_ci_u32_e32 v13, vcc_lo, s5, v17, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[12:13] v_dual_cndmask_b32 v13, v13, v17 :: v_dual_cndmask_b32 v12, v12, v16 v_and_b32_e32 v3, v13, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v2, v12, v2 v_mul_hi_u32 v16, v2, 24 v_mul_lo_u32 v2, v2, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v2, vcc_lo, v14, v2 v_mov_b32_e32 v14, v8 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v3, v16, v3 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v3, vcc_lo, v15, v3, vcc_lo v_mov_b32_e32 v15, v9 global_store_b64 v[2:3], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[14:15], v29, v[12:15], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[14:15], v[8:9] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_85 ; %bb.83: ; %.preheader.i.i16.preheader ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s0, 0 .LBB0_84: ; %.preheader.i.i16 ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[2:3], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v29, v[12:15], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[14:15] v_dual_mov_b32 v15, v9 :: v_dual_mov_b32 v14, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_84 .LBB0_85: ; %__ockl_hostcall_preview.exit20 ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s1 v_sub_co_u32 v4, vcc_lo, v4, v30 v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v31, vcc_lo v_add_co_u32 v6, s0, v6, v30 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e64 v7, s0, v7, v31, s0 v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_2 ; %bb.86: ; %Flow177 s_or_b32 exec_lo, exec_lo, s11 ; implicit-def: $vgpr8 .LBB0_87: ; %Flow193 s_and_not1_saveexec_b32 s1, s10 s_cbranch_execz .LBB0_116 ; %bb.88: s_load_b64 s[2:3], s[8:9], 0x50 s_waitcnt vmcnt(0) v_mbcnt_lo_u32_b32 v2, -1, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_readfirstlane_b32 s0, v2 v_mov_b32_e32 v9, 0 v_mov_b32_e32 v10, 0 v_cmp_eq_u32_e64 s0, s0, v2 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB0_94 ; %bb.89: v_mov_b32_e32 v0, 0 s_mov_b32 s5, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[5:6], v0, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v0, s[2:3] offset:40 global_load_b64 v[9:10], v0, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v3, v3, v5 v_and_b32_e32 v4, v4, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v7, v3, 24 v_mul_lo_u32 v4, v4, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v7, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v9, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v10, v4, vcc_lo global_load_b64 v[3:4], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[9:10], v0, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[9:10], v[5:6] s_cbranch_execz .LBB0_93 ; %bb.90: ; %.preheader3.i.i.preheader s_mov_b32 s6, 0 .LBB0_91: ; %.preheader3.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[3:4], v0, s[2:3] offset:40 global_load_b64 v[11:12], v0, s[2:3] v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v6, v10 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v3, v3, v5 s_waitcnt vmcnt(0) v_mad_u64_u32 v[9:10], null, v3, 24, v[11:12] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v3, v10 :: v_dual_and_b32 v4, v4, v6 v_mad_u64_u32 v[10:11], null, v4, 24, v[3:4] global_load_b64 v[3:4], v[9:10], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[9:10], v0, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[5:6] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_91 ; %bb.92: ; %Flow189 s_or_b32 exec_lo, exec_lo, s6 .LBB0_93: ; %Flow191 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_94: ; %.loopexit4.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v9 v_readfirstlane_b32 s5, v10 s_mov_b32 s11, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[11:12], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v11 v_readfirstlane_b32 s7, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s8, s7, 24 s_mul_hi_u32 s9, s6, 24 s_mul_i32 s10, s6, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_96 ; %bb.95: s_add_i32 s13, s9, s8 s_waitcnt vmcnt(0) v_add_co_u32 v13, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v14, vcc_lo, s13, v5, vcc_lo v_dual_mov_b32 v9, s11 :: v_dual_mov_b32 v10, v3 v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1 global_store_b128 v[13:14], v[9:12], off offset:8 .LBB0_96: s_or_b32 exec_lo, exec_lo, s12 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[9:10], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v2, v9 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1f, v8, 32 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v10, vcc_lo v_mov_b32_e32 v2, v3 v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15 v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_104 ; %bb.97: v_mov_b32_e32 v10, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5 s_waitcnt vmcnt(0) v_and_b32_e32 v1, s5, v1 v_and_b32_e32 v0, s4, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v2, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v2, v1 v_add_co_u32 v8, vcc_lo, v4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_100 ; %bb.98: ; %.preheader1.i.i.preheader s_mov_b32 s11, 0 .LBB0_99: ; %.preheader1.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_99 .LBB0_100: ; %Flow187 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s11, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s11, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_102 ; %bb.101: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_102: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_104 ; %bb.103: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_104: ; %Flow188 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s9, s9, s8 v_add_co_u32 v0, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_105: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_107 ; %bb.106: ; in Loop: Header=BB0_105 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_107: ; in Loop: Header=BB0_105 Depth=1 s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s6, v2 s_cmp_eq_u32 s6, 0 s_cbranch_scc1 .LBB0_109 ; %bb.108: ; in Loop: Header=BB0_105 Depth=1 s_mov_b32 s6, 0 s_sleep 1 s_branch .LBB0_110 .LBB0_109: ; in Loop: Header=BB0_105 Depth=1 s_mov_b32 s6, -1 .LBB0_110: ; %Flow182 ; in Loop: Header=BB0_105 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s6 s_cbranch_vccnz .LBB0_105 ; %bb.111: global_load_b128 v[0:3], v[6:7], off s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_115 ; %bb.112: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_115 ; %bb.113: ; %.preheader.i.i.preheader s_mov_b32 s0, 0 .LBB0_114: ; %.preheader.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_114 .LBB0_115: ; %__ockl_hostcall_preview.exit s_or_b32 exec_lo, exec_lo, s6 .LBB0_116: ; %Flow194 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_waitcnt vmcnt(0) lgkmcnt(0) s_setpc_b64 s[30:31] .Lfunc_end0: .size __ockl_printf_append_string_n, .Lfunc_end0-__ockl_printf_append_string_n ; -- End function .section .AMDGPU.csdata,"",@progbits ; Function info: ; codeLenInByte = 5688 ; NumSgprs: 34 ; NumVgprs: 36 ; ScratchSize: 0 ; MemoryBound: 0 .text .protected _Z6KernelP11DataElement ; -- Begin function _Z6KernelP11DataElement .globl _Z6KernelP11DataElement .p2align 8 .type _Z6KernelP11DataElement,@function _Z6KernelP11DataElement: ; @_Z6KernelP11DataElement ; %bb.0: s_load_b64 s[20:21], s[0:1], 0x0 v_mbcnt_lo_u32_b32 v38, -1, 0 v_mov_b32_e32 v6, 0 s_mov_b64 s[18:19], s[0:1] s_mov_b32 s32, 0 s_delay_alu instid0(VALU_DEP_2) v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v38 s_load_b64 s[22:23], s[0:1], 0x58 s_waitcnt lgkmcnt(0) s_clause 0x1 s_load_b64 s[24:25], s[20:21], 0x0 s_load_b32 s28, s[20:21], 0x8 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v4 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_6 ; %bb.1: v_mov_b32_e32 v0, 0 s_mov_b32 s2, exec_lo global_load_b64 v[8:9], v0, s[22:23] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[1:2], v0, s[22:23] offset:40 global_load_b64 v[5:6], v0, s[22:23] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v2, v2, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v3, v1, 24 v_mul_lo_u32 v2, v2, 24 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v2, v3, v2 s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v5, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo global_load_b64 v[6:7], v[1:2], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[6:7], v[8:9] s_cbranch_execz .LBB1_5 ; %bb.2: ; %.preheader3.i.i.i.preheader s_mov_b32 s3, 0 .LBB1_3: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[1:2], v0, s[22:23] offset:40 global_load_b64 v[10:11], v0, s[22:23] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v7, v2, v9 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11] v_mov_b32_e32 v1, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2] v_mov_b32_e32 v6, v2 global_load_b64 v[6:7], v[5:6], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[22:23] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] s_or_b32 s3, vcc_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB1_3 ; %bb.4: ; %Flow90 s_or_b32 exec_lo, exec_lo, s3 .LBB1_5: ; %Flow92 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s2 .LBB1_6: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v5, 0 v_readfirstlane_b32 s2, v6 v_readfirstlane_b32 s3, v7 s_mov_b32 s8, exec_lo s_clause 0x1 global_load_b64 v[8:9], v5, s[22:23] offset:40 global_load_b128 v[0:3], v5, s[22:23] s_waitcnt vmcnt(1) v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[4:5], s[2:3], s[4:5] s_mul_i32 s1, s5, 24 s_mul_hi_u32 s6, s4, 24 s_mul_i32 s7, s4, 24 s_and_saveexec_b32 s9, s0 s_cbranch_execz .LBB1_8 ; %bb.7: v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5 s_add_i32 s8, s6, s1 s_waitcnt vmcnt(0) v_add_co_u32 v10, vcc_lo, v0, s7 v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1 global_store_b128 v[10:11], v[6:9], off offset:8 .LBB1_8: s_or_b32 exec_lo, exec_lo, s9 s_lshl_b64 s[4:5], s[4:5], 12 v_lshlrev_b64 v[6:7], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v2, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo s_mov_b32 s8, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v2, v6 s_mov_b32 s11, s8 s_mov_b32 s9, s8 s_mov_b32 s10, s8 v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5 v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11 v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9 v_mov_b32_e32 v10, s8 s_clause 0x3 global_store_b128 v[8:9], v[4:7], off global_store_b128 v[8:9], v[10:13], off offset:16 global_store_b128 v[8:9], v[10:13], off offset:32 global_store_b128 v[8:9], v[10:13], off offset:48 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB1_15 ; %bb.9: v_mov_b32_e32 v10, 0 s_mov_b32 s5, exec_lo s_clause 0x1 global_load_b64 v[13:14], v10, s[22:23] offset:32 glc global_load_b64 v[2:3], v10, s[22:23] offset:40 v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3 s_waitcnt vmcnt(0) v_and_b32_e32 v3, s3, v3 v_and_b32_e32 v2, s2, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v4, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v4, v3 v_add_co_u32 v6, vcc_lo, v0, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo global_store_b64 v[6:7], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[22:23] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[4:5], v[13:14] s_cbranch_execz .LBB1_11 .LBB1_10: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[22:23] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_or_b32 s8, vcc_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB1_10 .LBB1_11: ; %Flow88 s_or_b32 exec_lo, exec_lo, s5 v_mov_b32_e32 v5, 0 s_mov_b32 s8, exec_lo s_mov_b32 s5, exec_lo v_mbcnt_lo_u32_b32 v4, s8, 0 global_load_b64 v[2:3], v5, s[22:23] offset:16 v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB1_13 ; %bb.12: s_bcnt1_i32_b32 s8, s8 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s8 s_waitcnt vmcnt(0) global_atomic_add_u64 v[2:3], v[4:5], off offset:8 .LBB1_13: s_or_b32 exec_lo, exec_lo, s5 s_waitcnt vmcnt(0) global_load_b64 v[4:5], v[2:3], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_cbranch_vccnz .LBB1_15 ; %bb.14: global_load_b32 v2, v[2:3], off offset:24 v_mov_b32_e32 v3, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s5, v2 s_waitcnt_vscnt null, 0x0 global_store_b64 v[4:5], v[2:3], off s_and_b32 m0, s5, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB1_15: ; %Flow89 s_or_b32 exec_lo, exec_lo, s4 s_add_i32 s6, s6, s1 v_add_co_u32 v0, vcc_lo, v0, s7 v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB1_16: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_18 ; %bb.17: ; in Loop: Header=BB1_16 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB1_18: ; in Loop: Header=BB1_16 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB1_20 ; %bb.19: ; in Loop: Header=BB1_16 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB1_21 .LBB1_20: ; in Loop: Header=BB1_16 Depth=1 s_mov_b32 s1, -1 .LBB1_21: ; %Flow83 ; in Loop: Header=BB1_16 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB1_16 ; %bb.22: global_load_b64 v[0:1], v[8:9], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_26 ; %bb.23: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[22:23] offset:40 global_load_b64 v[9:10], v8, s[22:23] offset:24 glc global_load_b64 v[6:7], v8, s[22:23] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s2 v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[22:23] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB1_26 ; %bb.24: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB1_25: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[22:23] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB1_25 .LBB1_26: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[0:1] s_add_u32 s0, s0, .str@rel32@lo+4 s_addc_u32 s1, s1, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1 s_cmp_lg_u64 s[0:1], 0 s_mov_b64 s[26:27], 0 s_cselect_b32 s4, 30, 0 v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4 s_add_u32 s8, s18, 8 s_addc_u32 s9, s19, 0 s_getpc_b64 s[2:3] s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4 s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_swappc_b64 s[30:31], s[2:3] s_cmp_eq_u64 s[24:25], 0 s_cbranch_scc1 .LBB1_30 ; %bb.27: ; %.preheader.preheader v_mov_b32_e32 v2, 0 s_add_u32 s0, s24, -1 s_addc_u32 s1, s25, -1 .LBB1_28: ; %.preheader ; =>This Inner Loop Header: Depth=1 global_load_u8 v3, v2, s[0:1] offset:1 s_add_u32 s2, s0, 1 s_addc_u32 s3, s1, 0 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b64 s[0:1], s[2:3] s_waitcnt vmcnt(0) v_cmp_ne_u16_e32 vcc_lo, 0, v3 s_cbranch_vccnz .LBB1_28 ; %bb.29: s_sub_u32 s0, s2, s24 s_subb_u32 s1, s3, s25 s_add_u32 s26, s0, 1 s_addc_u32 s27, s1, 0 .LBB1_30: v_dual_mov_b32 v2, s24 :: v_dual_mov_b32 v3, s25 v_dual_mov_b32 v4, s26 :: v_dual_mov_b32 v5, s27 s_add_u32 s8, s18, 8 s_addc_u32 s9, s19, 0 s_getpc_b64 s[0:1] s_add_u32 s0, s0, __ockl_printf_append_string_n@rel32@lo+4 s_addc_u32 s1, s1, __ockl_printf_append_string_n@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3) s_swappc_b64 s[30:31], s[0:1] ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v38 v_mov_b32_e32 v5, 0 v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, 0 v_cmp_eq_u32_e64 s0, s0, v38 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_36 ; %bb.31: v_mov_b32_e32 v1, 0 s_mov_b32 s2, exec_lo global_load_b64 v[7:8], v1, s[22:23] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v1, s[22:23] offset:40 global_load_b64 v[4:5], v1, s[22:23] s_waitcnt vmcnt(1) v_and_b32_e32 v2, v2, v7 v_and_b32_e32 v3, v3, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v6, v2, 24 v_mul_lo_u32 v3, v3, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v6, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v4, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo global_load_b64 v[5:6], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[22:23] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[5:6], v[7:8] s_cbranch_execz .LBB1_35 ; %bb.32: ; %.preheader3.i.i.i10.preheader s_mov_b32 s3, 0 .LBB1_33: ; %.preheader3.i.i.i10 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[2:3], v1, s[22:23] offset:40 global_load_b64 v[9:10], v1, s[22:23] v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v2, v2, v7 s_waitcnt vmcnt(0) v_mad_u64_u32 v[4:5], null, v2, 24, v[9:10] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v2, v5 :: v_dual_and_b32 v3, v3, v8 v_mad_u64_u32 v[5:6], null, v3, 24, v[2:3] global_load_b64 v[5:6], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[22:23] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8] s_or_b32 s3, vcc_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB1_33 ; %bb.34: ; %Flow74 s_or_b32 exec_lo, exec_lo, s3 .LBB1_35: ; %Flow76 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s2 .LBB1_36: ; %.loopexit4.i.i.i5 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v39, 0 v_readfirstlane_b32 s2, v5 v_readfirstlane_b32 s3, v6 s_mov_b32 s8, exec_lo s_clause 0x1 global_load_b64 v[7:8], v39, s[22:23] offset:40 global_load_b128 v[1:4], v39, s[22:23] s_waitcnt vmcnt(1) v_readfirstlane_b32 s4, v7 v_readfirstlane_b32 s5, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[4:5], s[2:3], s[4:5] s_mul_i32 s1, s5, 24 s_mul_hi_u32 s6, s4, 24 s_mul_i32 s7, s4, 24 s_and_saveexec_b32 s9, s0 s_cbranch_execz .LBB1_38 ; %bb.37: v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, v39 s_add_i32 s8, s6, s1 s_waitcnt vmcnt(0) v_add_co_u32 v9, vcc_lo, v1, s7 v_add_co_ci_u32_e32 v10, vcc_lo, s8, v2, vcc_lo v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1 global_store_b128 v[9:10], v[5:8], off offset:8 .LBB1_38: s_or_b32 exec_lo, exec_lo, s9 s_lshl_b64 s[4:5], s[4:5], 12 v_lshlrev_b64 v[5:6], 6, v[38:39] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v3, s4 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo s_mov_b32 s8, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, v3, v5 s_mov_b32 s9, s8 s_mov_b32 s10, s8 s_mov_b32 s11, s8 v_and_or_b32 v36, 0xffffff1d, v0, 34 v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo v_dual_mov_b32 v38, s28 :: v_dual_mov_b32 v3, s8 v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10 v_mov_b32_e32 v6, s11 s_clause 0x3 global_store_b128 v[7:8], v[36:39], off global_store_b128 v[7:8], v[3:6], off offset:16 global_store_b128 v[7:8], v[3:6], off offset:32 global_store_b128 v[7:8], v[3:6], off offset:48 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB1_46 ; %bb.39: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2 v_mov_b32_e32 v10, s3 s_clause 0x1 global_load_b64 v[11:12], v0, s[22:23] offset:32 glc global_load_b64 v[3:4], v0, s[22:23] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s8, v3 v_readfirstlane_b32 s9, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[8:9], s[2:3] s_mul_i32 s5, s9, 24 s_mul_hi_u32 s9, s8, 24 s_mul_i32 s8, s8, 24 s_add_i32 s9, s9, s5 v_add_co_u32 v7, vcc_lo, v1, s8 v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo s_mov_b32 s5, exec_lo global_store_b64 v[7:8], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[22:23] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[11:12] s_cbranch_execz .LBB1_42 ; %bb.40: ; %.preheader1.i.i.i8.preheader s_mov_b32 s8, 0 .LBB1_41: ; %.preheader1.i.i.i8 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[22:23] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s8, vcc_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB1_41 .LBB1_42: ; %Flow72 s_or_b32 exec_lo, exec_lo, s5 v_mov_b32_e32 v6, 0 s_mov_b32 s8, exec_lo s_mov_b32 s5, exec_lo v_mbcnt_lo_u32_b32 v0, s8, 0 global_load_b64 v[3:4], v6, s[22:23] offset:16 v_cmpx_eq_u32_e32 0, v0 s_cbranch_execz .LBB1_44 ; %bb.43: s_bcnt1_i32_b32 s8, s8 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s8 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB1_44: s_or_b32 exec_lo, exec_lo, s5 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB1_46 ; %bb.45: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s5, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s5, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB1_46: ; %Flow73 s_or_b32 exec_lo, exec_lo, s4 s_add_i32 s6, s6, s1 v_add_co_u32 v0, vcc_lo, v1, s7 v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB1_47: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_49 ; %bb.48: ; in Loop: Header=BB1_47 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB1_49: ; in Loop: Header=BB1_47 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB1_51 ; %bb.50: ; in Loop: Header=BB1_47 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB1_52 .LBB1_51: ; in Loop: Header=BB1_47 Depth=1 s_mov_b32 s1, -1 .LBB1_52: ; %Flow67 ; in Loop: Header=BB1_47 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB1_47 ; %bb.53: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB1_57 ; %bb.54: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[22:23] offset:40 global_load_b64 v[7:8], v6, s[22:23] offset:24 glc global_load_b64 v[4:5], v6, s[22:23] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s2 v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[22:23] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB1_57 ; %bb.55: ; %.preheader.i.i.i7.preheader s_mov_b32 s0, 0 .LBB1_56: ; %.preheader.i.i.i7 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[22:23] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB1_56 .LBB1_57: ; %__ockl_printf_append_args.exit s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x64 global_load_b64 v[0:1], v2, s[20:21] s_waitcnt vmcnt(0) flat_store_b8 v[0:1], v3 global_load_b32 v0, v2, s[20:21] offset:8 s_waitcnt vmcnt(0) v_add_nc_u32_e32 v0, 1, v0 global_store_b32 v2, v0, s[20:21] offset:8 s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6KernelP11DataElement .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 40 .amdhsa_next_free_sgpr 33 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z6KernelP11DataElement, .Lfunc_end1-_Z6KernelP11DataElement ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 3044 ; NumSgprs: 35 ; NumVgprs: 40 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 35 ; NumVGPRsForWavesPerEU: 40 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "On device: name=%s, value=%d\n" .size .str, 30 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims - .offset: 88 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6KernelP11DataElement .private_segment_fixed_size: 0 .sgpr_count: 35 .sgpr_spill_count: 0 .symbol: _Z6KernelP11DataElement.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 40 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
1c1341b84b20db1226ee47602be96ae52298e3aa
#include "includes.h" __global__ void ElementwiseNorm(float * A, float *B, int size) { int id = blockDim.x*blockIdx.y*gridDim.x + blockDim.x*blockIdx.x + threadIdx.x; if (id < size) A[id] /= B[id]; }
.file "tmpxft_002f3be9_00000000-6_ElementwiseNorm.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z38__device_stub__Z15ElementwiseNormPfS_iPfS_i .type _Z38__device_stub__Z15ElementwiseNormPfS_iPfS_i, @function _Z38__device_stub__Z15ElementwiseNormPfS_iPfS_i: .LFB2032: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movl %edx, 12(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 12(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z15ElementwiseNormPfS_i(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z38__device_stub__Z15ElementwiseNormPfS_iPfS_i, .-_Z38__device_stub__Z15ElementwiseNormPfS_iPfS_i .globl _Z15ElementwiseNormPfS_i .type _Z15ElementwiseNormPfS_i, @function _Z15ElementwiseNormPfS_i: .LFB2033: .cfi_startproc endbr64 jmp _Z38__device_stub__Z15ElementwiseNormPfS_iPfS_i .cfi_endproc .LFE2033: .size _Z15ElementwiseNormPfS_i, .-_Z15ElementwiseNormPfS_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z15ElementwiseNormPfS_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z15ElementwiseNormPfS_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z15ElementwiseNormPfS_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e280000002600 */ /*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e280000002500 */ /*0030*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e620000002100 */ /*0040*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */ /* 0x001fc800078e0203 */ /*0050*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */ /* 0x002fca00078e0205 */ /*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */ /* 0x000fda0003f06270 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*00a0*/ IMAD.WIDE R2, R0, R5, c[0x0][0x168] ; /* 0x00005a0000027625 */ /* 0x000fcc00078e0205 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */ /* 0x000fca00078e0205 */ /*00d0*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */ /* 0x000ee2000c1e1900 */ /*00e0*/ BSSY B0, 0x1a0 ; /* 0x000000b000007945 */ /* 0x000fe20003800000 */ /*00f0*/ MUFU.RCP R6, R3 ; /* 0x0000000300067308 */ /* 0x004e300000001000 */ /*0100*/ FCHK P0, R0, R3 ; /* 0x0000000300007302 */ /* 0x008e620000000000 */ /*0110*/ FFMA R7, -R3, R6, 1 ; /* 0x3f80000003077423 */ /* 0x001fc80000000106 */ /*0120*/ FFMA R7, R6, R7, R6 ; /* 0x0000000706077223 */ /* 0x000fc80000000006 */ /*0130*/ FFMA R6, R0, R7, RZ ; /* 0x0000000700067223 */ /* 0x000fc800000000ff */ /*0140*/ FFMA R8, -R3, R6, R0 ; /* 0x0000000603087223 */ /* 0x000fc80000000100 */ /*0150*/ FFMA R7, R7, R8, R6 ; /* 0x0000000807077223 */ /* 0x000fe20000000006 */ /*0160*/ @!P0 BRA 0x190 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*0170*/ MOV R2, 0x190 ; /* 0x0000019000027802 */ /* 0x000fe40000000f00 */ /*0180*/ CALL.REL.NOINC 0x1c0 ; /* 0x0000003000007944 */ /* 0x000fea0003c00000 */ /*0190*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*01a0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x000fe2000c101904 */ /*01b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01c0*/ SHF.R.U32.HI R7, RZ, 0x17, R3.reuse ; /* 0x00000017ff077819 */ /* 0x100fe20000011603 */ /*01d0*/ BSSY B1, 0x820 ; /* 0x0000064000017945 */ /* 0x000fe20003800000 */ /*01e0*/ SHF.R.U32.HI R6, RZ, 0x17, R0.reuse ; /* 0x00000017ff067819 */ /* 0x100fe20000011600 */ /*01f0*/ IMAD.MOV.U32 R8, RZ, RZ, R0 ; /* 0x000000ffff087224 */ /* 0x000fe200078e0000 */ /*0200*/ LOP3.LUT R7, R7, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff07077812 */ /* 0x000fe200078ec0ff */ /*0210*/ IMAD.MOV.U32 R9, RZ, RZ, R3 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0003 */ /*0220*/ LOP3.LUT R6, R6, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff06067812 */ /* 0x000fe400078ec0ff */ /*0230*/ IADD3 R12, R7, -0x1, RZ ; /* 0xffffffff070c7810 */ /* 0x000fc40007ffe0ff */ /*0240*/ IADD3 R11, R6, -0x1, RZ ; /* 0xffffffff060b7810 */ /* 0x000fe40007ffe0ff */ /*0250*/ ISETP.GT.U32.AND P0, PT, R12, 0xfd, PT ; /* 0x000000fd0c00780c */ /* 0x000fc80003f04070 */ /*0260*/ ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ; /* 0x000000fd0b00780c */ /* 0x000fda0000704470 */ /*0270*/ @!P0 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a8224 */ /* 0x000fe200078e00ff */ /*0280*/ @!P0 BRA 0x400 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*0290*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fe40003f1c200 */ /*02a0*/ FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fc80003f3c200 */ /*02b0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*02c0*/ @P0 BRA 0x800 ; /* 0x0000053000000947 */ /* 0x000fea0003800000 */ /*02d0*/ LOP3.LUT P0, RZ, R9, 0x7fffffff, R8, 0xc8, !PT ; /* 0x7fffffff09ff7812 */ /* 0x000fda000780c808 */ /*02e0*/ @!P0 BRA 0x7e0 ; /* 0x000004f000008947 */ /* 0x000fea0003800000 */ /*02f0*/ FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ; /* 0x7f8000000000780b */ /* 0x040fe40003f5d200 */ /*0300*/ FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f3d200 */ /*0310*/ FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fd60003f1d200 */ /*0320*/ @!P1 BRA !P2, 0x7e0 ; /* 0x000004b000009947 */ /* 0x000fea0005000000 */ /*0330*/ LOP3.LUT P2, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff08ff7812 */ /* 0x000fc8000784c0ff */ /*0340*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*0350*/ @P1 BRA 0x7c0 ; /* 0x0000046000001947 */ /* 0x000fea0003800000 */ /*0360*/ LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09ff7812 */ /* 0x000fc8000782c0ff */ /*0370*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*0380*/ @P0 BRA 0x790 ; /* 0x0000040000000947 */ /* 0x000fea0003800000 */ /*0390*/ ISETP.GE.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe40003f06270 */ /*03a0*/ ISETP.GE.AND P1, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fd60003f26270 */ /*03b0*/ @P0 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a0224 */ /* 0x000fe200078e00ff */ /*03c0*/ @!P0 FFMA R8, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000088823 */ /* 0x000fe200000000ff */ /*03d0*/ @!P0 IMAD.MOV.U32 R10, RZ, RZ, -0x40 ; /* 0xffffffc0ff0a8424 */ /* 0x000fe200078e00ff */ /*03e0*/ @!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003099823 */ /* 0x000fc800000000ff */ /*03f0*/ @!P1 IADD3 R10, R10, 0x40, RZ ; /* 0x000000400a0a9810 */ /* 0x000fe40007ffe0ff */ /*0400*/ LEA R0, R7, 0xc0800000, 0x17 ; /* 0xc080000007007811 */ /* 0x000fe200078eb8ff */ /*0410*/ BSSY B2, 0x780 ; /* 0x0000036000027945 */ /* 0x000fe20003800000 */ /*0420*/ IADD3 R6, R6, -0x7f, RZ ; /* 0xffffff8106067810 */ /* 0x000fc60007ffe0ff */ /*0430*/ IMAD.IADD R9, R9, 0x1, -R0 ; /* 0x0000000109097824 */ /* 0x000fe200078e0a00 */ /*0440*/ IADD3 R7, R6.reuse, 0x7f, -R7 ; /* 0x0000007f06077810 */ /* 0x040fe20007ffe807 */ /*0450*/ IMAD R0, R6, -0x800000, R8 ; /* 0xff80000006007824 */ /* 0x000fe400078e0208 */ /*0460*/ MUFU.RCP R3, R9 ; /* 0x0000000900037308 */ /* 0x000e220000001000 */ /*0470*/ FADD.FTZ R11, -R9, -RZ ; /* 0x800000ff090b7221 */ /* 0x000fe20000010100 */ /*0480*/ IMAD.IADD R7, R7, 0x1, R10 ; /* 0x0000000107077824 */ /* 0x000fc600078e020a */ /*0490*/ FFMA R12, R3, R11, 1 ; /* 0x3f800000030c7423 */ /* 0x001fc8000000000b */ /*04a0*/ FFMA R12, R3, R12, R3 ; /* 0x0000000c030c7223 */ /* 0x000fc80000000003 */ /*04b0*/ FFMA R3, R0, R12, RZ ; /* 0x0000000c00037223 */ /* 0x000fc800000000ff */ /*04c0*/ FFMA R8, R11, R3, R0 ; /* 0x000000030b087223 */ /* 0x000fc80000000000 */ /*04d0*/ FFMA R13, R12, R8, R3 ; /* 0x000000080c0d7223 */ /* 0x000fc80000000003 */ /*04e0*/ FFMA R8, R11, R13, R0 ; /* 0x0000000d0b087223 */ /* 0x000fc80000000000 */ /*04f0*/ FFMA R3, R12, R8, R13 ; /* 0x000000080c037223 */ /* 0x000fca000000000d */ /*0500*/ SHF.R.U32.HI R0, RZ, 0x17, R3 ; /* 0x00000017ff007819 */ /* 0x000fc80000011603 */ /*0510*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fca00078ec0ff */ /*0520*/ IMAD.IADD R10, R0, 0x1, R7 ; /* 0x00000001000a7824 */ /* 0x000fca00078e0207 */ /*0530*/ IADD3 R0, R10, -0x1, RZ ; /* 0xffffffff0a007810 */ /* 0x000fc80007ffe0ff */ /*0540*/ ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ; /* 0x000000fe0000780c */ /* 0x000fda0003f06070 */ /*0550*/ @!P0 BRA 0x760 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*0560*/ ISETP.GT.AND P0, PT, R10, 0xfe, PT ; /* 0x000000fe0a00780c */ /* 0x000fda0003f04270 */ /*0570*/ @P0 BRA 0x730 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*0580*/ ISETP.GE.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x000fda0003f06270 */ /*0590*/ @P0 BRA 0x770 ; /* 0x000001d000000947 */ /* 0x000fea0003800000 */ /*05a0*/ ISETP.GE.AND P0, PT, R10, -0x18, PT ; /* 0xffffffe80a00780c */ /* 0x000fe40003f06270 */ /*05b0*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fd600078ec0ff */ /*05c0*/ @!P0 BRA 0x770 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*05d0*/ FFMA.RZ R0, R12, R8.reuse, R13.reuse ; /* 0x000000080c007223 */ /* 0x180fe2000000c00d */ /*05e0*/ IADD3 R9, R10, 0x20, RZ ; /* 0x000000200a097810 */ /* 0x000fe20007ffe0ff */ /*05f0*/ FFMA.RM R7, R12, R8.reuse, R13.reuse ; /* 0x000000080c077223 */ /* 0x180fe2000000400d */ /*0600*/ ISETP.NE.AND P2, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fe40003f45270 */ /*0610*/ LOP3.LUT R6, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00067812 */ /* 0x000fe200078ec0ff */ /*0620*/ FFMA.RP R0, R12, R8, R13 ; /* 0x000000080c007223 */ /* 0x000fe2000000800d */ /*0630*/ IMAD.MOV R8, RZ, RZ, -R10 ; /* 0x000000ffff087224 */ /* 0x000fe200078e0a0a */ /*0640*/ ISETP.NE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fe40003f25270 */ /*0650*/ LOP3.LUT R6, R6, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000006067812 */ /* 0x000fc400078efcff */ /*0660*/ FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ; /* 0x000000070000720b */ /* 0x000fe40003f1d000 */ /*0670*/ SHF.L.U32 R9, R6, R9, RZ ; /* 0x0000000906097219 */ /* 0x000fe400000006ff */ /*0680*/ SEL R7, R8, RZ, P2 ; /* 0x000000ff08077207 */ /* 0x000fe40001000000 */ /*0690*/ ISETP.NE.AND P1, PT, R9, RZ, P1 ; /* 0x000000ff0900720c */ /* 0x000fe40000f25270 */ /*06a0*/ SHF.R.U32.HI R7, RZ, R7, R6 ; /* 0x00000007ff077219 */ /* 0x000fe40000011606 */ /*06b0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40000703570 */ /*06c0*/ SHF.R.U32.HI R9, RZ, 0x1, R7 ; /* 0x00000001ff097819 */ /* 0x000fe40000011607 */ /*06d0*/ SEL R0, RZ, 0x1, !P0 ; /* 0x00000001ff007807 */ /* 0x000fc80004000000 */ /*06e0*/ LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ; /* 0x0000000100007812 */ /* 0x000fc800078ef809 */ /*06f0*/ LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ; /* 0x0000000700007212 */ /* 0x000fca00078ec0ff */ /*0700*/ IMAD.IADD R0, R9, 0x1, R0 ; /* 0x0000000109007824 */ /* 0x000fca00078e0200 */ /*0710*/ LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ; /* 0x0000000300037212 */ /* 0x000fe200078efcff */ /*0720*/ BRA 0x770 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*0730*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fc800078ec0ff */ /*0740*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*0750*/ BRA 0x770 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0760*/ IMAD R3, R7, 0x800000, R3 ; /* 0x0080000007037824 */ /* 0x000fe400078e0203 */ /*0770*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0780*/ BRA 0x810 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*0790*/ LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ; /* 0x8000000009037812 */ /* 0x000fc800078e4808 */ /*07a0*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*07b0*/ BRA 0x810 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*07c0*/ LOP3.LUT R3, R9, 0x80000000, R8, 0x48, !PT ; /* 0x8000000009037812 */ /* 0x000fe200078e4808 */ /*07d0*/ BRA 0x810 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*07e0*/ MUFU.RSQ R3, -QNAN ; /* 0xffc0000000037908 */ /* 0x000e220000001400 */ /*07f0*/ BRA 0x810 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0800*/ FADD.FTZ R3, R0, R3 ; /* 0x0000000300037221 */ /* 0x000fe40000010000 */ /*0810*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0820*/ IMAD.MOV.U32 R7, RZ, RZ, R3 ; /* 0x000000ffff077224 */ /* 0x001fe400078e0003 */ /*0830*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fc800078e00ff */ /*0840*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff7b002007950 */ /* 0x000fea0003c3ffff */ /*0850*/ BRA 0x850; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0860*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0870*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0880*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0890*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*08a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*08b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*08c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*08d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*08e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*08f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void ElementwiseNorm(float * A, float *B, int size) { int id = blockDim.x*blockIdx.y*gridDim.x + blockDim.x*blockIdx.x + threadIdx.x; if (id < size) A[id] /= B[id]; }
.text .file "ElementwiseNorm.hip" .globl _Z30__device_stub__ElementwiseNormPfS_i # -- Begin function _Z30__device_stub__ElementwiseNormPfS_i .type _Z30__device_stub__ElementwiseNormPfS_i,@function _Z30__device_stub__ElementwiseNormPfS_i: # @_Z30__device_stub__ElementwiseNormPfS_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z15ElementwiseNormPfS_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z30__device_stub__ElementwiseNormPfS_i, .Lfunc_end0-_Z30__device_stub__ElementwiseNormPfS_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z15ElementwiseNormPfS_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z15ElementwiseNormPfS_i,@object # @_Z15ElementwiseNormPfS_i .section .rodata,"a",@progbits .globl _Z15ElementwiseNormPfS_i .p2align 3, 0x0 _Z15ElementwiseNormPfS_i: .quad _Z30__device_stub__ElementwiseNormPfS_i .size _Z15ElementwiseNormPfS_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z15ElementwiseNormPfS_i" .size .L__unnamed_1, 25 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z30__device_stub__ElementwiseNormPfS_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z15ElementwiseNormPfS_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z15ElementwiseNormPfS_i ; -- Begin function _Z15ElementwiseNormPfS_i .globl _Z15ElementwiseNormPfS_i .p2align 8 .type _Z15ElementwiseNormPfS_i,@function _Z15ElementwiseNormPfS_i: ; @_Z15ElementwiseNormPfS_i ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x18 s_load_b32 s3, s[0:1], 0x24 s_load_b32 s4, s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_mul_i32 s2, s2, s15 s_and_b32 s3, s3, 0xffff s_add_i32 s2, s2, s14 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s4, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[0:3], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s2, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_load_b32 v2, v[2:3], off global_load_b32 v3, v[0:1], off s_waitcnt vmcnt(0) v_div_scale_f32 v4, null, v2, v2, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v5, v4 s_waitcnt_depctr 0xfff v_fma_f32 v6, -v4, v5, 1.0 v_fmac_f32_e32 v5, v6, v5 v_div_scale_f32 v6, vcc_lo, v3, v2, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v7, v6, v5 v_fma_f32 v8, -v4, v7, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v7, v8, v5 v_fma_f32 v4, -v4, v7, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v4, v4, v5, v7 v_div_fixup_f32 v2, v4, v2, v3 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z15ElementwiseNormPfS_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z15ElementwiseNormPfS_i, .Lfunc_end0-_Z15ElementwiseNormPfS_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 264 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z15ElementwiseNormPfS_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z15ElementwiseNormPfS_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 9 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
55d95372f921114c8ee2c16c0779021e1fa799a9
#include<stdio.h> #include<stdlib.h> #define TPB 8 #define W 4 #define H 4 #define TX 1 #define TY 1 int N=H*W; __device__ float distance(float x1, float x2){ return sqrt ((x2-x1)*(x2-x1)); } __global__ void distanceKernel(float *d_out, float *d_in, float ref, int w){ const int c=blockIdx.x*blockDim.x+threadIdx.x; const int r=blockIdx.y*blockDim.y+threadIdx.y; const int i=r*w+c; const float x=d_in[i]; d_out[i]=distance(x, ref); printf("c=%d, r=%d, i=%d: the distance between %f to %f is %f. \n", c, r, i, ref, x, d_out[i]); //// } void distanceArray(float *out, float *in, float ref, int len){ float *d_in=0; float *d_out=0; //// cudaMalloc(&d_in, len*sizeof(float)); cudaMalloc(&d_out, len*sizeof(float)); cudaMemcpy(d_in, in, len*sizeof(float), cudaMemcpyHostToDevice); const dim3 blockSize(TX, TY); const int bx=(W+TX-1)/TX; const int by=(W+TY-1)/TY; const dim3 gridSize=dim3(bx, by); distanceKernel<<<gridSize, blockSize>>>(d_out, d_in, ref, W); cudaMemcpy(out, d_out, len*sizeof(float), cudaMemcpyDeviceToHost); cudaFree(d_in); cudaFree(d_out); } float scale(int i, int n){ return ((float) i)/(n-1); } int main(){ const float ref=0.5f; float *in=(float*) calloc(N,sizeof(float)); float *out=(float*) calloc(N, sizeof(float)); for(int i=0; i<N; ++i){ in[i]=scale(i,N); // } distanceArray(out, in, ref, N); printf("______________________________ \n"); for(int j=0; j<N; ++j){ printf("The distance, printed from the host, between %f to %f is %f. \n", ref, in[j], out[j]); } free(in); free(out); return 0; }
.file "tmpxft_00260da0_00000000-6_cuda5.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2033: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2033: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z8distanceff .type _Z8distanceff, @function _Z8distanceff: .LFB2027: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2027: .size _Z8distanceff, .-_Z8distanceff .globl _Z5scaleii .type _Z5scaleii, @function _Z5scaleii: .LFB2029: .cfi_startproc endbr64 decl %esi cvtsi2ssl %edi, %xmm0 cvtsi2ssl %esi, %xmm1 divss %xmm1, %xmm0 ret .cfi_endproc .LFE2029: .size _Z5scaleii, .-_Z5scaleii .globl _Z38__device_stub__Z14distanceKernelPfS_fiPfS_fi .type _Z38__device_stub__Z14distanceKernelPfS_fiPfS_fi, @function _Z38__device_stub__Z14distanceKernelPfS_fiPfS_fi: .LFB2055: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 48(%rsp), %rcx leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movl %edx, 8(%rsp) leaq 40(%rsp), %rdx movss %xmm0, 12(%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 12(%rsp), %rax movq %rax, 120(%rsp) leaq 8(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L5 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z14distanceKernelPfS_fi(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L5: movq 136(%rsp), %rax subq %fs:40, %rax je .L7 call __stack_chk_fail@PLT .L7: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2055: .size _Z38__device_stub__Z14distanceKernelPfS_fiPfS_fi, .-_Z38__device_stub__Z14distanceKernelPfS_fiPfS_fi .globl _Z14distanceKernelPfS_fi .type _Z14distanceKernelPfS_fi, @function _Z14distanceKernelPfS_fi: .LFB2056: .cfi_startproc endbr64 jmp _Z38__device_stub__Z14distanceKernelPfS_fiPfS_fi .cfi_endproc .LFE2056: .size _Z14distanceKernelPfS_fi, .-_Z14distanceKernelPfS_fi .globl _Z13distanceArrayPfS_fi .type _Z13distanceArrayPfS_fi, @function _Z13distanceArrayPfS_fi: .LFB2028: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movq %rsi, %r12 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movslq %edx, %rbx salq $2, %rbx movq %rbx, %rsi subq $64, %rsp .cfi_def_cfa_offset 96 movss %xmm0, 12(%rsp) leaq 16(%rsp), %rdi movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax xorl %eax, %eax movq %rax, 16(%rsp) movq %rax, 24(%rsp) call cudaMalloc@PLT leaq 24(%rsp), %rdi movq %rbx, %rsi call cudaMalloc@PLT movq 16(%rsp), %rdi movq %rbx, %rdx movq %r12, %rsi movl $1, %ecx call cudaMemcpy@PLT xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $4294967297, %rdx movl $1, %esi movabsq $17179869188, %rdi call __cudaPushCallConfiguration@PLT movss 12(%rsp), %xmm0 testl %eax, %eax jne .L12 movq 16(%rsp), %rsi movq 24(%rsp), %rdi movl $4, %edx call _Z38__device_stub__Z14distanceKernelPfS_fiPfS_fi .L12: movq 24(%rsp), %rsi movl $2, %ecx movq %rbx, %rdx movq %rbp, %rdi call cudaMemcpy@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call cudaFree@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L13 call __stack_chk_fail@PLT .L13: addq $64, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size _Z13distanceArrayPfS_fi, .-_Z13distanceArrayPfS_fi .section .rodata.str1.1,"aMS",@progbits,1 .LC1: .string "______________________________ \n" .LC3: .string "The distance, printed from the host, between %f to %f is %f. \n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2030: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movl $4, %esi pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movslq N(%rip), %rbp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movq %rbp, %rdi movq %rbp, %r12 call calloc@PLT movq %rbp, %rdi movl $4, %esi movq %rax, %rbx call calloc@PLT leal -1(%r12), %edx movq %rax, %rbp xorl %eax, %eax .L16: cmpl %eax, %r12d jle .L21 cvtsi2ssl %eax, %xmm0 cvtsi2ssl %edx, %xmm1 divss %xmm1, %xmm0 movss %xmm0, (%rbx,%rax,4) incq %rax jmp .L16 .L21: movss .LC0(%rip), %xmm0 movl %r12d, %edx movq %rbx, %rsi movq %rbp, %rdi xorl %r12d, %r12d call _Z13distanceArrayPfS_fi leaq .LC1(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L18: cmpl %r12d, N(%rip) jle .L22 movsd .LC2(%rip), %xmm0 leaq .LC3(%rip), %rsi movl $2, %edi movb $3, %al cvtss2sd 0(%rbp,%r12,4), %xmm2 cvtss2sd (%rbx,%r12,4), %xmm1 incq %r12 call __printf_chk@PLT jmp .L18 .L22: movq %rbx, %rdi call free@PLT movq %rbp, %rdi call free@PLT popq %rbx .cfi_def_cfa_offset 24 xorl %eax, %eax popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2030: .size main, .-main .section .rodata.str1.1 .LC4: .string "_Z14distanceKernelPfS_fi" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2058: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi leaq _Z14distanceKernelPfS_fi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2058: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl N .data .align 4 .type N, @object .size N, 4 N: .long 16 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC0: .long 1056964608 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC2: .long 0 .long 1071644672 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z14distanceKernelPfS_fi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0030*/ IADD3 R1, R1, -0x28, RZ ; /* 0xffffffd801017810 */ /* 0x000fe40007ffe0ff */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e280000002100 */ /*0050*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e680000002600 */ /*0060*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e620000002200 */ /*0070*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */ /* 0x001fc400078e0203 */ /*0080*/ IMAD R3, R0, c[0x0][0x4], R5 ; /* 0x0000010000037a24 */ /* 0x002fe200078e0205 */ /*0090*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fc60000000f00 */ /*00a0*/ IMAD R0, R3, c[0x0][0x174], R2 ; /* 0x00005d0003007a24 */ /* 0x000fc800078e0202 */ /*00b0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x168] ; /* 0x00005a0000047625 */ /* 0x000fca00078e0205 */ /*00c0*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */ /* 0x000ea2000c1e1900 */ /*00d0*/ BSSY B0, 0x200 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*00e0*/ FADD R6, -R14, c[0x0][0x170] ; /* 0x00005c000e067621 */ /* 0x004fc80000000100 */ /*00f0*/ FMUL R4, R6, R6 ; /* 0x0000000606047220 */ /* 0x000fe20000400000 */ /*0100*/ IADD3 R6, P1, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fc60007f3e0ff */ /*0110*/ MUFU.RSQ R9, R4 ; /* 0x0000000400097308 */ /* 0x0000620000001400 */ /*0120*/ IADD3 R7, R4, -0xd000000, RZ ; /* 0xf300000004077810 */ /* 0x000fc80007ffe0ff */ /*0130*/ ISETP.GT.U32.AND P0, PT, R7, 0x727fffff, PT ; /* 0x727fffff0700780c */ /* 0x000fe20003f04070 */ /*0140*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P1 ; /* 0x00000900ff077624 */ /* 0x000fd800008e06ff */ /*0150*/ @!P0 BRA 0x1b0 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*0160*/ BSSY B1, 0x1a0 ; /* 0x0000003000017945 */ /* 0x003fe20003800000 */ /*0170*/ MOV R12, 0x190 ; /* 0x00000190000c7802 */ /* 0x000fe40000000f00 */ /*0180*/ CALL.REL.NOINC 0x380 ; /* 0x000001f000007944 */ /* 0x000fea0003c00000 */ /*0190*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*01a0*/ BRA 0x1f0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*01b0*/ FMUL.FTZ R5, R4, R9 ; /* 0x0000000904057220 */ /* 0x003fe20000410000 */ /*01c0*/ FMUL.FTZ R8, R9, 0.5 ; /* 0x3f00000009087820 */ /* 0x000fc60000410000 */ /*01d0*/ FFMA R4, -R5, R5, R4 ; /* 0x0000000505047223 */ /* 0x000fc80000000104 */ /*01e0*/ FFMA R8, R4, R8, R5 ; /* 0x0000000804087223 */ /* 0x000fe40000000005 */ /*01f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0200*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */ /* 0x000e220000201800 */ /*0210*/ MOV R11, 0x4 ; /* 0x00000004000b7802 */ /* 0x000fe20000000f00 */ /*0220*/ STL.64 [R1], R2 ; /* 0x0000000201007387 */ /* 0x0003e20000100a00 */ /*0230*/ MOV R9, 0x0 ; /* 0x0000000000097802 */ /* 0x000fe20000000f00 */ /*0240*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*0250*/ MOV R5, c[0x4][0xc] ; /* 0x0100030000057a02 */ /* 0x000fe20000000f00 */ /*0260*/ IMAD.WIDE R10, R0, R11, c[0x0][0x160] ; /* 0x00005800000a7625 */ /* 0x000fe200078e020b */ /*0270*/ STL [R1+0x8], R0 ; /* 0x0000080001007387 */ /* 0x0003e20000100800 */ /*0280*/ F2F.F64.F32 R16, R8 ; /* 0x0000000800107310 */ /* 0x000ea20000201800 */ /*0290*/ LDC.64 R18, c[0x4][R9] ; /* 0x0100000009127b82 */ /* 0x0002e40000000a00 */ /*02a0*/ STG.E [R10.64], R8 ; /* 0x000000080a007986 */ /* 0x0003ea000c101904 */ /*02b0*/ F2F.F64.F32 R12, c[0x0][0x170] ; /* 0x00005c00000c7b10 */ /* 0x000f220000201800 */ /*02c0*/ STL.64 [R1+0x18], R14 ; /* 0x0000180e01007387 */ /* 0x0013e80000100a00 */ /*02d0*/ STL.64 [R1+0x20], R16 ; /* 0x0000201001007387 */ /* 0x0043e80000100a00 */ /*02e0*/ STL.64 [R1+0x10], R12 ; /* 0x0000100c01007387 */ /* 0x0103e40000100a00 */ /*02f0*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x002fe20000000000 */ /*0300*/ MOV R9, 0x370 ; /* 0x0000037000097802 */ /* 0x000fc40000000f00 */ /*0310*/ MOV R20, 0x2f0 ; /* 0x000002f000147802 */ /* 0x000fe40000000f00 */ /*0320*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*0330*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*0340*/ IADD3 R20, P0, P1, -R20, R9, R2 ; /* 0x0000000914147210 */ /* 0x000fc8000791e102 */ /*0350*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*0360*/ CALL.ABS.NOINC R18 ; /* 0x0000000012007343 */ /* 0x008fea0003c00000 */ /*0370*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0380*/ LOP3.LUT P0, RZ, R4, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff04ff7812 */ /* 0x000fda000780c0ff */ /*0390*/ @!P0 IMAD.MOV.U32 R5, RZ, RZ, R4 ; /* 0x000000ffff058224 */ /* 0x000fe200078e0004 */ /*03a0*/ @!P0 BRA 0x4b0 ; /* 0x0000010000008947 */ /* 0x000fea0003800000 */ /*03b0*/ FSETP.GEU.FTZ.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720b */ /* 0x000fda0003f1e000 */ /*03c0*/ @!P0 MOV R5, 0x7fffffff ; /* 0x7fffffff00058802 */ /* 0x000fe20000000f00 */ /*03d0*/ @!P0 BRA 0x4b0 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*03e0*/ FSETP.GTU.FTZ.AND P0, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fda0003f1c200 */ /*03f0*/ @P0 FADD.FTZ R5, R4, 1 ; /* 0x3f80000004050421 */ /* 0x000fe20000010000 */ /*0400*/ @P0 BRA 0x4b0 ; /* 0x000000a000000947 */ /* 0x000fea0003800000 */ /*0410*/ FSETP.NEU.FTZ.AND P0, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fda0003f1d200 */ /*0420*/ @P0 FFMA R8, R4, 1.84467440737095516160e+19, RZ ; /* 0x5f80000004080823 */ /* 0x000fc800000000ff */ /*0430*/ @P0 MUFU.RSQ R5, R8 ; /* 0x0000000800050308 */ /* 0x000e240000001400 */ /*0440*/ @P0 FMUL.FTZ R9, R8, R5 ; /* 0x0000000508090220 */ /* 0x001fe20000410000 */ /*0450*/ @P0 FMUL.FTZ R11, R5, 0.5 ; /* 0x3f000000050b0820 */ /* 0x000fe20000410000 */ /*0460*/ @!P0 MOV R5, R4 ; /* 0x0000000400058202 */ /* 0x000fe40000000f00 */ /*0470*/ @P0 FADD.FTZ R10, -R9, -RZ ; /* 0x800000ff090a0221 */ /* 0x000fc80000010100 */ /*0480*/ @P0 FFMA R10, R9, R10, R8 ; /* 0x0000000a090a0223 */ /* 0x000fc80000000008 */ /*0490*/ @P0 FFMA R10, R10, R11, R9 ; /* 0x0000000b0a0a0223 */ /* 0x000fc80000000009 */ /*04a0*/ @P0 FMUL.FTZ R5, R10, 2.3283064365386962891e-10 ; /* 0x2f8000000a050820 */ /* 0x000fc80000410000 */ /*04b0*/ IMAD.MOV.U32 R8, RZ, RZ, R5 ; /* 0x000000ffff087224 */ /* 0x000fe200078e0005 */ /*04c0*/ MOV R4, R12 ; /* 0x0000000c00047202 */ /* 0x000fe40000000f00 */ /*04d0*/ MOV R5, 0x0 ; /* 0x0000000000057802 */ /* 0x000fc80000000f00 */ /*04e0*/ RET.REL.NODEC R4 0x0 ; /* 0xfffffb1004007950 */ /* 0x000fea0003c3ffff */ /*04f0*/ BRA 0x4f0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0500*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0510*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include<stdio.h> #include<stdlib.h> #define TPB 8 #define W 4 #define H 4 #define TX 1 #define TY 1 int N=H*W; __device__ float distance(float x1, float x2){ return sqrt ((x2-x1)*(x2-x1)); } __global__ void distanceKernel(float *d_out, float *d_in, float ref, int w){ const int c=blockIdx.x*blockDim.x+threadIdx.x; const int r=blockIdx.y*blockDim.y+threadIdx.y; const int i=r*w+c; const float x=d_in[i]; d_out[i]=distance(x, ref); printf("c=%d, r=%d, i=%d: the distance between %f to %f is %f. \n", c, r, i, ref, x, d_out[i]); //// } void distanceArray(float *out, float *in, float ref, int len){ float *d_in=0; float *d_out=0; //// hipMalloc(&d_in, len*sizeof(float)); hipMalloc(&d_out, len*sizeof(float)); hipMemcpy(d_in, in, len*sizeof(float), hipMemcpyHostToDevice); const dim3 blockSize(TX, TY); const int bx=(W+TX-1)/TX; const int by=(W+TY-1)/TY; const dim3 gridSize=dim3(bx, by); distanceKernel<<<gridSize, blockSize>>>(d_out, d_in, ref, W); hipMemcpy(out, d_out, len*sizeof(float), hipMemcpyDeviceToHost); hipFree(d_in); hipFree(d_out); } float scale(int i, int n){ return ((float) i)/(n-1); } int main(){ const float ref=0.5f; float *in=(float*) calloc(N,sizeof(float)); float *out=(float*) calloc(N, sizeof(float)); for(int i=0; i<N; ++i){ in[i]=scale(i,N); // } distanceArray(out, in, ref, N); printf("______________________________ \n"); for(int j=0; j<N; ++j){ printf("The distance, printed from the host, between %f to %f is %f. \n", ref, in[j], out[j]); } free(in); free(out); return 0; }
.text .file "cuda5.hip" .globl _Z29__device_stub__distanceKernelPfS_fi # -- Begin function _Z29__device_stub__distanceKernelPfS_fi .type _Z29__device_stub__distanceKernelPfS_fi,@function _Z29__device_stub__distanceKernelPfS_fi: # @_Z29__device_stub__distanceKernelPfS_fi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 12(%rsp), %rsi movss %xmm0, (%rsi) leaq 8(%rsp), %rdi movl %edx, (%rdi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) movq %rdi, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z14distanceKernelPfS_fi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z29__device_stub__distanceKernelPfS_fi, .Lfunc_end0-_Z29__device_stub__distanceKernelPfS_fi .cfi_endproc # -- End function .globl _Z13distanceArrayPfS_fi # -- Begin function _Z13distanceArrayPfS_fi .type _Z13distanceArrayPfS_fi,@function _Z13distanceArrayPfS_fi: # @_Z13distanceArrayPfS_fi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $32, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movss %xmm0, 20(%rsp) # 4-byte Spill movq %rsi, %r15 movq %rdi, %rbx xorl %eax, %eax leaq 24(%rsp), %r12 movq %rax, (%r12) leaq 8(%rsp), %r13 movq %rax, (%r13) movslq %edx, %r14 shlq $2, %r14 movq %r12, %rdi movq %r14, %rsi callq hipMalloc movq %r13, %rdi movq %r14, %rsi callq hipMalloc movq (%r12), %rdi movq %r15, %rsi movq %r14, %rdx movl $1, %ecx callq hipMemcpy movabsq $17179869188, %rdi # imm = 0x400000004 movabsq $4294967297, %rdx # imm = 0x100000001 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movq 8(%rsp), %rdi movq 24(%rsp), %rsi movss 20(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero movl $4, %edx callq _Z29__device_stub__distanceKernelPfS_fi .LBB1_2: movq 8(%rsp), %rsi movq %rbx, %rdi movq %r14, %rdx movl $2, %ecx callq hipMemcpy movq 24(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree addq $32, %rsp .cfi_def_cfa_offset 48 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z13distanceArrayPfS_fi, .Lfunc_end1-_Z13distanceArrayPfS_fi .cfi_endproc # -- End function .globl _Z5scaleii # -- Begin function _Z5scaleii .type _Z5scaleii,@function _Z5scaleii: # @_Z5scaleii .cfi_startproc # %bb.0: cvtsi2ss %edi, %xmm0 decl %esi cvtsi2ss %esi, %xmm1 divss %xmm1, %xmm0 retq .Lfunc_end2: .size _Z5scaleii, .Lfunc_end2-_Z5scaleii .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function main .LCPI3_0: .long 0x3f000000 # float 0.5 .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 .LCPI3_1: .quad 0x3fe0000000000000 # double 0.5 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movslq N(%rip), %r15 movl $4, %esi movq %r15, %rdi callq calloc movq %rax, %rbx movl $4, %esi movq %r15, %rdi callq calloc movq %rax, %r14 movl %r15d, %edx testq %r15, %r15 jle .LBB3_3 # %bb.1: # %.lr.ph leal -1(%rdx), %eax cvtsi2ss %eax, %xmm0 xorl %eax, %eax .LBB3_2: # =>This Inner Loop Header: Depth=1 xorps %xmm1, %xmm1 cvtsi2ss %eax, %xmm1 divss %xmm0, %xmm1 movss %xmm1, (%rbx,%rax,4) incq %rax cmpq %rax, %rdx jne .LBB3_2 .LBB3_3: # %._crit_edge movss .LCPI3_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero movq %r14, %rdi movq %rbx, %rsi # kill: def $edx killed $edx killed $rdx callq _Z13distanceArrayPfS_fi movl $.Lstr, %edi callq puts@PLT cmpl $0, N(%rip) jle .LBB3_6 # %bb.4: # %.lr.ph19.preheader xorl %r15d, %r15d .LBB3_5: # %.lr.ph19 # =>This Inner Loop Header: Depth=1 xorps %xmm1, %xmm1 cvtss2sd (%rbx,%r15,4), %xmm1 xorps %xmm2, %xmm2 cvtss2sd (%r14,%r15,4), %xmm2 movl $.L.str.1, %edi movsd .LCPI3_1(%rip), %xmm0 # xmm0 = mem[0],zero movb $3, %al callq printf incq %r15 movslq N(%rip), %rax cmpq %rax, %r15 jl .LBB3_5 .LBB3_6: # %._crit_edge20 movq %rbx, %rdi callq free movq %r14, %rdi callq free xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size main, .Lfunc_end3-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB4_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB4_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z14distanceKernelPfS_fi, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end4: .size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB5_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB5_2: retq .Lfunc_end5: .size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor .cfi_endproc # -- End function .type N,@object # @N .data .globl N .p2align 2, 0x0 N: .long 16 # 0x10 .size N, 4 .type _Z14distanceKernelPfS_fi,@object # @_Z14distanceKernelPfS_fi .section .rodata,"a",@progbits .globl _Z14distanceKernelPfS_fi .p2align 3, 0x0 _Z14distanceKernelPfS_fi: .quad _Z29__device_stub__distanceKernelPfS_fi .size _Z14distanceKernelPfS_fi, 8 .type .L.str.1,@object # @.str.1 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.1: .asciz "The distance, printed from the host, between %f to %f is %f. \n" .size .L.str.1, 63 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z14distanceKernelPfS_fi" .size .L__unnamed_1, 25 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "______________________________ " .size .Lstr, 32 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z29__device_stub__distanceKernelPfS_fi .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z14distanceKernelPfS_fi .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z14distanceKernelPfS_fi ; -- Begin function _Z14distanceKernelPfS_fi .globl _Z14distanceKernelPfS_fi .p2align 8 .type _Z14distanceKernelPfS_fi,@function _Z14distanceKernelPfS_fi: ; @_Z14distanceKernelPfS_fi ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x24 s_load_b64 s[4:5], s[0:1], 0x10 v_and_b32_e32 v2, 0x3ff, v0 v_bfe_u32 v3, v0, 10, 10 s_load_b128 s[8:11], s[0:1], 0x0 v_mbcnt_lo_u32_b32 v34, -1, 0 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff v_mad_u64_u32 v[5:6], null, s15, s3, v[3:4] v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, v5, s5, v[0:1] v_ashrrev_i32_e32 v3, 31, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[3:4], 2, v[2:3] v_add_co_u32 v6, vcc_lo, s10, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v7, vcc_lo, s11, v4, vcc_lo global_load_b32 v35, v[6:7], off s_waitcnt vmcnt(0) v_sub_f32_e32 v1, s4, v35 v_mul_f32_e32 v1, v1, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f32_e32 v6, 0x4f800000, v1 v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1 v_cndmask_b32_e32 v1, v1, v6, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_sqrt_f32_e32 v6, v1 s_waitcnt_depctr 0xfff v_add_nc_u32_e32 v7, -1, v6 v_add_nc_u32_e32 v8, 1, v6 v_fma_f32 v9, -v7, v6, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v10, -v8, v6, v1 v_cmp_ge_f32_e64 s2, 0, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v6, v6, v7, s2 v_cmp_lt_f32_e64 s2, 0, v10 v_mov_b32_e32 v10, v34 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v6, v6, v8, s2 v_mul_f32_e32 v7, 0x37800000, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_cndmask_b32_e32 v6, v6, v7, vcc_lo v_add_co_u32 v3, vcc_lo, s8, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo v_cmp_class_f32_e64 vcc_lo, v1, 0x260 v_cndmask_b32_e32 v36, v6, v1, vcc_lo global_store_b32 v[3:4], v36, off s_load_b64 s[2:3], s[0:1], 0x68 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v10 v_mov_b32_e32 v3, 0 v_mov_b32_e32 v4, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v10 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_6 ; %bb.1: v_mov_b32_e32 v1, 0 s_mov_b32 s5, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[8:9], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[6:7], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v9 v_and_b32_e32 v3, v3, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v11, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v11, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v6, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo global_load_b64 v[6:7], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[8:9] s_cbranch_execz .LBB0_5 ; %bb.2: ; %.preheader3.i.i.i.preheader s_mov_b32 s6, 0 .LBB0_3: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] v_dual_mov_b32 v9, v4 :: v_dual_mov_b32 v8, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v6, v6, v8 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v6, 24, v[11:12] v_and_b32_e32 v11, v7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v11, 24, v[4:5] v_mov_b32_e32 v4, v6 global_load_b64 v[6:7], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[8:9] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_3 ; %bb.4: ; %Flow590 s_or_b32 exec_lo, exec_lo, s6 .LBB0_5: ; %Flow592 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_6: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v11, 0 v_readfirstlane_b32 s6, v3 v_readfirstlane_b32 s7, v4 s_mov_b32 s11, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[12:13], v11, s[2:3] offset:40 global_load_b128 v[6:9], v11, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v12 v_readfirstlane_b32 s9, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s1, s9, 24 s_mul_hi_u32 s5, s8, 24 s_mul_i32 s10, s8, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_8 ; %bb.7: v_dual_mov_b32 v12, s11 :: v_dual_mov_b32 v13, v11 s_add_i32 s11, s5, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v6, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v7, vcc_lo v_dual_mov_b32 v14, 2 :: v_dual_mov_b32 v15, 1 global_store_b128 v[3:4], v[12:15], off offset:8 .LBB0_8: s_or_b32 exec_lo, exec_lo, s12 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[3:4], 6, v[10:11] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v8, s8 v_add_co_ci_u32_e32 v8, vcc_lo, s9, v9, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, v3 s_mov_b32 s15, s12 s_mov_b32 s13, s12 s_mov_b32 s14, s12 v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo v_dual_mov_b32 v10, 33 :: v_dual_mov_b32 v13, v11 v_dual_mov_b32 v12, v11 :: v_dual_mov_b32 v17, s15 v_dual_mov_b32 v16, s14 :: v_dual_mov_b32 v15, s13 v_mov_b32_e32 v14, s12 s_clause 0x3 global_store_b128 v[3:4], v[10:13], off global_store_b128 v[3:4], v[14:17], off offset:16 global_store_b128 v[3:4], v[14:17], off offset:32 global_store_b128 v[3:4], v[14:17], off offset:48 s_and_saveexec_b32 s8, s0 s_cbranch_execz .LBB0_16 ; %bb.9: v_mov_b32_e32 v1, 0 v_mov_b32_e32 v15, s7 s_mov_b32 s9, exec_lo s_clause 0x1 global_load_b64 v[16:17], v1, s[2:3] offset:32 glc global_load_b64 v[8:9], v1, s[2:3] offset:40 v_mov_b32_e32 v14, s6 s_waitcnt vmcnt(0) v_and_b32_e32 v8, s6, v8 v_and_b32_e32 v9, s7, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v8, 24 v_mul_lo_u32 v9, v9, 24 v_mul_lo_u32 v8, v8, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v9, v10, v9 v_add_co_u32 v12, vcc_lo, v6, v8 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v13, vcc_lo, v7, v9, vcc_lo global_store_b64 v[12:13], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v1, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[10:11], v[16:17] s_cbranch_execz .LBB0_12 ; %bb.10: ; %.preheader1.i.i.i.preheader s_mov_b32 s11, 0 .LBB0_11: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v8, s6 :: v_dual_mov_b32 v9, s7 s_sleep 1 global_store_b64 v[12:13], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v1, v[8:11], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11] v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_11 .LBB0_12: ; %Flow588 s_or_b32 exec_lo, exec_lo, s9 v_mov_b32_e32 v11, 0 s_mov_b32 s11, exec_lo s_mov_b32 s9, exec_lo v_mbcnt_lo_u32_b32 v1, s11, 0 global_load_b64 v[8:9], v11, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v1 s_cbranch_execz .LBB0_14 ; %bb.13: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v10, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[8:9], v[10:11], off offset:8 .LBB0_14: s_or_b32 exec_lo, exec_lo, s9 s_waitcnt vmcnt(0) global_load_b64 v[10:11], v[8:9], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] s_cbranch_vccnz .LBB0_16 ; %bb.15: global_load_b32 v8, v[8:9], off offset:24 v_mov_b32_e32 v9, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s9, v8 s_waitcnt_vscnt null, 0x0 global_store_b64 v[10:11], v[8:9], off s_and_b32 m0, s9, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_16: ; %Flow589 s_or_b32 exec_lo, exec_lo, s8 s_add_i32 s5, s5, s1 v_add_co_u32 v1, vcc_lo, v6, s10 v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo .LBB0_17: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_19 ; %bb.18: ; in Loop: Header=BB0_17 Depth=1 global_load_b32 v1, v[6:7], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v1, 1, v1 .LBB0_19: ; in Loop: Header=BB0_17 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v1 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_21 ; %bb.20: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_22 .LBB0_21: ; in Loop: Header=BB0_17 Depth=1 s_mov_b32 s1, -1 .LBB0_22: ; %Flow583 ; in Loop: Header=BB0_17 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_17 ; %bb.23: global_load_b64 v[6:7], v[3:4], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_27 ; %bb.24: v_mov_b32_e32 v1, 0 s_clause 0x2 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[12:13], v1, s[2:3] offset:24 glc global_load_b64 v[10:11], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v4, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v14, s6 v_add_co_ci_u32_e32 v9, vcc_lo, s7, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_cndmask_b32_e32 v8, v8, v14, vcc_lo v_and_b32_e32 v3, v8, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_mul_hi_u32 v14, v3, 24 v_cndmask_b32_e32 v9, v9, v15, vcc_lo v_mul_lo_u32 v3, v3, 24 v_and_b32_e32 v4, v9, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v10, v3 v_mul_lo_u32 v4, v4, 24 v_mov_b32_e32 v10, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v4, v14, v4 v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[3:4], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_27 ; %bb.25: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_26: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[3:4], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v1, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_26 .LBB0_27: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[6:7] s_add_u32 s6, s6, .str@rel32@lo+4 s_addc_u32 s7, s7, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc0 .LBB0_113 ; %bb.28: s_waitcnt vmcnt(0) v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v1, 2, v6 v_dual_mov_b32 v9, v7 :: v_dual_and_b32 v8, -3, v6 v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 s_mov_b64 s[8:9], 57 .LBB0_29: ; =>This Loop Header: Depth=1 ; Child Loop BB0_32 Depth 2 ; Child Loop BB0_39 Depth 2 ; Child Loop BB0_47 Depth 2 ; Child Loop BB0_55 Depth 2 ; Child Loop BB0_63 Depth 2 ; Child Loop BB0_71 Depth 2 ; Child Loop BB0_79 Depth 2 ; Child Loop BB0_87 Depth 2 ; Child Loop BB0_95 Depth 2 ; Child Loop BB0_101 Depth 2 ; Child Loop BB0_110 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[8:9], 56 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr16 s_and_b32 s0, s0, exec_lo s_cselect_b32 s10, s8, 56 s_cselect_b32 s11, s9, 0 s_cmp_gt_u32 s10, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_34 ; %bb.30: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_cmp_eq_u32 s10, 0 s_cbranch_scc1 .LBB0_33 ; %bb.31: ; %.preheader31.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_lshl_b64 s[0:1], s[10:11], 3 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], s[6:7] .LBB0_32: ; %.preheader31.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v3, v4, s[14:15] s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[10:11], s12, v[3:4] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_add_u32 s14, s14, 1 s_addc_u32 s15, s15, 0 s_cmp_lg_u32 s0, s12 v_or_b32_e32 v16, v10, v16 v_or_b32_e32 v17, v11, v17 s_cbranch_scc1 .LBB0_32 .LBB0_33: ; %Flow559 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s16, 0 .LBB0_34: ; %Flow561 ; in Loop: Header=BB0_29 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[6:7] s_cbranch_vccnz .LBB0_36 ; %bb.35: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[16:17], v4, s[6:7] s_add_i32 s16, s10, -8 s_add_u32 s0, s6, 8 s_addc_u32 s1, s7, 0 .LBB0_36: ; %.loopexit32.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_41 ; %bb.37: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_40 ; %bb.38: ; %.preheader29.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_39: ; %.preheader29.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s14 s_addc_u32 s19, s1, s15 s_add_u32 s14, s14, 1 global_load_u8 v3, v4, s[18:19] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s12, v[3:4] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s16, s14 v_or_b32_e32 v18, v10, v18 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v19, v11, v19 s_cbranch_scc1 .LBB0_39 .LBB0_40: ; %Flow554 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s5, 0 s_branch .LBB0_42 .LBB0_41: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $vgpr18_vgpr19 ; implicit-def: $sgpr5 .LBB0_42: ; %Flow556 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_44 ; %bb.43: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[18:19], v4, s[0:1] s_add_i32 s5, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_44: ; %.loopexit30.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s5, 7 s_cbranch_scc1 .LBB0_49 ; %bb.45: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB0_48 ; %bb.46: ; %.preheader27.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_47: ; %.preheader27.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s14 s_addc_u32 s17, s1, s15 s_add_u32 s14, s14, 1 global_load_u8 v3, v4, s[16:17] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s12, v[3:4] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s5, s14 v_or_b32_e32 v20, v10, v20 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v21, v11, v21 s_cbranch_scc1 .LBB0_47 .LBB0_48: ; %Flow549 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s16, 0 s_branch .LBB0_50 .LBB0_49: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $sgpr16 .LBB0_50: ; %Flow551 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_52 ; %bb.51: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[20:21], v4, s[0:1] s_add_i32 s16, s5, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_52: ; %.loopexit28.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_57 ; %bb.53: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_56 ; %bb.54: ; %.preheader25.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_55: ; %.preheader25.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s14 s_addc_u32 s19, s1, s15 s_add_u32 s14, s14, 1 global_load_u8 v3, v4, s[18:19] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s12, v[3:4] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s16, s14 v_or_b32_e32 v22, v10, v22 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v23, v11, v23 s_cbranch_scc1 .LBB0_55 .LBB0_56: ; %Flow544 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s5, 0 s_branch .LBB0_58 .LBB0_57: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $vgpr22_vgpr23 ; implicit-def: $sgpr5 .LBB0_58: ; %Flow546 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_60 ; %bb.59: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[22:23], v4, s[0:1] s_add_i32 s5, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_60: ; %.loopexit26.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s5, 7 s_cbranch_scc1 .LBB0_65 ; %bb.61: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v24, 0 v_mov_b32_e32 v25, 0 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB0_64 ; %bb.62: ; %.preheader23.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_63: ; %.preheader23.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s14 s_addc_u32 s17, s1, s15 s_add_u32 s14, s14, 1 global_load_u8 v3, v4, s[16:17] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s12, v[3:4] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s5, s14 v_or_b32_e32 v24, v10, v24 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v25, v11, v25 s_cbranch_scc1 .LBB0_63 .LBB0_64: ; %Flow539 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s16, 0 s_branch .LBB0_66 .LBB0_65: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $sgpr16 .LBB0_66: ; %Flow541 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_68 ; %bb.67: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[24:25], v4, s[0:1] s_add_i32 s16, s5, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_68: ; %.loopexit24.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_73 ; %bb.69: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v26, 0 v_mov_b32_e32 v27, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_72 ; %bb.70: ; %.preheader21.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_71: ; %.preheader21.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s14 s_addc_u32 s19, s1, s15 s_add_u32 s14, s14, 1 global_load_u8 v3, v4, s[18:19] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[10:11], s12, v[3:4] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s16, s14 v_or_b32_e32 v26, v10, v26 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v27, v11, v27 s_cbranch_scc1 .LBB0_71 .LBB0_72: ; %Flow534 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s5, 0 s_branch .LBB0_74 .LBB0_73: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $vgpr26_vgpr27 ; implicit-def: $sgpr5 .LBB0_74: ; %Flow536 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_76 ; %bb.75: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[26:27], v4, s[0:1] s_add_i32 s5, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_76: ; %.loopexit22.i ; in Loop: Header=BB0_29 Depth=1 s_cmp_gt_u32 s5, 7 s_cbranch_scc1 .LBB0_81 ; %bb.77: ; in Loop: Header=BB0_29 Depth=1 v_mov_b32_e32 v28, 0 v_mov_b32_e32 v29, 0 s_cmp_eq_u32 s5, 0 s_cbranch_scc1 .LBB0_80 ; %bb.78: ; %.preheader.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], s[0:1] .LBB0_79: ; %.preheader.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v3, v4, s[14:15] s_add_i32 s5, s5, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v3, 0xffff, v3 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[10:11], s12, v[3:4] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_add_u32 s14, s14, 1 s_addc_u32 s15, s15, 0 s_cmp_lg_u32 s5, 0 v_or_b32_e32 v28, v10, v28 v_or_b32_e32 v29, v11, v29 s_cbranch_scc1 .LBB0_79 .LBB0_80: ; %Flow529 ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s5, 0 s_branch .LBB0_82 .LBB0_81: ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s5, -1 .LBB0_82: ; %Flow531 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s5 s_cbranch_vccnz .LBB0_84 ; %bb.83: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[28:29], v4, s[0:1] .LBB0_84: ; %.loopexit.i ; in Loop: Header=BB0_29 Depth=1 s_waitcnt vmcnt(0) v_dual_mov_b32 v3, v34 :: v_dual_mov_b32 v10, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v3 v_mov_b32_e32 v11, 0 v_cmp_eq_u32_e64 s0, s0, v3 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_90 ; %bb.85: ; in Loop: Header=BB0_29 Depth=1 global_load_b64 v[32:33], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[10:11], v4, s[2:3] offset:40 global_load_b64 v[14:15], v4, s[2:3] s_mov_b32 s5, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v11, v11, v33 v_and_b32_e32 v10, v10, v32 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v11, v11, 24 v_mul_hi_u32 v30, v10, 24 v_mul_lo_u32 v10, v10, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v11, v30, v11 s_waitcnt vmcnt(0) v_add_co_u32 v10, vcc_lo, v14, v10 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v11, vcc_lo, v15, v11, vcc_lo global_load_b64 v[30:31], v[10:11], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[10:11], v4, v[30:33], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[10:11], v[32:33] s_cbranch_execz .LBB0_89 ; %bb.86: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s12, 0 .LBB0_87: ; %.preheader3.i.i19.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[14:15], v4, s[2:3] offset:40 global_load_b64 v[30:31], v4, s[2:3] v_dual_mov_b32 v33, v11 :: v_dual_mov_b32 v32, v10 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v14, v14, v32 s_waitcnt vmcnt(0) v_mad_u64_u32 v[10:11], null, v14, 24, v[30:31] v_and_b32_e32 v30, v15, v33 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[14:15], null, v30, 24, v[11:12] v_mov_b32_e32 v11, v14 global_load_b64 v[30:31], v[10:11], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[10:11], v4, v[30:33], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[32:33] s_or_b32 s12, vcc_lo, s12 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s12 s_cbranch_execnz .LBB0_87 ; %bb.88: ; %Flow524 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s12 .LBB0_89: ; %Flow526 ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_90: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_29 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[14:15], v4, s[2:3] offset:40 global_load_b128 v[30:33], v4, s[2:3] v_readfirstlane_b32 s12, v10 v_readfirstlane_b32 s13, v11 s_mov_b32 s17, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s14, v14 v_readfirstlane_b32 s15, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[14:15], s[12:13], s[14:15] s_mul_i32 s1, s15, 24 s_mul_hi_u32 s5, s14, 24 s_mul_i32 s16, s14, 24 s_and_saveexec_b32 s18, s0 s_cbranch_execz .LBB0_92 ; %bb.91: ; in Loop: Header=BB0_29 Depth=1 v_dual_mov_b32 v10, s17 :: v_dual_mov_b32 v11, v4 s_add_i32 s17, s5, s1 s_waitcnt vmcnt(0) v_add_co_u32 v14, vcc_lo, v30, s16 v_add_co_ci_u32_e32 v15, vcc_lo, s17, v31, vcc_lo global_store_b128 v[14:15], v[10:13], off offset:8 .LBB0_92: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s18 v_cmp_gt_u64_e64 vcc_lo, s[8:9], 56 v_or_b32_e32 v10, 0, v9 v_or_b32_e32 v11, v8, v1 s_lshl_b64 s[14:15], s[14:15], 12 s_lshl_b32 s17, s10, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s17, s17, 28 v_dual_cndmask_b32 v15, v10, v9 :: v_dual_cndmask_b32 v10, v11, v8 v_lshlrev_b64 v[8:9], 6, v[3:4] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v32, s14 v_add_co_ci_u32_e32 v11, vcc_lo, s15, v33, vcc_lo s_and_b32 s17, s17, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v32, vcc_lo, v3, v8 v_and_or_b32 v14, 0xffffff1f, v10, s17 v_add_co_ci_u32_e32 v33, vcc_lo, v11, v9, vcc_lo s_clause 0x3 global_store_b128 v[32:33], v[14:17], off global_store_b128 v[32:33], v[18:21], off offset:16 global_store_b128 v[32:33], v[22:25], off offset:32 global_store_b128 v[32:33], v[26:29], off offset:48 s_and_saveexec_b32 s14, s0 s_cbranch_execz .LBB0_100 ; %bb.93: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x1 global_load_b64 v[18:19], v4, s[2:3] offset:32 glc global_load_b64 v[8:9], v4, s[2:3] offset:40 v_dual_mov_b32 v16, s12 :: v_dual_mov_b32 v17, s13 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v8 v_readfirstlane_b32 s19, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[12:13] s_mul_i32 s15, s19, 24 s_mul_hi_u32 s17, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s17, s17, s15 v_add_co_u32 v14, vcc_lo, v30, s18 v_add_co_ci_u32_e32 v15, vcc_lo, s17, v31, vcc_lo s_mov_b32 s15, exec_lo global_store_b64 v[14:15], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v4, v[16:19], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[10:11], v[18:19] s_cbranch_execz .LBB0_96 ; %bb.94: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s17, 0 .LBB0_95: ; %.preheader1.i.i17.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13 s_sleep 1 global_store_b64 v[14:15], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v4, v[8:11], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11] v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8 s_or_b32 s17, vcc_lo, s17 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s17 s_cbranch_execnz .LBB0_95 .LBB0_96: ; %Flow522 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s15 global_load_b64 v[8:9], v4, s[2:3] offset:16 s_mov_b32 s17, exec_lo s_mov_b32 s15, exec_lo v_mbcnt_lo_u32_b32 v3, s17, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB0_98 ; %bb.97: ; in Loop: Header=BB0_29 Depth=1 s_bcnt1_i32_b32 s17, s17 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v3, s17 s_waitcnt vmcnt(0) global_atomic_add_u64 v[8:9], v[3:4], off offset:8 .LBB0_98: ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s15 s_waitcnt vmcnt(0) global_load_b64 v[10:11], v[8:9], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] s_cbranch_vccnz .LBB0_100 ; %bb.99: ; in Loop: Header=BB0_29 Depth=1 global_load_b32 v3, v[8:9], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s15, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[10:11], v[3:4], off s_and_b32 m0, s15, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_100: ; %Flow523 ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s14 s_add_i32 s5, s5, s1 v_add_co_u32 v3, vcc_lo, v30, s16 v_add_co_ci_u32_e32 v9, vcc_lo, s5, v31, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo .LBB0_101: ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v3, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_101 Depth=2 global_load_b32 v3, v[8:9], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v3, 1, v3 .LBB0_103: ; in Loop: Header=BB0_101 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v3 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_105 ; %bb.104: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_106 .LBB0_105: ; in Loop: Header=BB0_101 Depth=2 s_mov_b32 s1, -1 .LBB0_106: ; %Flow517 ; in Loop: Header=BB0_101 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_101 ; %bb.107: ; in Loop: Header=BB0_29 Depth=1 global_load_b128 v[8:11], v[32:33], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_111 ; %bb.108: ; in Loop: Header=BB0_29 Depth=1 s_clause 0x2 global_load_b64 v[10:11], v4, s[2:3] offset:40 global_load_b64 v[18:19], v4, s[2:3] offset:24 glc global_load_b64 v[16:17], v4, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v3, vcc_lo, v10, 1 v_add_co_ci_u32_e32 v20, vcc_lo, 0, v11, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v14, vcc_lo, v3, s12 v_add_co_ci_u32_e32 v15, vcc_lo, s13, v20, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15] v_dual_cndmask_b32 v15, v15, v20 :: v_dual_cndmask_b32 v14, v14, v3 v_and_b32_e32 v3, v15, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v10, v14, v10 v_mul_hi_u32 v11, v10, 24 v_mul_lo_u32 v10, v10, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v10, vcc_lo, v16, v10 v_mov_b32_e32 v16, v18 v_mul_lo_u32 v3, v3, 24 v_add_nc_u32_e32 v3, v11, v3 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v11, vcc_lo, v17, v3, vcc_lo v_mov_b32_e32 v17, v19 global_store_b64 v[10:11], v[18:19], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[16:17], v4, v[14:17], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[16:17], v[18:19] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_111 ; %bb.109: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_29 Depth=1 s_mov_b32 s0, 0 .LBB0_110: ; %.preheader.i.i16.i ; Parent Loop BB0_29 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[10:11], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[18:19], v4, v[14:17], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[16:17] v_dual_mov_b32 v16, v18 :: v_dual_mov_b32 v17, v19 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_110 .LBB0_111: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_29 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s8, s8, s10 s_subb_u32 s9, s9, s11 s_add_u32 s6, s6, s10 s_addc_u32 s7, s7, s11 s_cmp_lg_u64 s[8:9], 0 s_cbranch_scc1 .LBB0_29 ; %bb.112: ; %Flow562 s_mov_b32 s0, 0 s_branch .LBB0_114 .LBB0_113: s_mov_b32 s0, -1 ; implicit-def: $vgpr8_vgpr9 .LBB0_114: ; %Flow577 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_143 ; %bb.115: s_waitcnt vmcnt(0) v_dual_mov_b32 v8, v34 :: v_dual_mov_b32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v8 v_mov_b32_e32 v4, 0 v_cmp_eq_u32_e64 s0, s0, v8 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_121 ; %bb.116: v_mov_b32_e32 v1, 0 s_mov_b32 s5, exec_lo global_load_b64 v[11:12], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[9:10], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v12 v_and_b32_e32 v3, v3, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v13, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v13, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v9, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v10, v4, vcc_lo global_load_b64 v[9:10], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[9:12], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[11:12] s_cbranch_execz .LBB0_120 ; %bb.117: ; %.preheader3.i.i.i23.preheader s_mov_b32 s6, 0 .LBB0_118: ; %.preheader3.i.i.i23 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[9:10], v1, s[2:3] offset:40 global_load_b64 v[13:14], v1, s[2:3] v_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v11, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v9, v9, v11 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v9, 24, v[13:14] v_and_b32_e32 v13, v10, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v13, 24, v[4:5] v_mov_b32_e32 v4, v9 global_load_b64 v[9:10], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[9:12], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[11:12] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_118 ; %bb.119: ; %Flow574 s_or_b32 exec_lo, exec_lo, s6 .LBB0_120: ; %Flow576 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_121: ; %.loopexit4.i.i.i18 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v9, 0 v_readfirstlane_b32 s6, v3 v_readfirstlane_b32 s7, v4 s_mov_b32 s11, exec_lo s_clause 0x1 global_load_b64 v[14:15], v9, s[2:3] offset:40 global_load_b128 v[10:13], v9, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v14 v_readfirstlane_b32 s9, v15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s1, s9, 24 s_mul_hi_u32 s5, s8, 24 s_mul_i32 s10, s8, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_123 ; %bb.122: v_dual_mov_b32 v14, s11 :: v_dual_mov_b32 v15, v9 s_add_i32 s11, s5, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v10, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v11, vcc_lo v_dual_mov_b32 v16, 2 :: v_dual_mov_b32 v17, 1 global_store_b128 v[3:4], v[14:17], off offset:8 .LBB0_123: s_or_b32 exec_lo, exec_lo, s12 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[3:4], 6, v[8:9] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v12, s8 v_add_co_ci_u32_e32 v8, vcc_lo, s9, v13, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, v3 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v6, 0xffffff1f, v6, 32 v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo v_mov_b32_e32 v8, v9 v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v15, s15 v_dual_mov_b32 v13, s13 :: v_dual_mov_b32 v14, s14 s_clause 0x3 global_store_b128 v[3:4], v[6:9], off global_store_b128 v[3:4], v[12:15], off offset:16 global_store_b128 v[3:4], v[12:15], off offset:32 global_store_b128 v[3:4], v[12:15], off offset:48 s_and_saveexec_b32 s8, s0 s_cbranch_execz .LBB0_131 ; %bb.124: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v14, s6 v_mov_b32_e32 v15, s7 s_clause 0x1 global_load_b64 v[16:17], v1, s[2:3] offset:32 glc global_load_b64 v[6:7], v1, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s12, v6 v_readfirstlane_b32 s13, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[12:13], s[6:7] s_mul_i32 s9, s13, 24 s_mul_hi_u32 s11, s12, 24 s_mul_i32 s12, s12, 24 s_add_i32 s11, s11, s9 v_add_co_u32 v12, vcc_lo, v10, s12 v_add_co_ci_u32_e32 v13, vcc_lo, s11, v11, vcc_lo s_mov_b32 s9, exec_lo global_store_b64 v[12:13], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v1, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[8:9], v[16:17] s_cbranch_execz .LBB0_127 ; %bb.125: ; %.preheader1.i.i.i21.preheader s_mov_b32 s11, 0 .LBB0_126: ; %.preheader1.i.i.i21 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7 s_sleep 1 global_store_b64 v[12:13], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v1, v[6:9], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_126 .LBB0_127: ; %Flow572 s_or_b32 exec_lo, exec_lo, s9 v_mov_b32_e32 v9, 0 s_mov_b32 s11, exec_lo s_mov_b32 s9, exec_lo v_mbcnt_lo_u32_b32 v1, s11, 0 global_load_b64 v[6:7], v9, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v1 s_cbranch_execz .LBB0_129 ; %bb.128: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v8, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[6:7], v[8:9], off offset:8 .LBB0_129: s_or_b32 exec_lo, exec_lo, s9 s_waitcnt vmcnt(0) global_load_b64 v[8:9], v[6:7], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] s_cbranch_vccnz .LBB0_131 ; %bb.130: global_load_b32 v6, v[6:7], off offset:24 v_mov_b32_e32 v7, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s9, v6 s_waitcnt_vscnt null, 0x0 global_store_b64 v[8:9], v[6:7], off s_and_b32 m0, s9, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_131: ; %Flow573 s_or_b32 exec_lo, exec_lo, s8 s_add_i32 s5, s5, s1 v_add_co_u32 v1, vcc_lo, v10, s10 v_add_co_ci_u32_e32 v7, vcc_lo, s5, v11, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo .LBB0_132: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v1, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_134 ; %bb.133: ; in Loop: Header=BB0_132 Depth=1 global_load_b32 v1, v[6:7], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v1, 1, v1 .LBB0_134: ; in Loop: Header=BB0_132 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v1 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_136 ; %bb.135: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_137 .LBB0_136: ; in Loop: Header=BB0_132 Depth=1 s_mov_b32 s1, -1 .LBB0_137: ; %Flow567 ; in Loop: Header=BB0_132 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_132 ; %bb.138: global_load_b128 v[8:11], v[3:4], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_142 ; %bb.139: v_mov_b32_e32 v1, 0 s_clause 0x2 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[6:7], v1, s[2:3] offset:24 glc global_load_b64 v[12:13], v1, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v3, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v4, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v14, s6 v_add_co_ci_u32_e32 v11, vcc_lo, s7, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11] v_cndmask_b32_e32 v10, v10, v14, vcc_lo v_and_b32_e32 v3, v10, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_mul_hi_u32 v14, v3, 24 v_cndmask_b32_e32 v11, v11, v15, vcc_lo v_mul_lo_u32 v3, v3, 24 v_and_b32_e32 v4, v11, v4 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v12, v3 v_mul_lo_u32 v4, v4, 24 v_mov_b32_e32 v12, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v4, v14, v4 v_add_co_ci_u32_e32 v4, vcc_lo, v13, v4, vcc_lo v_mov_b32_e32 v13, v7 global_store_b64 v[3:4], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v1, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[12:13], v[6:7] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_142 ; %bb.140: ; %.preheader.i.i.i20.preheader s_mov_b32 s0, 0 .LBB0_141: ; %.preheader.i.i.i20 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[3:4], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v1, v[10:13], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[12:13] v_dual_mov_b32 v13, v7 :: v_dual_mov_b32 v12, v6 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_141 .LBB0_142: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_143: ; %__ockl_printf_append_string_n.exit s_waitcnt vmcnt(0) v_dual_mov_b32 v10, v34 :: v_dual_mov_b32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v10 v_mov_b32_e32 v4, 0 v_cmp_eq_u32_e64 s0, s0, v10 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_149 ; %bb.144: v_mov_b32_e32 v1, 0 s_mov_b32 s5, exec_lo global_load_b64 v[13:14], v1, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[3:4], v1, s[2:3] offset:40 global_load_b64 v[6:7], v1, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v14 v_and_b32_e32 v3, v3, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v11, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v11, v4 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v6, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo global_load_b64 v[11:12], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[11:14], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[3:4], v[13:14] s_cbranch_execz .LBB0_148 ; %bb.145: ; %.preheader3.i.i.i30.preheader s_mov_b32 s6, 0 .LBB0_146: ; %.preheader3.i.i.i30 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[6:7], v1, s[2:3] offset:40 global_load_b64 v[11:12], v1, s[2:3] v_dual_mov_b32 v14, v4 :: v_dual_mov_b32 v13, v3 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v6, v6, v13 s_waitcnt vmcnt(0) v_mad_u64_u32 v[3:4], null, v6, 24, v[11:12] v_and_b32_e32 v11, v7, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v11, 24, v[4:5] v_mov_b32_e32 v4, v6 global_load_b64 v[11:12], v[3:4], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[3:4], v1, v[11:14], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[13:14] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_146 ; %bb.147: ; %Flow510 s_or_b32 exec_lo, exec_lo, s6 .LBB0_148: ; %Flow512 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_149: ; %.loopexit4.i.i.i24 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v11, 0 v_readfirstlane_b32 s6, v3 v_readfirstlane_b32 s7, v4 s_mov_b32 s11, exec_lo s_clause 0x1 global_load_b64 v[6:7], v11, s[2:3] offset:40 global_load_b128 v[12:15], v11, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v6 v_readfirstlane_b32 s9, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s1, s9, 24 s_mul_hi_u32 s5, s8, 24 s_mul_i32 s10, s8, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_151 ; %bb.150: v_dual_mov_b32 v16, s11 :: v_dual_mov_b32 v17, v11 s_add_i32 s11, s5, s1 s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v12, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s11, v13, vcc_lo v_dual_mov_b32 v18, 2 :: v_dual_mov_b32 v19, 1 global_store_b128 v[3:4], v[16:19], off offset:8 .LBB0_151: s_or_b32 exec_lo, exec_lo, s12 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[3:4], 6, v[10:11] s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v14, s8 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v15, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v1, v3 s_mov_b32 s15, s12 s_mov_b32 s13, s12 s_mov_b32 s14, s12 v_and_or_b32 v8, 0xffffff1f, v8, 32 v_add_co_ci_u32_e32 v4, vcc_lo, v6, v4, vcc_lo v_dual_mov_b32 v10, v0 :: v_dual_mov_b32 v17, s15 v_dual_mov_b32 v16, s14 :: v_dual_mov_b32 v15, s13 v_mov_b32_e32 v14, s12 s_clause 0x3 global_store_b128 v[3:4], v[8:11], off global_store_b128 v[3:4], v[14:17], off offset:16 global_store_b128 v[3:4], v[14:17], off offset:32 global_store_b128 v[3:4], v[14:17], off offset:48 s_and_saveexec_b32 s8, s0 s_cbranch_execz .LBB0_159 ; %bb.152: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v15, s7 v_mov_b32_e32 v14, s6 s_clause 0x1 global_load_b64 v[16:17], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s12, v0 v_readfirstlane_b32 s13, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[12:13], s[6:7] s_mul_i32 s9, s13, 24 s_mul_hi_u32 s11, s12, 24 s_mul_i32 s12, s12, 24 s_add_i32 s11, s11, s9 v_add_co_u32 v0, vcc_lo, v12, s12 v_add_co_ci_u32_e32 v1, vcc_lo, s11, v13, vcc_lo s_mov_b32 s9, exec_lo global_store_b64 v[0:1], v[16:17], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v10, v[14:17], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[8:9], v[16:17] s_cbranch_execz .LBB0_155 ; %bb.153: ; %.preheader1.i.i.i28.preheader s_mov_b32 s11, 0 .LBB0_154: ; %.preheader1.i.i.i28 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7 s_sleep 1 global_store_b64 v[0:1], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v10, v[6:9], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_154 .LBB0_155: ; %Flow508 s_or_b32 exec_lo, exec_lo, s9 v_mov_b32_e32 v7, 0 s_mov_b32 s11, exec_lo s_mov_b32 s9, exec_lo v_mbcnt_lo_u32_b32 v6, s11, 0 global_load_b64 v[0:1], v7, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v6 s_cbranch_execz .LBB0_157 ; %bb.156: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v6, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[6:7], off offset:8 .LBB0_157: s_or_b32 exec_lo, exec_lo, s9 s_waitcnt vmcnt(0) global_load_b64 v[6:7], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] s_cbranch_vccnz .LBB0_159 ; %bb.158: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s9, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[6:7], v[0:1], off s_and_b32 m0, s9, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_159: ; %Flow509 s_or_b32 exec_lo, exec_lo, s8 s_add_i32 s5, s5, s1 v_add_co_u32 v0, vcc_lo, v12, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v13, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_160: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v6, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_162 ; %bb.161: ; in Loop: Header=BB0_160 Depth=1 global_load_b32 v6, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v6, 1, v6 .LBB0_162: ; in Loop: Header=BB0_160 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v6 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_164 ; %bb.163: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_165 .LBB0_164: ; in Loop: Header=BB0_160 Depth=1 s_mov_b32 s1, -1 .LBB0_165: ; %Flow503 ; in Loop: Header=BB0_160 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_160 ; %bb.166: global_load_b64 v[3:4], v[3:4], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_170 ; %bb.167: v_mov_b32_e32 v10, 0 s_clause 0x2 global_load_b64 v[0:1], v10, s[2:3] offset:40 global_load_b64 v[11:12], v10, s[2:3] offset:24 glc global_load_b64 v[8:9], v10, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v13, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v13, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v14, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7] v_dual_cndmask_b32 v7, v7, v14 :: v_dual_cndmask_b32 v6, v6, v13 v_and_b32_e32 v1, v7, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v6, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v13, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v13, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v8, v0 v_mov_b32_e32 v8, v11 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_mov_b32_e32 v9, v12 global_store_b64 v[0:1], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[8:9], v10, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[11:12] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_170 ; %bb.168: ; %.preheader.i.i.i27.preheader s_mov_b32 s0, 0 .LBB0_169: ; %.preheader.i.i.i27 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[8:9], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v10, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9] v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_169 .LBB0_170: ; %__ockl_printf_append_args.exit s_or_b32 exec_lo, exec_lo, s1 v_dual_mov_b32 v11, v34 :: v_dual_mov_b32 v0, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v11 v_mov_b32_e32 v1, 0 v_cmp_eq_u32_e64 s0, s0, v11 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_176 ; %bb.171: v_mov_b32_e32 v6, 0 s_mov_b32 s5, exec_lo global_load_b64 v[9:10], v6, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v10 v_and_b32_e32 v0, v0, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v12, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v12, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[9:10] s_cbranch_execz .LBB0_175 ; %bb.172: ; %.preheader3.i.i.i37.preheader s_mov_b32 s6, 0 .LBB0_173: ; %.preheader3.i.i.i37 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[2:3] offset:40 global_load_b64 v[12:13], v6, s[2:3] v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v7, 24, v[12:13] v_and_b32_e32 v12, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v12, 24, v[1:2] v_mov_b32_e32 v1, v7 global_load_b64 v[7:8], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_173 ; %bb.174: ; %Flow496 s_or_b32 exec_lo, exec_lo, s6 .LBB0_175: ; %Flow498 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_176: ; %.loopexit4.i.i.i31 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v12, 0 v_readfirstlane_b32 s6, v0 v_readfirstlane_b32 s7, v1 s_mov_b32 s11, exec_lo s_clause 0x1 global_load_b64 v[13:14], v12, s[2:3] offset:40 global_load_b128 v[7:10], v12, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v13 v_readfirstlane_b32 s9, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s1, s9, 24 s_mul_hi_u32 s5, s8, 24 s_mul_i32 s10, s8, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_178 ; %bb.177: v_dual_mov_b32 v13, s11 :: v_dual_mov_b32 v14, v12 s_add_i32 s11, s5, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v7, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s11, v8, vcc_lo v_dual_mov_b32 v15, 2 :: v_dual_mov_b32 v16, 1 global_store_b128 v[0:1], v[13:16], off offset:8 .LBB0_178: s_or_b32 exec_lo, exec_lo, s12 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[0:1], 6, v[11:12] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v9, s8 v_add_co_ci_u32_e32 v9, vcc_lo, s9, v10, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v6, v0 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo v_dual_mov_b32 v6, v12 :: v_dual_mov_b32 v9, s12 v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, s14 v_mov_b32_e32 v12, s15 s_clause 0x3 global_store_b128 v[0:1], v[3:6], off global_store_b128 v[0:1], v[9:12], off offset:16 global_store_b128 v[0:1], v[9:12], off offset:32 global_store_b128 v[0:1], v[9:12], off offset:48 s_and_saveexec_b32 s8, s0 s_cbranch_execz .LBB0_186 ; %bb.179: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s6 v_mov_b32_e32 v13, s7 s_clause 0x1 global_load_b64 v[14:15], v11, s[2:3] offset:32 glc global_load_b64 v[3:4], v11, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s12, v3 v_readfirstlane_b32 s13, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[12:13], s[6:7] s_mul_i32 s9, s13, 24 s_mul_hi_u32 s11, s12, 24 s_mul_i32 s12, s12, 24 s_add_i32 s11, s11, s9 v_add_co_u32 v9, vcc_lo, v7, s12 v_add_co_ci_u32_e32 v10, vcc_lo, s11, v8, vcc_lo s_mov_b32 s9, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_182 ; %bb.180: ; %.preheader1.i.i.i35.preheader s_mov_b32 s11, 0 .LBB0_181: ; %.preheader1.i.i.i35 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_181 .LBB0_182: ; %Flow494 s_or_b32 exec_lo, exec_lo, s9 v_mov_b32_e32 v6, 0 s_mov_b32 s11, exec_lo s_mov_b32 s9, exec_lo v_mbcnt_lo_u32_b32 v5, s11, 0 global_load_b64 v[3:4], v6, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_184 ; %bb.183: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_184: s_or_b32 exec_lo, exec_lo, s9 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_186 ; %bb.185: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s9, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s9, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_186: ; %Flow495 s_or_b32 exec_lo, exec_lo, s8 s_add_i32 s5, s5, s1 v_add_co_u32 v3, vcc_lo, v7, s10 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_187: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_189 ; %bb.188: ; in Loop: Header=BB0_187 Depth=1 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_189: ; in Loop: Header=BB0_187 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v5 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_191 ; %bb.190: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_192 .LBB0_191: ; in Loop: Header=BB0_187 Depth=1 s_mov_b32 s1, -1 .LBB0_192: ; %Flow489 ; in Loop: Header=BB0_187 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_187 ; %bb.193: global_load_b64 v[0:1], v[0:1], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_197 ; %bb.194: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[5:6], v9, s[2:3] offset:40 global_load_b64 v[10:11], v9, s[2:3] offset:24 glc global_load_b64 v[7:8], v9, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v5, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v12, s6 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_and_b32_e32 v6, v4, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v3, v5 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v5, 24 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, v7, v5 v_mov_b32_e32 v5, v10 v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo v_mov_b32_e32 v6, v11 global_store_b64 v[7:8], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_197 ; %bb.195: ; %.preheader.i.i.i34.preheader s_mov_b32 s0, 0 .LBB0_196: ; %.preheader.i.i.i34 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6] v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_196 .LBB0_197: ; %__ockl_printf_append_args.exit38 s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v8, v34 v_mov_b32_e32 v10, 0 v_mov_b32_e32 v11, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v8 v_cmp_eq_u32_e64 s0, s0, v8 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_203 ; %bb.198: v_mov_b32_e32 v3, 0 s_mov_b32 s5, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[9:10], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v9, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v10, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[10:11], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[10:11], v[6:7] s_cbranch_execz .LBB0_202 ; %bb.199: ; %.preheader3.i.i.i45.preheader s_mov_b32 s6, 0 .LBB0_200: ; %.preheader3.i.i.i45 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[12:13], v3, s[2:3] v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v4, v4, v6 s_waitcnt vmcnt(0) v_mad_u64_u32 v[9:10], null, v4, 24, v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mov_b32 v4, v10 :: v_dual_and_b32 v5, v5, v7 v_mad_u64_u32 v[10:11], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[9:10], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[10:11], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[6:7] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_200 ; %bb.201: ; %Flow482 s_or_b32 exec_lo, exec_lo, s6 .LBB0_202: ; %Flow484 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_203: ; %.loopexit4.i.i.i39 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v9, 0 v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_mov_b32 s11, exec_lo s_clause 0x1 global_load_b64 v[12:13], v9, s[2:3] offset:40 global_load_b128 v[4:7], v9, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v12 v_readfirstlane_b32 s9, v13 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s1, s9, 24 s_mul_hi_u32 s5, s8, 24 s_mul_i32 s10, s8, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_205 ; %bb.204: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, v9 s_add_i32 s11, s5, s1 s_waitcnt vmcnt(0) v_add_co_u32 v14, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v15, vcc_lo, s11, v5, vcc_lo v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 global_store_b128 v[14:15], v[10:13], off offset:8 .LBB0_205: s_or_b32 exec_lo, exec_lo, s12 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[10:11], 6, v[8:9] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v6, s8 v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v3, v10 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1f, v0, 32 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v11, vcc_lo v_dual_mov_b32 v3, v9 :: v_dual_mov_b32 v8, s12 v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14 v_mov_b32_e32 v11, s15 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s8, s0 s_cbranch_execz .LBB0_213 ; %bb.206: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s6 v_mov_b32_e32 v12, s7 s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s12, v0 v_readfirstlane_b32 s13, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[12:13], s[6:7] s_mul_i32 s9, s13, 24 s_mul_hi_u32 s11, s12, 24 s_mul_i32 s12, s12, 24 s_add_i32 s11, s11, s9 v_add_co_u32 v8, vcc_lo, v4, s12 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v5, vcc_lo s_mov_b32 s9, exec_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_209 ; %bb.207: ; %.preheader1.i.i.i43.preheader s_mov_b32 s11, 0 .LBB0_208: ; %.preheader1.i.i.i43 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_208 .LBB0_209: ; %Flow480 s_or_b32 exec_lo, exec_lo, s9 v_mov_b32_e32 v3, 0 s_mov_b32 s11, exec_lo s_mov_b32 s9, exec_lo v_mbcnt_lo_u32_b32 v2, s11, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_211 ; %bb.210: s_bcnt1_i32_b32 s11, s11 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s11 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_211: s_or_b32 exec_lo, exec_lo, s9 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_213 ; %bb.212: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s9, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s9, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_213: ; %Flow481 s_or_b32 exec_lo, exec_lo, s8 s_add_i32 s5, s5, s1 v_add_co_u32 v0, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_214: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_216 ; %bb.215: ; in Loop: Header=BB0_214 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_216: ; in Loop: Header=BB0_214 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_218 ; %bb.217: ; in Loop: Header=BB0_214 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_219 .LBB0_218: ; in Loop: Header=BB0_214 Depth=1 s_mov_b32 s1, -1 .LBB0_219: ; %Flow475 ; in Loop: Header=BB0_214 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_214 ; %bb.220: global_load_b64 v[0:1], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_224 ; %bb.221: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s6 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_224 ; %bb.222: ; %.preheader.i.i.i42.preheader s_mov_b32 s0, 0 .LBB0_223: ; %.preheader.i.i.i42 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_223 .LBB0_224: ; %__ockl_printf_append_args.exit46 s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v8, v34 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v8 v_cmp_eq_u32_e64 s0, s0, v8 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_230 ; %bb.225: v_mov_b32_e32 v4, 0 s_mov_b32 s5, exec_lo global_load_b64 v[11:12], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v4, s[2:3] offset:40 global_load_b64 v[5:6], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v3, v3, v12 v_and_b32_e32 v2, v2, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v7, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v7, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v5, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v6, v3, vcc_lo global_load_b64 v[9:10], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[9:12], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_229 ; %bb.226: ; %.preheader3.i.i.i53.preheader s_mov_b32 s6, 0 .LBB0_227: ; %.preheader3.i.i.i53 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v11, v2 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v5, v11 v_and_b32_e32 v7, v6, v12 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, v5, 24, v[9:10] v_mad_u64_u32 v[5:6], null, v7, 24, v[3:4] s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v3, v5 global_load_b64 v[9:10], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[9:12], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[11:12] s_or_b32 s6, vcc_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s6 s_cbranch_execnz .LBB0_227 ; %bb.228: ; %Flow468 s_or_b32 exec_lo, exec_lo, s6 .LBB0_229: ; %Flow470 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s5 .LBB0_230: ; %.loopexit4.i.i.i47 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v9, 0 v_readfirstlane_b32 s6, v2 v_readfirstlane_b32 s7, v3 s_mov_b32 s11, exec_lo s_clause 0x1 global_load_b64 v[10:11], v9, s[2:3] offset:40 global_load_b128 v[4:7], v9, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v10 v_readfirstlane_b32 s9, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s1, s9, 24 s_mul_hi_u32 s5, s8, 24 s_mul_i32 s10, s8, 24 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_232 ; %bb.231: v_dual_mov_b32 v10, s11 :: v_dual_mov_b32 v11, v9 s_add_i32 s11, s5, s1 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v3, vcc_lo, s11, v5, vcc_lo v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 global_store_b128 v[2:3], v[10:13], off offset:8 .LBB0_232: s_or_b32 exec_lo, exec_lo, s12 v_cvt_f64_f32_e32 v[2:3], s4 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[8:9], 6, v[8:9] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v6, s8 v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v6, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1f, v0, 32 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13 v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB0_240 ; %bb.233: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s6 v_mov_b32_e32 v12, s7 s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[8:9], s[6:7] s_mul_i32 s9, s9, 24 s_mul_hi_u32 s11, s8, 24 s_mul_i32 s8, s8, 24 s_add_i32 s11, s11, s9 v_add_co_u32 v8, vcc_lo, v4, s8 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v5, vcc_lo s_mov_b32 s8, exec_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_236 ; %bb.234: ; %.preheader1.i.i.i51.preheader s_mov_b32 s9, 0 .LBB0_235: ; %.preheader1.i.i.i51 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s9, vcc_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB0_235 .LBB0_236: ; %Flow466 s_or_b32 exec_lo, exec_lo, s8 v_mov_b32_e32 v3, 0 s_mov_b32 s9, exec_lo s_mov_b32 s8, exec_lo v_mbcnt_lo_u32_b32 v2, s9, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_238 ; %bb.237: s_bcnt1_i32_b32 s9, s9 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s9 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_238: s_or_b32 exec_lo, exec_lo, s8 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_240 ; %bb.239: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s8, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s8, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_240: ; %Flow467 s_or_b32 exec_lo, exec_lo, s4 s_add_i32 s5, s5, s1 v_add_co_u32 v0, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_241: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_243 ; %bb.242: ; in Loop: Header=BB0_241 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_243: ; in Loop: Header=BB0_241 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_245 ; %bb.244: ; in Loop: Header=BB0_241 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_246 .LBB0_245: ; in Loop: Header=BB0_241 Depth=1 s_mov_b32 s1, -1 .LBB0_246: ; %Flow461 ; in Loop: Header=BB0_241 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_241 ; %bb.247: global_load_b64 v[0:1], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_251 ; %bb.248: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s6 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_251 ; %bb.249: ; %.preheader.i.i.i50.preheader s_mov_b32 s0, 0 .LBB0_250: ; %.preheader.i.i.i50 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_250 .LBB0_251: ; %__ockl_printf_append_args.exit54 s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v8, v34 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v8 v_cmp_eq_u32_e64 s0, s0, v8 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_257 ; %bb.252: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[11:12], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v4, s[2:3] offset:40 global_load_b64 v[5:6], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v3, v3, v12 v_and_b32_e32 v2, v2, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v7, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v7, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v5, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v6, v3, vcc_lo global_load_b64 v[9:10], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[9:12], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_256 ; %bb.253: ; %.preheader3.i.i.i61.preheader s_mov_b32 s5, 0 .LBB0_254: ; %.preheader3.i.i.i61 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v11, v2 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v5, v11 v_and_b32_e32 v7, v6, v12 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, v5, 24, v[9:10] v_mad_u64_u32 v[5:6], null, v7, 24, v[3:4] s_delay_alu instid0(VALU_DEP_1) v_mov_b32_e32 v3, v5 global_load_b64 v[9:10], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[9:12], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[11:12] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_254 ; %bb.255: ; %Flow454 s_or_b32 exec_lo, exec_lo, s5 .LBB0_256: ; %Flow456 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_257: ; %.loopexit4.i.i.i55 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v9, 0 v_readfirstlane_b32 s4, v2 v_readfirstlane_b32 s5, v3 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v9, s[2:3] offset:40 global_load_b128 v[4:7], v9, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_259 ; %bb.258: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, v9 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 global_store_b128 v[2:3], v[10:13], off offset:8 .LBB0_259: s_or_b32 exec_lo, exec_lo, s11 v_cvt_f64_f32_e32 v[2:3], v35 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[8:9] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v6, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1f, v0, 32 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13 v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_267 ; %bb.260: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s4 v_mov_b32_e32 v12, s5 s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v8, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_263 ; %bb.261: ; %.preheader1.i.i.i59.preheader s_mov_b32 s10, 0 .LBB0_262: ; %.preheader1.i.i.i59 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_262 .LBB0_263: ; %Flow452 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_265 ; %bb.264: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_265: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_267 ; %bb.266: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_267: ; %Flow453 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_268: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_270 ; %bb.269: ; in Loop: Header=BB0_268 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_270: ; in Loop: Header=BB0_268 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_272 ; %bb.271: ; in Loop: Header=BB0_268 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_273 .LBB0_272: ; in Loop: Header=BB0_268 Depth=1 s_mov_b32 s1, -1 .LBB0_273: ; %Flow447 ; in Loop: Header=BB0_268 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_268 ; %bb.274: global_load_b64 v[0:1], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_278 ; %bb.275: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_278 ; %bb.276: ; %.preheader.i.i.i58.preheader s_mov_b32 s0, 0 .LBB0_277: ; %.preheader.i.i.i58 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_277 .LBB0_278: ; %__ockl_printf_append_args.exit62 s_or_b32 exec_lo, exec_lo, s1 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v34 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v34 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_284 ; %bb.279: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[7:8], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v4, s[2:3] offset:40 global_load_b64 v[5:6], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v3, v3, v8 v_and_b32_e32 v2, v2, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v5, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v6, v3, vcc_lo global_load_b64 v[5:6], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[2:3], v[7:8] s_cbranch_execz .LBB0_283 ; %bb.280: ; %.preheader3.i.i.i69.preheader s_mov_b32 s5, 0 .LBB0_281: ; %.preheader3.i.i.i69 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) v_mad_u64_u32 v[2:3], null, v5, 24, v[9:10] v_and_b32_e32 v9, v6, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v9, 24, v[3:4] v_mov_b32_e32 v3, v5 global_load_b64 v[5:6], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[7:8] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_281 ; %bb.282: ; %Flow440 s_or_b32 exec_lo, exec_lo, s5 .LBB0_283: ; %Flow442 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_284: ; %.loopexit4.i.i.i63 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v35, 0 v_readfirstlane_b32 s4, v2 v_readfirstlane_b32 s5, v3 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[8:9], v35, s[2:3] offset:40 global_load_b128 v[4:7], v35, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_286 ; %bb.285: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v35 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v3, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[2:3], v[8:11], off offset:8 .LBB0_286: s_or_b32 exec_lo, exec_lo, s11 v_cvt_f64_f32_e32 v[2:3], v36 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[34:35] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v6, v8 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v0, 0xffffff1d, v0, 34 v_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v7, s13 v_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v9, s15 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_294 ; %bb.287: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v6, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v7, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_290 ; %bb.288: ; %.preheader1.i.i.i67.preheader s_mov_b32 s10, 0 .LBB0_289: ; %.preheader1.i.i.i67 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_289 .LBB0_290: ; %Flow438 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_292 ; %bb.291: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_292: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_294 ; %bb.293: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_294: ; %Flow439 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_295: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_297 ; %bb.296: ; in Loop: Header=BB0_295 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_297: ; in Loop: Header=BB0_295 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_299 ; %bb.298: ; in Loop: Header=BB0_295 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_300 .LBB0_299: ; in Loop: Header=BB0_295 Depth=1 s_mov_b32 s1, -1 .LBB0_300: ; %Flow433 ; in Loop: Header=BB0_295 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_295 ; %bb.301: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_305 ; %bb.302: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_305 ; %bb.303: ; %.preheader.i.i.i66.preheader s_mov_b32 s0, 0 .LBB0_304: ; %.preheader.i.i.i66 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_304 .LBB0_305: ; %__ockl_printf_append_args.exit70 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z14distanceKernelPfS_fi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 37 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z14distanceKernelPfS_fi, .Lfunc_end0-_Z14distanceKernelPfS_fi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 13736 ; NumSgprs: 22 ; NumVgprs: 37 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 37 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "c=%d, r=%d, i=%d: the distance between %f to %f is %f. \n" .size .str, 57 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 20 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims - .offset: 104 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z14distanceKernelPfS_fi .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z14distanceKernelPfS_fi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 37 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
eb10e74df3cb55e2edb62d8d03c551db025e84bc
#include <thrust/device_vector.h> #include <thrust/host_vector.h> float* readData(char* filename) { FILE* handle = fopen(filename, "r"); if(handle == NULL) { printf("Error opening file: %s\n", filename); exit(0); } int num, i; fscanf(handle, "%d", &num); float data[num]; for(i=0; i<num; i++) fscanf(handle, "%f", &data[i]); //printf("%f %f %f\n", data[0], data[1], data[2]); return data; } int main(int argc, char *argv[]) { float *hostInput1 = NULL; float *hostInput2 = NULL; int i; /* parse the input arguments */ //@@ Insert code here if(argc != 11) { printf("\nUsage: ./ThrustVectorAdd_Template -e <expected.raw> -i <input0.raw> , <input1.raw> -o <output.raw> -t vector\n\n"); return 0; } char* input0_filename = argv[4]; char* input1_filename = argv[6]; char* output_filename = argv[8]; // Import host input data //@@ Read data from the raw files here //@@ Insert code here hostInput1 = readData(input0_filename); hostInput2 = readData(input1_filename); // Declare and allocate host output //@@ Insert code here int num = sizeof(hostInput1)/sizeof(float); thrust::host_vector<float> hostOutput(num); // Declare and allocate thrust device input and output vectors //@@ Insert code here thrust::device_vector<float> devInput1(num); thrust::device_vector<float> devInput2(num); thrust::device_vector<float> devOutput(num); // Copy to device //@@ Insert code here thrust::copy(hostInput1, hostInput1 + num, devInput1.begin()); thrust::copy(hostInput2, hostInput2 + num, devInput2.begin()); // Execute vector addition //@@ Insert Code here //printf("dev: %f %f\n", devInput1[1], devInput2[1]); thrust::transform(devInput1.begin(), devInput1.end(), devInput2.begin(), devOutput.begin(), thrust::plus<float>()); ///////////////////////////////////////////////////////// // Copy data back to host //@@ Insert code here thrust::copy(devOutput.begin(), devOutput.end(), hostOutput.begin()); //printf("%d %d %d\n", hostOutput[1], hostOutput[2], hostOutput[0]); //Cross-verification float* verifyData = readData(output_filename); if(num != sizeof(verifyData)/sizeof(float)) printf("Size not matching: Output size: %d\tExpected size: %d\n", num, sizeof(verifyData)/sizeof(float)); else for(i=0; i<num; i++) { if((float)verifyData[i] != (float)hostOutput[i]) printf("Data not matching: Location: %d\tOutput: %f\tExpected: %f\n", i+1, hostOutput[i], verifyData[i]); } return 0; }
.file "tmpxft_002308bd_00000000-6_template.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .section .text._ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi .type _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, @function _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi: .LFB8225: .cfi_startproc endbr64 movq %rdi, %rdx movl %esi, %eax ret .cfi_endproc .LFE8225: .size _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi .section .text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .type _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, @function _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi: .LFB8227: .cfi_startproc endbr64 xorl %eax, %eax cmpq %rdi, 8(%rsi) jne .L2 cmpl %edx, (%rsi) sete %al .L2: ret .cfi_endproc .LFE8227: .size _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv.str1.1,"aMS",@progbits,1 .LC1: .string "generic" .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv .type _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv: .LFB8237: .cfi_startproc endbr64 leaq .LC1(%rip), %rax ret .cfi_endproc .LFE8237: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv.str1.1,"aMS",@progbits,1 .LC2: .string "system" .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv .type _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv: .LFB8242: .cfi_startproc endbr64 leaq .LC2(%rip), %rax ret .cfi_endproc .LFE8242: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev: .LFB8247: .cfi_startproc endbr64 ret .cfi_endproc .LFE8247: .size _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev: .LFB8252: .cfi_startproc endbr64 ret .cfi_endproc .LFE8252: .size _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD2Ev .section .text._ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .type _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, @function _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE: .LFB8226: .cfi_startproc endbr64 movq (%rdi), %rax pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdx, %rbx call *24(%rax) movq %rdx, %rcx xorl %edx, %edx cmpq %rcx, 8(%rbx) jne .L11 cmpl %eax, (%rbx) sete %dl .L11: movl %edx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8226: .size _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE, .-_ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv.str1.1,"aMS",@progbits,1 .LC3: .string "cuda" .section .text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv .type _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, @function _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv: .LFB8302: .cfi_startproc endbr64 leaq .LC3(%rip), %rax ret .cfi_endproc .LFE8302: .size _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv .section .text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev: .LFB8307: .cfi_startproc endbr64 ret .cfi_endproc .LFE8307: .size _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD2Ev .text .type nvtxDomainRangePop, @function nvtxDomainRangePop: .LFB8459: .cfi_startproc movq 424+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L18 jmp *%rax .L18: movl $-2, %eax ret .cfi_endproc .LFE8459: .size nvtxDomainRangePop, .-nvtxDomainRangePop .section .text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .weak nvtxEtiGetModuleFunctionTable_v3 .hidden nvtxEtiGetModuleFunctionTable_v3 .type nvtxEtiGetModuleFunctionTable_v3, @function nvtxEtiGetModuleFunctionTable_v3: .LFB8470: .cfi_startproc endbr64 decl %edi xorl %eax, %eax cmpl $5, %edi ja .L19 leaq .L22(%rip), %rcx movslq (%rcx,%rdi,4), %rax addq %rcx, %rax notrack jmp *%rax .section .rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .align 4 .align 4 .L22: .long .L27-.L22 .long .L32-.L22 .long .L25-.L22 .long .L24-.L22 .long .L23-.L22 .long .L21-.L22 .section .text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat .L27: leaq 560+nvtxGlobals_v3(%rip), %rcx jmp .L36 .L25: leaq 776+nvtxGlobals_v3(%rip), %rcx movl $128, %eax jmp .L26 .L24: leaq 904+nvtxGlobals_v3(%rip), %rcx jmp .L37 .L23: leaq 968+nvtxGlobals_v3(%rip), %rcx .L36: movl $136, %eax jmp .L26 .L21: leaq 1104+nvtxGlobals_v3(%rip), %rcx .L37: movl $64, %eax jmp .L26 .L32: leaq 696+nvtxGlobals_v3(%rip), %rcx movl $80, %eax .L26: testq %rdx, %rdx je .L28 shrl $3, %eax decl %eax movl %eax, (%rdx) .L28: testq %rsi, %rsi jne .L29 .L30: movl $1, %eax ret .L29: movq %rcx, (%rsi) jmp .L30 .L19: ret .cfi_endproc .LFE8470: .size nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3 .section .text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat .weak nvtxGetExportTable_v3 .hidden nvtxGetExportTable_v3 .type nvtxGetExportTable_v3, @function nvtxGetExportTable_v3: .LFB8471: .cfi_startproc endbr64 leaq 8+nvtxGlobals_v3(%rip), %rax cmpl $1, %edi je .L38 cmpl $3, %edi leaq 16(%rax), %rax movl $0, %edx cmovne %rdx, %rax .L38: ret .cfi_endproc .LFE8471: .size nvtxGetExportTable_v3, .-nvtxGetExportTable_v3 .section .text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat .weak nvtxEtiSetInjectionNvtxVersion_v3 .hidden nvtxEtiSetInjectionNvtxVersion_v3 .type nvtxEtiSetInjectionNvtxVersion_v3, @function nvtxEtiSetInjectionNvtxVersion_v3: .LFB8472: .cfi_startproc endbr64 ret .cfi_endproc .LFE8472: .size nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3 .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv .type _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv: .LFB9542: .cfi_startproc endbr64 movq 8(%rdi), %rax ret .cfi_endproc .LFE9542: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv .section .text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev .type _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev, @function _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev: .LFB12230: .cfi_startproc endbr64 ret .cfi_endproc .LFE12230: .size _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev .set _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev .type _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev: .LFB12324: .cfi_startproc endbr64 ret .cfi_endproc .LFE12324: .size _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev .set _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED2Ev .section .text._ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_ .type _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_, @function _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_: .LFB12549: .cfi_startproc endbr64 cmpq %rdi, %rsi sete %al ret .cfi_endproc .LFE12549: .size _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_, .-_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_ .section .text._ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_ .type _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_, @function _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_: .LFB12550: .cfi_startproc endbr64 cmpq %rdi, %rsi sete %al ret .cfi_endproc .LFE12550: .size _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_, .-_ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_ .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev: .LFB8249: .cfi_startproc endbr64 movl $8, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE8249: .size _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev: .LFB8254: .cfi_startproc endbr64 movl $8, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE8254: .size _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev: .LFB8309: .cfi_startproc endbr64 movl $8, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE8309: .size _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev .type _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev, @function _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev: .LFB12232: .cfi_startproc endbr64 movl $16, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE12232: .size _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev .type _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev: .LFB12326: .cfi_startproc endbr64 movl $8, %esi jmp _ZdlPvm@PLT .cfi_endproc .LFE12326: .size _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev .section .text._ZN4cuda3__410cuda_errorD2Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat .align 2 .weak _ZN4cuda3__410cuda_errorD2Ev .type _ZN4cuda3__410cuda_errorD2Ev, @function _ZN4cuda3__410cuda_errorD2Ev: .LFB6690: .cfi_startproc endbr64 leaq 16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax movq %rax, (%rdi) jmp _ZNSt13runtime_errorD2Ev@PLT .cfi_endproc .LFE6690: .size _ZN4cuda3__410cuda_errorD2Ev, .-_ZN4cuda3__410cuda_errorD2Ev .weak _ZN4cuda3__410cuda_errorD1Ev .set _ZN4cuda3__410cuda_errorD1Ev,_ZN4cuda3__410cuda_errorD2Ev .section .text._ZN4cuda3__410cuda_errorD0Ev,"axG",@progbits,_ZN4cuda3__410cuda_errorD5Ev,comdat .align 2 .weak _ZN4cuda3__410cuda_errorD0Ev .type _ZN4cuda3__410cuda_errorD0Ev, @function _ZN4cuda3__410cuda_errorD0Ev: .LFB6692: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call _ZN4cuda3__410cuda_errorD1Ev movq 8(%rsp), %rdi movl $16, %esi addq $24, %rsp .cfi_def_cfa_offset 8 jmp _ZdlPvm@PLT .cfi_endproc .LFE6692: .size _ZN4cuda3__410cuda_errorD0Ev, .-_ZN4cuda3__410cuda_errorD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev: .LFB8311: .cfi_startproc endbr64 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx leaq 32(%rdi), %rdi movq %rax, -32(%rdi) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZNSt13runtime_errorD2Ev@PLT .cfi_endproc .LFE8311: .size _ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system12system_errorD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev: .LFB8313: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev movq 8(%rsp), %rdi movl $64, %esi addq $24, %rsp .cfi_def_cfa_offset 8 jmp _ZdlPvm@PLT .cfi_endproc .LFE8313: .size _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev: .LFB9539: .cfi_startproc endbr64 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx leaq 8(%rdi), %rdi movq %rax, -8(%rdi) call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZNSt9bad_allocD2Ev@PLT .cfi_endproc .LFE9539: .size _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev .weak _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev .set _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD2Ev .section .text._ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev .type _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, @function _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev: .LFB9541: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev movq 8(%rsp), %rdi movl $40, %esi addq $24, %rsp .cfi_def_cfa_offset 8 jmp _ZdlPvm@PLT .cfi_endproc .LFE9541: .size _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev, .-_ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev .text .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB11199: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE11199: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .text._ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_,comdat .weak _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_ .hidden _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_ .type _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_, @function _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_: .LFB11706: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax movq %rsp, %rax movq %rdi, (%rsp) leaq 16(%rsp), %rcx movq %rax, 72(%rsp) leaq 112(%rsp), %rax leaq 8(%rsp), %rdx movq %rax, 80(%rsp) leaq 36(%rsp), %rsi movabsq $4294967297, %rax leaq 24(%rsp), %rdi movq %rax, 24(%rsp) movl $1, 32(%rsp) movq %rax, 36(%rsp) movl $1, 44(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L66 pushq 16(%rsp) .cfi_def_cfa_offset 120 leaq _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_(%rip), %rdi pushq 16(%rsp) .cfi_def_cfa_offset 128 movq 52(%rsp), %rcx movl 60(%rsp), %r8d movq 40(%rsp), %rsi movl 48(%rsp), %edx leaq 88(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L66: movq 88(%rsp), %rax subq %fs:40, %rax je .L68 call __stack_chk_fail@PLT .L68: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11706: .size _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_, .-_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_ .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv.str1.1,"aMS",@progbits,1 .LC4: .string ": " .LC5: .string "basic_string::append" .section .text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv .type _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, @function _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv: .LFB8334: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA8334 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movq %rdi, %rbx subq $56, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax cmpq $0, 40(%rdi) jne .L72 call _ZNKSt13runtime_error4whatEv@PLT leaq 32(%rbx), %r13 movq %rax, %rdi movq %rax, %rbp call strlen@PLT movq 40(%rbx), %rdx movq %rbp, %rcx xorl %esi, %esi movq %rax, %r8 movq %r13, %rdi .LEHB0: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT cmpl $0, 16(%rbx) je .L72 cmpq $0, 40(%rbx) jne .L74 .L76: movq 24(%rbx), %rsi leaq 8(%rsp), %r12 movl 16(%rbx), %edx movq %r12, %rdi movq (%rsi), %rax call *48(%rax) jmp .L88 .L74: leaq .LC4(%rip), %rsi movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT .LEHE0: jmp .L76 .L88: movq 16(%rsp), %rdx movq 8(%rsp), %rsi movabsq $4611686018427387903, %rax subq 40(%rbx), %rax cmpq %rdx, %rax jnb .L77 movq 40(%rsp), %rax subq %fs:40, %rax jne .L87 leaq .LC5(%rip), %rdi .LEHB1: call _ZSt20__throw_length_errorPKc@PLT .L77: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT .LEHE1: movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT .L72: movq 32(%rbx), %rbx jmp .L70 .L84: endbr64 movq %rax, %rbp .L79: movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbp, %rdi jmp .L80 .L83: endbr64 movq %rax, %rdi .L80: call __cxa_begin_catch@PLT movq %rbx, %rdi call _ZNKSt13runtime_error4whatEv@PLT movq %rax, %rbx call __cxa_end_catch@PLT .L70: movq 40(%rsp), %rax subq %fs:40, %rax je .L82 .L87: call __stack_chk_fail@PLT .L82: addq $56, %rsp .cfi_def_cfa_offset 40 movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8334: .globl __gxx_personality_v0 .section .gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat .align 4 .LLSDA8334: .byte 0xff .byte 0x9b .uleb128 .LLSDATT8334-.LLSDATTD8334 .LLSDATTD8334: .byte 0x1 .uleb128 .LLSDACSE8334-.LLSDACSB8334 .LLSDACSB8334: .uleb128 .LEHB0-.LFB8334 .uleb128 .LEHE0-.LEHB0 .uleb128 .L83-.LFB8334 .uleb128 0x1 .uleb128 .LEHB1-.LFB8334 .uleb128 .LEHE1-.LEHB1 .uleb128 .L84-.LFB8334 .uleb128 0x3 .LLSDACSE8334: .byte 0x1 .byte 0 .byte 0 .byte 0x7d .align 4 .long 0 .LLSDATT8334: .section .text._ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv,comdat .size _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv, .-_ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv .section .text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat .weak _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .hidden _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .type _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv: .LFB11611: .cfi_startproc endbr64 subq $88, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 72(%rsp) movabsq $4294967297, %rax leaq 8(%rsp), %rcx movq %rsp, %rdx leaq 28(%rsp), %rsi leaq 16(%rsp), %rdi movl $1, 24(%rsp) movl $1, 36(%rsp) movq %rax, 16(%rsp) movq %rax, 28(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L89 pushq 8(%rsp) .cfi_def_cfa_offset 104 leaq _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi pushq 8(%rsp) .cfi_def_cfa_offset 112 movq 44(%rsp), %rcx movl 52(%rsp), %r8d movq 32(%rsp), %rsi movl 40(%rsp), %edx leaq 80(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 104 popq %rdx .cfi_def_cfa_offset 96 .L89: movq 72(%rsp), %rax subq %fs:40, %rax je .L91 call __stack_chk_fail@PLT .L91: addq $88, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11611: .size _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .section .text._ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_,"axG",@progbits,_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_,comdat .weak _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_ .hidden _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_ .type _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_, @function _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_: .LFB11703: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movd %xmm0, %eax movq %rsi, (%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rax, 8(%rsp) leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 16(%rsp), %rax movq %rdi, 16(%rsp) leaq 40(%rsp), %rdi movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movl $1, 48(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L93 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L93: movq 104(%rsp), %rax subq %fs:40, %rax je .L95 call __stack_chk_fail@PLT .L95: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11703: .size _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_, .-_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_ .section .rodata._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc.str1.1,"aMS",@progbits,1 .LC6: .string "cudaError %d: %s" .section .text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat .weak _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .hidden _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .type _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, @function _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc: .LFB6688: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA6688 endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $288, %rsp .cfi_def_cfa_offset 320 movl %edi, 12(%rsp) movl $16, %edi leaq 24(%rsp), %r12 movq %fs:40, %rax movq %rax, 280(%rsp) xorl %eax, %eax call __cxa_allocate_exception@PLT leaq 24(%rsp), %rdi movl $64, %ecx leaq .LC6(%rip), %r8 movq %rax, %rbx xorl %eax, %eax movl $256, %esi rep stosl pushq %rdx .cfi_def_cfa_offset 328 movl $256, %ecx movl $2, %edx pushq %rbp .cfi_def_cfa_offset 336 movl 28(%rsp), %r9d movq %r12, %rdi call __snprintf_chk@PLT popq %rcx .cfi_def_cfa_offset 328 movq %rbx, %rdi popq %rsi .cfi_def_cfa_offset 320 movq %r12, %rsi call _ZNSt13runtime_errorC2EPKc@PLT leaq 16+_ZTVN4cuda3__410cuda_errorE(%rip), %rax movq %rax, (%rbx) movq 280(%rsp), %rax subq %fs:40, %rax je .L98 call __stack_chk_fail@PLT .L98: leaq _ZN4cuda3__410cuda_errorD1Ev(%rip), %rdx leaq _ZTIN4cuda3__410cuda_errorE(%rip), %rsi movq %rbx, %rdi .LEHB2: call __cxa_throw@PLT .LEHE2: .cfi_endproc .LFE6688: .section .gcc_except_table._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"aG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat .LLSDA6688: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE6688-.LLSDACSB6688 .LLSDACSB6688: .uleb128 .LEHB2-.LFB6688 .uleb128 .LEHE2-.LEHB2 .uleb128 0 .uleb128 0 .LLSDACSE6688: .section .text.unlikely._ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,"axG",@progbits,_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc,comdat .size _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc, .-_ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .section .rodata._ZN4cuda3__423__ensure_current_deviceD2Ev.str1.1,"aMS",@progbits,1 .LC7: .string "Failed to set device" .section .text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat .align 2 .weak _ZN4cuda3__423__ensure_current_deviceD2Ev .type _ZN4cuda3__423__ensure_current_deviceD2Ev, @function _ZN4cuda3__423__ensure_current_deviceD2Ev: .LFB6697: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA6697 endbr64 movl 4(%rdi), %eax cmpl (%rdi), %eax je .L107 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %eax, %edi call cudaSetDevice@PLT movl %eax, %ebx testl %eax, %eax je .L101 call cudaGetLastError@PLT leaq .LC7(%rip), %rsi movl %ebx, %edi call _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .L101: popq %rbx .cfi_def_cfa_offset 8 ret .L107: .cfi_restore 3 ret .cfi_endproc .LFE6697: .section .gcc_except_table._ZN4cuda3__423__ensure_current_deviceD2Ev,"aG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat .LLSDA6697: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE6697-.LLSDACSB6697 .LLSDACSB6697: .LLSDACSE6697: .section .text._ZN4cuda3__423__ensure_current_deviceD2Ev,"axG",@progbits,_ZN4cuda3__423__ensure_current_deviceD5Ev,comdat .size _ZN4cuda3__423__ensure_current_deviceD2Ev, .-_ZN4cuda3__423__ensure_current_deviceD2Ev .weak _ZN4cuda3__423__ensure_current_deviceD1Ev .set _ZN4cuda3__423__ensure_current_deviceD1Ev,_ZN4cuda3__423__ensure_current_deviceD2Ev .section .text._ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st,comdat .weak _ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st .type _ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st, @function _ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st: .LFB6934: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 call cudaStreamSynchronize@PLT movl %eax, %ebx call cudaGetLastError@PLT testl %ebx, %ebx jne .L113 testl %eax, %eax jne .L110 .L113: movl %ebx, %eax .L110: popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6934: .size _ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st, .-_ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st .section .text._ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv,comdat .weak _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv .type _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, @function _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv: .LFB8245: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 leaq _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbx pushq %rcx .cfi_def_cfa_offset 32 movb _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %al testb %al, %al jne .L120 leaq _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L120 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE(%rip), %rax leaq _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev(%rip), %rdi movq %rbx, %rsi leaq __dso_handle(%rip), %rdx movq %rax, _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result(%rip) call __cxa_atexit@PLT movq %rbp, %rdi call __cxa_guard_release@PLT .L120: movq %rbx, %rax popq %rdx .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8245: .size _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei .type _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei: .LFB8243: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx subq $32, %rsp .cfi_def_cfa_offset 48 movl %edx, 12(%rsp) movq %fs:40, %rax movq %rax, 24(%rsp) xorl %eax, %eax call _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv movl 12(%rsp), %edx movq %rbx, %rdi movq %rax, %rsi movq (%rax), %rax call *48(%rax) movq 24(%rsp), %rax subq %fs:40, %rax je .L127 call __stack_chk_fail@PLT .L127: addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8243: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei .section .text._ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv,comdat .weak _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv .type _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, @function _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv: .LFB8250: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 leaq _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbx pushq %rcx .cfi_def_cfa_offset 32 movb _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %al testb %al, %al jne .L131 leaq _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L131 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE(%rip), %rax leaq _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev(%rip), %rdi movq %rbx, %rsi leaq __dso_handle(%rip), %rdx movq %rax, _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result(%rip) call __cxa_atexit@PLT movq %rbp, %rdi call __cxa_guard_release@PLT .L131: movq %rbx, %rax popq %rdx .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8250: .size _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv .section .text._ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE,comdat .weak _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE .type _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, @function _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE: .LFB8295: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %edi, %ebx call _ZN6thrust20THRUST_200700_890_NS6system16generic_categoryEv movq %rax, %rdx movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8295: .size _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE, .-_ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi .type _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi: .LFB8244: .cfi_startproc endbr64 leal -9901(%rsi), %eax pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %esi, %ebx cmpl $78, %eax ja .L140 leaq .L142(%rip), %rdx movslq (%rdx,%rax,4), %rax addq %rdx, %rax notrack jmp *%rax .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat .align 4 .align 4 .L142: .long .L219-.L142 .long .L218-.L142 .long .L217-.L142 .long .L216-.L142 .long .L215-.L142 .long .L214-.L142 .long .L213-.L142 .long .L212-.L142 .long .L211-.L142 .long .L210-.L142 .long .L209-.L142 .long .L208-.L142 .long .L207-.L142 .long .L206-.L142 .long .L205-.L142 .long .L204-.L142 .long .L203-.L142 .long .L202-.L142 .long .L201-.L142 .long .L200-.L142 .long .L199-.L142 .long .L198-.L142 .long .L197-.L142 .long .L196-.L142 .long .L195-.L142 .long .L194-.L142 .long .L193-.L142 .long .L192-.L142 .long .L191-.L142 .long .L190-.L142 .long .L189-.L142 .long .L188-.L142 .long .L187-.L142 .long .L186-.L142 .long .L185-.L142 .long .L184-.L142 .long .L140-.L142 .long .L183-.L142 .long .L182-.L142 .long .L181-.L142 .long .L180-.L142 .long .L179-.L142 .long .L178-.L142 .long .L177-.L142 .long .L176-.L142 .long .L175-.L142 .long .L174-.L142 .long .L173-.L142 .long .L172-.L142 .long .L171-.L142 .long .L170-.L142 .long .L169-.L142 .long .L168-.L142 .long .L167-.L142 .long .L166-.L142 .long .L165-.L142 .long .L164-.L142 .long .L163-.L142 .long .L162-.L142 .long .L161-.L142 .long .L160-.L142 .long .L159-.L142 .long .L158-.L142 .long .L157-.L142 .long .L156-.L142 .long .L155-.L142 .long .L154-.L142 .long .L153-.L142 .long .L152-.L142 .long .L151-.L142 .long .L150-.L142 .long .L149-.L142 .long .L148-.L142 .long .L147-.L142 .long .L146-.L142 .long .L145-.L142 .long .L144-.L142 .long .L143-.L142 .long .L141-.L142 .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi,comdat .L219: movl $9901, %edi jmp .L221 .L218: movl $9902, %edi jmp .L221 .L217: movl $9903, %edi jmp .L221 .L216: movl $9904, %edi jmp .L221 .L175: movl $9946, %edi jmp .L221 .L174: movl $9947, %edi jmp .L221 .L173: movl $9948, %edi jmp .L221 .L172: movl $9949, %edi jmp .L221 .L215: movl $9905, %edi jmp .L221 .L171: movl $9950, %edi jmp .L221 .L214: movl $9906, %edi jmp .L221 .L213: movl $9907, %edi jmp .L221 .L212: movl $9908, %edi jmp .L221 .L211: movl $9909, %edi jmp .L221 .L170: movl $9951, %edi jmp .L221 .L210: movl $9910, %edi jmp .L221 .L169: movl $9952, %edi jmp .L221 .L168: movl $9953, %edi jmp .L221 .L167: movl $9954, %edi jmp .L221 .L166: movl $9955, %edi jmp .L221 .L165: movl $9956, %edi jmp .L221 .L164: movl $9957, %edi jmp .L221 .L179: movl $9942, %edi jmp .L221 .L209: movl $9911, %edi jmp .L221 .L208: movl $9912, %edi jmp .L221 .L176: movl $9945, %edi jmp .L221 .L163: movl $9958, %edi jmp .L221 .L162: movl $9959, %edi jmp .L221 .L178: movl $9943, %edi jmp .L221 .L161: movl $9960, %edi jmp .L221 .L160: movl $9961, %edi jmp .L221 .L159: movl $9962, %edi jmp .L221 .L207: movl $9913, %edi jmp .L221 .L206: movl $9914, %edi jmp .L221 .L205: movl $9915, %edi jmp .L221 .L204: movl $9916, %edi jmp .L221 .L203: movl $9917, %edi jmp .L221 .L158: movl $9963, %edi jmp .L221 .L202: movl $9918, %edi jmp .L221 .L157: movl $9964, %edi jmp .L221 .L201: movl $9919, %edi jmp .L221 .L200: movl $9920, %edi jmp .L221 .L199: movl $9921, %edi jmp .L221 .L156: movl $9965, %edi jmp .L221 .L198: movl $9922, %edi jmp .L221 .L155: movl $9966, %edi jmp .L221 .L154: movl $9967, %edi jmp .L221 .L153: movl $9968, %edi jmp .L221 .L152: movl $9969, %edi jmp .L221 .L151: movl $9970, %edi jmp .L221 .L197: movl $9923, %edi jmp .L221 .L196: movl $9924, %edi jmp .L221 .L195: movl $9925, %edi jmp .L221 .L150: movl $9971, %edi jmp .L221 .L194: movl $9926, %edi jmp .L221 .L193: movl $9927, %edi jmp .L221 .L192: movl $9928, %edi jmp .L221 .L149: movl $9972, %edi jmp .L221 .L191: movl $9929, %edi jmp .L221 .L190: movl $9930, %edi jmp .L221 .L189: movl $9931, %edi jmp .L221 .L148: movl $9973, %edi jmp .L221 .L188: movl $9932, %edi jmp .L221 .L187: movl $9933, %edi jmp .L221 .L147: movl $9974, %edi jmp .L221 .L146: movl $9975, %edi jmp .L221 .L145: movl $9976, %edi jmp .L221 .L177: movl $9944, %edi jmp .L221 .L186: movl $9934, %edi jmp .L221 .L185: movl $9935, %edi jmp .L221 .L184: movl $9936, %edi jmp .L221 .L183: movl $9938, %edi jmp .L221 .L144: movl $9977, %edi jmp .L221 .L143: movl $9978, %edi jmp .L221 .L141: movl $9979, %edi jmp .L221 .L182: movl $9939, %edi jmp .L221 .L181: movl $9940, %edi jmp .L221 .L180: movl $9941, %edi .L221: popq %rbx .cfi_remember_state .cfi_def_cfa_offset 8 jmp _ZN6thrust20THRUST_200700_890_NS6system20make_error_conditionENS1_4errc6errc_tE .L140: .cfi_restore_state call _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv movq %rax, %rdx movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8244: .size _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi .section .text._ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv,comdat .weak _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv .type _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, @function _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv: .LFB8305: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 leaq _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbx pushq %rcx .cfi_def_cfa_offset 32 movb _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %al testb %al, %al jne .L224 leaq _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L224 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE(%rip), %rax leaq _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev(%rip), %rdi movq %rbx, %rsi leaq __dso_handle(%rip), %rdx movq %rax, _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result(%rip) call __cxa_atexit@PLT movq %rbp, %rdi call __cxa_guard_release@PLT .L224: movq %rbx, %rax popq %rdx .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8305: .size _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv, .-_ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv .section .text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi .type _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, @function _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi: .LFB8304: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %esi, %ebx cmpl $998, %esi jg .L231 call _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv movq %rax, %rdx movl %ebx, %eax popq %rbx .cfi_remember_state .cfi_def_cfa_offset 8 ret .L231: .cfi_restore_state call _ZN6thrust20THRUST_200700_890_NS6system15system_categoryEv movl %ebx, %esi popq %rbx .cfi_def_cfa_offset 8 movq %rax, %rdi movq (%rax), %rax movq 24(%rax), %rax jmp *%rax .cfi_endproc .LFE8304: .size _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi .section .text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat .weak _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .type _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, @function _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc: .LFB8349: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA8349 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 movq %rsi, %r13 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movl %edi, %ebp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 pushq %rcx .cfi_def_cfa_offset 48 .LEHB3: call cudaGetLastError@PLT .LEHE3: testl %ebp, %ebp je .L235 movl $64, %edi call __cxa_allocate_exception@PLT movq %rax, %rbx call _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv movq %r13, %rsi movq %rbx, %rdi movq %rax, %r12 .LEHB4: call _ZNSt13runtime_errorC2EPKc@PLT .LEHE4: leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rax xorl %edx, %edx movl %ebp, 16(%rbx) movq %rbx, %rdi movq %rax, (%rbx) leaq 48(%rbx), %rax leaq _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE(%rip), %rsi movq %rdx, 40(%rbx) leaq _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev(%rip), %rdx movq %r12, 24(%rbx) movq %rax, 32(%rbx) movb $0, 48(%rbx) .LEHB5: call __cxa_throw@PLT .L238: endbr64 movq %rax, %rbp .L237: movq %rbx, %rdi call __cxa_free_exception@PLT movq %rbp, %rdi call _Unwind_Resume@PLT .LEHE5: .L235: popq %rax .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8349: .section .gcc_except_table._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat .LLSDA8349: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE8349-.LLSDACSB8349 .LLSDACSB8349: .uleb128 .LEHB3-.LFB8349 .uleb128 .LEHE3-.LEHB3 .uleb128 0 .uleb128 0 .uleb128 .LEHB4-.LFB8349 .uleb128 .LEHE4-.LEHB4 .uleb128 .L238-.LFB8349 .uleb128 0 .uleb128 .LEHB5-.LFB8349 .uleb128 .LEHE5-.LEHB5 .uleb128 0 .uleb128 0 .LLSDACSE8349: .section .text._ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc,comdat .size _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc, .-_ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .section .rodata._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm.str1.1,"aMS",@progbits,1 .LC8: .string "CUDA free failed" .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm .type _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm, @function _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm: .LFB12403: .cfi_startproc endbr64 pushq %rcx .cfi_def_cfa_offset 16 movq %rsi, %rdi call cudaFree@PLT testl %eax, %eax je .L240 movl %eax, %edi leaq .LC8(%rip), %rsi popq %rdx .cfi_remember_state .cfi_def_cfa_offset 8 jmp _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .L240: .cfi_restore_state popq %rax .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12403: .size _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm .section .text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm .type _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm, @function _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm: .LFB12330: .cfi_startproc endbr64 movq 8(%rdi), %rdi jmp _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm .cfi_endproc .LFE12330: .size _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm .section .text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat .weak nvtxSetInitFunctionsToNoops_v3 .hidden nvtxSetInitFunctionsToNoops_v3 .type nvtxSetInitFunctionsToNoops_v3, @function nvtxSetInitFunctionsToNoops_v3: .LFB8537: .cfi_startproc endbr64 testl %edi, %edi leaq nvtxMarkEx_impl_init_v3(%rip), %rdx setne %al cmpq %rdx, 48+nvtxGlobals_v3(%rip) je .L373 testb %al, %al je .L245 .L373: xorl %r10d, %r10d movq %r10, 48+nvtxGlobals_v3(%rip) .L245: leaq nvtxMarkA_impl_init_v3(%rip), %rdx cmpq %rdx, 56+nvtxGlobals_v3(%rip) je .L374 testb %al, %al je .L247 .L374: xorl %r9d, %r9d movq %r9, 56+nvtxGlobals_v3(%rip) .L247: leaq nvtxMarkW_impl_init_v3(%rip), %rdx cmpq %rdx, 64+nvtxGlobals_v3(%rip) je .L375 testb %al, %al je .L249 .L375: xorl %r8d, %r8d movq %r8, 64+nvtxGlobals_v3(%rip) .L249: leaq nvtxRangeStartEx_impl_init_v3(%rip), %rdx cmpq %rdx, 72+nvtxGlobals_v3(%rip) je .L376 testb %al, %al je .L251 .L376: xorl %edi, %edi movq %rdi, 72+nvtxGlobals_v3(%rip) .L251: leaq nvtxRangeStartA_impl_init_v3(%rip), %rdx cmpq %rdx, 80+nvtxGlobals_v3(%rip) je .L377 testb %al, %al je .L253 .L377: xorl %esi, %esi movq %rsi, 80+nvtxGlobals_v3(%rip) .L253: leaq nvtxRangeStartW_impl_init_v3(%rip), %rdx cmpq %rdx, 88+nvtxGlobals_v3(%rip) je .L378 testb %al, %al je .L255 .L378: xorl %ecx, %ecx movq %rcx, 88+nvtxGlobals_v3(%rip) .L255: leaq nvtxRangeEnd_impl_init_v3(%rip), %rdx cmpq %rdx, 96+nvtxGlobals_v3(%rip) je .L379 testb %al, %al je .L257 .L379: xorl %edx, %edx movq %rdx, 96+nvtxGlobals_v3(%rip) .L257: leaq nvtxRangePushEx_impl_init_v3(%rip), %rdx cmpq %rdx, 104+nvtxGlobals_v3(%rip) je .L380 testb %al, %al je .L259 .L380: xorl %r11d, %r11d movq %r11, 104+nvtxGlobals_v3(%rip) .L259: leaq nvtxRangePushA_impl_init_v3(%rip), %rdx cmpq %rdx, 112+nvtxGlobals_v3(%rip) je .L381 testb %al, %al je .L261 .L381: xorl %r10d, %r10d movq %r10, 112+nvtxGlobals_v3(%rip) .L261: leaq nvtxRangePushW_impl_init_v3(%rip), %rdx cmpq %rdx, 120+nvtxGlobals_v3(%rip) je .L382 testb %al, %al je .L263 .L382: xorl %r9d, %r9d movq %r9, 120+nvtxGlobals_v3(%rip) .L263: leaq nvtxRangePop_impl_init_v3(%rip), %rdx cmpq %rdx, 128+nvtxGlobals_v3(%rip) je .L383 testb %al, %al je .L265 .L383: xorl %r8d, %r8d movq %r8, 128+nvtxGlobals_v3(%rip) .L265: leaq nvtxNameCategoryA_impl_init_v3(%rip), %rdx cmpq %rdx, 136+nvtxGlobals_v3(%rip) je .L384 testb %al, %al je .L267 .L384: xorl %edi, %edi movq %rdi, 136+nvtxGlobals_v3(%rip) .L267: leaq nvtxNameCategoryW_impl_init_v3(%rip), %rdx cmpq %rdx, 144+nvtxGlobals_v3(%rip) je .L385 testb %al, %al je .L269 .L385: xorl %esi, %esi movq %rsi, 144+nvtxGlobals_v3(%rip) .L269: leaq nvtxNameOsThreadA_impl_init_v3(%rip), %rdx cmpq %rdx, 152+nvtxGlobals_v3(%rip) je .L386 testb %al, %al je .L271 .L386: xorl %ecx, %ecx movq %rcx, 152+nvtxGlobals_v3(%rip) .L271: leaq nvtxNameOsThreadW_impl_init_v3(%rip), %rdx cmpq %rdx, 160+nvtxGlobals_v3(%rip) je .L387 testb %al, %al je .L273 .L387: xorl %edx, %edx movq %rdx, 160+nvtxGlobals_v3(%rip) .L273: leaq nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 168+nvtxGlobals_v3(%rip) je .L388 testb %al, %al je .L275 .L388: xorl %r11d, %r11d movq %r11, 168+nvtxGlobals_v3(%rip) .L275: leaq nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 176+nvtxGlobals_v3(%rip) je .L389 testb %al, %al je .L277 .L389: xorl %r10d, %r10d movq %r10, 176+nvtxGlobals_v3(%rip) .L277: leaq nvtxNameCuContextA_impl_init_v3(%rip), %rdx cmpq %rdx, 184+nvtxGlobals_v3(%rip) je .L390 testb %al, %al je .L279 .L390: xorl %r9d, %r9d movq %r9, 184+nvtxGlobals_v3(%rip) .L279: leaq nvtxNameCuContextW_impl_init_v3(%rip), %rdx cmpq %rdx, 192+nvtxGlobals_v3(%rip) je .L391 testb %al, %al je .L281 .L391: xorl %r8d, %r8d movq %r8, 192+nvtxGlobals_v3(%rip) .L281: leaq nvtxNameCuStreamA_impl_init_v3(%rip), %rdx cmpq %rdx, 200+nvtxGlobals_v3(%rip) je .L392 testb %al, %al je .L283 .L392: xorl %edi, %edi movq %rdi, 200+nvtxGlobals_v3(%rip) .L283: leaq nvtxNameCuStreamW_impl_init_v3(%rip), %rdx cmpq %rdx, 208+nvtxGlobals_v3(%rip) je .L393 testb %al, %al je .L285 .L393: xorl %esi, %esi movq %rsi, 208+nvtxGlobals_v3(%rip) .L285: leaq nvtxNameCuEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 216+nvtxGlobals_v3(%rip) je .L394 testb %al, %al je .L287 .L394: xorl %ecx, %ecx movq %rcx, 216+nvtxGlobals_v3(%rip) .L287: leaq nvtxNameCuEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 224+nvtxGlobals_v3(%rip) je .L395 testb %al, %al je .L289 .L395: xorl %edx, %edx movq %rdx, 224+nvtxGlobals_v3(%rip) .L289: leaq nvtxNameClDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 232+nvtxGlobals_v3(%rip) je .L396 testb %al, %al je .L291 .L396: xorl %r11d, %r11d movq %r11, 232+nvtxGlobals_v3(%rip) .L291: leaq nvtxNameClDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 240+nvtxGlobals_v3(%rip) je .L397 testb %al, %al je .L293 .L397: xorl %r10d, %r10d movq %r10, 240+nvtxGlobals_v3(%rip) .L293: leaq nvtxNameClContextA_impl_init_v3(%rip), %rdx cmpq %rdx, 248+nvtxGlobals_v3(%rip) je .L398 testb %al, %al je .L295 .L398: xorl %r9d, %r9d movq %r9, 248+nvtxGlobals_v3(%rip) .L295: leaq nvtxNameClContextW_impl_init_v3(%rip), %rdx cmpq %rdx, 256+nvtxGlobals_v3(%rip) je .L399 testb %al, %al je .L297 .L399: xorl %r8d, %r8d movq %r8, 256+nvtxGlobals_v3(%rip) .L297: leaq nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx cmpq %rdx, 264+nvtxGlobals_v3(%rip) je .L400 testb %al, %al je .L299 .L400: xorl %edi, %edi movq %rdi, 264+nvtxGlobals_v3(%rip) .L299: leaq nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx cmpq %rdx, 272+nvtxGlobals_v3(%rip) je .L401 testb %al, %al je .L301 .L401: xorl %esi, %esi movq %rsi, 272+nvtxGlobals_v3(%rip) .L301: leaq nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx cmpq %rdx, 280+nvtxGlobals_v3(%rip) je .L402 testb %al, %al je .L303 .L402: xorl %ecx, %ecx movq %rcx, 280+nvtxGlobals_v3(%rip) .L303: leaq nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx cmpq %rdx, 288+nvtxGlobals_v3(%rip) je .L403 testb %al, %al je .L305 .L403: xorl %edx, %edx movq %rdx, 288+nvtxGlobals_v3(%rip) .L305: leaq nvtxNameClSamplerA_impl_init_v3(%rip), %rdx cmpq %rdx, 296+nvtxGlobals_v3(%rip) je .L404 testb %al, %al je .L307 .L404: xorl %r11d, %r11d movq %r11, 296+nvtxGlobals_v3(%rip) .L307: leaq nvtxNameClSamplerW_impl_init_v3(%rip), %rdx cmpq %rdx, 304+nvtxGlobals_v3(%rip) je .L405 testb %al, %al je .L309 .L405: xorl %r10d, %r10d movq %r10, 304+nvtxGlobals_v3(%rip) .L309: leaq nvtxNameClProgramA_impl_init_v3(%rip), %rdx cmpq %rdx, 312+nvtxGlobals_v3(%rip) je .L406 testb %al, %al je .L311 .L406: xorl %r9d, %r9d movq %r9, 312+nvtxGlobals_v3(%rip) .L311: leaq nvtxNameClProgramW_impl_init_v3(%rip), %rdx cmpq %rdx, 320+nvtxGlobals_v3(%rip) je .L407 testb %al, %al je .L313 .L407: xorl %r8d, %r8d movq %r8, 320+nvtxGlobals_v3(%rip) .L313: leaq nvtxNameClEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 328+nvtxGlobals_v3(%rip) je .L408 testb %al, %al je .L315 .L408: xorl %edi, %edi movq %rdi, 328+nvtxGlobals_v3(%rip) .L315: leaq nvtxNameClEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 336+nvtxGlobals_v3(%rip) je .L409 testb %al, %al je .L317 .L409: xorl %esi, %esi movq %rsi, 336+nvtxGlobals_v3(%rip) .L317: leaq nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx cmpq %rdx, 344+nvtxGlobals_v3(%rip) je .L410 testb %al, %al je .L319 .L410: xorl %ecx, %ecx movq %rcx, 344+nvtxGlobals_v3(%rip) .L319: leaq nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx cmpq %rdx, 352+nvtxGlobals_v3(%rip) je .L411 testb %al, %al je .L321 .L411: xorl %edx, %edx movq %rdx, 352+nvtxGlobals_v3(%rip) .L321: leaq nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx cmpq %rdx, 360+nvtxGlobals_v3(%rip) je .L412 testb %al, %al je .L323 .L412: xorl %r11d, %r11d movq %r11, 360+nvtxGlobals_v3(%rip) .L323: leaq nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx cmpq %rdx, 368+nvtxGlobals_v3(%rip) je .L413 testb %al, %al je .L325 .L413: xorl %r10d, %r10d movq %r10, 368+nvtxGlobals_v3(%rip) .L325: leaq nvtxNameCudaEventA_impl_init_v3(%rip), %rdx cmpq %rdx, 376+nvtxGlobals_v3(%rip) je .L414 testb %al, %al je .L327 .L414: xorl %r9d, %r9d movq %r9, 376+nvtxGlobals_v3(%rip) .L327: leaq nvtxNameCudaEventW_impl_init_v3(%rip), %rdx cmpq %rdx, 384+nvtxGlobals_v3(%rip) je .L415 testb %al, %al je .L329 .L415: xorl %r8d, %r8d movq %r8, 384+nvtxGlobals_v3(%rip) .L329: leaq nvtxDomainMarkEx_impl_init_v3(%rip), %rdx cmpq %rdx, 392+nvtxGlobals_v3(%rip) je .L416 testb %al, %al je .L331 .L416: xorl %edi, %edi movq %rdi, 392+nvtxGlobals_v3(%rip) .L331: leaq nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx cmpq %rdx, 400+nvtxGlobals_v3(%rip) je .L417 testb %al, %al je .L333 .L417: xorl %esi, %esi movq %rsi, 400+nvtxGlobals_v3(%rip) .L333: leaq nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx cmpq %rdx, 408+nvtxGlobals_v3(%rip) je .L418 testb %al, %al je .L335 .L418: xorl %ecx, %ecx movq %rcx, 408+nvtxGlobals_v3(%rip) .L335: leaq nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx cmpq %rdx, 416+nvtxGlobals_v3(%rip) je .L419 testb %al, %al je .L337 .L419: xorl %edx, %edx movq %rdx, 416+nvtxGlobals_v3(%rip) .L337: leaq nvtxDomainRangePop_impl_init_v3(%rip), %rdx cmpq %rdx, 424+nvtxGlobals_v3(%rip) je .L420 testb %al, %al je .L339 .L420: xorl %r11d, %r11d movq %r11, 424+nvtxGlobals_v3(%rip) .L339: leaq nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx cmpq %rdx, 432+nvtxGlobals_v3(%rip) je .L421 testb %al, %al je .L341 .L421: xorl %r10d, %r10d movq %r10, 432+nvtxGlobals_v3(%rip) .L341: leaq nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 440+nvtxGlobals_v3(%rip) je .L422 testb %al, %al je .L343 .L422: xorl %r9d, %r9d movq %r9, 440+nvtxGlobals_v3(%rip) .L343: leaq nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx cmpq %rdx, 448+nvtxGlobals_v3(%rip) je .L423 testb %al, %al je .L345 .L423: xorl %r8d, %r8d movq %r8, 448+nvtxGlobals_v3(%rip) .L345: leaq nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx cmpq %rdx, 456+nvtxGlobals_v3(%rip) je .L424 testb %al, %al je .L347 .L424: xorl %edi, %edi movq %rdi, 456+nvtxGlobals_v3(%rip) .L347: leaq nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx cmpq %rdx, 464+nvtxGlobals_v3(%rip) je .L425 testb %al, %al je .L349 .L425: xorl %esi, %esi movq %rsi, 464+nvtxGlobals_v3(%rip) .L349: leaq nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx cmpq %rdx, 472+nvtxGlobals_v3(%rip) je .L426 testb %al, %al je .L351 .L426: xorl %ecx, %ecx movq %rcx, 472+nvtxGlobals_v3(%rip) .L351: leaq nvtxDomainCreateA_impl_init_v3(%rip), %rdx cmpq %rdx, 480+nvtxGlobals_v3(%rip) je .L427 testb %al, %al je .L353 .L427: xorl %edx, %edx movq %rdx, 480+nvtxGlobals_v3(%rip) .L353: leaq nvtxDomainCreateW_impl_init_v3(%rip), %rdx cmpq %rdx, 488+nvtxGlobals_v3(%rip) je .L428 testb %al, %al je .L355 .L428: xorl %r11d, %r11d movq %r11, 488+nvtxGlobals_v3(%rip) .L355: leaq nvtxDomainDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 496+nvtxGlobals_v3(%rip) je .L429 testb %al, %al je .L357 .L429: xorl %r10d, %r10d movq %r10, 496+nvtxGlobals_v3(%rip) .L357: leaq nvtxInitialize_impl_init_v3(%rip), %rdx cmpq %rdx, 504+nvtxGlobals_v3(%rip) je .L430 testb %al, %al je .L359 .L430: xorl %r9d, %r9d movq %r9, 504+nvtxGlobals_v3(%rip) .L359: leaq nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx cmpq %rdx, 512+nvtxGlobals_v3(%rip) je .L431 testb %al, %al je .L361 .L431: xorl %r8d, %r8d movq %r8, 512+nvtxGlobals_v3(%rip) .L361: leaq nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx cmpq %rdx, 520+nvtxGlobals_v3(%rip) je .L432 testb %al, %al je .L363 .L432: xorl %edi, %edi movq %rdi, 520+nvtxGlobals_v3(%rip) .L363: leaq nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx cmpq %rdx, 528+nvtxGlobals_v3(%rip) je .L433 testb %al, %al je .L365 .L433: xorl %esi, %esi movq %rsi, 528+nvtxGlobals_v3(%rip) .L365: leaq nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx cmpq %rdx, 536+nvtxGlobals_v3(%rip) je .L434 testb %al, %al je .L367 .L434: xorl %ecx, %ecx movq %rcx, 536+nvtxGlobals_v3(%rip) .L367: leaq nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx cmpq %rdx, 544+nvtxGlobals_v3(%rip) je .L435 testb %al, %al je .L369 .L435: xorl %edx, %edx movq %rdx, 544+nvtxGlobals_v3(%rip) .L369: leaq nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx cmpq %rdx, 552+nvtxGlobals_v3(%rip) je .L436 testb %al, %al je .L244 .L436: xorl %eax, %eax movq %rax, 552+nvtxGlobals_v3(%rip) .L244: ret .cfi_endproc .LFE8537: .size nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3 .section .rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1 .LC9: .string "NVTX_INJECTION64_PATH" .LC10: .string "InitializeInjectionNvtx2" .section .text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat .weak nvtxInitializeInjectionLibrary_v3 .hidden nvtxInitializeInjectionLibrary_v3 .type nvtxInitializeInjectionLibrary_v3, @function nvtxInitializeInjectionLibrary_v3: .LFB8538: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq .LC9(%rip), %rdi call getenv@PLT movq %rax, %rbx testq %rax, %rax je .L630 movl $1, %esi movq %rax, %rdi call dlopen@PLT movl $4, %edx movq %rax, %rbx testq %rax, %rax je .L629 leaq .LC10(%rip), %rsi movq %rax, %rdi call dlsym@PLT testq %rax, %rax jne .L632 movq %rbx, %rdi call dlclose@PLT movl $5, %edx jmp .L629 .L630: movq InitializeInjectionNvtx2_fnptr(%rip), %rax movl $7, %edx testq %rax, %rax je .L629 .L632: leaq nvtxGetExportTable_v3(%rip), %rdi call *%rax xorl %edx, %edx testl %eax, %eax jne .L629 testq %rbx, %rbx je .L633 movq %rbx, %rdi call dlclose@PLT .L633: movl $6, %edx .L629: movl %edx, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8538: .size nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3 .section .text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat .weak nvtxInitOnce_v3 .hidden nvtxInitOnce_v3 .type nvtxInitOnce_v3, @function nvtxInitOnce_v3: .LFB8539: .cfi_startproc endbr64 movl nvtxGlobals_v3(%rip), %eax cmpl $2, %eax je .L649 pushq %rdx .cfi_def_cfa_offset 16 movl $1, %eax xorl %edx, %edx mfence lock cmpxchgl %edx, nvtxGlobals_v3(%rip) testl %eax, %eax jne .L652 call nvtxInitializeInjectionLibrary_v3 xorl %edi, %edi testl %eax, %eax setne %dil call nvtxSetInitFunctionsToNoops_v3 movl $2, %eax mfence xchgl nvtxGlobals_v3(%rip), %eax jmp .L641 .L652: mfence movl nvtxGlobals_v3(%rip), %eax cmpl $2, %eax je .L641 call sched_yield@PLT jmp .L652 .L641: popq %rax .cfi_def_cfa_offset 8 ret .L649: ret .cfi_endproc .LFE8539: .size nvtxInitOnce_v3, .-nvtxInitOnce_v3 .section .text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat .weak nvtxDomainSyncUserReleasing_impl_init_v3 .hidden nvtxDomainSyncUserReleasing_impl_init_v3 .type nvtxDomainSyncUserReleasing_impl_init_v3, @function nvtxDomainSyncUserReleasing_impl_init_v3: .LFB8536: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 552+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L653 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L653: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8536: .size nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .hidden nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .type nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function nvtxDomainSyncUserAcquireSuccess_impl_init_v3: .LFB8535: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 544+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L656 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L656: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8535: .size nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireFailed_impl_init_v3 .hidden nvtxDomainSyncUserAcquireFailed_impl_init_v3 .type nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function nvtxDomainSyncUserAcquireFailed_impl_init_v3: .LFB8534: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 536+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L659 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L659: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8534: .size nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3 .section .text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat .weak nvtxDomainSyncUserAcquireStart_impl_init_v3 .hidden nvtxDomainSyncUserAcquireStart_impl_init_v3 .type nvtxDomainSyncUserAcquireStart_impl_init_v3, @function nvtxDomainSyncUserAcquireStart_impl_init_v3: .LFB8533: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 528+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L662 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L662: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8533: .size nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3 .section .text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat .weak nvtxDomainSyncUserDestroy_impl_init_v3 .hidden nvtxDomainSyncUserDestroy_impl_init_v3 .type nvtxDomainSyncUserDestroy_impl_init_v3, @function nvtxDomainSyncUserDestroy_impl_init_v3: .LFB8532: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 520+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L665 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L665: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8532: .size nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3 .section .text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat .weak nvtxDomainSyncUserCreate_impl_init_v3 .hidden nvtxDomainSyncUserCreate_impl_init_v3 .type nvtxDomainSyncUserCreate_impl_init_v3, @function nvtxDomainSyncUserCreate_impl_init_v3: .LFB8531: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 512+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L669 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L669: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8531: .size nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3 .section .text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat .weak nvtxInitialize_impl_init_v3 .hidden nvtxInitialize_impl_init_v3 .type nvtxInitialize_impl_init_v3, @function nvtxInitialize_impl_init_v3: .LFB8502: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 504+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L671 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L671: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8502: .size nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3 .section .text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat .weak nvtxDomainDestroy_impl_init_v3 .hidden nvtxDomainDestroy_impl_init_v3 .type nvtxDomainDestroy_impl_init_v3, @function nvtxDomainDestroy_impl_init_v3: .LFB8501: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 496+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L674 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L674: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8501: .size nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3 .section .text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat .weak nvtxDomainCreateW_impl_init_v3 .hidden nvtxDomainCreateW_impl_init_v3 .type nvtxDomainCreateW_impl_init_v3, @function nvtxDomainCreateW_impl_init_v3: .LFB8500: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 488+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L678 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L678: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8500: .size nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3 .section .text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat .weak nvtxDomainCreateA_impl_init_v3 .hidden nvtxDomainCreateA_impl_init_v3 .type nvtxDomainCreateA_impl_init_v3, @function nvtxDomainCreateA_impl_init_v3: .LFB8499: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 480+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L681 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L681: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8499: .size nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3 .section .text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat .weak nvtxDomainRegisterStringW_impl_init_v3 .hidden nvtxDomainRegisterStringW_impl_init_v3 .type nvtxDomainRegisterStringW_impl_init_v3, @function nvtxDomainRegisterStringW_impl_init_v3: .LFB8498: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 472+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L684 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L684: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8498: .size nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3 .section .text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat .weak nvtxDomainRegisterStringA_impl_init_v3 .hidden nvtxDomainRegisterStringA_impl_init_v3 .type nvtxDomainRegisterStringA_impl_init_v3, @function nvtxDomainRegisterStringA_impl_init_v3: .LFB8497: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 464+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L687 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L687: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8497: .size nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3 .section .text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat .weak nvtxDomainNameCategoryW_impl_init_v3 .hidden nvtxDomainNameCategoryW_impl_init_v3 .type nvtxDomainNameCategoryW_impl_init_v3, @function nvtxDomainNameCategoryW_impl_init_v3: .LFB8496: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 movq %rdi, 24(%rsp) movl %esi, 20(%rsp) movq %rdx, 8(%rsp) call nvtxInitOnce_v3 movq 456+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L689 movq 8(%rsp), %rdx movl 20(%rsp), %esi movq 24(%rsp), %rdi addq $40, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L689: .cfi_restore_state addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8496: .size nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3 .section .text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat .weak nvtxDomainNameCategoryA_impl_init_v3 .hidden nvtxDomainNameCategoryA_impl_init_v3 .type nvtxDomainNameCategoryA_impl_init_v3, @function nvtxDomainNameCategoryA_impl_init_v3: .LFB8495: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 movq %rdi, 24(%rsp) movl %esi, 20(%rsp) movq %rdx, 8(%rsp) call nvtxInitOnce_v3 movq 448+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L692 movq 8(%rsp), %rdx movl 20(%rsp), %esi movq 24(%rsp), %rdi addq $40, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L692: .cfi_restore_state addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8495: .size nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3 .section .text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat .weak nvtxDomainResourceDestroy_impl_init_v3 .hidden nvtxDomainResourceDestroy_impl_init_v3 .type nvtxDomainResourceDestroy_impl_init_v3, @function nvtxDomainResourceDestroy_impl_init_v3: .LFB8494: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 440+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L695 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L695: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8494: .size nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3 .section .text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat .weak nvtxDomainResourceCreate_impl_init_v3 .hidden nvtxDomainResourceCreate_impl_init_v3 .type nvtxDomainResourceCreate_impl_init_v3, @function nvtxDomainResourceCreate_impl_init_v3: .LFB8493: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 432+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L699 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L699: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8493: .size nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3 .section .text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat .weak nvtxDomainRangePop_impl_init_v3 .hidden nvtxDomainRangePop_impl_init_v3 .type nvtxDomainRangePop_impl_init_v3, @function nvtxDomainRangePop_impl_init_v3: .LFB8492: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 8(%rsp), %rdi addq $24, %rsp .cfi_def_cfa_offset 8 jmp nvtxDomainRangePop .cfi_endproc .LFE8492: .size nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3 .section .text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat .weak nvtxDomainRangePushEx_impl_init_v3 .hidden nvtxDomainRangePushEx_impl_init_v3 .type nvtxDomainRangePushEx_impl_init_v3, @function nvtxDomainRangePushEx_impl_init_v3: .LFB8491: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 416+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L704 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L704: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8491: .size nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3 .section .text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat .weak nvtxDomainRangeEnd_impl_init_v3 .hidden nvtxDomainRangeEnd_impl_init_v3 .type nvtxDomainRangeEnd_impl_init_v3, @function nvtxDomainRangeEnd_impl_init_v3: .LFB8490: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 408+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L706 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L706: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8490: .size nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3 .section .text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat .weak nvtxDomainRangeStartEx_impl_init_v3 .hidden nvtxDomainRangeStartEx_impl_init_v3 .type nvtxDomainRangeStartEx_impl_init_v3, @function nvtxDomainRangeStartEx_impl_init_v3: .LFB8489: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 400+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L710 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L710: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8489: .size nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3 .section .text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat .weak nvtxDomainMarkEx_impl_init_v3 .hidden nvtxDomainMarkEx_impl_init_v3 .type nvtxDomainMarkEx_impl_init_v3, @function nvtxDomainMarkEx_impl_init_v3: .LFB8488: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 392+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L712 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L712: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8488: .size nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3 .section .text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat .weak nvtxNameCudaEventW_impl_init_v3 .hidden nvtxNameCudaEventW_impl_init_v3 .type nvtxNameCudaEventW_impl_init_v3, @function nvtxNameCudaEventW_impl_init_v3: .LFB8516: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 384+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L715 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L715: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8516: .size nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3 .section .text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat .weak nvtxNameCudaEventA_impl_init_v3 .hidden nvtxNameCudaEventA_impl_init_v3 .type nvtxNameCudaEventA_impl_init_v3, @function nvtxNameCudaEventA_impl_init_v3: .LFB8515: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 376+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L718 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L718: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8515: .size nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3 .section .text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat .weak nvtxNameCudaStreamW_impl_init_v3 .hidden nvtxNameCudaStreamW_impl_init_v3 .type nvtxNameCudaStreamW_impl_init_v3, @function nvtxNameCudaStreamW_impl_init_v3: .LFB8514: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 368+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L721 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L721: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8514: .size nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3 .section .text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat .weak nvtxNameCudaStreamA_impl_init_v3 .hidden nvtxNameCudaStreamA_impl_init_v3 .type nvtxNameCudaStreamA_impl_init_v3, @function nvtxNameCudaStreamA_impl_init_v3: .LFB8513: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 360+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L724 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L724: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8513: .size nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3 .section .text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat .weak nvtxNameCudaDeviceW_impl_init_v3 .hidden nvtxNameCudaDeviceW_impl_init_v3 .type nvtxNameCudaDeviceW_impl_init_v3, @function nvtxNameCudaDeviceW_impl_init_v3: .LFB8512: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 352+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L727 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L727: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8512: .size nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3 .section .text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat .weak nvtxNameCudaDeviceA_impl_init_v3 .hidden nvtxNameCudaDeviceA_impl_init_v3 .type nvtxNameCudaDeviceA_impl_init_v3, @function nvtxNameCudaDeviceA_impl_init_v3: .LFB8511: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 344+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L730 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L730: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8511: .size nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3 .section .text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat .weak nvtxNameClEventW_impl_init_v3 .hidden nvtxNameClEventW_impl_init_v3 .type nvtxNameClEventW_impl_init_v3, @function nvtxNameClEventW_impl_init_v3: .LFB8530: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 336+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L733 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L733: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8530: .size nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3 .section .text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat .weak nvtxNameClEventA_impl_init_v3 .hidden nvtxNameClEventA_impl_init_v3 .type nvtxNameClEventA_impl_init_v3, @function nvtxNameClEventA_impl_init_v3: .LFB8529: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 328+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L736 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L736: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8529: .size nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3 .section .text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat .weak nvtxNameClProgramW_impl_init_v3 .hidden nvtxNameClProgramW_impl_init_v3 .type nvtxNameClProgramW_impl_init_v3, @function nvtxNameClProgramW_impl_init_v3: .LFB8528: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 320+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L739 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L739: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8528: .size nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3 .section .text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat .weak nvtxNameClProgramA_impl_init_v3 .hidden nvtxNameClProgramA_impl_init_v3 .type nvtxNameClProgramA_impl_init_v3, @function nvtxNameClProgramA_impl_init_v3: .LFB8527: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 312+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L742 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L742: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8527: .size nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3 .section .text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat .weak nvtxNameClSamplerW_impl_init_v3 .hidden nvtxNameClSamplerW_impl_init_v3 .type nvtxNameClSamplerW_impl_init_v3, @function nvtxNameClSamplerW_impl_init_v3: .LFB8526: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 304+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L745 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L745: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8526: .size nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3 .section .text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat .weak nvtxNameClSamplerA_impl_init_v3 .hidden nvtxNameClSamplerA_impl_init_v3 .type nvtxNameClSamplerA_impl_init_v3, @function nvtxNameClSamplerA_impl_init_v3: .LFB8525: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 296+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L748 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L748: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8525: .size nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3 .section .text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat .weak nvtxNameClMemObjectW_impl_init_v3 .hidden nvtxNameClMemObjectW_impl_init_v3 .type nvtxNameClMemObjectW_impl_init_v3, @function nvtxNameClMemObjectW_impl_init_v3: .LFB8524: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 288+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L751 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L751: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8524: .size nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3 .section .text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat .weak nvtxNameClMemObjectA_impl_init_v3 .hidden nvtxNameClMemObjectA_impl_init_v3 .type nvtxNameClMemObjectA_impl_init_v3, @function nvtxNameClMemObjectA_impl_init_v3: .LFB8523: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 280+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L754 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L754: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8523: .size nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3 .section .text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat .weak nvtxNameClCommandQueueW_impl_init_v3 .hidden nvtxNameClCommandQueueW_impl_init_v3 .type nvtxNameClCommandQueueW_impl_init_v3, @function nvtxNameClCommandQueueW_impl_init_v3: .LFB8522: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 272+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L757 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L757: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8522: .size nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3 .section .text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat .weak nvtxNameClCommandQueueA_impl_init_v3 .hidden nvtxNameClCommandQueueA_impl_init_v3 .type nvtxNameClCommandQueueA_impl_init_v3, @function nvtxNameClCommandQueueA_impl_init_v3: .LFB8521: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 264+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L760 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L760: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8521: .size nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3 .section .text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat .weak nvtxNameClContextW_impl_init_v3 .hidden nvtxNameClContextW_impl_init_v3 .type nvtxNameClContextW_impl_init_v3, @function nvtxNameClContextW_impl_init_v3: .LFB8520: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 256+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L763 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L763: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8520: .size nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3 .section .text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat .weak nvtxNameClContextA_impl_init_v3 .hidden nvtxNameClContextA_impl_init_v3 .type nvtxNameClContextA_impl_init_v3, @function nvtxNameClContextA_impl_init_v3: .LFB8519: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 248+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L766 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L766: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8519: .size nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3 .section .text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat .weak nvtxNameClDeviceW_impl_init_v3 .hidden nvtxNameClDeviceW_impl_init_v3 .type nvtxNameClDeviceW_impl_init_v3, @function nvtxNameClDeviceW_impl_init_v3: .LFB8518: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 240+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L769 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L769: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8518: .size nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3 .section .text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat .weak nvtxNameClDeviceA_impl_init_v3 .hidden nvtxNameClDeviceA_impl_init_v3 .type nvtxNameClDeviceA_impl_init_v3, @function nvtxNameClDeviceA_impl_init_v3: .LFB8517: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 232+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L772 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L772: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8517: .size nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3 .section .text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat .weak nvtxNameCuEventW_impl_init_v3 .hidden nvtxNameCuEventW_impl_init_v3 .type nvtxNameCuEventW_impl_init_v3, @function nvtxNameCuEventW_impl_init_v3: .LFB8510: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 224+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L775 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L775: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8510: .size nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3 .section .text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat .weak nvtxNameCuEventA_impl_init_v3 .hidden nvtxNameCuEventA_impl_init_v3 .type nvtxNameCuEventA_impl_init_v3, @function nvtxNameCuEventA_impl_init_v3: .LFB8509: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 216+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L778 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L778: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8509: .size nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3 .section .text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat .weak nvtxNameCuStreamW_impl_init_v3 .hidden nvtxNameCuStreamW_impl_init_v3 .type nvtxNameCuStreamW_impl_init_v3, @function nvtxNameCuStreamW_impl_init_v3: .LFB8508: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 208+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L781 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L781: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8508: .size nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3 .section .text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat .weak nvtxNameCuStreamA_impl_init_v3 .hidden nvtxNameCuStreamA_impl_init_v3 .type nvtxNameCuStreamA_impl_init_v3, @function nvtxNameCuStreamA_impl_init_v3: .LFB8507: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 200+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L784 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L784: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8507: .size nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3 .section .text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat .weak nvtxNameCuContextW_impl_init_v3 .hidden nvtxNameCuContextW_impl_init_v3 .type nvtxNameCuContextW_impl_init_v3, @function nvtxNameCuContextW_impl_init_v3: .LFB8506: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 192+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L787 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L787: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8506: .size nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3 .section .text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat .weak nvtxNameCuContextA_impl_init_v3 .hidden nvtxNameCuContextA_impl_init_v3 .type nvtxNameCuContextA_impl_init_v3, @function nvtxNameCuContextA_impl_init_v3: .LFB8505: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 184+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L790 movq (%rsp), %rsi movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L790: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8505: .size nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3 .section .text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat .weak nvtxNameCuDeviceW_impl_init_v3 .hidden nvtxNameCuDeviceW_impl_init_v3 .type nvtxNameCuDeviceW_impl_init_v3, @function nvtxNameCuDeviceW_impl_init_v3: .LFB8504: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 176+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L793 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L793: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8504: .size nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3 .section .text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat .weak nvtxNameCuDeviceA_impl_init_v3 .hidden nvtxNameCuDeviceA_impl_init_v3 .type nvtxNameCuDeviceA_impl_init_v3, @function nvtxNameCuDeviceA_impl_init_v3: .LFB8503: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 168+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L796 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L796: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8503: .size nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3 .section .text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat .weak nvtxNameOsThreadW_impl_init_v3 .hidden nvtxNameOsThreadW_impl_init_v3 .type nvtxNameOsThreadW_impl_init_v3, @function nvtxNameOsThreadW_impl_init_v3: .LFB8487: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 160+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L799 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L799: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8487: .size nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3 .section .text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat .weak nvtxNameOsThreadA_impl_init_v3 .hidden nvtxNameOsThreadA_impl_init_v3 .type nvtxNameOsThreadA_impl_init_v3, @function nvtxNameOsThreadA_impl_init_v3: .LFB8486: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 152+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L802 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L802: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8486: .size nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3 .section .text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat .weak nvtxNameCategoryW_impl_init_v3 .hidden nvtxNameCategoryW_impl_init_v3 .type nvtxNameCategoryW_impl_init_v3, @function nvtxNameCategoryW_impl_init_v3: .LFB8485: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 144+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L805 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L805: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8485: .size nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3 .section .text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat .weak nvtxNameCategoryA_impl_init_v3 .hidden nvtxNameCategoryA_impl_init_v3 .type nvtxNameCategoryA_impl_init_v3, @function nvtxNameCategoryA_impl_init_v3: .LFB8484: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movl %edi, 12(%rsp) movq %rsi, (%rsp) call nvtxInitOnce_v3 movq 136+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L808 movq (%rsp), %rsi movl 12(%rsp), %edi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L808: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8484: .size nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3 .section .text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat .weak nvtxRangePop_impl_init_v3 .hidden nvtxRangePop_impl_init_v3 .type nvtxRangePop_impl_init_v3, @function nvtxRangePop_impl_init_v3: .LFB8483: .cfi_startproc endbr64 pushq %rsi .cfi_def_cfa_offset 16 call nvtxInitOnce_v3 movq 128+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L812 popq %rcx .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L812: .cfi_restore_state movl $-2, %eax popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8483: .size nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3 .section .text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat .weak nvtxRangePushW_impl_init_v3 .hidden nvtxRangePushW_impl_init_v3 .type nvtxRangePushW_impl_init_v3, @function nvtxRangePushW_impl_init_v3: .LFB8482: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 120+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L815 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L815: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8482: .size nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3 .section .text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat .weak nvtxRangePushA_impl_init_v3 .hidden nvtxRangePushA_impl_init_v3 .type nvtxRangePushA_impl_init_v3, @function nvtxRangePushA_impl_init_v3: .LFB8481: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 112+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L818 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L818: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8481: .size nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3 .section .text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat .weak nvtxRangePushEx_impl_init_v3 .hidden nvtxRangePushEx_impl_init_v3 .type nvtxRangePushEx_impl_init_v3, @function nvtxRangePushEx_impl_init_v3: .LFB8480: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 104+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L821 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L821: .cfi_restore_state movl $-2, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8480: .size nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3 .section .text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat .weak nvtxRangeEnd_impl_init_v3 .hidden nvtxRangeEnd_impl_init_v3 .type nvtxRangeEnd_impl_init_v3, @function nvtxRangeEnd_impl_init_v3: .LFB8479: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 96+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L823 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L823: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8479: .size nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3 .section .text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat .weak nvtxRangeStartW_impl_init_v3 .hidden nvtxRangeStartW_impl_init_v3 .type nvtxRangeStartW_impl_init_v3, @function nvtxRangeStartW_impl_init_v3: .LFB8478: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 88+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L827 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L827: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8478: .size nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3 .section .text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat .weak nvtxRangeStartA_impl_init_v3 .hidden nvtxRangeStartA_impl_init_v3 .type nvtxRangeStartA_impl_init_v3, @function nvtxRangeStartA_impl_init_v3: .LFB8477: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 80+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L830 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L830: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8477: .size nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3 .section .text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat .weak nvtxRangeStartEx_impl_init_v3 .hidden nvtxRangeStartEx_impl_init_v3 .type nvtxRangeStartEx_impl_init_v3, @function nvtxRangeStartEx_impl_init_v3: .LFB8476: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 72+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L833 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L833: .cfi_restore_state xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8476: .size nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3 .section .text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat .weak nvtxMarkW_impl_init_v3 .hidden nvtxMarkW_impl_init_v3 .type nvtxMarkW_impl_init_v3, @function nvtxMarkW_impl_init_v3: .LFB8475: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 64+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L835 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L835: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8475: .size nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3 .section .text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat .weak nvtxMarkA_impl_init_v3 .hidden nvtxMarkA_impl_init_v3 .type nvtxMarkA_impl_init_v3, @function nvtxMarkA_impl_init_v3: .LFB8474: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 56+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L838 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L838: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8474: .size nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3 .section .text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat .weak nvtxMarkEx_impl_init_v3 .hidden nvtxMarkEx_impl_init_v3 .type nvtxMarkEx_impl_init_v3, @function nvtxMarkEx_impl_init_v3: .LFB8473: .cfi_startproc endbr64 subq $24, %rsp .cfi_def_cfa_offset 32 movq %rdi, 8(%rsp) call nvtxInitOnce_v3 movq 48+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L841 movq 8(%rsp), %rdi addq $24, %rsp .cfi_remember_state .cfi_def_cfa_offset 8 jmp *%rax .L841: .cfi_restore_state addq $24, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8473: .size nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3 .section .rodata.str1.1,"aMS",@progbits,1 .LC11: .string "r" .LC12: .string "Error opening file: %s\n" .LC13: .string "%d" .LC14: .string "%f" .text .globl _Z8readDataPc .type _Z8readDataPc, @function _Z8readDataPc: .LFB11195: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 leaq .LC11(%rip), %rsi movq %rsp, %rbp .cfi_def_cfa_register 6 pushq %r14 pushq %r13 pushq %r12 .cfi_offset 14, -24 .cfi_offset 13, -32 .cfi_offset 12, -40 movq %rdi, %r12 pushq %rbx subq $16, %rsp .cfi_offset 3, -48 movq %fs:40, %rax movq %rax, -40(%rbp) xorl %eax, %eax call fopen@PLT testq %rax, %rax jne .L845 movl $2, %edi movq %r12, %rdx leaq .LC12(%rip), %rsi xorl %eax, %eax call __printf_chk@PLT xorl %edi, %edi call exit@PLT .L845: leaq -44(%rbp), %rdx movq %rax, %rdi movq %rax, %rbx xorl %eax, %eax leaq .LC13(%rip), %rsi call __isoc23_fscanf@PLT movslq -44(%rbp), %rax movq %rsp, %rcx leaq 15(,%rax,4), %rdx movq %rdx, %rax andq $-4096, %rdx andq $-16, %rax subq %rdx, %rcx .L846: cmpq %rcx, %rsp je .L847 subq $4096, %rsp orq $0, 4088(%rsp) jmp .L846 .L847: andl $4095, %eax subq %rax, %rsp testq %rax, %rax je .L848 orq $0, -8(%rsp,%rax) .L848: movq %rsp, %r13 xorl %r12d, %r12d leaq .LC14(%rip), %r14 .L849: cmpl %r12d, -44(%rbp) jle .L856 movq %r13, %rdx movq %r14, %rsi movq %rbx, %rdi xorl %eax, %eax call __isoc23_fscanf@PLT incl %r12d addq $4, %r13 jmp .L849 .L856: movq -40(%rbp), %rax subq %fs:40, %rax je .L851 call __stack_chk_fail@PLT .L851: leaq -32(%rbp), %rsp xorl %eax, %eax popq %rbx popq %r12 popq %r13 popq %r14 popq %rbp .cfi_def_cfa 7, 8 ret .cfi_endproc .LFE11195: .size _Z8readDataPc, .-_Z8readDataPc .section .rodata.str1.1 .LC15: .ascii "_ZN3cub17CUB_200700_890_NS6detail8for_e" .string "ach13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_" .LC16: .string "_ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_" .LC17: .string "_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv" .LC18: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__45__cpo5beginE" .LC19: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__45__cpo3endE" .LC20: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__45__cpo6cbeginE" .LC21: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__45__cpo4cendE" .LC22: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__45__cpo6rbeginE" .LC23: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__45__cpo4rendE" .LC24: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__45__cpo7crbeginE" .LC25: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__45__cpo5crendE" .LC26: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE" .LC27: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__419piecewise_constructE" .LC28: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__48in_placeE" .LC29: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__47nulloptE" .LC30: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std3__420unreachable_sentinelE" .LC31: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo4swapE" .LC32: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo9iter_moveE" .LC33: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo7advanceE" .LC34: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo5beginE" .LC35: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo3endE" .LC36: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo6cbeginE" .LC37: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo4cendE" .LC38: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo9iter_swapE" .LC39: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo4nextE" .LC40: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo4prevE" .LC41: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo4dataE" .LC42: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo5cdataE" .LC43: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo4sizeE" .LC44: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo5ssizeE" .LC45: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808824cuda3std6ranges3__45__cpo8distanceE" .LC46: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS8cuda_cub3parE" .LC47: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE" .LC48: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS6system6detail10sequential3seqE" .LC49: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_1E" .LC50: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_2E" .LC51: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_3E" .LC52: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_4E" .LC53: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_5E" .LC54: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_6E" .LC55: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_7E" .LC56: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_8E" .LC57: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders2_9E" .LC58: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS12placeholders3_10E" .LC59: .string "_ZN42_INTERNAL_8a765d6f_11_template_cu_114808826thrust20THRUST_200700_890_NS3seqE" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB11228: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC15(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC16(%rip), %rdx movq %rbx, %rdi leaq _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC17(%rip), %rdx movq %rbx, %rdi leaq _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 xorl %r8d, %r8d movq %rbx, %rdi pushq $0 .cfi_def_cfa_offset 24 leaq .LC18(%rip), %rdx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo5beginE(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC19(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo3endE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC20(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC21(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo4cendE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC22(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC23(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo4rendE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC24(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC25(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__45__cpo5crendE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC26(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC27(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__419piecewise_constructE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC28(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__48in_placeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC29(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__47nulloptE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC30(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC31(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC32(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC33(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC34(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC35(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC36(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC37(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC38(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC39(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC40(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC41(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC42(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC43(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC44(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC45(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC46(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC47(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC48(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC49(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC50(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC51(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC52(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC53(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC54(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC55(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 popq %r8 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC56(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi call __cudaRegisterVar@PLT popq %r9 .cfi_def_cfa_offset 24 popq %r10 .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC57(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi call __cudaRegisterVar@PLT popq %r11 .cfi_def_cfa_offset 24 popq %rax .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC58(%rip), %rdx xorl %r8d, %r8d movq %rbx, %rdi movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC59(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $1, %r9d leaq _ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi call __cudaRegisterVar@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE11228: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .rodata._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i.str1.1,"aMS",@progbits,1 .LC60: .string "Failed to query current device" .section .text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat .align 2 .weak _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i .type _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, @function _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i: .LFB11614: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA11614 endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 movq %rdi, %r13 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movq %rsi, %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movslq %edx, %rbx subq $168, %rsp .cfi_def_cfa_offset 224 movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax movb _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %al testb %al, %al jne .L861 leaq _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %r14 movq %r14, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L861 movq %rsp, %rdi movl $-1, (%rsp) .LEHB6: call cudaGetDeviceCount@PLT movl %eax, %ebp call cudaGetLastError@PLT .LEHE6: testl %ebp, %ebp sete %dl testl %eax, %eax setne %al testb %al, %dl jne .L888 testl %ebp, %ebp je .L863 .L888: movl $-1, (%rsp) .L863: movl (%rsp), %eax movq %r14, %rdi movl %eax, _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip) call __cxa_guard_release@PLT .L861: cmpl _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count(%rip), %ebx jge .L865 testl %ebx, %ebx js .L865 jmp .L909 .L886: endbr64 movq %rax, %rbx .L867: movq %r14, %rdi call __cxa_guard_abort@PLT jmp .L908 .L909: imulq $12, %rbx, %rbp addq %r13, %rbp movl 0(%rbp), %eax cmpl $2, %eax je .L883 jmp .L910 .L865: movl $101, %eax salq $32, %rax jmp .L871 .L910: xorl %eax, %eax movl $1, %edx lock cmpxchgl %edx, 0(%rbp) jne .L872 movl (%r12), %eax leaq 4(%rsp), %rdi movl %eax, (%rsp) xorl %eax, %eax movl %eax, 4(%rsp) .LEHB7: call cudaGetDevice@PLT movl %eax, %r12d testl %eax, %eax je .L873 call cudaGetLastError@PLT leaq .LC60(%rip), %rsi movq 152(%rsp), %rax subq %fs:40, %rax je .L907 jmp .L906 .L873: movl (%rsp), %edi cmpl %edi, 4(%rsp) je .L875 call cudaSetDevice@PLT movl %eax, %r12d testl %eax, %eax je .L875 call cudaGetLastError@PLT leaq .LC7(%rip), %rsi movq 152(%rsp), %rax subq %fs:40, %rax jne .L906 .L907: movl %r12d, %edi call _ZN4cuda3__418__throw_cuda_errorE9cudaErrorPKc .LEHE7: .L875: leaq 8(%rsp), %rdi leaq _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi movq %rsp, %r15 .LEHB8: call cudaFuncGetAttributes@PLT movl %eax, %r14d call cudaGetLastError@PLT .LEHE8: movl %eax, %r12d testl %r14d, %r14d jne .L889 testl %eax, %eax jne .L877 .L889: movl %r14d, %r12d .L877: imull $10, 40(%rsp), %eax movq %r15, %rdi movl %eax, 4(%rbp) call _ZN4cuda3__423__ensure_current_deviceD1Ev movl %r12d, 8(%rbp) testl %r12d, %r12d je .L880 .LEHB9: call cudaGetLastError@PLT jmp .L880 .L887: endbr64 movq %rax, %rbx .L881: movq %r15, %rdi call _ZN4cuda3__423__ensure_current_deviceD1Ev .L908: movq 152(%rsp), %rax subq %fs:40, %rax jne .L906 movq %rbx, %rdi call _Unwind_Resume@PLT .LEHE9: .L880: movl $2, 0(%rbp) jmp .L883 .L872: decl %eax jne .L883 .L884: movl 0(%rbp), %eax cmpl $2, %eax jne .L884 .L883: imulq $12, %rbx, %rbx movq 4(%r13,%rbx), %rax .L871: movq 152(%rsp), %rdx subq %fs:40, %rdx je .L885 .L906: call __stack_chk_fail@PLT .L885: addq $168, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11614: .section .gcc_except_table._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"aG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat .LLSDA11614: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE11614-.LLSDACSB11614 .LLSDACSB11614: .uleb128 .LEHB6-.LFB11614 .uleb128 .LEHE6-.LEHB6 .uleb128 .L886-.LFB11614 .uleb128 0 .uleb128 .LEHB7-.LFB11614 .uleb128 .LEHE7-.LEHB7 .uleb128 0 .uleb128 0 .uleb128 .LEHB8-.LFB11614 .uleb128 .LEHE8-.LEHB8 .uleb128 .L887-.LFB11614 .uleb128 0 .uleb128 .LEHB9-.LFB11614 .uleb128 .LEHE9-.LEHB9 .uleb128 0 .uleb128 0 .LLSDACSE11614: .section .text._ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,"axG",@progbits,_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i,comdat .size _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i, .-_ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i .section .text._ZN3cub17CUB_200700_890_NS10PtxVersionERi,"axG",@progbits,_ZN3cub17CUB_200700_890_NS10PtxVersionERi,comdat .weak _ZN3cub17CUB_200700_890_NS10PtxVersionERi .type _ZN3cub17CUB_200700_890_NS10PtxVersionERi, @function _ZN3cub17CUB_200700_890_NS10PtxVersionERi: .LFB6930: .cfi_startproc endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 subq $16, %rsp .cfi_def_cfa_offset 64 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax leaq 4(%rsp), %r13 movl $-1, 4(%rsp) movq %r13, %rdi call cudaGetDevice@PLT movl %eax, %ebx call cudaGetLastError@PLT testl %ebx, %ebx sete %dl testl %eax, %eax setne %al testb %al, %dl jne .L918 testl %ebx, %ebx jne .L918 movl 4(%rsp), %r12d jmp .L912 .L918: orl $-1, %r12d .L912: movb _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %al leaq _ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %rbx testb %al, %al jne .L914 leaq _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache(%rip), %r14 movq %r14, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L914 movl $384, %ecx xorl %eax, %eax movq %rbx, %rdi rep stosl movq %r14, %rdi call __cxa_guard_release@PLT .L914: movl %r12d, %edx movq %r13, %rsi movq %rbx, %rdi movl %r12d, 4(%rsp) call _ZN3cub17CUB_200700_890_NS23PerDeviceAttributeCacheclIZNS0_10PtxVersionERiiEUlS3_E_EENS1_13DevicePayloadEOT_i movq %rax, %r12 movq %rax, %rbx call cudaGetLastError@PLT shrq $32, %r12 orl %r12d, %eax movl %r12d, %r13d jne .L911 movl %ebx, 0(%rbp) .L911: movq 8(%rsp), %rax subq %fs:40, %rax je .L917 call __stack_chk_fail@PLT .L917: addq $16, %rsp .cfi_def_cfa_offset 48 movl %r13d, %eax popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE6930: .size _ZN3cub17CUB_200700_890_NS10PtxVersionERi, .-_ZN3cub17CUB_200700_890_NS10PtxVersionERi .section .rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1 .LC61: .string "basic_string: construction from null is not valid" .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat .align 2 .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: .LFB11626: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $16, %rsp .cfi_def_cfa_offset 48 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax leaq 16(%rdi), %rax movq %rax, (%rdi) testq %rsi, %rsi jne .L924 movq 8(%rsp), %rax subq %fs:40, %rax jne .L929 leaq .LC61(%rip), %rdi call _ZSt19__throw_logic_errorPKc@PLT .L924: movq %rdi, %rbx movq %rsi, %rdi movq %rsi, %rbp call strlen@PLT movq %rax, (%rsp) leaq 0(%rbp,%rax), %r12 cmpq $15, %rax jbe .L926 movq %rsp, %rsi xorl %edx, %edx movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT movq %rax, (%rbx) movq (%rsp), %rax movq %rax, 16(%rbx) .L926: movq (%rbx), %rdi movq %r12, %rdx movq %rbp, %rsi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT movq (%rsp), %rax movq (%rbx), %rdx movq %rax, 8(%rbx) movb $0, (%rdx,%rax) movq 8(%rsp), %rax subq %fs:40, %rax je .L927 .L929: call __stack_chk_fail@PLT .L927: addq $16, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11626: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .set _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1 .LC62: .string "Unknown error" .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei .type _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, @function _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei: .LFB8238: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA8238 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movl %edx, %r12d pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movq %rdi, %rbx subq $24, %rsp .cfi_def_cfa_offset 64 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax movb _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %al testb %al, %al jne .L932 leaq _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rbp movq %rbp, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L932 leaq _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %r13 leaq 7(%rsp), %rdx leaq .LC62(%rip), %rsi movq %r13, %rdi .LEHB10: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE10: movq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdi leaq __dso_handle(%rip), %rdx movq %r13, %rsi call __cxa_atexit@PLT movq %rbp, %rdi call __cxa_guard_release@PLT .L932: movl %r12d, %edi call strerror@PLT movq %rax, %rsi testq %rax, %rax je .L934 leaq 7(%rsp), %rdx movq %rbx, %rdi .LEHB11: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ jmp .L930 .L934: leaq _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err(%rip), %rsi movq %rbx, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@PLT jmp .L930 .L939: endbr64 movq %rax, %rbx .L936: movq %rbp, %rdi call __cxa_guard_abort@PLT movq 8(%rsp), %rax subq %fs:40, %rax jne .L944 movq %rbx, %rdi call _Unwind_Resume@PLT .LEHE11: .L930: movq 8(%rsp), %rax subq %fs:40, %rax je .L938 .L944: call __stack_chk_fail@PLT .L938: addq $24, %rsp .cfi_def_cfa_offset 40 movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8238: .section .gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat .LLSDA8238: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE8238-.LLSDACSB8238 .LLSDACSB8238: .uleb128 .LEHB10-.LFB8238 .uleb128 .LEHE10-.LEHB10 .uleb128 .L939-.LFB8238 .uleb128 0 .uleb128 .LEHB11-.LFB8238 .uleb128 .LEHE11-.LEHB11 .uleb128 0 .uleb128 0 .LLSDACSE8238: .section .text._ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei,comdat .size _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei .section .rodata._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei.str1.1,"aMS",@progbits,1 .LC63: .string "unknown error" .LC64: .string "cudaErrorUnknown" .section .text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat .align 2 .weak _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei .type _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, @function _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei: .LFB8303: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA8303 endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movq %rdi, %r12 movl %edx, %edi pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movl %edx, %ebp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 subq $88, %rsp .cfi_def_cfa_offset 128 movq %fs:40, %rax movq %rax, 72(%rsp) xorl %eax, %eax .LEHB12: call cudaGetErrorString@PLT movl %ebp, %edi movq %rax, %rbx call cudaGetErrorName@PLT movq %rax, %rsi testq %rbx, %rbx jne .L946 leaq .LC63(%rip), %rbx .L946: testq %rsi, %rsi jne .L947 leaq .LC64(%rip), %rsi .L947: leaq 8(%rsp), %rbp leaq 7(%rsp), %rdx movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE12: leaq .LC4(%rip), %rsi movq %rbp, %rdi .LEHB13: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT .LEHE13: leaq 40(%rsp), %r13 movq %rax, %rsi movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %rbx, %rsi movq %r13, %rdi .LEHB14: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT .LEHE14: movq %rax, %rsi movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@PLT movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 72(%rsp), %rax subq %fs:40, %rax je .L951 jmp .L956 .L955: endbr64 movq %rax, %rbx .L948: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L949 .L954: endbr64 movq %rax, %rbx .L949: movq %rbp, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 72(%rsp), %rax subq %fs:40, %rax jne .L956 movq %rbx, %rdi .LEHB15: call _Unwind_Resume@PLT .LEHE15: .L956: call __stack_chk_fail@PLT .L951: addq $88, %rsp .cfi_def_cfa_offset 40 movq %r12, %rax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE8303: .section .gcc_except_table._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat .LLSDA8303: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE8303-.LLSDACSB8303 .LLSDACSB8303: .uleb128 .LEHB12-.LFB8303 .uleb128 .LEHE12-.LEHB12 .uleb128 0 .uleb128 0 .uleb128 .LEHB13-.LFB8303 .uleb128 .LEHE13-.LEHB13 .uleb128 .L954-.LFB8303 .uleb128 0 .uleb128 .LEHB14-.LFB8303 .uleb128 .LEHE14-.LEHB14 .uleb128 .L955-.LFB8303 .uleb128 0 .uleb128 .LEHB15-.LFB8303 .uleb128 .LEHE15-.LEHB15 .uleb128 0 .uleb128 0 .LLSDACSE8303: .section .text._ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei,comdat .size _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei, .-_ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm .type _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm, @function _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm: .LFB12404: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12404 endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 subq $96, %rsp .cfi_def_cfa_offset 144 movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 16(%rsp), %rdi .LEHB16: call cudaMalloc@PLT testl %eax, %eax je .L959 movl %eax, %ebp leaq 24(%rsp), %r12 call cudaGetLastError@PLT .LEHE16: movl $40, %edi call __cxa_allocate_exception@PLT movq %rax, %rbx call _ZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEv movl %ebp, %edx movq %r12, %rdi movq %rax, %rsi movq (%rax), %rax .LEHB17: call *48(%rax) .LEHE17: leaq 56(%rsp), %r14 movq 24(%rsp), %rsi leaq 15(%rsp), %rdx movq %r14, %rdi .LEHB18: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_ .LEHE18: leaq 16+_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rax movb $0, 24(%rbx) movq %rbx, %rdi leaq 8(%rbx), %r13 movq %rax, (%rbx) leaq 24(%rbx), %rax movq %rax, 8(%rbx) xorl %eax, %eax movq %rax, 16(%rbx) call _ZNKSt9bad_alloc4whatEv@PLT movq %rax, %rdi movq %rax, %rbp call strlen@PLT movq 16(%rbx), %rdx movq %rbp, %rcx xorl %esi, %esi movq %rax, %r8 movq %r13, %rdi .LEHB19: call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT leaq .LC4(%rip), %rsi movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@PLT movq 64(%rsp), %rdx movq 56(%rsp), %rsi movabsq $4611686018427387903, %rax subq 16(%rbx), %rax cmpq %rdx, %rax jnb .L960 movq 88(%rsp), %rax subq %fs:40, %rax jne .L973 leaq .LC5(%rip), %rdi call _ZSt20__throw_length_errorPKc@PLT .L960: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@PLT .LEHE19: jmp .L976 .L971: endbr64 movq %rax, %rbp .L963: movq %r13, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %rbx, %rdi call _ZNSt9bad_allocD2Ev@PLT movq %r14, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L964 .L976: movq %r14, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT movq 88(%rsp), %rax subq %fs:40, %rax jne .L973 leaq _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev(%rip), %rdx leaq _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE(%rip), %rsi movq %rbx, %rdi .LEHB20: call __cxa_throw@PLT .L959: movq 16(%rsp), %rax movq 88(%rsp), %rdx subq %fs:40, %rdx je .L968 jmp .L973 .L970: endbr64 movq %rax, %rbp .L964: movq %r12, %rdi call _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT jmp .L966 .L969: endbr64 movq %rax, %rbp .L966: movq %rbx, %rdi call __cxa_free_exception@PLT movq 88(%rsp), %rax subq %fs:40, %rax jne .L973 movq %rbp, %rdi call _Unwind_Resume@PLT .LEHE20: .L973: call __stack_chk_fail@PLT .L968: addq $96, %rsp .cfi_def_cfa_offset 48 popq %rbx .cfi_def_cfa_offset 40 popq %rbp .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r13 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12404: .section .gcc_except_table._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat .LLSDA12404: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12404-.LLSDACSB12404 .LLSDACSB12404: .uleb128 .LEHB16-.LFB12404 .uleb128 .LEHE16-.LEHB16 .uleb128 0 .uleb128 0 .uleb128 .LEHB17-.LFB12404 .uleb128 .LEHE17-.LEHB17 .uleb128 .L969-.LFB12404 .uleb128 0 .uleb128 .LEHB18-.LFB12404 .uleb128 .LEHE18-.LEHB18 .uleb128 .L970-.LFB12404 .uleb128 0 .uleb128 .LEHB19-.LFB12404 .uleb128 .LEHE19-.LEHB19 .uleb128 .L971-.LFB12404 .uleb128 0 .uleb128 .LEHB20-.LFB12404 .uleb128 .LEHE20-.LEHB20 .uleb128 0 .uleb128 0 .LLSDACSE12404: .section .text._ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm,comdat .size _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm, .-_ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm .section .text._ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm .type _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm, @function _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm: .LFB12331: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 movq 8(%rdi), %rdi call _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12331: .size _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm, .-_ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv .type _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv, @function _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv: .LFB12144: .cfi_startproc endbr64 movq 16(%rdi), %rsi testq %rsi, %rsi je .L985 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx movq 8(%rdi), %rdi salq $2, %rsi call _ZdlPvm@PLT xorl %eax, %eax movq %rax, 8(%rbx) movq %rax, 16(%rbx) popq %rbx .cfi_def_cfa_offset 8 ret .L985: .cfi_restore 3 ret .cfi_endproc .LFE12144: .size _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv .type _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv, @function _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv: .LFB12167: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12167 endbr64 movq 16(%rdi), %rdx testq %rdx, %rdx je .L994 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx movq 8(%rdi), %rsi salq $2, %rdx movq (%rdi), %rdi movl $4, %ecx call _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm xorl %eax, %eax movq %rax, 8(%rbx) movq %rax, 16(%rbx) popq %rbx .cfi_def_cfa_offset 8 ret .L994: .cfi_restore 3 ret .cfi_endproc .LFE12167: .section .gcc_except_table._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,"aG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,comdat .LLSDA12167: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12167-.LLSDACSB12167 .LLSDACSB12167: .LLSDACSE12167: .section .text._ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv,comdat .size _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv, .-_ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv .section .text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED5Ev,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev .type _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev, @function _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev: .LFB11907: .cfi_startproc endbr64 jmp _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv .cfi_endproc .LFE11907: .size _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev .weak _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED1Ev .set _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED1Ev,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev .section .rodata .align 32 .LC0: .value 3 .value 48 .long 0 .long 0 .long 0 .long 0 .long 0 .quad 0 .long 0 .zero 4 .quad 0 .section .text._ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_,"axG",@progbits,_ZN5nvtx32v116event_attributesC5IJEEERKNS0_7messageEDpRKT_,comdat .align 2 .weak _ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_ .type _ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_, @function _ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_: .LFB12384: .cfi_startproc endbr64 movq %rsi, %rdx movq %rdi, %rax movl $12, %ecx leaq .LC0(%rip), %rsi rep movsl movq 8(%rdx), %rcx movl (%rdx), %edx movq %rcx, 40(%rax) movl %edx, 32(%rax) ret .cfi_endproc .LFE12384: .size _ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_, .-_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_ .weak _ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_ .set _ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_,_ZN5nvtx32v116event_attributesC2IJEEERKNS0_7messageEDpRKT_ .section .text._ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_,comdat .weak _ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_ .type _ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_, @function _ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_: .LFB12458: .cfi_startproc endbr64 movq (%rdi), %rax ret .cfi_endproc .LFE12458: .size _ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_, .-_ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_ .section .rodata._ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_.str1.1,"aMS",@progbits,1 .LC65: .string "__copy::trivial_device_copy H->D: failed" .section .text._ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_,comdat .weak _ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_ .type _ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_, @function _ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_: .LFB11696: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 subq %rdi, %rsi pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movq %rdx, %rbx subq $16, %rsp .cfi_def_cfa_offset 48 movq %fs:40, %rax movq %rax, 8(%rsp) xorl %eax, %eax movq %rdx, (%rsp) testq %rsi, %rsi jle .L1001 movq %rdi, %r12 movq %rsp, %rdi call _ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_ movq %r12, %rsi movl $1, %ecx movq %rbp, %rdx movq %rax, %rdi movl $1, %r8d call cudaMemcpyAsync@PLT movl $1, %edi movl %eax, %r12d call cudaStreamSynchronize@PLT leaq .LC65(%rip), %rsi movl %r12d, %edi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .L1001: leaq (%rbx,%rbp), %rax movq 8(%rsp), %rdx subq %fs:40, %rdx je .L1002 call __stack_chk_fail@PLT .L1002: addq $16, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11696: .size _ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_, .-_ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_ .section .rodata._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v.str1.1,"aMS",@progbits,1 .LC66: .string "CCCL" .section .text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat .weak _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v .type _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, @function _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v: .LFB12465: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12465 endbr64 movb _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %al testb %al, %al jne .L1014 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rbx movq %rbx, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1006 movq 480+nvtxGlobals_v3(%rip), %rdx xorl %eax, %eax testq %rdx, %rdx je .L1008 leaq .LC66(%rip), %rdi call *%rdx .L1008: movq %rbx, %rdi movq %rax, _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip) call __cxa_guard_release@PLT .L1006: leaq _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax popq %rbx .cfi_def_cfa_offset 8 ret .L1014: .cfi_restore 3 leaq _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d(%rip), %rax ret .cfi_endproc .LFE12465: .section .gcc_except_table._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"aG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat .LLSDA12465: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12465-.LLSDACSB12465 .LLSDACSB12465: .LLSDACSE12465: .section .text._ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,"axG",@progbits,_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v,comdat .size _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v, .-_ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v .section .text._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"axG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat .align 2 .weak _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc .type _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc, @function _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc: .LFB12427: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12427 endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx subq $16, %rsp .cfi_def_cfa_offset 32 movq %rsi, 8(%rsp) call _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v movq 464+nvtxGlobals_v3(%rip), %rdx movq (%rax), %rdi xorl %eax, %eax testq %rdx, %rdx je .L1018 movq 8(%rsp), %rsi call *%rdx .L1018: movq %rax, (%rbx) addq $16, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12427: .section .gcc_except_table._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"aG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat .LLSDA12427: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12427-.LLSDACSB12427 .LLSDACSB12427: .LLSDACSE12427: .section .text._ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc,"axG",@progbits,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC5EPKc,comdat .size _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc, .-_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc .weak _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc .set _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc,_ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC2EPKc .text .align 2 .type _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0, @function _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0: .LFB12581: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12581 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 movq %rdi, %rbx pushq %rdx .cfi_def_cfa_offset 32 cmpb $0, 1(%rdi) je .L1023 call _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v movq (%rax), %rdi call nvtxDomainRangePop movb $0, 1(%rbx) .L1023: call _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v movq (%rax), %rdi movq 416+nvtxGlobals_v3(%rip), %rax testq %rax, %rax je .L1024 movq %rbp, %rsi call *%rax .L1024: movb $1, 1(%rbx) popq %rax .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE12581: .section .gcc_except_table,"a",@progbits .LLSDA12581: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12581-.LLSDACSB12581 .LLSDACSB12581: .LLSDACSE12581: .text .size _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0, .-_ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0 .section .text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat .align 2 .weak _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev .hidden _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev .type _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, @function _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev: .LFB12424: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12424 endbr64 cmpb $0, 1(%rdi) je .L1032 pushq %rax .cfi_def_cfa_offset 16 call _ZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_v movq (%rax), %rdi call nvtxDomainRangePop popq %rdx .cfi_def_cfa_offset 8 ret .L1032: ret .cfi_endproc .LFE12424: .section .gcc_except_table .LLSDA12424: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12424-.LLSDACSB12424 .LLSDACSB12424: .LLSDACSE12424: .section .text._ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev,"axG",@progbits,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED5Ev,comdat .size _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev, .-_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev .weak _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev .hidden _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev .set _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED1Ev,_ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev .section .rodata._ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st.str1.1,"aMS",@progbits,1 .LC67: .string "cub::DeviceFor::Bulk" .section .text._ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st,comdat .weak _ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st .type _ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st, @function _ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st: .LFB12343: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA12343 endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 movq %rsp, %rbp .cfi_def_cfa_register 6 pushq %r14 pushq %r13 pushq %r12 .cfi_offset 14, -24 .cfi_offset 13, -32 .cfi_offset 12, -40 movq %rsi, %r12 pushq %rbx .cfi_offset 3, -48 movq %rdi, %rbx subq $160, %rsp movq %fs:40, %rax movq %rax, -40(%rbp) xorl %eax, %eax movw $0, -166(%rbp) movb _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %al testb %al, %al jne .L1037 leaq _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1037 leaq _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi leaq .LC67(%rip), %rsi call _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc leaq _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi call __cxa_guard_release@PLT .L1037: movb _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al leaq _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %r13 testb %al, %al jne .L1040 leaq _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1040 movq _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax movq %r13, %rdi leaq -88(%rbp), %rsi movl $3, -88(%rbp) movq %rax, -80(%rbp) call _ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_ leaq _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %rdi call __cxa_guard_release@PLT .L1040: leaq -166(%rbp), %rax movq %r13, %rsi movq %rax, %rdi movq %rax, %r14 call _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0 movups 16(%rbp), %xmm2 movups 32(%rbp), %xmm3 xorl %eax, %eax leaq -164(%rbp), %rdi movl %eax, -164(%rbp) movups %xmm2, -160(%rbp) movups %xmm3, -144(%rbp) .LEHB21: call _ZN3cub17CUB_200700_890_NS10PtxVersionERi movl %eax, %r13d call cudaGetLastError@PLT testl %r13d, %r13d jne .L1058 testl %eax, %eax jne .L1042 .L1058: movl %r13d, %eax testl %r13d, %r13d jne .L1042 movups -160(%rbp), %xmm1 movups -144(%rbp), %xmm0 movups %xmm1, -128(%rbp) movups %xmm0, -112(%rbp) movups %xmm1, -80(%rbp) movups %xmm0, -64(%rbp) testq %rbx, %rbx jne .L1044 .L1050: xorl %ebx, %ebx jmp .L1045 .L1044: xorl %ecx, %ecx movq %rbx, %rax testl $511, %ebx movl $512, %esi setne %cl cqto movl $1, -124(%rbp) movq %r12, %r9 idivq %rsi xorl %r8d, %r8d addq %rax, %rcx movabsq $1099511627777, %rax movq %rax, -120(%rbp) movl -120(%rbp), %esi movabsq $4294967297, %rax movl %ecx, -128(%rbp) movq -128(%rbp), %rdi movq %rax, -112(%rbp) movl -108(%rbp), %ecx movq -116(%rbp), %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax je .L1046 .L1048: call cudaPeekAtLastError@PLT movl %eax, %r13d call cudaGetLastError@PLT jmp .L1082 .L1046: movups -80(%rbp), %xmm4 subq $32, %rsp movq %rbx, %rdi movups %xmm4, (%rsp) movups -64(%rbp), %xmm5 movups %xmm5, 16(%rsp) .cfi_escape 0x2e,0x20 call _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_ addq $32, %rsp jmp .L1048 .L1082: movl %eax, %ebx testl %r13d, %r13d jne .L1059 testl %eax, %eax jne .L1045 .L1059: movl %r13d, %ebx testl %r13d, %r13d jne .L1045 .cfi_escape 0x2e,0 call cudaGetLastError@PLT testl %eax, %eax je .L1050 movq %r12, %rdi call _ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st movl %eax, %ebx call cudaGetLastError@PLT .L1045: call cudaGetLastError@PLT .LEHE21: testl %ebx, %ebx jne .L1060 testl %eax, %eax jne .L1042 .L1060: movl %ebx, %eax .L1042: movq %r14, %rdi movl %eax, -180(%rbp) call _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev movl -180(%rbp), %eax movq -40(%rbp), %rdx subq %fs:40, %rdx je .L1054 jmp .L1080 .L1057: endbr64 movq %rax, %rbx .L1052: movq %r14, %rdi call _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev movq -40(%rbp), %rax subq %fs:40, %rax jne .L1080 movq %rbx, %rdi .LEHB22: call _Unwind_Resume@PLT .LEHE22: .L1080: call __stack_chk_fail@PLT .L1054: leaq -32(%rbp), %rsp popq %rbx popq %r12 popq %r13 popq %r14 popq %rbp .cfi_def_cfa 7, 8 ret .cfi_endproc .LFE12343: .section .gcc_except_table .LLSDA12343: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE12343-.LLSDACSB12343 .LLSDACSB12343: .uleb128 .LEHB21-.LFB12343 .uleb128 .LEHE21-.LEHB21 .uleb128 .L1057-.LFB12343 .uleb128 0 .uleb128 .LEHB22-.LFB12343 .uleb128 .LEHE22-.LEHB22 .uleb128 0 .uleb128 0 .LLSDACSE12343: .section .text._ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st,"axG",@progbits,_ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st,comdat .size _ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st, .-_ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st .section .rodata._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em.str1.1,"aMS",@progbits,1 .LC69: .string "parallel_for failed" .LC70: .string "parallel_for: failed to synchronize" .section .text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC5Em,comdat .align 2 .weak _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em .type _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em, @function _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em: .LFB11904: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA11904 endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 leaq _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movq %rsi, %rbp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movq %rdi, %rbx subq $104, %rsp .cfi_def_cfa_offset 160 movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax movb _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %al testb %al, %al jne .L1085 leaq _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1085 leaq 16+_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE(%rip), %rax leaq __dso_handle(%rip), %r13 movq %rax, _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip) movb _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %al leaq _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %r14 testb %al, %al jne .L1088 leaq _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource(%rip), %r15 movq %r15, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1088 leaq _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev(%rip), %rdi movq %r13, %rdx movq %r14, %rsi call __cxa_atexit@PLT movq %r15, %rdi call __cxa_guard_release@PLT .L1088: leaq _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev(%rip), %rdi movq %r13, %rdx movq %r12, %rsi movq %r14, 8+_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip) call __cxa_atexit@PLT leaq _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %rdi call __cxa_guard_release@PLT .L1085: xorl %edx, %edx movq %r12, (%rbx) movq %rdx, 8(%rbx) movq %rdx, 16(%rbx) movq %rdx, 24(%rbx) testq %rbp, %rbp je .L1083 leaq 0(,%rbp,4), %rsi movl $4, %edx movq %r12, %rdi .LEHB23: call _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm .LEHE23: movq %rax, 8(%rbx) movq %rax, %r14 movq %rbp, 16(%rbx) movq %rbp, 24(%rbx) movw $0, 10(%rsp) movb _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %al testb %al, %al jne .L1092 leaq _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %r12 movq %r12, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1092 leaq _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rdi leaq .LC67(%rip), %rsi call _ZN5nvtx32v120registered_string_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEC1EPKc movq %r12, %rdi call __cxa_guard_release@PLT .L1092: movb _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %al leaq _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %r13 testb %al, %al jne .L1095 leaq _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr(%rip), %r12 movq %r12, %rdi call __cxa_guard_acquire@PLT testl %eax, %eax je .L1095 movq _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name(%rip), %rax movq %r13, %rdi leaq 48(%rsp), %rsi movl $3, 48(%rsp) movq %rax, 56(%rsp) call _ZN5nvtx32v116event_attributesC1IJEEERKNS0_7messageEDpRKT_ movq %r12, %rdi call __cxa_guard_release@PLT .L1095: leaq 10(%rsp), %r12 movq %r13, %rsi movq %r12, %rdi call _ZN4cuda3std3__48optionalIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEEE7emplaceIJRKNS4_16event_attributesEELi0EEERSA_DpOT_.isra.0 xorl %eax, %eax leaq 12(%rsp), %rdi movl %eax, 12(%rsp) .LEHB24: call _ZN3cub17CUB_200700_890_NS10PtxVersionERi movl %eax, %r15d call cudaGetLastError@PLT movl %eax, %r13d testl %r15d, %r15d jne .L1112 testl %eax, %eax jne .L1097 .L1112: movl %r15d, %r13d testl %r15d, %r15d jne .L1097 xorl %eax, %eax movq %rbp, %rdx testl $511, %ebp movq %r14, 24(%rsp) setne %al shrq $9, %rdx xorl %r8d, %r8d movl $1, 52(%rsp) addq %rdx, %rax movl $1, %r9d movl $0x00000000, 32(%rsp) movl %eax, 48(%rsp) movq 48(%rsp), %rdi movabsq $1099511627777, %rax movq %rax, 56(%rsp) movl 56(%rsp), %esi movabsq $4294967297, %rax movq %rax, 64(%rsp) movl 68(%rsp), %ecx movq 60(%rsp), %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L1099 movq 24(%rsp), %rsi movss 32(%rsp), %xmm0 movq %rbp, %rdi call _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_ .L1099: call cudaPeekAtLastError@PLT movl %eax, %r13d call cudaGetLastError@PLT movl %eax, %ebp testl %r13d, %r13d jne .L1113 testl %eax, %eax jne .L1100 .L1113: movl %r13d, %ebp testl %r13d, %r13d jne .L1100 call cudaGetLastError@PLT movl %eax, %ebp testl %eax, %eax je .L1100 movl $1, %edi call _ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st movl %eax, %ebp call cudaGetLastError@PLT .L1100: call cudaGetLastError@PLT .LEHE24: movl %eax, %r13d testl %ebp, %ebp jne .L1114 testl %eax, %eax jne .L1097 .L1114: movl %ebp, %r13d .L1097: movq %r12, %rdi call _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev leaq .LC69(%rip), %rsi movl %r13d, %edi .LEHB25: call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc jmp .L1145 .L1111: endbr64 movq %rax, %rbp .L1104: movq %r12, %rdi call _ZN4cuda3std3__424__optional_destruct_baseIN5nvtx32v115scoped_range_inIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainEEELb0EED2Ev jmp .L1105 .L1145: movl $1, %edi call _ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st movl %eax, %edi leaq .LC70(%rip), %rsi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .LEHE25: jmp .L1083 .L1110: endbr64 movq %rax, %rbp .L1105: movq %rbx, %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfNS0_16device_allocatorIfEEE10deallocateEv movq 88(%rsp), %rax subq %fs:40, %rax jne .L1144 movq %rbp, %rdi .LEHB26: call _Unwind_Resume@PLT .LEHE26: .L1083: movq 88(%rsp), %rax subq %fs:40, %rax je .L1107 .L1144: call __stack_chk_fail@PLT .L1107: addq $104, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE11904: .section .gcc_except_table .LLSDA11904: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE11904-.LLSDACSB11904 .LLSDACSB11904: .uleb128 .LEHB23-.LFB11904 .uleb128 .LEHE23-.LEHB23 .uleb128 .L1110-.LFB11904 .uleb128 0 .uleb128 .LEHB24-.LFB11904 .uleb128 .LEHE24-.LEHB24 .uleb128 .L1111-.LFB11904 .uleb128 0 .uleb128 .LEHB25-.LFB11904 .uleb128 .LEHE25-.LEHB25 .uleb128 .L1110-.LFB11904 .uleb128 0 .uleb128 .LEHB26-.LFB11904 .uleb128 .LEHE26-.LEHB26 .uleb128 0 .uleb128 0 .LLSDACSE11904: .section .text._ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em,"axG",@progbits,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC5Em,comdat .size _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em, .-_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em .weak _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC1Em .set _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC1Em,_ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em .section .rodata.str1.1 .LC71: .string "\nUsage: ./ThrustVectorAdd_Template\302\240-e\302\240<expected.raw>\302\240-i\302\240<input0.raw> , <input1.raw>\302\240-o\302\240<output.raw> -t\302\240vector\n\n" .LC72: .string "trivial_device_copy D->H failed" .LC73: .string "Data not matching: Location: %d\tOutput: %f\tExpected: %f\n" .section .text.startup .globl main .type main, @function main: .LFB11196: .cfi_startproc .cfi_personality 0x9b,DW.ref.__gxx_personality_v0 .cfi_lsda 0x1b,.LLSDA11196 endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 movq %rsp, %rbp .cfi_def_cfa_register 6 pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $216, %rsp .cfi_offset 15, -24 .cfi_offset 14, -32 .cfi_offset 13, -40 .cfi_offset 12, -48 .cfi_offset 3, -56 movq %fs:40, %rax movq %rax, -56(%rbp) xorl %eax, %eax cmpl $11, %edi je .L1147 leaq .LC71(%rip), %rsi movl $2, %edi .LEHB27: call __printf_chk@PLT jmp .L1148 .L1147: movq 48(%rsi), %rbx movq 32(%rsi), %rdi movq 64(%rsi), %r15 call _Z8readDataPc movq %rbx, %rdi movq %rax, %r12 call _Z8readDataPc .LEHE27: xorl %edx, %edx movl $8, %edi movq %rax, -256(%rbp) leaq -216(%rbp), %rax movq %rdx, -208(%rbp) movq %rdx, -200(%rbp) movq %rdx, -192(%rbp) movq %rax, -248(%rbp) .LEHB28: call _Znwm@PLT .LEHE28: movq %rax, %rbx movl $2, %esi movq %rax, -208(%rbp) xorl %eax, %eax movq %rax, (%rbx) leaq -184(%rbp), %rax movq %rax, %rdi movq %rax, -232(%rbp) movq $2, -200(%rbp) movq $2, -192(%rbp) .LEHB29: call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em .LEHE29: jmp .L1182 .L1172: endbr64 jmp .L1181 .L1182: leaq -152(%rbp), %rax movl $2, %esi movq %rax, %rdi movq %rax, -240(%rbp) .LEHB30: call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em .LEHE30: leaq -120(%rbp), %r13 movl $2, %esi movq %r13, %rdi .LEHB31: call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEEC2Em .LEHE31: movq -176(%rbp), %r14 leaq 8(%r12), %rsi movq %r12, %rdi movq %r14, %rdx .LEHB32: call _ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_ movq -256(%rbp), %rax movq -144(%rbp), %r12 leaq 8(%rax), %rsi movq %r12, %rdx movq %rax, %rdi call _ZN6thrust20THRUST_200700_890_NS4copyIPfNS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEET0_T_S9_S8_ movq -160(%rbp), %rdi movq -112(%rbp), %rax salq $2, %rdi movq %rax, -256(%rbp) je .L1152 movq %r14, -88(%rbp) subq $32, %rsp sarq $2, %rdi movl $1, %esi movq %r12, -80(%rbp) movups -88(%rbp), %xmm2 movq %rax, -72(%rbp) movups %xmm2, (%rsp) movups -72(%rbp), %xmm3 movups %xmm3, 16(%rsp) .cfi_escape 0x2e,0x20 call _ZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_st movl %eax, %edi addq $32, %rsp leaq .LC69(%rip), %rsi .cfi_escape 0x2e,0 call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc movl $1, %edi call _ZN3cub17CUB_200700_890_NS10SyncStreamEP11CUstream_st movl %eax, %edi leaq .LC70(%rip), %rsi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc .L1152: movq -96(%rbp), %rax leaq 0(,%rax,4), %r12 movq -256(%rbp), %rax movq %rax, -224(%rbp) testq %r12, %r12 jg .L1153 .L1155: movq %r15, %rdi call _Z8readDataPc movss (%rax), %xmm1 movss (%rbx), %xmm0 movq %rax, %r15 ucomiss %xmm0, %xmm1 jnp .L1177 jmp .L1156 .L1153: leaq -224(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS20iterator_core_access11dereferenceINS0_6detail15normal_iteratorINS0_10device_ptrIfEEEEEENT_9referenceERKS8_ movl $2, %ecx movq %r12, %rdx movq %rbx, %rdi movq %rax, %rsi movl $1, %r8d call cudaMemcpyAsync@PLT movl $1, %edi movl %eax, %r14d call cudaStreamSynchronize@PLT leaq .LC72(%rip), %rsi movl %r14d, %edi call _ZN6thrust20THRUST_200700_890_NS8cuda_cub14throw_on_errorE9cudaErrorPKc jmp .L1155 .L1177: jne .L1156 .L1161: movss 4(%r15), %xmm1 movss 4(%rbx), %xmm0 ucomiss %xmm0, %xmm1 jp .L1158 je .L1160 jmp .L1158 .L1156: movl $1, %edx leaq .LC73(%rip), %rsi movl $2, %edi movb $2, %al cvtss2sd %xmm0, %xmm0 cvtss2sd %xmm1, %xmm1 call __printf_chk@PLT jmp .L1161 .L1158: movl $2, %edx leaq .LC73(%rip), %rsi movl $2, %edi movb $2, %al cvtss2sd %xmm0, %xmm0 cvtss2sd %xmm1, %xmm1 call __printf_chk@PLT .LEHE32: .L1160: movq %r13, %rdi call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev movq -240(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev movq -232(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev movq -248(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv .L1148: movq -56(%rbp), %rax subq %fs:40, %rax je .L1167 jmp .L1178 .L1171: endbr64 movq %rax, %rbx .L1162: movq %r13, %rdi call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev jmp .L1163 .L1170: endbr64 movq %rax, %rbx .L1163: movq -240(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev jmp .L1164 .L1169: endbr64 movq %rax, %rbx .L1164: movq -232(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail11vector_baseIfNS0_16device_allocatorIfEEED2Ev jmp .L1165 .L1168: endbr64 .L1181: movq %rax, %rbx .L1165: movq -248(%rbp), %rdi call _ZN6thrust20THRUST_200700_890_NS6detail18contiguous_storageIfSaIfEE10deallocateEv movq -56(%rbp), %rax subq %fs:40, %rax jne .L1178 movq %rbx, %rdi .LEHB33: call _Unwind_Resume@PLT .LEHE33: .L1178: call __stack_chk_fail@PLT .L1167: leaq -40(%rbp), %rsp xorl %eax, %eax popq %rbx popq %r12 popq %r13 popq %r14 popq %r15 popq %rbp .cfi_def_cfa 7, 8 ret .cfi_endproc .LFE11196: .section .gcc_except_table .LLSDA11196: .byte 0xff .byte 0xff .byte 0x1 .uleb128 .LLSDACSE11196-.LLSDACSB11196 .LLSDACSB11196: .uleb128 .LEHB27-.LFB11196 .uleb128 .LEHE27-.LEHB27 .uleb128 0 .uleb128 0 .uleb128 .LEHB28-.LFB11196 .uleb128 .LEHE28-.LEHB28 .uleb128 .L1172-.LFB11196 .uleb128 0 .uleb128 .LEHB29-.LFB11196 .uleb128 .LEHE29-.LEHB29 .uleb128 .L1168-.LFB11196 .uleb128 0 .uleb128 .LEHB30-.LFB11196 .uleb128 .LEHE30-.LEHB30 .uleb128 .L1169-.LFB11196 .uleb128 0 .uleb128 .LEHB31-.LFB11196 .uleb128 .LEHE31-.LEHB31 .uleb128 .L1170-.LFB11196 .uleb128 0 .uleb128 .LEHB32-.LFB11196 .uleb128 .LEHE32-.LEHB32 .uleb128 .L1171-.LFB11196 .uleb128 0 .uleb128 .LEHB33-.LFB11196 .uleb128 .LEHE33-.LEHB33 .uleb128 0 .uleb128 0 .LLSDACSE11196: .section .text.startup .size main, .-main .weak _ZTSN4cuda3__410cuda_errorE .section .rodata._ZTSN4cuda3__410cuda_errorE,"aG",@progbits,_ZTSN4cuda3__410cuda_errorE,comdat .align 16 .type _ZTSN4cuda3__410cuda_errorE, @object .size _ZTSN4cuda3__410cuda_errorE, 24 _ZTSN4cuda3__410cuda_errorE: .string "N4cuda3__410cuda_errorE" .weak _ZTIN4cuda3__410cuda_errorE .section .data.rel.ro._ZTIN4cuda3__410cuda_errorE,"awG",@progbits,_ZTIN4cuda3__410cuda_errorE,comdat .align 8 .type _ZTIN4cuda3__410cuda_errorE, @object .size _ZTIN4cuda3__410cuda_errorE, 24 _ZTIN4cuda3__410cuda_errorE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN4cuda3__410cuda_errorE .quad _ZTISt13runtime_error .weak _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE, 55 _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE: .string "N6thrust20THRUST_200700_890_NS6system14error_categoryE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE, 16 _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system14error_categoryE .weak _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 70 _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE: .string "N6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .quad _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE .weak _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 69 _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE: .string "N6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .quad _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE .weak _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 76 _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE: .string "N6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .quad _ZTIN6thrust20THRUST_200700_890_NS6system14error_categoryE .weak _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE, 53 _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE: .string "N6thrust20THRUST_200700_890_NS6system12system_errorE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system12system_errorE .quad _ZTISt13runtime_error .weak _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 56 _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE: .string "N6thrust20THRUST_200700_890_NS6system6detail9bad_allocE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .quad _ZTISt9bad_alloc .weak _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, @object .size _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, 74 _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE: .string "N6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE" .weak _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, @object .size _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE, 16 _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE .weak _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, @object .size _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, 135 _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE: .string "N6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE" .weak _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, @object .size _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE, 16 _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE .weak _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object .size _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 193 _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE: .string "N6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE" .weak _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object .size _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 24 _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .quad _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEEE .weak _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .section .rodata._ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"aG",@progbits,_ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat .align 32 .type _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object .size _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 228 _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE: .string "N6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE" .weak _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .section .data.rel.ro._ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"awG",@progbits,_ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat .align 8 .type _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object .size _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 24 _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .quad _ZTIN6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEEE .weak _ZTVN4cuda3__410cuda_errorE .section .data.rel.ro._ZTVN4cuda3__410cuda_errorE,"awG",@progbits,_ZTVN4cuda3__410cuda_errorE,comdat .align 8 .type _ZTVN4cuda3__410cuda_errorE, @object .size _ZTVN4cuda3__410cuda_errorE, 40 _ZTVN4cuda3__410cuda_errorE: .quad 0 .quad _ZTIN4cuda3__410cuda_errorE .quad _ZN4cuda3__410cuda_errorD1Ev .quad _ZN4cuda3__410cuda_errorD0Ev .quad _ZNKSt13runtime_error4whatEv .weak _ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE, 72 _ZTVN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryE .quad _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system6detail22generic_error_categoryD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category4nameEv .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category23default_error_conditionEi .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11Ei .weak _ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE, 72 _ZTVN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryE .quad _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system6detail21system_error_categoryD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category4nameEv .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category23default_error_conditionEi .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail21system_error_category7messageB5cxx11Ei .weak _ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE, 72 _ZTVN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryE .quad _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_categoryD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category4nameEv .quad _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category23default_error_conditionEi .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentEiRKNS1_15error_conditionE .quad _ZNK6thrust20THRUST_200700_890_NS6system14error_category10equivalentERKNS1_10error_codeEi .quad _ZNK6thrust20THRUST_200700_890_NS6system8cuda_cub6detail19cuda_error_category7messageB5cxx11Ei .weak _ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE, 40 _ZTVN6thrust20THRUST_200700_890_NS6system12system_errorE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system12system_errorE .quad _ZN6thrust20THRUST_200700_890_NS6system12system_errorD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system12system_errorD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system12system_error4whatEv .weak _ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE, 40 _ZTVN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system6detail9bad_allocE .quad _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system6detail9bad_allocD0Ev .quad _ZNK6thrust20THRUST_200700_890_NS6system6detail9bad_alloc4whatEv .weak _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, @object .size _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE, 56 _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE .quad _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED1Ev .quad _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEED0Ev .quad _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE11do_allocateEmm .quad _ZN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEE13do_deallocateESB_mm .quad _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS5_EENS0_11use_defaultEEEE11do_is_equalERKSA_ .weak _ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .section .data.rel.ro.local._ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,"awG",@progbits,_ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE,comdat .align 8 .type _ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, @object .size _ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE, 56 _ZTVN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE: .quad 0 .quad _ZTIN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEEE .quad _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED1Ev .quad _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEED0Ev .quad _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE11do_allocateEmm .quad _ZN6thrust20THRUST_200700_890_NS26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS8_EENS0_11use_defaultEEEEEE13do_deallocateENS0_10device_ptrIvEEmm .quad _ZNK6thrust20THRUST_200700_890_NS2mr15memory_resourceINS0_10device_ptrIvEEE11do_is_equalERKS5_ .weak _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr .section .bss._ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, 8 _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr .section .bss._ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,comdat .align 32 .type _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, 48 _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr: .zero 48 .weak _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name .section .bss._ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, 8 _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name .section .bss._ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,comdat .align 8 .type _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, 8 _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkImN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS4_10device_ptrIfEEfEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name: .zero 8 .weak _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d .section .bss._ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat .align 8 .type _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object .size _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8 _ZGVZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d: .zero 8 .weak _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d .section .bss._ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,"awG",@nobits,_ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d,comdat .align 8 .type _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, @gnu_unique_object .size _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d, 8 _ZZN5nvtx32v16domain3getIN3cub17CUB_200700_890_NS6detail14NVTXCCCLDomainELi0EEERKS1_vE1d: .zero 8 .weak _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr .section .bss._ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, 8 _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr .section .bss._ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr,comdat .align 32 .type _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr, 48 _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_attr: .zero 48 .weak _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name .section .bss._ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, 8 _ZGVZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name .section .bss._ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name,comdat .align 8 .type _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name, 8 _ZZN3cub17CUB_200700_890_NS9DeviceFor4BulkIlN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS4_6detail15normal_iteratorINS4_10device_ptrIfEEEESC_SC_NS6_14no_stencil_tagENS4_4plusIfEENS6_21always_true_predicateEEEEE9cudaErrorT_T0_P11CUstream_stE21__cub_nvtx3_func_name: .zero 8 .weak _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource .section .bss._ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource,comdat .align 8 .type _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource, @gnu_unique_object .size _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource, 8 _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource: .zero 8 .weak _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource .section .data.rel.local._ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource,"awG",@progbits,_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource,comdat .align 8 .type _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource, 8 _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS9_EENS0_11use_defaultEEEEEEEPT_vE8resource: .quad _ZTVN6thrust20THRUST_200700_890_NS6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvS7_EENS0_11use_defaultEEEEE+16 .weak _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource .section .bss._ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource,comdat .align 8 .type _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, @gnu_unique_object .size _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, 8 _ZGVZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource: .zero 8 .weak _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource .section .bss._ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource,comdat .align 16 .type _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource, 16 _ZZN6thrust20THRUST_200700_890_NS2mr19get_global_resourceINS0_26device_ptr_memory_resourceINS0_6system4cuda6detail20cuda_memory_resourceIXadL_Z10cudaMallocEEXadL_Z8cudaFreeEENS0_7pointerIvNS0_8cuda_cub3tagENS0_16tagged_referenceIvSA_EENS0_11use_defaultEEEEEEEEEPT_vE8resource: .zero 16 .weak _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache .section .bss._ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, 8 _ZGVZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache .section .bss._ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache,comdat .align 32 .type _ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache, 1536 _ZZN3cub17CUB_200700_890_NS26GetPerDeviceAttributeCacheINS0_18PtxVersionCacheTagEEERNS0_23PerDeviceAttributeCacheEvE5cache: .zero 1536 .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .weak _ZN4cuda3std3__420unreachable_sentinelE .section .rodata._ZN4cuda3std3__420unreachable_sentinelE,"aG",@progbits,_ZN4cuda3std3__420unreachable_sentinelE,comdat .type _ZN4cuda3std3__420unreachable_sentinelE, @gnu_unique_object .size _ZN4cuda3std3__420unreachable_sentinelE, 1 _ZN4cuda3std3__420unreachable_sentinelE: .zero 1 .weak _ZN4cuda3std3__45__cpo5crendE .section .rodata._ZN4cuda3std3__45__cpo5crendE,"aG",@progbits,_ZN4cuda3std3__45__cpo5crendE,comdat .type _ZN4cuda3std3__45__cpo5crendE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo5crendE, 1 _ZN4cuda3std3__45__cpo5crendE: .zero 1 .weak _ZN4cuda3std3__45__cpo7crbeginE .section .rodata._ZN4cuda3std3__45__cpo7crbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo7crbeginE,comdat .type _ZN4cuda3std3__45__cpo7crbeginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo7crbeginE, 1 _ZN4cuda3std3__45__cpo7crbeginE: .zero 1 .weak _ZN4cuda3std3__45__cpo4rendE .section .rodata._ZN4cuda3std3__45__cpo4rendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4rendE,comdat .type _ZN4cuda3std3__45__cpo4rendE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo4rendE, 1 _ZN4cuda3std3__45__cpo4rendE: .zero 1 .weak _ZN4cuda3std3__45__cpo6rbeginE .section .rodata._ZN4cuda3std3__45__cpo6rbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6rbeginE,comdat .type _ZN4cuda3std3__45__cpo6rbeginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo6rbeginE, 1 _ZN4cuda3std3__45__cpo6rbeginE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo8distanceE .section .rodata._ZN4cuda3std6ranges3__45__cpo8distanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo8distanceE,comdat .type _ZN4cuda3std6ranges3__45__cpo8distanceE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo8distanceE, 1 _ZN4cuda3std6ranges3__45__cpo8distanceE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5ssizeE .section .rodata._ZN4cuda3std6ranges3__45__cpo5ssizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5ssizeE,comdat .type _ZN4cuda3std6ranges3__45__cpo5ssizeE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5ssizeE, 1 _ZN4cuda3std6ranges3__45__cpo5ssizeE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4sizeE .section .rodata._ZN4cuda3std6ranges3__45__cpo4sizeE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4sizeE,comdat .type _ZN4cuda3std6ranges3__45__cpo4sizeE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4sizeE, 1 _ZN4cuda3std6ranges3__45__cpo4sizeE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5cdataE .section .rodata._ZN4cuda3std6ranges3__45__cpo5cdataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5cdataE,comdat .type _ZN4cuda3std6ranges3__45__cpo5cdataE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5cdataE, 1 _ZN4cuda3std6ranges3__45__cpo5cdataE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4dataE .section .rodata._ZN4cuda3std6ranges3__45__cpo4dataE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4dataE,comdat .type _ZN4cuda3std6ranges3__45__cpo4dataE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4dataE, 1 _ZN4cuda3std6ranges3__45__cpo4dataE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4prevE .section .rodata._ZN4cuda3std6ranges3__45__cpo4prevE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4prevE,comdat .type _ZN4cuda3std6ranges3__45__cpo4prevE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4prevE, 1 _ZN4cuda3std6ranges3__45__cpo4prevE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4nextE .section .rodata._ZN4cuda3std6ranges3__45__cpo4nextE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4nextE,comdat .type _ZN4cuda3std6ranges3__45__cpo4nextE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4nextE, 1 _ZN4cuda3std6ranges3__45__cpo4nextE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo9iter_swapE .section .rodata._ZN4cuda3std6ranges3__45__cpo9iter_swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_swapE,comdat .type _ZN4cuda3std6ranges3__45__cpo9iter_swapE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo9iter_swapE, 1 _ZN4cuda3std6ranges3__45__cpo9iter_swapE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4cendE .section .rodata._ZN4cuda3std6ranges3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4cendE,comdat .type _ZN4cuda3std6ranges3__45__cpo4cendE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4cendE, 1 _ZN4cuda3std6ranges3__45__cpo4cendE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo6cbeginE .section .rodata._ZN4cuda3std6ranges3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo6cbeginE,comdat .type _ZN4cuda3std6ranges3__45__cpo6cbeginE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo6cbeginE, 1 _ZN4cuda3std6ranges3__45__cpo6cbeginE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo3endE .section .rodata._ZN4cuda3std6ranges3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo3endE,comdat .type _ZN4cuda3std6ranges3__45__cpo3endE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo3endE, 1 _ZN4cuda3std6ranges3__45__cpo3endE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo5beginE .section .rodata._ZN4cuda3std6ranges3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo5beginE,comdat .type _ZN4cuda3std6ranges3__45__cpo5beginE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo5beginE, 1 _ZN4cuda3std6ranges3__45__cpo5beginE: .zero 1 .weak _ZN4cuda3std3__47nulloptE .section .rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat .type _ZN4cuda3std3__47nulloptE, @gnu_unique_object .size _ZN4cuda3std3__47nulloptE, 1 _ZN4cuda3std3__47nulloptE: .zero 1 .hidden InitializeInjectionNvtx2_fnptr .weak InitializeInjectionNvtx2_fnptr .bss .align 8 .type InitializeInjectionNvtx2_fnptr, @object .size InitializeInjectionNvtx2_fnptr, 8 InitializeInjectionNvtx2_fnptr: .zero 8 .hidden nvtxGlobals_v3 .weak nvtxGlobals_v3 .section .data.rel.local,"aw" .align 32 .type nvtxGlobals_v3, @object .size nvtxGlobals_v3, 1168 nvtxGlobals_v3: .long 0 .zero 4 .quad 16 .quad nvtxEtiGetModuleFunctionTable_v3 .quad 24 .long 3 .long 0 .quad nvtxEtiSetInjectionNvtxVersion_v3 .quad nvtxMarkEx_impl_init_v3 .quad nvtxMarkA_impl_init_v3 .quad nvtxMarkW_impl_init_v3 .quad nvtxRangeStartEx_impl_init_v3 .quad nvtxRangeStartA_impl_init_v3 .quad nvtxRangeStartW_impl_init_v3 .quad nvtxRangeEnd_impl_init_v3 .quad nvtxRangePushEx_impl_init_v3 .quad nvtxRangePushA_impl_init_v3 .quad nvtxRangePushW_impl_init_v3 .quad nvtxRangePop_impl_init_v3 .quad nvtxNameCategoryA_impl_init_v3 .quad nvtxNameCategoryW_impl_init_v3 .quad nvtxNameOsThreadA_impl_init_v3 .quad nvtxNameOsThreadW_impl_init_v3 .quad nvtxNameCuDeviceA_impl_init_v3 .quad nvtxNameCuDeviceW_impl_init_v3 .quad nvtxNameCuContextA_impl_init_v3 .quad nvtxNameCuContextW_impl_init_v3 .quad nvtxNameCuStreamA_impl_init_v3 .quad nvtxNameCuStreamW_impl_init_v3 .quad nvtxNameCuEventA_impl_init_v3 .quad nvtxNameCuEventW_impl_init_v3 .quad nvtxNameClDeviceA_impl_init_v3 .quad nvtxNameClDeviceW_impl_init_v3 .quad nvtxNameClContextA_impl_init_v3 .quad nvtxNameClContextW_impl_init_v3 .quad nvtxNameClCommandQueueA_impl_init_v3 .quad nvtxNameClCommandQueueW_impl_init_v3 .quad nvtxNameClMemObjectA_impl_init_v3 .quad nvtxNameClMemObjectW_impl_init_v3 .quad nvtxNameClSamplerA_impl_init_v3 .quad nvtxNameClSamplerW_impl_init_v3 .quad nvtxNameClProgramA_impl_init_v3 .quad nvtxNameClProgramW_impl_init_v3 .quad nvtxNameClEventA_impl_init_v3 .quad nvtxNameClEventW_impl_init_v3 .quad nvtxNameCudaDeviceA_impl_init_v3 .quad nvtxNameCudaDeviceW_impl_init_v3 .quad nvtxNameCudaStreamA_impl_init_v3 .quad nvtxNameCudaStreamW_impl_init_v3 .quad nvtxNameCudaEventA_impl_init_v3 .quad nvtxNameCudaEventW_impl_init_v3 .quad nvtxDomainMarkEx_impl_init_v3 .quad nvtxDomainRangeStartEx_impl_init_v3 .quad nvtxDomainRangeEnd_impl_init_v3 .quad nvtxDomainRangePushEx_impl_init_v3 .quad nvtxDomainRangePop_impl_init_v3 .quad nvtxDomainResourceCreate_impl_init_v3 .quad nvtxDomainResourceDestroy_impl_init_v3 .quad nvtxDomainNameCategoryA_impl_init_v3 .quad nvtxDomainNameCategoryW_impl_init_v3 .quad nvtxDomainRegisterStringA_impl_init_v3 .quad nvtxDomainRegisterStringW_impl_init_v3 .quad nvtxDomainCreateA_impl_init_v3 .quad nvtxDomainCreateW_impl_init_v3 .quad nvtxDomainDestroy_impl_init_v3 .quad nvtxInitialize_impl_init_v3 .quad nvtxDomainSyncUserCreate_impl_init_v3 .quad nvtxDomainSyncUserDestroy_impl_init_v3 .quad nvtxDomainSyncUserAcquireStart_impl_init_v3 .quad nvtxDomainSyncUserAcquireFailed_impl_init_v3 .quad nvtxDomainSyncUserAcquireSuccess_impl_init_v3 .quad nvtxDomainSyncUserReleasing_impl_init_v3 .quad 0 .quad nvtxGlobals_v3+48 .quad nvtxGlobals_v3+56 .quad nvtxGlobals_v3+64 .quad nvtxGlobals_v3+72 .quad nvtxGlobals_v3+80 .quad nvtxGlobals_v3+88 .quad nvtxGlobals_v3+96 .quad nvtxGlobals_v3+104 .quad nvtxGlobals_v3+112 .quad nvtxGlobals_v3+120 .quad nvtxGlobals_v3+128 .quad nvtxGlobals_v3+136 .quad nvtxGlobals_v3+144 .quad nvtxGlobals_v3+152 .quad nvtxGlobals_v3+160 .quad 0 .quad 0 .quad nvtxGlobals_v3+168 .quad nvtxGlobals_v3+176 .quad nvtxGlobals_v3+184 .quad nvtxGlobals_v3+192 .quad nvtxGlobals_v3+200 .quad nvtxGlobals_v3+208 .quad nvtxGlobals_v3+216 .quad nvtxGlobals_v3+224 .quad 0 .quad 0 .quad nvtxGlobals_v3+232 .quad nvtxGlobals_v3+240 .quad nvtxGlobals_v3+248 .quad nvtxGlobals_v3+256 .quad nvtxGlobals_v3+264 .quad nvtxGlobals_v3+272 .quad nvtxGlobals_v3+280 .quad nvtxGlobals_v3+288 .quad nvtxGlobals_v3+296 .quad nvtxGlobals_v3+304 .quad nvtxGlobals_v3+312 .quad nvtxGlobals_v3+320 .quad nvtxGlobals_v3+328 .quad nvtxGlobals_v3+336 .quad 0 .quad 0 .quad nvtxGlobals_v3+344 .quad nvtxGlobals_v3+352 .quad nvtxGlobals_v3+360 .quad nvtxGlobals_v3+368 .quad nvtxGlobals_v3+376 .quad nvtxGlobals_v3+384 .quad 0 .quad 0 .quad nvtxGlobals_v3+392 .quad nvtxGlobals_v3+400 .quad nvtxGlobals_v3+408 .quad nvtxGlobals_v3+416 .quad nvtxGlobals_v3+424 .quad nvtxGlobals_v3+432 .quad nvtxGlobals_v3+440 .quad nvtxGlobals_v3+448 .quad nvtxGlobals_v3+456 .quad nvtxGlobals_v3+464 .quad nvtxGlobals_v3+472 .quad nvtxGlobals_v3+480 .quad nvtxGlobals_v3+488 .quad nvtxGlobals_v3+496 .quad nvtxGlobals_v3+504 .quad 0 .quad 0 .quad nvtxGlobals_v3+512 .quad nvtxGlobals_v3+520 .quad nvtxGlobals_v3+528 .quad nvtxGlobals_v3+536 .quad nvtxGlobals_v3+544 .quad nvtxGlobals_v3+552 .quad 0 .section .rodata .type _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object .size _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1 _ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, @object .size _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1 _ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE: .zero 1 .weak _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result .section .bss._ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat .align 8 .type _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object .size _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8 _ZGVZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result: .zero 8 .weak _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result .section .bss._ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result,comdat .align 8 .type _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result, 8 _ZZN6thrust20THRUST_200700_890_NS6system13cuda_categoryEvE6result: .zero 8 .weak _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result .section .bss._ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,comdat .align 8 .type _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object .size _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8 _ZGVZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result: .zero 8 .weak _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result .section .bss._ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result,comdat .align 8 .type _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result, 8 _ZZN6thrust20THRUST_200700_890_NS6system15system_categoryEvE6result: .zero 8 .weak _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result .section .bss._ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,comdat .align 8 .type _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object .size _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, 8 _ZGVZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result: .zero 8 .weak _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result .section .bss._ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result,comdat .align 8 .type _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, @gnu_unique_object .size _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result, 8 _ZZN6thrust20THRUST_200700_890_NS6system16generic_categoryEvE6result: .zero 8 .weak _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err .section .bss._ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat .align 8 .type _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object .size _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 8 _ZGVZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err: .zero 8 .weak _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err .section .bss._ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,"awG",@nobits,_ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err,comdat .align 32 .type _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, @gnu_unique_object .size _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err, 32 _ZZNK6thrust20THRUST_200700_890_NS6system6detail22generic_error_category7messageB5cxx11EiE11unknown_err: .zero 32 .section .rodata .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, @object .size _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, 1 _ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E: .zero 1 .weak _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count .section .bss._ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat .align 8 .type _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object .size _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 8 _ZGVZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count: .zero 8 .weak _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count .section .bss._ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,"awG",@nobits,_ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count,comdat .align 4 .type _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, @gnu_unique_object .size _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count, 4 _ZZN3cub17CUB_200700_890_NS22DeviceCountCachedValueEvE5count: .zero 4 .section .rodata .type _ZN6thrust20THRUST_200700_890_NSL3seqE, @object .size _ZN6thrust20THRUST_200700_890_NSL3seqE, 1 _ZN6thrust20THRUST_200700_890_NSL3seqE: .zero 1 .type _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, @object .size _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, 1 _ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo7advanceE .section .rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat .type _ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo7advanceE, 1 _ZN4cuda3std6ranges3__45__cpo7advanceE: .zero 1 .hidden _ZN4cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE .weak _ZN4cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE .section .rodata._ZN4cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE,"aG",@progbits,_ZN4cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE,comdat .type _ZN4cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE, @gnu_unique_object .size _ZN4cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE, 1 _ZN4cuda3std3__444_GLOBAL__N__8a765d6f_11_template_cu_114808826ignoreE: .zero 1 .weak _ZN4cuda3std3__48in_placeE .section .rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat .type _ZN4cuda3std3__48in_placeE, @gnu_unique_object .size _ZN4cuda3std3__48in_placeE, 1 _ZN4cuda3std3__48in_placeE: .zero 1 .weak _ZN4cuda3std3__45__cpo4cendE .section .rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat .type _ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo4cendE, 1 _ZN4cuda3std3__45__cpo4cendE: .zero 1 .weak _ZN4cuda3std3__45__cpo6cbeginE .section .rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat .type _ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo6cbeginE, 1 _ZN4cuda3std3__45__cpo6cbeginE: .zero 1 .weak _ZN4cuda3std3__45__cpo3endE .section .rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat .type _ZN4cuda3std3__45__cpo3endE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo3endE, 1 _ZN4cuda3std3__45__cpo3endE: .zero 1 .weak _ZN4cuda3std3__45__cpo5beginE .section .rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat .type _ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object .size _ZN4cuda3std3__45__cpo5beginE, 1 _ZN4cuda3std3__45__cpo5beginE: .zero 1 .weak _ZN4cuda3std3__419piecewise_constructE .section .rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat .type _ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object .size _ZN4cuda3std3__419piecewise_constructE, 1 _ZN4cuda3std3__419piecewise_constructE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo9iter_moveE .section .rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat .type _ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1 _ZN4cuda3std6ranges3__45__cpo9iter_moveE: .zero 1 .weak _ZN4cuda3std6ranges3__45__cpo4swapE .section .rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat .type _ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object .size _ZN4cuda3std6ranges3__45__cpo4swapE, 1 _ZN4cuda3std6ranges3__45__cpo4swapE: .zero 1 .hidden DW.ref.__gxx_personality_v0 .weak DW.ref.__gxx_personality_v0 .section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat .align 8 .type DW.ref.__gxx_personality_v0, @object .size DW.ref.__gxx_personality_v0, 8 DW.ref.__gxx_personality_v0: .quad __gxx_personality_v0 .hidden __dso_handle .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */ /* 0x000e620000002100 */ /*0040*/ IMAD.WIDE.U32 R2, R2, 0x200, RZ ; /* 0x0000020002027825 */ /* 0x001fca00078e00ff */ /*0050*/ IADD3 R0, P1, R2.reuse, R9, RZ ; /* 0x0000000902007210 */ /* 0x042fe40007f3e0ff */ /*0060*/ IADD3 R8, P0, -R2, c[0x0][0x160], RZ ; /* 0x0000580002087a10 */ /* 0x000fc60007f1e1ff */ /*0070*/ IMAD.X R5, RZ, RZ, R3, P1 ; /* 0x000000ffff057224 */ /* 0x000fe200008e0603 */ /*0080*/ IADD3.X R3, ~R3, c[0x0][0x164], RZ, P0, !PT ; /* 0x0000590003037a10 */ /* 0x000fe200007fe5ff */ /*0090*/ IMAD.SHL.U32 R2, R0, 0x4, RZ ; /* 0x0000000400027824 */ /* 0x000fe200078e00ff */ /*00a0*/ ISETP.GT.U32.AND P0, PT, R8, 0x1ff, PT ; /* 0x000001ff0800780c */ /* 0x000fe40003f04070 */ /*00b0*/ SHF.L.U64.HI R0, R0, 0x2, R5 ; /* 0x0000000200007819 */ /* 0x000fe40000010205 */ /*00c0*/ ISETP.GT.AND.EX P0, PT, R3, RZ, PT, P0 ; /* 0x000000ff0300720c */ /* 0x000fe40003f04300 */ /*00d0*/ IADD3 R4, P1, R2.reuse, c[0x0][0x168], RZ ; /* 0x00005a0002047a10 */ /* 0x040fe40007f3e0ff */ /*00e0*/ IADD3 R6, P2, R2, c[0x0][0x170], RZ ; /* 0x00005c0002067a10 */ /* 0x000fc40007f5e0ff */ /*00f0*/ IADD3 R2, P3, R2, c[0x0][0x178], RZ ; /* 0x00005e0002027a10 */ /* 0x000fe40007f7e0ff */ /*0100*/ IADD3.X R5, R0.reuse, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b0000057a10 */ /* 0x040fe40000ffe4ff */ /*0110*/ IADD3.X R7, R0.reuse, c[0x0][0x174], RZ, P2, !PT ; /* 0x00005d0000077a10 */ /* 0x040fe400017fe4ff */ /*0120*/ IADD3.X R3, R0, c[0x0][0x17c], RZ, P3, !PT ; /* 0x00005f0000037a10 */ /* 0x000fe20001ffe4ff */ /*0130*/ @P0 BRA 0x270 ; /* 0x0000013000000947 */ /* 0x000fea0003800000 */ /*0140*/ IADD3 R0, R9, 0x100, RZ ; /* 0x0000010009007810 */ /* 0x000fe20007ffe0ff */ /*0150*/ BSSY B0, 0x210 ; /* 0x000000b000007945 */ /* 0x000fe20003800000 */ /*0160*/ ISETP.GT.U32.AND P0, PT, R8, R9, PT ; /* 0x000000090800720c */ /* 0x000fe40003f04070 */ /*0170*/ SHF.R.S32.HI R9, RZ, 0x1f, R8 ; /* 0x0000001fff097819 */ /* 0x000fc40000011408 */ /*0180*/ ISETP.GT.U32.AND P1, PT, R8, R0, PT ; /* 0x000000000800720c */ /* 0x000fe40003f24070 */ /*0190*/ ISETP.GT.AND.EX P0, PT, R9.reuse, RZ, PT, P0 ; /* 0x000000ff0900720c */ /* 0x040fe40003f04300 */ /*01a0*/ ISETP.GT.AND.EX P1, PT, R9, RZ, PT, P1 ; /* 0x000000ff0900720c */ /* 0x000fd60003f24310 */ /*01b0*/ @!P0 BRA 0x200 ; /* 0x0000004000008947 */ /* 0x000fea0003800000 */ /*01c0*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */ /* 0x000ea8000c1e1900 */ /*01d0*/ LDG.E R9, [R6.64] ; /* 0x0000000406097981 */ /* 0x000ea4000c1e1900 */ /*01e0*/ FADD R9, R0, R9 ; /* 0x0000000900097221 */ /* 0x004fca0000000000 */ /*01f0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0001e4000c101904 */ /*0200*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0210*/ @!P1 EXIT ; /* 0x000000000000994d */ /* 0x000fea0003800000 */ /*0220*/ LDG.E R6, [R6.64+0x400] ; /* 0x0004000406067981 */ /* 0x000ea8000c1e1900 */ /*0230*/ LDG.E R5, [R4.64+0x400] ; /* 0x0004000404057981 */ /* 0x000ea4000c1e1900 */ /*0240*/ FADD R9, R6, R5 ; /* 0x0000000506097221 */ /* 0x005fca0000000000 */ /*0250*/ STG.E [R2.64+0x400], R9 ; /* 0x0004000902007986 */ /* 0x000fe2000c101904 */ /*0260*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0270*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */ /* 0x000ea8000c1e1900 */ /*0280*/ LDG.E R9, [R6.64] ; /* 0x0000000406097981 */ /* 0x000ea4000c1e1900 */ /*0290*/ FADD R9, R0, R9 ; /* 0x0000000900097221 */ /* 0x004fca0000000000 */ /*02a0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x000fe8000c101904 */ /*02b0*/ LDG.E R0, [R6.64+0x400] ; /* 0x0004000406007981 */ /* 0x000ea8000c1e1900 */ /*02c0*/ LDG.E R11, [R4.64+0x400] ; /* 0x00040004040b7981 */ /* 0x000ea4000c1e1900 */ /*02d0*/ FADD R11, R0, R11 ; /* 0x0000000b000b7221 */ /* 0x004fca0000000000 */ /*02e0*/ STG.E [R2.64+0x400], R11 ; /* 0x0004000b02007986 */ /* 0x000fe2000c101904 */ /*02f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0300*/ BRA 0x300; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0310*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0320*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0330*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0340*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0350*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0360*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0370*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0380*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0390*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*03f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20__uninitialized_fill7functorINS7_10device_ptrIfEEfEEEEvT0_T1_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e620000002100 */ /*0040*/ IMAD.WIDE.U32 R2, R2, 0x200, RZ ; /* 0x0000020002027825 */ /* 0x001fca00078e00ff */ /*0050*/ IADD3 R4, P1, -R2.reuse, c[0x0][0x160], RZ ; /* 0x0000580002047a10 */ /* 0x040fe40007f3e1ff */ /*0060*/ IADD3 R0, P2, R2, R5, RZ ; /* 0x0000000502007210 */ /* 0x002fe40007f5e0ff */ /*0070*/ ISETP.GT.U32.AND P0, PT, R4, 0x1ff, PT ; /* 0x000001ff0400780c */ /* 0x000fe40003f04070 */ /*0080*/ IADD3.X R6, ~R3, c[0x0][0x164], RZ, P1, !PT ; /* 0x0000590003067a10 */ /* 0x000fe20000ffe5ff */ /*0090*/ IMAD.X R3, RZ, RZ, R3, P2 ; /* 0x000000ffff037224 */ /* 0x000fe200010e0603 */ /*00a0*/ LEA R2, P1, R0, c[0x0][0x168], 0x2 ; /* 0x00005a0000027a11 */ /* 0x000fe400078210ff */ /*00b0*/ ISETP.GT.U32.AND.EX P0, PT, R6, RZ, PT, P0 ; /* 0x000000ff0600720c */ /* 0x000fc40003f04100 */ /*00c0*/ LEA.HI.X R3, R0, c[0x0][0x16c], R3, 0x2, P1 ; /* 0x00005b0000037a11 */ /* 0x000fd600008f1403 */ /*00d0*/ @P0 BRA 0x1a0 ; /* 0x000000c000000947 */ /* 0x000fea0003800000 */ /*00e0*/ ISETP.GT.U32.AND P0, PT, R4, R5, PT ; /* 0x000000050400720c */ /* 0x000fe40003f04070 */ /*00f0*/ SHF.R.S32.HI R6, RZ, 0x1f, R4 ; /* 0x0000001fff067819 */ /* 0x000fe40000011404 */ /*0100*/ IADD3 R0, R5, 0x100, RZ ; /* 0x0000010005007810 */ /* 0x000fe40007ffe0ff */ /*0110*/ ISETP.GT.U32.AND.EX P0, PT, R6, RZ, PT, P0 ; /* 0x000000ff0600720c */ /* 0x000fda0003f04100 */ /*0120*/ @P0 IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff070624 */ /* 0x000fca00078e00ff */ /*0130*/ @P0 STG.E [R2.64], R7 ; /* 0x0000000702000986 */ /* 0x0001e2000c101904 */ /*0140*/ ISETP.GT.U32.AND P0, PT, R4, R0, PT ; /* 0x000000000400720c */ /* 0x000fc80003f04070 */ /*0150*/ ISETP.GT.U32.AND.EX P0, PT, R6, RZ, PT, P0 ; /* 0x000000ff0600720c */ /* 0x000fda0003f04100 */ /*0160*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0170*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff057624 */ /* 0x001fca00078e00ff */ /*0180*/ STG.E [R2.64+0x400], R5 ; /* 0x0004000502007986 */ /* 0x000fe2000c101904 */ /*0190*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01a0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff057624 */ /* 0x000fca00078e00ff */ /*01b0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe8000c101904 */ /*01c0*/ STG.E [R2.64+0x400], R5 ; /* 0x0004000502007986 */ /* 0x000fe2000c101904 */ /*01d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*01e0*/ BRA 0x1e0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0020*/ BRA 0x20; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <thrust/device_vector.h> #include <thrust/host_vector.h> float* readData(char* filename) { FILE* handle = fopen(filename, "r"); if(handle == NULL) { printf("Error opening file: %s\n", filename); exit(0); } int num, i; fscanf(handle, "%d", &num); float data[num]; for(i=0; i<num; i++) fscanf(handle, "%f", &data[i]); //printf("%f %f %f\n", data[0], data[1], data[2]); return data; } int main(int argc, char *argv[]) { float *hostInput1 = NULL; float *hostInput2 = NULL; int i; /* parse the input arguments */ //@@ Insert code here if(argc != 11) { printf("\nUsage: ./ThrustVectorAdd_Template -e <expected.raw> -i <input0.raw> , <input1.raw> -o <output.raw> -t vector\n\n"); return 0; } char* input0_filename = argv[4]; char* input1_filename = argv[6]; char* output_filename = argv[8]; // Import host input data //@@ Read data from the raw files here //@@ Insert code here hostInput1 = readData(input0_filename); hostInput2 = readData(input1_filename); // Declare and allocate host output //@@ Insert code here int num = sizeof(hostInput1)/sizeof(float); thrust::host_vector<float> hostOutput(num); // Declare and allocate thrust device input and output vectors //@@ Insert code here thrust::device_vector<float> devInput1(num); thrust::device_vector<float> devInput2(num); thrust::device_vector<float> devOutput(num); // Copy to device //@@ Insert code here thrust::copy(hostInput1, hostInput1 + num, devInput1.begin()); thrust::copy(hostInput2, hostInput2 + num, devInput2.begin()); // Execute vector addition //@@ Insert Code here //printf("dev: %f %f\n", devInput1[1], devInput2[1]); thrust::transform(devInput1.begin(), devInput1.end(), devInput2.begin(), devOutput.begin(), thrust::plus<float>()); ///////////////////////////////////////////////////////// // Copy data back to host //@@ Insert code here thrust::copy(devOutput.begin(), devOutput.end(), hostOutput.begin()); //printf("%d %d %d\n", hostOutput[1], hostOutput[2], hostOutput[0]); //Cross-verification float* verifyData = readData(output_filename); if(num != sizeof(verifyData)/sizeof(float)) printf("Size not matching: Output size: %d\tExpected size: %d\n", num, sizeof(verifyData)/sizeof(float)); else for(i=0; i<num; i++) { if((float)verifyData[i] != (float)hostOutput[i]) printf("Data not matching: Location: %d\tOutput: %f\tExpected: %f\n", i+1, hostOutput[i], verifyData[i]); } return 0; }
.text .file "template.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z8readDataPc # -- Begin function _Z8readDataPc .type _Z8readDataPc,@function _Z8readDataPc: # @_Z8readDataPc .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset %rbp, -16 movq %rsp, %rbp .cfi_def_cfa_register %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx pushq %rax .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 movq %rdi, %r14 movl $.L.str, %esi callq fopen testq %rax, %rax je .LBB0_5 # %bb.1: movq %rax, %rbx leaq -44(%rbp), %r15 movl $.L.str.2, %esi movq %rax, %rdi movq %r15, %rdx xorl %eax, %eax callq __isoc23_fscanf movq %rsp, %r12 movl (%r15), %eax movq %rsp, %r14 leaq 15(,%rax,4), %rax andq $-16, %rax subq %rax, %r14 movq %r14, %rsp cmpl $0, (%r15) jle .LBB0_4 # %bb.2: # %.lr.ph.preheader movq %r14, %r15 xorl %r13d, %r13d .LBB0_3: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl $.L.str.3, %esi movq %rbx, %rdi movq %r15, %rdx xorl %eax, %eax callq __isoc23_fscanf incq %r13 movslq -44(%rbp), %rax addq $4, %r15 cmpq %rax, %r13 jl .LBB0_3 .LBB0_4: # %._crit_edge movq %r12, %rsp movq %r14, %rax leaq -40(%rbp), %rsp popq %rbx popq %r12 popq %r13 popq %r14 popq %r15 popq %rbp .cfi_def_cfa %rsp, 8 retq .LBB0_5: .cfi_def_cfa %rbp, 16 movl $.L.str.1, %edi movq %r14, %rsi xorl %eax, %eax callq printf xorl %edi, %edi callq exit .Lfunc_end0: .size _Z8readDataPc, .Lfunc_end0-_Z8readDataPc .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .Lfunc_begin0: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception0 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $208, %rsp .cfi_def_cfa_offset 240 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 cmpl $11, %edi jne .LBB1_23 # %bb.1: movq 32(%rsi), %rdi movq 48(%rsi), %r14 movq 64(%rsi), %rbx callq _Z8readDataPc movq %rax, %r15 movq %r14, %rdi callq _Z8readDataPc movq %rax, %r14 leaq 176(%rsp), %rdi movl $2, %esi callq _ZN6thrust6detail11vector_baseIfSaIfEEC2Em .Ltmp0: leaq 80(%rsp), %rdi movl $2, %esi callq _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em .Ltmp1: # %bb.2: # %_ZN6thrust13device_vectorIfNS_16device_allocatorIfEEEC2Em.exit .Ltmp3: leaq 112(%rsp), %rdi movl $2, %esi callq _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em .Ltmp4: # %bb.3: # %_ZN6thrust13device_vectorIfNS_16device_allocatorIfEEEC2Em.exit53 .Ltmp6: leaq 48(%rsp), %rdi movl $2, %esi callq _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em .Ltmp7: # %bb.4: movq 88(%rsp), %r8 .Ltmp9: leaq 144(%rsp), %rdi leaq 47(%rsp), %rsi movl $2, %ecx movq %r15, %rdx callq _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE .Ltmp10: # %bb.5: movq 120(%rsp), %r8 .Ltmp11: leaq 144(%rsp), %rdi leaq 47(%rsp), %rsi movl $2, %ecx movq %r14, %rdx callq _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE .Ltmp12: # %bb.6: movq 104(%rsp), %rsi movq 56(%rsp), %rdx testq %rsi, %rsi je .LBB1_9 # %bb.7: # %_ZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_.exit.i.i.i.i.i movq 88(%rsp), %rax movq 120(%rsp), %rcx movq %rax, 144(%rsp) movq %rcx, 152(%rsp) movq %rdx, 160(%rsp) .Ltmp13: movups 144(%rsp), %xmm0 movups 160(%rsp), %xmm1 movups %xmm1, 16(%rsp) movups %xmm0, (%rsp) leaq 47(%rsp), %rdi callq _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l .Ltmp14: # %bb.8: # %.noexc movq 56(%rsp), %rdx .LBB1_9: movq 72(%rsp), %rcx movq 184(%rsp), %r8 .Ltmp15: leaq 144(%rsp), %rdi leaq 47(%rsp), %rsi callq _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE .Ltmp16: # %bb.10: .Ltmp18: movq %rbx, %rdi callq _Z8readDataPc .Ltmp19: # %bb.11: # %.preheader.preheader movq %rax, %rbx xorl %r14d, %r14d .LBB1_12: # %.preheader # =>This Inner Loop Header: Depth=1 movss (%rbx,%r14,4), %xmm1 # xmm1 = mem[0],zero,zero,zero movq 184(%rsp), %rax movss (%rax,%r14,4), %xmm0 # xmm0 = mem[0],zero,zero,zero ucomiss %xmm0, %xmm1 jne .LBB1_13 jnp .LBB1_14 .LBB1_13: # in Loop: Header=BB1_12 Depth=1 cvtss2sd %xmm0, %xmm0 cvtss2sd %xmm1, %xmm1 leal 1(%r14), %esi movl $.L.str.6, %edi movb $2, %al callq printf .LBB1_14: # %.preheader._crit_edge # in Loop: Header=BB1_12 Depth=1 incq %r14 cmpq $1, %r14 je .LBB1_12 # %bb.15: movq 64(%rsp), %rdx testq %rdx, %rdx je .LBB1_17 # %bb.16: movq 48(%rsp), %rax movq 56(%rsp), %rsi shlq $2, %rdx movq 8(%rax), %rdi .Ltmp30: movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Ltmp31: .LBB1_17: # %_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEED2Ev.exit movq 128(%rsp), %rdx testq %rdx, %rdx je .LBB1_19 # %bb.18: movq 112(%rsp), %rax movq 120(%rsp), %rsi shlq $2, %rdx movq 8(%rax), %rdi .Ltmp33: movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Ltmp34: .LBB1_19: # %_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEED2Ev.exit64 movq 96(%rsp), %rdx testq %rdx, %rdx je .LBB1_21 # %bb.20: movq 80(%rsp), %rax movq 88(%rsp), %rsi shlq $2, %rdx movq 8(%rax), %rdi .Ltmp36: movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Ltmp37: .LBB1_21: # %_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEED2Ev.exit65 cmpq $0, 192(%rsp) je .LBB1_24 # %bb.22: movq 184(%rsp), %rdi callq _ZdlPv jmp .LBB1_24 .LBB1_23: movl $.Lstr, %edi callq puts@PLT .LBB1_24: xorl %eax, %eax addq $208, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB1_25: .cfi_def_cfa_offset 240 .Ltmp38: jmp .LBB1_45 .LBB1_26: .Ltmp35: jmp .LBB1_45 .LBB1_27: .Ltmp32: jmp .LBB1_45 .LBB1_28: .Ltmp20: jmp .LBB1_33 .LBB1_29: .Ltmp8: movq %rax, %rbx jmp .LBB1_35 .LBB1_30: .Ltmp5: movq %rax, %rbx jmp .LBB1_37 .LBB1_31: .Ltmp2: movq %rax, %rbx jmp .LBB1_39 .LBB1_32: .Ltmp17: .LBB1_33: movq %rax, %rbx movq 64(%rsp), %rdx testq %rdx, %rdx je .LBB1_35 # %bb.34: movq 48(%rsp), %rax movq 56(%rsp), %rsi shlq $2, %rdx movq 8(%rax), %rdi .Ltmp21: movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Ltmp22: .LBB1_35: # %_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEED2Ev.exit66 movq 128(%rsp), %rdx testq %rdx, %rdx je .LBB1_37 # %bb.36: movq 112(%rsp), %rax movq 120(%rsp), %rsi shlq $2, %rdx movq 8(%rax), %rdi .Ltmp24: movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Ltmp25: .LBB1_37: # %_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEED2Ev.exit67 movq 96(%rsp), %rdx testq %rdx, %rdx je .LBB1_39 # %bb.38: movq 80(%rsp), %rax movq 88(%rsp), %rsi shlq $2, %rdx movq 8(%rax), %rdi .Ltmp27: movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Ltmp28: .LBB1_39: # %_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEED2Ev.exit68 cmpq $0, 192(%rsp) je .LBB1_41 # %bb.40: movq 184(%rsp), %rdi callq _ZdlPv .LBB1_41: # %_ZN6thrust6detail11vector_baseIfSaIfEED2Ev.exit70 movq %rbx, %rdi callq _Unwind_Resume@PLT .LBB1_42: .Ltmp29: jmp .LBB1_45 .LBB1_43: .Ltmp26: jmp .LBB1_45 .LBB1_44: .Ltmp23: .LBB1_45: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc .section .gcc_except_table,"a",@progbits .p2align 2, 0x0 GCC_except_table1: .Lexception0: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase0-.Lttbaseref0 .Lttbaseref0: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end0-.Lcst_begin0 .Lcst_begin0: .uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 << .uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 << .uleb128 .Ltmp1-.Ltmp0 # Call between .Ltmp0 and .Ltmp1 .uleb128 .Ltmp2-.Lfunc_begin0 # jumps to .Ltmp2 .byte 0 # On action: cleanup .uleb128 .Ltmp3-.Lfunc_begin0 # >> Call Site 3 << .uleb128 .Ltmp4-.Ltmp3 # Call between .Ltmp3 and .Ltmp4 .uleb128 .Ltmp5-.Lfunc_begin0 # jumps to .Ltmp5 .byte 0 # On action: cleanup .uleb128 .Ltmp6-.Lfunc_begin0 # >> Call Site 4 << .uleb128 .Ltmp7-.Ltmp6 # Call between .Ltmp6 and .Ltmp7 .uleb128 .Ltmp8-.Lfunc_begin0 # jumps to .Ltmp8 .byte 0 # On action: cleanup .uleb128 .Ltmp9-.Lfunc_begin0 # >> Call Site 5 << .uleb128 .Ltmp16-.Ltmp9 # Call between .Ltmp9 and .Ltmp16 .uleb128 .Ltmp17-.Lfunc_begin0 # jumps to .Ltmp17 .byte 0 # On action: cleanup .uleb128 .Ltmp18-.Lfunc_begin0 # >> Call Site 6 << .uleb128 .Ltmp19-.Ltmp18 # Call between .Ltmp18 and .Ltmp19 .uleb128 .Ltmp20-.Lfunc_begin0 # jumps to .Ltmp20 .byte 0 # On action: cleanup .uleb128 .Ltmp30-.Lfunc_begin0 # >> Call Site 7 << .uleb128 .Ltmp31-.Ltmp30 # Call between .Ltmp30 and .Ltmp31 .uleb128 .Ltmp32-.Lfunc_begin0 # jumps to .Ltmp32 .byte 1 # On action: 1 .uleb128 .Ltmp33-.Lfunc_begin0 # >> Call Site 8 << .uleb128 .Ltmp34-.Ltmp33 # Call between .Ltmp33 and .Ltmp34 .uleb128 .Ltmp35-.Lfunc_begin0 # jumps to .Ltmp35 .byte 1 # On action: 1 .uleb128 .Ltmp36-.Lfunc_begin0 # >> Call Site 9 << .uleb128 .Ltmp37-.Ltmp36 # Call between .Ltmp36 and .Ltmp37 .uleb128 .Ltmp38-.Lfunc_begin0 # jumps to .Ltmp38 .byte 1 # On action: 1 .uleb128 .Ltmp21-.Lfunc_begin0 # >> Call Site 10 << .uleb128 .Ltmp22-.Ltmp21 # Call between .Ltmp21 and .Ltmp22 .uleb128 .Ltmp23-.Lfunc_begin0 # jumps to .Ltmp23 .byte 1 # On action: 1 .uleb128 .Ltmp24-.Lfunc_begin0 # >> Call Site 11 << .uleb128 .Ltmp25-.Ltmp24 # Call between .Ltmp24 and .Ltmp25 .uleb128 .Ltmp26-.Lfunc_begin0 # jumps to .Ltmp26 .byte 1 # On action: 1 .uleb128 .Ltmp27-.Lfunc_begin0 # >> Call Site 12 << .uleb128 .Ltmp28-.Ltmp27 # Call between .Ltmp27 and .Ltmp28 .uleb128 .Ltmp29-.Lfunc_begin0 # jumps to .Ltmp29 .byte 1 # On action: 1 .uleb128 .Ltmp28-.Lfunc_begin0 # >> Call Site 13 << .uleb128 .Lfunc_end1-.Ltmp28 # Call between .Ltmp28 and .Lfunc_end1 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end0: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase0: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6detail11vector_baseIfSaIfEEC2Em,"axG",@progbits,_ZN6thrust6detail11vector_baseIfSaIfEEC2Em,comdat .weak _ZN6thrust6detail11vector_baseIfSaIfEEC2Em # -- Begin function _ZN6thrust6detail11vector_baseIfSaIfEEC2Em .p2align 1, 0x90 .type _ZN6thrust6detail11vector_baseIfSaIfEEC2Em,@function _ZN6thrust6detail11vector_baseIfSaIfEEC2Em: # @_ZN6thrust6detail11vector_baseIfSaIfEEC2Em .Lfunc_begin1: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception1 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 xorps %xmm0, %xmm0 movups %xmm0, 8(%rdi) movq $0, 24(%rdi) testq %rsi, %rsi je .LBB2_3 # %bb.1: # %_ZN6thrust6detail18contiguous_storageIfSaIfEE19default_construct_nENS0_15normal_iteratorIPfEEm.exit.i .Ltmp39: movq %rsi, %rbx movq %rdi, %r14 leaq 8(%rdi), %r15 xorl %edx, %edx callq _ZNSt15__new_allocatorIfE8allocateEmPKv .Ltmp40: # %bb.2: # %.noexc movq %rax, 8(%r14) movq %rbx, 16(%r14) movq %rbx, 24(%r14) shlq $2, %rbx movq %rax, %rdi xorl %esi, %esi movq %rbx, %rdx popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp memset@PLT # TAILCALL .LBB2_3: # %_ZN6thrust6detail11vector_baseIfSaIfEE12default_initEm.exit .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB2_4: .cfi_def_cfa_offset 32 .Ltmp41: movq %rax, %rbx cmpq $0, 16(%r14) je .LBB2_6 # %bb.5: movq (%r15), %rdi callq _ZdlPv xorps %xmm0, %xmm0 movups %xmm0, (%r15) .LBB2_6: # %_ZN6thrust6detail18contiguous_storageIfSaIfEED2Ev.exit movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end2: .size _ZN6thrust6detail11vector_baseIfSaIfEEC2Em, .Lfunc_end2-_ZN6thrust6detail11vector_baseIfSaIfEEC2Em .cfi_endproc .section .gcc_except_table._ZN6thrust6detail11vector_baseIfSaIfEEC2Em,"aG",@progbits,_ZN6thrust6detail11vector_baseIfSaIfEEC2Em,comdat .p2align 2, 0x0 GCC_except_table2: .Lexception1: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end1-.Lcst_begin1 .Lcst_begin1: .uleb128 .Ltmp39-.Lfunc_begin1 # >> Call Site 1 << .uleb128 .Ltmp40-.Ltmp39 # Call between .Ltmp39 and .Ltmp40 .uleb128 .Ltmp41-.Lfunc_begin1 # jumps to .Ltmp41 .byte 0 # On action: cleanup .uleb128 .Ltmp40-.Lfunc_begin1 # >> Call Site 2 << .uleb128 .Lfunc_end2-.Ltmp40 # Call between .Ltmp40 and .Lfunc_end2 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end1: .p2align 2, 0x0 # -- End function .section .text._ZNSt15__new_allocatorIfE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIfE8allocateEmPKv,comdat .weak _ZNSt15__new_allocatorIfE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIfE8allocateEmPKv .p2align 1, 0x90 .type _ZNSt15__new_allocatorIfE8allocateEmPKv,@function _ZNSt15__new_allocatorIfE8allocateEmPKv: # @_ZNSt15__new_allocatorIfE8allocateEmPKv .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movq %rsi, %rax shrq $61, %rax jne .LBB3_1 # %bb.3: shlq $2, %rsi movq %rsi, %rdi popq %rax .cfi_def_cfa_offset 8 jmp _Znwm # TAILCALL .LBB3_1: .cfi_def_cfa_offset 16 shrq $62, %rsi je .LBB3_2 # %bb.4: callq _ZSt28__throw_bad_array_new_lengthv .LBB3_2: callq _ZSt17__throw_bad_allocv .Lfunc_end3: .size _ZNSt15__new_allocatorIfE8allocateEmPKv, .Lfunc_end3-_ZNSt15__new_allocatorIfE8allocateEmPKv .cfi_endproc # -- End function .section .text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat .hidden __clang_call_terminate # -- Begin function __clang_call_terminate .weak __clang_call_terminate .type __clang_call_terminate,@function __clang_call_terminate: # @__clang_call_terminate .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 callq __cxa_begin_catch callq _ZSt9terminatev .Lfunc_end4: .size __clang_call_terminate, .Lfunc_end4-__clang_call_terminate .cfi_endproc # -- End function .section .text._ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em,"axG",@progbits,_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em,comdat .weak _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em # -- Begin function _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em .p2align 1, 0x90 .type _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em,@function _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em: # @_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em .Lfunc_begin2: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception2 # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rsi, %r14 movq %rdi, %rbx callq _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v movq %rax, (%rbx) xorps %xmm0, %xmm0 movups %xmm0, 8(%rbx) movq $0, 24(%rbx) .Ltmp42: movq %rbx, %rdi movq %r14, %rsi callq _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm .Ltmp43: # %bb.1: addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .LBB5_3: .cfi_def_cfa_offset 32 .Ltmp44: movq %rax, %r14 .Ltmp45: movq %rbx, %rdi callq _ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv .Ltmp46: # %bb.4: # %_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEED2Ev.exit movq %r14, %rdi callq _Unwind_Resume@PLT .LBB5_2: .Ltmp47: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end5: .size _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em, .Lfunc_end5-_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em .cfi_endproc .section .gcc_except_table._ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em,"aG",@progbits,_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEEC2Em,comdat .p2align 2, 0x0 GCC_except_table5: .Lexception2: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase1-.Lttbaseref1 .Lttbaseref1: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end2-.Lcst_begin2 .Lcst_begin2: .uleb128 .Lfunc_begin2-.Lfunc_begin2 # >> Call Site 1 << .uleb128 .Ltmp42-.Lfunc_begin2 # Call between .Lfunc_begin2 and .Ltmp42 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp42-.Lfunc_begin2 # >> Call Site 2 << .uleb128 .Ltmp43-.Ltmp42 # Call between .Ltmp42 and .Ltmp43 .uleb128 .Ltmp44-.Lfunc_begin2 # jumps to .Ltmp44 .byte 0 # On action: cleanup .uleb128 .Ltmp45-.Lfunc_begin2 # >> Call Site 3 << .uleb128 .Ltmp46-.Ltmp45 # Call between .Ltmp45 and .Ltmp46 .uleb128 .Ltmp47-.Lfunc_begin2 # jumps to .Ltmp47 .byte 1 # On action: 1 .uleb128 .Ltmp46-.Lfunc_begin2 # >> Call Site 4 << .uleb128 .Lfunc_end5-.Ltmp46 # Call between .Ltmp46 and .Lfunc_end5 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end2: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase1: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm,"axG",@progbits,_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm,comdat .weak _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm # -- Begin function _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm .p2align 1, 0x90 .type _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm,@function _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm: # @_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm .cfi_startproc # %bb.0: testq %rsi, %rsi je .LBB6_2 # %bb.1: # %_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE19default_construct_nENS0_15normal_iteratorINS_10device_ptrIfEEEEm.exit pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rsi, %rbx movq %rdi, %r14 movq (%rdi), %rax leaq (,%rsi,4), %rsi movq 8(%rax), %rdi movl $4, %edx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm movq %rax, 8(%r14) movq %rbx, 16(%r14) movq %rbx, 24(%r14) leaq 7(%rsp), %rdi xorps %xmm0, %xmm0 movq %rax, %rsi movq %rbx, %rdx callq _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 .cfi_restore %rbx .cfi_restore %r14 .LBB6_2: retq .Lfunc_end6: .size _ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm, .Lfunc_end6-_ZN6thrust6detail11vector_baseIfNS_16device_allocatorIfEEE12default_initEm .cfi_endproc # -- End function .section .text._ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,"axG",@progbits,_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,comdat .weak _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v # -- Begin function _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v .type _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v,@function _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v: # @_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v .cfi_startproc # %bb.0: movb _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource(%rip), %al testb %al, %al je .LBB7_1 .LBB7_4: movl $_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %eax retq .LBB7_1: pushq %rax .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB7_3 # %bb.2: movq $_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE+16, _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource(%rip) callq _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v movq %rax, _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource+8(%rip) movl $_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, %edi callq __cxa_guard_release .LBB7_3: addq $8, %rsp .cfi_def_cfa_offset 8 jmp .LBB7_4 .Lfunc_end7: .size _ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v, .Lfunc_end7-_ZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_v .cfi_endproc # -- End function .section .text._ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,"axG",@progbits,_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,comdat .weak _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev # -- Begin function _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev .p2align 1, 0x90 .type _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev,@function _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev: # @_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev .cfi_startproc # %bb.0: retq .Lfunc_end8: .size _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev, .Lfunc_end8-_ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev .cfi_endproc # -- End function .section .text._ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,"axG",@progbits,_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,comdat .weak _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v # -- Begin function _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v .type _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v,@function _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v: # @_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v .cfi_startproc # %bb.0: movb _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource(%rip), %al testb %al, %al je .LBB9_1 .LBB9_4: movl $_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %eax retq .LBB9_1: pushq %rax .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB9_3 # %bb.2: movl $_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, %edi callq __cxa_guard_release .LBB9_3: addq $8, %rsp .cfi_def_cfa_offset 8 jmp .LBB9_4 .Lfunc_end9: .size _ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v, .Lfunc_end9-_ZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_v .cfi_endproc # -- End function .section .text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,comdat .weak _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev .p2align 1, 0x90 .type _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev,@function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end10: .size _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev, .Lfunc_end10-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev .cfi_endproc # -- End function .section .text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,comdat .weak _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm .p2align 1, 0x90 .type _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm,@function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm .cfi_startproc # %bb.0: movq 8(%rdi), %rdi jmp _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm # TAILCALL .Lfunc_end11: .size _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm, .Lfunc_end11-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm .cfi_endproc # -- End function .section .text._ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,"axG",@progbits,_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,comdat .weak _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm # -- Begin function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm .p2align 1, 0x90 .type _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm,@function _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm: # @_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm .cfi_startproc # %bb.0: movq 8(%rdi), %rdi jmp _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm # TAILCALL .Lfunc_end12: .size _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm, .Lfunc_end12-_ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm .cfi_endproc # -- End function .section .text._ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,"axG",@progbits,_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,comdat .weak _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ # -- Begin function _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ .p2align 1, 0x90 .type _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_,@function _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_: # @_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ .cfi_startproc # %bb.0: cmpq %rsi, %rdi sete %al retq .Lfunc_end13: .size _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_, .Lfunc_end13-_ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ .cfi_endproc # -- End function .section .text._ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,"axG",@progbits,_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,comdat .weak _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev # -- Begin function _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev .p2align 1, 0x90 .type _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev,@function _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev: # @_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev .cfi_startproc # %bb.0: retq .Lfunc_end14: .size _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev, .Lfunc_end14-_ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,comdat .weak _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev .p2align 1, 0x90 .type _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev,@function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end15: .size _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev, .Lfunc_end15-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,comdat .weak _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm .p2align 1, 0x90 .type _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,@function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm .Lfunc_begin3: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception3 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $80, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 leaq 8(%rsp), %rdi callq hipMalloc testl %eax, %eax jne .LBB16_1 # %bb.16: movq 8(%rsp), %rax addq $80, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB16_1: .cfi_def_cfa_offset 112 movl %eax, %ebp callq hipGetLastError movl $40, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp48: callq _ZN6thrust6system12hip_categoryEv .Ltmp49: # %bb.2: movq (%rax), %rcx .Ltmp50: leaq 16(%rsp), %rdi movq %rax, %rsi movl %ebp, %edx callq *48(%rcx) .Ltmp51: # %bb.3: movq 16(%rsp), %rsi .Ltmp53: leaq 48(%rsp), %rdi leaq 7(%rsp), %rdx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .Ltmp54: # %bb.4: movb $1, %bpl .Ltmp56: leaq 48(%rsp), %rsi movq %rbx, %rdi callq _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .Ltmp57: # %bb.5: xorl %ebp, %ebp .Ltmp58: movl $_ZTIN6thrust6system6detail9bad_allocE, %esi movl $_ZN6thrust6system6detail9bad_allocD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .Ltmp59: # %bb.17: .LBB16_7: .Ltmp60: movq %rax, %r14 leaq 64(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB16_9 # %bb.8: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB16_9: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit leaq 32(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB16_11 # %bb.10: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15 callq _ZdlPv .LBB16_11: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15 testb %bpl, %bpl jne .LBB16_14 jmp .LBB16_15 .LBB16_12: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.thread .Ltmp55: movq %rax, %r14 leaq 32(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB16_14 # %bb.13: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15.thread26 callq _ZdlPv jmp .LBB16_14 .LBB16_6: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit15.thread .Ltmp52: movq %rax, %r14 .LBB16_14: movq %rbx, %rdi callq __cxa_free_exception .LBB16_15: movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end16: .size _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm, .Lfunc_end16-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm .cfi_endproc .section .gcc_except_table._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,"aG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm,comdat .p2align 2, 0x0 GCC_except_table16: .Lexception3: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end3-.Lcst_begin3 .Lcst_begin3: .uleb128 .Lfunc_begin3-.Lfunc_begin3 # >> Call Site 1 << .uleb128 .Ltmp48-.Lfunc_begin3 # Call between .Lfunc_begin3 and .Ltmp48 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp48-.Lfunc_begin3 # >> Call Site 2 << .uleb128 .Ltmp51-.Ltmp48 # Call between .Ltmp48 and .Ltmp51 .uleb128 .Ltmp52-.Lfunc_begin3 # jumps to .Ltmp52 .byte 0 # On action: cleanup .uleb128 .Ltmp53-.Lfunc_begin3 # >> Call Site 3 << .uleb128 .Ltmp54-.Ltmp53 # Call between .Ltmp53 and .Ltmp54 .uleb128 .Ltmp55-.Lfunc_begin3 # jumps to .Ltmp55 .byte 0 # On action: cleanup .uleb128 .Ltmp56-.Lfunc_begin3 # >> Call Site 4 << .uleb128 .Ltmp59-.Ltmp56 # Call between .Ltmp56 and .Ltmp59 .uleb128 .Ltmp60-.Lfunc_begin3 # jumps to .Ltmp60 .byte 0 # On action: cleanup .uleb128 .Ltmp59-.Lfunc_begin3 # >> Call Site 5 << .uleb128 .Lfunc_end16-.Ltmp59 # Call between .Ltmp59 and .Lfunc_end16 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end3: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,"axG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,comdat .weak _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm # -- Begin function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .p2align 1, 0x90 .type _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,@function _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm: # @_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .Lfunc_begin4: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception4 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %rsi, %rdi callq hipFree testl %eax, %eax jne .LBB17_1 # %bb.5: popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB17_1: .cfi_def_cfa_offset 32 movl %eax, %ebp callq hipGetLastError movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp61: callq _ZN6thrust6system12hip_categoryEv .Ltmp62: # %bb.2: .Ltmp63: movl $.L.str.16, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp64: # %bb.3: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB17_4: .Ltmp65: movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end17: .size _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm, .Lfunc_end17-_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .cfi_endproc .section .gcc_except_table._ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,"aG",@progbits,_ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm,comdat .p2align 2, 0x0 GCC_except_table17: .Lexception4: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end4-.Lcst_begin4 .Lcst_begin4: .uleb128 .Lfunc_begin4-.Lfunc_begin4 # >> Call Site 1 << .uleb128 .Ltmp61-.Lfunc_begin4 # Call between .Lfunc_begin4 and .Ltmp61 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp61-.Lfunc_begin4 # >> Call Site 2 << .uleb128 .Ltmp64-.Ltmp61 # Call between .Ltmp61 and .Ltmp64 .uleb128 .Ltmp65-.Lfunc_begin4 # jumps to .Ltmp65 .byte 0 # On action: cleanup .uleb128 .Ltmp64-.Lfunc_begin4 # >> Call Site 3 << .uleb128 .Lfunc_end17-.Ltmp64 # Call between .Ltmp64 and .Lfunc_end17 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end4: .p2align 2, 0x0 # -- End function .section .text._ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,"axG",@progbits,_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,comdat .weak _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ # -- Begin function _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ .p2align 1, 0x90 .type _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_,@function _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_: # @_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ .cfi_startproc # %bb.0: cmpq %rsi, %rdi sete %al retq .Lfunc_end18: .size _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_, .Lfunc_end18-_ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ .cfi_endproc # -- End function .section .text._ZN6thrust6system12hip_categoryEv,"axG",@progbits,_ZN6thrust6system12hip_categoryEv,comdat .weak _ZN6thrust6system12hip_categoryEv # -- Begin function _ZN6thrust6system12hip_categoryEv .type _ZN6thrust6system12hip_categoryEv,@function _ZN6thrust6system12hip_categoryEv: # @_ZN6thrust6system12hip_categoryEv .cfi_startproc # %bb.0: movb _ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al testb %al, %al je .LBB19_1 .LBB19_4: movl $_ZZN6thrust6system12hip_categoryEvE6result, %eax retq .LBB19_1: pushq %rax .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust6system12hip_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB19_3 # %bb.2: movq $_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system12hip_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system12hip_categoryEvE6result, %edi callq __cxa_guard_release .LBB19_3: addq $8, %rsp .cfi_def_cfa_offset 8 jmp .LBB19_4 .Lfunc_end19: .size _ZN6thrust6system12hip_categoryEv, .Lfunc_end19-_ZN6thrust6system12hip_categoryEv .cfi_endproc # -- End function .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .p2align 1, 0x90 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 leaq 16(%rdi), %rax movq %rax, (%rdi) testq %rsi, %rsi je .LBB20_1 # %bb.2: movq %rsi, %rbx movq %rdi, %r14 movq %rsi, %rdi callq strlen leaq (%rax,%rbx), %rdx movq %r14, %rdi movq %rbx, %rsi addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL .LBB20_1: .cfi_def_cfa_offset 32 movl $.L.str.15, %edi callq _ZSt19__throw_logic_errorPKc .Lfunc_end20: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end20-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ .cfi_endproc # -- End function .section .text._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"axG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat .weak _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .p2align 1, 0x90 .type _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .Lfunc_begin5: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception5 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 pushq %rax .cfi_def_cfa_offset 64 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rsi, %r15 movq %rdi, %rbx movq $_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi) leaq 8(%rdi), %r14 leaq 24(%rdi), %rbp movq %rbp, 8(%rdi) movq $0, 16(%rdi) movb $0, 24(%rdi) callq _ZNKSt9bad_alloc4whatEv movq %rax, %r12 movq 16(%rbx), %r13 movq %rax, %rdi callq strlen .Ltmp66: movq %r14, %rdi xorl %esi, %esi movq %r13, %rdx movq %r12, %rcx movq %rax, %r8 callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm .Ltmp67: # %bb.1: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit .Ltmp68: movl $.L.str.13, %esi movq %r14, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc .Ltmp69: # %bb.2: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit movq (%r15), %rsi movq 8(%r15), %rdx .Ltmp70: movq %r14, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp71: # %bb.3: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit addq $8, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB21_4: .cfi_def_cfa_offset 64 .Ltmp72: movq %rax, %r15 movq (%r14), %rdi cmpq %rbp, %rdi je .LBB21_6 # %bb.5: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB21_6: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq %rbx, %rdi callq _ZNSt9bad_allocD2Ev movq %r15, %rdi callq _Unwind_Resume@PLT .Lfunc_end21: .size _ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end21-_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE .cfi_endproc .section .gcc_except_table._ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,"aG",@progbits,_ZN6thrust6system6detail9bad_allocC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,comdat .p2align 2, 0x0 GCC_except_table21: .Lexception5: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end5-.Lcst_begin5 .Lcst_begin5: .uleb128 .Ltmp66-.Lfunc_begin5 # >> Call Site 1 << .uleb128 .Ltmp71-.Ltmp66 # Call between .Ltmp66 and .Ltmp71 .uleb128 .Ltmp72-.Lfunc_begin5 # jumps to .Ltmp72 .byte 0 # On action: cleanup .uleb128 .Ltmp71-.Lfunc_begin5 # >> Call Site 2 << .uleb128 .Lfunc_end21-.Ltmp71 # Call between .Ltmp71 and .Lfunc_end21 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end5: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6system6detail9bad_allocD2Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD2Ev,comdat .weak _ZN6thrust6system6detail9bad_allocD2Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD2Ev .p2align 1, 0x90 .type _ZN6thrust6system6detail9bad_allocD2Ev,@function _ZN6thrust6system6detail9bad_allocD2Ev: # @_ZN6thrust6system6detail9bad_allocD2Ev .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq $_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi) movq 8(%rdi), %rdi leaq 24(%rbx), %rax cmpq %rax, %rdi je .LBB22_2 # %bb.1: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB22_2: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZNSt9bad_allocD2Ev # TAILCALL .Lfunc_end22: .size _ZN6thrust6system6detail9bad_allocD2Ev, .Lfunc_end22-_ZN6thrust6system6detail9bad_allocD2Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system14error_categoryD2Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD2Ev,comdat .weak _ZN6thrust6system14error_categoryD2Ev # -- Begin function _ZN6thrust6system14error_categoryD2Ev .p2align 1, 0x90 .type _ZN6thrust6system14error_categoryD2Ev,@function _ZN6thrust6system14error_categoryD2Ev: # @_ZN6thrust6system14error_categoryD2Ev .cfi_startproc # %bb.0: movq $_ZTVN6thrust6system14error_categoryE+16, (%rdi) retq .Lfunc_end23: .size _ZN6thrust6system14error_categoryD2Ev, .Lfunc_end23-_ZN6thrust6system14error_categoryD2Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,comdat .weak _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev # -- Begin function _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev .p2align 1, 0x90 .type _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev,@function _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev: # @_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end24: .size _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev, .Lfunc_end24-_ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,comdat .weak _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv .p2align 1, 0x90 .type _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv,@function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv .cfi_startproc # %bb.0: movl $.L.str.7, %eax retq .Lfunc_end25: .size _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv, .Lfunc_end25-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv .cfi_endproc # -- End function .section .text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,comdat .weak _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi .p2align 1, 0x90 .type _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi,@function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl %esi, %ebx cmpl $50, %esi jg .LBB26_5 # %bb.1: movb _ZGVZN6thrust6system12hip_categoryEvE6result(%rip), %al testb %al, %al je .LBB26_2 .LBB26_4: # %_ZN6thrust6system20make_error_conditionENS0_11hip_rocprim4errc6errc_tE.exit movl $_ZZN6thrust6system12hip_categoryEvE6result, %edx movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 retq .LBB26_5: .cfi_def_cfa_offset 16 movb _ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al testb %al, %al je .LBB26_6 .LBB26_8: # %_ZN6thrust6system15system_categoryEv.exit movq _ZZN6thrust6system15system_categoryEvE6result(%rip), %rax movq 24(%rax), %rax movl $_ZZN6thrust6system15system_categoryEvE6result, %edi movl %ebx, %esi popq %rbx .cfi_def_cfa_offset 8 jmpq *%rax # TAILCALL .LBB26_2: .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust6system12hip_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB26_4 # %bb.3: movq $_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE+16, _ZZN6thrust6system12hip_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system12hip_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system12hip_categoryEvE6result, %edi callq __cxa_guard_release jmp .LBB26_4 .LBB26_6: movl $_ZGVZN6thrust6system15system_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB26_8 # %bb.7: movq $_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system15system_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system15system_categoryEvE6result, %edi callq __cxa_guard_release jmp .LBB26_8 .Lfunc_end26: .size _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi, .Lfunc_end26-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi .cfi_endproc # -- End function .section .text._ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,comdat .weak _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE # -- Begin function _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .p2align 1, 0x90 .type _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE,@function _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE: # @_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdx, %rbx movq (%rdi), %rax callq *24(%rax) cmpq 8(%rbx), %rdx sete %cl cmpl (%rbx), %eax sete %al andb %cl, %al popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end27: .size _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE, .Lfunc_end27-_ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .cfi_endproc # -- End function .section .text._ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,"axG",@progbits,_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,comdat .weak _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi # -- Begin function _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .p2align 1, 0x90 .type _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi,@function _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi: # @_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .cfi_startproc # %bb.0: cmpq %rdi, 8(%rsi) sete %cl cmpl %edx, (%rsi) sete %al andb %cl, %al retq .Lfunc_end28: .size _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi, .Lfunc_end28-_ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .cfi_endproc # -- End function .section .text._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat .weak _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei .p2align 1, 0x90 .type _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,@function _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei .Lfunc_begin6: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception6 # %bb.0: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $72, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %edx, %ebp movq %rdi, %rbx movl %edx, %edi callq hipGetErrorString movq %rax, %r15 movl %ebp, %edi callq hipGetErrorName testq %rax, %rax movl $.L.str.12, %r14d cmovneq %rax, %r14 leaq 24(%rsp), %rax movq %rax, -16(%rax) movq %r14, %rdi callq strlen leaq (%rax,%r14), %rdx leaq 8(%rsp), %r12 movq %r12, %rdi movq %r14, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .Ltmp73: movl $.L.str.13, %esi movq %r12, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc .Ltmp74: # %bb.1: # %.noexc movq %rax, %r12 leaq 56(%rsp), %r14 movq %r14, -16(%r14) movq (%rax), %rsi movq %rax, %rbp addq $16, %rbp cmpq %rbp, %rsi je .LBB29_2 # %bb.3: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i movq %rsi, 40(%rsp) movq 16(%r12), %rax movq %rax, 56(%rsp) movq 8(%r12), %r13 jmp .LBB29_4 .LBB29_2: movq 8(%r12), %r13 leaq 1(%r13), %rdx movq %r14, %rdi callq memcpy@PLT .LBB29_4: leaq 40(%rsp), %rdi movq %r13, 8(%rdi) movq %rbp, (%r12) movq $0, 8(%r12) movb $0, 16(%r12) testq %r15, %r15 movl $.L.str.11, %esi cmovneq %r15, %rsi .Ltmp76: callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc .Ltmp77: # %bb.5: # %.noexc16 movq %rax, %r15 leaq 16(%rbx), %rdi movq %rdi, (%rbx) movq (%rax), %rsi movq %rax, %r12 addq $16, %r12 cmpq %r12, %rsi je .LBB29_6 # %bb.7: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i13 movq %rsi, (%rbx) movq 16(%r15), %rax movq %rax, 16(%rbx) movq 8(%r15), %r13 jmp .LBB29_8 .LBB29_6: movq 8(%r15), %r13 leaq 1(%r13), %rdx callq memcpy@PLT .LBB29_8: movq %r13, 8(%rbx) movq %r12, (%r15) movq $0, 8(%r15) movb $0, 16(%r15) movq 40(%rsp), %rdi cmpq %r14, %rdi je .LBB29_10 # %bb.9: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i18 callq _ZdlPv .LBB29_10: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq 8(%rsp), %rdi leaq 24(%rsp), %rax cmpq %rax, %rdi je .LBB29_12 # %bb.11: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i19 callq _ZdlPv .LBB29_12: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit21 movq %rbx, %rax addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB29_14: .cfi_def_cfa_offset 128 .Ltmp78: movq %rax, %rbx movq 40(%rsp), %rdi cmpq %r14, %rdi je .LBB29_16 # %bb.15: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i22 callq _ZdlPv jmp .LBB29_16 .LBB29_13: .Ltmp75: movq %rax, %rbx .LBB29_16: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit24 movq 8(%rsp), %rdi leaq 24(%rsp), %rax cmpq %rax, %rdi je .LBB29_18 # %bb.17: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i25 callq _ZdlPv .LBB29_18: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit27 movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end29: .size _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei, .Lfunc_end29-_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei .cfi_endproc .section .gcc_except_table._ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei,comdat .p2align 2, 0x0 GCC_except_table29: .Lexception6: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end6-.Lcst_begin6 .Lcst_begin6: .uleb128 .Lfunc_begin6-.Lfunc_begin6 # >> Call Site 1 << .uleb128 .Ltmp73-.Lfunc_begin6 # Call between .Lfunc_begin6 and .Ltmp73 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp73-.Lfunc_begin6 # >> Call Site 2 << .uleb128 .Ltmp74-.Ltmp73 # Call between .Ltmp73 and .Ltmp74 .uleb128 .Ltmp75-.Lfunc_begin6 # jumps to .Ltmp75 .byte 0 # On action: cleanup .uleb128 .Ltmp74-.Lfunc_begin6 # >> Call Site 3 << .uleb128 .Ltmp76-.Ltmp74 # Call between .Ltmp74 and .Ltmp76 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp76-.Lfunc_begin6 # >> Call Site 4 << .uleb128 .Ltmp77-.Ltmp76 # Call between .Ltmp76 and .Ltmp77 .uleb128 .Ltmp78-.Lfunc_begin6 # jumps to .Ltmp78 .byte 0 # On action: cleanup .uleb128 .Ltmp77-.Lfunc_begin6 # >> Call Site 5 << .uleb128 .Lfunc_end29-.Ltmp77 # Call between .Ltmp77 and .Lfunc_end29 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end6: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust6system14error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system14error_categoryD0Ev,comdat .weak _ZN6thrust6system14error_categoryD0Ev # -- Begin function _ZN6thrust6system14error_categoryD0Ev .p2align 1, 0x90 .type _ZN6thrust6system14error_categoryD0Ev,@function _ZN6thrust6system14error_categoryD0Ev: # @_ZN6thrust6system14error_categoryD0Ev .cfi_startproc # %bb.0: ud2 .Lfunc_end30: .size _ZN6thrust6system14error_categoryD0Ev, .Lfunc_end30-_ZN6thrust6system14error_categoryD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system14error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system14error_category23default_error_conditionEi,comdat .weak _ZNK6thrust6system14error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system14error_category23default_error_conditionEi .p2align 1, 0x90 .type _ZNK6thrust6system14error_category23default_error_conditionEi,@function _ZNK6thrust6system14error_category23default_error_conditionEi: # @_ZNK6thrust6system14error_category23default_error_conditionEi .cfi_startproc # %bb.0: movl %esi, %eax movq %rdi, %rdx retq .Lfunc_end31: .size _ZNK6thrust6system14error_category23default_error_conditionEi, .Lfunc_end31-_ZNK6thrust6system14error_category23default_error_conditionEi .cfi_endproc # -- End function .section .text._ZN6thrust6system15system_categoryEv,"axG",@progbits,_ZN6thrust6system15system_categoryEv,comdat .weak _ZN6thrust6system15system_categoryEv # -- Begin function _ZN6thrust6system15system_categoryEv .type _ZN6thrust6system15system_categoryEv,@function _ZN6thrust6system15system_categoryEv: # @_ZN6thrust6system15system_categoryEv .cfi_startproc # %bb.0: movb _ZGVZN6thrust6system15system_categoryEvE6result(%rip), %al testb %al, %al je .LBB32_1 .LBB32_4: movl $_ZZN6thrust6system15system_categoryEvE6result, %eax retq .LBB32_1: pushq %rax .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust6system15system_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB32_3 # %bb.2: movq $_ZTVN6thrust6system6detail21system_error_categoryE+16, _ZZN6thrust6system15system_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system15system_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system15system_categoryEvE6result, %edi callq __cxa_guard_release .LBB32_3: addq $8, %rsp .cfi_def_cfa_offset 8 jmp .LBB32_4 .Lfunc_end32: .size _ZN6thrust6system15system_categoryEv, .Lfunc_end32-_ZN6thrust6system15system_categoryEv .cfi_endproc # -- End function .section .text._ZN6thrust6system6detail21system_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail21system_error_categoryD0Ev,comdat .weak _ZN6thrust6system6detail21system_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail21system_error_categoryD0Ev .p2align 1, 0x90 .type _ZN6thrust6system6detail21system_error_categoryD0Ev,@function _ZN6thrust6system6detail21system_error_categoryD0Ev: # @_ZN6thrust6system6detail21system_error_categoryD0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end33: .size _ZN6thrust6system6detail21system_error_categoryD0Ev, .Lfunc_end33-_ZN6thrust6system6detail21system_error_categoryD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail21system_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category4nameEv,comdat .weak _ZNK6thrust6system6detail21system_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail21system_error_category4nameEv .p2align 1, 0x90 .type _ZNK6thrust6system6detail21system_error_category4nameEv,@function _ZNK6thrust6system6detail21system_error_category4nameEv: # @_ZNK6thrust6system6detail21system_error_category4nameEv .cfi_startproc # %bb.0: movl $.L.str.8, %eax retq .Lfunc_end34: .size _ZNK6thrust6system6detail21system_error_category4nameEv, .Lfunc_end34-_ZNK6thrust6system6detail21system_error_category4nameEv .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat .weak _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi # -- Begin function _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi .p2align 1, 0x90 .type _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,@function _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi: # @_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl %esi, %ebx leal -9901(%rbx), %eax cmpl $78, %eax ja .LBB35_81 # %bb.1: jmpq *.LJTI35_0(,%rax,8) .LBB35_2: movl $9901, %edi # imm = 0x26AD jmp .LBB35_3 .LBB35_77: movl $9979, %edi # imm = 0x26FB jmp .LBB35_3 .LBB35_33: movl $9961, %edi # imm = 0x26E9 jmp .LBB35_3 .LBB35_50: movl $9968, %edi # imm = 0x26F0 jmp .LBB35_3 .LBB35_67: movl $9974, %edi # imm = 0x26F6 jmp .LBB35_3 .LBB35_75: movl $9977, %edi # imm = 0x26F9 jmp .LBB35_3 .LBB35_28: movl $9945, %edi # imm = 0x26D9 jmp .LBB35_3 .LBB35_19: movl $9952, %edi # imm = 0x26E0 jmp .LBB35_3 .LBB35_29: movl $9958, %edi # imm = 0x26E6 jmp .LBB35_3 .LBB35_22: movl $9955, %edi # imm = 0x26E3 jmp .LBB35_3 .LBB35_17: movl $9951, %edi # imm = 0x26DF jmp .LBB35_3 .LBB35_66: movl $9933, %edi # imm = 0x26CD jmp .LBB35_3 .LBB35_80: movl $9941, %edi # imm = 0x26D5 jmp .LBB35_3 .LBB35_59: movl $9928, %edi # imm = 0x26C8 jmp .LBB35_3 .LBB35_79: movl $9940, %edi # imm = 0x26D4 jmp .LBB35_3 .LBB35_74: movl $9938, %edi # imm = 0x26D2 jmp .LBB35_3 .LBB35_58: movl $9927, %edi # imm = 0x26C7 jmp .LBB35_3 .LBB35_45: movl $9921, %edi # imm = 0x26C1 jmp .LBB35_3 .LBB35_68: movl $9975, %edi # imm = 0x26F7 jmp .LBB35_3 .LBB35_7: movl $9946, %edi # imm = 0x26DA jmp .LBB35_3 .LBB35_39: movl $9917, %edi # imm = 0x26BD jmp .LBB35_3 .LBB35_48: movl $9966, %edi # imm = 0x26EE jmp .LBB35_3 .LBB35_71: movl $9934, %edi # imm = 0x26CE jmp .LBB35_3 .LBB35_13: movl $9906, %edi # imm = 0x26B2 jmp .LBB35_3 .LBB35_43: movl $9919, %edi # imm = 0x26BF jmp .LBB35_3 .LBB35_47: movl $9922, %edi # imm = 0x26C2 jmp .LBB35_3 .LBB35_25: movl $9942, %edi # imm = 0x26D6 jmp .LBB35_3 .LBB35_57: movl $9926, %edi # imm = 0x26C6 jmp .LBB35_3 .LBB35_61: movl $9929, %edi # imm = 0x26C9 jmp .LBB35_3 .LBB35_4: movl $9902, %edi # imm = 0x26AE jmp .LBB35_3 .LBB35_54: movl $9924, %edi # imm = 0x26C4 jmp .LBB35_3 .LBB35_18: movl $9910, %edi # imm = 0x26B6 jmp .LBB35_3 .LBB35_56: movl $9971, %edi # imm = 0x26F3 jmp .LBB35_3 .LBB35_5: movl $9903, %edi # imm = 0x26AF jmp .LBB35_3 .LBB35_11: movl $9905, %edi # imm = 0x26B1 jmp .LBB35_3 .LBB35_36: movl $9914, %edi # imm = 0x26BA jmp .LBB35_3 .LBB35_62: movl $9930, %edi # imm = 0x26CA jmp .LBB35_3 .LBB35_65: movl $9932, %edi # imm = 0x26CC jmp .LBB35_3 .LBB35_15: movl $9908, %edi # imm = 0x26B4 jmp .LBB35_3 .LBB35_6: movl $9904, %edi # imm = 0x26B0 jmp .LBB35_3 .LBB35_26: movl $9911, %edi # imm = 0x26B7 jmp .LBB35_3 .LBB35_31: movl $9943, %edi # imm = 0x26D7 jmp .LBB35_3 .LBB35_53: movl $9923, %edi # imm = 0x26C3 jmp .LBB35_3 .LBB35_16: movl $9909, %edi # imm = 0x26B5 jmp .LBB35_3 .LBB35_8: movl $9947, %edi # imm = 0x26DB jmp .LBB35_3 .LBB35_12: movl $9950, %edi # imm = 0x26DE jmp .LBB35_3 .LBB35_14: movl $9907, %edi # imm = 0x26B3 jmp .LBB35_3 .LBB35_44: movl $9920, %edi # imm = 0x26C0 jmp .LBB35_3 .LBB35_69: movl $9976, %edi # imm = 0x26F8 jmp .LBB35_3 .LBB35_9: movl $9948, %edi # imm = 0x26DC jmp .LBB35_3 .LBB35_78: movl $9939, %edi # imm = 0x26D3 jmp .LBB35_3 .LBB35_35: movl $9913, %edi # imm = 0x26B9 jmp .LBB35_3 .LBB35_23: movl $9956, %edi # imm = 0x26E4 jmp .LBB35_3 .LBB35_55: movl $9925, %edi # imm = 0x26C5 jmp .LBB35_3 .LBB35_63: movl $9931, %edi # imm = 0x26CB jmp .LBB35_3 .LBB35_27: movl $9912, %edi # imm = 0x26B8 jmp .LBB35_3 .LBB35_72: movl $9935, %edi # imm = 0x26CF jmp .LBB35_3 .LBB35_37: movl $9915, %edi # imm = 0x26BB jmp .LBB35_3 .LBB35_38: movl $9916, %edi # imm = 0x26BC jmp .LBB35_3 .LBB35_24: movl $9957, %edi # imm = 0x26E5 jmp .LBB35_3 .LBB35_70: movl $9944, %edi # imm = 0x26D8 jmp .LBB35_3 .LBB35_41: movl $9918, %edi # imm = 0x26BE jmp .LBB35_3 .LBB35_42: movl $9964, %edi # imm = 0x26EC jmp .LBB35_3 .LBB35_46: movl $9965, %edi # imm = 0x26ED jmp .LBB35_3 .LBB35_32: movl $9960, %edi # imm = 0x26E8 jmp .LBB35_3 .LBB35_64: movl $9973, %edi # imm = 0x26F5 jmp .LBB35_3 .LBB35_30: movl $9959, %edi # imm = 0x26E7 jmp .LBB35_3 .LBB35_49: movl $9967, %edi # imm = 0x26EF jmp .LBB35_3 .LBB35_21: movl $9954, %edi # imm = 0x26E2 jmp .LBB35_3 .LBB35_73: movl $9936, %edi # imm = 0x26D0 jmp .LBB35_3 .LBB35_51: movl $9969, %edi # imm = 0x26F1 jmp .LBB35_3 .LBB35_10: movl $9949, %edi # imm = 0x26DD jmp .LBB35_3 .LBB35_34: movl $9962, %edi # imm = 0x26EA jmp .LBB35_3 .LBB35_52: movl $9970, %edi # imm = 0x26F2 jmp .LBB35_3 .LBB35_20: movl $9953, %edi # imm = 0x26E1 jmp .LBB35_3 .LBB35_40: movl $9963, %edi # imm = 0x26EB jmp .LBB35_3 .LBB35_60: movl $9972, %edi # imm = 0x26F4 jmp .LBB35_3 .LBB35_76: movl $9978, %edi # imm = 0x26FA .LBB35_3: callq _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE movl %eax, %ebx .LBB35_82: movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 retq .LBB35_81: .cfi_def_cfa_offset 16 callq _ZN6thrust6system15system_categoryEv movq %rax, %rdx jmp .LBB35_82 .Lfunc_end35: .size _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi, .Lfunc_end35-_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi .cfi_endproc .section .rodata._ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,"aG",@progbits,_ZNK6thrust6system6detail21system_error_category23default_error_conditionEi,comdat .p2align 3, 0x0 .LJTI35_0: .quad .LBB35_2 .quad .LBB35_4 .quad .LBB35_5 .quad .LBB35_6 .quad .LBB35_11 .quad .LBB35_13 .quad .LBB35_14 .quad .LBB35_15 .quad .LBB35_16 .quad .LBB35_18 .quad .LBB35_26 .quad .LBB35_27 .quad .LBB35_35 .quad .LBB35_36 .quad .LBB35_37 .quad .LBB35_38 .quad .LBB35_39 .quad .LBB35_41 .quad .LBB35_43 .quad .LBB35_44 .quad .LBB35_45 .quad .LBB35_47 .quad .LBB35_53 .quad .LBB35_54 .quad .LBB35_55 .quad .LBB35_57 .quad .LBB35_58 .quad .LBB35_59 .quad .LBB35_61 .quad .LBB35_62 .quad .LBB35_63 .quad .LBB35_65 .quad .LBB35_66 .quad .LBB35_71 .quad .LBB35_72 .quad .LBB35_73 .quad .LBB35_81 .quad .LBB35_74 .quad .LBB35_78 .quad .LBB35_79 .quad .LBB35_80 .quad .LBB35_25 .quad .LBB35_31 .quad .LBB35_70 .quad .LBB35_28 .quad .LBB35_7 .quad .LBB35_8 .quad .LBB35_9 .quad .LBB35_10 .quad .LBB35_12 .quad .LBB35_17 .quad .LBB35_19 .quad .LBB35_20 .quad .LBB35_21 .quad .LBB35_22 .quad .LBB35_23 .quad .LBB35_24 .quad .LBB35_29 .quad .LBB35_30 .quad .LBB35_32 .quad .LBB35_33 .quad .LBB35_34 .quad .LBB35_40 .quad .LBB35_42 .quad .LBB35_46 .quad .LBB35_48 .quad .LBB35_49 .quad .LBB35_50 .quad .LBB35_51 .quad .LBB35_52 .quad .LBB35_56 .quad .LBB35_60 .quad .LBB35_64 .quad .LBB35_67 .quad .LBB35_68 .quad .LBB35_69 .quad .LBB35_75 .quad .LBB35_76 .quad .LBB35_77 # -- End function .section .text._ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,comdat .weak _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei .p2align 1, 0x90 .type _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei,@function _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 pushq %rax .cfi_def_cfa_offset 32 .cfi_offset %rbx, -24 .cfi_offset %rbp, -16 movl %edx, %ebp movq %rdi, %rbx movb _ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al testb %al, %al je .LBB36_1 .LBB36_3: # %_ZN6thrust6system16generic_categoryEv.exit movq _ZZN6thrust6system16generic_categoryEvE6result(%rip), %rax movl $_ZZN6thrust6system16generic_categoryEvE6result, %esi movq %rbx, %rdi movl %ebp, %edx callq *48(%rax) movq %rbx, %rax addq $8, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB36_1: .cfi_def_cfa_offset 32 movl $_ZGVZN6thrust6system16generic_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB36_3 # %bb.2: movq $_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system16generic_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system16generic_categoryEvE6result, %edi callq __cxa_guard_release jmp .LBB36_3 .Lfunc_end36: .size _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei, .Lfunc_end36-_ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei .cfi_endproc # -- End function .section .text._ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,"axG",@progbits,_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,comdat .weak _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE # -- Begin function _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE .type _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE,@function _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE: # @_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movl %edi, %ebx movb _ZGVZN6thrust6system16generic_categoryEvE6result(%rip), %al testb %al, %al je .LBB37_1 .LBB37_3: # %_ZN6thrust6system16generic_categoryEv.exit movl $_ZZN6thrust6system16generic_categoryEvE6result, %edx movl %ebx, %eax popq %rbx .cfi_def_cfa_offset 8 retq .LBB37_1: .cfi_def_cfa_offset 16 movl $_ZGVZN6thrust6system16generic_categoryEvE6result, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB37_3 # %bb.2: movq $_ZTVN6thrust6system6detail22generic_error_categoryE+16, _ZZN6thrust6system16generic_categoryEvE6result(%rip) movl $_ZN6thrust6system14error_categoryD2Ev, %edi movl $_ZZN6thrust6system16generic_categoryEvE6result, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZN6thrust6system16generic_categoryEvE6result, %edi callq __cxa_guard_release jmp .LBB37_3 .Lfunc_end37: .size _ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE, .Lfunc_end37-_ZN6thrust6system20make_error_conditionENS0_4errc6errc_tE .cfi_endproc # -- End function .section .text._ZN6thrust6system6detail22generic_error_categoryD0Ev,"axG",@progbits,_ZN6thrust6system6detail22generic_error_categoryD0Ev,comdat .weak _ZN6thrust6system6detail22generic_error_categoryD0Ev # -- Begin function _ZN6thrust6system6detail22generic_error_categoryD0Ev .p2align 1, 0x90 .type _ZN6thrust6system6detail22generic_error_categoryD0Ev,@function _ZN6thrust6system6detail22generic_error_categoryD0Ev: # @_ZN6thrust6system6detail22generic_error_categoryD0Ev .cfi_startproc # %bb.0: jmp _ZdlPv # TAILCALL .Lfunc_end38: .size _ZN6thrust6system6detail22generic_error_categoryD0Ev, .Lfunc_end38-_ZN6thrust6system6detail22generic_error_categoryD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail22generic_error_category4nameEv,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category4nameEv,comdat .weak _ZNK6thrust6system6detail22generic_error_category4nameEv # -- Begin function _ZNK6thrust6system6detail22generic_error_category4nameEv .p2align 1, 0x90 .type _ZNK6thrust6system6detail22generic_error_category4nameEv,@function _ZNK6thrust6system6detail22generic_error_category4nameEv: # @_ZNK6thrust6system6detail22generic_error_category4nameEv .cfi_startproc # %bb.0: movl $.L.str.9, %eax retq .Lfunc_end39: .size _ZNK6thrust6system6detail22generic_error_category4nameEv, .Lfunc_end39-_ZNK6thrust6system6detail22generic_error_category4nameEv .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"axG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat .weak _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei # -- Begin function _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei .p2align 1, 0x90 .type _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,@function _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei: # @_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei .Lfunc_begin7: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception7 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movl %edx, %ebp movq %rdi, %rbx movb _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %al testb %al, %al je .LBB40_1 .LBB40_4: movl %ebp, %edi callq strerror movq %rax, %r14 leaq 16(%rbx), %rax movq %rax, (%rbx) testq %r14, %r14 je .LBB40_6 # %bb.5: movq %r14, %rdi callq strlen movq %r14, %rdx addq %rax, %rdx movq %rbx, %rdi movq %r14, %rsi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag jmp .LBB40_7 .LBB40_6: movq _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip), %rsi movq _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+8(%rip), %rdx addq %rsi, %rdx movq %rbx, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag .LBB40_7: movq %rbx, %rax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB40_1: .cfi_def_cfa_offset 32 movl $_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi callq __cxa_guard_acquire testl %eax, %eax je .LBB40_4 # %bb.2: movq $_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11+16, _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11(%rip) .Ltmp79: movl $_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi movl $.L.str.10, %esi movl $.L.str.10+13, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .Ltmp80: # %bb.3: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit movl $_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edi movl $_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %esi movl $__dso_handle, %edx callq __cxa_atexit movl $_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi callq __cxa_guard_release jmp .LBB40_4 .LBB40_8: # %.critedge17 .Ltmp81: movq %rax, %rbx movl $_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, %edi callq __cxa_guard_abort movq %rbx, %rdi callq _Unwind_Resume@PLT .Lfunc_end40: .size _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei, .Lfunc_end40-_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei .cfi_endproc .section .gcc_except_table._ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,"aG",@progbits,_ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei,comdat .p2align 2, 0x0 GCC_except_table40: .Lexception7: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end7-.Lcst_begin7 .Lcst_begin7: .uleb128 .Lfunc_begin7-.Lfunc_begin7 # >> Call Site 1 << .uleb128 .Ltmp79-.Lfunc_begin7 # Call between .Lfunc_begin7 and .Ltmp79 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp79-.Lfunc_begin7 # >> Call Site 2 << .uleb128 .Ltmp80-.Ltmp79 # Call between .Ltmp79 and .Ltmp80 .uleb128 .Ltmp81-.Lfunc_begin7 # jumps to .Ltmp81 .byte 0 # On action: cleanup .uleb128 .Ltmp80-.Lfunc_begin7 # >> Call Site 3 << .uleb128 .Lfunc_end40-.Ltmp80 # Call between .Ltmp80 and .Lfunc_end40 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end7: .p2align 2, 0x0 # -- End function .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,comdat .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag .p2align 1, 0x90 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,@function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdx, %r14 movq %rsi, %r15 movq %rdi, %rbx subq %rsi, %r14 movq %r14, (%rsp) cmpq $15, %r14 jbe .LBB41_1 # %bb.2: movq %rsp, %r12 movq %rbx, %rdi movq %r12, %rsi xorl %edx, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm movq %rax, (%rbx) movq (%r12), %rcx movq %rcx, 16(%rbx) jmp .LBB41_3 .LBB41_1: # %._crit_edge movq (%rbx), %rax .LBB41_3: testq %r14, %r14 je .LBB41_7 # %bb.4: cmpq $1, %r14 jne .LBB41_6 # %bb.5: movb (%r15), %cl movb %cl, (%rax) jmp .LBB41_7 .LBB41_6: movq %rax, %rdi movq %r15, %rsi movq %r14, %rdx callq memcpy@PLT .LBB41_7: # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tagEN6_GuardD2Ev.exit movq (%rsp), %rax movq %rax, 8(%rbx) movq (%rbx), %rcx movb $0, (%rcx,%rax) addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end41: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag, .Lfunc_end41-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag .cfi_endproc # -- End function .section .text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat .weak _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .p2align 1, 0x90 .type _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdx, %r14 movq %rsi, %r15 movq %rdi, %rbx subq %rsi, %r14 movq %r14, (%rsp) cmpq $15, %r14 jbe .LBB42_1 # %bb.2: movq %rsp, %r12 movq %rbx, %rdi movq %r12, %rsi xorl %edx, %edx callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm movq %rax, (%rbx) movq (%r12), %rcx movq %rcx, 16(%rbx) jmp .LBB42_3 .LBB42_1: # %._crit_edge movq (%rbx), %rax .LBB42_3: testq %r14, %r14 je .LBB42_7 # %bb.4: cmpq $1, %r14 jne .LBB42_6 # %bb.5: movb (%r15), %cl movb %cl, (%rax) jmp .LBB42_7 .LBB42_6: movq %rax, %rdi movq %r15, %rsi movq %r14, %rdx callq memcpy@PLT .LBB42_7: # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit movq (%rsp), %rax movq %rax, 8(%rbx) movq (%rbx), %rcx movb $0, (%rcx,%rax) addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end42: .size _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end42-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag .cfi_endproc # -- End function .section .text._ZN6thrust6system6detail9bad_allocD0Ev,"axG",@progbits,_ZN6thrust6system6detail9bad_allocD0Ev,comdat .weak _ZN6thrust6system6detail9bad_allocD0Ev # -- Begin function _ZN6thrust6system6detail9bad_allocD0Ev .p2align 1, 0x90 .type _ZN6thrust6system6detail9bad_allocD0Ev,@function _ZN6thrust6system6detail9bad_allocD0Ev: # @_ZN6thrust6system6detail9bad_allocD0Ev .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq $_ZTVN6thrust6system6detail9bad_allocE+16, (%rdi) movq 8(%rdi), %rdi leaq 24(%rbx), %rax cmpq %rax, %rdi je .LBB43_2 # %bb.1: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i callq _ZdlPv .LBB43_2: # %_ZN6thrust6system6detail9bad_allocD2Ev.exit movq %rbx, %rdi callq _ZNSt9bad_allocD2Ev movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZdlPv # TAILCALL .Lfunc_end43: .size _ZN6thrust6system6detail9bad_allocD0Ev, .Lfunc_end43-_ZN6thrust6system6detail9bad_allocD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system6detail9bad_alloc4whatEv,"axG",@progbits,_ZNK6thrust6system6detail9bad_alloc4whatEv,comdat .weak _ZNK6thrust6system6detail9bad_alloc4whatEv # -- Begin function _ZNK6thrust6system6detail9bad_alloc4whatEv .p2align 1, 0x90 .type _ZNK6thrust6system6detail9bad_alloc4whatEv,@function _ZNK6thrust6system6detail9bad_alloc4whatEv: # @_ZNK6thrust6system6detail9bad_alloc4whatEv .cfi_startproc # %bb.0: movq 8(%rdi), %rax retq .Lfunc_end44: .size _ZNK6thrust6system6detail9bad_alloc4whatEv, .Lfunc_end44-_ZNK6thrust6system6detail9bad_alloc4whatEv .cfi_endproc # -- End function .section .text._ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,"axG",@progbits,_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,comdat .weak _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc # -- Begin function _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .p2align 1, 0x90 .type _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc,@function _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc: # @_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %rdx, %rbx movl %esi, %ebp movq %rdi, %r14 movq %rcx, %rsi callq _ZNSt13runtime_errorC2EPKc movq $_ZTVN6thrust6system12system_errorE+16, (%r14) movl %ebp, 16(%r14) movq %rbx, 24(%r14) leaq 48(%r14), %rax movq %rax, 32(%r14) movq $0, 40(%r14) movb $0, 48(%r14) popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end45: .size _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc, .Lfunc_end45-_ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .cfi_endproc # -- End function .section .text._ZN6thrust6system12system_errorD2Ev,"axG",@progbits,_ZN6thrust6system12system_errorD2Ev,comdat .weak _ZN6thrust6system12system_errorD2Ev # -- Begin function _ZN6thrust6system12system_errorD2Ev .p2align 1, 0x90 .type _ZN6thrust6system12system_errorD2Ev,@function _ZN6thrust6system12system_errorD2Ev: # @_ZN6thrust6system12system_errorD2Ev .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq $_ZTVN6thrust6system12system_errorE+16, (%rdi) movq 32(%rdi), %rdi leaq 48(%rbx), %rax cmpq %rax, %rdi je .LBB46_2 # %bb.1: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv .LBB46_2: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZNSt13runtime_errorD2Ev # TAILCALL .Lfunc_end46: .size _ZN6thrust6system12system_errorD2Ev, .Lfunc_end46-_ZN6thrust6system12system_errorD2Ev .cfi_endproc # -- End function .section .text._ZN6thrust6system12system_errorD0Ev,"axG",@progbits,_ZN6thrust6system12system_errorD0Ev,comdat .weak _ZN6thrust6system12system_errorD0Ev # -- Begin function _ZN6thrust6system12system_errorD0Ev .p2align 1, 0x90 .type _ZN6thrust6system12system_errorD0Ev,@function _ZN6thrust6system12system_errorD0Ev: # @_ZN6thrust6system12system_errorD0Ev .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq $_ZTVN6thrust6system12system_errorE+16, (%rdi) movq 32(%rdi), %rdi leaq 48(%rbx), %rax cmpq %rax, %rdi je .LBB47_2 # %bb.1: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i callq _ZdlPv .LBB47_2: # %_ZN6thrust6system12system_errorD2Ev.exit movq %rbx, %rdi callq _ZNSt13runtime_errorD2Ev movq %rbx, %rdi popq %rbx .cfi_def_cfa_offset 8 jmp _ZdlPv # TAILCALL .Lfunc_end47: .size _ZN6thrust6system12system_errorD0Ev, .Lfunc_end47-_ZN6thrust6system12system_errorD0Ev .cfi_endproc # -- End function .section .text._ZNK6thrust6system12system_error4whatEv,"axG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat .weak _ZNK6thrust6system12system_error4whatEv # -- Begin function _ZNK6thrust6system12system_error4whatEv .p2align 1, 0x90 .type _ZNK6thrust6system12system_error4whatEv,@function _ZNK6thrust6system12system_error4whatEv: # @_ZNK6thrust6system12system_error4whatEv .Lfunc_begin8: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception8 # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $40, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 32(%rdi), %r14 cmpq $0, 40(%rdi) je .LBB48_3 .LBB48_1: movq (%r14), %rbx .LBB48_2: movq %rbx, %rax addq $40, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB48_3: .cfi_def_cfa_offset 80 movq %rdi, %rbx callq _ZNKSt13runtime_error4whatEv movq %rax, %r15 movq 40(%rbx), %r12 movq %rax, %rdi callq strlen .Ltmp82: movq %r14, %rdi xorl %esi, %esi movq %r12, %rdx movq %r15, %rcx movq %rax, %r8 callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm .Ltmp83: # %bb.4: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc.exit movl 16(%rbx), %edx testl %edx, %edx je .LBB48_1 # %bb.5: cmpq $0, 40(%rbx) je .LBB48_8 # %bb.6: .Ltmp84: movl $.L.str.13, %esi movq %r14, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc .Ltmp85: # %bb.7: # %._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit_crit_edge movl 16(%rbx), %edx .LBB48_8: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc.exit movq 24(%rbx), %rsi movq (%rsi), %rax .Ltmp87: leaq 8(%rsp), %rdi callq *48(%rax) .Ltmp88: # %bb.9: # %_ZNK6thrust6system10error_code7messageB5cxx11Ev.exit movq 8(%rsp), %rsi movq 16(%rsp), %rdx .Ltmp90: movq %r14, %rdi callq _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm .Ltmp91: # %bb.10: # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_.exit leaq 24(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB48_1 # %bb.11: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i callq _ZdlPv jmp .LBB48_1 .LBB48_12: .Ltmp92: movq %rax, %r14 leaq 24(%rsp), %rax movq -16(%rax), %rdi cmpq %rax, %rdi je .LBB48_17 # %bb.13: # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4 callq _ZdlPv jmp .LBB48_17 .LBB48_14: .Ltmp89: jmp .LBB48_16 .LBB48_15: .Ltmp86: .LBB48_16: movq %rax, %r14 .LBB48_17: movq %r14, %rdi callq __cxa_begin_catch movq %rbx, %rdi callq _ZNKSt13runtime_error4whatEv movq %rax, %rbx .Ltmp93: callq __cxa_end_catch .Ltmp94: jmp .LBB48_2 .LBB48_18: .Ltmp95: movq %rax, %rdi callq __clang_call_terminate .Lfunc_end48: .size _ZNK6thrust6system12system_error4whatEv, .Lfunc_end48-_ZNK6thrust6system12system_error4whatEv .cfi_endproc .section .gcc_except_table._ZNK6thrust6system12system_error4whatEv,"aG",@progbits,_ZNK6thrust6system12system_error4whatEv,comdat .p2align 2, 0x0 GCC_except_table48: .Lexception8: .byte 255 # @LPStart Encoding = omit .byte 3 # @TType Encoding = udata4 .uleb128 .Lttbase2-.Lttbaseref2 .Lttbaseref2: .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end8-.Lcst_begin8 .Lcst_begin8: .uleb128 .Ltmp82-.Lfunc_begin8 # >> Call Site 1 << .uleb128 .Ltmp85-.Ltmp82 # Call between .Ltmp82 and .Ltmp85 .uleb128 .Ltmp86-.Lfunc_begin8 # jumps to .Ltmp86 .byte 1 # On action: 1 .uleb128 .Ltmp87-.Lfunc_begin8 # >> Call Site 2 << .uleb128 .Ltmp88-.Ltmp87 # Call between .Ltmp87 and .Ltmp88 .uleb128 .Ltmp89-.Lfunc_begin8 # jumps to .Ltmp89 .byte 1 # On action: 1 .uleb128 .Ltmp90-.Lfunc_begin8 # >> Call Site 3 << .uleb128 .Ltmp91-.Ltmp90 # Call between .Ltmp90 and .Ltmp91 .uleb128 .Ltmp92-.Lfunc_begin8 # jumps to .Ltmp92 .byte 1 # On action: 1 .uleb128 .Ltmp91-.Lfunc_begin8 # >> Call Site 4 << .uleb128 .Ltmp93-.Ltmp91 # Call between .Ltmp91 and .Ltmp93 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp93-.Lfunc_begin8 # >> Call Site 5 << .uleb128 .Ltmp94-.Ltmp93 # Call between .Ltmp93 and .Ltmp94 .uleb128 .Ltmp95-.Lfunc_begin8 # jumps to .Ltmp95 .byte 1 # On action: 1 .Lcst_end8: .byte 1 # >> Action Record 1 << # Catch TypeInfo 1 .byte 0 # No further actions .p2align 2, 0x0 # >> Catch TypeInfos << .long 0 # TypeInfo 1 .Lttbase2: .p2align 2, 0x0 # -- End function .section .text._ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,"axG",@progbits,_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,comdat .weak _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m # -- Begin function _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m .p2align 1, 0x90 .type _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,@function _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m: # @_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m .Lfunc_begin9: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception9 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movss %xmm0, 4(%rsp) # 4-byte Spill movq %rsi, 16(%rsp) # 8-byte Spill movl $4294967040, %ebp # imm = 0xFFFFFF00 movq %rdx, 8(%rsp) # 8-byte Spill leaq (%rdx,%rbp), %rcx decq %rcx shrq $8, %rcx movabsq $72057598332895489, %rdx # imm = 0x100000100000101 movq %rcx, %rax mulq %rdx cmpq $16777215, %rcx # imm = 0xFFFFFF jb .LBB49_5 # %bb.1: # %.lr.ph.i.preheader movq %rdx, %r15 shrq $16, %r15 xorl %r12d, %r12d leaq 512(%rbp), %r13 movabsq $-4294967040, %r14 # imm = 0xFFFFFFFF00000100 movq 8(%rsp), %rbx # 8-byte Reload .LBB49_2: # %.lr.ph.i # =>This Inner Loop Header: Depth=1 cmpq %rbp, %rbx movl $4294967040, %eax # imm = 0xFFFFFF00 cmovbq %rbx, %rax addq $255, %rax shrq $8, %rax leaq (%rax,%rbp), %rdi addq $256, %rdi # imm = 0x100 movl $1, %esi movq %r13, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB49_4 # %bb.3: # in Loop: Header=BB49_2 Depth=1 movq 16(%rsp), %rdi # 8-byte Reload movss 4(%rsp), %xmm0 # 4-byte Reload # xmm0 = mem[0],zero,zero,zero movq 8(%rsp), %rsi # 8-byte Reload movq %r12, %rdx callq _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .LBB49_4: # in Loop: Header=BB49_2 Depth=1 addq %rbp, %r12 addq %r14, %rbx decq %r15 jne .LBB49_2 .LBB49_5: # %_ZN6thrust11hip_rocprim14__parallel_for12parallel_forINS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEE10hipError_tT0_T_P12ihipStream_t.exit callq hipPeekAtLastError movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB49_6 # %bb.11: # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit xorl %edi, %edi callq hipStreamSynchronize movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB49_12 # %bb.15: # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit8 addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB49_6: .cfi_def_cfa_offset 80 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp96: callq _ZN6thrust6system12hip_categoryEv .Ltmp97: # %bb.7: .Ltmp98: movl $.L.str.17, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp99: jmp .LBB49_8 .LBB49_12: movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp101: callq _ZN6thrust6system12hip_categoryEv .Ltmp102: # %bb.13: .Ltmp103: movl $.L.str.18, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp104: .LBB49_8: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB49_14: .Ltmp105: jmp .LBB49_10 .LBB49_9: .Ltmp100: .LBB49_10: # %common.resume movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end49: .size _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m, .Lfunc_end49-_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m .cfi_endproc .section .gcc_except_table._ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,"aG",@progbits,_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNS8_IS2_EES7_m,comdat .p2align 2, 0x0 GCC_except_table49: .Lexception9: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end9-.Lcst_begin9 .Lcst_begin9: .uleb128 .Lfunc_begin9-.Lfunc_begin9 # >> Call Site 1 << .uleb128 .Ltmp96-.Lfunc_begin9 # Call between .Lfunc_begin9 and .Ltmp96 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp96-.Lfunc_begin9 # >> Call Site 2 << .uleb128 .Ltmp99-.Ltmp96 # Call between .Ltmp96 and .Ltmp99 .uleb128 .Ltmp100-.Lfunc_begin9 # jumps to .Ltmp100 .byte 0 # On action: cleanup .uleb128 .Ltmp99-.Lfunc_begin9 # >> Call Site 3 << .uleb128 .Ltmp101-.Ltmp99 # Call between .Ltmp99 and .Ltmp101 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp101-.Lfunc_begin9 # >> Call Site 4 << .uleb128 .Ltmp104-.Ltmp101 # Call between .Ltmp101 and .Ltmp104 .uleb128 .Ltmp105-.Lfunc_begin9 # jumps to .Ltmp105 .byte 0 # On action: cleanup .uleb128 .Ltmp104-.Lfunc_begin9 # >> Call Site 5 << .uleb128 .Lfunc_end49-.Ltmp104 # Call between .Ltmp104 and .Lfunc_end49 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end9: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,comdat .weak _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ # -- Begin function _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .type _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,@function _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_: # @_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 64(%rsp), %rax movq %rdi, (%rax) movss %xmm0, 8(%rax) leaq 24(%rsp), %rcx movq %rsi, (%rcx) leaq 16(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end50: .size _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, .Lfunc_end50-_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .cfi_endproc # -- End function .section .text._ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv,"axG",@progbits,_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv,comdat .weak _ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv # -- Begin function _ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv .p2align 1, 0x90 .type _ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv,@function _ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv: # @_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv .cfi_startproc # %bb.0: movq 16(%rdi), %rdx testq %rdx, %rdx je .LBB51_2 # %bb.1: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq (%rdi), %rax movq 8(%rdi), %rsi shlq $2, %rdx movq 8(%rax), %rdi movl $4, %ecx callq _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm xorps %xmm0, %xmm0 movups %xmm0, 8(%rbx) popq %rbx .cfi_def_cfa_offset 8 .LBB51_2: retq .Lfunc_end51: .size _ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv, .Lfunc_end51-_ZN6thrust6detail18contiguous_storageIfNS_16device_allocatorIfEEE10deallocateEv .cfi_endproc # -- End function .section .text._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE,"axG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE,comdat .weak _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE # -- Begin function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE .type _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE,@function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE: # @_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE .Lfunc_begin10: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception10 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %r8, %rbx movq %rcx, %r14 testq %rcx, %rcx je .LBB52_6 # %bb.1: # %_ZN6thrust11hip_rocprim22trivial_copy_to_deviceIfEE10hipError_tPT_PKS3_mP12ihipStream_t.exit.i leaq (,%r14,4), %rax movq %rbx, %rdi movq %rdx, %rsi movq %rax, %rdx movl $1, %ecx xorl %r8d, %r8d callq hipMemcpyWithStream movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB52_2 .LBB52_6: # %_ZN6thrust11hip_rocprim6__copy19trivial_device_copyINS_6system3cpp6detail3tagENS0_3tagEfmEEvRNS5_16execution_policyIT_EERNS0_16execution_policyIT0_EEPT1_PKSG_T2_.exit leaq (%rbx,%r14,4), %rax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB52_2: .cfi_def_cfa_offset 32 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp106: callq _ZN6thrust6system12hip_categoryEv .Ltmp107: # %bb.3: .Ltmp108: movl $.L.str.19, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp109: # %bb.4: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB52_5: .Ltmp110: movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end52: .size _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE, .Lfunc_end52-_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE .cfi_endproc .section .gcc_except_table._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE,"aG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS_6system3cpp6detail3tagENS0_3tagEPfmNS_6detail15normal_iteratorINS_10device_ptrIfEEEEEET3_RNS_16execution_policyIT_EERNSF_IT0_EET1_T2_SE_NS9_17integral_constantIbLb1EEE,comdat .p2align 2, 0x0 GCC_except_table52: .Lexception10: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end10-.Lcst_begin10 .Lcst_begin10: .uleb128 .Lfunc_begin10-.Lfunc_begin10 # >> Call Site 1 << .uleb128 .Ltmp106-.Lfunc_begin10 # Call between .Lfunc_begin10 and .Ltmp106 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp106-.Lfunc_begin10 # >> Call Site 2 << .uleb128 .Ltmp109-.Ltmp106 # Call between .Ltmp106 and .Ltmp109 .uleb128 .Ltmp110-.Lfunc_begin10 # jumps to .Ltmp110 .byte 0 # On action: cleanup .uleb128 .Ltmp109-.Lfunc_begin10 # >> Call Site 3 << .uleb128 .Lfunc_end52-.Ltmp109 # Call between .Ltmp109 and .Lfunc_end52 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end10: .p2align 2, 0x0 # -- End function .section .text._ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l,"axG",@progbits,_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l,comdat .weak _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l # -- Begin function _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l .p2align 1, 0x90 .type _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l,@function _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l: # @_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l .Lfunc_begin11: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception11 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $88, %rsp .cfi_def_cfa_offset 144 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $4294967040, %r13d # imm = 0xFFFFFF00 movaps 144(%rsp), %xmm0 movaps 160(%rsp), %xmm1 movaps %xmm1, 64(%rsp) movaps %xmm0, 48(%rsp) movq %rsi, 40(%rsp) # 8-byte Spill leaq (%rsi,%r13), %rcx decq %rcx shrq $8, %rcx movabsq $72057598332895489, %rdx # imm = 0x100000100000101 movq %rcx, %rax mulq %rdx cmpq $16777215, %rcx # imm = 0xFFFFFF jb .LBB53_5 # %bb.1: # %.lr.ph.i.preheader movq %rdx, %r14 shrq $16, %r14 xorl %r15d, %r15d leaq 512(%r13), %r12 movabsq $-4294967040, %rbp # imm = 0xFFFFFFFF00000100 movq 40(%rsp), %rbx # 8-byte Reload .LBB53_2: # %.lr.ph.i # =>This Inner Loop Header: Depth=1 cmpq %r13, %rbx movl $4294967040, %eax # imm = 0xFFFFFF00 cmovbq %rbx, %rax addq $255, %rax shrq $8, %rax leaq (%rax,%r13), %rdi addq $256, %rdi # imm = 0x100 movl $1, %esi movq %r12, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB53_4 # %bb.3: # in Loop: Header=BB53_2 Depth=1 movaps 48(%rsp), %xmm0 movaps 64(%rsp), %xmm1 movups %xmm1, 16(%rsp) movups %xmm0, (%rsp) movq 40(%rsp), %rdi # 8-byte Reload movq %r15, %rsi callq _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .LBB53_4: # in Loop: Header=BB53_2 Depth=1 addq %r13, %r15 addq %rbp, %rbx decq %r14 jne .LBB53_2 .LBB53_5: # %_ZN6thrust11hip_rocprim14__parallel_for12parallel_forINS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEE10hipError_tT0_T_P12ihipStream_t.exit callq hipPeekAtLastError movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB53_6 # %bb.11: # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit xorl %edi, %edi callq hipStreamSynchronize movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB53_12 # %bb.15: # %_ZN6thrust11hip_rocprim14throw_on_errorE10hipError_tPKc.exit6 addq $88, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB53_6: .cfi_def_cfa_offset 144 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp111: callq _ZN6thrust6system12hip_categoryEv .Ltmp112: # %bb.7: .Ltmp113: movl $.L.str.17, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp114: jmp .LBB53_8 .LBB53_12: movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp116: callq _ZN6thrust6system12hip_categoryEv .Ltmp117: # %bb.13: .Ltmp118: movl $.L.str.18, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp119: .LBB53_8: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB53_14: .Ltmp120: jmp .LBB53_10 .LBB53_9: .Ltmp115: .LBB53_10: # %common.resume movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end53: .size _ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l, .Lfunc_end53-_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l .cfi_endproc .section .gcc_except_table._ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l,"aG",@progbits,_ZZN6thrust11hip_rocprim12parallel_forINS0_3tagENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElEEvRNS0_16execution_policyIT_EET0_T1_EN10workaround3parERNSF_IS2_EESE_l,comdat .p2align 2, 0x0 GCC_except_table53: .Lexception11: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end11-.Lcst_begin11 .Lcst_begin11: .uleb128 .Lfunc_begin11-.Lfunc_begin11 # >> Call Site 1 << .uleb128 .Ltmp111-.Lfunc_begin11 # Call between .Lfunc_begin11 and .Ltmp111 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp111-.Lfunc_begin11 # >> Call Site 2 << .uleb128 .Ltmp114-.Ltmp111 # Call between .Ltmp111 and .Ltmp114 .uleb128 .Ltmp115-.Lfunc_begin11 # jumps to .Ltmp115 .byte 0 # On action: cleanup .uleb128 .Ltmp114-.Lfunc_begin11 # >> Call Site 3 << .uleb128 .Ltmp116-.Ltmp114 # Call between .Ltmp114 and .Ltmp116 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp116-.Lfunc_begin11 # >> Call Site 4 << .uleb128 .Ltmp119-.Ltmp116 # Call between .Ltmp116 and .Ltmp119 .uleb128 .Ltmp120-.Lfunc_begin11 # jumps to .Ltmp120 .byte 0 # On action: cleanup .uleb128 .Ltmp119-.Lfunc_begin11 # >> Call Site 5 << .uleb128 .Lfunc_end53-.Ltmp119 # Call between .Ltmp119 and .Lfunc_end53 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end11: .p2align 2, 0x0 # -- End function .section .text._ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,comdat .weak _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ # -- Begin function _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .type _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,@function _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_: # @_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $96, %rsp .cfi_def_cfa_offset 144 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 144(%rsp), %rdx leaq 64(%rsp), %rbx movq %rdx, (%rbx) movq %rax, 8(%rbx) movq %rcx, 16(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $112, %rsp .cfi_adjust_cfa_offset -112 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end54: .size _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_, .Lfunc_end54-_ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .cfi_endproc # -- End function .section .text._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,"axG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,comdat .weak _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE # -- Begin function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE .type _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,@function _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE: # @_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE .Lfunc_begin12: .cfi_startproc .cfi_personality 3, __gxx_personality_v0 .cfi_lsda 3, .Lexception12 # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movq %r8, %rbx movq %rcx, %r14 testq %rcx, %rcx je .LBB55_6 # %bb.1: # %_ZN6thrust11hip_rocprim24trivial_copy_from_deviceIfEE10hipError_tPT_PKS3_mP12ihipStream_t.exit.i leaq (,%r14,4), %rax movq %rbx, %rdi movq %rdx, %rsi movq %rax, %rdx movl $2, %ecx xorl %r8d, %r8d callq hipMemcpyWithStream movl %eax, %ebp callq hipGetLastError testl %ebp, %ebp jne .LBB55_2 .LBB55_6: # %_ZN6thrust11hip_rocprim6__copy19trivial_device_copyINS0_3tagENS_6system3cpp6detail3tagEfmEEvRNS0_16execution_policyIT_EERNS6_16execution_policyIT0_EEPT1_PKSG_T2_.exit leaq (%rbx,%r14,4), %rax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB55_2: .cfi_def_cfa_offset 32 movl $64, %edi callq __cxa_allocate_exception movq %rax, %rbx .Ltmp121: callq _ZN6thrust6system12hip_categoryEv .Ltmp122: # %bb.3: .Ltmp123: movl $.L.str.20, %ecx movq %rbx, %rdi movl %ebp, %esi movq %rax, %rdx callq _ZN6thrust6system12system_errorC2EiRKNS0_14error_categoryEPKc .Ltmp124: # %bb.4: movl $_ZTIN6thrust6system12system_errorE, %esi movl $_ZN6thrust6system12system_errorD2Ev, %edx movq %rbx, %rdi callq __cxa_throw .LBB55_5: .Ltmp125: movq %rax, %r14 movq %rbx, %rdi callq __cxa_free_exception movq %r14, %rdi callq _Unwind_Resume@PLT .Lfunc_end55: .size _ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE, .Lfunc_end55-_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE .cfi_endproc .section .gcc_except_table._ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,"aG",@progbits,_ZN6thrust11hip_rocprim6__copy19cross_system_copy_nINS0_3tagENS_6system3cpp6detail3tagENS_6detail15normal_iteratorINS_10device_ptrIfEEEEmNS9_IPfEEEET3_RNS_16execution_policyIT_EERNSG_IT0_EET1_T2_SF_NS8_17integral_constantIbLb1EEE,comdat .p2align 2, 0x0 GCC_except_table55: .Lexception12: .byte 255 # @LPStart Encoding = omit .byte 255 # @TType Encoding = omit .byte 1 # Call site Encoding = uleb128 .uleb128 .Lcst_end12-.Lcst_begin12 .Lcst_begin12: .uleb128 .Lfunc_begin12-.Lfunc_begin12 # >> Call Site 1 << .uleb128 .Ltmp121-.Lfunc_begin12 # Call between .Lfunc_begin12 and .Ltmp121 .byte 0 # has no landing pad .byte 0 # On action: cleanup .uleb128 .Ltmp121-.Lfunc_begin12 # >> Call Site 2 << .uleb128 .Ltmp124-.Ltmp121 # Call between .Ltmp121 and .Ltmp124 .uleb128 .Ltmp125-.Lfunc_begin12 # jumps to .Ltmp125 .byte 0 # On action: cleanup .uleb128 .Ltmp124-.Lfunc_begin12 # >> Call Site 3 << .uleb128 .Lfunc_end55-.Ltmp124 # Call between .Ltmp124 and .Lfunc_end55 .byte 0 # has no landing pad .byte 0 # On action: cleanup .Lcst_end12: .p2align 2, 0x0 # -- End function .text .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB56_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB56_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end56: .size __hip_module_ctor, .Lfunc_end56-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB57_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB57_2: retq .Lfunc_end57: .size __hip_module_dtor, .Lfunc_end57-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "r" .size .L.str, 2 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "Error opening file: %s\n" .size .L.str.1, 24 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "%d" .size .L.str.2, 3 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "%f" .size .L.str.3, 3 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "Data not matching: Location: %d\tOutput: %f\tExpected: %f\n" .size .L.str.6, 57 .type _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,@object # @_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .section .bss._ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,comdat .weak _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .p2align 3, 0x0 _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource: .zero 16 .size _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, 16 .type _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,@object # @_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .section .bss._ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource,comdat .weak _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .p2align 3, 0x0 _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource: .quad 0 # 0x0 .size _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource, 8 .hidden __dso_handle .type _ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .section .rodata._ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat .weak _ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .p2align 3, 0x0 _ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE: .quad 0 .quad _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .quad _ZN6thrust2mr15memory_resourceINS_10device_ptrIvEEED2Ev .quad _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEED0Ev .quad _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE11do_allocateEmm .quad _ZN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEE13do_deallocateENS_10device_ptrIvEEmm .quad _ZNK6thrust2mr15memory_resourceINS_10device_ptrIvEEE11do_is_equalERKS4_ .size _ZTVN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 56 .type _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .section .rodata._ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat .weak _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE: .asciz "N6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE" .size _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 200 .type _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,@object # @_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .section .rodata._ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,"aG",@progbits,_ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,comdat .weak _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE: .asciz "N6thrust2mr15memory_resourceINS_10device_ptrIvEEEE" .size _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE, 51 .type _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,@object # @_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .section .rodata._ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,"aG",@progbits,_ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE,comdat .weak _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .p2align 3, 0x0 _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .size _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE, 16 .type _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,@object # @_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .section .rodata._ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,"aG",@progbits,_ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE,comdat .weak _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .p2align 3, 0x0 _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .quad _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .size _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE, 24 .type _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,@object # @_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .section .data._ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,"awG",@progbits,_ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,comdat .weak _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .p2align 3, 0x0 _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource: .quad _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE+16 .size _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, 8 .type _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .section .rodata._ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat .weak _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .p2align 3, 0x0 _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE: .quad 0 .quad _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .quad _ZN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEED2Ev .quad _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEED0Ev .quad _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE11do_allocateEmm .quad _ZN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEE13do_deallocateESA_mm .quad _ZNK6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEE11do_is_equalERKS9_ .size _ZTVN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 56 .type _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,@object # @_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .section .bss._ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,"awG",@nobits,_ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource,comdat .weak _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .p2align 3, 0x0 _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource: .quad 0 # 0x0 .size _ZGVZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource, 8 .type _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .section .rodata._ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat .weak _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE: .asciz "N6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE" .size _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 166 .type _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,@object # @_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .section .rodata._ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,comdat .weak _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE: .asciz "N6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE" .size _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE, 113 .type _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,@object # @_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .section .rodata._ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE,comdat .weak _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .p2align 3, 0x0 _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .size _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE, 16 .type _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,@object # @_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .section .rodata._ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,"aG",@progbits,_ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE,comdat .weak _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .p2align 3, 0x0 _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE .quad _ZTIN6thrust2mr15memory_resourceINS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS4_EENS_11use_defaultEEEEE .size _ZTIN6thrust6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS6_EENS_11use_defaultEEEEE, 24 .type _ZTSN6thrust6system6detail9bad_allocE,@object # @_ZTSN6thrust6system6detail9bad_allocE .section .rodata._ZTSN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTSN6thrust6system6detail9bad_allocE,comdat .weak _ZTSN6thrust6system6detail9bad_allocE _ZTSN6thrust6system6detail9bad_allocE: .asciz "N6thrust6system6detail9bad_allocE" .size _ZTSN6thrust6system6detail9bad_allocE, 34 .type _ZTIN6thrust6system6detail9bad_allocE,@object # @_ZTIN6thrust6system6detail9bad_allocE .section .rodata._ZTIN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTIN6thrust6system6detail9bad_allocE,comdat .weak _ZTIN6thrust6system6detail9bad_allocE .p2align 3, 0x0 _ZTIN6thrust6system6detail9bad_allocE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system6detail9bad_allocE .quad _ZTISt9bad_alloc .size _ZTIN6thrust6system6detail9bad_allocE, 24 .type _ZZN6thrust6system12hip_categoryEvE6result,@object # @_ZZN6thrust6system12hip_categoryEvE6result .section .bss._ZZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system12hip_categoryEvE6result,comdat .weak _ZZN6thrust6system12hip_categoryEvE6result .p2align 3, 0x0 _ZZN6thrust6system12hip_categoryEvE6result: .zero 8 .size _ZZN6thrust6system12hip_categoryEvE6result, 8 .type _ZGVZN6thrust6system12hip_categoryEvE6result,@object # @_ZGVZN6thrust6system12hip_categoryEvE6result .section .bss._ZGVZN6thrust6system12hip_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system12hip_categoryEvE6result,comdat .weak _ZGVZN6thrust6system12hip_categoryEvE6result .p2align 3, 0x0 _ZGVZN6thrust6system12hip_categoryEvE6result: .quad 0 # 0x0 .size _ZGVZN6thrust6system12hip_categoryEvE6result, 8 .type _ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE .section .rodata._ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat .weak _ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE .p2align 3, 0x0 _ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE: .quad 0 .quad _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE .quad _ZN6thrust6system14error_categoryD2Ev .quad _ZN6thrust6system11hip_rocprim6detail18hip_error_categoryD0Ev .quad _ZNK6thrust6system11hip_rocprim6detail18hip_error_category4nameEv .quad _ZNK6thrust6system11hip_rocprim6detail18hip_error_category23default_error_conditionEi .quad _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .quad _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .quad _ZNK6thrust6system11hip_rocprim6detail18hip_error_category7messageB5cxx11Ei .size _ZTVN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 72 .type _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE .section .rodata._ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat .weak _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE: .asciz "N6thrust6system11hip_rocprim6detail18hip_error_categoryE" .size _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 57 .type _ZTSN6thrust6system14error_categoryE,@object # @_ZTSN6thrust6system14error_categoryE .section .rodata._ZTSN6thrust6system14error_categoryE,"aG",@progbits,_ZTSN6thrust6system14error_categoryE,comdat .weak _ZTSN6thrust6system14error_categoryE _ZTSN6thrust6system14error_categoryE: .asciz "N6thrust6system14error_categoryE" .size _ZTSN6thrust6system14error_categoryE, 33 .type _ZTIN6thrust6system14error_categoryE,@object # @_ZTIN6thrust6system14error_categoryE .section .rodata._ZTIN6thrust6system14error_categoryE,"aG",@progbits,_ZTIN6thrust6system14error_categoryE,comdat .weak _ZTIN6thrust6system14error_categoryE .p2align 3, 0x0 _ZTIN6thrust6system14error_categoryE: .quad _ZTVN10__cxxabiv117__class_type_infoE+16 .quad _ZTSN6thrust6system14error_categoryE .size _ZTIN6thrust6system14error_categoryE, 16 .type _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,@object # @_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE .section .rodata._ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,"aG",@progbits,_ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE,comdat .weak _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE .p2align 3, 0x0 _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE .quad _ZTIN6thrust6system14error_categoryE .size _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE, 24 .type _ZTVN6thrust6system14error_categoryE,@object # @_ZTVN6thrust6system14error_categoryE .section .rodata._ZTVN6thrust6system14error_categoryE,"aG",@progbits,_ZTVN6thrust6system14error_categoryE,comdat .weak _ZTVN6thrust6system14error_categoryE .p2align 3, 0x0 _ZTVN6thrust6system14error_categoryE: .quad 0 .quad _ZTIN6thrust6system14error_categoryE .quad _ZN6thrust6system14error_categoryD2Ev .quad _ZN6thrust6system14error_categoryD0Ev .quad __cxa_pure_virtual .quad _ZNK6thrust6system14error_category23default_error_conditionEi .quad _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .quad _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .quad __cxa_pure_virtual .size _ZTVN6thrust6system14error_categoryE, 72 .type .L.str.7,@object # @.str.7 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.7: .asciz "hip" .size .L.str.7, 4 .type _ZZN6thrust6system15system_categoryEvE6result,@object # @_ZZN6thrust6system15system_categoryEvE6result .section .bss._ZZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system15system_categoryEvE6result,comdat .weak _ZZN6thrust6system15system_categoryEvE6result .p2align 3, 0x0 _ZZN6thrust6system15system_categoryEvE6result: .zero 8 .size _ZZN6thrust6system15system_categoryEvE6result, 8 .type _ZGVZN6thrust6system15system_categoryEvE6result,@object # @_ZGVZN6thrust6system15system_categoryEvE6result .section .bss._ZGVZN6thrust6system15system_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system15system_categoryEvE6result,comdat .weak _ZGVZN6thrust6system15system_categoryEvE6result .p2align 3, 0x0 _ZGVZN6thrust6system15system_categoryEvE6result: .quad 0 # 0x0 .size _ZGVZN6thrust6system15system_categoryEvE6result, 8 .type _ZTVN6thrust6system6detail21system_error_categoryE,@object # @_ZTVN6thrust6system6detail21system_error_categoryE .section .rodata._ZTVN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail21system_error_categoryE,comdat .weak _ZTVN6thrust6system6detail21system_error_categoryE .p2align 3, 0x0 _ZTVN6thrust6system6detail21system_error_categoryE: .quad 0 .quad _ZTIN6thrust6system6detail21system_error_categoryE .quad _ZN6thrust6system14error_categoryD2Ev .quad _ZN6thrust6system6detail21system_error_categoryD0Ev .quad _ZNK6thrust6system6detail21system_error_category4nameEv .quad _ZNK6thrust6system6detail21system_error_category23default_error_conditionEi .quad _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .quad _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .quad _ZNK6thrust6system6detail21system_error_category7messageB5cxx11Ei .size _ZTVN6thrust6system6detail21system_error_categoryE, 72 .type _ZTSN6thrust6system6detail21system_error_categoryE,@object # @_ZTSN6thrust6system6detail21system_error_categoryE .section .rodata._ZTSN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail21system_error_categoryE,comdat .weak _ZTSN6thrust6system6detail21system_error_categoryE _ZTSN6thrust6system6detail21system_error_categoryE: .asciz "N6thrust6system6detail21system_error_categoryE" .size _ZTSN6thrust6system6detail21system_error_categoryE, 47 .type _ZTIN6thrust6system6detail21system_error_categoryE,@object # @_ZTIN6thrust6system6detail21system_error_categoryE .section .rodata._ZTIN6thrust6system6detail21system_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail21system_error_categoryE,comdat .weak _ZTIN6thrust6system6detail21system_error_categoryE .p2align 3, 0x0 _ZTIN6thrust6system6detail21system_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system6detail21system_error_categoryE .quad _ZTIN6thrust6system14error_categoryE .size _ZTIN6thrust6system6detail21system_error_categoryE, 24 .type .L.str.8,@object # @.str.8 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.8: .asciz "system" .size .L.str.8, 7 .type _ZZN6thrust6system16generic_categoryEvE6result,@object # @_ZZN6thrust6system16generic_categoryEvE6result .section .bss._ZZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZZN6thrust6system16generic_categoryEvE6result,comdat .weak _ZZN6thrust6system16generic_categoryEvE6result .p2align 3, 0x0 _ZZN6thrust6system16generic_categoryEvE6result: .zero 8 .size _ZZN6thrust6system16generic_categoryEvE6result, 8 .type _ZGVZN6thrust6system16generic_categoryEvE6result,@object # @_ZGVZN6thrust6system16generic_categoryEvE6result .section .bss._ZGVZN6thrust6system16generic_categoryEvE6result,"awG",@nobits,_ZGVZN6thrust6system16generic_categoryEvE6result,comdat .weak _ZGVZN6thrust6system16generic_categoryEvE6result .p2align 3, 0x0 _ZGVZN6thrust6system16generic_categoryEvE6result: .quad 0 # 0x0 .size _ZGVZN6thrust6system16generic_categoryEvE6result, 8 .type _ZTVN6thrust6system6detail22generic_error_categoryE,@object # @_ZTVN6thrust6system6detail22generic_error_categoryE .section .rodata._ZTVN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTVN6thrust6system6detail22generic_error_categoryE,comdat .weak _ZTVN6thrust6system6detail22generic_error_categoryE .p2align 3, 0x0 _ZTVN6thrust6system6detail22generic_error_categoryE: .quad 0 .quad _ZTIN6thrust6system6detail22generic_error_categoryE .quad _ZN6thrust6system14error_categoryD2Ev .quad _ZN6thrust6system6detail22generic_error_categoryD0Ev .quad _ZNK6thrust6system6detail22generic_error_category4nameEv .quad _ZNK6thrust6system14error_category23default_error_conditionEi .quad _ZNK6thrust6system14error_category10equivalentEiRKNS0_15error_conditionE .quad _ZNK6thrust6system14error_category10equivalentERKNS0_10error_codeEi .quad _ZNK6thrust6system6detail22generic_error_category7messageB5cxx11Ei .size _ZTVN6thrust6system6detail22generic_error_categoryE, 72 .type _ZTSN6thrust6system6detail22generic_error_categoryE,@object # @_ZTSN6thrust6system6detail22generic_error_categoryE .section .rodata._ZTSN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTSN6thrust6system6detail22generic_error_categoryE,comdat .weak _ZTSN6thrust6system6detail22generic_error_categoryE _ZTSN6thrust6system6detail22generic_error_categoryE: .asciz "N6thrust6system6detail22generic_error_categoryE" .size _ZTSN6thrust6system6detail22generic_error_categoryE, 48 .type _ZTIN6thrust6system6detail22generic_error_categoryE,@object # @_ZTIN6thrust6system6detail22generic_error_categoryE .section .rodata._ZTIN6thrust6system6detail22generic_error_categoryE,"aG",@progbits,_ZTIN6thrust6system6detail22generic_error_categoryE,comdat .weak _ZTIN6thrust6system6detail22generic_error_categoryE .p2align 3, 0x0 _ZTIN6thrust6system6detail22generic_error_categoryE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system6detail22generic_error_categoryE .quad _ZTIN6thrust6system14error_categoryE .size _ZTIN6thrust6system6detail22generic_error_categoryE, 24 .type .L.str.9,@object # @.str.9 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.9: .asciz "generic" .size .L.str.9, 8 .type _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .section .bss._ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat .weak _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .p2align 3, 0x0 _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11: .zero 32 .size _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 32 .type _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,@object # @_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .section .bss._ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,"awG",@nobits,_ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11,comdat .weak _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .p2align 3, 0x0 _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11: .quad 0 # 0x0 .size _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11, 8 .type .L.str.10,@object # @.str.10 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.10: .asciz "Unknown error" .size .L.str.10, 14 .type .L.str.11,@object # @.str.11 .L.str.11: .asciz "unknown error" .size .L.str.11, 14 .type .L.str.12,@object # @.str.12 .L.str.12: .asciz "hipErrorUnknown" .size .L.str.12, 16 .type .L.str.13,@object # @.str.13 .L.str.13: .asciz ": " .size .L.str.13, 3 .type .L.str.15,@object # @.str.15 .L.str.15: .asciz "basic_string: construction from null is not valid" .size .L.str.15, 50 .type _ZTVN6thrust6system6detail9bad_allocE,@object # @_ZTVN6thrust6system6detail9bad_allocE .section .rodata._ZTVN6thrust6system6detail9bad_allocE,"aG",@progbits,_ZTVN6thrust6system6detail9bad_allocE,comdat .weak _ZTVN6thrust6system6detail9bad_allocE .p2align 3, 0x0 _ZTVN6thrust6system6detail9bad_allocE: .quad 0 .quad _ZTIN6thrust6system6detail9bad_allocE .quad _ZN6thrust6system6detail9bad_allocD2Ev .quad _ZN6thrust6system6detail9bad_allocD0Ev .quad _ZNK6thrust6system6detail9bad_alloc4whatEv .size _ZTVN6thrust6system6detail9bad_allocE, 40 .type .L.str.16,@object # @.str.16 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.16: .asciz "HIP free failed" .size .L.str.16, 16 .type _ZTSN6thrust6system12system_errorE,@object # @_ZTSN6thrust6system12system_errorE .section .rodata._ZTSN6thrust6system12system_errorE,"aG",@progbits,_ZTSN6thrust6system12system_errorE,comdat .weak _ZTSN6thrust6system12system_errorE _ZTSN6thrust6system12system_errorE: .asciz "N6thrust6system12system_errorE" .size _ZTSN6thrust6system12system_errorE, 31 .type _ZTIN6thrust6system12system_errorE,@object # @_ZTIN6thrust6system12system_errorE .section .rodata._ZTIN6thrust6system12system_errorE,"aG",@progbits,_ZTIN6thrust6system12system_errorE,comdat .weak _ZTIN6thrust6system12system_errorE .p2align 3, 0x0 _ZTIN6thrust6system12system_errorE: .quad _ZTVN10__cxxabiv120__si_class_type_infoE+16 .quad _ZTSN6thrust6system12system_errorE .quad _ZTISt13runtime_error .size _ZTIN6thrust6system12system_errorE, 24 .type _ZTVN6thrust6system12system_errorE,@object # @_ZTVN6thrust6system12system_errorE .section .rodata._ZTVN6thrust6system12system_errorE,"aG",@progbits,_ZTVN6thrust6system12system_errorE,comdat .weak _ZTVN6thrust6system12system_errorE .p2align 3, 0x0 _ZTVN6thrust6system12system_errorE: .quad 0 .quad _ZTIN6thrust6system12system_errorE .quad _ZN6thrust6system12system_errorD2Ev .quad _ZN6thrust6system12system_errorD0Ev .quad _ZNK6thrust6system12system_error4whatEv .size _ZTVN6thrust6system12system_errorE, 40 .type .L.str.17,@object # @.str.17 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.17: .asciz "parallel_for failed" .size .L.str.17, 20 .type .L.str.18,@object # @.str.18 .L.str.18: .asciz "parallel_for: failed to synchronize" .size .L.str.18, 36 .type _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,@object # @_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .section .rodata._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,"aG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,comdat .weak _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .p2align 3, 0x0 _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_: .quad _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .size _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, 8 .type .L.str.19,@object # @.str.19 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.19: .asciz "__copy::trivial_device_copy H->D: failed" .size .L.str.19, 41 .type _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,@object # @_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .section .rodata._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,"aG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,comdat .weak _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .p2align 3, 0x0 _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_: .quad _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .size _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_, 8 .type .L.str.20,@object # @.str.20 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.20: .asciz "trivial_device_copy D->H failed" .size .L.str.20, 32 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_" .size .L__unnamed_1, 128 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_" .size .L__unnamed_2, 227 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "\nUsage: ./ThrustVectorAdd_Template\302\240-e\302\240<expected.raw>\302\240-i\302\240<input0.raw> , <input1.raw>\302\240-o\302\240<output.raw> -t\302\240vector\n" .size .Lstr, 118 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __gxx_personality_v0 .addrsig_sym _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .addrsig_sym _ZN6thrust11hip_rocprim14__parallel_for21__device_stub__kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Unwind_Resume .addrsig_sym _ZZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .addrsig_sym _ZGVZN6thrust2mr19get_global_resourceINS_26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS9_EENS_11use_defaultEEEEEEEEEPT_vE8resource .addrsig_sym __dso_handle .addrsig_sym _ZTVN10__cxxabiv120__si_class_type_infoE .addrsig_sym _ZTSN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE .addrsig_sym _ZTSN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .addrsig_sym _ZTIN6thrust2mr15memory_resourceINS_10device_ptrIvEEEE .addrsig_sym _ZTIN6thrust26device_ptr_memory_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS7_EENS_11use_defaultEEEEEEE .addrsig_sym _ZZN6thrust2mr19get_global_resourceINS_6system3hip6detail19hip_memory_resourceIXadL_Z9hipMallocEEXadL_Z7hipFreeEENS_7pointerIvNS_11hip_rocprim3tagENS_16tagged_referenceIvS8_EENS_11use_defaultEEEEEEEPT_vE8resource .addrsig_sym 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_ZZN6thrust6system12hip_categoryEvE6result .addrsig_sym _ZGVZN6thrust6system12hip_categoryEvE6result .addrsig_sym _ZTSN6thrust6system11hip_rocprim6detail18hip_error_categoryE .addrsig_sym _ZTSN6thrust6system14error_categoryE .addrsig_sym _ZTIN6thrust6system14error_categoryE .addrsig_sym _ZTIN6thrust6system11hip_rocprim6detail18hip_error_categoryE .addrsig_sym _ZZN6thrust6system15system_categoryEvE6result .addrsig_sym _ZGVZN6thrust6system15system_categoryEvE6result .addrsig_sym _ZTSN6thrust6system6detail21system_error_categoryE .addrsig_sym _ZTIN6thrust6system6detail21system_error_categoryE .addrsig_sym _ZZN6thrust6system16generic_categoryEvE6result .addrsig_sym _ZGVZN6thrust6system16generic_categoryEvE6result .addrsig_sym _ZTSN6thrust6system6detail22generic_error_categoryE .addrsig_sym _ZTIN6thrust6system6detail22generic_error_categoryE .addrsig_sym _ZZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .addrsig_sym _ZGVZNK6thrust6system6detail22generic_error_category7messageB5cxx11EiE11unknown_errB5cxx11 .addrsig_sym _ZTSN6thrust6system12system_errorE .addrsig_sym _ZTISt13runtime_error .addrsig_sym _ZTIN6thrust6system12system_errorE .addrsig_sym _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .addrsig_sym _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .section .text._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,comdat .protected _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ ; -- Begin function _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .globl _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .p2align 8 .type _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,@function _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_: ; @_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ ; %bb.0: s_load_b128 s[4:7], s[0:1], 0x10 s_lshl_b32 s2, s15, 8 s_waitcnt lgkmcnt(0) s_add_u32 s2, s2, s6 s_addc_u32 s3, 0, s7 s_sub_u32 s4, s4, s2 s_subb_u32 s5, s5, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_u64_e64 s5, 0x100, s[4:5] s_and_b32 s5, s5, exec_lo s_cselect_b32 s4, s4, 0x100 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_cmp_gt_u32_e32 vcc_lo, s4, v0 s_cmpk_eq_i32 s4, 0x100 s_cselect_b32 s4, -1, 0 s_or_b32 s4, s4, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s5, s4 s_cbranch_execz .LBB0_2 ; %bb.1: ; %.critedge24.sink.split s_clause 0x1 s_load_b64 s[4:5], s[0:1], 0x0 s_load_b32 s6, s[0:1], 0x8 v_lshlrev_b32_e32 v0, 2, v0 s_lshl_b64 s[0:1], s[2:3], 2 s_waitcnt lgkmcnt(0) s_add_u32 s0, s4, s0 s_addc_u32 s1, s5, s1 v_add_co_u32 v0, s0, s0, v0 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v1, null, s1, 0, s0 v_mov_b32_e32 v2, s6 flat_store_b32 v[0:1], v2 .LBB0_2: ; %.critedge24 s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 32 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 3 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_,comdat .Lfunc_end0: .size _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_, .Lfunc_end0-_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 168 ; NumSgprs: 18 ; NumVgprs: 3 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 3 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .section .text._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,comdat .protected _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ ; -- Begin function _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .globl _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .p2align 8 .type _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,@function _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_: ; @_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ ; %bb.0: s_clause 0x2 s_load_b128 s[8:11], s[0:1], 0x20 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 s_lshl_b32 s2, s15, 8 s_waitcnt lgkmcnt(0) s_add_u32 s2, s2, s10 s_addc_u32 s3, 0, s11 s_sub_u32 s8, s8, s2 s_subb_u32 s9, s9, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_gt_i64_e64 s9, 0x100, s[8:9] s_and_b32 s9, s9, exec_lo s_cselect_b32 s9, s8, 0x100 s_mov_b32 s8, -1 s_cmpk_lg_i32 s9, 0x100 s_cbranch_scc0 .LBB1_4 ; %bb.1: s_mov_b32 s8, exec_lo v_cmpx_gt_u32_e64 s9, v0 s_cbranch_execz .LBB1_3 ; %bb.2: v_add_co_u32 v1, s9, s2, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_ci_u32_e64 v2, null, s3, 0, s9 v_lshlrev_b64 v[1:2], 2, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s4, v1 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo v_add_co_u32 v5, vcc_lo, s6, v1 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo v_add_co_u32 v1, vcc_lo, s0, v1 flat_load_b32 v3, v[3:4] flat_load_b32 v4, v[5:6] v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo s_waitcnt vmcnt(0) lgkmcnt(0) v_add_f32_e32 v3, v3, v4 flat_store_b32 v[1:2], v3 .LBB1_3: ; %Flow s_or_b32 exec_lo, exec_lo, s8 s_mov_b32 s8, 0 .LBB1_4: ; %Flow36 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s8 s_cbranch_vccnz .LBB1_6 ; %bb.5: ; %.critedge v_add_co_u32 v0, s2, s2, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_ci_u32_e64 v1, null, s3, 0, s2 v_lshlrev_b64 v[0:1], 2, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, s4, v0 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 flat_load_b32 v2, v[2:3] flat_load_b32 v3, v[4:5] v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) lgkmcnt(0) v_add_f32_e32 v2, v2, v3 flat_store_b32 v[0:1], v2 .LBB1_6: ; %.critedge24 s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 48 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,"axG",@progbits,_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_,comdat .Lfunc_end1: .size _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_, .Lfunc_end1-_ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 332 ; NumSgprs: 18 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 16 .value_kind: by_value - .offset: 16 .size: 8 .value_kind: by_value - .offset: 24 .size: 8 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 32 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 256 .name: _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_20__uninitialized_fill7functorINS_10device_ptrIfEEfEEmLj1EEEvT0_T1_S9_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 3 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 32 .value_kind: by_value - .offset: 32 .size: 8 .value_kind: by_value - .offset: 40 .size: 8 .value_kind: by_value .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 48 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 256 .name: _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagENS_4plusIfEENS3_21always_true_predicateEEElLj1EEEvT0_T1_SG_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
5153230c4e323f7f08bef9d2f90e75f84b79fe49
// This example demonstrate how use the printf() function inside a kernel. // In order to do that the code must be generate to architetures with compute capability greater than 2.0 // Compile: // nvcc -gencode=arch=compute_30,code=sm_30 -g -o helloGPU helloGPU.cu #include <stdio.h> __global__ void helloCUDA(float f) { printf("Hello world from thread %d -- My value of f = %f\n", threadIdx.x, f); } int main() { helloCUDA<<<1, 5>>>(1.2345f); cudaDeviceReset(); return 0; }
.file "tmpxft_002c4757_00000000-6_helloGPU.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z27__device_stub__Z9helloCUDAff .type _Z27__device_stub__Z9helloCUDAff, @function _Z27__device_stub__Z9helloCUDAff: .LFB2052: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movss %xmm0, 12(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 12(%rsp), %rax leaq 44(%rsp), %rsi movl $1, 40(%rsp) movq %rax, 80(%rsp) leaq 32(%rsp), %rdi movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq _Z9helloCUDAf(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L2: movq 88(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z27__device_stub__Z9helloCUDAff, .-_Z27__device_stub__Z9helloCUDAff .globl _Z9helloCUDAf .type _Z9helloCUDAf, @function _Z9helloCUDAf: .LFB2053: .cfi_startproc endbr64 jmp _Z27__device_stub__Z9helloCUDAff .cfi_endproc .LFE2053: .size _Z9helloCUDAf, .-_Z9helloCUDAf .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 subq $40, %rsp .cfi_def_cfa_offset 48 xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx movabsq $4294967301, %rdx movl $1, %esi movabsq $4294967297, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 movss .LC0(%rip), %xmm0 call _Z27__device_stub__Z9helloCUDAff .L9: call cudaDeviceReset@PLT xorl %eax, %eax addq $40, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1,"aMS",@progbits,1 .LC1: .string "_Z9helloCUDAf" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC1(%rip), %rdx movq %rax, %rdi leaq _Z9helloCUDAf(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC0: .long 1067320345 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z9helloCUDAf .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fc600078e00ff */ /*0010*/ S2R R10, SR_TID.X ; /* 0x00000000000a7919 */ /* 0x000e220000002100 */ /*0020*/ F2F.F64.F32 R2, c[0x0][0x160] ; /* 0x0000580000027b10 */ /* 0x000e620000201800 */ /*0030*/ IADD3 R1, R1, -0x10, RZ ; /* 0xfffffff001017810 */ /* 0x000fe20007ffe0ff */ /*0040*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe200078e00ff */ /*0050*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe20000000f00 */ /*0060*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x000fe200078e00ff */ /*0070*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fe40007f1e0ff */ /*0080*/ LDC.64 R8, c[0x4][R0] ; /* 0x0100000000087b82 */ /* 0x0004e60000000a00 */ /*0090*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */ /* 0x000fe200000e06ff */ /*00a0*/ STL.64 [R1+0x8], R2 ; /* 0x0000080201007387 */ /* 0x0025e80000100a00 */ /*00b0*/ STL [R1], R10 ; /* 0x0000000a01007387 */ /* 0x0015e60000100800 */ /*00c0*/ LEPC R2 ; /* 0x000000000002734e */ /* 0x004fe40000000000 */ /*00d0*/ MOV R11, 0x140 ; /* 0x00000140000b7802 */ /* 0x000fe40000000f00 */ /*00e0*/ MOV R20, 0xc0 ; /* 0x000000c000147802 */ /* 0x000fc40000000f00 */ /*00f0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fe40000000f00 */ /*0100*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x000fe40000000f00 */ /*0110*/ IADD3 R20, P0, P1, -R20, R11, R2 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e102 */ /*0120*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2503 */ /*0130*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */ /* 0x008fea0003c00000 */ /*0140*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0150*/ BRA 0x150; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
// This example demonstrate how use the printf() function inside a kernel. // In order to do that the code must be generate to architetures with compute capability greater than 2.0 // Compile: // nvcc -gencode=arch=compute_30,code=sm_30 -g -o helloGPU helloGPU.cu #include <hip/hip_runtime.h> #include <stdio.h> __global__ void helloCUDA(float f) { printf("Hello world from thread %d -- My value of f = %f\n", threadIdx.x, f); } int main() { helloCUDA<<<1, 5>>>(1.2345f); hipDeviceReset(); return 0; }
.text .file "helloGPU.hip" .globl _Z24__device_stub__helloCUDAf # -- Begin function _Z24__device_stub__helloCUDAf .type _Z24__device_stub__helloCUDAf,@function _Z24__device_stub__helloCUDAf: # @_Z24__device_stub__helloCUDAf .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movss %xmm0, (%rax) leaq 16(%rsp), %rbx movq %rax, (%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 40(%rsp), %r12 leaq 32(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9helloCUDAf, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z24__device_stub__helloCUDAf, .Lfunc_end0-_Z24__device_stub__helloCUDAf .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function main .LCPI1_0: .long 0x3f9e0419 # float 1.23450005 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movabsq $4294967297, %rdi # imm = 0x100000001 leaq 4(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movss .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero callq _Z24__device_stub__helloCUDAf .LBB1_2: callq hipDeviceReset xorl %eax, %eax popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9helloCUDAf, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z9helloCUDAf,@object # @_Z9helloCUDAf .section .rodata,"a",@progbits .globl _Z9helloCUDAf .p2align 3, 0x0 _Z9helloCUDAf: .quad _Z24__device_stub__helloCUDAf .size _Z9helloCUDAf, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z9helloCUDAf" .size .L__unnamed_1, 14 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z24__device_stub__helloCUDAf .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z9helloCUDAf .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z9helloCUDAf ; -- Begin function _Z9helloCUDAf .globl _Z9helloCUDAf .p2align 8 .type _Z9helloCUDAf,@function _Z9helloCUDAf: ; @_Z9helloCUDAf ; %bb.0: s_load_b64 s[4:5], s[0:1], 0x58 v_mbcnt_lo_u32_b32 v29, -1, 0 v_mov_b32_e32 v7, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v5, v29 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s2, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s2, s2, v5 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_6 ; %bb.1: v_mov_b32_e32 v1, 0 s_mov_b32 s6, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[9:10], v1, s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v1, s[4:5] offset:40 global_load_b64 v[6:7], v1, s[4:5] s_waitcnt vmcnt(1) v_and_b32_e32 v2, v2, v9 v_and_b32_e32 v3, v3, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v4, v2, 24 v_mul_lo_u32 v3, v3, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v4, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo global_load_b64 v[7:8], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[7:8], v[9:10] s_cbranch_execz .LBB0_5 ; %bb.2: ; %.preheader3.i.i.i.preheader s_mov_b32 s7, 0 .LBB0_3: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[2:3], v1, s[4:5] offset:40 global_load_b64 v[11:12], v1, s[4:5] v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v2, v9 v_and_b32_e32 v8, v3, v10 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12] v_mov_b32_e32 v2, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3] v_mov_b32_e32 v7, v3 global_load_b64 v[7:8], v[6:7], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB0_3 ; %bb.4: ; %Flow365 s_or_b32 exec_lo, exec_lo, s7 .LBB0_5: ; %Flow367 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB0_6: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s3 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s6, v7 v_readfirstlane_b32 s7, v8 s_mov_b32 s12, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[9:10], v6, s[4:5] offset:40 global_load_b128 v[1:4], v6, s[4:5] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v9 v_readfirstlane_b32 s9, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s3, s9, 24 s_mul_hi_u32 s10, s8, 24 s_mul_i32 s11, s8, 24 s_and_saveexec_b32 s13, s2 s_cbranch_execz .LBB0_8 ; %bb.7: v_dual_mov_b32 v7, s12 :: v_dual_mov_b32 v8, v6 s_add_i32 s12, s10, s3 s_waitcnt vmcnt(0) v_add_co_u32 v11, vcc_lo, v1, s11 v_add_co_ci_u32_e32 v12, vcc_lo, s12, v2, vcc_lo v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1 global_store_b128 v[11:12], v[7:10], off offset:8 .LBB0_8: s_or_b32 exec_lo, exec_lo, s13 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[7:8], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v3, s8 v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v9, vcc_lo, v3, v7 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_add_co_ci_u32_e32 v10, vcc_lo, v4, v8, vcc_lo v_dual_mov_b32 v5, 33 :: v_dual_mov_b32 v8, v6 v_mov_b32_e32 v7, v6 v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v14, s15 v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s14 s_clause 0x3 global_store_b128 v[9:10], v[5:8], off global_store_b128 v[9:10], v[11:14], off offset:16 global_store_b128 v[9:10], v[11:14], off offset:32 global_store_b128 v[9:10], v[11:14], off offset:48 s_and_saveexec_b32 s8, s2 s_cbranch_execz .LBB0_15 ; %bb.9: v_mov_b32_e32 v11, 0 s_mov_b32 s9, exec_lo s_clause 0x1 global_load_b64 v[14:15], v11, s[4:5] offset:32 glc global_load_b64 v[3:4], v11, s[4:5] offset:40 v_dual_mov_b32 v12, s6 :: v_dual_mov_b32 v13, s7 s_waitcnt vmcnt(0) v_and_b32_e32 v4, s7, v4 v_and_b32_e32 v3, s6, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v4, v4, 24 v_mul_hi_u32 v5, v3, 24 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v5, v4 v_add_co_u32 v7, vcc_lo, v1, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, v2, v4, vcc_lo global_store_b64 v[7:8], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v11, v[12:15], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[14:15] s_cbranch_execz .LBB0_11 .LBB0_10: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[3:6], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s12, vcc_lo, s12 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s12 s_cbranch_execnz .LBB0_10 .LBB0_11: ; %Flow363 s_or_b32 exec_lo, exec_lo, s9 v_mov_b32_e32 v6, 0 s_mov_b32 s12, exec_lo s_mov_b32 s9, exec_lo v_mbcnt_lo_u32_b32 v5, s12, 0 global_load_b64 v[3:4], v6, s[4:5] offset:16 v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_13 ; %bb.12: s_bcnt1_i32_b32 s12, s12 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v5, s12 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[5:6], off offset:8 .LBB0_13: s_or_b32 exec_lo, exec_lo, s9 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_15 ; %bb.14: global_load_b32 v3, v[3:4], off offset:24 v_mov_b32_e32 v4, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s9, v3 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[3:4], off s_and_b32 m0, s9, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_15: ; %Flow364 s_or_b32 exec_lo, exec_lo, s8 s_add_i32 s10, s10, s3 v_add_co_u32 v1, vcc_lo, v1, s11 v_add_co_ci_u32_e32 v2, vcc_lo, s10, v2, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo .LBB0_16: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v3, 1 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_18 ; %bb.17: ; in Loop: Header=BB0_16 Depth=1 global_load_b32 v3, v[1:2], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v3, 1, v3 .LBB0_18: ; in Loop: Header=BB0_16 Depth=1 s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s3, v3 s_cmp_eq_u32 s3, 0 s_cbranch_scc1 .LBB0_20 ; %bb.19: ; in Loop: Header=BB0_16 Depth=1 s_mov_b32 s3, 0 s_sleep 1 s_branch .LBB0_21 .LBB0_20: ; in Loop: Header=BB0_16 Depth=1 s_mov_b32 s3, -1 .LBB0_21: ; %Flow358 ; in Loop: Header=BB0_16 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB0_16 ; %bb.22: global_load_b64 v[1:2], v[9:10], off s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_26 ; %bb.23: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[5:6], v9, s[4:5] offset:40 global_load_b64 v[10:11], v9, s[4:5] offset:24 glc global_load_b64 v[7:8], v9, s[4:5] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v5, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v12, s6 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] v_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12 v_and_b32_e32 v6, v4, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v3, v5 v_mul_lo_u32 v6, v6, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v5, 24 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v6, v12, v6 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, v7, v5 v_mov_b32_e32 v5, v10 v_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo v_mov_b32_e32 v6, v11 global_store_b64 v[7:8], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_26 ; %bb.24: ; %.preheader.i.i.i.preheader s_mov_b32 s2, 0 .LBB0_25: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[7:8], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6] v_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11 s_or_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB0_25 .LBB0_26: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s3 s_getpc_b64 s[6:7] s_add_u32 s6, s6, .str@rel32@lo+4 s_addc_u32 s7, s7, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc0 .LBB0_112 ; %bb.27: s_waitcnt vmcnt(0) v_dual_mov_b32 v31, 0 :: v_dual_and_b32 v32, 2, v1 v_dual_mov_b32 v4, v2 :: v_dual_and_b32 v3, -3, v1 v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1 s_mov_b64 s[8:9], 50 .LBB0_28: ; =>This Loop Header: Depth=1 ; Child Loop BB0_31 Depth 2 ; Child Loop BB0_38 Depth 2 ; Child Loop BB0_46 Depth 2 ; Child Loop BB0_54 Depth 2 ; Child Loop BB0_62 Depth 2 ; Child Loop BB0_70 Depth 2 ; Child Loop BB0_78 Depth 2 ; Child Loop BB0_86 Depth 2 ; Child Loop BB0_94 Depth 2 ; Child Loop BB0_100 Depth 2 ; Child Loop BB0_109 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s2, s[8:9], 56 ; implicit-def: $vgpr11_vgpr12 ; implicit-def: $sgpr17 s_and_b32 s2, s2, exec_lo s_cselect_b32 s10, s8, 56 s_cselect_b32 s11, s9, 0 s_cmp_gt_u32 s10, 7 s_mov_b32 s2, -1 s_cbranch_scc1 .LBB0_33 ; %bb.29: ; in Loop: Header=BB0_28 Depth=1 v_mov_b32_e32 v11, 0 v_mov_b32_e32 v12, 0 s_cmp_eq_u32 s10, 0 s_cbranch_scc1 .LBB0_32 ; %bb.30: ; %.preheader31.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_lshl_b64 s[2:3], s[10:11], 3 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], s[6:7] .LBB0_31: ; %.preheader31.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v5, v31, s[14:15] s_waitcnt vmcnt(0) v_and_b32_e32 v30, 0xffff, v5 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[5:6], s12, v[30:31] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_add_u32 s14, s14, 1 s_addc_u32 s15, s15, 0 s_cmp_lg_u32 s2, s12 v_or_b32_e32 v11, v5, v11 v_or_b32_e32 v12, v6, v12 s_cbranch_scc1 .LBB0_31 .LBB0_32: ; %Flow334 ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s2, 0 s_mov_b32 s17, 0 .LBB0_33: ; %Flow336 ; in Loop: Header=BB0_28 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s2 s_mov_b64 s[2:3], s[6:7] s_cbranch_vccnz .LBB0_35 ; %bb.34: ; in Loop: Header=BB0_28 Depth=1 global_load_b64 v[11:12], v31, s[6:7] s_add_i32 s17, s10, -8 s_add_u32 s2, s6, 8 s_addc_u32 s3, s7, 0 .LBB0_35: ; %.loopexit32.i ; in Loop: Header=BB0_28 Depth=1 s_cmp_gt_u32 s17, 7 s_cbranch_scc1 .LBB0_40 ; %bb.36: ; in Loop: Header=BB0_28 Depth=1 v_mov_b32_e32 v13, 0 v_mov_b32_e32 v14, 0 s_cmp_eq_u32 s17, 0 s_cbranch_scc1 .LBB0_39 ; %bb.37: ; %.preheader29.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_38: ; %.preheader29.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s2, s14 s_addc_u32 s19, s3, s15 s_add_u32 s14, s14, 1 global_load_u8 v5, v31, s[18:19] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v30, 0xffff, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[5:6], s12, v[30:31] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s17, s14 v_or_b32_e32 v13, v5, v13 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v14, v6, v14 s_cbranch_scc1 .LBB0_38 .LBB0_39: ; %Flow329 ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s16, 0 s_branch .LBB0_41 .LBB0_40: ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $vgpr13_vgpr14 ; implicit-def: $sgpr16 .LBB0_41: ; %Flow331 ; in Loop: Header=BB0_28 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_43 ; %bb.42: ; in Loop: Header=BB0_28 Depth=1 global_load_b64 v[13:14], v31, s[2:3] s_add_i32 s16, s17, -8 s_add_u32 s2, s2, 8 s_addc_u32 s3, s3, 0 .LBB0_43: ; %.loopexit30.i ; in Loop: Header=BB0_28 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_48 ; %bb.44: ; in Loop: Header=BB0_28 Depth=1 v_mov_b32_e32 v15, 0 v_mov_b32_e32 v16, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_47 ; %bb.45: ; %.preheader27.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_46: ; %.preheader27.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s2, s14 s_addc_u32 s19, s3, s15 s_add_u32 s14, s14, 1 global_load_u8 v5, v31, s[18:19] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v30, 0xffff, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[5:6], s12, v[30:31] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s16, s14 v_or_b32_e32 v15, v5, v15 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v16, v6, v16 s_cbranch_scc1 .LBB0_46 .LBB0_47: ; %Flow324 ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s17, 0 s_branch .LBB0_49 .LBB0_48: ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $sgpr17 .LBB0_49: ; %Flow326 ; in Loop: Header=BB0_28 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_51 ; %bb.50: ; in Loop: Header=BB0_28 Depth=1 global_load_b64 v[15:16], v31, s[2:3] s_add_i32 s17, s16, -8 s_add_u32 s2, s2, 8 s_addc_u32 s3, s3, 0 .LBB0_51: ; %.loopexit28.i ; in Loop: Header=BB0_28 Depth=1 s_cmp_gt_u32 s17, 7 s_cbranch_scc1 .LBB0_56 ; %bb.52: ; in Loop: Header=BB0_28 Depth=1 v_mov_b32_e32 v17, 0 v_mov_b32_e32 v18, 0 s_cmp_eq_u32 s17, 0 s_cbranch_scc1 .LBB0_55 ; %bb.53: ; %.preheader25.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_54: ; %.preheader25.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s2, s14 s_addc_u32 s19, s3, s15 s_add_u32 s14, s14, 1 global_load_u8 v5, v31, s[18:19] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v30, 0xffff, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[5:6], s12, v[30:31] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s17, s14 v_or_b32_e32 v17, v5, v17 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v18, v6, v18 s_cbranch_scc1 .LBB0_54 .LBB0_55: ; %Flow319 ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s16, 0 s_branch .LBB0_57 .LBB0_56: ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $vgpr17_vgpr18 ; implicit-def: $sgpr16 .LBB0_57: ; %Flow321 ; in Loop: Header=BB0_28 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_59 ; %bb.58: ; in Loop: Header=BB0_28 Depth=1 global_load_b64 v[17:18], v31, s[2:3] s_add_i32 s16, s17, -8 s_add_u32 s2, s2, 8 s_addc_u32 s3, s3, 0 .LBB0_59: ; %.loopexit26.i ; in Loop: Header=BB0_28 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_64 ; %bb.60: ; in Loop: Header=BB0_28 Depth=1 v_mov_b32_e32 v19, 0 v_mov_b32_e32 v20, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_63 ; %bb.61: ; %.preheader23.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_62: ; %.preheader23.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s2, s14 s_addc_u32 s19, s3, s15 s_add_u32 s14, s14, 1 global_load_u8 v5, v31, s[18:19] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v30, 0xffff, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[5:6], s12, v[30:31] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s16, s14 v_or_b32_e32 v19, v5, v19 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v20, v6, v20 s_cbranch_scc1 .LBB0_62 .LBB0_63: ; %Flow314 ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s17, 0 s_branch .LBB0_65 .LBB0_64: ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $sgpr17 .LBB0_65: ; %Flow316 ; in Loop: Header=BB0_28 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_67 ; %bb.66: ; in Loop: Header=BB0_28 Depth=1 global_load_b64 v[19:20], v31, s[2:3] s_add_i32 s17, s16, -8 s_add_u32 s2, s2, 8 s_addc_u32 s3, s3, 0 .LBB0_67: ; %.loopexit24.i ; in Loop: Header=BB0_28 Depth=1 s_cmp_gt_u32 s17, 7 s_cbranch_scc1 .LBB0_72 ; %bb.68: ; in Loop: Header=BB0_28 Depth=1 v_mov_b32_e32 v21, 0 v_mov_b32_e32 v22, 0 s_cmp_eq_u32 s17, 0 s_cbranch_scc1 .LBB0_71 ; %bb.69: ; %.preheader21.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], 0 .LBB0_70: ; %.preheader21.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s2, s14 s_addc_u32 s19, s3, s15 s_add_u32 s14, s14, 1 global_load_u8 v5, v31, s[18:19] s_addc_u32 s15, s15, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v30, 0xffff, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[5:6], s12, v[30:31] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s17, s14 v_or_b32_e32 v21, v5, v21 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v22, v6, v22 s_cbranch_scc1 .LBB0_70 .LBB0_71: ; %Flow309 ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, 0 s_mov_b32 s16, 0 s_branch .LBB0_73 .LBB0_72: ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, -1 ; implicit-def: $vgpr21_vgpr22 ; implicit-def: $sgpr16 .LBB0_73: ; %Flow311 ; in Loop: Header=BB0_28 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_75 ; %bb.74: ; in Loop: Header=BB0_28 Depth=1 global_load_b64 v[21:22], v31, s[2:3] s_add_i32 s16, s17, -8 s_add_u32 s2, s2, 8 s_addc_u32 s3, s3, 0 .LBB0_75: ; %.loopexit22.i ; in Loop: Header=BB0_28 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_80 ; %bb.76: ; in Loop: Header=BB0_28 Depth=1 v_mov_b32_e32 v23, 0 v_mov_b32_e32 v24, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_79 ; %bb.77: ; %.preheader.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b64 s[12:13], 0 s_mov_b64 s[14:15], s[2:3] .LBB0_78: ; %.preheader.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v5, v31, s[14:15] s_add_i32 s16, s16, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v30, 0xffff, v5 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[5:6], s12, v[30:31] s_add_u32 s12, s12, 8 s_addc_u32 s13, s13, 0 s_add_u32 s14, s14, 1 s_addc_u32 s15, s15, 0 s_cmp_lg_u32 s16, 0 v_or_b32_e32 v23, v5, v23 v_or_b32_e32 v24, v6, v24 s_cbranch_scc1 .LBB0_78 .LBB0_79: ; %Flow304 ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, 0 s_branch .LBB0_81 .LBB0_80: ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s12, -1 .LBB0_81: ; %Flow306 ; in Loop: Header=BB0_28 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s12 s_cbranch_vccnz .LBB0_83 ; %bb.82: ; in Loop: Header=BB0_28 Depth=1 global_load_b64 v[23:24], v31, s[2:3] .LBB0_83: ; %.loopexit.i ; in Loop: Header=BB0_28 Depth=1 s_waitcnt vmcnt(0) v_dual_mov_b32 v30, v29 :: v_dual_mov_b32 v5, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s2, v30 v_mov_b32_e32 v6, 0 v_cmp_eq_u32_e64 s2, s2, v30 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_89 ; %bb.84: ; in Loop: Header=BB0_28 Depth=1 global_load_b64 v[27:28], v31, s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[5:6], v31, s[4:5] offset:40 global_load_b64 v[9:10], v31, s[4:5] s_mov_b32 s12, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v6, v6, v28 v_and_b32_e32 v5, v5, v27 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v6, v6, 24 v_mul_hi_u32 v25, v5, 24 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v6, v25, v6 s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, v5 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v6, vcc_lo, v10, v6, vcc_lo global_load_b64 v[25:26], v[5:6], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[5:6], v31, v[25:28], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[5:6], v[27:28] s_cbranch_execz .LBB0_88 ; %bb.85: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s13, 0 .LBB0_86: ; %.preheader3.i.i19.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[9:10], v31, s[4:5] offset:40 global_load_b64 v[25:26], v31, s[4:5] v_dual_mov_b32 v28, v6 :: v_dual_mov_b32 v27, v5 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v9, v9, v27 s_waitcnt vmcnt(0) v_mad_u64_u32 v[5:6], null, v9, 24, v[25:26] v_and_b32_e32 v25, v10, v28 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v25, 24, v[6:7] v_mov_b32_e32 v6, v9 global_load_b64 v[25:26], v[5:6], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[5:6], v31, v[25:28], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[27:28] s_or_b32 s13, vcc_lo, s13 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_86 ; %bb.87: ; %Flow299 ; in Loop: Header=BB0_28 Depth=1 s_or_b32 exec_lo, exec_lo, s13 .LBB0_88: ; %Flow301 ; in Loop: Header=BB0_28 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s12 .LBB0_89: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_28 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s3 s_clause 0x1 global_load_b64 v[9:10], v31, s[4:5] offset:40 global_load_b128 v[25:28], v31, s[4:5] v_readfirstlane_b32 s12, v5 v_readfirstlane_b32 s13, v6 s_mov_b32 s18, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s14, v9 v_readfirstlane_b32 s15, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[14:15], s[12:13], s[14:15] s_mul_i32 s3, s15, 24 s_mul_hi_u32 s16, s14, 24 s_mul_i32 s17, s14, 24 s_and_saveexec_b32 s19, s2 s_cbranch_execz .LBB0_91 ; %bb.90: ; in Loop: Header=BB0_28 Depth=1 v_dual_mov_b32 v5, s18 :: v_dual_mov_b32 v6, v31 s_add_i32 s18, s16, s3 s_waitcnt vmcnt(0) v_add_co_u32 v9, vcc_lo, v25, s17 v_add_co_ci_u32_e32 v10, vcc_lo, s18, v26, vcc_lo global_store_b128 v[9:10], v[5:8], off offset:8 .LBB0_91: ; in Loop: Header=BB0_28 Depth=1 s_or_b32 exec_lo, exec_lo, s19 v_cmp_gt_u64_e64 vcc_lo, s[8:9], 56 v_or_b32_e32 v5, 0, v4 v_or_b32_e32 v6, v3, v32 s_lshl_b64 s[14:15], s[14:15], 12 s_lshl_b32 s18, s10, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s18, s18, 28 v_dual_cndmask_b32 v10, v5, v4 :: v_dual_cndmask_b32 v5, v6, v3 v_lshlrev_b64 v[3:4], 6, v[30:31] s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v27, s14 v_add_co_ci_u32_e32 v28, vcc_lo, s15, v28, vcc_lo s_and_b32 s18, s18, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v27, vcc_lo, v6, v3 v_and_or_b32 v9, 0xffffff1f, v5, s18 v_add_co_ci_u32_e32 v28, vcc_lo, v28, v4, vcc_lo s_clause 0x3 global_store_b128 v[27:28], v[9:12], off global_store_b128 v[27:28], v[13:16], off offset:16 global_store_b128 v[27:28], v[17:20], off offset:32 global_store_b128 v[27:28], v[21:24], off offset:48 s_and_saveexec_b32 s14, s2 s_cbranch_execz .LBB0_99 ; %bb.92: ; in Loop: Header=BB0_28 Depth=1 s_clause 0x1 global_load_b64 v[13:14], v31, s[4:5] offset:32 glc global_load_b64 v[3:4], v31, s[4:5] offset:40 v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v12, s13 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v3 v_readfirstlane_b32 s19, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[12:13] s_mul_i32 s15, s19, 24 s_mul_hi_u32 s19, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s19, s19, s15 v_add_co_u32 v9, vcc_lo, v25, s18 v_add_co_ci_u32_e32 v10, vcc_lo, s19, v26, vcc_lo s_mov_b32 s15, exec_lo global_store_b64 v[9:10], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[5:6], v31, v[11:14], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[5:6], v[13:14] s_cbranch_execz .LBB0_95 ; %bb.93: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s18, 0 .LBB0_94: ; %.preheader1.i.i17.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v3, s12 :: v_dual_mov_b32 v4, s13 s_sleep 1 global_store_b64 v[9:10], v[5:6], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v31, v[3:6], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6] v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3 s_or_b32 s18, vcc_lo, s18 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s18 s_cbranch_execnz .LBB0_94 .LBB0_95: ; %Flow297 ; in Loop: Header=BB0_28 Depth=1 s_or_b32 exec_lo, exec_lo, s15 global_load_b64 v[3:4], v31, s[4:5] offset:16 s_mov_b32 s18, exec_lo s_mov_b32 s15, exec_lo v_mbcnt_lo_u32_b32 v5, s18, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v5 s_cbranch_execz .LBB0_97 ; %bb.96: ; in Loop: Header=BB0_28 Depth=1 s_bcnt1_i32_b32 s18, s18 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v30, s18 s_waitcnt vmcnt(0) global_atomic_add_u64 v[3:4], v[30:31], off offset:8 .LBB0_97: ; in Loop: Header=BB0_28 Depth=1 s_or_b32 exec_lo, exec_lo, s15 s_waitcnt vmcnt(0) global_load_b64 v[5:6], v[3:4], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] s_cbranch_vccnz .LBB0_99 ; %bb.98: ; in Loop: Header=BB0_28 Depth=1 global_load_b32 v30, v[3:4], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s15, v30 s_waitcnt_vscnt null, 0x0 global_store_b64 v[5:6], v[30:31], off s_and_b32 m0, s15, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_99: ; %Flow298 ; in Loop: Header=BB0_28 Depth=1 s_or_b32 exec_lo, exec_lo, s14 s_add_i32 s16, s16, s3 v_add_co_u32 v3, vcc_lo, v25, s17 v_add_co_ci_u32_e32 v4, vcc_lo, s16, v26, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, v3, 20 v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo .LBB0_100: ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v5, 1 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_102 ; %bb.101: ; in Loop: Header=BB0_100 Depth=2 global_load_b32 v5, v[3:4], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v5, 1, v5 .LBB0_102: ; in Loop: Header=BB0_100 Depth=2 s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s3, v5 s_cmp_eq_u32 s3, 0 s_cbranch_scc1 .LBB0_104 ; %bb.103: ; in Loop: Header=BB0_100 Depth=2 s_mov_b32 s3, 0 s_sleep 1 s_branch .LBB0_105 .LBB0_104: ; in Loop: Header=BB0_100 Depth=2 s_mov_b32 s3, -1 .LBB0_105: ; %Flow292 ; in Loop: Header=BB0_100 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB0_100 ; %bb.106: ; in Loop: Header=BB0_28 Depth=1 global_load_b128 v[3:6], v[27:28], off s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_110 ; %bb.107: ; in Loop: Header=BB0_28 Depth=1 s_clause 0x2 global_load_b64 v[5:6], v31, s[4:5] offset:40 global_load_b64 v[13:14], v31, s[4:5] offset:24 glc global_load_b64 v[11:12], v31, s[4:5] s_waitcnt vmcnt(2) v_add_co_u32 v15, vcc_lo, v5, 1 v_add_co_ci_u32_e32 v16, vcc_lo, 0, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v9, vcc_lo, v15, s12 v_add_co_ci_u32_e32 v10, vcc_lo, s13, v16, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[9:10] v_dual_cndmask_b32 v10, v10, v16 :: v_dual_cndmask_b32 v9, v9, v15 v_and_b32_e32 v6, v10, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v5, v9, v5 v_mul_hi_u32 v15, v5, 24 v_mul_lo_u32 v5, v5, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v5, vcc_lo, v11, v5 v_mov_b32_e32 v11, v13 v_mul_lo_u32 v6, v6, 24 v_add_nc_u32_e32 v6, v15, v6 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v6, vcc_lo, v12, v6, vcc_lo v_mov_b32_e32 v12, v14 global_store_b64 v[5:6], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[11:12], v31, v[9:12], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[11:12], v[13:14] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_110 ; %bb.108: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_28 Depth=1 s_mov_b32 s2, 0 .LBB0_109: ; %.preheader.i.i16.i ; Parent Loop BB0_28 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[5:6], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[13:14], v31, v[9:12], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[13:14], v[11:12] v_dual_mov_b32 v11, v13 :: v_dual_mov_b32 v12, v14 s_or_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB0_109 .LBB0_110: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_28 Depth=1 s_or_b32 exec_lo, exec_lo, s3 s_sub_u32 s8, s8, s10 s_subb_u32 s9, s9, s11 s_add_u32 s6, s6, s10 s_addc_u32 s7, s7, s11 s_cmp_lg_u64 s[8:9], 0 s_cbranch_scc1 .LBB0_28 ; %bb.111: ; %Flow337 s_mov_b32 s2, 0 s_branch .LBB0_113 .LBB0_112: s_mov_b32 s2, -1 ; implicit-def: $vgpr3_vgpr4 .LBB0_113: ; %Flow352 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s2 s_cbranch_vccz .LBB0_142 ; %bb.114: s_waitcnt vmcnt(0) v_mov_b32_e32 v3, v29 v_mov_b32_e32 v9, 0 v_mov_b32_e32 v10, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s2, v3 v_cmp_eq_u32_e64 s2, s2, v3 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_120 ; %bb.115: v_mov_b32_e32 v4, 0 s_mov_b32 s6, exec_lo global_load_b64 v[7:8], v4, s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[5:6], v4, s[4:5] offset:40 global_load_b64 v[9:10], v4, s[4:5] s_waitcnt vmcnt(1) v_and_b32_e32 v5, v5, v7 v_and_b32_e32 v6, v6, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v5, 24 v_mul_lo_u32 v6, v6, 24 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v6, v11, v6 s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, v5 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v6, vcc_lo, v10, v6, vcc_lo global_load_b64 v[5:6], v[5:6], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[9:10], v4, v[5:8], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[9:10], v[7:8] s_cbranch_execz .LBB0_119 ; %bb.116: ; %.preheader3.i.i.i6.preheader s_mov_b32 s7, 0 .LBB0_117: ; %.preheader3.i.i.i6 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[4:5] offset:40 global_load_b64 v[11:12], v4, s[4:5] v_dual_mov_b32 v7, v9 :: v_dual_mov_b32 v8, v10 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v5, v5, v7 v_and_b32_e32 v6, v6, v8 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[11:12] v_mov_b32_e32 v5, v10 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[10:11], null, v6, 24, v[5:6] global_load_b64 v[5:6], v[9:10], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[9:10], v4, v[5:8], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[7:8] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB0_117 ; %bb.118: ; %Flow349 s_or_b32 exec_lo, exec_lo, s7 .LBB0_119: ; %Flow351 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB0_120: ; %.loopexit4.i.i.i1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s3 v_mov_b32_e32 v4, 0 v_readfirstlane_b32 s6, v9 v_readfirstlane_b32 s7, v10 s_mov_b32 s12, exec_lo s_clause 0x1 global_load_b64 v[11:12], v4, s[4:5] offset:40 global_load_b128 v[5:8], v4, s[4:5] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v11 v_readfirstlane_b32 s9, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s3, s9, 24 s_mul_hi_u32 s10, s8, 24 s_mul_i32 s11, s8, 24 s_and_saveexec_b32 s13, s2 s_cbranch_execz .LBB0_122 ; %bb.121: v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, v4 s_add_i32 s12, s10, s3 s_waitcnt vmcnt(0) v_add_co_u32 v13, vcc_lo, v5, s11 v_add_co_ci_u32_e32 v14, vcc_lo, s12, v6, vcc_lo v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1 global_store_b128 v[13:14], v[9:12], off offset:8 .LBB0_122: s_or_b32 exec_lo, exec_lo, s13 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[9:10], 6, v[3:4] s_waitcnt vmcnt(0) v_add_co_u32 v3, vcc_lo, v7, s8 v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v7, vcc_lo, v3, v9 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v1, 0xffffff1f, v1, 32 v_add_co_ci_u32_e32 v8, vcc_lo, v8, v10, vcc_lo v_mov_b32_e32 v3, v4 v_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v12, s15 v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, s14 s_clause 0x3 global_store_b128 v[7:8], v[1:4], off global_store_b128 v[7:8], v[9:12], off offset:16 global_store_b128 v[7:8], v[9:12], off offset:32 global_store_b128 v[7:8], v[9:12], off offset:48 s_and_saveexec_b32 s8, s2 s_cbranch_execz .LBB0_130 ; %bb.123: v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s6 v_mov_b32_e32 v13, s7 s_clause 0x1 global_load_b64 v[14:15], v11, s[4:5] offset:32 glc global_load_b64 v[1:2], v11, s[4:5] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s12, v1 v_readfirstlane_b32 s13, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[12:13], s[6:7] s_mul_i32 s9, s13, 24 s_mul_hi_u32 s13, s12, 24 s_mul_i32 s12, s12, 24 s_add_i32 s13, s13, s9 v_add_co_u32 v9, vcc_lo, v5, s12 v_add_co_ci_u32_e32 v10, vcc_lo, s13, v6, vcc_lo s_mov_b32 s9, exec_lo global_store_b64 v[9:10], v[14:15], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[3:4], v11, v[12:15], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[3:4], v[14:15] s_cbranch_execz .LBB0_126 ; %bb.124: ; %.preheader1.i.i.i4.preheader s_mov_b32 s12, 0 .LBB0_125: ; %.preheader1.i.i.i4 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v1, s6 :: v_dual_mov_b32 v2, s7 s_sleep 1 global_store_b64 v[9:10], v[3:4], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[1:2], v11, v[1:4], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[3:4] v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1 s_or_b32 s12, vcc_lo, s12 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s12 s_cbranch_execnz .LBB0_125 .LBB0_126: ; %Flow347 s_or_b32 exec_lo, exec_lo, s9 v_mov_b32_e32 v4, 0 s_mov_b32 s12, exec_lo s_mov_b32 s9, exec_lo v_mbcnt_lo_u32_b32 v3, s12, 0 global_load_b64 v[1:2], v4, s[4:5] offset:16 v_cmpx_eq_u32_e32 0, v3 s_cbranch_execz .LBB0_128 ; %bb.127: s_bcnt1_i32_b32 s12, s12 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v3, s12 s_waitcnt vmcnt(0) global_atomic_add_u64 v[1:2], v[3:4], off offset:8 .LBB0_128: s_or_b32 exec_lo, exec_lo, s9 s_waitcnt vmcnt(0) global_load_b64 v[3:4], v[1:2], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4] s_cbranch_vccnz .LBB0_130 ; %bb.129: global_load_b32 v1, v[1:2], off offset:24 v_mov_b32_e32 v2, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s9, v1 s_waitcnt_vscnt null, 0x0 global_store_b64 v[3:4], v[1:2], off s_and_b32 m0, s9, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_130: ; %Flow348 s_or_b32 exec_lo, exec_lo, s8 s_add_i32 s10, s10, s3 v_add_co_u32 v1, vcc_lo, v5, s11 v_add_co_ci_u32_e32 v2, vcc_lo, s10, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, v1, 20 v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo .LBB0_131: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v3, 1 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_133 ; %bb.132: ; in Loop: Header=BB0_131 Depth=1 global_load_b32 v3, v[1:2], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v3, 1, v3 .LBB0_133: ; in Loop: Header=BB0_131 Depth=1 s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s3, v3 s_cmp_eq_u32 s3, 0 s_cbranch_scc1 .LBB0_135 ; %bb.134: ; in Loop: Header=BB0_131 Depth=1 s_mov_b32 s3, 0 s_sleep 1 s_branch .LBB0_136 .LBB0_135: ; in Loop: Header=BB0_131 Depth=1 s_mov_b32 s3, -1 .LBB0_136: ; %Flow342 ; in Loop: Header=BB0_131 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB0_131 ; %bb.137: global_load_b128 v[3:6], v[7:8], off s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_141 ; %bb.138: v_mov_b32_e32 v9, 0 s_clause 0x2 global_load_b64 v[1:2], v9, s[4:5] offset:40 global_load_b64 v[10:11], v9, s[4:5] offset:24 glc global_load_b64 v[7:8], v9, s[4:5] s_waitcnt vmcnt(2) v_add_co_u32 v12, vcc_lo, v1, 1 v_add_co_ci_u32_e32 v13, vcc_lo, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, v12, s6 v_add_co_ci_u32_e32 v6, vcc_lo, s7, v13, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6] v_dual_cndmask_b32 v6, v6, v13 :: v_dual_cndmask_b32 v5, v5, v12 v_and_b32_e32 v2, v6, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v5, v1 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v12, v1, 24 v_mul_lo_u32 v1, v1, 24 v_add_nc_u32_e32 v2, v12, v2 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v1, vcc_lo, v7, v1 v_mov_b32_e32 v7, v10 v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo v_mov_b32_e32 v8, v11 global_store_b64 v[1:2], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v9, v[5:8], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[7:8], v[10:11] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_141 ; %bb.139: ; %.preheader.i.i.i3.preheader s_mov_b32 s2, 0 .LBB0_140: ; %.preheader.i.i.i3 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[1:2], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v9, v[5:8], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[7:8] v_dual_mov_b32 v7, v10 :: v_dual_mov_b32 v8, v11 s_or_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB0_140 .LBB0_141: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s3 .LBB0_142: ; %__ockl_printf_append_string_n.exit s_waitcnt vmcnt(0) v_mov_b32_e32 v5, v29 v_mov_b32_e32 v1, 0 v_mov_b32_e32 v2, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s2, v5 v_cmp_eq_u32_e64 s2, s2, v5 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_148 ; %bb.143: v_mov_b32_e32 v6, 0 s_mov_b32 s6, exec_lo global_load_b64 v[9:10], v6, s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[1:2], v6, s[4:5] offset:40 global_load_b64 v[7:8], v6, s[4:5] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v9 v_and_b32_e32 v2, v2, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v1, 24 v_mul_lo_u32 v2, v2, 24 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v2, v11, v2 s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v7, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, v8, v2, vcc_lo global_load_b64 v[7:8], v[1:2], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[1:2], v6, v[7:10], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[1:2], v[9:10] s_cbranch_execz .LBB0_147 ; %bb.144: ; %.preheader3.i.i.i13.preheader s_mov_b32 s7, 0 .LBB0_145: ; %.preheader3.i.i.i13 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[7:8], v6, s[4:5] offset:40 global_load_b64 v[11:12], v6, s[4:5] v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v9, v1 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v7, v7, v9 s_waitcnt vmcnt(0) v_mad_u64_u32 v[1:2], null, v7, 24, v[11:12] v_and_b32_e32 v11, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[7:8], null, v11, 24, v[2:3] v_mov_b32_e32 v2, v7 global_load_b64 v[7:8], v[1:2], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[1:2], v6, v[7:10], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[1:2], v[9:10] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB0_145 ; %bb.146: ; %Flow285 s_or_b32 exec_lo, exec_lo, s7 .LBB0_147: ; %Flow287 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB0_148: ; %.loopexit4.i.i.i7 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s3 v_mov_b32_e32 v6, 0 v_readfirstlane_b32 s6, v1 v_readfirstlane_b32 s7, v2 s_mov_b32 s12, exec_lo s_clause 0x1 global_load_b64 v[11:12], v6, s[4:5] offset:40 global_load_b128 v[7:10], v6, s[4:5] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v11 v_readfirstlane_b32 s9, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s3, s9, 24 s_mul_hi_u32 s10, s8, 24 s_mul_i32 s11, s8, 24 s_and_saveexec_b32 s13, s2 s_cbranch_execz .LBB0_150 ; %bb.149: v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v12, v6 s_add_i32 s12, s10, s3 s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v7, s11 v_add_co_ci_u32_e32 v2, vcc_lo, s12, v8, vcc_lo v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1 global_store_b128 v[1:2], v[11:14], off offset:8 .LBB0_150: s_or_b32 exec_lo, exec_lo, s13 s_lshl_b64 s[8:9], s[8:9], 12 v_lshlrev_b64 v[1:2], 6, v[5:6] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v9, s8 v_add_co_ci_u32_e32 v10, vcc_lo, s9, v10, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v9, vcc_lo, v5, v1 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v3, 0xffffff1f, v3, 32 v_add_co_ci_u32_e32 v10, vcc_lo, v10, v2, vcc_lo v_mov_b32_e32 v5, v0 v_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v14, s15 v_dual_mov_b32 v12, s13 :: v_dual_mov_b32 v13, s14 s_clause 0x3 global_store_b128 v[9:10], v[3:6], off global_store_b128 v[9:10], v[11:14], off offset:16 global_store_b128 v[9:10], v[11:14], off offset:32 global_store_b128 v[9:10], v[11:14], off offset:48 s_and_saveexec_b32 s8, s2 s_cbranch_execz .LBB0_158 ; %bb.151: v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v11, s6 v_mov_b32_e32 v12, s7 s_clause 0x1 global_load_b64 v[13:14], v6, s[4:5] offset:32 glc global_load_b64 v[0:1], v6, s[4:5] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s12, v0 v_readfirstlane_b32 s13, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[12:13], s[6:7] s_mul_i32 s9, s13, 24 s_mul_hi_u32 s13, s12, 24 s_mul_i32 s12, s12, 24 s_add_i32 s13, s13, s9 v_add_co_u32 v4, vcc_lo, v7, s12 v_add_co_ci_u32_e32 v5, vcc_lo, s13, v8, vcc_lo s_mov_b32 s9, exec_lo global_store_b64 v[4:5], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[11:14], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_154 ; %bb.152: ; %.preheader1.i.i.i11.preheader s_mov_b32 s12, 0 .LBB0_153: ; %.preheader1.i.i.i11 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v6, v[0:3], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s12, vcc_lo, s12 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s12 s_cbranch_execnz .LBB0_153 .LBB0_154: ; %Flow283 s_or_b32 exec_lo, exec_lo, s9 v_mov_b32_e32 v3, 0 s_mov_b32 s12, exec_lo s_mov_b32 s9, exec_lo v_mbcnt_lo_u32_b32 v2, s12, 0 global_load_b64 v[0:1], v3, s[4:5] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_156 ; %bb.155: s_bcnt1_i32_b32 s12, s12 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s12 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_156: s_or_b32 exec_lo, exec_lo, s9 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_158 ; %bb.157: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s9, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s9, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_158: ; %Flow284 s_or_b32 exec_lo, exec_lo, s8 s_add_i32 s10, s10, s3 v_add_co_u32 v0, vcc_lo, v7, s11 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v8, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_159: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_161 ; %bb.160: ; in Loop: Header=BB0_159 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_161: ; in Loop: Header=BB0_159 Depth=1 s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s3, v2 s_cmp_eq_u32 s3, 0 s_cbranch_scc1 .LBB0_163 ; %bb.162: ; in Loop: Header=BB0_159 Depth=1 s_mov_b32 s3, 0 s_sleep 1 s_branch .LBB0_164 .LBB0_163: ; in Loop: Header=BB0_159 Depth=1 s_mov_b32 s3, -1 .LBB0_164: ; %Flow278 ; in Loop: Header=BB0_159 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s3 s_cbranch_vccnz .LBB0_159 ; %bb.165: global_load_b64 v[0:1], v[9:10], off s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_169 ; %bb.166: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[4:5] offset:40 global_load_b64 v[9:10], v8, s[4:5] offset:24 glc global_load_b64 v[6:7], v8, s[4:5] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s6 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_169 ; %bb.167: ; %.preheader.i.i.i10.preheader s_mov_b32 s2, 0 .LBB0_168: ; %.preheader.i.i.i10 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB0_168 .LBB0_169: ; %__ockl_printf_append_args.exit s_or_b32 exec_lo, exec_lo, s3 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s2, v29 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v3, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s2, s2, v29 s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_175 ; %bb.170: v_mov_b32_e32 v4, 0 s_mov_b32 s6, exec_lo global_load_b64 v[7:8], v4, s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[2:3], v4, s[4:5] offset:40 global_load_b64 v[5:6], v4, s[4:5] s_waitcnt vmcnt(1) v_and_b32_e32 v3, v3, v8 v_and_b32_e32 v2, v2, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v5, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, v6, v3, vcc_lo global_load_b64 v[5:6], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[5:8], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[2:3], v[7:8] s_cbranch_execz .LBB0_174 ; %bb.171: ; %.preheader3.i.i.i20.preheader s_mov_b32 s7, 0 .LBB0_172: ; %.preheader3.i.i.i20 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[4:5] offset:40 global_load_b64 v[9:10], v4, s[4:5] v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) v_mad_u64_u32 v[2:3], null, v5, 24, v[9:10] v_and_b32_e32 v9, v6, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v9, 24, v[3:4] v_mov_b32_e32 v3, v5 global_load_b64 v[5:6], v[2:3], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[2:3], v4, v[5:8], s[4:5] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[7:8] s_or_b32 s7, vcc_lo, s7 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s7 s_cbranch_execnz .LBB0_172 ; %bb.173: ; %Flow271 s_or_b32 exec_lo, exec_lo, s7 .LBB0_174: ; %Flow273 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s6 .LBB0_175: ; %.loopexit4.i.i.i14 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s3 v_mov_b32_e32 v30, 0 v_readfirstlane_b32 s6, v2 v_readfirstlane_b32 s7, v3 s_mov_b32 s12, exec_lo s_clause 0x1 global_load_b64 v[8:9], v30, s[4:5] offset:40 global_load_b128 v[4:7], v30, s[4:5] s_waitcnt vmcnt(1) v_readfirstlane_b32 s8, v8 v_readfirstlane_b32 s9, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[6:7], s[8:9] s_mul_i32 s3, s9, 24 s_mul_hi_u32 s10, s8, 24 s_mul_i32 s11, s8, 24 s_and_saveexec_b32 s13, s2 s_cbranch_execz .LBB0_177 ; %bb.176: v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, v30 s_add_i32 s12, s10, s3 s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v4, s11 v_add_co_ci_u32_e32 v3, vcc_lo, s12, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[2:3], v[8:11], off offset:8 .LBB0_177: s_or_b32 exec_lo, exec_lo, s13 s_load_b32 s0, s[0:1], 0x0 v_lshlrev_b64 v[8:9], 6, v[29:30] s_mov_b32 s12, 0 v_and_or_b32 v0, 0xffffff1d, v0, 34 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 s_waitcnt lgkmcnt(0) v_cvt_f64_f32_e32 v[2:3], s0 s_lshl_b64 s[0:1], s[8:9], 12 s_waitcnt vmcnt(0) v_add_co_u32 v6, vcc_lo, v6, s0 v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v10, vcc_lo, v6, v8 v_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo v_dual_mov_b32 v6, s12 :: v_dual_mov_b32 v7, s13 v_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v9, s15 s_clause 0x3 global_store_b128 v[10:11], v[0:3], off global_store_b128 v[10:11], v[6:9], off offset:16 global_store_b128 v[10:11], v[6:9], off offset:32 global_store_b128 v[10:11], v[6:9], off offset:48 s_and_saveexec_b32 s0, s2 s_cbranch_execz .LBB0_185 ; %bb.178: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s6 v_mov_b32_e32 v10, s7 s_clause 0x1 global_load_b64 v[11:12], v8, s[4:5] offset:32 glc global_load_b64 v[0:1], v8, s[4:5] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s8, v0 v_readfirstlane_b32 s9, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[8:9], s[8:9], s[6:7] s_mul_i32 s1, s9, 24 s_mul_hi_u32 s9, s8, 24 s_mul_i32 s8, s8, 24 s_add_i32 s9, s9, s1 v_add_co_u32 v6, vcc_lo, v4, s8 v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo s_mov_b32 s1, exec_lo global_store_b64 v[6:7], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_181 ; %bb.179: ; %.preheader1.i.i.i18.preheader s_mov_b32 s8, 0 .LBB0_180: ; %.preheader1.i.i.i18 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7 s_sleep 1 global_store_b64 v[6:7], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[4:5] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s8, vcc_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB0_180 .LBB0_181: ; %Flow269 s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v3, 0 s_mov_b32 s8, exec_lo s_mov_b32 s1, exec_lo v_mbcnt_lo_u32_b32 v2, s8, 0 global_load_b64 v[0:1], v3, s[4:5] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_183 ; %bb.182: s_bcnt1_i32_b32 s8, s8 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s8 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_183: s_or_b32 exec_lo, exec_lo, s1 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_185 ; %bb.184: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s1, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s1, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_185: ; %Flow270 s_or_b32 exec_lo, exec_lo, s0 s_add_i32 s10, s10, s3 v_add_co_u32 v0, vcc_lo, v4, s11 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_186: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s0, s2 s_cbranch_execz .LBB0_188 ; %bb.187: ; in Loop: Header=BB0_186 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_188: ; in Loop: Header=BB0_186 Depth=1 s_or_b32 exec_lo, exec_lo, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v2 s_cmp_eq_u32 s0, 0 s_cbranch_scc1 .LBB0_190 ; %bb.189: ; in Loop: Header=BB0_186 Depth=1 s_mov_b32 s0, 0 s_sleep 1 s_branch .LBB0_191 .LBB0_190: ; in Loop: Header=BB0_186 Depth=1 s_mov_b32 s0, -1 .LBB0_191: ; %Flow264 ; in Loop: Header=BB0_186 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s0 s_cbranch_vccnz .LBB0_186 ; %bb.192: s_and_saveexec_b32 s0, s2 s_cbranch_execz .LBB0_196 ; %bb.193: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[4:5] offset:40 global_load_b64 v[7:8], v6, s[4:5] offset:24 glc global_load_b64 v[4:5], v6, s[4:5] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s6 v_add_co_ci_u32_e32 v1, vcc_lo, s7, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_196 ; %bb.194: ; %.preheader.i.i.i17.preheader s_mov_b32 s0, 0 .LBB0_195: ; %.preheader.i.i.i17 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[4:5] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_195 .LBB0_196: ; %__ockl_printf_append_args.exit21 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9helloCUDAf .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 33 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z9helloCUDAf, .Lfunc_end0-_Z9helloCUDAf ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 8032 ; NumSgprs: 22 ; NumVgprs: 33 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 33 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "Hello world from thread %d -- My value of f = %f\n" .size .str, 50 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims - .offset: 88 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9helloCUDAf .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z9helloCUDAf.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 33 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
414cdd22ccfc439674c9c58a01ee3d6ccc92e3c3
/* ================================================================== Programmers: Kevin Wagner Elijah Malaby John Casey Omptimizing SDH histograms for input larger then global memory ================================================================== */ #include <stdio.h> #include <stdlib.h> #include <ctype.h> #include <math.h> #include <sys/time.h> #define BOX_SIZE 23000 /* size of the data box on one dimension */ /* descriptors for single atom in the tree */ typedef struct atomdesc { float x_pos; float y_pos; float z_pos; } atom; unsigned long long * histogram; /* list of all buckets in the histogram */ unsigned long long PDH_acnt; /* total number of data points */ int block_size; /* Number of threads per block */ int num_buckets; /* total number of buckets in the histogram */ float PDH_res; /* value of w */ atom * atom_list; /* list of all data points */ unsigned long long * histogram_GPU; unsigned long long * temp_histogram_GPU; atom * atom_list_GPU; __global__ void kernelSumHistogram( unsigned long long int *InputHists, unsigned long long int *hist, int num_atoms, int num_buckets, int block_size) { unsigned long long int tid = threadIdx.x + blockIdx.x * blockDim.x; int h_pos = tid; unsigned long long int NumberOfSumLoop = 0; NumberOfSumLoop = (num_atoms)/block_size + ((num_atoms%block_size) ? 1:0); while(h_pos < num_buckets) { unsigned long long int tmpAns = 0; for(int i=0;i<NumberOfSumLoop;i++){ tmpAns = tmpAns + *(InputHists+(i*num_buckets)+h_pos); } hist[h_pos] = tmpAns; h_pos += blockDim.x * gridDim.x; } __syncthreads(); } __device__ void block_to_block (atom * block_a, atom * block_b, int b_length, unsigned long long * histogram, float resolution) { atom me = block_a[threadIdx.x]; for(int i = 0; i < b_length; i++) atomicAdd(&(histogram[(int)(sqrt((me.x_pos - block_b[i].x_pos) * (me.x_pos - block_b[i].x_pos) + (me.y_pos - block_b[i].y_pos) * (me.y_pos - block_b[i].y_pos) + (me.z_pos - block_b[i].z_pos) * (me.z_pos - block_b[i].z_pos)) / resolution)]), 1); } __global__ void GPUKernelFunction (unsigned long long PDH_acnt, float PDH_res, atom * atom_list_GPU, unsigned long long * histogram_GPU, int num_buckets) { extern __shared__ unsigned long long SHist[]; /* assign register values */ int i, h_pos; float dist; atom * my_block = &atom_list_GPU[blockIdx.x * blockDim.x]; atom temp_atom_1 = my_block[threadIdx.x]; for(h_pos=threadIdx.x; h_pos < num_buckets; h_pos+=blockDim.x) SHist[h_pos] = 0; __syncthreads(); /* loop through all points in atom list calculating distance from current point to all further points */ for (i = threadIdx.x + 1; i < blockDim.x && i+blockIdx.x*blockDim.x < PDH_acnt; i++) { atom temp_atom_2 = my_block[i]; dist = sqrt((temp_atom_1.x_pos - temp_atom_2.x_pos) * (temp_atom_1.x_pos - temp_atom_2.x_pos) + (temp_atom_1.y_pos - temp_atom_2.y_pos) * (temp_atom_1.y_pos - temp_atom_2.y_pos) + (temp_atom_1.z_pos - temp_atom_2.z_pos) * (temp_atom_1.z_pos - temp_atom_2.z_pos)); h_pos = (int)(dist / PDH_res); atomicAdd(&(SHist[h_pos]), 1); } __syncthreads(); for(i=blockIdx.x+1; i < gridDim.x-1; i++) block_to_block(my_block, &atom_list_GPU[i*blockDim.x], blockDim.x, SHist, PDH_res); block_to_block(my_block, &atom_list_GPU[i*blockDim.x], PDH_acnt-i*blockDim.x, // Last block may be small SHist, PDH_res); __syncthreads(); for(h_pos = threadIdx.x; h_pos < num_buckets; h_pos += blockDim.x) *(histogram_GPU+(num_buckets*blockIdx.x)+h_pos) += SHist[h_pos]; } /* print the counts in all buckets of the histogram */ void output_histogram_GPU(){ int i; unsigned long long total_cnt = 0; for(i=0; i< num_buckets; i++) { if(i%5 == 0) /* we print 5 buckets in a row */ printf("\n%02d: ", i); printf("%15lld ", histogram[i]); total_cnt += histogram[i]; /* we also want to make sure the total distance count is correct */ if(i == num_buckets - 1) printf("\n T:%lld \n", total_cnt); else printf("| "); } } void GPU_baseline() { int num_blocks = ((PDH_acnt + block_size)/block_size); /* copy histogram to device memory */ cudaMalloc((void**) &histogram_GPU, sizeof(unsigned long long)*num_buckets); cudaMemset(histogram_GPU, 0, sizeof(unsigned long long)*num_buckets); cudaMalloc((void**) &temp_histogram_GPU, sizeof(unsigned long long)*num_buckets*num_blocks); cudaMemset(temp_histogram_GPU, 0, sizeof(unsigned long long)*num_buckets*num_blocks); /* copy atom list to device memory */ cudaMalloc((void**) &atom_list_GPU, sizeof(atom) * PDH_acnt); cudaMemcpy(atom_list_GPU, atom_list, sizeof(atom) * PDH_acnt, cudaMemcpyHostToDevice); /* start time keeping */ cudaEvent_t start, stop; cudaEventCreate(&start); cudaEventCreate(&stop); cudaEventRecord( start, 0 ); /* Run Kernel */ GPUKernelFunction <<<num_blocks, block_size, sizeof(unsigned long long)*num_buckets>>> (PDH_acnt, PDH_res, atom_list_GPU, temp_histogram_GPU, num_buckets); cudaDeviceSynchronize(); kernelSumHistogram<<<3, 512>>>(temp_histogram_GPU, histogram_GPU, PDH_acnt, num_buckets, block_size); /* stop time keeping */ cudaEventRecord( stop, 0 ); cudaEventSynchronize( stop ); float elapsedTime; cudaEventElapsedTime( &elapsedTime, start, stop ); /* transfer histogram to host memory */ cudaMemcpy(histogram, histogram_GPU, sizeof(unsigned long long)*num_buckets, cudaMemcpyDeviceToHost); /* print out the histogram */ output_histogram_GPU(); elapsedTime = elapsedTime/1000; printf( "******** Total Running Time of Kernel = %0.5f sec *******\n", elapsedTime ); /* free cuda timekeeping */ cudaEventDestroy( start ); cudaEventDestroy( stop ); cudaFree(temp_histogram_GPU); } /* Input Validation Function */ bool isNumber(char number[], bool floatingpoint) { for (int i = 0; number[i] != 0; i++) { //if (number[i] > '9' || number[i] < '0') if (!isdigit(number[i])) { if((number[i] == '.' && floatingpoint)) { floatingpoint = false; } else { return false; } } } return true; } /* Most of this input validation can probably be pulled whenever we hardcode our block size and if we hardcode our bucket width */ int main(int argc, char **argv) { /* input validation */ if((argc > 3)) { if(((isNumber(argv[1], false) && isNumber(argv[2], true)) && isNumber(argv[3], false))) { PDH_acnt = atoi(argv[1]); PDH_res = atof(argv[2]); block_size = atoi(argv[3]); } else { printf( "Invalid Input Error Invalid Arguments\n Valid input is ./program_name {#of_samples} {bucket_width} {block_size}\n"); return 0; } } else { printf( "Invalid Input Error Insufficient Arguments\n Valid input is ./program_name {#of_samples} {bucket_width} {block_size}\n"); return 0; } /* allocate memory */ num_buckets = (int)(BOX_SIZE * 1.732 / PDH_res) + 1; histogram = (unsigned long long *)malloc(sizeof(unsigned long long)*num_buckets); atom_list = (atom *)malloc(sizeof(atom)*PDH_acnt); srand(1); /* generate data following a uniform distribution */ for(int i = 0; i < PDH_acnt; i++) { atom_list[i].x_pos = ((float)(rand()) / RAND_MAX) * BOX_SIZE; atom_list[i].y_pos = ((float)(rand()) / RAND_MAX) * BOX_SIZE; atom_list[i].z_pos = ((float)(rand()) / RAND_MAX) * BOX_SIZE; } /* call GPU histrogram compute */ GPU_baseline(); /* free memory */ free(histogram); free(atom_list); return 0; }
.file "tmpxft_002c802a_00000000-6_proj2-wagnerk1.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2034: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2034: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z14block_to_blockP8atomdescS0_iPyf .type _Z14block_to_blockP8atomdescS0_iPyf, @function _Z14block_to_blockP8atomdescS0_iPyf: .LFB2027: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2027: .size _Z14block_to_blockP8atomdescS0_iPyf, .-_Z14block_to_blockP8atomdescS0_iPyf .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "\n%02d: " .LC1: .string "%15lld " .LC2: .string "\n T:%lld \n" .LC3: .string "| " .text .globl _Z20output_histogram_GPUv .type _Z20output_histogram_GPUv, @function _Z20output_histogram_GPUv: .LFB2028: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 leaq .LC0(%rip), %r13 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 xorl %r12d, %r12d pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 xorl %ebx, %ebx pushq %rdx .cfi_def_cfa_offset 48 .L5: cmpl %ebx, num_buckets(%rip) movl %ebx, %ebp jle .L12 movl %ebp, %eax movl $5, %ecx cltd idivl %ecx testl %edx, %edx jne .L6 movl %ebp, %edx movq %r13, %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L6: movq histogram(%rip), %rax leaq .LC1(%rip), %rsi movl $2, %edi movq (%rax,%rbx,8), %rdx xorl %eax, %eax call __printf_chk@PLT movq histogram(%rip), %rax addq (%rax,%rbx,8), %r12 movl num_buckets(%rip), %eax decl %eax cmpl %ebp, %eax jne .L7 movq %r12, %rdx leaq .LC2(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L8 .L7: leaq .LC3(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L8: incq %rbx jmp .L5 .L12: popq %rax .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size _Z20output_histogram_GPUv, .-_Z20output_histogram_GPUv .globl _Z8isNumberPcb .type _Z8isNumberPcb, @function _Z8isNumberPcb: .LFB2030: .cfi_startproc endbr64 .L14: movb (%rdi), %al testb %al, %al je .L21 movsbl %al, %edx subl $48, %edx cmpl $9, %edx jbe .L15 cmpb $46, %al sete %al andb %sil, %al je .L13 xorl %esi, %esi .L15: incq %rdi jmp .L14 .L21: movb $1, %al .L13: ret .cfi_endproc .LFE2030: .size _Z8isNumberPcb, .-_Z8isNumberPcb .globl _Z43__device_stub__Z18kernelSumHistogramPyS_iiiPyS_iii .type _Z43__device_stub__Z18kernelSumHistogramPyS_iiiPyS_iii, @function _Z43__device_stub__Z18kernelSumHistogramPyS_iiiPyS_iii: .LFB2056: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movl %edx, 12(%rsp) leaq 32(%rsp), %rdx movl %ecx, 8(%rsp) leaq 40(%rsp), %rcx movl %r8d, 4(%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 12(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L22 pushq 40(%rsp) .cfi_def_cfa_offset 168 leaq _Z18kernelSumHistogramPyS_iii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 176 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L22: movq 136(%rsp), %rax subq %fs:40, %rax je .L24 call __stack_chk_fail@PLT .L24: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2056: .size _Z43__device_stub__Z18kernelSumHistogramPyS_iiiPyS_iii, .-_Z43__device_stub__Z18kernelSumHistogramPyS_iiiPyS_iii .globl _Z18kernelSumHistogramPyS_iii .type _Z18kernelSumHistogramPyS_iii, @function _Z18kernelSumHistogramPyS_iii: .LFB2057: .cfi_startproc endbr64 jmp _Z43__device_stub__Z18kernelSumHistogramPyS_iiiPyS_iii .cfi_endproc .LFE2057: .size _Z18kernelSumHistogramPyS_iii, .-_Z18kernelSumHistogramPyS_iii .globl _Z50__device_stub__Z17GPUKernelFunctionyfP8atomdescPyiyfP8atomdescPyi .type _Z50__device_stub__Z17GPUKernelFunctionyfP8atomdescPyiyfP8atomdescPyi, @function _Z50__device_stub__Z17GPUKernelFunctionyfP8atomdescPyiyfP8atomdescPyi: .LFB2058: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movq %rsi, 8(%rsp) leaq 60(%rsp), %rsi movq %rdx, (%rsp) leaq 32(%rsp), %rdx movl %ecx, 16(%rsp) leaq 40(%rsp), %rcx movss %xmm0, 20(%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 20(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movq %rsp, %rax movq %rax, 120(%rsp) leaq 16(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L27 pushq 40(%rsp) .cfi_def_cfa_offset 168 leaq _Z17GPUKernelFunctionyfP8atomdescPyi(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 176 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L27: movq 136(%rsp), %rax subq %fs:40, %rax je .L29 call __stack_chk_fail@PLT .L29: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2058: .size _Z50__device_stub__Z17GPUKernelFunctionyfP8atomdescPyiyfP8atomdescPyi, .-_Z50__device_stub__Z17GPUKernelFunctionyfP8atomdescPyiyfP8atomdescPyi .globl _Z17GPUKernelFunctionyfP8atomdescPyi .type _Z17GPUKernelFunctionyfP8atomdescPyi, @function _Z17GPUKernelFunctionyfP8atomdescPyi: .LFB2059: .cfi_startproc endbr64 jmp _Z50__device_stub__Z17GPUKernelFunctionyfP8atomdescPyiyfP8atomdescPyi .cfi_endproc .LFE2059: .size _Z17GPUKernelFunctionyfP8atomdescPyi, .-_Z17GPUKernelFunctionyfP8atomdescPyi .section .rodata.str1.1 .LC5: .string "******** Total Running Time of Kernel = %0.5f sec *******\n" .text .globl _Z12GPU_baselinev .type _Z12GPU_baselinev, @function _Z12GPU_baselinev: .LFB2029: .cfi_startproc endbr64 pushq %rbp .cfi_def_cfa_offset 16 .cfi_offset 6, -16 xorl %edx, %edx leaq histogram_GPU(%rip), %rdi pushq %rbx .cfi_def_cfa_offset 24 .cfi_offset 3, -24 subq $56, %rsp .cfi_def_cfa_offset 80 movslq block_size(%rip), %rcx movslq num_buckets(%rip), %rsi movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax movq PDH_acnt(%rip), %rax salq $3, %rsi addq %rcx, %rax divq %rcx movq %rax, %rbx call cudaMalloc@PLT movslq num_buckets(%rip), %rdx xorl %esi, %esi movslq %ebx, %rbp movq histogram_GPU(%rip), %rdi salq $3, %rdx call cudaMemset@PLT movslq num_buckets(%rip), %rsi leaq temp_histogram_GPU(%rip), %rdi imulq %rbp, %rsi salq $3, %rsi call cudaMalloc@PLT movslq num_buckets(%rip), %rdx movq temp_histogram_GPU(%rip), %rdi xorl %esi, %esi imulq %rbp, %rdx salq $3, %rdx call cudaMemset@PLT imulq $12, PDH_acnt(%rip), %rsi leaq atom_list_GPU(%rip), %rdi call cudaMalloc@PLT imulq $12, PDH_acnt(%rip), %rdx movl $1, %ecx movq atom_list(%rip), %rsi movq atom_list_GPU(%rip), %rdi call cudaMemcpy@PLT movq %rsp, %rdi call cudaEventCreate@PLT leaq 8(%rsp), %rdi call cudaEventCreate@PLT movq (%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movl block_size(%rip), %eax movl %ebx, 16(%rsp) xorl %r9d, %r9d movslq num_buckets(%rip), %rdx movl %eax, 28(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) leaq 0(,%rdx,8), %r8 movl 36(%rsp), %ecx movq %rax, 20(%rsp) movq 28(%rsp), %rdx movq 16(%rsp), %rdi movl 24(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L33 movl num_buckets(%rip), %ecx movq temp_histogram_GPU(%rip), %rdx movq atom_list_GPU(%rip), %rsi movss PDH_res(%rip), %xmm0 movq PDH_acnt(%rip), %rdi call _Z50__device_stub__Z17GPUKernelFunctionyfP8atomdescPyiyfP8atomdescPyi .L33: call cudaDeviceSynchronize@PLT movl $8388609, %edx xorl %r9d, %r9d xorl %r8d, %r8d salq $9, %rdx movl $1, %ecx movabsq $4294967299, %rdi movl $1, %esi movq %rdx, 28(%rsp) movl $1, 36(%rsp) movq %rdi, 16(%rsp) movl $1, 24(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L34 movl block_size(%rip), %r8d movl num_buckets(%rip), %ecx movl PDH_acnt(%rip), %edx movq histogram_GPU(%rip), %rsi movq temp_histogram_GPU(%rip), %rdi call _Z43__device_stub__Z18kernelSumHistogramPyS_iiiPyS_iii .L34: movq 8(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movq 8(%rsp), %rdi call cudaEventSynchronize@PLT movq 8(%rsp), %rdx movq (%rsp), %rsi leaq 28(%rsp), %rdi call cudaEventElapsedTime@PLT movslq num_buckets(%rip), %rdx movl $2, %ecx movq histogram_GPU(%rip), %rsi movq histogram(%rip), %rdi salq $3, %rdx call cudaMemcpy@PLT call _Z20output_histogram_GPUv leaq .LC5(%rip), %rsi movl $2, %edi movb $1, %al movss 28(%rsp), %xmm0 divss .LC4(%rip), %xmm0 movss %xmm0, 28(%rsp) cvtss2sd %xmm0, %xmm0 call __printf_chk@PLT movq (%rsp), %rdi call cudaEventDestroy@PLT movq 8(%rsp), %rdi call cudaEventDestroy@PLT movq temp_histogram_GPU(%rip), %rdi call cudaFree@PLT movq 40(%rsp), %rax subq %fs:40, %rax je .L35 call __stack_chk_fail@PLT .L35: addq $56, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size _Z12GPU_baselinev, .-_Z12GPU_baselinev .section .rodata.str1.1 .LC7: .string "Invalid Input Error Invalid Arguments\n Valid input is ./program_name {#of_samples} {bucket_width} {block_size}\n" .LC8: .string "Invalid Input Error Insufficient Arguments\n Valid input is ./program_name {#of_samples} {bucket_width} {block_size}\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2031: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $16, %rsp .cfi_def_cfa_offset 48 cmpl $3, %edi jle .L38 movq 8(%rsi), %r8 movq %rsi, %rcx xorl %esi, %esi movq %r8, %rdi call _Z8isNumberPcb testb %al, %al je .L39 movq 16(%rcx), %r12 movl $1, %esi movq %r12, %rdi call _Z8isNumberPcb testb %al, %al je .L39 movq 24(%rcx), %rbp xorl %esi, %esi movq %rbp, %rdi call _Z8isNumberPcb testb %al, %al je .L39 movq %r8, %rdi call atoi@PLT movq %r12, %rdi movslq %eax, %rbx movq %rbx, PDH_acnt(%rip) call atof@PLT movq %rbp, %rdi cvtsd2ss %xmm0, %xmm0 movss %xmm0, PDH_res(%rip) movss %xmm0, 12(%rsp) call atoi@PLT movss 12(%rsp), %xmm0 movsd .LC6(%rip), %xmm1 movl %eax, block_size(%rip) cvtss2sd %xmm0, %xmm0 divsd %xmm0, %xmm1 cvttsd2sil %xmm1, %edi incl %edi movl %edi, num_buckets(%rip) movslq %edi, %rdi salq $3, %rdi call malloc@PLT imulq $12, %rbx, %rdi xorl %ebx, %ebx movq %rax, histogram(%rip) call malloc@PLT movl $1, %edi movq %rax, atom_list(%rip) call srand@PLT jmp .L40 .L39: leaq .LC7(%rip), %rsi jmp .L53 .L38: leaq .LC8(%rip), %rsi .L53: movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L41 .L40: cmpq PDH_acnt(%rip), %rbx jnb .L54 call rand@PLT imulq $12, %rbx, %rbp incq %rbx cvtsi2ssl %eax, %xmm0 mulss .LC9(%rip), %xmm0 movq atom_list(%rip), %rax mulss .LC10(%rip), %xmm0 movss %xmm0, (%rax,%rbp) call rand@PLT cvtsi2ssl %eax, %xmm0 mulss .LC9(%rip), %xmm0 movq atom_list(%rip), %rax mulss .LC10(%rip), %xmm0 movss %xmm0, 4(%rax,%rbp) call rand@PLT cvtsi2ssl %eax, %xmm0 mulss .LC9(%rip), %xmm0 movq atom_list(%rip), %rax mulss .LC10(%rip), %xmm0 movss %xmm0, 8(%rax,%rbp) jmp .L40 .L54: call _Z12GPU_baselinev movq histogram(%rip), %rdi call free@PLT movq atom_list(%rip), %rdi call free@PLT .L41: addq $16, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2031: .size main, .-main .section .rodata.str1.1 .LC11: .string "_Z17GPUKernelFunctionyfP8atomdescPyi" .LC12: .string "_Z18kernelSumHistogramPyS_iii" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2061: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC11(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z17GPUKernelFunctionyfP8atomdescPyi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC12(%rip), %rdx orl $-1, %r8d leaq _Z18kernelSumHistogramPyS_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2061: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl atom_list_GPU .bss .align 8 .type atom_list_GPU, @object .size atom_list_GPU, 8 atom_list_GPU: .zero 8 .globl temp_histogram_GPU .align 8 .type temp_histogram_GPU, @object .size temp_histogram_GPU, 8 temp_histogram_GPU: .zero 8 .globl histogram_GPU .align 8 .type histogram_GPU, @object .size histogram_GPU, 8 histogram_GPU: .zero 8 .globl atom_list .align 8 .type atom_list, @object .size atom_list, 8 atom_list: .zero 8 .globl PDH_res .align 4 .type PDH_res, @object .size PDH_res, 4 PDH_res: .zero 4 .globl num_buckets .align 4 .type num_buckets, @object .size num_buckets, 4 num_buckets: .zero 4 .globl block_size .align 4 .type block_size, @object .size block_size, 4 block_size: .zero 4 .globl PDH_acnt .align 8 .type PDH_acnt, @object .size PDH_acnt, 8 PDH_acnt: .zero 8 .globl histogram .align 8 .type histogram, @object .size histogram, 8 histogram: .zero 8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC4: .long 1148846080 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC6: .long 0 .long 1088648064 .section .rodata.cst4 .align 4 .LC9: .long 805306368 .align 4 .LC10: .long 1186181120 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z17GPUKernelFunctionyfP8atomdescPyi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ IMAD.MOV.U32 R13, RZ, RZ, 0xc ; /* 0x0000000cff0d7424 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R14, SR_TID.X ; /* 0x00000000000e7919 */ /* 0x000e620000002100 */ /*0050*/ IMAD R7, R0, c[0x0][0x0], RZ ; /* 0x0000000000077a24 */ /* 0x001fca00078e02ff */ /*0060*/ IADD3 R12, P0, R7, R14, RZ ; /* 0x0000000e070c7210 */ /* 0x002fc80007f1e0ff */ /*0070*/ IADD3.X R2, RZ, RZ, RZ, P0, !PT ; /* 0x000000ffff027210 */ /* 0x000fe200007fe4ff */ /*0080*/ IMAD.WIDE.U32 R12, R12, R13, c[0x0][0x170] ; /* 0x00005c000c0c7625 */ /* 0x000fc800078e000d */ /*0090*/ IMAD R3, R2, 0xc, RZ ; /* 0x0000000c02037824 */ /* 0x000fc800078e02ff */ /*00a0*/ IMAD.IADD R13, R13, 0x1, R3 ; /* 0x000000010d0d7824 */ /* 0x000fca00078e0203 */ /*00b0*/ LDG.E R5, [R12.64] ; /* 0x000000060c057981 */ /* 0x000168000c1e1900 */ /*00c0*/ LDG.E R3, [R12.64+0x4] ; /* 0x000004060c037981 */ /* 0x000168000c1e1900 */ /*00d0*/ LDG.E R4, [R12.64+0x8] ; /* 0x000008060c047981 */ /* 0x000162000c1e1900 */ /*00e0*/ ISETP.GE.AND P5, PT, R14, c[0x0][0x180], PT ; /* 0x000060000e007a0c */ /* 0x000fe20003fa6270 */ /*00f0*/ BSSY B0, 0x170 ; /* 0x0000007000007945 */ /* 0x000fd80003800000 */ /*0100*/ @P5 BRA 0x160 ; /* 0x0000005000005947 */ /* 0x000fea0003800000 */ /*0110*/ MOV R2, R14 ; /* 0x0000000e00027202 */ /* 0x001fca0000000f00 */ /*0120*/ STS.64 [R2.X8], RZ ; /* 0x000000ff02007388 */ /* 0x0001e40000008a00 */ /*0130*/ IADD3 R2, R2, c[0x0][0x0], RZ ; /* 0x0000000002027a10 */ /* 0x001fc80007ffe0ff */ /*0140*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x180], PT ; /* 0x0000600002007a0c */ /* 0x000fda0003f06270 */ /*0150*/ @!P0 BRA 0x120 ; /* 0xffffffc000008947 */ /* 0x000fea000383ffff */ /*0160*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*0170*/ IADD3 R6, R14, 0x1, RZ ; /* 0x000000010e067810 */ /* 0x000fe20007ffe0ff */ /*0180*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0190*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff027624 */ /* 0x000fe400078e00ff */ /*01a0*/ ISETP.GE.U32.AND P0, PT, R6, c[0x0][0x0], PT ; /* 0x0000000006007a0c */ /* 0x000fda0003f06070 */ /*01b0*/ @P0 BRA 0x590 ; /* 0x000003d000000947 */ /* 0x000fea0003800000 */ /*01c0*/ IADD3 R8, R7, R6, RZ ; /* 0x0000000607087210 */ /* 0x000fe20007ffe0ff */ /*01d0*/ YIELD ; /* 0x0000000000007946 */ /* 0x000fe60003800000 */ /*01e0*/ ISETP.GE.U32.AND P0, PT, R8, c[0x0][0x160], PT ; /* 0x0000580008007a0c */ /* 0x000fc80003f06070 */ /*01f0*/ ISETP.GE.U32.AND.EX P0, PT, RZ, c[0x0][0x164], PT, P0 ; /* 0x00005900ff007a0c */ /* 0x000fda0003f06100 */ /*0200*/ @P0 BRA 0x590 ; /* 0x0000038000000947 */ /* 0x000fea0003800000 */ /*0210*/ IADD3 R8, P0, R7, R6, RZ ; /* 0x0000000607087210 */ /* 0x000fe20007f1e0ff */ /*0220*/ IMAD.MOV.U32 R9, RZ, RZ, 0xc ; /* 0x0000000cff097424 */ /* 0x000fc600078e00ff */ /*0230*/ LEA.HI.X.SX32 R10, R6, RZ, 0x1, P0 ; /* 0x000000ff060a7211 */ /* 0x000fe200000f0eff */ /*0240*/ IMAD.WIDE.U32 R8, R8, R9, c[0x0][0x170] ; /* 0x00005c0008087625 */ /* 0x000fc800078e0009 */ /*0250*/ IMAD R11, R10, 0xc, RZ ; /* 0x0000000c0a0b7824 */ /* 0x000fca00078e02ff */ /*0260*/ IADD3 R9, R9, R11, RZ ; /* 0x0000000b09097210 */ /* 0x000fca0007ffe0ff */ /*0270*/ LDG.E R16, [R8.64+0x4] ; /* 0x0000040608107981 */ /* 0x000ea8000c1e1900 */ /*0280*/ LDG.E R10, [R8.64] ; /* 0x00000006080a7981 */ /* 0x000ee8000c1e1900 */ /*0290*/ LDG.E R15, [R8.64+0x8] ; /* 0x00000806080f7981 */ /* 0x000f22000c1e1900 */ /*02a0*/ BSSY B0, 0x3f0 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*02b0*/ FADD R16, R3, -R16 ; /* 0x8000001003107221 */ /* 0x024fe20000000000 */ /*02c0*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x008fc60000000000 */ /*02d0*/ FMUL R11, R16, R16 ; /* 0x00000010100b7220 */ /* 0x000fe20000400000 */ /*02e0*/ FADD R16, R4, -R15 ; /* 0x8000000f04107221 */ /* 0x010fc60000000000 */ /*02f0*/ FFMA R11, R10, R10, R11 ; /* 0x0000000a0a0b7223 */ /* 0x000fc8000000000b */ /*0300*/ FFMA R16, R16, R16, R11 ; /* 0x0000001010107223 */ /* 0x000fc8000000000b */ /*0310*/ MUFU.RSQ R11, R16 ; /* 0x00000010000b7308 */ /* 0x0000620000001400 */ /*0320*/ IADD3 R10, R16, -0xd000000, RZ ; /* 0xf3000000100a7810 */ /* 0x000fc80007ffe0ff */ /*0330*/ ISETP.GT.U32.AND P0, PT, R10, 0x727fffff, PT ; /* 0x727fffff0a00780c */ /* 0x000fda0003f04070 */ /*0340*/ @!P0 BRA 0x3a0 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*0350*/ IMAD.MOV.U32 R8, RZ, RZ, R16 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0010 */ /*0360*/ MOV R10, 0x380 ; /* 0x00000380000a7802 */ /* 0x000fe40000000f00 */ /*0370*/ CALL.REL.NOINC 0x31f0 ; /* 0x00002e7000007944 */ /* 0x000fea0003c00000 */ /*0380*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*0390*/ BRA 0x3e0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*03a0*/ FMUL.FTZ R9, R16, R11 ; /* 0x0000000b10097220 */ /* 0x003fe20000410000 */ /*03b0*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*03c0*/ FFMA R8, -R9, R9, R16 ; /* 0x0000000909087223 */ /* 0x000fc80000000110 */ /*03d0*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*03e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*03f0*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*0400*/ BSSY B2, 0x4b0 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*0410*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*0420*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*0430*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*0440*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*0450*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*0460*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*0470*/ @!P0 BRA 0x4a0 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*0480*/ MOV R10, 0x4a0 ; /* 0x000004a0000a7802 */ /* 0x000fe40000000f00 */ /*0490*/ CALL.REL.NOINC 0x3340 ; /* 0x00002ea000007944 */ /* 0x000fea0003c00000 */ /*04a0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*04b0*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*04c0*/ BSSY B0, 0x560 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*04d0*/ IMAD.SHL.U32 R15, R8, 0x8, RZ ; /* 0x00000008080f7824 */ /* 0x001fcc00078e00ff */ /*04e0*/ LDS.64 R8, [R15] ; /* 0x000000000f087984 */ /* 0x000e240000000a00 */ /*04f0*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*0500*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*0510*/ ATOMS.CAST.SPIN.64 R10, [R15], R8, R10 ; /* 0x000000080f0a738d */ /* 0x000e24000180040a */ /*0520*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*0530*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*0540*/ @!P0 BRA 0x4e0 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*0550*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0560*/ IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106067810 */ /* 0x000fc80007ffe0ff */ /*0570*/ ISETP.GE.U32.AND P0, PT, R6, c[0x0][0x0], PT ; /* 0x0000000006007a0c */ /* 0x000fda0003f06070 */ /*0580*/ @!P0 BRA 0x1c0 ; /* 0xfffffc3000008947 */ /* 0x000fea000383ffff */ /*0590*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */ /* 0x000fe40003800000 */ /*05a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*05b0*/ LDG.E R3, [R12.64] ; /* 0x000000060c037981 */ /* 0x020168000c1e1900 */ /*05c0*/ LDG.E R4, [R12.64+0x4] ; /* 0x000004060c047981 */ /* 0x000168000c1e1900 */ /*05d0*/ LDG.E R5, [R12.64+0x8] ; /* 0x000008060c057981 */ /* 0x000162000c1e1900 */ /*05e0*/ ULDC UR4, c[0x0][0xc] ; /* 0x0000030000047ab9 */ /* 0x000fe20000000800 */ /*05f0*/ IADD3 R6, R0, 0x1, RZ ; /* 0x0000000100067810 */ /* 0x000fe20007ffe0ff */ /*0600*/ UIADD3 UR4, UR4, -0x1, URZ ; /* 0xffffffff04047890 */ /* 0x000fe2000fffe03f */ /*0610*/ IADD3 R7, R7, c[0x0][0x0], RZ ; /* 0x0000000007077a10 */ /* 0x000fc40007ffe0ff */ /*0620*/ MOV R21, RZ ; /* 0x000000ff00157202 */ /* 0x000fc60000000f00 */ /*0630*/ ISETP.GE.U32.AND P0, PT, R6, UR4, PT ; /* 0x0000000406007c0c */ /* 0x000fe2000bf06070 */ /*0640*/ IMAD.MOV.U32 R20, RZ, RZ, R7 ; /* 0x000000ffff147224 */ /* 0x000fd800078e0007 */ /*0650*/ @P0 BRA 0x1ff0 ; /* 0x0000199000000947 */ /* 0x000fea0003800000 */ /*0660*/ ISETP.LT.AND P0, PT, RZ, c[0x0][0x0], PT ; /* 0x00000000ff007a0c */ /* 0x001fda0003f01270 */ /*0670*/ @P0 BRA 0x8c0 ; /* 0x0000024000000947 */ /* 0x000fea0003800000 */ /*0680*/ IMAD.MOV.U32 R9, RZ, RZ, 0x2 ; /* 0x00000002ff097424 */ /* 0x000fca00078e00ff */ /*0690*/ IADD3 R8, -R0, c[0x0][0xc], R9 ; /* 0x0000030000087a10 */ /* 0x000fc80007ffe109 */ /*06a0*/ LOP3.LUT P0, R8, R8, 0x3, RZ, 0xc0, !PT ; /* 0x0000000308087812 */ /* 0x000fda000780c0ff */ /*06b0*/ @!P0 BRA 0x710 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*06c0*/ IADD3 R8, R8, -0x1, RZ ; /* 0xffffffff08087810 */ /* 0x000fe40007ffe0ff */ /*06d0*/ IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106067810 */ /* 0x000fe40007ffe0ff */ /*06e0*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fda0003f05270 */ /*06f0*/ @P0 BRA 0x6c0 ; /* 0xffffffc000000947 */ /* 0x000fea000383ffff */ /*0700*/ IMAD R7, R6, c[0x0][0x0], RZ ; /* 0x0000000006077a24 */ /* 0x000fe400078e02ff */ /*0710*/ MOV R9, 0x3 ; /* 0x0000000300097802 */ /* 0x000fc80000000f00 */ /*0720*/ IADD3 R8, -R0, c[0x0][0xc], -R9 ; /* 0x0000030000087a10 */ /* 0x000fc80007ffe909 */ /*0730*/ ISETP.GE.U32.AND P0, PT, R8, 0x3, PT ; /* 0x000000030800780c */ /* 0x000fda0003f06070 */ /*0740*/ @!P0 BRA 0x890 ; /* 0x0000014000008947 */ /* 0x000fea0003800000 */ /*0750*/ ISETP.GE.U32.AND P0, PT, R6, UR4, PT ; /* 0x0000000406007c0c */ /* 0x000fda000bf06070 */ /*0760*/ @P0 IADD3 R6, R6, 0x4, RZ ; /* 0x0000000406060810 */ /* 0x000fe40007ffe0ff */ /*0770*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe4000070e170 */ /*0780*/ ISETP.LT.U32.AND P1, PT, R6.reuse, UR4, PT ; /* 0x0000000406007c0c */ /* 0x040fe4000bf21070 */ /*0790*/ IADD3 R7, -R6, UR4, RZ ; /* 0x0000000406077c10 */ /* 0x000fc8000fffe1ff */ /*07a0*/ ISETP.LE.U32.OR P1, PT, R7, 0xc, !P1 ; /* 0x0000000c0700780c */ /* 0x000fda0004f23470 */ /*07b0*/ @P1 BRA 0x810 ; /* 0x0000005000001947 */ /* 0x000fea0003800000 */ /*07c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*07d0*/ UIADD3 UR5, UR4, -0xc, URZ ; /* 0xfffffff404057890 */ /* 0x000fe4000fffe03f */ /*07e0*/ IADD3 R6, R6, 0x10, RZ ; /* 0x0000001006067810 */ /* 0x000fc80007ffe0ff */ /*07f0*/ ISETP.GE.U32.AND P1, PT, R6, UR5, PT ; /* 0x0000000506007c0c */ /* 0x000fda000bf26070 */ /*0800*/ @!P1 BRA 0x7e0 ; /* 0xffffffd000009947 */ /* 0x000fea000383ffff */ /*0810*/ ISETP.LT.U32.AND P1, PT, R6.reuse, UR4, PT ; /* 0x0000000406007c0c */ /* 0x040fe4000bf21070 */ /*0820*/ IADD3 R7, -R6, UR4, RZ ; /* 0x0000000406077c10 */ /* 0x000fc8000fffe1ff */ /*0830*/ ISETP.LE.U32.OR P1, PT, R7, 0x4, !P1 ; /* 0x000000040700780c */ /* 0x000fda0004f23470 */ /*0840*/ @!P1 PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000981c */ /* 0x000fe40003f0e170 */ /*0850*/ @!P1 IADD3 R6, R6, 0x8, RZ ; /* 0x0000000806069810 */ /* 0x000fd60007ffe0ff */ /*0860*/ ISETP.LT.U32.OR P0, PT, R6, UR4, P0 ; /* 0x0000000406007c0c */ /* 0x000fda0008701470 */ /*0870*/ @P0 IADD3 R6, R6, 0x4, RZ ; /* 0x0000000406060810 */ /* 0x000fca0007ffe0ff */ /*0880*/ IMAD R7, R6, c[0x0][0x0], RZ ; /* 0x0000000006077a24 */ /* 0x000fc800078e02ff */ /*0890*/ IMAD.MOV.U32 R20, RZ, RZ, R7 ; /* 0x000000ffff147224 */ /* 0x000fe200078e0007 */ /*08a0*/ MOV R21, RZ ; /* 0x000000ff00157202 */ /* 0x000fe20000000f00 */ /*08b0*/ BRA 0x1ff0 ; /* 0x0000173000007947 */ /* 0x000fea0003800000 */ /*08c0*/ IMAD.MOV.U32 R16, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff107624 */ /* 0x000fe200078e00ff */ /*08d0*/ MOV R12, c[0x0][0x0] ; /* 0x00000000000c7a02 */ /* 0x000fc80000000f00 */ /*08e0*/ IADD3 R16, P0, R16, 0x18, RZ ; /* 0x0000001810107810 */ /* 0x000fe40007f1e0ff */ /*08f0*/ LOP3.LUT R7, R12.reuse, 0x3, RZ, 0xc0, !PT ; /* 0x000000030c077812 */ /* 0x040fe400078ec0ff */ /*0900*/ IADD3 R12, R12, -0x1, RZ ; /* 0xffffffff0c0c7810 */ /* 0x000fe20007ffe0ff */ /*0910*/ IMAD.X R17, RZ, RZ, c[0x0][0x174], P0 ; /* 0x00005d00ff117624 */ /* 0x000fe200000e06ff */ /*0920*/ IADD3 R13, -R7, c[0x0][0x0], RZ ; /* 0x00000000070d7a10 */ /* 0x000fe40007ffe1ff */ /*0930*/ ISETP.GE.U32.AND P0, PT, R12, 0x3, PT ; /* 0x000000030c00780c */ /* 0x000fe40003f06070 */ /*0940*/ MOV R15, RZ ; /* 0x000000ff000f7202 */ /* 0x000fd60000000f00 */ /*0950*/ @!P0 BRA 0x15f0 ; /* 0x00000c9000008947 */ /* 0x000fea0003800000 */ /*0960*/ IMAD R19, R21, 0xc, RZ ; /* 0x0000000c15137824 */ /* 0x000fe200078e02ff */ /*0970*/ MOV R22, R13 ; /* 0x0000000d00167202 */ /* 0x000fe20000000f00 */ /*0980*/ IMAD.WIDE.U32 R8, R20, 0xc, R16 ; /* 0x0000000c14087825 */ /* 0x000fc800078e0010 */ /*0990*/ IMAD.MOV.U32 R15, RZ, RZ, RZ ; /* 0x000000ffff0f7224 */ /* 0x000fe200078e00ff */ /*09a0*/ IADD3 R19, R9, R19, RZ ; /* 0x0000001309137210 */ /* 0x000fe20007ffe0ff */ /*09b0*/ IMAD.MOV.U32 R18, RZ, RZ, R8 ; /* 0x000000ffff127224 */ /* 0x000fca00078e0008 */ /*09c0*/ LDG.E R9, [R18.64+-0x14] ; /* 0xffffec0612097981 */ /* 0x000ea8000c1e1900 */ /*09d0*/ LDG.E R8, [R18.64+-0x18] ; /* 0xffffe80612087981 */ /* 0x000ee8000c1e1900 */ /*09e0*/ LDG.E R10, [R18.64+-0x10] ; /* 0xfffff006120a7981 */ /* 0x000f22000c1e1900 */ /*09f0*/ IADD3 R22, R22, -0x4, RZ ; /* 0xfffffffc16167810 */ /* 0x000fe20007ffe0ff */ /*0a00*/ BSSY B0, 0xb60 ; /* 0x0000015000007945 */ /* 0x000fe60003800000 */ /*0a10*/ ISETP.NE.AND P4, PT, R22, RZ, PT ; /* 0x000000ff1600720c */ /* 0x000fe20003f85270 */ /*0a20*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x024fe20000000000 */ /*0a30*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*0a40*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*0a50*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*0a60*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*0a70*/ FFMA R24, R10, R10, R9 ; /* 0x0000000a0a187223 */ /* 0x000fc80000000009 */ /*0a80*/ MUFU.RSQ R11, R24 ; /* 0x00000018000b7308 */ /* 0x0000620000001400 */ /*0a90*/ IADD3 R8, R24, -0xd000000, RZ ; /* 0xf300000018087810 */ /* 0x000fc80007ffe0ff */ /*0aa0*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*0ab0*/ @!P0 BRA 0xb10 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*0ac0*/ IMAD.MOV.U32 R8, RZ, RZ, R24 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0018 */ /*0ad0*/ MOV R10, 0xaf0 ; /* 0x00000af0000a7802 */ /* 0x000fe40000000f00 */ /*0ae0*/ CALL.REL.NOINC 0x31f0 ; /* 0x0000270000007944 */ /* 0x000fea0003c00000 */ /*0af0*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*0b00*/ BRA 0xb50 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*0b10*/ FMUL.FTZ R9, R24, R11 ; /* 0x0000000b18097220 */ /* 0x003fe20000410000 */ /*0b20*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*0b30*/ FFMA R8, -R9, R9, R24 ; /* 0x0000000909087223 */ /* 0x000fc80000000118 */ /*0b40*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*0b50*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0b60*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*0b70*/ BSSY B2, 0xc20 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*0b80*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*0b90*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*0ba0*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*0bb0*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*0bc0*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*0bd0*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*0be0*/ @!P0 BRA 0xc10 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*0bf0*/ MOV R10, 0xc10 ; /* 0x00000c10000a7802 */ /* 0x000fe40000000f00 */ /*0c00*/ CALL.REL.NOINC 0x3340 ; /* 0x0000273000007944 */ /* 0x000fea0003c00000 */ /*0c10*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0c20*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*0c30*/ BSSY B0, 0xcd0 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*0c40*/ IMAD.SHL.U32 R23, R8, 0x8, RZ ; /* 0x0000000808177824 */ /* 0x001fcc00078e00ff */ /*0c50*/ LDS.64 R8, [R23] ; /* 0x0000000017087984 */ /* 0x000e240000000a00 */ /*0c60*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*0c70*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*0c80*/ ATOMS.CAST.SPIN.64 R10, [R23], R8, R10 ; /* 0x00000008170a738d */ /* 0x000e24000180040a */ /*0c90*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*0ca0*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*0cb0*/ @!P0 BRA 0xc50 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*0cc0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0cd0*/ LDG.E R9, [R18.64+-0x8] ; /* 0xfffff80612097981 */ /* 0x000ea8000c1e1900 */ /*0ce0*/ LDG.E R8, [R18.64+-0xc] ; /* 0xfffff40612087981 */ /* 0x000ee8000c1e1900 */ /*0cf0*/ LDG.E R10, [R18.64+-0x4] ; /* 0xfffffc06120a7981 */ /* 0x000f22000c1e1900 */ /*0d00*/ BSSY B0, 0xe50 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*0d10*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x004fe20000000000 */ /*0d20*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*0d30*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*0d40*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*0d50*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*0d60*/ FFMA R24, R10, R10, R9 ; /* 0x0000000a0a187223 */ /* 0x000fc80000000009 */ /*0d70*/ MUFU.RSQ R11, R24 ; /* 0x00000018000b7308 */ /* 0x0000620000001400 */ /*0d80*/ IADD3 R8, R24, -0xd000000, RZ ; /* 0xf300000018087810 */ /* 0x000fc80007ffe0ff */ /*0d90*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*0da0*/ @!P0 BRA 0xe00 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*0db0*/ IMAD.MOV.U32 R8, RZ, RZ, R24 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0018 */ /*0dc0*/ MOV R10, 0xde0 ; /* 0x00000de0000a7802 */ /* 0x000fe40000000f00 */ /*0dd0*/ CALL.REL.NOINC 0x31f0 ; /* 0x0000241000007944 */ /* 0x000fea0003c00000 */ /*0de0*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*0df0*/ BRA 0xe40 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*0e00*/ FMUL.FTZ R9, R24, R11 ; /* 0x0000000b18097220 */ /* 0x003fe20000410000 */ /*0e10*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*0e20*/ FFMA R8, -R9, R9, R24 ; /* 0x0000000909087223 */ /* 0x000fc80000000118 */ /*0e30*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*0e40*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0e50*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*0e60*/ BSSY B2, 0xf10 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*0e70*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*0e80*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*0e90*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*0ea0*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*0eb0*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*0ec0*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*0ed0*/ @!P0 BRA 0xf00 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*0ee0*/ MOV R10, 0xf00 ; /* 0x00000f00000a7802 */ /* 0x000fe40000000f00 */ /*0ef0*/ CALL.REL.NOINC 0x3340 ; /* 0x0000244000007944 */ /* 0x000fea0003c00000 */ /*0f00*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0f10*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*0f20*/ BSSY B0, 0xfc0 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*0f30*/ IMAD.SHL.U32 R23, R8, 0x8, RZ ; /* 0x0000000808177824 */ /* 0x001fcc00078e00ff */ /*0f40*/ LDS.64 R8, [R23] ; /* 0x0000000017087984 */ /* 0x000e240000000a00 */ /*0f50*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*0f60*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*0f70*/ ATOMS.CAST.SPIN.64 R10, [R23], R8, R10 ; /* 0x00000008170a738d */ /* 0x000e24000180040a */ /*0f80*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*0f90*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*0fa0*/ @!P0 BRA 0xf40 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*0fb0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0fc0*/ LDG.E R9, [R18.64+0x4] ; /* 0x0000040612097981 */ /* 0x000ea8000c1e1900 */ /*0fd0*/ LDG.E R8, [R18.64] ; /* 0x0000000612087981 */ /* 0x000ee8000c1e1900 */ /*0fe0*/ LDG.E R10, [R18.64+0x8] ; /* 0x00000806120a7981 */ /* 0x000f22000c1e1900 */ /*0ff0*/ BSSY B0, 0x1140 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*1000*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x004fe20000000000 */ /*1010*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*1020*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*1030*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*1040*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*1050*/ FFMA R24, R10, R10, R9 ; /* 0x0000000a0a187223 */ /* 0x000fc80000000009 */ /*1060*/ MUFU.RSQ R11, R24 ; /* 0x00000018000b7308 */ /* 0x0000620000001400 */ /*1070*/ IADD3 R8, R24, -0xd000000, RZ ; /* 0xf300000018087810 */ /* 0x000fc80007ffe0ff */ /*1080*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*1090*/ @!P0 BRA 0x10f0 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*10a0*/ IMAD.MOV.U32 R8, RZ, RZ, R24 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0018 */ /*10b0*/ MOV R10, 0x10d0 ; /* 0x000010d0000a7802 */ /* 0x000fe40000000f00 */ /*10c0*/ CALL.REL.NOINC 0x31f0 ; /* 0x0000212000007944 */ /* 0x000fea0003c00000 */ /*10d0*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*10e0*/ BRA 0x1130 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*10f0*/ FMUL.FTZ R9, R24, R11 ; /* 0x0000000b18097220 */ /* 0x003fe20000410000 */ /*1100*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*1110*/ FFMA R8, -R9, R9, R24 ; /* 0x0000000909087223 */ /* 0x000fc80000000118 */ /*1120*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*1130*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1140*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*1150*/ BSSY B2, 0x1200 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*1160*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*1170*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*1180*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*1190*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*11a0*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*11b0*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*11c0*/ @!P0 BRA 0x11f0 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*11d0*/ MOV R10, 0x11f0 ; /* 0x000011f0000a7802 */ /* 0x000fe40000000f00 */ /*11e0*/ CALL.REL.NOINC 0x3340 ; /* 0x0000215000007944 */ /* 0x000fea0003c00000 */ /*11f0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1200*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*1210*/ BSSY B0, 0x12b0 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*1220*/ IMAD.SHL.U32 R23, R8, 0x8, RZ ; /* 0x0000000808177824 */ /* 0x001fcc00078e00ff */ /*1230*/ LDS.64 R8, [R23] ; /* 0x0000000017087984 */ /* 0x000e240000000a00 */ /*1240*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*1250*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*1260*/ ATOMS.CAST.SPIN.64 R10, [R23], R8, R10 ; /* 0x00000008170a738d */ /* 0x000e24000180040a */ /*1270*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*1280*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*1290*/ @!P0 BRA 0x1230 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*12a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*12b0*/ LDG.E R9, [R18.64+0x10] ; /* 0x0000100612097981 */ /* 0x000ea8000c1e1900 */ /*12c0*/ LDG.E R8, [R18.64+0xc] ; /* 0x00000c0612087981 */ /* 0x000ee8000c1e1900 */ /*12d0*/ LDG.E R10, [R18.64+0x14] ; /* 0x00001406120a7981 */ /* 0x000f22000c1e1900 */ /*12e0*/ BSSY B0, 0x1430 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*12f0*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x004fe20000000000 */ /*1300*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*1310*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*1320*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*1330*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*1340*/ FFMA R24, R10, R10, R9 ; /* 0x0000000a0a187223 */ /* 0x000fc80000000009 */ /*1350*/ MUFU.RSQ R11, R24 ; /* 0x00000018000b7308 */ /* 0x0000620000001400 */ /*1360*/ IADD3 R8, R24, -0xd000000, RZ ; /* 0xf300000018087810 */ /* 0x000fc80007ffe0ff */ /*1370*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*1380*/ @!P0 BRA 0x13e0 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*1390*/ IMAD.MOV.U32 R8, RZ, RZ, R24 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0018 */ /*13a0*/ MOV R10, 0x13c0 ; /* 0x000013c0000a7802 */ /* 0x000fe40000000f00 */ /*13b0*/ CALL.REL.NOINC 0x31f0 ; /* 0x00001e3000007944 */ /* 0x000fea0003c00000 */ /*13c0*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*13d0*/ BRA 0x1420 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*13e0*/ FMUL.FTZ R9, R24, R11 ; /* 0x0000000b18097220 */ /* 0x003fe20000410000 */ /*13f0*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*1400*/ FFMA R8, -R9, R9, R24 ; /* 0x0000000909087223 */ /* 0x000fc80000000118 */ /*1410*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*1420*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1430*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*1440*/ BSSY B2, 0x14f0 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*1450*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*1460*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*1470*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*1480*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*1490*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*14a0*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*14b0*/ @!P0 BRA 0x14e0 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*14c0*/ MOV R10, 0x14e0 ; /* 0x000014e0000a7802 */ /* 0x000fe40000000f00 */ /*14d0*/ CALL.REL.NOINC 0x3340 ; /* 0x00001e6000007944 */ /* 0x000fea0003c00000 */ /*14e0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*14f0*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*1500*/ BSSY B0, 0x15a0 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*1510*/ IMAD.SHL.U32 R23, R8, 0x8, RZ ; /* 0x0000000808177824 */ /* 0x001fcc00078e00ff */ /*1520*/ LDS.64 R8, [R23] ; /* 0x0000000017087984 */ /* 0x000e240000000a00 */ /*1530*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*1540*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*1550*/ ATOMS.CAST.SPIN.64 R10, [R23], R8, R10 ; /* 0x00000008170a738d */ /* 0x000e24000180040a */ /*1560*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*1570*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*1580*/ @!P0 BRA 0x1520 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*1590*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*15a0*/ IADD3 R18, P0, R18, 0x30, RZ ; /* 0x0000003012127810 */ /* 0x000fe40007f1e0ff */ /*15b0*/ IADD3 R15, R15, 0x4, RZ ; /* 0x000000040f0f7810 */ /* 0x000fc60007ffe0ff */ /*15c0*/ IMAD.X R19, RZ, RZ, R19, P0 ; /* 0x000000ffff137224 */ /* 0x000fe200000e0613 */ /*15d0*/ @!P4 CALL.REL.NOINC 0x15f0 ; /* 0x000000100000c944 */ /* 0x000fe20003c00000 */ /*15e0*/ BRA 0x9c0 ; /* 0xfffff3d000007947 */ /* 0x000fea000383ffff */ /*15f0*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fda0003f05270 */ /*1600*/ @!P0 BRA 0x1f80 ; /* 0x0000097000008947 */ /* 0x000fea0003800000 */ /*1610*/ IADD3 R18, P0, R15.reuse, R20, RZ ; /* 0x000000140f127210 */ /* 0x040fe40007f1e0ff */ /*1620*/ MOV R19, 0xc ; /* 0x0000000c00137802 */ /* 0x000fe40000000f00 */ /*1630*/ LEA.HI.X.SX32 R15, R15, R21, 0x1, P0 ; /* 0x000000150f0f7211 */ /* 0x000fc600000f0eff */ /*1640*/ IMAD.WIDE.U32 R18, R18, R19, c[0x0][0x170] ; /* 0x00005c0012127625 */ /* 0x000fc800078e0013 */ /*1650*/ IMAD R15, R15, 0xc, RZ ; /* 0x0000000c0f0f7824 */ /* 0x000fc800078e02ff */ /*1660*/ IMAD.IADD R19, R19, 0x1, R15 ; /* 0x0000000113137824 */ /* 0x000fca00078e020f */ /*1670*/ LDG.E R9, [R18.64+0x4] ; /* 0x0000040612097981 */ /* 0x000ea8000c1e1900 */ /*1680*/ LDG.E R8, [R18.64] ; /* 0x0000000612087981 */ /* 0x000ee8000c1e1900 */ /*1690*/ LDG.E R10, [R18.64+0x8] ; /* 0x00000806120a7981 */ /* 0x000f22000c1e1900 */ /*16a0*/ BSSY B0, 0x1800 ; /* 0x0000015000007945 */ /* 0x000fe20003800000 */ /*16b0*/ ISETP.NE.AND P4, PT, R7, 0x1, PT ; /* 0x000000010700780c */ /* 0x000fe20003f85270 */ /*16c0*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x024fe20000000000 */ /*16d0*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*16e0*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*16f0*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*1700*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*1710*/ FFMA R20, R10, R10, R9 ; /* 0x0000000a0a147223 */ /* 0x000fc80000000009 */ /*1720*/ MUFU.RSQ R11, R20 ; /* 0x00000014000b7308 */ /* 0x0000620000001400 */ /*1730*/ IADD3 R8, R20, -0xd000000, RZ ; /* 0xf300000014087810 */ /* 0x000fc80007ffe0ff */ /*1740*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*1750*/ @!P0 BRA 0x17b0 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*1760*/ MOV R8, R20 ; /* 0x0000001400087202 */ /* 0x003fe40000000f00 */ /*1770*/ MOV R10, 0x1790 ; /* 0x00001790000a7802 */ /* 0x000fe40000000f00 */ /*1780*/ CALL.REL.NOINC 0x31f0 ; /* 0x00001a6000007944 */ /* 0x000fea0003c00000 */ /*1790*/ IMAD.MOV.U32 R9, RZ, RZ, R25 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0019 */ /*17a0*/ BRA 0x17f0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*17b0*/ FMUL.FTZ R9, R20, R11 ; /* 0x0000000b14097220 */ /* 0x003fe20000410000 */ /*17c0*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*17d0*/ FFMA R8, -R9, R9, R20 ; /* 0x0000000909087223 */ /* 0x000fc80000000114 */ /*17e0*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*17f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1800*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*1810*/ BSSY B2, 0x18c0 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*1820*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*1830*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*1840*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*1850*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*1860*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*1870*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*1880*/ @!P0 BRA 0x18b0 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*1890*/ MOV R10, 0x18b0 ; /* 0x000018b0000a7802 */ /* 0x000fe40000000f00 */ /*18a0*/ CALL.REL.NOINC 0x3340 ; /* 0x00001a9000007944 */ /* 0x000fea0003c00000 */ /*18b0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*18c0*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*18d0*/ BSSY B0, 0x1970 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*18e0*/ SHF.L.U32 R15, R8, 0x3, RZ ; /* 0x00000003080f7819 */ /* 0x001fcc00000006ff */ /*18f0*/ LDS.64 R8, [R15] ; /* 0x000000000f087984 */ /* 0x000e240000000a00 */ /*1900*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fca0007f1e0ff */ /*1910*/ IMAD.X R11, RZ, RZ, R9, P0 ; /* 0x000000ffff0b7224 */ /* 0x000fcc00000e0609 */ /*1920*/ ATOMS.CAST.SPIN.64 R10, [R15], R8, R10 ; /* 0x000000080f0a738d */ /* 0x000e24000180040a */ /*1930*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*1940*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*1950*/ @!P0 BRA 0x18f0 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*1960*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1970*/ @!P4 BRA 0x1f80 ; /* 0x000006000000c947 */ /* 0x000fea0003800000 */ /*1980*/ LDG.E R9, [R18.64+0x10] ; /* 0x0000100612097981 */ /* 0x000ea8000c1e1900 */ /*1990*/ LDG.E R8, [R18.64+0xc] ; /* 0x00000c0612087981 */ /* 0x000ee8000c1e1900 */ /*19a0*/ LDG.E R10, [R18.64+0x14] ; /* 0x00001406120a7981 */ /* 0x000f22000c1e1900 */ /*19b0*/ BSSY B0, 0x1b10 ; /* 0x0000015000007945 */ /* 0x000fe20003800000 */ /*19c0*/ ISETP.NE.AND P4, PT, R7, 0x2, PT ; /* 0x000000020700780c */ /* 0x000fe20003f85270 */ /*19d0*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x004fe20000000000 */ /*19e0*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*19f0*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*1a00*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*1a10*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*1a20*/ FFMA R20, R10, R10, R9 ; /* 0x0000000a0a147223 */ /* 0x000fc80000000009 */ /*1a30*/ MUFU.RSQ R11, R20 ; /* 0x00000014000b7308 */ /* 0x0000620000001400 */ /*1a40*/ IADD3 R8, R20, -0xd000000, RZ ; /* 0xf300000014087810 */ /* 0x000fc80007ffe0ff */ /*1a50*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*1a60*/ @!P0 BRA 0x1ac0 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*1a70*/ MOV R8, R20 ; /* 0x0000001400087202 */ /* 0x003fe40000000f00 */ /*1a80*/ MOV R10, 0x1aa0 ; /* 0x00001aa0000a7802 */ /* 0x000fe40000000f00 */ /*1a90*/ CALL.REL.NOINC 0x31f0 ; /* 0x0000175000007944 */ /* 0x000fea0003c00000 */ /*1aa0*/ IMAD.MOV.U32 R9, RZ, RZ, R25 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0019 */ /*1ab0*/ BRA 0x1b00 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*1ac0*/ FMUL.FTZ R9, R20, R11 ; /* 0x0000000b14097220 */ /* 0x003fe20000410000 */ /*1ad0*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*1ae0*/ FFMA R8, -R9, R9, R20 ; /* 0x0000000909087223 */ /* 0x000fc80000000114 */ /*1af0*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*1b00*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1b10*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*1b20*/ BSSY B2, 0x1bd0 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*1b30*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*1b40*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*1b50*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*1b60*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*1b70*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*1b80*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*1b90*/ @!P0 BRA 0x1bc0 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*1ba0*/ MOV R10, 0x1bc0 ; /* 0x00001bc0000a7802 */ /* 0x000fe40000000f00 */ /*1bb0*/ CALL.REL.NOINC 0x3340 ; /* 0x0000178000007944 */ /* 0x000fea0003c00000 */ /*1bc0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1bd0*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*1be0*/ BSSY B0, 0x1c80 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*1bf0*/ SHF.L.U32 R15, R8, 0x3, RZ ; /* 0x00000003080f7819 */ /* 0x001fcc00000006ff */ /*1c00*/ LDS.64 R8, [R15] ; /* 0x000000000f087984 */ /* 0x000e240000000a00 */ /*1c10*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fca0007f1e0ff */ /*1c20*/ IMAD.X R11, RZ, RZ, R9, P0 ; /* 0x000000ffff0b7224 */ /* 0x000fcc00000e0609 */ /*1c30*/ ATOMS.CAST.SPIN.64 R10, [R15], R8, R10 ; /* 0x000000080f0a738d */ /* 0x000e24000180040a */ /*1c40*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*1c50*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*1c60*/ @!P0 BRA 0x1c00 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*1c70*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1c80*/ @!P4 BRA 0x1f80 ; /* 0x000002f00000c947 */ /* 0x000fea0003800000 */ /*1c90*/ LDG.E R9, [R18.64+0x1c] ; /* 0x00001c0612097981 */ /* 0x000ea8000c1e1900 */ /*1ca0*/ LDG.E R8, [R18.64+0x18] ; /* 0x0000180612087981 */ /* 0x000ee8000c1e1900 */ /*1cb0*/ LDG.E R10, [R18.64+0x20] ; /* 0x00002006120a7981 */ /* 0x000f22000c1e1900 */ /*1cc0*/ BSSY B0, 0x1e10 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*1cd0*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x004fe20000000000 */ /*1ce0*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*1cf0*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*1d00*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*1d10*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*1d20*/ FFMA R20, R10, R10, R9 ; /* 0x0000000a0a147223 */ /* 0x000fc80000000009 */ /*1d30*/ MUFU.RSQ R11, R20 ; /* 0x00000014000b7308 */ /* 0x0000620000001400 */ /*1d40*/ IADD3 R8, R20, -0xd000000, RZ ; /* 0xf300000014087810 */ /* 0x000fc80007ffe0ff */ /*1d50*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*1d60*/ @!P0 BRA 0x1dc0 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*1d70*/ MOV R8, R20 ; /* 0x0000001400087202 */ /* 0x003fe40000000f00 */ /*1d80*/ MOV R10, 0x1da0 ; /* 0x00001da0000a7802 */ /* 0x000fe40000000f00 */ /*1d90*/ CALL.REL.NOINC 0x31f0 ; /* 0x0000145000007944 */ /* 0x000fea0003c00000 */ /*1da0*/ IMAD.MOV.U32 R9, RZ, RZ, R25 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0019 */ /*1db0*/ BRA 0x1e00 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*1dc0*/ FMUL.FTZ R9, R20, R11 ; /* 0x0000000b14097220 */ /* 0x003fe20000410000 */ /*1dd0*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*1de0*/ FFMA R8, -R9, R9, R20 ; /* 0x0000000909087223 */ /* 0x000fc80000000114 */ /*1df0*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*1e00*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1e10*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*1e20*/ BSSY B2, 0x1ed0 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*1e30*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*1e40*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*1e50*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*1e60*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*1e70*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*1e80*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*1e90*/ @!P0 BRA 0x1ec0 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*1ea0*/ MOV R10, 0x1ec0 ; /* 0x00001ec0000a7802 */ /* 0x000fe40000000f00 */ /*1eb0*/ CALL.REL.NOINC 0x3340 ; /* 0x0000148000007944 */ /* 0x000fea0003c00000 */ /*1ec0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1ed0*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*1ee0*/ BSSY B0, 0x1f80 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*1ef0*/ SHF.L.U32 R15, R8, 0x3, RZ ; /* 0x00000003080f7819 */ /* 0x001fcc00000006ff */ /*1f00*/ LDS.64 R8, [R15] ; /* 0x000000000f087984 */ /* 0x000e240000000a00 */ /*1f10*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fca0007f1e0ff */ /*1f20*/ IMAD.X R11, RZ, RZ, R9, P0 ; /* 0x000000ffff0b7224 */ /* 0x000fcc00000e0609 */ /*1f30*/ ATOMS.CAST.SPIN.64 R10, [R15], R8, R10 ; /* 0x000000080f0a738d */ /* 0x000e24000180040a */ /*1f40*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*1f50*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*1f60*/ @!P0 BRA 0x1f00 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*1f70*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1f80*/ IADD3 R6, R6, 0x1, RZ ; /* 0x0000000106067810 */ /* 0x000fe40007ffe0ff */ /*1f90*/ MOV R21, RZ ; /* 0x000000ff00157202 */ /* 0x000fe40000000f00 */ /*1fa0*/ ISETP.GE.U32.AND P0, PT, R6.reuse, UR4, PT ; /* 0x0000000406007c0c */ /* 0x040fe2000bf06070 */ /*1fb0*/ IMAD R20, R6, c[0x0][0x0], RZ ; /* 0x0000000006147a24 */ /* 0x000fd800078e02ff */ /*1fc0*/ @P0 CALL.REL.NOINC 0x1fe0 ; /* 0x0000001000000944 */ /* 0x000fe20003c00000 */ /*1fd0*/ BRA 0x930 ; /* 0xffffe95000007947 */ /* 0x000fea000383ffff */ /*1fe0*/ IMAD.MOV.U32 R7, RZ, RZ, R20 ; /* 0x000000ffff077224 */ /* 0x000fca00078e0014 */ /*1ff0*/ IADD3 R12, -R7, c[0x0][0x160], RZ ; /* 0x00005800070c7a10 */ /* 0x001fc80007ffe1ff */ /*2000*/ ISETP.GE.AND P0, PT, R12, 0x1, PT ; /* 0x000000010c00780c */ /* 0x000fda0003f06270 */ /*2010*/ @!P0 BRA 0x30f0 ; /* 0x000010d000008947 */ /* 0x000fea0003800000 */ /*2020*/ LOP3.LUT R6, RZ, R7, RZ, 0x33, !PT ; /* 0x00000007ff067212 */ /* 0x000fe400078e33ff */ /*2030*/ LOP3.LUT R15, R12, 0x3, RZ, 0xc0, !PT ; /* 0x000000030c0f7812 */ /* 0x000fe400078ec0ff */ /*2040*/ IADD3 R6, R6, c[0x0][0x160], RZ ; /* 0x0000580006067a10 */ /* 0x000fe40007ffe0ff */ /*2050*/ MOV R13, RZ ; /* 0x000000ff000d7202 */ /* 0x000fe40000000f00 */ /*2060*/ ISETP.GE.U32.AND P0, PT, R6, 0x3, PT ; /* 0x000000030600780c */ /* 0x000fda0003f06070 */ /*2070*/ @!P0 BRA 0x2d20 ; /* 0x00000ca000008947 */ /* 0x000fea0003800000 */ /*2080*/ IMAD.MOV.U32 R7, RZ, RZ, 0xc ; /* 0x0000000cff077424 */ /* 0x000fe200078e00ff */ /*2090*/ IADD3 R12, R12, -R15, RZ ; /* 0x8000000f0c0c7210 */ /* 0x000fe20007ffe0ff */ /*20a0*/ IMAD R9, R21, 0xc, RZ ; /* 0x0000000c15097824 */ /* 0x000fe400078e02ff */ /*20b0*/ IMAD.WIDE.U32 R6, R20, R7, c[0x0][0x170] ; /* 0x00005c0014067625 */ /* 0x000fc800078e0007 */ /*20c0*/ IMAD.MOV.U32 R13, RZ, RZ, RZ ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e00ff */ /*20d0*/ IADD3 R6, P0, R6, 0x18, RZ ; /* 0x0000001806067810 */ /* 0x000fc80007f1e0ff */ /*20e0*/ IADD3.X R7, R7, R9, RZ, P0, !PT ; /* 0x0000000907077210 */ /* 0x000fca00007fe4ff */ /*20f0*/ LDG.E R9, [R6.64+-0x14] ; /* 0xffffec0606097981 */ /* 0x000ea8000c1e1900 */ /*2100*/ LDG.E R8, [R6.64+-0x18] ; /* 0xffffe80606087981 */ /* 0x000ee8000c1e1900 */ /*2110*/ LDG.E R10, [R6.64+-0x10] ; /* 0xfffff006060a7981 */ /* 0x000f22000c1e1900 */ /*2120*/ IADD3 R12, R12, -0x4, RZ ; /* 0xfffffffc0c0c7810 */ /* 0x000fe20007ffe0ff */ /*2130*/ BSSY B0, 0x2290 ; /* 0x0000015000007945 */ /* 0x000fe60003800000 */ /*2140*/ ISETP.NE.AND P4, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fe20003f85270 */ /*2150*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x024fe20000000000 */ /*2160*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*2170*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*2180*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*2190*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*21a0*/ FFMA R16, R10, R10, R9 ; /* 0x0000000a0a107223 */ /* 0x000fc80000000009 */ /*21b0*/ MUFU.RSQ R11, R16 ; /* 0x00000010000b7308 */ /* 0x0000620000001400 */ /*21c0*/ IADD3 R8, R16, -0xd000000, RZ ; /* 0xf300000010087810 */ /* 0x000fc80007ffe0ff */ /*21d0*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*21e0*/ @!P0 BRA 0x2240 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*21f0*/ IMAD.MOV.U32 R8, RZ, RZ, R16 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0010 */ /*2200*/ MOV R10, 0x2220 ; /* 0x00002220000a7802 */ /* 0x000fe40000000f00 */ /*2210*/ CALL.REL.NOINC 0x31f0 ; /* 0x00000fd000007944 */ /* 0x000fea0003c00000 */ /*2220*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*2230*/ BRA 0x2280 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*2240*/ FMUL.FTZ R9, R16, R11 ; /* 0x0000000b10097220 */ /* 0x003fe20000410000 */ /*2250*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*2260*/ FFMA R8, -R9, R9, R16 ; /* 0x0000000909087223 */ /* 0x000fc80000000110 */ /*2270*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*2280*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2290*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*22a0*/ BSSY B2, 0x2350 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*22b0*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*22c0*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*22d0*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*22e0*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*22f0*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*2300*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*2310*/ @!P0 BRA 0x2340 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*2320*/ MOV R10, 0x2340 ; /* 0x00002340000a7802 */ /* 0x000fe40000000f00 */ /*2330*/ CALL.REL.NOINC 0x3340 ; /* 0x0000100000007944 */ /* 0x000fea0003c00000 */ /*2340*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2350*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*2360*/ BSSY B0, 0x2400 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*2370*/ IMAD.SHL.U32 R17, R8, 0x8, RZ ; /* 0x0000000808117824 */ /* 0x001fcc00078e00ff */ /*2380*/ LDS.64 R8, [R17] ; /* 0x0000000011087984 */ /* 0x000e240000000a00 */ /*2390*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*23a0*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*23b0*/ ATOMS.CAST.SPIN.64 R10, [R17], R8, R10 ; /* 0x00000008110a738d */ /* 0x000e24000180040a */ /*23c0*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*23d0*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*23e0*/ @!P0 BRA 0x2380 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*23f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2400*/ LDG.E R9, [R6.64+-0x8] ; /* 0xfffff80606097981 */ /* 0x000ea8000c1e1900 */ /*2410*/ LDG.E R8, [R6.64+-0xc] ; /* 0xfffff40606087981 */ /* 0x000ee8000c1e1900 */ /*2420*/ LDG.E R10, [R6.64+-0x4] ; /* 0xfffffc06060a7981 */ /* 0x000f22000c1e1900 */ /*2430*/ BSSY B0, 0x2580 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*2440*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x004fe20000000000 */ /*2450*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*2460*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*2470*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*2480*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*2490*/ FFMA R16, R10, R10, R9 ; /* 0x0000000a0a107223 */ /* 0x000fc80000000009 */ /*24a0*/ MUFU.RSQ R11, R16 ; /* 0x00000010000b7308 */ /* 0x0000620000001400 */ /*24b0*/ IADD3 R8, R16, -0xd000000, RZ ; /* 0xf300000010087810 */ /* 0x000fc80007ffe0ff */ /*24c0*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*24d0*/ @!P0 BRA 0x2530 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*24e0*/ IMAD.MOV.U32 R8, RZ, RZ, R16 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0010 */ /*24f0*/ MOV R10, 0x2510 ; /* 0x00002510000a7802 */ /* 0x000fe40000000f00 */ /*2500*/ CALL.REL.NOINC 0x31f0 ; /* 0x00000ce000007944 */ /* 0x000fea0003c00000 */ /*2510*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*2520*/ BRA 0x2570 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*2530*/ FMUL.FTZ R9, R16, R11 ; /* 0x0000000b10097220 */ /* 0x003fe20000410000 */ /*2540*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*2550*/ FFMA R8, -R9, R9, R16 ; /* 0x0000000909087223 */ /* 0x000fc80000000110 */ /*2560*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*2570*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2580*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*2590*/ BSSY B2, 0x2640 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*25a0*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*25b0*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*25c0*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*25d0*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*25e0*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*25f0*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*2600*/ @!P0 BRA 0x2630 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*2610*/ MOV R10, 0x2630 ; /* 0x00002630000a7802 */ /* 0x000fe40000000f00 */ /*2620*/ CALL.REL.NOINC 0x3340 ; /* 0x00000d1000007944 */ /* 0x000fea0003c00000 */ /*2630*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2640*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*2650*/ BSSY B0, 0x26f0 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*2660*/ IMAD.SHL.U32 R17, R8, 0x8, RZ ; /* 0x0000000808117824 */ /* 0x001fcc00078e00ff */ /*2670*/ LDS.64 R8, [R17] ; /* 0x0000000011087984 */ /* 0x000e240000000a00 */ /*2680*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*2690*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*26a0*/ ATOMS.CAST.SPIN.64 R10, [R17], R8, R10 ; /* 0x00000008110a738d */ /* 0x000e24000180040a */ /*26b0*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*26c0*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*26d0*/ @!P0 BRA 0x2670 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*26e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*26f0*/ LDG.E R9, [R6.64+0x4] ; /* 0x0000040606097981 */ /* 0x000ea8000c1e1900 */ /*2700*/ LDG.E R8, [R6.64] ; /* 0x0000000606087981 */ /* 0x000ee8000c1e1900 */ /*2710*/ LDG.E R10, [R6.64+0x8] ; /* 0x00000806060a7981 */ /* 0x000f22000c1e1900 */ /*2720*/ BSSY B0, 0x2870 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*2730*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x004fe20000000000 */ /*2740*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*2750*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*2760*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*2770*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*2780*/ FFMA R16, R10, R10, R9 ; /* 0x0000000a0a107223 */ /* 0x000fc80000000009 */ /*2790*/ MUFU.RSQ R11, R16 ; /* 0x00000010000b7308 */ /* 0x0000620000001400 */ /*27a0*/ IADD3 R8, R16, -0xd000000, RZ ; /* 0xf300000010087810 */ /* 0x000fc80007ffe0ff */ /*27b0*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*27c0*/ @!P0 BRA 0x2820 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*27d0*/ IMAD.MOV.U32 R8, RZ, RZ, R16 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0010 */ /*27e0*/ MOV R10, 0x2800 ; /* 0x00002800000a7802 */ /* 0x000fe40000000f00 */ /*27f0*/ CALL.REL.NOINC 0x31f0 ; /* 0x000009f000007944 */ /* 0x000fea0003c00000 */ /*2800*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*2810*/ BRA 0x2860 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*2820*/ FMUL.FTZ R9, R16, R11 ; /* 0x0000000b10097220 */ /* 0x003fe20000410000 */ /*2830*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*2840*/ FFMA R8, -R9, R9, R16 ; /* 0x0000000909087223 */ /* 0x000fc80000000110 */ /*2850*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*2860*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2870*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*2880*/ BSSY B2, 0x2930 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*2890*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*28a0*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*28b0*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*28c0*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*28d0*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*28e0*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*28f0*/ @!P0 BRA 0x2920 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*2900*/ MOV R10, 0x2920 ; /* 0x00002920000a7802 */ /* 0x000fe40000000f00 */ /*2910*/ CALL.REL.NOINC 0x3340 ; /* 0x00000a2000007944 */ /* 0x000fea0003c00000 */ /*2920*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2930*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*2940*/ BSSY B0, 0x29e0 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*2950*/ IMAD.SHL.U32 R17, R8, 0x8, RZ ; /* 0x0000000808117824 */ /* 0x001fcc00078e00ff */ /*2960*/ LDS.64 R8, [R17] ; /* 0x0000000011087984 */ /* 0x000e240000000a00 */ /*2970*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*2980*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*2990*/ ATOMS.CAST.SPIN.64 R10, [R17], R8, R10 ; /* 0x00000008110a738d */ /* 0x000e24000180040a */ /*29a0*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*29b0*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*29c0*/ @!P0 BRA 0x2960 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*29d0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*29e0*/ LDG.E R9, [R6.64+0x10] ; /* 0x0000100606097981 */ /* 0x000ea8000c1e1900 */ /*29f0*/ LDG.E R8, [R6.64+0xc] ; /* 0x00000c0606087981 */ /* 0x000ee8000c1e1900 */ /*2a00*/ LDG.E R10, [R6.64+0x14] ; /* 0x00001406060a7981 */ /* 0x000f22000c1e1900 */ /*2a10*/ BSSY B0, 0x2b60 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*2a20*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x004fe20000000000 */ /*2a30*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*2a40*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*2a50*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*2a60*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*2a70*/ FFMA R16, R10, R10, R9 ; /* 0x0000000a0a107223 */ /* 0x000fc80000000009 */ /*2a80*/ MUFU.RSQ R11, R16 ; /* 0x00000010000b7308 */ /* 0x0000620000001400 */ /*2a90*/ IADD3 R8, R16, -0xd000000, RZ ; /* 0xf300000010087810 */ /* 0x000fc80007ffe0ff */ /*2aa0*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*2ab0*/ @!P0 BRA 0x2b10 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*2ac0*/ IMAD.MOV.U32 R8, RZ, RZ, R16 ; /* 0x000000ffff087224 */ /* 0x003fe200078e0010 */ /*2ad0*/ MOV R10, 0x2af0 ; /* 0x00002af0000a7802 */ /* 0x000fe40000000f00 */ /*2ae0*/ CALL.REL.NOINC 0x31f0 ; /* 0x0000070000007944 */ /* 0x000fea0003c00000 */ /*2af0*/ MOV R9, R25 ; /* 0x0000001900097202 */ /* 0x000fe20000000f00 */ /*2b00*/ BRA 0x2b50 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*2b10*/ FMUL.FTZ R9, R16, R11 ; /* 0x0000000b10097220 */ /* 0x003fe20000410000 */ /*2b20*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*2b30*/ FFMA R8, -R9, R9, R16 ; /* 0x0000000909087223 */ /* 0x000fc80000000110 */ /*2b40*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*2b50*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2b60*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*2b70*/ BSSY B2, 0x2c20 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*2b80*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*2b90*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*2ba0*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*2bb0*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*2bc0*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*2bd0*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*2be0*/ @!P0 BRA 0x2c10 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*2bf0*/ MOV R10, 0x2c10 ; /* 0x00002c10000a7802 */ /* 0x000fe40000000f00 */ /*2c00*/ CALL.REL.NOINC 0x3340 ; /* 0x0000073000007944 */ /* 0x000fea0003c00000 */ /*2c10*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2c20*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*2c30*/ BSSY B0, 0x2cd0 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*2c40*/ IMAD.SHL.U32 R17, R8, 0x8, RZ ; /* 0x0000000808117824 */ /* 0x001fcc00078e00ff */ /*2c50*/ LDS.64 R8, [R17] ; /* 0x0000000011087984 */ /* 0x000e240000000a00 */ /*2c60*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fc80007f1e0ff */ /*2c70*/ IADD3.X R11, RZ, R9, RZ, P0, !PT ; /* 0x00000009ff0b7210 */ /* 0x000fcc00007fe4ff */ /*2c80*/ ATOMS.CAST.SPIN.64 R10, [R17], R8, R10 ; /* 0x00000008110a738d */ /* 0x000e24000180040a */ /*2c90*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*2ca0*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*2cb0*/ @!P0 BRA 0x2c50 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*2cc0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2cd0*/ IADD3 R6, P0, R6, 0x30, RZ ; /* 0x0000003006067810 */ /* 0x000fe40007f1e0ff */ /*2ce0*/ IADD3 R13, R13, 0x4, RZ ; /* 0x000000040d0d7810 */ /* 0x000fc60007ffe0ff */ /*2cf0*/ IMAD.X R7, RZ, RZ, R7, P0 ; /* 0x000000ffff077224 */ /* 0x000fe200000e0607 */ /*2d00*/ @!P4 CALL.REL.NOINC 0x2d20 ; /* 0x000000100000c944 */ /* 0x000fe20003c00000 */ /*2d10*/ BRA 0x20f0 ; /* 0xfffff3d000007947 */ /* 0x000fea000383ffff */ /*2d20*/ ISETP.NE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */ /* 0x000fda0003f05270 */ /*2d30*/ @!P0 BRA 0x30f0 ; /* 0x000003b000008947 */ /* 0x000fea0003800000 */ /*2d40*/ IADD3 R6, P0, R13.reuse, R20, RZ ; /* 0x000000140d067210 */ /* 0x040fe40007f1e0ff */ /*2d50*/ MOV R7, 0xc ; /* 0x0000000c00077802 */ /* 0x000fe40000000f00 */ /*2d60*/ LEA.HI.X.SX32 R13, R13, R21, 0x1, P0 ; /* 0x000000150d0d7211 */ /* 0x000fc600000f0eff */ /*2d70*/ IMAD.WIDE.U32 R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fc800078e0007 */ /*2d80*/ IMAD R13, R13, 0xc, RZ ; /* 0x0000000c0d0d7824 */ /* 0x000fe200078e02ff */ /*2d90*/ IADD3 R6, P0, R6, 0x8, RZ ; /* 0x0000000806067810 */ /* 0x000fca0007f1e0ff */ /*2da0*/ IMAD.X R7, R7, 0x1, R13, P0 ; /* 0x0000000107077824 */ /* 0x000fca00000e060d */ /*2db0*/ LDG.E R9, [R6.64+-0x4] ; /* 0xfffffc0606097981 */ /* 0x000ea8000c1e1900 */ /*2dc0*/ LDG.E R8, [R6.64+-0x8] ; /* 0xfffff80606087981 */ /* 0x000ee8000c1e1900 */ /*2dd0*/ LDG.E R10, [R6.64] ; /* 0x00000006060a7981 */ /* 0x000f22000c1e1900 */ /*2de0*/ BSSY B0, 0x2f30 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*2df0*/ FADD R9, R4, -R9 ; /* 0x8000000904097221 */ /* 0x024fe20000000000 */ /*2e00*/ FADD R8, R3, -R8 ; /* 0x8000000803087221 */ /* 0x008fc60000000000 */ /*2e10*/ FMUL R9, R9, R9 ; /* 0x0000000909097220 */ /* 0x000fe20000400000 */ /*2e20*/ FADD R10, R5, -R10 ; /* 0x8000000a050a7221 */ /* 0x010fc60000000000 */ /*2e30*/ FFMA R9, R8, R8, R9 ; /* 0x0000000808097223 */ /* 0x000fc80000000009 */ /*2e40*/ FFMA R12, R10, R10, R9 ; /* 0x0000000a0a0c7223 */ /* 0x000fc80000000009 */ /*2e50*/ MUFU.RSQ R11, R12 ; /* 0x0000000c000b7308 */ /* 0x0000620000001400 */ /*2e60*/ IADD3 R8, R12, -0xd000000, RZ ; /* 0xf30000000c087810 */ /* 0x000fc80007ffe0ff */ /*2e70*/ ISETP.GT.U32.AND P0, PT, R8, 0x727fffff, PT ; /* 0x727fffff0800780c */ /* 0x000fda0003f04070 */ /*2e80*/ @!P0 BRA 0x2ee0 ; /* 0x0000005000008947 */ /* 0x000fea0003800000 */ /*2e90*/ MOV R8, R12 ; /* 0x0000000c00087202 */ /* 0x003fe40000000f00 */ /*2ea0*/ MOV R10, 0x2ec0 ; /* 0x00002ec0000a7802 */ /* 0x000fe40000000f00 */ /*2eb0*/ CALL.REL.NOINC 0x31f0 ; /* 0x0000033000007944 */ /* 0x000fea0003c00000 */ /*2ec0*/ IMAD.MOV.U32 R9, RZ, RZ, R25 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0019 */ /*2ed0*/ BRA 0x2f20 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*2ee0*/ FMUL.FTZ R9, R12, R11 ; /* 0x0000000b0c097220 */ /* 0x003fe20000410000 */ /*2ef0*/ FMUL.FTZ R10, R11, 0.5 ; /* 0x3f0000000b0a7820 */ /* 0x000fc60000410000 */ /*2f00*/ FFMA R8, -R9, R9, R12 ; /* 0x0000000909087223 */ /* 0x000fc8000000010c */ /*2f10*/ FFMA R9, R8, R10, R9 ; /* 0x0000000a08097223 */ /* 0x000fe40000000009 */ /*2f20*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*2f30*/ MUFU.RCP R11, c[0x0][0x168] ; /* 0x00005a00000b7b08 */ /* 0x000e220000001000 */ /*2f40*/ BSSY B2, 0x2ff0 ; /* 0x000000a000027945 */ /* 0x000fee0003800000 */ /*2f50*/ FCHK P0, R9, c[0x0][0x168] ; /* 0x00005a0009007b02 */ /* 0x000e620000000000 */ /*2f60*/ FFMA R8, R11, -R2, 1 ; /* 0x3f8000000b087423 */ /* 0x001fc80000000802 */ /*2f70*/ FFMA R8, R11, R8, R11 ; /* 0x000000080b087223 */ /* 0x000fc8000000000b */ /*2f80*/ FFMA R10, R8, R9, RZ ; /* 0x00000009080a7223 */ /* 0x000fc800000000ff */ /*2f90*/ FFMA R11, R10, -c[0x0][0x168], R9 ; /* 0x80005a000a0b7a23 */ /* 0x000fc80000000009 */ /*2fa0*/ FFMA R8, R8, R11, R10 ; /* 0x0000000b08087223 */ /* 0x000fe2000000000a */ /*2fb0*/ @!P0 BRA 0x2fe0 ; /* 0x0000002000008947 */ /* 0x002fea0003800000 */ /*2fc0*/ MOV R10, 0x2fe0 ; /* 0x00002fe0000a7802 */ /* 0x000fe40000000f00 */ /*2fd0*/ CALL.REL.NOINC 0x3340 ; /* 0x0000036000007944 */ /* 0x000fea0003c00000 */ /*2fe0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2ff0*/ F2I.TRUNC.NTZ R8, R8 ; /* 0x0000000800087305 */ /* 0x001e22000020f100 */ /*3000*/ BSSY B0, 0x30a0 ; /* 0x0000009000007945 */ /* 0x000fe20003800000 */ /*3010*/ SHF.L.U32 R13, R8, 0x3, RZ ; /* 0x00000003080d7819 */ /* 0x001fcc00000006ff */ /*3020*/ LDS.64 R8, [R13] ; /* 0x000000000d087984 */ /* 0x000e240000000a00 */ /*3030*/ IADD3 R10, P0, R8, 0x1, RZ ; /* 0x00000001080a7810 */ /* 0x001fca0007f1e0ff */ /*3040*/ IMAD.X R11, RZ, RZ, R9, P0 ; /* 0x000000ffff0b7224 */ /* 0x000fcc00000e0609 */ /*3050*/ ATOMS.CAST.SPIN.64 R10, [R13], R8, R10 ; /* 0x000000080d0a738d */ /* 0x000e24000180040a */ /*3060*/ ISETP.EQ.U32.AND P0, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x001fc80003f02070 */ /*3070*/ ISETP.EQ.U32.AND.EX P0, PT, R11, RZ, PT, P0 ; /* 0x000000ff0b00720c */ /* 0x000fda0003f02100 */ /*3080*/ @!P0 BRA 0x3020 ; /* 0xffffff9000008947 */ /* 0x000fea000383ffff */ /*3090*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*30a0*/ IADD3 R15, R15, -0x1, RZ ; /* 0xffffffff0f0f7810 */ /* 0x000fe40007ffe0ff */ /*30b0*/ IADD3 R6, P1, R6, 0xc, RZ ; /* 0x0000000c06067810 */ /* 0x000fe40007f3e0ff */ /*30c0*/ ISETP.NE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */ /* 0x000fe40003f05270 */ /*30d0*/ IADD3.X R7, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff077210 */ /* 0x000fd60000ffe4ff */ /*30e0*/ @P0 BRA 0x2db0 ; /* 0xfffffcc000000947 */ /* 0x000fea000383ffff */ /*30f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*3100*/ @P5 EXIT ; /* 0x000000000000594d */ /* 0x000fea0003800000 */ /*3110*/ IMAD R3, R0, c[0x0][0x180], RZ ; /* 0x0000600000037a24 */ /* 0x021fe200078e02ff */ /*3120*/ LDS.64 R6, [R14.X8] ; /* 0x000000000e067984 */ /* 0x0000680000008a00 */ /*3130*/ IADD3 R3, P0, R3, R14, RZ ; /* 0x0000000e03037210 */ /* 0x000fc80007f1e0ff */ /*3140*/ LEA.HI.X.SX32 R4, R14, RZ, 0x1, P0 ; /* 0x000000ff0e047211 */ /* 0x000fe400000f0eff */ /*3150*/ LEA R2, P0, R3, c[0x0][0x178], 0x3 ; /* 0x00005e0003027a11 */ /* 0x000fc800078018ff */ /*3160*/ LEA.HI.X R3, R3, c[0x0][0x17c], R4, 0x3, P0 ; /* 0x00005f0003037a11 */ /* 0x000fca00000f1c04 */ /*3170*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000602047981 */ /* 0x000e62000c1e1b00 */ /*3180*/ IADD3 R14, R14, c[0x0][0x0], RZ ; /* 0x000000000e0e7a10 */ /* 0x001fe40007ffe0ff */ /*3190*/ IADD3 R4, P0, R4, R6, RZ ; /* 0x0000000604047210 */ /* 0x002fca0007f1e0ff */ /*31a0*/ IMAD.X R5, R5, 0x1, R7, P0 ; /* 0x0000000105057824 */ /* 0x000fe200000e0607 */ /*31b0*/ ISETP.GE.AND P0, PT, R14, c[0x0][0x180], PT ; /* 0x000060000e007a0c */ /* 0x000fc80003f06270 */ /*31c0*/ STG.E.64 [R2.64], R4 ; /* 0x0000000402007986 */ /* 0x0001f2000c101b06 */ /*31d0*/ @!P0 BRA 0x3110 ; /* 0xffffff3000008947 */ /* 0x000fea000383ffff */ /*31e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*31f0*/ LOP3.LUT P0, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff08ff7812 */ /* 0x000fda000780c0ff */ /*3200*/ @!P0 MOV R25, R8 ; /* 0x0000000800198202 */ /* 0x000fe20000000f00 */ /*3210*/ @!P0 BRA 0x3320 ; /* 0x0000010000008947 */ /* 0x000fea0003800000 */ /*3220*/ FSETP.GEU.FTZ.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720b */ /* 0x000fda0003f1e000 */ /*3230*/ @!P0 IMAD.MOV.U32 R25, RZ, RZ, 0x7fffffff ; /* 0x7fffffffff198424 */ /* 0x000fe200078e00ff */ /*3240*/ @!P0 BRA 0x3320 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*3250*/ FSETP.GTU.FTZ.AND P0, PT, |R8|, +INF , PT ; /* 0x7f8000000800780b */ /* 0x000fda0003f1c200 */ /*3260*/ @P0 FADD.FTZ R25, R8, 1 ; /* 0x3f80000008190421 */ /* 0x000fe20000010000 */ /*3270*/ @P0 BRA 0x3320 ; /* 0x000000a000000947 */ /* 0x000fea0003800000 */ /*3280*/ FSETP.NEU.FTZ.AND P0, PT, |R8|, +INF , PT ; /* 0x7f8000000800780b */ /* 0x000fda0003f1d200 */ /*3290*/ @P0 FFMA R23, R8, 1.84467440737095516160e+19, RZ ; /* 0x5f80000008170823 */ /* 0x000fe200000000ff */ /*32a0*/ @!P0 MOV R25, R8 ; /* 0x0000000800198202 */ /* 0x000fc60000000f00 */ /*32b0*/ @P0 MUFU.RSQ R26, R23 ; /* 0x00000017001a0308 */ /* 0x000e240000001400 */ /*32c0*/ @P0 FMUL.FTZ R24, R23, R26 ; /* 0x0000001a17180220 */ /* 0x001fe20000410000 */ /*32d0*/ @P0 FMUL.FTZ R9, R26, 0.5 ; /* 0x3f0000001a090820 */ /* 0x000fc60000410000 */ /*32e0*/ @P0 FADD.FTZ R11, -R24, -RZ ; /* 0x800000ff180b0221 */ /* 0x000fc80000010100 */ /*32f0*/ @P0 FFMA R11, R24, R11, R23 ; /* 0x0000000b180b0223 */ /* 0x000fc80000000017 */ /*3300*/ @P0 FFMA R9, R11, R9, R24 ; /* 0x000000090b090223 */ /* 0x000fc80000000018 */ /*3310*/ @P0 FMUL.FTZ R25, R9, 2.3283064365386962891e-10 ; /* 0x2f80000009190820 */ /* 0x000fe20000410000 */ /*3320*/ MOV R11, 0x0 ; /* 0x00000000000b7802 */ /* 0x000fc80000000f00 */ /*3330*/ RET.REL.NODEC R10 0x0 ; /* 0xffffccc00a007950 */ /* 0x000fea0003c3ffff */ /*3340*/ SHF.R.U32.HI R11, RZ, 0x17, R2 ; /* 0x00000017ff0b7819 */ /* 0x000fe20000011602 */ /*3350*/ BSSY B0, 0x39a0 ; /* 0x0000064000007945 */ /* 0x000fe20003800000 */ /*3360*/ SHF.R.U32.HI R24, RZ, 0x17, R9 ; /* 0x00000017ff187819 */ /* 0x000fe20000011609 */ /*3370*/ IMAD.MOV.U32 R27, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff1b7624 */ /* 0x000fe200078e00ff */ /*3380*/ LOP3.LUT R11, R11, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0b0b7812 */ /* 0x000fe400078ec0ff */ /*3390*/ LOP3.LUT R24, R24, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff18187812 */ /* 0x000fe400078ec0ff */ /*33a0*/ IADD3 R25, R11, -0x1, RZ ; /* 0xffffffff0b197810 */ /* 0x000fe40007ffe0ff */ /*33b0*/ IADD3 R26, R24, -0x1, RZ ; /* 0xffffffff181a7810 */ /* 0x000fc40007ffe0ff */ /*33c0*/ ISETP.GT.U32.AND P0, PT, R25, 0xfd, PT ; /* 0x000000fd1900780c */ /* 0x000fc80003f04070 */ /*33d0*/ ISETP.GT.U32.OR P0, PT, R26, 0xfd, P0 ; /* 0x000000fd1a00780c */ /* 0x000fda0000704470 */ /*33e0*/ @!P0 MOV R23, RZ ; /* 0x000000ff00178202 */ /* 0x000fe20000000f00 */ /*33f0*/ @!P0 BRA 0x3580 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*3400*/ MOV R8, c[0x0][0x168] ; /* 0x00005a0000087a02 */ /* 0x000fe40000000f00 */ /*3410*/ FSETP.GTU.FTZ.AND P0, PT, |R9|, +INF , PT ; /* 0x7f8000000900780b */ /* 0x000fe40003f1c200 */ /*3420*/ FSETP.GTU.FTZ.AND P1, PT, |R8|, +INF , PT ; /* 0x7f8000000800780b */ /* 0x000fc80003f3c200 */ /*3430*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*3440*/ @P0 BRA 0x3980 ; /* 0x0000053000000947 */ /* 0x000fea0003800000 */ /*3450*/ LOP3.LUT P0, RZ, R27, 0x7fffffff, R9, 0xc8, !PT ; /* 0x7fffffff1bff7812 */ /* 0x000fda000780c809 */ /*3460*/ @!P0 BRA 0x3960 ; /* 0x000004f000008947 */ /* 0x000fea0003800000 */ /*3470*/ FSETP.NEU.FTZ.AND P0, PT, |R9|.reuse, +INF , PT ; /* 0x7f8000000900780b */ /* 0x040fe40003f1d200 */ /*3480*/ FSETP.NEU.FTZ.AND P2, PT, |R8|, +INF , PT ; /* 0x7f8000000800780b */ /* 0x000fe40003f5d200 */ /*3490*/ FSETP.NEU.FTZ.AND P1, PT, |R9|, +INF , PT ; /* 0x7f8000000900780b */ /* 0x000fd60003f3d200 */ /*34a0*/ @!P2 BRA !P0, 0x3960 ; /* 0x000004b00000a947 */ /* 0x000fea0004000000 */ /*34b0*/ LOP3.LUT P0, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09ff7812 */ /* 0x000fc8000780c0ff */ /*34c0*/ PLOP3.LUT P0, PT, P2, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0001700572 */ /*34d0*/ @P0 BRA 0x3940 ; /* 0x0000046000000947 */ /* 0x000fea0003800000 */ /*34e0*/ LOP3.LUT P0, RZ, R27, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff1bff7812 */ /* 0x000fc8000780c0ff */ /*34f0*/ PLOP3.LUT P1, PT, P1, P0, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f20572 */ /*3500*/ @P1 BRA 0x3910 ; /* 0x0000040000001947 */ /* 0x000fea0003800000 */ /*3510*/ ISETP.GE.AND P0, PT, R26, RZ, PT ; /* 0x000000ff1a00720c */ /* 0x000fe40003f06270 */ /*3520*/ ISETP.GE.AND P1, PT, R25, RZ, PT ; /* 0x000000ff1900720c */ /* 0x000fd60003f26270 */ /*3530*/ @P0 IMAD.MOV.U32 R23, RZ, RZ, RZ ; /* 0x000000ffff170224 */ /* 0x000fe200078e00ff */ /*3540*/ @!P0 MOV R23, 0xffffffc0 ; /* 0xffffffc000178802 */ /* 0x000fe20000000f00 */ /*3550*/ @!P0 FFMA R9, R9, 1.84467440737095516160e+19, RZ ; /* 0x5f80000009098823 */ /* 0x000fe200000000ff */ /*3560*/ @!P1 FFMA R27, R8, 1.84467440737095516160e+19, RZ ; /* 0x5f800000081b9823 */ /* 0x000fe400000000ff */ /*3570*/ @!P1 IADD3 R23, R23, 0x40, RZ ; /* 0x0000004017179810 */ /* 0x000fe40007ffe0ff */ /*3580*/ LEA R28, R11, 0xc0800000, 0x17 ; /* 0xc08000000b1c7811 */ /* 0x000fe200078eb8ff */ /*3590*/ BSSY B1, 0x3900 ; /* 0x0000036000017945 */ /* 0x000fe20003800000 */ /*35a0*/ IADD3 R24, R24, -0x7f, RZ ; /* 0xffffff8118187810 */ /* 0x000fe40007ffe0ff */ /*35b0*/ IADD3 R28, -R28, R27, RZ ; /* 0x0000001b1c1c7210 */ /* 0x000fc60007ffe1ff */ /*35c0*/ IMAD R8, R24, -0x800000, R9 ; /* 0xff80000018087824 */ /* 0x000fe200078e0209 */ /*35d0*/ MUFU.RCP R26, R28 ; /* 0x0000001c001a7308 */ /* 0x000e220000001000 */ /*35e0*/ FADD.FTZ R25, -R28, -RZ ; /* 0x800000ff1c197221 */ /* 0x000fe20000010100 */ /*35f0*/ IADD3 R24, R24, 0x7f, -R11 ; /* 0x0000007f18187810 */ /* 0x000fca0007ffe80b */ /*3600*/ IMAD.IADD R23, R24, 0x1, R23 ; /* 0x0000000118177824 */ /* 0x000fe200078e0217 */ /*3610*/ FFMA R27, R26, R25, 1 ; /* 0x3f8000001a1b7423 */ /* 0x001fc80000000019 */ /*3620*/ FFMA R27, R26, R27, R26 ; /* 0x0000001b1a1b7223 */ /* 0x000fc8000000001a */ /*3630*/ FFMA R26, R8, R27, RZ ; /* 0x0000001b081a7223 */ /* 0x000fc800000000ff */ /*3640*/ FFMA R9, R25, R26, R8 ; /* 0x0000001a19097223 */ /* 0x000fc80000000008 */ /*3650*/ FFMA R26, R27, R9, R26 ; /* 0x000000091b1a7223 */ /* 0x000fc8000000001a */ /*3660*/ FFMA R25, R25, R26, R8 ; /* 0x0000001a19197223 */ /* 0x000fc80000000008 */ /*3670*/ FFMA R8, R27, R25, R26 ; /* 0x000000191b087223 */ /* 0x000fca000000001a */ /*3680*/ SHF.R.U32.HI R9, RZ, 0x17, R8 ; /* 0x00000017ff097819 */ /* 0x000fc80000011608 */ /*3690*/ LOP3.LUT R24, R9, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff09187812 */ /* 0x000fc800078ec0ff */ /*36a0*/ IADD3 R9, R24, R23, RZ ; /* 0x0000001718097210 */ /* 0x000fc80007ffe0ff */ /*36b0*/ IADD3 R11, R9, -0x1, RZ ; /* 0xffffffff090b7810 */ /* 0x000fc80007ffe0ff */ /*36c0*/ ISETP.GE.U32.AND P0, PT, R11, 0xfe, PT ; /* 0x000000fe0b00780c */ /* 0x000fda0003f06070 */ /*36d0*/ @!P0 BRA 0x38e0 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*36e0*/ ISETP.GT.AND P0, PT, R9, 0xfe, PT ; /* 0x000000fe0900780c */ /* 0x000fda0003f04270 */ /*36f0*/ @P0 BRA 0x38b0 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*3700*/ ISETP.GE.AND P0, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fda0003f06270 */ /*3710*/ @P0 BRA 0x38f0 ; /* 0x000001d000000947 */ /* 0x000fea0003800000 */ /*3720*/ ISETP.GE.AND P0, PT, R9, -0x18, PT ; /* 0xffffffe80900780c */ /* 0x000fe40003f06270 */ /*3730*/ LOP3.LUT R8, R8, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000008087812 */ /* 0x000fd600078ec0ff */ /*3740*/ @!P0 BRA 0x38f0 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*3750*/ FFMA.RZ R11, R27, R25.reuse, R26.reuse ; /* 0x000000191b0b7223 */ /* 0x180fe2000000c01a */ /*3760*/ IADD3 R24, R9, 0x20, RZ ; /* 0x0000002009187810 */ /* 0x000fe20007ffe0ff */ /*3770*/ FFMA.RP R23, R27.reuse, R25.reuse, R26.reuse ; /* 0x000000191b177223 */ /* 0x1c0fe2000000801a */ /*3780*/ FFMA.RM R26, R27, R25, R26 ; /* 0x000000191b1a7223 */ /* 0x000fe2000000401a */ /*3790*/ ISETP.NE.AND P2, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe40003f45270 */ /*37a0*/ LOP3.LUT R11, R11, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0b0b7812 */ /* 0x000fe400078ec0ff */ /*37b0*/ ISETP.NE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe40003f05270 */ /*37c0*/ LOP3.LUT R11, R11, 0x800000, RZ, 0xfc, !PT ; /* 0x008000000b0b7812 */ /* 0x000fc400078efcff */ /*37d0*/ IADD3 R9, -R9, RZ, RZ ; /* 0x000000ff09097210 */ /* 0x000fe40007ffe1ff */ /*37e0*/ SHF.L.U32 R24, R11, R24, RZ ; /* 0x000000180b187219 */ /* 0x000fe400000006ff */ /*37f0*/ FSETP.NEU.FTZ.AND P1, PT, R23, R26, PT ; /* 0x0000001a1700720b */ /* 0x000fe40003f3d000 */ /*3800*/ SEL R26, R9, RZ, P2 ; /* 0x000000ff091a7207 */ /* 0x000fe40001000000 */ /*3810*/ ISETP.NE.AND P0, PT, R24, RZ, P0 ; /* 0x000000ff1800720c */ /* 0x000fe40000705270 */ /*3820*/ SHF.R.U32.HI R24, RZ, R26, R11 ; /* 0x0000001aff187219 */ /* 0x000fc4000001160b */ /*3830*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40000f01570 */ /*3840*/ SHF.R.U32.HI R11, RZ, 0x1, R24 ; /* 0x00000001ff0b7819 */ /* 0x000fe40000011618 */ /*3850*/ SEL R26, RZ, 0x1, !P0 ; /* 0x00000001ff1a7807 */ /* 0x000fc80004000000 */ /*3860*/ LOP3.LUT R9, R26, 0x1, R11, 0xf8, !PT ; /* 0x000000011a097812 */ /* 0x000fc800078ef80b */ /*3870*/ LOP3.LUT R24, R9, R24, RZ, 0xc0, !PT ; /* 0x0000001809187212 */ /* 0x000fca00078ec0ff */ /*3880*/ IMAD.IADD R11, R11, 0x1, R24 ; /* 0x000000010b0b7824 */ /* 0x000fca00078e0218 */ /*3890*/ LOP3.LUT R8, R11, R8, RZ, 0xfc, !PT ; /* 0x000000080b087212 */ /* 0x000fe200078efcff */ /*38a0*/ BRA 0x38f0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*38b0*/ LOP3.LUT R8, R8, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000008087812 */ /* 0x000fc800078ec0ff */ /*38c0*/ LOP3.LUT R8, R8, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000008087812 */ /* 0x000fe200078efcff */ /*38d0*/ BRA 0x38f0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*38e0*/ LEA R8, R23, R8, 0x17 ; /* 0x0000000817087211 */ /* 0x000fe400078eb8ff */ /*38f0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*3900*/ BRA 0x3990 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*3910*/ LOP3.LUT R8, R27, 0x80000000, R9, 0x48, !PT ; /* 0x800000001b087812 */ /* 0x000fc800078e4809 */ /*3920*/ LOP3.LUT R8, R8, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000008087812 */ /* 0x000fe200078efcff */ /*3930*/ BRA 0x3990 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*3940*/ LOP3.LUT R8, R27, 0x80000000, R9, 0x48, !PT ; /* 0x800000001b087812 */ /* 0x000fe200078e4809 */ /*3950*/ BRA 0x3990 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*3960*/ MUFU.RSQ R8, -QNAN ; /* 0xffc0000000087908 */ /* 0x000e220000001400 */ /*3970*/ BRA 0x3990 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*3980*/ FADD.FTZ R8, R9, R8 ; /* 0x0000000809087221 */ /* 0x000fe40000010000 */ /*3990*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*39a0*/ MOV R11, 0x0 ; /* 0x00000000000b7802 */ /* 0x000fc80000000f00 */ /*39b0*/ RET.REL.NODEC R10 0x0 ; /* 0xffffc6400a007950 */ /* 0x000fea0003c3ffff */ /*39c0*/ BRA 0x39c0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*39d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*39e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*39f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3a00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3a10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3a20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3a30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3a40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3a50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3a60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3a70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z18kernelSumHistogramPyS_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ IABS R5, c[0x0][0x178] ; /* 0x00005e0000057a13 */ /* 0x000fe20000000000 */ /*0020*/ BSSY B0, 0xee0 ; /* 0x00000eb000007945 */ /* 0x000fe60003800000 */ /*0030*/ I2F.RP R0, R5 ; /* 0x0000000500007306 */ /* 0x000e300000209400 */ /*0040*/ MUFU.RCP R0, R0 ; /* 0x0000000000007308 */ /* 0x001e240000001000 */ /*0050*/ IADD3 R2, R0, 0xffffffe, RZ ; /* 0x0ffffffe00027810 */ /* 0x001fcc0007ffe0ff */ /*0060*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */ /* 0x000064000021f000 */ /*0070*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x001fe400078e00ff */ /*0080*/ IMAD.MOV R4, RZ, RZ, -R3 ; /* 0x000000ffff047224 */ /* 0x002fc800078e0a03 */ /*0090*/ IMAD R7, R4, R5, RZ ; /* 0x0000000504077224 */ /* 0x000fe200078e02ff */ /*00a0*/ IABS R4, c[0x0][0x170] ; /* 0x00005c0000047a13 */ /* 0x000fc60000000000 */ /*00b0*/ IMAD.HI.U32 R3, R3, R7, R2 ; /* 0x0000000703037227 */ /* 0x000fe400078e0002 */ /*00c0*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e280000002500 */ /*00d0*/ IMAD.HI.U32 R3, R3, R4, RZ ; /* 0x0000000403037227 */ /* 0x000fc800078e00ff */ /*00e0*/ IMAD.MOV R0, RZ, RZ, -R3 ; /* 0x000000ffff007224 */ /* 0x000fc800078e0a03 */ /*00f0*/ IMAD R0, R5, R0, R4 ; /* 0x0000000005007224 */ /* 0x000fe400078e0204 */ /*0100*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff047624 */ /* 0x000fc600078e00ff */ /*0110*/ ISETP.GT.U32.AND P1, PT, R5, R0, PT ; /* 0x000000000500720c */ /* 0x000fda0003f24070 */ /*0120*/ @!P1 IMAD.IADD R0, R0, 0x1, -R5 ; /* 0x0000000100009824 */ /* 0x000fe200078e0a05 */ /*0130*/ @!P1 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103039810 */ /* 0x000fe40007ffe0ff */ /*0140*/ ISETP.NE.AND P1, PT, RZ, c[0x0][0x178], PT ; /* 0x00005e00ff007a0c */ /* 0x000fe40003f25270 */ /*0150*/ ISETP.GE.U32.AND P0, PT, R0, R5, PT ; /* 0x000000050000720c */ /* 0x000fe40003f06070 */ /*0160*/ LOP3.LUT R0, R4, c[0x0][0x178], RZ, 0x3c, !PT ; /* 0x00005e0004007a12 */ /* 0x000fe200078e3cff */ /*0170*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000e260000002100 */ /*0180*/ ISETP.GE.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fce0003f46270 */ /*0190*/ @P0 IADD3 R3, R3, 0x1, RZ ; /* 0x0000000103030810 */ /* 0x000fcc0007ffe0ff */ /*01a0*/ @!P2 IMAD.MOV R3, RZ, RZ, -R3 ; /* 0x000000ffff03a224 */ /* 0x000fe200078e0a03 */ /*01b0*/ @!P1 LOP3.LUT R3, RZ, c[0x0][0x178], RZ, 0x33, !PT ; /* 0x00005e00ff039a12 */ /* 0x000fca00078e33ff */ /*01c0*/ IMAD.MOV R7, RZ, RZ, -R3 ; /* 0x000000ffff077224 */ /* 0x000fc800078e0a03 */ /*01d0*/ IMAD R0, R7, c[0x0][0x178], R4 ; /* 0x00005e0007007a24 */ /* 0x000fca00078e0204 */ /*01e0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fe20003f05270 */ /*01f0*/ IMAD R0, R2, c[0x0][0x0], R5 ; /* 0x0000000002007a24 */ /* 0x001fe200078e0205 */ /*0200*/ IADD3 R2, R3, 0x1, RZ ; /* 0x0000000103027810 */ /* 0x000fc80007ffe0ff */ /*0210*/ ISETP.GE.AND P1, PT, R0, c[0x0][0x174], PT ; /* 0x00005d0000007a0c */ /* 0x000fce0003f26270 */ /*0220*/ @!P0 IMAD.MOV R2, RZ, RZ, R3 ; /* 0x000000ffff028224 */ /* 0x000fcc00078e0203 */ /*0230*/ @P1 BRA 0xed0 ; /* 0x00000c9000001947 */ /* 0x000fea0003800000 */ /*0240*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fda0003f05270 */ /*0250*/ @!P0 BRA 0xe50 ; /* 0x00000bf000008947 */ /* 0x000fea0003800000 */ /*0260*/ ISETP.GT.U32.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */ /* 0x000fe40003f04070 */ /*0270*/ SHF.R.S32.HI R4, RZ, 0x1f, R2 ; /* 0x0000001fff047819 */ /* 0x000fc80000011402 */ /*0280*/ ISETP.GT.U32.AND.EX P0, PT, R4, RZ, PT, P0 ; /* 0x000000ff0400720c */ /* 0x000fc80003f04100 */ /*0290*/ SEL R3, R2, 0x1, P0 ; /* 0x0000000102037807 */ /* 0x000fe40000000000 */ /*02a0*/ SEL R4, R4, RZ, P0 ; /* 0x000000ff04047207 */ /* 0x000fe40000000000 */ /*02b0*/ IADD3 R5, P2, R3.reuse, -0x1, RZ ; /* 0xffffffff03057810 */ /* 0x040fe40007f5e0ff */ /*02c0*/ LOP3.LUT R2, R3, 0x3, RZ, 0xc0, !PT ; /* 0x0000000303027812 */ /* 0x000fe400078ec0ff */ /*02d0*/ ISETP.GE.U32.AND P1, PT, R5, 0x3, PT ; /* 0x000000030500780c */ /* 0x000fe40003f26070 */ /*02e0*/ IADD3 R3, P0, R2, -R3, RZ ; /* 0x8000000302037210 */ /* 0x000fc40007f1e0ff */ /*02f0*/ IADD3.X R5, R4, -0x1, RZ, P2, !PT ; /* 0xffffffff04057810 */ /* 0x000fc600017fe4ff */ /*0300*/ IMAD.X R4, RZ, RZ, ~R4, P0 ; /* 0x000000ffff047224 */ /* 0x000fe200000e0e04 */ /*0310*/ ISETP.GE.U32.AND.EX P1, PT, R5, RZ, PT, P1 ; /* 0x000000ff0500720c */ /* 0x000fce0003f26110 */ /*0320*/ SHF.R.S32.HI R5, RZ, 0x1f, R0 ; /* 0x0000001fff057819 */ /* 0x000fe20000011400 */ /*0330*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */ /* 0x000fe400078e00ff */ /*0340*/ IMAD.MOV.U32 R33, RZ, RZ, RZ ; /* 0x000000ffff217224 */ /* 0x000fe400078e00ff */ /*0350*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x000fe200078e00ff */ /*0360*/ @!P1 BRA 0xb90 ; /* 0x0000082000009947 */ /* 0x000fea0003800000 */ /*0370*/ ISETP.GE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe20003f06270 */ /*0380*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */ /* 0x000fe200078e00ff */ /*0390*/ LEA R34, P2, R0, c[0x0][0x160], 0x3 ; /* 0x0000580000227a11 */ /* 0x000fe200078418ff */ /*03a0*/ IMAD.MOV.U32 R33, RZ, RZ, RZ ; /* 0x000000ffff217224 */ /* 0x000fc400078e00ff */ /*03b0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x000fe200078e00ff */ /*03c0*/ LEA.HI.X R35, R0, c[0x0][0x164], R5, 0x3, P2 ; /* 0x0000590000237a11 */ /* 0x000fe200010f1c05 */ /*03d0*/ IMAD.MOV.U32 R30, RZ, RZ, R3 ; /* 0x000000ffff1e7224 */ /* 0x000fe400078e0003 */ /*03e0*/ IMAD.MOV.U32 R6, RZ, RZ, R4 ; /* 0x000000ffff067224 */ /* 0x000fc800078e0004 */ /*03f0*/ @P0 BRA 0xa50 ; /* 0x0000065000000947 */ /* 0x000fea0003800000 */ /*0400*/ IADD3 R8, P0, RZ, -R30, RZ ; /* 0x8000001eff087210 */ /* 0x000fc80007f1e0ff */ /*0410*/ ISETP.GT.U32.AND P2, PT, R8, 0xc, PT ; /* 0x0000000c0800780c */ /* 0x000fe20003f44070 */ /*0420*/ IMAD.X R8, RZ, RZ, ~R6, P0 ; /* 0x000000ffff087224 */ /* 0x000fe200000e0e06 */ /*0430*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fc80003f0f070 */ /*0440*/ ISETP.GT.AND.EX P2, PT, R8, RZ, PT, P2 ; /* 0x000000ff0800720c */ /* 0x000fda0003f44320 */ /*0450*/ @!P2 BRA 0x7f0 ; /* 0x000003900000a947 */ /* 0x000fea0003800000 */ /*0460*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0470*/ IMAD.MOV.U32 R31, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff1f7624 */ /* 0x000fe200078e00ff */ /*0480*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0490*/ LDG.E.64 R28, [R34.64] ; /* 0x00000004221c7981 */ /* 0x000ea2000c1e1b00 */ /*04a0*/ IMAD.WIDE R18, R31, 0x8, R34 ; /* 0x000000081f127825 */ /* 0x000fcc00078e0222 */ /*04b0*/ IMAD.WIDE R24, R31.reuse, 0x8, R18 ; /* 0x000000081f187825 */ /* 0x040fe400078e0212 */ /*04c0*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000412127981 */ /* 0x000ea8000c1e1b00 */ /*04d0*/ IMAD.WIDE R20, R31.reuse, 0x8, R24 ; /* 0x000000081f147825 */ /* 0x040fe400078e0218 */ /*04e0*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000418187981 */ /* 0x000ee8000c1e1b00 */ /*04f0*/ IMAD.WIDE R26, R31, 0x8, R20 ; /* 0x000000081f1a7825 */ /* 0x000fc400078e0214 */ /*0500*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000414147981 */ /* 0x000ee8000c1e1b00 */ /*0510*/ IMAD.WIDE R36, R31.reuse, 0x8, R26 ; /* 0x000000081f247825 */ /* 0x040fe400078e021a */ /*0520*/ LDG.E.64 R26, [R26.64] ; /* 0x000000041a1a7981 */ /* 0x000f28000c1e1b00 */ /*0530*/ LDG.E.64 R22, [R36.64] ; /* 0x0000000424167981 */ /* 0x000f22000c1e1b00 */ /*0540*/ IMAD.WIDE R8, R31, 0x8, R36 ; /* 0x000000081f087825 */ /* 0x000fcc00078e0224 */ /*0550*/ IMAD.WIDE R10, R31.reuse, 0x8, R8 ; /* 0x000000081f0a7825 */ /* 0x040fe400078e0208 */ /*0560*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000f68000c1e1b00 */ /*0570*/ IMAD.WIDE R12, R31.reuse, 0x8, R10 ; /* 0x000000081f0c7825 */ /* 0x040fe400078e020a */ /*0580*/ LDG.E.64 R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000f68000c1e1b00 */ /*0590*/ IMAD.WIDE R14, R31, 0x8, R12 ; /* 0x000000081f0e7825 */ /* 0x000fc400078e020c */ /*05a0*/ LDG.E.64 R12, [R12.64] ; /* 0x000000040c0c7981 */ /* 0x000f62000c1e1b00 */ /*05b0*/ IADD3 R35, P2, P3, R18, R28, R16 ; /* 0x0000001c12237210 */ /* 0x004fc60007b5e010 */ /*05c0*/ IMAD.WIDE R16, R31, 0x8, R14 ; /* 0x000000081f107825 */ /* 0x000fe400078e020e */ /*05d0*/ LDG.E.64 R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000ea2000c1e1b00 */ /*05e0*/ IADD3.X R29, R19, R29, R33, P2, P3 ; /* 0x0000001d131d7210 */ /* 0x000fc600017e6421 */ /*05f0*/ IMAD.WIDE R18, R31, 0x8, R16 ; /* 0x000000081f127825 */ /* 0x000fe400078e0210 */ /*0600*/ LDG.E.64 R16, [R16.64] ; /* 0x0000000410107981 */ /* 0x000ea2000c1e1b00 */ /*0610*/ IADD3 R33, P2, P3, R20, R24, R35 ; /* 0x0000001814217210 */ /* 0x008fc80007b5e023 */ /*0620*/ IADD3.X R35, R21, R25, R29, P2, P3 ; /* 0x0000001915237210 */ /* 0x000fe200017e641d */ /*0630*/ IMAD.WIDE R20, R31, 0x8, R18 ; /* 0x000000081f147825 */ /* 0x000fe400078e0212 */ /*0640*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000412127981 */ /* 0x000ee2000c1e1b00 */ /*0650*/ IADD3 R33, P2, P3, R22, R26, R33 ; /* 0x0000001a16217210 */ /* 0x010fc60007b5e021 */ /*0660*/ IMAD.WIDE R24, R31, 0x8, R20 ; /* 0x000000081f187825 */ /* 0x000fe400078e0214 */ /*0670*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000414147981 */ /* 0x000f22000c1e1b00 */ /*0680*/ IADD3.X R35, R23, R27, R35, P2, P3 ; /* 0x0000001b17237210 */ /* 0x000fc600017e6423 */ /*0690*/ IMAD.WIDE R26, R31.reuse, 0x8, R24 ; /* 0x000000081f1a7825 */ /* 0x040fe400078e0218 */ /*06a0*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000418187981 */ /* 0x000f28000c1e1b00 */ /*06b0*/ IMAD.WIDE R22, R31, 0x8, R26 ; /* 0x000000081f167825 */ /* 0x000fe400078e021a */ /*06c0*/ LDG.E.64 R26, [R26.64] ; /* 0x000000041a1a7981 */ /* 0x000f28000c1e1b00 */ /*06d0*/ LDG.E.64 R28, [R22.64] ; /* 0x00000004161c7981 */ /* 0x000f22000c1e1b00 */ /*06e0*/ IADD3 R33, P2, P3, R10, R8, R33 ; /* 0x000000080a217210 */ /* 0x020fc40007b5e021 */ /*06f0*/ IADD3 R30, P4, R30, 0x10, RZ ; /* 0x000000101e1e7810 */ /* 0x000fe40007f9e0ff */ /*0700*/ IADD3.X R35, R11, R9, R35, P2, P3 ; /* 0x000000090b237210 */ /* 0x000fc600017e6423 */ /*0710*/ IMAD.X R6, RZ, RZ, R6, P4 ; /* 0x000000ffff067224 */ /* 0x000fe200020e0606 */ /*0720*/ IADD3 R7, R7, 0x10, RZ ; /* 0x0000001007077810 */ /* 0x000fe40007ffe0ff */ /*0730*/ IADD3 R9, P2, P3, R14, R12, R33 ; /* 0x0000000c0e097210 */ /* 0x004fc80007b5e021 */ /*0740*/ IADD3.X R13, R15, R13, R35, P2, P3 ; /* 0x0000000d0f0d7210 */ /* 0x000fe400017e6423 */ /*0750*/ ISETP.GE.U32.AND P2, PT, R30, -0xc, PT ; /* 0xfffffff41e00780c */ /* 0x000fc80003f46070 */ /*0760*/ ISETP.GE.AND.EX P2, PT, R6, -0x1, PT, P2 ; /* 0xffffffff0600780c */ /* 0x000fe40003f46320 */ /*0770*/ IADD3 R9, P5, P6, R18, R16, R9 ; /* 0x0000001012097210 */ /* 0x008fc80007ebe009 */ /*0780*/ IADD3.X R17, R19, R17, R13, P5, P6 ; /* 0x0000001113117210 */ /* 0x000fe40002fec40d */ /*0790*/ IADD3 R9, P3, P4, R24, R20, R9 ; /* 0x0000001418097210 */ /* 0x010fc80007c7e009 */ /*07a0*/ IADD3.X R21, R25, R21, R17, P3, P4 ; /* 0x0000001519157210 */ /* 0x000fe20001fe8411 */ /*07b0*/ IMAD.WIDE R34, R31, 0x8, R22 ; /* 0x000000081f227825 */ /* 0x000fe200078e0216 */ /*07c0*/ IADD3 R16, P5, P6, R28, R26, R9 ; /* 0x0000001a1c107210 */ /* 0x000fc80007ebe009 */ /*07d0*/ IADD3.X R33, R29, R27, R21, P5, P6 ; /* 0x0000001b1d217210 */ /* 0x000fe20002fec415 */ /*07e0*/ @!P2 BRA 0x470 ; /* 0xfffffc800000a947 */ /* 0x000fea000383ffff */ /*07f0*/ IADD3 R8, P3, RZ, -R30, RZ ; /* 0x8000001eff087210 */ /* 0x000fc80007f7e0ff */ /*0800*/ ISETP.GT.U32.AND P2, PT, R8, 0x4, PT ; /* 0x000000040800780c */ /* 0x000fe20003f44070 */ /*0810*/ IMAD.X R8, RZ, RZ, ~R6, P3 ; /* 0x000000ffff087224 */ /* 0x000fca00018e0e06 */ /*0820*/ ISETP.GT.AND.EX P2, PT, R8, RZ, PT, P2 ; /* 0x000000ff0800720c */ /* 0x000fda0003f44320 */ /*0830*/ @!P2 BRA 0xa20 ; /* 0x000001e00000a947 */ /* 0x000fea0003800000 */ /*0840*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff117624 */ /* 0x000fe200078e00ff */ /*0850*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0860*/ LDG.E.64 R26, [R34.64] ; /* 0x00000004221a7981 */ /* 0x0000a2000c1e1b00 */ /*0870*/ IMAD.WIDE R8, R17, 0x8, R34 ; /* 0x0000000811087825 */ /* 0x000fcc00078e0222 */ /*0880*/ IMAD.WIDE R10, R17.reuse, 0x8, R8 ; /* 0x00000008110a7825 */ /* 0x040fe400078e0208 */ /*0890*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ea8000c1e1b00 */ /*08a0*/ IMAD.WIDE R12, R17.reuse, 0x8, R10 ; /* 0x00000008110c7825 */ /* 0x040fe400078e020a */ /*08b0*/ LDG.E.64 R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee8000c1e1b00 */ /*08c0*/ IMAD.WIDE R14, R17, 0x8, R12 ; /* 0x00000008110e7825 */ /* 0x000fc400078e020c */ /*08d0*/ LDG.E.64 R12, [R12.64] ; /* 0x000000040c0c7981 */ /* 0x000ee8000c1e1b00 */ /*08e0*/ IMAD.WIDE R18, R17.reuse, 0x8, R14 ; /* 0x0000000811127825 */ /* 0x040fe400078e020e */ /*08f0*/ LDG.E.64 R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000f28000c1e1b00 */ /*0900*/ IMAD.WIDE R22, R17, 0x8, R18 ; /* 0x0000000811167825 */ /* 0x000fc400078e0212 */ /*0910*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000412127981 */ /* 0x000f28000c1e1b00 */ /*0920*/ IMAD.WIDE R20, R17.reuse, 0x8, R22 ; /* 0x0000000811147825 */ /* 0x040fe400078e0216 */ /*0930*/ LDG.E.64 R22, [R22.64] ; /* 0x0000000416167981 */ /* 0x000f68000c1e1b00 */ /*0940*/ LDG.E.64 R24, [R20.64] ; /* 0x0000000414187981 */ /* 0x000f62000c1e1b00 */ /*0950*/ IADD3 R30, P4, R30, 0x8, RZ ; /* 0x000000081e1e7810 */ /* 0x000fe20007f9e0ff */ /*0960*/ IMAD.WIDE R34, R17, 0x8, R20 ; /* 0x0000000811227825 */ /* 0x001fe200078e0214 */ /*0970*/ IADD3 R7, R7, 0x8, RZ ; /* 0x0000000807077810 */ /* 0x000fc60007ffe0ff */ /*0980*/ IMAD.X R6, RZ, RZ, R6, P4 ; /* 0x000000ffff067224 */ /* 0x000fe200020e0606 */ /*0990*/ IADD3 R29, P0, P2, R8, R26, R16 ; /* 0x0000001a081d7210 */ /* 0x004fc80007a1e010 */ /*09a0*/ IADD3.X R33, R9, R27, R33, P0, P2 ; /* 0x0000001b09217210 */ /* 0x000fe400007e4421 */ /*09b0*/ IADD3 R9, P0, P2, R12, R10, R29 ; /* 0x0000000a0c097210 */ /* 0x008fc80007a1e01d */ /*09c0*/ IADD3.X R33, R13, R11, R33, P0, P2 ; /* 0x0000000b0d217210 */ /* 0x000fe400007e4421 */ /*09d0*/ IADD3 R9, P0, P2, R18, R14, R9 ; /* 0x0000000e12097210 */ /* 0x010fc80007a1e009 */ /*09e0*/ IADD3.X R33, R19, R15, R33, P0, P2 ; /* 0x0000000f13217210 */ /* 0x000fe400007e4421 */ /*09f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*0a00*/ IADD3 R16, P2, P3, R24, R22, R9 ; /* 0x0000001618107210 */ /* 0x020fc80007b5e009 */ /*0a10*/ IADD3.X R33, R25, R23, R33, P2, P3 ; /* 0x0000001719217210 */ /* 0x000fe400017e6421 */ /*0a20*/ ISETP.NE.U32.AND P2, PT, R30, RZ, PT ; /* 0x000000ff1e00720c */ /* 0x000fc80003f45070 */ /*0a30*/ ISETP.NE.OR.EX P0, PT, R6, RZ, P0, P2 ; /* 0x000000ff0600720c */ /* 0x000fda0000705720 */ /*0a40*/ @!P0 BRA 0xb90 ; /* 0x0000014000008947 */ /* 0x000fea0003800000 */ /*0a50*/ IMAD.MOV.U32 R19, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff137624 */ /* 0x000fe200078e00ff */ /*0a60*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0a70*/ IMAD.WIDE R14, R19.reuse, 0x8, R34 ; /* 0x00000008130e7825 */ /* 0x040fe400078e0222 */ /*0a80*/ LDG.E.64 R34, [R34.64] ; /* 0x0000000422227981 */ /* 0x000ea8000c1e1b00 */ /*0a90*/ IMAD.WIDE R10, R19.reuse, 0x8, R14 ; /* 0x00000008130a7825 */ /* 0x040fe400078e020e */ /*0aa0*/ LDG.E.64 R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000ea8000c1e1b00 */ /*0ab0*/ IMAD.WIDE R8, R19, 0x8, R10 ; /* 0x0000000813087825 */ /* 0x000fc400078e020a */ /*0ac0*/ LDG.E.64 R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ee8000c1e1b00 */ /*0ad0*/ LDG.E.64 R12, [R8.64] ; /* 0x00000004080c7981 */ /* 0x000ee2000c1e1b00 */ /*0ae0*/ IADD3 R30, P0, R30, 0x4, RZ ; /* 0x000000041e1e7810 */ /* 0x000fca0007f1e0ff */ /*0af0*/ IMAD.X R6, RZ, RZ, R6, P0 ; /* 0x000000ffff067224 */ /* 0x000fe200000e0606 */ /*0b00*/ ISETP.NE.U32.AND P0, PT, R30, RZ, PT ; /* 0x000000ff1e00720c */ /* 0x000fc80003f05070 */ /*0b10*/ ISETP.NE.AND.EX P0, PT, R6, RZ, PT, P0 ; /* 0x000000ff0600720c */ /* 0x000fe40003f05300 */ /*0b20*/ IADD3 R7, R7, 0x4, RZ ; /* 0x0000000407077810 */ /* 0x000fe40007ffe0ff */ /*0b30*/ IADD3 R17, P2, P3, R14, R34, R16 ; /* 0x000000220e117210 */ /* 0x004fc80007b5e010 */ /*0b40*/ IADD3.X R33, R15, R35, R33, P2, P3 ; /* 0x000000230f217210 */ /* 0x000fe200017e6421 */ /*0b50*/ IMAD.WIDE R34, R19, 0x8, R8 ; /* 0x0000000813227825 */ /* 0x000fe200078e0208 */ /*0b60*/ IADD3 R16, P4, P5, R12, R10, R17 ; /* 0x0000000a0c107210 */ /* 0x008fc80007d9e011 */ /*0b70*/ IADD3.X R33, R13, R11, R33, P4, P5 ; /* 0x0000000b0d217210 */ /* 0x000fe200027ea421 */ /*0b80*/ @P0 BRA 0xa50 ; /* 0xfffffec000000947 */ /* 0x000fea000383ffff */ /*0b90*/ ISETP.NE.U32.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fc80003f05070 */ /*0ba0*/ ISETP.NE.AND.EX P0, PT, RZ, RZ, PT, P0 ; /* 0x000000ffff00720c */ /* 0x000fda0003f05300 */ /*0bb0*/ @!P0 BRA 0xdb0 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*0bc0*/ IMAD R9, R7, c[0x0][0x174], RZ ; /* 0x00005d0007097a24 */ /* 0x000fe200078e02ff */ /*0bd0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0be0*/ IADD3 R7, P0, R9, R0, RZ ; /* 0x0000000009077210 */ /* 0x000fc80007f1e0ff */ /*0bf0*/ LEA.HI.X.SX32 R8, R9, R5, 0x1, P0 ; /* 0x0000000509087211 */ /* 0x000fe400000f0eff */ /*0c00*/ LEA R6, P0, R7, c[0x0][0x160], 0x3 ; /* 0x0000580007067a11 */ /* 0x000fc800078018ff */ /*0c10*/ LEA.HI.X R7, R7, c[0x0][0x164], R8, 0x3, P0 ; /* 0x0000590007077a11 */ /* 0x000fcc00000f1c08 */ /*0c20*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ea2000c1e1b00 */ /*0c30*/ ISETP.NE.U32.AND P0, PT, R2, 0x1, PT ; /* 0x000000010200780c */ /* 0x000fc80003f05070 */ /*0c40*/ ISETP.NE.AND.EX P0, PT, RZ, RZ, PT, P0 ; /* 0x000000ffff00720c */ /* 0x000fe40003f05300 */ /*0c50*/ IADD3 R16, P2, R6, R16, RZ ; /* 0x0000001006107210 */ /* 0x004fca0007f5e0ff */ /*0c60*/ IMAD.X R33, R7, 0x1, R33, P2 ; /* 0x0000000107217824 */ /* 0x000fcc00010e0621 */ /*0c70*/ @!P0 BRA 0xdb0 ; /* 0x0000013000008947 */ /* 0x000fea0003800000 */ /*0c80*/ ISETP.NE.U32.AND P0, PT, R2, 0x2, PT ; /* 0x000000020200780c */ /* 0x000fe20003f05070 */ /*0c90*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0ca0*/ IADD3 R9, R9, c[0x0][0x174], RZ ; /* 0x00005d0009097a10 */ /* 0x000fe40007ffe0ff */ /*0cb0*/ ISETP.NE.AND.EX P0, PT, RZ, RZ, PT, P0 ; /* 0x000000ffff00720c */ /* 0x000fe40003f05300 */ /*0cc0*/ IADD3 R7, P2, R9, R0, RZ ; /* 0x0000000009077210 */ /* 0x000fc80007f5e0ff */ /*0cd0*/ LEA.HI.X.SX32 R10, R9, R5, 0x1, P2 ; /* 0x00000005090a7211 */ /* 0x000fe400010f0eff */ /*0ce0*/ LEA R6, P2, R7, c[0x0][0x160], 0x3 ; /* 0x0000580007067a11 */ /* 0x000fc800078418ff */ /*0cf0*/ LEA.HI.X R7, R7, c[0x0][0x164], R10, 0x3, P2 ; /* 0x0000590007077a11 */ /* 0x000fe400010f1c0a */ /*0d00*/ @P0 IADD3 R8, R9, c[0x0][0x174], RZ ; /* 0x00005d0009080a10 */ /* 0x000fc80007ffe0ff */ /*0d10*/ @P0 IADD3 R9, P3, R8.reuse, R0, RZ ; /* 0x0000000008090210 */ /* 0x040fe20007f7e0ff */ /*0d20*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ea6000c1e1b00 */ /*0d30*/ @P0 LEA.HI.X.SX32 R10, R8, R5, 0x1, P3 ; /* 0x00000005080a0211 */ /* 0x000fe400018f0eff */ /*0d40*/ @P0 LEA R8, P2, R9, c[0x0][0x160], 0x3 ; /* 0x0000580009080a11 */ /* 0x000fc800078418ff */ /*0d50*/ @P0 LEA.HI.X R9, R9, c[0x0][0x164], R10, 0x3, P2 ; /* 0x0000590009090a11 */ /* 0x000fcc00010f1c0a */ /*0d60*/ @P0 LDG.E.64 R8, [R8.64] ; /* 0x0000000408080981 */ /* 0x000ee2000c1e1b00 */ /*0d70*/ IADD3 R16, P2, R6, R16, RZ ; /* 0x0000001006107210 */ /* 0x004fca0007f5e0ff */ /*0d80*/ IMAD.X R33, R7, 0x1, R33, P2 ; /* 0x0000000107217824 */ /* 0x000fe200010e0621 */ /*0d90*/ @P0 IADD3 R16, P3, R8, R16, RZ ; /* 0x0000001008100210 */ /* 0x008fca0007f7e0ff */ /*0da0*/ @P0 IMAD.X R33, R9, 0x1, R33, P3 ; /* 0x0000000109210824 */ /* 0x000fc600018e0621 */ /*0db0*/ LEA R6, P0, R0.reuse, c[0x0][0x168], 0x3 ; /* 0x00005a0000067a11 */ /* 0x040fe200078018ff */ /*0dc0*/ IMAD.MOV.U32 R17, RZ, RZ, R33 ; /* 0x000000ffff117224 */ /* 0x000fe200078e0021 */ /*0dd0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0de0*/ LEA.HI.X R7, R0, c[0x0][0x16c], R5, 0x3, P0 ; /* 0x00005b0000077a11 */ /* 0x000fe200000f1c05 */ /*0df0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */ /* 0x000fc800078e00ff */ /*0e00*/ IMAD R0, R5, c[0x0][0xc], R0 ; /* 0x0000030005007a24 */ /* 0x000fe200078e0200 */ /*0e10*/ STG.E.64 [R6.64], R16 ; /* 0x0000001006007986 */ /* 0x0001e8000c101b04 */ /*0e20*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x174], PT ; /* 0x00005d0000007a0c */ /* 0x000fda0003f06270 */ /*0e30*/ @!P0 BRA 0x320 ; /* 0xfffff4e000008947 */ /* 0x001fea000383ffff */ /*0e40*/ BRA 0xed0 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*0e50*/ IMAD.MOV.U32 R5, RZ, RZ, 0x8 ; /* 0x00000008ff057424 */ /* 0x000fe400078e00ff */ /*0e60*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff077624 */ /* 0x000fe400078e00ff */ /*0e70*/ IMAD.WIDE R2, R5, R0, c[0x0][0x168] ; /* 0x00005a0005027625 */ /* 0x000fe200078e0200 */ /*0e80*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0e90*/ IMAD R0, R7, c[0x0][0xc], R0 ; /* 0x0000030007007a24 */ /* 0x000fe200078e0200 */ /*0ea0*/ STG.E.64 [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e8000c101b04 */ /*0eb0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x174], PT ; /* 0x00005d0000007a0c */ /* 0x000fda0003f06270 */ /*0ec0*/ @!P0 BRA 0xe70 ; /* 0xffffffa000008947 */ /* 0x001fea000383ffff */ /*0ed0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0ee0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0ef0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0f00*/ BRA 0xf00; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0f10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fe0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ff0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
/* ================================================================== Programmers: Kevin Wagner Elijah Malaby John Casey Omptimizing SDH histograms for input larger then global memory ================================================================== */ #include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #include <ctype.h> #include <math.h> #include <sys/time.h> #define BOX_SIZE 23000 /* size of the data box on one dimension */ /* descriptors for single atom in the tree */ typedef struct atomdesc { float x_pos; float y_pos; float z_pos; } atom; unsigned long long * histogram; /* list of all buckets in the histogram */ unsigned long long PDH_acnt; /* total number of data points */ int block_size; /* Number of threads per block */ int num_buckets; /* total number of buckets in the histogram */ float PDH_res; /* value of w */ atom * atom_list; /* list of all data points */ unsigned long long * histogram_GPU; unsigned long long * temp_histogram_GPU; atom * atom_list_GPU; __global__ void kernelSumHistogram( unsigned long long int *InputHists, unsigned long long int *hist, int num_atoms, int num_buckets, int block_size) { unsigned long long int tid = threadIdx.x + blockIdx.x * blockDim.x; int h_pos = tid; unsigned long long int NumberOfSumLoop = 0; NumberOfSumLoop = (num_atoms)/block_size + ((num_atoms%block_size) ? 1:0); while(h_pos < num_buckets) { unsigned long long int tmpAns = 0; for(int i=0;i<NumberOfSumLoop;i++){ tmpAns = tmpAns + *(InputHists+(i*num_buckets)+h_pos); } hist[h_pos] = tmpAns; h_pos += blockDim.x * gridDim.x; } __syncthreads(); } __device__ void block_to_block (atom * block_a, atom * block_b, int b_length, unsigned long long * histogram, float resolution) { atom me = block_a[threadIdx.x]; for(int i = 0; i < b_length; i++) atomicAdd(&(histogram[(int)(sqrt((me.x_pos - block_b[i].x_pos) * (me.x_pos - block_b[i].x_pos) + (me.y_pos - block_b[i].y_pos) * (me.y_pos - block_b[i].y_pos) + (me.z_pos - block_b[i].z_pos) * (me.z_pos - block_b[i].z_pos)) / resolution)]), 1); } __global__ void GPUKernelFunction (unsigned long long PDH_acnt, float PDH_res, atom * atom_list_GPU, unsigned long long * histogram_GPU, int num_buckets) { extern __shared__ unsigned long long SHist[]; /* assign register values */ int i, h_pos; float dist; atom * my_block = &atom_list_GPU[blockIdx.x * blockDim.x]; atom temp_atom_1 = my_block[threadIdx.x]; for(h_pos=threadIdx.x; h_pos < num_buckets; h_pos+=blockDim.x) SHist[h_pos] = 0; __syncthreads(); /* loop through all points in atom list calculating distance from current point to all further points */ for (i = threadIdx.x + 1; i < blockDim.x && i+blockIdx.x*blockDim.x < PDH_acnt; i++) { atom temp_atom_2 = my_block[i]; dist = sqrt((temp_atom_1.x_pos - temp_atom_2.x_pos) * (temp_atom_1.x_pos - temp_atom_2.x_pos) + (temp_atom_1.y_pos - temp_atom_2.y_pos) * (temp_atom_1.y_pos - temp_atom_2.y_pos) + (temp_atom_1.z_pos - temp_atom_2.z_pos) * (temp_atom_1.z_pos - temp_atom_2.z_pos)); h_pos = (int)(dist / PDH_res); atomicAdd(&(SHist[h_pos]), 1); } __syncthreads(); for(i=blockIdx.x+1; i < gridDim.x-1; i++) block_to_block(my_block, &atom_list_GPU[i*blockDim.x], blockDim.x, SHist, PDH_res); block_to_block(my_block, &atom_list_GPU[i*blockDim.x], PDH_acnt-i*blockDim.x, // Last block may be small SHist, PDH_res); __syncthreads(); for(h_pos = threadIdx.x; h_pos < num_buckets; h_pos += blockDim.x) *(histogram_GPU+(num_buckets*blockIdx.x)+h_pos) += SHist[h_pos]; } /* print the counts in all buckets of the histogram */ void output_histogram_GPU(){ int i; unsigned long long total_cnt = 0; for(i=0; i< num_buckets; i++) { if(i%5 == 0) /* we print 5 buckets in a row */ printf("\n%02d: ", i); printf("%15lld ", histogram[i]); total_cnt += histogram[i]; /* we also want to make sure the total distance count is correct */ if(i == num_buckets - 1) printf("\n T:%lld \n", total_cnt); else printf("| "); } } void GPU_baseline() { int num_blocks = ((PDH_acnt + block_size)/block_size); /* copy histogram to device memory */ hipMalloc((void**) &histogram_GPU, sizeof(unsigned long long)*num_buckets); hipMemset(histogram_GPU, 0, sizeof(unsigned long long)*num_buckets); hipMalloc((void**) &temp_histogram_GPU, sizeof(unsigned long long)*num_buckets*num_blocks); hipMemset(temp_histogram_GPU, 0, sizeof(unsigned long long)*num_buckets*num_blocks); /* copy atom list to device memory */ hipMalloc((void**) &atom_list_GPU, sizeof(atom) * PDH_acnt); hipMemcpy(atom_list_GPU, atom_list, sizeof(atom) * PDH_acnt, hipMemcpyHostToDevice); /* start time keeping */ hipEvent_t start, stop; hipEventCreate(&start); hipEventCreate(&stop); hipEventRecord( start, 0 ); /* Run Kernel */ GPUKernelFunction <<<num_blocks, block_size, sizeof(unsigned long long)*num_buckets>>> (PDH_acnt, PDH_res, atom_list_GPU, temp_histogram_GPU, num_buckets); hipDeviceSynchronize(); kernelSumHistogram<<<3, 512>>>(temp_histogram_GPU, histogram_GPU, PDH_acnt, num_buckets, block_size); /* stop time keeping */ hipEventRecord( stop, 0 ); hipEventSynchronize( stop ); float elapsedTime; hipEventElapsedTime( &elapsedTime, start, stop ); /* transfer histogram to host memory */ hipMemcpy(histogram, histogram_GPU, sizeof(unsigned long long)*num_buckets, hipMemcpyDeviceToHost); /* print out the histogram */ output_histogram_GPU(); elapsedTime = elapsedTime/1000; printf( "******** Total Running Time of Kernel = %0.5f sec *******\n", elapsedTime ); /* free cuda timekeeping */ hipEventDestroy( start ); hipEventDestroy( stop ); hipFree(temp_histogram_GPU); } /* Input Validation Function */ bool isNumber(char number[], bool floatingpoint) { for (int i = 0; number[i] != 0; i++) { //if (number[i] > '9' || number[i] < '0') if (!isdigit(number[i])) { if((number[i] == '.' && floatingpoint)) { floatingpoint = false; } else { return false; } } } return true; } /* Most of this input validation can probably be pulled whenever we hardcode our block size and if we hardcode our bucket width */ int main(int argc, char **argv) { /* input validation */ if((argc > 3)) { if(((isNumber(argv[1], false) && isNumber(argv[2], true)) && isNumber(argv[3], false))) { PDH_acnt = atoi(argv[1]); PDH_res = atof(argv[2]); block_size = atoi(argv[3]); } else { printf( "Invalid Input Error Invalid Arguments\n Valid input is ./program_name {#of_samples} {bucket_width} {block_size}\n"); return 0; } } else { printf( "Invalid Input Error Insufficient Arguments\n Valid input is ./program_name {#of_samples} {bucket_width} {block_size}\n"); return 0; } /* allocate memory */ num_buckets = (int)(BOX_SIZE * 1.732 / PDH_res) + 1; histogram = (unsigned long long *)malloc(sizeof(unsigned long long)*num_buckets); atom_list = (atom *)malloc(sizeof(atom)*PDH_acnt); srand(1); /* generate data following a uniform distribution */ for(int i = 0; i < PDH_acnt; i++) { atom_list[i].x_pos = ((float)(rand()) / RAND_MAX) * BOX_SIZE; atom_list[i].y_pos = ((float)(rand()) / RAND_MAX) * BOX_SIZE; atom_list[i].z_pos = ((float)(rand()) / RAND_MAX) * BOX_SIZE; } /* call GPU histrogram compute */ GPU_baseline(); /* free memory */ free(histogram); free(atom_list); return 0; }
.text .file "proj2-wagnerk1.hip" .globl _Z33__device_stub__kernelSumHistogramPyS_iii # -- Begin function _Z33__device_stub__kernelSumHistogramPyS_iii .type _Z33__device_stub__kernelSumHistogramPyS_iii,@function _Z33__device_stub__kernelSumHistogramPyS_iii: # @_Z33__device_stub__kernelSumHistogramPyS_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 8(%rsp), %rdx movl %ecx, (%rdx) leaq 4(%rsp), %rcx movl %r8d, (%rcx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z18kernelSumHistogramPyS_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z33__device_stub__kernelSumHistogramPyS_iii, .Lfunc_end0-_Z33__device_stub__kernelSumHistogramPyS_iii .cfi_endproc # -- End function .globl _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi # -- Begin function _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi .type _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi,@function _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi: # @_Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 4(%rsp), %rdi movss %xmm0, (%rdi) leaq 32(%rsp), %r8 movq %rsi, (%r8) leaq 24(%rsp), %rsi movq %rdx, (%rsi) movq %rsp, %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %r8, 16(%rbx) movq %rsi, 24(%rbx) movq %rdx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z17GPUKernelFunctionyfP8atomdescPyi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi, .Lfunc_end1-_Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi .cfi_endproc # -- End function .globl _Z20output_histogram_GPUv # -- Begin function _Z20output_histogram_GPUv .type _Z20output_histogram_GPUv,@function _Z20output_histogram_GPUv: # @_Z20output_histogram_GPUv .cfi_startproc # %bb.0: cmpl $0, num_buckets(%rip) jle .LBB2_9 # %bb.1: # %.lr.ph.preheader pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl $3435973837, %r15d # imm = 0xCCCCCCCD xorl %ebx, %ebx xorl %r14d, %r14d .LBB2_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl %ebx, %eax imulq %r15, %rax shrq $34, %rax leal (%rax,%rax,4), %eax cmpl %eax, %ebx jne .LBB2_4 # %bb.3: # in Loop: Header=BB2_2 Depth=1 movl $.L.str, %edi movl %ebx, %esi xorl %eax, %eax callq printf .LBB2_4: # in Loop: Header=BB2_2 Depth=1 movq histogram(%rip), %rax movq (%rax,%rbx,8), %rsi movl $.L.str.1, %edi xorl %eax, %eax callq printf movq histogram(%rip), %rax addq (%rax,%rbx,8), %r14 movl num_buckets(%rip), %eax decl %eax cmpq %rax, %rbx jne .LBB2_6 # %bb.5: # in Loop: Header=BB2_2 Depth=1 movl $.L.str.2, %edi movq %r14, %rsi xorl %eax, %eax callq printf jmp .LBB2_7 .LBB2_6: # in Loop: Header=BB2_2 Depth=1 movl $.L.str.3, %edi xorl %eax, %eax callq printf .LBB2_7: # in Loop: Header=BB2_2 Depth=1 incq %rbx movslq num_buckets(%rip), %rax cmpq %rax, %rbx jl .LBB2_2 # %bb.8: popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 .cfi_restore %rbx .cfi_restore %r14 .cfi_restore %r15 .LBB2_9: # %._crit_edge retq .Lfunc_end2: .size _Z20output_histogram_GPUv, .Lfunc_end2-_Z20output_histogram_GPUv .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function _Z12GPU_baselinev .LCPI3_0: .long 0x447a0000 # float 1000 .text .globl _Z12GPU_baselinev .type _Z12GPU_baselinev,@function _Z12GPU_baselinev: # @_Z12GPU_baselinev .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $32, %rsp .cfi_def_cfa_offset 64 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movabsq $4294967296, %rbx # imm = 0x100000000 movslq block_size(%rip), %rcx movq PDH_acnt(%rip), %rax addq %rcx, %rax xorl %edx, %edx divq %rcx movq %rax, %r14 movslq num_buckets(%rip), %rsi shlq $3, %rsi movl $histogram_GPU, %edi callq hipMalloc movq histogram_GPU(%rip), %rdi movslq num_buckets(%rip), %rdx shlq $3, %rdx xorl %esi, %esi callq hipMemset movslq num_buckets(%rip), %rsi movslq %r14d, %r15 leaq (,%r15,8), %r14 imulq %r14, %rsi movl $temp_histogram_GPU, %edi callq hipMalloc movq temp_histogram_GPU(%rip), %rdi movslq num_buckets(%rip), %rdx imulq %r14, %rdx xorl %esi, %esi callq hipMemset movq PDH_acnt(%rip), %rax shlq $2, %rax leaq (%rax,%rax,2), %rsi movl $atom_list_GPU, %edi callq hipMalloc movq atom_list_GPU(%rip), %rdi movq atom_list(%rip), %rsi movq PDH_acnt(%rip), %rax shlq $2, %rax leaq (%rax,%rax,2), %rdx movl $1, %ecx callq hipMemcpy leaq 16(%rsp), %r14 movq %r14, %rdi callq hipEventCreate leaq 8(%rsp), %rdi callq hipEventCreate movq (%r14), %rdi xorl %esi, %esi callq hipEventRecord movl block_size(%rip), %edx movslq num_buckets(%rip), %r8 shlq $3, %r8 movl %r15d, %edi btsq $32, %rdi btsq $32, %rdx movl $1, %esi movl $1, %ecx xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB3_2 # %bb.1: movq PDH_acnt(%rip), %rdi movss PDH_res(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero movq atom_list_GPU(%rip), %rsi movq temp_histogram_GPU(%rip), %rdx movl num_buckets(%rip), %ecx callq _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi .LBB3_2: callq hipDeviceSynchronize leaq 3(%rbx), %rdi addq $512, %rbx # imm = 0x200 movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB3_4 # %bb.3: movq temp_histogram_GPU(%rip), %rdi movq histogram_GPU(%rip), %rsi movl PDH_acnt(%rip), %edx movl num_buckets(%rip), %ecx movl block_size(%rip), %r8d callq _Z33__device_stub__kernelSumHistogramPyS_iii .LBB3_4: movq 8(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movq 8(%rsp), %rdi callq hipEventSynchronize movq 16(%rsp), %rsi movq 8(%rsp), %rdx leaq 28(%rsp), %rbx movq %rbx, %rdi callq hipEventElapsedTime movq histogram(%rip), %rdi movq histogram_GPU(%rip), %rsi movslq num_buckets(%rip), %rdx shlq $3, %rdx movl $2, %ecx callq hipMemcpy callq _Z20output_histogram_GPUv movss (%rbx), %xmm0 # xmm0 = mem[0],zero,zero,zero divss .LCPI3_0(%rip), %xmm0 movss %xmm0, (%rbx) cvtss2sd %xmm0, %xmm0 movl $.L.str.4, %edi movb $1, %al callq printf movq 16(%rsp), %rdi callq hipEventDestroy movq 8(%rsp), %rdi callq hipEventDestroy movq temp_histogram_GPU(%rip), %rdi callq hipFree addq $32, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _Z12GPU_baselinev, .Lfunc_end3-_Z12GPU_baselinev .cfi_endproc # -- End function .globl _Z8isNumberPcb # -- Begin function _Z8isNumberPcb .type _Z8isNumberPcb,@function _Z8isNumberPcb: # @_Z8isNumberPcb .cfi_startproc # %bb.0: movb (%rdi), %cl testb %cl, %cl je .LBB4_1 # %bb.3: # %.lr.ph.preheader incq %rdi .LBB4_4: # %.lr.ph # =>This Inner Loop Header: Depth=1 movsbl %cl, %eax addl $-48, %eax cmpl $10, %eax jae .LBB4_6 # %bb.5: # in Loop: Header=BB4_4 Depth=1 movl %esi, %eax jmp .LBB4_8 .LBB4_6: # in Loop: Header=BB4_4 Depth=1 xorl %eax, %eax cmpb $46, %cl jne .LBB4_2 # %bb.7: # in Loop: Header=BB4_4 Depth=1 andb $1, %sil je .LBB4_2 .LBB4_8: # in Loop: Header=BB4_4 Depth=1 movb (%rdi), %cl incq %rdi movl %eax, %esi testb %cl, %cl jne .LBB4_4 .LBB4_1: movb $1, %al .LBB4_2: # %._crit_edge # kill: def $al killed $al killed $eax retq .Lfunc_end4: .size _Z8isNumberPcb, .Lfunc_end4-_Z8isNumberPcb .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI5_0: .quad 0x40e3738000000000 # double 39836 .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 .LCPI5_1: .long 0x30000000 # float 4.65661287E-10 .LCPI5_2: .long 0x46b3b000 # float 23000 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $16, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 cmpl $4, %edi jl .LBB5_20 # %bb.1: movq 8(%rsi), %rdi movb (%rdi), %cl testb %cl, %cl je .LBB5_5 # %bb.2: # %.lr.ph.i.preheader leaq 1(%rdi), %rax .LBB5_3: # %.lr.ph.i # =>This Inner Loop Header: Depth=1 movsbl %cl, %ecx addl $-48, %ecx cmpl $9, %ecx ja .LBB5_21 # %bb.4: # in Loop: Header=BB5_3 Depth=1 movb (%rax), %cl incq %rax testb %cl, %cl jne .LBB5_3 .LBB5_5: # %.loopexit49 movq 16(%rsi), %rbx movb (%rbx), %dl testb %dl, %dl je .LBB5_12 # %bb.6: # %.lr.ph.i17.preheader leaq 1(%rbx), %rax movb $1, %cl .LBB5_7: # %.lr.ph.i17 # =>This Inner Loop Header: Depth=1 movsbl %dl, %r8d addl $-48, %r8d cmpl $10, %r8d jb .LBB5_11 # %bb.8: # in Loop: Header=BB5_7 Depth=1 cmpb $46, %dl jne .LBB5_21 # %bb.9: # in Loop: Header=BB5_7 Depth=1 andb $1, %cl je .LBB5_21 # %bb.10: # in Loop: Header=BB5_7 Depth=1 xorl %ecx, %ecx .LBB5_11: # in Loop: Header=BB5_7 Depth=1 movb (%rax), %dl incq %rax testb %dl, %dl jne .LBB5_7 .LBB5_12: # %.loopexit47 movq 24(%rsi), %r14 movb (%r14), %cl testb %cl, %cl je .LBB5_16 # %bb.13: # %.lr.ph.i31.preheader leaq 1(%r14), %rax .LBB5_14: # %.lr.ph.i31 # =>This Inner Loop Header: Depth=1 movsbl %cl, %ecx addl $-48, %ecx cmpl $9, %ecx ja .LBB5_21 # %bb.15: # in Loop: Header=BB5_14 Depth=1 movb (%rax), %cl incq %rax testb %cl, %cl jne .LBB5_14 .LBB5_16: # %.loopexit callq atoi movslq %eax, %r15 movq %r15, PDH_acnt(%rip) movq %rbx, %rdi callq atof cvtsd2ss %xmm0, %xmm0 movss %xmm0, 12(%rsp) # 4-byte Spill movss %xmm0, PDH_res(%rip) movq %r14, %rdi callq atoi movl %eax, block_size(%rip) xorps %xmm0, %xmm0 cvtss2sd 12(%rsp), %xmm0 # 4-byte Folded Reload movsd .LCPI5_0(%rip), %xmm1 # xmm1 = mem[0],zero divsd %xmm0, %xmm1 cvttsd2si %xmm1, %eax leal 1(%rax), %ecx movl %ecx, num_buckets(%rip) cltq leaq 8(,%rax,8), %rdi callq malloc movq %rax, histogram(%rip) shlq $2, %r15 leaq (%r15,%r15,2), %rdi callq malloc movq %rax, atom_list(%rip) movl $1, %edi callq srand cmpq $0, PDH_acnt(%rip) je .LBB5_19 # %bb.17: # %.lr.ph.preheader xorl %ebx, %ebx xorl %r14d, %r14d .LBB5_18: # %.lr.ph # =>This Inner Loop Header: Depth=1 callq rand xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 movss .LCPI5_1(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero mulss %xmm1, %xmm0 movss .LCPI5_2(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero mulss %xmm1, %xmm0 movq atom_list(%rip), %rax movss %xmm0, (%rax,%rbx) callq rand xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 mulss .LCPI5_1(%rip), %xmm0 mulss .LCPI5_2(%rip), %xmm0 movq atom_list(%rip), %rax movss %xmm0, 4(%rax,%rbx) callq rand xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 mulss .LCPI5_1(%rip), %xmm0 mulss .LCPI5_2(%rip), %xmm0 movq atom_list(%rip), %rax movss %xmm0, 8(%rax,%rbx) incq %r14 addq $12, %rbx cmpq %r14, PDH_acnt(%rip) ja .LBB5_18 .LBB5_19: # %._crit_edge callq _Z12GPU_baselinev movq histogram(%rip), %rdi callq free movq atom_list(%rip), %rdi callq free jmp .LBB5_23 .LBB5_20: movl $.Lstr, %edi jmp .LBB5_22 .LBB5_21: # %_Z8isNumberPcb.exit movl $.Lstr.1, %edi .LBB5_22: callq puts@PLT .LBB5_23: xorl %eax, %eax addq $16, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end5: .size main, .Lfunc_end5-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB6_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB6_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z18kernelSumHistogramPyS_iii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z17GPUKernelFunctionyfP8atomdescPyi, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end6: .size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB7_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB7_2: retq .Lfunc_end7: .size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor .cfi_endproc # -- End function .type histogram,@object # @histogram .bss .globl histogram .p2align 3, 0x0 histogram: .quad 0 .size histogram, 8 .type PDH_acnt,@object # @PDH_acnt .globl PDH_acnt .p2align 3, 0x0 PDH_acnt: .quad 0 # 0x0 .size PDH_acnt, 8 .type block_size,@object # @block_size .globl block_size .p2align 2, 0x0 block_size: .long 0 # 0x0 .size block_size, 4 .type num_buckets,@object # @num_buckets .globl num_buckets .p2align 2, 0x0 num_buckets: .long 0 # 0x0 .size num_buckets, 4 .type PDH_res,@object # @PDH_res .globl PDH_res .p2align 2, 0x0 PDH_res: .long 0x00000000 # float 0 .size PDH_res, 4 .type atom_list,@object # @atom_list .globl atom_list .p2align 3, 0x0 atom_list: .quad 0 .size atom_list, 8 .type histogram_GPU,@object # @histogram_GPU .globl histogram_GPU .p2align 3, 0x0 histogram_GPU: .quad 0 .size histogram_GPU, 8 .type temp_histogram_GPU,@object # @temp_histogram_GPU .globl temp_histogram_GPU .p2align 3, 0x0 temp_histogram_GPU: .quad 0 .size temp_histogram_GPU, 8 .type atom_list_GPU,@object # @atom_list_GPU .globl atom_list_GPU .p2align 3, 0x0 atom_list_GPU: .quad 0 .size atom_list_GPU, 8 .type _Z18kernelSumHistogramPyS_iii,@object # @_Z18kernelSumHistogramPyS_iii .section .rodata,"a",@progbits .globl _Z18kernelSumHistogramPyS_iii .p2align 3, 0x0 _Z18kernelSumHistogramPyS_iii: .quad _Z33__device_stub__kernelSumHistogramPyS_iii .size _Z18kernelSumHistogramPyS_iii, 8 .type _Z17GPUKernelFunctionyfP8atomdescPyi,@object # @_Z17GPUKernelFunctionyfP8atomdescPyi .globl _Z17GPUKernelFunctionyfP8atomdescPyi .p2align 3, 0x0 _Z17GPUKernelFunctionyfP8atomdescPyi: .quad _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi .size _Z17GPUKernelFunctionyfP8atomdescPyi, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "\n%02d: " .size .L.str, 8 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "%15lld " .size .L.str.1, 8 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "\n T:%lld \n" .size .L.str.2, 11 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "| " .size .L.str.3, 3 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "******** Total Running Time of Kernel = %0.5f sec *******\n" .size .L.str.4, 59 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z18kernelSumHistogramPyS_iii" .size .L__unnamed_1, 30 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z17GPUKernelFunctionyfP8atomdescPyi" .size .L__unnamed_2, 37 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "Invalid Input Error Insufficient Arguments\n Valid input is ./program_name {#of_samples} {bucket_width} {block_size}" .size .Lstr, 116 .type .Lstr.1,@object # @str.1 .Lstr.1: .asciz "Invalid Input Error Invalid Arguments\n Valid input is ./program_name {#of_samples} {bucket_width} {block_size}" .size .Lstr.1, 111 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z33__device_stub__kernelSumHistogramPyS_iii .addrsig_sym _Z32__device_stub__GPUKernelFunctionyfP8atomdescPyi .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym histogram_GPU .addrsig_sym temp_histogram_GPU .addrsig_sym atom_list_GPU .addrsig_sym _Z18kernelSumHistogramPyS_iii .addrsig_sym _Z17GPUKernelFunctionyfP8atomdescPyi .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z18kernelSumHistogramPyS_iii ; -- Begin function _Z18kernelSumHistogramPyS_iii .globl _Z18kernelSumHistogramPyS_iii .p2align 8 .type _Z18kernelSumHistogramPyS_iii,@function _Z18kernelSumHistogramPyS_iii: ; @_Z18kernelSumHistogramPyS_iii ; %bb.0: s_clause 0x1 s_load_b32 s8, s[0:1], 0x2c s_load_b128 s[4:7], s[0:1], 0x10 s_add_u32 s2, s0, 32 s_addc_u32 s3, s1, 0 s_waitcnt lgkmcnt(0) s_mov_b32 s7, exec_lo s_and_b32 s12, s8, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1] v_cmpx_gt_i32_e64 s5, v1 s_cbranch_execz .LBB0_6 ; %bb.1: ; %.preheader.lr.ph s_ashr_i32 s8, s6, 31 s_ashr_i32 s13, s4, 31 s_add_i32 s9, s6, s8 s_add_i32 s14, s4, s13 s_xor_b32 s9, s9, s8 s_xor_b32 s14, s14, s13 v_cvt_f32_u32_e32 v0, s9 s_sub_i32 s11, 0, s9 s_xor_b32 s8, s13, s8 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_iflag_f32_e32 v0, v0 s_waitcnt_depctr 0xfff v_mul_f32_e32 v0, 0x4f7ffffe, v0 v_cvt_u32_f32_e32 v0, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s10, v0 s_mul_i32 s11, s11, s10 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_hi_u32 s11, s10, s11 s_add_i32 s10, s10, s11 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_mul_hi_u32 s10, s14, s10 s_mul_i32 s11, s10, s9 s_add_i32 s13, s10, 1 s_sub_i32 s11, s14, s11 s_delay_alu instid0(SALU_CYCLE_1) s_sub_i32 s14, s11, s9 s_cmp_ge_u32 s11, s9 s_cselect_b32 s10, s13, s10 s_cselect_b32 s11, s14, s11 s_add_i32 s13, s10, 1 s_cmp_ge_u32 s11, s9 s_cselect_b32 s9, s13, s10 s_load_b32 s13, s[2:3], 0x0 s_xor_b32 s9, s9, s8 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_sub_i32 s2, s9, s8 s_load_b128 s[8:11], s[0:1], 0x0 s_mul_i32 s3, s2, s6 s_sub_i32 s0, s4, s3 s_mov_b32 s4, 0 s_cmp_lg_u32 s0, 0 s_cselect_b32 s0, -1, 0 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s0, 0 s_addc_u32 s1, s2, 0 s_mov_b32 s2, s5 s_cmp_lg_u32 s1, 0 s_cselect_b32 s6, -1, 0 s_ashr_i32 s3, s5, 31 s_waitcnt lgkmcnt(0) s_mul_i32 s12, s13, s12 s_lshl_b64 s[2:3], s[2:3], 3 .LBB0_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB0_4 Depth 2 v_ashrrev_i32_e32 v2, 31, v1 v_mov_b32_e32 v4, 0 v_mov_b32_e32 v5, 0 s_and_not1_b32 vcc_lo, exec_lo, s6 s_delay_alu instid0(VALU_DEP_3) v_lshlrev_b64 v[2:3], 3, v[1:2] s_cbranch_vccnz .LBB0_5 ; %bb.3: ; %.lr.ph ; in Loop: Header=BB0_2 Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, s8, v2 v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo s_mov_b32 s0, s1 .LBB0_4: ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b64 v[8:9], v[6:7], off v_add_co_u32 v6, vcc_lo, v6, s2 v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo s_add_i32 s0, s0, -1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s0, 0 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo s_cbranch_scc0 .LBB0_4 .LBB0_5: ; %._crit_edge ; in Loop: Header=BB0_2 Depth=1 v_add_nc_u32_e32 v1, s12, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v2, s0, s10, v2 v_add_co_ci_u32_e64 v3, s0, s11, v3, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_cmp_le_i32_e32 vcc_lo, s5, v1 global_store_b64 v[2:3], v[4:5], off s_or_b32 s4, vcc_lo, s4 s_and_not1_b32 exec_lo, exec_lo, s4 s_cbranch_execnz .LBB0_2 .LBB0_6: ; %Flow46 s_or_b32 exec_lo, exec_lo, s7 s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z18kernelSumHistogramPyS_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 10 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z18kernelSumHistogramPyS_iii, .Lfunc_end0-_Z18kernelSumHistogramPyS_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 472 ; NumSgprs: 18 ; NumVgprs: 10 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 10 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z17GPUKernelFunctionyfP8atomdescPyi ; -- Begin function _Z17GPUKernelFunctionyfP8atomdescPyi .globl _Z17GPUKernelFunctionyfP8atomdescPyi .p2align 8 .type _Z17GPUKernelFunctionyfP8atomdescPyi,@function _Z17GPUKernelFunctionyfP8atomdescPyi: ; @_Z17GPUKernelFunctionyfP8atomdescPyi ; %bb.0: s_clause 0x3 s_load_b32 s2, s[0:1], 0x34 s_load_b128 s[4:7], s[0:1], 0x10 s_load_b32 s12, s[0:1], 0x20 s_load_b32 s10, s[0:1], 0x28 s_waitcnt lgkmcnt(0) s_and_b32 s3, s2, 0xffff v_cmp_gt_i32_e64 s2, s12, v0 s_mul_i32 s11, s15, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) s_mul_i32 s17, s11, 12 s_mul_hi_u32 s16, s11, 12 s_add_u32 s8, s4, s17 s_addc_u32 s9, s5, s16 v_mad_u64_u32 v[4:5], null, v0, 12, s[8:9] s_mov_b32 s9, 0 global_load_b96 v[1:3], v[4:5], off s_and_saveexec_b32 s8, s2 s_cbranch_execz .LBB1_3 ; %bb.1: ; %.lr.ph.preheader v_lshl_add_u32 v8, v0, 3, 0 v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v9, v0 s_lshl_b32 s13, s3, 3 .LBB1_2: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v9, s3, v9 v_mov_b32_e32 v7, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_cmp_le_i32_e32 vcc_lo, s12, v9 ds_store_b64 v8, v[6:7] v_add_nc_u32_e32 v8, s13, v8 s_or_b32 s9, vcc_lo, s9 s_and_not1_b32 exec_lo, exec_lo, s9 s_cbranch_execnz .LBB1_2 .LBB1_3: ; %Flow135 s_or_b32 exec_lo, exec_lo, s8 s_clause 0x1 s_load_b64 s[8:9], s[0:1], 0x0 s_load_b32 s13, s[0:1], 0x8 v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v8, 1, v0 s_waitcnt vmcnt(0) lgkmcnt(0) s_barrier buffer_gl0_inv v_add_nc_u32_e32 v6, s11, v8 v_cmp_gt_u32_e64 s0, s3, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_gt_u64_e32 vcc_lo, s[8:9], v[6:7] s_and_b32 s0, s0, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s14, s0 s_cbranch_execz .LBB1_6 ; %bb.4: ; %.lr.ph63.preheader s_add_u32 s0, s4, s17 s_addc_u32 s1, s5, s16 v_add_nc_u32_e32 v10, 2, v0 v_mad_u64_u32 v[8:9], null, v0, 12, s[0:1] s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v8, 12 v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo .LBB1_5: ; %.lr.ph63 ; =>This Inner Loop Header: Depth=1 global_load_b96 v[11:13], v[8:9], off v_add_co_u32 v8, s1, v8, 12 s_waitcnt vmcnt(0) v_dual_sub_f32 v6, v2, v12 :: v_dual_sub_f32 v11, v1, v11 v_sub_f32_e32 v12, v3, v13 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v6, v6, v6 v_fmac_f32_e32 v6, v11, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v6, v12, v12 v_mul_f32_e32 v11, 0x4f800000, v6 v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v6, v6, v11, vcc_lo v_sqrt_f32_e32 v11, v6 s_waitcnt_depctr 0xfff v_add_nc_u32_e32 v12, -1, v11 v_add_nc_u32_e32 v13, 1, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v14, -v12, v11, v6 v_fma_f32 v15, -v13, v11, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_ge_f32_e64 s0, 0, v14 v_cndmask_b32_e64 v11, v11, v12, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_f32_e64 s0, 0, v15 v_cndmask_b32_e64 v11, v11, v13, s0 v_cmp_le_u32_e64 s0, s3, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v12, 0x37800000, v11 v_cndmask_b32_e32 v11, v11, v12, vcc_lo v_cmp_class_f32_e64 vcc_lo, v6, 0x260 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v6, v11, v6, vcc_lo v_div_scale_f32 v11, null, s13, s13, v6 v_div_scale_f32 v14, vcc_lo, v6, s13, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v12, v11 s_waitcnt_depctr 0xfff v_fma_f32 v13, -v11, v12, 1.0 v_fmac_f32_e32 v12, v13, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v13, v14, v12 v_fma_f32 v15, -v11, v13, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v13, v15, v12 v_fma_f32 v11, -v11, v13, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v11, v11, v12, v13 v_div_fixup_f32 v6, v11, s13, v6 v_mov_b32_e32 v11, 1 v_mov_b32_e32 v12, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cvt_i32_f32_e32 v6, v6 v_lshl_add_u32 v6, v6, 3, 0 ds_add_u64 v6, v[11:12] v_add_nc_u32_e32 v6, s11, v10 v_add_nc_u32_e32 v10, 1, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1) v_cmp_le_u64_e32 vcc_lo, s[8:9], v[6:7] s_or_b32 s0, s0, vcc_lo v_add_co_ci_u32_e64 v9, vcc_lo, 0, v9, s1 s_and_b32 s0, exec_lo, s0 s_or_b32 s16, s0, s16 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s16 s_cbranch_execnz .LBB1_5 .LBB1_6: ; %Flow133 s_or_b32 exec_lo, exec_lo, s14 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv global_load_b96 v[1:3], v[4:5], off s_add_i32 s9, s10, -1 s_add_i32 s1, s15, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_ge_u32 s1, s9 s_cbranch_scc1 .LBB1_12 ; %bb.7: ; %.lr.ph66 s_cmp_lg_u32 s3, 0 s_mul_i32 s18, s1, s3 s_cselect_b32 s14, -1, 0 s_add_u32 s16, s4, 4 s_addc_u32 s17, s5, 0 .LBB1_8: ; =>This Loop Header: Depth=1 ; Child Loop BB1_10 Depth 2 s_and_not1_b32 vcc_lo, exec_lo, s14 s_cbranch_vccnz .LBB1_11 ; %bb.9: ; %.lr.ph.i.preheader ; in Loop: Header=BB1_8 Depth=1 s_mul_i32 s0, s18, 12 s_mul_hi_u32 s11, s18, 12 s_add_u32 s10, s16, s0 s_addc_u32 s11, s17, s11 s_mov_b32 s19, s3 .LBB1_10: ; %.lr.ph.i ; Parent Loop BB1_8 Depth=1 ; => This Inner Loop Header: Depth=2 s_add_u32 s20, s10, -4 s_addc_u32 s21, s11, -1 s_add_i32 s19, s19, -1 s_clause 0x1 s_load_b64 s[20:21], s[20:21], 0x0 s_load_b32 s0, s[10:11], 0x4 s_add_u32 s10, s10, 12 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s19, 0 s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_subrev_f32 v4, s21, v2 :: v_dual_subrev_f32 v5, s20, v1 v_subrev_f32_e32 v6, s0, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v4, v4, v4 v_fmac_f32_e32 v4, v5, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v4, v6, v6 v_mul_f32_e32 v5, 0x4f800000, v4 v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v4, v4, v5, vcc_lo v_sqrt_f32_e32 v5, v4 s_waitcnt_depctr 0xfff v_add_nc_u32_e32 v6, -1, v5 v_add_nc_u32_e32 v7, 1, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v8, -v6, v5, v4 v_fma_f32 v9, -v7, v5, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_ge_f32_e64 s0, 0, v8 v_cndmask_b32_e64 v5, v5, v6, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_f32_e64 s0, 0, v9 v_cndmask_b32_e64 v5, v5, v7, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v6, 0x37800000, v5 v_cndmask_b32_e32 v5, v5, v6, vcc_lo v_cmp_class_f32_e64 vcc_lo, v4, 0x260 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v4, v5, v4, vcc_lo v_div_scale_f32 v5, null, s13, s13, v4 v_div_scale_f32 v8, vcc_lo, v4, s13, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v6, v5 s_waitcnt_depctr 0xfff v_fma_f32 v7, -v5, v6, 1.0 v_fmac_f32_e32 v6, v7, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v7, v8, v6 v_fma_f32 v9, -v5, v7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v7, v9, v6 v_fma_f32 v5, -v5, v7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v5, v5, v6, v7 v_div_fixup_f32 v4, v5, s13, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cvt_i32_f32_e32 v6, v4 v_mov_b32_e32 v4, 1 v_mov_b32_e32 v5, 0 v_lshl_add_u32 v6, v6, 3, 0 ds_add_u64 v6, v[4:5] s_cbranch_scc1 .LBB1_10 .LBB1_11: ; %_Z14block_to_blockP8atomdescS0_iPyf.exit ; in Loop: Header=BB1_8 Depth=1 s_add_i32 s1, s1, 1 s_add_i32 s18, s18, s3 s_cmp_lt_u32 s1, s9 s_cbranch_scc1 .LBB1_8 .LBB1_12: ; %._crit_edge67 s_mul_i32 s0, s1, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_sub_i32 s1, s8, s0 s_cmp_lt_i32 s1, 1 s_cbranch_scc1 .LBB1_15 ; %bb.13: ; %.lr.ph.i52.preheader s_mul_i32 s8, s0, 12 s_mul_hi_u32 s0, s0, 12 s_add_u32 s4, s8, s4 s_addc_u32 s0, s0, s5 s_add_u32 s4, s4, 4 s_addc_u32 s5, s0, 0 .LBB1_14: ; %.lr.ph.i52 ; =>This Inner Loop Header: Depth=1 s_add_u32 s8, s4, -4 s_addc_u32 s9, s5, -1 s_add_i32 s1, s1, -1 s_clause 0x1 s_load_b64 s[8:9], s[8:9], 0x0 s_load_b32 s0, s[4:5], 0x4 s_add_u32 s4, s4, 12 s_addc_u32 s5, s5, 0 s_cmp_lg_u32 s1, 0 s_waitcnt vmcnt(0) lgkmcnt(0) v_dual_subrev_f32 v4, s9, v2 :: v_dual_subrev_f32 v5, s8, v1 v_subrev_f32_e32 v6, s0, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v4, v4, v4 v_fmac_f32_e32 v4, v5, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v4, v6, v6 v_mul_f32_e32 v5, 0x4f800000, v4 v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v4, v4, v5, vcc_lo v_sqrt_f32_e32 v5, v4 s_waitcnt_depctr 0xfff v_add_nc_u32_e32 v6, -1, v5 v_add_nc_u32_e32 v7, 1, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v8, -v6, v5, v4 v_fma_f32 v9, -v7, v5, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_ge_f32_e64 s0, 0, v8 v_cndmask_b32_e64 v5, v5, v6, s0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_f32_e64 s0, 0, v9 v_cndmask_b32_e64 v5, v5, v7, s0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v6, 0x37800000, v5 v_cndmask_b32_e32 v5, v5, v6, vcc_lo v_cmp_class_f32_e64 vcc_lo, v4, 0x260 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v4, v5, v4, vcc_lo v_div_scale_f32 v5, null, s13, s13, v4 v_div_scale_f32 v8, vcc_lo, v4, s13, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v6, v5 s_waitcnt_depctr 0xfff v_fma_f32 v7, -v5, v6, 1.0 v_fmac_f32_e32 v6, v7, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v7, v8, v6 v_fma_f32 v9, -v5, v7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v7, v9, v6 v_fma_f32 v5, -v5, v7, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v5, v5, v6, v7 v_div_fixup_f32 v4, v5, s13, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cvt_i32_f32_e32 v6, v4 v_mov_b32_e32 v4, 1 v_mov_b32_e32 v5, 0 v_lshl_add_u32 v6, v6, 3, 0 ds_add_u64 v6, v[4:5] s_cbranch_scc1 .LBB1_14 .LBB1_15: ; %_Z14block_to_blockP8atomdescS0_iPyf.exit55 s_waitcnt vmcnt(0) lgkmcnt(0) s_barrier buffer_gl0_inv s_and_saveexec_b32 s0, s2 s_cbranch_execz .LBB1_18 ; %bb.16: ; %.lr.ph69 s_mul_i32 s0, s15, s12 s_mov_b32 s1, 0 v_lshl_add_u32 v2, v0, 3, 0 s_lshl_b64 s[4:5], s[0:1], 3 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s2, s6, s4 s_addc_u32 s4, s7, s5 s_lshl_b32 s5, s3, 3 .LBB1_17: ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v1, 31, v0 ds_load_b64 v[7:8], v2 v_add_nc_u32_e32 v2, s5, v2 v_lshlrev_b64 v[3:4], 3, v[0:1] v_add_nc_u32_e32 v0, s3, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v3, vcc_lo, s2, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s4, v4, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_cmp_le_i32_e32 vcc_lo, s12, v0 global_load_b64 v[5:6], v[3:4], off s_or_b32 s1, vcc_lo, s1 s_waitcnt vmcnt(0) lgkmcnt(0) v_add_co_u32 v5, s0, v5, v7 v_add_co_ci_u32_e64 v6, s0, v6, v8, s0 global_store_b64 v[3:4], v[5:6], off s_and_not1_b32 exec_lo, exec_lo, s1 s_cbranch_execnz .LBB1_17 .LBB1_18: ; %._crit_edge70 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z17GPUKernelFunctionyfP8atomdescPyi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 296 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 16 .amdhsa_next_free_sgpr 22 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z17GPUKernelFunctionyfP8atomdescPyi, .Lfunc_end1-_Z17GPUKernelFunctionyfP8atomdescPyi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1680 ; NumSgprs: 24 ; NumVgprs: 16 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 24 ; NumVGPRsForWavesPerEU: 16 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym SHist .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 20 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z18kernelSumHistogramPyS_iii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z18kernelSumHistogramPyS_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 10 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .offset: 0 .size: 8 .value_kind: by_value - .offset: 8 .size: 4 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .offset: 32 .size: 4 .value_kind: by_value - .offset: 40 .size: 4 .value_kind: hidden_block_count_x - .offset: 44 .size: 4 .value_kind: hidden_block_count_y - .offset: 48 .size: 4 .value_kind: hidden_block_count_z - .offset: 52 .size: 2 .value_kind: hidden_group_size_x - .offset: 54 .size: 2 .value_kind: hidden_group_size_y - .offset: 56 .size: 2 .value_kind: hidden_group_size_z - .offset: 58 .size: 2 .value_kind: hidden_remainder_x - .offset: 60 .size: 2 .value_kind: hidden_remainder_y - .offset: 62 .size: 2 .value_kind: hidden_remainder_z - .offset: 80 .size: 8 .value_kind: hidden_global_offset_x - .offset: 88 .size: 8 .value_kind: hidden_global_offset_y - .offset: 96 .size: 8 .value_kind: hidden_global_offset_z - .offset: 104 .size: 2 .value_kind: hidden_grid_dims - .offset: 160 .size: 4 .value_kind: hidden_dynamic_lds_size .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 296 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z17GPUKernelFunctionyfP8atomdescPyi .private_segment_fixed_size: 0 .sgpr_count: 24 .sgpr_spill_count: 0 .symbol: _Z17GPUKernelFunctionyfP8atomdescPyi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 16 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
5df89ce1d57b889c3fa4d2569e6ab57fa19d00d2
#include "friction_update.cuh" __global__ void friction_update ( SimulationParameters sim_params, SolverParameters solver_params, real dt, AssembledSolution d_assem_sol ) { int x = blockIdx.x * blockDim.x + threadIdx.x; if (x < sim_params.cells + 2) { if (d_assem_sol.h_BC[x] > solver_params.tol_dry && abs(d_assem_sol.q_BC[x]) > solver_params.tol_dry) { real u = d_assem_sol.q_BC[x] / d_assem_sol.h_BC[x]; real Cf = solver_params.g * pow(sim_params.manning, C(2.0)) / pow(d_assem_sol.h_BC[x], C(1.0) / C(3.0)); real Sf = -Cf * abs(u) * u; real D = 1 + 2 * dt * Cf * abs(u) / d_assem_sol.h_BC[x]; // Update d_assem_sol.q_BC[x] += dt * Sf / D; } } }
.file "tmpxft_00327165_00000000-6_friction_update.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2290: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2290: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution .type _Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution, @function _Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution: .LFB2312: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movsd %xmm0, 8(%rsp) leaq 32(%rsp), %rcx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movq %rdi, 88(%rsp) leaq 40(%rsp), %rdi movq %rsi, 96(%rsp) leaq 52(%rsp), %rsi movq %rax, 104(%rsp) movabsq $4294967297, %rax movq %rdx, 112(%rsp) leaq 24(%rsp), %rdx movq %rax, 40(%rsp) movl $1, 48(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 32(%rsp) .cfi_def_cfa_offset 152 leaq _Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 160 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2312: .size _Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution, .-_Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution .globl _Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution .type _Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution, @function _Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution: .LFB2313: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq 80(%rsp), %rdx leaq 56(%rsp), %rsi leaq 16(%rsp), %rdi call _Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2313: .size _Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution, .-_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2315: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2315: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC UR4, c[0x0][0x160] ; /* 0x0000580000047ab9 */ /* 0x000fe40000000800 */ /*0030*/ UIADD3 UR4, UR4, 0x2, URZ ; /* 0x0000000204047890 */ /* 0x000fe2000fffe03f */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0060*/ ISETP.GE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */ /* 0x000fda000bf06270 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ IMAD.MOV.U32 R13, RZ, RZ, 0x8 ; /* 0x00000008ff0d7424 */ /* 0x000fe200078e00ff */ /*0090*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fc60000000a00 */ /*00a0*/ IMAD.WIDE R12, R0, R13, c[0x0][0x1b0] ; /* 0x00006c00000c7625 */ /* 0x000fcc00078e020d */ /*00b0*/ LDG.E.64 R12, [R12.64] ; /* 0x000000080c0c7981 */ /* 0x000ea4000c1e1b00 */ /*00c0*/ DSETP.GT.AND P0, PT, R12, c[0x0][0x190], PT ; /* 0x000064000c00762a */ /* 0x004e1c0003f04000 */ /*00d0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x001fea0003800000 */ /*00e0*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */ /* 0x000fe40000011400 */ /*00f0*/ LEA R10, P0, R0, c[0x0][0x1a8], 0x3 ; /* 0x00006a00000a7a11 */ /* 0x000fc800078018ff */ /*0100*/ LEA.HI.X R11, R0, c[0x0][0x1ac], R3, 0x3, P0 ; /* 0x00006b00000b7a11 */ /* 0x000fca00000f1c03 */ /*0110*/ LDG.E.64 R8, [R10.64] ; /* 0x000000080a087981 */ /* 0x000ea4000c1e1b00 */ /*0120*/ DSETP.GT.AND P0, PT, |R8|, c[0x0][0x190], PT ; /* 0x000064000800762a */ /* 0x004e1c0003f04200 */ /*0130*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x001fea0003800000 */ /*0140*/ DADD R2, -RZ, |c[0x0][0x180]| ; /* 0x40006000ff027629 */ /* 0x000e220000000100 */ /*0150*/ BSSY B0, 0x1d0 ; /* 0x0000007000007945 */ /* 0x000fe20003800000 */ /*0160*/ MOV R0, 0x1c0 ; /* 0x000001c000007802 */ /* 0x000fe20000000f00 */ /*0170*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe40008000000 */ /*0180*/ UMOV UR5, 0x40000000 ; /* 0x4000000000057882 */ /* 0x000fca0000000000 */ /*0190*/ IMAD.MOV.U32 R14, RZ, RZ, R2 ; /* 0x000000ffff0e7224 */ /* 0x001fe400078e0002 */ /*01a0*/ IMAD.MOV.U32 R5, RZ, RZ, R3 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0003 */ /*01b0*/ CALL.REL.NOINC 0x1220 ; /* 0x0000106000007944 */ /* 0x000fea0003c00000 */ /*01c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*01d0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff047624 */ /* 0x000fe200078e00ff */ /*01e0*/ DSETP.NEU.AND P0, PT, RZ, c[0x0][0x180], PT ; /* 0x00006000ff00762a */ /* 0x000fe20003f0d000 */ /*01f0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff057624 */ /* 0x000fcc00078e00ff */ /*0200*/ DADD R2, R4, 2 ; /* 0x4000000004027429 */ /* 0x000e140000000000 */ /*0210*/ LOP3.LUT R2, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000003027812 */ /* 0x001fe200078ec0ff */ /*0220*/ IMAD.MOV.U32 R3, RZ, RZ, R21 ; /* 0x000000ffff037224 */ /* 0x000fc600078e0015 */ /*0230*/ ISETP.NE.AND P1, PT, R2, 0x7ff00000, PT ; /* 0x7ff000000200780c */ /* 0x000fe20003f25270 */ /*0240*/ IMAD.MOV.U32 R2, RZ, RZ, R20 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0014 */ /*0250*/ @!P0 CS2R R2, SRZ ; /* 0x0000000000028805 */ /* 0x000fd6000001ff00 */ /*0260*/ @P1 BRA 0x320 ; /* 0x000000b000001947 */ /* 0x000fea0003800000 */ /*0270*/ DSETP.GTU.AND P0, PT, |R4|, +INF , PT ; /* 0x7ff000000400742a */ /* 0x000e1c0003f0c200 */ /*0280*/ @P0 BRA 0x310 ; /* 0x0000008000000947 */ /* 0x001fea0003800000 */ /*0290*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff007624 */ /* 0x000fe200078e00ff */ /*02a0*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x180], PT ; /* 0x00006000ff007a0c */ /* 0x000fc80003f05270 */ /*02b0*/ LOP3.LUT R0, R0, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff00007812 */ /* 0x000fc800078ec0ff */ /*02c0*/ ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ; /* 0x7ff000000000780c */ /* 0x000fda0000705670 */ /*02d0*/ @P0 BRA 0x320 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*02e0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x0 ; /* 0x00000000ff027424 */ /* 0x000fe400078e00ff */ /*02f0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x7ff00000 ; /* 0x7ff00000ff037424 */ /* 0x000fe200078e00ff */ /*0300*/ BRA 0x320 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0310*/ DADD R2, R4, 2 ; /* 0x4000000004027429 */ /* 0x0000480000000000 */ /*0320*/ DADD R4, -RZ, |R12| ; /* 0x00000000ff047229 */ /* 0x001e22000000050c */ /*0330*/ BSSY B0, 0x3a0 ; /* 0x0000006000007945 */ /* 0x000fe20003800000 */ /*0340*/ MOV R0, 0x390 ; /* 0x0000039000007802 */ /* 0x000fe20000000f00 */ /*0350*/ UMOV UR4, 0x55555555 ; /* 0x5555555500047882 */ /* 0x000fe40000000000 */ /*0360*/ UMOV UR5, 0x3fd55555 ; /* 0x3fd5555500057882 */ /* 0x000fca0000000000 */ /*0370*/ IMAD.MOV.U32 R14, RZ, RZ, R4 ; /* 0x000000ffff0e7224 */ /* 0x001fe400078e0004 */ /*0380*/ CALL.REL.NOINC 0x1220 ; /* 0x00000e9000007944 */ /* 0x002fea0003c00000 */ /*0390*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*03a0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x180] ; /* 0x00006000ff047624 */ /* 0x000fe200078e00ff */ /*03b0*/ BSSY B0, 0x4a0 ; /* 0x000000e000007945 */ /* 0x000fe20003800000 */ /*03c0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff057624 */ /* 0x000fcc00078e00ff */ /*03d0*/ DSETP.NEU.AND P0, PT, R4, 1, PT ; /* 0x3ff000000400742a */ /* 0x000e0c0003f0d000 */ /*03e0*/ FSEL R6, R2, RZ, P0 ; /* 0x000000ff02067208 */ /* 0x001fe40000000000 */ /*03f0*/ FSEL R7, R3, 1.875, P0 ; /* 0x3ff0000003077808 */ /* 0x000fe20000000000 */ /*0400*/ DSETP.NEU.AND P0, PT, R12, RZ, PT ; /* 0x000000ff0c00722a */ /* 0x000e0a0003f0d000 */ /*0410*/ DMUL R6, R6, c[0x0][0x198] ; /* 0x0000660006067a28 */ /* 0x000e520000000000 */ /*0420*/ @!P0 BRA 0x480 ; /* 0x0000005000008947 */ /* 0x001fea0003800000 */ /*0430*/ ISETP.GT.AND P0, PT, R13, -0x1, PT ; /* 0xffffffff0d00780c */ /* 0x002fda0003f04270 */ /*0440*/ @P0 BRA 0x490 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0450*/ IMAD.MOV.U32 R20, RZ, RZ, 0x0 ; /* 0x00000000ff147424 */ /* 0x000fe400078e00ff */ /*0460*/ IMAD.MOV.U32 R21, RZ, RZ, -0x80000 ; /* 0xfff80000ff157424 */ /* 0x000fe200078e00ff */ /*0470*/ BRA 0x490 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0480*/ CS2R R20, SRZ ; /* 0x0000000000147805 */ /* 0x002fe4000001ff00 */ /*0490*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*04a0*/ DADD R2, R12, c[0x2][0x0] ; /* 0x008000000c027629 */ /* 0x000e220000000000 */ /*04b0*/ BSSY B0, 0x5a0 ; /* 0x000000e000007945 */ /* 0x000ff20003800000 */ /*04c0*/ LOP3.LUT R2, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000003027812 */ /* 0x001fc800078ec0ff */ /*04d0*/ ISETP.NE.AND P0, PT, R2, 0x7ff00000, PT ; /* 0x7ff000000200780c */ /* 0x000fda0003f05270 */ /*04e0*/ @P0 BRA 0x590 ; /* 0x000000a000000947 */ /* 0x000fea0003800000 */ /*04f0*/ DSETP.GTU.AND P0, PT, |R12|, +INF , PT ; /* 0x7ff000000c00742a */ /* 0x000e1c0003f0c200 */ /*0500*/ @P0 BRA 0x580 ; /* 0x0000007000000947 */ /* 0x001fea0003800000 */ /*0510*/ ISETP.NE.AND P0, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fe40003f05270 */ /*0520*/ LOP3.LUT R0, R13, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0d007812 */ /* 0x000fc800078ec0ff */ /*0530*/ ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ; /* 0x7ff000000000780c */ /* 0x000fda0000705670 */ /*0540*/ @P0 BRA 0x590 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0550*/ IMAD.MOV.U32 R20, RZ, RZ, 0x0 ; /* 0x00000000ff147424 */ /* 0x000fe400078e00ff */ /*0560*/ IMAD.MOV.U32 R21, RZ, RZ, 0x7ff00000 ; /* 0x7ff00000ff157424 */ /* 0x000fe200078e00ff */ /*0570*/ BRA 0x590 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0580*/ DADD R20, R12, c[0x2][0x0] ; /* 0x008000000c147629 */ /* 0x00004c0000000000 */ /*0590*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*05a0*/ MUFU.RCP64H R3, R13 ; /* 0x0000000d00037308 */ /* 0x000ea20000001800 */ /*05b0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */ /* 0x000fe200078e00ff */ /*05c0*/ FSETP.GEU.AND P1, PT, |R9|, 6.5827683646048100446e-37, PT ; /* 0x036000000900780b */ /* 0x000fe20003f2e200 */ /*05d0*/ BSSY B0, 0x720 ; /* 0x0000014000007945 */ /* 0x000fe80003800000 */ /*05e0*/ DFMA R4, -R12, R2, 1 ; /* 0x3ff000000c04742b */ /* 0x004e8c0000000102 */ /*05f0*/ DFMA R4, R4, R4, R4 ; /* 0x000000040404722b */ /* 0x004e8c0000000004 */ /*0600*/ DFMA R4, R2, R4, R2 ; /* 0x000000040204722b */ /* 0x004e8c0000000002 */ /*0610*/ DFMA R2, -R12, R4, 1 ; /* 0x3ff000000c02742b */ /* 0x004e8c0000000104 */ /*0620*/ DFMA R2, R4, R2, R4 ; /* 0x000000020402722b */ /* 0x004e8c0000000004 */ /*0630*/ DMUL R4, R8, R2 ; /* 0x0000000208047228 */ /* 0x004e8c0000000000 */ /*0640*/ DFMA R14, -R12, R4, R8 ; /* 0x000000040c0e722b */ /* 0x004e8c0000000108 */ /*0650*/ DFMA R2, R2, R14, R4 ; /* 0x0000000e0202722b */ /* 0x004e940000000004 */ /*0660*/ FFMA R0, RZ, R13, R3 ; /* 0x0000000dff007223 */ /* 0x004fca0000000003 */ /*0670*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0680*/ @P0 BRA P1, 0x710 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*0690*/ IMAD.MOV.U32 R16, RZ, RZ, R8 ; /* 0x000000ffff107224 */ /* 0x000fe200078e0008 */ /*06a0*/ MOV R0, 0x6f0 ; /* 0x000006f000007802 */ /* 0x000fe20000000f00 */ /*06b0*/ IMAD.MOV.U32 R17, RZ, RZ, R9 ; /* 0x000000ffff117224 */ /* 0x000fe400078e0009 */ /*06c0*/ IMAD.MOV.U32 R14, RZ, RZ, R12 ; /* 0x000000ffff0e7224 */ /* 0x000fe400078e000c */ /*06d0*/ IMAD.MOV.U32 R15, RZ, RZ, R13 ; /* 0x000000ffff0f7224 */ /* 0x000fe400078e000d */ /*06e0*/ CALL.REL.NOINC 0xc50 ; /* 0x0000056000007944 */ /* 0x003fea0003c00000 */ /*06f0*/ IMAD.MOV.U32 R2, RZ, RZ, R22 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0016 */ /*0700*/ IMAD.MOV.U32 R3, RZ, RZ, R23 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0017 */ /*0710*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0720*/ DSETP.NEU.AND P0, PT, R12, 1, PT ; /* 0x3ff000000c00742a */ /* 0x000ea20003f0d000 */ /*0730*/ IMAD.MOV.U32 R4, RZ, RZ, 0x1 ; /* 0x00000001ff047424 */ /* 0x000fe200078e00ff */ /*0740*/ FSETP.GEU.AND P1, PT, |R7|, 6.5827683646048100446e-37, PT ; /* 0x036000000700780b */ /* 0x000fe20003f2e200 */ /*0750*/ BSSY B0, 0x8b0 ; /* 0x0000015000007945 */ /* 0x000fe60003800000 */ /*0760*/ FSEL R15, R21, 1.875, P0 ; /* 0x3ff00000150f7808 */ /* 0x006fc40000000000 */ /*0770*/ FSEL R14, R20, RZ, P0 ; /* 0x000000ff140e7208 */ /* 0x000fe40000000000 */ /*0780*/ MUFU.RCP64H R5, R15 ; /* 0x0000000f00057308 */ /* 0x000e680000001800 */ /*0790*/ DFMA R16, -R14, R4, 1 ; /* 0x3ff000000e10742b */ /* 0x002e4c0000000104 */ /*07a0*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */ /* 0x002e4c0000000010 */ /*07b0*/ DFMA R16, R4, R16, R4 ; /* 0x000000100410722b */ /* 0x002e4c0000000004 */ /*07c0*/ DFMA R4, -R14, R16, 1 ; /* 0x3ff000000e04742b */ /* 0x002e4c0000000110 */ /*07d0*/ DFMA R4, R16, R4, R16 ; /* 0x000000041004722b */ /* 0x002e4c0000000010 */ /*07e0*/ DMUL R16, R6, R4 ; /* 0x0000000406107228 */ /* 0x002e4c0000000000 */ /*07f0*/ DFMA R18, -R14, R16, R6 ; /* 0x000000100e12722b */ /* 0x002e4c0000000106 */ /*0800*/ DFMA R4, R4, R18, R16 ; /* 0x000000120404722b */ /* 0x002e540000000010 */ /*0810*/ FFMA R0, RZ, R15, R5 ; /* 0x0000000fff007223 */ /* 0x002fca0000000005 */ /*0820*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0830*/ @P0 BRA P1, 0x8a0 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*0840*/ IMAD.MOV.U32 R16, RZ, RZ, R6 ; /* 0x000000ffff107224 */ /* 0x000fe200078e0006 */ /*0850*/ MOV R0, 0x880 ; /* 0x0000088000007802 */ /* 0x000fe20000000f00 */ /*0860*/ IMAD.MOV.U32 R17, RZ, RZ, R7 ; /* 0x000000ffff117224 */ /* 0x000fe400078e0007 */ /*0870*/ CALL.REL.NOINC 0xc50 ; /* 0x000003d000007944 */ /* 0x001fea0003c00000 */ /*0880*/ IMAD.MOV.U32 R4, RZ, RZ, R22 ; /* 0x000000ffff047224 */ /* 0x000fe400078e0016 */ /*0890*/ IMAD.MOV.U32 R5, RZ, RZ, R23 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0017 */ /*08a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*08b0*/ MUFU.RCP64H R15, R13 ; /* 0x0000000d000f7308 */ /* 0x000e620000001800 */ /*08c0*/ IMAD.MOV.U32 R14, RZ, RZ, 0x1 ; /* 0x00000001ff0e7424 */ /* 0x000fe200078e00ff */ /*08d0*/ BSSY B0, 0xa80 ; /* 0x000001a000007945 */ /* 0x000fe20003800000 */ /*08e0*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x1a0] ; /* 0x00006800ff067624 */ /* 0x000fe400078e00ff */ /*08f0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x1a4] ; /* 0x00006900ff077624 */ /* 0x000fcc00078e00ff */ /*0900*/ DADD R6, R6, c[0x0][0x1a0] ; /* 0x0000680006067629 */ /* 0x000e880000000000 */ /*0910*/ DFMA R16, -R12, R14, 1 ; /* 0x3ff000000c10742b */ /* 0x002e48000000010e */ /*0920*/ DMUL R6, R6, R4 ; /* 0x0000000406067228 */ /* 0x004fc80000000000 */ /*0930*/ DFMA R16, R16, R16, R16 ; /* 0x000000101010722b */ /* 0x002e480000000010 */ /*0940*/ DMUL R4, R4, |R2| ; /* 0x4000000204047228 */ /* 0x000fc80000000000 */ /*0950*/ DFMA R14, R14, R16, R14 ; /* 0x000000100e0e722b */ /* 0x002e48000000000e */ /*0960*/ DMUL R16, R6, |R2| ; /* 0x4000000206107228 */ /* 0x000e880000000000 */ /*0970*/ DFMA R18, -R12, R14, 1 ; /* 0x3ff000000c12742b */ /* 0x002e48000000010e */ /*0980*/ DMUL R2, R4, R2 ; /* 0x0000000204027228 */ /* 0x000fe40000000000 */ /*0990*/ FSETP.GEU.AND P1, PT, |R17|, 6.5827683646048100446e-37, PT ; /* 0x036000001100780b */ /* 0x004fe40003f2e200 */ /*09a0*/ DFMA R18, R14, R18, R14 ; /* 0x000000120e12722b */ /* 0x002e4c000000000e */ /*09b0*/ DMUL R6, R18, R16 ; /* 0x0000001012067228 */ /* 0x002e4c0000000000 */ /*09c0*/ DFMA R14, -R12, R6, R16 ; /* 0x000000060c0e722b */ /* 0x002e4c0000000110 */ /*09d0*/ DFMA R6, R18, R14, R6 ; /* 0x0000000e1206722b */ /* 0x002e540000000006 */ /*09e0*/ FFMA R0, RZ, R13, R7 ; /* 0x0000000dff007223 */ /* 0x002fca0000000007 */ /*09f0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0a00*/ @P0 BRA P1, 0xa70 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*0a10*/ IMAD.MOV.U32 R14, RZ, RZ, R12 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e000c */ /*0a20*/ MOV R0, 0xa50 ; /* 0x00000a5000007802 */ /* 0x000fe20000000f00 */ /*0a30*/ IMAD.MOV.U32 R15, RZ, RZ, R13 ; /* 0x000000ffff0f7224 */ /* 0x000fe400078e000d */ /*0a40*/ CALL.REL.NOINC 0xc50 ; /* 0x0000020000007944 */ /* 0x001fea0003c00000 */ /*0a50*/ IMAD.MOV.U32 R6, RZ, RZ, R22 ; /* 0x000000ffff067224 */ /* 0x000fe400078e0016 */ /*0a60*/ IMAD.MOV.U32 R7, RZ, RZ, R23 ; /* 0x000000ffff077224 */ /* 0x000fe400078e0017 */ /*0a70*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0a80*/ DADD R12, R6, 1 ; /* 0x3ff00000060c7429 */ /* 0x001e220000000000 */ /*0a90*/ IMAD.MOV.U32 R4, RZ, RZ, 0x1 ; /* 0x00000001ff047424 */ /* 0x000fe200078e00ff */ /*0aa0*/ BSSY B0, 0xc20 ; /* 0x0000017000007945 */ /* 0x000fe40003800000 */ /*0ab0*/ DMUL R14, R2, c[0x0][0x1a0] ; /* 0x00006800020e7a28 */ /* 0x000e640000000000 */ /*0ac0*/ MUFU.RCP64H R5, R13 ; /* 0x0000000d00057308 */ /* 0x001e300000001800 */ /*0ad0*/ FSETP.GEU.AND P1, PT, |R15|, 6.5827683646048100446e-37, PT ; /* 0x036000000f00780b */ /* 0x002fe20003f2e200 */ /*0ae0*/ DFMA R6, -R12, R4, 1 ; /* 0x3ff000000c06742b */ /* 0x001e0c0000000104 */ /*0af0*/ DFMA R6, R6, R6, R6 ; /* 0x000000060606722b */ /* 0x001e0c0000000006 */ /*0b00*/ DFMA R6, R4, R6, R4 ; /* 0x000000060406722b */ /* 0x001e0c0000000004 */ /*0b10*/ DFMA R4, -R12, R6, 1 ; /* 0x3ff000000c04742b */ /* 0x001e0c0000000106 */ /*0b20*/ DFMA R4, R6, R4, R6 ; /* 0x000000040604722b */ /* 0x001e0c0000000006 */ /*0b30*/ DMUL R2, R14, R4 ; /* 0x000000040e027228 */ /* 0x001e0c0000000000 */ /*0b40*/ DFMA R6, -R12, R2, R14 ; /* 0x000000020c06722b */ /* 0x001e0c000000010e */ /*0b50*/ DFMA R2, R4, R6, R2 ; /* 0x000000060402722b */ /* 0x001e140000000002 */ /*0b60*/ FFMA R0, RZ, R13, R3 ; /* 0x0000000dff007223 */ /* 0x001fca0000000003 */ /*0b70*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*0b80*/ @P0 BRA P1, 0xc10 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*0b90*/ IMAD.MOV.U32 R16, RZ, RZ, R14 ; /* 0x000000ffff107224 */ /* 0x000fe200078e000e */ /*0ba0*/ MOV R0, 0xbf0 ; /* 0x00000bf000007802 */ /* 0x000fe20000000f00 */ /*0bb0*/ IMAD.MOV.U32 R17, RZ, RZ, R15 ; /* 0x000000ffff117224 */ /* 0x000fe400078e000f */ /*0bc0*/ IMAD.MOV.U32 R14, RZ, RZ, R12 ; /* 0x000000ffff0e7224 */ /* 0x000fe400078e000c */ /*0bd0*/ IMAD.MOV.U32 R15, RZ, RZ, R13 ; /* 0x000000ffff0f7224 */ /* 0x000fe400078e000d */ /*0be0*/ CALL.REL.NOINC 0xc50 ; /* 0x0000006000007944 */ /* 0x000fea0003c00000 */ /*0bf0*/ IMAD.MOV.U32 R2, RZ, RZ, R22 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0016 */ /*0c00*/ IMAD.MOV.U32 R3, RZ, RZ, R23 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0017 */ /*0c10*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0c20*/ DADD R2, R8, -R2 ; /* 0x0000000008027229 */ /* 0x000e0e0000000802 */ /*0c30*/ STG.E.64 [R10.64], R2 ; /* 0x000000020a007986 */ /* 0x001fe2000c101b08 */ /*0c40*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0c50*/ FSETP.GEU.AND P0, PT, |R15|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000f00780b */ /* 0x040fe20003f0e200 */ /*0c60*/ IMAD.MOV.U32 R23, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff177424 */ /* 0x000fe200078e00ff */ /*0c70*/ LOP3.LUT R4, R15, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff0f047812 */ /* 0x000fe200078ec0ff */ /*0c80*/ IMAD.MOV.U32 R26, RZ, RZ, 0x1 ; /* 0x00000001ff1a7424 */ /* 0x000fe200078e00ff */ /*0c90*/ FSETP.GEU.AND P2, PT, |R17|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000001100780b */ /* 0x040fe20003f4e200 */ /*0ca0*/ IMAD.MOV.U32 R18, RZ, RZ, R16 ; /* 0x000000ffff127224 */ /* 0x000fe200078e0010 */ /*0cb0*/ LOP3.LUT R5, R4, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000004057812 */ /* 0x000fe200078efcff */ /*0cc0*/ IMAD.MOV.U32 R4, RZ, RZ, R14 ; /* 0x000000ffff047224 */ /* 0x000fe200078e000e */ /*0cd0*/ LOP3.LUT R22, R17, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000011167812 */ /* 0x000fe200078ec0ff */ /*0ce0*/ BSSY B1, 0x11f0 ; /* 0x0000050000017945 */ /* 0x000fe20003800000 */ /*0cf0*/ LOP3.LUT R29, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f1d7812 */ /* 0x000fc600078ec0ff */ /*0d00*/ @!P0 DMUL R4, R14, 8.98846567431157953865e+307 ; /* 0x7fe000000e048828 */ /* 0x000e220000000000 */ /*0d10*/ ISETP.GE.U32.AND P1, PT, R22, R29, PT ; /* 0x0000001d1600720c */ /* 0x000fc60003f26070 */ /*0d20*/ @!P2 LOP3.LUT R19, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f13a812 */ /* 0x000fe200078ec0ff */ /*0d30*/ @!P2 IMAD.MOV.U32 R24, RZ, RZ, RZ ; /* 0x000000ffff18a224 */ /* 0x000fe200078e00ff */ /*0d40*/ MUFU.RCP64H R27, R5 ; /* 0x00000005001b7308 */ /* 0x001e240000001800 */ /*0d50*/ @!P2 ISETP.GE.U32.AND P3, PT, R22, R19, PT ; /* 0x000000131600a20c */ /* 0x000fe40003f66070 */ /*0d60*/ SEL R19, R23.reuse, 0x63400000, !P1 ; /* 0x6340000017137807 */ /* 0x040fe40004800000 */ /*0d70*/ @!P2 SEL R25, R23, 0x63400000, !P3 ; /* 0x634000001719a807 */ /* 0x000fe40005800000 */ /*0d80*/ LOP3.LUT R19, R19, 0x800fffff, R17, 0xf8, !PT ; /* 0x800fffff13137812 */ /* 0x000fc400078ef811 */ /*0d90*/ @!P2 LOP3.LUT R25, R25, 0x80000000, R17, 0xf8, !PT ; /* 0x800000001919a812 */ /* 0x000fc800078ef811 */ /*0da0*/ @!P2 LOP3.LUT R25, R25, 0x100000, RZ, 0xfc, !PT ; /* 0x001000001919a812 */ /* 0x000fe200078efcff */ /*0db0*/ DFMA R30, R26, -R4, 1 ; /* 0x3ff000001a1e742b */ /* 0x001e0a0000000804 */ /*0dc0*/ @!P2 DFMA R18, R18, 2, -R24 ; /* 0x400000001212a82b */ /* 0x000fc80000000818 */ /*0dd0*/ DFMA R30, R30, R30, R30 ; /* 0x0000001e1e1e722b */ /* 0x001e0c000000001e */ /*0de0*/ DFMA R30, R26, R30, R26 ; /* 0x0000001e1a1e722b */ /* 0x001064000000001a */ /*0df0*/ IMAD.MOV.U32 R26, RZ, RZ, R22 ; /* 0x000000ffff1a7224 */ /* 0x001fe200078e0016 */ /*0e00*/ @!P2 LOP3.LUT R26, R19, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000131aa812 */ /* 0x000fe200078ec0ff */ /*0e10*/ IMAD.MOV.U32 R27, RZ, RZ, R29 ; /* 0x000000ffff1b7224 */ /* 0x000fe200078e001d */ /*0e20*/ @!P0 LOP3.LUT R27, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000051b8812 */ /* 0x000fe200078ec0ff */ /*0e30*/ DFMA R24, R30, -R4, 1 ; /* 0x3ff000001e18742b */ /* 0x002e060000000804 */ /*0e40*/ IADD3 R32, R27, -0x1, RZ ; /* 0xffffffff1b207810 */ /* 0x000fc60007ffe0ff */ /*0e50*/ DFMA R24, R30, R24, R30 ; /* 0x000000181e18722b */ /* 0x001064000000001e */ /*0e60*/ IADD3 R30, R26, -0x1, RZ ; /* 0xffffffff1a1e7810 */ /* 0x001fc80007ffe0ff */ /*0e70*/ ISETP.GT.U32.AND P0, PT, R30, 0x7feffffe, PT ; /* 0x7feffffe1e00780c */ /* 0x000fe20003f04070 */ /*0e80*/ DMUL R28, R24, R18 ; /* 0x00000012181c7228 */ /* 0x002e060000000000 */ /*0e90*/ ISETP.GT.U32.OR P0, PT, R32, 0x7feffffe, P0 ; /* 0x7feffffe2000780c */ /* 0x000fc60000704470 */ /*0ea0*/ DFMA R30, R28, -R4, R18 ; /* 0x800000041c1e722b */ /* 0x001e0c0000000012 */ /*0eb0*/ DFMA R24, R24, R30, R28 ; /* 0x0000001e1818722b */ /* 0x001048000000001c */ /*0ec0*/ @P0 BRA 0x1090 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*0ed0*/ LOP3.LUT R17, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f117812 */ /* 0x003fe200078ec0ff */ /*0ee0*/ IMAD.MOV.U32 R26, RZ, RZ, RZ ; /* 0x000000ffff1a7224 */ /* 0x000fc600078e00ff */ /*0ef0*/ ISETP.GE.U32.AND P0, PT, R22.reuse, R17, PT ; /* 0x000000111600720c */ /* 0x040fe20003f06070 */ /*0f00*/ IMAD.IADD R16, R22, 0x1, -R17 ; /* 0x0000000116107824 */ /* 0x000fc600078e0a11 */ /*0f10*/ SEL R23, R23, 0x63400000, !P0 ; /* 0x6340000017177807 */ /* 0x000fe40004000000 */ /*0f20*/ IMNMX R16, R16, -0x46a00000, !PT ; /* 0xb960000010107817 */ /* 0x000fc80007800200 */ /*0f30*/ IMNMX R16, R16, 0x46a00000, PT ; /* 0x46a0000010107817 */ /* 0x000fca0003800200 */ /*0f40*/ IMAD.IADD R16, R16, 0x1, -R23 ; /* 0x0000000110107824 */ /* 0x000fca00078e0a17 */ /*0f50*/ IADD3 R27, R16, 0x7fe00000, RZ ; /* 0x7fe00000101b7810 */ /* 0x000fcc0007ffe0ff */ /*0f60*/ DMUL R22, R24, R26 ; /* 0x0000001a18167228 */ /* 0x000e140000000000 */ /*0f70*/ FSETP.GTU.AND P0, PT, |R23|, 1.469367938527859385e-39, PT ; /* 0x001000001700780b */ /* 0x001fda0003f0c200 */ /*0f80*/ @P0 BRA 0x11e0 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*0f90*/ DFMA R4, R24, -R4, R18 ; /* 0x800000041804722b */ /* 0x000e220000000012 */ /*0fa0*/ IMAD.MOV.U32 R26, RZ, RZ, RZ ; /* 0x000000ffff1a7224 */ /* 0x000fd200078e00ff */ /*0fb0*/ FSETP.NEU.AND P0, PT, R5.reuse, RZ, PT ; /* 0x000000ff0500720b */ /* 0x041fe40003f0d000 */ /*0fc0*/ LOP3.LUT R15, R5, 0x80000000, R15, 0x48, !PT ; /* 0x80000000050f7812 */ /* 0x000fc800078e480f */ /*0fd0*/ LOP3.LUT R27, R15, R27, RZ, 0xfc, !PT ; /* 0x0000001b0f1b7212 */ /* 0x000fce00078efcff */ /*0fe0*/ @!P0 BRA 0x11e0 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*0ff0*/ IMAD.MOV R5, RZ, RZ, -R16 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0a10 */ /*1000*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */ /* 0x000fcc00078e00ff */ /*1010*/ DFMA R4, R22, -R4, R24 ; /* 0x800000041604722b */ /* 0x000e080000000018 */ /*1020*/ DMUL.RP R24, R24, R26 ; /* 0x0000001a18187228 */ /* 0x000e640000008000 */ /*1030*/ IADD3 R4, -R16, -0x43300000, RZ ; /* 0xbcd0000010047810 */ /* 0x001fc80007ffe1ff */ /*1040*/ FSETP.NEU.AND P0, PT, |R5|, R4, PT ; /* 0x000000040500720b */ /* 0x000fc80003f0d200 */ /*1050*/ LOP3.LUT R15, R25, R15, RZ, 0x3c, !PT ; /* 0x0000000f190f7212 */ /* 0x002fe400078e3cff */ /*1060*/ FSEL R22, R24, R22, !P0 ; /* 0x0000001618167208 */ /* 0x000fe40004000000 */ /*1070*/ FSEL R23, R15, R23, !P0 ; /* 0x000000170f177208 */ /* 0x000fe20004000000 */ /*1080*/ BRA 0x11e0 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*1090*/ DSETP.NAN.AND P0, PT, R16, R16, PT ; /* 0x000000101000722a */ /* 0x003e1c0003f08000 */ /*10a0*/ @P0 BRA 0x11c0 ; /* 0x0000011000000947 */ /* 0x001fea0003800000 */ /*10b0*/ DSETP.NAN.AND P0, PT, R14, R14, PT ; /* 0x0000000e0e00722a */ /* 0x000e1c0003f08000 */ /*10c0*/ @P0 BRA 0x1190 ; /* 0x000000c000000947 */ /* 0x001fea0003800000 */ /*10d0*/ ISETP.NE.AND P0, PT, R26, R27, PT ; /* 0x0000001b1a00720c */ /* 0x000fe20003f05270 */ /*10e0*/ IMAD.MOV.U32 R22, RZ, RZ, 0x0 ; /* 0x00000000ff167424 */ /* 0x000fe400078e00ff */ /*10f0*/ IMAD.MOV.U32 R23, RZ, RZ, -0x80000 ; /* 0xfff80000ff177424 */ /* 0x000fd400078e00ff */ /*1100*/ @!P0 BRA 0x11e0 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*1110*/ ISETP.NE.AND P0, PT, R26, 0x7ff00000, PT ; /* 0x7ff000001a00780c */ /* 0x000fe40003f05270 */ /*1120*/ LOP3.LUT R23, R17, 0x80000000, R15, 0x48, !PT ; /* 0x8000000011177812 */ /* 0x000fe400078e480f */ /*1130*/ ISETP.EQ.OR P0, PT, R27, RZ, !P0 ; /* 0x000000ff1b00720c */ /* 0x000fda0004702670 */ /*1140*/ @P0 LOP3.LUT R4, R23, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff0000017040812 */ /* 0x000fe200078efcff */ /*1150*/ @!P0 IMAD.MOV.U32 R22, RZ, RZ, RZ ; /* 0x000000ffff168224 */ /* 0x000fe400078e00ff */ /*1160*/ @P0 IMAD.MOV.U32 R22, RZ, RZ, RZ ; /* 0x000000ffff160224 */ /* 0x000fe400078e00ff */ /*1170*/ @P0 IMAD.MOV.U32 R23, RZ, RZ, R4 ; /* 0x000000ffff170224 */ /* 0x000fe200078e0004 */ /*1180*/ BRA 0x11e0 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*1190*/ LOP3.LUT R23, R15, 0x80000, RZ, 0xfc, !PT ; /* 0x000800000f177812 */ /* 0x000fe200078efcff */ /*11a0*/ IMAD.MOV.U32 R22, RZ, RZ, R14 ; /* 0x000000ffff167224 */ /* 0x000fe200078e000e */ /*11b0*/ BRA 0x11e0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*11c0*/ LOP3.LUT R23, R17, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000011177812 */ /* 0x000fe200078efcff */ /*11d0*/ IMAD.MOV.U32 R22, RZ, RZ, R16 ; /* 0x000000ffff167224 */ /* 0x000fe400078e0010 */ /*11e0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*11f0*/ IMAD.MOV.U32 R4, RZ, RZ, R0 ; /* 0x000000ffff047224 */ /* 0x000fe400078e0000 */ /*1200*/ IMAD.MOV.U32 R5, RZ, RZ, 0x0 ; /* 0x00000000ff057424 */ /* 0x000fc800078e00ff */ /*1210*/ RET.REL.NODEC R4 0x0 ; /* 0xffffede004007950 */ /* 0x000fea0003c3ffff */ /*1220*/ SHF.R.U32.HI R28, RZ, 0x14, R5 ; /* 0x00000014ff1c7819 */ /* 0x000fe20000011605 */ /*1230*/ IMAD.MOV.U32 R4, RZ, RZ, R14 ; /* 0x000000ffff047224 */ /* 0x000fe200078e000e */ /*1240*/ USHF.L.U32 UR7, UR5, 0x1, URZ ; /* 0x0000000105077899 */ /* 0x000fe2000800063f */ /*1250*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */ /* 0x000fe200078e00ff */ /*1260*/ ISETP.NE.AND P0, PT, R28, RZ, PT ; /* 0x000000ff1c00720c */ /* 0x000fe20003f05270 */ /*1270*/ IMAD.MOV.U32 R20, RZ, RZ, 0x7d2cafe2 ; /* 0x7d2cafe2ff147424 */ /* 0x000fe200078e00ff */ /*1280*/ ULOP3.LUT UR6, UR5, 0xff0fffff, URZ, 0xc0, !UPT ; /* 0xff0fffff05067892 */ /* 0x000fe2000f8ec03f */ /*1290*/ IMAD.MOV.U32 R21, RZ, RZ, 0x3eb0f5ff ; /* 0x3eb0f5ffff157424 */ /* 0x000fe200078e00ff */ /*12a0*/ UISETP.GT.U32.AND UP0, UPT, UR7, -0x2000001, UPT ; /* 0xfdffffff0700788c */ /* 0x000fc8000bf04070 */ /*12b0*/ USEL UR5, UR6, UR5, UP0 ; /* 0x0000000506057287 */ /* 0x000fca0008000000 */ /*12c0*/ @!P0 DMUL R26, R4, 1.80143985094819840000e+16 ; /* 0x43500000041a8828 */ /* 0x0000640000000000 */ /*12d0*/ IMAD.MOV.U32 R4, RZ, RZ, R5 ; /* 0x000000ffff047224 */ /* 0x001fd000078e0005 */ /*12e0*/ @!P0 IMAD.MOV.U32 R4, RZ, RZ, R27 ; /* 0x000000ffff048224 */ /* 0x002fe200078e001b */ /*12f0*/ @!P0 LEA.HI R28, R27, 0xffffffca, RZ, 0xc ; /* 0xffffffca1b1c8811 */ /* 0x000fe200078f60ff */ /*1300*/ @!P0 IMAD.MOV.U32 R14, RZ, RZ, R26 ; /* 0x000000ffff0e8224 */ /* 0x000fc600078e001a */ /*1310*/ LOP3.LUT R4, R4, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff04047812 */ /* 0x000fc800078ec0ff */ /*1320*/ LOP3.LUT R15, R4, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff00000040f7812 */ /* 0x000fc800078efcff */ /*1330*/ ISETP.GE.U32.AND P1, PT, R15, 0x3ff6a09f, PT ; /* 0x3ff6a09f0f00780c */ /* 0x000fda0003f26070 */ /*1340*/ @P1 IADD3 R5, R15, -0x100000, RZ ; /* 0xfff000000f051810 */ /* 0x000fca0007ffe0ff */ /*1350*/ @P1 IMAD.MOV.U32 R15, RZ, RZ, R5 ; /* 0x000000ffff0f1224 */ /* 0x000fcc00078e0005 */ /*1360*/ DADD R6, R14, 1 ; /* 0x3ff000000e067429 */ /* 0x000e080000000000 */ /*1370*/ DADD R14, R14, -1 ; /* 0xbff000000e0e7429 */ /* 0x000fe40000000000 */ /*1380*/ MUFU.RCP64H R17, R7 ; /* 0x0000000700117308 */ /* 0x001e240000001800 */ /*1390*/ DFMA R4, -R6, R16, 1 ; /* 0x3ff000000604742b */ /* 0x001e0c0000000110 */ /*13a0*/ DFMA R4, R4, R4, R4 ; /* 0x000000040404722b */ /* 0x001e0c0000000004 */ /*13b0*/ DFMA R16, R16, R4, R16 ; /* 0x000000041010722b */ /* 0x001e0c0000000010 */ /*13c0*/ DMUL R4, R16, R14 ; /* 0x0000000e10047228 */ /* 0x001e0c0000000000 */ /*13d0*/ DFMA R4, R16, R14, R4 ; /* 0x0000000e1004722b */ /* 0x001e0c0000000004 */ /*13e0*/ DMUL R18, R4, R4 ; /* 0x0000000404127228 */ /* 0x001e080000000000 */ /*13f0*/ DADD R6, R14, -R4 ; /* 0x000000000e067229 */ /* 0x000e480000000804 */ /*1400*/ DFMA R20, R18, R20, c[0x2][0x8] ; /* 0x008002001214762b */ /* 0x001e080000000014 */ /*1410*/ DADD R24, R6, R6 ; /* 0x0000000006187229 */ /* 0x002e480000000006 */ /*1420*/ DFMA R20, R18, R20, c[0x2][0x10] ; /* 0x008004001214762b */ /* 0x001e080000000014 */ /*1430*/ DFMA R14, R14, -R4, R24 ; /* 0x800000040e0e722b */ /* 0x002e480000000018 */ /*1440*/ DFMA R20, R18, R20, c[0x2][0x18] ; /* 0x008006001214762b */ /* 0x001e080000000014 */ /*1450*/ DMUL R14, R16, R14 ; /* 0x0000000e100e7228 */ /* 0x002fc80000000000 */ /*1460*/ DFMA R20, R18, R20, c[0x2][0x20] ; /* 0x008008001214762b */ /* 0x001e0c0000000014 */ /*1470*/ DFMA R20, R18, R20, c[0x2][0x28] ; /* 0x00800a001214762b */ /* 0x001e0c0000000014 */ /*1480*/ DFMA R22, R18, R20, c[0x2][0x30] ; /* 0x00800c001216762b */ /* 0x001e080000000014 */ /*1490*/ DMUL R20, R4, R4 ; /* 0x0000000404147228 */ /* 0x000e480000000000 */ /*14a0*/ DFMA R6, R18, R22, c[0x2][0x38] ; /* 0x00800e001206762b */ /* 0x001e080000000016 */ /*14b0*/ DMUL R16, R4, R20 ; /* 0x0000001404107228 */ /* 0x002fc80000000000 */ /*14c0*/ DADD R30, -R6, c[0x2][0x38] ; /* 0x00800e00061e7629 */ /* 0x001e080000000100 */ /*14d0*/ DFMA R24, R4, R4, -R20 ; /* 0x000000040418722b */ /* 0x000fc80000000814 */ /*14e0*/ DFMA R30, R18, R22, R30 ; /* 0x00000016121e722b */ /* 0x001e08000000001e */ /*14f0*/ DFMA R22, R4, R20, -R16 ; /* 0x000000140416722b */ /* 0x000e480000000810 */ /*1500*/ DADD R18, RZ, R30 ; /* 0x00000000ff127229 */ /* 0x001e08000000001e */ /*1510*/ DFMA R30, R14, R20, R22 ; /* 0x000000140e1e722b */ /* 0x0023e40000000016 */ /*1520*/ IADD3 R23, R15, 0x100000, RZ ; /* 0x001000000f177810 */ /* 0x002fe20007ffe0ff */ /*1530*/ IMAD.MOV.U32 R22, RZ, RZ, R14 ; /* 0x000000ffff167224 */ /* 0x000fe200078e000e */ /*1540*/ DADD R18, R18, c[0x2][0x40] ; /* 0x0080100012127629 */ /* 0x001e0a0000000000 */ /*1550*/ DFMA R24, R4, R22, R24 ; /* 0x000000160418722b */ /* 0x000e480000000018 */ /*1560*/ DADD R20, R6, R18 ; /* 0x0000000006147229 */ /* 0x001e080000000012 */ /*1570*/ DFMA R24, R4, R24, R30 ; /* 0x000000180418722b */ /* 0x002fc8000000001e */ /*1580*/ DMUL R22, R20, R16 ; /* 0x0000001014167228 */ /* 0x001e080000000000 */ /*1590*/ DADD R6, R6, -R20 ; /* 0x0000000006067229 */ /* 0x000e480000000814 */ /*15a0*/ DFMA R30, R20, R16, -R22 ; /* 0x00000010141e722b */ /* 0x001e080000000816 */ /*15b0*/ DADD R6, R18, R6 ; /* 0x0000000012067229 */ /* 0x002fc80000000006 */ /*15c0*/ DFMA R24, R20, R24, R30 ; /* 0x000000181418722b */ /* 0x001e0c000000001e */ /*15d0*/ DFMA R24, R6, R16, R24 ; /* 0x000000100618722b */ /* 0x001e0c0000000018 */ /*15e0*/ DADD R16, R22, R24 ; /* 0x0000000016107229 */ /* 0x001e0c0000000018 */ /*15f0*/ DADD R6, R4, R16 ; /* 0x0000000004067229 */ /* 0x001e080000000010 */ /*1600*/ DADD R22, R22, -R16 ; /* 0x0000000016167229 */ /* 0x000e480000000810 */ /*1610*/ DADD R4, R4, -R6 ; /* 0x0000000004047229 */ /* 0x001e080000000806 */ /*1620*/ DADD R22, R24, R22 ; /* 0x0000000018167229 */ /* 0x002fc80000000016 */ /*1630*/ DADD R4, R16, R4 ; /* 0x0000000010047229 */ /* 0x0010640000000004 */ /*1640*/ IADD3 R16, R28.reuse, -0x3ff, RZ ; /* 0xfffffc011c107810 */ /* 0x041fe20007ffe0ff */ /*1650*/ IMAD.MOV.U32 R17, RZ, RZ, 0x43300000 ; /* 0x43300000ff117424 */ /* 0x000fe200078e00ff */ /*1660*/ @P1 IADD3 R16, R28, -0x3fe, RZ ; /* 0xfffffc021c101810 */ /* 0x000fe40007ffe0ff */ /*1670*/ DADD R4, R22, R4 ; /* 0x0000000016047229 */ /* 0x0020640000000004 */ /*1680*/ LOP3.LUT R16, R16, 0x80000000, RZ, 0x3c, !PT ; /* 0x8000000010107812 */ /* 0x000fe200078e3cff */ /*1690*/ IMAD.MOV.U32 R22, RZ, RZ, 0x69ce2bdf ; /* 0x69ce2bdfff167424 */ /* 0x001fe400078e00ff */ /*16a0*/ IMAD.MOV.U32 R23, RZ, RZ, 0x3e5ade15 ; /* 0x3e5ade15ff177424 */ /* 0x000fe200078e00ff */ /*16b0*/ DADD R4, R14, R4 ; /* 0x000000000e047229 */ /* 0x002e080000000004 */ /*16c0*/ DADD R16, R16, c[0x2][0x48] ; /* 0x0080120010107629 */ /* 0x000fc80000000000 */ /*16d0*/ DADD R14, R6, R4 ; /* 0x00000000060e7229 */ /* 0x001e0c0000000004 */ /*16e0*/ DFMA R18, R16, c[0x2][0x50], R14 ; /* 0x0080140010127a2b */ /* 0x001e08000000000e */ /*16f0*/ DADD R6, R6, -R14 ; /* 0x0000000006067229 */ /* 0x000e48000000080e */ /*1700*/ DFMA R20, -R16, c[0x2][0x50], R18 ; /* 0x0080140010147a2b */ /* 0x001e080000000112 */ /*1710*/ DADD R6, R4, R6 ; /* 0x0000000004067229 */ /* 0x002fc80000000006 */ /*1720*/ DADD R20, -R14, R20 ; /* 0x000000000e147229 */ /* 0x001e0c0000000114 */ /*1730*/ DADD R6, R6, -R20 ; /* 0x0000000006067229 */ /* 0x001e0c0000000814 */ /*1740*/ DFMA R6, R16, c[0x2][0x58], R6 ; /* 0x0080160010067a2b */ /* 0x0010640000000006 */ /*1750*/ IMAD.MOV.U32 R16, RZ, RZ, 0x652b82fe ; /* 0x652b82feff107424 */ /* 0x001fe400078e00ff */ /*1760*/ IMAD.MOV.U32 R17, RZ, RZ, 0x3ff71547 ; /* 0x3ff71547ff117424 */ /* 0x000fe400078e00ff */ /*1770*/ DADD R14, R18, R6 ; /* 0x00000000120e7229 */ /* 0x002e0c0000000006 */ /*1780*/ DADD R18, R18, -R14 ; /* 0x0000000012127229 */ /* 0x001e08000000080e */ /*1790*/ DMUL R4, R14, UR4 ; /* 0x000000040e047c28 */ /* 0x000e480008000000 */ /*17a0*/ DADD R6, R6, R18 ; /* 0x0000000006067229 */ /* 0x001fc80000000012 */ /*17b0*/ DFMA R14, R14, UR4, -R4 ; /* 0x000000040e0e7c2b */ /* 0x002e0c0008000804 */ /*17c0*/ DFMA R6, R6, UR4, R14 ; /* 0x0000000406067c2b */ /* 0x001e0c000800000e */ /*17d0*/ DADD R14, R4, R6 ; /* 0x00000000040e7229 */ /* 0x001e0c0000000006 */ /*17e0*/ DFMA R16, R14, R16, 6.75539944105574400000e+15 ; /* 0x433800000e10742b */ /* 0x001e080000000010 */ /*17f0*/ FSETP.GEU.AND P0, PT, |R15|, 4.1917929649353027344, PT ; /* 0x4086232b0f00780b */ /* 0x000fe40003f0e200 */ /*1800*/ DADD R18, R16, -6.75539944105574400000e+15 ; /* 0xc338000010127429 */ /* 0x001e0c0000000000 */ /*1810*/ DFMA R20, R18, c[0x2][0x60], R14 ; /* 0x0080180012147a2b */ /* 0x001e0c000000000e */ /*1820*/ DFMA R18, R18, c[0x2][0x68], R20 ; /* 0x00801a0012127a2b */ /* 0x001e0c0000000014 */ /*1830*/ DFMA R20, R18, R22, c[0x2][0x70] ; /* 0x00801c001214762b */ /* 0x001e0c0000000016 */ /*1840*/ DFMA R20, R18, R20, c[0x2][0x78] ; /* 0x00801e001214762b */ /* 0x001e0c0000000014 */ /*1850*/ DFMA R20, R18, R20, c[0x2][0x80] ; /* 0x008020001214762b */ /* 0x001e0c0000000014 */ /*1860*/ DFMA R20, R18, R20, c[0x2][0x88] ; /* 0x008022001214762b */ /* 0x001e0c0000000014 */ /*1870*/ DFMA R20, R18, R20, c[0x2][0x90] ; /* 0x008024001214762b */ /* 0x001e0c0000000014 */ /*1880*/ DFMA R20, R18, R20, c[0x2][0x98] ; /* 0x008026001214762b */ /* 0x001e0c0000000014 */ /*1890*/ DFMA R20, R18, R20, c[0x2][0xa0] ; /* 0x008028001214762b */ /* 0x001e0c0000000014 */ /*18a0*/ DFMA R20, R18, R20, c[0x2][0xa8] ; /* 0x00802a001214762b */ /* 0x001e0c0000000014 */ /*18b0*/ DFMA R20, R18, R20, c[0x2][0xb0] ; /* 0x00802c001214762b */ /* 0x001e0c0000000014 */ /*18c0*/ DFMA R20, R18, R20, 1 ; /* 0x3ff000001214742b */ /* 0x001e0c0000000014 */ /*18d0*/ DFMA R20, R18, R20, 1 ; /* 0x3ff000001214742b */ /* 0x001e140000000014 */ /*18e0*/ IMAD R19, R16, 0x100000, R21 ; /* 0x0010000010137824 */ /* 0x001fe400078e0215 */ /*18f0*/ IMAD.MOV.U32 R18, RZ, RZ, R20 ; /* 0x000000ffff127224 */ /* 0x000fe200078e0014 */ /*1900*/ @!P0 BRA 0x19e0 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*1910*/ FSETP.GEU.AND P1, PT, |R15|, 4.2275390625, PT ; /* 0x408748000f00780b */ /* 0x000fe20003f2e200 */ /*1920*/ DADD R18, R14, +INF ; /* 0x7ff000000e127429 */ /* 0x000fc80000000000 */ /*1930*/ DSETP.GEU.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00722a */ /* 0x000e0c0003f0e000 */ /*1940*/ FSEL R18, R18, RZ, P0 ; /* 0x000000ff12127208 */ /* 0x001fe40000000000 */ /*1950*/ @!P1 LEA.HI R17, R16, R16, RZ, 0x1 ; /* 0x0000001010119211 */ /* 0x000fe400078f08ff */ /*1960*/ FSEL R19, R19, RZ, P0 ; /* 0x000000ff13137208 */ /* 0x000fe40000000000 */ /*1970*/ @!P1 SHF.R.S32.HI R17, RZ, 0x1, R17 ; /* 0x00000001ff119819 */ /* 0x000fca0000011411 */ /*1980*/ @!P1 IMAD.IADD R16, R16, 0x1, -R17 ; /* 0x0000000110109824 */ /* 0x000fe400078e0a11 */ /*1990*/ @!P1 IMAD R17, R17, 0x100000, R21 ; /* 0x0010000011119824 */ /* 0x000fc600078e0215 */ /*19a0*/ @!P1 LEA R21, R16, 0x3ff00000, 0x14 ; /* 0x3ff0000010159811 */ /* 0x000fe200078ea0ff */ /*19b0*/ @!P1 IMAD.MOV.U32 R16, RZ, RZ, R20 ; /* 0x000000ffff109224 */ /* 0x000fe400078e0014 */ /*19c0*/ @!P1 IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff149224 */ /* 0x000fcc00078e00ff */ /*19d0*/ @!P1 DMUL R18, R16, R20 ; /* 0x0000001410129228 */ /* 0x0000540000000000 */ /*19e0*/ LOP3.LUT R16, R19, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff13107812 */ /* 0x003fe200078ec0ff */ /*19f0*/ DADD R4, R4, -R14 ; /* 0x0000000004047229 */ /* 0x000e06000000080e */ /*1a00*/ ISETP.NE.AND P0, PT, R16, 0x7ff00000, PT ; /* 0x7ff000001000780c */ /* 0x000fc60003f05270 */ /*1a10*/ DADD R4, R6, R4 ; /* 0x0000000006047229 */ /* 0x001e220000000004 */ /*1a20*/ ISETP.EQ.AND P0, PT, R18, RZ, !P0 ; /* 0x000000ff1200720c */ /* 0x000fda0004702270 */ /*1a30*/ @!P0 DFMA R18, R4, R18, R18 ; /* 0x000000120412822b */ /* 0x0010640000000012 */ /*1a40*/ IMAD.MOV.U32 R4, RZ, RZ, R0 ; /* 0x000000ffff047224 */ /* 0x001fe400078e0000 */ /*1a50*/ IMAD.MOV.U32 R5, RZ, RZ, 0x0 ; /* 0x00000000ff057424 */ /* 0x000fcc00078e00ff */ /*1a60*/ IMAD.MOV.U32 R20, RZ, RZ, R18 ; /* 0x000000ffff147224 */ /* 0x002fe400078e0012 */ /*1a70*/ IMAD.MOV.U32 R21, RZ, RZ, R19 ; /* 0x000000ffff157224 */ /* 0x000fe200078e0013 */ /*1a80*/ RET.REL.NODEC R4 0x0 ; /* 0xffffe57004007950 */ /* 0x000fec0003c3ffff */ /*1a90*/ BRA 0x1a90; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1aa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ab0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ac0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ad0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1ae0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1af0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1b00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1b10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1b20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1b30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1b40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1b50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1b60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1b70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#pragma once #include "hip/hip_runtime.h" #include <algorithm> #include "SimulationParameters.h" #include "SolverParameters.h" #include "AssembledSolution.h" __global__ void friction_update ( SimulationParameters sim_params, SolverParameters solver_params, real dt, AssembledSolution d_assem_sol );
.text .file "friction_update.hip" .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
d658d570dbc1427634dd2e2f683706d0a4f78910
#include "includes.h" __global__ void CalcAngMom(double *AngMomx_d, double *AngMomy_d, double *AngMomz_d, double *GlobalAMx_d, double *GlobalAMy_d, double *GlobalAMz_d, double *Mh_d, double *Rho_d, double A, double Omega, double *Altitude_d, double *Altitudeh_d, double *lonlat_d, double *areasT, double *func_r_d, int num, bool DeepModel) { int id = blockIdx.x * blockDim.x + threadIdx.x; int nv = gridDim.y; int lev = blockIdx.y; if (id < num) { double AMx, AMy, AMz; double rx, ry, rz, r; //calculate control volume double zup, zlow, Vol; zup = Altitudeh_d[lev + 1] + A; zlow = Altitudeh_d[lev] + A; if (DeepModel) { Vol = areasT[id] / pow(A, 2) * (pow(zup, 3) - pow(zlow, 3)) / 3; } else { Vol = areasT[id] * (zup - zlow); } //radius vector r = (A + Altitude_d[lev]); rx = r * func_r_d[id * 3 + 0]; ry = r * func_r_d[id * 3 + 1]; rz = r * func_r_d[id * 3 + 2]; //angular momentum r x p (total x and y over globe should ~ 0, z ~ const) AMx = ry * Mh_d[id * 3 * nv + lev * 3 + 2] - rz * Mh_d[id * 3 * nv + lev * 3 + 1] - Rho_d[id * nv + lev] * Omega * r * rz * cos(lonlat_d[id * 2 + 1]) * cos(lonlat_d[id * 2]); AMy = -rx * Mh_d[id * 3 * nv + lev * 3 + 2] + rz * Mh_d[id * 3 * nv + lev * 3 + 0] - Rho_d[id * nv + lev] * Omega * r * rz * cos(lonlat_d[id * 2 + 1]) * sin(lonlat_d[id * 2]); AMz = rx * Mh_d[id * 3 * nv + lev * 3 + 1] - ry * Mh_d[id * 3 * nv + lev * 3 + 0] + Rho_d[id * nv + lev] * Omega * r * r * cos(lonlat_d[id * 2 + 1]) * cos(lonlat_d[id * 2 + 1]); //AMx, AMy should go to zero when integrated over globe // (but in practice, are just much smaller than AMz) //total in control volume AngMomx_d[id * nv + lev] = AMx * Vol; AngMomy_d[id * nv + lev] = AMy * Vol; AngMomz_d[id * nv + lev] = AMz * Vol; } }
.file "tmpxft_002d9959_00000000-6_CalcAngMom.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .type _Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, @function _Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib: .LFB2032: .cfi_startproc endbr64 subq $344, %rsp .cfi_def_cfa_offset 352 movq 352(%rsp), %rax movq %rdi, 120(%rsp) leaq 144(%rsp), %rdi movq %rsi, 112(%rsp) leaq 156(%rsp), %rsi movq %rax, 72(%rsp) movq 360(%rsp), %rax movq %rdx, 104(%rsp) leaq 128(%rsp), %rdx movq %rax, 64(%rsp) movq 368(%rsp), %rax movq %rcx, 96(%rsp) leaq 136(%rsp), %rcx movq %rax, 40(%rsp) movq 376(%rsp), %rax movq %r8, 88(%rsp) movq %rax, 32(%rsp) movq 384(%rsp), %rax movq %r9, 80(%rsp) movq %rax, 24(%rsp) movq 392(%rsp), %rax movsd %xmm0, 56(%rsp) movq %rax, 16(%rsp) movq 400(%rsp), %rax movsd %xmm1, 48(%rsp) movq %rax, 8(%rsp) movl 416(%rsp), %eax movb %al, 4(%rsp) movq %fs:40, %rax movq %rax, 328(%rsp) xorl %eax, %eax leaq 120(%rsp), %rax movq %rax, 192(%rsp) leaq 112(%rsp), %rax movq %rax, 200(%rsp) leaq 104(%rsp), %rax movq %rax, 208(%rsp) leaq 96(%rsp), %rax movq %rax, 216(%rsp) leaq 88(%rsp), %rax movq %rax, 224(%rsp) leaq 80(%rsp), %rax movq %rax, 232(%rsp) leaq 72(%rsp), %rax movq %rax, 240(%rsp) leaq 64(%rsp), %rax movq %rax, 248(%rsp) leaq 56(%rsp), %rax movq %rax, 256(%rsp) leaq 48(%rsp), %rax movq %rax, 264(%rsp) leaq 40(%rsp), %rax movq %rax, 272(%rsp) leaq 32(%rsp), %rax movq %rax, 280(%rsp) leaq 24(%rsp), %rax movq %rax, 288(%rsp) leaq 16(%rsp), %rax movq %rax, 296(%rsp) leaq 8(%rsp), %rax movq %rax, 304(%rsp) leaq 408(%rsp), %rax movq %rax, 312(%rsp) leaq 4(%rsp), %rax movq %rax, 320(%rsp) movabsq $4294967297, %rax movq %rax, 144(%rsp) movl $1, 152(%rsp) movq %rax, 156(%rsp) movl $1, 164(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 136(%rsp) .cfi_def_cfa_offset 360 leaq _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib(%rip), %rdi pushq 136(%rsp) .cfi_def_cfa_offset 368 movq 172(%rsp), %rcx movl 180(%rsp), %r8d movq 160(%rsp), %rsi movl 168(%rsp), %edx leaq 208(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 360 popq %rdx .cfi_def_cfa_offset 352 .L2: movq 328(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $344, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, .-_Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .globl _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .type _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, @function _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib: .LFB2033: .cfi_startproc endbr64 movzbl 72(%rsp), %eax movl %eax, 72(%rsp) jmp _Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .cfi_endproc .LFE2033: .size _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, .-_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fc800078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ IADD3 R1, R1, -0x30, RZ ; /* 0xffffffd001017810 */ /* 0x000fc60007ffe0ff */ /*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0040*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0050*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x1d8], PT ; /* 0x0000760000007a0c */ /* 0x000fda0003f06270 */ /*0060*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0070*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e220000002600 */ /*0080*/ IMAD.MOV.U32 R31, RZ, RZ, 0x8 ; /* 0x00000008ff1f7424 */ /* 0x000fe200078e00ff */ /*0090*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fc60000000a00 */ /*00a0*/ IMAD.WIDE R2, R2, R31, c[0x0][0x1b8] ; /* 0x00006e0002027625 */ /* 0x001fc800078e021f */ /*00b0*/ IMAD.WIDE R30, R0, R31, c[0x0][0x1c8] ; /* 0x00007200001e7625 */ /* 0x000fe200078e021f */ /*00c0*/ LDG.E.64 R6, [R2.64+0x8] ; /* 0x0000080802067981 */ /* 0x000ea8000c1e1b00 */ /*00d0*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000802047981 */ /* 0x000ee8000c1e1b00 */ /*00e0*/ LDG.E.64 R30, [R30.64] ; /* 0x000000081e1e7981 */ /* 0x000f62000c1e1b00 */ /*00f0*/ ULDC.S8 UR4, c[0x0][0x1dc] ; /* 0x0000770000047ab9 */ /* 0x000fc40000000200 */ /*0100*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ; /* 0x00000004ff007c0c */ /* 0x000fe2000bf05270 */ /*0110*/ DADD R6, R6, c[0x0][0x1a0] ; /* 0x0000680006067629 */ /* 0x004e080000000000 */ /*0120*/ DADD R4, R4, c[0x0][0x1a0] ; /* 0x0000680004047629 */ /* 0x008e500000000000 */ /*0130*/ @!P0 BRA 0xa50 ; /* 0x0000091000008947 */ /* 0x000fea0003800000 */ /*0140*/ DADD R2, -RZ, |c[0x0][0x1a0]| ; /* 0x40006800ff027629 */ /* 0x001e220000000100 */ /*0150*/ MOV R8, 0x1b0 ; /* 0x000001b000087802 */ /* 0x000fe20000000f00 */ /*0160*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe40008000000 */ /*0170*/ UMOV UR5, 0x40000000 ; /* 0x4000000000057882 */ /* 0x000fcc0000000000 */ /*0180*/ IMAD.MOV.U32 R12, RZ, RZ, R2 ; /* 0x000000ffff0c7224 */ /* 0x001fe400078e0002 */ /*0190*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e0003 */ /*01a0*/ CALL.REL.NOINC 0x2870 ; /* 0x000026c000007944 */ /* 0x022fea0003c00000 */ /*01b0*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x1a0] ; /* 0x00006800ff0a7624 */ /* 0x002fe200078e00ff */ /*01c0*/ DSETP.NEU.AND P0, PT, RZ, c[0x0][0x1a0], PT ; /* 0x00006800ff00762a */ /* 0x000fe20003f0d000 */ /*01d0*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x1a4] ; /* 0x00006900ff0b7624 */ /* 0x000fcc00078e00ff */ /*01e0*/ DADD R2, R10, 2 ; /* 0x400000000a027429 */ /* 0x000e540000000000 */ /*01f0*/ LOP3.LUT R2, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000003027812 */ /* 0x002fe200078ec0ff */ /*0200*/ IMAD.MOV.U32 R3, RZ, RZ, R19 ; /* 0x000000ffff037224 */ /* 0x004fc600078e0013 */ /*0210*/ ISETP.NE.AND P1, PT, R2, 0x7ff00000, PT ; /* 0x7ff000000200780c */ /* 0x000fe20003f25270 */ /*0220*/ IMAD.MOV.U32 R2, RZ, RZ, R18 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0012 */ /*0230*/ @!P0 CS2R R2, SRZ ; /* 0x0000000000028805 */ /* 0x000fd6000001ff00 */ /*0240*/ @P1 BRA 0x300 ; /* 0x000000b000001947 */ /* 0x000fea0003800000 */ /*0250*/ DSETP.GTU.AND P0, PT, |R10|, +INF , PT ; /* 0x7ff000000a00742a */ /* 0x000e5c0003f0c200 */ /*0260*/ @P0 BRA 0x2f0 ; /* 0x0000008000000947 */ /* 0x002fea0003800000 */ /*0270*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x1a4] ; /* 0x00006900ff087624 */ /* 0x000fe200078e00ff */ /*0280*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x1a0], PT ; /* 0x00006800ff007a0c */ /* 0x000fc80003f05270 */ /*0290*/ LOP3.LUT R8, R8, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff08087812 */ /* 0x000fc800078ec0ff */ /*02a0*/ ISETP.NE.OR P0, PT, R8, 0x7ff00000, P0 ; /* 0x7ff000000800780c */ /* 0x000fda0000705670 */ /*02b0*/ @P0 BRA 0x300 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*02c0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x0 ; /* 0x00000000ff027424 */ /* 0x000fe400078e00ff */ /*02d0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x7ff00000 ; /* 0x7ff00000ff037424 */ /* 0x000fe200078e00ff */ /*02e0*/ BRA 0x300 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*02f0*/ DADD R2, R10, 2 ; /* 0x400000000a027429 */ /* 0x0002880000000000 */ /*0300*/ DSETP.NEU.AND P0, PT, R10, 1, PT ; /* 0x3ff000000a00742a */ /* 0x000ee20003f0d000 */ /*0310*/ FSETP.GEU.AND P1, PT, |R31|, 6.5827683646048100446e-37, PT ; /* 0x036000001f00780b */ /* 0x000fe20003f2e200 */ /*0320*/ BSSY B0, 0x490 ; /* 0x0000016000007945 */ /* 0x000fe80003800000 */ /*0330*/ FSEL R9, R3, 1.875, P0 ; /* 0x3ff0000003097808 */ /* 0x00cfe40000000000 */ /*0340*/ FSEL R8, R2, RZ, P0 ; /* 0x000000ff02087208 */ /* 0x000fe20000000000 */ /*0350*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */ /* 0x000fe200078e00ff */ /*0360*/ MUFU.RCP64H R3, R9 ; /* 0x0000000900037308 */ /* 0x000eaa0000001800 */ /*0370*/ DFMA R10, -R8, R2, 1 ; /* 0x3ff00000080a742b */ /* 0x006e4c0000000102 */ /*0380*/ DFMA R10, R10, R10, R10 ; /* 0x0000000a0a0a722b */ /* 0x002e4c000000000a */ /*0390*/ DFMA R10, R2, R10, R2 ; /* 0x0000000a020a722b */ /* 0x002e4c0000000002 */ /*03a0*/ DFMA R2, -R8, R10, 1 ; /* 0x3ff000000802742b */ /* 0x002e4c000000010a */ /*03b0*/ DFMA R2, R10, R2, R10 ; /* 0x000000020a02722b */ /* 0x002e4c000000000a */ /*03c0*/ DMUL R10, R30, R2 ; /* 0x000000021e0a7228 */ /* 0x002e4c0000000000 */ /*03d0*/ DFMA R12, -R8, R10, R30 ; /* 0x0000000a080c722b */ /* 0x002e4c000000011e */ /*03e0*/ DFMA R2, R2, R12, R10 ; /* 0x0000000c0202722b */ /* 0x002e54000000000a */ /*03f0*/ FFMA R10, RZ, R9, R3 ; /* 0x00000009ff0a7223 */ /* 0x002fca0000000003 */ /*0400*/ FSETP.GT.AND P0, PT, |R10|, 1.469367938527859385e-39, PT ; /* 0x001000000a00780b */ /* 0x000fda0003f04200 */ /*0410*/ @P0 BRA P1, 0x480 ; /* 0x0000006000000947 */ /* 0x000fea0000800000 */ /*0420*/ IMAD.MOV.U32 R2, RZ, RZ, R8 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0008 */ /*0430*/ MOV R8, 0x480 ; /* 0x0000048000087802 */ /* 0x000fe20000000f00 */ /*0440*/ IMAD.MOV.U32 R12, RZ, RZ, R30 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e001e */ /*0450*/ IMAD.MOV.U32 R13, RZ, RZ, R31 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e001f */ /*0460*/ IMAD.MOV.U32 R3, RZ, RZ, R9 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0009 */ /*0470*/ CALL.REL.NOINC 0x22a0 ; /* 0x00001e2000007944 */ /* 0x001fea0003c00000 */ /*0480*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0490*/ DADD R8, -RZ, |R6| ; /* 0x00000000ff087229 */ /* 0x000e620000000506 */ /*04a0*/ UMOV UR5, 0x40080000 ; /* 0x4008000000057882 */ /* 0x000fd20000000000 */ /*04b0*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x002fe200078e0008 */ /*04c0*/ MOV R8, 0x4f0 ; /* 0x000004f000087802 */ /* 0x000fe20000000f00 */ /*04d0*/ IMAD.MOV.U32 R11, RZ, RZ, R9 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e0009 */ /*04e0*/ CALL.REL.NOINC 0x2870 ; /* 0x0000238000007944 */ /* 0x001fea0003c00000 */ /*04f0*/ DADD R8, R6, 3 ; /* 0x4008000006087429 */ /* 0x000ee20000000000 */ /*0500*/ ISETP.GE.AND P1, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fc60003f26270 */ /*0510*/ DSETP.NEU.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600722a */ /* 0x000f0c0003f0d000 */ /*0520*/ LOP3.LUT R8, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000009087812 */ /* 0x008fe200078ec0ff */ /*0530*/ IMAD.MOV.U32 R9, RZ, RZ, R19 ; /* 0x000000ffff097224 */ /* 0x004fc600078e0013 */ /*0540*/ ISETP.NE.AND P2, PT, R8, 0x7ff00000, PT ; /* 0x7ff000000800780c */ /* 0x000fe20003f45270 */ /*0550*/ IMAD.MOV.U32 R8, RZ, RZ, R18 ; /* 0x000000ffff087224 */ /* 0x000fe200078e0012 */ /*0560*/ @!P1 LOP3.LUT R11, R9, 0x80000000, RZ, 0x3c, !PT ; /* 0x80000000090b9812 */ /* 0x002fe400078e3cff */ /*0570*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff088224 */ /* 0x010fc600078e00ff */ /*0580*/ @!P1 IMAD.MOV.U32 R9, RZ, RZ, R11 ; /* 0x000000ffff099224 */ /* 0x000fe400078e000b */ /*0590*/ @!P0 IMAD.MOV.U32 R9, RZ, RZ, R7 ; /* 0x000000ffff098224 */ /* 0x000fc800078e0007 */ /*05a0*/ @P2 BRA 0x660 ; /* 0x000000b000002947 */ /* 0x000fea0003800000 */ /*05b0*/ DSETP.GTU.AND P0, PT, |R6|, +INF , PT ; /* 0x7ff000000600742a */ /* 0x000e5c0003f0c200 */ /*05c0*/ @P0 BRA 0x650 ; /* 0x0000008000000947 */ /* 0x002fea0003800000 */ /*05d0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f05270 */ /*05e0*/ LOP3.LUT R10, R7, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff070a7812 */ /* 0x000fc800078ec0ff */ /*05f0*/ ISETP.NE.OR P0, PT, R10, 0x7ff00000, P0 ; /* 0x7ff000000a00780c */ /* 0x000fda0000705670 */ /*0600*/ @P0 BRA 0x660 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*0610*/ IMAD.MOV.U32 R9, RZ, RZ, -0x100000 ; /* 0xfff00000ff097424 */ /* 0x000fe400078e00ff */ /*0620*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x000fc600078e00ff */ /*0630*/ SEL R9, R9, 0x7ff00000, !P1 ; /* 0x7ff0000009097807 */ /* 0x000fe20004800000 */ /*0640*/ BRA 0x660 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0650*/ DADD R8, R6, 3 ; /* 0x4008000006087429 */ /* 0x0002880000000000 */ /*0660*/ DADD R10, -RZ, |R4| ; /* 0x00000000ff0a7229 */ /* 0x000fe20000000504 */ /*0670*/ UMOV UR5, 0x40080000 ; /* 0x4008000000057882 */ /* 0x000fc60000000000 */ /*0680*/ DSETP.NEU.AND P0, PT, R6, 1, PT ; /* 0x3ff000000600742a */ /* 0x000ecc0003f0d000 */ /*0690*/ FSEL R6, R8, RZ, P0 ; /* 0x000000ff08067208 */ /* 0x00efe20000000000 */ /*06a0*/ IMAD.MOV.U32 R12, RZ, RZ, R10 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e000a */ /*06b0*/ FSEL R7, R9, 1.875, P0 ; /* 0x3ff0000009077808 */ /* 0x000fe40000000000 */ /*06c0*/ MOV R8, 0x6e0 ; /* 0x000006e000087802 */ /* 0x000fe40000000f00 */ /*06d0*/ CALL.REL.NOINC 0x2870 ; /* 0x0000219000007944 */ /* 0x001fea0003c00000 */ /*06e0*/ DADD R8, R4, 3 ; /* 0x4008000004087429 */ /* 0x000ee20000000000 */ /*06f0*/ ISETP.GE.AND P1, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fc60003f26270 */ /*0700*/ DSETP.NEU.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400722a */ /* 0x000f0c0003f0d000 */ /*0710*/ LOP3.LUT R8, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000009087812 */ /* 0x008fe200078ec0ff */ /*0720*/ IMAD.MOV.U32 R9, RZ, RZ, R19 ; /* 0x000000ffff097224 */ /* 0x004fc600078e0013 */ /*0730*/ ISETP.NE.AND P2, PT, R8, 0x7ff00000, PT ; /* 0x7ff000000800780c */ /* 0x000fe20003f45270 */ /*0740*/ IMAD.MOV.U32 R8, RZ, RZ, R18 ; /* 0x000000ffff087224 */ /* 0x000fe200078e0012 */ /*0750*/ @!P1 LOP3.LUT R11, R9, 0x80000000, RZ, 0x3c, !PT ; /* 0x80000000090b9812 */ /* 0x002fe400078e3cff */ /*0760*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff088224 */ /* 0x010fc600078e00ff */ /*0770*/ @!P1 IMAD.MOV.U32 R9, RZ, RZ, R11 ; /* 0x000000ffff099224 */ /* 0x000fe400078e000b */ /*0780*/ @!P0 IMAD.MOV.U32 R9, RZ, RZ, R5 ; /* 0x000000ffff098224 */ /* 0x000fc800078e0005 */ /*0790*/ @P2 BRA 0x850 ; /* 0x000000b000002947 */ /* 0x000fea0003800000 */ /*07a0*/ DSETP.GTU.AND P0, PT, |R4|, +INF , PT ; /* 0x7ff000000400742a */ /* 0x000e5c0003f0c200 */ /*07b0*/ @P0 BRA 0x840 ; /* 0x0000008000000947 */ /* 0x002fea0003800000 */ /*07c0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fe40003f05270 */ /*07d0*/ LOP3.LUT R10, R5, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff050a7812 */ /* 0x000fc800078ec0ff */ /*07e0*/ ISETP.NE.OR P0, PT, R10, 0x7ff00000, P0 ; /* 0x7ff000000a00780c */ /* 0x000fda0000705670 */ /*07f0*/ @P0 BRA 0x850 ; /* 0x0000005000000947 */ /* 0x000fea0003800000 */ /*0800*/ IMAD.MOV.U32 R9, RZ, RZ, -0x100000 ; /* 0xfff00000ff097424 */ /* 0x000fe400078e00ff */ /*0810*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ; /* 0x000000ffff087224 */ /* 0x000fc600078e00ff */ /*0820*/ SEL R9, R9, 0x7ff00000, !P1 ; /* 0x7ff0000009097807 */ /* 0x000fe20004800000 */ /*0830*/ BRA 0x850 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*0840*/ DADD R8, R4, 3 ; /* 0x4008000004087429 */ /* 0x0002880000000000 */ /*0850*/ MUFU.RCP64H R11, 3 ; /* 0x40080000000b7908 */ /* 0x000ee20000001800 */ /*0860*/ IMAD.MOV.U32 R14, RZ, RZ, 0x0 ; /* 0x00000000ff0e7424 */ /* 0x000fe200078e00ff */ /*0870*/ DSETP.NEU.AND P0, PT, R4, 1, PT ; /* 0x3ff000000400742a */ /* 0x000f220003f0d000 */ /*0880*/ IMAD.MOV.U32 R15, RZ, RZ, 0x40080000 ; /* 0x40080000ff0f7424 */ /* 0x000fe200078e00ff */ /*0890*/ BSSY B0, 0xa40 ; /* 0x000001a000007945 */ /* 0x000fe20003800000 */ /*08a0*/ IMAD.MOV.U32 R10, RZ, RZ, 0x1 ; /* 0x00000001ff0a7424 */ /* 0x000fc600078e00ff */ /*08b0*/ FSEL R4, R8, RZ, P0 ; /* 0x000000ff08047208 */ /* 0x016fe40000000000 */ /*08c0*/ FSEL R5, R9, 1.875, P0 ; /* 0x3ff0000009057808 */ /* 0x000fe20000000000 */ /*08d0*/ DFMA R12, R10, -R14, 1 ; /* 0x3ff000000a0c742b */ /* 0x008e4a000000080e */ /*08e0*/ DADD R6, R6, -R4 ; /* 0x0000000006067229 */ /* 0x000e880000000804 */ /*08f0*/ DFMA R12, R12, R12, R12 ; /* 0x0000000c0c0c722b */ /* 0x002e48000000000c */ /*0900*/ DMUL R6, R6, R2 ; /* 0x0000000206067228 */ /* 0x004fc80000000000 */ /*0910*/ DFMA R12, R10, R12, R10 ; /* 0x0000000c0a0c722b */ /* 0x002e4c000000000a */ /*0920*/ DFMA R4, R12, -R14, 1 ; /* 0x3ff000000c04742b */ /* 0x002e62000000080e */ /*0930*/ FSETP.GEU.AND P1, PT, |R7|, 6.5827683646048100446e-37, PT ; /* 0x036000000700780b */ /* 0x000fca0003f2e200 */ /*0940*/ DFMA R4, R12, R4, R12 ; /* 0x000000040c04722b */ /* 0x002e4c000000000c */ /*0950*/ DMUL R30, R6, R4 ; /* 0x00000004061e7228 */ /* 0x002e4c0000000000 */ /*0960*/ DFMA R2, R30, -3, R6 ; /* 0xc00800001e02782b */ /* 0x002e4c0000000006 */ /*0970*/ DFMA R30, R4, R2, R30 ; /* 0x00000002041e722b */ /* 0x002e54000000001e */ /*0980*/ FFMA R2, RZ, 2.125, R31 ; /* 0x40080000ff027823 */ /* 0x002fca000000001f */ /*0990*/ FSETP.GT.AND P0, PT, |R2|, 1.469367938527859385e-39, PT ; /* 0x001000000200780b */ /* 0x000fda0003f04200 */ /*09a0*/ @P0 BRA P1, 0xa30 ; /* 0x0000008000000947 */ /* 0x000fea0000800000 */ /*09b0*/ IMAD.MOV.U32 R12, RZ, RZ, R6 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0006 */ /*09c0*/ MOV R8, 0xa10 ; /* 0x00000a1000087802 */ /* 0x000fe20000000f00 */ /*09d0*/ IMAD.MOV.U32 R13, RZ, RZ, R7 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e0007 */ /*09e0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fe400078e00ff */ /*09f0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x40080000 ; /* 0x40080000ff037424 */ /* 0x000fe400078e00ff */ /*0a00*/ CALL.REL.NOINC 0x22a0 ; /* 0x0000189000007944 */ /* 0x001fea0003c00000 */ /*0a10*/ IMAD.MOV.U32 R30, RZ, RZ, R2 ; /* 0x000000ffff1e7224 */ /* 0x000fe400078e0002 */ /*0a20*/ IMAD.MOV.U32 R31, RZ, RZ, R3 ; /* 0x000000ffff1f7224 */ /* 0x000fe400078e0003 */ /*0a30*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0a40*/ BRA 0xa70 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*0a50*/ DADD R4, R6, -R4 ; /* 0x0000000006047229 */ /* 0x003e0c0000000804 */ /*0a60*/ DMUL R30, R30, R4 ; /* 0x000000041e1e7228 */ /* 0x0210480000000000 */ /*0a70*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */ /* 0x000ea20000002600 */ /*0a80*/ IMAD R9, R0, 0x3, RZ ; /* 0x0000000300097824 */ /* 0x000fe400078e02ff */ /*0a90*/ IMAD.MOV.U32 R24, RZ, RZ, 0x8 ; /* 0x00000008ff187424 */ /* 0x000fc600078e00ff */ /*0aa0*/ IADD3 R26, -R0, 0x1, R9 ; /* 0x00000001001a7810 */ /* 0x000fe20007ffe109 */ /*0ab0*/ IMAD.WIDE R6, R9, R24, c[0x0][0x1d0] ; /* 0x0000740009067625 */ /* 0x000fc800078e0218 */ /*0ac0*/ IMAD.WIDE R26, R26, R24.reuse, c[0x0][0x1c0] ; /* 0x000070001a1a7625 */ /* 0x080fe200078e0218 */ /*0ad0*/ LDG.E.64 R32, [R6.64+0x10] ; /* 0x0000100806207981 */ /* 0x000ee8000c1e1b00 */ /*0ae0*/ LDG.E.64 R8, [R26.64] ; /* 0x000000081a087981 */ /* 0x000f28000c1e1b00 */ /*0af0*/ LDG.E.64 R20, [R6.64+0x8] ; /* 0x0000080806147981 */ /* 0x000ee2000c1e1b00 */ /*0b00*/ IMAD.WIDE R4, R3, R24, c[0x0][0x1b0] ; /* 0x00006c0003047625 */ /* 0x005fc600078e0218 */ /*0b10*/ LDG.E.64 R18, [R6.64] ; /* 0x0000000806127981 */ /* 0x000ea2000c1e1b00 */ /*0b20*/ IMAD R3, R0, c[0x0][0x10], R3 ; /* 0x0000040000037a24 */ /* 0x000fc600078e0203 */ /*0b30*/ LDG.E.64 R4, [R4.64] ; /* 0x0000000804047981 */ /* 0x000ea2000c1e1b00 */ /*0b40*/ IMAD R28, R3, 0x3, RZ ; /* 0x00000003031c7824 */ /* 0x000fc800078e02ff */ /*0b50*/ IMAD.WIDE R28, R28, R24, c[0x0][0x190] ; /* 0x000064001c1c7625 */ /* 0x000fca00078e0218 */ /*0b60*/ LDG.E.64 R10, [R28.64+0x8] ; /* 0x000008081c0a7981 */ /* 0x000ee2000c1e1b00 */ /*0b70*/ IMAD.WIDE R24, R3, R24, c[0x0][0x198] ; /* 0x0000660003187625 */ /* 0x000fc600078e0218 */ /*0b80*/ LDG.E.64 R14, [R28.64+0x10] ; /* 0x000010081c0e7981 */ /* 0x000ee8000c1e1b00 */ /*0b90*/ LDG.E.64 R16, [R24.64] ; /* 0x0000000818107981 */ /* 0x000162000c1e1b00 */ /*0ba0*/ BSSY B1, 0xde0 ; /* 0x0000023000017945 */ /* 0x000fe20003800000 */ /*0bb0*/ IADD3 R36, R1, c[0x0][0x20], RZ ; /* 0x0000080001247a10 */ /* 0x000fe40007ffe0ff */ /*0bc0*/ LOP3.LUT R0, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09007812 */ /* 0x010fe400078ec0ff */ /*0bd0*/ ISETP.EQ.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fc40003f22270 */ /*0be0*/ ISETP.NE.AND P0, PT, R0, 0x7ff00000, PT ; /* 0x7ff000000000780c */ /* 0x000fe20003f05270 */ /*0bf0*/ DADD R22, R4, c[0x0][0x1a0] ; /* 0x0000680004167629 */ /* 0x004ecc0000000000 */ /*0c00*/ DMUL R32, R22, R32 ; /* 0x0000002016207228 */ /* 0x008e880000000000 */ /*0c10*/ DMUL R20, R22, R20 ; /* 0x0000001416147228 */ /* 0x000fc80000000000 */ /*0c20*/ DMUL R10, R32, R10 ; /* 0x0000000a200a7228 */ /* 0x004ea20000000000 */ /*0c30*/ SHF.R.S32.HI R4, RZ, 0x1f, R3 ; /* 0x0000001fff047819 */ /* 0x000fc60000011403 */ /*0c40*/ DMUL R18, R22, R18 ; /* 0x0000001216127228 */ /* 0x0000c80000000000 */ /*0c50*/ DFMA R14, R20, R14, -R10 ; /* 0x0000000e140e722b */ /* 0x0040a2000000080a */ /*0c60*/ @!P0 BRA P1, 0xdb0 ; /* 0x0000014000008947 */ /* 0x000fea0000800000 */ /*0c70*/ DMUL R10, R8.reuse, c[0x2][0x0] ; /* 0x00800000080a7a28 */ /* 0x049e220000000000 */ /*0c80*/ BSSY B2, 0xd90 ; /* 0x0000010000027945 */ /* 0x000fe60003800000 */ /*0c90*/ DSETP.GE.AND P0, PT, |R8|, 2.14748364800000000000e+09, PT ; /* 0x41e000000800742a */ /* 0x000fe40003f06200 */ /*0ca0*/ F2I.F64 R0, R10 ; /* 0x0000000a00007311 */ /* 0x001e300000301100 */ /*0cb0*/ I2F.F64 R12, R0 ; /* 0x00000000000c7312 */ /* 0x001e220000201c00 */ /*0cc0*/ STL [R1], R0 ; /* 0x0000000001007387 */ /* 0x0007e20000100800 */ /*0cd0*/ DFMA R6, -R12, c[0x2][0x8], R8 ; /* 0x008002000c067a2b */ /* 0x001e0c0000000108 */ /*0ce0*/ DFMA R6, -R12, c[0x2][0x10], R6 ; /* 0x008004000c067a2b */ /* 0x001e0c0000000106 */ /*0cf0*/ DFMA R12, -R12, c[0x2][0x18], R6 ; /* 0x008006000c0c7a2b */ /* 0x0016220000000106 */ /*0d00*/ @!P0 BRA 0xd80 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*0d10*/ BSSY B3, 0xd70 ; /* 0x0000005000037945 */ /* 0x000fe20003800000 */ /*0d20*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x001fe200078e0008 */ /*0d30*/ MOV R2, 0xd60 ; /* 0x00000d6000027802 */ /* 0x000fe20000000f00 */ /*0d40*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0009 */ /*0d50*/ CALL.REL.NOINC 0x30d0 ; /* 0x0000237000007944 */ /* 0x02efea0003c00000 */ /*0d60*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*0d70*/ LDL R0, [R1] ; /* 0x0000000001007983 */ /* 0x0001640000100800 */ /*0d80*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0d90*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x028fe20007ffe0ff */ /*0da0*/ BRA 0xdd0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*0db0*/ DMUL R12, RZ, R8 ; /* 0x00000008ff0c7228 */ /* 0x0087220000000000 */ /*0dc0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff007424 */ /* 0x000fca00078e00ff */ /*0dd0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0de0*/ IMAD.SHL.U32 R2, R0, 0x8, RZ ; /* 0x0000000800027824 */ /* 0x000fe400078e00ff */ /*0df0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x8 ; /* 0x00000008ff0b7424 */ /* 0x001fc600078e00ff */ /*0e00*/ LOP3.LUT R2, R2, 0x8, RZ, 0xc0, !PT ; /* 0x0000000802027812 */ /* 0x000fca00078ec0ff */ /*0e10*/ IMAD.WIDE R10, R2, R11, c[0x4][0x0] ; /* 0x01000000020a7625 */ /* 0x000fca00078e020b */ /*0e20*/ LDG.E.64.CONSTANT R8, [R10.64+0x8] ; /* 0x000008080a087981 */ /* 0x0080e8000c1e9b00 */ /*0e30*/ LDG.E.64.CONSTANT R6, [R10.64+0x10] ; /* 0x000010080a067981 */ /* 0x010128000c1e9b00 */ /*0e40*/ LDG.E.64.CONSTANT R40, [R10.64+0x18] ; /* 0x000018080a287981 */ /* 0x0040a8000c1e9b00 */ /*0e50*/ LDG.E.64.CONSTANT R38, [R10.64+0x20] ; /* 0x000020080a267981 */ /* 0x0000a8000c1e9b00 */ /*0e60*/ LDG.E.64.CONSTANT R34, [R10.64+0x28] ; /* 0x000028080a227981 */ /* 0x0000a2000c1e9b00 */ /*0e70*/ R2P PR, R0, 0x3 ; /* 0x0000000300007804 */ /* 0x000fe20000000000 */ /*0e80*/ IMAD.MOV.U32 R44, RZ, RZ, 0x79785eba ; /* 0x79785ebaff2c7424 */ /* 0x000fc400078e00ff */ /*0e90*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3de5db65 ; /* 0x3de5db65ff007424 */ /* 0x000fe200078e00ff */ /*0ea0*/ DMUL R42, R12, R12 ; /* 0x0000000c0c2a7228 */ /* 0x000ee20000000000 */ /*0eb0*/ LDG.E.64.CONSTANT R10, [R10.64+0x30] ; /* 0x000030080a0a7981 */ /* 0x001ea2000c1e9b00 */ /*0ec0*/ FSEL R44, -R44, 4.2945490664224492434e-19, !P0 ; /* 0x20fd81642c2c7808 */ /* 0x000fe40004000100 */ /*0ed0*/ FSEL R45, R0, -0.082518599927425384521, !P0 ; /* 0xbda8ff83002d7808 */ /* 0x000fcc0004000000 */ /*0ee0*/ DFMA R44, R42, R44, R8 ; /* 0x0000002c2a2c722b */ /* 0x0081240000000008 */ /*0ef0*/ LDG.E.64 R8, [R26.64+-0x8] ; /* 0xfffff8081a087981 */ /* 0x001ee2000c1e1b00 */ /*0f00*/ BSSY B1, 0x1180 ; /* 0x0000027000017945 */ /* 0x000fe20003800000 */ /*0f10*/ DMUL R16, R16, c[0x0][0x1a8] ; /* 0x00006a0010107a28 */ /* 0x020e080000000000 */ /*0f20*/ DFMA R6, R42, R44, R6 ; /* 0x0000002c2a06722b */ /* 0x010e880000000006 */ /*0f30*/ DMUL R16, R22, R16 ; /* 0x0000001016107228 */ /* 0x001e080000000000 */ /*0f40*/ DFMA R6, R42, R6, R40 ; /* 0x000000062a06722b */ /* 0x004e880000000028 */ /*0f50*/ DMUL R16, R32, R16 ; /* 0x0000001020107228 */ /* 0x001fc80000000000 */ /*0f60*/ DFMA R6, R42, R6, R38 ; /* 0x000000062a06722b */ /* 0x004e0c0000000026 */ /*0f70*/ DFMA R6, R42, R6, R34 ; /* 0x000000062a06722b */ /* 0x001e0c0000000022 */ /*0f80*/ DFMA R6, R42, R6, R10 ; /* 0x000000062a06722b */ /* 0x001e0c000000000a */ /*0f90*/ DFMA R12, R6, R12, R12 ; /* 0x0000000c060c722b */ /* 0x001fc8000000000c */ /*0fa0*/ @P0 DFMA R12, R42, R6, 1 ; /* 0x3ff000002a0c042b */ /* 0x000e0c0000000006 */ /*0fb0*/ @P1 DFMA R12, R12, -1, RZ ; /* 0xbff000000c0c182b */ /* 0x001e0c00000000ff */ /*0fc0*/ DMUL R16, R16, R12 ; /* 0x0000000c10107228 */ /* 0x0010a20000000000 */ /*0fd0*/ LOP3.LUT R0, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09007812 */ /* 0x008fe400078ec0ff */ /*0fe0*/ ISETP.EQ.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f22270 */ /*0ff0*/ ISETP.NE.AND P0, PT, R0, 0x7ff00000, PT ; /* 0x7ff000000000780c */ /* 0x000fda0003f05270 */ /*1000*/ @!P0 BRA P1, 0x1150 ; /* 0x0000014000008947 */ /* 0x000fea0000800000 */ /*1010*/ DMUL R10, R8.reuse, c[0x2][0x0] ; /* 0x00800000080a7a28 */ /* 0x045e220000000000 */ /*1020*/ BSSY B2, 0x1130 ; /* 0x0000010000027945 */ /* 0x000fe60003800000 */ /*1030*/ DSETP.GE.AND P0, PT, |R8|, 2.14748364800000000000e+09, PT ; /* 0x41e000000800742a */ /* 0x000fe40003f06200 */ /*1040*/ F2I.F64 R0, R10 ; /* 0x0000000a00007311 */ /* 0x001e300000301100 */ /*1050*/ I2F.F64 R12, R0 ; /* 0x00000000000c7312 */ /* 0x001e220000201c00 */ /*1060*/ STL [R1], R0 ; /* 0x0000000001007387 */ /* 0x0005e20000100800 */ /*1070*/ DFMA R6, -R12, c[0x2][0x8], R8 ; /* 0x008002000c067a2b */ /* 0x001e0c0000000108 */ /*1080*/ DFMA R6, -R12, c[0x2][0x10], R6 ; /* 0x008004000c067a2b */ /* 0x001e0c0000000106 */ /*1090*/ DFMA R12, -R12, c[0x2][0x18], R6 ; /* 0x008006000c0c7a2b */ /* 0x0014220000000106 */ /*10a0*/ @!P0 BRA 0x1120 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*10b0*/ BSSY B3, 0x1110 ; /* 0x0000005000037945 */ /* 0x000fe20003800000 */ /*10c0*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x001fe200078e0008 */ /*10d0*/ MOV R2, 0x1100 ; /* 0x0000110000027802 */ /* 0x000fe20000000f00 */ /*10e0*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0009 */ /*10f0*/ CALL.REL.NOINC 0x30d0 ; /* 0x00001fd000007944 */ /* 0x006fea0003c00000 */ /*1100*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*1110*/ LDL R0, [R1] ; /* 0x0000000001007983 */ /* 0x0001640000100800 */ /*1120*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1130*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x024fe20007ffe0ff */ /*1140*/ BRA 0x1170 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*1150*/ DMUL R12, RZ, R8 ; /* 0x00000008ff0c7228 */ /* 0x0050a20000000000 */ /*1160*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff007424 */ /* 0x000fca00078e00ff */ /*1170*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1180*/ IMAD.SHL.U32 R2, R0, 0x8, RZ ; /* 0x0000000800027824 */ /* 0x000fe400078e00ff */ /*1190*/ IMAD.MOV.U32 R11, RZ, RZ, 0x8 ; /* 0x00000008ff0b7424 */ /* 0x000fc600078e00ff */ /*11a0*/ LOP3.LUT R2, R2, 0x8, RZ, 0xc0, !PT ; /* 0x0000000802027812 */ /* 0x000fca00078ec0ff */ /*11b0*/ IMAD.WIDE R10, R2, R11, c[0x4][0x0] ; /* 0x01000000020a7625 */ /* 0x000fca00078e020b */ /*11c0*/ LDG.E.64.CONSTANT R38, [R10.64+0x8] ; /* 0x000008080a267981 */ /* 0x000728000c1e9b00 */ /*11d0*/ LDG.E.64.CONSTANT R40, [R10.64+0x10] ; /* 0x000010080a287981 */ /* 0x000768000c1e9b00 */ /*11e0*/ LDG.E.64.CONSTANT R42, [R10.64+0x18] ; /* 0x000018080a2a7981 */ /* 0x0046a8000c1e9b00 */ /*11f0*/ LDG.E.64.CONSTANT R8, [R10.64+0x20] ; /* 0x000020080a087981 */ /* 0x0016a2000c1e9b00 */ /*1200*/ R2P PR, R0, 0x3 ; /* 0x0000000300007804 */ /* 0x000fe20000000000 */ /*1210*/ IMAD.MOV.U32 R44, RZ, RZ, 0x79785eba ; /* 0x79785ebaff2c7424 */ /* 0x000fc400078e00ff */ /*1220*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3de5db65 ; /* 0x3de5db65ff007424 */ /* 0x000fe200078e00ff */ /*1230*/ DMUL R34, R12, R12 ; /* 0x0000000c0c227228 */ /* 0x000f220000000000 */ /*1240*/ LDG.E.64.CONSTANT R6, [R10.64+0x28] ; /* 0x000028080a067981 */ /* 0x0006a2000c1e9b00 */ /*1250*/ FSEL R44, -R44, 4.2945490664224492434e-19, !P0 ; /* 0x20fd81642c2c7808 */ /* 0x000fe40004000100 */ /*1260*/ FSEL R45, R0, -0.082518599927425384521, !P0 ; /* 0xbda8ff83002d7808 */ /* 0x000fe20004000000 */ /*1270*/ LDG.E.64.CONSTANT R10, [R10.64+0x30] ; /* 0x000030080a0a7981 */ /* 0x008eea000c1e9b00 */ /*1280*/ DFMA R38, R34, R44, R38 ; /* 0x0000002c2226722b */ /* 0x010f4c0000000026 */ /*1290*/ DFMA R38, R34.reuse, R38, R40 ; /* 0x000000262226722b */ /* 0x0600a40000000028 */ /*12a0*/ LDG.E.64 R40, [R28.64+0x10] ; /* 0x000010081c287981 */ /* 0x001f28000c1e1b00 */ /*12b0*/ DFMA R42, R34, R38, R42 ; /* 0x00000026222a722b */ /* 0x004088000000002a */ /*12c0*/ LDG.E.64 R38, [R24.64] ; /* 0x0000000818267981 */ /* 0x001f64000c1e1b00 */ /*12d0*/ DFMA R44, R34.reuse, R42, R8 ; /* 0x0000002a222c722b */ /* 0x0440a40000000008 */ /*12e0*/ LDG.E.64 R8, [R26.64] ; /* 0x000000081a087981 */ /* 0x001f68000c1e1b00 */ /*12f0*/ LDG.E.64 R42, [R28.64] ; /* 0x000000081c2a7981 */ /* 0x000f62000c1e1b00 */ /*1300*/ DFMA R6, R34, R44, R6 ; /* 0x0000002c2206722b */ /* 0x004ecc0000000006 */ /*1310*/ DFMA R6, R34, R6, R10 ; /* 0x000000062206722b */ /* 0x008e0c000000000a */ /*1320*/ DFMA R12, R6, R12, R12 ; /* 0x0000000c060c722b */ /* 0x001fc8000000000c */ /*1330*/ @P0 DFMA R12, R34, R6, 1 ; /* 0x3ff00000220c042b */ /* 0x000e0c0000000006 */ /*1340*/ @P1 DFMA R12, R12, -1, RZ ; /* 0xbff000000c0c182b */ /* 0x001e0c00000000ff */ /*1350*/ DFMA R16, -R16, R12, R14 ; /* 0x0000000c1010722b */ /* 0x001fe2000000010e */ /*1360*/ BSSY B1, 0x1570 ; /* 0x0000020000017945 */ /* 0x000fe60003800000 */ /*1370*/ DMUL R14, R18, R40 ; /* 0x00000028120e7228 */ /* 0x010fe20000000000 */ /*1380*/ LOP3.LUT R0, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09007812 */ /* 0x020fc600078ec0ff */ /*1390*/ DMUL R38, R38, c[0x0][0x1a8] ; /* 0x00006a0026267a28 */ /* 0x000e220000000000 */ /*13a0*/ ISETP.EQ.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f22270 */ /*13b0*/ ISETP.NE.AND P0, PT, R0, 0x7ff00000, PT ; /* 0x7ff000000000780c */ /* 0x000fc60003f05270 */ /*13c0*/ DMUL R38, R22, R38 ; /* 0x0000002616267228 */ /* 0x001e080000000000 */ /*13d0*/ DFMA R14, R32, R42, -R14 ; /* 0x0000002a200e722b */ /* 0x0004c8000000080e */ /*13e0*/ DMUL R32, R32, R38 ; /* 0x0000002620207228 */ /* 0x0014240000000000 */ /*13f0*/ @!P0 BRA P1, 0x1540 ; /* 0x0000014000008947 */ /* 0x000fea0000800000 */ /*1400*/ DMUL R10, R8.reuse, c[0x2][0x0] ; /* 0x00800000080a7a28 */ /* 0x04de220000000000 */ /*1410*/ BSSY B2, 0x1520 ; /* 0x0000010000027945 */ /* 0x000fe60003800000 */ /*1420*/ DSETP.GE.AND P0, PT, |R8|, 2.14748364800000000000e+09, PT ; /* 0x41e000000800742a */ /* 0x000fe40003f06200 */ /*1430*/ F2I.F64 R0, R10 ; /* 0x0000000a00007311 */ /* 0x001e300000301100 */ /*1440*/ I2F.F64 R12, R0 ; /* 0x00000000000c7312 */ /* 0x001e220000201c00 */ /*1450*/ STL [R1], R0 ; /* 0x0000000001007387 */ /* 0x0005e20000100800 */ /*1460*/ DFMA R6, -R12, c[0x2][0x8], R8 ; /* 0x008002000c067a2b */ /* 0x001e0c0000000108 */ /*1470*/ DFMA R6, -R12, c[0x2][0x10], R6 ; /* 0x008004000c067a2b */ /* 0x001e0c0000000106 */ /*1480*/ DFMA R12, -R12, c[0x2][0x18], R6 ; /* 0x008006000c0c7a2b */ /* 0x0014220000000106 */ /*1490*/ @!P0 BRA 0x1510 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*14a0*/ BSSY B3, 0x1500 ; /* 0x0000005000037945 */ /* 0x000fe20003800000 */ /*14b0*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x001fe200078e0008 */ /*14c0*/ MOV R2, 0x14f0 ; /* 0x000014f000027802 */ /* 0x000fe20000000f00 */ /*14d0*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0009 */ /*14e0*/ CALL.REL.NOINC 0x30d0 ; /* 0x00001be000007944 */ /* 0x006fea0003c00000 */ /*14f0*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*1500*/ LDL R0, [R1] ; /* 0x0000000001007983 */ /* 0x0001640000100800 */ /*1510*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1520*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x024fe20007ffe0ff */ /*1530*/ BRA 0x1560 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*1540*/ DMUL R12, RZ, R8 ; /* 0x00000008ff0c7228 */ /* 0x00d0a20000000000 */ /*1550*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff007424 */ /* 0x000fca00078e00ff */ /*1560*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1570*/ IMAD.SHL.U32 R2, R0, 0x8, RZ ; /* 0x0000000800027824 */ /* 0x000fe400078e00ff */ /*1580*/ IMAD.MOV.U32 R11, RZ, RZ, 0x8 ; /* 0x00000008ff0b7424 */ /* 0x000fc600078e00ff */ /*1590*/ LOP3.LUT R2, R2, 0x8, RZ, 0xc0, !PT ; /* 0x0000000802027812 */ /* 0x000fca00078ec0ff */ /*15a0*/ IMAD.WIDE R10, R2, R11, c[0x4][0x0] ; /* 0x01000000020a7625 */ /* 0x000fca00078e020b */ /*15b0*/ LDG.E.64.CONSTANT R8, [R10.64+0x8] ; /* 0x000008080a087981 */ /* 0x0010e8000c1e9b00 */ /*15c0*/ LDG.E.64.CONSTANT R6, [R10.64+0x10] ; /* 0x000010080a067981 */ /* 0x000128000c1e9b00 */ /*15d0*/ LDG.E.64.CONSTANT R40, [R10.64+0x18] ; /* 0x000018080a287981 */ /* 0x000168000c1e9b00 */ /*15e0*/ LDG.E.64.CONSTANT R38, [R10.64+0x20] ; /* 0x000020080a267981 */ /* 0x0040a8000c1e9b00 */ /*15f0*/ LDG.E.64.CONSTANT R34, [R10.64+0x28] ; /* 0x000028080a227981 */ /* 0x0000a2000c1e9b00 */ /*1600*/ R2P PR, R0, 0x3 ; /* 0x0000000300007804 */ /* 0x000fe20000000000 */ /*1610*/ IMAD.MOV.U32 R44, RZ, RZ, 0x79785eba ; /* 0x79785ebaff2c7424 */ /* 0x000fc400078e00ff */ /*1620*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3de5db65 ; /* 0x3de5db65ff007424 */ /* 0x000fe200078e00ff */ /*1630*/ DMUL R42, R12, R12 ; /* 0x0000000c0c2a7228 */ /* 0x000ee20000000000 */ /*1640*/ LDG.E.64.CONSTANT R10, [R10.64+0x30] ; /* 0x000030080a0a7981 */ /* 0x001ea2000c1e9b00 */ /*1650*/ FSEL R44, -R44, 4.2945490664224492434e-19, !P0 ; /* 0x20fd81642c2c7808 */ /* 0x000fe40004000100 */ /*1660*/ FSEL R45, R0, -0.082518599927425384521, !P0 ; /* 0xbda8ff83002d7808 */ /* 0x000fcc0004000000 */ /*1670*/ DFMA R44, R42.reuse, R44, R8 ; /* 0x0000002c2a2c722b */ /* 0x0481240000000008 */ /*1680*/ LDG.E.64 R8, [R26.64+-0x8] ; /* 0xfffff8081a087981 */ /* 0x001ee2000c1e1b00 */ /*1690*/ BSSY B1, 0x18b0 ; /* 0x0000021000017945 */ /* 0x000fe60003800000 */ /*16a0*/ DFMA R6, R42, R44, R6 ; /* 0x0000002c2a06722b */ /* 0x010f4c0000000006 */ /*16b0*/ DFMA R6, R42, R6, R40 ; /* 0x000000062a06722b */ /* 0x020e8c0000000028 */ /*16c0*/ DFMA R6, R42, R6, R38 ; /* 0x000000062a06722b */ /* 0x004e0c0000000026 */ /*16d0*/ DFMA R6, R42, R6, R34 ; /* 0x000000062a06722b */ /* 0x001e0c0000000022 */ /*16e0*/ DFMA R6, R42, R6, R10 ; /* 0x000000062a06722b */ /* 0x001e0c000000000a */ /*16f0*/ DFMA R12, R6, R12, R12 ; /* 0x0000000c060c722b */ /* 0x001fc8000000000c */ /*1700*/ @P0 DFMA R12, R42, R6, 1 ; /* 0x3ff000002a0c042b */ /* 0x000e0c0000000006 */ /*1710*/ @P1 DFMA R12, R12, -1, RZ ; /* 0xbff000000c0c182b */ /* 0x001e0c00000000ff */ /*1720*/ DMUL R32, R32, R12 ; /* 0x0000000c20207228 */ /* 0x0010a20000000000 */ /*1730*/ LOP3.LUT R0, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09007812 */ /* 0x008fe400078ec0ff */ /*1740*/ ISETP.EQ.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f22270 */ /*1750*/ ISETP.NE.AND P0, PT, R0, 0x7ff00000, PT ; /* 0x7ff000000000780c */ /* 0x000fda0003f05270 */ /*1760*/ @!P0 BRA P1, 0x1880 ; /* 0x0000011000008947 */ /* 0x000fea0000800000 */ /*1770*/ DMUL R10, R8, c[0x2][0x0] ; /* 0x00800000080a7a28 */ /* 0x005e080000000000 */ /*1780*/ DSETP.GE.AND P0, PT, |R8|, 2.14748364800000000000e+09, PT ; /* 0x41e000000800742a */ /* 0x000fe40003f06200 */ /*1790*/ F2I.F64 R0, R10 ; /* 0x0000000a00007311 */ /* 0x001e300000301100 */ /*17a0*/ I2F.F64 R12, R0 ; /* 0x00000000000c7312 */ /* 0x001e220000201c00 */ /*17b0*/ STL [R1], R0 ; /* 0x0000000001007387 */ /* 0x0005e20000100800 */ /*17c0*/ DFMA R6, -R12, c[0x2][0x8], R8 ; /* 0x008002000c067a2b */ /* 0x001e0c0000000108 */ /*17d0*/ DFMA R6, -R12, c[0x2][0x10], R6 ; /* 0x008004000c067a2b */ /* 0x001e0c0000000106 */ /*17e0*/ DFMA R12, -R12, c[0x2][0x18], R6 ; /* 0x008006000c0c7a2b */ /* 0x0014220000000106 */ /*17f0*/ @!P0 BRA 0x18a0 ; /* 0x000000a000008947 */ /* 0x000fea0003800000 */ /*1800*/ BSSY B2, 0x1860 ; /* 0x0000005000027945 */ /* 0x000fe20003800000 */ /*1810*/ IMAD.MOV.U32 R12, RZ, RZ, R8 ; /* 0x000000ffff0c7224 */ /* 0x001fe200078e0008 */ /*1820*/ MOV R2, 0x1850 ; /* 0x0000185000027802 */ /* 0x000fe20000000f00 */ /*1830*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0009 */ /*1840*/ CALL.REL.NOINC 0x30d0 ; /* 0x0000188000007944 */ /* 0x006fea0003c00000 */ /*1850*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1860*/ LDL R0, [R1] ; /* 0x0000000001007983 */ /* 0x0001620000100800 */ /*1870*/ BRA 0x18a0 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*1880*/ DMUL R12, RZ, R8 ; /* 0x00000008ff0c7228 */ /* 0x0050a20000000000 */ /*1890*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fca00078e00ff */ /*18a0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*18b0*/ IMAD.SHL.U32 R2, R0.reuse, 0x8, RZ ; /* 0x0000000800027824 */ /* 0x060fe400078e00ff */ /*18c0*/ IMAD.MOV.U32 R35, RZ, RZ, 0x8 ; /* 0x00000008ff237424 */ /* 0x000fe200078e00ff */ /*18d0*/ R2P PR, R0, 0x3 ; /* 0x0000000300007804 */ /* 0x000fe20000000000 */ /*18e0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x79785eba ; /* 0x79785ebaff087424 */ /* 0x001fe200078e00ff */ /*18f0*/ LOP3.LUT R2, R2, 0x8, RZ, 0xc0, !PT ; /* 0x0000000802027812 */ /* 0x000fe200078ec0ff */ /*1900*/ DMUL R10, R12, R12 ; /* 0x0000000c0c0a7228 */ /* 0x004e220000000000 */ /*1910*/ LDG.E.64 R24, [R24.64] ; /* 0x0000000818187981 */ /* 0x000ea6000c1e1b00 */ /*1920*/ IMAD.WIDE R34, R2, R35, c[0x4][0x0] ; /* 0x0100000002227625 */ /* 0x000fca00078e0223 */ /*1930*/ LDG.E.64.CONSTANT R6, [R34.64+0x8] ; /* 0x0000080822067981 */ /* 0x000628000c1e9b00 */ /*1940*/ LDG.E.64.CONSTANT R44, [R34.64+0x10] ; /* 0x00001008222c7981 */ /* 0x000728000c1e9b00 */ /*1950*/ LDG.E.64.CONSTANT R42, [R34.64+0x18] ; /* 0x00001808222a7981 */ /* 0x0006a2000c1e9b00 */ /*1960*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3de5db65 ; /* 0x3de5db65ff007424 */ /* 0x000fc600078e00ff */ /*1970*/ LDG.E.64.CONSTANT R40, [R34.64+0x20] ; /* 0x0000200822287981 */ /* 0x0006a2000c1e9b00 */ /*1980*/ FSEL R8, -R8, 4.2945490664224492434e-19, !P0 ; /* 0x20fd816408087808 */ /* 0x000fe40004000100 */ /*1990*/ FSEL R9, R0, -0.082518599927425384521, !P0 ; /* 0xbda8ff8300097808 */ /* 0x000fe20004000000 */ /*19a0*/ LDG.E.64.CONSTANT R38, [R34.64+0x28] ; /* 0x0000280822267981 */ /* 0x0006a8000c1e9b00 */ /*19b0*/ LDG.E.64.CONSTANT R34, [R34.64+0x30] ; /* 0x0000300822227981 */ /* 0x008ea2000c1e9b00 */ /*19c0*/ DFMA R6, R10, R8, R6 ; /* 0x000000080a06722b */ /* 0x0011060000000006 */ /*19d0*/ LDG.E.64 R8, [R28.64] ; /* 0x000000081c087981 */ /* 0x0010e6000c1e1b00 */ /*19e0*/ DFMA R44, R10, R6, R44 ; /* 0x000000060a2c722b */ /* 0x010888000000002c */ /*19f0*/ LDG.E.64 R6, [R26.64] ; /* 0x000000081a067981 */ /* 0x010f28000c1e1b00 */ /*1a00*/ LDG.E.64 R28, [R28.64+0x8] ; /* 0x000008081c1c7981 */ /* 0x001ee2000c1e1b00 */ /*1a10*/ DFMA R42, R10, R44, R42 ; /* 0x0000002c0a2a722b */ /* 0x004e0c000000002a */ /*1a20*/ DFMA R40, R10, R42, R40 ; /* 0x0000002a0a28722b */ /* 0x001e0c0000000028 */ /*1a30*/ DFMA R38, R10, R40, R38 ; /* 0x000000280a26722b */ /* 0x001e0c0000000026 */ /*1a40*/ DFMA R34, R10, R38, R34 ; /* 0x000000260a22722b */ /* 0x001e0c0000000022 */ /*1a50*/ DFMA R12, R34, R12, R12 ; /* 0x0000000c220c722b */ /* 0x001fc8000000000c */ /*1a60*/ @P0 DFMA R12, R10, R34, 1 ; /* 0x3ff000000a0c042b */ /* 0x000e080000000022 */ /*1a70*/ DMUL R24, R24, c[0x0][0x1a8] ; /* 0x00006a0018187a28 */ /* 0x000e880000000000 */ /*1a80*/ @P1 DFMA R12, R12, -1, RZ ; /* 0xbff000000c0c182b */ /* 0x001e0800000000ff */ /*1a90*/ DMUL R24, R22, R24 ; /* 0x0000001816187228 */ /* 0x004ea20000000000 */ /*1aa0*/ BSSY B1, 0x1ca0 ; /* 0x000001f000017945 */ /* 0x000fe60003800000 */ /*1ab0*/ DFMA R14, -R32, R12, R14 ; /* 0x0000000c200e722b */ /* 0x001fc8000000010e */ /*1ac0*/ DMUL R22, R22, R24 ; /* 0x0000001816167228 */ /* 0x004fe20000000000 */ /*1ad0*/ LOP3.LUT R0, R7, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff07007812 */ /* 0x010fe400078ec0ff */ /*1ae0*/ ISETP.EQ.AND P1, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f22270 */ /*1af0*/ ISETP.NE.AND P0, PT, R0, 0x7ff00000, PT ; /* 0x7ff000000000780c */ /* 0x000fe20003f05270 */ /*1b00*/ DMUL R8, R20, R8 ; /* 0x0000000814087228 */ /* 0x008e0c0000000000 */ /*1b10*/ DFMA R18, R18, R28, -R8 ; /* 0x0000001c1212722b */ /* 0x00108c0000000808 */ /*1b20*/ @!P0 BRA P1, 0x1c70 ; /* 0x0000014000008947 */ /* 0x000fea0000800000 */ /*1b30*/ DMUL R10, R6.reuse, c[0x2][0x0] ; /* 0x00800000060a7a28 */ /* 0x045e220000000000 */ /*1b40*/ BSSY B2, 0x1c50 ; /* 0x0000010000027945 */ /* 0x000fe60003800000 */ /*1b50*/ DSETP.GE.AND P0, PT, |R6|, 2.14748364800000000000e+09, PT ; /* 0x41e000000600742a */ /* 0x000fe40003f06200 */ /*1b60*/ F2I.F64 R0, R10 ; /* 0x0000000a00007311 */ /* 0x001e300000301100 */ /*1b70*/ I2F.F64 R12, R0 ; /* 0x00000000000c7312 */ /* 0x001e220000201c00 */ /*1b80*/ STL [R1], R0 ; /* 0x0000000001007387 */ /* 0x0005e20000100800 */ /*1b90*/ DFMA R8, -R12, c[0x2][0x8], R6 ; /* 0x008002000c087a2b */ /* 0x001e0c0000000106 */ /*1ba0*/ DFMA R8, -R12, c[0x2][0x10], R8 ; /* 0x008004000c087a2b */ /* 0x001e0c0000000108 */ /*1bb0*/ DFMA R12, -R12, c[0x2][0x18], R8 ; /* 0x008006000c0c7a2b */ /* 0x0014220000000108 */ /*1bc0*/ @!P0 BRA 0x1c40 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*1bd0*/ BSSY B3, 0x1c30 ; /* 0x0000005000037945 */ /* 0x000fe20003800000 */ /*1be0*/ IMAD.MOV.U32 R12, RZ, RZ, R6 ; /* 0x000000ffff0c7224 */ /* 0x001fe200078e0006 */ /*1bf0*/ MOV R2, 0x1c20 ; /* 0x00001c2000027802 */ /* 0x000fe20000000f00 */ /*1c00*/ IMAD.MOV.U32 R5, RZ, RZ, R7 ; /* 0x000000ffff057224 */ /* 0x000fe400078e0007 */ /*1c10*/ CALL.REL.NOINC 0x30d0 ; /* 0x000014b000007944 */ /* 0x006fea0003c00000 */ /*1c20*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*1c30*/ LDL R0, [R1] ; /* 0x0000000001007983 */ /* 0x0001640000100800 */ /*1c40*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1c50*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x024fe20007ffe0ff */ /*1c60*/ BRA 0x1c90 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*1c70*/ DMUL R12, RZ, R6 ; /* 0x00000006ff0c7228 */ /* 0x0050a20000000000 */ /*1c80*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff007424 */ /* 0x000fca00078e00ff */ /*1c90*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1ca0*/ IMAD.SHL.U32 R2, R0, 0x8, RZ ; /* 0x0000000800027824 */ /* 0x000fe200078e00ff */ /*1cb0*/ LDG.E.64 R26, [R26.64] ; /* 0x000000081a1a7981 */ /* 0x000ee2000c1e1b00 */ /*1cc0*/ IMAD.MOV.U32 R35, RZ, RZ, 0x8 ; /* 0x00000008ff237424 */ /* 0x000fc600078e00ff */ /*1cd0*/ LOP3.LUT R2, R2, 0x8, RZ, 0xc0, !PT ; /* 0x0000000802027812 */ /* 0x000fca00078ec0ff */ /*1ce0*/ IMAD.WIDE R34, R2, R35, c[0x4][0x0] ; /* 0x0100000002227625 */ /* 0x000fca00078e0223 */ /*1cf0*/ LDG.E.64.CONSTANT R32, [R34.64+0x8] ; /* 0x0000080822207981 */ /* 0x000f28000c1e9b00 */ /*1d00*/ LDG.E.64.CONSTANT R28, [R34.64+0x10] ; /* 0x00001008221c7981 */ /* 0x000f68000c1e9b00 */ /*1d10*/ LDG.E.64.CONSTANT R24, [R34.64+0x18] ; /* 0x0000180822187981 */ /* 0x004ea8000c1e9b00 */ /*1d20*/ LDG.E.64.CONSTANT R20, [R34.64+0x20] ; /* 0x0000200822147981 */ /* 0x000ea8000c1e9b00 */ /*1d30*/ LDG.E.64.CONSTANT R6, [R34.64+0x28] ; /* 0x0000280822067981 */ /* 0x001ee8000c1e9b00 */ /*1d40*/ LDG.E.64.CONSTANT R8, [R34.64+0x30] ; /* 0x0000300822087981 */ /* 0x000ee2000c1e9b00 */ /*1d50*/ R2P PR, R0, 0x3 ; /* 0x0000000300007804 */ /* 0x000fe20000000000 */ /*1d60*/ IMAD.MOV.U32 R38, RZ, RZ, 0x79785eba ; /* 0x79785ebaff267424 */ /* 0x000fc400078e00ff */ /*1d70*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3de5db65 ; /* 0x3de5db65ff007424 */ /* 0x000fe200078e00ff */ /*1d80*/ DMUL R10, R12, R12 ; /* 0x0000000c0c0a7228 */ /* 0x000f240000000000 */ /*1d90*/ FSEL R38, -R38, 4.2945490664224492434e-19, !P0 ; /* 0x20fd816426267808 */ /* 0x000fe40004000100 */ /*1da0*/ FSEL R39, R0, -0.082518599927425384521, !P0 ; /* 0xbda8ff8300277808 */ /* 0x000fe20004000000 */ /*1db0*/ BSSY B1, 0x2010 ; /* 0x0000025000017945 */ /* 0x000fea0003800000 */ /*1dc0*/ DFMA R32, R10, R38, R32 ; /* 0x000000260a20722b */ /* 0x010f4c0000000020 */ /*1dd0*/ DFMA R28, R10, R32, R28 ; /* 0x000000200a1c722b */ /* 0x020e8c000000001c */ /*1de0*/ DFMA R24, R10, R28, R24 ; /* 0x0000001c0a18722b */ /* 0x004e0c0000000018 */ /*1df0*/ DFMA R20, R10, R24, R20 ; /* 0x000000180a14722b */ /* 0x001ecc0000000014 */ /*1e00*/ DFMA R6, R10, R20, R6 ; /* 0x000000140a06722b */ /* 0x008e0c0000000006 */ /*1e10*/ DFMA R6, R10, R6, R8 ; /* 0x000000060a06722b */ /* 0x001e220000000008 */ /*1e20*/ LOP3.LUT R0, R27, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff1b007812 */ /* 0x000fca00078ec0ff */ /*1e30*/ DFMA R12, R6, R12, R12 ; /* 0x0000000c060c722b */ /* 0x001fc8000000000c */ /*1e40*/ @P0 DFMA R12, R10, R6, 1 ; /* 0x3ff000000a0c042b */ /* 0x000e220000000006 */ /*1e50*/ ISETP.NE.AND P0, PT, R0, 0x7ff00000, PT ; /* 0x7ff000000000780c */ /* 0x000fca0003f05270 */ /*1e60*/ @P1 DFMA R12, R12, -1, RZ ; /* 0xbff000000c0c182b */ /* 0x001e2200000000ff */ /*1e70*/ ISETP.EQ.AND P1, PT, R26, RZ, PT ; /* 0x000000ff1a00720c */ /* 0x000fca0003f22270 */ /*1e80*/ DMUL R22, R22, R12 ; /* 0x0000000c16167228 */ /* 0x0010900000000000 */ /*1e90*/ @!P0 BRA P1, 0x1fe0 ; /* 0x0000014000008947 */ /* 0x000fea0000800000 */ /*1ea0*/ DMUL R8, R26.reuse, c[0x2][0x0] ; /* 0x008000001a087a28 */ /* 0x045e220000000000 */ /*1eb0*/ BSSY B2, 0x1fc0 ; /* 0x0000010000027945 */ /* 0x000fe60003800000 */ /*1ec0*/ DSETP.GE.AND P0, PT, |R26|, 2.14748364800000000000e+09, PT ; /* 0x41e000001a00742a */ /* 0x000fe40003f06200 */ /*1ed0*/ F2I.F64 R0, R8 ; /* 0x0000000800007311 */ /* 0x001e300000301100 */ /*1ee0*/ I2F.F64 R12, R0 ; /* 0x00000000000c7312 */ /* 0x001e220000201c00 */ /*1ef0*/ STL [R1], R0 ; /* 0x0000000001007387 */ /* 0x0005e20000100800 */ /*1f00*/ DFMA R6, -R12, c[0x2][0x8], R26 ; /* 0x008002000c067a2b */ /* 0x001e0c000000011a */ /*1f10*/ DFMA R6, -R12, c[0x2][0x10], R6 ; /* 0x008004000c067a2b */ /* 0x001e0c0000000106 */ /*1f20*/ DFMA R12, -R12, c[0x2][0x18], R6 ; /* 0x008006000c0c7a2b */ /* 0x0014220000000106 */ /*1f30*/ @!P0 BRA 0x1fb0 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*1f40*/ BSSY B3, 0x1fa0 ; /* 0x0000005000037945 */ /* 0x000fe20003800000 */ /*1f50*/ IMAD.MOV.U32 R12, RZ, RZ, R26 ; /* 0x000000ffff0c7224 */ /* 0x001fe200078e001a */ /*1f60*/ MOV R2, 0x1f90 ; /* 0x00001f9000027802 */ /* 0x000fe20000000f00 */ /*1f70*/ IMAD.MOV.U32 R5, RZ, RZ, R27 ; /* 0x000000ffff057224 */ /* 0x000fe400078e001b */ /*1f80*/ CALL.REL.NOINC 0x30d0 ; /* 0x0000114000007944 */ /* 0x006fea0003c00000 */ /*1f90*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*1fa0*/ LDL R0, [R1] ; /* 0x0000000001007983 */ /* 0x0001640000100800 */ /*1fb0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*1fc0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x024fe20007ffe0ff */ /*1fd0*/ BRA 0x2000 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*1fe0*/ DMUL R12, RZ, R26 ; /* 0x0000001aff0c7228 */ /* 0x0050a20000000000 */ /*1ff0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x1 ; /* 0x00000001ff007424 */ /* 0x000fca00078e00ff */ /*2000*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2010*/ IMAD.SHL.U32 R2, R0, 0x8, RZ ; /* 0x0000000800027824 */ /* 0x000fe400078e00ff */ /*2020*/ IMAD.MOV.U32 R25, RZ, RZ, 0x8 ; /* 0x00000008ff197424 */ /* 0x000fc600078e00ff */ /*2030*/ LOP3.LUT R2, R2, 0x8, RZ, 0xc0, !PT ; /* 0x0000000802027812 */ /* 0x000fca00078ec0ff */ /*2040*/ IMAD.WIDE R24, R2, R25, c[0x4][0x0] ; /* 0x0100000002187625 */ /* 0x000fca00078e0219 */ /*2050*/ LDG.E.64.CONSTANT R26, [R24.64+0x8] ; /* 0x00000808181a7981 */ /* 0x001ee8000c1e9b00 */ /*2060*/ LDG.E.64.CONSTANT R28, [R24.64+0x10] ; /* 0x00001008181c7981 */ /* 0x000f28000c1e9b00 */ /*2070*/ LDG.E.64.CONSTANT R32, [R24.64+0x18] ; /* 0x0000180818207981 */ /* 0x000f68000c1e9b00 */ /*2080*/ LDG.E.64.CONSTANT R20, [R24.64+0x20] ; /* 0x0000200818147981 */ /* 0x004ea8000c1e9b00 */ /*2090*/ LDG.E.64.CONSTANT R10, [R24.64+0x28] ; /* 0x00002808180a7981 */ /* 0x000ea8000c1e9b00 */ /*20a0*/ LDG.E.64.CONSTANT R8, [R24.64+0x30] ; /* 0x0000300818087981 */ /* 0x000ea2000c1e9b00 */ /*20b0*/ R2P PR, R0, 0x3 ; /* 0x0000000300007804 */ /* 0x000fe20000000000 */ /*20c0*/ IMAD.MOV.U32 R34, RZ, RZ, 0x79785eba ; /* 0x79785ebaff227424 */ /* 0x000fe200078e00ff */ /*20d0*/ DMUL R6, R12, R12 ; /* 0x0000000c0c067228 */ /* 0x000ee20000000000 */ /*20e0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3de5db65 ; /* 0x3de5db65ff007424 */ /* 0x000fc600078e00ff */ /*20f0*/ FSEL R34, -R34, 4.2945490664224492434e-19, !P0 ; /* 0x20fd816422227808 */ /* 0x000fe20004000100 */ /*2100*/ DMUL R16, R16, R30.reuse ; /* 0x0000001e10107228 */ /* 0x082fe20000000000 */ /*2110*/ FSEL R35, R0, -0.082518599927425384521, !P0 ; /* 0xbda8ff8300237808 */ /* 0x000fe40004000000 */ /*2120*/ SHF.L.U64.HI R0, R3, 0x3, R4 ; /* 0x0000000303007819 */ /* 0x000fe20000010204 */ /*2130*/ DMUL R14, R14, R30 ; /* 0x0000001e0e0e7228 */ /* 0x000fc80000000000 */ /*2140*/ DFMA R26, R6, R34, R26 ; /* 0x00000022061a722b */ /* 0x008f0c000000001a */ /*2150*/ DFMA R26, R6, R26, R28 ; /* 0x0000001a061a722b */ /* 0x010f4c000000001c */ /*2160*/ DFMA R26, R6, R26, R32 ; /* 0x0000001a061a722b */ /* 0x020e8c0000000020 */ /*2170*/ DFMA R20, R6, R26, R20 ; /* 0x0000001a0614722b */ /* 0x004e0c0000000014 */ /*2180*/ DFMA R10, R6, R20, R10 ; /* 0x00000014060a722b */ /* 0x001e0c000000000a */ /*2190*/ DFMA R8, R6, R10, R8 ; /* 0x0000000a0608722b */ /* 0x001e0c0000000008 */ /*21a0*/ DFMA R12, R8, R12, R12 ; /* 0x0000000c080c722b */ /* 0x001fc8000000000c */ /*21b0*/ @P0 DFMA R12, R6, R8, 1 ; /* 0x3ff00000060c042b */ /* 0x0000640000000008 */ /*21c0*/ IMAD.SHL.U32 R6, R3, 0x8, RZ ; /* 0x0000000803067824 */ /* 0x001fc800078e00ff */ /*21d0*/ @P1 DFMA R12, R12, -1, RZ ; /* 0xbff000000c0c182b */ /* 0x002e2200000000ff */ /*21e0*/ IADD3 R2, P0, R6.reuse, c[0x0][0x160], RZ ; /* 0x0000580006027a10 */ /* 0x040fe40007f1e0ff */ /*21f0*/ IADD3 R4, P1, R6.reuse, c[0x0][0x168], RZ ; /* 0x00005a0006047a10 */ /* 0x040fe40007f3e0ff */ /*2200*/ IADD3 R6, P2, R6, c[0x0][0x170], RZ ; /* 0x00005c0006067a10 */ /* 0x000fe20007f5e0ff */ /*2210*/ DFMA R18, R22, R12, R18 ; /* 0x0000000c1612722b */ /* 0x001e220000000012 */ /*2220*/ IADD3.X R3, R0.reuse, c[0x0][0x164], RZ, P0, !PT ; /* 0x0000590000037a10 */ /* 0x040fe400007fe4ff */ /*2230*/ IADD3.X R5, R0.reuse, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b0000057a10 */ /* 0x040fe40000ffe4ff */ /*2240*/ IADD3.X R7, R0, c[0x0][0x174], RZ, P2, !PT ; /* 0x00005d0000077a10 */ /* 0x000fe200017fe4ff */ /*2250*/ DMUL R18, R18, R30 ; /* 0x0000001e12127228 */ /* 0x001e220000000000 */ /*2260*/ STG.E.64 [R2.64], R16 ; /* 0x0000001002007986 */ /* 0x000fe8000c101b08 */ /*2270*/ STG.E.64 [R4.64], R14 ; /* 0x0000000e04007986 */ /* 0x000fe8000c101b08 */ /*2280*/ STG.E.64 [R6.64], R18 ; /* 0x0000001206007986 */ /* 0x001fe2000c101b08 */ /*2290*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*22a0*/ FSETP.GEU.AND P0, PT, |R3|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000300780b */ /* 0x040fe20003f0e200 */ /*22b0*/ IMAD.MOV.U32 R20, RZ, RZ, 0x1 ; /* 0x00000001ff147424 */ /* 0x000fe200078e00ff */ /*22c0*/ LOP3.LUT R10, R3, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff030a7812 */ /* 0x000fe200078ec0ff */ /*22d0*/ IMAD.MOV.U32 R18, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff127424 */ /* 0x000fe200078e00ff */ /*22e0*/ FSETP.GEU.AND P2, PT, |R13|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000d00780b */ /* 0x040fe20003f4e200 */ /*22f0*/ BSSY B1, 0x2830 ; /* 0x0000053000017945 */ /* 0x000fe20003800000 */ /*2300*/ LOP3.LUT R11, R10, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff000000a0b7812 */ /* 0x000fe200078efcff */ /*2310*/ IMAD.MOV.U32 R10, RZ, RZ, R2 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0002 */ /*2320*/ LOP3.LUT R9, R13, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000d097812 */ /* 0x000fc400078ec0ff */ /*2330*/ LOP3.LUT R24, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000003187812 */ /* 0x000fc600078ec0ff */ /*2340*/ @!P0 DMUL R10, R2, 8.98846567431157953865e+307 ; /* 0x7fe00000020a8828 */ /* 0x000e220000000000 */ /*2350*/ ISETP.GE.U32.AND P1, PT, R9, R24, PT ; /* 0x000000180900720c */ /* 0x000fe20003f26070 */ /*2360*/ IMAD.MOV.U32 R25, RZ, RZ, R9 ; /* 0x000000ffff197224 */ /* 0x000fe400078e0009 */ /*2370*/ @!P2 LOP3.LUT R14, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000030ea812 */ /* 0x000fe200078ec0ff */ /*2380*/ @!P2 IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff10a224 */ /* 0x000fe200078e00ff */ /*2390*/ MUFU.RCP64H R21, R11 ; /* 0x0000000b00157308 */ /* 0x001e220000001800 */ /*23a0*/ SEL R17, R18, 0x63400000, !P1 ; /* 0x6340000012117807 */ /* 0x000fe40004800000 */ /*23b0*/ @!P2 ISETP.GE.U32.AND P3, PT, R9, R14, PT ; /* 0x0000000e0900a20c */ /* 0x000fe40003f66070 */ /*23c0*/ @!P0 LOP3.LUT R24, R11, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000b188812 */ /* 0x000fc400078ec0ff */ /*23d0*/ @!P2 SEL R19, R18, 0x63400000, !P3 ; /* 0x634000001213a807 */ /* 0x000fe40005800000 */ /*23e0*/ IADD3 R26, R24, -0x1, RZ ; /* 0xffffffff181a7810 */ /* 0x000fe40007ffe0ff */ /*23f0*/ @!P2 LOP3.LUT R19, R19, 0x80000000, R13, 0xf8, !PT ; /* 0x800000001313a812 */ /* 0x000fe200078ef80d */ /*2400*/ DFMA R14, R20, -R10, 1 ; /* 0x3ff00000140e742b */ /* 0x001e0c000000080a */ /*2410*/ DFMA R22, R14, R14, R14 ; /* 0x0000000e0e16722b */ /* 0x001064000000000e */ /*2420*/ LOP3.LUT R15, R17, 0x800fffff, R13, 0xf8, !PT ; /* 0x800fffff110f7812 */ /* 0x001fe200078ef80d */ /*2430*/ IMAD.MOV.U32 R14, RZ, RZ, R12 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e000c */ /*2440*/ @!P2 LOP3.LUT R17, R19, 0x100000, RZ, 0xfc, !PT ; /* 0x001000001311a812 */ /* 0x000fe400078efcff */ /*2450*/ DFMA R22, R20, R22, R20 ; /* 0x000000161416722b */ /* 0x002e080000000014 */ /*2460*/ @!P2 DFMA R14, R14, 2, -R16 ; /* 0x400000000e0ea82b */ /* 0x000e480000000810 */ /*2470*/ DFMA R16, R22, -R10, 1 ; /* 0x3ff000001610742b */ /* 0x001e0c000000080a */ /*2480*/ @!P2 LOP3.LUT R25, R15, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff000000f19a812 */ /* 0x002fe200078ec0ff */ /*2490*/ DFMA R16, R22, R16, R22 ; /* 0x000000101610722b */ /* 0x001e060000000016 */ /*24a0*/ IADD3 R19, R25, -0x1, RZ ; /* 0xffffffff19137810 */ /* 0x000fc60007ffe0ff */ /*24b0*/ DMUL R20, R16, R14 ; /* 0x0000000e10147228 */ /* 0x001e220000000000 */ /*24c0*/ ISETP.GT.U32.AND P0, PT, R19, 0x7feffffe, PT ; /* 0x7feffffe1300780c */ /* 0x000fc80003f04070 */ /*24d0*/ ISETP.GT.U32.OR P0, PT, R26, 0x7feffffe, P0 ; /* 0x7feffffe1a00780c */ /* 0x000fe20000704470 */ /*24e0*/ DFMA R22, R20, -R10, R14 ; /* 0x8000000a1416722b */ /* 0x001e0c000000000e */ /*24f0*/ DFMA R16, R16, R22, R20 ; /* 0x000000161010722b */ /* 0x00104c0000000014 */ /*2500*/ @P0 BRA 0x26d0 ; /* 0x000001c000000947 */ /* 0x000fea0003800000 */ /*2510*/ LOP3.LUT R20, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000003147812 */ /* 0x003fc800078ec0ff */ /*2520*/ ISETP.GE.U32.AND P0, PT, R9.reuse, R20, PT ; /* 0x000000140900720c */ /* 0x040fe20003f06070 */ /*2530*/ IMAD.IADD R12, R9, 0x1, -R20 ; /* 0x00000001090c7824 */ /* 0x000fc600078e0a14 */ /*2540*/ SEL R9, R18, 0x63400000, !P0 ; /* 0x6340000012097807 */ /* 0x000fe40004000000 */ /*2550*/ IMNMX R12, R12, -0x46a00000, !PT ; /* 0xb96000000c0c7817 */ /* 0x000fc80007800200 */ /*2560*/ IMNMX R12, R12, 0x46a00000, PT ; /* 0x46a000000c0c7817 */ /* 0x000fca0003800200 */ /*2570*/ IMAD.IADD R20, R12, 0x1, -R9 ; /* 0x000000010c147824 */ /* 0x000fe400078e0a09 */ /*2580*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x000fc600078e00ff */ /*2590*/ IADD3 R13, R20, 0x7fe00000, RZ ; /* 0x7fe00000140d7810 */ /* 0x000fcc0007ffe0ff */ /*25a0*/ DMUL R18, R16, R12 ; /* 0x0000000c10127228 */ /* 0x000e140000000000 */ /*25b0*/ FSETP.GTU.AND P0, PT, |R19|, 1.469367938527859385e-39, PT ; /* 0x001000001300780b */ /* 0x001fda0003f0c200 */ /*25c0*/ @P0 BRA 0x2820 ; /* 0x0000025000000947 */ /* 0x000fea0003800000 */ /*25d0*/ DFMA R10, R16, -R10, R14 ; /* 0x8000000a100a722b */ /* 0x000e22000000000e */ /*25e0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x000fd200078e00ff */ /*25f0*/ FSETP.NEU.AND P0, PT, R11.reuse, RZ, PT ; /* 0x000000ff0b00720b */ /* 0x041fe40003f0d000 */ /*2600*/ LOP3.LUT R9, R11, 0x80000000, R3, 0x48, !PT ; /* 0x800000000b097812 */ /* 0x000fc800078e4803 */ /*2610*/ LOP3.LUT R13, R9, R13, RZ, 0xfc, !PT ; /* 0x0000000d090d7212 */ /* 0x000fce00078efcff */ /*2620*/ @!P0 BRA 0x2820 ; /* 0x000001f000008947 */ /* 0x000fea0003800000 */ /*2630*/ IMAD.MOV R3, RZ, RZ, -R20 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0a14 */ /*2640*/ DMUL.RP R12, R16, R12 ; /* 0x0000000c100c7228 */ /* 0x000e220000008000 */ /*2650*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fcc00078e00ff */ /*2660*/ DFMA R2, R18, -R2, R16 ; /* 0x800000021202722b */ /* 0x000e460000000010 */ /*2670*/ LOP3.LUT R9, R13, R9, RZ, 0x3c, !PT ; /* 0x000000090d097212 */ /* 0x001fc600078e3cff */ /*2680*/ IADD3 R2, -R20, -0x43300000, RZ ; /* 0xbcd0000014027810 */ /* 0x002fc80007ffe1ff */ /*2690*/ FSETP.NEU.AND P0, PT, |R3|, R2, PT ; /* 0x000000020300720b */ /* 0x000fc80003f0d200 */ /*26a0*/ FSEL R18, R12, R18, !P0 ; /* 0x000000120c127208 */ /* 0x000fe40004000000 */ /*26b0*/ FSEL R19, R9, R19, !P0 ; /* 0x0000001309137208 */ /* 0x000fe20004000000 */ /*26c0*/ BRA 0x2820 ; /* 0x0000015000007947 */ /* 0x000fea0003800000 */ /*26d0*/ DSETP.NAN.AND P0, PT, R12, R12, PT ; /* 0x0000000c0c00722a */ /* 0x003e1c0003f08000 */ /*26e0*/ @P0 BRA 0x2800 ; /* 0x0000011000000947 */ /* 0x001fea0003800000 */ /*26f0*/ DSETP.NAN.AND P0, PT, R2, R2, PT ; /* 0x000000020200722a */ /* 0x000e1c0003f08000 */ /*2700*/ @P0 BRA 0x27d0 ; /* 0x000000c000000947 */ /* 0x001fea0003800000 */ /*2710*/ ISETP.NE.AND P0, PT, R25, R24, PT ; /* 0x000000181900720c */ /* 0x000fe20003f05270 */ /*2720*/ IMAD.MOV.U32 R18, RZ, RZ, 0x0 ; /* 0x00000000ff127424 */ /* 0x000fe400078e00ff */ /*2730*/ IMAD.MOV.U32 R19, RZ, RZ, -0x80000 ; /* 0xfff80000ff137424 */ /* 0x000fd400078e00ff */ /*2740*/ @!P0 BRA 0x2820 ; /* 0x000000d000008947 */ /* 0x000fea0003800000 */ /*2750*/ ISETP.NE.AND P0, PT, R25, 0x7ff00000, PT ; /* 0x7ff000001900780c */ /* 0x000fe40003f05270 */ /*2760*/ LOP3.LUT R19, R13, 0x80000000, R3, 0x48, !PT ; /* 0x800000000d137812 */ /* 0x000fe400078e4803 */ /*2770*/ ISETP.EQ.OR P0, PT, R24, RZ, !P0 ; /* 0x000000ff1800720c */ /* 0x000fda0004702670 */ /*2780*/ @P0 LOP3.LUT R2, R19, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff0000013020812 */ /* 0x000fe200078efcff */ /*2790*/ @!P0 IMAD.MOV.U32 R18, RZ, RZ, RZ ; /* 0x000000ffff128224 */ /* 0x000fe400078e00ff */ /*27a0*/ @P0 IMAD.MOV.U32 R18, RZ, RZ, RZ ; /* 0x000000ffff120224 */ /* 0x000fe400078e00ff */ /*27b0*/ @P0 IMAD.MOV.U32 R19, RZ, RZ, R2 ; /* 0x000000ffff130224 */ /* 0x000fe200078e0002 */ /*27c0*/ BRA 0x2820 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*27d0*/ LOP3.LUT R19, R3, 0x80000, RZ, 0xfc, !PT ; /* 0x0008000003137812 */ /* 0x000fe200078efcff */ /*27e0*/ IMAD.MOV.U32 R18, RZ, RZ, R2 ; /* 0x000000ffff127224 */ /* 0x000fe200078e0002 */ /*27f0*/ BRA 0x2820 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*2800*/ LOP3.LUT R19, R13, 0x80000, RZ, 0xfc, !PT ; /* 0x000800000d137812 */ /* 0x000fe200078efcff */ /*2810*/ IMAD.MOV.U32 R18, RZ, RZ, R12 ; /* 0x000000ffff127224 */ /* 0x000fe400078e000c */ /*2820*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*2830*/ IMAD.MOV.U32 R9, RZ, RZ, 0x0 ; /* 0x00000000ff097424 */ /* 0x000fe400078e00ff */ /*2840*/ IMAD.MOV.U32 R2, RZ, RZ, R18 ; /* 0x000000ffff027224 */ /* 0x000fc400078e0012 */ /*2850*/ IMAD.MOV.U32 R3, RZ, RZ, R19 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0013 */ /*2860*/ RET.REL.NODEC R8 0x0 ; /* 0xffffd79008007950 */ /* 0x000fec0003c3ffff */ /*2870*/ SHF.R.U32.HI R9, RZ, 0x14, R11 ; /* 0x00000014ff097819 */ /* 0x000fe2000001160b */ /*2880*/ IMAD.MOV.U32 R10, RZ, RZ, R12 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e000c */ /*2890*/ USHF.L.U32 UR7, UR5, 0x1, URZ ; /* 0x0000000105077899 */ /* 0x000fe2000800063f */ /*28a0*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e00ff */ /*28b0*/ ISETP.NE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f05270 */ /*28c0*/ IMAD.MOV.U32 R20, RZ, RZ, 0x7d2cafe2 ; /* 0x7d2cafe2ff147424 */ /* 0x000fe200078e00ff */ /*28d0*/ ULOP3.LUT UR6, UR5, 0xff0fffff, URZ, 0xc0, !UPT ; /* 0xff0fffff05067892 */ /* 0x000fe2000f8ec03f */ /*28e0*/ IMAD.MOV.U32 R21, RZ, RZ, 0x3eb0f5ff ; /* 0x3eb0f5ffff157424 */ /* 0x000fe200078e00ff */ /*28f0*/ UISETP.GT.U32.AND UP0, UPT, UR7, -0x2000001, UPT ; /* 0xfdffffff0700788c */ /* 0x000fc8000bf04070 */ /*2900*/ USEL UR7, UR6, UR5, UP0 ; /* 0x0000000506077287 */ /* 0x000fc60008000000 */ /*2910*/ UMOV UR6, UR4 ; /* 0x0000000400067c82 */ /* 0x000fe40008000000 */ /*2920*/ @!P0 DMUL R24, R10, 1.80143985094819840000e+16 ; /* 0x435000000a188828 */ /* 0x0000640000000000 */ /*2930*/ IMAD.MOV.U32 R10, RZ, RZ, R11 ; /* 0x000000ffff0a7224 */ /* 0x001fd000078e000b */ /*2940*/ @!P0 IMAD.MOV.U32 R10, RZ, RZ, R25 ; /* 0x000000ffff0a8224 */ /* 0x002fe200078e0019 */ /*2950*/ @!P0 LEA.HI R9, R25, 0xffffffca, RZ, 0xc ; /* 0xffffffca19098811 */ /* 0x000fe200078f60ff */ /*2960*/ @!P0 IMAD.MOV.U32 R12, RZ, RZ, R24 ; /* 0x000000ffff0c8224 */ /* 0x000fc600078e0018 */ /*2970*/ LOP3.LUT R10, R10, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff0a0a7812 */ /* 0x000fc800078ec0ff */ /*2980*/ LOP3.LUT R13, R10, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff000000a0d7812 */ /* 0x000fc800078efcff */ /*2990*/ ISETP.GE.U32.AND P1, PT, R13, 0x3ff6a09f, PT ; /* 0x3ff6a09f0d00780c */ /* 0x000fda0003f26070 */ /*29a0*/ @P1 IADD3 R11, R13, -0x100000, RZ ; /* 0xfff000000d0b1810 */ /* 0x000fca0007ffe0ff */ /*29b0*/ @P1 IMAD.MOV.U32 R13, RZ, RZ, R11 ; /* 0x000000ffff0d1224 */ /* 0x000fcc00078e000b */ /*29c0*/ DADD R18, R12, 1 ; /* 0x3ff000000c127429 */ /* 0x000e080000000000 */ /*29d0*/ DADD R12, R12, -1 ; /* 0xbff000000c0c7429 */ /* 0x000fe40000000000 */ /*29e0*/ MUFU.RCP64H R15, R19 ; /* 0x00000013000f7308 */ /* 0x001e240000001800 */ /*29f0*/ DFMA R10, -R18, R14, 1 ; /* 0x3ff00000120a742b */ /* 0x001e0c000000010e */ /*2a00*/ DFMA R10, R10, R10, R10 ; /* 0x0000000a0a0a722b */ /* 0x001e0c000000000a */ /*2a10*/ DFMA R14, R14, R10, R14 ; /* 0x0000000a0e0e722b */ /* 0x001e0c000000000e */ /*2a20*/ DMUL R10, R14, R12 ; /* 0x0000000c0e0a7228 */ /* 0x001e0c0000000000 */ /*2a30*/ DFMA R10, R14, R12, R10 ; /* 0x0000000c0e0a722b */ /* 0x001e0c000000000a */ /*2a40*/ DMUL R16, R10, R10 ; /* 0x0000000a0a107228 */ /* 0x001e080000000000 */ /*2a50*/ DADD R18, R12, -R10 ; /* 0x000000000c127229 */ /* 0x000e48000000080a */ /*2a60*/ DFMA R20, R16, R20, c[0x2][0x20] ; /* 0x008008001014762b */ /* 0x001e080000000014 */ /*2a70*/ DADD R26, R18, R18 ; /* 0x00000000121a7229 */ /* 0x002e480000000012 */ /*2a80*/ DFMA R20, R16, R20, c[0x2][0x28] ; /* 0x00800a001014762b */ /* 0x001e080000000014 */ /*2a90*/ DFMA R26, R12, -R10, R26 ; /* 0x8000000a0c1a722b */ /* 0x002e48000000001a */ /*2aa0*/ DFMA R20, R16, R20, c[0x2][0x30] ; /* 0x00800c001014762b */ /* 0x001e080000000014 */ /*2ab0*/ DMUL R14, R14, R26 ; /* 0x0000001a0e0e7228 */ /* 0x002fc80000000000 */ /*2ac0*/ DFMA R20, R16, R20, c[0x2][0x38] ; /* 0x00800e001014762b */ /* 0x001e0c0000000014 */ /*2ad0*/ DFMA R20, R16, R20, c[0x2][0x40] ; /* 0x008010001014762b */ /* 0x001e0c0000000014 */ /*2ae0*/ DFMA R22, R16, R20, c[0x2][0x48] ; /* 0x008012001016762b */ /* 0x001e080000000014 */ /*2af0*/ DMUL R20, R10, R10 ; /* 0x0000000a0a147228 */ /* 0x000e480000000000 */ /*2b00*/ DFMA R18, R16, R22, c[0x2][0x50] ; /* 0x008014001012762b */ /* 0x001e080000000016 */ /*2b10*/ DFMA R12, R10, R10, -R20 ; /* 0x0000000a0a0c722b */ /* 0x002fc80000000814 */ /*2b20*/ DADD R28, -R18, c[0x2][0x50] ; /* 0x00801400121c7629 */ /* 0x001e0c0000000100 */ /*2b30*/ DFMA R28, R16, R22, R28 ; /* 0x00000016101c722b */ /* 0x001e08000000001c */ /*2b40*/ DMUL R16, R10, R20 ; /* 0x000000140a107228 */ /* 0x000e480000000000 */ /*2b50*/ DADD R22, RZ, R28 ; /* 0x00000000ff167229 */ /* 0x001e08000000001c */ /*2b60*/ DFMA R26, R10, R20, -R16 ; /* 0x000000140a1a722b */ /* 0x002e480000000810 */ /*2b70*/ DADD R22, R22, c[0x2][0x58] ; /* 0x0080160016167629 */ /* 0x001e080000000000 */ /*2b80*/ DFMA R28, R14, R20, R26 ; /* 0x000000140e1c722b */ /* 0x0023e4000000001a */ /*2b90*/ IADD3 R27, R15, 0x100000, RZ ; /* 0x001000000f1b7810 */ /* 0x002fe20007ffe0ff */ /*2ba0*/ IMAD.MOV.U32 R26, RZ, RZ, R14 ; /* 0x000000ffff1a7224 */ /* 0x000fe200078e000e */ /*2bb0*/ DADD R20, R18, R22 ; /* 0x0000000012147229 */ /* 0x001e0a0000000016 */ /*2bc0*/ DFMA R26, R10, R26, R12 ; /* 0x0000001a0a1a722b */ /* 0x000e48000000000c */ /*2bd0*/ DMUL R12, R20, R16 ; /* 0x00000010140c7228 */ /* 0x001e080000000000 */ /*2be0*/ DFMA R26, R10, R26, R28 ; /* 0x0000001a0a1a722b */ /* 0x002fc8000000001c */ /*2bf0*/ DADD R18, R18, -R20 ; /* 0x0000000012127229 */ /* 0x000e480000000814 */ /*2c00*/ DFMA R28, R20, R16, -R12 ; /* 0x00000010141c722b */ /* 0x001e08000000080c */ /*2c10*/ DADD R18, R22, R18 ; /* 0x0000000016127229 */ /* 0x0023e40000000012 */ /*2c20*/ IMAD.MOV.U32 R22, RZ, RZ, 0x69ce2bdf ; /* 0x69ce2bdfff167424 */ /* 0x002fe400078e00ff */ /*2c30*/ DFMA R26, R20, R26, R28 ; /* 0x0000001a141a722b */ /* 0x001e22000000001c */ /*2c40*/ IMAD.MOV.U32 R23, RZ, RZ, 0x3e5ade15 ; /* 0x3e5ade15ff177424 */ /* 0x000fca00078e00ff */ /*2c50*/ DFMA R18, R18, R16, R26 ; /* 0x000000101212722b */ /* 0x001e0c000000001a */ /*2c60*/ DADD R20, R12, R18 ; /* 0x000000000c147229 */ /* 0x001e0c0000000012 */ /*2c70*/ DADD R16, R10, R20 ; /* 0x000000000a107229 */ /* 0x001e080000000014 */ /*2c80*/ DADD R12, R12, -R20 ; /* 0x000000000c0c7229 */ /* 0x000e480000000814 */ /*2c90*/ DADD R10, R10, -R16 ; /* 0x000000000a0a7229 */ /* 0x001e080000000810 */ /*2ca0*/ DADD R12, R18, R12 ; /* 0x00000000120c7229 */ /* 0x0023e4000000000c */ /*2cb0*/ IADD3 R18, R9.reuse, -0x3ff, RZ ; /* 0xfffffc0109127810 */ /* 0x042fe40007ffe0ff */ /*2cc0*/ DADD R10, R20, R10 ; /* 0x00000000140a7229 */ /* 0x001e22000000000a */ /*2cd0*/ @P1 IADD3 R18, R9, -0x3fe, RZ ; /* 0xfffffc0209121810 */ /* 0x000fca0007ffe0ff */ /*2ce0*/ DADD R10, R12, R10 ; /* 0x000000000c0a7229 */ /* 0x001064000000000a */ /*2cf0*/ LOP3.LUT R12, R18, 0x80000000, RZ, 0x3c, !PT ; /* 0x80000000120c7812 */ /* 0x001fe200078e3cff */ /*2d00*/ IMAD.MOV.U32 R13, RZ, RZ, 0x43300000 ; /* 0x43300000ff0d7424 */ /* 0x000fc600078e00ff */ /*2d10*/ DADD R10, R14, R10 ; /* 0x000000000e0a7229 */ /* 0x002e08000000000a */ /*2d20*/ DADD R14, R12, c[0x2][0x60] ; /* 0x008018000c0e7629 */ /* 0x000fc80000000000 */ /*2d30*/ DADD R12, R16, R10 ; /* 0x00000000100c7229 */ /* 0x001e0c000000000a */ /*2d40*/ DFMA R18, R14, c[0x2][0x68], R12 ; /* 0x00801a000e127a2b */ /* 0x001e08000000000c */ /*2d50*/ DADD R16, R16, -R12 ; /* 0x0000000010107229 */ /* 0x000e48000000080c */ /*2d60*/ DFMA R20, -R14, c[0x2][0x68], R18 ; /* 0x00801a000e147a2b */ /* 0x001e080000000112 */ /*2d70*/ DADD R16, R10, R16 ; /* 0x000000000a107229 */ /* 0x002fc80000000010 */ /*2d80*/ DADD R20, -R12, R20 ; /* 0x000000000c147229 */ /* 0x001e0c0000000114 */ /*2d90*/ DADD R16, R16, -R20 ; /* 0x0000000010107229 */ /* 0x001e0c0000000814 */ /*2da0*/ DFMA R16, R14, c[0x2][0x70], R16 ; /* 0x00801c000e107a2b */ /* 0x001e0c0000000010 */ /*2db0*/ DADD R12, R18, R16 ; /* 0x00000000120c7229 */ /* 0x001e0c0000000010 */ /*2dc0*/ DADD R18, R18, -R12 ; /* 0x0000000012127229 */ /* 0x001e08000000080c */ /*2dd0*/ DMUL R10, R12, UR6 ; /* 0x000000060c0a7c28 */ /* 0x000e480008000000 */ /*2de0*/ DADD R18, R16, R18 ; /* 0x0000000010127229 */ /* 0x0011e40000000012 */ /*2df0*/ IMAD.MOV.U32 R16, RZ, RZ, 0x652b82fe ; /* 0x652b82feff107424 */ /* 0x001fe400078e00ff */ /*2e00*/ DFMA R12, R12, UR6, -R10 ; /* 0x000000060c0c7c2b */ /* 0x002e22000800080a */ /*2e10*/ IMAD.MOV.U32 R17, RZ, RZ, 0x3ff71547 ; /* 0x3ff71547ff117424 */ /* 0x000fca00078e00ff */ /*2e20*/ DFMA R12, R18, UR6, R12 ; /* 0x00000006120c7c2b */ /* 0x001e0c000800000c */ /*2e30*/ DADD R14, R10, R12 ; /* 0x000000000a0e7229 */ /* 0x001e0c000000000c */ /*2e40*/ DFMA R16, R14, R16, 6.75539944105574400000e+15 ; /* 0x433800000e10742b */ /* 0x001e080000000010 */ /*2e50*/ FSETP.GEU.AND P0, PT, |R15|, 4.1917929649353027344, PT ; /* 0x4086232b0f00780b */ /* 0x000fe40003f0e200 */ /*2e60*/ DADD R18, R16, -6.75539944105574400000e+15 ; /* 0xc338000010127429 */ /* 0x001e0c0000000000 */ /*2e70*/ DFMA R20, R18, c[0x2][0x78], R14 ; /* 0x00801e0012147a2b */ /* 0x001e0c000000000e */ /*2e80*/ DFMA R18, R18, c[0x2][0x80], R20 ; /* 0x0080200012127a2b */ /* 0x001e0c0000000014 */ /*2e90*/ DFMA R20, R18, R22, c[0x2][0x88] ; /* 0x008022001214762b */ /* 0x001e0c0000000016 */ /*2ea0*/ DFMA R20, R18, R20, c[0x2][0x90] ; /* 0x008024001214762b */ /* 0x001e0c0000000014 */ /*2eb0*/ DFMA R20, R18, R20, c[0x2][0x98] ; /* 0x008026001214762b */ /* 0x001e0c0000000014 */ /*2ec0*/ DFMA R20, R18, R20, c[0x2][0xa0] ; /* 0x008028001214762b */ /* 0x001e0c0000000014 */ /*2ed0*/ DFMA R20, R18, R20, c[0x2][0xa8] ; /* 0x00802a001214762b */ /* 0x001e0c0000000014 */ /*2ee0*/ DFMA R20, R18, R20, c[0x2][0xb0] ; /* 0x00802c001214762b */ /* 0x001e0c0000000014 */ /*2ef0*/ DFMA R20, R18, R20, c[0x2][0xb8] ; /* 0x00802e001214762b */ /* 0x001e0c0000000014 */ /*2f00*/ DFMA R20, R18, R20, c[0x2][0xc0] ; /* 0x008030001214762b */ /* 0x001e0c0000000014 */ /*2f10*/ DFMA R20, R18, R20, c[0x2][0xc8] ; /* 0x008032001214762b */ /* 0x001e0c0000000014 */ /*2f20*/ DFMA R20, R18, R20, 1 ; /* 0x3ff000001214742b */ /* 0x001e0c0000000014 */ /*2f30*/ DFMA R20, R18, R20, 1 ; /* 0x3ff000001214742b */ /* 0x001e140000000014 */ /*2f40*/ IMAD R19, R16, 0x100000, R21 ; /* 0x0010000010137824 */ /* 0x001fe400078e0215 */ /*2f50*/ IMAD.MOV.U32 R18, RZ, RZ, R20 ; /* 0x000000ffff127224 */ /* 0x000fe200078e0014 */ /*2f60*/ @!P0 BRA 0x3050 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*2f70*/ FSETP.GEU.AND P1, PT, |R15|, 4.2275390625, PT ; /* 0x408748000f00780b */ /* 0x000fe20003f2e200 */ /*2f80*/ DADD R18, R14, +INF ; /* 0x7ff000000e127429 */ /* 0x000fc80000000000 */ /*2f90*/ DSETP.GEU.AND P0, PT, R14, RZ, PT ; /* 0x000000ff0e00722a */ /* 0x000e0c0003f0e000 */ /*2fa0*/ FSEL R18, R18, RZ, P0 ; /* 0x000000ff12127208 */ /* 0x001fe40000000000 */ /*2fb0*/ FSEL R19, R19, RZ, P0 ; /* 0x000000ff13137208 */ /* 0x000fe20000000000 */ /*2fc0*/ @P1 BRA 0x3050 ; /* 0x0000008000001947 */ /* 0x000fea0003800000 */ /*2fd0*/ LEA.HI R9, R16, R16, RZ, 0x1 ; /* 0x0000001010097211 */ /* 0x000fe200078f08ff */ /*2fe0*/ IMAD.MOV.U32 R18, RZ, RZ, R20 ; /* 0x000000ffff127224 */ /* 0x000fc600078e0014 */ /*2ff0*/ SHF.R.S32.HI R9, RZ, 0x1, R9 ; /* 0x00000001ff097819 */ /* 0x000fca0000011409 */ /*3000*/ IMAD.IADD R16, R16, 0x1, -R9 ; /* 0x0000000110107824 */ /* 0x000fe400078e0a09 */ /*3010*/ IMAD R19, R9, 0x100000, R21 ; /* 0x0010000009137824 */ /* 0x000fc600078e0215 */ /*3020*/ LEA R17, R16, 0x3ff00000, 0x14 ; /* 0x3ff0000010117811 */ /* 0x000fe200078ea0ff */ /*3030*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */ /* 0x000fcc00078e00ff */ /*3040*/ DMUL R18, R18, R16 ; /* 0x0000001012127228 */ /* 0x0000540000000000 */ /*3050*/ LOP3.LUT R9, R19, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff13097812 */ /* 0x002fe200078ec0ff */ /*3060*/ DADD R10, R10, -R14 ; /* 0x000000000a0a7229 */ /* 0x000e46000000080e */ /*3070*/ ISETP.NE.AND P0, PT, R9, 0x7ff00000, PT ; /* 0x7ff000000900780c */ /* 0x000fe20003f05270 */ /*3080*/ IMAD.MOV.U32 R9, RZ, RZ, 0x0 ; /* 0x00000000ff097424 */ /* 0x000fe400078e00ff */ /*3090*/ DADD R10, R12, R10 ; /* 0x000000000c0a7229 */ /* 0x002e62000000000a */ /*30a0*/ ISETP.EQ.AND P0, PT, R18, RZ, !P0 ; /* 0x000000ff1200720c */ /* 0x000fda0004702270 */ /*30b0*/ @!P0 DFMA R18, R10, R18, R18 ; /* 0x000000120a12822b */ /* 0x0022a20000000012 */ /*30c0*/ RET.REL.NODEC R8 0x0 ; /* 0xffffcf3008007950 */ /* 0x000ff40003c3ffff */ /*30d0*/ SHF.R.U32.HI R6, RZ, 0x14, R5 ; /* 0x00000014ff067819 */ /* 0x000fc80000011605 */ /*30e0*/ LOP3.LUT R6, R6, 0x7ff, RZ, 0xc0, !PT ; /* 0x000007ff06067812 */ /* 0x000fc800078ec0ff */ /*30f0*/ ISETP.NE.AND P0, PT, R6, 0x7ff, PT ; /* 0x000007ff0600780c */ /* 0x000fda0003f05270 */ /*3100*/ @!P0 BRA 0x3a60 ; /* 0x0000095000008947 */ /* 0x000fea0003800000 */ /*3110*/ IADD3 R6, R6, -0x400, RZ ; /* 0xfffffc0006067810 */ /* 0x000fe20007ffe0ff */ /*3120*/ BSSY B0, 0x3450 ; /* 0x0000032000007945 */ /* 0x000fe20003800000 */ /*3130*/ CS2R R34, SRZ ; /* 0x0000000000227805 */ /* 0x000fe4000001ff00 */ /*3140*/ SHF.R.U32.HI R8, RZ, 0x6, R6 ; /* 0x00000006ff087819 */ /* 0x000fc80000011606 */ /*3150*/ IADD3 R0, -R8.reuse, 0x10, RZ ; /* 0x0000001008007810 */ /* 0x040fe40007ffe1ff */ /*3160*/ IADD3 R7, -R8, 0x13, RZ ; /* 0x0000001308077810 */ /* 0x000fe40007ffe1ff */ /*3170*/ ISETP.GT.AND P0, PT, R0, 0xe, PT ; /* 0x0000000e0000780c */ /* 0x000fc80003f04270 */ /*3180*/ SEL R7, R7, 0x12, !P0 ; /* 0x0000001207077807 */ /* 0x000fc80004000000 */ /*3190*/ ISETP.GT.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x000fe40003f04270 */ /*31a0*/ IADD3 R0, -R8, 0xf, RZ ; /* 0x0000000f08007810 */ /* 0x000fe40007ffe1ff */ /*31b0*/ IADD3 R8, R1, 0x8, RZ ; /* 0x0000000801087810 */ /* 0x000fd20007ffe0ff */ /*31c0*/ @P0 BRA 0x3440 ; /* 0x0000027000000947 */ /* 0x000fea0003800000 */ /*31d0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x8 ; /* 0x00000008ff097424 */ /* 0x000fe200078e00ff */ /*31e0*/ CS2R R34, SRZ ; /* 0x0000000000227805 */ /* 0x000fc6000001ff00 */ /*31f0*/ IMAD.WIDE R10, R0, R9, c[0x4][0x8] ; /* 0x01000200000a7625 */ /* 0x000fe200078e0209 */ /*3200*/ SHF.L.U64.HI R9, R12, 0xb, R5 ; /* 0x0000000b0c097819 */ /* 0x000fc60000010205 */ /*3210*/ IMAD.MOV.U32 R13, RZ, RZ, R11 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e000b */ /*3220*/ LOP3.LUT R9, R9, 0x80000000, RZ, 0xfc, !PT ; /* 0x8000000009097812 */ /* 0x000fe200078efcff */ /*3230*/ IMAD.SHL.U32 R12, R12, 0x800, RZ ; /* 0x000008000c0c7824 */ /* 0x000fe400078e00ff */ /*3240*/ IMAD.MOV.U32 R11, RZ, RZ, R8 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e0008 */ /*3250*/ IMAD.MOV.U32 R38, RZ, RZ, R10 ; /* 0x000000ffff267224 */ /* 0x000fe200078e000a */ /*3260*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*3270*/ IMAD.MOV.U32 R39, RZ, RZ, R13 ; /* 0x000000ffff277224 */ /* 0x000fcc00078e000d */ /*3280*/ LDG.E.64.CONSTANT R38, [R38.64] ; /* 0x0000000426267981 */ /* 0x000ea2000c1e9b00 */ /*3290*/ IMAD.MOV.U32 R40, RZ, RZ, R34 ; /* 0x000000ffff287224 */ /* 0x000fe200078e0022 */ /*32a0*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fe20007ffe0ff */ /*32b0*/ IMAD.MOV.U32 R41, RZ, RZ, R35 ; /* 0x000000ffff297224 */ /* 0x000fc800078e0023 */ /*32c0*/ IMAD.WIDE.U32 R40, P2, R38, R12, R40 ; /* 0x0000000c26287225 */ /* 0x004fc80007840028 */ /*32d0*/ IMAD R35, R38.reuse, R9.reuse, RZ ; /* 0x0000000926237224 */ /* 0x0c0fe400078e02ff */ /*32e0*/ IMAD R34, R39, R12, RZ ; /* 0x0000000c27227224 */ /* 0x000fe400078e02ff */ /*32f0*/ IMAD.HI.U32 R38, R38, R9, RZ ; /* 0x0000000926267227 */ /* 0x000fe200078e00ff */ /*3300*/ IADD3 R35, P0, R35, R41, RZ ; /* 0x0000002923237210 */ /* 0x000fc60007f1e0ff */ /*3310*/ IMAD.HI.U32 R37, R39, R12, RZ ; /* 0x0000000c27257227 */ /* 0x000fe200078e00ff */ /*3320*/ IADD3 R35, P1, R34, R35, RZ ; /* 0x0000002322237210 */ /* 0x000fc60007f3e0ff */ /*3330*/ IMAD.MOV.U32 R34, RZ, RZ, R40 ; /* 0x000000ffff227224 */ /* 0x000fe400078e0028 */ /*3340*/ IMAD.X R38, RZ, RZ, R38, P2 ; /* 0x000000ffff267224 */ /* 0x000fe200010e0626 */ /*3350*/ ISETP.GE.AND P2, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x000fe40003f46270 */ /*3360*/ STL.64 [R11], R34 ; /* 0x000000220b007387 */ /* 0x0001e40000100a00 */ /*3370*/ IADD3.X R37, P0, R37, R38, RZ, P0, !PT ; /* 0x0000002625257210 */ /* 0x000fe2000071e4ff */ /*3380*/ IMAD R35, R39, R9.reuse, RZ ; /* 0x0000000927237224 */ /* 0x081fe200078e02ff */ /*3390*/ IADD3 R11, R11, 0x8, RZ ; /* 0x000000080b0b7810 */ /* 0x000fe20007ffe0ff */ /*33a0*/ IMAD.HI.U32 R34, R39, R9, RZ ; /* 0x0000000927227227 */ /* 0x000fc600078e00ff */ /*33b0*/ IADD3.X R35, P1, R35, R37, RZ, P1, !PT ; /* 0x0000002523237210 */ /* 0x000fe20000f3e4ff */ /*33c0*/ IMAD.X R34, RZ, RZ, R34, P0 ; /* 0x000000ffff227224 */ /* 0x000fe200000e0622 */ /*33d0*/ IADD3 R10, P0, R10, 0x8, RZ ; /* 0x000000080a0a7810 */ /* 0x000fc60007f1e0ff */ /*33e0*/ IMAD.X R34, RZ, RZ, R34, P1 ; /* 0x000000ffff227224 */ /* 0x000fe400008e0622 */ /*33f0*/ IMAD.X R13, RZ, RZ, R13, P0 ; /* 0x000000ffff0d7224 */ /* 0x000fc600000e060d */ /*3400*/ LOP3.LUT R35, R35, R34, RZ, 0x3c, !PT ; /* 0x0000002223237212 */ /* 0x000fc800078e3cff */ /*3410*/ LOP3.LUT R34, R35, R34, RZ, 0x3c, !PT ; /* 0x0000002223227212 */ /* 0x000fc800078e3cff */ /*3420*/ LOP3.LUT R35, R35, R34, RZ, 0x3c, !PT ; /* 0x0000002223237212 */ /* 0x000fe200078e3cff */ /*3430*/ @!P2 BRA 0x3250 ; /* 0xfffffe100000a947 */ /* 0x000fea000383ffff */ /*3440*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*3450*/ SHF.R.U32.HI R7, RZ, 0x6, R6 ; /* 0x00000006ff077819 */ /* 0x000fe40000011606 */ /*3460*/ LOP3.LUT P0, R13, R6, 0x3f, RZ, 0xc0, !PT ; /* 0x0000003f060d7812 */ /* 0x000fe4000780c0ff */ /*3470*/ IADD3 R7, -R7, 0xf, RZ ; /* 0x0000000f07077810 */ /* 0x000fca0007ffe1ff */ /*3480*/ IMAD.IADD R7, R0, 0x1, -R7 ; /* 0x0000000100077824 */ /* 0x000fc800078e0a07 */ /*3490*/ IMAD R7, R7, 0x8, R8 ; /* 0x0000000807077824 */ /* 0x000fca00078e0208 */ /*34a0*/ STL.64 [R7], R34 ; /* 0x0000002207007387 */ /* 0x0001e80000100a00 */ /*34b0*/ LDL.64 R8, [R1+0x18] ; /* 0x0000180001087983 */ /* 0x000ea80000100a00 */ /*34c0*/ @P0 LDL.64 R34, [R1+0x10] ; /* 0x0000100001220983 */ /* 0x001ee80000100a00 */ /*34d0*/ LDL.64 R6, [R1+0x20] ; /* 0x0000200001067983 */ /* 0x000f220000100a00 */ /*34e0*/ @P0 IADD3 R0, -R13, 0x40, RZ ; /* 0x000000400d000810 */ /* 0x000fe20007ffe1ff */ /*34f0*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*3500*/ @P0 SHF.L.U32 R10, R8, R13, RZ ; /* 0x0000000d080a0219 */ /* 0x004fc400000006ff */ /*3510*/ @P0 SHF.R.U64 R11, R34, R0.reuse, R35.reuse ; /* 0x00000000220b0219 */ /* 0x188fe40000001223 */ /*3520*/ @P0 SHF.R.U32.HI R12, RZ, R0.reuse, R35 ; /* 0x00000000ff0c0219 */ /* 0x080fe40000011623 */ /*3530*/ @P0 SHF.R.U64 R34, R8.reuse, R0, R9.reuse ; /* 0x0000000008220219 */ /* 0x140fe40000001209 */ /*3540*/ @P0 SHF.L.U64.HI R35, R8, R13, R9.reuse ; /* 0x0000000d08230219 */ /* 0x100fe40000010209 */ /*3550*/ @P0 LOP3.LUT R8, R11, R10, RZ, 0xfc, !PT ; /* 0x0000000a0b080212 */ /* 0x000fe400078efcff */ /*3560*/ @P0 SHF.R.U32.HI R10, RZ, R0, R9 ; /* 0x00000000ff0a0219 */ /* 0x000fc40000011609 */ /*3570*/ @P0 SHF.L.U32 R0, R6.reuse, R13.reuse, RZ ; /* 0x0000000d06000219 */ /* 0x0d0fe400000006ff */ /*3580*/ @P0 SHF.L.U64.HI R13, R6, R13, R7 ; /* 0x0000000d060d0219 */ /* 0x000fe40000010207 */ /*3590*/ @P0 LOP3.LUT R9, R12, R35, RZ, 0xfc, !PT ; /* 0x000000230c090212 */ /* 0x000fe200078efcff */ /*35a0*/ IMAD.MOV.U32 R35, RZ, RZ, RZ ; /* 0x000000ffff237224 */ /* 0x000fe200078e00ff */ /*35b0*/ @P0 LOP3.LUT R6, R0, R34, RZ, 0xfc, !PT ; /* 0x0000002200060212 */ /* 0x000fe400078efcff */ /*35c0*/ SHF.L.U64.HI R0, R8.reuse, 0x2, R9.reuse ; /* 0x0000000208007819 */ /* 0x140fe20000010209 */ /*35d0*/ IMAD.SHL.U32 R8, R8, 0x4, RZ ; /* 0x0000000408087824 */ /* 0x000fe200078e00ff */ /*35e0*/ SHF.R.U32.HI R9, RZ, 0x1e, R9 ; /* 0x0000001eff097819 */ /* 0x000fe20000011609 */ /*35f0*/ IMAD.SHL.U32 R11, R6, 0x4, RZ ; /* 0x00000004060b7824 */ /* 0x000fe200078e00ff */ /*3600*/ @P0 LOP3.LUT R7, R13, R10, RZ, 0xfc, !PT ; /* 0x0000000a0d070212 */ /* 0x000fc400078efcff */ /*3610*/ IADD3 RZ, P0, RZ, -R8, RZ ; /* 0x80000008ffff7210 */ /* 0x000fe40007f1e0ff */ /*3620*/ LOP3.LUT R13, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff0d7212 */ /* 0x000fe400078e33ff */ /*3630*/ LOP3.LUT R10, R9, R11, RZ, 0xfc, !PT ; /* 0x0000000b090a7212 */ /* 0x000fe400078efcff */ /*3640*/ SHF.L.U64.HI R9, R6, 0x2, R7 ; /* 0x0000000206097819 */ /* 0x000fe40000010207 */ /*3650*/ IADD3.X R13, P0, RZ, R13, RZ, P0, !PT ; /* 0x0000000dff0d7210 */ /* 0x000fe4000071e4ff */ /*3660*/ LOP3.LUT R11, RZ, R10, RZ, 0x33, !PT ; /* 0x0000000aff0b7212 */ /* 0x000fc400078e33ff */ /*3670*/ LOP3.LUT R12, RZ, R9, RZ, 0x33, !PT ; /* 0x00000009ff0c7212 */ /* 0x000fe400078e33ff */ /*3680*/ IADD3.X R11, P0, RZ, R11, RZ, P0, !PT ; /* 0x0000000bff0b7210 */ /* 0x000fe4000071e4ff */ /*3690*/ SHF.R.U32.HI R6, RZ, 0x1d, R7 ; /* 0x0000001dff067819 */ /* 0x000fc60000011607 */ /*36a0*/ IMAD.X R12, RZ, RZ, R12, P0 ; /* 0x000000ffff0c7224 */ /* 0x000fe200000e060c */ /*36b0*/ LOP3.LUT P1, RZ, R6.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000106ff7812 */ /* 0x040fe4000782c0ff */ /*36c0*/ LOP3.LUT R6, R6, 0x1, RZ, 0xc0, !PT ; /* 0x0000000106067812 */ /* 0x000fe400078ec0ff */ /*36d0*/ SEL R9, R9, R12, !P1 ; /* 0x0000000c09097207 */ /* 0x000fe40004800000 */ /*36e0*/ SEL R10, R10, R11, !P1 ; /* 0x0000000b0a0a7207 */ /* 0x000fe40004800000 */ /*36f0*/ ISETP.NE.U32.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe40003f05070 */ /*3700*/ SEL R0, R0, R13, !P1 ; /* 0x0000000d00007207 */ /* 0x000fc40004800000 */ /*3710*/ SEL R11, R10, R9, !P0 ; /* 0x000000090a0b7207 */ /* 0x000fe20004000000 */ /*3720*/ @P1 IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff081224 */ /* 0x000fe200078e0a08 */ /*3730*/ LEA.HI R6, R7, R6, RZ, 0x2 ; /* 0x0000000607067211 */ /* 0x000fc800078f10ff */ /*3740*/ FLO.U32 R11, R11 ; /* 0x0000000b000b7300 */ /* 0x000e2400000e0000 */ /*3750*/ IADD3 R12, -R11.reuse, 0x1f, RZ ; /* 0x0000001f0b0c7810 */ /* 0x041fe40007ffe1ff */ /*3760*/ IADD3 R11, -R11, 0x3f, RZ ; /* 0x0000003f0b0b7810 */ /* 0x000fc60007ffe1ff */ /*3770*/ @P0 IMAD.MOV R11, RZ, RZ, R12 ; /* 0x000000ffff0b0224 */ /* 0x000fca00078e020c */ /*3780*/ ISETP.NE.U32.AND P0, PT, R11.reuse, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x040fe40003f05070 */ /*3790*/ IADD3 R13, -R11, 0x40, RZ ; /* 0x000000400b0d7810 */ /* 0x000fe40007ffe1ff */ /*37a0*/ ISETP.NE.AND.EX P0, PT, RZ, RZ, PT, P0 ; /* 0x000000ffff00720c */ /* 0x000fe40003f05300 */ /*37b0*/ SHF.L.U32 R12, R10, R11, RZ ; /* 0x0000000b0a0c7219 */ /* 0x000fe400000006ff */ /*37c0*/ SHF.R.U64 R34, R8, R13, R0 ; /* 0x0000000d08227219 */ /* 0x000fe40000001200 */ /*37d0*/ SHF.L.U64.HI R8, R10, R11, R9 ; /* 0x0000000b0a087219 */ /* 0x000fc40000010209 */ /*37e0*/ SHF.R.U32.HI R0, RZ, R13, R0 ; /* 0x0000000dff007219 */ /* 0x000fca0000011600 */ /*37f0*/ @P0 LOP3.LUT R10, R34, R12, RZ, 0xfc, !PT ; /* 0x0000000c220a0212 */ /* 0x000fe400078efcff */ /*3800*/ @P0 LOP3.LUT R9, R0, R8, RZ, 0xfc, !PT ; /* 0x0000000800090212 */ /* 0x000fc600078efcff */ /*3810*/ IMAD.WIDE.U32 R12, R10, 0x2168c235, RZ ; /* 0x2168c2350a0c7825 */ /* 0x000fc800078e00ff */ /*3820*/ IMAD.MOV.U32 R34, RZ, RZ, R13 ; /* 0x000000ffff227224 */ /* 0x000fe200078e000d */ /*3830*/ IADD3 RZ, P0, R12, R12, RZ ; /* 0x0000000c0cff7210 */ /* 0x000fe20007f1e0ff */ /*3840*/ IMAD.HI.U32 R0, R9, -0x36f0255e, RZ ; /* 0xc90fdaa209007827 */ /* 0x000fc800078e00ff */ /*3850*/ IMAD.WIDE.U32 R34, R10, -0x36f0255e, R34 ; /* 0xc90fdaa20a227825 */ /* 0x000fc800078e0022 */ /*3860*/ IMAD R10, R9.reuse, -0x36f0255e, RZ ; /* 0xc90fdaa2090a7824 */ /* 0x040fe400078e02ff */ /*3870*/ IMAD.WIDE.U32 R34, P2, R9, 0x2168c235, R34 ; /* 0x2168c23509227825 */ /* 0x000fc80007840022 */ /*3880*/ IMAD.X R0, RZ, RZ, R0, P2 ; /* 0x000000ffff007224 */ /* 0x000fe200010e0600 */ /*3890*/ IADD3 R10, P2, R10, R35, RZ ; /* 0x000000230a0a7210 */ /* 0x000fe40007f5e0ff */ /*38a0*/ IADD3.X RZ, P0, R34, R34, RZ, P0, !PT ; /* 0x0000002222ff7210 */ /* 0x000fe4000071e4ff */ /*38b0*/ ISETP.GT.U32.AND P3, PT, R10.reuse, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x040fe20003f64070 */ /*38c0*/ IMAD.X R9, RZ, RZ, R0, P2 ; /* 0x000000ffff097224 */ /* 0x000fe200010e0600 */ /*38d0*/ IADD3.X R8, P2, R10, R10, RZ, P0, !PT ; /* 0x0000000a0a087210 */ /* 0x000fc8000075e4ff */ /*38e0*/ ISETP.GT.AND.EX P0, PT, R9.reuse, RZ, PT, P3 ; /* 0x000000ff0900720c */ /* 0x040fe20003f04330 */ /*38f0*/ IMAD.X R0, R9, 0x1, R9, P2 ; /* 0x0000000109007824 */ /* 0x000fe200010e0609 */ /*3900*/ LOP3.LUT P2, RZ, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005ff7812 */ /* 0x000fe4000784c0ff */ /*3910*/ SEL R8, R8, R10, P0 ; /* 0x0000000a08087207 */ /* 0x000fe40000000000 */ /*3920*/ SEL R0, R0, R9, P0 ; /* 0x0000000900007207 */ /* 0x000fe40000000000 */ /*3930*/ IADD3 R8, P3, R8, 0x1, RZ ; /* 0x0000000108087810 */ /* 0x000fe40007f7e0ff */ /*3940*/ IADD3 R9, R36, -c[0x0][0x20], RZ ; /* 0x8000080024097a10 */ /* 0x000fc40007ffe0ff */ /*3950*/ LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005057812 */ /* 0x000fe200078ec0ff */ /*3960*/ IMAD.X R7, RZ, RZ, R0, P3 ; /* 0x000000ffff077224 */ /* 0x000fe400018e0600 */ /*3970*/ IMAD.MOV R0, RZ, RZ, -R6 ; /* 0x000000ffff007224 */ /* 0x000fe200078e0a06 */ /*3980*/ @P1 LOP3.LUT R5, R5, 0x80000000, RZ, 0x3c, !PT ; /* 0x8000000005051812 */ /* 0x000fe400078e3cff */ /*3990*/ SHF.R.U64 R8, R8, 0xa, R7 ; /* 0x0000000a08087819 */ /* 0x000fe20000001207 */ /*39a0*/ @P2 IMAD.MOV.U32 R6, RZ, RZ, R0 ; /* 0x000000ffff062224 */ /* 0x000fe200078e0000 */ /*39b0*/ SEL R0, RZ, 0x1, !P0 ; /* 0x00000001ff007807 */ /* 0x000fe40004000000 */ /*39c0*/ IADD3 R8, P2, R8, 0x1, RZ ; /* 0x0000000108087810 */ /* 0x000fc40007f5e0ff */ /*39d0*/ STL [R9], R6 ; /* 0x0000000609007387 */ /* 0x0001e20000100800 */ /*39e0*/ IMAD.IADD R0, R0, 0x1, R11 ; /* 0x0000000100007824 */ /* 0x000fe200078e020b */ /*39f0*/ LEA.HI.X R7, R7, RZ, RZ, 0x16, P2 ; /* 0x000000ff07077211 */ /* 0x000fc600010fb4ff */ /*3a00*/ IMAD.SHL.U32 R0, R0, 0x100000, RZ ; /* 0x0010000000007824 */ /* 0x000fe200078e00ff */ /*3a10*/ SHF.R.U64 R8, R8, 0x1, R7.reuse ; /* 0x0000000108087819 */ /* 0x100fe40000001207 */ /*3a20*/ SHF.R.U32.HI R7, RZ, 0x1, R7 ; /* 0x00000001ff077819 */ /* 0x000fe40000011607 */ /*3a30*/ IADD3 R12, P0, P2, R8, -UR4, RZ ; /* 0x80000004080c7c10 */ /* 0x000fc8000fa1e0ff */ /*3a40*/ IADD3.X R0, R7, 0x3fe00000, ~R0, P0, P2 ; /* 0x3fe0000007007810 */ /* 0x000fc800007e4c00 */ /*3a50*/ LOP3.LUT R5, R0, R5, RZ, 0xfc, !PT ; /* 0x0000000500057212 */ /* 0x000fe400078efcff */ /*3a60*/ IMAD.MOV.U32 R6, RZ, RZ, R2 ; /* 0x000000ffff067224 */ /* 0x001fe400078e0002 */ /*3a70*/ IMAD.MOV.U32 R7, RZ, RZ, 0x0 ; /* 0x00000000ff077424 */ /* 0x000fe400078e00ff */ /*3a80*/ IMAD.MOV.U32 R13, RZ, RZ, R5 ; /* 0x000000ffff0d7224 */ /* 0x000fe400078e0005 */ /*3a90*/ RET.REL.NODEC R6 0x0 ; /* 0xffffc56006007950 */ /* 0x000fea0003c3ffff */ /*3aa0*/ BRA 0x3aa0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*3ab0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3ac0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3ad0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3ae0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3af0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3b00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3b10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3b20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3b30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3b40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3b50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3b60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*3b70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void CalcAngMom(double *AngMomx_d, double *AngMomy_d, double *AngMomz_d, double *GlobalAMx_d, double *GlobalAMy_d, double *GlobalAMz_d, double *Mh_d, double *Rho_d, double A, double Omega, double *Altitude_d, double *Altitudeh_d, double *lonlat_d, double *areasT, double *func_r_d, int num, bool DeepModel) { int id = blockIdx.x * blockDim.x + threadIdx.x; int nv = gridDim.y; int lev = blockIdx.y; if (id < num) { double AMx, AMy, AMz; double rx, ry, rz, r; //calculate control volume double zup, zlow, Vol; zup = Altitudeh_d[lev + 1] + A; zlow = Altitudeh_d[lev] + A; if (DeepModel) { Vol = areasT[id] / pow(A, 2) * (pow(zup, 3) - pow(zlow, 3)) / 3; } else { Vol = areasT[id] * (zup - zlow); } //radius vector r = (A + Altitude_d[lev]); rx = r * func_r_d[id * 3 + 0]; ry = r * func_r_d[id * 3 + 1]; rz = r * func_r_d[id * 3 + 2]; //angular momentum r x p (total x and y over globe should ~ 0, z ~ const) AMx = ry * Mh_d[id * 3 * nv + lev * 3 + 2] - rz * Mh_d[id * 3 * nv + lev * 3 + 1] - Rho_d[id * nv + lev] * Omega * r * rz * cos(lonlat_d[id * 2 + 1]) * cos(lonlat_d[id * 2]); AMy = -rx * Mh_d[id * 3 * nv + lev * 3 + 2] + rz * Mh_d[id * 3 * nv + lev * 3 + 0] - Rho_d[id * nv + lev] * Omega * r * rz * cos(lonlat_d[id * 2 + 1]) * sin(lonlat_d[id * 2]); AMz = rx * Mh_d[id * 3 * nv + lev * 3 + 1] - ry * Mh_d[id * 3 * nv + lev * 3 + 0] + Rho_d[id * nv + lev] * Omega * r * r * cos(lonlat_d[id * 2 + 1]) * cos(lonlat_d[id * 2 + 1]); //AMx, AMy should go to zero when integrated over globe // (but in practice, are just much smaller than AMz) //total in control volume AngMomx_d[id * nv + lev] = AMx * Vol; AngMomy_d[id * nv + lev] = AMy * Vol; AngMomz_d[id * nv + lev] = AMz * Vol; } }
.text .file "CalcAngMom.hip" .globl _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib # -- Begin function _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .type _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib,@function _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib: # @_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $272, %rsp # imm = 0x110 .cfi_def_cfa_offset 320 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movb 384(%rsp), %al leaq 88(%rsp), %r10 movq %rdi, (%r10) leaq 80(%rsp), %rdi movq %rsi, (%rdi) leaq 72(%rsp), %rsi movq %rdx, (%rsi) leaq 64(%rsp), %rdx movq %rcx, (%rdx) leaq 56(%rsp), %rcx movq %r8, (%rcx) leaq 48(%rsp), %r8 movq %r9, (%r8) leaq 40(%rsp), %r9 movsd %xmm0, (%r9) leaq 32(%rsp), %r11 movsd %xmm1, (%r11) leaq 15(%rsp), %r14 movb %al, (%r14) leaq 128(%rsp), %rbx movq %r10, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 320(%rsp), %rax movq %rax, 48(%rbx) leaq 328(%rsp), %rax movq %rax, 56(%rbx) movq %r9, 64(%rbx) movq %r11, 72(%rbx) leaq 336(%rsp), %rax movq %rax, 80(%rbx) leaq 344(%rsp), %rax movq %rax, 88(%rbx) leaq 352(%rsp), %rax movq %rax, 96(%rbx) leaq 360(%rsp), %rax movq %rax, 104(%rbx) leaq 368(%rsp), %rax movq %rax, 112(%rbx) leaq 376(%rsp), %rax movq %rax, 120(%rbx) movq %r14, 128(%rbx) leaq 112(%rsp), %r14 leaq 96(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $288, %rsp # imm = 0x120 .cfi_adjust_cfa_offset -288 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, .Lfunc_end0-_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib,@object # @_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .section .rodata,"a",@progbits .globl _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .p2align 3, 0x0 _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib: .quad _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .size _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib" .size .L__unnamed_1, 45 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib ; -- Begin function _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .globl _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .p2align 8 .type _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib,@function _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib: ; @_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib ; %bb.0: s_clause 0x1 s_load_b32 s6, s[0:1], 0x8c s_load_b64 s[4:5], s[0:1], 0x78 s_add_u32 s2, s0, 0x80 s_addc_u32 s3, s1, 0 s_waitcnt lgkmcnt(0) s_and_b32 s6, s6, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s14, s6, v[0:1] v_cmp_gt_i32_e32 vcc_lo, s4, v1 s_and_saveexec_b32 s4, vcc_lo s_cbranch_execz .LBB0_31 ; %bb.1: s_mov_b32 s24, s15 s_load_b512 s[8:23], s[0:1], 0x30 v_ashrrev_i32_e32 v2, 31, v1 s_ashr_i32 s25, s24, 31 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 3, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s22, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo s_lshl_b64 s[22:23], s[24:25], 3 s_and_b32 s25, s5, 1 s_add_u32 s4, s18, s22 global_load_b64 v[2:3], v[2:3], off s_addc_u32 s5, s19, s23 s_cmp_eq_u32 s25, 0 s_load_b128 s[4:7], s[4:5], 0x0 s_waitcnt lgkmcnt(0) v_add_f64 v[6:7], s[6:7], s[12:13] v_add_f64 v[4:5], s[4:5], s[12:13] s_mov_b32 s4, 0 s_cbranch_scc0 .LBB0_3 ; %bb.2: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_f64 v[8:9], v[6:7], -v[4:5] s_waitcnt vmcnt(0) v_mul_f64 v[8:9], v[8:9], v[2:3] s_branch .LBB0_4 .LBB0_3: s_mov_b32 s4, -1 ; implicit-def: $vgpr8_vgpr9 .LBB0_4: ; %Flow191 s_load_b32 s18, s[2:3], 0x4 s_and_not1_b32 vcc_lo, exec_lo, s4 s_cbranch_vccnz .LBB0_6 ; %bb.5: v_frexp_mant_f64_e64 v[8:9], |s[12:13]| s_mov_b32 s4, 0x55555555 s_mov_b32 s5, 0x3fe55555 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_frexp_mant_f64_e64 v[18:19], |v[6:7]| v_frexp_mant_f64_e64 v[24:25], |v[4:5]| s_mov_b32 s6, 0x968915a9 s_mov_b32 s26, 0x4222de17 s_mov_b32 s7, 0x3fba6564 s_mov_b32 s27, 0x3fbdee67 s_mov_b32 s28, 0x3abe935a s_mov_b32 s29, 0x3fbe25e4 s_mov_b32 s30, 0x47e6c9c2 s_mov_b32 s31, 0x3fc110ef s_mov_b32 s34, 0xcfa74449 s_mov_b32 s35, 0x3fc3b13b s_mov_b32 s36, 0x71bf3c30 s_mov_b32 s37, 0x3fc745d1 s_mov_b32 s38, 0x1c7792ce s_mov_b32 s39, 0x3fcc71c7 s_mov_b32 s40, 0x924920da s_mov_b32 s41, 0x3fd24924 s_mov_b32 s42, 0x9999999c s_mov_b32 s43, 0x3fd99999 s_mov_b32 s44, 0x55555511 s_mov_b32 s45, 0x3fc55555 s_mov_b32 s46, 11 s_mov_b32 s47, 0x3fe00000 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_gt_f64_e32 vcc_lo, s[4:5], v[8:9] v_cmp_gt_f64_e64 s2, s[4:5], v[18:19] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_gt_f64_e64 s3, s[4:5], v[24:25] v_cndmask_b32_e64 v0, 0, 1, vcc_lo v_ldexp_f64 v[14:15], v[8:9], v0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v0, 0, 1, s2 v_ldexp_f64 v[18:19], v[18:19], v0 v_cndmask_b32_e64 v0, 0, 1, s3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_ldexp_f64 v[24:25], v[24:25], v0 v_frexp_exp_i32_f64_e32 v0, s[12:13] v_add_f64 v[16:17], v[14:15], 1.0 v_add_f64 v[12:13], v[14:15], -1.0 v_add_f64 v[26:27], v[24:25], 1.0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo v_cvt_f64_i32_e32 v[56:57], v0 v_frexp_exp_i32_f64_e32 v0, v[6:7] v_rcp_f64_e32 v[8:9], v[16:17] v_add_f64 v[20:21], v[16:17], -1.0 v_rcp_f64_e32 v[32:33], v[26:27] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_subrev_co_ci_u32_e64 v0, vcc_lo, 0, v0, s2 v_add_f64 v[14:15], v[14:15], -v[20:21] s_waitcnt_depctr 0xfff v_fma_f64 v[10:11], -v[16:17], v[8:9], 1.0 v_add_f64 v[20:21], v[18:19], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9] v_fma_f64 v[10:11], -v[16:17], v[8:9], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[10:11], v[10:11], v[8:9], v[8:9] v_mul_f64 v[8:9], v[12:13], v[10:11] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[22:23], v[16:17], v[8:9] v_fma_f64 v[16:17], v[8:9], v[16:17], -v[22:23] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[14:15], v[8:9], v[14:15], v[16:17] v_rcp_f64_e32 v[16:17], v[20:21] v_add_f64 v[28:29], v[22:23], v[14:15] s_waitcnt_depctr 0xfff v_fma_f64 v[30:31], -v[20:21], v[16:17], 1.0 v_add_f64 v[34:35], v[12:13], -v[28:29] v_add_f64 v[22:23], v[28:29], -v[22:23] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f64 v[16:17], v[30:31], v[16:17], v[16:17] v_fma_f64 v[30:31], -v[26:27], v[32:33], 1.0 v_add_f64 v[12:13], v[12:13], -v[34:35] s_delay_alu instid0(VALU_DEP_4) v_add_f64 v[14:15], v[22:23], -v[14:15] v_add_f64 v[22:23], v[18:19], -1.0 v_fma_f64 v[36:37], -v[20:21], v[16:17], 1.0 v_fma_f64 v[30:31], v[30:31], v[32:33], v[32:33] v_add_f64 v[32:33], v[24:25], -1.0 v_add_f64 v[12:13], v[12:13], -v[28:29] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[16:17], v[36:37], v[16:17], v[16:17] v_fma_f64 v[28:29], -v[26:27], v[30:31], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[12:13], v[14:15], v[12:13] v_mul_f64 v[14:15], v[22:23], v[16:17] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f64 v[28:29], v[28:29], v[30:31], v[30:31] v_add_f64 v[30:31], v[20:21], -1.0 v_add_f64 v[12:13], v[34:35], v[12:13] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f64 v[34:35], v[20:21], v[14:15] v_mul_f64 v[36:37], v[32:33], v[28:29] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_mul_f64 v[10:11], v[10:11], v[12:13] v_add_f64 v[12:13], v[18:19], -v[30:31] v_fma_f64 v[18:19], v[14:15], v[20:21], -v[34:35] v_add_f64 v[20:21], v[26:27], -1.0 v_mul_f64 v[30:31], v[26:27], v[36:37] v_add_f64 v[38:39], v[8:9], v[10:11] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[12:13], v[14:15], v[12:13], v[18:19] v_add_f64 v[18:19], v[24:25], -v[20:21] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[20:21], v[36:37], v[26:27], -v[30:31] v_add_f64 v[8:9], v[38:39], -v[8:9] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[24:25], v[34:35], v[12:13] v_fma_f64 v[18:19], v[36:37], v[18:19], v[20:21] v_mul_f64 v[20:21], v[38:39], v[38:39] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[8:9], v[10:11], -v[8:9] v_add_f64 v[10:11], v[22:23], -v[24:25] v_add_f64 v[34:35], v[24:25], -v[34:35] v_add_f64 v[26:27], v[30:31], v[18:19] v_fma_f64 v[40:41], v[38:39], v[38:39], -v[20:21] v_add_f64 v[42:43], v[8:9], v[8:9] v_add_f64 v[22:23], v[22:23], -v[10:11] v_add_f64 v[12:13], v[34:35], -v[12:13] v_add_f64 v[44:45], v[32:33], -v[26:27] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[40:41], v[38:39], v[42:43], v[40:41] v_add_f64 v[22:23], v[22:23], -v[24:25] v_add_f64 v[24:25], v[26:27], -v[30:31] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[30:31], v[32:33], -v[44:45] v_add_f64 v[32:33], v[20:21], v[40:41] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[12:13], v[12:13], v[22:23] v_add_f64 v[18:19], v[24:25], -v[18:19] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[22:23], v[30:31], -v[26:27] v_fma_f64 v[24:25], v[32:33], s[26:27], s[6:7] v_add_f64 v[20:21], v[32:33], -v[20:21] v_mul_f64 v[48:49], v[38:39], v[32:33] v_add_f64 v[10:11], v[10:11], v[12:13] v_add_f64 v[12:13], v[18:19], v[22:23] v_fma_f64 v[18:19], v[32:33], v[24:25], s[28:29] v_add_f64 v[20:21], v[40:41], -v[20:21] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f64 v[10:11], v[16:17], v[10:11] v_add_f64 v[12:13], v[44:45], v[12:13] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[16:17], v[32:33], v[18:19], s[30:31] v_add_f64 v[18:19], v[14:15], v[10:11] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_mul_f64 v[12:13], v[28:29], v[12:13] v_fma_f64 v[16:17], v[32:33], v[16:17], s[34:35] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[14:15], v[18:19], -v[14:15] v_mul_f64 v[24:25], v[18:19], v[18:19] v_add_f64 v[22:23], v[36:37], v[12:13] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[16:17], v[32:33], v[16:17], s[36:37] v_add_f64 v[10:11], v[10:11], -v[14:15] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[26:27], v[18:19], v[18:19], -v[24:25] v_add_f64 v[14:15], v[22:23], -v[36:37] v_mul_f64 v[30:31], v[22:23], v[22:23] v_fma_f64 v[16:17], v[32:33], v[16:17], s[38:39] v_add_f64 v[28:29], v[10:11], v[10:11] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[12:13], v[12:13], -v[14:15] v_fma_f64 v[14:15], v[32:33], v[16:17], s[40:41] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f64 v[16:17], v[18:19], v[28:29], v[26:27] v_fma_f64 v[26:27], v[22:23], v[22:23], -v[30:31] v_add_f64 v[28:29], v[12:13], v[12:13] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[14:15], v[32:33], v[14:15], s[42:43] v_add_f64 v[34:35], v[24:25], v[16:17] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[26:27], v[22:23], v[28:29], v[26:27] v_mul_f64 v[28:29], v[32:33], v[14:15] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f64 v[36:37], v[34:35], s[26:27], s[6:7] v_add_f64 v[24:25], v[34:35], -v[24:25] v_add_f64 v[42:43], v[30:31], v[26:27] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[40:41], v[32:33], v[14:15], -v[28:29] v_fma_f64 v[36:37], v[34:35], v[36:37], s[28:29] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[16:17], v[16:17], -v[24:25] v_fma_f64 v[44:45], v[42:43], s[26:27], s[6:7] s_mov_b32 s7, 0xbfe55555 s_mov_b32 s6, s4 s_mov_b32 s26, 0xd5df274d s_mov_b32 s27, 0x3c8543b0 v_add_f64 v[30:31], v[42:43], -v[30:31] v_fma_f64 v[14:15], v[20:21], v[14:15], v[40:41] v_fma_f64 v[36:37], v[34:35], v[36:37], s[30:31] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_fma_f64 v[40:41], v[42:43], v[44:45], s[28:29] s_mov_b32 s28, 0x6a5dcb37 s_mov_b32 s29, 0x3e5ade15 v_add_f64 v[26:27], v[26:27], -v[30:31] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[44:45], v[28:29], v[14:15] v_fma_f64 v[36:37], v[34:35], v[36:37], s[34:35] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[40:41], v[42:43], v[40:41], s[30:31] s_mov_b32 s30, 0x623fde64 s_mov_b32 s31, 0x3ec71dee v_add_f64 v[46:47], v[44:45], s[4:5] v_add_f64 v[28:29], v[44:45], -v[28:29] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[36:37], v[34:35], v[36:37], s[36:37] v_fma_f64 v[40:41], v[42:43], v[40:41], s[34:35] s_mov_b32 s34, 0x7c89e6b0 s_mov_b32 s35, 0x3efa0199 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[50:51], v[46:47], s[6:7] v_add_f64 v[14:15], v[14:15], -v[28:29] v_fma_f64 v[28:29], v[32:33], v[38:39], -v[48:49] v_fma_f64 v[36:37], v[34:35], v[36:37], s[38:39] v_fma_f64 v[40:41], v[42:43], v[40:41], s[36:37] s_mov_b32 s36, 0x14761f6e s_mov_b32 s37, 0x3f2a01a0 v_add_f64 v[44:45], v[44:45], -v[50:51] v_add_f64 v[14:15], v[14:15], s[26:27] v_fma_f64 v[28:29], v[32:33], v[8:9], v[28:29] v_fma_f64 v[32:33], v[34:35], v[36:37], s[40:41] v_ldexp_f64 v[8:9], v[8:9], 1 v_fma_f64 v[36:37], v[42:43], v[40:41], s[38:39] s_mov_b32 s38, 0x1852b7b0 s_mov_b32 s39, 0x3f56c16c v_add_f64 v[14:15], v[14:15], v[44:45] v_fma_f64 v[20:21], v[20:21], v[38:39], v[28:29] v_fma_f64 v[28:29], v[34:35], v[32:33], s[42:43] v_ldexp_f64 v[38:39], v[38:39], 1 v_fma_f64 v[32:33], v[42:43], v[36:37], s[40:41] s_mov_b32 s40, 0x11122322 s_mov_b32 s41, 0x3f811111 v_add_f64 v[36:37], v[46:47], v[14:15] v_add_f64 v[40:41], v[48:49], v[20:21] v_mul_f64 v[44:45], v[34:35], v[28:29] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_fma_f64 v[32:33], v[42:43], v[32:33], s[42:43] s_mov_b32 s42, 0x555502a1 s_mov_b32 s43, 0x3fa55555 v_add_f64 v[46:47], v[46:47], -v[36:37] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_mul_f64 v[50:51], v[40:41], v[36:37] v_fma_f64 v[24:25], v[34:35], v[28:29], -v[44:45] v_add_f64 v[48:49], v[40:41], -v[48:49] v_mul_f64 v[52:53], v[42:43], v[32:33] v_add_f64 v[14:15], v[14:15], v[46:47] v_fma_f64 v[46:47], v[40:41], v[36:37], -v[50:51] v_fma_f64 v[24:25], v[16:17], v[28:29], v[24:25] v_add_f64 v[20:21], v[20:21], -v[48:49] v_fma_f64 v[28:29], v[42:43], v[32:33], -v[52:53] v_mul_f64 v[48:49], v[22:23], v[42:43] v_fma_f64 v[14:15], v[40:41], v[14:15], v[46:47] v_add_f64 v[30:31], v[44:45], v[24:25] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[28:29], v[26:27], v[32:33], v[28:29] v_fma_f64 v[14:15], v[20:21], v[36:37], v[14:15] s_delay_alu instid0(VALU_DEP_3) v_add_f64 v[20:21], v[30:31], s[4:5] v_add_f64 v[32:33], v[30:31], -v[44:45] v_mul_f64 v[36:37], v[18:19], v[34:35] v_add_f64 v[40:41], v[52:53], v[28:29] v_add_f64 v[44:45], v[50:51], v[14:15] v_add_f64 v[46:47], v[20:21], s[6:7] v_add_f64 v[24:25], v[24:25], -v[32:33] v_fma_f64 v[32:33], v[34:35], v[18:19], -v[36:37] v_add_f64 v[54:55], v[40:41], s[4:5] v_add_f64 v[52:53], v[40:41], -v[52:53] s_mov_b32 s4, 0xfefa39ef s_mov_b32 s5, 0x3fe62e42 v_add_f64 v[58:59], v[38:39], v[44:45] v_add_f64 v[50:51], v[44:45], -v[50:51] v_add_f64 v[30:31], v[30:31], -v[46:47] v_add_f64 v[24:25], v[24:25], s[26:27] v_fma_f64 v[32:33], v[34:35], v[10:11], v[32:33] v_fma_f64 v[34:35], v[42:43], v[22:23], -v[48:49] v_add_f64 v[46:47], v[54:55], s[6:7] v_add_f64 v[28:29], v[28:29], -v[52:53] v_mul_f64 v[52:53], v[56:57], s[4:5] s_mov_b32 s6, 0x3b39803f s_mov_b32 s7, 0x3c7abc9e v_ldexp_f64 v[10:11], v[10:11], 1 v_add_f64 v[38:39], v[58:59], -v[38:39] v_add_f64 v[14:15], v[14:15], -v[50:51] v_add_f64 v[24:25], v[24:25], v[30:31] v_fma_f64 v[16:17], v[16:17], v[18:19], v[32:33] v_fma_f64 v[30:31], v[42:43], v[12:13], v[34:35] v_add_f64 v[32:33], v[40:41], -v[46:47] v_add_f64 v[28:29], v[28:29], s[26:27] v_fma_f64 v[34:35], v[56:57], s[4:5], -v[52:53] v_ldexp_f64 v[18:19], v[18:19], 1 v_ldexp_f64 v[12:13], v[12:13], 1 s_mov_b32 s26, 0xfca7ab0c s_mov_b32 s27, 0x3e928af3 v_add_f64 v[38:39], v[44:45], -v[38:39] v_add_f64 v[8:9], v[8:9], v[14:15] v_add_f64 v[14:15], v[20:21], v[24:25] v_add_f64 v[40:41], v[36:37], v[16:17] v_fma_f64 v[26:27], v[26:27], v[22:23], v[30:31] v_ldexp_f64 v[22:23], v[22:23], 1 v_add_f64 v[28:29], v[28:29], v[32:33] v_fma_f64 v[30:31], v[56:57], s[6:7], v[34:35] v_add_f64 v[8:9], v[8:9], v[38:39] v_add_f64 v[20:21], v[20:21], -v[14:15] v_mul_f64 v[32:33], v[40:41], v[14:15] v_add_f64 v[38:39], v[48:49], v[26:27] v_add_f64 v[36:37], v[40:41], -v[36:37] v_add_f64 v[34:35], v[54:55], v[28:29] v_add_f64 v[42:43], v[52:53], v[30:31] v_add_f64 v[44:45], v[58:59], v[8:9] v_add_f64 v[20:21], v[24:25], v[20:21] v_fma_f64 v[24:25], v[40:41], v[14:15], -v[32:33] v_add_f64 v[16:17], v[16:17], -v[36:37] v_add_f64 v[46:47], v[54:55], -v[34:35] v_mul_f64 v[50:51], v[38:39], v[34:35] v_add_f64 v[54:55], v[42:43], v[44:45] v_fma_f64 v[20:21], v[40:41], v[20:21], v[24:25] v_add_f64 v[24:25], v[38:39], -v[48:49] v_add_f64 v[28:29], v[28:29], v[46:47] v_fma_f64 v[36:37], v[38:39], v[34:35], -v[50:51] v_add_f64 v[40:41], v[54:55], -v[42:43] v_fma_f64 v[14:15], v[16:17], v[14:15], v[20:21] v_add_f64 v[16:17], v[26:27], -v[24:25] v_add_f64 v[24:25], v[42:43], -v[52:53] v_add_f64 v[26:27], v[44:45], -v[58:59] v_fma_f64 v[20:21], v[38:39], v[28:29], v[36:37] v_add_f64 v[28:29], v[54:55], -v[40:41] v_add_f64 v[36:37], v[32:33], v[14:15] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[8:9], v[8:9], -v[26:27] v_fma_f64 v[16:17], v[16:17], v[34:35], v[20:21] v_add_f64 v[20:21], v[30:31], -v[24:25] v_add_f64 v[24:25], v[44:45], -v[40:41] v_frexp_exp_i32_f64_e32 v40, v[4:5] v_add_f64 v[26:27], v[42:43], -v[28:29] v_cvt_f64_i32_e32 v[28:29], v0 v_add_f64 v[30:31], v[18:19], v[36:37] v_add_f64 v[32:33], v[36:37], -v[32:33] v_add_f64 v[34:35], v[50:51], v[16:17] v_add_f64 v[38:39], v[20:21], v[8:9] v_subrev_co_ci_u32_e64 v0, vcc_lo, 0, v40, s3 s_mov_b32 s2, 0x652b82fe s_mov_b32 s3, 0x3ff71547 v_add_f64 v[24:25], v[24:25], v[26:27] v_mul_f64 v[26:27], v[28:29], s[4:5] v_add_f64 v[18:19], v[30:31], -v[18:19] v_add_f64 v[14:15], v[14:15], -v[32:33] v_cvt_f64_i32_e32 v[32:33], v0 v_add_f64 v[40:41], v[22:23], v[34:35] v_add_f64 v[42:43], v[34:35], -v[50:51] v_add_f64 v[44:45], v[38:39], -v[20:21] v_add_f64 v[24:25], v[38:39], v[24:25] v_fma_f64 v[46:47], v[28:29], s[4:5], -v[26:27] v_add_f64 v[18:19], v[36:37], -v[18:19] v_add_f64 v[10:11], v[10:11], v[14:15] v_mul_f64 v[14:15], v[32:33], s[4:5] v_add_f64 v[22:23], v[40:41], -v[22:23] v_add_f64 v[16:17], v[16:17], -v[42:43] v_add_f64 v[36:37], v[38:39], -v[44:45] v_add_f64 v[8:9], v[8:9], -v[44:45] v_add_f64 v[38:39], v[54:55], v[24:25] v_fma_f64 v[28:29], v[28:29], s[6:7], v[46:47] v_add_f64 v[10:11], v[10:11], v[18:19] v_fma_f64 v[18:19], v[32:33], s[4:5], -v[14:15] s_mov_b32 s5, 0xbfe62e42 v_add_f64 v[22:23], v[34:35], -v[22:23] v_add_f64 v[12:13], v[12:13], v[16:17] v_add_f64 v[16:17], v[20:21], -v[36:37] v_add_f64 v[20:21], v[38:39], -v[54:55] v_add_f64 v[34:35], v[26:27], v[28:29] v_add_f64 v[36:37], v[30:31], v[10:11] v_fma_f64 v[18:19], v[32:33], s[6:7], v[18:19] s_mov_b32 s7, 0xbc7abc9e v_add_f64 v[12:13], v[12:13], v[22:23] v_add_f64 v[8:9], v[8:9], v[16:17] v_add_f64 v[16:17], v[24:25], -v[20:21] v_add_f64 v[26:27], v[34:35], -v[26:27] v_add_f64 v[20:21], v[34:35], v[36:37] v_add_f64 v[22:23], v[14:15], v[18:19] v_add_f64 v[30:31], v[36:37], -v[30:31] v_add_f64 v[24:25], v[40:41], v[12:13] v_add_f64 v[8:9], v[8:9], v[16:17] v_add_f64 v[26:27], v[28:29], -v[26:27] v_add_f64 v[16:17], v[20:21], -v[34:35] v_add_f64 v[14:15], v[22:23], -v[14:15] v_add_f64 v[10:11], v[10:11], -v[30:31] v_add_f64 v[32:33], v[22:23], v[24:25] v_add_f64 v[30:31], v[24:25], -v[40:41] v_add_f64 v[42:43], v[38:39], v[8:9] v_add_f64 v[44:45], v[20:21], -v[16:17] v_add_f64 v[16:17], v[36:37], -v[16:17] v_add_f64 v[14:15], v[18:19], -v[14:15] v_add_f64 v[46:47], v[32:33], -v[22:23] v_add_f64 v[12:13], v[12:13], -v[30:31] v_add_f64 v[38:39], v[42:43], -v[38:39] v_add_f64 v[48:49], v[42:43], v[42:43] v_add_f64 v[28:29], v[34:35], -v[44:45] v_add_f64 v[34:35], v[32:33], -v[46:47] v_add_f64 v[18:19], v[24:25], -v[46:47] v_add_f64 v[8:9], v[8:9], -v[38:39] v_fma_f64 v[36:37], v[42:43], 2.0, -v[48:49] v_add_f64 v[38:39], v[26:27], v[10:11] v_cmp_class_f64_e64 vcc_lo, v[48:49], 0x204 v_add_f64 v[16:17], v[16:17], v[28:29] v_add_f64 v[28:29], v[14:15], v[12:13] v_add_f64 v[22:23], v[22:23], -v[34:35] v_fma_f64 v[8:9], v[8:9], 2.0, v[36:37] v_add_f64 v[24:25], v[38:39], -v[26:27] v_add_f64 v[16:17], v[38:39], v[16:17] v_add_f64 v[36:37], v[28:29], -v[14:15] v_add_f64 v[18:19], v[18:19], v[22:23] v_add_f64 v[22:23], v[48:49], v[8:9] v_add_f64 v[30:31], v[38:39], -v[24:25] v_add_f64 v[10:11], v[10:11], -v[24:25] v_add_f64 v[34:35], v[20:21], v[16:17] v_add_f64 v[12:13], v[12:13], -v[36:37] v_add_f64 v[18:19], v[28:29], v[18:19] v_dual_cndmask_b32 v39, v23, v49 :: v_dual_cndmask_b32 v38, v22, v48 v_add_f64 v[24:25], v[26:27], -v[30:31] v_add_f64 v[20:21], v[34:35], -v[20:21] v_add_f64 v[26:27], v[28:29], -v[36:37] v_add_f64 v[22:23], v[22:23], -v[48:49] v_mul_f64 v[40:41], v[38:39], s[2:3] v_add_f64 v[28:29], v[32:33], v[18:19] v_add_f64 v[10:11], v[10:11], v[24:25] v_add_f64 v[16:17], v[16:17], -v[20:21] v_add_f64 v[14:15], v[14:15], -v[26:27] v_add_f64 v[8:9], v[8:9], -v[22:23] v_rndne_f64_e32 v[30:31], v[40:41] v_add_f64 v[20:21], v[28:29], -v[32:33] v_add_f64 v[10:11], v[10:11], v[16:17] v_add_f64 v[12:13], v[12:13], v[14:15] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[24:25], v[30:31], s[4:5], v[38:39] v_add_f64 v[14:15], v[18:19], -v[20:21] v_cvt_i32_f64_e32 v0, v[30:31] v_add_f64 v[18:19], v[34:35], v[10:11] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[16:17], v[30:31], s[6:7], v[24:25] v_add_f64 v[12:13], v[12:13], v[14:15] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[20:21], v[18:19], -v[34:35] v_mul_f64 v[24:25], 0x40080000, v[18:19] v_fma_f64 v[14:15], v[16:17], s[28:29], s[26:27] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[26:27], v[28:29], v[12:13] v_add_f64 v[10:11], v[10:11], -v[20:21] s_delay_alu instid0(VALU_DEP_4) v_fma_f64 v[18:19], 0x40080000, v[18:19], -v[24:25] v_cmp_class_f64_e64 vcc_lo, v[24:25], 0x204 v_fma_f64 v[14:15], v[16:17], v[14:15], s[30:31] v_add_f64 v[20:21], v[26:27], -v[28:29] v_mul_f64 v[28:29], 0x40080000, v[26:27] v_fma_f64 v[10:11], 0x40080000, v[10:11], v[18:19] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[14:15], v[16:17], v[14:15], s[34:35] v_add_f64 v[12:13], v[12:13], -v[20:21] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[18:19], 0x40080000, v[26:27], -v[28:29] v_add_f64 v[20:21], v[24:25], v[10:11] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[14:15], v[16:17], v[14:15], s[36:37] v_fma_f64 v[12:13], 0x40080000, v[12:13], v[18:19] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_dual_cndmask_b32 v19, v21, v25 :: v_dual_cndmask_b32 v18, v20, v24 v_fma_f64 v[14:15], v[16:17], v[14:15], s[38:39] v_cmp_class_f64_e64 vcc_lo, v[28:29], 0x204 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_add_f64 v[32:33], v[28:29], v[12:13] v_add_f64 v[20:21], v[20:21], -v[24:25] v_mul_f64 v[26:27], v[18:19], s[2:3] v_fma_f64 v[14:15], v[16:17], v[14:15], s[40:41] v_dual_cndmask_b32 v35, v33, v29 :: v_dual_cndmask_b32 v34, v32, v28 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_rndne_f64_e32 v[26:27], v[26:27] v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[38:39]| v_add_f64 v[10:11], v[10:11], -v[20:21] v_mul_f64 v[36:37], v[34:35], s[2:3] v_cmp_nlt_f64_e64 s2, 0x40900000, v[38:39] v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[38:39] v_fma_f64 v[14:15], v[16:17], v[14:15], s[42:43] v_fma_f64 v[40:41], v[26:27], s[4:5], v[18:19] v_dual_cndmask_b32 v9, 0, v9 :: v_dual_cndmask_b32 v8, 0, v8 v_rndne_f64_e32 v[36:37], v[36:37] s_and_b32 vcc_lo, s3, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[14:15], v[16:17], v[14:15], s[44:45] v_fma_f64 v[40:41], v[26:27], s[6:7], v[40:41] s_delay_alu instid0(VALU_DEP_3) v_fma_f64 v[42:43], v[36:37], s[4:5], v[34:35] v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[18:19] v_cmp_ngt_f64_e64 s5, 0xc090cc00, v[34:35] v_fma_f64 v[14:15], v[16:17], v[14:15], s[46:47] v_fma_f64 v[44:45], v[40:41], s[28:29], s[26:27] v_fma_f64 v[42:43], v[36:37], s[6:7], v[42:43] v_cmp_class_f64_e64 s6, v[6:7], 0x204 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[14:15], v[16:17], v[14:15], 1.0 v_fma_f64 v[44:45], v[40:41], v[44:45], s[30:31] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[46:47], v[42:43], s[28:29], s[26:27] v_fma_f64 v[14:15], v[16:17], v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[16:17], v[40:41], v[44:45], s[34:35] v_fma_f64 v[30:31], v[42:43], v[46:47], s[30:31] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_ldexp_f64 v[14:15], v[14:15], v0 v_fma_f64 v[16:17], v[40:41], v[16:17], s[36:37] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[22:23], v[42:43], v[30:31], s[34:35] v_cndmask_b32_e64 v0, 0x7ff00000, v15, s2 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_cndmask_b32_e32 v30, 0, v14, vcc_lo v_cmp_neq_f64_e64 s2, 0x7ff00000, |s[12:13]| v_fma_f64 v[15:16], v[40:41], v[16:17], s[38:39] v_cndmask_b32_e64 v31, 0, v0, s3 v_cmp_neq_f64_e64 s3, s[12:13], 0 v_fma_f64 v[22:23], v[42:43], v[22:23], s[36:37] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_fma_f64 v[8:9], v[30:31], v[8:9], v[30:31] v_cmp_class_f64_e64 vcc_lo, v[30:31], 0x204 v_fma_f64 v[14:15], v[40:41], v[15:16], s[40:41] v_fma_f64 v[16:17], v[42:43], v[22:23], s[38:39] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v0, v9, v31, vcc_lo v_cndmask_b32_e32 v8, v8, v30, vcc_lo s_and_b32 vcc_lo, s3, s2 v_and_b32_e32 v0, 0x7fffffff, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v8, 0, v8, vcc_lo v_cndmask_b32_e64 v0, 0x7ff00000, v0, s2 v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[18:19]| s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e64 v9, 0, v0, s3 v_cvt_i32_f64_e32 v0, v[26:27] v_cmp_nlt_f64_e64 s3, 0x40900000, v[18:19] v_add_f64 v[18:19], v[32:33], -v[28:29] s_waitcnt vmcnt(0) v_div_scale_f64 v[22:23], null, v[8:9], v[8:9], v[2:3] v_div_scale_f64 v[20:21], vcc_lo, v[2:3], v[8:9], v[2:3] v_fma_f64 v[14:15], v[40:41], v[14:15], s[42:43] v_fma_f64 v[16:17], v[42:43], v[16:17], s[40:41] v_cndmask_b32_e64 v11, 0, v11, s2 v_cndmask_b32_e64 v10, 0, v10, s2 s_and_b32 s2, s4, s3 v_add_f64 v[12:13], v[12:13], -v[18:19] v_rcp_f64_e32 v[30:31], v[22:23] v_fma_f64 v[14:15], v[40:41], v[14:15], s[44:45] v_fma_f64 v[16:17], v[42:43], v[16:17], s[42:43] s_waitcnt_depctr 0xfff v_fma_f64 v[38:39], -v[22:23], v[30:31], 1.0 v_fma_f64 v[14:15], v[40:41], v[14:15], s[46:47] v_fma_f64 v[16:17], v[42:43], v[16:17], s[44:45] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[30:31], v[30:31], v[38:39], v[30:31] v_fma_f64 v[14:15], v[40:41], v[14:15], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[16:17], v[42:43], v[16:17], s[46:47] v_fma_f64 v[24:25], -v[22:23], v[30:31], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[14:15], v[40:41], v[14:15], 1.0 v_fma_f64 v[16:17], v[42:43], v[16:17], 1.0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[24:25], v[30:31], v[24:25], v[30:31] v_ldexp_f64 v[14:15], v[14:15], v0 v_cvt_i32_f64_e32 v0, v[36:37] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[16:17], v[42:43], v[16:17], 1.0 v_mul_f64 v[26:27], v[20:21], v[24:25] s_delay_alu instid0(VALU_DEP_4) v_cndmask_b32_e64 v30, 0x7ff00000, v15, s3 v_cmp_eq_f64_e64 s3, 0, v[6:7] v_cndmask_b32_e64 v28, 0, v14, s2 v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[34:35]| v_ldexp_f64 v[15:16], v[16:17], v0 v_cndmask_b32_e64 v29, 0, v30, s4 v_cmp_nlt_f64_e64 s4, 0x40900000, v[34:35] s_delay_alu instid0(VALU_DEP_2) v_fma_f64 v[10:11], v[28:29], v[10:11], v[28:29] s_or_b32 s6, s3, s6 s_and_b32 s3, s3, exec_lo s_cselect_b32 s7, 0, 0x7ff00000 v_cndmask_b32_e64 v13, 0, v13, s2 v_cndmask_b32_e64 v12, 0, v12, s2 s_delay_alu instid0(VALU_DEP_4) v_cndmask_b32_e64 v0, 0x7ff00000, v16, s4 v_fma_f64 v[16:17], -v[22:23], v[26:27], v[20:21] s_and_b32 s3, s5, s4 v_cmp_class_f64_e64 s2, v[28:29], 0x204 v_cndmask_b32_e64 v18, 0, v15, s3 v_cndmask_b32_e64 v19, 0, v0, s5 v_cmp_class_f64_e64 s5, v[4:5], 0x204 v_cmp_eq_f64_e64 s4, 0, v[4:5] s_delay_alu instid0(VALU_DEP_3) v_fma_f64 v[12:13], v[18:19], v[12:13], v[18:19] v_cmp_class_f64_e64 s3, v[18:19], 0x204 v_div_fmas_f64 v[14:15], v[16:17], v[24:25], v[26:27] v_cndmask_b32_e64 v4, v11, v29, s2 v_cndmask_b32_e64 v0, v10, v28, s2 s_or_b32 vcc_lo, s4, s5 s_delay_alu instid0(VALU_DEP_2) v_bfi_b32 v6, 0x7fffffff, v4, v7 s_and_b32 s2, s4, exec_lo s_cselect_b32 s2, 0, 0x7ff00000 v_cndmask_b32_e64 v4, v13, v19, s3 v_cndmask_b32_e64 v10, v12, v18, s3 v_bfi_b32 v7, 0x7fffffff, s7, v7 v_bfi_b32 v11, 0x7fffffff, s2, v5 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_bfi_b32 v12, 0x7fffffff, v4, v5 v_cndmask_b32_e64 v4, v0, 0, s6 v_cndmask_b32_e64 v5, v6, v7, s6 v_cndmask_b32_e64 v6, v10, 0, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v7, v12, v11, vcc_lo v_add_f64 v[4:5], v[4:5], -v[6:7] v_div_fixup_f64 v[2:3], v[14:15], v[8:9], v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[2:3], v[4:5], v[2:3] v_div_scale_f64 v[4:5], null, 0x40080000, 0x40080000, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f64_e32 v[6:7], v[4:5] s_waitcnt_depctr 0xfff v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0 v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0 v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7] v_div_scale_f64 v[8:9], vcc_lo, v[2:3], 0x40080000, v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f64 v[10:11], v[8:9], v[6:7] v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11] v_div_fixup_f64 v[8:9], v[4:5], 0x40080000, v[2:3] .LBB0_6: s_waitcnt vmcnt(0) v_lshlrev_b32_e32 v2, 1, v1 v_lshl_add_u32 v0, v1, 1, v1 s_load_b64 s[2:3], s[0:1], 0x70 s_mul_i32 s4, s24, 3 ; implicit-def: $vgpr54 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $vgpr14_vgpr15 s_delay_alu instid0(VALU_DEP_2) v_ashrrev_i32_e32 v3, 31, v2 s_waitcnt lgkmcnt(0) v_mad_u64_u32 v[4:5], null, v0, s18, s[4:5] s_add_u32 s4, s16, s22 s_addc_u32 s5, s17, s23 v_lshlrev_b64 v[2:3], 3, v[2:3] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v5, 31, v4 v_add_co_u32 v18, vcc_lo, s20, v2 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v19, vcc_lo, s21, v3, vcc_lo v_mad_u64_u32 v[2:3], null, v1, s18, s[24:25] v_ashrrev_i32_e32 v1, 31, v0 global_load_b64 v[24:25], v[18:19], off offset:8 v_lshlrev_b64 v[0:1], 3, v[0:1] v_ashrrev_i32_e32 v3, 31, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[10:11], 3, v[2:3] v_lshlrev_b64 v[2:3], 3, v[4:5] v_add_co_u32 v4, vcc_lo, s10, v10 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v5, vcc_lo, s11, v11, vcc_lo v_add_co_u32 v0, vcc_lo, s2, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo v_add_co_u32 v28, vcc_lo, s8, v2 v_add_co_ci_u32_e32 v29, vcc_lo, s9, v3, vcc_lo global_load_b64 v[26:27], v[4:5], off s_clause 0x1 global_load_b64 v[16:17], v[0:1], off offset:16 global_load_b128 v[4:7], v[0:1], off global_load_b128 v[0:3], v[28:29], off offset:8 s_waitcnt vmcnt(4) v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[24:25]| v_trig_preop_f64 v[34:35], |v[24:25]|, 0 v_trig_preop_f64 v[32:33], |v[24:25]|, 1 v_ldexp_f64 v[36:37], |v[24:25]|, 0xffffff80 v_trig_preop_f64 v[30:31], |v[24:25]|, 2 v_and_b32_e32 v56, 0x7fffffff, v25 s_and_saveexec_b32 s2, s3 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s6, exec_lo, s2 s_cbranch_execz .LBB0_8 ; %bb.7: v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[24:25]| v_mov_b32_e32 v50, 0 s_mov_b32 s8, 0x54442d18 s_mov_b32 s9, 0x3ff921fb s_mov_b32 s10, 0x33145c07 s_mov_b32 s11, 0x3c91a626 v_cndmask_b32_e32 v13, v56, v37, vcc_lo v_cndmask_b32_e32 v12, v24, v36, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f64 v[14:15], v[34:35], v[12:13] v_mul_f64 v[20:21], v[32:33], v[12:13] v_fma_f64 v[22:23], v[34:35], v[12:13], -v[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[48:49], v[32:33], v[12:13], -v[20:21] v_add_f64 v[38:39], v[20:21], v[22:23] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[40:41], v[38:39], -v[20:21] v_add_f64 v[44:45], v[14:15], v[38:39] v_add_f64 v[42:43], v[38:39], -v[40:41] v_add_f64 v[22:23], v[22:23], -v[40:41] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_ldexp_f64 v[40:41], v[44:45], -2 v_add_f64 v[14:15], v[44:45], -v[14:15] v_add_f64 v[20:21], v[20:21], -v[42:43] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[40:41]| v_add_f64 v[14:15], v[38:39], -v[14:15] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_f64 v[20:21], v[22:23], v[20:21] v_fract_f64_e32 v[22:23], v[40:41] v_dual_cndmask_b32 v23, 0, v23 :: v_dual_cndmask_b32 v22, 0, v22 v_mul_f64 v[46:47], v[30:31], v[12:13] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ldexp_f64 v[22:23], v[22:23], 2 v_add_f64 v[42:43], v[46:47], v[48:49] v_fma_f64 v[12:13], v[30:31], v[12:13], -v[46:47] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[38:39], v[42:43], v[20:21] v_add_f64 v[40:41], v[14:15], v[38:39] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[44:45], v[40:41], v[22:23] v_add_f64 v[14:15], v[40:41], -v[14:15] v_cmp_gt_f64_e32 vcc_lo, 0, v[44:45] v_add_f64 v[44:45], v[42:43], -v[46:47] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[14:15], v[38:39], -v[14:15] v_cndmask_b32_e64 v51, 0, 0x40100000, vcc_lo v_add_f64 v[57:58], v[42:43], -v[44:45] v_add_f64 v[44:45], v[48:49], -v[44:45] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[22:23], v[22:23], v[50:51] v_add_f64 v[51:52], v[38:39], -v[42:43] v_add_f64 v[48:49], v[46:47], -v[57:58] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[53:54], v[40:41], v[22:23] v_add_f64 v[59:60], v[38:39], -v[51:52] v_add_f64 v[20:21], v[20:21], -v[51:52] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[44:45], v[44:45], v[48:49] v_cvt_i32_f64_e32 v53, v[53:54] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[42:43], v[42:43], -v[59:60] v_cvt_f64_i32_e32 v[51:52], v53 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[20:21], v[20:21], v[42:43] v_add_f64 v[22:23], v[22:23], -v[51:52] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[20:21], v[44:45], v[20:21] v_add_f64 v[42:43], v[40:41], v[22:23] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[12:13], v[12:13], v[20:21] v_add_f64 v[20:21], v[42:43], -v[22:23] v_cmp_le_f64_e32 vcc_lo, 0.5, v[42:43] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[12:13], v[14:15], v[12:13] v_add_f64 v[14:15], v[40:41], -v[20:21] v_cndmask_b32_e64 v51, 0, 0x3ff00000, vcc_lo v_add_co_ci_u32_e64 v54, s2, 0, v53, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[12:13], v[12:13], v[14:15] v_add_f64 v[14:15], v[42:43], -v[50:51] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[20:21], v[14:15], v[12:13] v_mul_f64 v[22:23], v[20:21], s[8:9] v_add_f64 v[14:15], v[20:21], -v[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[38:39], v[20:21], s[8:9], -v[22:23] v_add_f64 v[12:13], v[12:13], -v[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[14:15], v[20:21], s[10:11], v[38:39] v_fma_f64 v[14:15], v[12:13], s[8:9], v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[12:13], v[22:23], v[14:15] v_add_f64 v[20:21], v[12:13], -v[22:23] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[14:15], v[14:15], -v[20:21] .LBB0_8: ; %Flow190 s_and_not1_saveexec_b32 s2, s6 s_cbranch_execz .LBB0_10 ; %bb.9: s_mov_b32 s6, 0x6dc9c883 s_mov_b32 s7, 0x3fe45f30 s_mov_b32 s9, 0xbc91a626 v_mul_f64 v[12:13], |v[24:25]|, s[6:7] s_mov_b32 s6, 0x54442d18 s_mov_b32 s7, 0xbff921fb s_mov_b32 s8, 0x33145c00 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f64_e32 v[20:21], v[12:13] v_fma_f64 v[12:13], v[20:21], s[6:7], |v[24:25]| v_mul_f64 v[14:15], v[20:21], s[8:9] s_mov_b32 s6, 0x252049c0 s_mov_b32 s7, 0xb97b839a v_cvt_i32_f64_e32 v54, v[20:21] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[38:39], v[20:21], s[8:9], v[12:13] v_add_f64 v[22:23], v[12:13], v[14:15] s_mov_b32 s9, 0x3c91a626 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[12:13], v[12:13], -v[22:23] v_add_f64 v[22:23], v[22:23], -v[38:39] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[12:13], v[12:13], v[14:15] v_fma_f64 v[14:15], v[20:21], s[8:9], v[14:15] v_add_f64 v[12:13], v[22:23], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[12:13], v[12:13], -v[14:15] v_fma_f64 v[14:15], v[20:21], s[6:7], v[12:13] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[12:13], v[38:39], v[14:15] v_add_f64 v[22:23], v[12:13], -v[38:39] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[14:15], v[14:15], -v[22:23] .LBB0_10: ; %_ZL3cosd.exit s_or_b32 exec_lo, exec_lo, s2 global_load_b64 v[20:21], v[18:19], off ; implicit-def: $vgpr55 ; implicit-def: $vgpr18_vgpr19 ; implicit-def: $vgpr22_vgpr23 s_waitcnt vmcnt(0) v_cmp_ngt_f64_e64 s6, 0x41d00000, |v[20:21]| v_trig_preop_f64 v[50:51], |v[20:21]|, 0 v_trig_preop_f64 v[48:49], |v[20:21]|, 1 v_ldexp_f64 v[52:53], |v[20:21]|, 0xffffff80 v_trig_preop_f64 v[46:47], |v[20:21]|, 2 v_and_b32_e32 v59, 0x7fffffff, v21 s_and_saveexec_b32 s2, s6 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s7, exec_lo, s2 s_cbranch_execz .LBB0_12 ; %bb.11: v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[20:21]| v_mov_b32_e32 v66, 0 s_mov_b32 s8, 0x54442d18 s_mov_b32 s9, 0x3ff921fb s_mov_b32 s10, 0x33145c07 s_mov_b32 s11, 0x3c91a626 v_dual_cndmask_b32 v19, v59, v53 :: v_dual_cndmask_b32 v18, v20, v52 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mul_f64 v[22:23], v[50:51], v[18:19] v_mul_f64 v[38:39], v[48:49], v[18:19] v_mul_f64 v[62:63], v[46:47], v[18:19] v_fma_f64 v[40:41], v[50:51], v[18:19], -v[22:23] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[64:65], v[48:49], v[18:19], -v[38:39] v_fma_f64 v[18:19], v[46:47], v[18:19], -v[62:63] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[42:43], v[38:39], v[40:41] v_add_f64 v[44:45], v[42:43], -v[38:39] v_add_f64 v[60:61], v[22:23], v[42:43] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[57:58], v[42:43], -v[44:45] v_add_f64 v[40:41], v[40:41], -v[44:45] v_ldexp_f64 v[44:45], v[60:61], -2 v_add_f64 v[22:23], v[60:61], -v[22:23] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[38:39], v[38:39], -v[57:58] v_add_f64 v[57:58], v[62:63], v[64:65] v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[44:45]| s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[22:23], v[42:43], -v[22:23] v_add_f64 v[38:39], v[40:41], v[38:39] v_fract_f64_e32 v[40:41], v[44:45] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[42:43], v[57:58], v[38:39] v_dual_cndmask_b32 v41, 0, v41 :: v_dual_cndmask_b32 v40, 0, v40 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_ldexp_f64 v[40:41], v[40:41], 2 v_add_f64 v[44:45], v[22:23], v[42:43] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[60:61], v[44:45], v[40:41] v_add_f64 v[22:23], v[44:45], -v[22:23] v_cmp_gt_f64_e32 vcc_lo, 0, v[60:61] v_add_f64 v[60:61], v[57:58], -v[62:63] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[22:23], v[42:43], -v[22:23] v_cndmask_b32_e64 v67, 0, 0x40100000, vcc_lo v_add_f64 v[71:72], v[57:58], -v[60:61] v_add_f64 v[60:61], v[64:65], -v[60:61] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[40:41], v[40:41], v[66:67] v_add_f64 v[67:68], v[42:43], -v[57:58] v_add_f64 v[64:65], v[62:63], -v[71:72] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[69:70], v[44:45], v[40:41] v_add_f64 v[73:74], v[42:43], -v[67:68] v_add_f64 v[38:39], v[38:39], -v[67:68] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[60:61], v[60:61], v[64:65] v_cvt_i32_f64_e32 v55, v[69:70] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[57:58], v[57:58], -v[73:74] v_cvt_f64_i32_e32 v[67:68], v55 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[38:39], v[38:39], v[57:58] v_add_f64 v[40:41], v[40:41], -v[67:68] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[38:39], v[60:61], v[38:39] v_add_f64 v[57:58], v[44:45], v[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[18:19], v[18:19], v[38:39] v_add_f64 v[38:39], v[57:58], -v[40:41] v_cmp_le_f64_e32 vcc_lo, 0.5, v[57:58] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[18:19], v[22:23], v[18:19] v_add_f64 v[22:23], v[44:45], -v[38:39] v_cndmask_b32_e64 v67, 0, 0x3ff00000, vcc_lo v_add_co_ci_u32_e64 v55, s2, 0, v55, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[18:19], v[18:19], v[22:23] v_add_f64 v[22:23], v[57:58], -v[66:67] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[38:39], v[22:23], v[18:19] v_mul_f64 v[40:41], v[38:39], s[8:9] v_add_f64 v[22:23], v[38:39], -v[22:23] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[42:43], v[38:39], s[8:9], -v[40:41] v_add_f64 v[18:19], v[18:19], -v[22:23] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[22:23], v[38:39], s[10:11], v[42:43] v_fma_f64 v[22:23], v[18:19], s[8:9], v[22:23] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[18:19], v[40:41], v[22:23] v_add_f64 v[38:39], v[18:19], -v[40:41] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[22:23], v[22:23], -v[38:39] .LBB0_12: ; %Flow189 s_and_not1_saveexec_b32 s2, s7 s_cbranch_execz .LBB0_14 ; %bb.13: s_mov_b32 s8, 0x6dc9c883 s_mov_b32 s9, 0x3fe45f30 s_mov_b32 s11, 0xbc91a626 v_mul_f64 v[18:19], |v[20:21]|, s[8:9] s_mov_b32 s8, 0x54442d18 s_mov_b32 s9, 0xbff921fb s_mov_b32 s10, 0x33145c00 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f64_e32 v[38:39], v[18:19] v_fma_f64 v[18:19], v[38:39], s[8:9], |v[20:21]| v_mul_f64 v[22:23], v[38:39], s[10:11] s_mov_b32 s8, 0x252049c0 s_mov_b32 s9, 0xb97b839a v_cvt_i32_f64_e32 v55, v[38:39] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[42:43], v[38:39], s[10:11], v[18:19] v_add_f64 v[40:41], v[18:19], v[22:23] s_mov_b32 s11, 0x3c91a626 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[18:19], v[18:19], -v[40:41] v_add_f64 v[40:41], v[40:41], -v[42:43] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[18:19], v[18:19], v[22:23] v_fma_f64 v[22:23], v[38:39], s[10:11], v[22:23] v_add_f64 v[18:19], v[40:41], v[18:19] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[18:19], v[18:19], -v[22:23] v_fma_f64 v[22:23], v[38:39], s[8:9], v[18:19] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[18:19], v[42:43], v[22:23] v_add_f64 v[40:41], v[18:19], -v[42:43] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[22:23], v[22:23], -v[40:41] .LBB0_14: ; %_ZL3cosd.exit128 s_or_b32 exec_lo, exec_lo, s2 global_load_b64 v[28:29], v[28:29], off ; implicit-def: $vgpr57 ; implicit-def: $vgpr38_vgpr39 ; implicit-def: $vgpr40_vgpr41 s_and_saveexec_b32 s2, s3 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s7, exec_lo, s2 s_cbranch_execz .LBB0_16 ; %bb.15: v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[24:25]| v_mov_b32_e32 v70, 0 s_mov_b32 s8, 0x54442d18 s_mov_b32 s9, 0x3ff921fb s_mov_b32 s10, 0x33145c07 s_mov_b32 s11, 0x3c91a626 v_cndmask_b32_e32 v39, v56, v37, vcc_lo v_cndmask_b32_e32 v38, v24, v36, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f64 v[40:41], v[34:35], v[38:39] v_mul_f64 v[42:43], v[32:33], v[38:39] v_fma_f64 v[44:45], v[34:35], v[38:39], -v[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[68:69], v[32:33], v[38:39], -v[42:43] v_add_f64 v[57:58], v[42:43], v[44:45] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[60:61], v[57:58], -v[42:43] v_add_f64 v[64:65], v[40:41], v[57:58] v_add_f64 v[62:63], v[57:58], -v[60:61] v_add_f64 v[44:45], v[44:45], -v[60:61] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_ldexp_f64 v[60:61], v[64:65], -2 v_add_f64 v[40:41], v[64:65], -v[40:41] v_add_f64 v[42:43], v[42:43], -v[62:63] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[60:61]| v_add_f64 v[40:41], v[57:58], -v[40:41] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_f64 v[42:43], v[44:45], v[42:43] v_fract_f64_e32 v[44:45], v[60:61] v_dual_cndmask_b32 v45, 0, v45 :: v_dual_cndmask_b32 v44, 0, v44 v_mul_f64 v[66:67], v[30:31], v[38:39] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ldexp_f64 v[44:45], v[44:45], 2 v_add_f64 v[62:63], v[66:67], v[68:69] v_fma_f64 v[38:39], v[30:31], v[38:39], -v[66:67] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[57:58], v[62:63], v[42:43] v_add_f64 v[60:61], v[40:41], v[57:58] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[64:65], v[60:61], v[44:45] v_add_f64 v[40:41], v[60:61], -v[40:41] v_cmp_gt_f64_e32 vcc_lo, 0, v[64:65] v_add_f64 v[64:65], v[62:63], -v[66:67] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[40:41], v[57:58], -v[40:41] v_cndmask_b32_e64 v71, 0, 0x40100000, vcc_lo v_add_f64 v[75:76], v[62:63], -v[64:65] v_add_f64 v[64:65], v[68:69], -v[64:65] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[44:45], v[44:45], v[70:71] v_add_f64 v[71:72], v[57:58], -v[62:63] v_add_f64 v[68:69], v[66:67], -v[75:76] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[73:74], v[60:61], v[44:45] v_add_f64 v[77:78], v[57:58], -v[71:72] v_add_f64 v[42:43], v[42:43], -v[71:72] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[64:65], v[64:65], v[68:69] v_cvt_i32_f64_e32 v73, v[73:74] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[62:63], v[62:63], -v[77:78] v_cvt_f64_i32_e32 v[71:72], v73 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[42:43], v[42:43], v[62:63] v_add_f64 v[44:45], v[44:45], -v[71:72] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[42:43], v[64:65], v[42:43] v_add_f64 v[62:63], v[60:61], v[44:45] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[38:39], v[38:39], v[42:43] v_add_f64 v[42:43], v[62:63], -v[44:45] v_cmp_le_f64_e32 vcc_lo, 0.5, v[62:63] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[38:39], v[40:41], v[38:39] v_add_f64 v[40:41], v[60:61], -v[42:43] v_cndmask_b32_e64 v71, 0, 0x3ff00000, vcc_lo v_add_co_ci_u32_e64 v57, s2, 0, v73, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[38:39], v[38:39], v[40:41] v_add_f64 v[40:41], v[62:63], -v[70:71] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[42:43], v[40:41], v[38:39] v_mul_f64 v[44:45], v[42:43], s[8:9] v_add_f64 v[40:41], v[42:43], -v[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[60:61], v[42:43], s[8:9], -v[44:45] v_add_f64 v[38:39], v[38:39], -v[40:41] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[40:41], v[42:43], s[10:11], v[60:61] v_fma_f64 v[40:41], v[38:39], s[8:9], v[40:41] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[38:39], v[44:45], v[40:41] v_add_f64 v[42:43], v[38:39], -v[44:45] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[40:41], v[40:41], -v[42:43] .LBB0_16: ; %Flow188 s_and_not1_saveexec_b32 s2, s7 s_cbranch_execz .LBB0_18 ; %bb.17: s_mov_b32 s8, 0x6dc9c883 s_mov_b32 s9, 0x3fe45f30 s_mov_b32 s11, 0xbc91a626 v_mul_f64 v[38:39], |v[24:25]|, s[8:9] s_mov_b32 s8, 0x54442d18 s_mov_b32 s9, 0xbff921fb s_mov_b32 s10, 0x33145c00 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f64_e32 v[42:43], v[38:39] v_fma_f64 v[38:39], v[42:43], s[8:9], |v[24:25]| v_mul_f64 v[40:41], v[42:43], s[10:11] s_mov_b32 s8, 0x252049c0 s_mov_b32 s9, 0xb97b839a s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[57:58], v[42:43], s[10:11], v[38:39] v_add_f64 v[44:45], v[38:39], v[40:41] s_mov_b32 s11, 0x3c91a626 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[38:39], v[38:39], -v[44:45] v_add_f64 v[44:45], v[44:45], -v[57:58] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[38:39], v[38:39], v[40:41] v_fma_f64 v[40:41], v[42:43], s[10:11], v[40:41] v_add_f64 v[38:39], v[44:45], v[38:39] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[38:39], v[38:39], -v[40:41] v_fma_f64 v[40:41], v[42:43], s[8:9], v[38:39] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[38:39], v[57:58], v[40:41] v_add_f64 v[44:45], v[38:39], -v[57:58] v_cvt_i32_f64_e32 v57, v[42:43] s_delay_alu instid0(VALU_DEP_2) v_add_f64 v[40:41], v[40:41], -v[44:45] .LBB0_18: ; %_ZL3cosd.exit133 s_or_b32 exec_lo, exec_lo, s2 ; implicit-def: $vgpr58 ; implicit-def: $vgpr42_vgpr43 ; implicit-def: $vgpr44_vgpr45 s_and_saveexec_b32 s2, s6 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s6, exec_lo, s2 s_cbranch_execz .LBB0_20 ; %bb.19: v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[20:21]| v_mov_b32_e32 v68, 0 s_mov_b32 s8, 0x54442d18 s_mov_b32 s9, 0x3ff921fb s_mov_b32 s10, 0x33145c07 s_mov_b32 s11, 0x3c91a626 v_dual_cndmask_b32 v43, v59, v53 :: v_dual_cndmask_b32 v42, v20, v52 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_mul_f64 v[44:45], v[50:51], v[42:43] v_mul_f64 v[52:53], v[48:49], v[42:43] v_mul_f64 v[66:67], v[46:47], v[42:43] v_fma_f64 v[50:51], v[50:51], v[42:43], -v[44:45] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[48:49], v[48:49], v[42:43], -v[52:53] v_fma_f64 v[42:43], v[46:47], v[42:43], -v[66:67] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[58:59], v[52:53], v[50:51] v_add_f64 v[60:61], v[58:59], -v[52:53] v_add_f64 v[64:65], v[44:45], v[58:59] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[62:63], v[58:59], -v[60:61] v_add_f64 v[50:51], v[50:51], -v[60:61] v_ldexp_f64 v[60:61], v[64:65], -2 v_add_f64 v[44:45], v[64:65], -v[44:45] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[52:53], v[52:53], -v[62:63] v_add_f64 v[62:63], v[66:67], v[48:49] v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[60:61]| s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[44:45], v[58:59], -v[44:45] v_add_f64 v[50:51], v[50:51], v[52:53] v_fract_f64_e32 v[52:53], v[60:61] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[58:59], v[62:63], v[50:51] v_dual_cndmask_b32 v53, 0, v53 :: v_dual_cndmask_b32 v52, 0, v52 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_ldexp_f64 v[52:53], v[52:53], 2 v_add_f64 v[60:61], v[44:45], v[58:59] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[64:65], v[60:61], v[52:53] v_add_f64 v[44:45], v[60:61], -v[44:45] v_cmp_gt_f64_e32 vcc_lo, 0, v[64:65] v_add_f64 v[64:65], v[62:63], -v[66:67] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[44:45], v[58:59], -v[44:45] v_cndmask_b32_e64 v69, 0, 0x40100000, vcc_lo v_add_f64 v[73:74], v[62:63], -v[64:65] v_add_f64 v[48:49], v[48:49], -v[64:65] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[52:53], v[52:53], v[68:69] v_add_f64 v[69:70], v[58:59], -v[62:63] v_add_f64 v[64:65], v[66:67], -v[73:74] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[71:72], v[60:61], v[52:53] v_add_f64 v[75:76], v[58:59], -v[69:70] v_add_f64 v[50:51], v[50:51], -v[69:70] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[48:49], v[48:49], v[64:65] v_cvt_i32_f64_e32 v71, v[71:72] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[62:63], v[62:63], -v[75:76] v_cvt_f64_i32_e32 v[69:70], v71 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[50:51], v[50:51], v[62:63] v_add_f64 v[52:53], v[52:53], -v[69:70] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[46:47], v[48:49], v[50:51] v_add_f64 v[48:49], v[60:61], v[52:53] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[42:43], v[42:43], v[46:47] v_add_f64 v[46:47], v[48:49], -v[52:53] v_cmp_le_f64_e32 vcc_lo, 0.5, v[48:49] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[42:43], v[44:45], v[42:43] v_add_f64 v[44:45], v[60:61], -v[46:47] v_cndmask_b32_e64 v69, 0, 0x3ff00000, vcc_lo v_add_co_ci_u32_e64 v58, s2, 0, v71, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[42:43], v[42:43], v[44:45] v_add_f64 v[44:45], v[48:49], -v[68:69] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[46:47], v[44:45], v[42:43] v_mul_f64 v[48:49], v[46:47], s[8:9] v_add_f64 v[44:45], v[46:47], -v[44:45] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[50:51], v[46:47], s[8:9], -v[48:49] v_add_f64 v[42:43], v[42:43], -v[44:45] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[44:45], v[46:47], s[10:11], v[50:51] v_fma_f64 v[44:45], v[42:43], s[8:9], v[44:45] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[42:43], v[48:49], v[44:45] v_add_f64 v[46:47], v[42:43], -v[48:49] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[44:45], v[44:45], -v[46:47] .LBB0_20: ; %Flow187 s_and_not1_saveexec_b32 s2, s6 s_cbranch_execz .LBB0_22 ; %bb.21: s_mov_b32 s6, 0x6dc9c883 s_mov_b32 s7, 0x3fe45f30 s_mov_b32 s9, 0xbc91a626 v_mul_f64 v[42:43], |v[20:21]|, s[6:7] s_mov_b32 s6, 0x54442d18 s_mov_b32 s7, 0xbff921fb s_mov_b32 s8, 0x33145c00 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f64_e32 v[46:47], v[42:43] v_fma_f64 v[42:43], v[46:47], s[6:7], |v[20:21]| v_mul_f64 v[44:45], v[46:47], s[8:9] s_mov_b32 s6, 0x252049c0 s_mov_b32 s7, 0xb97b839a v_cvt_i32_f64_e32 v58, v[46:47] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[50:51], v[46:47], s[8:9], v[42:43] v_add_f64 v[48:49], v[42:43], v[44:45] s_mov_b32 s9, 0x3c91a626 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[42:43], v[42:43], -v[48:49] v_add_f64 v[48:49], v[48:49], -v[50:51] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[42:43], v[42:43], v[44:45] v_fma_f64 v[44:45], v[46:47], s[8:9], v[44:45] v_add_f64 v[42:43], v[48:49], v[42:43] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[42:43], v[42:43], -v[44:45] v_fma_f64 v[44:45], v[46:47], s[6:7], v[42:43] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[42:43], v[50:51], v[44:45] v_add_f64 v[48:49], v[42:43], -v[50:51] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[44:45], v[44:45], -v[48:49] .LBB0_22: ; %_ZL3sind.exit s_or_b32 exec_lo, exec_lo, s2 ; implicit-def: $vgpr60 ; implicit-def: $vgpr50_vgpr51 ; implicit-def: $vgpr52_vgpr53 s_and_saveexec_b32 s2, s3 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s6, exec_lo, s2 s_cbranch_execz .LBB0_24 ; %bb.23: v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[24:25]| v_mov_b32_e32 v71, 0 s_mov_b32 s8, 0x54442d18 s_mov_b32 s9, 0x3ff921fb s_mov_b32 s10, 0x33145c07 s_mov_b32 s11, 0x3c91a626 v_cndmask_b32_e32 v47, v56, v37, vcc_lo v_cndmask_b32_e32 v46, v24, v36, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f64 v[48:49], v[34:35], v[46:47] v_mul_f64 v[50:51], v[32:33], v[46:47] v_fma_f64 v[52:53], v[34:35], v[46:47], -v[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[69:70], v[32:33], v[46:47], -v[50:51] v_add_f64 v[59:60], v[50:51], v[52:53] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[61:62], v[59:60], -v[50:51] v_add_f64 v[65:66], v[48:49], v[59:60] v_add_f64 v[63:64], v[59:60], -v[61:62] v_add_f64 v[52:53], v[52:53], -v[61:62] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_ldexp_f64 v[61:62], v[65:66], -2 v_add_f64 v[48:49], v[65:66], -v[48:49] v_add_f64 v[50:51], v[50:51], -v[63:64] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[61:62]| v_add_f64 v[48:49], v[59:60], -v[48:49] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_f64 v[50:51], v[52:53], v[50:51] v_fract_f64_e32 v[52:53], v[61:62] v_dual_cndmask_b32 v53, 0, v53 :: v_dual_cndmask_b32 v52, 0, v52 v_mul_f64 v[67:68], v[30:31], v[46:47] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ldexp_f64 v[52:53], v[52:53], 2 v_add_f64 v[63:64], v[67:68], v[69:70] v_fma_f64 v[46:47], v[30:31], v[46:47], -v[67:68] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[59:60], v[63:64], v[50:51] v_add_f64 v[61:62], v[48:49], v[59:60] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[65:66], v[61:62], v[52:53] v_add_f64 v[48:49], v[61:62], -v[48:49] v_cmp_gt_f64_e32 vcc_lo, 0, v[65:66] v_add_f64 v[65:66], v[63:64], -v[67:68] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[48:49], v[59:60], -v[48:49] v_cndmask_b32_e64 v72, 0, 0x40100000, vcc_lo v_add_f64 v[76:77], v[63:64], -v[65:66] v_add_f64 v[65:66], v[69:70], -v[65:66] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[52:53], v[52:53], v[71:72] v_add_f64 v[72:73], v[59:60], -v[63:64] v_add_f64 v[69:70], v[67:68], -v[76:77] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[74:75], v[61:62], v[52:53] v_add_f64 v[78:79], v[59:60], -v[72:73] v_add_f64 v[50:51], v[50:51], -v[72:73] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[65:66], v[65:66], v[69:70] v_cvt_i32_f64_e32 v74, v[74:75] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[63:64], v[63:64], -v[78:79] v_cvt_f64_i32_e32 v[72:73], v74 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[50:51], v[50:51], v[63:64] v_add_f64 v[52:53], v[52:53], -v[72:73] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[50:51], v[65:66], v[50:51] v_add_f64 v[63:64], v[61:62], v[52:53] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[46:47], v[46:47], v[50:51] v_add_f64 v[50:51], v[63:64], -v[52:53] v_cmp_le_f64_e32 vcc_lo, 0.5, v[63:64] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[46:47], v[48:49], v[46:47] v_add_f64 v[48:49], v[61:62], -v[50:51] v_cndmask_b32_e64 v72, 0, 0x3ff00000, vcc_lo v_add_co_ci_u32_e64 v60, s2, 0, v74, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[46:47], v[46:47], v[48:49] v_add_f64 v[48:49], v[63:64], -v[71:72] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[50:51], v[48:49], v[46:47] v_mul_f64 v[52:53], v[50:51], s[8:9] v_add_f64 v[48:49], v[50:51], -v[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[61:62], v[50:51], s[8:9], -v[52:53] v_add_f64 v[46:47], v[46:47], -v[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[48:49], v[50:51], s[10:11], v[61:62] v_fma_f64 v[46:47], v[46:47], s[8:9], v[48:49] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[50:51], v[52:53], v[46:47] v_add_f64 v[48:49], v[50:51], -v[52:53] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[52:53], v[46:47], -v[48:49] .LBB0_24: ; %Flow185 s_and_not1_saveexec_b32 s2, s6 s_cbranch_execz .LBB0_26 ; %bb.25: s_mov_b32 s6, 0x6dc9c883 s_mov_b32 s7, 0x3fe45f30 s_mov_b32 s9, 0xbc91a626 v_mul_f64 v[46:47], |v[24:25]|, s[6:7] s_mov_b32 s6, 0x54442d18 s_mov_b32 s7, 0xbff921fb s_mov_b32 s8, 0x33145c00 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f64_e32 v[46:47], v[46:47] v_fma_f64 v[48:49], v[46:47], s[6:7], |v[24:25]| v_mul_f64 v[50:51], v[46:47], s[8:9] s_mov_b32 s6, 0x252049c0 s_mov_b32 s7, 0xb97b839a s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[59:60], v[46:47], s[8:9], v[48:49] v_add_f64 v[52:53], v[48:49], v[50:51] s_mov_b32 s9, 0x3c91a626 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[48:49], v[48:49], -v[52:53] v_add_f64 v[52:53], v[52:53], -v[59:60] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[48:49], v[48:49], v[50:51] v_fma_f64 v[50:51], v[46:47], s[8:9], v[50:51] v_add_f64 v[48:49], v[52:53], v[48:49] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[48:49], v[48:49], -v[50:51] v_fma_f64 v[48:49], v[46:47], s[6:7], v[48:49] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[50:51], v[59:60], v[48:49] v_add_f64 v[52:53], v[50:51], -v[59:60] v_cvt_i32_f64_e32 v60, v[46:47] s_delay_alu instid0(VALU_DEP_2) v_add_f64 v[52:53], v[48:49], -v[52:53] .LBB0_26: ; %_ZL3cosd.exit142 s_or_b32 exec_lo, exec_lo, s2 ; implicit-def: $vgpr59 ; implicit-def: $vgpr46_vgpr47 ; implicit-def: $vgpr48_vgpr49 s_and_saveexec_b32 s2, s3 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s3, exec_lo, s2 s_cbranch_execz .LBB0_28 ; %bb.27: v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[24:25]| v_mov_b32_e32 v71, 0 s_mov_b32 s6, 0x54442d18 s_mov_b32 s7, 0x3ff921fb s_mov_b32 s8, 0x33145c07 s_mov_b32 s9, 0x3c91a626 v_cndmask_b32_e32 v37, v56, v37, vcc_lo v_cndmask_b32_e32 v36, v24, v36, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f64 v[46:47], v[34:35], v[36:37] v_mul_f64 v[48:49], v[32:33], v[36:37] v_fma_f64 v[34:35], v[34:35], v[36:37], -v[46:47] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[32:33], v[32:33], v[36:37], -v[48:49] v_add_f64 v[61:62], v[48:49], v[34:35] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[63:64], v[61:62], -v[48:49] v_add_f64 v[67:68], v[46:47], v[61:62] v_add_f64 v[65:66], v[61:62], -v[63:64] v_add_f64 v[34:35], v[34:35], -v[63:64] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_ldexp_f64 v[63:64], v[67:68], -2 v_add_f64 v[46:47], v[67:68], -v[46:47] v_add_f64 v[48:49], v[48:49], -v[65:66] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[63:64]| v_add_f64 v[46:47], v[61:62], -v[46:47] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_f64 v[34:35], v[34:35], v[48:49] v_fract_f64_e32 v[48:49], v[63:64] v_dual_cndmask_b32 v49, 0, v49 :: v_dual_cndmask_b32 v48, 0, v48 v_mul_f64 v[69:70], v[30:31], v[36:37] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ldexp_f64 v[48:49], v[48:49], 2 v_add_f64 v[65:66], v[69:70], v[32:33] v_fma_f64 v[30:31], v[30:31], v[36:37], -v[69:70] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[61:62], v[65:66], v[34:35] v_add_f64 v[63:64], v[46:47], v[61:62] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[67:68], v[63:64], v[48:49] v_add_f64 v[36:37], v[63:64], -v[46:47] v_cmp_gt_f64_e32 vcc_lo, 0, v[67:68] v_add_f64 v[67:68], v[65:66], -v[69:70] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[36:37], v[61:62], -v[36:37] v_cndmask_b32_e64 v72, 0, 0x40100000, vcc_lo v_add_f64 v[76:77], v[65:66], -v[67:68] v_add_f64 v[32:33], v[32:33], -v[67:68] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_f64 v[48:49], v[48:49], v[71:72] v_add_f64 v[72:73], v[61:62], -v[65:66] v_add_f64 v[67:68], v[69:70], -v[76:77] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[74:75], v[63:64], v[48:49] v_add_f64 v[78:79], v[61:62], -v[72:73] v_add_f64 v[34:35], v[34:35], -v[72:73] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[32:33], v[32:33], v[67:68] v_cvt_i32_f64_e32 v56, v[74:75] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[65:66], v[65:66], -v[78:79] v_cvt_f64_i32_e32 v[72:73], v56 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[34:35], v[34:35], v[65:66] v_add_f64 v[48:49], v[48:49], -v[72:73] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[32:33], v[32:33], v[34:35] v_add_f64 v[34:35], v[63:64], v[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[30:31], v[30:31], v[32:33] v_add_f64 v[32:33], v[34:35], -v[48:49] v_cmp_le_f64_e32 vcc_lo, 0.5, v[34:35] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[30:31], v[36:37], v[30:31] v_add_f64 v[32:33], v[63:64], -v[32:33] v_cndmask_b32_e64 v72, 0, 0x3ff00000, vcc_lo v_add_co_ci_u32_e64 v59, s2, 0, v56, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[30:31], v[30:31], v[32:33] v_add_f64 v[32:33], v[34:35], -v[71:72] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[34:35], v[32:33], v[30:31] v_mul_f64 v[36:37], v[34:35], s[6:7] v_add_f64 v[32:33], v[34:35], -v[32:33] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[46:47], v[34:35], s[6:7], -v[36:37] v_add_f64 v[30:31], v[30:31], -v[32:33] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[32:33], v[34:35], s[8:9], v[46:47] v_fma_f64 v[30:31], v[30:31], s[6:7], v[32:33] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[46:47], v[36:37], v[30:31] v_add_f64 v[32:33], v[46:47], -v[36:37] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[48:49], v[30:31], -v[32:33] .LBB0_28: ; %Flow s_or_saveexec_b32 s6, s3 s_load_b64 s[2:3], s[4:5], 0x0 s_xor_b32 exec_lo, exec_lo, s6 s_cbranch_execz .LBB0_30 ; %bb.29: s_mov_b32 s4, 0x6dc9c883 s_mov_b32 s5, 0x3fe45f30 s_mov_b32 s9, 0xbc91a626 v_mul_f64 v[30:31], |v[24:25]|, s[4:5] s_mov_b32 s4, 0x54442d18 s_mov_b32 s5, 0xbff921fb s_mov_b32 s8, 0x33145c00 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_rndne_f64_e32 v[30:31], v[30:31] v_fma_f64 v[32:33], v[30:31], s[4:5], |v[24:25]| v_mul_f64 v[34:35], v[30:31], s[8:9] s_mov_b32 s4, 0x252049c0 s_mov_b32 s5, 0xb97b839a v_cvt_i32_f64_e32 v59, v[30:31] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[48:49], v[30:31], s[8:9], v[32:33] v_add_f64 v[36:37], v[32:33], v[34:35] s_mov_b32 s9, 0x3c91a626 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[32:33], v[32:33], -v[36:37] v_add_f64 v[36:37], v[36:37], -v[48:49] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_f64 v[32:33], v[32:33], v[34:35] v_fma_f64 v[34:35], v[30:31], s[8:9], v[34:35] v_add_f64 v[32:33], v[36:37], v[32:33] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[32:33], v[32:33], -v[34:35] v_fma_f64 v[32:33], v[30:31], s[4:5], v[32:33] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[46:47], v[48:49], v[32:33] v_add_f64 v[34:35], v[46:47], -v[48:49] s_delay_alu instid0(VALU_DEP_1) v_add_f64 v[48:49], v[32:33], -v[34:35] .LBB0_30: ; %_ZL3cosd.exit147 s_or_b32 exec_lo, exec_lo, s6 v_mul_f64 v[32:33], v[50:51], v[50:51] s_mov_b32 s8, 0x9037ab78 s_mov_b32 s10, 0x46cc5e42 s_mov_b32 s9, 0x3e21eeb6 s_mov_b32 s11, 0xbda907db s_waitcnt lgkmcnt(0) v_add_f64 v[30:31], s[2:3], s[12:13] s_mov_b32 s12, 0xa17f65f6 s_mov_b32 s13, 0xbe927e4f v_mul_f64 v[26:27], v[26:27], s[14:15] s_mov_b32 s14, 0x19f4ec90 s_mov_b32 s15, 0x3efa01a0 s_mov_b32 s16, 0x16c16967 s_mov_b32 s17, 0xbf56c16c s_mov_b32 s18, 0x55555555 s_mov_b32 s19, 0x3fa55555 s_mov_b32 s22, 0xb42fdfa7 s_mov_b32 s24, 0xf9a43bb8 s_mov_b32 s23, 0xbe5ae600 s_mov_b32 s25, 0x3de5e0b2 s_mov_b32 s26, 0x796cde01 s_mov_b32 s27, 0x3ec71de3 s_mov_b32 s28, 0x19e83e5c s_mov_b32 s29, 0xbf2a01a0 s_mov_b32 s30, 0x11110bb3 s_mov_b32 s31, 0x3f811111 s_mov_b32 s21, 0xbfc55555 s_mov_b32 s20, s18 v_cmp_class_f64_e64 vcc_lo, v[24:25], 0x1f8 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4) v_mul_f64 v[34:35], v[32:33], 0.5 v_fma_f64 v[63:64], v[32:33], s[10:11], s[8:9] v_mul_f64 v[16:17], v[30:31], v[16:17] v_mul_f64 v[26:27], v[30:31], v[26:27] v_add_f64 v[36:37], -v[34:35], 1.0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[63:64], v[32:33], v[63:64], s[12:13] v_mul_f64 v[24:25], v[30:31], v[26:27] v_mul_f64 v[26:27], v[16:17], v[26:27] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[61:62], -v[36:37], 1.0 v_fma_f64 v[63:64], v[32:33], v[63:64], s[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[34:35], v[61:62], -v[34:35] v_fma_f64 v[63:64], v[32:33], v[63:64], s[16:17] v_mul_f64 v[61:62], v[32:33], v[32:33] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[34:35], v[50:51], -v[52:53], v[34:35] v_fma_f64 v[63:64], v[32:33], v[63:64], s[18:19] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[34:35], v[61:62], v[63:64], v[34:35] v_mul_f64 v[61:62], v[50:51], -v[32:33] v_mul_f64 v[63:64], v[52:53], 0.5 v_add_f64 v[34:35], v[36:37], v[34:35] v_fma_f64 v[36:37], v[32:33], s[24:25], s[22:23] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[36:37], v[32:33], v[36:37], s[26:27] v_fma_f64 v[36:37], v[32:33], v[36:37], s[28:29] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[36:37], v[32:33], v[36:37], s[30:31] v_fma_f64 v[36:37], v[61:62], v[36:37], v[63:64] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[32:33], v[32:33], v[36:37], -v[52:53] v_and_b32_e32 v36, 1, v60 v_cmp_eq_u32_e64 s2, 0, v36 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[32:33], v[61:62], s[20:21], v[32:33] v_add_f64 v[32:33], v[50:51], -v[32:33] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v33, 0x80000000, v33 v_cndmask_b32_e64 v32, v32, v34, s2 v_lshlrev_b32_e32 v34, 30, v60 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v33, v33, v35, s2 v_cndmask_b32_e32 v32, 0, v32, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v34, 0x80000000, v34 v_xor_b32_e32 v33, v33, v34 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v33, 0x7ff80000, v33, vcc_lo v_mul_f64 v[24:25], v[24:25], v[32:33] v_mul_f64 v[32:33], v[38:39], v[38:39] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f64 v[34:35], v[32:33], 0.5 v_fma_f64 v[52:53], v[32:33], s[10:11], s[8:9] v_add_f64 v[36:37], -v[34:35], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[52:53], v[32:33], v[52:53], s[12:13] v_add_f64 v[50:51], -v[36:37], 1.0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[52:53], v[32:33], v[52:53], s[14:15] v_add_f64 v[34:35], v[50:51], -v[34:35] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[52:53], v[32:33], v[52:53], s[16:17] v_mul_f64 v[50:51], v[32:33], v[32:33] v_fma_f64 v[34:35], v[38:39], -v[40:41], v[34:35] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[52:53], v[32:33], v[52:53], s[18:19] v_fma_f64 v[34:35], v[50:51], v[52:53], v[34:35] v_mul_f64 v[50:51], v[38:39], -v[32:33] v_mul_f64 v[52:53], v[40:41], 0.5 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_f64 v[34:35], v[36:37], v[34:35] v_fma_f64 v[36:37], v[32:33], s[24:25], s[22:23] v_fma_f64 v[36:37], v[32:33], v[36:37], s[26:27] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[36:37], v[32:33], v[36:37], s[28:29] v_fma_f64 v[36:37], v[32:33], v[36:37], s[30:31] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[36:37], v[50:51], v[36:37], v[52:53] v_fma_f64 v[32:33], v[32:33], v[36:37], -v[40:41] v_and_b32_e32 v36, 1, v57 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_cmp_eq_u32_e64 s2, 0, v36 v_fma_f64 v[32:33], v[50:51], s[20:21], v[32:33] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[32:33], v[38:39], -v[32:33] v_xor_b32_e32 v33, 0x80000000, v33 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v32, v32, v34, s2 v_lshlrev_b32_e32 v34, 30, v57 v_cndmask_b32_e64 v33, v33, v35, s2 v_cmp_class_f64_e64 s2, v[20:21], 0x1f8 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_and_b32_e32 v34, 0x80000000, v34 v_and_b32_e32 v20, 1, v58 v_cndmask_b32_e32 v32, 0, v32, vcc_lo v_xor_b32_e32 v33, v33, v34 v_mul_f64 v[34:35], v[30:31], v[4:5] v_mul_f64 v[30:31], v[30:31], v[6:7] v_mul_f64 v[6:7], v[42:43], v[42:43] v_cmp_eq_u32_e64 s3, 0, v20 v_dual_cndmask_b32 v33, 0x7ff80000, v33 :: v_dual_lshlrev_b32 v20, 30, v58 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v20, v20, v21 v_mul_f64 v[32:33], v[26:27], v[32:33] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3) v_and_b32_e32 v20, 0x80000000, v20 v_mul_f64 v[4:5], v[34:35], v[2:3] v_mul_f64 v[36:37], v[6:7], 0.5 v_fma_f64 v[50:51], v[6:7], s[10:11], s[8:9] s_waitcnt vmcnt(0) v_fma_f64 v[4:5], v[16:17], v[28:29], -v[4:5] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_f64 v[38:39], -v[36:37], 1.0 v_fma_f64 v[50:51], v[6:7], v[50:51], s[12:13] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[40:41], -v[38:39], 1.0 v_fma_f64 v[50:51], v[6:7], v[50:51], s[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[36:37], v[40:41], -v[36:37] v_fma_f64 v[50:51], v[6:7], v[50:51], s[16:17] v_mul_f64 v[40:41], v[6:7], v[6:7] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[36:37], v[42:43], -v[44:45], v[36:37] v_fma_f64 v[50:51], v[6:7], v[50:51], s[18:19] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[36:37], v[40:41], v[50:51], v[36:37] v_mul_f64 v[40:41], v[42:43], -v[6:7] v_mul_f64 v[50:51], v[44:45], 0.5 v_add_f64 v[36:37], v[38:39], v[36:37] v_fma_f64 v[38:39], v[6:7], s[24:25], s[22:23] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[38:39], v[6:7], v[38:39], s[26:27] v_fma_f64 v[38:39], v[6:7], v[38:39], s[28:29] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[38:39], v[6:7], v[38:39], s[30:31] v_fma_f64 v[38:39], v[40:41], v[38:39], v[50:51] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[6:7], v[6:7], v[38:39], -v[44:45] v_fma_f64 v[6:7], v[40:41], s[20:21], v[6:7] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_f64 v[6:7], v[42:43], -v[6:7] v_cndmask_b32_e64 v7, v37, v7, s3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v6, v36, v6, s3 v_xor_b32_e32 v7, v7, v20 v_mul_f64 v[20:21], v[12:13], v[12:13] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v6, 0, v6, s2 v_cndmask_b32_e64 v7, 0x7ff80000, v7, s2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3) v_fma_f64 v[4:5], -v[32:33], v[6:7], v[4:5] v_mul_f64 v[6:7], v[30:31], v[28:29] v_mul_f64 v[28:29], v[20:21], 0.5 v_fma_f64 v[36:37], v[20:21], s[10:11], s[8:9] v_fma_f64 v[6:7], v[34:35], v[0:1], -v[6:7] v_mul_f64 v[0:1], v[16:17], v[0:1] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_f64 v[32:33], -v[28:29], 1.0 v_fma_f64 v[36:37], v[20:21], v[36:37], s[12:13] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_fma_f64 v[0:1], v[30:31], v[2:3], -v[0:1] v_mul_f64 v[2:3], v[18:19], v[18:19] v_add_f64 v[34:35], -v[32:33], 1.0 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[36:37], v[20:21], v[36:37], s[14:15] v_add_f64 v[28:29], v[34:35], -v[28:29] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_fma_f64 v[36:37], v[20:21], v[36:37], s[16:17] v_mul_f64 v[34:35], v[20:21], v[20:21] v_fma_f64 v[28:29], v[12:13], -v[14:15], v[28:29] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[36:37], v[20:21], v[36:37], s[18:19] v_fma_f64 v[28:29], v[34:35], v[36:37], v[28:29] v_mul_f64 v[34:35], v[12:13], -v[20:21] v_mul_f64 v[36:37], v[14:15], 0.5 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add_f64 v[28:29], v[32:33], v[28:29] v_fma_f64 v[32:33], v[20:21], s[24:25], s[22:23] v_fma_f64 v[32:33], v[20:21], v[32:33], s[26:27] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[32:33], v[20:21], v[32:33], s[28:29] v_fma_f64 v[32:33], v[20:21], v[32:33], s[30:31] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[32:33], v[34:35], v[32:33], v[36:37] v_fma_f64 v[14:15], v[20:21], v[32:33], -v[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[14:15], v[34:35], s[20:21], v[14:15] v_add_f64 v[12:13], v[12:13], -v[14:15] v_and_b32_e32 v14, 1, v54 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s3, 0, v14 v_lshlrev_b32_e32 v14, 30, v54 v_and_b32_e32 v14, 0x80000000, v14 v_xor_b32_e32 v13, 0x80000000, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v12, v12, v28, s3 v_cndmask_b32_e64 v13, v13, v29, s3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cndmask_b32_e32 v12, 0, v12, vcc_lo v_xor_b32_e32 v13, v13, v14 v_mul_f64 v[14:15], v[2:3], 0.5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v13, 0x7ff80000, v13, vcc_lo v_mul_f64 v[12:13], v[26:27], v[12:13] v_fma_f64 v[26:27], v[2:3], s[10:11], s[8:9] s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[16:17], -v[14:15], 1.0 v_fma_f64 v[26:27], v[2:3], v[26:27], s[12:13] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[20:21], -v[16:17], 1.0 v_fma_f64 v[26:27], v[2:3], v[26:27], s[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_f64 v[14:15], v[20:21], -v[14:15] v_mul_f64 v[20:21], v[2:3], v[2:3] v_fma_f64 v[26:27], v[2:3], v[26:27], s[16:17] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f64 v[14:15], v[18:19], -v[22:23], v[14:15] v_fma_f64 v[26:27], v[2:3], v[26:27], s[18:19] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[14:15], v[20:21], v[26:27], v[14:15] v_mul_f64 v[20:21], v[18:19], -v[2:3] v_mul_f64 v[26:27], v[22:23], 0.5 v_add_f64 v[14:15], v[16:17], v[14:15] v_fma_f64 v[16:17], v[2:3], s[24:25], s[22:23] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], v[2:3], v[16:17], s[26:27] v_fma_f64 v[16:17], v[2:3], v[16:17], s[28:29] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[16:17], v[2:3], v[16:17], s[30:31] v_fma_f64 v[16:17], v[20:21], v[16:17], v[26:27] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[2:3], v[2:3], v[16:17], -v[22:23] v_and_b32_e32 v16, 1, v55 v_cmp_eq_u32_e64 s3, 0, v16 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[2:3], v[20:21], s[20:21], v[2:3] v_add_f64 v[2:3], v[18:19], -v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v3, 0x80000000, v3 v_cndmask_b32_e64 v2, v2, v14, s3 v_lshlrev_b32_e32 v14, 30, v55 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v3, v3, v15, s3 v_cndmask_b32_e64 v2, 0, v2, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v14, 0x80000000, v14 v_xor_b32_e32 v3, v3, v14 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_cndmask_b32_e64 v3, 0x7ff80000, v3, s2 s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[2:3], s[0:1], 0x10 v_fma_f64 v[0:1], -v[12:13], v[2:3], v[0:1] v_mul_f64 v[2:3], v[46:47], v[46:47] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_f64 v[0:1], v[8:9], v[0:1] v_mul_f64 v[12:13], v[2:3], 0.5 v_fma_f64 v[18:19], v[2:3], s[10:11], s[8:9] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[14:15], -v[12:13], 1.0 v_fma_f64 v[18:19], v[2:3], v[18:19], s[12:13] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[16:17], -v[14:15], 1.0 v_fma_f64 v[18:19], v[2:3], v[18:19], s[14:15] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f64 v[12:13], v[16:17], -v[12:13] v_fma_f64 v[18:19], v[2:3], v[18:19], s[16:17] v_mul_f64 v[16:17], v[2:3], v[2:3] s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_fma_f64 v[12:13], v[46:47], -v[48:49], v[12:13] v_fma_f64 v[18:19], v[2:3], v[18:19], s[18:19] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_fma_f64 v[12:13], v[16:17], v[18:19], v[12:13] v_mul_f64 v[16:17], v[46:47], -v[2:3] v_mul_f64 v[18:19], v[48:49], 0.5 v_add_f64 v[12:13], v[14:15], v[12:13] v_fma_f64 v[14:15], v[2:3], s[24:25], s[22:23] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[14:15], v[2:3], v[14:15], s[26:27] v_fma_f64 v[14:15], v[2:3], v[14:15], s[28:29] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[14:15], v[2:3], v[14:15], s[30:31] v_fma_f64 v[14:15], v[16:17], v[14:15], v[18:19] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[2:3], v[2:3], v[14:15], -v[48:49] v_and_b32_e32 v14, 1, v59 v_cmp_eq_u32_e64 s0, 0, v14 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[2:3], v[16:17], s[20:21], v[2:3] v_add_f64 v[2:3], v[46:47], -v[2:3] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_xor_b32_e32 v3, 0x80000000, v3 v_cndmask_b32_e64 v2, v2, v12, s0 v_lshlrev_b32_e32 v12, 30, v59 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_cndmask_b32_e64 v3, v3, v13, s0 v_cndmask_b32_e32 v2, 0, v2, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v12, 0x80000000, v12 v_xor_b32_e32 v3, v3, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo v_fma_f64 v[2:3], v[24:25], v[2:3], v[6:7] s_waitcnt lgkmcnt(0) v_add_co_u32 v6, vcc_lo, s4, v10 v_add_co_ci_u32_e32 v7, vcc_lo, s5, v11, vcc_lo global_store_b64 v[6:7], v[0:1], off v_mul_f64 v[0:1], v[8:9], v[4:5] v_add_co_u32 v4, vcc_lo, s6, v10 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v11, vcc_lo global_store_b64 v[4:5], v[0:1], off v_mul_f64 v[0:1], v[8:9], v[2:3] v_add_co_u32 v2, vcc_lo, s2, v10 v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo global_store_b64 v[2:3], v[0:1], off .LBB0_31: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 384 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 80 .amdhsa_next_free_sgpr 48 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, .Lfunc_end0-_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 13192 ; NumSgprs: 50 ; NumVgprs: 80 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 6 ; VGPRBlocks: 9 ; NumSGPRsForWavesPerEU: 50 ; NumVGPRsForWavesPerEU: 80 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 48 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 56 .size: 8 .value_kind: global_buffer - .offset: 64 .size: 8 .value_kind: by_value - .offset: 72 .size: 8 .value_kind: by_value - .address_space: global .offset: 80 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 88 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 96 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 104 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 112 .size: 8 .value_kind: global_buffer - .offset: 120 .size: 4 .value_kind: by_value - .offset: 124 .size: 1 .value_kind: by_value - .offset: 128 .size: 4 .value_kind: hidden_block_count_x - .offset: 132 .size: 4 .value_kind: hidden_block_count_y - .offset: 136 .size: 4 .value_kind: hidden_block_count_z - .offset: 140 .size: 2 .value_kind: hidden_group_size_x - .offset: 142 .size: 2 .value_kind: hidden_group_size_y - .offset: 144 .size: 2 .value_kind: hidden_group_size_z - .offset: 146 .size: 2 .value_kind: hidden_remainder_x - .offset: 148 .size: 2 .value_kind: hidden_remainder_y - .offset: 150 .size: 2 .value_kind: hidden_remainder_z - .offset: 168 .size: 8 .value_kind: hidden_global_offset_x - .offset: 176 .size: 8 .value_kind: hidden_global_offset_y - .offset: 184 .size: 8 .value_kind: hidden_global_offset_z - .offset: 192 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 384 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib .private_segment_fixed_size: 0 .sgpr_count: 50 .sgpr_spill_count: 0 .symbol: _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 80 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
6cb7c1e840954e965c0f48843c1004bef95145e5
#include "includes.h" __global__ void box_encode_kernel(float * targets_dx, float * targets_dy, float * targets_dw, float * targets_dh, float4 * boxes, float4 * anchors, float wx, float wy, float ww, float wh, size_t gt, size_t idxJump) { int idx = blockIdx.x*blockDim.x + threadIdx.x; size_t row_offset; float anchors_x1,anchors_x2, anchors_y1, anchors_y2, boxes_x1, boxes_x2, boxes_y1, boxes_y2, ex_w, ex_h, ex_ctr_x, ex_ctr_y, gt_w, gt_h, gt_ctr_x, gt_ctr_y; for (int i=idx; i<gt; i+=idxJump){ row_offset = i; anchors_x1 = anchors[row_offset].x; anchors_y1 = anchors[row_offset].y; anchors_x2 = anchors[row_offset].z; anchors_y2 = anchors[row_offset].w; boxes_x1 = boxes[row_offset].x; boxes_y1 = boxes[row_offset].y; boxes_x2 = boxes[row_offset].z; boxes_y2 = boxes[row_offset].w; ex_w = anchors_x2 - anchors_x1 + 1; ex_h = anchors_y2 - anchors_y1 + 1; ex_ctr_x = anchors_x1 + 0.5 * ex_w; ex_ctr_y = anchors_y1 + 0.5 * ex_h; gt_w = boxes_x2 - boxes_x1 + 1; gt_h = boxes_y2 - boxes_y1 + 1; gt_ctr_x = boxes_x1 + 0.5 * gt_w; gt_ctr_y = boxes_y1 + 0.5 * gt_h; targets_dx[i] = wx * (gt_ctr_x-ex_ctr_x)/ex_w; targets_dy[i] = wy * (gt_ctr_y-ex_ctr_y)/ex_h; targets_dw[i] = ww * log(gt_w/ex_w); targets_dh[i] = wh * log(gt_h/ex_h); } }
.file "tmpxft_003683ab_00000000-6_box_encode_kernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z60__device_stub__Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmmPfS_S_S_P6float4S1_ffffmm .type _Z60__device_stub__Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmmPfS_S_S_P6float4S1_ffffmm, @function _Z60__device_stub__Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmmPfS_S_S_P6float4S1_ffffmm: .LFB2032: .cfi_startproc endbr64 subq $248, %rsp .cfi_def_cfa_offset 256 movq %rdi, 56(%rsp) leaq 88(%rsp), %rdi movq %rsi, 48(%rsp) leaq 100(%rsp), %rsi movq %rdx, 40(%rsp) leaq 72(%rsp), %rdx movq %rcx, 32(%rsp) leaq 80(%rsp), %rcx movq %r8, 24(%rsp) movq %r9, 16(%rsp) movss %xmm0, 12(%rsp) movss %xmm1, 8(%rsp) movss %xmm2, 4(%rsp) movss %xmm3, (%rsp) movq %fs:40, %rax movq %rax, 232(%rsp) xorl %eax, %eax leaq 56(%rsp), %rax movl $1, 96(%rsp) movq %rax, 136(%rsp) leaq 48(%rsp), %rax movq %rax, 144(%rsp) leaq 40(%rsp), %rax movq %rax, 152(%rsp) leaq 32(%rsp), %rax movq %rax, 160(%rsp) leaq 24(%rsp), %rax movq %rax, 168(%rsp) leaq 16(%rsp), %rax movq %rax, 176(%rsp) leaq 12(%rsp), %rax movq %rax, 184(%rsp) leaq 8(%rsp), %rax movq %rax, 192(%rsp) leaq 4(%rsp), %rax movq %rax, 200(%rsp) movq %rsp, %rax movq %rax, 208(%rsp) leaq 256(%rsp), %rax movq %rax, 216(%rsp) leaq 264(%rsp), %rax movq %rax, 224(%rsp) movabsq $4294967297, %rax movq %rax, 88(%rsp) movq %rax, 100(%rsp) movl $1, 108(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 80(%rsp) .cfi_def_cfa_offset 264 leaq _Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm(%rip), %rdi pushq 80(%rsp) .cfi_def_cfa_offset 272 movq 116(%rsp), %rcx movl 124(%rsp), %r8d movq 104(%rsp), %rsi movl 112(%rsp), %edx leaq 152(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 264 popq %rdx .cfi_def_cfa_offset 256 .L2: movq 232(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $248, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z60__device_stub__Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmmPfS_S_S_P6float4S1_ffffmm, .-_Z60__device_stub__Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmmPfS_S_S_P6float4S1_ffffmm .globl _Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm .type _Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm, @function _Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm: .LFB2033: .cfi_startproc endbr64 jmp _Z60__device_stub__Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmmPfS_S_S_P6float4S1_ffffmm .cfi_endproc .LFE2033: .size _Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm, .-_Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z17box_encode_kernelPfS_S_S_P6float4S1_ffffmm .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R12, SR_CTAID.X ; /* 0x00000000000c7919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R12, R12, c[0x0][0x0], R3 ; /* 0x000000000c0c7a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.U32.AND P0, PT, R12, c[0x0][0x1a0], PT ; /* 0x000068000c007a0c */ /* 0x000fe40003f06070 */ /*0050*/ SHF.R.S32.HI R13, RZ, 0x1f, R12 ; /* 0x0000001fff0d7819 */ /* 0x000fc8000001140c */ /*0060*/ ISETP.GE.U32.AND.EX P0, PT, R13, c[0x0][0x1a4], PT, P0 ; /* 0x000069000d007a0c */ /* 0x000fda0003f06100 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ IMAD.MOV.U32 R14, RZ, RZ, R12 ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e000c */ /*0090*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*00a0*/ IMAD.SHL.U32 R4, R14.reuse, 0x10, RZ ; /* 0x000000100e047824 */ /* 0x040fe200078e00ff */ /*00b0*/ SHF.L.U64.HI R0, R14, 0x4, R13 ; /* 0x000000040e007819 */ /* 0x000fc8000001020d */ /*00c0*/ IADD3 R8, P0, R4.reuse, c[0x0][0x188], RZ ; /* 0x0000620004087a10 */ /* 0x040fe40007f1e0ff */ /*00d0*/ IADD3 R4, P1, R4, c[0x0][0x180], RZ ; /* 0x0000600004047a10 */ /* 0x000fe40007f3e0ff */ /*00e0*/ IADD3.X R9, R0.reuse, c[0x0][0x18c], RZ, P0, !PT ; /* 0x0000630000097a10 */ /* 0x040fe400007fe4ff */ /*00f0*/ IADD3.X R5, R0, c[0x0][0x184], RZ, P1, !PT ; /* 0x0000610000057a10 */ /* 0x000fc80000ffe4ff */ /*0100*/ LDG.E.128 R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ea8000c1e1d00 */ /*0110*/ LDG.E.128 R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ee2000c1e1d00 */ /*0120*/ BSSY B0, 0x3a0 ; /* 0x0000027000007945 */ /* 0x000fe20003800000 */ /*0130*/ FADD R10, -R8, R10 ; /* 0x0000000a080a7221 */ /* 0x004fe20000000100 */ /*0140*/ F2F.F64.F32 R2, R8 ; /* 0x0000000800027310 */ /* 0x000fe20000201800 */ /*0150*/ FADD R0, -R4, R6 ; /* 0x0000000604007221 */ /* 0x008fe40000000100 */ /*0160*/ FADD R10, R10, 1 ; /* 0x3f8000000a0a7421 */ /* 0x000fe20000000000 */ /*0170*/ FADD R6, -R9, R11 ; /* 0x0000000b09067221 */ /* 0x000fe20000000100 */ /*0180*/ FADD R0, R0, 1 ; /* 0x3f80000000007421 */ /* 0x000fc60000000000 */ /*0190*/ F2F.F64.F32 R18, R4 ; /* 0x0000000400127310 */ /* 0x000fe20000201800 */ /*01a0*/ FADD R6, R6, 1 ; /* 0x3f80000006067421 */ /* 0x000fce0000000000 */ /*01b0*/ F2F.F64.F32 R16, R10 ; /* 0x0000000a00107310 */ /* 0x000e300000201800 */ /*01c0*/ F2F.F64.F32 R22, R0 ; /* 0x0000000000167310 */ /* 0x000e620000201800 */ /*01d0*/ DFMA R20, R16, 0.5, R2 ; /* 0x3fe000001014782b */ /* 0x00108e0000000002 */ /*01e0*/ MUFU.RCP R11, R10 ; /* 0x0000000a000b7308 */ /* 0x000ee20000001000 */ /*01f0*/ FADD R2, -R5, R7 ; /* 0x0000000705027221 */ /* 0x001fc80000000100 */ /*0200*/ FADD R2, R2, 1 ; /* 0x3f80000002027421 */ /* 0x000fe20000000000 */ /*0210*/ DFMA R24, R22, 0.5, R18 ; /* 0x3fe000001618782b */ /* 0x002e240000000012 */ /*0220*/ F2F.F64.F32 R16, R9 ; /* 0x0000000900107310 */ /* 0x000ff00000201800 */ /*0230*/ F2F.F32.F64 R20, R20 ; /* 0x0000001400147310 */ /* 0x004fe20000301000 */ /*0240*/ FFMA R4, -R10, R11, 1 ; /* 0x3f8000000a047423 */ /* 0x008fc8000000010b */ /*0250*/ FFMA R4, R11, R4, R11 ; /* 0x000000040b047223 */ /* 0x000fc6000000000b */ /*0260*/ F2F.F32.F64 R25, R24 ; /* 0x0000001800197310 */ /* 0x001e300000301000 */ /*0270*/ F2F.F64.F32 R18, R5 ; /* 0x0000000500127310 */ /* 0x0003f00000201800 */ /*0280*/ F2F.F64.F32 R26, R2 ; /* 0x00000002001a7310 */ /* 0x000ea20000201800 */ /*0290*/ FADD R3, -R20, R25 ; /* 0x0000001914037221 */ /* 0x001fc80000000100 */ /*02a0*/ FMUL R3, R3, c[0x0][0x190] ; /* 0x0000640003037a20 */ /* 0x000fc60000400000 */ /*02b0*/ F2F.F64.F32 R22, R6 ; /* 0x0000000600167310 */ /* 0x000e220000201800 */ /*02c0*/ FFMA R5, R3, R4, RZ ; /* 0x0000000403057223 */ /* 0x002fc800000000ff */ /*02d0*/ FFMA R11, -R10, R5, R3 ; /* 0x000000050a0b7223 */ /* 0x000fe20000000103 */ /*02e0*/ DFMA R8, R26, 0.5, R18 ; /* 0x3fe000001a08782b */ /* 0x004e640000000012 */ /*02f0*/ FCHK P0, R3, R10 ; /* 0x0000000a03007302 */ /* 0x000ea20000000000 */ /*0300*/ FFMA R11, R4, R11, R5 ; /* 0x0000000b040b7223 */ /* 0x000fe20000000005 */ /*0310*/ DFMA R16, R22, 0.5, R16 ; /* 0x3fe000001610782b */ /* 0x001e0c0000000010 */ /*0320*/ F2F.F32.F64 R8, R8 ; /* 0x0000000800087310 */ /* 0x0022f00000301000 */ /*0330*/ F2F.F32.F64 R7, R16 ; /* 0x0000001000077310 */ /* 0x0012220000301000 */ /*0340*/ @!P0 BRA 0x390 ; /* 0x0000004000008947 */ /* 0x004fea0003800000 */ /*0350*/ MOV R4, R10 ; /* 0x0000000a00047202 */ /* 0x000fe40000000f00 */ /*0360*/ MOV R16, 0x380 ; /* 0x0000038000107802 */ /* 0x002fc40000000f00 */ /*0370*/ CALL.REL.NOINC 0xb40 ; /* 0x000007c000007944 */ /* 0x009fea0003c00000 */ /*0380*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ; /* 0x000000ffff0b7224 */ /* 0x001fe400078e0003 */ /*0390*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*03a0*/ IMAD.SHL.U32 R5, R14.reuse, 0x4, RZ ; /* 0x000000040e057824 */ /* 0x040fe200078e00ff */ /*03b0*/ MUFU.RCP R9, R6 ; /* 0x0000000600097308 */ /* 0x002e620000001000 */ /*03c0*/ SHF.L.U64.HI R13, R14, 0x2, R13 ; /* 0x000000020e0d7819 */ /* 0x000fe2000001020d */ /*03d0*/ FADD R3, -R7, R8 ; /* 0x0000000807037221 */ /* 0x009fe20000000100 */ /*03e0*/ BSSY B0, 0x4f0 ; /* 0x0000010000007945 */ /* 0x000fe20003800000 */ /*03f0*/ IADD3 R14, P0, R5, c[0x0][0x160], RZ ; /* 0x00005800050e7a10 */ /* 0x000fc40007f1e0ff */ /*0400*/ FMUL R3, R3, c[0x0][0x194] ; /* 0x0000650003037a20 */ /* 0x000fe40000400000 */ /*0410*/ IADD3.X R15, R13, c[0x0][0x164], RZ, P0, !PT ; /* 0x000059000d0f7a10 */ /* 0x000fca00007fe4ff */ /*0420*/ STG.E [R14.64], R11 ; /* 0x0000000b0e007986 */ /* 0x0001e6000c101904 */ /*0430*/ FCHK P0, R3, R6 ; /* 0x0000000603007302 */ /* 0x000ea20000000000 */ /*0440*/ FFMA R4, -R6, R9, 1 ; /* 0x3f80000006047423 */ /* 0x002fc80000000109 */ /*0450*/ FFMA R4, R9, R4, R9 ; /* 0x0000000409047223 */ /* 0x000fc80000000009 */ /*0460*/ FFMA R7, R3, R4, RZ ; /* 0x0000000403077223 */ /* 0x000fc800000000ff */ /*0470*/ FFMA R8, -R6, R7, R3 ; /* 0x0000000706087223 */ /* 0x000fc80000000103 */ /*0480*/ FFMA R7, R4, R8, R7 ; /* 0x0000000804077223 */ /* 0x000fe20000000007 */ /*0490*/ @!P0 BRA 0x4e0 ; /* 0x0000004000008947 */ /* 0x004fea0003800000 */ /*04a0*/ MOV R4, R6 ; /* 0x0000000600047202 */ /* 0x001fe40000000f00 */ /*04b0*/ MOV R16, 0x4d0 ; /* 0x000004d000107802 */ /* 0x000fe40000000f00 */ /*04c0*/ CALL.REL.NOINC 0xb40 ; /* 0x0000067000007944 */ /* 0x000fea0003c00000 */ /*04d0*/ IMAD.MOV.U32 R7, RZ, RZ, R3 ; /* 0x000000ffff077224 */ /* 0x001fe400078e0003 */ /*04e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x001fea0003800000 */ /*04f0*/ MUFU.RCP R3, R10 ; /* 0x0000000a00037308 */ /* 0x000e220000001000 */ /*0500*/ IADD3 R8, P0, R5, c[0x0][0x168], RZ ; /* 0x00005a0005087a10 */ /* 0x000fe20007f1e0ff */ /*0510*/ BSSY B0, 0x600 ; /* 0x000000e000007945 */ /* 0x000fe60003800000 */ /*0520*/ IADD3.X R9, R13, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b000d097a10 */ /* 0x000fca00007fe4ff */ /*0530*/ STG.E [R8.64], R7 ; /* 0x0000000708007986 */ /* 0x0003e6000c101904 */ /*0540*/ FCHK P0, R0, R10 ; /* 0x0000000a00007302 */ /* 0x000ea20000000000 */ /*0550*/ FFMA R4, -R10, R3, 1 ; /* 0x3f8000000a047423 */ /* 0x001fc80000000103 */ /*0560*/ FFMA R14, R3, R4, R3 ; /* 0x00000004030e7223 */ /* 0x000fc80000000003 */ /*0570*/ FFMA R3, R0, R14, RZ ; /* 0x0000000e00037223 */ /* 0x000fc800000000ff */ /*0580*/ FFMA R4, -R10, R3, R0 ; /* 0x000000030a047223 */ /* 0x000fc80000000100 */ /*0590*/ FFMA R3, R14, R4, R3 ; /* 0x000000040e037223 */ /* 0x000fe20000000003 */ /*05a0*/ @!P0 BRA 0x5f0 ; /* 0x0000004000008947 */ /* 0x004fea0003800000 */ /*05b0*/ IMAD.MOV.U32 R3, RZ, RZ, R0 ; /* 0x000000ffff037224 */ /* 0x002fe200078e0000 */ /*05c0*/ MOV R4, R10 ; /* 0x0000000a00047202 */ /* 0x000fe40000000f00 */ /*05d0*/ MOV R16, 0x5f0 ; /* 0x000005f000107802 */ /* 0x000fe40000000f00 */ /*05e0*/ CALL.REL.NOINC 0xb40 ; /* 0x0000055000007944 */ /* 0x000fea0003c00000 */ /*05f0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x002fea0003800000 */ /*0600*/ IMAD.MOV.U32 R8, RZ, RZ, R3 ; /* 0x000000ffff087224 */ /* 0x001fe200078e0003 */ /*0610*/ MOV R7, 0x3e055027 ; /* 0x3e05502700077802 */ /* 0x000fe20000000f00 */ /*0620*/ BSSY B0, 0x8e0 ; /* 0x000002b000007945 */ /* 0x000fe60003800000 */ /*0630*/ FSETP.GEU.AND P0, PT, R8, 1.175494350822287508e-38, PT ; /* 0x008000000800780b */ /* 0x000fda0003f0e000 */ /*0640*/ @!P0 FMUL R8, R8, 8388608 ; /* 0x4b00000008088820 */ /* 0x000fca0000400000 */ /*0650*/ IADD3 R0, R8.reuse, -0x3f2aaaab, RZ ; /* 0xc0d5555508007810 */ /* 0x040fe40007ffe0ff */ /*0660*/ ISETP.GE.U32.AND P1, PT, R8, 0x7f800000, PT ; /* 0x7f8000000800780c */ /* 0x000fe40003f26070 */ /*0670*/ LOP3.LUT R3, R0, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000000037812 */ /* 0x000fca00078ec0ff */ /*0680*/ IMAD.IADD R0, R8, 0x1, -R3 ; /* 0x0000000108007824 */ /* 0x000fe200078e0a03 */ /*0690*/ I2FP.F32.S32 R3, R3 ; /* 0x0000000300037245 */ /* 0x000fc60000201400 */ /*06a0*/ FADD R4, R0, -1 ; /* 0xbf80000000047421 */ /* 0x000fe20000000000 */ /*06b0*/ FSEL R0, RZ, -23, P0 ; /* 0xc1b80000ff007808 */ /* 0x000fe40000000000 */ /*06c0*/ FSETP.NEU.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720b */ /* 0x000fe20003f0d000 */ /*06d0*/ FFMA R7, R4.reuse, -R7, 0.14084610342979431152 ; /* 0x3e1039f604077423 */ /* 0x040fe40000000807 */ /*06e0*/ FFMA R0, R3, 1.1920928955078125e-07, R0 ; /* 0x3400000003007823 */ /* 0x000fe20000000000 */ /*06f0*/ @P1 IMAD.MOV.U32 R3, RZ, RZ, 0x7f800000 ; /* 0x7f800000ff031424 */ /* 0x000fe200078e00ff */ /*0700*/ FFMA R7, R4, R7, -0.12148627638816833496 ; /* 0xbdf8cdcc04077423 */ /* 0x000fc80000000007 */ /*0710*/ FFMA R7, R4, R7, 0.13980610668659210205 ; /* 0x3e0f295504077423 */ /* 0x000fc80000000007 */ /*0720*/ FFMA R7, R4, R7, -0.16684235632419586182 ; /* 0xbe2ad8b904077423 */ /* 0x000fc80000000007 */ /*0730*/ FFMA R7, R4, R7, 0.20012299716472625732 ; /* 0x3e4ced0b04077423 */ /* 0x000fc80000000007 */ /*0740*/ FFMA R7, R4, R7, -0.24999669194221496582 ; /* 0xbe7fff2204077423 */ /* 0x000fc80000000007 */ /*0750*/ FFMA R7, R4, R7, 0.33333182334899902344 ; /* 0x3eaaaa7804077423 */ /* 0x000fc80000000007 */ /*0760*/ FFMA R7, R4, R7, -0.5 ; /* 0xbf00000004077423 */ /* 0x000fc80000000007 */ /*0770*/ FMUL R7, R4, R7 ; /* 0x0000000704077220 */ /* 0x000fc80000400000 */ /*0780*/ FFMA R7, R4, R7, R4 ; /* 0x0000000704077223 */ /* 0x000fc80000000004 */ /*0790*/ FFMA R0, R0, 0.69314718246459960938, R7 ; /* 0x3f31721800007823 */ /* 0x000fe20000000007 */ /*07a0*/ @P1 FFMA R0, R8, R3, +INF ; /* 0x7f80000008001423 */ /* 0x000fe20000000003 */ /*07b0*/ MUFU.RCP R7, R6 ; /* 0x0000000600077308 */ /* 0x000e220000001000 */ /*07c0*/ IADD3 R8, P1, R5, c[0x0][0x170], RZ ; /* 0x00005c0005087a10 */ /* 0x000fc60007f3e0ff */ /*07d0*/ FSEL R0, R0, -INF , P0 ; /* 0xff80000000007808 */ /* 0x000fe40000000000 */ /*07e0*/ IADD3.X R9, R13, c[0x0][0x174], RZ, P1, !PT ; /* 0x00005d000d097a10 */ /* 0x000fe40000ffe4ff */ /*07f0*/ FCHK P0, R2, R6 ; /* 0x0000000602007302 */ /* 0x000e620000000000 */ /*0800*/ FMUL R3, R0, c[0x0][0x198] ; /* 0x0000660000037a20 */ /* 0x000fca0000400000 */ /*0810*/ STG.E [R8.64], R3 ; /* 0x0000000308007986 */ /* 0x0005e2000c101904 */ /*0820*/ FFMA R0, -R6, R7, 1 ; /* 0x3f80000006007423 */ /* 0x001fc80000000107 */ /*0830*/ FFMA R4, R7, R0, R7 ; /* 0x0000000007047223 */ /* 0x000fc80000000007 */ /*0840*/ FFMA R7, R2, R4, RZ ; /* 0x0000000402077223 */ /* 0x000fc800000000ff */ /*0850*/ FFMA R0, -R6, R7, R2 ; /* 0x0000000706007223 */ /* 0x000fc80000000102 */ /*0860*/ FFMA R0, R4, R0, R7 ; /* 0x0000000004007223 */ /* 0x000fe20000000007 */ /*0870*/ @!P0 BRA 0x8d0 ; /* 0x0000005000008947 */ /* 0x002fea0003800000 */ /*0880*/ IMAD.MOV.U32 R3, RZ, RZ, R2 ; /* 0x000000ffff037224 */ /* 0x004fe200078e0002 */ /*0890*/ MOV R4, R6 ; /* 0x0000000600047202 */ /* 0x000fe40000000f00 */ /*08a0*/ MOV R16, 0x8c0 ; /* 0x000008c000107802 */ /* 0x000fe40000000f00 */ /*08b0*/ CALL.REL.NOINC 0xb40 ; /* 0x0000028000007944 */ /* 0x000fea0003c00000 */ /*08c0*/ IMAD.MOV.U32 R0, RZ, RZ, R3 ; /* 0x000000ffff007224 */ /* 0x001fe400078e0003 */ /*08d0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x004fea0003800000 */ /*08e0*/ IMAD.MOV.U32 R9, RZ, RZ, R0 ; /* 0x000000ffff097224 */ /* 0x000fe200078e0000 */ /*08f0*/ IADD3 R14, R12, c[0x0][0x1a8], RZ ; /* 0x00006a000c0e7a10 */ /* 0x000fe20007ffe0ff */ /*0900*/ IMAD.MOV.U32 R3, RZ, RZ, 0x3e055027 ; /* 0x3e055027ff037424 */ /* 0x000fc600078e00ff */ /*0910*/ FSETP.GEU.AND P0, PT, R9, 1.175494350822287508e-38, PT ; /* 0x008000000900780b */ /* 0x000fe40003f0e000 */ /*0920*/ MOV R12, R14 ; /* 0x0000000e000c7202 */ /* 0x000fd60000000f00 */ /*0930*/ @!P0 FMUL R9, R9, 8388608 ; /* 0x4b00000009098820 */ /* 0x000fca0000400000 */ /*0940*/ IADD3 R0, R9.reuse, -0x3f2aaaab, RZ ; /* 0xc0d5555509007810 */ /* 0x040fe40007ffe0ff */ /*0950*/ ISETP.GE.U32.AND P1, PT, R9, 0x7f800000, PT ; /* 0x7f8000000900780c */ /* 0x000fe40003f26070 */ /*0960*/ LOP3.LUT R2, R0, 0xff800000, RZ, 0xc0, !PT ; /* 0xff80000000027812 */ /* 0x000fc800078ec0ff */ /*0970*/ IADD3 R0, R9, -R2, RZ ; /* 0x8000000209007210 */ /* 0x000fca0007ffe0ff */ /*0980*/ FADD R4, R0, -1 ; /* 0xbf80000000047421 */ /* 0x000fe20000000000 */ /*0990*/ FSEL R0, RZ, -23, P0 ; /* 0xc1b80000ff007808 */ /* 0x000fe40000000000 */ /*09a0*/ FSETP.NEU.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720b */ /* 0x000fe20003f0d000 */ /*09b0*/ FFMA R3, R4, -R3, 0.14084610342979431152 ; /* 0x3e1039f604037423 */ /* 0x000fc80000000803 */ /*09c0*/ FFMA R3, R4, R3, -0.12148627638816833496 ; /* 0xbdf8cdcc04037423 */ /* 0x000fc80000000003 */ /*09d0*/ FFMA R3, R4, R3, 0.13980610668659210205 ; /* 0x3e0f295504037423 */ /* 0x000fc80000000003 */ /*09e0*/ FFMA R3, R4, R3, -0.16684235632419586182 ; /* 0xbe2ad8b904037423 */ /* 0x000fc80000000003 */ /*09f0*/ FFMA R3, R4, R3, 0.20012299716472625732 ; /* 0x3e4ced0b04037423 */ /* 0x000fc80000000003 */ /*0a00*/ FFMA R3, R4, R3, -0.24999669194221496582 ; /* 0xbe7fff2204037423 */ /* 0x000fc80000000003 */ /*0a10*/ FFMA R3, R4, R3, 0.33333182334899902344 ; /* 0x3eaaaa7804037423 */ /* 0x000fc80000000003 */ /*0a20*/ FFMA R7, R4.reuse, R3, -0.5 ; /* 0xbf00000004077423 */ /* 0x040fe20000000003 */ /*0a30*/ I2FP.F32.S32 R3, R2 ; /* 0x0000000200037245 */ /* 0x000fe20000201400 */ /*0a40*/ @P1 IMAD.MOV.U32 R2, RZ, RZ, 0x7f800000 ; /* 0x7f800000ff021424 */ /* 0x000fe400078e00ff */ /*0a50*/ FMUL R7, R4.reuse, R7 ; /* 0x0000000704077220 */ /* 0x040fe40000400000 */ /*0a60*/ FFMA R0, R3, 1.1920928955078125e-07, R0 ; /* 0x3400000003007823 */ /* 0x000fe40000000000 */ /*0a70*/ FFMA R7, R4, R7, R4 ; /* 0x0000000704077223 */ /* 0x000fc80000000004 */ /*0a80*/ FFMA R0, R0, 0.69314718246459960938, R7 ; /* 0x3f31721800007823 */ /* 0x000fe20000000007 */ /*0a90*/ @P1 FFMA R0, R9, R2, +INF ; /* 0x7f80000009001423 */ /* 0x000fe20000000002 */ /*0aa0*/ IADD3 R2, P1, R5, c[0x0][0x178], RZ ; /* 0x00005e0005027a10 */ /* 0x000fc80007f3e0ff */ /*0ab0*/ FSEL R0, R0, -INF , P0 ; /* 0xff80000000007808 */ /* 0x000fe40000000000 */ /*0ac0*/ IADD3.X R3, R13, c[0x0][0x17c], RZ, P1, !PT ; /* 0x00005f000d037a10 */ /* 0x000fe40000ffe4ff */ /*0ad0*/ ISETP.GE.U32.AND P0, PT, R14, c[0x0][0x1a0], PT ; /* 0x000068000e007a0c */ /* 0x000fe20003f06070 */ /*0ae0*/ FMUL R5, R0, c[0x0][0x19c] ; /* 0x0000670000057a20 */ /* 0x000fe20000400000 */ /*0af0*/ SHF.R.S32.HI R13, RZ, 0x1f, R14 ; /* 0x0000001fff0d7819 */ /* 0x000fc8000001140e */ /*0b00*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e2000c101904 */ /*0b10*/ ISETP.GE.U32.AND.EX P0, PT, R13, c[0x0][0x1a4], PT, P0 ; /* 0x000069000d007a0c */ /* 0x000fda0003f06100 */ /*0b20*/ @!P0 BRA 0xa0 ; /* 0xfffff57000008947 */ /* 0x001fea000383ffff */ /*0b30*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0b40*/ SHF.R.U32.HI R11, RZ, 0x17, R4 ; /* 0x00000017ff0b7819 */ /* 0x000fe20000011604 */ /*0b50*/ BSSY B1, 0x1180 ; /* 0x0000062000017945 */ /* 0x000fe20003800000 */ /*0b60*/ SHF.R.U32.HI R9, RZ, 0x17, R3 ; /* 0x00000017ff097819 */ /* 0x000fe40000011603 */ /*0b70*/ LOP3.LUT R19, R11, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0b137812 */ /* 0x000fe400078ec0ff */ /*0b80*/ LOP3.LUT R17, R9, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff09117812 */ /* 0x000fe400078ec0ff */ /*0b90*/ IADD3 R15, R19, -0x1, RZ ; /* 0xffffffff130f7810 */ /* 0x000fe40007ffe0ff */ /*0ba0*/ IADD3 R11, R17, -0x1, RZ ; /* 0xffffffff110b7810 */ /* 0x000fc40007ffe0ff */ /*0bb0*/ ISETP.GT.U32.AND P0, PT, R15, 0xfd, PT ; /* 0x000000fd0f00780c */ /* 0x000fc80003f04070 */ /*0bc0*/ ISETP.GT.U32.OR P0, PT, R11, 0xfd, P0 ; /* 0x000000fd0b00780c */ /* 0x000fda0000704470 */ /*0bd0*/ @!P0 IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff098224 */ /* 0x000fe200078e00ff */ /*0be0*/ @!P0 BRA 0xd60 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*0bf0*/ FSETP.GTU.FTZ.AND P0, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f1c200 */ /*0c00*/ FSETP.GTU.FTZ.AND P1, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fc80003f3c200 */ /*0c10*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0c20*/ @P0 BRA 0x1160 ; /* 0x0000053000000947 */ /* 0x000fea0003800000 */ /*0c30*/ LOP3.LUT P0, RZ, R4, 0x7fffffff, R3, 0xc8, !PT ; /* 0x7fffffff04ff7812 */ /* 0x000fda000780c803 */ /*0c40*/ @!P0 BRA 0x1140 ; /* 0x000004f000008947 */ /* 0x000fea0003800000 */ /*0c50*/ FSETP.NEU.FTZ.AND P2, PT, |R3|.reuse, +INF , PT ; /* 0x7f8000000300780b */ /* 0x040fe40003f5d200 */ /*0c60*/ FSETP.NEU.FTZ.AND P1, PT, |R4|, +INF , PT ; /* 0x7f8000000400780b */ /* 0x000fe40003f3d200 */ /*0c70*/ FSETP.NEU.FTZ.AND P0, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fd60003f1d200 */ /*0c80*/ @!P1 BRA !P2, 0x1140 ; /* 0x000004b000009947 */ /* 0x000fea0005000000 */ /*0c90*/ LOP3.LUT P2, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fc8000784c0ff */ /*0ca0*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*0cb0*/ @P1 BRA 0x1120 ; /* 0x0000046000001947 */ /* 0x000fea0003800000 */ /*0cc0*/ LOP3.LUT P1, RZ, R4, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff04ff7812 */ /* 0x000fc8000782c0ff */ /*0cd0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*0ce0*/ @P0 BRA 0x10f0 ; /* 0x0000040000000947 */ /* 0x000fea0003800000 */ /*0cf0*/ ISETP.GE.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe40003f06270 */ /*0d00*/ ISETP.GE.AND P1, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */ /* 0x000fd60003f26270 */ /*0d10*/ @P0 IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff090224 */ /* 0x000fe200078e00ff */ /*0d20*/ @!P0 MOV R9, 0xffffffc0 ; /* 0xffffffc000098802 */ /* 0x000fe20000000f00 */ /*0d30*/ @!P0 FFMA R3, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003038823 */ /* 0x000fe200000000ff */ /*0d40*/ @!P1 FFMA R4, R4, 1.84467440737095516160e+19, RZ ; /* 0x5f80000004049823 */ /* 0x000fe400000000ff */ /*0d50*/ @!P1 IADD3 R9, R9, 0x40, RZ ; /* 0x0000004009099810 */ /* 0x000fe40007ffe0ff */ /*0d60*/ LEA R11, R19, 0xc0800000, 0x17 ; /* 0xc0800000130b7811 */ /* 0x000fe200078eb8ff */ /*0d70*/ BSSY B2, 0x10e0 ; /* 0x0000036000027945 */ /* 0x000fe80003800000 */ /*0d80*/ IMAD.IADD R11, R4, 0x1, -R11 ; /* 0x00000001040b7824 */ /* 0x000fe200078e0a0b */ /*0d90*/ IADD3 R4, R17, -0x7f, RZ ; /* 0xffffff8111047810 */ /* 0x000fc60007ffe0ff */ /*0da0*/ MUFU.RCP R15, R11 ; /* 0x0000000b000f7308 */ /* 0x000e220000001000 */ /*0db0*/ FADD.FTZ R18, -R11, -RZ ; /* 0x800000ff0b127221 */ /* 0x000fe20000010100 */ /*0dc0*/ IMAD R3, R4, -0x800000, R3 ; /* 0xff80000004037824 */ /* 0x000fc600078e0203 */ /*0dd0*/ FFMA R20, R15, R18, 1 ; /* 0x3f8000000f147423 */ /* 0x001fc80000000012 */ /*0de0*/ FFMA R22, R15, R20, R15 ; /* 0x000000140f167223 */ /* 0x000fc8000000000f */ /*0df0*/ FFMA R15, R3, R22, RZ ; /* 0x00000016030f7223 */ /* 0x000fc800000000ff */ /*0e00*/ FFMA R20, R18, R15, R3 ; /* 0x0000000f12147223 */ /* 0x000fc80000000003 */ /*0e10*/ FFMA R15, R22, R20, R15 ; /* 0x00000014160f7223 */ /* 0x000fc8000000000f */ /*0e20*/ FFMA R20, R18, R15, R3 ; /* 0x0000000f12147223 */ /* 0x000fe20000000003 */ /*0e30*/ IADD3 R18, R4, 0x7f, -R19 ; /* 0x0000007f04127810 */ /* 0x000fc60007ffe813 */ /*0e40*/ FFMA R3, R22, R20, R15 ; /* 0x0000001416037223 */ /* 0x000fe4000000000f */ /*0e50*/ IMAD.IADD R18, R18, 0x1, R9 ; /* 0x0000000112127824 */ /* 0x000fc600078e0209 */ /*0e60*/ SHF.R.U32.HI R4, RZ, 0x17, R3 ; /* 0x00000017ff047819 */ /* 0x000fc80000011603 */ /*0e70*/ LOP3.LUT R4, R4, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff04047812 */ /* 0x000fc800078ec0ff */ /*0e80*/ IADD3 R17, R4, R18, RZ ; /* 0x0000001204117210 */ /* 0x000fc80007ffe0ff */ /*0e90*/ IADD3 R4, R17, -0x1, RZ ; /* 0xffffffff11047810 */ /* 0x000fc80007ffe0ff */ /*0ea0*/ ISETP.GE.U32.AND P0, PT, R4, 0xfe, PT ; /* 0x000000fe0400780c */ /* 0x000fda0003f06070 */ /*0eb0*/ @!P0 BRA 0x10c0 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*0ec0*/ ISETP.GT.AND P0, PT, R17, 0xfe, PT ; /* 0x000000fe1100780c */ /* 0x000fda0003f04270 */ /*0ed0*/ @P0 BRA 0x1090 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*0ee0*/ ISETP.GE.AND P0, PT, R17, 0x1, PT ; /* 0x000000011100780c */ /* 0x000fda0003f06270 */ /*0ef0*/ @P0 BRA 0x10d0 ; /* 0x000001d000000947 */ /* 0x000fea0003800000 */ /*0f00*/ ISETP.GE.AND P0, PT, R17, -0x18, PT ; /* 0xffffffe81100780c */ /* 0x000fe40003f06270 */ /*0f10*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fd600078ec0ff */ /*0f20*/ @!P0 BRA 0x10d0 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*0f30*/ FFMA.RZ R4, R22.reuse, R20.reuse, R15.reuse ; /* 0x0000001416047223 */ /* 0x1c0fe2000000c00f */ /*0f40*/ IADD3 R18, R17.reuse, 0x20, RZ ; /* 0x0000002011127810 */ /* 0x040fe20007ffe0ff */ /*0f50*/ FFMA.RM R9, R22, R20.reuse, R15.reuse ; /* 0x0000001416097223 */ /* 0x180fe2000000400f */ /*0f60*/ ISETP.NE.AND P2, PT, R17.reuse, RZ, PT ; /* 0x000000ff1100720c */ /* 0x040fe40003f45270 */ /*0f70*/ LOP3.LUT R11, R4, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff040b7812 */ /* 0x000fe200078ec0ff */ /*0f80*/ FFMA.RP R4, R22, R20, R15 ; /* 0x0000001416047223 */ /* 0x000fe2000000800f */ /*0f90*/ IMAD.MOV R15, RZ, RZ, -R17 ; /* 0x000000ffff0f7224 */ /* 0x000fe200078e0a11 */ /*0fa0*/ ISETP.NE.AND P1, PT, R17, RZ, PT ; /* 0x000000ff1100720c */ /* 0x000fe40003f25270 */ /*0fb0*/ LOP3.LUT R11, R11, 0x800000, RZ, 0xfc, !PT ; /* 0x008000000b0b7812 */ /* 0x000fc400078efcff */ /*0fc0*/ FSETP.NEU.FTZ.AND P0, PT, R4, R9, PT ; /* 0x000000090400720b */ /* 0x000fe40003f1d000 */ /*0fd0*/ SHF.L.U32 R18, R11, R18, RZ ; /* 0x000000120b127219 */ /* 0x000fe400000006ff */ /*0fe0*/ SEL R4, R15, RZ, P2 ; /* 0x000000ff0f047207 */ /* 0x000fe40001000000 */ /*0ff0*/ ISETP.NE.AND P1, PT, R18, RZ, P1 ; /* 0x000000ff1200720c */ /* 0x000fe40000f25270 */ /*1000*/ SHF.R.U32.HI R4, RZ, R4, R11 ; /* 0x00000004ff047219 */ /* 0x000fe4000001160b */ /*1010*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40000703570 */ /*1020*/ SHF.R.U32.HI R18, RZ, 0x1, R4 ; /* 0x00000001ff127819 */ /* 0x000fe40000011604 */ /*1030*/ SEL R9, RZ, 0x1, !P0 ; /* 0x00000001ff097807 */ /* 0x000fc80004000000 */ /*1040*/ LOP3.LUT R9, R9, 0x1, R18, 0xf8, !PT ; /* 0x0000000109097812 */ /* 0x000fc800078ef812 */ /*1050*/ LOP3.LUT R9, R9, R4, RZ, 0xc0, !PT ; /* 0x0000000409097212 */ /* 0x000fca00078ec0ff */ /*1060*/ IMAD.IADD R18, R18, 0x1, R9 ; /* 0x0000000112127824 */ /* 0x000fca00078e0209 */ /*1070*/ LOP3.LUT R3, R18, R3, RZ, 0xfc, !PT ; /* 0x0000000312037212 */ /* 0x000fe200078efcff */ /*1080*/ BRA 0x10d0 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*1090*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fc800078ec0ff */ /*10a0*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*10b0*/ BRA 0x10d0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*10c0*/ LEA R3, R18, R3, 0x17 ; /* 0x0000000312037211 */ /* 0x000fe400078eb8ff */ /*10d0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*10e0*/ BRA 0x1170 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*10f0*/ LOP3.LUT R3, R4, 0x80000000, R3, 0x48, !PT ; /* 0x8000000004037812 */ /* 0x000fc800078e4803 */ /*1100*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*1110*/ BRA 0x1170 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*1120*/ LOP3.LUT R3, R4, 0x80000000, R3, 0x48, !PT ; /* 0x8000000004037812 */ /* 0x000fe200078e4803 */ /*1130*/ BRA 0x1170 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*1140*/ MUFU.RSQ R3, -QNAN ; /* 0xffc0000000037908 */ /* 0x000e220000001400 */ /*1150*/ BRA 0x1170 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1160*/ FADD.FTZ R3, R3, R4 ; /* 0x0000000403037221 */ /* 0x000fe40000010000 */ /*1170*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1180*/ IMAD.MOV.U32 R17, RZ, RZ, 0x0 ; /* 0x00000000ff117424 */ /* 0x000fc800078e00ff */ /*1190*/ RET.REL.NODEC R16 0x0 ; /* 0xffffee6010007950 */ /* 0x000fea0003c3ffff */ /*11a0*/ BRA 0x11a0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*11b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1200*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1210*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1220*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1230*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void box_encode_kernel(float * targets_dx, float * targets_dy, float * targets_dw, float * targets_dh, float4 * boxes, float4 * anchors, float wx, float wy, float ww, float wh, size_t gt, size_t idxJump) { int idx = blockIdx.x*blockDim.x + threadIdx.x; size_t row_offset; float anchors_x1,anchors_x2, anchors_y1, anchors_y2, boxes_x1, boxes_x2, boxes_y1, boxes_y2, ex_w, ex_h, ex_ctr_x, ex_ctr_y, gt_w, gt_h, gt_ctr_x, gt_ctr_y; for (int i=idx; i<gt; i+=idxJump){ row_offset = i; anchors_x1 = anchors[row_offset].x; anchors_y1 = anchors[row_offset].y; anchors_x2 = anchors[row_offset].z; anchors_y2 = anchors[row_offset].w; boxes_x1 = boxes[row_offset].x; boxes_y1 = boxes[row_offset].y; boxes_x2 = boxes[row_offset].z; boxes_y2 = boxes[row_offset].w; ex_w = anchors_x2 - anchors_x1 + 1; ex_h = anchors_y2 - anchors_y1 + 1; ex_ctr_x = anchors_x1 + 0.5 * ex_w; ex_ctr_y = anchors_y1 + 0.5 * ex_h; gt_w = boxes_x2 - boxes_x1 + 1; gt_h = boxes_y2 - boxes_y1 + 1; gt_ctr_x = boxes_x1 + 0.5 * gt_w; gt_ctr_y = boxes_y1 + 0.5 * gt_h; targets_dx[i] = wx * (gt_ctr_x-ex_ctr_x)/ex_w; targets_dy[i] = wy * (gt_ctr_y-ex_ctr_y)/ex_h; targets_dw[i] = ww * log(gt_w/ex_w); targets_dh[i] = wh * log(gt_h/ex_h); } }
.text .file "box_encode_kernel.hip" .globl _Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm # -- Begin function _Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .type _Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm,@function _Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm: # @_Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $208, %rsp .cfi_def_cfa_offset 256 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 72(%rsp), %rax movq %rdi, (%rax) leaq 64(%rsp), %rdi movq %rsi, (%rdi) leaq 56(%rsp), %rsi movq %rdx, (%rsi) leaq 48(%rsp), %rdx movq %rcx, (%rdx) leaq 40(%rsp), %rcx movq %r8, (%rcx) leaq 32(%rsp), %r8 movq %r9, (%r8) leaq 12(%rsp), %r9 movss %xmm0, (%r9) leaq 8(%rsp), %r10 movss %xmm1, (%r10) leaq 4(%rsp), %r11 movss %xmm2, (%r11) movq %rsp, %r14 movss %xmm3, (%r14) leaq 112(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) movq %r9, 48(%rbx) movq %r10, 56(%rbx) movq %r11, 64(%rbx) movq %r14, 72(%rbx) leaq 256(%rsp), %rax movq %rax, 80(%rbx) leaq 264(%rsp), %rax movq %rax, 88(%rbx) leaq 96(%rsp), %r14 leaq 80(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $224, %rsp .cfi_adjust_cfa_offset -224 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm, .Lfunc_end0-_Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm,@object # @_Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .section .rodata,"a",@progbits .globl _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .p2align 3, 0x0 _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm: .quad _Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .size _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm" .size .L__unnamed_1, 64 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z32__device_stub__box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm ; -- Begin function _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .globl _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .p2align 8 .type _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm,@function _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm: ; @_Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x5c s_load_b128 s[20:23], s[0:1], 0x40 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_u64_e64 s[20:21], v[1:2] s_cbranch_execz .LBB0_3 ; %bb.1: ; %.lr.ph s_clause 0x1 s_load_b256 s[4:11], s[0:1], 0x0 s_load_b256 s[12:19], s[0:1], 0x20 v_add_nc_u32_e32 v3, s22, v1 s_mov_b32 s3, 0 .LBB0_2: ; =>This Inner Loop Header: Depth=1 v_lshlrev_b64 v[4:5], 4, v[1:2] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, s14, v4 v_add_co_ci_u32_e32 v7, vcc_lo, s15, v5, vcc_lo v_add_co_u32 v8, vcc_lo, s12, v4 v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo global_load_b128 v[4:7], v[6:7], off global_load_b128 v[8:11], v[8:9], off s_waitcnt vmcnt(0) v_dual_sub_f32 v12, v7, v5 :: v_dual_sub_f32 v13, v10, v8 v_sub_f32_e32 v0, v6, v4 v_sub_f32_e32 v14, v11, v9 v_cvt_f64_f32_e32 v[10:11], v8 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_dual_add_f32 v20, 1.0, v12 :: v_dual_add_f32 v21, 1.0, v13 v_add_f32_e32 v0, 1.0, v0 v_cvt_f64_f32_e32 v[6:7], v4 v_cvt_f64_f32_e32 v[4:5], v5 v_add_f32_e32 v22, 1.0, v14 v_cvt_f64_f32_e32 v[16:17], v21 v_cvt_f64_f32_e32 v[12:13], v0 v_cvt_f64_f32_e32 v[14:15], v20 v_cvt_f64_f32_e32 v[8:9], v9 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_fma_f64 v[10:11], v[16:17], 0.5, v[10:11] v_fma_f64 v[6:7], v[12:13], 0.5, v[6:7] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_fma_f64 v[12:13], v[14:15], 0.5, v[4:5] v_div_scale_f32 v5, null, v0, v0, v21 v_ashrrev_i32_e32 v4, 31, v3 v_rcp_f32_e32 v17, v5 v_cvt_f32_f64_e32 v10, v[10:11] s_waitcnt_depctr 0xfff v_fma_f32 v11, -v5, v17, 1.0 v_cvt_f32_f64_e32 v6, v[6:7] v_cvt_f32_f64_e32 v7, v[12:13] s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fmac_f32_e32 v17, v11, v17 v_div_scale_f32 v14, s0, v21, v0, v21 v_mul_f32_e32 v11, v14, v17 v_cvt_f64_f32_e32 v[18:19], v22 v_div_scale_f32 v15, null, v20, v20, v22 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v13, -v5, v11, v14 v_dual_fmac_f32 v11, v13, v17 :: v_dual_sub_f32 v6, v10, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_fma_f32 v5, -v5, v11, v14 v_mul_f32_e32 v14, s16, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_div_scale_f32 v6, null, v0, v0, v14 v_fma_f64 v[8:9], v[18:19], 0.5, v[8:9] v_rcp_f32_e32 v10, v6 s_waitcnt_depctr 0xfff v_fma_f32 v19, -v6, v10, 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1) v_fmac_f32_e32 v10, v19, v10 v_cvt_f32_f64_e32 v8, v[8:9] v_rcp_f32_e32 v9, v15 s_waitcnt_depctr 0xfff v_fma_f32 v12, -v15, v9, 1.0 v_fmac_f32_e32 v9, v12, v9 v_div_scale_f32 v16, s1, v22, v20, v22 v_sub_f32_e32 v7, v8, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_f32_e32 v12, v16, v9 v_div_scale_f32 v8, vcc_lo, v14, v0, v14 v_fma_f32 v18, -v15, v12, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_mul_f32 v19, v8, v10 :: v_dual_fmac_f32 v12, v18, v9 v_fma_f32 v24, -v6, v19, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f32 v13, -v15, v12, v16 v_mul_f32_e32 v15, s17, v7 v_div_scale_f32 v7, null, v20, v20, v15 v_div_scale_f32 v18, s2, v15, v20, v15 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v16, v7 s_waitcnt_depctr 0xfff v_fma_f32 v23, -v7, v16, 1.0 v_fmac_f32_e32 v16, v23, v16 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v23, v18, v16 v_fma_f32 v25, -v7, v23, v18 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_fmac_f32_e32 v23, v25, v16 v_fmac_f32_e32 v19, v24, v10 v_fma_f32 v7, -v7, v23, v18 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f32 v6, -v6, v19, v8 v_div_fmas_f32 v18, v6, v10, v19 s_mov_b32 vcc_lo, s2 s_delay_alu instid0(VALU_DEP_3) v_div_fmas_f32 v16, v7, v16, v23 s_mov_b32 vcc_lo, s0 v_div_fmas_f32 v5, v5, v17, v11 s_mov_b32 vcc_lo, s1 v_cmp_le_u64_e64 s1, s[20:21], v[3:4] v_div_fmas_f32 v6, v13, v9, v12 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_div_fixup_f32 v7, v5, v0, v21 v_div_fixup_f32 v0, v18, v0, v14 v_div_fixup_f32 v8, v6, v20, v22 v_lshlrev_b64 v[5:6], 2, v[1:2] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_cmp_gt_f32_e32 vcc_lo, 0x800000, v7 v_dual_mov_b32 v1, v3 :: v_dual_mov_b32 v2, v4 v_cmp_gt_f32_e64 s0, 0x800000, v8 s_or_b32 s3, s1, s3 v_cndmask_b32_e64 v9, 1.0, 0x4f800000, vcc_lo v_cndmask_b32_e64 v23, 0, 0x41b17218, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_cndmask_b32_e64 v10, 1.0, 0x4f800000, s0 v_cndmask_b32_e64 v24, 0, 0x41b17218, s0 v_dual_mul_f32 v7, v7, v9 :: v_dual_mul_f32 v8, v8, v10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_log_f32_e32 v4, v7 v_add_co_u32 v7, s2, s4, v5 v_log_f32_e32 v13, v8 v_add_co_ci_u32_e64 v8, s2, s5, v6, s2 v_add_co_u32 v9, s2, s6, v5 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v10, s2, s7, v6, s2 s_waitcnt_depctr 0xfff v_mul_f32_e32 v17, 0x3f317217, v4 v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v4| v_add_co_u32 v11, s2, s8, v5 v_mul_f32_e32 v19, 0x3f317217, v13 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_fma_f32 v21, 0x3f317217, v4, -v17 v_cmp_gt_f32_e64 s0, 0x7f800000, |v13| v_add_co_ci_u32_e64 v12, s2, s9, v6, s2 v_fma_f32 v22, 0x3f317217, v13, -v19 s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2) v_fmac_f32_e32 v21, 0x3377d1cf, v4 v_dual_fmac_f32 v22, 0x3377d1cf, v13 :: v_dual_add_nc_u32 v3, s22, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_f32_e32 v17, v17, v21 v_add_f32_e32 v19, v19, v22 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4) v_cndmask_b32_e32 v17, v4, v17, vcc_lo v_add_co_u32 v4, vcc_lo, s10, v5 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v6, vcc_lo v_cndmask_b32_e64 v13, v13, v19, s0 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_sub_f32_e32 v17, v17, v23 v_div_fixup_f32 v6, v16, v20, v15 v_dual_sub_f32 v13, v13, v24 :: v_dual_mul_f32 v14, s18, v17 s_delay_alu instid0(VALU_DEP_1) v_mul_f32_e32 v13, s19, v13 global_store_b32 v[7:8], v0, off global_store_b32 v[9:10], v6, off global_store_b32 v[11:12], v14, off global_store_b32 v[4:5], v13, off s_and_not1_b32 exec_lo, exec_lo, s3 s_cbranch_execnz .LBB0_2 .LBB0_3: ; %Flow102 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 336 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 26 .amdhsa_next_free_sgpr 24 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm, .Lfunc_end0-_Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1060 ; NumSgprs: 26 ; NumVgprs: 26 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 3 ; VGPRBlocks: 3 ; NumSGPRsForWavesPerEU: 26 ; NumVGPRsForWavesPerEU: 26 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .offset: 48 .size: 4 .value_kind: by_value - .offset: 52 .size: 4 .value_kind: by_value - .offset: 56 .size: 4 .value_kind: by_value - .offset: 60 .size: 4 .value_kind: by_value - .offset: 64 .size: 8 .value_kind: by_value - .offset: 72 .size: 8 .value_kind: by_value - .offset: 80 .size: 4 .value_kind: hidden_block_count_x - .offset: 84 .size: 4 .value_kind: hidden_block_count_y - .offset: 88 .size: 4 .value_kind: hidden_block_count_z - .offset: 92 .size: 2 .value_kind: hidden_group_size_x - .offset: 94 .size: 2 .value_kind: hidden_group_size_y - .offset: 96 .size: 2 .value_kind: hidden_group_size_z - .offset: 98 .size: 2 .value_kind: hidden_remainder_x - .offset: 100 .size: 2 .value_kind: hidden_remainder_y - .offset: 102 .size: 2 .value_kind: hidden_remainder_z - .offset: 120 .size: 8 .value_kind: hidden_global_offset_x - .offset: 128 .size: 8 .value_kind: hidden_global_offset_y - .offset: 136 .size: 8 .value_kind: hidden_global_offset_z - .offset: 144 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 336 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm .private_segment_fixed_size: 0 .sgpr_count: 26 .sgpr_spill_count: 0 .symbol: _Z17box_encode_kernelPfS_S_S_P15HIP_vector_typeIfLj4EES2_ffffmm.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 26 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
7e08a35c6d550167a5d6541d0b8d695881830c5c
#include <iostream> #include <math.h> #include <cuda.h> #include <stdio.h> // function to add the elements of two arrays #define checkCudaErrors(val) check( (val), #val, __FILE__, __LINE__) template<typename T> void check(T err, const char* const func, const char* const file, const int line) { if (err != cudaSuccess) { std::cerr << "CUDA error at: " << file << ":" << line << std::endl; std::cerr << cudaGetErrorString(err) << " " << func << std::endl; exit(1); } } __global__ void add(int n, float *x, float *y) { } int main(void) { int N = 1<<20; // 1M elements float *x = new float[N]; float *y = new float[N]; cudaMallocManaged(&x,N*sizeof(float)); cudaMallocManaged(&y,N*sizeof(float)); // Run kernel on 1M elements on the CPU const dim3 threadsPerBlock(16, 16); const dim3 numBlocks(1024/16, 768/16); add<<<numBlocks,threadsPerBlock>>>(N, x, y); // Wait for GPU to finish before accessing on host cudaDeviceSynchronize(); checkCudaErrors(cudaGetLastError()); // Free memory cudaFree(x); cudaFree(y); // Free memory return 0; }
.file "tmpxft_00235140_00000000-6_threadBlocks_dim3.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3639: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3639: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z25__device_stub__Z3addiPfS_iPfS_ .type _Z25__device_stub__Z3addiPfS_iPfS_, @function _Z25__device_stub__Z3addiPfS_iPfS_: .LFB3661: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movl %edi, 28(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 28(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z3addiPfS_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3661: .size _Z25__device_stub__Z3addiPfS_iPfS_, .-_Z25__device_stub__Z3addiPfS_iPfS_ .globl _Z3addiPfS_ .type _Z3addiPfS_, @function _Z3addiPfS_: .LFB3662: .cfi_startproc endbr64 jmp _Z25__device_stub__Z3addiPfS_iPfS_ .cfi_endproc .LFE3662: .size _Z3addiPfS_, .-_Z3addiPfS_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z3addiPfS_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3664: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z3addiPfS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3664: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .rodata._Z5checkI9cudaErrorEvT_PKcS3_i.str1.1,"aMS",@progbits,1 .LC1: .string "CUDA error at: " .LC2: .string ":" .LC3: .string " " .section .text._Z5checkI9cudaErrorEvT_PKcS3_i,"axG",@progbits,_Z5checkI9cudaErrorEvT_PKcS3_i,comdat .weak _Z5checkI9cudaErrorEvT_PKcS3_i .type _Z5checkI9cudaErrorEvT_PKcS3_i, @function _Z5checkI9cudaErrorEvT_PKcS3_i: .LFB3965: .cfi_startproc endbr64 testl %edi, %edi je .L10 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 movq %rdx, %r14 pushq %r13 .cfi_def_cfa_offset 24 .cfi_offset 13, -24 movl %ecx, %r13d pushq %r12 .cfi_def_cfa_offset 32 .cfi_offset 12, -32 leaq _ZSt4cerr(%rip), %r12 pushq %rbp .cfi_def_cfa_offset 40 .cfi_offset 6, -40 movq %rsi, %rbp leaq .LC1(%rip), %rsi pushq %rbx .cfi_def_cfa_offset 48 .cfi_offset 3, -48 movl %edi, %ebx movq %r12, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %r14, %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT leaq .LC2(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl %r13d, %esi movq %rax, %rdi call _ZNSolsEi@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movl %ebx, %edi call cudaGetErrorString@PLT movq %r12, %rdi movq %rax, %rsi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT leaq .LC3(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rbp, %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movl $1, %edi call exit@PLT .L10: .cfi_def_cfa_offset 8 .cfi_restore 3 .cfi_restore 6 .cfi_restore 12 .cfi_restore 13 .cfi_restore 14 ret .cfi_endproc .LFE3965: .size _Z5checkI9cudaErrorEvT_PKcS3_i, .-_Z5checkI9cudaErrorEvT_PKcS3_i .section .rodata.str1.1 .LC4: .string "/home/ubuntu/Datasets/stackv2/train-structured/mckjzhangxk/deepAI/master/c++/cuda/start/threadBlocks_dim3.cu" .LC5: .string "cudaGetLastError()" .section .text.startup .globl main .type main, @function main: .LFB3636: .cfi_startproc endbr64 subq $56, %rsp .cfi_def_cfa_offset 64 movl $4194304, %edi movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax call _Znam@PLT movl $4194304, %edi movq %rax, (%rsp) call _Znam@PLT movq %rsp, %rdi movl $1, %edx movl $4194304, %esi movq %rax, 8(%rsp) call cudaMallocManaged@PLT leaq 8(%rsp), %rdi movl $1, %edx movl $4194304, %esi call cudaMallocManaged@PLT movl $3221225473, %edi xorl %r9d, %r9d xorl %r8d, %r8d salq $6, %rdi movl $1, %ecx movl $1, %esi movabsq $68719476752, %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L16 movq 8(%rsp), %rdx movq (%rsp), %rsi movl $1048576, %edi call _Z25__device_stub__Z3addiPfS_iPfS_ .L16: call cudaDeviceSynchronize@PLT call cudaGetLastError@PLT movl $38, %ecx leaq .LC4(%rip), %rdx leaq .LC5(%rip), %rsi movl %eax, %edi call _Z5checkI9cudaErrorEvT_PKcS3_i movq (%rsp), %rdi call cudaFree@PLT movq 8(%rsp), %rdi call cudaFree@PLT movq 40(%rsp), %rax subq %fs:40, %rax je .L17 call __stack_chk_fail@PLT .L17: xorl %eax, %eax addq $56, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3636: .size main, .-main .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z3addiPfS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0020*/ BRA 0x20; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <iostream> #include <math.h> #include <hip/hip_runtime.h> #include <stdio.h> // function to add the elements of two arrays #define checkCudaErrors(val) check( (val), #val, __FILE__, __LINE__) template<typename T> void check(T err, const char* const func, const char* const file, const int line) { if (err != hipSuccess) { std::cerr << "CUDA error at: " << file << ":" << line << std::endl; std::cerr << hipGetErrorString(err) << " " << func << std::endl; exit(1); } } __global__ void add(int n, float *x, float *y) { } int main(void) { int N = 1<<20; // 1M elements float *x = new float[N]; float *y = new float[N]; hipMallocManaged(&x,N*sizeof(float)); hipMallocManaged(&y,N*sizeof(float)); // Run kernel on 1M elements on the CPU const dim3 threadsPerBlock(16, 16); const dim3 numBlocks(1024/16, 768/16); add<<<numBlocks,threadsPerBlock>>>(N, x, y); // Wait for GPU to finish before accessing on host hipDeviceSynchronize(); checkCudaErrors(hipGetLastError()); // Free memory hipFree(x); hipFree(y); // Free memory return 0; }
.text .file "threadBlocks_dim3.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z18__device_stub__addiPfS_ # -- Begin function _Z18__device_stub__addiPfS_ .type _Z18__device_stub__addiPfS_,@function _Z18__device_stub__addiPfS_: # @_Z18__device_stub__addiPfS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 40(%rsp), %rcx movq %rsi, (%rcx) leaq 32(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z3addiPfS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z18__device_stub__addiPfS_, .Lfunc_end0-_Z18__device_stub__addiPfS_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 subq $24, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movl $4194304, %edi # imm = 0x400000 callq _Znam leaq 16(%rsp), %rbx movq %rax, (%rbx) movl $4194304, %edi # imm = 0x400000 callq _Znam leaq 8(%rsp), %r14 movq %rax, (%r14) movl $4194304, %esi # imm = 0x400000 movq %rbx, %rdi movl $1, %edx callq hipMallocManaged movl $4194304, %esi # imm = 0x400000 movq %r14, %rdi movl $1, %edx callq hipMallocManaged movabsq $206158430272, %rdi # imm = 0x3000000040 movabsq $68719476752, %rdx # imm = 0x1000000010 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movq 16(%rsp), %rsi movq 8(%rsp), %rdx movl $1048576, %edi # imm = 0x100000 callq _Z18__device_stub__addiPfS_ .LBB1_2: callq hipDeviceSynchronize callq hipGetLastError movl $.L.str, %esi movl $.L.str.1, %edx movl %eax, %edi movl $38, %ecx callq _Z5checkI10hipError_tEvT_PKcS3_i movq 16(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .section .text._Z5checkI10hipError_tEvT_PKcS3_i,"axG",@progbits,_Z5checkI10hipError_tEvT_PKcS3_i,comdat .weak _Z5checkI10hipError_tEvT_PKcS3_i # -- Begin function _Z5checkI10hipError_tEvT_PKcS3_i .type _Z5checkI10hipError_tEvT_PKcS3_i,@function _Z5checkI10hipError_tEvT_PKcS3_i: # @_Z5checkI10hipError_tEvT_PKcS3_i .cfi_startproc # %bb.0: testl %edi, %edi jne .LBB2_2 # %bb.1: retq .LBB2_2: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %ecx, %r14d movq %rdx, %r15 movq %rsi, %rbx movl %edi, %ebp movl $_ZSt4cerr, %edi movl $.L.str.2, %esi callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc movq %rax, %rdi movq %r15, %rsi callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc movl $.L.str.3, %esi movq %rax, %rdi callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc movq %rax, %rdi movl %r14d, %esi callq _ZNSolsEi movq %rax, %rdi callq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_ movl %ebp, %edi callq hipGetErrorString movl $_ZSt4cerr, %edi movq %rax, %rsi callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc movl $.L.str.4, %esi movq %rax, %rdi callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc movq %rax, %rdi movq %rbx, %rsi callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc movq %rax, %rdi callq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_ movl $1, %edi callq exit .Lfunc_end2: .size _Z5checkI10hipError_tEvT_PKcS3_i, .Lfunc_end2-_Z5checkI10hipError_tEvT_PKcS3_i .cfi_endproc # -- End function .text .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z3addiPfS_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z3addiPfS_,@object # @_Z3addiPfS_ .section .rodata,"a",@progbits .globl _Z3addiPfS_ .p2align 3, 0x0 _Z3addiPfS_: .quad _Z18__device_stub__addiPfS_ .size _Z3addiPfS_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "hipGetLastError()" .size .L.str, 18 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/mckjzhangxk/deepAI/master/c++/cuda/start/threadBlocks_dim3.hip" .size .L.str.1, 125 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "CUDA error at: " .size .L.str.2, 16 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz ":" .size .L.str.3, 2 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz " " .size .L.str.4, 2 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z3addiPfS_" .size .L__unnamed_1, 12 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z18__device_stub__addiPfS_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z3addiPfS_ .addrsig_sym _ZSt4cerr .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z3addiPfS_ ; -- Begin function _Z3addiPfS_ .globl _Z3addiPfS_ .p2align 8 .type _Z3addiPfS_,@function _Z3addiPfS_: ; @_Z3addiPfS_ ; %bb.0: s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z3addiPfS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 24 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 1 .amdhsa_next_free_sgpr 1 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z3addiPfS_, .Lfunc_end0-_Z3addiPfS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 4 ; NumSgprs: 0 ; NumVgprs: 0 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 1 ; NumVGPRsForWavesPerEU: 1 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 24 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z3addiPfS_ .private_segment_fixed_size: 0 .sgpr_count: 0 .sgpr_spill_count: 0 .symbol: _Z3addiPfS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 0 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
63b7e9ccf9e23571357deb0dce058bc933d08c17
#include "cuda.h" #define N 1000 __device__ float A[N][N]; __device__ float B[N][N]; __device__ float C[N][N]; __global__ void vectorAdd(float A[N][N], float B[N][N], float C[N][N]) { int i = threadIdx.x; int j = threadIdx.y; C[i][j] = A[i][j] + B[i][j]; } int main() { int bpg = 1; dim3 tpb(N, N); vectorAdd<<<bpg, tpb>>>(A, B, C); cudaFree(A); cudaFree(B); cudaFree(C); return 0; }
.file "tmpxft_0022c2cb_00000000-6_addVector.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2011: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2011: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z40__device_stub__Z9vectorAddPA1000_fS0_S0_PA1000_fS0_S0_ .type _Z40__device_stub__Z9vectorAddPA1000_fS0_S0_PA1000_fS0_S0_, @function _Z40__device_stub__Z9vectorAddPA1000_fS0_S0_PA1000_fS0_S0_: .LFB2033: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z9vectorAddPA1000_fS0_S0_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2033: .size _Z40__device_stub__Z9vectorAddPA1000_fS0_S0_PA1000_fS0_S0_, .-_Z40__device_stub__Z9vectorAddPA1000_fS0_S0_PA1000_fS0_S0_ .globl _Z9vectorAddPA1000_fS0_S0_ .type _Z9vectorAddPA1000_fS0_S0_, @function _Z9vectorAddPA1000_fS0_S0_: .LFB2034: .cfi_startproc endbr64 jmp _Z40__device_stub__Z9vectorAddPA1000_fS0_S0_PA1000_fS0_S0_ .cfi_endproc .LFE2034: .size _Z9vectorAddPA1000_fS0_S0_, .-_Z9vectorAddPA1000_fS0_S0_ .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2008: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movl $1, %esi movabsq $4294967297000, %rdx movabsq $4294967297, %rdi pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 leaq _ZL1B(%rip), %rbp leaq _ZL1C(%rip), %rbx leaq _ZL1A(%rip), %r12 subq $32, %rsp .cfi_def_cfa_offset 64 call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 movq %rbx, %rdx movq %rbp, %rsi movq %r12, %rdi call _Z40__device_stub__Z9vectorAddPA1000_fS0_S0_PA1000_fS0_S0_ .L9: movq %r12, %rdi call cudaFree@PLT movq %rbp, %rdi call cudaFree@PLT movq %rbx, %rdi call cudaFree@PLT addq $32, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2008: .size main, .-main .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z9vectorAddPA1000_fS0_S0_" .LC1: .string "A" .LC2: .string "B" .LC3: .string "C" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2036: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z9vectorAddPA1000_fS0_S0_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC1(%rip), %rdx movl $4000000, %r9d leaq _ZL1A(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx call __cudaRegisterVar@PLT popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC2(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movq %rdx, %rcx movl $4000000, %r9d leaq _ZL1B(%rip), %rsi call __cudaRegisterVar@PLT popq %rcx .cfi_def_cfa_offset 24 popq %rsi .cfi_def_cfa_offset 16 pushq $0 .cfi_def_cfa_offset 24 pushq $0 .cfi_def_cfa_offset 32 leaq .LC3(%rip), %rdx movq %rbx, %rdi xorl %r8d, %r8d movl $4000000, %r9d movq %rdx, %rcx leaq _ZL1C(%rip), %rsi call __cudaRegisterVar@PLT popq %rdi .cfi_def_cfa_offset 24 movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %r8 .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2036: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .local _ZL1C .comm _ZL1C,4000000,32 .local _ZL1B .comm _ZL1B,4000000,32 .local _ZL1A .comm _ZL1A,4000000,32 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z9vectorAddPA1000_fS0_S0_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */ /* 0x000e220000002100 */ /*0020*/ MOV R7, 0xfa0 ; /* 0x00000fa000077802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */ /* 0x000e640000002200 */ /*0050*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x001fc800078e0207 */ /*0060*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0070*/ IMAD.WIDE R2, R9, 0x4, R2 ; /* 0x0000000409027825 */ /* 0x002fc800078e0202 */ /*0080*/ IMAD.WIDE R4, R9, 0x4, R4 ; /* 0x0000000409047825 */ /* 0x000fe400078e0204 */ /*0090*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*00a0*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea2000c1e1900 */ /*00b0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fcc00078e0207 */ /*00c0*/ IMAD.WIDE R6, R9, 0x4, R6 ; /* 0x0000000409067825 */ /* 0x000fe200078e0206 */ /*00d0*/ FADD R9, R2, R5 ; /* 0x0000000502097221 */ /* 0x004fca0000000000 */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include "hip/hip_runtime.h" #define N 1000 __device__ float A[N][N]; __device__ float B[N][N]; __device__ float C[N][N]; __global__ void vectorAdd(float A[N][N], float B[N][N], float C[N][N]) { int i = threadIdx.x; int j = threadIdx.y; C[i][j] = A[i][j] + B[i][j]; } int main() { int bpg = 1; dim3 tpb(N, N); vectorAdd<<<bpg, tpb>>>(A, B, C); hipFree(A); hipFree(B); hipFree(C); return 0; }
.text .file "addVector.hip" .globl _Z24__device_stub__vectorAddPA1000_fS0_S0_ # -- Begin function _Z24__device_stub__vectorAddPA1000_fS0_S0_ .type _Z24__device_stub__vectorAddPA1000_fS0_S0_,@function _Z24__device_stub__vectorAddPA1000_fS0_S0_: # @_Z24__device_stub__vectorAddPA1000_fS0_S0_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z9vectorAddPA1000_fS0_S0_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z24__device_stub__vectorAddPA1000_fS0_S0_, .Lfunc_end0-_Z24__device_stub__vectorAddPA1000_fS0_S0_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movabsq $4294967297, %rdi # imm = 0x100000001 movabsq $4294967297000, %rdx # imm = 0x3E8000003E8 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movl $A, %edi movl $B, %esi movl $C, %edx callq _Z24__device_stub__vectorAddPA1000_fS0_S0_ .LBB1_2: movl $A, %edi callq hipFree movl $B, %edi callq hipFree movl $C, %edi callq hipFree xorl %eax, %eax popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: subq $32, %rsp .cfi_adjust_cfa_offset 32 xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z9vectorAddPA1000_fS0_S0_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction addq $32, %rsp .cfi_adjust_cfa_offset -32 movl $A, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movl $4000000, %r9d # imm = 0x3D0900 movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $0 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $B, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movl $4000000, %r9d # imm = 0x3D0900 movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $0 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $C, %esi movl $.L__unnamed_4, %edx movl $.L__unnamed_4, %ecx movl $4000000, %r9d # imm = 0x3D0900 movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_adjust_cfa_offset 8 pushq $0 .cfi_adjust_cfa_offset 8 callq __hipRegisterVar addq $16, %rsp .cfi_adjust_cfa_offset -16 movl $__hip_module_dtor, %edi popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type A,@object # @A .local A .comm A,4000000,16 .type B,@object # @B .local B .comm B,4000000,16 .type C,@object # @C .local C .comm C,4000000,16 .type _Z9vectorAddPA1000_fS0_S0_,@object # @_Z9vectorAddPA1000_fS0_S0_ .section .rodata,"a",@progbits .globl _Z9vectorAddPA1000_fS0_S0_ .p2align 3, 0x0 _Z9vectorAddPA1000_fS0_S0_: .quad _Z24__device_stub__vectorAddPA1000_fS0_S0_ .size _Z9vectorAddPA1000_fS0_S0_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z9vectorAddPA1000_fS0_S0_" .size .L__unnamed_1, 27 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "A" .size .L__unnamed_2, 2 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "B" .size .L__unnamed_3, 2 .type .L__unnamed_4,@object # @3 .L__unnamed_4: .asciz "C" .size .L__unnamed_4, 2 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z24__device_stub__vectorAddPA1000_fS0_S0_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym A .addrsig_sym B .addrsig_sym C .addrsig_sym _Z9vectorAddPA1000_fS0_S0_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z9vectorAddPA1000_fS0_S0_ ; -- Begin function _Z9vectorAddPA1000_fS0_S0_ .globl _Z9vectorAddPA1000_fS0_S0_ .p2align 8 .type _Z9vectorAddPA1000_fS0_S0_,@function _Z9vectorAddPA1000_fS0_S0_: ; @_Z9vectorAddPA1000_fS0_S0_ ; %bb.0: s_load_b128 s[4:7], s[0:1], 0x0 v_and_b32_e32 v1, 0x3ff, v0 v_lshrrev_b32_e32 v0, 8, v0 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_mul_u32_u24_e32 v4, 0xfa0, v1 v_mul_hi_u32_u24_e32 v5, 0xfa0, v1 v_and_b32_e32 v6, 0xffc, v0 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, s4, v4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo v_add_co_u32 v2, vcc_lo, s6, v4 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v0, vcc_lo, v0, v6 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) v_add_co_u32 v2, vcc_lo, v2, v6 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo global_load_b32 v0, v[0:1], off global_load_b32 v1, v[2:3], off v_add_co_u32 v2, vcc_lo, s0, v4 v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v4, v0, v1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v2, v6 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v3, vcc_lo global_store_b32 v[0:1], v4, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z9vectorAddPA1000_fS0_S0_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 24 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 8 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z9vectorAddPA1000_fS0_S0_, .Lfunc_end0-_Z9vectorAddPA1000_fS0_S0_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 192 ; NumSgprs: 10 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 1 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 10 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .protected A ; @A .type A,@object .section .bss,"aw",@nobits .globl A .p2align 4, 0x0 A: .zero 4000000 .size A, 4000000 .protected B ; @B .type B,@object .globl B .p2align 4, 0x0 B: .zero 4000000 .size B, 4000000 .protected C ; @C .type C,@object .globl C .p2align 4, 0x0 C: .zero 4000000 .size C, 4000000 .type __hip_cuid_,@object ; @__hip_cuid_ .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym A .addrsig_sym B .addrsig_sym C .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 24 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z9vectorAddPA1000_fS0_S0_ .private_segment_fixed_size: 0 .sgpr_count: 10 .sgpr_spill_count: 0 .symbol: _Z9vectorAddPA1000_fS0_S0_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
6bdc10dbc5f9682511c20d632ef61c630a4d2c3b
#include <stdio.h> #include <stdlib.h> #define CSC(call) \ do { \ cudaError_t res = call; \ if (res != cudaSuccess) { \ fprintf(stderr, "ERROR: file:%s line:%d message:%s\n", \ __FILE__, __LINE__, cudaGetErrorString(res)); \ exit(0); \ } \ } while (0) __global__ void kernel(double *devVec, double *revVec, int n) { int idx = threadIdx.x + blockIdx.x * blockDim.x; int offset = blockDim.x + gridDim.x; while (idx < n) { revVec[idx] = devVec[n - 1 - idx]; idx += offset; } } void printVector(double *vec, int size) { for (int i = 0; i < size; ++i) { printf("%f ", vec[i]); } printf("\n"); } int main() { int n; // Vector size double *vec; int blocks = 256, threads = 256; // Set up initial data scanf("%d", &n); vec = (double *)malloc(sizeof(double) * n); for (int i = 0; i < n; ++i) { scanf("%lf", &vec[i]); } // Create CUDA vectors and copy data to first double *devVec, *revVec; CSC(cudaMalloc(&devVec, sizeof(double) * n)); CSC(cudaMalloc(&revVec, sizeof(double) * n)); CSC(cudaMemcpy(devVec, vec, sizeof(double) * n, cudaMemcpyHostToDevice)); // Call kernel kernel<<<blocks, threads>>>(devVec, revVec, n); CSC(cudaGetLastError()); // Copy results from device to host memory CSC(cudaMemcpy(vec, revVec, sizeof(double) * n, cudaMemcpyDeviceToHost)); CSC(cudaFree(devVec)); CSC(cudaFree(revVec)); // Print results for (int i = 0; i < n; ++i) { printf("%.10e ", vec[i]); } free(vec); return 0; }
.file "tmpxft_0037632d_00000000-6_lab1.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "%f " .LC1: .string "\n" .text .globl _Z11printVectorPdi .type _Z11printVectorPdi, @function _Z11printVectorPdi: .LFB2027: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 leaq .LC0(%rip), %r13 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movq %rdi, %r12 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movl %esi, %ebp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 xorl %ebx, %ebx pushq %rcx .cfi_def_cfa_offset 48 .L3: cmpl %ebx, %ebp jle .L7 movsd (%r12,%rbx,8), %xmm0 movq %r13, %rsi movl $2, %edi movb $1, %al incq %rbx call __printf_chk@PLT jmp .L3 .L7: popq %rdx .cfi_def_cfa_offset 40 leaq .LC1(%rip), %rsi popq %rbx .cfi_def_cfa_offset 32 movl $2, %edi popq %rbp .cfi_def_cfa_offset 24 xorl %eax, %eax popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 jmp __printf_chk@PLT .cfi_endproc .LFE2027: .size _Z11printVectorPdi, .-_Z11printVectorPdi .globl _Z28__device_stub__Z6kernelPdS_iPdS_i .type _Z28__device_stub__Z6kernelPdS_iPdS_i, @function _Z28__device_stub__Z6kernelPdS_iPdS_i: .LFB2053: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movl %edx, 12(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 12(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L8 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z6kernelPdS_i(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L8: movq 120(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z28__device_stub__Z6kernelPdS_iPdS_i, .-_Z28__device_stub__Z6kernelPdS_iPdS_i .globl _Z6kernelPdS_i .type _Z6kernelPdS_i, @function _Z6kernelPdS_i: .LFB2054: .cfi_startproc endbr64 jmp _Z28__device_stub__Z6kernelPdS_iPdS_i .cfi_endproc .LFE2054: .size _Z6kernelPdS_i, .-_Z6kernelPdS_i .section .rodata.str1.1 .LC2: .string "%d" .LC3: .string "%lf" .LC4: .string "/home/ubuntu/Datasets/stackv2/train-structured/smaliav/MAI_Study/master/PGP/lab1/lab1.cu" .LC5: .string "ERROR: file:%s line:%d message:%s\n" .LC6: .string "%.10e " .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 leaq .LC2(%rip), %rdi leaq .LC3(%rip), %r13 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 xorl %ebp, %ebp pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 subq $72, %rsp .cfi_def_cfa_offset 112 movq %fs:40, %rax movq %rax, 56(%rsp) xorl %eax, %eax leaq 12(%rsp), %rsi call __isoc23_scanf@PLT movslq 12(%rsp), %rdi salq $3, %rdi call malloc@PLT movq %rax, %rbx movq %rax, %r12 .L14: movslq 12(%rsp), %rsi cmpl %ebp, %esi jle .L30 movq %r12, %rsi movq %r13, %rdi xorl %eax, %eax incl %ebp call __isoc23_scanf@PLT addq $8, %r12 jmp .L14 .L30: leaq 16(%rsp), %rdi salq $3, %rsi call cudaMalloc@PLT movl %eax, %edi testl %eax, %eax je .L16 call cudaGetErrorString@PLT movl $48, %r8d movq %rax, %r9 jmp .L29 .L16: movslq 12(%rsp), %rsi leaq 24(%rsp), %rdi salq $3, %rsi call cudaMalloc@PLT movl %eax, %edi testl %eax, %eax je .L17 call cudaGetErrorString@PLT movl $49, %r8d movq %rax, %r9 .L29: movq stderr(%rip), %rdi leaq .LC4(%rip), %rcx leaq .LC5(%rip), %rdx xorl %eax, %eax movl $2, %esi call __fprintf_chk@PLT xorl %edi, %edi call exit@PLT .L17: movslq 12(%rsp), %rdx movq 16(%rsp), %rdi movl $1, %ecx movq %rbx, %rsi salq $3, %rdx call cudaMemcpy@PLT movl %eax, %edi testl %eax, %eax je .L18 call cudaGetErrorString@PLT movl $50, %r8d movq %rax, %r9 jmp .L29 .L18: movl $16777217, %edi xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx salq $8, %rdi movl $1, %esi movq %rdi, %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L19 movl 12(%rsp), %edx movq 24(%rsp), %rsi movq 16(%rsp), %rdi call _Z28__device_stub__Z6kernelPdS_iPdS_i .L19: call cudaGetLastError@PLT movl %eax, %edi testl %eax, %eax je .L20 call cudaGetErrorString@PLT movl $54, %r8d movq %rax, %r9 jmp .L29 .L20: movslq 12(%rsp), %rdx movq 24(%rsp), %rsi movq %rbx, %rdi movl $2, %ecx salq $3, %rdx call cudaMemcpy@PLT movl %eax, %edi testl %eax, %eax je .L21 call cudaGetErrorString@PLT movl $57, %r8d movq %rax, %r9 jmp .L29 .L21: movq 16(%rsp), %rdi call cudaFree@PLT movl %eax, %edi testl %eax, %eax je .L22 call cudaGetErrorString@PLT movl $58, %r8d movq %rax, %r9 jmp .L29 .L22: movq 24(%rsp), %rdi xorl %ebp, %ebp leaq .LC6(%rip), %r12 call cudaFree@PLT movl %eax, %edi testl %eax, %eax je .L23 call cudaGetErrorString@PLT movl $59, %r8d movq %rax, %r9 jmp .L29 .L23: cmpl %ebp, 12(%rsp) jle .L31 movsd (%rbx,%rbp,8), %xmm0 movq %r12, %rsi movl $2, %edi movb $1, %al incq %rbp call __printf_chk@PLT jmp .L23 .L31: movq %rbx, %rdi call free@PLT movq 56(%rsp), %rax subq %fs:40, %rax je .L25 call __stack_chk_fail@PLT .L25: addq $72, %rsp .cfi_def_cfa_offset 40 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .section .rodata.str1.1 .LC7: .string "_Z6kernelPdS_i" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2056: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC7(%rip), %rdx movq %rax, %rdi leaq _Z6kernelPdS_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2056: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6kernelPdS_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */ /* 0x000e220000002500 */ /*0020*/ S2R R10, SR_TID.X ; /* 0x00000000000a7919 */ /* 0x000e620000002100 */ /*0030*/ ULDC UR5, c[0x0][0x0] ; /* 0x0000000000057ab9 */ /* 0x000fe40000000800 */ /*0040*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */ /* 0x001fcc000f8e023f */ /*0050*/ IADD3 R4, R10, UR4, RZ ; /* 0x000000040a047c10 */ /* 0x002fc8000fffe0ff */ /*0060*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x170], PT ; /* 0x00005c0004007a0c */ /* 0x000fda0003f06270 */ /*0070*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0080*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff007624 */ /* 0x000fe200078e00ff */ /*0090*/ LOP3.LUT R5, RZ, UR4, RZ, 0x33, !PT ; /* 0x00000004ff057c12 */ /* 0x000fe2000f8e33ff */ /*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*00b0*/ BSSY B0, 0x340 ; /* 0x0000028000007945 */ /* 0x000fe40003800000 */ /*00c0*/ IADD3 R0, R0, c[0x0][0xc], RZ ; /* 0x0000030000007a10 */ /* 0x000fe40007ffe0ff */ /*00d0*/ IADD3 R5, -R10, c[0x0][0x170], R5 ; /* 0x00005c000a057a10 */ /* 0x000fe40007ffe105 */ /*00e0*/ I2F.U32.RP R6, R0 ; /* 0x0000000000067306 */ /* 0x000e220000209000 */ /*00f0*/ IMAD.MOV R7, RZ, RZ, -R0 ; /* 0x000000ffff077224 */ /* 0x000fe200078e0a00 */ /*0100*/ ISETP.NE.U32.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fcc0003f45070 */ /*0110*/ MUFU.RCP R6, R6 ; /* 0x0000000600067308 */ /* 0x001e240000001000 */ /*0120*/ IADD3 R2, R6, 0xffffffe, RZ ; /* 0x0ffffffe06027810 */ /* 0x001fcc0007ffe0ff */ /*0130*/ F2I.FTZ.U32.TRUNC.NTZ R3, R2 ; /* 0x0000000200037305 */ /* 0x000064000021f000 */ /*0140*/ MOV R2, RZ ; /* 0x000000ff00027202 */ /* 0x001fe20000000f00 */ /*0150*/ IMAD R7, R7, R3, RZ ; /* 0x0000000307077224 */ /* 0x002fc800078e02ff */ /*0160*/ IMAD.HI.U32 R8, R3, R7, R2 ; /* 0x0000000703087227 */ /* 0x000fcc00078e0002 */ /*0170*/ IMAD.HI.U32 R8, R8, R5, RZ ; /* 0x0000000508087227 */ /* 0x000fc800078e00ff */ /*0180*/ IMAD.MOV R3, RZ, RZ, -R8 ; /* 0x000000ffff037224 */ /* 0x000fc800078e0a08 */ /*0190*/ IMAD R5, R0, R3, R5 ; /* 0x0000000300057224 */ /* 0x000fe200078e0205 */ /*01a0*/ MOV R3, R4 ; /* 0x0000000400037202 */ /* 0x000fc80000000f00 */ /*01b0*/ ISETP.GE.U32.AND P0, PT, R5, R0, PT ; /* 0x000000000500720c */ /* 0x000fda0003f06070 */ /*01c0*/ @P0 IMAD.IADD R5, R5, 0x1, -R0 ; /* 0x0000000105050824 */ /* 0x000fe200078e0a00 */ /*01d0*/ @P0 IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108080810 */ /* 0x000fc80007ffe0ff */ /*01e0*/ ISETP.GE.U32.AND P1, PT, R5, R0, PT ; /* 0x000000000500720c */ /* 0x000fda0003f26070 */ /*01f0*/ @P1 IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108081810 */ /* 0x000fe40007ffe0ff */ /*0200*/ @!P2 LOP3.LUT R8, RZ, R0, RZ, 0x33, !PT ; /* 0x00000000ff08a212 */ /* 0x000fc800078e33ff */ /*0210*/ IADD3 R2, R8.reuse, 0x1, RZ ; /* 0x0000000108027810 */ /* 0x040fe40007ffe0ff */ /*0220*/ ISETP.GE.U32.AND P1, PT, R8, 0x3, PT ; /* 0x000000030800780c */ /* 0x000fe40003f26070 */ /*0230*/ LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ; /* 0x0000000302027812 */ /* 0x000fda000780c0ff */ /*0240*/ @!P0 BRA 0x330 ; /* 0x000000e000008947 */ /* 0x000fea0003800000 */ /*0250*/ IMAD.MOV.U32 R6, RZ, RZ, 0x1 ; /* 0x00000001ff067424 */ /* 0x000fe200078e00ff */ /*0260*/ IADD3 R11, -R0, RZ, RZ ; /* 0x000000ff000b7210 */ /* 0x000fe20007ffe1ff */ /*0270*/ IMAD.MOV.U32 R7, RZ, RZ, 0x8 ; /* 0x00000008ff077424 */ /* 0x000fc600078e00ff */ /*0280*/ IADD3 R6, -R3.reuse, c[0x0][0x170], -R6 ; /* 0x00005c0003067a10 */ /* 0x040fe20007ffe906 */ /*0290*/ IMAD.WIDE R4, R3, R7, c[0x0][0x168] ; /* 0x00005a0003047625 */ /* 0x000fc800078e0207 */ /*02a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x000fca00078e0207 */ /*02b0*/ LDG.E.64 R8, [R6.64] ; /* 0x0000000406087981 */ /* 0x0000a2000c1e1b00 */ /*02c0*/ IADD3 R2, R2, -0x1, RZ ; /* 0xffffffff02027810 */ /* 0x000fe20007ffe0ff */ /*02d0*/ IMAD.IADD R3, R0, 0x1, R3 ; /* 0x0000000100037824 */ /* 0x000fc600078e0203 */ /*02e0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fe20003f05270 */ /*02f0*/ IMAD.WIDE R6, R11, 0x8, R6 ; /* 0x000000080b067825 */ /* 0x001fe200078e0206 */ /*0300*/ STG.E.64 [R4.64], R8 ; /* 0x0000000804007986 */ /* 0x0041e6000c101b04 */ /*0310*/ IMAD.WIDE R4, R0, 0x8, R4 ; /* 0x0000000800047825 */ /* 0x001fd000078e0204 */ /*0320*/ @P0 BRA 0x2b0 ; /* 0xffffff8000000947 */ /* 0x000fea000383ffff */ /*0330*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0340*/ @!P1 EXIT ; /* 0x000000000000994d */ /* 0x000fea0003800000 */ /*0350*/ IMAD.MOV R25, RZ, RZ, -R0 ; /* 0x000000ffff197224 */ /* 0x000fe400078e0a00 */ /*0360*/ LOP3.LUT R2, RZ, R3, RZ, 0x33, !PT ; /* 0x00000003ff027212 */ /* 0x000fe400078e33ff */ /*0370*/ MOV R8, 0x8 ; /* 0x0000000800087802 */ /* 0x001fe40000000f00 */ /*0380*/ IADD3 R2, R2, c[0x0][0x170], RZ ; /* 0x00005c0002027a10 */ /* 0x000fca0007ffe0ff */ /*0390*/ IMAD.WIDE R4, R2, R8, c[0x0][0x160] ; /* 0x0000580002047625 */ /* 0x000fca00078e0208 */ /*03a0*/ LDG.E.64 R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea2000c1e1b00 */ /*03b0*/ IMAD.WIDE R8, R3, R8, c[0x0][0x168] ; /* 0x00005a0003087625 */ /* 0x000fc800078e0208 */ /*03c0*/ IMAD.WIDE R10, R25, 0x8, R4 ; /* 0x00000008190a7825 */ /* 0x000fe200078e0204 */ /*03d0*/ STG.E.64 [R8.64], R6 ; /* 0x0000000608007986 */ /* 0x0041e8000c101b04 */ /*03e0*/ LDG.E.64 R12, [R10.64] ; /* 0x000000040a0c7981 */ /* 0x000ea2000c1e1b00 */ /*03f0*/ IMAD.WIDE R14, R0, 0x8, R8 ; /* 0x00000008000e7825 */ /* 0x000fc800078e0208 */ /*0400*/ IMAD.WIDE R16, R25, 0x8, R10 ; /* 0x0000000819107825 */ /* 0x000fe200078e020a */ /*0410*/ STG.E.64 [R14.64], R12 ; /* 0x0000000c0e007986 */ /* 0x0041e8000c101b04 */ /*0420*/ LDG.E.64 R18, [R16.64] ; /* 0x0000000410127981 */ /* 0x000ea2000c1e1b00 */ /*0430*/ IMAD.WIDE R20, R0, 0x8, R14 ; /* 0x0000000800147825 */ /* 0x000fc800078e020e */ /*0440*/ IMAD.WIDE R22, R25, 0x8, R16 ; /* 0x0000000819167825 */ /* 0x000fe200078e0210 */ /*0450*/ STG.E.64 [R20.64], R18 ; /* 0x0000001214007986 */ /* 0x0041ea000c101b04 */ /*0460*/ LDG.E.64 R22, [R22.64] ; /* 0x0000000416167981 */ /* 0x000ea2000c1e1b00 */ /*0470*/ IMAD.WIDE R4, R0.reuse, 0x8, R20 ; /* 0x0000000800047825 */ /* 0x040fe200078e0214 */ /*0480*/ IADD3 R3, R0, R0, R3 ; /* 0x0000000000037210 */ /* 0x000fc80007ffe003 */ /*0490*/ IADD3 R3, R0, R0, R3 ; /* 0x0000000000037210 */ /* 0x000fc80007ffe003 */ /*04a0*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x170], PT ; /* 0x00005c0003007a0c */ /* 0x000fe20003f06270 */ /*04b0*/ STG.E.64 [R4.64], R22 ; /* 0x0000001604007986 */ /* 0x0041d8000c101b04 */ /*04c0*/ @!P0 BRA 0x360 ; /* 0xfffffe9000008947 */ /* 0x000fea000383ffff */ /*04d0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*04e0*/ BRA 0x4e0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*04f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0500*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0510*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #define CSC(call) \ do { \ hipError_t res = call; \ if (res != hipSuccess) { \ fprintf(stderr, "ERROR: file:%s line:%d message:%s\n", \ __FILE__, __LINE__, hipGetErrorString(res)); \ exit(0); \ } \ } while (0) __global__ void kernel(double *devVec, double *revVec, int n) { int idx = threadIdx.x + blockIdx.x * blockDim.x; int offset = blockDim.x + gridDim.x; while (idx < n) { revVec[idx] = devVec[n - 1 - idx]; idx += offset; } } void printVector(double *vec, int size) { for (int i = 0; i < size; ++i) { printf("%f ", vec[i]); } printf("\n"); } int main() { int n; // Vector size double *vec; int blocks = 256, threads = 256; // Set up initial data scanf("%d", &n); vec = (double *)malloc(sizeof(double) * n); for (int i = 0; i < n; ++i) { scanf("%lf", &vec[i]); } // Create CUDA vectors and copy data to first double *devVec, *revVec; CSC(hipMalloc(&devVec, sizeof(double) * n)); CSC(hipMalloc(&revVec, sizeof(double) * n)); CSC(hipMemcpy(devVec, vec, sizeof(double) * n, hipMemcpyHostToDevice)); // Call kernel kernel<<<blocks, threads>>>(devVec, revVec, n); CSC(hipGetLastError()); // Copy results from device to host memory CSC(hipMemcpy(vec, revVec, sizeof(double) * n, hipMemcpyDeviceToHost)); CSC(hipFree(devVec)); CSC(hipFree(revVec)); // Print results for (int i = 0; i < n; ++i) { printf("%.10e ", vec[i]); } free(vec); return 0; }
.text .file "lab1.hip" .globl _Z21__device_stub__kernelPdS_i # -- Begin function _Z21__device_stub__kernelPdS_i .type _Z21__device_stub__kernelPdS_i,@function _Z21__device_stub__kernelPdS_i: # @_Z21__device_stub__kernelPdS_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6kernelPdS_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__kernelPdS_i, .Lfunc_end0-_Z21__device_stub__kernelPdS_i .cfi_endproc # -- End function .globl _Z11printVectorPdi # -- Begin function _Z11printVectorPdi .type _Z11printVectorPdi,@function _Z11printVectorPdi: # @_Z11printVectorPdi .cfi_startproc # %bb.0: testl %esi, %esi jle .LBB1_4 # %bb.1: # %.lr.ph.preheader pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movq %rdi, %rbx movl %esi, %r14d xorl %r15d, %r15d .LBB1_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movsd (%rbx,%r15,8), %xmm0 # xmm0 = mem[0],zero movl $.L.str, %edi movb $1, %al callq printf incq %r15 cmpq %r15, %r14 jne .LBB1_2 # %bb.3: popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 .cfi_restore %rbx .cfi_restore %r14 .cfi_restore %r15 .LBB1_4: # %._crit_edge movl $10, %edi jmp putchar@PLT # TAILCALL .Lfunc_end1: .size _Z11printVectorPdi, .Lfunc_end1-_Z11printVectorPdi .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $24, %rsp .cfi_def_cfa_offset 64 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 4(%rsp), %rbx movl $.L.str.2, %edi movq %rbx, %rsi xorl %eax, %eax callq __isoc23_scanf movslq (%rbx), %r15 leaq (,%r15,8), %r14 movq %r14, %rdi callq malloc movq %rax, %rbx testq %r15, %r15 jle .LBB2_4 # %bb.1: # %.lr.ph.preheader movq %rbx, %r15 xorl %r12d, %r12d .LBB2_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl $.L.str.3, %edi movq %r15, %rsi xorl %eax, %eax callq __isoc23_scanf incq %r12 movslq 4(%rsp), %r14 addq $8, %r15 cmpq %r14, %r12 jl .LBB2_2 # %bb.3: # %._crit_edge.loopexit shlq $3, %r14 .LBB2_4: # %._crit_edge leaq 16(%rsp), %rdi movq %r14, %rsi callq hipMalloc testl %eax, %eax jne .LBB2_5 # %bb.7: movslq 4(%rsp), %rsi shlq $3, %rsi leaq 8(%rsp), %rdi callq hipMalloc testl %eax, %eax jne .LBB2_8 # %bb.9: movq 16(%rsp), %rdi movslq 4(%rsp), %rdx shlq $3, %rdx movq %rbx, %rsi movl $1, %ecx callq hipMemcpy testl %eax, %eax jne .LBB2_10 # %bb.11: movabsq $4294967552, %rdi # imm = 0x100000100 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB2_13 # %bb.12: movq 16(%rsp), %rdi movq 8(%rsp), %rsi movl 4(%rsp), %edx callq _Z21__device_stub__kernelPdS_i .LBB2_13: callq hipGetLastError testl %eax, %eax jne .LBB2_14 # %bb.15: movq 8(%rsp), %rsi movslq 4(%rsp), %rdx shlq $3, %rdx movq %rbx, %rdi movl $2, %ecx callq hipMemcpy testl %eax, %eax jne .LBB2_16 # %bb.17: movq 16(%rsp), %rdi callq hipFree testl %eax, %eax jne .LBB2_18 # %bb.19: movq 8(%rsp), %rdi callq hipFree testl %eax, %eax jne .LBB2_24 # %bb.20: # %.preheader cmpl $0, 4(%rsp) jle .LBB2_23 # %bb.21: # %.lr.ph48.preheader xorl %r14d, %r14d .LBB2_22: # %.lr.ph48 # =>This Inner Loop Header: Depth=1 movsd (%rbx,%r14,8), %xmm0 # xmm0 = mem[0],zero movl $.L.str.6, %edi movb $1, %al callq printf incq %r14 movslq 4(%rsp), %rax cmpq %rax, %r14 jl .LBB2_22 .LBB2_23: # %._crit_edge49 movq %rbx, %rdi callq free xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB2_5: .cfi_def_cfa_offset 64 movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.4, %esi movl $.L.str.5, %edx movq %rbx, %rdi movl $50, %ecx jmp .LBB2_6 .LBB2_8: movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.4, %esi movl $.L.str.5, %edx movq %rbx, %rdi movl $51, %ecx jmp .LBB2_6 .LBB2_10: movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.4, %esi movl $.L.str.5, %edx movq %rbx, %rdi movl $52, %ecx jmp .LBB2_6 .LBB2_14: movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.4, %esi movl $.L.str.5, %edx movq %rbx, %rdi movl $56, %ecx jmp .LBB2_6 .LBB2_16: movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.4, %esi movl $.L.str.5, %edx movq %rbx, %rdi movl $59, %ecx jmp .LBB2_6 .LBB2_18: movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.4, %esi movl $.L.str.5, %edx movq %rbx, %rdi movl $60, %ecx jmp .LBB2_6 .LBB2_24: movq stderr(%rip), %rbx movl %eax, %edi callq hipGetErrorString movl $.L.str.4, %esi movl $.L.str.5, %edx movq %rbx, %rdi movl $61, %ecx .LBB2_6: movq %rax, %r8 xorl %eax, %eax callq fprintf xorl %edi, %edi callq exit .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6kernelPdS_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z6kernelPdS_i,@object # @_Z6kernelPdS_i .section .rodata,"a",@progbits .globl _Z6kernelPdS_i .p2align 3, 0x0 _Z6kernelPdS_i: .quad _Z21__device_stub__kernelPdS_i .size _Z6kernelPdS_i, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "%f " .size .L.str, 4 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "%d" .size .L.str.2, 3 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "%lf" .size .L.str.3, 4 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "ERROR: file:%s line:%d message:%s\n" .size .L.str.4, 35 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/smaliav/MAI_Study/master/PGP/lab1/lab1.hip" .size .L.str.5, 105 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "%.10e " .size .L.str.6, 7 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6kernelPdS_i" .size .L__unnamed_1, 15 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__kernelPdS_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6kernelPdS_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6kernelPdS_i ; -- Begin function _Z6kernelPdS_i .globl _Z6kernelPdS_i .p2align 8 .type _Z6kernelPdS_i,@function _Z6kernelPdS_i: ; @_Z6kernelPdS_i ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x24 s_load_b32 s8, s[0:1], 0x10 s_add_u32 s2, s0, 24 s_addc_u32 s3, s1, 0 s_waitcnt lgkmcnt(0) s_and_b32 s9, s4, 0xffff s_mov_b32 s4, exec_lo v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1] s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_i32_e64 s8, v1 s_cbranch_execz .LBB0_3 ; %bb.1: ; %.lr.ph.preheader s_load_b32 s2, s[2:3], 0x0 s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_mov_b32 s1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) v_lshlrev_b64 v[4:5], 3, v[1:2] v_xad_u32 v2, v1, -1, s8 s_waitcnt lgkmcnt(0) s_add_i32 s2, s2, s9 v_add_co_u32 v4, vcc_lo, s6, v4 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo s_ashr_i32 s3, s2, 31 s_lshl_b64 s[6:7], s[2:3], 3 .LBB0_2: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v3, 31, v2 v_add_nc_u32_e32 v1, s2, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[6:7], 3, v[2:3] v_subrev_nc_u32_e32 v2, s2, v2 v_add_co_u32 v6, vcc_lo, s4, v6 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo v_cmp_le_i32_e32 vcc_lo, s8, v1 global_load_b64 v[6:7], v[6:7], off s_or_b32 s1, vcc_lo, s1 s_waitcnt vmcnt(0) global_store_b64 v[4:5], v[6:7], off v_add_co_u32 v4, s0, v4, s6 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v5, s0, s7, v5, s0 s_and_not1_b32 exec_lo, exec_lo, s1 s_cbranch_execnz .LBB0_2 .LBB0_3: ; %._crit_edge s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6kernelPdS_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 8 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6kernelPdS_i, .Lfunc_end0-_Z6kernelPdS_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 252 ; NumSgprs: 18 ; NumVgprs: 8 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 8 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6kernelPdS_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z6kernelPdS_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 8 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
b7567417b5f434ebe6dab9d7261161a034d04e92
#include "includes.h" __global__ void packcoo_kernel(int num_entries, int* row_indices, int* column_indices, int* aggridx, int* partidx, int* partlabel) { int entryidx = blockIdx.x * blockDim.x + threadIdx.x; if(entryidx < num_entries) { int row = row_indices[entryidx]; int col = column_indices[entryidx]; int l = partlabel[row]; int partstart = aggridx[partidx[l]]; unsigned int newindex = row - partstart; newindex <<= 16; newindex += col - partstart; row_indices[entryidx] = newindex; } }
.file "tmpxft_00335768_00000000-6_packcoo_kernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z43__device_stub__Z14packcoo_kerneliPiS_S_S_S_iPiS_S_S_S_ .type _Z43__device_stub__Z14packcoo_kerneliPiS_S_S_S_iPiS_S_S_S_, @function _Z43__device_stub__Z14packcoo_kerneliPiS_S_S_S_iPiS_S_S_S_: .LFB2032: .cfi_startproc endbr64 subq $184, %rsp .cfi_def_cfa_offset 192 movl %edi, 44(%rsp) leaq 72(%rsp), %rdi movq %rsi, 32(%rsp) leaq 84(%rsp), %rsi movq %rdx, 24(%rsp) leaq 56(%rsp), %rdx movq %rcx, 16(%rsp) leaq 64(%rsp), %rcx movq %r8, 8(%rsp) movq %r9, (%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 44(%rsp), %rax movl $1, 80(%rsp) movq %rax, 120(%rsp) leaq 32(%rsp), %rax movq %rax, 128(%rsp) leaq 24(%rsp), %rax movq %rax, 136(%rsp) leaq 16(%rsp), %rax movq %rax, 144(%rsp) leaq 8(%rsp), %rax movq %rax, 152(%rsp) movq %rsp, %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 64(%rsp) .cfi_def_cfa_offset 200 leaq _Z14packcoo_kerneliPiS_S_S_S_(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 208 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 136(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L2: movq 168(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z43__device_stub__Z14packcoo_kerneliPiS_S_S_S_iPiS_S_S_S_, .-_Z43__device_stub__Z14packcoo_kerneliPiS_S_S_S_iPiS_S_S_S_ .globl _Z14packcoo_kerneliPiS_S_S_S_ .type _Z14packcoo_kerneliPiS_S_S_S_, @function _Z14packcoo_kerneliPiS_S_S_S_: .LFB2033: .cfi_startproc endbr64 jmp _Z43__device_stub__Z14packcoo_kerneliPiS_S_S_S_iPiS_S_S_S_ .cfi_endproc .LFE2033: .size _Z14packcoo_kerneliPiS_S_S_S_, .-_Z14packcoo_kerneliPiS_S_S_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z14packcoo_kerneliPiS_S_S_S_" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z14packcoo_kerneliPiS_S_S_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z14packcoo_kerneliPiS_S_S_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R4, R4, c[0x0][0x0], R3 ; /* 0x0000000004047a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x160], PT ; /* 0x0000580004007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R2, R4, R5, c[0x0][0x168] ; /* 0x00005a0004027625 */ /* 0x000fca00078e0205 */ /*0090*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea4000c1e1900 */ /*00a0*/ IMAD.WIDE R6, R0, R5, c[0x0][0x188] ; /* 0x0000620000067625 */ /* 0x004fcc00078e0205 */ /*00b0*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ea4000c1e1900 */ /*00c0*/ IMAD.WIDE R8, R6, R5, c[0x0][0x180] ; /* 0x0000600006087625 */ /* 0x004fcc00078e0205 */ /*00d0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ea4000c1e1900 */ /*00e0*/ IMAD.WIDE R10, R8, R5, c[0x0][0x178] ; /* 0x00005e00080a7625 */ /* 0x004fc800078e0205 */ /*00f0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x000fe400078e0205 */ /*0100*/ LDG.E R11, [R10.64] ; /* 0x000000040a0b7981 */ /* 0x000ea8000c1e1900 */ /*0110*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ee2000c1e1900 */ /*0120*/ IADD3 R0, R0, -R11, RZ ; /* 0x8000000b00007210 */ /* 0x004fe40007ffe0ff */ /*0130*/ IADD3 R13, -R11, R4, RZ ; /* 0x000000040b0d7210 */ /* 0x008fc80007ffe1ff */ /*0140*/ LEA R13, R0, R13, 0x10 ; /* 0x0000000d000d7211 */ /* 0x000fca00078e80ff */ /*0150*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x000fe2000c101904 */ /*0160*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0170*/ BRA 0x170; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void packcoo_kernel(int num_entries, int* row_indices, int* column_indices, int* aggridx, int* partidx, int* partlabel) { int entryidx = blockIdx.x * blockDim.x + threadIdx.x; if(entryidx < num_entries) { int row = row_indices[entryidx]; int col = column_indices[entryidx]; int l = partlabel[row]; int partstart = aggridx[partidx[l]]; unsigned int newindex = row - partstart; newindex <<= 16; newindex += col - partstart; row_indices[entryidx] = newindex; } }
.text .file "packcoo_kernel.hip" .globl _Z29__device_stub__packcoo_kerneliPiS_S_S_S_ # -- Begin function _Z29__device_stub__packcoo_kerneliPiS_S_S_S_ .type _Z29__device_stub__packcoo_kerneliPiS_S_S_S_,@function _Z29__device_stub__packcoo_kerneliPiS_S_S_S_: # @_Z29__device_stub__packcoo_kerneliPiS_S_S_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $144, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 4(%rsp), %rax movl %edi, (%rax) leaq 56(%rsp), %rdi movq %rsi, (%rdi) leaq 48(%rsp), %rsi movq %rdx, (%rsi) leaq 40(%rsp), %rdx movq %rcx, (%rdx) leaq 32(%rsp), %rcx movq %r8, (%rcx) leaq 24(%rsp), %r8 movq %r9, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z14packcoo_kerneliPiS_S_S_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $160, %rsp .cfi_adjust_cfa_offset -160 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z29__device_stub__packcoo_kerneliPiS_S_S_S_, .Lfunc_end0-_Z29__device_stub__packcoo_kerneliPiS_S_S_S_ .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z14packcoo_kerneliPiS_S_S_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z14packcoo_kerneliPiS_S_S_S_,@object # @_Z14packcoo_kerneliPiS_S_S_S_ .section .rodata,"a",@progbits .globl _Z14packcoo_kerneliPiS_S_S_S_ .p2align 3, 0x0 _Z14packcoo_kerneliPiS_S_S_S_: .quad _Z29__device_stub__packcoo_kerneliPiS_S_S_S_ .size _Z14packcoo_kerneliPiS_S_S_S_, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z14packcoo_kerneliPiS_S_S_S_" .size .L__unnamed_1, 30 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z29__device_stub__packcoo_kerneliPiS_S_S_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z14packcoo_kerneliPiS_S_S_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z14packcoo_kerneliPiS_S_S_S_ ; -- Begin function _Z14packcoo_kerneliPiS_S_S_S_ .globl _Z14packcoo_kerneliPiS_S_S_S_ .p2align 8 .type _Z14packcoo_kerneliPiS_S_S_S_,@function _Z14packcoo_kerneliPiS_S_S_S_: ; @_Z14packcoo_kerneliPiS_S_S_S_ ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x3c s_load_b32 s3, s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b256 s[4:11], s[0:1], 0x8 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x28 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo global_load_b32 v4, v[2:3], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v5, 31, v4 v_lshlrev_b64 v[5:6], 2, v[4:5] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, s0, v5 v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo global_load_b32 v5, v[5:6], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v6, 31, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[5:6], 2, v[5:6] v_add_co_u32 v5, vcc_lo, s10, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo global_load_b32 v5, v[5:6], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v6, 31, v5 v_lshlrev_b64 v[5:6], 2, v[5:6] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v5, vcc_lo, s8, v5 v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo v_add_co_u32 v0, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo global_load_b32 v5, v[5:6], off global_load_b32 v0, v[0:1], off s_waitcnt vmcnt(1) v_sub_nc_u32_e32 v1, v4, v5 s_waitcnt vmcnt(0) v_sub_nc_u32_e32 v0, v0, v5 s_delay_alu instid0(VALU_DEP_1) v_lshl_add_u32 v0, v1, 16, v0 global_store_b32 v[2:3], v0, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z14packcoo_kerneliPiS_S_S_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 304 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z14packcoo_kerneliPiS_S_S_S_, .Lfunc_end0-_Z14packcoo_kerneliPiS_S_S_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 312 ; NumSgprs: 18 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .offset: 48 .size: 4 .value_kind: hidden_block_count_x - .offset: 52 .size: 4 .value_kind: hidden_block_count_y - .offset: 56 .size: 4 .value_kind: hidden_block_count_z - .offset: 60 .size: 2 .value_kind: hidden_group_size_x - .offset: 62 .size: 2 .value_kind: hidden_group_size_y - .offset: 64 .size: 2 .value_kind: hidden_group_size_z - .offset: 66 .size: 2 .value_kind: hidden_remainder_x - .offset: 68 .size: 2 .value_kind: hidden_remainder_y - .offset: 70 .size: 2 .value_kind: hidden_remainder_z - .offset: 88 .size: 8 .value_kind: hidden_global_offset_x - .offset: 96 .size: 8 .value_kind: hidden_global_offset_y - .offset: 104 .size: 8 .value_kind: hidden_global_offset_z - .offset: 112 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 304 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z14packcoo_kerneliPiS_S_S_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z14packcoo_kerneliPiS_S_S_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
9dbe11e5f49fa9370af7a9299c09f39e2fea6212
#include "includes.h" __global__ void glcm_calculation_nol(int *A,int *glcm, const int nx, const int ny,int maxx) { int ix = threadIdx.x + blockIdx.x * blockDim.x; int iy = threadIdx.y + blockIdx.y * blockDim.y; unsigned int idx = iy * nx + ix; //unsigned int idr = iy * (maxx+1) + ix; int k,l; int p; //Calculate GLCM if(idx < nx*ny ){ for(k=0;k<=maxx;k++){ for(l=0;l<=maxx;l++){ if((A[idx]==k) && (A[idx+1]==l)){ p=((maxx+1)*k) +l; atomicAdd(&glcm[p],1); } } } } }
.file "tmpxft_00218849_00000000-6_glcm_calculation_nol.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z45__device_stub__Z20glcm_calculation_nolPiS_iiiPiS_iii .type _Z45__device_stub__Z20glcm_calculation_nolPiS_iiiPiS_iii, @function _Z45__device_stub__Z20glcm_calculation_nolPiS_iiiPiS_iii: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movl %edx, 12(%rsp) leaq 32(%rsp), %rdx movl %ecx, 8(%rsp) leaq 40(%rsp), %rcx movl %r8d, 4(%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 12(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 168 leaq _Z20glcm_calculation_nolPiS_iii(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 176 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z45__device_stub__Z20glcm_calculation_nolPiS_iiiPiS_iii, .-_Z45__device_stub__Z20glcm_calculation_nolPiS_iiiPiS_iii .globl _Z20glcm_calculation_nolPiS_iii .type _Z20glcm_calculation_nolPiS_iii, @function _Z20glcm_calculation_nolPiS_iii: .LFB2033: .cfi_startproc endbr64 jmp _Z45__device_stub__Z20glcm_calculation_nolPiS_iiiPiS_iii .cfi_endproc .LFE2033: .size _Z20glcm_calculation_nolPiS_iii, .-_Z20glcm_calculation_nolPiS_iii .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z20glcm_calculation_nolPiS_iii" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z20glcm_calculation_nolPiS_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z20glcm_calculation_nolPiS_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */ /* 0x000fe20000000a00 */ /*0030*/ ISETP.LE.AND P0, PT, RZ, c[0x0][0x178], PT ; /* 0x00005e00ff007a0c */ /* 0x000fe20003f03270 */ /*0040*/ UIMAD UR4, UR5, UR4, URZ ; /* 0x00000004050472a4 */ /* 0x000fe2000f8e023f */ /*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e280000002100 */ /*0060*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e680000002600 */ /*0070*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e620000002200 */ /*0080*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fc400078e0203 */ /*0090*/ IMAD R3, R2, c[0x0][0x4], R5 ; /* 0x0000010002037a24 */ /* 0x002fc800078e0205 */ /*00a0*/ IMAD R3, R3, c[0x0][0x170], R0 ; /* 0x00005c0003037a24 */ /* 0x000fca00078e0200 */ /*00b0*/ ISETP.GE.U32.OR P0, PT, R3, UR4, !P0 ; /* 0x0000000403007c0c */ /* 0x000fda000c706470 */ /*00c0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00d0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*00e0*/ IADD3 R4, R3.reuse, 0x1, RZ ; /* 0x0000000103047810 */ /* 0x040fe20007ffe0ff */ /*00f0*/ IMAD.MOV.U32 R0, RZ, RZ, RZ ; /* 0x000000ffff007224 */ /* 0x000fe200078e00ff */ /*0100*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0110*/ IMAD.WIDE.U32 R2, R3, R5, c[0x0][0x160] ; /* 0x0000580003027625 */ /* 0x000fc800078e0005 */ /*0120*/ IMAD.WIDE.U32 R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e0005 */ /*0130*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff117624 */ /* 0x000fe400078e00ff */ /*0140*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */ /* 0x001fc600078e00ff */ /*0150*/ ISETP.GE.U32.AND P0, PT, R17, 0x3, PT ; /* 0x000000031100780c */ /* 0x000fda0003f06070 */ /*0160*/ @!P0 BRA 0x770 ; /* 0x0000060000008947 */ /* 0x000fea0003800000 */ /*0170*/ IADD3 R17, R17, 0x1, RZ ; /* 0x0000000111117810 */ /* 0x000fe20007ffe0ff */ /*0180*/ IMAD.MOV.U32 R15, RZ, RZ, 0x4 ; /* 0x00000004ff0f7424 */ /* 0x000fc800078e00ff */ /*0190*/ IMAD R8, R17.reuse, R0, RZ ; /* 0x0000000011087224 */ /* 0x040fe200078e02ff */ /*01a0*/ LOP3.LUT R17, R17, 0x3, RZ, 0xc0, !PT ; /* 0x0000000311117812 */ /* 0x000fc600078ec0ff */ /*01b0*/ IMAD.WIDE R6, R8.reuse, R15.reuse, c[0x0][0x168] ; /* 0x00005a0008067625 */ /* 0x0c0fe200078e020f */ /*01c0*/ IADD3 R9, R8.reuse, 0x3, RZ ; /* 0x0000000308097810 */ /* 0x040fe40007ffe0ff */ /*01d0*/ IADD3 R12, R8.reuse, 0x2, RZ ; /* 0x00000002080c7810 */ /* 0x040fe40007ffe0ff */ /*01e0*/ IADD3 R14, R8, 0x1, RZ ; /* 0x00000001080e7810 */ /* 0x000fe20007ffe0ff */ /*01f0*/ IMAD.WIDE R8, R9, R15, c[0x0][0x168] ; /* 0x00005a0009087625 */ /* 0x000fc800078e020f */ /*0200*/ IMAD.WIDE R12, R12, R15, c[0x0][0x168] ; /* 0x00005a000c0c7625 */ /* 0x000fc800078e020f */ /*0210*/ IMAD.WIDE R14, R14, R15, c[0x0][0x168] ; /* 0x00005a000e0e7625 */ /* 0x000fc800078e020f */ /*0220*/ IMAD.MOV.U32 R10, RZ, RZ, R12 ; /* 0x000000ffff0a7224 */ /* 0x000fe400078e000c */ /*0230*/ IMAD.MOV.U32 R11, RZ, RZ, R9 ; /* 0x000000ffff0b7224 */ /* 0x000fe400078e0009 */ /*0240*/ IMAD.MOV.U32 R12, RZ, RZ, R14 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e000e */ /*0250*/ IADD3 R14, -R17, c[0x0][0x178], RZ ; /* 0x00005e00110e7a10 */ /* 0x000fe20007ffe1ff */ /*0260*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */ /* 0x000fe400078e00ff */ /*0270*/ LDG.E R19, [R2.64] ; /* 0x0000000402137981 */ /* 0x000ea2000c1e1900 */ /*0280*/ BSSY B0, 0x370 ; /* 0x000000e000007945 */ /* 0x000fe20003800000 */ /*0290*/ ISETP.NE.AND P0, PT, R19, R0, PT ; /* 0x000000001300720c */ /* 0x004fda0003f05270 */ /*02a0*/ @P0 BRA 0x360 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*02b0*/ LDG.E R16, [R4.64] ; /* 0x0000000404107981 */ /* 0x000ea2000c1e1900 */ /*02c0*/ IMAD.MOV.U32 R19, RZ, RZ, R0 ; /* 0x000000ffff137224 */ /* 0x000fe200078e0000 */ /*02d0*/ ISETP.NE.AND P0, PT, R9, R16, PT ; /* 0x000000100900720c */ /* 0x004fda0003f05270 */ /*02e0*/ @P0 BRA 0x360 ; /* 0x0000007000000947 */ /* 0x000fea0003800000 */ /*02f0*/ S2R R16, SR_LANEID ; /* 0x0000000000107919 */ /* 0x000e220000000000 */ /*0300*/ VOTEU.ANY UR6, UPT, PT ; /* 0x0000000000067886 */ /* 0x000fe400038e0100 */ /*0310*/ UFLO.U32 UR7, UR6 ; /* 0x00000006000772bd */ /* 0x000fe200080e0000 */ /*0320*/ POPC R17, UR6 ; /* 0x0000000600117d09 */ /* 0x000e6a0008000000 */ /*0330*/ ISETP.EQ.U32.AND P0, PT, R16, UR7, PT ; /* 0x0000000710007c0c */ /* 0x001fda000bf02070 */ /*0340*/ @P0 RED.E.ADD.STRONG.GPU [R6.64], R17 ; /* 0x000000110600098e */ /* 0x0021e8000c10e184 */ /*0350*/ LDG.E R19, [R2.64] ; /* 0x0000000402137981 */ /* 0x000164000c1e1900 */ /*0360*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0370*/ ISETP.NE.AND P0, PT, R19, R0, PT ; /* 0x000000001300720c */ /* 0x020fe20003f05270 */ /*0380*/ BSSY B0, 0x5b0 ; /* 0x0000022000007945 */ /* 0x000fd80003800000 */ /*0390*/ @P0 BRA 0x5a0 ; /* 0x0000020000000947 */ /* 0x000fea0003800000 */ /*03a0*/ LDG.E R16, [R4.64] ; /* 0x0000000404107981 */ /* 0x000ea2000c1e1900 */ /*03b0*/ IADD3 R17, R9, 0x1, RZ ; /* 0x0000000109117810 */ /* 0x001fe20007ffe0ff */ /*03c0*/ BSSY B1, 0x4a0 ; /* 0x000000d000017945 */ /* 0x000fe20003800000 */ /*03d0*/ IMAD.MOV.U32 R19, RZ, RZ, R0 ; /* 0x000000ffff137224 */ /* 0x000fe400078e0000 */ /*03e0*/ ISETP.NE.AND P0, PT, R17, R16, PT ; /* 0x000000101100720c */ /* 0x004fda0003f05270 */ /*03f0*/ @P0 BRA 0x490 ; /* 0x0000009000000947 */ /* 0x000fea0003800000 */ /*0400*/ S2R R16, SR_LANEID ; /* 0x0000000000107919 */ /* 0x000e220000000000 */ /*0410*/ VOTEU.ANY UR6, UPT, PT ; /* 0x0000000000067886 */ /* 0x000fe200038e0100 */ /*0420*/ IMAD.MOV.U32 R17, RZ, RZ, R15 ; /* 0x000000ffff117224 */ /* 0x000fe200078e000f */ /*0430*/ UFLO.U32 UR7, UR6 ; /* 0x00000006000772bd */ /* 0x000fe200080e0000 */ /*0440*/ POPC R21, UR6 ; /* 0x0000000600157d09 */ /* 0x000e6a0008000000 */ /*0450*/ ISETP.EQ.U32.AND P0, PT, R16, UR7, PT ; /* 0x0000000710007c0c */ /* 0x001fe2000bf02070 */ /*0460*/ IMAD.MOV.U32 R16, RZ, RZ, R12 ; /* 0x000000ffff107224 */ /* 0x000fd800078e000c */ /*0470*/ @P0 RED.E.ADD.STRONG.GPU [R16.64], R21 ; /* 0x000000151000098e */ /* 0x0021e8000c10e184 */ /*0480*/ LDG.E R19, [R2.64] ; /* 0x0000000402137981 */ /* 0x000164000c1e1900 */ /*0490*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*04a0*/ ISETP.NE.AND P0, PT, R19, R0, PT ; /* 0x000000001300720c */ /* 0x020fda0003f05270 */ /*04b0*/ @P0 BRA 0x5a0 ; /* 0x000000e000000947 */ /* 0x000fea0003800000 */ /*04c0*/ LDG.E R16, [R4.64] ; /* 0x0000000404107981 */ /* 0x001ea2000c1e1900 */ /*04d0*/ IADD3 R17, R9, 0x2, RZ ; /* 0x0000000209117810 */ /* 0x000fe20007ffe0ff */ /*04e0*/ IMAD.MOV.U32 R19, RZ, RZ, R0 ; /* 0x000000ffff137224 */ /* 0x000fc600078e0000 */ /*04f0*/ ISETP.NE.AND P0, PT, R17, R16, PT ; /* 0x000000101100720c */ /* 0x004fda0003f05270 */ /*0500*/ @P0 BRA 0x5a0 ; /* 0x0000009000000947 */ /* 0x000fea0003800000 */ /*0510*/ S2R R16, SR_LANEID ; /* 0x0000000000107919 */ /* 0x000e220000000000 */ /*0520*/ VOTEU.ANY UR6, UPT, PT ; /* 0x0000000000067886 */ /* 0x000fe200038e0100 */ /*0530*/ IMAD.MOV.U32 R17, RZ, RZ, R13 ; /* 0x000000ffff117224 */ /* 0x000fe200078e000d */ /*0540*/ UFLO.U32 UR7, UR6 ; /* 0x00000006000772bd */ /* 0x000fe200080e0000 */ /*0550*/ POPC R21, UR6 ; /* 0x0000000600157d09 */ /* 0x000e6a0008000000 */ /*0560*/ ISETP.EQ.U32.AND P0, PT, R16, UR7, PT ; /* 0x0000000710007c0c */ /* 0x001fe2000bf02070 */ /*0570*/ IMAD.MOV.U32 R16, RZ, RZ, R10 ; /* 0x000000ffff107224 */ /* 0x000fd800078e000a */ /*0580*/ @P0 RED.E.ADD.STRONG.GPU [R16.64], R21 ; /* 0x000000151000098e */ /* 0x0021e8000c10e184 */ /*0590*/ LDG.E R19, [R2.64] ; /* 0x0000000402137981 */ /* 0x000164000c1e1900 */ /*05a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*05b0*/ ISETP.NE.AND P0, PT, R19, R0, PT ; /* 0x000000001300720c */ /* 0x020fe20003f05270 */ /*05c0*/ BSSY B0, 0x6b0 ; /* 0x000000e000007945 */ /* 0x000fd80003800000 */ /*05d0*/ @P0 BRA 0x6a0 ; /* 0x000000c000000947 */ /* 0x000fea0003800000 */ /*05e0*/ LDG.E R16, [R4.64] ; /* 0x0000000404107981 */ /* 0x001ea2000c1e1900 */ /*05f0*/ IADD3 R17, R9, 0x3, RZ ; /* 0x0000000309117810 */ /* 0x000fc80007ffe0ff */ /*0600*/ ISETP.NE.AND P0, PT, R17, R16, PT ; /* 0x000000101100720c */ /* 0x004fda0003f05270 */ /*0610*/ @P0 BRA 0x6a0 ; /* 0x0000008000000947 */ /* 0x000fea0003800000 */ /*0620*/ S2R R16, SR_LANEID ; /* 0x0000000000107919 */ /* 0x000e220000000000 */ /*0630*/ VOTEU.ANY UR6, UPT, PT ; /* 0x0000000000067886 */ /* 0x000fe200038e0100 */ /*0640*/ IMAD.MOV.U32 R17, RZ, RZ, R11 ; /* 0x000000ffff117224 */ /* 0x000fe200078e000b */ /*0650*/ UFLO.U32 UR7, UR6 ; /* 0x00000006000772bd */ /* 0x000fe200080e0000 */ /*0660*/ POPC R19, UR6 ; /* 0x0000000600137d09 */ /* 0x000e6a0008000000 */ /*0670*/ ISETP.EQ.U32.AND P0, PT, R16, UR7, PT ; /* 0x0000000710007c0c */ /* 0x001fe2000bf02070 */ /*0680*/ IMAD.MOV.U32 R16, RZ, RZ, R8 ; /* 0x000000ffff107224 */ /* 0x000fd800078e0008 */ /*0690*/ @P0 RED.E.ADD.STRONG.GPU [R16.64], R19 ; /* 0x000000131000098e */ /* 0x0021e4000c10e184 */ /*06a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*06b0*/ IADD3 R14, R14, -0x4, RZ ; /* 0xfffffffc0e0e7810 */ /* 0x000fe40007ffe0ff */ /*06c0*/ IADD3 R8, P1, R8, 0x10, RZ ; /* 0x0000001008087810 */ /* 0x000fe40007f3e0ff */ /*06d0*/ ISETP.NE.AND P0, PT, R14, -0x1, PT ; /* 0xffffffff0e00780c */ /* 0x000fe40003f05270 */ /*06e0*/ IADD3 R10, P2, R10, 0x10, RZ ; /* 0x000000100a0a7810 */ /* 0x000fe20007f5e0ff */ /*06f0*/ IMAD.X R11, RZ, RZ, R11, P1 ; /* 0x000000ffff0b7224 */ /* 0x000fe200008e060b */ /*0700*/ IADD3 R12, P3, R12, 0x10, RZ ; /* 0x000000100c0c7810 */ /* 0x000fe40007f7e0ff */ /*0710*/ IADD3 R6, P4, R6, 0x10, RZ ; /* 0x0000001006067810 */ /* 0x001fe20007f9e0ff */ /*0720*/ IMAD.X R13, RZ, RZ, R13, P2 ; /* 0x000000ffff0d7224 */ /* 0x000fe200010e060d */ /*0730*/ IADD3 R9, R9, 0x4, RZ ; /* 0x0000000409097810 */ /* 0x000fe20007ffe0ff */ /*0740*/ IMAD.X R15, RZ, RZ, R15, P3 ; /* 0x000000ffff0f7224 */ /* 0x000fc400018e060f */ /*0750*/ IMAD.X R7, RZ, RZ, R7, P4 ; /* 0x000000ffff077224 */ /* 0x000fe400020e0607 */ /*0760*/ @P0 BRA 0x270 ; /* 0xfffffb0000000947 */ /* 0x000fea000383ffff */ /*0770*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff067624 */ /* 0x000fca00078e00ff */ /*0780*/ IADD3 R8, R6, 0x1, RZ ; /* 0x0000000106087810 */ /* 0x000fc80007ffe0ff */ /*0790*/ LOP3.LUT P0, R10, R8, 0x3, RZ, 0xc0, !PT ; /* 0x00000003080a7812 */ /* 0x000fda000780c0ff */ /*07a0*/ @!P0 BRA 0xb40 ; /* 0x0000039000008947 */ /* 0x000fea0003800000 */ /*07b0*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */ /* 0x000ea2000c1e1900 */ /*07c0*/ BSSY B0, 0x8d0 ; /* 0x0000010000007945 */ /* 0x000fe20003800000 */ /*07d0*/ ISETP.NE.AND P1, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x000fe40003f25270 */ /*07e0*/ ISETP.NE.AND P0, PT, R7, R0, PT ; /* 0x000000000700720c */ /* 0x004fda0003f05270 */ /*07f0*/ @P0 BRA 0x8c0 ; /* 0x000000c000000947 */ /* 0x000fea0003800000 */ /*0800*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea4000c1e1900 */ /*0810*/ ISETP.NE.AND P0, PT, R6, R9, PT ; /* 0x000000090600720c */ /* 0x004fda0003f05270 */ /*0820*/ @P0 BRA 0x8c0 ; /* 0x0000009000000947 */ /* 0x000fea0003800000 */ /*0830*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e220000000000 */ /*0840*/ VOTEU.ANY UR6, UPT, PT ; /* 0x0000000000067886 */ /* 0x000fe200038e0100 */ /*0850*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */ /* 0x000fe200078e00ff */ /*0860*/ UFLO.U32 UR7, UR6 ; /* 0x00000006000772bd */ /* 0x000fe200080e0000 */ /*0870*/ POPC R11, UR6 ; /* 0x00000006000b7d09 */ /* 0x000e6a0008000000 */ /*0880*/ ISETP.EQ.U32.AND P0, PT, R6, UR7, PT ; /* 0x0000000706007c0c */ /* 0x001fe2000bf02070 */ /*0890*/ IMAD R6, R8, R0, R9 ; /* 0x0000000008067224 */ /* 0x000fc800078e0209 */ /*08a0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x168] ; /* 0x00005a0006067625 */ /* 0x000fd000078e0207 */ /*08b0*/ @P0 RED.E.ADD.STRONG.GPU [R6.64], R11 ; /* 0x0000000b0600098e */ /* 0x0021e4000c10e184 */ /*08c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*08d0*/ @!P1 BRA 0xb40 ; /* 0x0000026000009947 */ /* 0x000fea0003800000 */ /*08e0*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */ /* 0x001ea2000c1e1900 */ /*08f0*/ BSSY B0, 0xa10 ; /* 0x0000011000007945 */ /* 0x000fe20003800000 */ /*0900*/ ISETP.NE.AND P1, PT, R10, 0x2, PT ; /* 0x000000020a00780c */ /* 0x000fe40003f25270 */ /*0910*/ ISETP.NE.AND P0, PT, R7, R0, PT ; /* 0x000000000700720c */ /* 0x004fda0003f05270 */ /*0920*/ @P0 BRA 0xa00 ; /* 0x000000d000000947 */ /* 0x000fea0003800000 */ /*0930*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea2000c1e1900 */ /*0940*/ IADD3 R7, R9, 0x1, RZ ; /* 0x0000000109077810 */ /* 0x000fc80007ffe0ff */ /*0950*/ ISETP.NE.AND P0, PT, R6, R7, PT ; /* 0x000000070600720c */ /* 0x004fda0003f05270 */ /*0960*/ @P0 BRA 0xa00 ; /* 0x0000009000000947 */ /* 0x000fea0003800000 */ /*0970*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e220000000000 */ /*0980*/ VOTEU.ANY UR6, UPT, PT ; /* 0x0000000000067886 */ /* 0x000fe200038e0100 */ /*0990*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ; /* 0x00000004ff0d7424 */ /* 0x000fe200078e00ff */ /*09a0*/ UFLO.U32 UR7, UR6 ; /* 0x00000006000772bd */ /* 0x000fe200080e0000 */ /*09b0*/ POPC R11, UR6 ; /* 0x00000006000b7d09 */ /* 0x000e6a0008000000 */ /*09c0*/ ISETP.EQ.U32.AND P0, PT, R6, UR7, PT ; /* 0x0000000706007c0c */ /* 0x001fe2000bf02070 */ /*09d0*/ IMAD R6, R8, R0, R7 ; /* 0x0000000008067224 */ /* 0x000fc800078e0207 */ /*09e0*/ IMAD.WIDE R6, R6, R13, c[0x0][0x168] ; /* 0x00005a0006067625 */ /* 0x000fd000078e020d */ /*09f0*/ @P0 RED.E.ADD.STRONG.GPU [R6.64], R11 ; /* 0x0000000b0600098e */ /* 0x0021e4000c10e184 */ /*0a00*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0a10*/ @!P1 BRA 0xb40 ; /* 0x0000012000009947 */ /* 0x000fea0003800000 */ /*0a20*/ LDG.E R7, [R2.64] ; /* 0x0000000402077981 */ /* 0x001ea2000c1e1900 */ /*0a30*/ BSSY B0, 0xb40 ; /* 0x0000010000007945 */ /* 0x000fe20003800000 */ /*0a40*/ ISETP.NE.AND P0, PT, R7, R0, PT ; /* 0x000000000700720c */ /* 0x004fda0003f05270 */ /*0a50*/ @P0 BRA 0xb30 ; /* 0x000000d000000947 */ /* 0x000fea0003800000 */ /*0a60*/ LDG.E R6, [R4.64] ; /* 0x0000000404067981 */ /* 0x000ea2000c1e1900 */ /*0a70*/ IADD3 R7, R9, 0x2, RZ ; /* 0x0000000209077810 */ /* 0x000fc80007ffe0ff */ /*0a80*/ ISETP.NE.AND P0, PT, R6, R7, PT ; /* 0x000000070600720c */ /* 0x004fda0003f05270 */ /*0a90*/ @P0 BRA 0xb30 ; /* 0x0000009000000947 */ /* 0x000fea0003800000 */ /*0aa0*/ S2R R6, SR_LANEID ; /* 0x0000000000067919 */ /* 0x000e220000000000 */ /*0ab0*/ VOTEU.ANY UR6, UPT, PT ; /* 0x0000000000067886 */ /* 0x000fe200038e0100 */ /*0ac0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ; /* 0x00000004ff0b7424 */ /* 0x000fe200078e00ff */ /*0ad0*/ UFLO.U32 UR7, UR6 ; /* 0x00000006000772bd */ /* 0x000fe200080e0000 */ /*0ae0*/ POPC R9, UR6 ; /* 0x0000000600097d09 */ /* 0x000e6a0008000000 */ /*0af0*/ ISETP.EQ.U32.AND P0, PT, R6, UR7, PT ; /* 0x0000000706007c0c */ /* 0x001fe2000bf02070 */ /*0b00*/ IMAD R6, R8, R0, R7 ; /* 0x0000000008067224 */ /* 0x000fc800078e0207 */ /*0b10*/ IMAD.WIDE R6, R6, R11, c[0x0][0x168] ; /* 0x00005a0006067625 */ /* 0x000fd000078e020b */ /*0b20*/ @P0 RED.E.ADD.STRONG.GPU [R6.64], R9 ; /* 0x000000090600098e */ /* 0x0021e4000c10e184 */ /*0b30*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0b40*/ ISETP.GE.AND P0, PT, R0.reuse, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */ /* 0x040fe40003f06270 */ /*0b50*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */ /* 0x000fd60007ffe0ff */ /*0b60*/ @!P0 BRA 0x130 ; /* 0xfffff5c000008947 */ /* 0x000fea000383ffff */ /*0b70*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0b80*/ BRA 0xb80; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0b90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ba0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0bb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0bc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0bd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0be0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0bf0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0c70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void glcm_calculation_nol(int *A,int *glcm, const int nx, const int ny,int maxx) { int ix = threadIdx.x + blockIdx.x * blockDim.x; int iy = threadIdx.y + blockIdx.y * blockDim.y; unsigned int idx = iy * nx + ix; //unsigned int idr = iy * (maxx+1) + ix; int k,l; int p; //Calculate GLCM if(idx < nx*ny ){ for(k=0;k<=maxx;k++){ for(l=0;l<=maxx;l++){ if((A[idx]==k) && (A[idx+1]==l)){ p=((maxx+1)*k) +l; atomicAdd(&glcm[p],1); } } } } }
.text .file "glcm_calculation_nol.hip" .globl _Z35__device_stub__glcm_calculation_nolPiS_iii # -- Begin function _Z35__device_stub__glcm_calculation_nolPiS_iii .type _Z35__device_stub__glcm_calculation_nolPiS_iii,@function _Z35__device_stub__glcm_calculation_nolPiS_iii: # @_Z35__device_stub__glcm_calculation_nolPiS_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $128, %rsp .cfi_def_cfa_offset 176 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 8(%rsp), %rdx movl %ecx, (%rdx) leaq 4(%rsp), %rcx movl %r8d, (%rcx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z20glcm_calculation_nolPiS_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $144, %rsp .cfi_adjust_cfa_offset -144 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z35__device_stub__glcm_calculation_nolPiS_iii, .Lfunc_end0-_Z35__device_stub__glcm_calculation_nolPiS_iii .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z20glcm_calculation_nolPiS_iii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z20glcm_calculation_nolPiS_iii,@object # @_Z20glcm_calculation_nolPiS_iii .section .rodata,"a",@progbits .globl _Z20glcm_calculation_nolPiS_iii .p2align 3, 0x0 _Z20glcm_calculation_nolPiS_iii: .quad _Z35__device_stub__glcm_calculation_nolPiS_iii .size _Z20glcm_calculation_nolPiS_iii, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z20glcm_calculation_nolPiS_iii" .size .L__unnamed_1, 32 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z35__device_stub__glcm_calculation_nolPiS_iii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z20glcm_calculation_nolPiS_iii .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z20glcm_calculation_nolPiS_iii ; -- Begin function _Z20glcm_calculation_nolPiS_iii .globl _Z20glcm_calculation_nolPiS_iii .p2align 8 .type _Z20glcm_calculation_nolPiS_iii,@function _Z20glcm_calculation_nolPiS_iii: ; @_Z20glcm_calculation_nolPiS_iii ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b128 s[4:7], s[0:1], 0x10 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v0, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2] s_mul_i32 s14, s14, s2 s_mul_i32 s2, s5, s4 s_cmp_gt_i32 s6, -1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v1, v2, s4 v_add3_u32 v0, s14, v0, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_cmp_gt_u32_e32 vcc_lo, s2, v0 s_cselect_b32 s2, -1, 0 s_and_b32 s2, vcc_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s3, s2 s_cbranch_execz .LBB0_9 ; %bb.1: ; %.preheader.lr.ph s_load_b128 s[0:3], s[0:1], 0x0 v_mov_b32_e32 v1, 0 s_mov_b32 s4, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[0:1] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s0, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo s_add_i32 s0, s6, 1 s_mov_b32 s1, 0 .LBB0_2: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB0_3 Depth 2 s_mov_b32 s5, 0 .LBB0_3: ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_b32 v0, v[2:3], off s_mov_b32 s7, exec_lo s_waitcnt vmcnt(0) v_cmpx_eq_u32_e64 s4, v0 s_cbranch_execz .LBB0_7 ; %bb.4: ; in Loop: Header=BB0_3 Depth=2 global_load_b32 v0, v[2:3], off offset:4 s_waitcnt vmcnt(0) v_cmp_eq_u32_e32 vcc_lo, s5, v0 s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_7 ; %bb.5: ; in Loop: Header=BB0_3 Depth=2 s_mov_b32 s8, exec_lo s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mbcnt_lo_u32_b32 v0, s8, 0 v_cmp_eq_u32_e32 vcc_lo, 0, v0 s_and_b32 s9, exec_lo, vcc_lo s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 exec_lo, s9 s_cbranch_execz .LBB0_7 ; %bb.6: ; in Loop: Header=BB0_3 Depth=2 s_add_i32 s10, s1, s5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_ashr_i32 s11, s10, 31 s_lshl_b64 s[10:11], s[10:11], 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_add_u32 s10, s2, s10 s_addc_u32 s11, s3, s11 s_bcnt1_i32_b32 s8, s8 v_mov_b32_e32 v0, s8 global_atomic_add_u32 v1, v0, s[10:11] .LBB0_7: ; in Loop: Header=BB0_3 Depth=2 s_or_b32 exec_lo, exec_lo, s7 s_add_i32 s5, s5, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u32 s0, s5 s_cbranch_scc1 .LBB0_3 ; %bb.8: ; %._crit_edge ; in Loop: Header=BB0_2 Depth=1 s_add_i32 s5, s4, 1 s_add_i32 s1, s1, s0 s_cmp_lg_u32 s4, s6 s_mov_b32 s4, s5 s_cbranch_scc1 .LBB0_2 .LBB0_9: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z20glcm_calculation_nolPiS_iii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z20glcm_calculation_nolPiS_iii, .Lfunc_end0-_Z20glcm_calculation_nolPiS_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 364 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 20 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z20glcm_calculation_nolPiS_iii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z20glcm_calculation_nolPiS_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
3134bd2171d552f0b5c229279f5079af8bf89206
#include <iostream> #include <stdio.h> #include <stdlib.h> #include "pinnedmem.cuh" cudaError mallocHost(void** h_mem ,uint memSize, memoryMode memMode, bool wc) { if( PINNED == memMode ) { #if CUDART_VERSION >= 2020 return cudaHostAlloc( h_mem, memSize, (wc) ? cudaHostAllocWriteCombined : 0 ); #else if (wc) {printf("Write-Combined unavailable on CUDART_VERSION less than 2020, running is: %d", CUDART_VERSION);} return cudaMallocHost( h_mem, memSize ); #endif } else { // PAGEABLE memory mode *h_mem = malloc( memSize ); } return cudaSuccess; } cudaError freeHost(void* h_mem, memoryMode memMode) { if( PINNED == memMode ) { return cudaFreeHost(h_mem); } else { free(h_mem); } return cudaSuccess; } /* * exitOnError: Show the error message and terminate the application. */ void exitOnError(const char *whereAt) { cudaError_t error = cudaGetLastError(); if(error != cudaSuccess) { // print the CUDA error message and exit printf("CUDA error at %s: %s\n", whereAt, cudaGetErrorString(error)); exit(-1); } }
.file "tmpxft_002129eb_00000000-6_pinnedmem.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3640: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3640: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z10mallocHostPPvj10memoryModeb .type _Z10mallocHostPPvj10memoryModeb, @function _Z10mallocHostPPvj10memoryModeb: .LFB3635: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movl %esi, %esi movq %rdi, %rbx testl %edx, %edx jne .L3 movzbl %cl, %ecx popq %rbx .cfi_remember_state .cfi_def_cfa_offset 8 leal 0(,%rcx,4), %edx jmp cudaHostAlloc@PLT .L3: .cfi_restore_state movq %rsi, %rdi call malloc@PLT movq %rax, (%rbx) xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3635: .size _Z10mallocHostPPvj10memoryModeb, .-_Z10mallocHostPPvj10memoryModeb .globl _Z8freeHostPv10memoryMode .type _Z8freeHostPv10memoryMode, @function _Z8freeHostPv10memoryMode: .LFB3636: .cfi_startproc endbr64 testl %esi, %esi jne .L7 jmp cudaFreeHost@PLT .L7: pushq %rax .cfi_def_cfa_offset 16 call free@PLT xorl %eax, %eax popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3636: .size _Z8freeHostPv10memoryMode, .-_Z8freeHostPv10memoryMode .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "CUDA error at %s: %s\n" .text .globl _Z11exitOnErrorPKc .type _Z11exitOnErrorPKc, @function _Z11exitOnErrorPKc: .LFB3637: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 movq %rdi, %rbx call cudaGetLastError@PLT testl %eax, %eax je .L10 movl %eax, %edi call cudaGetErrorString@PLT movl $2, %edi movq %rbx, %rdx leaq .LC0(%rip), %rsi movq %rax, %rcx xorl %eax, %eax call __printf_chk@PLT orl $-1, %edi call exit@PLT .L10: popq %rbx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3637: .size _Z11exitOnErrorPKc, .-_Z11exitOnErrorPKc .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3663: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3663: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#ifndef CUDAHELP_H_ #define CUDAHELP_H_ #include <hip/hip_runtime.h> #include <stdio.h> #include <string.h> #include "morphology.cuh" enum memoryMode { PINNED, REGULAR }; hipError_t mallocHost(void** h_mem ,uint memSize, memoryMode memMode, bool wc); hipError_t freeHost(void* h_mem, memoryMode memMode); void exitOnError(const char *whereAt); #endif
.text .file "pinnedmem.hip" .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
f1f5a39972a50084094bff340a4a00953e55d061
#include <cuda_runtime_api.h> #include <device_launch_parameters.h> #include <stdio.h> #include <time.h> // CUDA kernel. Each thread takes care of one element of c __global__ void vecAdd(float *a, float *b, float *c, int n) { // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] + b[id]; } #include <math.h> void API_add_v2(float *a, float *b, float *c, int data_num) { printf("In function: data nums = %d\n",data_num); // Number of threads in each thread block int blockSize = 1024; // Number of thread blocks in grid int gridSize = (int)ceil((float)data_num/blockSize); vecAdd<<<gridSize, blockSize>>>(a, b, c, data_num); }
.file "tmpxft_002411fc_00000000-6_tensor_merge.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .type _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i, @function _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i: .LFB2052: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z6vecAddPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .globl _Z6vecAddPfS_S_i .type _Z6vecAddPfS_S_i, @function _Z6vecAddPfS_S_i: .LFB2053: .cfi_startproc endbr64 jmp _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .cfi_endproc .LFE2053: .size _Z6vecAddPfS_S_i, .-_Z6vecAddPfS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "In function: data nums = %d\n" .text .globl _Z10API_add_v2PfS_S_i .type _Z10API_add_v2PfS_S_i, @function _Z10API_add_v2PfS_S_i: .LFB2027: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 xorl %eax, %eax movq %rdx, %r13 movl %ecx, %edx pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movq %rsi, %r12 leaq .LC0(%rip), %rsi pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 movq %rdi, %rbp movl $2, %edi pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movl %ecx, %ebx subq $40, %rsp .cfi_def_cfa_offset 80 call __printf_chk@PLT cvtsi2ssl %ebx, %xmm0 mulss .LC1(%rip), %xmm0 call ceilf@PLT movl $4194305, %edx xorl %r9d, %r9d xorl %r8d, %r8d cvttss2sil %xmm0, %eax salq $10, %rdx movl $1, %ecx movl %eax, 8(%rsp) movabsq $4294967297, %rax movq %rax, 12(%rsp) movq 8(%rsp), %rdi movl 16(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L8 addq $40, %rsp .cfi_remember_state .cfi_def_cfa_offset 40 movl %ebx, %ecx movq %r13, %rdx movq %r12, %rsi popq %rbx .cfi_def_cfa_offset 32 movq %rbp, %rdi popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 jmp _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .L8: .cfi_restore_state addq $40, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _Z10API_add_v2PfS_S_i, .-_Z10API_add_v2PfS_S_i .section .rodata.str1.1 .LC2: .string "_Z6vecAddPfS_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC2(%rip), %rdx movq %rax, %rdi leaq _Z6vecAddPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC1: .long 981467136 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6vecAddPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */ /* 0x004fca0000000000 */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <hip/hip_runtime_api.h> #include <stdio.h> #include <time.h> // CUDA kernel. Each thread takes care of one element of c __global__ void vecAdd(float *a, float *b, float *c, int n) { // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] + b[id]; } #include <math.h> void API_add_v2(float *a, float *b, float *c, int data_num) { printf("In function: data nums = %d\n",data_num); // Number of threads in each thread block int blockSize = 1024; // Number of thread blocks in grid int gridSize = (int)ceil((float)data_num/blockSize); vecAdd<<<gridSize, blockSize>>>(a, b, c, data_num); }
.text .file "tensor_merge.hip" .globl _Z21__device_stub__vecAddPfS_S_i # -- Begin function _Z21__device_stub__vecAddPfS_S_i .type _Z21__device_stub__vecAddPfS_S_i,@function _Z21__device_stub__vecAddPfS_S_i: # @_Z21__device_stub__vecAddPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6vecAddPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__vecAddPfS_S_i, .Lfunc_end0-_Z21__device_stub__vecAddPfS_S_i .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function _Z10API_add_v2PfS_S_i .LCPI1_0: .long 0x3a800000 # float 9.765625E-4 .text .globl _Z10API_add_v2PfS_S_i .type _Z10API_add_v2PfS_S_i,@function _Z10API_add_v2PfS_S_i: # @_Z10API_add_v2PfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl %ecx, %ebx movq %rdx, %r14 movq %rsi, %r15 movq %rdi, %r12 movl $.L.str, %edi movl %ecx, %esi xorl %eax, %eax callq printf cvtsi2ss %ebx, %xmm0 mulss .LCPI1_0(%rip), %xmm0 callq ceilf@PLT cvttss2si %xmm0, %edi btsq $32, %rdi movabsq $4294967296, %rdx # imm = 0x100000000 orq $1024, %rdx # imm = 0x400 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax je .LBB1_2 # %bb.1: addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB1_2: .cfi_def_cfa_offset 48 movq %r12, %rdi movq %r15, %rsi movq %r14, %rdx movl %ebx, %ecx addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp _Z21__device_stub__vecAddPfS_S_i # TAILCALL .Lfunc_end1: .size _Z10API_add_v2PfS_S_i, .Lfunc_end1-_Z10API_add_v2PfS_S_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6vecAddPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z6vecAddPfS_S_i,@object # @_Z6vecAddPfS_S_i .section .rodata,"a",@progbits .globl _Z6vecAddPfS_S_i .p2align 3, 0x0 _Z6vecAddPfS_S_i: .quad _Z21__device_stub__vecAddPfS_S_i .size _Z6vecAddPfS_S_i, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "In function: data nums = %d\n" .size .L.str, 29 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6vecAddPfS_S_i" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__vecAddPfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6vecAddPfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6vecAddPfS_S_i ; -- Begin function _Z6vecAddPfS_S_i .globl _Z6vecAddPfS_S_i .p2align 8 .type _Z6vecAddPfS_S_i,@function _Z6vecAddPfS_S_i: ; @_Z6vecAddPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6vecAddPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6vecAddPfS_S_i, .Lfunc_end0-_Z6vecAddPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 180 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6vecAddPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z6vecAddPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
8f3a9923e94f82363ad8029fed3a3c5894906490
// headers #include <stdio.h> #include <cuda.h> // for CUDA // global variables int inputLength=5; float *hostInput1=NULL; float *hostInput2=NULL; float *hostOutput=NULL; float *deviceInput1=NULL; float *deviceInput2=NULL; float *deviceOutput=NULL; // global kernel function definition __global__ void vecAdd(float *in1,float *in2,float *out,int len) { // variable declarations int i=blockIdx.x * blockDim.x + threadIdx.x; // code if(i < len) { out[i]=in1[i]+in2[i]; } } int main(int argc,char *argv[]) { // function declarations void cleanup(void); // code // allocate host-memory hostInput1=(float *)malloc(inputLength * sizeof(float)); if(hostInput1== NULL) { printf("CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Input Array 1.\nExitting ...\n"); cleanup(); exit(EXIT_FAILURE); } hostInput2=(float *)malloc(inputLength * sizeof(float)); if(hostInput2== NULL) { printf("CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Input Array 2.\nExitting ...\n"); cleanup(); exit(EXIT_FAILURE); } hostOutput=(float *)malloc(inputLength * sizeof(float)); if(hostOutput== NULL) { printf("CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Output Array.\nExitting ...\n"); cleanup(); exit(EXIT_FAILURE); } // fill above input host vectors with arbitary but hard-coded data hostInput1[0]=101.0; hostInput1[1]=102.0; hostInput1[2]=103.0; hostInput1[3]=104.0; hostInput1[4]=105.0; hostInput2[0]=201.0; hostInput2[1]=202.0; hostInput2[2]=203.0; hostInput2[3]=204.0; hostInput2[4]=205.0; // allocate device-memory int size=inputLength * sizeof(float); cudaError_t err=cudaSuccess; err=cudaMalloc((void **)&deviceInput1,size); if(err!=cudaSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",cudaGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } err=cudaMalloc((void **)&deviceInput2,size); if(err!=cudaSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",cudaGetErrorString(err),__FILE__,__LINE__); cudaFree(deviceInput1); cleanup(); exit(EXIT_FAILURE); } err=cudaMalloc((void **)&deviceOutput,size); if(err!=cudaSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",cudaGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } // copy host memory contents to device memory err=cudaMemcpy(deviceInput1,hostInput1,size,cudaMemcpyHostToDevice); if(err!=cudaSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",cudaGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } err=cudaMemcpy(deviceInput2,hostInput2,size,cudaMemcpyHostToDevice); if(err!=cudaSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",cudaGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } // cuda kernel configuration dim3 DimGrid=dim3(ceil(inputLength/256.0),1,1); dim3 DimBlock=dim3(256,1,1); vecAdd<<<DimGrid,DimBlock>>>(deviceInput1,deviceInput2,deviceOutput,inputLength); // copy device memory to host memory err=cudaMemcpy(hostOutput,deviceOutput,size,cudaMemcpyDeviceToHost); if(err!=cudaSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",cudaGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } // results int i; for(i=0;i<inputLength;i++) { printf("%f + %f = %f\n",hostInput1[i],hostInput2[i],hostOutput[i]); } // total cleanup cleanup(); return(0); } void cleanup(void) { // code // free allocated device-memory if(deviceInput1) { cudaFree(deviceInput1); deviceInput1=NULL; } if(deviceInput2) { cudaFree(deviceInput2); deviceInput2=NULL; } if(deviceOutput) { cudaFree(deviceOutput); deviceOutput=NULL; } // free allocated host-memory if(hostInput1) { free(hostInput1); hostInput1=NULL; } if(hostInput2) { free(hostInput2); hostInput2=NULL; } if(hostOutput) { free(hostOutput); hostOutput=NULL; } }
.file "tmpxft_00339a3e_00000000-6_HelloCUDA.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z7cleanupv .type _Z7cleanupv, @function _Z7cleanupv: .LFB2028: .cfi_startproc endbr64 pushq %r10 .cfi_def_cfa_offset 16 movq deviceInput1(%rip), %rdi testq %rdi, %rdi je .L3 call cudaFree@PLT xorl %r9d, %r9d movq %r9, deviceInput1(%rip) .L3: movq deviceInput2(%rip), %rdi testq %rdi, %rdi je .L4 call cudaFree@PLT xorl %r8d, %r8d movq %r8, deviceInput2(%rip) .L4: movq deviceOutput(%rip), %rdi testq %rdi, %rdi je .L5 call cudaFree@PLT xorl %edi, %edi movq %rdi, deviceOutput(%rip) .L5: movq hostInput1(%rip), %rdi testq %rdi, %rdi je .L6 call free@PLT xorl %esi, %esi movq %rsi, hostInput1(%rip) .L6: movq hostInput2(%rip), %rdi testq %rdi, %rdi je .L7 call free@PLT xorl %ecx, %ecx movq %rcx, hostInput2(%rip) .L7: movq hostOutput(%rip), %rdi testq %rdi, %rdi je .L2 call free@PLT xorl %edx, %edx movq %rdx, hostOutput(%rip) .L2: popq %rax .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size _Z7cleanupv, .-_Z7cleanupv .globl _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .type _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i, @function _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i: .LFB2053: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L29 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z6vecAddPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L29: movq 136(%rsp), %rax subq %fs:40, %rax je .L31 call __stack_chk_fail@PLT .L31: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .globl _Z6vecAddPfS_S_i .type _Z6vecAddPfS_S_i, @function _Z6vecAddPfS_S_i: .LFB2054: .cfi_startproc endbr64 jmp _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .cfi_endproc .LFE2054: .size _Z6vecAddPfS_S_i, .-_Z6vecAddPfS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Input Array 1.\nExitting ...\n" .LC1: .string "CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Input Array 2.\nExitting ...\n" .LC2: .string "CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Output Array.\nExitting ...\n" .LC5: .string "/home/ubuntu/Datasets/stackv2/train-structured/pranavwaikar/GPU-codes/master/cuda/HelloCUDA.cu" .LC6: .string "GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n" .LC8: .string "%f + %f = %f\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 subq $40, %rsp .cfi_def_cfa_offset 80 movslq inputLength(%rip), %r13 movq %r13, %rbx salq $2, %r13 movq %r13, %rdi call malloc@PLT leaq .LC0(%rip), %rsi movq %rax, hostInput1(%rip) testq %rax, %rax je .L49 movq %r13, %rdi movq %rax, %r12 call malloc@PLT movq %rax, hostInput2(%rip) movq %rax, %rbp testq %rax, %rax jne .L36 leaq .LC1(%rip), %rsi .L49: movl $2, %edi xorl %eax, %eax .L51: call __printf_chk@PLT .L50: call _Z7cleanupv movl $1, %edi call exit@PLT .L36: movq %r13, %rdi call malloc@PLT leaq .LC2(%rip), %rsi movl $2, %edi movq %rax, hostOutput(%rip) testq %rax, %rax je .L51 movabsq $4813222102872752128, %rax movl $0x434d0000, 16(%rbp) sall $2, %ebx leaq deviceInput1(%rip), %rdi movq %rax, (%r12) movslq %ebx, %rbx movabsq $4814348002779856896, %rax movq %rax, 8(%r12) movq %rbx, %rsi movabsq $4848687949946617856, %rax movq %rax, 0(%rbp) movabsq $4849250899900170240, %rax movl $0x42d20000, 16(%r12) movq %rax, 8(%rbp) call cudaMalloc@PLT movl %eax, %edi testl %eax, %eax je .L38 call cudaGetErrorString@PLT movl $79, %r8d movq %rax, %rdx jmp .L52 .L38: leaq deviceInput2(%rip), %rdi movq %rbx, %rsi call cudaMalloc@PLT movl %eax, %edi testl %eax, %eax je .L39 call cudaGetErrorString@PLT movl $87, %r8d movl $2, %edi leaq .LC5(%rip), %rcx movq %rax, %rdx leaq .LC6(%rip), %rsi xorl %eax, %eax call __printf_chk@PLT movq deviceInput1(%rip), %rdi call cudaFree@PLT jmp .L50 .L39: leaq deviceOutput(%rip), %rdi movq %rbx, %rsi call cudaMalloc@PLT movl %eax, %edi testl %eax, %eax je .L40 call cudaGetErrorString@PLT movl $96, %r8d movq %rax, %rdx jmp .L52 .L40: movq deviceInput1(%rip), %rdi movq hostInput1(%rip), %rsi movl $1, %ecx movq %rbx, %rdx call cudaMemcpy@PLT movl %eax, %edi testl %eax, %eax je .L41 call cudaGetErrorString@PLT movl $105, %r8d movq %rax, %rdx jmp .L52 .L41: movq deviceInput2(%rip), %rdi movq hostInput2(%rip), %rsi movl $1, %ecx movq %rbx, %rdx call cudaMemcpy@PLT movl %eax, %edi testl %eax, %eax je .L42 call cudaGetErrorString@PLT movl $113, %r8d movq %rax, %rdx jmp .L52 .L42: cvtsi2sdl inputLength(%rip), %xmm0 mulsd .LC7(%rip), %xmm0 call ceil@PLT movl $16777217, %edx xorl %r9d, %r9d xorl %r8d, %r8d cvttsd2siq %xmm0, %rax salq $8, %rdx movl $1, %ecx movl $1, 28(%rsp) movq %rdx, 20(%rsp) movl %eax, 8(%rsp) movabsq $4294967297, %rax movq %rax, 12(%rsp) movq 8(%rsp), %rdi movl 16(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L43 movl inputLength(%rip), %ecx movq deviceOutput(%rip), %rdx movq deviceInput2(%rip), %rsi movq deviceInput1(%rip), %rdi call _Z30__device_stub__Z6vecAddPfS_S_iPfS_S_i .L43: movq hostOutput(%rip), %rdi movq deviceOutput(%rip), %rsi movq %rbx, %rdx movl $2, %ecx xorl %ebx, %ebx leaq .LC8(%rip), %rbp call cudaMemcpy@PLT movl %eax, %edi testl %eax, %eax je .L44 call cudaGetErrorString@PLT movl $127, %r8d movq %rax, %rdx .L52: leaq .LC5(%rip), %rcx leaq .LC6(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L50 .L44: cmpl %ebx, inputLength(%rip) jle .L53 movq hostInput1(%rip), %rax movq %rbp, %rsi movl $2, %edi cvtss2sd (%rax,%rbx,4), %xmm0 movq hostOutput(%rip), %rax cvtss2sd (%rax,%rbx,4), %xmm2 movq hostInput2(%rip), %rax cvtss2sd (%rax,%rbx,4), %xmm1 movb $3, %al incq %rbx call __printf_chk@PLT jmp .L44 .L53: call _Z7cleanupv addq $40, %rsp .cfi_def_cfa_offset 40 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC9: .string "_Z6vecAddPfS_S_i" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2056: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC9(%rip), %rdx movq %rax, %rdi leaq _Z6vecAddPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2056: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .globl deviceOutput .bss .align 8 .type deviceOutput, @object .size deviceOutput, 8 deviceOutput: .zero 8 .globl deviceInput2 .align 8 .type deviceInput2, @object .size deviceInput2, 8 deviceInput2: .zero 8 .globl deviceInput1 .align 8 .type deviceInput1, @object .size deviceInput1, 8 deviceInput1: .zero 8 .globl hostOutput .align 8 .type hostOutput, @object .size hostOutput, 8 hostOutput: .zero 8 .globl hostInput2 .align 8 .type hostInput2, @object .size hostInput2, 8 hostInput2: .zero 8 .globl hostInput1 .align 8 .type hostInput1, @object .size hostInput1, 8 hostInput1: .zero 8 .globl inputLength .data .align 4 .type inputLength, @object .size inputLength, 4 inputLength: .long 5 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC7: .long 0 .long 1064304640 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6vecAddPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */ /* 0x004fca0000000000 */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
// headers #include <stdio.h> #include <hip/hip_runtime.h> // for CUDA // global variables int inputLength=5; float *hostInput1=NULL; float *hostInput2=NULL; float *hostOutput=NULL; float *deviceInput1=NULL; float *deviceInput2=NULL; float *deviceOutput=NULL; // global kernel function definition __global__ void vecAdd(float *in1,float *in2,float *out,int len) { // variable declarations int i=blockIdx.x * blockDim.x + threadIdx.x; // code if(i < len) { out[i]=in1[i]+in2[i]; } } int main(int argc,char *argv[]) { // function declarations void cleanup(void); // code // allocate host-memory hostInput1=(float *)malloc(inputLength * sizeof(float)); if(hostInput1== NULL) { printf("CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Input Array 1.\nExitting ...\n"); cleanup(); exit(EXIT_FAILURE); } hostInput2=(float *)malloc(inputLength * sizeof(float)); if(hostInput2== NULL) { printf("CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Input Array 2.\nExitting ...\n"); cleanup(); exit(EXIT_FAILURE); } hostOutput=(float *)malloc(inputLength * sizeof(float)); if(hostOutput== NULL) { printf("CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Output Array.\nExitting ...\n"); cleanup(); exit(EXIT_FAILURE); } // fill above input host vectors with arbitary but hard-coded data hostInput1[0]=101.0; hostInput1[1]=102.0; hostInput1[2]=103.0; hostInput1[3]=104.0; hostInput1[4]=105.0; hostInput2[0]=201.0; hostInput2[1]=202.0; hostInput2[2]=203.0; hostInput2[3]=204.0; hostInput2[4]=205.0; // allocate device-memory int size=inputLength * sizeof(float); hipError_t err=hipSuccess; err=hipMalloc((void **)&deviceInput1,size); if(err!=hipSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",hipGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } err=hipMalloc((void **)&deviceInput2,size); if(err!=hipSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",hipGetErrorString(err),__FILE__,__LINE__); hipFree(deviceInput1); cleanup(); exit(EXIT_FAILURE); } err=hipMalloc((void **)&deviceOutput,size); if(err!=hipSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",hipGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } // copy host memory contents to device memory err=hipMemcpy(deviceInput1,hostInput1,size,hipMemcpyHostToDevice); if(err!=hipSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",hipGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } err=hipMemcpy(deviceInput2,hostInput2,size,hipMemcpyHostToDevice); if(err!=hipSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",hipGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } // cuda kernel configuration dim3 DimGrid=dim3(ceil(inputLength/256.0),1,1); dim3 DimBlock=dim3(256,1,1); vecAdd<<<DimGrid,DimBlock>>>(deviceInput1,deviceInput2,deviceOutput,inputLength); // copy device memory to host memory err=hipMemcpy(hostOutput,deviceOutput,size,hipMemcpyDeviceToHost); if(err!=hipSuccess) { printf("GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n",hipGetErrorString(err),__FILE__,__LINE__); cleanup(); exit(EXIT_FAILURE); } // results int i; for(i=0;i<inputLength;i++) { printf("%f + %f = %f\n",hostInput1[i],hostInput2[i],hostOutput[i]); } // total cleanup cleanup(); return(0); } void cleanup(void) { // code // free allocated device-memory if(deviceInput1) { hipFree(deviceInput1); deviceInput1=NULL; } if(deviceInput2) { hipFree(deviceInput2); deviceInput2=NULL; } if(deviceOutput) { hipFree(deviceOutput); deviceOutput=NULL; } // free allocated host-memory if(hostInput1) { free(hostInput1); hostInput1=NULL; } if(hostInput2) { free(hostInput2); hostInput2=NULL; } if(hostOutput) { free(hostOutput); hostOutput=NULL; } }
.text .file "HelloCUDA.hip" .globl _Z21__device_stub__vecAddPfS_S_i # -- Begin function _Z21__device_stub__vecAddPfS_S_i .type _Z21__device_stub__vecAddPfS_S_i,@function _Z21__device_stub__vecAddPfS_S_i: # @_Z21__device_stub__vecAddPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6vecAddPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__vecAddPfS_S_i, .Lfunc_end0-_Z21__device_stub__vecAddPfS_S_i .cfi_endproc # -- End function .section .rodata.cst16,"aM",@progbits,16 .p2align 4, 0x0 # -- Begin function main .LCPI1_0: .long 0x42ca0000 # float 101 .long 0x42cc0000 # float 102 .long 0x42ce0000 # float 103 .long 0x42d00000 # float 104 .LCPI1_1: .long 0x43490000 # float 201 .long 0x434a0000 # float 202 .long 0x434b0000 # float 203 .long 0x434c0000 # float 204 .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 .LCPI1_2: .quad 0x3f70000000000000 # double 0.00390625 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r12 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 pushq %rax .cfi_def_cfa_offset 48 .cfi_offset %rbx, -40 .cfi_offset %r12, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movslq inputLength(%rip), %r12 leaq (,%r12,4), %r15 movq %r15, %rdi callq malloc movq %rax, hostInput1(%rip) testq %rax, %rax je .LBB1_1 # %bb.4: movq %rax, %rbx movq %r15, %rdi callq malloc movq %rax, hostInput2(%rip) testq %rax, %rax je .LBB1_5 # %bb.6: movq %rax, %r14 movq %r15, %rdi callq malloc movq %rax, hostOutput(%rip) testq %rax, %rax je .LBB1_7 # %bb.8: movaps .LCPI1_0(%rip), %xmm0 # xmm0 = [1.01E+2,1.02E+2,1.03E+2,1.04E+2] movups %xmm0, (%rbx) movl $1121058816, 16(%rbx) # imm = 0x42D20000 movapd .LCPI1_1(%rip), %xmm0 # xmm0 = [2.01E+2,2.02E+2,2.03E+2,2.04E+2] movupd %xmm0, (%r14) movl $1129119744, 16(%r14) # imm = 0x434D0000 shll $2, %r12d movslq %r12d, %rbx movl $deviceInput1, %edi movq %rbx, %rsi callq hipMalloc testl %eax, %eax jne .LBB1_9 # %bb.11: movl $deviceInput2, %edi movq %rbx, %rsi callq hipMalloc testl %eax, %eax jne .LBB1_12 # %bb.13: movl $deviceOutput, %edi movq %rbx, %rsi callq hipMalloc testl %eax, %eax jne .LBB1_14 # %bb.15: movq deviceInput1(%rip), %rdi movq hostInput1(%rip), %rsi movq %rbx, %rdx movl $1, %ecx callq hipMemcpy testl %eax, %eax jne .LBB1_16 # %bb.17: movq deviceInput2(%rip), %rdi movq hostInput2(%rip), %rsi movq %rbx, %rdx movl $1, %ecx callq hipMemcpy testl %eax, %eax jne .LBB1_18 # %bb.19: xorps %xmm0, %xmm0 cvtsi2sdl inputLength(%rip), %xmm0 mulsd .LCPI1_2(%rip), %xmm0 callq ceil@PLT cvttsd2si %xmm0, %rax movl %eax, %edi btsq $32, %rdi movabsq $4294967296, %rdx # imm = 0x100000000 orq $256, %rdx # imm = 0x100 movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_21 # %bb.20: movq deviceInput1(%rip), %rdi movq deviceInput2(%rip), %rsi movq deviceOutput(%rip), %rdx movl inputLength(%rip), %ecx callq _Z21__device_stub__vecAddPfS_S_i .LBB1_21: movq hostOutput(%rip), %rdi movq deviceOutput(%rip), %rsi movq %rbx, %rdx movl $2, %ecx callq hipMemcpy testl %eax, %eax jne .LBB1_26 # %bb.22: # %.preheader cmpl $0, inputLength(%rip) jle .LBB1_25 # %bb.23: # %.lr.ph.preheader xorl %ebx, %ebx .LBB1_24: # %.lr.ph # =>This Inner Loop Header: Depth=1 movq hostInput1(%rip), %rax xorps %xmm0, %xmm0 cvtss2sd (%rax,%rbx,4), %xmm0 movq hostInput2(%rip), %rax xorps %xmm1, %xmm1 cvtss2sd (%rax,%rbx,4), %xmm1 movq hostOutput(%rip), %rax xorps %xmm2, %xmm2 cvtss2sd (%rax,%rbx,4), %xmm2 movl $.L.str.5, %edi movb $3, %al callq printf incq %rbx movslq inputLength(%rip), %rax cmpq %rax, %rbx jl .LBB1_24 .LBB1_25: # %._crit_edge callq _Z7cleanupv xorl %eax, %eax addq $8, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r12 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .LBB1_1: .cfi_def_cfa_offset 48 movl $.Lstr.2, %edi jmp .LBB1_2 .LBB1_5: movl $.Lstr.1, %edi jmp .LBB1_2 .LBB1_7: movl $.Lstr, %edi .LBB1_2: callq puts@PLT jmp .LBB1_3 .LBB1_9: movl %eax, %edi callq hipGetErrorString movl $.L.str.3, %edi movl $.L.str.4, %edx movq %rax, %rsi movl $79, %ecx jmp .LBB1_10 .LBB1_12: movl %eax, %edi callq hipGetErrorString movl $.L.str.3, %edi movl $.L.str.4, %edx movq %rax, %rsi movl $87, %ecx xorl %eax, %eax callq printf movq deviceInput1(%rip), %rdi callq hipFree jmp .LBB1_3 .LBB1_14: movl %eax, %edi callq hipGetErrorString movl $.L.str.3, %edi movl $.L.str.4, %edx movq %rax, %rsi movl $96, %ecx jmp .LBB1_10 .LBB1_16: movl %eax, %edi callq hipGetErrorString movl $.L.str.3, %edi movl $.L.str.4, %edx movq %rax, %rsi movl $105, %ecx jmp .LBB1_10 .LBB1_18: movl %eax, %edi callq hipGetErrorString movl $.L.str.3, %edi movl $.L.str.4, %edx movq %rax, %rsi movl $113, %ecx jmp .LBB1_10 .LBB1_26: movl %eax, %edi callq hipGetErrorString movl $.L.str.3, %edi movl $.L.str.4, %edx movq %rax, %rsi movl $127, %ecx .LBB1_10: xorl %eax, %eax callq printf .LBB1_3: callq _Z7cleanupv movl $1, %edi callq exit .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .globl _Z7cleanupv # -- Begin function _Z7cleanupv .type _Z7cleanupv,@function _Z7cleanupv: # @_Z7cleanupv .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movq deviceInput1(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: callq hipFree movq $0, deviceInput1(%rip) .LBB2_2: movq deviceInput2(%rip), %rdi testq %rdi, %rdi je .LBB2_4 # %bb.3: callq hipFree movq $0, deviceInput2(%rip) .LBB2_4: movq deviceOutput(%rip), %rdi testq %rdi, %rdi je .LBB2_6 # %bb.5: callq hipFree movq $0, deviceOutput(%rip) .LBB2_6: movq hostInput1(%rip), %rdi testq %rdi, %rdi je .LBB2_8 # %bb.7: callq free movq $0, hostInput1(%rip) .LBB2_8: movq hostInput2(%rip), %rdi testq %rdi, %rdi je .LBB2_10 # %bb.9: callq free movq $0, hostInput2(%rip) .LBB2_10: movq hostOutput(%rip), %rdi testq %rdi, %rdi je .LBB2_12 # %bb.11: callq free movq $0, hostOutput(%rip) .LBB2_12: popq %rax .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z7cleanupv, .Lfunc_end2-_Z7cleanupv .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6vecAddPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type inputLength,@object # @inputLength .data .globl inputLength .p2align 2, 0x0 inputLength: .long 5 # 0x5 .size inputLength, 4 .type hostInput1,@object # @hostInput1 .bss .globl hostInput1 .p2align 3, 0x0 hostInput1: .quad 0 .size hostInput1, 8 .type hostInput2,@object # @hostInput2 .globl hostInput2 .p2align 3, 0x0 hostInput2: .quad 0 .size hostInput2, 8 .type hostOutput,@object # @hostOutput .globl hostOutput .p2align 3, 0x0 hostOutput: .quad 0 .size hostOutput, 8 .type deviceInput1,@object # @deviceInput1 .globl deviceInput1 .p2align 3, 0x0 deviceInput1: .quad 0 .size deviceInput1, 8 .type deviceInput2,@object # @deviceInput2 .globl deviceInput2 .p2align 3, 0x0 deviceInput2: .quad 0 .size deviceInput2, 8 .type deviceOutput,@object # @deviceOutput .globl deviceOutput .p2align 3, 0x0 deviceOutput: .quad 0 .size deviceOutput, 8 .type _Z6vecAddPfS_S_i,@object # @_Z6vecAddPfS_S_i .section .rodata,"a",@progbits .globl _Z6vecAddPfS_S_i .p2align 3, 0x0 _Z6vecAddPfS_S_i: .quad _Z21__device_stub__vecAddPfS_S_i .size _Z6vecAddPfS_S_i, 8 .type .L.str.3,@object # @.str.3 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.3: .asciz "GPU Memory Fatal Error = %s In File Name %s At Line No. %d.\nExitting ...\n" .size .L.str.3, 74 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/pranavwaikar/GPU-codes/master/cuda/HelloCUDA.hip" .size .L.str.4, 111 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "%f + %f = %f\n" .size .L.str.5, 14 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6vecAddPfS_S_i" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Output Array.\nExitting ..." .size .Lstr, 92 .type .Lstr.1,@object # @str.1 .Lstr.1: .asciz "CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Input Array 2.\nExitting ..." .size .Lstr.1, 93 .type .Lstr.2,@object # @str.2 .Lstr.2: .asciz "CPU Memory Fatal Error = Can Not Allocate Enough Memory For Host Input Array 1.\nExitting ..." .size .Lstr.2, 93 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__vecAddPfS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym deviceInput1 .addrsig_sym deviceInput2 .addrsig_sym deviceOutput .addrsig_sym _Z6vecAddPfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6vecAddPfS_S_i ; -- Begin function _Z6vecAddPfS_S_i .globl _Z6vecAddPfS_S_i .p2align 8 .type _Z6vecAddPfS_S_i,@function _Z6vecAddPfS_S_i: ; @_Z6vecAddPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_f32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6vecAddPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6vecAddPfS_S_i, .Lfunc_end0-_Z6vecAddPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 180 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6vecAddPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z6vecAddPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
32d559ce2d557d61d3f226d42cd8066d92cbfe34
#include <stdio.h> #include <cuda.h> __global__ void alloutputs(int *counter) { int oldc = atomicAdd(counter, 1); if (*counter == 34) printf("%d\n", oldc); } int main() { int *counter, hcounter = 0; cudaMalloc(&counter, sizeof(int)); cudaMemcpy(counter, &hcounter, sizeof(int), cudaMemcpyHostToDevice); alloutputs<<<1, 34>>>(counter); cudaDeviceSynchronize(); return 0; }
.file "tmpxft_003223af_00000000-6_counter.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z30__device_stub__Z10alloutputsPiPi .type _Z30__device_stub__Z10alloutputsPiPi, @function _Z30__device_stub__Z10alloutputsPiPi: .LFB2052: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq _Z10alloutputsPi(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L2: movq 88(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z30__device_stub__Z10alloutputsPiPi, .-_Z30__device_stub__Z10alloutputsPiPi .globl _Z10alloutputsPi .type _Z10alloutputsPi, @function _Z10alloutputsPi: .LFB2053: .cfi_startproc endbr64 jmp _Z30__device_stub__Z10alloutputsPiPi .cfi_endproc .LFE2053: .size _Z10alloutputsPi, .-_Z10alloutputsPi .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 subq $56, %rsp .cfi_def_cfa_offset 64 movl $4, %esi movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax leaq 8(%rsp), %rdi xorl %eax, %eax movl %eax, 4(%rsp) call cudaMalloc@PLT movq 8(%rsp), %rdi leaq 4(%rsp), %rsi movl $1, %ecx movl $4, %edx call cudaMemcpy@PLT movl $2147483665, %edx xorl %r9d, %r9d xorl %r8d, %r8d addq %rdx, %rdx movl $1, %ecx movl $1, %esi movabsq $4294967297, %rdi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 movq 8(%rsp), %rdi call _Z30__device_stub__Z10alloutputsPiPi .L9: call cudaDeviceSynchronize@PLT movq 40(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: xorl %eax, %eax addq $56, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z10alloutputsPi" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z10alloutputsPi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z10alloutputsPi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R3, SR_LANEID ; /* 0x0000000000037919 */ /* 0x000e220000000000 */ /*0020*/ VOTEU.ANY UR6, UPT, PT ; /* 0x0000000000067886 */ /* 0x000fe200038e0100 */ /*0030*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */ /* 0x000fe200078e00ff */ /*0040*/ FLO.U32 R4, UR6 ; /* 0x0000000600047d00 */ /* 0x000e2200080e0000 */ /*0050*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0060*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */ /* 0x000fcc0007ffe0ff */ /*0070*/ POPC R5, UR6 ; /* 0x0000000600057d09 */ /* 0x000e620008000000 */ /*0080*/ ISETP.EQ.U32.AND P0, PT, R4, R3, PT ; /* 0x000000030400720c */ /* 0x001fe20003f02070 */ /*0090*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */ /* 0x000fd800078e00ff */ /*00a0*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R5, [R2.64], R5 ; /* 0x00000005020509a8 */ /* 0x002ea800081ee1c4 */ /*00b0*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ee8000c1e1900 */ /*00c0*/ S2R R6, SR_LTMASK ; /* 0x0000000000067919 */ /* 0x000e240000003900 */ /*00d0*/ LOP3.LUT R7, R6, UR6, RZ, 0xc0, !PT ; /* 0x0000000606077c12 */ /* 0x001fc4000f8ec0ff */ /*00e0*/ IADD3 R6, P1, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */ /* 0x000fc80007f3e0ff */ /*00f0*/ POPC R7, R7 ; /* 0x0000000700077309 */ /* 0x000e220000000000 */ /*0100*/ SHFL.IDX PT, R4, R5, R4, 0x1f ; /* 0x00001f0405047589 */ /* 0x004e2200000e0000 */ /*0110*/ ISETP.NE.AND P0, PT, R0, 0x22, PT ; /* 0x000000220000780c */ /* 0x008fe20003f05270 */ /*0120*/ IMAD.IADD R0, R4, 0x1, R7 ; /* 0x0000000104007824 */ /* 0x001fd800078e0207 */ /*0130*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0140*/ MOV R2, 0x0 ; /* 0x0000000000027802 */ /* 0x000fe20000000f00 */ /*0150*/ STL [R1], R0 ; /* 0x0000000001007387 */ /* 0x0001e20000100800 */ /*0160*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P1 ; /* 0x00000900ff077624 */ /* 0x000fe400008e06ff */ /*0170*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */ /* 0x000fe400078e00ff */ /*0180*/ LDC.64 R2, c[0x4][R2] ; /* 0x0100000002027b82 */ /* 0x000e620000000a00 */ /*0190*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */ /* 0x000fce00078e00ff */ /*01a0*/ LEPC R8 ; /* 0x000000000008734e */ /* 0x000fe40000000000 */ /*01b0*/ MOV R11, 0x220 ; /* 0x00000220000b7802 */ /* 0x000fe40000000f00 */ /*01c0*/ MOV R20, 0x1a0 ; /* 0x000001a000147802 */ /* 0x000fe40000000f00 */ /*01d0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */ /* 0x000fc40000000f00 */ /*01e0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */ /* 0x001fe40000000f00 */ /*01f0*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */ /* 0x000fc8000791e108 */ /*0200*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */ /* 0x000fc800007e2509 */ /*0210*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */ /* 0x002fea0003c00000 */ /*0220*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0230*/ BRA 0x230; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <hip/hip_runtime.h> __global__ void alloutputs(int *counter) { int oldc = atomicAdd(counter, 1); if (*counter == 34) printf("%d\n", oldc); } int main() { int *counter, hcounter = 0; hipMalloc(&counter, sizeof(int)); hipMemcpy(counter, &hcounter, sizeof(int), hipMemcpyHostToDevice); alloutputs<<<1, 34>>>(counter); hipDeviceSynchronize(); return 0; }
.text .file "counter.hip" .globl _Z25__device_stub__alloutputsPi # -- Begin function _Z25__device_stub__alloutputsPi .type _Z25__device_stub__alloutputsPi,@function _Z25__device_stub__alloutputsPi: # @_Z25__device_stub__alloutputsPi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10alloutputsPi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z25__device_stub__alloutputsPi, .Lfunc_end0-_Z25__device_stub__alloutputsPi .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 subq $24, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 leaq 20(%rsp), %rbx movl $0, (%rbx) leaq 8(%rsp), %r14 movl $4, %esi movq %r14, %rdi callq hipMalloc movq (%r14), %rdi movl $4, %edx movq %rbx, %rsi movl $1, %ecx callq hipMemcpy movabsq $4294967297, %rdi # imm = 0x100000001 leaq 33(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movq 8(%rsp), %rdi callq _Z25__device_stub__alloutputsPi .LBB1_2: callq hipDeviceSynchronize xorl %eax, %eax addq $24, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10alloutputsPi, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z10alloutputsPi,@object # @_Z10alloutputsPi .section .rodata,"a",@progbits .globl _Z10alloutputsPi .p2align 3, 0x0 _Z10alloutputsPi: .quad _Z25__device_stub__alloutputsPi .size _Z10alloutputsPi, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z10alloutputsPi" .size .L__unnamed_1, 17 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__alloutputsPi .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z10alloutputsPi .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10alloutputsPi ; -- Begin function _Z10alloutputsPi .globl _Z10alloutputsPi .p2align 8 .type _Z10alloutputsPi,@function _Z10alloutputsPi: ; @_Z10alloutputsPi ; %bb.0: s_load_b64 s[2:3], s[0:1], 0x0 s_mov_b32 s5, exec_lo s_mov_b32 s4, exec_lo v_mbcnt_lo_u32_b32 v31, s5, 0 ; implicit-def: $vgpr0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v31 s_cbranch_execz .LBB0_2 ; %bb.1: s_bcnt1_i32_b32 s5, s5 s_delay_alu instid0(SALU_CYCLE_1) v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s5 s_waitcnt lgkmcnt(0) global_atomic_add_u32 v0, v0, v1, s[2:3] glc .LBB0_2: s_or_b32 exec_lo, exec_lo, s4 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s14, v0 s_waitcnt lgkmcnt(0) global_load_b32 v1, v1, s[2:3] s_waitcnt vmcnt(0) v_cmp_ne_u32_e32 vcc_lo, 34, v1 s_cbranch_vccnz .LBB0_173 ; %bb.3: s_load_b64 s[2:3], s[0:1], 0x58 v_mbcnt_lo_u32_b32 v28, -1, 0 v_mov_b32_e32 v6, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v28 ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v4 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_9 ; %bb.4: v_mov_b32_e32 v0, 0 s_mov_b32 s4, exec_lo s_waitcnt lgkmcnt(0) global_load_b64 v[8:9], v0, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[1:2], v0, s[2:3] offset:40 global_load_b64 v[5:6], v0, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v2, v2, v9 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v3, v1, 24 v_mul_lo_u32 v2, v2, 24 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v2, v3, v2 s_waitcnt vmcnt(0) v_add_co_u32 v1, vcc_lo, v5, v1 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo global_load_b64 v[6:7], v[1:2], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[6:7], v[8:9] s_cbranch_execz .LBB0_8 ; %bb.5: ; %.preheader3.i.i.i.preheader s_mov_b32 s5, 0 .LBB0_6: ; %.preheader3.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[1:2], v0, s[2:3] offset:40 global_load_b64 v[10:11], v0, s[2:3] v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v7, v2, v9 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11] v_mov_b32_e32 v1, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2] v_mov_b32_e32 v6, v2 global_load_b64 v[6:7], v[5:6], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_6 ; %bb.7: ; %Flow319 s_or_b32 exec_lo, exec_lo, s5 .LBB0_8: ; %Flow321 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_9: ; %.loopexit4.i.i.i s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v5, 0 v_readfirstlane_b32 s4, v6 v_readfirstlane_b32 s5, v7 s_mov_b32 s10, exec_lo s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b64 v[8:9], v5, s[2:3] offset:40 global_load_b128 v[0:3], v5, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v8 v_readfirstlane_b32 s7, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_11 ; %bb.10: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v10, vcc_lo, v0, s9 v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1 global_store_b128 v[10:11], v[6:9], off offset:8 .LBB0_11: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[6:7], 6, v[4:5] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v2, s6 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v2, v6 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5 v_mov_b32_e32 v6, v5 v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v13, s19 v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18 s_clause 0x3 global_store_b128 v[8:9], v[4:7], off global_store_b128 v[8:9], v[10:13], off offset:16 global_store_b128 v[8:9], v[10:13], off offset:32 global_store_b128 v[8:9], v[10:13], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_19 ; %bb.12: v_mov_b32_e32 v10, 0 s_mov_b32 s7, exec_lo s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[2:3], v10, s[2:3] offset:40 v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5 s_waitcnt vmcnt(0) v_and_b32_e32 v3, s5, v3 v_and_b32_e32 v2, s4, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, v3, 24 v_mul_hi_u32 v4, v2, 24 v_mul_lo_u32 v2, v2, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v3, v4, v3 v_add_co_u32 v6, vcc_lo, v0, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo global_store_b64 v[6:7], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[4:5], v[13:14] s_cbranch_execz .LBB0_15 ; %bb.13: ; %.preheader1.i.i.i.preheader s_mov_b32 s10, 0 .LBB0_14: ; %.preheader1.i.i.i ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_14 .LBB0_15: ; %Flow317 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v5, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v4, s10, 0 global_load_b64 v[2:3], v5, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_17 ; %bb.16: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v4, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[2:3], v[4:5], off offset:8 .LBB0_17: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[4:5], v[2:3], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_cbranch_vccnz .LBB0_19 ; %bb.18: global_load_b32 v2, v[2:3], off offset:24 v_mov_b32_e32 v3, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v2 s_waitcnt_vscnt null, 0x0 global_store_b64 v[4:5], v[2:3], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_19: ; %Flow318 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v0, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_20: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_22 ; %bb.21: ; in Loop: Header=BB0_20 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_22: ; in Loop: Header=BB0_20 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_24 ; %bb.23: ; in Loop: Header=BB0_20 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_25 .LBB0_24: ; in Loop: Header=BB0_20 Depth=1 s_mov_b32 s1, -1 .LBB0_25: ; %Flow312 ; in Loop: Header=BB0_20 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_20 ; %bb.26: global_load_b64 v[0:1], v[8:9], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_30 ; %bb.27: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[4:5], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11 v_and_b32_e32 v5, v3, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v2, v4 v_mul_lo_u32 v5, v5, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v4, 24 v_mul_lo_u32 v4, v4, 24 v_add_nc_u32_e32 v5, v11, v5 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v6, vcc_lo, v6, v4 v_mov_b32_e32 v4, v9 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo v_mov_b32_e32 v5, v10 global_store_b64 v[6:7], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_30 ; %bb.28: ; %.preheader.i.i.i.preheader s_mov_b32 s0, 0 .LBB0_29: ; %.preheader.i.i.i ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[6:7], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5] v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_29 .LBB0_30: ; %__ockl_printf_begin.exit s_or_b32 exec_lo, exec_lo, s1 s_getpc_b64 s[4:5] s_add_u32 s4, s4, .str@rel32@lo+4 s_addc_u32 s5, s5, .str@rel32@hi+12 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lg_u64 s[4:5], 0 s_cbranch_scc0 .LBB0_116 ; %bb.31: s_waitcnt vmcnt(0) v_dual_mov_b32 v3, v1 :: v_dual_and_b32 v32, 2, v0 v_dual_mov_b32 v30, 0 :: v_dual_mov_b32 v7, 1 v_and_b32_e32 v2, -3, v0 v_mov_b32_e32 v6, 2 s_mov_b64 s[6:7], 4 .LBB0_32: ; =>This Loop Header: Depth=1 ; Child Loop BB0_35 Depth 2 ; Child Loop BB0_42 Depth 2 ; Child Loop BB0_50 Depth 2 ; Child Loop BB0_58 Depth 2 ; Child Loop BB0_66 Depth 2 ; Child Loop BB0_74 Depth 2 ; Child Loop BB0_82 Depth 2 ; Child Loop BB0_90 Depth 2 ; Child Loop BB0_98 Depth 2 ; Child Loop BB0_104 Depth 2 ; Child Loop BB0_113 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_u64_e64 s0, s[6:7], 56 ; implicit-def: $vgpr10_vgpr11 ; implicit-def: $sgpr16 s_and_b32 s0, s0, exec_lo s_cselect_b32 s8, s6, 56 s_cselect_b32 s9, s7, 0 s_cmp_gt_u32 s8, 7 s_mov_b32 s0, -1 s_cbranch_scc1 .LBB0_37 ; %bb.33: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v10, 0 v_mov_b32_e32 v11, 0 s_cmp_eq_u32 s8, 0 s_cbranch_scc1 .LBB0_36 ; %bb.34: ; %.preheader31.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_lshl_b64 s[0:1], s[8:9], 3 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[4:5] .LBB0_35: ; %.preheader31.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v4, v30, s[12:13] s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s0, s10 v_or_b32_e32 v10, v4, v10 v_or_b32_e32 v11, v5, v11 s_cbranch_scc1 .LBB0_35 .LBB0_36: ; %Flow288 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s0, 0 s_mov_b32 s16, 0 .LBB0_37: ; %Flow290 ; in Loop: Header=BB0_32 Depth=1 s_and_not1_b32 vcc_lo, exec_lo, s0 s_mov_b64 s[0:1], s[4:5] s_cbranch_vccnz .LBB0_39 ; %bb.38: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[10:11], v30, s[4:5] s_add_i32 s16, s8, -8 s_add_u32 s0, s4, 8 s_addc_u32 s1, s5, 0 .LBB0_39: ; %.loopexit32.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_44 ; %bb.40: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v12, 0 v_mov_b32_e32 v13, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_43 ; %bb.41: ; %.preheader29.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_42: ; %.preheader29.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s16, s12 v_or_b32_e32 v12, v4, v12 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v13, v5, v13 s_cbranch_scc1 .LBB0_42 .LBB0_43: ; %Flow283 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_45 .LBB0_44: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr12_vgpr13 ; implicit-def: $sgpr15 .LBB0_45: ; %Flow285 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_47 ; %bb.46: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[12:13], v30, s[0:1] s_add_i32 s15, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_47: ; %.loopexit30.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_52 ; %bb.48: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v14, 0 v_mov_b32_e32 v15, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_51 ; %bb.49: ; %.preheader27.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_50: ; %.preheader27.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v14, v4, v14 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v15, v5, v15 s_cbranch_scc1 .LBB0_50 .LBB0_51: ; %Flow278 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s16, 0 s_branch .LBB0_53 .LBB0_52: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr16 .LBB0_53: ; %Flow280 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_55 ; %bb.54: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[14:15], v30, s[0:1] s_add_i32 s16, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_55: ; %.loopexit28.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_60 ; %bb.56: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v16, 0 v_mov_b32_e32 v17, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_59 ; %bb.57: ; %.preheader25.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_58: ; %.preheader25.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s16, s12 v_or_b32_e32 v16, v4, v16 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v17, v5, v17 s_cbranch_scc1 .LBB0_58 .LBB0_59: ; %Flow273 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_61 .LBB0_60: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr16_vgpr17 ; implicit-def: $sgpr15 .LBB0_61: ; %Flow275 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_63 ; %bb.62: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[16:17], v30, s[0:1] s_add_i32 s15, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_63: ; %.loopexit26.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_68 ; %bb.64: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v18, 0 v_mov_b32_e32 v19, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_67 ; %bb.65: ; %.preheader23.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_66: ; %.preheader23.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s16, s0, s12 s_addc_u32 s17, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[16:17] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s15, s12 v_or_b32_e32 v18, v4, v18 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v19, v5, v19 s_cbranch_scc1 .LBB0_66 .LBB0_67: ; %Flow268 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s16, 0 s_branch .LBB0_69 .LBB0_68: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $sgpr16 .LBB0_69: ; %Flow270 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_71 ; %bb.70: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[18:19], v30, s[0:1] s_add_i32 s16, s15, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_71: ; %.loopexit24.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s16, 7 s_cbranch_scc1 .LBB0_76 ; %bb.72: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v20, 0 v_mov_b32_e32 v21, 0 s_cmp_eq_u32 s16, 0 s_cbranch_scc1 .LBB0_75 ; %bb.73: ; %.preheader21.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], 0 .LBB0_74: ; %.preheader21.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_add_u32 s18, s0, s12 s_addc_u32 s19, s1, s13 s_add_u32 s12, s12, 1 global_load_u8 v4, v30, s[18:19] s_addc_u32 s13, s13, 0 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_cmp_lg_u32 s16, s12 v_or_b32_e32 v20, v4, v20 s_delay_alu instid0(VALU_DEP_2) v_or_b32_e32 v21, v5, v21 s_cbranch_scc1 .LBB0_74 .LBB0_75: ; %Flow263 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_mov_b32 s15, 0 s_branch .LBB0_77 .LBB0_76: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 ; implicit-def: $vgpr20_vgpr21 ; implicit-def: $sgpr15 .LBB0_77: ; %Flow265 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_79 ; %bb.78: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[20:21], v30, s[0:1] s_add_i32 s15, s16, -8 s_add_u32 s0, s0, 8 s_addc_u32 s1, s1, 0 .LBB0_79: ; %.loopexit22.i ; in Loop: Header=BB0_32 Depth=1 s_cmp_gt_u32 s15, 7 s_cbranch_scc1 .LBB0_84 ; %bb.80: ; in Loop: Header=BB0_32 Depth=1 v_mov_b32_e32 v22, 0 v_mov_b32_e32 v23, 0 s_cmp_eq_u32 s15, 0 s_cbranch_scc1 .LBB0_83 ; %bb.81: ; %.preheader.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b64 s[10:11], 0 s_mov_b64 s[12:13], s[0:1] .LBB0_82: ; %.preheader.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 global_load_u8 v4, v30, s[12:13] s_add_i32 s15, s15, -1 s_waitcnt vmcnt(0) v_and_b32_e32 v29, 0xffff, v4 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[4:5], s10, v[29:30] s_add_u32 s10, s10, 8 s_addc_u32 s11, s11, 0 s_add_u32 s12, s12, 1 s_addc_u32 s13, s13, 0 s_cmp_lg_u32 s15, 0 v_or_b32_e32 v22, v4, v22 v_or_b32_e32 v23, v5, v23 s_cbranch_scc1 .LBB0_82 .LBB0_83: ; %Flow258 ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, 0 s_branch .LBB0_85 .LBB0_84: ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s10, -1 .LBB0_85: ; %Flow260 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s10 s_cbranch_vccnz .LBB0_87 ; %bb.86: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[22:23], v30, s[0:1] .LBB0_87: ; %.loopexit.i ; in Loop: Header=BB0_32 Depth=1 s_waitcnt vmcnt(0) v_dual_mov_b32 v29, v28 :: v_dual_mov_b32 v4, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_readfirstlane_b32 s0, v29 v_mov_b32_e32 v5, 0 v_cmp_eq_u32_e64 s0, s0, v29 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_93 ; %bb.88: ; in Loop: Header=BB0_32 Depth=1 global_load_b64 v[26:27], v30, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v30, s[2:3] offset:40 global_load_b64 v[8:9], v30, s[2:3] s_mov_b32 s10, exec_lo s_waitcnt vmcnt(1) v_and_b32_e32 v5, v5, v27 v_and_b32_e32 v4, v4, v26 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v5, v5, 24 v_mul_hi_u32 v24, v4, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v24, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[24:25], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v30, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[4:5], v[26:27] s_cbranch_execz .LBB0_92 ; %bb.89: ; %.preheader3.i.i19.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s11, 0 .LBB0_90: ; %.preheader3.i.i19.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 s_clause 0x1 global_load_b64 v[8:9], v30, s[2:3] offset:40 global_load_b64 v[24:25], v30, s[2:3] v_dual_mov_b32 v27, v5 :: v_dual_mov_b32 v26, v4 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v8, v8, v26 s_waitcnt vmcnt(0) v_mad_u64_u32 v[4:5], null, v8, 24, v[24:25] v_and_b32_e32 v24, v9, v27 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v24, 24, v[5:6] v_mov_b32_e32 v5, v8 global_load_b64 v[24:25], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[4:5], v30, v[24:27], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[26:27] s_or_b32 s11, vcc_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s11 s_cbranch_execnz .LBB0_90 ; %bb.91: ; %Flow253 ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s11 .LBB0_92: ; %Flow255 ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s10 .LBB0_93: ; %.loopexit4.i.i14.i ; in Loop: Header=BB0_32 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 s_clause 0x1 global_load_b64 v[8:9], v30, s[2:3] offset:40 global_load_b128 v[24:27], v30, s[2:3] v_readfirstlane_b32 s10, v4 v_readfirstlane_b32 s11, v5 s_mov_b32 s17, exec_lo s_waitcnt vmcnt(1) v_readfirstlane_b32 s12, v8 v_readfirstlane_b32 s13, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[12:13], s[10:11], s[12:13] s_mul_i32 s1, s13, 24 s_mul_hi_u32 s15, s12, 24 s_mul_i32 s16, s12, 24 s_and_saveexec_b32 s18, s0 s_cbranch_execz .LBB0_95 ; %bb.94: ; in Loop: Header=BB0_32 Depth=1 v_dual_mov_b32 v4, s17 :: v_dual_mov_b32 v5, v30 s_add_i32 s17, s15, s1 s_waitcnt vmcnt(0) v_add_co_u32 v8, vcc_lo, v24, s16 v_add_co_ci_u32_e32 v9, vcc_lo, s17, v25, vcc_lo global_store_b128 v[8:9], v[4:7], off offset:8 .LBB0_95: ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s18 v_cmp_gt_u64_e64 vcc_lo, s[6:7], 56 v_or_b32_e32 v4, 0, v3 v_or_b32_e32 v5, v2, v32 s_lshl_b64 s[12:13], s[12:13], 12 s_lshl_b32 s17, s8, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_add_i32 s17, s17, 28 v_dual_cndmask_b32 v9, v4, v3 :: v_dual_cndmask_b32 v4, v5, v2 v_lshlrev_b64 v[2:3], 6, v[29:30] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v26, s12 v_add_co_ci_u32_e32 v27, vcc_lo, s13, v27, vcc_lo s_and_b32 s17, s17, 0x1e0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v26, vcc_lo, v5, v2 v_and_or_b32 v8, 0xffffff1f, v4, s17 v_add_co_ci_u32_e32 v27, vcc_lo, v27, v3, vcc_lo s_clause 0x3 global_store_b128 v[26:27], v[8:11], off global_store_b128 v[26:27], v[12:15], off offset:16 global_store_b128 v[26:27], v[16:19], off offset:32 global_store_b128 v[26:27], v[20:23], off offset:48 s_and_saveexec_b32 s12, s0 s_cbranch_execz .LBB0_103 ; %bb.96: ; in Loop: Header=BB0_32 Depth=1 s_clause 0x1 global_load_b64 v[12:13], v30, s[2:3] offset:32 glc global_load_b64 v[2:3], v30, s[2:3] offset:40 v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11 s_waitcnt vmcnt(0) v_readfirstlane_b32 s18, v2 v_readfirstlane_b32 s19, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[18:19], s[18:19], s[10:11] s_mul_i32 s13, s19, 24 s_mul_hi_u32 s17, s18, 24 s_mul_i32 s18, s18, 24 s_add_i32 s17, s17, s13 v_add_co_u32 v8, vcc_lo, v24, s18 v_add_co_ci_u32_e32 v9, vcc_lo, s17, v25, vcc_lo s_mov_b32 s13, exec_lo global_store_b64 v[8:9], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[4:5], v30, v[10:13], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[4:5], v[12:13] s_cbranch_execz .LBB0_99 ; %bb.97: ; %.preheader1.i.i17.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s17, 0 .LBB0_98: ; %.preheader1.i.i17.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11 s_sleep 1 global_store_b64 v[8:9], v[4:5], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v30, v[2:5], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5] v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2 s_or_b32 s17, vcc_lo, s17 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s17 s_cbranch_execnz .LBB0_98 .LBB0_99: ; %Flow251 ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s13 global_load_b64 v[2:3], v30, s[2:3] offset:16 s_mov_b32 s17, exec_lo s_mov_b32 s13, exec_lo v_mbcnt_lo_u32_b32 v4, s17, 0 s_delay_alu instid0(VALU_DEP_1) v_cmpx_eq_u32_e32 0, v4 s_cbranch_execz .LBB0_101 ; %bb.100: ; in Loop: Header=BB0_32 Depth=1 s_bcnt1_i32_b32 s17, s17 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v29, s17 s_waitcnt vmcnt(0) global_atomic_add_u64 v[2:3], v[29:30], off offset:8 .LBB0_101: ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s13 s_waitcnt vmcnt(0) global_load_b64 v[4:5], v[2:3], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] s_cbranch_vccnz .LBB0_103 ; %bb.102: ; in Loop: Header=BB0_32 Depth=1 global_load_b32 v29, v[2:3], off offset:24 s_waitcnt vmcnt(0) v_readfirstlane_b32 s13, v29 s_waitcnt_vscnt null, 0x0 global_store_b64 v[4:5], v[29:30], off s_and_b32 m0, s13, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_103: ; %Flow252 ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s12 s_add_i32 s15, s15, s1 v_add_co_u32 v2, vcc_lo, v24, s16 v_add_co_ci_u32_e32 v3, vcc_lo, s15, v25, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v2, 20 v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo .LBB0_104: ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 v_mov_b32_e32 v4, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_106 ; %bb.105: ; in Loop: Header=BB0_104 Depth=2 global_load_b32 v4, v[2:3], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v4, 1, v4 .LBB0_106: ; in Loop: Header=BB0_104 Depth=2 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v4 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_108 ; %bb.107: ; in Loop: Header=BB0_104 Depth=2 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_109 .LBB0_108: ; in Loop: Header=BB0_104 Depth=2 s_mov_b32 s1, -1 .LBB0_109: ; %Flow246 ; in Loop: Header=BB0_104 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_104 ; %bb.110: ; in Loop: Header=BB0_32 Depth=1 global_load_b128 v[2:5], v[26:27], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_114 ; %bb.111: ; in Loop: Header=BB0_32 Depth=1 s_clause 0x2 global_load_b64 v[4:5], v30, s[2:3] offset:40 global_load_b64 v[12:13], v30, s[2:3] offset:24 glc global_load_b64 v[10:11], v30, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v14, vcc_lo, v4, 1 v_add_co_ci_u32_e32 v15, vcc_lo, 0, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v8, vcc_lo, v14, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v15, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9] v_dual_cndmask_b32 v9, v9, v15 :: v_dual_cndmask_b32 v8, v8, v14 v_and_b32_e32 v5, v9, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_and_b32_e32 v4, v8, v4 v_mul_hi_u32 v14, v4, 24 v_mul_lo_u32 v4, v4, 24 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_u32 v4, vcc_lo, v10, v4 v_mov_b32_e32 v10, v12 v_mul_lo_u32 v5, v5, 24 v_add_nc_u32_e32 v5, v14, v5 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo v_mov_b32_e32 v11, v13 global_store_b64 v[4:5], v[12:13], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[10:11], v30, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_114 ; %bb.112: ; %.preheader.i.i16.i.preheader ; in Loop: Header=BB0_32 Depth=1 s_mov_b32 s0, 0 .LBB0_113: ; %.preheader.i.i16.i ; Parent Loop BB0_32 Depth=1 ; => This Inner Loop Header: Depth=2 s_sleep 1 global_store_b64 v[4:5], v[10:11], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[12:13], v30, v[8:11], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11] v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_113 .LBB0_114: ; %__ockl_hostcall_preview.exit20.i ; in Loop: Header=BB0_32 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_sub_u32 s6, s6, s8 s_subb_u32 s7, s7, s9 s_add_u32 s4, s4, s8 s_addc_u32 s5, s5, s9 s_cmp_lg_u64 s[6:7], 0 s_cbranch_scc1 .LBB0_32 ; %bb.115: ; %Flow291 s_mov_b32 s0, 0 s_branch .LBB0_117 .LBB0_116: s_mov_b32 s0, -1 ; implicit-def: $vgpr2_vgpr3 .LBB0_117: ; %Flow306 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 vcc_lo, exec_lo, s0 s_cbranch_vccz .LBB0_146 ; %bb.118: s_waitcnt vmcnt(0) v_mov_b32_e32 v2, v28 v_mov_b32_e32 v8, 0 v_mov_b32_e32 v9, 0 ;;#ASMSTART ;;#ASMEND s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s0, v2 v_cmp_eq_u32_e64 s0, s0, v2 s_delay_alu instid0(VALU_DEP_1) s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_124 ; %bb.119: v_mov_b32_e32 v3, 0 s_mov_b32 s4, exec_lo global_load_b64 v[6:7], v3, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[8:9], v3, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_hi_u32 v10, v4, 24 v_mul_lo_u32 v5, v5, 24 v_mul_lo_u32 v4, v4, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v5, v10, v5 s_waitcnt vmcnt(0) v_add_co_u32 v4, vcc_lo, v8, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo global_load_b64 v[4:5], v[4:5], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[8:9], v[6:7] s_cbranch_execz .LBB0_123 ; %bb.120: ; %.preheader3.i.i.i8.preheader s_mov_b32 s5, 0 .LBB0_121: ; %.preheader3.i.i.i8 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[4:5], v3, s[2:3] offset:40 global_load_b64 v[10:11], v3, s[2:3] v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v4, v4, v6 v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11] v_mov_b32_e32 v4, v9 s_delay_alu instid0(VALU_DEP_1) v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5] global_load_b64 v[4:5], v[8:9], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_121 ; %bb.122: ; %Flow303 s_or_b32 exec_lo, exec_lo, s5 .LBB0_123: ; %Flow305 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_124: ; %.loopexit4.i.i.i3 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v3, 0 v_readfirstlane_b32 s4, v8 v_readfirstlane_b32 s5, v9 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[10:11], v3, s[2:3] offset:40 global_load_b128 v[4:7], v3, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v10 v_readfirstlane_b32 s7, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_126 ; %bb.125: v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, v3 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v12, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1 global_store_b128 v[12:13], v[8:11], off offset:8 .LBB0_126: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[8:9], 6, v[2:3] s_waitcnt vmcnt(0) v_add_co_u32 v2, vcc_lo, v6, s6 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo s_mov_b32 s16, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v6, vcc_lo, v2, v8 s_mov_b32 s17, s16 s_mov_b32 s18, s16 s_mov_b32 s19, s16 v_and_or_b32 v0, 0xffffff1f, v0, 32 v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo v_mov_b32_e32 v2, v3 v_dual_mov_b32 v8, s16 :: v_dual_mov_b32 v11, s19 v_dual_mov_b32 v9, s17 :: v_dual_mov_b32 v10, s18 s_clause 0x3 global_store_b128 v[6:7], v[0:3], off global_store_b128 v[6:7], v[8:11], off offset:16 global_store_b128 v[6:7], v[8:11], off offset:32 global_store_b128 v[6:7], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_134 ; %bb.127: v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s4 v_mov_b32_e32 v12, s5 s_clause 0x1 global_load_b64 v[13:14], v10, s[2:3] offset:32 glc global_load_b64 v[0:1], v10, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v8, vcc_lo, v4, s10 v_add_co_ci_u32_e32 v9, vcc_lo, s11, v5, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[8:9], v[13:14], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[13:14] s_cbranch_execz .LBB0_130 ; %bb.128: ; %.preheader1.i.i.i6.preheader s_mov_b32 s10, 0 .LBB0_129: ; %.preheader1.i.i.i6 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[8:9], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_129 .LBB0_130: ; %Flow301 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_132 ; %bb.131: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_132: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_134 ; %bb.133: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_134: ; %Flow302 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v4, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v5, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_135: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_137 ; %bb.136: ; in Loop: Header=BB0_135 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_137: ; in Loop: Header=BB0_135 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_139 ; %bb.138: ; in Loop: Header=BB0_135 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_140 .LBB0_139: ; in Loop: Header=BB0_135 Depth=1 s_mov_b32 s1, -1 .LBB0_140: ; %Flow296 ; in Loop: Header=BB0_135 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_135 ; %bb.141: global_load_b128 v[2:5], v[6:7], off s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_145 ; %bb.142: v_mov_b32_e32 v8, 0 s_clause 0x2 global_load_b64 v[0:1], v8, s[2:3] offset:40 global_load_b64 v[9:10], v8, s[2:3] offset:24 glc global_load_b64 v[6:7], v8, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v11, vcc_lo, v0, 1 v_add_co_ci_u32_e32 v12, vcc_lo, 0, v1, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, v11, s4 v_add_co_ci_u32_e32 v5, vcc_lo, s5, v12, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5] v_dual_cndmask_b32 v5, v5, v12 :: v_dual_cndmask_b32 v4, v4, v11 v_and_b32_e32 v1, v5, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v0, v4, v0 v_mul_lo_u32 v1, v1, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v11, v0, 24 v_mul_lo_u32 v0, v0, 24 v_add_nc_u32_e32 v1, v11, v1 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v0, vcc_lo, v6, v0 v_mov_b32_e32 v6, v9 v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo v_mov_b32_e32 v7, v10 global_store_b64 v[0:1], v[9:10], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[6:7], v8, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[6:7], v[9:10] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_145 ; %bb.143: ; %.preheader.i.i.i5.preheader s_mov_b32 s0, 0 .LBB0_144: ; %.preheader.i.i.i5 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[0:1], v[6:7], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[9:10], v8, v[4:7], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[6:7] v_dual_mov_b32 v6, v9 :: v_dual_mov_b32 v7, v10 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_144 .LBB0_145: ; %__ockl_hostcall_preview.exit.i s_or_b32 exec_lo, exec_lo, s1 .LBB0_146: ; %__ockl_printf_append_string_n.exit ;;#ASMSTART ;;#ASMEND v_readfirstlane_b32 s0, v28 s_waitcnt vmcnt(0) v_mov_b32_e32 v0, 0 v_mov_b32_e32 v1, 0 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, s0, v28 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_152 ; %bb.147: v_mov_b32_e32 v4, 0 s_mov_b32 s4, exec_lo global_load_b64 v[7:8], v4, s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv s_clause 0x1 global_load_b64 v[0:1], v4, s[2:3] offset:40 global_load_b64 v[5:6], v4, s[2:3] s_waitcnt vmcnt(1) v_and_b32_e32 v1, v1, v8 v_and_b32_e32 v0, v0, v7 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_mul_lo_u32 v1, v1, 24 v_mul_hi_u32 v9, v0, 24 v_mul_lo_u32 v0, v0, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v1, v9, v1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v5, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo global_load_b64 v[5:6], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmpx_ne_u64_e64 v[0:1], v[7:8] s_cbranch_execz .LBB0_151 ; %bb.148: ; %.preheader3.i.i.i15.preheader s_mov_b32 s5, 0 .LBB0_149: ; %.preheader3.i.i.i15 ; =>This Inner Loop Header: Depth=1 s_sleep 1 s_clause 0x1 global_load_b64 v[5:6], v4, s[2:3] offset:40 global_load_b64 v[9:10], v4, s[2:3] v_dual_mov_b32 v8, v1 :: v_dual_mov_b32 v7, v0 s_waitcnt vmcnt(1) s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_and_b32_e32 v5, v5, v7 s_waitcnt vmcnt(0) v_mad_u64_u32 v[0:1], null, v5, 24, v[9:10] v_and_b32_e32 v9, v6, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v9, 24, v[1:2] v_mov_b32_e32 v1, v5 global_load_b64 v[5:6], v[0:1], off glc s_waitcnt vmcnt(0) global_atomic_cmpswap_b64 v[0:1], v4, v[5:8], s[2:3] offset:24 glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[7:8] s_or_b32 s5, vcc_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s5 s_cbranch_execnz .LBB0_149 ; %bb.150: ; %Flow239 s_or_b32 exec_lo, exec_lo, s5 .LBB0_151: ; %Flow241 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 .LBB0_152: ; %.loopexit4.i.i.i9 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s1 v_mov_b32_e32 v29, 0 v_readfirstlane_b32 s4, v0 v_readfirstlane_b32 s5, v1 s_mov_b32 s10, exec_lo s_clause 0x1 global_load_b64 v[4:5], v29, s[2:3] offset:40 global_load_b128 v[6:9], v29, s[2:3] s_waitcnt vmcnt(1) v_readfirstlane_b32 s6, v4 v_readfirstlane_b32 s7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[6:7], s[4:5], s[6:7] s_mul_i32 s1, s7, 24 s_mul_hi_u32 s8, s6, 24 s_mul_i32 s9, s6, 24 s_and_saveexec_b32 s11, s0 s_cbranch_execz .LBB0_154 ; %bb.153: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, v29 s_add_i32 s10, s8, s1 s_waitcnt vmcnt(0) v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s10, v7, vcc_lo v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1 global_store_b128 v[0:1], v[10:13], off offset:8 .LBB0_154: s_or_b32 exec_lo, exec_lo, s11 s_lshl_b64 s[6:7], s[6:7], 12 v_lshlrev_b64 v[0:1], 6, v[28:29] s_waitcnt vmcnt(0) v_add_co_u32 v5, vcc_lo, v8, s6 v_add_co_ci_u32_e32 v8, vcc_lo, s7, v9, vcc_lo s_mov_b32 s12, 0 s_delay_alu instid0(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v5, v0 v_dual_mov_b32 v5, v29 :: v_dual_add_nc_u32 v4, s14, v31 s_mov_b32 s13, s12 s_mov_b32 s14, s12 s_mov_b32 s15, s12 v_and_or_b32 v2, 0xffffff1d, v2, 34 v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13 v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15 s_clause 0x3 global_store_b128 v[0:1], v[2:5], off global_store_b128 v[0:1], v[8:11], off offset:16 global_store_b128 v[0:1], v[8:11], off offset:32 global_store_b128 v[0:1], v[8:11], off offset:48 s_and_saveexec_b32 s6, s0 s_cbranch_execz .LBB0_162 ; %bb.155: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s4 v_mov_b32_e32 v10, s5 s_clause 0x1 global_load_b64 v[11:12], v8, s[2:3] offset:32 glc global_load_b64 v[0:1], v8, s[2:3] offset:40 s_waitcnt vmcnt(0) v_readfirstlane_b32 s10, v0 v_readfirstlane_b32 s11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b64 s[10:11], s[10:11], s[4:5] s_mul_i32 s7, s11, 24 s_mul_hi_u32 s11, s10, 24 s_mul_i32 s10, s10, 24 s_add_i32 s11, s11, s7 v_add_co_u32 v4, vcc_lo, v6, s10 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v7, vcc_lo s_mov_b32 s7, exec_lo global_store_b64 v[4:5], v[11:12], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmpx_ne_u64_e64 v[2:3], v[11:12] s_cbranch_execz .LBB0_158 ; %bb.156: ; %.preheader1.i.i.i13.preheader s_mov_b32 s10, 0 .LBB0_157: ; %.preheader1.i.i.i13 ; =>This Inner Loop Header: Depth=1 v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3] v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0 s_or_b32 s10, vcc_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s10 s_cbranch_execnz .LBB0_157 .LBB0_158: ; %Flow237 s_or_b32 exec_lo, exec_lo, s7 v_mov_b32_e32 v3, 0 s_mov_b32 s10, exec_lo s_mov_b32 s7, exec_lo v_mbcnt_lo_u32_b32 v2, s10, 0 global_load_b64 v[0:1], v3, s[2:3] offset:16 v_cmpx_eq_u32_e32 0, v2 s_cbranch_execz .LBB0_160 ; %bb.159: s_bcnt1_i32_b32 s10, s10 s_delay_alu instid0(SALU_CYCLE_1) v_mov_b32_e32 v2, s10 s_waitcnt vmcnt(0) global_atomic_add_u64 v[0:1], v[2:3], off offset:8 .LBB0_160: s_or_b32 exec_lo, exec_lo, s7 s_waitcnt vmcnt(0) global_load_b64 v[2:3], v[0:1], off offset:16 s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3] s_cbranch_vccnz .LBB0_162 ; %bb.161: global_load_b32 v0, v[0:1], off offset:24 v_mov_b32_e32 v1, 0 s_waitcnt vmcnt(0) v_readfirstlane_b32 s7, v0 s_waitcnt_vscnt null, 0x0 global_store_b64 v[2:3], v[0:1], off s_and_b32 m0, s7, 0xff s_sendmsg sendmsg(MSG_INTERRUPT) .LBB0_162: ; %Flow238 s_or_b32 exec_lo, exec_lo, s6 s_add_i32 s8, s8, s1 v_add_co_u32 v0, vcc_lo, v6, s9 v_add_co_ci_u32_e32 v1, vcc_lo, s8, v7, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v0, 20 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo .LBB0_163: ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v2, 1 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_165 ; %bb.164: ; in Loop: Header=BB0_163 Depth=1 global_load_b32 v2, v[0:1], off glc s_waitcnt vmcnt(0) buffer_gl1_inv buffer_gl0_inv v_and_b32_e32 v2, 1, v2 .LBB0_165: ; in Loop: Header=BB0_163 Depth=1 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_readfirstlane_b32 s1, v2 s_cmp_eq_u32 s1, 0 s_cbranch_scc1 .LBB0_167 ; %bb.166: ; in Loop: Header=BB0_163 Depth=1 s_mov_b32 s1, 0 s_sleep 1 s_branch .LBB0_168 .LBB0_167: ; in Loop: Header=BB0_163 Depth=1 s_mov_b32 s1, -1 .LBB0_168: ; %Flow232 ; in Loop: Header=BB0_163 Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s1 s_cbranch_vccnz .LBB0_163 ; %bb.169: s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_173 ; %bb.170: v_mov_b32_e32 v6, 0 s_clause 0x2 global_load_b64 v[2:3], v6, s[2:3] offset:40 global_load_b64 v[7:8], v6, s[2:3] offset:24 glc global_load_b64 v[4:5], v6, s[2:3] s_waitcnt vmcnt(2) v_add_co_u32 v9, vcc_lo, v2, 1 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v0, vcc_lo, v9, s4 v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1] v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9 v_and_b32_e32 v3, v1, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_and_b32_e32 v2, v0, v2 v_mul_lo_u32 v3, v3, 24 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mul_hi_u32 v9, v2, 24 v_mul_lo_u32 v2, v2, 24 v_add_nc_u32_e32 v3, v9, v3 s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_u32 v4, vcc_lo, v4, v2 v_mov_b32_e32 v2, v7 v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo v_mov_b32_e32 v3, v8 global_store_b64 v[4:5], v[7:8], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8] s_and_b32 exec_lo, exec_lo, vcc_lo s_cbranch_execz .LBB0_173 ; %bb.171: ; %.preheader.i.i.i12.preheader s_mov_b32 s0, 0 .LBB0_172: ; %.preheader.i.i.i12 ; =>This Inner Loop Header: Depth=1 s_sleep 1 global_store_b64 v[4:5], v[2:3], off s_waitcnt_vscnt null, 0x0 global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc s_waitcnt vmcnt(0) v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3] v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8 s_or_b32 s0, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 exec_lo, exec_lo, s0 s_cbranch_execnz .LBB0_172 .LBB0_173: ; %__ockl_printf_append_args.exit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10alloutputsPi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 33 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10alloutputsPi, .Lfunc_end0-_Z10alloutputsPi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 6776 ; NumSgprs: 22 ; NumVgprs: 33 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 4 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 33 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type .str,@object ; @.str .section .rodata.str1.1,"aMS",@progbits,1 .str: .asciz "%d\n" .size .str, 4 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims - .offset: 88 .size: 8 .value_kind: hidden_hostcall_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10alloutputsPi .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z10alloutputsPi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 33 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
adeb6985812d03a3c73f480b9170307f29b53589
#include <stdio.h> __global__ void kicache_test4_2 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_4 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_6 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_8 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_10 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_12 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_14 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_16 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_18 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_20 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_22 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_24 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_26 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_28 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_30 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_32 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_34 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_36 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_38 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_40 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_42 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_44 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_46 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_48 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_50 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_52 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_54 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_56 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_58 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_60 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_62 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_64 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_72 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_80 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_88 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_96 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_104 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_112 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_120 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_128 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_136 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_144 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_152 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_160 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_168 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_176 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_184 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_192 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_200 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_208 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_216 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_224 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_232 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); //__global__ void kicache_test4_240 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); //__global__ void kicache_test4_248 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); //__global__ void kicache_test4_256 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); void measure_icache() { unsigned int ts[1024]; // ts, output from kernel. Two elements used per thread. unsigned int *d_ts; unsigned int *d_out; // Unused memory for storing output dim3 Db = dim3(1); dim3 Dg = dim3(1,1,1); // Allocate device array. if (cudaSuccess != cudaMalloc((void**)&d_ts, sizeof(ts))) { printf ("cudaMalloc failed %s:%d\n", __FILE__, __LINE__); return; } if (cudaSuccess != cudaMalloc((void**)&d_out, 4)) { printf ("cudaMalloc failed %s:%d\n", __FILE__, __LINE__); return; } fprintf (stderr, "Running icache test...\n"); // Measure instruction cache size printf ("Instruction cache size:\n"); unsigned int sum_times[32]; printf (" 0.5 KB steps: "); Db.x = 1; for (int p2 = 1; p2 <= 32; p2++) { unsigned int sum_time = 0; bool failed = false; for (int i=0;i<100 && !failed ;i++) { cudaGetLastError(); // Clear previous error code, if any switch (p2) { case 1: kicache_test4_2 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 2: kicache_test4_4 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 3: kicache_test4_6 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 4: kicache_test4_8 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 5: kicache_test4_10 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 6: kicache_test4_12 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 7: kicache_test4_14 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 8: kicache_test4_16 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 9: kicache_test4_18 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 10: kicache_test4_20 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 11: kicache_test4_22 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 12: kicache_test4_24 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 13: kicache_test4_26 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 14: kicache_test4_28 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 15: kicache_test4_30 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 16: kicache_test4_32 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 17: kicache_test4_34 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 18: kicache_test4_36 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 19: kicache_test4_38 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 20: kicache_test4_40 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 21: kicache_test4_42 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 22: kicache_test4_44 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 23: kicache_test4_46 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 24: kicache_test4_48 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 25: kicache_test4_50 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 26: kicache_test4_52 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 27: kicache_test4_54 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 28: kicache_test4_56 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 29: kicache_test4_58 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 30: kicache_test4_60 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 31: kicache_test4_62 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 32: kicache_test4_64 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; } if (cudaGetLastError() != cudaSuccess) { failed = true; break; } cudaThreadSynchronize(); cudaMemcpy(ts, d_ts, sizeof(ts), cudaMemcpyDeviceToHost); sum_time += (ts[1] - ts[0]); } if (failed) { printf ("xxxx "); } else { // Compute average latency over the lifetime of each warp (sum_time), and average throughput of the kernel (sum_max_time). printf ("%.5f ", sum_time/100.0/(p2*64)); fflush(stdout); } sum_times[p2-1] = sum_time; } printf (" (icache = "); for (int last_i=1, i=1;i<32;i++) { //printf("sum time %d, %d \n",sum_times[i]/(i+1),sum_times[last_i]/(last_i+1)*1.33); if (sum_times[i]/(i+1) > sum_times[last_i]/(last_i+1) /**1.33*/) { printf ("%.1fKB ", i*0.5); last_i = i; } } printf (")\n"); printf (" 2 KB steps: "); Db.x = 1; for (int p2 = 1; p2 <= 29/*32*/; p2++) { unsigned int sum_time = 0; bool failed = false; for (int i=0;i<100 && !failed ;i++) { cudaGetLastError(); // Clear previous error code, if any switch (p2) { case 1: kicache_test4_8 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 2: kicache_test4_16 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 3: kicache_test4_24 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 4: kicache_test4_32 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 5: kicache_test4_40 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 6: kicache_test4_48 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 7: kicache_test4_56 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 8: kicache_test4_64 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 9: kicache_test4_72 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 10: kicache_test4_80 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 11: kicache_test4_88 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 12: kicache_test4_96 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 13: kicache_test4_104 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 14: kicache_test4_112 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 15: kicache_test4_120 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 16: kicache_test4_128 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 17: kicache_test4_136 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 18: kicache_test4_144 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 19: kicache_test4_152 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 20: kicache_test4_160 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 21: kicache_test4_168 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 22: kicache_test4_176 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 23: kicache_test4_184 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 24: kicache_test4_192 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 25: kicache_test4_200 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 26: kicache_test4_208 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 27: kicache_test4_216 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 28: kicache_test4_224 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 29: kicache_test4_232 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; //case 30: kicache_test4_240 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; //case 31: kicache_test4_248 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; //case 32: kicache_test4_256 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; } if (cudaGetLastError() != cudaSuccess) { failed = true; break; } cudaThreadSynchronize(); cudaMemcpy(ts, d_ts, sizeof(ts), cudaMemcpyDeviceToHost); sum_time += (ts[1] - ts[0]); } if (failed) { printf ("xxxx "); } else { // Compute average latency over the lifetime of each warp (sum_time), and average throughput of the kernel (sum_max_time). printf ("%.1f ", sum_time/100.0/(p2*256)); fflush(stdout); } sum_times[p2-1] = sum_time; } printf (" (icache = "); for (int last_i=1, i=1;i<28/*32*/;i++) { if (sum_times[i]/(i+1) > sum_times[last_i]/(last_i+1) /**1.33*/) { printf ("%.1fKB ", i*2.0); last_i = i; } } printf (")\n"); printf ("\n Test instruction cache sharing by running two thread blocks concurently.\n"); Db.x = 1; dim3 Dg2 = dim3(31,1,1); for (int blk2 = 1; blk2 <31; blk2+= (blk2 == 1? 9 : 10)) { printf (" TPC 0,%d (2 KB steps): ", blk2); int mask = (1<<blk2) | 1; // Enable two blocks for execution for (int p2 = 1; p2 <= 28/*32*/; p2++) { unsigned int sum_time = 0; bool failed = false; for (int i=0;i<50 && !failed ;i++) { cudaGetLastError(); // Clear previous error code, if any switch (p2) { case 1: kicache_test4_8 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 2: kicache_test4_16 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 3: kicache_test4_24 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 4: kicache_test4_32 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 5: kicache_test4_40 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 6: kicache_test4_48 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 7: kicache_test4_56 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 8: kicache_test4_64 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 9: kicache_test4_72 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 10: kicache_test4_80 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 11: kicache_test4_88 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 12: kicache_test4_96 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 13: kicache_test4_104 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 14: kicache_test4_112 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 15: kicache_test4_120 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 16: kicache_test4_128 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 17: kicache_test4_136 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 18: kicache_test4_144 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 19: kicache_test4_152 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 20: kicache_test4_160 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 21: kicache_test4_168 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 22: kicache_test4_176 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 23: kicache_test4_184 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 24: kicache_test4_192 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 25: kicache_test4_200 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 26: kicache_test4_208 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 27: kicache_test4_216 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 28: kicache_test4_224 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; //case 29: kicache_test4_232 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; //case 30: kicache_test4_240 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; //case 31: kicache_test4_248 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; //case 32: kicache_test4_256 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; } if (cudaGetLastError() != cudaSuccess) { failed = true; break; } cudaThreadSynchronize(); cudaMemcpy(ts, d_ts, sizeof(ts), cudaMemcpyDeviceToHost); sum_time += (ts[1] - ts[0]); } if (failed) { printf ("xxxx "); } else { printf ("%.1f ", sum_time/50.0/(p2*256)); fflush(stdout); } sum_times[p2-1] = sum_time; } printf (" (apparent icache = "); for (int last_i=1, i=1;i<32;i++) { if (sum_times[i]/(i+1) > sum_times[last_i]/(last_i+1) *1.25) { printf ("%.1fKB ", i*2.0); last_i = i; } } printf (")\n"); } printf ("\n"); cudaFree(d_ts); cudaFree(d_out); } int main() { measure_icache(); }
.file "tmpxft_002be6ae_00000000-6_icache.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "/home/ubuntu/Datasets/stackv2/train-structured/mirsoleimani/SAMMicrobenchmark/master/cudabmk/icache.cu" .LC1: .string "cudaMalloc failed %s:%d\n" .LC2: .string "Running icache test...\n" .LC3: .string "Instruction cache size:\n" .LC4: .string " 0.5 KB steps: " .LC5: .string " (icache = " .LC7: .string "%.1fKB " .LC8: .string ")\n" .LC9: .string " 2 KB steps: " .LC10: .string "\n Test instruction cache sharing by running two thread blocks concurently.\n" .LC11: .string " TPC 0,%d (2 KB steps): " .LC12: .string " (apparent icache = " .LC14: .string "\n" .LC15: .string "xxxx " .LC17: .string "%.1f " .LC19: .string "%.5f " .text .globl _Z14measure_icachev .type _Z14measure_icachev, @function _Z14measure_icachev: .LFB2027: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $4096, %rsp .cfi_def_cfa_offset 4152 orq $0, (%rsp) subq $216, %rsp .cfi_def_cfa_offset 4368 movl $4096, %esi movq %fs:40, %rax movq %rax, 4296(%rsp) movabsq $4294967297, %rax leaq 16(%rsp), %rdi movl $1, 44(%rsp) movl $1, 56(%rsp) movq %rax, 36(%rsp) movq %rax, 48(%rsp) call cudaMalloc@PLT movl $78, %ecx testl %eax, %eax jne .L157 leaq 24(%rsp), %rdi movl $4, %esi call cudaMalloc@PLT testl %eax, %eax je .L5 movl $83, %ecx .L157: leaq .LC0(%rip), %rdx leaq .LC1(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L2 .L5: movq stderr(%rip), %rdi leaq .LC2(%rip), %rdx movl $2, %esi xorl %eax, %eax movl $1, %ebp leaq .L9(%rip), %r13 call __fprintf_chk@PLT leaq .LC3(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT leaq .LC4(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT .L6: movl %ebp, %r14d xorl %ebx, %ebx movl $100, %r12d .L44: call cudaGetLastError@PLT leal -2(%r14), %eax movq 36(%rsp), %rdx movl 44(%rsp), %ecx cmpl $30, %eax movq 48(%rsp), %rdi movl 56(%rsp), %esi ja .L7 movslq 0(%r13,%rax,4), %rax xorl %r9d, %r9d xorl %r8d, %r8d addq %r13, %rax notrack jmp *%rax .section .rodata .align 4 .align 4 .L9: .long .L39-.L9 .long .L38-.L9 .long .L37-.L9 .long .L36-.L9 .long .L35-.L9 .long .L34-.L9 .long .L33-.L9 .long .L32-.L9 .long .L31-.L9 .long .L30-.L9 .long .L29-.L9 .long .L28-.L9 .long .L27-.L9 .long .L26-.L9 .long .L25-.L9 .long .L24-.L9 .long .L23-.L9 .long .L22-.L9 .long .L21-.L9 .long .L20-.L9 .long .L19-.L9 .long .L18-.L9 .long .L17-.L9 .long .L16-.L9 .long .L15-.L9 .long .L14-.L9 .long .L13-.L9 .long .L12-.L9 .long .L11-.L9 .long .L10-.L9 .long .L8-.L9 .text .L7: xorl %r9d, %r9d xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $1, %ecx movl $1, %edx call _Z15kicache_test4_2PjS_iii@PLT jmp .L41 .L39: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $2, %ecx movl $1, %edx call _Z15kicache_test4_4PjS_iii@PLT jmp .L41 .L38: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $3, %ecx movl $1, %edx call _Z15kicache_test4_6PjS_iii@PLT jmp .L41 .L37: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $4, %ecx movl $1, %edx call _Z15kicache_test4_8PjS_iii@PLT jmp .L41 .L36: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $5, %ecx movl $1, %edx call _Z16kicache_test4_10PjS_iii@PLT jmp .L41 .L35: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $6, %ecx movl $1, %edx call _Z16kicache_test4_12PjS_iii@PLT jmp .L41 .L34: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $7, %ecx movl $1, %edx call _Z16kicache_test4_14PjS_iii@PLT jmp .L41 .L33: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $8, %ecx movl $1, %edx call _Z16kicache_test4_16PjS_iii@PLT jmp .L41 .L32: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $9, %ecx movl $1, %edx call _Z16kicache_test4_18PjS_iii@PLT jmp .L41 .L31: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $10, %ecx movl $1, %edx call _Z16kicache_test4_20PjS_iii@PLT jmp .L41 .L30: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $11, %ecx movl $1, %edx call _Z16kicache_test4_22PjS_iii@PLT jmp .L41 .L29: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $12, %ecx movl $1, %edx call _Z16kicache_test4_24PjS_iii@PLT jmp .L41 .L28: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $13, %ecx movl $1, %edx call _Z16kicache_test4_26PjS_iii@PLT jmp .L41 .L27: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $14, %ecx movl $1, %edx call _Z16kicache_test4_28PjS_iii@PLT jmp .L41 .L26: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $15, %ecx movl $1, %edx call _Z16kicache_test4_30PjS_iii@PLT jmp .L41 .L25: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $16, %ecx movl $1, %edx call _Z16kicache_test4_32PjS_iii@PLT jmp .L41 .L24: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $17, %ecx movl $1, %edx call _Z16kicache_test4_34PjS_iii@PLT jmp .L41 .L23: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $18, %ecx movl $1, %edx call _Z16kicache_test4_36PjS_iii@PLT jmp .L41 .L22: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $19, %ecx movl $1, %edx call _Z16kicache_test4_38PjS_iii@PLT jmp .L41 .L21: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $20, %ecx movl $1, %edx call _Z16kicache_test4_40PjS_iii@PLT jmp .L41 .L20: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $21, %ecx movl $1, %edx call _Z16kicache_test4_42PjS_iii@PLT jmp .L41 .L19: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $22, %ecx movl $1, %edx call _Z16kicache_test4_44PjS_iii@PLT jmp .L41 .L18: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $23, %ecx movl $1, %edx call _Z16kicache_test4_46PjS_iii@PLT jmp .L41 .L17: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $24, %ecx movl $1, %edx call _Z16kicache_test4_48PjS_iii@PLT jmp .L41 .L16: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $25, %ecx movl $1, %edx call _Z16kicache_test4_50PjS_iii@PLT jmp .L41 .L15: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $26, %ecx movl $1, %edx call _Z16kicache_test4_52PjS_iii@PLT jmp .L41 .L14: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $27, %ecx movl $1, %edx call _Z16kicache_test4_54PjS_iii@PLT jmp .L41 .L13: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $28, %ecx movl $1, %edx call _Z16kicache_test4_56PjS_iii@PLT jmp .L41 .L12: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $29, %ecx movl $1, %edx call _Z16kicache_test4_58PjS_iii@PLT jmp .L41 .L11: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $30, %ecx movl $1, %edx call _Z16kicache_test4_60PjS_iii@PLT jmp .L41 .L10: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $31, %ecx movl $1, %edx call _Z16kicache_test4_62PjS_iii@PLT jmp .L41 .L8: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L41 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $32, %ecx movl $1, %edx call _Z16kicache_test4_64PjS_iii@PLT .L41: call cudaGetLastError@PLT testl %eax, %eax jne .L43 call cudaThreadSynchronize@PLT movq 16(%rsp), %rsi movl $2, %ecx leaq 200(%rsp), %rdi movl $4096, %edx call cudaMemcpy@PLT addl 204(%rsp), %ebx subl 200(%rsp), %ebx decl %r12d jne .L44 movl %ebx, %eax movl $2, %edi leaq .LC19(%rip), %rsi cvtsi2sdq %rax, %xmm0 movl %ebp, %eax divsd .LC18(%rip), %xmm0 sall $6, %eax cvtsi2sdl %eax, %xmm1 movb $1, %al divsd %xmm1, %xmm0 call __printf_chk@PLT movq stdout(%rip), %rdi call fflush@PLT .L142: movl %ebx, 68(%rsp,%rbp,4) incq %rbp leaq 72(%rsp), %r15 cmpq $33, %rbp jne .L6 leaq .LC5(%rip), %rsi movl $2, %edi xorl %eax, %eax movl $1, %ebx call __printf_chk@PLT movl $1, %ebp .L48: movl (%r15,%rbx,4), %eax leal 1(%rbx), %ecx xorl %edx, %edx leal 1(%rbp), %esi divl %ecx xorl %edx, %edx movl %eax, %ecx movslq %ebp, %rax movl 72(%rsp,%rax,4), %eax divl %esi cmpl %ecx, %eax jnb .L47 cvtsi2sdl %ebx, %xmm0 mulsd .LC6(%rip), %xmm0 movb $1, %al movl %ebx, %ebp leaq .LC7(%rip), %rsi movl $2, %edi call __printf_chk@PLT .L47: incq %rbx cmpq $32, %rbx jne .L48 leaq .LC8(%rip), %rsi movl $2, %edi xorl %eax, %eax movl $1, %ebx call __printf_chk@PLT leaq .LC9(%rip), %rsi xorl %eax, %eax movl $2, %edi call __printf_chk@PLT leaq .L52(%rip), %r14 .L49: movl %ebx, %r13d xorl %ebp, %ebp movl $100, %r12d .L84: call cudaGetLastError@PLT leal -2(%r13), %eax movq 36(%rsp), %rdx movl 44(%rsp), %ecx cmpl $27, %eax movq 48(%rsp), %rdi movl 56(%rsp), %esi ja .L50 movslq (%r14,%rax,4), %rax xorl %r9d, %r9d xorl %r8d, %r8d addq %r14, %rax notrack jmp *%rax .section .rodata .align 4 .align 4 .L52: .long .L79-.L52 .long .L78-.L52 .long .L77-.L52 .long .L76-.L52 .long .L75-.L52 .long .L74-.L52 .long .L73-.L52 .long .L72-.L52 .long .L71-.L52 .long .L70-.L52 .long .L69-.L52 .long .L68-.L52 .long .L67-.L52 .long .L66-.L52 .long .L65-.L52 .long .L64-.L52 .long .L63-.L52 .long .L62-.L52 .long .L61-.L52 .long .L60-.L52 .long .L59-.L52 .long .L58-.L52 .long .L57-.L52 .long .L56-.L52 .long .L55-.L52 .long .L54-.L52 .long .L53-.L52 .long .L51-.L52 .text .L50: xorl %r9d, %r9d xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $1, %ecx movl $1, %edx call _Z15kicache_test4_8PjS_iii@PLT jmp .L81 .L79: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $2, %ecx movl $1, %edx call _Z16kicache_test4_16PjS_iii@PLT jmp .L81 .L78: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $3, %ecx movl $1, %edx call _Z16kicache_test4_24PjS_iii@PLT jmp .L81 .L77: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $4, %ecx movl $1, %edx call _Z16kicache_test4_32PjS_iii@PLT jmp .L81 .L76: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $5, %ecx movl $1, %edx call _Z16kicache_test4_40PjS_iii@PLT jmp .L81 .L75: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $6, %ecx movl $1, %edx call _Z16kicache_test4_48PjS_iii@PLT jmp .L81 .L74: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $7, %ecx movl $1, %edx call _Z16kicache_test4_56PjS_iii@PLT jmp .L81 .L73: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $8, %ecx movl $1, %edx call _Z16kicache_test4_64PjS_iii@PLT jmp .L81 .L72: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $9, %ecx movl $1, %edx call _Z16kicache_test4_72PjS_iii@PLT jmp .L81 .L71: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $10, %ecx movl $1, %edx call _Z16kicache_test4_80PjS_iii@PLT jmp .L81 .L70: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $11, %ecx movl $1, %edx call _Z16kicache_test4_88PjS_iii@PLT jmp .L81 .L69: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $12, %ecx movl $1, %edx call _Z16kicache_test4_96PjS_iii@PLT jmp .L81 .L68: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $13, %ecx movl $1, %edx call _Z17kicache_test4_104PjS_iii@PLT jmp .L81 .L67: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $14, %ecx movl $1, %edx call _Z17kicache_test4_112PjS_iii@PLT jmp .L81 .L66: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $15, %ecx movl $1, %edx call _Z17kicache_test4_120PjS_iii@PLT jmp .L81 .L65: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $16, %ecx movl $1, %edx call _Z17kicache_test4_128PjS_iii@PLT jmp .L81 .L64: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $17, %ecx movl $1, %edx call _Z17kicache_test4_136PjS_iii@PLT jmp .L81 .L63: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $18, %ecx movl $1, %edx call _Z17kicache_test4_144PjS_iii@PLT jmp .L81 .L62: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $19, %ecx movl $1, %edx call _Z17kicache_test4_152PjS_iii@PLT jmp .L81 .L61: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $20, %ecx movl $1, %edx call _Z17kicache_test4_160PjS_iii@PLT jmp .L81 .L60: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $21, %ecx movl $1, %edx call _Z17kicache_test4_168PjS_iii@PLT jmp .L81 .L59: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $22, %ecx movl $1, %edx call _Z17kicache_test4_176PjS_iii@PLT jmp .L81 .L58: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $23, %ecx movl $1, %edx call _Z17kicache_test4_184PjS_iii@PLT jmp .L81 .L57: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $24, %ecx movl $1, %edx call _Z17kicache_test4_192PjS_iii@PLT jmp .L81 .L56: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $25, %ecx movl $1, %edx call _Z17kicache_test4_200PjS_iii@PLT jmp .L81 .L55: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $26, %ecx movl $1, %edx call _Z17kicache_test4_208PjS_iii@PLT jmp .L81 .L54: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $27, %ecx movl $1, %edx call _Z17kicache_test4_216PjS_iii@PLT jmp .L81 .L53: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $28, %ecx movl $1, %edx call _Z17kicache_test4_224PjS_iii@PLT jmp .L81 .L51: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L81 movq 24(%rsp), %rsi movq 16(%rsp), %rdi movl $2, %r8d movl $29, %ecx movl $1, %edx call _Z17kicache_test4_232PjS_iii@PLT .L81: call cudaGetLastError@PLT testl %eax, %eax jne .L83 call cudaThreadSynchronize@PLT movq 16(%rsp), %rsi movl $2, %ecx leaq 200(%rsp), %rdi movl $4096, %edx call cudaMemcpy@PLT addl 204(%rsp), %ebp subl 200(%rsp), %ebp decl %r12d jne .L84 movl %ebp, %eax movl $2, %edi leaq .LC17(%rip), %rsi cvtsi2sdq %rax, %xmm0 movl %ebx, %eax divsd .LC18(%rip), %xmm0 sall $8, %eax cvtsi2sdl %eax, %xmm1 movb $1, %al divsd %xmm1, %xmm0 call __printf_chk@PLT movq stdout(%rip), %rdi call fflush@PLT .L137: movl %ebp, -4(%r15,%rbx,4) incq %rbx cmpq $30, %rbx jne .L49 leaq .LC5(%rip), %rsi movl $2, %edi xorl %eax, %eax movl $1, %ebx call __printf_chk@PLT movl $1, %r12d leaq .LC7(%rip), %rbp .L88: movl (%r15,%rbx,4), %eax leal 1(%rbx), %ecx xorl %edx, %edx leal 1(%r12), %esi divl %ecx xorl %edx, %edx movl %eax, %ecx movslq %r12d, %rax movl 72(%rsp,%rax,4), %eax divl %esi cmpl %ecx, %eax jnb .L87 cvtsi2sdl %ebx, %xmm0 movq %rbp, %rsi movl $2, %edi movb $1, %al movl %ebx, %r12d addsd %xmm0, %xmm0 call __printf_chk@PLT .L87: incq %rbx cmpq $28, %rbx jne .L88 leaq .LC8(%rip), %rsi movl $2, %edi xorl %eax, %eax movl $1, %r12d call __printf_chk@PLT leaq .LC10(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl $1, 68(%rsp) movabsq $4294967327, %rax movq %rax, 60(%rsp) .L132: movl %r12d, %edx movl $2, %edi xorl %eax, %eax movl $1, %ebx leaq .LC11(%rip), %rsi leaq .L92(%rip), %r13 call __printf_chk@PLT movl $1, %eax movl %r12d, %ecx sall %cl, %eax orl $1, %eax movl %eax, 8(%rsp) .L89: movl $50, 12(%rsp) movl %ebx, %r14d xorl %ebp, %ebp .L123: call cudaGetLastError@PLT leal -2(%r14), %eax movq 36(%rsp), %rdx movl 44(%rsp), %ecx cmpl $26, %eax movq 60(%rsp), %rdi movl 68(%rsp), %esi ja .L90 movslq 0(%r13,%rax,4), %rax xorl %r9d, %r9d xorl %r8d, %r8d addq %r13, %rax notrack jmp *%rax .section .rodata .align 4 .align 4 .L92: .long .L118-.L92 .long .L117-.L92 .long .L116-.L92 .long .L115-.L92 .long .L114-.L92 .long .L113-.L92 .long .L112-.L92 .long .L111-.L92 .long .L110-.L92 .long .L109-.L92 .long .L108-.L92 .long .L107-.L92 .long .L106-.L92 .long .L105-.L92 .long .L104-.L92 .long .L103-.L92 .long .L102-.L92 .long .L101-.L92 .long .L100-.L92 .long .L99-.L92 .long .L98-.L92 .long .L97-.L92 .long .L96-.L92 .long .L95-.L92 .long .L94-.L92 .long .L93-.L92 .long .L91-.L92 .text .L90: xorl %r9d, %r9d xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $1, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z15kicache_test4_8PjS_iii@PLT jmp .L120 .L118: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $2, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_16PjS_iii@PLT jmp .L120 .L117: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $3, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_24PjS_iii@PLT jmp .L120 .L116: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $4, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_32PjS_iii@PLT jmp .L120 .L115: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $5, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_40PjS_iii@PLT jmp .L120 .L114: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $6, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_48PjS_iii@PLT jmp .L120 .L113: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $7, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_56PjS_iii@PLT jmp .L120 .L112: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $8, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_64PjS_iii@PLT jmp .L120 .L111: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $9, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_72PjS_iii@PLT jmp .L120 .L110: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $10, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_80PjS_iii@PLT jmp .L120 .L109: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $11, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_88PjS_iii@PLT jmp .L120 .L108: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $12, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z16kicache_test4_96PjS_iii@PLT jmp .L120 .L107: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $13, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_104PjS_iii@PLT jmp .L120 .L106: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $14, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_112PjS_iii@PLT jmp .L120 .L105: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $15, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_120PjS_iii@PLT jmp .L120 .L104: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $16, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_128PjS_iii@PLT jmp .L120 .L103: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $17, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_136PjS_iii@PLT jmp .L120 .L102: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $18, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_144PjS_iii@PLT jmp .L120 .L101: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $19, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_152PjS_iii@PLT jmp .L120 .L100: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $20, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_160PjS_iii@PLT jmp .L120 .L99: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $21, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_168PjS_iii@PLT jmp .L120 .L98: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $22, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_176PjS_iii@PLT jmp .L120 .L97: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $23, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_184PjS_iii@PLT jmp .L120 .L96: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $24, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_192PjS_iii@PLT jmp .L120 .L95: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $25, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_200PjS_iii@PLT jmp .L120 .L94: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $26, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_208PjS_iii@PLT jmp .L120 .L93: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $27, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_216PjS_iii@PLT jmp .L120 .L91: call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L120 movl 8(%rsp), %edx movq 24(%rsp), %rsi movl $28, %ecx movl $2, %r8d movq 16(%rsp), %rdi call _Z17kicache_test4_224PjS_iii@PLT .L120: call cudaGetLastError@PLT testl %eax, %eax jne .L122 call cudaThreadSynchronize@PLT movq 16(%rsp), %rsi movl $2, %ecx leaq 200(%rsp), %rdi movl $4096, %edx call cudaMemcpy@PLT addl 204(%rsp), %ebp subl 200(%rsp), %ebp decl 12(%rsp) jne .L123 movl %ebp, %eax movl $2, %edi leaq .LC17(%rip), %rsi cvtsi2sdq %rax, %xmm0 movl %ebx, %eax divsd .LC16(%rip), %xmm0 sall $8, %eax cvtsi2sdl %eax, %xmm1 movb $1, %al divsd %xmm1, %xmm0 call __printf_chk@PLT movq stdout(%rip), %rdi call fflush@PLT .L134: movl %ebp, -4(%r15,%rbx,4) incq %rbx cmpq $29, %rbx jne .L89 leaq .LC12(%rip), %rsi movl $2, %edi xorl %eax, %eax movl $1, %ebx call __printf_chk@PLT movl $1, %ebp .L130: movl (%r15,%rbx,4), %eax leal 1(%rbx), %ecx xorl %edx, %edx divl %ecx xorl %edx, %edx leal 1(%rbp), %ecx cvtsi2sdl %eax, %xmm1 movslq %ebp, %rax movl 72(%rsp,%rax,4), %eax divl %ecx cvtsi2sdq %rax, %xmm0 mulsd .LC13(%rip), %xmm0 comisd %xmm0, %xmm1 jbe .L126 cvtsi2sdl %ebx, %xmm0 leaq .LC7(%rip), %rsi movb $1, %al movl %ebx, %ebp movl $2, %edi addsd %xmm0, %xmm0 call __printf_chk@PLT .L126: incq %rbx cmpq $32, %rbx jne .L130 xorl %eax, %eax leaq .LC8(%rip), %rsi movl $2, %edi call __printf_chk@PLT xorl %eax, %eax cmpl $1, %r12d setne %al leal 9(%rax,%r12), %r12d cmpl $30, %r12d jle .L132 leaq .LC14(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call cudaFree@PLT jmp .L2 .L122: leaq .LC15(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L134 .L83: leaq .LC15(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L137 .L43: leaq .LC15(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT jmp .L142 .L2: movq 4296(%rsp), %rax subq %fs:40, %rax je .L143 call __stack_chk_fail@PLT .L143: addq $4312, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size _Z14measure_icachev, .-_Z14measure_icachev .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 call _Z14measure_icachev xorl %eax, %eax popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2054: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT movq %rax, %rdi movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2054: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC6: .long 0 .long 1071644672 .align 8 .LC13: .long 0 .long 1072955392 .align 8 .LC16: .long 0 .long 1078525952 .align 8 .LC18: .long 0 .long 1079574528 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89
#include <hip/hip_runtime.h> #include <stdio.h> __global__ void kicache_test4_2 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_4 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_6 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_8 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_10 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_12 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_14 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_16 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_18 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_20 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_22 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_24 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_26 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_28 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_30 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_32 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_34 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_36 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_38 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_40 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_42 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_44 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_46 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_48 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_50 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_52 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_54 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_56 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_58 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_60 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_62 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_64 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_72 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_80 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_88 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_96 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_104 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_112 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_120 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_128 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_136 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_144 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_152 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_160 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_168 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_176 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_184 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_192 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_200 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_208 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_216 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_224 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); __global__ void kicache_test4_232 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); //__global__ void kicache_test4_240 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); //__global__ void kicache_test4_248 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); //__global__ void kicache_test4_256 (unsigned int *ts, unsigned int* out, int p1, int p2, int its); void measure_icache() { unsigned int ts[1024]; // ts, output from kernel. Two elements used per thread. unsigned int *d_ts; unsigned int *d_out; // Unused memory for storing output dim3 Db = dim3(1); dim3 Dg = dim3(1,1,1); // Allocate device array. if (hipSuccess != hipMalloc((void**)&d_ts, sizeof(ts))) { printf ("hipMalloc failed %s:%d\n", __FILE__, __LINE__); return; } if (hipSuccess != hipMalloc((void**)&d_out, 4)) { printf ("hipMalloc failed %s:%d\n", __FILE__, __LINE__); return; } fprintf (stderr, "Running icache test...\n"); // Measure instruction cache size printf ("Instruction cache size:\n"); unsigned int sum_times[32]; printf (" 0.5 KB steps: "); Db.x = 1; for (int p2 = 1; p2 <= 32; p2++) { unsigned int sum_time = 0; bool failed = false; for (int i=0;i<100 && !failed ;i++) { hipGetLastError(); // Clear previous error code, if any switch (p2) { case 1: kicache_test4_2 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 2: kicache_test4_4 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 3: kicache_test4_6 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 4: kicache_test4_8 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 5: kicache_test4_10 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 6: kicache_test4_12 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 7: kicache_test4_14 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 8: kicache_test4_16 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 9: kicache_test4_18 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 10: kicache_test4_20 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 11: kicache_test4_22 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 12: kicache_test4_24 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 13: kicache_test4_26 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 14: kicache_test4_28 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 15: kicache_test4_30 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 16: kicache_test4_32 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 17: kicache_test4_34 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 18: kicache_test4_36 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 19: kicache_test4_38 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 20: kicache_test4_40 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 21: kicache_test4_42 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 22: kicache_test4_44 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 23: kicache_test4_46 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 24: kicache_test4_48 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 25: kicache_test4_50 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 26: kicache_test4_52 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 27: kicache_test4_54 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 28: kicache_test4_56 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 29: kicache_test4_58 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 30: kicache_test4_60 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 31: kicache_test4_62 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 32: kicache_test4_64 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; } if (hipGetLastError() != hipSuccess) { failed = true; break; } hipDeviceSynchronize(); hipMemcpy(ts, d_ts, sizeof(ts), hipMemcpyDeviceToHost); sum_time += (ts[1] - ts[0]); } if (failed) { printf ("xxxx "); } else { // Compute average latency over the lifetime of each warp (sum_time), and average throughput of the kernel (sum_max_time). printf ("%.5f ", sum_time/100.0/(p2*64)); fflush(stdout); } sum_times[p2-1] = sum_time; } printf (" (icache = "); for (int last_i=1, i=1;i<32;i++) { //printf("sum time %d, %d \n",sum_times[i]/(i+1),sum_times[last_i]/(last_i+1)*1.33); if (sum_times[i]/(i+1) > sum_times[last_i]/(last_i+1) /**1.33*/) { printf ("%.1fKB ", i*0.5); last_i = i; } } printf (")\n"); printf (" 2 KB steps: "); Db.x = 1; for (int p2 = 1; p2 <= 29/*32*/; p2++) { unsigned int sum_time = 0; bool failed = false; for (int i=0;i<100 && !failed ;i++) { hipGetLastError(); // Clear previous error code, if any switch (p2) { case 1: kicache_test4_8 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 2: kicache_test4_16 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 3: kicache_test4_24 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 4: kicache_test4_32 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 5: kicache_test4_40 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 6: kicache_test4_48 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 7: kicache_test4_56 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 8: kicache_test4_64 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 9: kicache_test4_72 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 10: kicache_test4_80 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 11: kicache_test4_88 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 12: kicache_test4_96 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 13: kicache_test4_104 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 14: kicache_test4_112 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 15: kicache_test4_120 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 16: kicache_test4_128 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 17: kicache_test4_136 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 18: kicache_test4_144 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 19: kicache_test4_152 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 20: kicache_test4_160 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 21: kicache_test4_168 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 22: kicache_test4_176 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 23: kicache_test4_184 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 24: kicache_test4_192 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 25: kicache_test4_200 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 26: kicache_test4_208 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 27: kicache_test4_216 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 28: kicache_test4_224 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; case 29: kicache_test4_232 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; //case 30: kicache_test4_240 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; //case 31: kicache_test4_248 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; //case 32: kicache_test4_256 <<<Dg, Db>>>(d_ts, d_out, 1, p2, 2); break; } if (hipGetLastError() != hipSuccess) { failed = true; break; } hipDeviceSynchronize(); hipMemcpy(ts, d_ts, sizeof(ts), hipMemcpyDeviceToHost); sum_time += (ts[1] - ts[0]); } if (failed) { printf ("xxxx "); } else { // Compute average latency over the lifetime of each warp (sum_time), and average throughput of the kernel (sum_max_time). printf ("%.1f ", sum_time/100.0/(p2*256)); fflush(stdout); } sum_times[p2-1] = sum_time; } printf (" (icache = "); for (int last_i=1, i=1;i<28/*32*/;i++) { if (sum_times[i]/(i+1) > sum_times[last_i]/(last_i+1) /**1.33*/) { printf ("%.1fKB ", i*2.0); last_i = i; } } printf (")\n"); printf ("\n Test instruction cache sharing by running two thread blocks concurently.\n"); Db.x = 1; dim3 Dg2 = dim3(31,1,1); for (int blk2 = 1; blk2 <31; blk2+= (blk2 == 1? 9 : 10)) { printf (" TPC 0,%d (2 KB steps): ", blk2); int mask = (1<<blk2) | 1; // Enable two blocks for execution for (int p2 = 1; p2 <= 28/*32*/; p2++) { unsigned int sum_time = 0; bool failed = false; for (int i=0;i<50 && !failed ;i++) { hipGetLastError(); // Clear previous error code, if any switch (p2) { case 1: kicache_test4_8 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 2: kicache_test4_16 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 3: kicache_test4_24 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 4: kicache_test4_32 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 5: kicache_test4_40 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 6: kicache_test4_48 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 7: kicache_test4_56 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 8: kicache_test4_64 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 9: kicache_test4_72 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 10: kicache_test4_80 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 11: kicache_test4_88 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 12: kicache_test4_96 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 13: kicache_test4_104 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 14: kicache_test4_112 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 15: kicache_test4_120 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 16: kicache_test4_128 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 17: kicache_test4_136 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 18: kicache_test4_144 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 19: kicache_test4_152 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 20: kicache_test4_160 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 21: kicache_test4_168 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 22: kicache_test4_176 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 23: kicache_test4_184 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 24: kicache_test4_192 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 25: kicache_test4_200 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 26: kicache_test4_208 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 27: kicache_test4_216 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; case 28: kicache_test4_224 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; //case 29: kicache_test4_232 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; //case 30: kicache_test4_240 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; //case 31: kicache_test4_248 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; //case 32: kicache_test4_256 <<<Dg2, Db>>>(d_ts, d_out, mask, p2, 2); break; } if (hipGetLastError() != hipSuccess) { failed = true; break; } hipDeviceSynchronize(); hipMemcpy(ts, d_ts, sizeof(ts), hipMemcpyDeviceToHost); sum_time += (ts[1] - ts[0]); } if (failed) { printf ("xxxx "); } else { printf ("%.1f ", sum_time/50.0/(p2*256)); fflush(stdout); } sum_times[p2-1] = sum_time; } printf (" (apparent icache = "); for (int last_i=1, i=1;i<32;i++) { if (sum_times[i]/(i+1) > sum_times[last_i]/(last_i+1) *1.25) { printf ("%.1fKB ", i*2.0); last_i = i; } } printf (")\n"); } printf ("\n"); hipFree(d_ts); hipFree(d_out); } int main() { measure_icache(); }
.text .file "icache.hip" .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _Z14measure_icachev .LCPI0_0: .quad 0x4059000000000000 # double 100 .LCPI0_1: .quad 0x3fe0000000000000 # double 0.5 .LCPI0_2: .quad 0x4049000000000000 # double 50 .LCPI0_3: .quad 0x3ff4000000000000 # double 1.25 .text .globl _Z14measure_icachev .type _Z14measure_icachev,@function _Z14measure_icachev: # @_Z14measure_icachev .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $4264, %rsp # imm = 0x10A8 .cfi_def_cfa_offset 4320 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 leaq 8(%rsp), %rdi movl $4096, %esi # imm = 0x1000 callq hipMalloc testl %eax, %eax je .LBB0_3 # %bb.1: movl $.L.str, %edi movl $.L.str.1, %esi movl $80, %edx jmp .LBB0_2 .LBB0_3: leaq 16(%rsp), %rdi movl $4, %esi callq hipMalloc testl %eax, %eax je .LBB0_5 # %bb.4: movl $.L.str, %edi movl $.L.str.1, %esi movl $85, %edx .LBB0_2: xorl %eax, %eax callq printf .LBB0_222: addq $4264, %rsp # imm = 0x10A8 .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .LBB0_5: .cfi_def_cfa_offset 4320 movq stderr(%rip), %rcx movl $1, %r15d movl $.L.str.2, %edi movl $23, %esi movl $1, %edx callq fwrite@PLT movl $.Lstr, %edi callq puts@PLT movl $.L.str.4, %edi xorl %eax, %eax callq printf leaq 160(%rsp), %r14 .LBB0_6: # %.preheader1377 # =>This Loop Header: Depth=1 # Child Loop BB0_7 Depth 2 movl $100, %r12d leal -1(%r15), %r13d xorl %ebp, %ebp .LBB0_7: # Parent Loop BB0_6 Depth=1 # => This Inner Loop Header: Depth=2 callq hipGetLastError cmpl $31, %r13d ja .LBB0_73 # %bb.8: # in Loop: Header=BB0_7 Depth=2 jmpq *.LJTI0_0(,%r13,8) .LBB0_9: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.10: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $1, %ecx movl $2, %r8d callq _Z30__device_stub__kicache_test4_2PjS_iii jmp .LBB0_73 .LBB0_63: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.64: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $28, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_56PjS_iii jmp .LBB0_73 .LBB0_41: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.42: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $17, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_34PjS_iii jmp .LBB0_73 .LBB0_37: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.38: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $15, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_30PjS_iii jmp .LBB0_73 .LBB0_31: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.32: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $12, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_24PjS_iii jmp .LBB0_73 .LBB0_17: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.18: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $5, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_10PjS_iii jmp .LBB0_73 .LBB0_33: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.34: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $13, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_26PjS_iii jmp .LBB0_73 .LBB0_27: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.28: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $10, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_20PjS_iii jmp .LBB0_73 .LBB0_59: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.60: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $26, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_52PjS_iii jmp .LBB0_73 .LBB0_57: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.58: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $25, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_50PjS_iii jmp .LBB0_73 .LBB0_13: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.14: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $3, %ecx movl $2, %r8d callq _Z30__device_stub__kicache_test4_6PjS_iii jmp .LBB0_73 .LBB0_39: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.40: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $16, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_32PjS_iii jmp .LBB0_73 .LBB0_15: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.16: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $4, %ecx movl $2, %r8d callq _Z30__device_stub__kicache_test4_8PjS_iii jmp .LBB0_73 .LBB0_23: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.24: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $8, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_16PjS_iii jmp .LBB0_73 .LBB0_11: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.12: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $2, %ecx movl $2, %r8d callq _Z30__device_stub__kicache_test4_4PjS_iii jmp .LBB0_73 .LBB0_71: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.72: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $32, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_64PjS_iii jmp .LBB0_73 .LBB0_43: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.44: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $18, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_36PjS_iii jmp .LBB0_73 .LBB0_49: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.50: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $21, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_42PjS_iii jmp .LBB0_73 .LBB0_19: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.20: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $6, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_12PjS_iii jmp .LBB0_73 .LBB0_51: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.52: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $22, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_44PjS_iii jmp .LBB0_73 .LBB0_35: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.36: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $14, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_28PjS_iii jmp .LBB0_73 .LBB0_21: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.22: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $7, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_14PjS_iii jmp .LBB0_73 .LBB0_45: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.46: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $19, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_38PjS_iii jmp .LBB0_73 .LBB0_29: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.30: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $11, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_22PjS_iii jmp .LBB0_73 .LBB0_25: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.26: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $9, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_18PjS_iii jmp .LBB0_73 .LBB0_69: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.70: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $31, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_62PjS_iii jmp .LBB0_73 .LBB0_53: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.54: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $23, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_46PjS_iii jmp .LBB0_73 .LBB0_47: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.48: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $20, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_40PjS_iii jmp .LBB0_73 .LBB0_55: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.56: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $24, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_48PjS_iii jmp .LBB0_73 .LBB0_65: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.66: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $29, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_58PjS_iii jmp .LBB0_73 .LBB0_67: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.68: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $30, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_60PjS_iii jmp .LBB0_73 .LBB0_61: # in Loop: Header=BB0_7 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_73 # %bb.62: # in Loop: Header=BB0_7 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $27, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_54PjS_iii .LBB0_73: # in Loop: Header=BB0_7 Depth=2 callq hipGetLastError testl %eax, %eax jne .LBB0_223 # %bb.74: # in Loop: Header=BB0_7 Depth=2 callq hipDeviceSynchronize movq 8(%rsp), %rsi movl $4096, %edx # imm = 0x1000 movq %r14, %rdi movl $2, %ecx callq hipMemcpy addl 164(%rsp), %ebp subl 160(%rsp), %ebp decl %r12d jne .LBB0_7 # %bb.75: # %.critedge # in Loop: Header=BB0_6 Depth=1 movl %ebp, %eax xorps %xmm0, %xmm0 cvtsi2sd %rax, %xmm0 divsd .LCPI0_0(%rip), %xmm0 movl %r15d, %eax shll $6, %eax xorps %xmm1, %xmm1 cvtsi2sd %eax, %xmm1 divsd %xmm1, %xmm0 movl $.L.str.6, %edi movb $1, %al callq printf movq stdout(%rip), %rdi callq fflush jmp .LBB0_76 .LBB0_223: # in Loop: Header=BB0_6 Depth=1 movl $.L.str.5, %edi xorl %eax, %eax callq printf .LBB0_76: # in Loop: Header=BB0_6 Depth=1 movl %ebp, 28(%rsp,%r15,4) incq %r15 cmpq $33, %r15 jne .LBB0_6 # %bb.77: movl $.L.str.7, %edi xorl %eax, %eax callq printf movl $1, %esi movl $1, %ebx movl $2, %ebp .LBB0_78: # =>This Inner Loop Header: Depth=1 movl 32(%rsp,%rbx,4), %eax xorl %edx, %edx divl %ebp movl %eax, %ecx movslq %esi, %rdi movl 32(%rsp,%rdi,4), %eax incl %edi xorl %edx, %edx divl %edi cmpl %eax, %ecx jbe .LBB0_80 # %bb.79: # in Loop: Header=BB0_78 Depth=1 xorps %xmm0, %xmm0 cvtsi2sd %ebx, %xmm0 mulsd .LCPI0_1(%rip), %xmm0 movl $.L.str.8, %edi movb $1, %al callq printf movl %ebx, %esi .LBB0_80: # in Loop: Header=BB0_78 Depth=1 incq %rbx incl %ebp cmpq $32, %rbx jne .LBB0_78 # %bb.81: movl $.Lstr.4, %edi callq puts@PLT movl $.L.str.10, %edi xorl %eax, %eax callq printf movl $1, %r15d leaq 160(%rsp), %r14 .LBB0_82: # %.preheader1376 # =>This Loop Header: Depth=1 # Child Loop BB0_83 Depth 2 movl $100, %r12d leal -1(%r15), %r13d xorl %ebp, %ebp .LBB0_83: # Parent Loop BB0_82 Depth=1 # => This Inner Loop Header: Depth=2 callq hipGetLastError cmpl $28, %r13d ja .LBB0_143 # %bb.84: # in Loop: Header=BB0_83 Depth=2 jmpq *.LJTI0_1(,%r13,8) .LBB0_85: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.86: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $1, %ecx movl $2, %r8d callq _Z30__device_stub__kicache_test4_8PjS_iii jmp .LBB0_143 .LBB0_139: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.140: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $28, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_224PjS_iii jmp .LBB0_143 .LBB0_117: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.118: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $17, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_136PjS_iii jmp .LBB0_143 .LBB0_113: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.114: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $15, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_120PjS_iii jmp .LBB0_143 .LBB0_107: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.108: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $12, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_96PjS_iii jmp .LBB0_143 .LBB0_93: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.94: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $5, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_40PjS_iii jmp .LBB0_143 .LBB0_109: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.110: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $13, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_104PjS_iii jmp .LBB0_143 .LBB0_103: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.104: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $10, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_80PjS_iii jmp .LBB0_143 .LBB0_135: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.136: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $26, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_208PjS_iii jmp .LBB0_143 .LBB0_133: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.134: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $25, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_200PjS_iii jmp .LBB0_143 .LBB0_89: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.90: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $3, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_24PjS_iii jmp .LBB0_143 .LBB0_115: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.116: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $16, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_128PjS_iii jmp .LBB0_143 .LBB0_91: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.92: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $4, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_32PjS_iii jmp .LBB0_143 .LBB0_99: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.100: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $8, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_64PjS_iii jmp .LBB0_143 .LBB0_87: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.88: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $2, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_16PjS_iii jmp .LBB0_143 .LBB0_119: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.120: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $18, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_144PjS_iii jmp .LBB0_143 .LBB0_125: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.126: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $21, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_168PjS_iii jmp .LBB0_143 .LBB0_95: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.96: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $6, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_48PjS_iii jmp .LBB0_143 .LBB0_127: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.128: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $22, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_176PjS_iii jmp .LBB0_143 .LBB0_111: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.112: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $14, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_112PjS_iii jmp .LBB0_143 .LBB0_97: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.98: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $7, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_56PjS_iii jmp .LBB0_143 .LBB0_121: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.122: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $19, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_152PjS_iii jmp .LBB0_143 .LBB0_105: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.106: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $11, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_88PjS_iii jmp .LBB0_143 .LBB0_101: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.102: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $9, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_72PjS_iii jmp .LBB0_143 .LBB0_129: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.130: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $23, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_184PjS_iii jmp .LBB0_143 .LBB0_123: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.124: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $20, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_160PjS_iii jmp .LBB0_143 .LBB0_131: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.132: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $24, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_192PjS_iii jmp .LBB0_143 .LBB0_141: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.142: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $29, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_232PjS_iii jmp .LBB0_143 .LBB0_137: # in Loop: Header=BB0_83 Depth=2 movabsq $4294967297, %rdi # imm = 0x100000001 movl $1, %esi movq %rdi, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_143 # %bb.138: # in Loop: Header=BB0_83 Depth=2 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl $1, %edx movl $27, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_216PjS_iii .LBB0_143: # in Loop: Header=BB0_83 Depth=2 callq hipGetLastError testl %eax, %eax jne .LBB0_224 # %bb.144: # in Loop: Header=BB0_83 Depth=2 callq hipDeviceSynchronize movq 8(%rsp), %rsi movl $4096, %edx # imm = 0x1000 movq %r14, %rdi movl $2, %ecx callq hipMemcpy addl 164(%rsp), %ebp subl 160(%rsp), %ebp decl %r12d jne .LBB0_83 # %bb.145: # %.critedge1010 # in Loop: Header=BB0_82 Depth=1 movl %ebp, %eax xorps %xmm0, %xmm0 cvtsi2sd %rax, %xmm0 divsd .LCPI0_0(%rip), %xmm0 movl %r15d, %eax shll $8, %eax xorps %xmm1, %xmm1 cvtsi2sd %eax, %xmm1 divsd %xmm1, %xmm0 movl $.L.str.11, %edi movb $1, %al callq printf movq stdout(%rip), %rdi callq fflush jmp .LBB0_146 .LBB0_224: # in Loop: Header=BB0_82 Depth=1 movl $.L.str.5, %edi xorl %eax, %eax callq printf .LBB0_146: # in Loop: Header=BB0_82 Depth=1 movl %ebp, 28(%rsp,%r15,4) incq %r15 cmpq $30, %r15 jne .LBB0_82 # %bb.147: movl $.L.str.7, %edi xorl %eax, %eax callq printf movl $1, %esi movl $1, %ebx movl $2, %ebp .LBB0_148: # =>This Inner Loop Header: Depth=1 movl 32(%rsp,%rbx,4), %eax xorl %edx, %edx divl %ebp movl %eax, %ecx movslq %esi, %rdi movl 32(%rsp,%rdi,4), %eax incl %edi xorl %edx, %edx divl %edi cmpl %eax, %ecx jbe .LBB0_150 # %bb.149: # in Loop: Header=BB0_148 Depth=1 xorps %xmm0, %xmm0 cvtsi2sd %ebx, %xmm0 addsd %xmm0, %xmm0 movl $.L.str.8, %edi movb $1, %al callq printf movl %ebx, %esi .LBB0_150: # in Loop: Header=BB0_148 Depth=1 incq %rbx incl %ebp cmpq $28, %rbx jne .LBB0_148 # %bb.151: movl $.Lstr.4, %edi callq puts@PLT movl $.Lstr.3, %edi callq puts@PLT movl $1, %ebx leaq 160(%rsp), %r15 .LBB0_152: # =>This Loop Header: Depth=1 # Child Loop BB0_153 Depth 2 # Child Loop BB0_154 Depth 3 # Child Loop BB0_217 Depth 2 movl $.L.str.13, %edi movl %ebx, %esi xorl %eax, %eax callq printf movl $1, %ebp movq %rbx, 24(%rsp) # 8-byte Spill movl %ebx, %ecx shll %cl, %ebp incl %ebp movl $1, %r12d .LBB0_153: # %.preheader # Parent Loop BB0_152 Depth=1 # => This Loop Header: Depth=2 # Child Loop BB0_154 Depth 3 xorl %r13d, %r13d movl $50, %r14d leal -1(%r12), %ebx .LBB0_154: # Parent Loop BB0_152 Depth=1 # Parent Loop BB0_153 Depth=2 # => This Inner Loop Header: Depth=3 callq hipGetLastError cmpl $27, %ebx ja .LBB0_212 # %bb.155: # in Loop: Header=BB0_154 Depth=3 jmpq *.LJTI0_2(,%rbx,8) .LBB0_156: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.157: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $1, %ecx movl $2, %r8d callq _Z30__device_stub__kicache_test4_8PjS_iii jmp .LBB0_212 .LBB0_210: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.211: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $28, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_224PjS_iii jmp .LBB0_212 .LBB0_188: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.189: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $17, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_136PjS_iii jmp .LBB0_212 .LBB0_184: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.185: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $15, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_120PjS_iii jmp .LBB0_212 .LBB0_178: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.179: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $12, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_96PjS_iii jmp .LBB0_212 .LBB0_164: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.165: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $5, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_40PjS_iii jmp .LBB0_212 .LBB0_180: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.181: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $13, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_104PjS_iii jmp .LBB0_212 .LBB0_174: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.175: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $10, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_80PjS_iii jmp .LBB0_212 .LBB0_206: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.207: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $26, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_208PjS_iii jmp .LBB0_212 .LBB0_204: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.205: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $25, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_200PjS_iii jmp .LBB0_212 .LBB0_160: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.161: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $3, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_24PjS_iii jmp .LBB0_212 .LBB0_186: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.187: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $16, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_128PjS_iii jmp .LBB0_212 .LBB0_162: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.163: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $4, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_32PjS_iii jmp .LBB0_212 .LBB0_170: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.171: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $8, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_64PjS_iii jmp .LBB0_212 .LBB0_158: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.159: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $2, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_16PjS_iii jmp .LBB0_212 .LBB0_190: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.191: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $18, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_144PjS_iii jmp .LBB0_212 .LBB0_196: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.197: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $21, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_168PjS_iii jmp .LBB0_212 .LBB0_166: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.167: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $6, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_48PjS_iii jmp .LBB0_212 .LBB0_198: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.199: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $22, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_176PjS_iii jmp .LBB0_212 .LBB0_182: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.183: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $14, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_112PjS_iii jmp .LBB0_212 .LBB0_168: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.169: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $7, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_56PjS_iii jmp .LBB0_212 .LBB0_192: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.193: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $19, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_152PjS_iii jmp .LBB0_212 .LBB0_176: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.177: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $11, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_88PjS_iii jmp .LBB0_212 .LBB0_172: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.173: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $9, %ecx movl $2, %r8d callq _Z31__device_stub__kicache_test4_72PjS_iii jmp .LBB0_212 .LBB0_200: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.201: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $23, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_184PjS_iii jmp .LBB0_212 .LBB0_194: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.195: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $20, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_160PjS_iii jmp .LBB0_212 .LBB0_202: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.203: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $24, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_192PjS_iii jmp .LBB0_212 .LBB0_208: # in Loop: Header=BB0_154 Depth=3 movabsq $4294967297, %rdx # imm = 0x100000001 leaq 30(%rdx), %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB0_212 # %bb.209: # in Loop: Header=BB0_154 Depth=3 movq 8(%rsp), %rdi movq 16(%rsp), %rsi movl %ebp, %edx movl $27, %ecx movl $2, %r8d callq _Z32__device_stub__kicache_test4_216PjS_iii .LBB0_212: # in Loop: Header=BB0_154 Depth=3 callq hipGetLastError testl %eax, %eax jne .LBB0_225 # %bb.213: # in Loop: Header=BB0_154 Depth=3 callq hipDeviceSynchronize movq 8(%rsp), %rsi movl $4096, %edx # imm = 0x1000 movq %r15, %rdi movl $2, %ecx callq hipMemcpy addl 164(%rsp), %r13d subl 160(%rsp), %r13d decl %r14d jne .LBB0_154 # %bb.214: # %.critedge1012 # in Loop: Header=BB0_153 Depth=2 movl %r13d, %eax xorps %xmm0, %xmm0 cvtsi2sd %rax, %xmm0 divsd .LCPI0_2(%rip), %xmm0 movl %r12d, %eax shll $8, %eax xorps %xmm1, %xmm1 cvtsi2sd %eax, %xmm1 divsd %xmm1, %xmm0 movl $.L.str.11, %edi movb $1, %al callq printf movq stdout(%rip), %rdi callq fflush jmp .LBB0_215 .LBB0_225: # in Loop: Header=BB0_153 Depth=2 movl $.L.str.5, %edi xorl %eax, %eax callq printf .LBB0_215: # in Loop: Header=BB0_153 Depth=2 movl %r13d, 28(%rsp,%r12,4) incq %r12 cmpq $29, %r12 jne .LBB0_153 # %bb.216: # in Loop: Header=BB0_152 Depth=1 movl $.L.str.14, %edi xorl %eax, %eax callq printf movl $1, %ecx movl $1, %ebx movl $2, %ebp .LBB0_217: # Parent Loop BB0_152 Depth=1 # => This Inner Loop Header: Depth=2 movl 32(%rsp,%rbx,4), %eax xorl %edx, %edx divl %ebp # kill: def $eax killed $eax def $rax xorps %xmm0, %xmm0 cvtsi2sd %rax, %xmm0 movslq %ecx, %rsi movl 32(%rsp,%rsi,4), %eax incl %esi xorl %edx, %edx divl %esi # kill: def $eax killed $eax def $rax xorps %xmm1, %xmm1 cvtsi2sd %rax, %xmm1 mulsd .LCPI0_3(%rip), %xmm1 ucomisd %xmm1, %xmm0 jbe .LBB0_219 # %bb.218: # in Loop: Header=BB0_217 Depth=2 xorps %xmm0, %xmm0 cvtsi2sd %ebx, %xmm0 addsd %xmm0, %xmm0 movl $.L.str.8, %edi movb $1, %al callq printf movl %ebx, %ecx .LBB0_219: # in Loop: Header=BB0_217 Depth=2 incq %rbx incl %ebp cmpq $32, %rbx jne .LBB0_217 # %bb.220: # in Loop: Header=BB0_152 Depth=1 movl $.Lstr.4, %edi callq puts@PLT xorl %eax, %eax movq 24(%rsp), %rbx # 8-byte Reload cmpl $1, %ebx sete %al negl %eax addl %eax, %ebx addl $10, %ebx cmpl $31, %ebx jb .LBB0_152 # %bb.221: movl $10, %edi callq putchar@PLT movq 8(%rsp), %rdi callq hipFree movq 16(%rsp), %rdi callq hipFree jmp .LBB0_222 .Lfunc_end0: .size _Z14measure_icachev, .Lfunc_end0-_Z14measure_icachev .cfi_endproc .section .rodata,"a",@progbits .p2align 3, 0x0 .LJTI0_0: .quad .LBB0_9 .quad .LBB0_11 .quad .LBB0_13 .quad .LBB0_15 .quad .LBB0_17 .quad .LBB0_19 .quad .LBB0_21 .quad .LBB0_23 .quad .LBB0_25 .quad .LBB0_27 .quad .LBB0_29 .quad .LBB0_31 .quad .LBB0_33 .quad .LBB0_35 .quad .LBB0_37 .quad .LBB0_39 .quad .LBB0_41 .quad .LBB0_43 .quad .LBB0_45 .quad .LBB0_47 .quad .LBB0_49 .quad .LBB0_51 .quad .LBB0_53 .quad .LBB0_55 .quad .LBB0_57 .quad .LBB0_59 .quad .LBB0_61 .quad .LBB0_63 .quad .LBB0_65 .quad .LBB0_67 .quad .LBB0_69 .quad .LBB0_71 .LJTI0_1: .quad .LBB0_85 .quad .LBB0_87 .quad .LBB0_89 .quad .LBB0_91 .quad .LBB0_93 .quad .LBB0_95 .quad .LBB0_97 .quad .LBB0_99 .quad .LBB0_101 .quad .LBB0_103 .quad .LBB0_105 .quad .LBB0_107 .quad .LBB0_109 .quad .LBB0_111 .quad .LBB0_113 .quad .LBB0_115 .quad .LBB0_117 .quad .LBB0_119 .quad .LBB0_121 .quad .LBB0_123 .quad .LBB0_125 .quad .LBB0_127 .quad .LBB0_129 .quad .LBB0_131 .quad .LBB0_133 .quad .LBB0_135 .quad .LBB0_137 .quad .LBB0_139 .quad .LBB0_141 .LJTI0_2: .quad .LBB0_156 .quad .LBB0_158 .quad .LBB0_160 .quad .LBB0_162 .quad .LBB0_164 .quad .LBB0_166 .quad .LBB0_168 .quad .LBB0_170 .quad .LBB0_172 .quad .LBB0_174 .quad .LBB0_176 .quad .LBB0_178 .quad .LBB0_180 .quad .LBB0_182 .quad .LBB0_184 .quad .LBB0_186 .quad .LBB0_188 .quad .LBB0_190 .quad .LBB0_192 .quad .LBB0_194 .quad .LBB0_196 .quad .LBB0_198 .quad .LBB0_200 .quad .LBB0_202 .quad .LBB0_204 .quad .LBB0_206 .quad .LBB0_208 .quad .LBB0_210 # -- End function .text .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 callq _Z14measure_icachev xorl %eax, %eax popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "hipMalloc failed %s:%d\n" .size .L.str, 24 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/mirsoleimani/SAMMicrobenchmark/master/cudabmk/icache.hip" .size .L.str.1, 119 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "Running icache test...\n" .size .L.str.2, 24 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz " 0.5 KB steps: " .size .L.str.4, 17 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "xxxx " .size .L.str.5, 6 .type .L.str.6,@object # @.str.6 .L.str.6: .asciz "%.5f " .size .L.str.6, 6 .type .L.str.7,@object # @.str.7 .L.str.7: .asciz " (icache = " .size .L.str.7, 12 .type .L.str.8,@object # @.str.8 .L.str.8: .asciz "%.1fKB " .size .L.str.8, 8 .type .L.str.10,@object # @.str.10 .L.str.10: .asciz " 2 KB steps: " .size .L.str.10, 15 .type .L.str.11,@object # @.str.11 .L.str.11: .asciz "%.1f " .size .L.str.11, 6 .type .L.str.13,@object # @.str.13 .L.str.13: .asciz " TPC 0,%d (2 KB steps): " .size .L.str.13, 26 .type .L.str.14,@object # @.str.14 .L.str.14: .asciz " (apparent icache = " .size .L.str.14, 21 .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "Instruction cache size:" .size .Lstr, 24 .type .Lstr.3,@object # @str.3 .Lstr.3: .asciz "\n Test instruction cache sharing by running two thread blocks concurently." .size .Lstr.3, 75 .type .Lstr.4,@object # @str.4 .Lstr.4: .asciz ")" .size .Lstr.4, 2 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
408e836993f14ccabeeb187bb64923a48726df3f
#include "includes.h" __device__ size_t GIDX(size_t row, size_t col, int H, int W) { return row * W + col; } __global__ void kernel_blur(float* d_I, float* d_Ib, int H, int W) { size_t row = threadIdx.y + blockDim.y * blockIdx.y; size_t col = threadIdx.x + blockDim.x * blockIdx.x; size_t idx = GIDX(row, col, H, W); if (row >= H - KERN_RADIUS || row <= KERN_RADIUS || col >= W - KERN_RADIUS || col <= KERN_RADIUS) { return; } int count = 0; for (int i = -KERN_RADIUS; i <= KERN_RADIUS; i++) { for (int j = -KERN_RADIUS; j <= KERN_RADIUS; j++) { d_Ib[idx] += d_I[GIDX(row + i, col + j, H, W)] * gaussian_kernel[count]; count++; } } }
.file "tmpxft_002b4a2e_00000000-6_kernel_blur.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2011: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2011: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z4GIDXmmii .type _Z4GIDXmmii, @function _Z4GIDXmmii: .LFB2008: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2008: .size _Z4GIDXmmii, .-_Z4GIDXmmii .globl _Z35__device_stub__Z11kernel_blurPfS_iiPfS_ii .type _Z35__device_stub__Z11kernel_blurPfS_iiPfS_ii, @function _Z35__device_stub__Z11kernel_blurPfS_iiPfS_ii: .LFB2033: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movl %edx, 12(%rsp) leaq 40(%rsp), %rdx movl %ecx, 8(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 12(%rsp), %rax movq %rax, 120(%rsp) leaq 8(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L4 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z11kernel_blurPfS_ii(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L4: movq 136(%rsp), %rax subq %fs:40, %rax je .L6 call __stack_chk_fail@PLT .L6: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2033: .size _Z35__device_stub__Z11kernel_blurPfS_iiPfS_ii, .-_Z35__device_stub__Z11kernel_blurPfS_iiPfS_ii .globl _Z11kernel_blurPfS_ii .type _Z11kernel_blurPfS_ii, @function _Z11kernel_blurPfS_ii: .LFB2034: .cfi_startproc endbr64 jmp _Z35__device_stub__Z11kernel_blurPfS_iiPfS_ii .cfi_endproc .LFE2034: .size _Z11kernel_blurPfS_ii, .-_Z11kernel_blurPfS_ii .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z11kernel_blurPfS_ii" .LC1: .string "gaussian_kernel" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2036: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z11kernel_blurPfS_ii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r8d, %r8d pushq $0 .cfi_def_cfa_offset 24 leaq .LC1(%rip), %rdx movl $100, %r9d leaq _ZL15gaussian_kernel(%rip), %rsi pushq $1 .cfi_def_cfa_offset 32 movq %rdx, %rcx call __cudaRegisterVar@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi popq %rax .cfi_def_cfa_offset 24 popq %rdx .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2036: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .local _ZL15gaussian_kernel .comm _ZL15gaussian_kernel,100,32 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z11kernel_blurPfS_ii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */ /* 0x000e220000002600 */ /*0020*/ ULDC UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */ /* 0x000fe20000000800 */ /*0030*/ MOV R4, c[0x0][0x174] ; /* 0x00005d0000047a02 */ /* 0x000fe20000000f00 */ /*0040*/ UIADD3 UR4, UR4, -0x5, URZ ; /* 0xfffffffb04047890 */ /* 0x000fe2000fffe03f */ /*0050*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */ /* 0x000e240000002200 */ /*0060*/ IADD3 R5, R4, -0x5, RZ ; /* 0xfffffffb04057810 */ /* 0x000fe20007ffe0ff */ /*0070*/ USHF.R.S32.HI UR5, URZ, 0x1f, UR4 ; /* 0x0000001f3f057899 */ /* 0x000fe20008011404 */ /*0080*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e680000002500 */ /*0090*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e620000002100 */ /*00a0*/ IMAD R9, R9, c[0x0][0x4], R0 ; /* 0x0000010009097a24 */ /* 0x001fca00078e0200 */ /*00b0*/ ISETP.GE.U32.AND P1, PT, R9, UR4, PT ; /* 0x0000000409007c0c */ /* 0x000fe2000bf26070 */ /*00c0*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */ /* 0x002fc600078e0203 */ /*00d0*/ ISETP.GE.U32.AND.EX P1, PT, RZ, UR5, PT, P1 ; /* 0x00000005ff007c0c */ /* 0x000fe4000bf26110 */ /*00e0*/ ISETP.GE.U32.AND P0, PT, R2, R5, PT ; /* 0x000000050200720c */ /* 0x000fe40003f06070 */ /*00f0*/ SHF.R.S32.HI R5, RZ, 0x1f, R5 ; /* 0x0000001fff057819 */ /* 0x000fe40000011405 */ /*0100*/ ISETP.LT.U32.OR P1, PT, R9, 0x6, P1 ; /* 0x000000060900780c */ /* 0x000fc80000f21470 */ /*0110*/ ISETP.GE.U32.OR.EX P0, PT, RZ, R5, P1, P0 ; /* 0x00000005ff00720c */ /* 0x000fc80000f06500 */ /*0120*/ ISETP.LT.U32.OR P0, PT, R2, 0x6, P0 ; /* 0x000000060200780c */ /* 0x000fda0000701470 */ /*0130*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0140*/ IADD3 R5, P0, R9, -0x5, RZ ; /* 0xfffffffb09057810 */ /* 0x000fe20007f1e0ff */ /*0150*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0160*/ SHF.R.S32.HI R0, RZ, 0x1f, R4 ; /* 0x0000001fff007819 */ /* 0x000fe40000011404 */ /*0170*/ IADD3.X R6, RZ, -0x1, RZ, P0, !PT ; /* 0xffffffffff067810 */ /* 0x000fe400007fe4ff */ /*0180*/ MOV R3, RZ ; /* 0x000000ff00037202 */ /* 0x000fe20000000f00 */ /*0190*/ IMAD R7, R0, R9, RZ ; /* 0x0000000900077224 */ /* 0x000fe400078e02ff */ /*01a0*/ IMAD R6, R6, c[0x0][0x174], RZ ; /* 0x00005d0006067a24 */ /* 0x000fe400078e02ff */ /*01b0*/ IMAD.WIDE.U32 R10, R5, c[0x0][0x174], R2 ; /* 0x00005d00050a7a25 */ /* 0x000fc800078e0002 */ /*01c0*/ IMAD.WIDE.U32 R8, R9, c[0x0][0x174], R2 ; /* 0x00005d0009087a25 */ /* 0x000fc800078e0002 */ /*01d0*/ IMAD R5, R0, R5, R6 ; /* 0x0000000500057224 */ /* 0x000fe200078e0206 */ /*01e0*/ IADD3 R3, R9, R7, RZ ; /* 0x0000000709037210 */ /* 0x000fe40007ffe0ff */ /*01f0*/ LEA R2, P0, R8, c[0x0][0x168], 0x2 ; /* 0x00005a0008027a11 */ /* 0x000fe400078010ff */ /*0200*/ LEA R6, P1, R10, c[0x0][0x160], 0x2 ; /* 0x000058000a067a11 */ /* 0x000fe400078210ff */ /*0210*/ IADD3 R5, R11, R5, RZ ; /* 0x000000050b057210 */ /* 0x000fe40007ffe0ff */ /*0220*/ LEA.HI.X R3, R8, c[0x0][0x16c], R3, 0x2, P0 ; /* 0x00005b0008037a11 */ /* 0x000fe400000f1403 */ /*0230*/ LEA.HI.X R7, R10, c[0x0][0x164], R5, 0x2, P1 ; /* 0x000059000a077a11 */ /* 0x000fc600008f1405 */ /*0240*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea8000c1e1900 */ /*0250*/ LDG.E R5, [R6.64+-0x14] ; /* 0xffffec0406057981 */ /* 0x000ea4000c1e1900 */ /*0260*/ FFMA R5, R5, c[0x3][0x0], R0 ; /* 0x00c0000005057a23 */ /* 0x004fca0000000000 */ /*0270*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0280*/ LDG.E R0, [R6.64+-0x10] ; /* 0xfffff00406007981 */ /* 0x000ea4000c1e1900 */ /*0290*/ FFMA R9, R0, c[0x3][0x4], R5 ; /* 0x00c0010000097a23 */ /* 0x004fca0000000005 */ /*02a0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0003e8000c101904 */ /*02b0*/ LDG.E R0, [R6.64+-0xc] ; /* 0xfffff40406007981 */ /* 0x000ea4000c1e1900 */ /*02c0*/ FFMA R11, R0, c[0x3][0x8], R9 ; /* 0x00c00200000b7a23 */ /* 0x004fca0000000009 */ /*02d0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*02e0*/ LDG.E R0, [R6.64+-0x8] ; /* 0xfffff80406007981 */ /* 0x000ee4000c1e1900 */ /*02f0*/ FFMA R13, R0, c[0x3][0xc], R11 ; /* 0x00c00300000d7a23 */ /* 0x008fca000000000b */ /*0300*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0007e8000c101904 */ /*0310*/ LDG.E R0, [R6.64+-0x4] ; /* 0xfffffc0406007981 */ /* 0x000e24000c1e1900 */ /*0320*/ FFMA R5, R0, c[0x3][0x10], R13 ; /* 0x00c0040000057a23 */ /* 0x001fca000000000d */ /*0330*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0340*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */ /* 0x000e64000c1e1900 */ /*0350*/ FFMA R9, R0, c[0x3][0x14], R5 ; /* 0x00c0050000097a23 */ /* 0x002fca0000000005 */ /*0360*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0003e8000c101904 */ /*0370*/ LDG.E R0, [R6.64+0x4] ; /* 0x0000040406007981 */ /* 0x000ea4000c1e1900 */ /*0380*/ FFMA R11, R0, c[0x3][0x18], R9 ; /* 0x00c00600000b7a23 */ /* 0x004fca0000000009 */ /*0390*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*03a0*/ LDG.E R0, [R6.64+0x8] ; /* 0x0000080406007981 */ /* 0x000ee4000c1e1900 */ /*03b0*/ FFMA R13, R0, c[0x3][0x1c], R11 ; /* 0x00c00700000d7a23 */ /* 0x008fca000000000b */ /*03c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0007e8000c101904 */ /*03d0*/ LDG.E R0, [R6.64+0xc] ; /* 0x00000c0406007981 */ /* 0x000e24000c1e1900 */ /*03e0*/ FFMA R5, R0, c[0x3][0x20], R13 ; /* 0x00c0080000057a23 */ /* 0x001fca000000000d */ /*03f0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0400*/ LDG.E R0, [R6.64+0x10] ; /* 0x0000100406007981 */ /* 0x000f24000c1e1900 */ /*0410*/ FFMA R15, R0, c[0x3][0x24], R5 ; /* 0x00c00900000f7a23 */ /* 0x010fca0000000005 */ /*0420*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*0430*/ LDG.E R0, [R6.64+0x14] ; /* 0x0000140406007981 */ /* 0x000ea2000c1e1900 */ /*0440*/ IMAD.WIDE R8, R4, 0x4, R6 ; /* 0x0000000404087825 */ /* 0x002fe200078e0206 */ /*0450*/ FFMA R11, R0, c[0x3][0x28], R15 ; /* 0x00c00a00000b7a23 */ /* 0x004fca000000000f */ /*0460*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0470*/ LDG.E R0, [R8.64+-0x14] ; /* 0xffffec0408007981 */ /* 0x000ee4000c1e1900 */ /*0480*/ FFMA R13, R0, c[0x3][0x2c], R11 ; /* 0x00c00b00000d7a23 */ /* 0x008fca000000000b */ /*0490*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*04a0*/ LDG.E R0, [R8.64+-0x10] ; /* 0xfffff00408007981 */ /* 0x000e24000c1e1900 */ /*04b0*/ FFMA R5, R0, c[0x3][0x30], R13 ; /* 0x00c00c0000057a23 */ /* 0x001fca000000000d */ /*04c0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*04d0*/ LDG.E R0, [R8.64+-0xc] ; /* 0xfffff40408007981 */ /* 0x000ee4000c1e1900 */ /*04e0*/ FFMA R7, R0, c[0x3][0x34], R5 ; /* 0x00c00d0000077a23 */ /* 0x008fca0000000005 */ /*04f0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0007e8000c101904 */ /*0500*/ LDG.E R0, [R8.64+-0x8] ; /* 0xfffff80408007981 */ /* 0x000e64000c1e1900 */ /*0510*/ FFMA R11, R0, c[0x3][0x38], R7 ; /* 0x00c00e00000b7a23 */ /* 0x002fca0000000007 */ /*0520*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0530*/ LDG.E R0, [R8.64+-0x4] ; /* 0xfffffc0408007981 */ /* 0x000ea4000c1e1900 */ /*0540*/ FFMA R13, R0, c[0x3][0x3c], R11 ; /* 0x00c00f00000d7a23 */ /* 0x004fca000000000b */ /*0550*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*0560*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000e24000c1e1900 */ /*0570*/ FFMA R5, R0, c[0x3][0x40], R13 ; /* 0x00c0100000057a23 */ /* 0x001fca000000000d */ /*0580*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0590*/ LDG.E R0, [R8.64+0x4] ; /* 0x0000040408007981 */ /* 0x000ee4000c1e1900 */ /*05a0*/ FFMA R7, R0, c[0x3][0x44], R5 ; /* 0x00c0110000077a23 */ /* 0x008fca0000000005 */ /*05b0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0007e8000c101904 */ /*05c0*/ LDG.E R0, [R8.64+0x8] ; /* 0x0000080408007981 */ /* 0x000e64000c1e1900 */ /*05d0*/ FFMA R11, R0, c[0x3][0x48], R7 ; /* 0x00c01200000b7a23 */ /* 0x002fca0000000007 */ /*05e0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*05f0*/ LDG.E R0, [R8.64+0xc] ; /* 0x00000c0408007981 */ /* 0x000ea4000c1e1900 */ /*0600*/ FFMA R13, R0, c[0x3][0x4c], R11 ; /* 0x00c01300000d7a23 */ /* 0x004fca000000000b */ /*0610*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*0620*/ LDG.E R0, [R8.64+0x10] ; /* 0x0000100408007981 */ /* 0x000e24000c1e1900 */ /*0630*/ FFMA R5, R0, c[0x3][0x50], R13 ; /* 0x00c0140000057a23 */ /* 0x001fca000000000d */ /*0640*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0650*/ LDG.E R0, [R8.64+0x14] ; /* 0x0000140408007981 */ /* 0x000f22000c1e1900 */ /*0660*/ IMAD.WIDE R6, R4, 0x4, R8 ; /* 0x0000000404067825 */ /* 0x008fe200078e0208 */ /*0670*/ FFMA R15, R0, c[0x3][0x54], R5 ; /* 0x00c01500000f7a23 */ /* 0x010fca0000000005 */ /*0680*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*0690*/ LDG.E R0, [R6.64+-0x14] ; /* 0xffffec0406007981 */ /* 0x000e64000c1e1900 */ /*06a0*/ FFMA R11, R0, c[0x3][0x58], R15 ; /* 0x00c01600000b7a23 */ /* 0x002fca000000000f */ /*06b0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*06c0*/ LDG.E R0, [R6.64+-0x10] ; /* 0xfffff00406007981 */ /* 0x000ea4000c1e1900 */ /*06d0*/ FFMA R13, R0, c[0x3][0x5c], R11 ; /* 0x00c01700000d7a23 */ /* 0x004fca000000000b */ /*06e0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*06f0*/ LDG.E R0, [R6.64+-0xc] ; /* 0xfffff40406007981 */ /* 0x000e24000c1e1900 */ /*0700*/ FFMA R5, R0, c[0x3][0x60], R13 ; /* 0x00c0180000057a23 */ /* 0x001fca000000000d */ /*0710*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0720*/ LDG.E R0, [R6.64+-0x8] ; /* 0xfffff80406007981 */ /* 0x000ee4000c1e1900 */ /*0730*/ FFMA R9, R0, c[0x3][0x64], R5 ; /* 0x00c0190000097a23 */ /* 0x008fca0000000005 */ /*0740*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x000fe8000c101904 */ /*0750*/ LDG.E R0, [R6.64+-0x4] ; /* 0xfffffc0406007981 */ /* 0x000e64000c1e1900 */ /*0760*/ FFMA R11, R0, c[0x3][0x68], R9 ; /* 0x00c01a00000b7a23 */ /* 0x002fca0000000009 */ /*0770*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0780*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */ /* 0x000ea4000c1e1900 */ /*0790*/ FFMA R13, R0, c[0x3][0x6c], R11 ; /* 0x00c01b00000d7a23 */ /* 0x004fca000000000b */ /*07a0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*07b0*/ LDG.E R0, [R6.64+0x4] ; /* 0x0000040406007981 */ /* 0x000e24000c1e1900 */ /*07c0*/ FFMA R5, R0, c[0x3][0x70], R13 ; /* 0x00c01c0000057a23 */ /* 0x001fca000000000d */ /*07d0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*07e0*/ LDG.E R0, [R6.64+0x8] ; /* 0x0000080406007981 */ /* 0x000ee4000c1e1900 */ /*07f0*/ FFMA R15, R0, c[0x3][0x74], R5 ; /* 0x00c01d00000f7a23 */ /* 0x008fca0000000005 */ /*0800*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x0007e8000c101904 */ /*0810*/ LDG.E R0, [R6.64+0xc] ; /* 0x00000c0406007981 */ /* 0x000e64000c1e1900 */ /*0820*/ FFMA R11, R0, c[0x3][0x78], R15 ; /* 0x00c01e00000b7a23 */ /* 0x002fca000000000f */ /*0830*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0840*/ LDG.E R0, [R6.64+0x10] ; /* 0x0000100406007981 */ /* 0x000ea4000c1e1900 */ /*0850*/ FFMA R13, R0, c[0x3][0x7c], R11 ; /* 0x00c01f00000d7a23 */ /* 0x004fca000000000b */ /*0860*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x000fe8000c101904 */ /*0870*/ LDG.E R0, [R6.64+0x14] ; /* 0x0000140406007981 */ /* 0x000e22000c1e1900 */ /*0880*/ IMAD.WIDE R8, R4, 0x4, R6 ; /* 0x0000000404087825 */ /* 0x000fe200078e0206 */ /*0890*/ FFMA R5, R0, c[0x3][0x80], R13 ; /* 0x00c0200000057a23 */ /* 0x001fca000000000d */ /*08a0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*08b0*/ LDG.E R0, [R8.64+-0x14] ; /* 0xffffec0408007981 */ /* 0x000ee4000c1e1900 */ /*08c0*/ FFMA R15, R0, c[0x3][0x84], R5 ; /* 0x00c02100000f7a23 */ /* 0x008fca0000000005 */ /*08d0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*08e0*/ LDG.E R0, [R8.64+-0x10] ; /* 0xfffff00408007981 */ /* 0x000e64000c1e1900 */ /*08f0*/ FFMA R11, R0, c[0x3][0x88], R15 ; /* 0x00c02200000b7a23 */ /* 0x002fca000000000f */ /*0900*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0910*/ LDG.E R0, [R8.64+-0xc] ; /* 0xfffff40408007981 */ /* 0x000ea4000c1e1900 */ /*0920*/ FFMA R7, R0, c[0x3][0x8c], R11 ; /* 0x00c0230000077a23 */ /* 0x004fca000000000b */ /*0930*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0005e8000c101904 */ /*0940*/ LDG.E R0, [R8.64+-0x8] ; /* 0xfffff80408007981 */ /* 0x000e24000c1e1900 */ /*0950*/ FFMA R5, R0, c[0x3][0x90], R7 ; /* 0x00c0240000057a23 */ /* 0x001fca0000000007 */ /*0960*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0970*/ LDG.E R0, [R8.64+-0x4] ; /* 0xfffffc0408007981 */ /* 0x000ee4000c1e1900 */ /*0980*/ FFMA R13, R0, c[0x3][0x94], R5 ; /* 0x00c02500000d7a23 */ /* 0x008fca0000000005 */ /*0990*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0007e8000c101904 */ /*09a0*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000e64000c1e1900 */ /*09b0*/ FFMA R11, R0, c[0x3][0x98], R13 ; /* 0x00c02600000b7a23 */ /* 0x002fca000000000d */ /*09c0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*09d0*/ LDG.E R0, [R8.64+0x4] ; /* 0x0000040408007981 */ /* 0x000ea4000c1e1900 */ /*09e0*/ FFMA R7, R0, c[0x3][0x9c], R11 ; /* 0x00c0270000077a23 */ /* 0x004fca000000000b */ /*09f0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0005e8000c101904 */ /*0a00*/ LDG.E R0, [R8.64+0x8] ; /* 0x0000080408007981 */ /* 0x000e24000c1e1900 */ /*0a10*/ FFMA R5, R0, c[0x3][0xa0], R7 ; /* 0x00c0280000057a23 */ /* 0x001fca0000000007 */ /*0a20*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0a30*/ LDG.E R0, [R8.64+0xc] ; /* 0x00000c0408007981 */ /* 0x000ee4000c1e1900 */ /*0a40*/ FFMA R13, R0, c[0x3][0xa4], R5 ; /* 0x00c02900000d7a23 */ /* 0x008fca0000000005 */ /*0a50*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0007e8000c101904 */ /*0a60*/ LDG.E R0, [R8.64+0x10] ; /* 0x0000100408007981 */ /* 0x000e64000c1e1900 */ /*0a70*/ FFMA R11, R0, c[0x3][0xa8], R13 ; /* 0x00c02a00000b7a23 */ /* 0x002fca000000000d */ /*0a80*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0a90*/ LDG.E R0, [R8.64+0x14] ; /* 0x0000140408007981 */ /* 0x000f22000c1e1900 */ /*0aa0*/ IMAD.WIDE R6, R4, 0x4, R8 ; /* 0x0000000404067825 */ /* 0x004fe200078e0208 */ /*0ab0*/ FFMA R15, R0, c[0x3][0xac], R11 ; /* 0x00c02b00000f7a23 */ /* 0x010fca000000000b */ /*0ac0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*0ad0*/ LDG.E R0, [R6.64+-0x14] ; /* 0xffffec0406007981 */ /* 0x000e24000c1e1900 */ /*0ae0*/ FFMA R5, R0, c[0x3][0xb0], R15 ; /* 0x00c02c0000057a23 */ /* 0x001fca000000000f */ /*0af0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0b00*/ LDG.E R0, [R6.64+-0x10] ; /* 0xfffff00406007981 */ /* 0x000ee4000c1e1900 */ /*0b10*/ FFMA R13, R0, c[0x3][0xb4], R5 ; /* 0x00c02d00000d7a23 */ /* 0x008fca0000000005 */ /*0b20*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*0b30*/ LDG.E R0, [R6.64+-0xc] ; /* 0xfffff40406007981 */ /* 0x000ee4000c1e1900 */ /*0b40*/ FFMA R9, R0, c[0x3][0xb8], R13 ; /* 0x00c02e0000097a23 */ /* 0x008fca000000000d */ /*0b50*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0007e8000c101904 */ /*0b60*/ LDG.E R0, [R6.64+-0x8] ; /* 0xfffff80406007981 */ /* 0x000e64000c1e1900 */ /*0b70*/ FFMA R11, R0, c[0x3][0xbc], R9 ; /* 0x00c02f00000b7a23 */ /* 0x002fca0000000009 */ /*0b80*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0b90*/ LDG.E R0, [R6.64+-0x4] ; /* 0xfffffc0406007981 */ /* 0x000e24000c1e1900 */ /*0ba0*/ FFMA R5, R0, c[0x3][0xc0], R11 ; /* 0x00c0300000057a23 */ /* 0x001fca000000000b */ /*0bb0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0bc0*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */ /* 0x000ea4000c1e1900 */ /*0bd0*/ FFMA R13, R0, c[0x3][0xc4], R5 ; /* 0x00c03100000d7a23 */ /* 0x004fca0000000005 */ /*0be0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*0bf0*/ LDG.E R0, [R6.64+0x4] ; /* 0x0000040406007981 */ /* 0x000ee4000c1e1900 */ /*0c00*/ FFMA R9, R0, c[0x3][0xc8], R13 ; /* 0x00c0320000097a23 */ /* 0x008fca000000000d */ /*0c10*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0007e8000c101904 */ /*0c20*/ LDG.E R0, [R6.64+0x8] ; /* 0x0000080406007981 */ /* 0x000e64000c1e1900 */ /*0c30*/ FFMA R11, R0, c[0x3][0xcc], R9 ; /* 0x00c03300000b7a23 */ /* 0x002fca0000000009 */ /*0c40*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0c50*/ LDG.E R0, [R6.64+0xc] ; /* 0x00000c0406007981 */ /* 0x000e24000c1e1900 */ /*0c60*/ FFMA R5, R0, c[0x3][0xd0], R11 ; /* 0x00c0340000057a23 */ /* 0x001fca000000000b */ /*0c70*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0c80*/ LDG.E R0, [R6.64+0x10] ; /* 0x0000100406007981 */ /* 0x000ea4000c1e1900 */ /*0c90*/ FFMA R13, R0, c[0x3][0xd4], R5 ; /* 0x00c03500000d7a23 */ /* 0x004fca0000000005 */ /*0ca0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*0cb0*/ LDG.E R0, [R6.64+0x14] ; /* 0x0000140406007981 */ /* 0x000f22000c1e1900 */ /*0cc0*/ IMAD.WIDE R8, R4, 0x4, R6 ; /* 0x0000000404087825 */ /* 0x008fe200078e0206 */ /*0cd0*/ FFMA R15, R0, c[0x3][0xd8], R13 ; /* 0x00c03600000f7a23 */ /* 0x010fca000000000d */ /*0ce0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*0cf0*/ LDG.E R0, [R8.64+-0x14] ; /* 0xffffec0408007981 */ /* 0x000e64000c1e1900 */ /*0d00*/ FFMA R11, R0, c[0x3][0xdc], R15 ; /* 0x00c03700000b7a23 */ /* 0x002fca000000000f */ /*0d10*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0d20*/ LDG.E R0, [R8.64+-0x10] ; /* 0xfffff00408007981 */ /* 0x000e24000c1e1900 */ /*0d30*/ FFMA R5, R0, c[0x3][0xe0], R11 ; /* 0x00c0380000057a23 */ /* 0x001fca000000000b */ /*0d40*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0d50*/ LDG.E R0, [R8.64+-0xc] ; /* 0xfffff40408007981 */ /* 0x000ee4000c1e1900 */ /*0d60*/ FFMA R7, R0, c[0x3][0xe4], R5 ; /* 0x00c0390000077a23 */ /* 0x008fca0000000005 */ /*0d70*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0007e8000c101904 */ /*0d80*/ LDG.E R0, [R8.64+-0x8] ; /* 0xfffff80408007981 */ /* 0x000ea4000c1e1900 */ /*0d90*/ FFMA R13, R0, c[0x3][0xe8], R7 ; /* 0x00c03a00000d7a23 */ /* 0x004fca0000000007 */ /*0da0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*0db0*/ LDG.E R0, [R8.64+-0x4] ; /* 0xfffffc0408007981 */ /* 0x000e64000c1e1900 */ /*0dc0*/ FFMA R11, R0, c[0x3][0xec], R13 ; /* 0x00c03b00000b7a23 */ /* 0x002fca000000000d */ /*0dd0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0de0*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000e24000c1e1900 */ /*0df0*/ FFMA R5, R0, c[0x3][0xf0], R11 ; /* 0x00c03c0000057a23 */ /* 0x001fca000000000b */ /*0e00*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0e10*/ LDG.E R0, [R8.64+0x4] ; /* 0x0000040408007981 */ /* 0x000ee4000c1e1900 */ /*0e20*/ FFMA R7, R0, c[0x3][0xf4], R5 ; /* 0x00c03d0000077a23 */ /* 0x008fca0000000005 */ /*0e30*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0007e8000c101904 */ /*0e40*/ LDG.E R0, [R8.64+0x8] ; /* 0x0000080408007981 */ /* 0x000ea4000c1e1900 */ /*0e50*/ FFMA R13, R0, c[0x3][0xf8], R7 ; /* 0x00c03e00000d7a23 */ /* 0x004fca0000000007 */ /*0e60*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*0e70*/ LDG.E R0, [R8.64+0xc] ; /* 0x00000c0408007981 */ /* 0x000e64000c1e1900 */ /*0e80*/ FFMA R11, R0, c[0x3][0xfc], R13 ; /* 0x00c03f00000b7a23 */ /* 0x002fca000000000d */ /*0e90*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0ea0*/ LDG.E R0, [R8.64+0x10] ; /* 0x0000100408007981 */ /* 0x000e24000c1e1900 */ /*0eb0*/ FFMA R5, R0, c[0x3][0x100], R11 ; /* 0x00c0400000057a23 */ /* 0x001fca000000000b */ /*0ec0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0ed0*/ LDG.E R0, [R8.64+0x14] ; /* 0x0000140408007981 */ /* 0x000f22000c1e1900 */ /*0ee0*/ IMAD.WIDE R6, R4, 0x4, R8 ; /* 0x0000000404067825 */ /* 0x008fe200078e0208 */ /*0ef0*/ FFMA R15, R0, c[0x3][0x104], R5 ; /* 0x00c04100000f7a23 */ /* 0x010fca0000000005 */ /*0f00*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*0f10*/ LDG.E R0, [R6.64+-0x14] ; /* 0xffffec0406007981 */ /* 0x000ea4000c1e1900 */ /*0f20*/ FFMA R13, R0, c[0x3][0x108], R15 ; /* 0x00c04200000d7a23 */ /* 0x004fca000000000f */ /*0f30*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*0f40*/ LDG.E R0, [R6.64+-0x10] ; /* 0xfffff00406007981 */ /* 0x000e64000c1e1900 */ /*0f50*/ FFMA R11, R0, c[0x3][0x10c], R13 ; /* 0x00c04300000b7a23 */ /* 0x002fca000000000d */ /*0f60*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*0f70*/ LDG.E R0, [R6.64+-0xc] ; /* 0xfffff40406007981 */ /* 0x000e24000c1e1900 */ /*0f80*/ FFMA R5, R0, c[0x3][0x110], R11 ; /* 0x00c0440000057a23 */ /* 0x001fca000000000b */ /*0f90*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*0fa0*/ LDG.E R0, [R6.64+-0x8] ; /* 0xfffff80406007981 */ /* 0x000ee4000c1e1900 */ /*0fb0*/ FFMA R9, R0, c[0x3][0x114], R5 ; /* 0x00c0450000097a23 */ /* 0x008fca0000000005 */ /*0fc0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x000fe8000c101904 */ /*0fd0*/ LDG.E R0, [R6.64+-0x4] ; /* 0xfffffc0406007981 */ /* 0x000ea4000c1e1900 */ /*0fe0*/ FFMA R13, R0, c[0x3][0x118], R9 ; /* 0x00c04600000d7a23 */ /* 0x004fca0000000009 */ /*0ff0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*1000*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */ /* 0x000e64000c1e1900 */ /*1010*/ FFMA R11, R0, c[0x3][0x11c], R13 ; /* 0x00c04700000b7a23 */ /* 0x002fca000000000d */ /*1020*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0003e8000c101904 */ /*1030*/ LDG.E R0, [R6.64+0x4] ; /* 0x0000040406007981 */ /* 0x000e24000c1e1900 */ /*1040*/ FFMA R5, R0, c[0x3][0x120], R11 ; /* 0x00c0480000057a23 */ /* 0x001fca000000000b */ /*1050*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*1060*/ LDG.E R0, [R6.64+0x8] ; /* 0x0000080406007981 */ /* 0x000ee4000c1e1900 */ /*1070*/ FFMA R15, R0, c[0x3][0x124], R5 ; /* 0x00c04900000f7a23 */ /* 0x008fca0000000005 */ /*1080*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x0007e8000c101904 */ /*1090*/ LDG.E R0, [R6.64+0xc] ; /* 0x00000c0406007981 */ /* 0x000ea4000c1e1900 */ /*10a0*/ FFMA R13, R0, c[0x3][0x128], R15 ; /* 0x00c04a00000d7a23 */ /* 0x004fca000000000f */ /*10b0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0005e8000c101904 */ /*10c0*/ LDG.E R0, [R6.64+0x10] ; /* 0x0000100406007981 */ /* 0x000e64000c1e1900 */ /*10d0*/ FFMA R11, R0, c[0x3][0x12c], R13 ; /* 0x00c04b00000b7a23 */ /* 0x002fca000000000d */ /*10e0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x000fe8000c101904 */ /*10f0*/ LDG.E R0, [R6.64+0x14] ; /* 0x0000140406007981 */ /* 0x000e22000c1e1900 */ /*1100*/ IMAD.WIDE R8, R4, 0x4, R6 ; /* 0x0000000404087825 */ /* 0x000fe200078e0206 */ /*1110*/ FFMA R5, R0, c[0x3][0x130], R11 ; /* 0x00c04c0000057a23 */ /* 0x001fca000000000b */ /*1120*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*1130*/ LDG.E R0, [R8.64+-0x14] ; /* 0xffffec0408007981 */ /* 0x000ee4000c1e1900 */ /*1140*/ FFMA R15, R0, c[0x3][0x134], R5 ; /* 0x00c04d00000f7a23 */ /* 0x008fca0000000005 */ /*1150*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*1160*/ LDG.E R0, [R8.64+-0x10] ; /* 0xfffff00408007981 */ /* 0x000ea4000c1e1900 */ /*1170*/ FFMA R13, R0, c[0x3][0x138], R15 ; /* 0x00c04e00000d7a23 */ /* 0x004fca000000000f */ /*1180*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*1190*/ LDG.E R0, [R8.64+-0xc] ; /* 0xfffff40408007981 */ /* 0x000ea4000c1e1900 */ /*11a0*/ FFMA R7, R0, c[0x3][0x13c], R13 ; /* 0x00c04f0000077a23 */ /* 0x004fca000000000d */ /*11b0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0005e8000c101904 */ /*11c0*/ LDG.E R0, [R8.64+-0x8] ; /* 0xfffff80408007981 */ /* 0x000e24000c1e1900 */ /*11d0*/ FFMA R5, R0, c[0x3][0x140], R7 ; /* 0x00c0500000057a23 */ /* 0x001fca0000000007 */ /*11e0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*11f0*/ LDG.E R0, [R8.64+-0x4] ; /* 0xfffffc0408007981 */ /* 0x000ee4000c1e1900 */ /*1200*/ FFMA R11, R0, c[0x3][0x144], R5 ; /* 0x00c05100000b7a23 */ /* 0x008fca0000000005 */ /*1210*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0007e8000c101904 */ /*1220*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000e64000c1e1900 */ /*1230*/ FFMA R13, R0, c[0x3][0x148], R11 ; /* 0x00c05200000d7a23 */ /* 0x002fca000000000b */ /*1240*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*1250*/ LDG.E R0, [R8.64+0x4] ; /* 0x0000040408007981 */ /* 0x000ea4000c1e1900 */ /*1260*/ FFMA R7, R0, c[0x3][0x14c], R13 ; /* 0x00c0530000077a23 */ /* 0x004fca000000000d */ /*1270*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0005e8000c101904 */ /*1280*/ LDG.E R0, [R8.64+0x8] ; /* 0x0000080408007981 */ /* 0x000e24000c1e1900 */ /*1290*/ FFMA R5, R0, c[0x3][0x150], R7 ; /* 0x00c0540000057a23 */ /* 0x001fca0000000007 */ /*12a0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*12b0*/ LDG.E R0, [R8.64+0xc] ; /* 0x00000c0408007981 */ /* 0x000ee4000c1e1900 */ /*12c0*/ FFMA R11, R0, c[0x3][0x154], R5 ; /* 0x00c05500000b7a23 */ /* 0x008fca0000000005 */ /*12d0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0007e8000c101904 */ /*12e0*/ LDG.E R0, [R8.64+0x10] ; /* 0x0000100408007981 */ /* 0x000e64000c1e1900 */ /*12f0*/ FFMA R13, R0, c[0x3][0x158], R11 ; /* 0x00c05600000d7a23 */ /* 0x002fca000000000b */ /*1300*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*1310*/ LDG.E R0, [R8.64+0x14] ; /* 0x0000140408007981 */ /* 0x000f22000c1e1900 */ /*1320*/ IMAD.WIDE R6, R4, 0x4, R8 ; /* 0x0000000404067825 */ /* 0x004fe200078e0208 */ /*1330*/ FFMA R15, R0, c[0x3][0x15c], R13 ; /* 0x00c05700000f7a23 */ /* 0x010fca000000000d */ /*1340*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*1350*/ LDG.E R0, [R6.64+-0x14] ; /* 0xffffec0406007981 */ /* 0x000e24000c1e1900 */ /*1360*/ FFMA R5, R0, c[0x3][0x160], R15 ; /* 0x00c0580000057a23 */ /* 0x001fca000000000f */ /*1370*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*1380*/ LDG.E R0, [R6.64+-0x10] ; /* 0xfffff00406007981 */ /* 0x000ee4000c1e1900 */ /*1390*/ FFMA R11, R0, c[0x3][0x164], R5 ; /* 0x00c05900000b7a23 */ /* 0x008fca0000000005 */ /*13a0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*13b0*/ LDG.E R0, [R6.64+-0xc] ; /* 0xfffff40406007981 */ /* 0x000ee4000c1e1900 */ /*13c0*/ FFMA R9, R0, c[0x3][0x168], R11 ; /* 0x00c05a0000097a23 */ /* 0x008fca000000000b */ /*13d0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0007e8000c101904 */ /*13e0*/ LDG.E R0, [R6.64+-0x8] ; /* 0xfffff80406007981 */ /* 0x000e64000c1e1900 */ /*13f0*/ FFMA R13, R0, c[0x3][0x16c], R9 ; /* 0x00c05b00000d7a23 */ /* 0x002fca0000000009 */ /*1400*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*1410*/ LDG.E R0, [R6.64+-0x4] ; /* 0xfffffc0406007981 */ /* 0x000e24000c1e1900 */ /*1420*/ FFMA R5, R0, c[0x3][0x170], R13 ; /* 0x00c05c0000057a23 */ /* 0x001fca000000000d */ /*1430*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*1440*/ LDG.E R0, [R6.64] ; /* 0x0000000406007981 */ /* 0x000ea4000c1e1900 */ /*1450*/ FFMA R11, R0, c[0x3][0x174], R5 ; /* 0x00c05d00000b7a23 */ /* 0x004fca0000000005 */ /*1460*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*1470*/ LDG.E R0, [R6.64+0x4] ; /* 0x0000040406007981 */ /* 0x000ee4000c1e1900 */ /*1480*/ FFMA R9, R0, c[0x3][0x178], R11 ; /* 0x00c05e0000097a23 */ /* 0x008fca000000000b */ /*1490*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0007e8000c101904 */ /*14a0*/ LDG.E R0, [R6.64+0x8] ; /* 0x0000080406007981 */ /* 0x000e64000c1e1900 */ /*14b0*/ FFMA R13, R0, c[0x3][0x17c], R9 ; /* 0x00c05f00000d7a23 */ /* 0x002fca0000000009 */ /*14c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*14d0*/ LDG.E R0, [R6.64+0xc] ; /* 0x00000c0406007981 */ /* 0x000e24000c1e1900 */ /*14e0*/ FFMA R5, R0, c[0x3][0x180], R13 ; /* 0x00c0600000057a23 */ /* 0x001fca000000000d */ /*14f0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*1500*/ LDG.E R0, [R6.64+0x10] ; /* 0x0000100406007981 */ /* 0x000ea4000c1e1900 */ /*1510*/ FFMA R11, R0, c[0x3][0x184], R5 ; /* 0x00c06100000b7a23 */ /* 0x004fca0000000005 */ /*1520*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*1530*/ LDG.E R0, [R6.64+0x14] ; /* 0x0000140406007981 */ /* 0x000f22000c1e1900 */ /*1540*/ IMAD.WIDE R8, R4, 0x4, R6 ; /* 0x0000000404087825 */ /* 0x008fe200078e0206 */ /*1550*/ FFMA R15, R0, c[0x3][0x188], R11 ; /* 0x00c06200000f7a23 */ /* 0x010fca000000000b */ /*1560*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*1570*/ LDG.E R0, [R8.64+-0x14] ; /* 0xffffec0408007981 */ /* 0x000e64000c1e1900 */ /*1580*/ FFMA R13, R0, c[0x3][0x18c], R15 ; /* 0x00c06300000d7a23 */ /* 0x002fca000000000f */ /*1590*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*15a0*/ LDG.E R0, [R8.64+-0x10] ; /* 0xfffff00408007981 */ /* 0x000e24000c1e1900 */ /*15b0*/ FFMA R5, R0, c[0x3][0x190], R13 ; /* 0x00c0640000057a23 */ /* 0x001fca000000000d */ /*15c0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*15d0*/ LDG.E R0, [R8.64+-0xc] ; /* 0xfffff40408007981 */ /* 0x000ee4000c1e1900 */ /*15e0*/ FFMA R7, R0, c[0x3][0x194], R5 ; /* 0x00c0650000077a23 */ /* 0x008fca0000000005 */ /*15f0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0007e8000c101904 */ /*1600*/ LDG.E R0, [R8.64+-0x8] ; /* 0xfffff80408007981 */ /* 0x000ea4000c1e1900 */ /*1610*/ FFMA R11, R0, c[0x3][0x198], R7 ; /* 0x00c06600000b7a23 */ /* 0x004fca0000000007 */ /*1620*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*1630*/ LDG.E R0, [R8.64+-0x4] ; /* 0xfffffc0408007981 */ /* 0x000e64000c1e1900 */ /*1640*/ FFMA R13, R0, c[0x3][0x19c], R11 ; /* 0x00c06700000d7a23 */ /* 0x002fca000000000b */ /*1650*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*1660*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000e24000c1e1900 */ /*1670*/ FFMA R5, R0, c[0x3][0x1a0], R13 ; /* 0x00c0680000057a23 */ /* 0x001fca000000000d */ /*1680*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x0001e8000c101904 */ /*1690*/ LDG.E R0, [R8.64+0x4] ; /* 0x0000040408007981 */ /* 0x000ee4000c1e1900 */ /*16a0*/ FFMA R7, R0, c[0x3][0x1a4], R5 ; /* 0x00c0690000077a23 */ /* 0x008fca0000000005 */ /*16b0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0007e8000c101904 */ /*16c0*/ LDG.E R0, [R8.64+0x8] ; /* 0x0000080408007981 */ /* 0x000ea4000c1e1900 */ /*16d0*/ FFMA R11, R0, c[0x3][0x1a8], R7 ; /* 0x00c06a00000b7a23 */ /* 0x004fca0000000007 */ /*16e0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*16f0*/ LDG.E R0, [R8.64+0xc] ; /* 0x00000c0408007981 */ /* 0x000e64000c1e1900 */ /*1700*/ FFMA R13, R0, c[0x3][0x1ac], R11 ; /* 0x00c06b00000d7a23 */ /* 0x002fca000000000b */ /*1710*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*1720*/ LDG.E R0, [R8.64+0x10] ; /* 0x0000100408007981 */ /* 0x000f24000c1e1900 */ /*1730*/ FFMA R15, R0, c[0x3][0x1b0], R13 ; /* 0x00c06c00000f7a23 */ /* 0x010fca000000000d */ /*1740*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe8000c101904 */ /*1750*/ LDG.E R0, [R8.64+0x14] ; /* 0x0000140408007981 */ /* 0x000f22000c1e1900 */ /*1760*/ IMAD.WIDE R4, R4, 0x4, R8 ; /* 0x0000000404047825 */ /* 0x001fe200078e0208 */ /*1770*/ FFMA R17, R0, c[0x3][0x1b4], R15 ; /* 0x00c06d0000117a23 */ /* 0x010fca000000000f */ /*1780*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */ /* 0x000fe8000c101904 */ /*1790*/ LDG.E R0, [R4.64+-0x14] ; /* 0xffffec0404007981 */ /* 0x000ee4000c1e1900 */ /*17a0*/ FFMA R7, R0, c[0x3][0x1b8], R17 ; /* 0x00c06e0000077a23 */ /* 0x008fca0000000011 */ /*17b0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0001e8000c101904 */ /*17c0*/ LDG.E R0, [R4.64+-0x10] ; /* 0xfffff00404007981 */ /* 0x000ea4000c1e1900 */ /*17d0*/ FFMA R11, R0, c[0x3][0x1bc], R7 ; /* 0x00c06f00000b7a23 */ /* 0x004fca0000000007 */ /*17e0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*17f0*/ LDG.E R0, [R4.64+-0xc] ; /* 0xfffff40404007981 */ /* 0x000ee4000c1e1900 */ /*1800*/ FFMA R9, R0, c[0x3][0x1c0], R11 ; /* 0x00c0700000097a23 */ /* 0x008fca000000000b */ /*1810*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0007e8000c101904 */ /*1820*/ LDG.E R0, [R4.64+-0x8] ; /* 0xfffff80404007981 */ /* 0x000e64000c1e1900 */ /*1830*/ FFMA R13, R0, c[0x3][0x1c4], R9 ; /* 0x00c07100000d7a23 */ /* 0x002fca0000000009 */ /*1840*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x0003e8000c101904 */ /*1850*/ LDG.E R0, [R4.64+-0x4] ; /* 0xfffffc0404007981 */ /* 0x000e24000c1e1900 */ /*1860*/ FFMA R7, R0, c[0x3][0x1c8], R13 ; /* 0x00c0720000077a23 */ /* 0x001fca000000000d */ /*1870*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x0001e8000c101904 */ /*1880*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */ /* 0x000ea4000c1e1900 */ /*1890*/ FFMA R11, R0, c[0x3][0x1cc], R7 ; /* 0x00c07300000b7a23 */ /* 0x004fca0000000007 */ /*18a0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0005e8000c101904 */ /*18b0*/ LDG.E R0, [R4.64+0x4] ; /* 0x0000040404007981 */ /* 0x000ee4000c1e1900 */ /*18c0*/ FFMA R9, R0, c[0x3][0x1d0], R11 ; /* 0x00c0740000097a23 */ /* 0x008fca000000000b */ /*18d0*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x0007e8000c101904 */ /*18e0*/ LDG.E R0, [R4.64+0x8] ; /* 0x0000080404007981 */ /* 0x000e64000c1e1900 */ /*18f0*/ FFMA R13, R0, c[0x3][0x1d4], R9 ; /* 0x00c07500000d7a23 */ /* 0x002fca0000000009 */ /*1900*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */ /* 0x000fe8000c101904 */ /*1910*/ LDG.E R0, [R4.64+0xc] ; /* 0x00000c0404007981 */ /* 0x000e24000c1e1900 */ /*1920*/ FFMA R7, R0, c[0x3][0x1d8], R13 ; /* 0x00c0760000077a23 */ /* 0x001fca000000000d */ /*1930*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x000fe8000c101904 */ /*1940*/ LDG.E R0, [R4.64+0x10] ; /* 0x0000100404007981 */ /* 0x000ea4000c1e1900 */ /*1950*/ FFMA R11, R0, c[0x3][0x1dc], R7 ; /* 0x00c07700000b7a23 */ /* 0x004fca0000000007 */ /*1960*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x000fe8000c101904 */ /*1970*/ LDG.E R0, [R4.64+0x14] ; /* 0x0000140404007981 */ /* 0x000ee4000c1e1900 */ /*1980*/ FFMA R9, R0, c[0x3][0x1e0], R11 ; /* 0x00c0780000097a23 */ /* 0x008fca000000000b */ /*1990*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */ /* 0x000fe2000c101904 */ /*19a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*19b0*/ BRA 0x19b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*19c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*19d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*19e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*19f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1a00*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1a10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1a20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1a30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1a40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1a50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1a60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1a70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __device__ size_t GIDX(size_t row, size_t col, int H, int W) { return row * W + col; } __global__ void kernel_blur(float* d_I, float* d_Ib, int H, int W) { size_t row = threadIdx.y + blockDim.y * blockIdx.y; size_t col = threadIdx.x + blockDim.x * blockIdx.x; size_t idx = GIDX(row, col, H, W); if (row >= H - KERN_RADIUS || row <= KERN_RADIUS || col >= W - KERN_RADIUS || col <= KERN_RADIUS) { return; } int count = 0; for (int i = -KERN_RADIUS; i <= KERN_RADIUS; i++) { for (int j = -KERN_RADIUS; j <= KERN_RADIUS; j++) { d_Ib[idx] += d_I[GIDX(row + i, col + j, H, W)] * gaussian_kernel[count]; count++; } } }
.text .file "kernel_blur.hip" .globl _Z26__device_stub__kernel_blurPfS_ii # -- Begin function _Z26__device_stub__kernel_blurPfS_ii .type _Z26__device_stub__kernel_blurPfS_ii,@function _Z26__device_stub__kernel_blurPfS_ii: # @_Z26__device_stub__kernel_blurPfS_ii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 8(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11kernel_blurPfS_ii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z26__device_stub__kernel_blurPfS_ii, .Lfunc_end0-_Z26__device_stub__kernel_blurPfS_ii .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11kernel_blurPfS_ii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $0, 8(%rsp) movl $1, (%rsp) movl $gaussian_kernel, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movl $100, %r9d movq %rbx, %rdi xorl %r8d, %r8d callq __hipRegisterVar movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type gaussian_kernel,@object # @gaussian_kernel .local gaussian_kernel .comm gaussian_kernel,100,16 .type _Z11kernel_blurPfS_ii,@object # @_Z11kernel_blurPfS_ii .section .rodata,"a",@progbits .globl _Z11kernel_blurPfS_ii .p2align 3, 0x0 _Z11kernel_blurPfS_ii: .quad _Z26__device_stub__kernel_blurPfS_ii .size _Z11kernel_blurPfS_ii, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z11kernel_blurPfS_ii" .size .L__unnamed_1, 22 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "gaussian_kernel" .size .L__unnamed_2, 16 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z26__device_stub__kernel_blurPfS_ii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym gaussian_kernel .addrsig_sym _Z11kernel_blurPfS_ii .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z11kernel_blurPfS_ii ; -- Begin function _Z11kernel_blurPfS_ii .globl _Z11kernel_blurPfS_ii .p2align 8 .type _Z11kernel_blurPfS_ii,@function _Z11kernel_blurPfS_ii: ; @_Z11kernel_blurPfS_ii ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x24 s_load_b64 s[2:3], s[0:1], 0x10 v_bfe_u32 v4, v0, 10, 10 v_mov_b32_e32 v1, 0 s_waitcnt lgkmcnt(0) s_lshr_b32 s5, s4, 16 s_add_i32 s6, s2, -5 v_mad_u64_u32 v[2:3], null, s15, s5, v[4:5] v_mov_b32_e32 v3, v1 s_ashr_i32 s7, s6, 31 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[2:3] v_cmp_lt_u32_e64 s2, 5, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, s2, vcc_lo s_and_saveexec_b32 s5, s2 s_cbranch_execz .LBB0_6 ; %bb.1: v_and_b32_e32 v0, 0x3ff, v0 s_and_b32 s2, s4, 0xffff s_add_i32 s4, s3, -5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_ashr_i32 s5, s4, 31 v_mad_u64_u32 v[3:4], null, s14, s2, v[0:1] s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_mov_b32_e32 v0, v3 v_cmp_lt_u32_e64 s2, 5, v3 v_cmp_gt_u64_e32 vcc_lo, s[4:5], v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s2, s2, vcc_lo s_and_b32 exec_lo, exec_lo, s2 s_cbranch_execz .LBB0_6 ; %bb.2: ; %.preheader34 s_mov_b32 s4, s3 s_ashr_i32 s5, s3, 31 v_mad_u64_u32 v[3:4], null, v2, s4, 0 s_load_b128 s[0:3], s[0:1], 0x0 s_mov_b32 s6, -5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[5:6], null, v2, s5, v[4:5] v_mov_b32_e32 v4, v5 v_lshlrev_b64 v[5:6], 2, v[0:1] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[3:4], 2, v[3:4] s_waitcnt lgkmcnt(0) v_add_co_u32 v0, vcc_lo, s2, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo v_add_co_u32 v2, s2, v2, -5 v_add_co_u32 v0, vcc_lo, v0, v5 s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_add_co_ci_u32_e32 v1, vcc_lo, v1, v6, vcc_lo v_add_co_ci_u32_e64 v4, null, 0, -1, s2 v_mul_lo_u32 v9, v2, s5 global_load_b32 v3, v[0:1], off v_mad_u64_u32 v[7:8], null, v2, s4, 0 v_mul_lo_u32 v4, v4, s4 s_mov_b32 s2, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v8, v8, v9, v4 v_lshlrev_b64 v[7:8], 2, v[7:8] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v7, v5 v_add_co_ci_u32_e32 v4, vcc_lo, v8, v6, vcc_lo s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, v2, s0 v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo s_lshl_b64 s[0:1], s[4:5], 2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v2, vcc_lo, 0xffffffec, v2 v_add_co_ci_u32_e32 v4, vcc_lo, -1, v4, vcc_lo .LBB0_3: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB0_4 Depth 2 s_getpc_b64 s[4:5] s_add_u32 s4, s4, gaussian_kernel@rel32@lo+4 s_addc_u32 s5, s5, gaussian_kernel@rel32@hi+12 s_ashr_i32 s3, s2, 31 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_lshl_b64 s[8:9], s[2:3], 2 s_add_u32 s3, s8, s4 s_addc_u32 s7, s9, s5 s_mov_b64 s[4:5], 0 .LBB0_4: ; Parent Loop BB0_3 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) v_add_co_u32 v5, vcc_lo, v2, s4 v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo s_add_u32 s8, s3, s4 s_addc_u32 s9, s7, s5 s_add_u32 s4, s4, 4 global_load_b32 v5, v[5:6], off s_load_b32 s8, s[8:9], 0x0 s_addc_u32 s5, s5, 0 s_cmp_eq_u32 s4, 44 s_waitcnt vmcnt(0) lgkmcnt(0) v_fmac_f32_e32 v3, s8, v5 global_store_b32 v[0:1], v3, off s_cbranch_scc0 .LBB0_4 ; %bb.5: ; in Loop: Header=BB0_3 Depth=1 v_add_co_u32 v2, vcc_lo, v2, s0 v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo s_add_i32 s6, s6, 1 s_add_i32 s2, s2, 11 s_cmp_eq_u32 s6, 6 s_cbranch_scc0 .LBB0_3 .LBB0_6: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11kernel_blurPfS_ii .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 10 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z11kernel_blurPfS_ii, .Lfunc_end0-_Z11kernel_blurPfS_ii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 548 ; NumSgprs: 18 ; NumVgprs: 10 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 10 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .protected gaussian_kernel ; @gaussian_kernel .type gaussian_kernel,@object .section .bss,"aw",@nobits .globl gaussian_kernel .p2align 4, 0x0 gaussian_kernel: .zero 100 .size gaussian_kernel, 100 .type __hip_cuid_,@object ; @__hip_cuid_ .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym gaussian_kernel .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 20 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11kernel_blurPfS_ii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11kernel_blurPfS_ii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 10 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
87c8016d58b67ea3ed6c64b5463ef5340ca7a844
/** * @file markFilterEdge.cu * @date Spring 2020, revised Spring 2021 * @author Hugo De Moraes */ #include <stdio.h> #include <stdlib.h> __global__ void markFilterEdges_gpu(int * src, int * dst, int * matches, int * keepEdges, int numEdges) { // Get Thread ID const int NUM_THREADS = blockDim.x * gridDim.x; const int COL = blockIdx.x * blockDim.x + threadIdx.x; const int ROW = blockIdx.y * blockDim.y + threadIdx.y; const int FIRST_T_ID = COL + ROW * NUM_THREADS; for(int curTID = FIRST_T_ID; curTID <= numEdges; curTID += NUM_THREADS) { if(matches[src[curTID]] != -1 || matches[dst[curTID]] != -1) { keepEdges[curTID] = 0; } else { keepEdges[curTID] = 1; } } }
.file "tmpxft_00205475_00000000-6_markFilterEdges.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2029: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2029: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z46__device_stub__Z19markFilterEdges_gpuPiS_S_S_iPiS_S_S_i .type _Z46__device_stub__Z19markFilterEdges_gpuPiS_S_S_iPiS_S_S_i, @function _Z46__device_stub__Z19markFilterEdges_gpuPiS_S_S_iPiS_S_S_i: .LFB2051: .cfi_startproc endbr64 subq $168, %rsp .cfi_def_cfa_offset 176 movq %rdi, 40(%rsp) leaq 64(%rsp), %rdi movq %rsi, 32(%rsp) leaq 76(%rsp), %rsi movq %rdx, 24(%rsp) leaq 48(%rsp), %rdx movq %rcx, 16(%rsp) leaq 56(%rsp), %rcx movl %r8d, 12(%rsp) movq %fs:40, %rax movq %rax, 152(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 72(%rsp) movq %rax, 112(%rsp) leaq 32(%rsp), %rax movq %rax, 120(%rsp) leaq 24(%rsp), %rax movq %rax, 128(%rsp) leaq 16(%rsp), %rax movq %rax, 136(%rsp) leaq 12(%rsp), %rax movq %rax, 144(%rsp) movabsq $4294967297, %rax movq %rax, 64(%rsp) movq %rax, 76(%rsp) movl $1, 84(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 56(%rsp) .cfi_def_cfa_offset 184 leaq _Z19markFilterEdges_gpuPiS_S_S_i(%rip), %rdi pushq 56(%rsp) .cfi_def_cfa_offset 192 movq 92(%rsp), %rcx movl 100(%rsp), %r8d movq 80(%rsp), %rsi movl 88(%rsp), %edx leaq 128(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 184 popq %rdx .cfi_def_cfa_offset 176 .L2: movq 152(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $168, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2051: .size _Z46__device_stub__Z19markFilterEdges_gpuPiS_S_S_iPiS_S_S_i, .-_Z46__device_stub__Z19markFilterEdges_gpuPiS_S_S_iPiS_S_S_i .globl _Z19markFilterEdges_gpuPiS_S_S_i .type _Z19markFilterEdges_gpuPiS_S_S_i, @function _Z19markFilterEdges_gpuPiS_S_S_i: .LFB2052: .cfi_startproc endbr64 jmp _Z46__device_stub__Z19markFilterEdges_gpuPiS_S_S_iPiS_S_S_i .cfi_endproc .LFE2052: .size _Z19markFilterEdges_gpuPiS_S_S_i, .-_Z19markFilterEdges_gpuPiS_S_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z19markFilterEdges_gpuPiS_S_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2054: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z19markFilterEdges_gpuPiS_S_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2054: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z19markFilterEdges_gpuPiS_S_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */ /* 0x000fe40000000800 */ /*0030*/ ULDC UR5, c[0x0][0xc] ; /* 0x0000030000057ab9 */ /* 0x000fe20000000800 */ /*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e220000002100 */ /*0050*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */ /* 0x000fc6000f8e023f */ /*0060*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e680000002600 */ /*0070*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e620000002200 */ /*0080*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fe400078e0203 */ /*0090*/ IMAD R3, R2, c[0x0][0x4], R5 ; /* 0x0000010002037a24 */ /* 0x002fc800078e0205 */ /*00a0*/ IMAD R0, R3, UR4, R0 ; /* 0x0000000403007c24 */ /* 0x000fca000f8e0200 */ /*00b0*/ ISETP.GT.AND P0, PT, R0, c[0x0][0x180], PT ; /* 0x0000600000007a0c */ /* 0x000fda0003f04270 */ /*00c0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*00d0*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe40000000a00 */ /*00e0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */ /* 0x000fc800078e00ff */ /*00f0*/ IMAD.WIDE R2, R0, R7, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x001fcc00078e0207 */ /*0100*/ LDG.E R2, [R2.64] ; /* 0x0000000602027981 */ /* 0x000ea4000c1e1900 */ /*0110*/ IMAD.WIDE R4, R2, R7, c[0x0][0x170] ; /* 0x00005c0002047625 */ /* 0x004fcc00078e0207 */ /*0120*/ LDG.E R4, [R4.64] ; /* 0x0000000604047981 */ /* 0x000ea2000c1e1900 */ /*0130*/ SHF.R.S32.HI R11, RZ, 0x1f, R0 ; /* 0x0000001fff0b7819 */ /* 0x000fe40000011400 */ /*0140*/ ISETP.NE.AND P0, PT, R4, -0x1, PT ; /* 0xffffffff0400780c */ /* 0x004fda0003f05270 */ /*0150*/ @!P0 LEA R8, P1, R0, c[0x0][0x168], 0x2 ; /* 0x00005a0000088a11 */ /* 0x000fc800078210ff */ /*0160*/ @!P0 LEA.HI.X R9, R0, c[0x0][0x16c], R11, 0x2, P1 ; /* 0x00005b0000098a11 */ /* 0x000fca00008f140b */ /*0170*/ @!P0 LDG.E R6, [R8.64] ; /* 0x0000000608068981 */ /* 0x000ea4000c1e1900 */ /*0180*/ @!P0 IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006068625 */ /* 0x004fcc00078e0207 */ /*0190*/ @!P0 LDG.E R6, [R6.64] ; /* 0x0000000606068981 */ /* 0x000ea2000c1e1900 */ /*01a0*/ LEA R10, P1, R0, c[0x0][0x178], 0x2 ; /* 0x00005e00000a7a11 */ /* 0x000fc800078210ff */ /*01b0*/ LEA.HI.X R11, R0.reuse, c[0x0][0x17c], R11, 0x2, P1 ; /* 0x00005f00000b7a11 */ /* 0x040fe400008f140b */ /*01c0*/ IADD3 R0, R0, UR4, RZ ; /* 0x0000000400007c10 */ /* 0x000fe4000fffe0ff */ /*01d0*/ ISETP.NE.OR P0, PT, R6, -0x1, P0 ; /* 0xffffffff0600780c */ /* 0x004fc80000705670 */ /*01e0*/ SEL R3, RZ, 0x1, P0 ; /* 0x00000001ff037807 */ /* 0x000fe40000000000 */ /*01f0*/ ISETP.GT.AND P0, PT, R0, c[0x0][0x180], PT ; /* 0x0000600000007a0c */ /* 0x000fc60003f04270 */ /*0200*/ STG.E [R10.64], R3 ; /* 0x000000030a007986 */ /* 0x0001f4000c101906 */ /*0210*/ @!P0 BRA 0xe0 ; /* 0xfffffec000008947 */ /* 0x000fea000383ffff */ /*0220*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0230*/ BRA 0x230; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0240*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0250*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
/** * @file markFilterEdge.cu * @date Spring 2020, revised Spring 2021 * @author Hugo De Moraes */ #include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> __global__ void markFilterEdges_gpu(int * src, int * dst, int * matches, int * keepEdges, int numEdges) { // Get Thread ID const int NUM_THREADS = blockDim.x * gridDim.x; const int COL = blockIdx.x * blockDim.x + threadIdx.x; const int ROW = blockIdx.y * blockDim.y + threadIdx.y; const int FIRST_T_ID = COL + ROW * NUM_THREADS; for(int curTID = FIRST_T_ID; curTID <= numEdges; curTID += NUM_THREADS) { if(matches[src[curTID]] != -1 || matches[dst[curTID]] != -1) { keepEdges[curTID] = 0; } else { keepEdges[curTID] = 1; } } }
.text .file "markFilterEdges.hip" .globl _Z34__device_stub__markFilterEdges_gpuPiS_S_S_i # -- Begin function _Z34__device_stub__markFilterEdges_gpuPiS_S_S_i .type _Z34__device_stub__markFilterEdges_gpuPiS_S_S_i,@function _Z34__device_stub__markFilterEdges_gpuPiS_S_S_i: # @_Z34__device_stub__markFilterEdges_gpuPiS_S_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $144, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 12(%rsp), %rcx movl %r8d, (%rcx) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z19markFilterEdges_gpuPiS_S_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $160, %rsp .cfi_adjust_cfa_offset -160 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z34__device_stub__markFilterEdges_gpuPiS_S_S_i, .Lfunc_end0-_Z34__device_stub__markFilterEdges_gpuPiS_S_S_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z19markFilterEdges_gpuPiS_S_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z19markFilterEdges_gpuPiS_S_S_i,@object # @_Z19markFilterEdges_gpuPiS_S_S_i .section .rodata,"a",@progbits .globl _Z19markFilterEdges_gpuPiS_S_S_i .p2align 3, 0x0 _Z19markFilterEdges_gpuPiS_S_S_i: .quad _Z34__device_stub__markFilterEdges_gpuPiS_S_S_i .size _Z19markFilterEdges_gpuPiS_S_S_i, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z19markFilterEdges_gpuPiS_S_S_i" .size .L__unnamed_1, 33 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z34__device_stub__markFilterEdges_gpuPiS_S_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z19markFilterEdges_gpuPiS_S_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z19markFilterEdges_gpuPiS_S_S_i ; -- Begin function _Z19markFilterEdges_gpuPiS_S_S_i .globl _Z19markFilterEdges_gpuPiS_S_S_i .p2align 8 .type _Z19markFilterEdges_gpuPiS_S_S_i,@function _Z19markFilterEdges_gpuPiS_S_S_i: ; @_Z19markFilterEdges_gpuPiS_S_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x34 s_load_b32 s3, s[0:1], 0x28 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v0, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_lshr_b32 s4, s2, 16 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2] s_load_b32 s15, s[0:1], 0x20 s_and_b32 s4, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) s_mul_i32 s2, s3, s4 s_mul_i32 s14, s14, s4 s_mov_b32 s3, exec_lo v_mul_lo_u32 v1, v2, s2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_add3_u32 v0, s14, v0, v1 s_waitcnt lgkmcnt(0) v_cmpx_ge_i32_e64 s15, v0 s_cbranch_execz .LBB0_5 ; %bb.1: ; %.lr.ph.preheader s_load_b256 s[4:11], s[0:1], 0x0 v_ashrrev_i32_e32 v1, 31, v0 s_ashr_i32 s3, s2, 31 s_mov_b32 s1, 0 s_lshl_b64 s[12:13], s[2:3], 2 s_delay_alu instid0(VALU_DEP_1) v_lshlrev_b64 v[1:2], 2, v[0:1] .LBB0_2: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s4, v1 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo global_load_b32 v3, v[3:4], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[3:4], 2, v[3:4] v_add_co_u32 v3, vcc_lo, s8, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo global_load_b32 v3, v[3:4], off s_waitcnt vmcnt(0) v_cmp_eq_u32_e32 vcc_lo, -1, v3 v_mov_b32_e32 v3, 0 s_and_saveexec_b32 s0, vcc_lo s_cbranch_execz .LBB0_4 ; %bb.3: ; in Loop: Header=BB0_2 Depth=1 v_add_co_u32 v3, vcc_lo, s6, v1 v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo global_load_b32 v3, v[3:4], off s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v4, 31, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[3:4], 2, v[3:4] v_add_co_u32 v3, vcc_lo, s8, v3 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo global_load_b32 v3, v[3:4], off s_waitcnt vmcnt(0) v_cmp_eq_u32_e32 vcc_lo, -1, v3 v_cndmask_b32_e64 v3, 0, 1, vcc_lo .LBB0_4: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s0 v_add_nc_u32_e32 v0, s2, v0 v_add_co_u32 v4, vcc_lo, s10, v1 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v2, vcc_lo s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cmp_lt_i32_e32 vcc_lo, s15, v0 v_add_co_u32 v1, s0, v1, s12 v_add_co_ci_u32_e64 v2, s0, s13, v2, s0 s_or_b32 s1, vcc_lo, s1 global_store_b32 v[4:5], v3, off s_and_not1_b32 exec_lo, exec_lo, s1 s_cbranch_execnz .LBB0_2 .LBB0_5: ; %Flow45 s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z19markFilterEdges_gpuPiS_S_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 296 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z19markFilterEdges_gpuPiS_S_S_i, .Lfunc_end0-_Z19markFilterEdges_gpuPiS_S_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 408 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 1 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .offset: 32 .size: 4 .value_kind: by_value - .offset: 40 .size: 4 .value_kind: hidden_block_count_x - .offset: 44 .size: 4 .value_kind: hidden_block_count_y - .offset: 48 .size: 4 .value_kind: hidden_block_count_z - .offset: 52 .size: 2 .value_kind: hidden_group_size_x - .offset: 54 .size: 2 .value_kind: hidden_group_size_y - .offset: 56 .size: 2 .value_kind: hidden_group_size_z - .offset: 58 .size: 2 .value_kind: hidden_remainder_x - .offset: 60 .size: 2 .value_kind: hidden_remainder_y - .offset: 62 .size: 2 .value_kind: hidden_remainder_z - .offset: 80 .size: 8 .value_kind: hidden_global_offset_x - .offset: 88 .size: 8 .value_kind: hidden_global_offset_y - .offset: 96 .size: 8 .value_kind: hidden_global_offset_z - .offset: 104 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 296 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z19markFilterEdges_gpuPiS_S_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z19markFilterEdges_gpuPiS_S_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
a9b8063df72082992cd1ef5546307e1b1a77db82
extern "C" { __global__ void DmeanSquareLoss(const int lengthx, const double pref, const double *gradc, const double *x,const double *y, double *gradn ) { int i = threadIdx.x + blockIdx.x * blockDim.x; if (i<lengthx) { gradn[i] += pref * gradc[0] * (x[i]-y[i]); } } }
.file "tmpxft_00304cf4_00000000-6_DmeanSquareLoss.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z46__device_stub__Z15DmeanSquareLossidPKdS0_S0_PdidPKdS0_S0_Pd .type _Z46__device_stub__Z15DmeanSquareLossidPKdS0_S0_PdidPKdS0_S0_Pd, @function _Z46__device_stub__Z15DmeanSquareLossidPKdS0_S0_PdidPKdS0_S0_Pd: .LFB2032: .cfi_startproc endbr64 subq $184, %rsp .cfi_def_cfa_offset 192 movl %edi, 44(%rsp) leaq 72(%rsp), %rdi movq %rsi, 24(%rsp) leaq 84(%rsp), %rsi movq %rdx, 16(%rsp) leaq 56(%rsp), %rdx movq %rcx, 8(%rsp) leaq 64(%rsp), %rcx movq %r8, (%rsp) movsd %xmm0, 32(%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 44(%rsp), %rax movl $1, 80(%rsp) movq %rax, 120(%rsp) leaq 32(%rsp), %rax movq %rax, 128(%rsp) leaq 24(%rsp), %rax movq %rax, 136(%rsp) leaq 16(%rsp), %rax movq %rax, 144(%rsp) leaq 8(%rsp), %rax movq %rax, 152(%rsp) movq %rsp, %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 64(%rsp) .cfi_def_cfa_offset 200 leaq DmeanSquareLoss(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 208 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 136(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L2: movq 168(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z46__device_stub__Z15DmeanSquareLossidPKdS0_S0_PdidPKdS0_S0_Pd, .-_Z46__device_stub__Z15DmeanSquareLossidPKdS0_S0_PdidPKdS0_S0_Pd .globl DmeanSquareLoss .type DmeanSquareLoss, @function DmeanSquareLoss: .LFB2033: .cfi_startproc endbr64 jmp _Z46__device_stub__Z15DmeanSquareLossidPKdS0_S0_PdidPKdS0_S0_Pd .cfi_endproc .LFE2033: .size DmeanSquareLoss, .-DmeanSquareLoss .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "DmeanSquareLoss" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq DmeanSquareLoss(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : DmeanSquareLoss .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R12, SR_TID.X ; /* 0x00000000000c7919 */ /* 0x000e280000002100 */ /*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0030*/ IMAD R12, R3, c[0x0][0x0], R12 ; /* 0x00000000030c7a24 */ /* 0x001fca00078e020c */ /*0040*/ ISETP.GE.AND P0, PT, R12, c[0x0][0x160], PT ; /* 0x000058000c007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R13, 0x8 ; /* 0x00000008000d7802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0080*/ MOV R2, c[0x0][0x170] ; /* 0x00005c0000027a02 */ /* 0x000fe40000000f00 */ /*0090*/ MOV R3, c[0x0][0x174] ; /* 0x00005d0000037a02 */ /* 0x000fe20000000f00 */ /*00a0*/ IMAD.WIDE R8, R12, R13, c[0x0][0x180] ; /* 0x000060000c087625 */ /* 0x000fc800078e020d */ /*00b0*/ IMAD.WIDE R6, R12.reuse, R13.reuse, c[0x0][0x178] ; /* 0x00005e000c067625 */ /* 0x0c0fe200078e020d */ /*00c0*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea6000c1e1b00 */ /*00d0*/ IMAD.WIDE R12, R12, R13, c[0x0][0x188] ; /* 0x000062000c0c7625 */ /* 0x000fe200078e020d */ /*00e0*/ LDG.E.64 R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x000ee8000c1e1b00 */ /*00f0*/ LDG.E.64 R6, [R6.64] ; /* 0x0000000406067981 */ /* 0x000ee8000c1e1b00 */ /*0100*/ LDG.E.64 R14, [R12.64] ; /* 0x000000040c0e7981 */ /* 0x000f22000c1e1b00 */ /*0110*/ DMUL R4, R2, c[0x0][0x168] ; /* 0x00005a0002047a28 */ /* 0x004fc80000000000 */ /*0120*/ DADD R10, -R8, R6 ; /* 0x00000000080a7229 */ /* 0x008f0c0000000106 */ /*0130*/ DFMA R4, R4, R10, R14 ; /* 0x0000000a0404722b */ /* 0x010e0e000000000e */ /*0140*/ STG.E.64 [R12.64], R4 ; /* 0x000000040c007986 */ /* 0x001fe2000c101b04 */ /*0150*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0160*/ BRA 0x160; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> extern "C" { __global__ void DmeanSquareLoss(const int lengthx, const double pref, const double *gradc, const double *x,const double *y, double *gradn ) { int i = threadIdx.x + blockIdx.x * blockDim.x; if (i<lengthx) { gradn[i] += pref * gradc[0] * (x[i]-y[i]); } } }
.text .file "DmeanSquareLoss.hip" .globl __device_stub__DmeanSquareLoss # -- Begin function __device_stub__DmeanSquareLoss .type __device_stub__DmeanSquareLoss,@function __device_stub__DmeanSquareLoss: # @__device_stub__DmeanSquareLoss .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $144, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 4(%rsp), %rax movl %edi, (%rax) leaq 56(%rsp), %rdi movsd %xmm0, (%rdi) leaq 48(%rsp), %r9 movq %rsi, (%r9) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 32(%rsp), %rdx movq %rcx, (%rdx) leaq 24(%rsp), %rcx movq %r8, (%rcx) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %r9, 16(%rbx) movq %rsi, 24(%rbx) movq %rdx, 32(%rbx) movq %rcx, 40(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $DmeanSquareLoss, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $160, %rsp .cfi_adjust_cfa_offset -160 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size __device_stub__DmeanSquareLoss, .Lfunc_end0-__device_stub__DmeanSquareLoss .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $DmeanSquareLoss, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type DmeanSquareLoss,@object # @DmeanSquareLoss .section .rodata,"a",@progbits .globl DmeanSquareLoss .p2align 3, 0x0 DmeanSquareLoss: .quad __device_stub__DmeanSquareLoss .size DmeanSquareLoss, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "DmeanSquareLoss" .size .L__unnamed_1, 16 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __device_stub__DmeanSquareLoss .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym DmeanSquareLoss .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected DmeanSquareLoss ; -- Begin function DmeanSquareLoss .globl DmeanSquareLoss .p2align 8 .type DmeanSquareLoss,@function DmeanSquareLoss: ; @DmeanSquareLoss ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x3c s_load_b32 s3, s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b256 s[4:11], s[0:1], 0x8 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x28 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s8, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s10, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b64 v[2:3], v[2:3], off global_load_b64 v[4:5], v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_load_b64 s[0:1], s[6:7], 0x0 global_load_b64 v[6:7], v[0:1], off s_waitcnt lgkmcnt(0) v_mul_f64 v[8:9], s[0:1], s[4:5] s_waitcnt vmcnt(1) v_add_f64 v[2:3], v[2:3], -v[4:5] s_waitcnt vmcnt(0) s_delay_alu instid0(VALU_DEP_1) v_fma_f64 v[2:3], v[8:9], v[2:3], v[6:7] global_store_b64 v[0:1], v[2:3], off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel DmeanSquareLoss .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 304 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 10 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size DmeanSquareLoss, .Lfunc_end0-DmeanSquareLoss ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 228 ; NumSgprs: 18 ; NumVgprs: 10 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 10 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 8 .size: 8 .value_kind: by_value - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 32 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 40 .size: 8 .value_kind: global_buffer - .offset: 48 .size: 4 .value_kind: hidden_block_count_x - .offset: 52 .size: 4 .value_kind: hidden_block_count_y - .offset: 56 .size: 4 .value_kind: hidden_block_count_z - .offset: 60 .size: 2 .value_kind: hidden_group_size_x - .offset: 62 .size: 2 .value_kind: hidden_group_size_y - .offset: 64 .size: 2 .value_kind: hidden_group_size_z - .offset: 66 .size: 2 .value_kind: hidden_remainder_x - .offset: 68 .size: 2 .value_kind: hidden_remainder_y - .offset: 70 .size: 2 .value_kind: hidden_remainder_z - .offset: 88 .size: 8 .value_kind: hidden_global_offset_x - .offset: 96 .size: 8 .value_kind: hidden_global_offset_y - .offset: 104 .size: 8 .value_kind: hidden_global_offset_z - .offset: 112 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 304 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: DmeanSquareLoss .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: DmeanSquareLoss.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 10 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
d18813cc0cd16d0f427b5f8c321628d371a2f788
#include "includes.h" __global__ void chol_kernel_cudaUFMG_division(float * U, int elem_per_thr) { // Get a thread identifier int tx = blockIdx.x * blockDim.x + threadIdx.x; int ty = blockIdx.y * blockDim.y + threadIdx.y; int tn = ty * blockDim.x * gridDim.x + tx; //#define DEBUGDIV #ifdef DEBUGDIV int dbg = 0; if(blockIdx.x == 4){ if(blockIdx.y == 5){ if(threadIdx.x == 2){ if(threadIdx.y == 1){ dbg = 1; printf("\n\n"); printf("\ntx=%d \nty=%d \ntn=%d", tx, ty, tn); } } } } #endif for(unsigned i=0;i<elem_per_thr;i++){ int iel = tn * elem_per_thr + i; int xval = iel % MATRIX_SIZE; int yval = iel / MATRIX_SIZE; if(xval == yval){ continue; } #ifdef DEBUGDIV if(dbg == 1){ if(i==37){ printf("\niel=%d \nxval=%d \nyval=%d", iel, xval, yval); } } #endif // if on the lower diagonal... if(yval > xval){ xval = MATRIX_SIZE - xval - 1; yval = MATRIX_SIZE - yval - 1; } int iU = xval + yval * MATRIX_SIZE; int iDiag = yval + yval * MATRIX_SIZE; #ifdef DEBUGDIV if(dbg == 1){ if(i==37){ printf("\nxtrans=%d \nytrans=%d \niU=%d \niDiag=%d", xval, yval, iU, iDiag); printf("\n\n"); } } #endif U[iU] /= U[iDiag]; } }
.file "tmpxft_002bff9e_00000000-6_chol_kernel_cudaUFMG_division.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z50__device_stub__Z29chol_kernel_cudaUFMG_divisionPfiPfi .type _Z50__device_stub__Z29chol_kernel_cudaUFMG_divisionPfiPfi, @function _Z50__device_stub__Z29chol_kernel_cudaUFMG_divisionPfiPfi: .LFB2032: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movl %esi, 4(%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) leaq 4(%rsp), %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z29chol_kernel_cudaUFMG_divisionPfi(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L2: movq 104(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z50__device_stub__Z29chol_kernel_cudaUFMG_divisionPfiPfi, .-_Z50__device_stub__Z29chol_kernel_cudaUFMG_divisionPfiPfi .globl _Z29chol_kernel_cudaUFMG_divisionPfi .type _Z29chol_kernel_cudaUFMG_divisionPfi, @function _Z29chol_kernel_cudaUFMG_divisionPfi: .LFB2033: .cfi_startproc endbr64 jmp _Z50__device_stub__Z29chol_kernel_cudaUFMG_divisionPfiPfi .cfi_endproc .LFE2033: .size _Z29chol_kernel_cudaUFMG_divisionPfi, .-_Z29chol_kernel_cudaUFMG_divisionPfi .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z29chol_kernel_cudaUFMG_divisionPfi" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z29chol_kernel_cudaUFMG_divisionPfi(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z29chol_kernel_cudaUFMG_divisionPfi .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e220000002600 */ /*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x168], PT ; /* 0x00005a00ff007a0c */ /* 0x000fc60003f05270 */ /*0030*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e680000002200 */ /*0040*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */ /* 0x000ea80000002500 */ /*0050*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000ee40000002100 */ /*0060*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0070*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff097624 */ /* 0x000fe200078e00ff */ /*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0090*/ IMAD R0, R0, c[0x0][0x4], R3 ; /* 0x0000010000007a24 */ /* 0x003fc600078e0203 */ /*00a0*/ IADD3 R2, R9.reuse, -0x1, RZ ; /* 0xffffffff09027810 */ /* 0x040fe20007ffe0ff */ /*00b0*/ IMAD R0, R0, c[0x0][0xc], R5 ; /* 0x0000030000007a24 */ /* 0x004fe200078e0205 */ /*00c0*/ LOP3.LUT R12, R9, 0x3, RZ, 0xc0, !PT ; /* 0x00000003090c7812 */ /* 0x000fe200078ec0ff */ /*00d0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */ /* 0x000fe200078e00ff */ /*00e0*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */ /* 0x000fe20003f06070 */ /*00f0*/ IMAD R2, R0, c[0x0][0x0], R7 ; /* 0x0000000000027a24 */ /* 0x008fd800078e0207 */ /*0100*/ @!P0 BRA 0xa00 ; /* 0x000008f000008947 */ /* 0x000fea0003800000 */ /*0110*/ IMAD R4, R2, R9, 0x3 ; /* 0x0000000302047424 */ /* 0x000fe200078e0209 */ /*0120*/ IADD3 R6, R12, -c[0x0][0x168], RZ ; /* 0x80005a000c067a10 */ /* 0x000fe20007ffe0ff */ /*0130*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */ /* 0x000fc600078e00ff */ /*0140*/ IADD3 R0, R4, -0x3, RZ ; /* 0xfffffffd04007810 */ /* 0x000fe20007ffe0ff */ /*0150*/ BSSY B0, 0x360 ; /* 0x0000020000007945 */ /* 0x000fe60003800000 */ /*0160*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */ /* 0x001fc80000011400 */ /*0170*/ LEA.HI R3, R3, R0, RZ, 0xb ; /* 0x0000000003037211 */ /* 0x000fc800078f58ff */ /*0180*/ LOP3.LUT R7, R3, 0xfffff800, RZ, 0xc0, !PT ; /* 0xfffff80003077812 */ /* 0x000fe400078ec0ff */ /*0190*/ SHF.R.S32.HI R3, RZ, 0xb, R3 ; /* 0x0000000bff037819 */ /* 0x000fc60000011403 */ /*01a0*/ IMAD.IADD R0, R0, 0x1, -R7 ; /* 0x0000000100007824 */ /* 0x000fca00078e0a07 */ /*01b0*/ ISETP.NE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x000fda0003f05270 */ /*01c0*/ @!P0 BRA 0x350 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*01d0*/ ISETP.GT.AND P0, PT, R3, R0, PT ; /* 0x000000000300720c */ /* 0x000fe20003f04270 */ /*01e0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */ /* 0x000fd800078e00ff */ /*01f0*/ @P0 IADD3 R3, -R3, 0x7ff, RZ ; /* 0x000007ff03030810 */ /* 0x000fca0007ffe1ff */ /*0200*/ IMAD R10, R3, 0x801, RZ ; /* 0x00000801030a7824 */ /* 0x000fc800078e02ff */ /*0210*/ IMAD.WIDE R10, R10, R9, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fe200078e0209 */ /*0220*/ @P0 IADD3 R0, -R0, 0x7ff, RZ ; /* 0x000007ff00000810 */ /* 0x000fca0007ffe1ff */ /*0230*/ LDG.E R11, [R10.64] ; /* 0x000000040a0b7981 */ /* 0x000ea2000c1e1900 */ /*0240*/ IMAD R8, R3, 0x800, R0 ; /* 0x0000080003087824 */ /* 0x000fc800078e0200 */ /*0250*/ IMAD.WIDE R8, R8, R9, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x000fca00078e0209 */ /*0260*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000ee2000c1e1900 */ /*0270*/ BSSY B1, 0x340 ; /* 0x000000c000017945 */ /* 0x000fe20003800000 */ /*0280*/ MUFU.RCP R3, R11 ; /* 0x0000000b00037308 */ /* 0x004e300000001000 */ /*0290*/ FCHK P0, R0, R11 ; /* 0x0000000b00007302 */ /* 0x008e620000000000 */ /*02a0*/ FFMA R14, -R11, R3, 1 ; /* 0x3f8000000b0e7423 */ /* 0x001fc80000000103 */ /*02b0*/ FFMA R3, R3, R14, R3 ; /* 0x0000000e03037223 */ /* 0x000fc80000000003 */ /*02c0*/ FFMA R14, R0, R3, RZ ; /* 0x00000003000e7223 */ /* 0x000fc800000000ff */ /*02d0*/ FFMA R7, -R11, R14, R0 ; /* 0x0000000e0b077223 */ /* 0x000fc80000000100 */ /*02e0*/ FFMA R3, R3, R7, R14 ; /* 0x0000000703037223 */ /* 0x000fe2000000000e */ /*02f0*/ @!P0 BRA 0x330 ; /* 0x0000003000008947 */ /* 0x002fea0003800000 */ /*0300*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */ /* 0x000fe200078e000b */ /*0310*/ MOV R10, 0x330 ; /* 0x00000330000a7802 */ /* 0x000fe40000000f00 */ /*0320*/ CALL.REL.NOINC 0xc90 ; /* 0x0000096000007944 */ /* 0x000fea0003c00000 */ /*0330*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0340*/ STG.E [R8.64], R3 ; /* 0x0000000308007986 */ /* 0x0001e4000c101904 */ /*0350*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0360*/ IADD3 R0, R4, -0x2, RZ ; /* 0xfffffffe04007810 */ /* 0x000fe20007ffe0ff */ /*0370*/ BSSY B0, 0x580 ; /* 0x0000020000007945 */ /* 0x000fe60003800000 */ /*0380*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */ /* 0x001fc80000011400 */ /*0390*/ LEA.HI R3, R3, R0, RZ, 0xb ; /* 0x0000000003037211 */ /* 0x000fc800078f58ff */ /*03a0*/ LOP3.LUT R7, R3, 0xfffff800, RZ, 0xc0, !PT ; /* 0xfffff80003077812 */ /* 0x000fe400078ec0ff */ /*03b0*/ SHF.R.S32.HI R3, RZ, 0xb, R3 ; /* 0x0000000bff037819 */ /* 0x000fc60000011403 */ /*03c0*/ IMAD.IADD R0, R0, 0x1, -R7 ; /* 0x0000000100007824 */ /* 0x000fca00078e0a07 */ /*03d0*/ ISETP.NE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x000fda0003f05270 */ /*03e0*/ @!P0 BRA 0x570 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*03f0*/ ISETP.GT.AND P0, PT, R3, R0, PT ; /* 0x000000000300720c */ /* 0x000fe20003f04270 */ /*0400*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */ /* 0x000fd800078e00ff */ /*0410*/ @P0 IADD3 R3, -R3, 0x7ff, RZ ; /* 0x000007ff03030810 */ /* 0x000fca0007ffe1ff */ /*0420*/ IMAD R10, R3, 0x801, RZ ; /* 0x00000801030a7824 */ /* 0x000fc800078e02ff */ /*0430*/ IMAD.WIDE R10, R10, R9, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fe200078e0209 */ /*0440*/ @P0 IADD3 R0, -R0, 0x7ff, RZ ; /* 0x000007ff00000810 */ /* 0x000fca0007ffe1ff */ /*0450*/ LDG.E R11, [R10.64] ; /* 0x000000040a0b7981 */ /* 0x000ea2000c1e1900 */ /*0460*/ IMAD R8, R3, 0x800, R0 ; /* 0x0000080003087824 */ /* 0x000fc800078e0200 */ /*0470*/ IMAD.WIDE R8, R8, R9, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x000fca00078e0209 */ /*0480*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000ee2000c1e1900 */ /*0490*/ BSSY B1, 0x560 ; /* 0x000000c000017945 */ /* 0x000fe20003800000 */ /*04a0*/ MUFU.RCP R3, R11 ; /* 0x0000000b00037308 */ /* 0x004e300000001000 */ /*04b0*/ FCHK P0, R0, R11 ; /* 0x0000000b00007302 */ /* 0x008e620000000000 */ /*04c0*/ FFMA R14, -R11, R3, 1 ; /* 0x3f8000000b0e7423 */ /* 0x001fc80000000103 */ /*04d0*/ FFMA R3, R3, R14, R3 ; /* 0x0000000e03037223 */ /* 0x000fc80000000003 */ /*04e0*/ FFMA R14, R0, R3, RZ ; /* 0x00000003000e7223 */ /* 0x000fc800000000ff */ /*04f0*/ FFMA R7, -R11, R14, R0 ; /* 0x0000000e0b077223 */ /* 0x000fc80000000100 */ /*0500*/ FFMA R3, R3, R7, R14 ; /* 0x0000000703037223 */ /* 0x000fe2000000000e */ /*0510*/ @!P0 BRA 0x550 ; /* 0x0000003000008947 */ /* 0x002fea0003800000 */ /*0520*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */ /* 0x000fe200078e000b */ /*0530*/ MOV R10, 0x550 ; /* 0x00000550000a7802 */ /* 0x000fe40000000f00 */ /*0540*/ CALL.REL.NOINC 0xc90 ; /* 0x0000074000007944 */ /* 0x000fea0003c00000 */ /*0550*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0560*/ STG.E [R8.64], R3 ; /* 0x0000000308007986 */ /* 0x0001e4000c101904 */ /*0570*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0580*/ IADD3 R0, R4, -0x1, RZ ; /* 0xffffffff04007810 */ /* 0x000fe20007ffe0ff */ /*0590*/ BSSY B0, 0x7a0 ; /* 0x0000020000007945 */ /* 0x000fe60003800000 */ /*05a0*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */ /* 0x001fc80000011400 */ /*05b0*/ LEA.HI R3, R3, R0, RZ, 0xb ; /* 0x0000000003037211 */ /* 0x000fc800078f58ff */ /*05c0*/ LOP3.LUT R7, R3, 0xfffff800, RZ, 0xc0, !PT ; /* 0xfffff80003077812 */ /* 0x000fe400078ec0ff */ /*05d0*/ SHF.R.S32.HI R3, RZ, 0xb, R3 ; /* 0x0000000bff037819 */ /* 0x000fc60000011403 */ /*05e0*/ IMAD.IADD R0, R0, 0x1, -R7 ; /* 0x0000000100007824 */ /* 0x000fca00078e0a07 */ /*05f0*/ ISETP.NE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x000fda0003f05270 */ /*0600*/ @!P0 BRA 0x790 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*0610*/ ISETP.GT.AND P0, PT, R3, R0, PT ; /* 0x000000000300720c */ /* 0x000fe20003f04270 */ /*0620*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */ /* 0x000fd800078e00ff */ /*0630*/ @P0 IADD3 R3, -R3, 0x7ff, RZ ; /* 0x000007ff03030810 */ /* 0x000fca0007ffe1ff */ /*0640*/ IMAD R10, R3, 0x801, RZ ; /* 0x00000801030a7824 */ /* 0x000fc800078e02ff */ /*0650*/ IMAD.WIDE R10, R10, R9, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fe200078e0209 */ /*0660*/ @P0 IADD3 R0, -R0, 0x7ff, RZ ; /* 0x000007ff00000810 */ /* 0x000fca0007ffe1ff */ /*0670*/ LDG.E R11, [R10.64] ; /* 0x000000040a0b7981 */ /* 0x000ea2000c1e1900 */ /*0680*/ IMAD R8, R3, 0x800, R0 ; /* 0x0000080003087824 */ /* 0x000fc800078e0200 */ /*0690*/ IMAD.WIDE R8, R8, R9, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x000fca00078e0209 */ /*06a0*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000ee2000c1e1900 */ /*06b0*/ BSSY B1, 0x780 ; /* 0x000000c000017945 */ /* 0x000fe20003800000 */ /*06c0*/ MUFU.RCP R3, R11 ; /* 0x0000000b00037308 */ /* 0x004e300000001000 */ /*06d0*/ FCHK P0, R0, R11 ; /* 0x0000000b00007302 */ /* 0x008e620000000000 */ /*06e0*/ FFMA R14, -R11, R3, 1 ; /* 0x3f8000000b0e7423 */ /* 0x001fc80000000103 */ /*06f0*/ FFMA R3, R3, R14, R3 ; /* 0x0000000e03037223 */ /* 0x000fc80000000003 */ /*0700*/ FFMA R14, R0, R3, RZ ; /* 0x00000003000e7223 */ /* 0x000fc800000000ff */ /*0710*/ FFMA R7, -R11, R14, R0 ; /* 0x0000000e0b077223 */ /* 0x000fc80000000100 */ /*0720*/ FFMA R3, R3, R7, R14 ; /* 0x0000000703037223 */ /* 0x000fe2000000000e */ /*0730*/ @!P0 BRA 0x770 ; /* 0x0000003000008947 */ /* 0x002fea0003800000 */ /*0740*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */ /* 0x000fe200078e000b */ /*0750*/ MOV R10, 0x770 ; /* 0x00000770000a7802 */ /* 0x000fe40000000f00 */ /*0760*/ CALL.REL.NOINC 0xc90 ; /* 0x0000052000007944 */ /* 0x000fea0003c00000 */ /*0770*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0780*/ STG.E [R8.64], R3 ; /* 0x0000000308007986 */ /* 0x0001e4000c101904 */ /*0790*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*07a0*/ SHF.R.S32.HI R3, RZ, 0x1f, R4 ; /* 0x0000001fff037819 */ /* 0x001fe20000011404 */ /*07b0*/ BSSY B0, 0x9b0 ; /* 0x000001f000007945 */ /* 0x000fe60003800000 */ /*07c0*/ LEA.HI R3, R3, R4, RZ, 0xb ; /* 0x0000000403037211 */ /* 0x000fc800078f58ff */ /*07d0*/ LOP3.LUT R7, R3, 0xfffff800, RZ, 0xc0, !PT ; /* 0xfffff80003077812 */ /* 0x000fe400078ec0ff */ /*07e0*/ SHF.R.S32.HI R0, RZ, 0xb, R3 ; /* 0x0000000bff007819 */ /* 0x000fc60000011403 */ /*07f0*/ IMAD.IADD R7, R4, 0x1, -R7 ; /* 0x0000000104077824 */ /* 0x000fca00078e0a07 */ /*0800*/ ISETP.NE.AND P0, PT, R7, R0, PT ; /* 0x000000000700720c */ /* 0x000fda0003f05270 */ /*0810*/ @!P0 BRA 0x9a0 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*0820*/ ISETP.GT.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x000fe20003f04270 */ /*0830*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */ /* 0x000fd800078e00ff */ /*0840*/ @P0 IADD3 R0, -R0, 0x7ff, RZ ; /* 0x000007ff00000810 */ /* 0x000fca0007ffe1ff */ /*0850*/ IMAD R10, R0, 0x801, RZ ; /* 0x00000801000a7824 */ /* 0x000fc800078e02ff */ /*0860*/ IMAD.WIDE R10, R10, R9, c[0x0][0x160] ; /* 0x000058000a0a7625 */ /* 0x000fe200078e0209 */ /*0870*/ @P0 IADD3 R7, -R7, 0x7ff, RZ ; /* 0x000007ff07070810 */ /* 0x000fca0007ffe1ff */ /*0880*/ LDG.E R11, [R10.64] ; /* 0x000000040a0b7981 */ /* 0x000ea2000c1e1900 */ /*0890*/ IMAD R8, R0, 0x800, R7 ; /* 0x0000080000087824 */ /* 0x000fc800078e0207 */ /*08a0*/ IMAD.WIDE R8, R8, R9, c[0x0][0x160] ; /* 0x0000580008087625 */ /* 0x000fca00078e0209 */ /*08b0*/ LDG.E R0, [R8.64] ; /* 0x0000000408007981 */ /* 0x000ee2000c1e1900 */ /*08c0*/ BSSY B1, 0x990 ; /* 0x000000c000017945 */ /* 0x000fe20003800000 */ /*08d0*/ MUFU.RCP R3, R11 ; /* 0x0000000b00037308 */ /* 0x004e300000001000 */ /*08e0*/ FCHK P0, R0, R11 ; /* 0x0000000b00007302 */ /* 0x008e620000000000 */ /*08f0*/ FFMA R14, -R11, R3, 1 ; /* 0x3f8000000b0e7423 */ /* 0x001fc80000000103 */ /*0900*/ FFMA R3, R3, R14, R3 ; /* 0x0000000e03037223 */ /* 0x000fc80000000003 */ /*0910*/ FFMA R14, R0, R3, RZ ; /* 0x00000003000e7223 */ /* 0x000fc800000000ff */ /*0920*/ FFMA R7, -R11, R14, R0 ; /* 0x0000000e0b077223 */ /* 0x000fc80000000100 */ /*0930*/ FFMA R3, R3, R7, R14 ; /* 0x0000000703037223 */ /* 0x000fe2000000000e */ /*0940*/ @!P0 BRA 0x980 ; /* 0x0000003000008947 */ /* 0x002fea0003800000 */ /*0950*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ; /* 0x000000ffff037224 */ /* 0x000fe200078e000b */ /*0960*/ MOV R10, 0x980 ; /* 0x00000980000a7802 */ /* 0x000fe40000000f00 */ /*0970*/ CALL.REL.NOINC 0xc90 ; /* 0x0000031000007944 */ /* 0x000fea0003c00000 */ /*0980*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0990*/ STG.E [R8.64], R3 ; /* 0x0000000308007986 */ /* 0x0001e4000c101904 */ /*09a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*09b0*/ IADD3 R5, R5, 0x4, RZ ; /* 0x0000000405057810 */ /* 0x000fe40007ffe0ff */ /*09c0*/ IADD3 R4, R4, 0x4, RZ ; /* 0x0000000404047810 */ /* 0x000fc60007ffe0ff */ /*09d0*/ IMAD.IADD R0, R6, 0x1, R5 ; /* 0x0000000106007824 */ /* 0x000fca00078e0205 */ /*09e0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*09f0*/ @P0 BRA 0x140 ; /* 0xfffff74000000947 */ /* 0x000fea000383ffff */ /*0a00*/ ISETP.NE.AND P0, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fda0003f05270 */ /*0a10*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0a20*/ IMAD R2, R2, c[0x0][0x168], R5 ; /* 0x00005a0002027a24 */ /* 0x000fca00078e0205 */ /*0a30*/ SHF.R.S32.HI R3, RZ, 0x1f, R2 ; /* 0x0000001fff037819 */ /* 0x001fe20000011402 */ /*0a40*/ BSSY B0, 0xc40 ; /* 0x000001f000007945 */ /* 0x000fe60003800000 */ /*0a50*/ LEA.HI R3, R3, R2, RZ, 0xb ; /* 0x0000000203037211 */ /* 0x000fc800078f58ff */ /*0a60*/ LOP3.LUT R5, R3, 0xfffff800, RZ, 0xc0, !PT ; /* 0xfffff80003057812 */ /* 0x000fe400078ec0ff */ /*0a70*/ SHF.R.S32.HI R3, RZ, 0xb, R3 ; /* 0x0000000bff037819 */ /* 0x000fc60000011403 */ /*0a80*/ IMAD.IADD R0, R2, 0x1, -R5 ; /* 0x0000000102007824 */ /* 0x000fca00078e0a05 */ /*0a90*/ ISETP.NE.AND P0, PT, R0, R3, PT ; /* 0x000000030000720c */ /* 0x000fda0003f05270 */ /*0aa0*/ @!P0 BRA 0xc30 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*0ab0*/ ISETP.GT.AND P0, PT, R3, R0, PT ; /* 0x000000000300720c */ /* 0x000fe20003f04270 */ /*0ac0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fd800078e00ff */ /*0ad0*/ @P0 IADD3 R3, -R3, 0x7ff, RZ ; /* 0x000007ff03030810 */ /* 0x000fca0007ffe1ff */ /*0ae0*/ IMAD R6, R3, 0x801, RZ ; /* 0x0000080103067824 */ /* 0x000fc800078e02ff */ /*0af0*/ IMAD.WIDE R6, R6, R5, c[0x0][0x160] ; /* 0x0000580006067625 */ /* 0x000fe200078e0205 */ /*0b00*/ @P0 IADD3 R0, -R0, 0x7ff, RZ ; /* 0x000007ff00000810 */ /* 0x000fca0007ffe1ff */ /*0b10*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */ /* 0x000ea2000c1e1900 */ /*0b20*/ IMAD R4, R3, 0x800, R0 ; /* 0x0000080003047824 */ /* 0x000fc800078e0200 */ /*0b30*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fca00078e0205 */ /*0b40*/ LDG.E R0, [R4.64] ; /* 0x0000000404007981 */ /* 0x000ee2000c1e1900 */ /*0b50*/ BSSY B1, 0xc20 ; /* 0x000000c000017945 */ /* 0x000fe20003800000 */ /*0b60*/ MUFU.RCP R3, R7 ; /* 0x0000000700037308 */ /* 0x004e300000001000 */ /*0b70*/ FCHK P0, R0, R7 ; /* 0x0000000700007302 */ /* 0x008e620000000000 */ /*0b80*/ FFMA R8, -R7, R3, 1 ; /* 0x3f80000007087423 */ /* 0x001fc80000000103 */ /*0b90*/ FFMA R3, R3, R8, R3 ; /* 0x0000000803037223 */ /* 0x000fc80000000003 */ /*0ba0*/ FFMA R8, R0, R3, RZ ; /* 0x0000000300087223 */ /* 0x000fc800000000ff */ /*0bb0*/ FFMA R9, -R7, R8, R0 ; /* 0x0000000807097223 */ /* 0x000fc80000000100 */ /*0bc0*/ FFMA R3, R3, R9, R8 ; /* 0x0000000903037223 */ /* 0x000fe20000000008 */ /*0bd0*/ @!P0 BRA 0xc10 ; /* 0x0000003000008947 */ /* 0x002fea0003800000 */ /*0be0*/ IMAD.MOV.U32 R3, RZ, RZ, R7 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0007 */ /*0bf0*/ MOV R10, 0xc10 ; /* 0x00000c10000a7802 */ /* 0x000fe40000000f00 */ /*0c00*/ CALL.REL.NOINC 0xc90 ; /* 0x0000008000007944 */ /* 0x000fea0003c00000 */ /*0c10*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0c20*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x0001e4000c101904 */ /*0c30*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0c40*/ IADD3 R12, R12, -0x1, RZ ; /* 0xffffffff0c0c7810 */ /* 0x000fe40007ffe0ff */ /*0c50*/ IADD3 R2, R2, 0x1, RZ ; /* 0x0000000102027810 */ /* 0x000fe40007ffe0ff */ /*0c60*/ ISETP.NE.AND P0, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fda0003f05270 */ /*0c70*/ @P0 BRA 0xa30 ; /* 0xfffffdb000000947 */ /* 0x000fea000383ffff */ /*0c80*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0c90*/ SHF.R.U32.HI R11, RZ, 0x17, R3 ; /* 0x00000017ff0b7819 */ /* 0x000fe20000011603 */ /*0ca0*/ BSSY B2, 0x12d0 ; /* 0x0000062000027945 */ /* 0x000fe20003800000 */ /*0cb0*/ SHF.R.U32.HI R7, RZ, 0x17, R0 ; /* 0x00000017ff077819 */ /* 0x000fe40000011600 */ /*0cc0*/ LOP3.LUT R11, R11, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0b0b7812 */ /* 0x000fe400078ec0ff */ /*0cd0*/ LOP3.LUT R16, R7, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff07107812 */ /* 0x000fe400078ec0ff */ /*0ce0*/ IADD3 R14, R11, -0x1, RZ ; /* 0xffffffff0b0e7810 */ /* 0x000fe40007ffe0ff */ /*0cf0*/ IADD3 R13, R16, -0x1, RZ ; /* 0xffffffff100d7810 */ /* 0x000fc40007ffe0ff */ /*0d00*/ ISETP.GT.U32.AND P0, PT, R14, 0xfd, PT ; /* 0x000000fd0e00780c */ /* 0x000fc80003f04070 */ /*0d10*/ ISETP.GT.U32.OR P0, PT, R13, 0xfd, P0 ; /* 0x000000fd0d00780c */ /* 0x000fda0000704470 */ /*0d20*/ @!P0 IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff078224 */ /* 0x000fe200078e00ff */ /*0d30*/ @!P0 BRA 0xeb0 ; /* 0x0000017000008947 */ /* 0x000fea0003800000 */ /*0d40*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fe40003f1c200 */ /*0d50*/ FSETP.GTU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fc80003f3c200 */ /*0d60*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0d70*/ @P0 BRA 0x12b0 ; /* 0x0000053000000947 */ /* 0x000fea0003800000 */ /*0d80*/ LOP3.LUT P0, RZ, R3, 0x7fffffff, R0, 0xc8, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fda000780c800 */ /*0d90*/ @!P0 BRA 0x1290 ; /* 0x000004f000008947 */ /* 0x000fea0003800000 */ /*0da0*/ FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ; /* 0x7f8000000000780b */ /* 0x040fe40003f5d200 */ /*0db0*/ FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f3d200 */ /*0dc0*/ FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fd60003f1d200 */ /*0dd0*/ @!P1 BRA !P2, 0x1290 ; /* 0x000004b000009947 */ /* 0x000fea0005000000 */ /*0de0*/ LOP3.LUT P2, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff00ff7812 */ /* 0x000fc8000784c0ff */ /*0df0*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*0e00*/ @P1 BRA 0x1270 ; /* 0x0000046000001947 */ /* 0x000fea0003800000 */ /*0e10*/ LOP3.LUT P1, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03ff7812 */ /* 0x000fc8000782c0ff */ /*0e20*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*0e30*/ @P0 BRA 0x1240 ; /* 0x0000040000000947 */ /* 0x000fea0003800000 */ /*0e40*/ ISETP.GE.AND P0, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */ /* 0x000fe40003f06270 */ /*0e50*/ ISETP.GE.AND P1, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fd60003f26270 */ /*0e60*/ @P0 IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff070224 */ /* 0x000fe200078e00ff */ /*0e70*/ @!P0 FFMA R0, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000008823 */ /* 0x000fe200000000ff */ /*0e80*/ @!P0 IMAD.MOV.U32 R7, RZ, RZ, -0x40 ; /* 0xffffffc0ff078424 */ /* 0x000fe200078e00ff */ /*0e90*/ @!P1 FFMA R3, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003039823 */ /* 0x000fc800000000ff */ /*0ea0*/ @!P1 IADD3 R7, R7, 0x40, RZ ; /* 0x0000004007079810 */ /* 0x000fe40007ffe0ff */ /*0eb0*/ LEA R14, R11, 0xc0800000, 0x17 ; /* 0xc08000000b0e7811 */ /* 0x000fe200078eb8ff */ /*0ec0*/ BSSY B3, 0x1230 ; /* 0x0000036000037945 */ /* 0x000fe80003800000 */ /*0ed0*/ IMAD.IADD R14, R3, 0x1, -R14 ; /* 0x00000001030e7824 */ /* 0x000fe200078e0a0e */ /*0ee0*/ IADD3 R3, R16, -0x7f, RZ ; /* 0xffffff8110037810 */ /* 0x000fc60007ffe0ff */ /*0ef0*/ MUFU.RCP R13, R14 ; /* 0x0000000e000d7308 */ /* 0x0000620000001000 */ /*0f00*/ FADD.FTZ R15, -R14, -RZ ; /* 0x800000ff0e0f7221 */ /* 0x000fe20000010100 */ /*0f10*/ IMAD R0, R3.reuse, -0x800000, R0 ; /* 0xff80000003007824 */ /* 0x040fe200078e0200 */ /*0f20*/ IADD3 R14, R3, 0x7f, -R11 ; /* 0x0000007f030e7810 */ /* 0x001fca0007ffe80b */ /*0f30*/ IMAD.IADD R14, R14, 0x1, R7 ; /* 0x000000010e0e7824 */ /* 0x000fe200078e0207 */ /*0f40*/ FFMA R16, R13, R15, 1 ; /* 0x3f8000000d107423 */ /* 0x002fc8000000000f */ /*0f50*/ FFMA R18, R13, R16, R13 ; /* 0x000000100d127223 */ /* 0x000fc8000000000d */ /*0f60*/ FFMA R13, R0, R18, RZ ; /* 0x00000012000d7223 */ /* 0x000fc800000000ff */ /*0f70*/ FFMA R16, R15, R13, R0 ; /* 0x0000000d0f107223 */ /* 0x000fc80000000000 */ /*0f80*/ FFMA R13, R18, R16, R13 ; /* 0x00000010120d7223 */ /* 0x000fc8000000000d */ /*0f90*/ FFMA R16, R15, R13, R0 ; /* 0x0000000d0f107223 */ /* 0x000fc80000000000 */ /*0fa0*/ FFMA R0, R18, R16, R13 ; /* 0x0000001012007223 */ /* 0x000fca000000000d */ /*0fb0*/ SHF.R.U32.HI R3, RZ, 0x17, R0 ; /* 0x00000017ff037819 */ /* 0x000fc80000011600 */ /*0fc0*/ LOP3.LUT R3, R3, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff03037812 */ /* 0x000fca00078ec0ff */ /*0fd0*/ IMAD.IADD R11, R3, 0x1, R14 ; /* 0x00000001030b7824 */ /* 0x000fca00078e020e */ /*0fe0*/ IADD3 R3, R11, -0x1, RZ ; /* 0xffffffff0b037810 */ /* 0x000fc80007ffe0ff */ /*0ff0*/ ISETP.GE.U32.AND P0, PT, R3, 0xfe, PT ; /* 0x000000fe0300780c */ /* 0x000fda0003f06070 */ /*1000*/ @!P0 BRA 0x1210 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*1010*/ ISETP.GT.AND P0, PT, R11, 0xfe, PT ; /* 0x000000fe0b00780c */ /* 0x000fda0003f04270 */ /*1020*/ @P0 BRA 0x11e0 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*1030*/ ISETP.GE.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fda0003f06270 */ /*1040*/ @P0 BRA 0x1220 ; /* 0x000001d000000947 */ /* 0x000fea0003800000 */ /*1050*/ ISETP.GE.AND P0, PT, R11, -0x18, PT ; /* 0xffffffe80b00780c */ /* 0x000fe40003f06270 */ /*1060*/ LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000000007812 */ /* 0x000fd600078ec0ff */ /*1070*/ @!P0 BRA 0x1220 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*1080*/ FFMA.RZ R3, R18.reuse, R16.reuse, R13.reuse ; /* 0x0000001012037223 */ /* 0x1c0fe2000000c00d */ /*1090*/ FFMA.RM R14, R18.reuse, R16.reuse, R13.reuse ; /* 0x00000010120e7223 */ /* 0x1c0fe2000000400d */ /*10a0*/ ISETP.NE.AND P2, PT, R11.reuse, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x040fe40003f45270 */ /*10b0*/ ISETP.NE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe40003f25270 */ /*10c0*/ LOP3.LUT R7, R3, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff03077812 */ /* 0x000fe200078ec0ff */ /*10d0*/ FFMA.RP R3, R18, R16, R13 ; /* 0x0000001012037223 */ /* 0x000fe2000000800d */ /*10e0*/ IADD3 R16, R11, 0x20, RZ ; /* 0x000000200b107810 */ /* 0x000fe20007ffe0ff */ /*10f0*/ IMAD.MOV R11, RZ, RZ, -R11 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e0a0b */ /*1100*/ LOP3.LUT R7, R7, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000007077812 */ /* 0x000fc400078efcff */ /*1110*/ FSETP.NEU.FTZ.AND P0, PT, R3, R14, PT ; /* 0x0000000e0300720b */ /* 0x000fe40003f1d000 */ /*1120*/ SHF.L.U32 R16, R7, R16, RZ ; /* 0x0000001007107219 */ /* 0x000fe400000006ff */ /*1130*/ SEL R14, R11, RZ, P2 ; /* 0x000000ff0b0e7207 */ /* 0x000fe40001000000 */ /*1140*/ ISETP.NE.AND P1, PT, R16, RZ, P1 ; /* 0x000000ff1000720c */ /* 0x000fe40000f25270 */ /*1150*/ SHF.R.U32.HI R14, RZ, R14, R7 ; /* 0x0000000eff0e7219 */ /* 0x000fe40000011607 */ /*1160*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40000703570 */ /*1170*/ SHF.R.U32.HI R16, RZ, 0x1, R14 ; /* 0x00000001ff107819 */ /* 0x000fe4000001160e */ /*1180*/ SEL R3, RZ, 0x1, !P0 ; /* 0x00000001ff037807 */ /* 0x000fc80004000000 */ /*1190*/ LOP3.LUT R3, R3, 0x1, R16, 0xf8, !PT ; /* 0x0000000103037812 */ /* 0x000fc800078ef810 */ /*11a0*/ LOP3.LUT R3, R3, R14, RZ, 0xc0, !PT ; /* 0x0000000e03037212 */ /* 0x000fca00078ec0ff */ /*11b0*/ IMAD.IADD R3, R16, 0x1, R3 ; /* 0x0000000110037824 */ /* 0x000fca00078e0203 */ /*11c0*/ LOP3.LUT R0, R3, R0, RZ, 0xfc, !PT ; /* 0x0000000003007212 */ /* 0x000fe200078efcff */ /*11d0*/ BRA 0x1220 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*11e0*/ LOP3.LUT R0, R0, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000000007812 */ /* 0x000fc800078ec0ff */ /*11f0*/ LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000000007812 */ /* 0x000fe200078efcff */ /*1200*/ BRA 0x1220 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1210*/ IMAD R0, R14, 0x800000, R0 ; /* 0x008000000e007824 */ /* 0x000fe400078e0200 */ /*1220*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*1230*/ BRA 0x12c0 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*1240*/ LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ; /* 0x8000000003007812 */ /* 0x000fc800078e4800 */ /*1250*/ LOP3.LUT R0, R0, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000000007812 */ /* 0x000fe200078efcff */ /*1260*/ BRA 0x12c0 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*1270*/ LOP3.LUT R0, R3, 0x80000000, R0, 0x48, !PT ; /* 0x8000000003007812 */ /* 0x000fe200078e4800 */ /*1280*/ BRA 0x12c0 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*1290*/ MUFU.RSQ R0, -QNAN ; /* 0xffc0000000007908 */ /* 0x000e220000001400 */ /*12a0*/ BRA 0x12c0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*12b0*/ FADD.FTZ R0, R0, R3 ; /* 0x0000000300007221 */ /* 0x000fe40000010000 */ /*12c0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*12d0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x0 ; /* 0x00000000ff0b7424 */ /* 0x000fe400078e00ff */ /*12e0*/ IMAD.MOV.U32 R3, RZ, RZ, R0 ; /* 0x000000ffff037224 */ /* 0x001fe400078e0000 */ /*12f0*/ RET.REL.NODEC R10 0x0 ; /* 0xffffed000a007950 */ /* 0x000fea0003c3ffff */ /*1300*/ BRA 0x1300; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1310*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1320*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1330*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1340*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1350*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1360*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1370*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1380*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1390*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*13a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*13b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*13c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*13d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*13e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*13f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void chol_kernel_cudaUFMG_division(float * U, int elem_per_thr) { // Get a thread identifier int tx = blockIdx.x * blockDim.x + threadIdx.x; int ty = blockIdx.y * blockDim.y + threadIdx.y; int tn = ty * blockDim.x * gridDim.x + tx; //#define DEBUGDIV #ifdef DEBUGDIV int dbg = 0; if(blockIdx.x == 4){ if(blockIdx.y == 5){ if(threadIdx.x == 2){ if(threadIdx.y == 1){ dbg = 1; printf("\n\n"); printf("\ntx=%d \nty=%d \ntn=%d", tx, ty, tn); } } } } #endif for(unsigned i=0;i<elem_per_thr;i++){ int iel = tn * elem_per_thr + i; int xval = iel % MATRIX_SIZE; int yval = iel / MATRIX_SIZE; if(xval == yval){ continue; } #ifdef DEBUGDIV if(dbg == 1){ if(i==37){ printf("\niel=%d \nxval=%d \nyval=%d", iel, xval, yval); } } #endif // if on the lower diagonal... if(yval > xval){ xval = MATRIX_SIZE - xval - 1; yval = MATRIX_SIZE - yval - 1; } int iU = xval + yval * MATRIX_SIZE; int iDiag = yval + yval * MATRIX_SIZE; #ifdef DEBUGDIV if(dbg == 1){ if(i==37){ printf("\nxtrans=%d \nytrans=%d \niU=%d \niDiag=%d", xval, yval, iU, iDiag); printf("\n\n"); } } #endif U[iU] /= U[iDiag]; } }
.text .file "chol_kernel_cudaUFMG_division.hip" .globl _Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi # -- Begin function _Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi .type _Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi,@function _Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi: # @_Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 4(%rsp), %rcx movl %esi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z29chol_kernel_cudaUFMG_divisionPfi, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi, .Lfunc_end0-_Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z29chol_kernel_cudaUFMG_divisionPfi, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z29chol_kernel_cudaUFMG_divisionPfi,@object # @_Z29chol_kernel_cudaUFMG_divisionPfi .section .rodata,"a",@progbits .globl _Z29chol_kernel_cudaUFMG_divisionPfi .p2align 3, 0x0 _Z29chol_kernel_cudaUFMG_divisionPfi: .quad _Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi .size _Z29chol_kernel_cudaUFMG_divisionPfi, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z29chol_kernel_cudaUFMG_divisionPfi" .size .L__unnamed_1, 37 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z44__device_stub__chol_kernel_cudaUFMG_divisionPfi .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z29chol_kernel_cudaUFMG_divisionPfi .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z29chol_kernel_cudaUFMG_divisionPfi ; -- Begin function _Z29chol_kernel_cudaUFMG_divisionPfi .globl _Z29chol_kernel_cudaUFMG_divisionPfi .p2align 8 .type _Z29chol_kernel_cudaUFMG_divisionPfi,@function _Z29chol_kernel_cudaUFMG_divisionPfi: ; @_Z29chol_kernel_cudaUFMG_divisionPfi ; %bb.0: s_load_b32 s2, s[0:1], 0x8 s_waitcnt lgkmcnt(0) s_cmp_eq_u32 s2, 0 s_cbranch_scc1 .LBB0_5 ; %bb.1: ; %.lr.ph s_clause 0x1 s_load_b32 s3, s[0:1], 0x1c s_load_b32 s4, s[0:1], 0x10 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v0, 0x3ff, v0 s_load_b64 s[0:1], s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_lshr_b32 s5, s3, 16 s_and_b32 s3, s3, 0xffff v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[3:4], null, v2, s4, s[14:15] v_mad_u64_u32 v[1:2], null, v3, s3, v[0:1] s_delay_alu instid0(VALU_DEP_1) v_mul_lo_u32 v0, s2, v1 .LBB0_2: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v1, 31, v0 s_mov_b32 s3, exec_lo v_lshrrev_b32_e32 v1, 21, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v1, v0, v1 v_ashrrev_i32_e32 v1, 11, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_i32_i24_e32 v2, 0x800, v1 v_sub_nc_u32_e32 v2, v0, v2 s_delay_alu instid0(VALU_DEP_1) v_cmpx_ne_u32_e64 v2, v1 s_cbranch_execz .LBB0_4 ; %bb.3: ; in Loop: Header=BB0_2 Depth=1 v_sub_nc_u32_e32 v3, 0x7ff, v2 v_sub_nc_u32_e32 v4, 0x7ff, v1 v_cmp_gt_i32_e32 vcc_lo, v1, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_dual_cndmask_b32 v2, v2, v3 :: v_dual_cndmask_b32 v3, v1, v4 v_mul_i32_i24_e32 v1, 0x801, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshl_add_u32 v3, v3, 11, v2 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[1:2], 2, v[1:2] s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_lshlrev_b64 v[3:4], 2, v[3:4] v_add_co_u32 v1, vcc_lo, s0, v1 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo v_add_co_u32 v3, vcc_lo, s0, v3 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo s_clause 0x1 global_load_b32 v1, v[1:2], off global_load_b32 v2, v[3:4], off s_waitcnt vmcnt(0) v_div_scale_f32 v5, null, v1, v1, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_rcp_f32_e32 v6, v5 s_waitcnt_depctr 0xfff v_fma_f32 v7, -v5, v6, 1.0 v_fmac_f32_e32 v6, v7, v6 v_div_scale_f32 v7, vcc_lo, v2, v1, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v8, v7, v6 v_fma_f32 v9, -v5, v8, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmac_f32_e32 v8, v9, v6 v_fma_f32 v5, -v5, v8, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fmas_f32 v5, v5, v6, v8 v_div_fixup_f32 v1, v5, v1, v2 global_store_b32 v[3:4], v1, off .LBB0_4: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s3 v_add_nc_u32_e32 v0, 1, v0 s_add_i32 s2, s2, -1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s2, 0 s_cbranch_scc0 .LBB0_2 .LBB0_5: ; %._crit_edge s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z29chol_kernel_cudaUFMG_divisionPfi .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 10 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z29chol_kernel_cudaUFMG_divisionPfi, .Lfunc_end0-_Z29chol_kernel_cudaUFMG_divisionPfi ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 456 ; NumSgprs: 18 ; NumVgprs: 10 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 10 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: by_value - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z29chol_kernel_cudaUFMG_divisionPfi .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z29chol_kernel_cudaUFMG_divisionPfi.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 10 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
24b03a5b655e63e0874bea93fcfd61aa42bb49df
//Based on the work of Andrew Krepps #include <stdio.h> #include <stdlib.h> //srand and rand #include <math.h> // add function d __global__ void add(int *a, int *b, int *c, int n) { // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] + b[id]; } __global__ void subtract(int *a, int *b, int *c, int n){ // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] - b[id]; } __global__ void mult(int *a, int *b, int *c, int n){ // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] * b[id]; } __global__ void mod(int *a, int *b, int *c, int n){ // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] % b[id]; } int main(int argc, char** argv) { // read command line arguments int totalThreads = (1 << 20); int blockSize = 256; if (argc >= 2) { totalThreads = atoi(argv[1]); } if (argc >= 3) { blockSize = atoi(argv[2]); } int numBlocks = totalThreads/blockSize; printf("Using %d Threads and %d BlockSize\n",totalThreads, blockSize); // validate command line arguments if (totalThreads % blockSize != 0) { ++numBlocks; totalThreads = numBlocks*blockSize; printf("Warning: Total thread count is not evenly divisible by the block size\n"); printf("The total number of threads will be rounded up to %d\n", totalThreads); } // Host input vectors int *h_a, *h_b; //Host output vectors for different functions "h_c_func" int *h_c_add,*h_c_sub,*h_c_mult,*h_c_mod; // Device input vectors int *d_a, *d_b; //Device output vector int *d_c_add,*d_c_sub,*d_c_mult,*d_c_mod; // Size, in bytes, of each vector size_t bytes = totalThreads*sizeof(int); // Allocate memory for each vector on host h_a = (int*)malloc(bytes); h_b = (int*)malloc(bytes); h_c_add = (int*)malloc(bytes); h_c_sub = (int*)malloc(bytes); h_c_mult = (int*)malloc(bytes); h_c_mod = (int*)malloc(bytes); // Allocate memory for each vector on GPU cudaMalloc(&d_a, bytes); cudaMalloc(&d_b, bytes); cudaMalloc(&d_c_add, bytes); cudaMalloc(&d_c_sub, bytes); cudaMalloc(&d_c_mult, bytes); cudaMalloc(&d_c_mod, bytes); //initialize the input vectors for(int i = 0;i<totalThreads;i++){ //first array is 0 through number of threads h_a[i] = i; // second array is a random number between 0 and 3 h_b[i] = rand() % 4; } //copy both input arrays from host to device cudaMemcpy( d_a, h_a, bytes, cudaMemcpyHostToDevice); cudaMemcpy( d_b, h_b, bytes, cudaMemcpyHostToDevice); //performing add function printf("Performing Add function\n"); add<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_add, totalThreads); //performing subtract function printf("Performing subtract function\n"); subtract<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_sub, totalThreads); //performing mult function printf("Performing mult function\n"); mult<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_mult, totalThreads); //performing mod fuction printf("Performing mod function\n"); mod<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_mod, totalThreads); //copy the output arrays from device to host cudaMemcpy( h_c_add, d_c_add, bytes, cudaMemcpyDeviceToHost); cudaMemcpy( h_c_sub, d_c_sub, bytes, cudaMemcpyDeviceToHost); cudaMemcpy( h_c_mult, d_c_mult, bytes, cudaMemcpyDeviceToHost); cudaMemcpy( h_c_mod, d_c_mod, bytes, cudaMemcpyDeviceToHost); //free up space on our GPU cudaFree(d_c_add); cudaFree(d_c_sub); cudaFree(d_c_mult); cudaFree(d_c_add); return 0; }
.file "tmpxft_0028b46b_00000000-6_assignment.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z27__device_stub__Z3addPiS_S_iPiS_S_i .type _Z27__device_stub__Z3addPiS_S_iPiS_S_i, @function _Z27__device_stub__Z3addPiS_S_iPiS_S_i: .LFB2052: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z3addPiS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z27__device_stub__Z3addPiS_S_iPiS_S_i, .-_Z27__device_stub__Z3addPiS_S_iPiS_S_i .globl _Z3addPiS_S_i .type _Z3addPiS_S_i, @function _Z3addPiS_S_i: .LFB2053: .cfi_startproc endbr64 jmp _Z27__device_stub__Z3addPiS_S_iPiS_S_i .cfi_endproc .LFE2053: .size _Z3addPiS_S_i, .-_Z3addPiS_S_i .globl _Z32__device_stub__Z8subtractPiS_S_iPiS_S_i .type _Z32__device_stub__Z8subtractPiS_S_iPiS_S_i, @function _Z32__device_stub__Z8subtractPiS_S_iPiS_S_i: .LFB2054: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L8 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z8subtractPiS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L8: movq 136(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2054: .size _Z32__device_stub__Z8subtractPiS_S_iPiS_S_i, .-_Z32__device_stub__Z8subtractPiS_S_iPiS_S_i .globl _Z8subtractPiS_S_i .type _Z8subtractPiS_S_i, @function _Z8subtractPiS_S_i: .LFB2055: .cfi_startproc endbr64 jmp _Z32__device_stub__Z8subtractPiS_S_iPiS_S_i .cfi_endproc .LFE2055: .size _Z8subtractPiS_S_i, .-_Z8subtractPiS_S_i .globl _Z28__device_stub__Z4multPiS_S_iPiS_S_i .type _Z28__device_stub__Z4multPiS_S_iPiS_S_i, @function _Z28__device_stub__Z4multPiS_S_iPiS_S_i: .LFB2056: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L13 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z4multPiS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L13: movq 136(%rsp), %rax subq %fs:40, %rax je .L15 call __stack_chk_fail@PLT .L15: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2056: .size _Z28__device_stub__Z4multPiS_S_iPiS_S_i, .-_Z28__device_stub__Z4multPiS_S_iPiS_S_i .globl _Z4multPiS_S_i .type _Z4multPiS_S_i, @function _Z4multPiS_S_i: .LFB2057: .cfi_startproc endbr64 jmp _Z28__device_stub__Z4multPiS_S_iPiS_S_i .cfi_endproc .LFE2057: .size _Z4multPiS_S_i, .-_Z4multPiS_S_i .globl _Z27__device_stub__Z3modPiS_S_iPiS_S_i .type _Z27__device_stub__Z3modPiS_S_iPiS_S_i, @function _Z27__device_stub__Z3modPiS_S_iPiS_S_i: .LFB2058: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L18 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z3modPiS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L18: movq 136(%rsp), %rax subq %fs:40, %rax je .L20 call __stack_chk_fail@PLT .L20: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2058: .size _Z27__device_stub__Z3modPiS_S_iPiS_S_i, .-_Z27__device_stub__Z3modPiS_S_iPiS_S_i .globl _Z3modPiS_S_i .type _Z3modPiS_S_i, @function _Z3modPiS_S_i: .LFB2059: .cfi_startproc endbr64 jmp _Z27__device_stub__Z3modPiS_S_iPiS_S_i .cfi_endproc .LFE2059: .size _Z3modPiS_S_i, .-_Z3modPiS_S_i .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "Using %d Threads and %d BlockSize\n" .LC1: .string "Warning: Total thread count is not evenly divisible by the block size\n" .LC2: .string "The total number of threads will be rounded up to %d\n" .LC3: .string "Performing Add function\n" .LC4: .string "Performing subtract function\n" .LC5: .string "Performing mult function\n" .LC6: .string "Performing mod function\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 subq $136, %rsp .cfi_def_cfa_offset 192 movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax cmpl $1, %edi jle .L33 movl %edi, %r13d movq 8(%rsi), %rdi movq %rsi, %rbp movl $256, %r12d call atoi@PLT movl %eax, %ebx cmpl $2, %r13d je .L24 movq 16(%rbp), %rdi call atoi@PLT movl %eax, %r12d jmp .L24 .L33: movl $1048576, %ebx movl $256, %r12d .L24: movl %ebx, %eax movl %r12d, %ecx movl $2, %edi cltd leaq .LC0(%rip), %rsi idivl %r12d movl %edx, %r13d movl %eax, %ebp movl %ebx, %edx xorl %eax, %eax call __printf_chk@PLT testl %r13d, %r13d je .L25 incl %ebp movl %r12d, %ebx leaq .LC1(%rip), %rsi xorl %eax, %eax imull %ebp, %ebx movl $2, %edi call __printf_chk@PLT leaq .LC2(%rip), %rsi movl $2, %edi xorl %eax, %eax movl %ebx, %edx call __printf_chk@PLT .L25: movslq %ebx, %rax xorl %r14d, %r14d movl $4, %r15d salq $2, %rax movq %rax, %rdi movq %rax, 8(%rsp) call malloc@PLT movq 8(%rsp), %rdi movq %rax, %r13 call malloc@PLT movq 8(%rsp), %rdi movq %rax, %r12 call malloc@PLT movq 8(%rsp), %rdi movq %rax, 16(%rsp) call malloc@PLT movq 8(%rsp), %rdi movq %rax, 24(%rsp) call malloc@PLT movq 8(%rsp), %rdi movq %rax, 32(%rsp) call malloc@PLT movq 8(%rsp), %rsi leaq 48(%rsp), %rdi movq %rax, 40(%rsp) call cudaMalloc@PLT movq 8(%rsp), %rsi leaq 56(%rsp), %rdi call cudaMalloc@PLT movq 8(%rsp), %rsi leaq 64(%rsp), %rdi call cudaMalloc@PLT movq 8(%rsp), %rsi leaq 72(%rsp), %rdi call cudaMalloc@PLT movq 8(%rsp), %rsi leaq 80(%rsp), %rdi call cudaMalloc@PLT movq 8(%rsp), %rsi leaq 88(%rsp), %rdi call cudaMalloc@PLT .L26: cmpl %r14d, %ebx jle .L39 movl %r14d, 0(%r13,%r14,4) call rand@PLT cltd idivl %r15d movl %edx, (%r12,%r14,4) incq %r14 jmp .L26 .L39: movq 8(%rsp), %rdx movq 48(%rsp), %rdi movl $1, %ecx movq %r13, %rsi call cudaMemcpy@PLT movq 8(%rsp), %rdx movq 56(%rsp), %rdi movq %r12, %rsi movl $1, %ecx call cudaMemcpy@PLT leaq .LC3(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl %ebx, 108(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rax movl %ebp, 96(%rsp) movq %rax, 112(%rsp) movl 116(%rsp), %ecx movq %rax, 100(%rsp) movq 108(%rsp), %rdx movq 96(%rsp), %rdi movl 104(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L28 movq 64(%rsp), %rdx movq 56(%rsp), %rsi movl %ebx, %ecx movq 48(%rsp), %rdi call _Z27__device_stub__Z3addPiS_S_iPiS_S_i .L28: leaq .LC4(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl %ebx, 108(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rax movl %ebp, 96(%rsp) movq %rax, 112(%rsp) movl 116(%rsp), %ecx movq %rax, 100(%rsp) movq 108(%rsp), %rdx movq 96(%rsp), %rdi movl 104(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L29 movq 72(%rsp), %rdx movq 56(%rsp), %rsi movl %ebx, %ecx movq 48(%rsp), %rdi call _Z32__device_stub__Z8subtractPiS_S_iPiS_S_i .L29: leaq .LC5(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl %ebx, 108(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rax movl %ebp, 96(%rsp) movq %rax, 112(%rsp) movl 116(%rsp), %ecx movq %rax, 100(%rsp) movq 108(%rsp), %rdx movq 96(%rsp), %rdi movl 104(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L30 movq 80(%rsp), %rdx movq 56(%rsp), %rsi movl %ebx, %ecx movq 48(%rsp), %rdi call _Z28__device_stub__Z4multPiS_S_iPiS_S_i .L30: leaq .LC6(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movl %ebx, 108(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movabsq $4294967297, %rax movl %ebp, 96(%rsp) movq %rax, 112(%rsp) movl 116(%rsp), %ecx movq %rax, 100(%rsp) movq 108(%rsp), %rdx movq 96(%rsp), %rdi movl 104(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L31 movq 88(%rsp), %rdx movq 56(%rsp), %rsi movl %ebx, %ecx movq 48(%rsp), %rdi call _Z27__device_stub__Z3modPiS_S_iPiS_S_i .L31: movq 8(%rsp), %rdx movq 64(%rsp), %rsi movl $2, %ecx movq 16(%rsp), %rdi call cudaMemcpy@PLT movq 8(%rsp), %rdx movq 72(%rsp), %rsi movl $2, %ecx movq 24(%rsp), %rdi call cudaMemcpy@PLT movq 8(%rsp), %rdx movq 80(%rsp), %rsi movl $2, %ecx movq 32(%rsp), %rdi call cudaMemcpy@PLT movq 8(%rsp), %rdx movq 88(%rsp), %rsi movl $2, %ecx movq 40(%rsp), %rdi call cudaMemcpy@PLT movq 64(%rsp), %rdi call cudaFree@PLT movq 72(%rsp), %rdi call cudaFree@PLT movq 80(%rsp), %rdi call cudaFree@PLT movq 64(%rsp), %rdi call cudaFree@PLT movq 120(%rsp), %rax subq %fs:40, %rax je .L32 call __stack_chk_fail@PLT .L32: addq $136, %rsp .cfi_def_cfa_offset 56 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC7: .string "_Z3modPiS_S_i" .LC8: .string "_Z4multPiS_S_i" .LC9: .string "_Z8subtractPiS_S_i" .LC10: .string "_Z3addPiS_S_i" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2061: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC7(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z3modPiS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC8(%rip), %rdx orl $-1, %r8d leaq _Z4multPiS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC9(%rip), %rdx orl $-1, %r8d leaq _Z8subtractPiS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC10(%rip), %rdx orl $-1, %r8d leaq _Z3addPiS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2061: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z3modPiS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ IMAD.MOV.U32 R9, RZ, RZ, 0x4 ; /* 0x00000004ff097424 */ /* 0x000fe200078e00ff */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0080*/ IMAD.WIDE R4, R0, R9, c[0x0][0x168] ; /* 0x00005a0000047625 */ /* 0x000fcc00078e0209 */ /*0090*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea2000c1e1900 */ /*00a0*/ IMAD.WIDE R2, R0, R9, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fcc00078e0209 */ /*00b0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x0000e2000c1e1900 */ /*00c0*/ IABS R10, R4.reuse ; /* 0x00000004000a7213 */ /* 0x084fe40000000000 */ /*00d0*/ IABS R12, R4 ; /* 0x00000004000c7213 */ /* 0x000fe40000000000 */ /*00e0*/ I2F.RP R8, R10 ; /* 0x0000000a00087306 */ /* 0x000e660000209400 */ /*00f0*/ IMAD.MOV R3, RZ, RZ, -R12 ; /* 0x000000ffff037224 */ /* 0x001fe200078e0a0c */ /*0100*/ ISETP.GE.AND P2, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x008fc80003f46270 */ /*0110*/ MUFU.RCP R8, R8 ; /* 0x0000000800087308 */ /* 0x002e240000001000 */ /*0120*/ IADD3 R6, R8, 0xffffffe, RZ ; /* 0x0ffffffe08067810 */ /* 0x001fe40007ffe0ff */ /*0130*/ IABS R8, R2 ; /* 0x0000000200087213 */ /* 0x000fc80000000000 */ /*0140*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */ /* 0x000064000021f000 */ /*0150*/ MOV R6, RZ ; /* 0x000000ff00067202 */ /* 0x001fe40000000f00 */ /*0160*/ IADD3 R11, RZ, -R7, RZ ; /* 0x80000007ff0b7210 */ /* 0x002fca0007ffe0ff */ /*0170*/ IMAD R5, R11, R10, RZ ; /* 0x0000000a0b057224 */ /* 0x000fc800078e02ff */ /*0180*/ IMAD.HI.U32 R7, R7, R5, R6 ; /* 0x0000000507077227 */ /* 0x000fcc00078e0006 */ /*0190*/ IMAD.HI.U32 R7, R7, R8, RZ ; /* 0x0000000807077227 */ /* 0x000fc800078e00ff */ /*01a0*/ IMAD R7, R7, R3, R8 ; /* 0x0000000307077224 */ /* 0x000fe400078e0208 */ /*01b0*/ IMAD.WIDE R2, R0, R9, c[0x0][0x170] ; /* 0x00005c0000027625 */ /* 0x000fc600078e0209 */ /*01c0*/ ISETP.GT.U32.AND P0, PT, R10, R7, PT ; /* 0x000000070a00720c */ /* 0x000fda0003f04070 */ /*01d0*/ @!P0 IMAD.IADD R7, R7, 0x1, -R10 ; /* 0x0000000107078824 */ /* 0x000fe200078e0a0a */ /*01e0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */ /* 0x000fc80003f05270 */ /*01f0*/ ISETP.GT.U32.AND P1, PT, R10, R7, PT ; /* 0x000000070a00720c */ /* 0x000fda0003f24070 */ /*0200*/ @!P1 IADD3 R7, R7, -R10, RZ ; /* 0x8000000a07079210 */ /* 0x000fca0007ffe0ff */ /*0210*/ @!P2 IMAD.MOV R7, RZ, RZ, -R7 ; /* 0x000000ffff07a224 */ /* 0x000fe200078e0a07 */ /*0220*/ @!P0 LOP3.LUT R7, RZ, R4, RZ, 0x33, !PT ; /* 0x00000004ff078212 */ /* 0x000fca00078e33ff */ /*0230*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */ /* 0x000fe2000c101904 */ /*0240*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0250*/ BRA 0x250; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0260*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0270*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0280*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0290*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*02f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z4multPiS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fc800078e0207 */ /*00d0*/ IMAD R9, R4, R3, RZ ; /* 0x0000000304097224 */ /* 0x004fca00078e02ff */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z8subtractPiS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ IADD3 R9, -R4, R3, RZ ; /* 0x0000000304097210 */ /* 0x004fca0007ffe1ff */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z3addPiS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R6, c[0x0][0x178], PT ; /* 0x00005e0006007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*00d0*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */ /* 0x004fca0007ffe0ff */ /*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
//Based on the work of Andrew Krepps #include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> //srand and rand #include <math.h> // add function d __global__ void add(int *a, int *b, int *c, int n) { // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] + b[id]; } __global__ void subtract(int *a, int *b, int *c, int n){ // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] - b[id]; } __global__ void mult(int *a, int *b, int *c, int n){ // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] * b[id]; } __global__ void mod(int *a, int *b, int *c, int n){ // Get our global thread ID int id = blockIdx.x*blockDim.x+threadIdx.x; // Make sure we do not go out of bounds if (id < n) c[id] = a[id] % b[id]; } int main(int argc, char** argv) { // read command line arguments int totalThreads = (1 << 20); int blockSize = 256; if (argc >= 2) { totalThreads = atoi(argv[1]); } if (argc >= 3) { blockSize = atoi(argv[2]); } int numBlocks = totalThreads/blockSize; printf("Using %d Threads and %d BlockSize\n",totalThreads, blockSize); // validate command line arguments if (totalThreads % blockSize != 0) { ++numBlocks; totalThreads = numBlocks*blockSize; printf("Warning: Total thread count is not evenly divisible by the block size\n"); printf("The total number of threads will be rounded up to %d\n", totalThreads); } // Host input vectors int *h_a, *h_b; //Host output vectors for different functions "h_c_func" int *h_c_add,*h_c_sub,*h_c_mult,*h_c_mod; // Device input vectors int *d_a, *d_b; //Device output vector int *d_c_add,*d_c_sub,*d_c_mult,*d_c_mod; // Size, in bytes, of each vector size_t bytes = totalThreads*sizeof(int); // Allocate memory for each vector on host h_a = (int*)malloc(bytes); h_b = (int*)malloc(bytes); h_c_add = (int*)malloc(bytes); h_c_sub = (int*)malloc(bytes); h_c_mult = (int*)malloc(bytes); h_c_mod = (int*)malloc(bytes); // Allocate memory for each vector on GPU hipMalloc(&d_a, bytes); hipMalloc(&d_b, bytes); hipMalloc(&d_c_add, bytes); hipMalloc(&d_c_sub, bytes); hipMalloc(&d_c_mult, bytes); hipMalloc(&d_c_mod, bytes); //initialize the input vectors for(int i = 0;i<totalThreads;i++){ //first array is 0 through number of threads h_a[i] = i; // second array is a random number between 0 and 3 h_b[i] = rand() % 4; } //copy both input arrays from host to device hipMemcpy( d_a, h_a, bytes, hipMemcpyHostToDevice); hipMemcpy( d_b, h_b, bytes, hipMemcpyHostToDevice); //performing add function printf("Performing Add function\n"); add<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_add, totalThreads); //performing subtract function printf("Performing subtract function\n"); subtract<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_sub, totalThreads); //performing mult function printf("Performing mult function\n"); mult<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_mult, totalThreads); //performing mod fuction printf("Performing mod function\n"); mod<<<numBlocks, totalThreads>>>(d_a, d_b, d_c_mod, totalThreads); //copy the output arrays from device to host hipMemcpy( h_c_add, d_c_add, bytes, hipMemcpyDeviceToHost); hipMemcpy( h_c_sub, d_c_sub, bytes, hipMemcpyDeviceToHost); hipMemcpy( h_c_mult, d_c_mult, bytes, hipMemcpyDeviceToHost); hipMemcpy( h_c_mod, d_c_mod, bytes, hipMemcpyDeviceToHost); //free up space on our GPU hipFree(d_c_add); hipFree(d_c_sub); hipFree(d_c_mult); hipFree(d_c_add); return 0; }
.text .file "assignment.hip" .globl _Z18__device_stub__addPiS_S_i # -- Begin function _Z18__device_stub__addPiS_S_i .type _Z18__device_stub__addPiS_S_i,@function _Z18__device_stub__addPiS_S_i: # @_Z18__device_stub__addPiS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z3addPiS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z18__device_stub__addPiS_S_i, .Lfunc_end0-_Z18__device_stub__addPiS_S_i .cfi_endproc # -- End function .globl _Z23__device_stub__subtractPiS_S_i # -- Begin function _Z23__device_stub__subtractPiS_S_i .type _Z23__device_stub__subtractPiS_S_i,@function _Z23__device_stub__subtractPiS_S_i: # @_Z23__device_stub__subtractPiS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z8subtractPiS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z23__device_stub__subtractPiS_S_i, .Lfunc_end1-_Z23__device_stub__subtractPiS_S_i .cfi_endproc # -- End function .globl _Z19__device_stub__multPiS_S_i # -- Begin function _Z19__device_stub__multPiS_S_i .type _Z19__device_stub__multPiS_S_i,@function _Z19__device_stub__multPiS_S_i: # @_Z19__device_stub__multPiS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z4multPiS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z19__device_stub__multPiS_S_i, .Lfunc_end2-_Z19__device_stub__multPiS_S_i .cfi_endproc # -- End function .globl _Z18__device_stub__modPiS_S_i # -- Begin function _Z18__device_stub__modPiS_S_i .type _Z18__device_stub__modPiS_S_i,@function _Z18__device_stub__modPiS_S_i: # @_Z18__device_stub__modPiS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z3modPiS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _Z18__device_stub__modPiS_S_i, .Lfunc_end3-_Z18__device_stub__modPiS_S_i .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $88, %rsp .cfi_def_cfa_offset 144 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl $256, %ebx # imm = 0x100 movl $1048576, %ebp # imm = 0x100000 cmpl $2, %edi jl .LBB4_3 # %bb.1: movq %rsi, %r14 movl %edi, %r15d movq 8(%rsi), %rdi callq atoi movl %eax, %ebp cmpl $2, %r15d je .LBB4_3 # %bb.2: movq 16(%r14), %rdi callq atoi movl %eax, %ebx .LBB4_3: # %.thread movl %ebp, %eax cltd idivl %ebx movl %edx, %r15d movl %eax, %r14d movl $.L.str, %edi movl %ebp, %esi movl %ebx, %edx xorl %eax, %eax callq printf testl %r15d, %r15d je .LBB4_5 # %bb.4: incl %r14d imull %r14d, %ebx movl $.Lstr, %edi callq puts@PLT movl $.L.str.2, %edi movl %ebx, %esi xorl %eax, %eax callq printf movl %ebx, %ebp .LBB4_5: movslq %ebp, %r13 leaq (,%r13,4), %rbx movq %rbx, %rdi callq malloc movq %rax, %r12 movq %rbx, %rdi callq malloc movq %rax, %r15 movq %rbx, %rdi callq malloc movq %rax, 56(%rsp) # 8-byte Spill movq %rbx, %rdi callq malloc movq %rax, 64(%rsp) # 8-byte Spill movq %rbx, %rdi callq malloc movq %rax, 72(%rsp) # 8-byte Spill movq %rbx, %rdi callq malloc movq %rax, 80(%rsp) # 8-byte Spill leaq 16(%rsp), %rdi movq %rbx, %rsi callq hipMalloc leaq 8(%rsp), %rdi movq %rbx, %rsi callq hipMalloc leaq 24(%rsp), %rdi movq %rbx, %rsi callq hipMalloc leaq 40(%rsp), %rdi movq %rbx, %rsi callq hipMalloc leaq 32(%rsp), %rdi movq %rbx, %rsi callq hipMalloc leaq 48(%rsp), %rdi movq %rbx, %rsi callq hipMalloc movl %r13d, %ebp testl %r13d, %r13d jle .LBB4_8 # %bb.6: # %.lr.ph.preheader xorl %r13d, %r13d .LBB4_7: # %.lr.ph # =>This Inner Loop Header: Depth=1 movl %r13d, (%r12,%r13,4) callq rand # kill: def $eax killed $eax def $rax leal 3(%rax), %ecx testl %eax, %eax cmovnsl %eax, %ecx andl $-4, %ecx subl %ecx, %eax movl %eax, (%r15,%r13,4) incq %r13 cmpq %r13, %rbp jne .LBB4_7 .LBB4_8: # %._crit_edge movq 16(%rsp), %rdi movq %r12, %rsi movq %rbx, %rdx movl $1, %ecx callq hipMemcpy movq 8(%rsp), %rdi movq %r15, %rsi movq %rbx, %rdx movl $1, %ecx callq hipMemcpy movl $.Lstr.1, %edi callq puts@PLT movl %r14d, %r14d btsq $32, %r14 movq %rbp, %r15 btsq $32, %r15 movq %r14, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB4_10 # %bb.9: movq 16(%rsp), %rdi movq 8(%rsp), %rsi movq 24(%rsp), %rdx movl %ebp, %ecx callq _Z18__device_stub__addPiS_S_i .LBB4_10: movl $.Lstr.2, %edi callq puts@PLT movq %r14, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB4_12 # %bb.11: movq 16(%rsp), %rdi movq 8(%rsp), %rsi movq 40(%rsp), %rdx movl %ebp, %ecx callq _Z23__device_stub__subtractPiS_S_i .LBB4_12: movl $.Lstr.3, %edi callq puts@PLT movq %r14, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB4_14 # %bb.13: movq 16(%rsp), %rdi movq 8(%rsp), %rsi movq 32(%rsp), %rdx movl %ebp, %ecx callq _Z19__device_stub__multPiS_S_i .LBB4_14: movl $.Lstr.4, %edi callq puts@PLT movq %r14, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB4_16 # %bb.15: movq 16(%rsp), %rdi movq 8(%rsp), %rsi movq 48(%rsp), %rdx movl %ebp, %ecx callq _Z18__device_stub__modPiS_S_i .LBB4_16: movq 24(%rsp), %rsi movq 56(%rsp), %rdi # 8-byte Reload movq %rbx, %rdx movl $2, %ecx callq hipMemcpy movq 40(%rsp), %rsi movq 64(%rsp), %rdi # 8-byte Reload movq %rbx, %rdx movl $2, %ecx callq hipMemcpy movq 32(%rsp), %rsi movq 72(%rsp), %rdi # 8-byte Reload movq %rbx, %rdx movl $2, %ecx callq hipMemcpy movq 48(%rsp), %rsi movq 80(%rsp), %rdi # 8-byte Reload movq %rbx, %rdx movl $2, %ecx callq hipMemcpy movq 24(%rsp), %rdi callq hipFree movq 40(%rsp), %rdi callq hipFree movq 32(%rsp), %rdi callq hipFree movq 24(%rsp), %rdi callq hipFree xorl %eax, %eax addq $88, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size main, .Lfunc_end4-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB5_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB5_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z3addPiS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z8subtractPiS_S_i, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z4multPiS_S_i, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z3modPiS_S_i, %esi movl $.L__unnamed_4, %edx movl $.L__unnamed_4, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end5: .size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB6_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB6_2: retq .Lfunc_end6: .size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor .cfi_endproc # -- End function .type _Z3addPiS_S_i,@object # @_Z3addPiS_S_i .section .rodata,"a",@progbits .globl _Z3addPiS_S_i .p2align 3, 0x0 _Z3addPiS_S_i: .quad _Z18__device_stub__addPiS_S_i .size _Z3addPiS_S_i, 8 .type _Z8subtractPiS_S_i,@object # @_Z8subtractPiS_S_i .globl _Z8subtractPiS_S_i .p2align 3, 0x0 _Z8subtractPiS_S_i: .quad _Z23__device_stub__subtractPiS_S_i .size _Z8subtractPiS_S_i, 8 .type _Z4multPiS_S_i,@object # @_Z4multPiS_S_i .globl _Z4multPiS_S_i .p2align 3, 0x0 _Z4multPiS_S_i: .quad _Z19__device_stub__multPiS_S_i .size _Z4multPiS_S_i, 8 .type _Z3modPiS_S_i,@object # @_Z3modPiS_S_i .globl _Z3modPiS_S_i .p2align 3, 0x0 _Z3modPiS_S_i: .quad _Z18__device_stub__modPiS_S_i .size _Z3modPiS_S_i, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Using %d Threads and %d BlockSize\n" .size .L.str, 35 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "The total number of threads will be rounded up to %d\n" .size .L.str.2, 54 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z3addPiS_S_i" .size .L__unnamed_1, 14 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z8subtractPiS_S_i" .size .L__unnamed_2, 19 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "_Z4multPiS_S_i" .size .L__unnamed_3, 15 .type .L__unnamed_4,@object # @3 .L__unnamed_4: .asciz "_Z3modPiS_S_i" .size .L__unnamed_4, 14 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "Warning: Total thread count is not evenly divisible by the block size" .size .Lstr, 70 .type .Lstr.1,@object # @str.1 .Lstr.1: .asciz "Performing Add function" .size .Lstr.1, 24 .type .Lstr.2,@object # @str.2 .Lstr.2: .asciz "Performing subtract function" .size .Lstr.2, 29 .type .Lstr.3,@object # @str.3 .Lstr.3: .asciz "Performing mult function" .size .Lstr.3, 25 .type .Lstr.4,@object # @str.4 .Lstr.4: .asciz "Performing mod function" .size .Lstr.4, 24 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z18__device_stub__addPiS_S_i .addrsig_sym _Z23__device_stub__subtractPiS_S_i .addrsig_sym _Z19__device_stub__multPiS_S_i .addrsig_sym _Z18__device_stub__modPiS_S_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z3addPiS_S_i .addrsig_sym _Z8subtractPiS_S_i .addrsig_sym _Z4multPiS_S_i .addrsig_sym _Z3modPiS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z3addPiS_S_i ; -- Begin function _Z3addPiS_S_i .globl _Z3addPiS_S_i .p2align 8 .type _Z3addPiS_S_i,@function _Z3addPiS_S_i: ; @_Z3addPiS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_add_nc_u32_e32 v2, v3, v2 global_store_b32 v[0:1], v2, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z3addPiS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z3addPiS_S_i, .Lfunc_end0-_Z3addPiS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 180 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z8subtractPiS_S_i ; -- Begin function _Z8subtractPiS_S_i .globl _Z8subtractPiS_S_i .p2align 8 .type _Z8subtractPiS_S_i,@function _Z8subtractPiS_S_i: ; @_Z8subtractPiS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB1_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_sub_nc_u32_e32 v2, v2, v3 global_store_b32 v[0:1], v2, off .LBB1_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z8subtractPiS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z8subtractPiS_S_i, .Lfunc_end1-_Z8subtractPiS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 180 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z4multPiS_S_i ; -- Begin function _Z4multPiS_S_i .globl _Z4multPiS_S_i .p2align 8 .type _Z4multPiS_S_i,@function _Z4multPiS_S_i: ; @_Z4multPiS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB2_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v4, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 global_load_b32 v2, v[2:3], off global_load_b32 v3, v[4:5], off v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo s_waitcnt vmcnt(0) v_mul_lo_u32 v2, v3, v2 global_store_b32 v[0:1], v2, off .LBB2_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z4multPiS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 6 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end2: .size _Z4multPiS_S_i, .Lfunc_end2-_Z4multPiS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 184 ; NumSgprs: 18 ; NumVgprs: 6 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 6 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .protected _Z3modPiS_S_i ; -- Begin function _Z3modPiS_S_i .globl _Z3modPiS_S_i .p2align 8 .type _Z3modPiS_S_i,@function _Z3modPiS_S_i: ; @_Z3modPiS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB3_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x0 v_ashrrev_i32_e32 v2, 31, v1 s_load_b64 s[0:1], s[0:1], 0x10 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s6, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo global_load_b32 v4, v[2:3], off v_add_co_u32 v2, vcc_lo, s4, v0 v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo global_load_b32 v2, v[2:3], off s_waitcnt vmcnt(1) v_ashrrev_i32_e32 v3, 31, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v4, v4, v3 s_waitcnt vmcnt(0) v_ashrrev_i32_e32 v6, 31, v2 v_xor_b32_e32 v3, v4, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v2, v2, v6 v_cvt_f32_u32_e32 v4, v3 v_sub_nc_u32_e32 v5, 0, v3 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_xor_b32_e32 v2, v2, v6 v_rcp_iflag_f32_e32 v4, v4 s_waitcnt_depctr 0xfff v_mul_f32_e32 v4, 0x4f7ffffe, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_cvt_u32_f32_e32 v4, v4 v_mul_lo_u32 v5, v5, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v5, v4, v5 v_add_nc_u32_e32 v4, v4, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_hi_u32 v4, v2, v4 v_mul_lo_u32 v4, v4, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v2, v2, v4 v_sub_nc_u32_e32 v4, v2, v3 v_cmp_ge_u32_e32 vcc_lo, v2, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v2, v2, v4, vcc_lo v_sub_nc_u32_e32 v4, v2, v3 v_cmp_ge_u32_e32 vcc_lo, v2, v3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_cndmask_b32_e32 v2, v2, v4, vcc_lo v_add_co_u32 v0, vcc_lo, s0, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo v_xor_b32_e32 v2, v2, v6 s_delay_alu instid0(VALU_DEP_1) v_sub_nc_u32_e32 v2, v2, v6 global_store_b32 v[0:1], v2, off .LBB3_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z3modPiS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 7 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end3: .size _Z3modPiS_S_i, .Lfunc_end3-_Z3modPiS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 344 ; NumSgprs: 18 ; NumVgprs: 7 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 7 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z3addPiS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z3addPiS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z8subtractPiS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z8subtractPiS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z4multPiS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z4multPiS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 6 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z3modPiS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z3modPiS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 7 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
6205ca932695bcd01397d495010c37b1fcce988f
// filename: gaxpy2.cu // a simple CUDA kernel to add two vectors extern "C" // ensure function name to be exactly "gaxpy2" { __global__ void gaxpy4(const int n, const double *a, const double *b, double *c) { int i = threadIdx.x + blockIdx.x*blockDim.x; if (i < n) { c[i] = (double) i; // REMEMBER ZERO INDEXING IN C LANGUAGE!! } } }
.file "tmpxft_0026ce95_00000000-6_gaxpy4.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z32__device_stub__Z6gaxpy4iPKdS0_PdiPKdS0_Pd .type _Z32__device_stub__Z6gaxpy4iPKdS0_PdiPKdS0_Pd, @function _Z32__device_stub__Z6gaxpy4iPKdS0_PdiPKdS0_Pd: .LFB2032: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movl %edi, 28(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movq %rcx, (%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 28(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) movq %rsp, %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq gaxpy4(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z32__device_stub__Z6gaxpy4iPKdS0_PdiPKdS0_Pd, .-_Z32__device_stub__Z6gaxpy4iPKdS0_PdiPKdS0_Pd .globl gaxpy4 .type gaxpy4, @function gaxpy4: .LFB2033: .cfi_startproc endbr64 jmp _Z32__device_stub__Z6gaxpy4iPKdS0_PdiPKdS0_Pd .cfi_endproc .LFE2033: .size gaxpy4, .-gaxpy4 .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "gaxpy4" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq gaxpy4(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : gaxpy4 .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e280000002100 */ /*0020*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e240000002500 */ /*0030*/ IMAD R0, R3, c[0x0][0x0], R0 ; /* 0x0000000003007a24 */ /* 0x001fca00078e0200 */ /*0040*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x160], PT ; /* 0x0000580000007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ I2F.F64 R4, R0 ; /* 0x0000000000047312 */ /* 0x000e220000201c00 */ /*0070*/ MOV R3, 0x8 ; /* 0x0000000800037802 */ /* 0x000fe20000000f00 */ /*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0090*/ IMAD.WIDE R2, R0, R3, c[0x0][0x178] ; /* 0x00005e0000027625 */ /* 0x000fca00078e0203 */ /*00a0*/ STG.E.64 [R2.64], R4 ; /* 0x0000000402007986 */ /* 0x001fe2000c101b04 */ /*00b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> // filename: gaxpy2.cu // a simple CUDA kernel to add two vectors extern "C" // ensure function name to be exactly "gaxpy2" { __global__ void gaxpy4(const int n, const double *a, const double *b, double *c) { int i = threadIdx.x + blockIdx.x*blockDim.x; if (i < n) { c[i] = (double) i; // REMEMBER ZERO INDEXING IN C LANGUAGE!! } } }
.text .file "gaxpy4.hip" .globl __device_stub__gaxpy4 # -- Begin function __device_stub__gaxpy4 .type __device_stub__gaxpy4,@function __device_stub__gaxpy4: # @__device_stub__gaxpy4 .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 4(%rsp), %rax movl %edi, (%rax) leaq 40(%rsp), %rdi movq %rsi, (%rdi) leaq 32(%rsp), %rsi movq %rdx, (%rsi) leaq 24(%rsp), %rdx movq %rcx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $gaxpy4, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size __device_stub__gaxpy4, .Lfunc_end0-__device_stub__gaxpy4 .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $gaxpy4, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type gaxpy4,@object # @gaxpy4 .section .rodata,"a",@progbits .globl gaxpy4 .p2align 3, 0x0 gaxpy4: .quad __device_stub__gaxpy4 .size gaxpy4, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "gaxpy4" .size .L__unnamed_1, 7 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __device_stub__gaxpy4 .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym gaxpy4 .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected gaxpy4 ; -- Begin function gaxpy4 .globl gaxpy4 .p2align 8 .type gaxpy4,@function gaxpy4: ; @gaxpy4 ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s3, s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s3, v1 s_cbranch_execz .LBB0_2 ; %bb.1: v_cvt_f64_i32_e32 v[3:4], v1 s_load_b64 s[0:1], s[0:1], 0x18 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 3, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_store_b64 v[0:1], v[3:4], off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel gaxpy4 .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 5 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size gaxpy4, .Lfunc_end0-gaxpy4 ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 128 ; NumSgprs: 18 ; NumVgprs: 5 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 5 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 24 .size: 8 .value_kind: global_buffer - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: gaxpy4 .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: gaxpy4.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 5 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
411689897cef980ae86e01d1a7d25f6a02d6672c
#include<cstdio> #define S 64 #define ZERO 0 #define PI 3.14159265 #define LOW 9 #define HIGH 18 #define QUEUE_SIZE 128 #define KERNEL_RADIUS 8 extern "C" { __device__ bool btwn(int a, int x, int y){ return (a>=x && a<y); } __device__ void load_to_shared(int* src, int cache[][S], int th_x, int th_y, int n, int m){ int val, pos, ind_x, ind_y; if(threadIdx.x==0 && threadIdx.y==0){ ind_x = th_x-1; ind_y = th_y-1; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y][threadIdx.x] = val; } if(threadIdx.x==0 && threadIdx.y==31){ ind_x = th_x-1; ind_y = th_y+1; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+2][threadIdx.x] = val; } if(threadIdx.x==31 && threadIdx.y==0){ ind_x = th_x+1; ind_y = th_y-1; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y][threadIdx.x+2] = val; } if(threadIdx.x==31 && threadIdx.y==31){ ind_x = th_x+1; ind_y = th_y-1; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+2][threadIdx.x+2] = val; } if(threadIdx.y==0){ ind_x = th_x; ind_y = th_y-1; val=ZERO; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y][threadIdx.x+1] = val; } if(threadIdx.y==31){ ind_x = th_x; ind_y = th_y+1; val=ZERO; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+2][threadIdx.x+1] = val; } if(threadIdx.x==0){ ind_x = th_x-1; ind_y = th_y; val=ZERO; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+1][threadIdx.x] = val; } if(threadIdx.x==31){ ind_x = th_x+1; ind_y = th_y; val=ZERO; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+1][threadIdx.x+2] = val; } } __global__ void sobel(int* src, int* dstMagni, float * arcTangensOut){ __shared__ int cache[34][S]; int m = gridDim.x*32, n = gridDim.y*32, th_x = blockIdx.x * 32 + threadIdx.x, th_y = blockIdx.y * 32 + threadIdx.y, i_src = th_y*m + th_x, ind_x, ind_y, magn_x, magn_y, magnAbs_x, magnAbs_y; /*now we load to shared with a frame of thickness eq 1*/ cache[threadIdx.y+1][threadIdx.x+1] = src[i_src]; load_to_shared(src, cache, th_x, th_y, n, m); ind_y = threadIdx.y+1; ind_x = threadIdx.x+1; __syncthreads(); magn_x = cache[ind_y][ind_x-1] - cache[ind_y][ind_x+1]; magnAbs_x = ((magn_x>0) ? magn_x : -magn_x); magn_y = cache[ind_y+1][ind_x] - cache[ind_y-1][ind_x]; magnAbs_y = ((magn_y>0) ? magn_y : -magn_y); dstMagni[i_src] = magnAbs_x + magnAbs_y; arcTangensOut[i_src] = atan2((float) magn_y,(float) magn_x) * 180 / PI; } __global__ void nonMaximalSupression(int * magn, float * arcTangens, int * dest) { __shared__ int cacheMagn[34][S]; int m = gridDim.x*32, n = gridDim.y*32, th_x = blockIdx.x * 32 + threadIdx.x, th_y = blockIdx.y * 32 + threadIdx.y, i_src = th_y*m + th_x, ind_x, ind_y; float angle; cacheMagn[threadIdx.y+1][threadIdx.x+1] = magn[i_src]; load_to_shared(magn, cacheMagn, th_x, th_y, n, m); ind_y = threadIdx.y+1; ind_x = threadIdx.x+1; __syncthreads(); angle = arcTangens[i_src]; if (angle < 0) angle = 360 + angle; //north && south int centerCell = cacheMagn[ind_y][ind_x]; dest[i_src] = centerCell; if ((337.5 <= angle || angle < 22.5) || (157.25 <= angle && angle < 202.5)) { if (cacheMagn[ind_y][ind_x+1] > centerCell || cacheMagn[ind_y][ind_x-1] > centerCell) dest[i_src] = 0; } // north-east && south-west else if ((22.5 <= angle && angle < 67.5) || (202.5 <= angle && angle < 247.5)) { if (cacheMagn[ind_y-1][ind_x+1] > centerCell || cacheMagn[ind_y+1][ind_x-1] > centerCell) dest[i_src] = 0; } // west && east else if ((67.5 <= angle && angle < 112.5) || (247.5 <= angle && angle < 292.5)) { if (cacheMagn[ind_y+1][ind_x] > centerCell || cacheMagn[ind_y-1][ind_x] > centerCell) dest[i_src] = 0; } // west-north && east-south else if ((112.5 <= angle && angle < 157.5) || (292.5 <= angle || angle < 337.5)) { if (cacheMagn[ind_y-1][ind_x-1] > centerCell || cacheMagn[ind_y+1][ind_x+1] > centerCell) dest[i_src] = 0; } } __global__ void prepareBfs(int* src){ int m = gridDim.x*32; int th_x = blockIdx.x * 32 + threadIdx.x; int th_y = blockIdx.y * 32 + threadIdx.y; int i_src = th_y*m + th_x; int val = src[i_src]; if(val < LOW){ src[i_src] = 0; } else if(val >= HIGH){ src[i_src] = -2; } else{ src[i_src] = -1; } } __global__ void oneBfs(int* src, int* dst, int* changed){ __shared__ int cache[34][S]; int m = gridDim.x*32, n = gridDim.y*32, th_x = blockIdx.x * 32 + threadIdx.x, th_y = blockIdx.y * 32 + threadIdx.y, i_src = th_y*m + th_x, ind_y = threadIdx.y+1, ind_x = threadIdx.x+1, queue[QUEUE_SIZE], beg=0, end=0, val, procInd_x, procInd_y, x_new, y_new; cache[threadIdx.y+1][threadIdx.x+1] = src[i_src]; val = cache[ind_y][ind_x]; load_to_shared(src, cache, th_x, th_y, n, m); __syncthreads(); if(val==-1){ for(int i=-1; i<2; ++i){ for(int j=-1; j<2; ++j){ procInd_x = ind_x+i; procInd_y = ind_y+j; if(cache[procInd_y][procInd_x]==-2){ queue[end++] = ind_y; queue[end++] = ind_x; cache[ind_y][ind_x]=-2; *changed=1; i=2; j=2; } } } } while(beg!=end){ procInd_y = queue[beg++]; procInd_x = queue[beg++]; for(int i=-1; i<2; ++i){ for(int j=-1; j<2; ++j){ x_new = procInd_x+i; y_new = procInd_y+j; if(cache[y_new][x_new]==-1 && btwn(y_new, 1, 33) && btwn(x_new, 1, 33)){ queue[end++] = y_new; queue[end++] = x_new; cache[y_new][x_new]=-2; } } } } __syncthreads(); dst[i_src] = cache[ind_y][ind_x]; } __global__ void final_battle(int* src){ int m = gridDim.x*32; int th_x = blockIdx.x * 32 + threadIdx.x; int th_y = blockIdx.y * 32 + threadIdx.y; int i_src = th_y*m + th_x; int val = src[i_src]; if(val==-2){ src[i_src] = 255; } else{ src[i_src] = 0; } } __global__ void gaussianFilter(int * src, int * dest) { __shared__ int cache[34][S]; int n = gridDim.y*32; int m = gridDim.x*32; int th_x = blockIdx.x * 32 + threadIdx.x; int th_y = blockIdx.y * 32 + threadIdx.y; int i_src = th_y*m + th_x; int ind_y, ind_x; cache[threadIdx.y+1][threadIdx.x+1] = src[i_src]; load_to_shared(src, cache, th_x, th_y, n, m); ind_y = threadIdx.y+1+KERNEL_RADIUS; ind_x = threadIdx.x+1+KERNEL_RADIUS; __syncthreads(); int sum = 0; for (int i = -KERNEL_RADIUS; i <= KERNEL_RADIUS; i++) { for (int j = -KERNEL_RADIUS; j <= KERNEL_RADIUS; j++) { sum += cache[ind_y+i][ind_x+j]; //d_kernel[KERNEL_RADIUS + j] } } dest[i_src] = (int) sum; } }
.file "tmpxft_0039e950_00000000-6_cudaStaff.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2031: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2031: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl btwn .type btwn, @function btwn: .LFB2027: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2027: .size btwn, .-btwn .globl load_to_shared .type load_to_shared, @function load_to_shared: .LFB2028: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 popq %rax .cfi_def_cfa_offset 8 subq $24, %rsp .cfi_def_cfa_offset 32 movl $1, 12(%rsp) movl 12(%rsp), %edi call exit@PLT .cfi_endproc .LFE2028: .size load_to_shared, .-load_to_shared .globl _Z28__device_stub__Z5sobelPiS_PfPiS_Pf .type _Z28__device_stub__Z5sobelPiS_PfPiS_Pf, @function _Z28__device_stub__Z5sobelPiS_PfPiS_Pf: .LFB2053: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L6 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq sobel(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L6: movq 120(%rsp), %rax subq %fs:40, %rax je .L8 call __stack_chk_fail@PLT .L8: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2053: .size _Z28__device_stub__Z5sobelPiS_PfPiS_Pf, .-_Z28__device_stub__Z5sobelPiS_PfPiS_Pf .globl sobel .type sobel, @function sobel: .LFB2054: .cfi_startproc endbr64 jmp _Z28__device_stub__Z5sobelPiS_PfPiS_Pf .cfi_endproc .LFE2054: .size sobel, .-sobel .globl _Z44__device_stub__Z20nonMaximalSupressionPiPfS_PiPfS_ .type _Z44__device_stub__Z20nonMaximalSupressionPiPfS_PiPfS_, @function _Z44__device_stub__Z20nonMaximalSupressionPiPfS_PiPfS_: .LFB2055: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L12 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq nonMaximalSupression(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L12: movq 120(%rsp), %rax subq %fs:40, %rax je .L14 call __stack_chk_fail@PLT .L14: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2055: .size _Z44__device_stub__Z20nonMaximalSupressionPiPfS_PiPfS_, .-_Z44__device_stub__Z20nonMaximalSupressionPiPfS_PiPfS_ .globl nonMaximalSupression .type nonMaximalSupression, @function nonMaximalSupression: .LFB2056: .cfi_startproc endbr64 jmp _Z44__device_stub__Z20nonMaximalSupressionPiPfS_PiPfS_ .cfi_endproc .LFE2056: .size nonMaximalSupression, .-nonMaximalSupression .globl _Z30__device_stub__Z10prepareBfsPiPi .type _Z30__device_stub__Z10prepareBfsPiPi, @function _Z30__device_stub__Z10prepareBfsPiPi: .LFB2057: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L17 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq prepareBfs(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L17: movq 88(%rsp), %rax subq %fs:40, %rax je .L19 call __stack_chk_fail@PLT .L19: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2057: .size _Z30__device_stub__Z10prepareBfsPiPi, .-_Z30__device_stub__Z10prepareBfsPiPi .globl prepareBfs .type prepareBfs, @function prepareBfs: .LFB2058: .cfi_startproc endbr64 jmp _Z30__device_stub__Z10prepareBfsPiPi .cfi_endproc .LFE2058: .size prepareBfs, .-prepareBfs .globl _Z29__device_stub__Z6oneBfsPiS_S_PiS_S_ .type _Z29__device_stub__Z6oneBfsPiS_S_PiS_S_, @function _Z29__device_stub__Z6oneBfsPiS_S_PiS_S_: .LFB2059: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L22 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq oneBfs(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L22: movq 120(%rsp), %rax subq %fs:40, %rax je .L24 call __stack_chk_fail@PLT .L24: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2059: .size _Z29__device_stub__Z6oneBfsPiS_S_PiS_S_, .-_Z29__device_stub__Z6oneBfsPiS_S_PiS_S_ .globl oneBfs .type oneBfs, @function oneBfs: .LFB2060: .cfi_startproc endbr64 jmp _Z29__device_stub__Z6oneBfsPiS_S_PiS_S_ .cfi_endproc .LFE2060: .size oneBfs, .-oneBfs .globl _Z32__device_stub__Z12final_battlePiPi .type _Z32__device_stub__Z12final_battlePiPi, @function _Z32__device_stub__Z12final_battlePiPi: .LFB2061: .cfi_startproc endbr64 subq $104, %rsp .cfi_def_cfa_offset 112 movq %rdi, 8(%rsp) leaq 24(%rsp), %rcx leaq 16(%rsp), %rdx leaq 44(%rsp), %rsi leaq 32(%rsp), %rdi movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 40(%rsp) movq %rax, 80(%rsp) movabsq $4294967297, %rax movq %rax, 32(%rsp) movq %rax, 44(%rsp) movl $1, 52(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L27 pushq 24(%rsp) .cfi_def_cfa_offset 120 leaq final_battle(%rip), %rdi pushq 24(%rsp) .cfi_def_cfa_offset 128 movq 60(%rsp), %rcx movl 68(%rsp), %r8d movq 48(%rsp), %rsi movl 56(%rsp), %edx leaq 96(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 120 popq %rdx .cfi_def_cfa_offset 112 .L27: movq 88(%rsp), %rax subq %fs:40, %rax je .L29 call __stack_chk_fail@PLT .L29: addq $104, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2061: .size _Z32__device_stub__Z12final_battlePiPi, .-_Z32__device_stub__Z12final_battlePiPi .globl final_battle .type final_battle, @function final_battle: .LFB2062: .cfi_startproc endbr64 jmp _Z32__device_stub__Z12final_battlePiPi .cfi_endproc .LFE2062: .size final_battle, .-final_battle .globl _Z36__device_stub__Z14gaussianFilterPiS_PiS_ .type _Z36__device_stub__Z14gaussianFilterPiS_PiS_, @function _Z36__device_stub__Z14gaussianFilterPiS_PiS_: .LFB2063: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L32 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq gaussianFilter(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L32: movq 104(%rsp), %rax subq %fs:40, %rax je .L34 call __stack_chk_fail@PLT .L34: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2063: .size _Z36__device_stub__Z14gaussianFilterPiS_PiS_, .-_Z36__device_stub__Z14gaussianFilterPiS_PiS_ .globl gaussianFilter .type gaussianFilter, @function gaussianFilter: .LFB2064: .cfi_startproc endbr64 jmp _Z36__device_stub__Z14gaussianFilterPiS_PiS_ .cfi_endproc .LFE2064: .size gaussianFilter, .-gaussianFilter .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "gaussianFilter" .LC1: .string "final_battle" .LC2: .string "oneBfs" .LC3: .string "prepareBfs" .LC4: .string "nonMaximalSupression" .LC5: .string "sobel" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2066: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq gaussianFilter(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC1(%rip), %rdx orl $-1, %r8d leaq final_battle(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC2(%rip), %rdx orl $-1, %r8d leaq oneBfs(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC3(%rip), %rdx orl $-1, %r8d leaq prepareBfs(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC4(%rip), %rdx orl $-1, %r8d leaq nonMaximalSupression(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC5(%rip), %rdx orl $-1, %r8d leaq sobel(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2066: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : gaussianFilter .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff067624 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe40000000a00 */ /*0040*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e220000002100 */ /*0050*/ IMAD.SHL.U32 R6, R6, 0x20, RZ ; /* 0x0000002006067824 */ /* 0x000fc600078e00ff */ /*0060*/ S2R R14, SR_TID.Y ; /* 0x00000000000e7919 */ /* 0x000e680000002200 */ /*0070*/ S2R R15, SR_CTAID.Y ; /* 0x00000000000f7919 */ /* 0x000e620000002600 */ /*0080*/ IMAD R9, R0, 0x20, R7 ; /* 0x0000002000097824 */ /* 0x001fe400078e0207 */ /*0090*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ; /* 0x00000004ff007424 */ /* 0x000fe400078e00ff */ /*00a0*/ IMAD R15, R15, 0x20, R14 ; /* 0x000000200f0f7824 */ /* 0x002fc800078e020e */ /*00b0*/ IMAD R3, R6, R15, R9 ; /* 0x0000000f06037224 */ /* 0x000fc800078e0209 */ /*00c0*/ IMAD.WIDE R4, R3, R0, c[0x0][0x160] ; /* 0x0000580003047625 */ /* 0x000fca00078e0200 */ /*00d0*/ LDG.E R13, [R4.64] ; /* 0x00000006040d7981 */ /* 0x000ea2000c1e1900 */ /*00e0*/ IMAD.SHL.U32 R8, R14, 0x100, RZ ; /* 0x000001000e087824 */ /* 0x000fe200078e00ff */ /*00f0*/ LOP3.LUT P0, RZ, R7.reuse, R14, RZ, 0xfc, !PT ; /* 0x0000000e07ff7212 */ /* 0x040fe2000780fcff */ /*0100*/ IMAD.SHL.U32 R11, R7, 0x4, RZ ; /* 0x00000004070b7824 */ /* 0x000fe200078e00ff */ /*0110*/ BSSY B0, 0x250 ; /* 0x0000013000007945 */ /* 0x000fe20003800000 */ /*0120*/ IMAD R10, R6, R15, -R6 ; /* 0x0000000f060a7224 */ /* 0x000fe400078e0a06 */ /*0130*/ IMAD.IADD R2, R8, 0x1, R11 ; /* 0x0000000108027824 */ /* 0x000fc600078e020b */ /*0140*/ IADD3 R11, R10, -0x1, R9 ; /* 0xffffffff0a0b7810 */ /* 0x000fca0007ffe009 */ /*0150*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x000fe200078e0200 */ /*0160*/ STS [R2+0x104], R13 ; /* 0x0001040d02007388 */ /* 0x0041e20000000800 */ /*0170*/ @P0 BRA 0x240 ; /* 0x000000c000000947 */ /* 0x000fea0003800000 */ /*0180*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0190*/ ISETP.GE.AND P0, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f06270 */ /*01a0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*01b0*/ ISETP.GE.AND P1, PT, R15, 0x1, PT ; /* 0x000000010f00780c */ /* 0x000fe20003f26270 */ /*01c0*/ BSSY B1, 0x230 ; /* 0x0000006000017945 */ /* 0x000fe20003800000 */ /*01d0*/ ISETP.GT.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fc60004704670 */ /*01e0*/ ISETP.GT.OR P1, PT, R15, UR4, !P1 ; /* 0x000000040f007c0c */ /* 0x000fc8000cf24670 */ /*01f0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0200*/ @P0 BRA 0x220 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0210*/ LDG.E R13, [R10.64] ; /* 0x000000060a0d7981 */ /* 0x001164000c1e1900 */ /*0220*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0230*/ STS [R2], R13 ; /* 0x0000000d02007388 */ /* 0x0203e40000000800 */ /*0240*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0250*/ ISETP.NE.AND P2, PT, R14, 0x1f, PT ; /* 0x0000001f0e00780c */ /* 0x000fe20003f45270 */ /*0260*/ BSSY B0, 0x3b0 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*0270*/ ISETP.NE.AND P3, PT, R7.reuse, RZ, PT ; /* 0x000000ff0700720c */ /* 0x040fe40003f65270 */ /*0280*/ ISETP.NE.OR P0, PT, R7, RZ, P2 ; /* 0x000000ff0700720c */ /* 0x000fda0001705670 */ /*0290*/ @P0 BRA 0x3a0 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*02a0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*02b0*/ ISETP.GE.AND P1, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f26270 */ /*02c0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*02d0*/ ISETP.GE.AND P0, PT, R15.reuse, -0x1, PT ; /* 0xffffffff0f00780c */ /* 0x040fe20003f06270 */ /*02e0*/ BSSY B1, 0x390 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*02f0*/ IADD3 R12, R15, 0x1, RZ ; /* 0x000000010f0c7810 */ /* 0x000fe40007ffe0ff */ /*0300*/ ISETP.GT.OR P1, PT, R9, R6, !P1 ; /* 0x000000060900720c */ /* 0x000fe40004f24670 */ /*0310*/ ISETP.GE.OR P0, PT, R12, UR4, !P0 ; /* 0x000000040c007c0c */ /* 0x000fc8000c706670 */ /*0320*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*0330*/ @P0 BRA 0x380 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0340*/ IMAD R12, R6, R15, R6 ; /* 0x0000000f060c7224 */ /* 0x000fca00078e0206 */ /*0350*/ IADD3 R13, R12, -0x1, R9 ; /* 0xffffffff0c0d7810 */ /* 0x003fca0007ffe009 */ /*0360*/ IMAD.WIDE R12, R13, R0, c[0x0][0x160] ; /* 0x000058000d0c7625 */ /* 0x000fcc00078e0200 */ /*0370*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000164000c1e1900 */ /*0380*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0390*/ STS [0x2100], R13 ; /* 0x0021000dff007388 */ /* 0x0205e40000000800 */ /*03a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*03b0*/ ISETP.NE.AND P4, PT, R7, 0x1f, PT ; /* 0x0000001f0700780c */ /* 0x000fe20003f85270 */ /*03c0*/ BSSY B0, 0x4e0 ; /* 0x0000011000007945 */ /* 0x000fe20003800000 */ /*03d0*/ ISETP.NE.AND P5, PT, R14.reuse, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x040fe40003fa5270 */ /*03e0*/ ISETP.NE.OR P0, PT, R14, RZ, P4 ; /* 0x000000ff0e00720c */ /* 0x000fda0002705670 */ /*03f0*/ @P0 BRA 0x4d0 ; /* 0x000000d000000947 */ /* 0x000fea0003800000 */ /*0400*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0410*/ ISETP.GE.AND P1, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f26270 */ /*0420*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0430*/ IADD3 R17, R9, 0x1, RZ ; /* 0x0000000109117810 */ /* 0x000fe20007ffe0ff */ /*0440*/ BSSY B1, 0x4c0 ; /* 0x0000007000017945 */ /* 0x000fe20003800000 */ /*0450*/ ISETP.GE.AND P0, PT, R15, 0x1, PT ; /* 0x000000010f00780c */ /* 0x000fe40003f06270 */ /*0460*/ ISETP.GE.OR P1, PT, R17, R6, !P1 ; /* 0x000000061100720c */ /* 0x000fe40004f26670 */ /*0470*/ ISETP.GT.OR P0, PT, R15, UR4, !P0 ; /* 0x000000040f007c0c */ /* 0x000fc8000c704670 */ /*0480*/ PLOP3.LUT P1, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f21570 */ /*0490*/ @P1 BRA 0x4b0 ; /* 0x0000001000001947 */ /* 0x000fea0003800000 */ /*04a0*/ LDG.E R13, [R10.64+0x8] ; /* 0x000008060a0d7981 */ /* 0x007164000c1e1900 */ /*04b0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*04c0*/ STS [0x84], R13 ; /* 0x0000840dff007388 */ /* 0x0207e40000000800 */ /*04d0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*04e0*/ ISETP.NE.OR P0, PT, R7, 0x1f, P2 ; /* 0x0000001f0700780c */ /* 0x000fe20001705670 */ /*04f0*/ BSSY B0, 0x5f0 ; /* 0x000000f000007945 */ /* 0x000fd80003800000 */ /*0500*/ @P0 BRA 0x5e0 ; /* 0x000000d000000947 */ /* 0x000fea0003800000 */ /*0510*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0520*/ ISETP.GE.AND P1, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f26270 */ /*0530*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0540*/ IADD3 R17, R9, 0x1, RZ ; /* 0x0000000109117810 */ /* 0x000fe20007ffe0ff */ /*0550*/ BSSY B1, 0x5d0 ; /* 0x0000007000017945 */ /* 0x000fe20003800000 */ /*0560*/ ISETP.GE.AND P0, PT, R15, 0x1, PT ; /* 0x000000010f00780c */ /* 0x000fe40003f06270 */ /*0570*/ ISETP.GE.OR P1, PT, R17, R6, !P1 ; /* 0x000000061100720c */ /* 0x000fe40004f26670 */ /*0580*/ ISETP.GT.OR P0, PT, R15, UR4, !P0 ; /* 0x000000040f007c0c */ /* 0x000fc8000c704670 */ /*0590*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*05a0*/ @P0 BRA 0x5c0 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*05b0*/ LDG.E R13, [R10.64+0x8] ; /* 0x000008060a0d7981 */ /* 0x00f164000c1e1900 */ /*05c0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*05d0*/ STS [0x2184], R13 ; /* 0x0021840dff007388 */ /* 0x0209e40000000800 */ /*05e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*05f0*/ BSSY B0, 0x720 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*0600*/ @P5 BRA 0x710 ; /* 0x0000010000005947 */ /* 0x000fea0003800000 */ /*0610*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0620*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f06270 */ /*0630*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0640*/ ISETP.GE.AND P1, PT, R15, 0x1, PT ; /* 0x000000010f00780c */ /* 0x000fe20003f26270 */ /*0650*/ BSSY B1, 0x700 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*0660*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe20004706670 */ /*0670*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x001fe400078e00ff */ /*0680*/ ISETP.GT.OR P1, PT, R15, UR4, !P1 ; /* 0x000000040f007c0c */ /* 0x000fc8000cf24670 */ /*0690*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*06a0*/ @P0 BRA 0x6f0 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*06b0*/ IADD3 R10, R15, -0x1, RZ ; /* 0xffffffff0f0a7810 */ /* 0x000fca0007ffe0ff */ /*06c0*/ IMAD R11, R6, R10, R9 ; /* 0x0000000a060b7224 */ /* 0x000fc800078e0209 */ /*06d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x000fcc00078e0200 */ /*06e0*/ LDG.E R10, [R10.64] ; /* 0x000000060a0a7981 */ /* 0x000164000c1e1900 */ /*06f0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0700*/ STS [R7.X4+0x4], R10 ; /* 0x0000040a07007388 */ /* 0x0201e40000004800 */ /*0710*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0720*/ BSSY B0, 0x850 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*0730*/ @P2 BRA 0x840 ; /* 0x0000010000002947 */ /* 0x000fea0003800000 */ /*0740*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0750*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f06270 */ /*0760*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0770*/ ISETP.GE.AND P1, PT, R15.reuse, -0x1, PT ; /* 0xffffffff0f00780c */ /* 0x040fe20003f26270 */ /*0780*/ BSSY B1, 0x830 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*0790*/ IADD3 R11, R15, 0x1, RZ ; /* 0x000000010f0b7810 */ /* 0x001fe20007ffe0ff */ /*07a0*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e00ff */ /*07b0*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe40004706670 */ /*07c0*/ ISETP.GE.OR P1, PT, R11, UR4, !P1 ; /* 0x000000040b007c0c */ /* 0x000fc8000cf26670 */ /*07d0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*07e0*/ @P0 BRA 0x820 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*07f0*/ IMAD R11, R6, R11, R9 ; /* 0x0000000b060b7224 */ /* 0x000fc800078e0209 */ /*0800*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ; /* 0x000058000b0a7625 */ /* 0x000fcc00078e0200 */ /*0810*/ LDG.E R10, [R10.64] ; /* 0x000000060a0a7981 */ /* 0x000164000c1e1900 */ /*0820*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0830*/ STS [R7.X4+0x2104], R10 ; /* 0x0021040a07007388 */ /* 0x0201e40000004800 */ /*0840*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0850*/ BSSY B0, 0x950 ; /* 0x000000f000007945 */ /* 0x000fe20003800000 */ /*0860*/ @P3 BRA 0x940 ; /* 0x000000d000003947 */ /* 0x000fea0003800000 */ /*0870*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0880*/ ISETP.GE.AND P1, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f26270 */ /*0890*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*08a0*/ ISETP.GE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */ /* 0x000fe20003f06270 */ /*08b0*/ BSSY B1, 0x930 ; /* 0x0000007000017945 */ /* 0x000fe20003800000 */ /*08c0*/ ISETP.GT.OR P1, PT, R9, R6, !P1 ; /* 0x000000060900720c */ /* 0x000fe20004f24670 */ /*08d0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x001fe400078e00ff */ /*08e0*/ ISETP.GE.OR P0, PT, R15, UR4, !P0 ; /* 0x000000040f007c0c */ /* 0x000fc8000c706670 */ /*08f0*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*0900*/ @P0 BRA 0x920 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0910*/ LDG.E R7, [R4.64+-0x4] ; /* 0xfffffc0604077981 */ /* 0x000164000c1e1900 */ /*0920*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0930*/ STS [R8+0x100], R7 ; /* 0x0001000708007388 */ /* 0x0201e40000000800 */ /*0940*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0950*/ BSSY B0, 0xa60 ; /* 0x0000010000007945 */ /* 0x000fe20003800000 */ /*0960*/ @P4 BRA 0xa50 ; /* 0x000000e000004947 */ /* 0x000fea0003800000 */ /*0970*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0980*/ ISETP.GE.AND P0, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f06270 */ /*0990*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*09a0*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */ /* 0x000fe20007ffe0ff */ /*09b0*/ BSSY B1, 0xa40 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*09c0*/ ISETP.GE.AND P1, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */ /* 0x000fe20003f26270 */ /*09d0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x001fe200078e00ff */ /*09e0*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe40004706670 */ /*09f0*/ ISETP.GE.OR P1, PT, R15, UR4, !P1 ; /* 0x000000040f007c0c */ /* 0x000fc8000cf26670 */ /*0a00*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0a10*/ @P0 BRA 0xa30 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0a20*/ LDG.E R7, [R4.64+0x4] ; /* 0x0000040604077981 */ /* 0x000164000c1e1900 */ /*0a30*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0a40*/ STS [R8+0x184], R7 ; /* 0x0001840708007388 */ /* 0x0201e40000000800 */ /*0a50*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0a60*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0a70*/ UMOV UR4, 0x124 ; /* 0x0000012400047882 */ /* 0x000fe20000000000 */ /*0a80*/ LDS R4, [R2+0x104] ; /* 0x0001040002047984 */ /* 0x001fe80000000800 */ /*0a90*/ LDS R5, [R2+0x108] ; /* 0x0001080002057984 */ /* 0x000fe80000000800 */ /*0aa0*/ LDS R6, [R2+0x10c] ; /* 0x00010c0002067984 */ /* 0x000e280000000800 */ /*0ab0*/ LDS R7, [R2+0x110] ; /* 0x0001100002077984 */ /* 0x000fe80000000800 */ /*0ac0*/ LDS R8, [R2+0x114] ; /* 0x0001140002087984 */ /* 0x000f680000000800 */ /*0ad0*/ LDS R9, [R2+0x118] ; /* 0x0001180002097984 */ /* 0x000fe80000000800 */ /*0ae0*/ LDS R10, [R2+0x11c] ; /* 0x00011c00020a7984 */ /* 0x000e680000000800 */ /*0af0*/ LDS R11, [R2+0x120] ; /* 0x00012000020b7984 */ /* 0x000fe80000000800 */ /*0b00*/ LDS R12, [R2+0x124] ; /* 0x00012400020c7984 */ /* 0x000ea80000000800 */ /*0b10*/ LDS R13, [R2+0x128] ; /* 0x00012800020d7984 */ /* 0x01efe80000000800 */ /*0b20*/ LDS R14, [R2+0x12c] ; /* 0x00012c00020e7984 */ /* 0x000e680000000800 */ /*0b30*/ LDS R15, [R2+0x130] ; /* 0x00013000020f7984 */ /* 0x000fe80000000800 */ /*0b40*/ LDS R16, [R2+0x134] ; /* 0x0001340002107984 */ /* 0x000ea20000000800 */ /*0b50*/ IADD3 R4, R6, R5, R4 ; /* 0x0000000506047210 */ /* 0x001fc60007ffe004 */ /*0b60*/ LDS R17, [R2+0x138] ; /* 0x0001380002117984 */ /* 0x000fe80000000800 */ /*0b70*/ LDS R18, [R2+0x13c] ; /* 0x00013c0002127984 */ /* 0x000e220000000800 */ /*0b80*/ IADD3 R4, R8, R7, R4 ; /* 0x0000000708047210 */ /* 0x020fc60007ffe004 */ /*0b90*/ LDS R19, [R2+0x140] ; /* 0x0001400002137984 */ /* 0x000fe80000000800 */ /*0ba0*/ LDS R20, [R2+0x144] ; /* 0x0001440002147984 */ /* 0x000ee20000000800 */ /*0bb0*/ IADD3 R4, R10, R9, R4 ; /* 0x000000090a047210 */ /* 0x000fc80007ffe004 */ /*0bc0*/ IADD3 R4, R12, R11, R4 ; /* 0x0000000b0c047210 */ /* 0x000fc80007ffe004 */ /*0bd0*/ IADD3 R4, R14, R13, R4 ; /* 0x0000000d0e047210 */ /* 0x002fc80007ffe004 */ /*0be0*/ IADD3 R4, R16, R15, R4 ; /* 0x0000000f10047210 */ /* 0x004fc80007ffe004 */ /*0bf0*/ IADD3 R4, R18, R17, R4 ; /* 0x0000001112047210 */ /* 0x001fe40007ffe004 */ /*0c00*/ IADD3 R18, R2, 0x124, RZ ; /* 0x0000012402127810 */ /* 0x000fe40007ffe0ff */ /*0c10*/ IADD3 R15, R20, R19, R4 ; /* 0x00000013140f7210 */ /* 0x008fc60007ffe004 */ /*0c20*/ LDS R14, [R18+0xe0] ; /* 0x0000e000120e7984 */ /* 0x000fe20000000800 */ /*0c30*/ UIADD3 UR4, UR4, 0x200, URZ ; /* 0x0000020004047890 */ /* 0x000fc6000fffe03f */ /*0c40*/ LDS R16, [R18+0xe4] ; /* 0x0000e40012107984 */ /* 0x000e220000000800 */ /*0c50*/ UISETP.NE.AND UP0, UPT, UR4, 0x1124, UPT ; /* 0x000011240400788c */ /* 0x000fc6000bf05270 */ /*0c60*/ LDS R17, [R18+0xe8] ; /* 0x0000e80012117984 */ /* 0x000fe60000000800 */ /*0c70*/ PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0f008 */ /*0c80*/ LDS R19, [R18+0xec] ; /* 0x0000ec0012137984 */ /* 0x000e680000000800 */ /*0c90*/ LDS R20, [R18+0xf0] ; /* 0x0000f00012147984 */ /* 0x000fe80000000800 */ /*0ca0*/ LDS R21, [R18+0xf4] ; /* 0x0000f40012157984 */ /* 0x000ea80000000800 */ /*0cb0*/ LDS R23, [R18+0xf8] ; /* 0x0000f80012177984 */ /* 0x000fe80000000800 */ /*0cc0*/ LDS R22, [R18+0xfc] ; /* 0x0000fc0012167984 */ /* 0x000ee80000000800 */ /*0cd0*/ LDS R25, [R18+0x100] ; /* 0x0001000012197984 */ /* 0x000fe80000000800 */ /*0ce0*/ LDS R24, [R18+0x104] ; /* 0x0001040012187984 */ /* 0x000f280000000800 */ /*0cf0*/ LDS R8, [R18+0x108] ; /* 0x0001080012087984 */ /* 0x000fe80000000800 */ /*0d00*/ LDS R9, [R18+0x10c] ; /* 0x00010c0012097984 */ /* 0x000f620000000800 */ /*0d10*/ IADD3 R16, R16, R14, R15 ; /* 0x0000000e10107210 */ /* 0x001fc60007ffe00f */ /*0d20*/ LDS R7, [R18+0x110] ; /* 0x0001100012077984 */ /* 0x000fe80000000800 */ /*0d30*/ LDS R6, [R18+0x114] ; /* 0x0001140012067984 */ /* 0x000e220000000800 */ /*0d40*/ IADD3 R19, R19, R17, R16 ; /* 0x0000001113137210 */ /* 0x002fc60007ffe010 */ /*0d50*/ LDS R4, [R18+0x118] ; /* 0x0001180012047984 */ /* 0x000fe80000000800 */ /*0d60*/ LDS R5, [R18+0x11c] ; /* 0x00011c0012057984 */ /* 0x000e620000000800 */ /*0d70*/ IADD3 R20, R21, R20, R19 ; /* 0x0000001415147210 */ /* 0x004fc60007ffe013 */ /*0d80*/ LDS R13, [R18+0x120] ; /* 0x00012000120d7984 */ /* 0x000fe80000000800 */ /*0d90*/ LDS R12, [R2+UR4+-0x20] ; /* 0xffffe004020c7984 */ /* 0x000ea20008000800 */ /*0da0*/ IADD3 R22, R22, R23, R20 ; /* 0x0000001716167210 */ /* 0x008fc60007ffe014 */ /*0db0*/ LDS R11, [R2+UR4+-0x1c] ; /* 0xffffe404020b7984 */ /* 0x000fe80008000800 */ /*0dc0*/ LDS R10, [R2+UR4+-0x18] ; /* 0xffffe804020a7984 */ /* 0x000ee20008000800 */ /*0dd0*/ IADD3 R22, R24, R25, R22 ; /* 0x0000001918167210 */ /* 0x010fc60007ffe016 */ /*0de0*/ LDS R15, [R2+UR4+-0x14] ; /* 0xffffec04020f7984 */ /* 0x000fe80008000800 */ /*0df0*/ LDS R14, [R2+UR4+-0x10] ; /* 0xfffff004020e7984 */ /* 0x000f220008000800 */ /*0e00*/ IADD3 R8, R9, R8, R22 ; /* 0x0000000809087210 */ /* 0x020fc60007ffe016 */ /*0e10*/ LDS R17, [R2+UR4+-0xc] ; /* 0xfffff40402117984 */ /* 0x000fe80008000800 */ /*0e20*/ LDS R16, [R2+UR4+-0x8] ; /* 0xfffff80402107984 */ /* 0x000f620008000800 */ /*0e30*/ IADD3 R6, R6, R7, R8 ; /* 0x0000000706067210 */ /* 0x001fc60007ffe008 */ /*0e40*/ LDS R19, [R2+UR4+-0x4] ; /* 0xfffffc0402137984 */ /* 0x000fe80008000800 */ /*0e50*/ LDS R18, [R2+UR4] ; /* 0x0000000402127984 */ /* 0x000e220008000800 */ /*0e60*/ IADD3 R4, R5, R4, R6 ; /* 0x0000000405047210 */ /* 0x002fc60007ffe006 */ /*0e70*/ LDS R21, [R2+UR4+0x4] ; /* 0x0000040402157984 */ /* 0x000fe80008000800 */ /*0e80*/ LDS R20, [R2+UR4+0x8] ; /* 0x0000080402147984 */ /* 0x000e620008000800 */ /*0e90*/ IADD3 R4, R12, R13, R4 ; /* 0x0000000d0c047210 */ /* 0x004fc60007ffe004 */ /*0ea0*/ LDS R23, [R2+UR4+0xc] ; /* 0x00000c0402177984 */ /* 0x000fe80008000800 */ /*0eb0*/ LDS R24, [R2+UR4+0x10] ; /* 0x0000100402187984 */ /* 0x000ea20008000800 */ /*0ec0*/ IADD3 R4, R10, R11, R4 ; /* 0x0000000b0a047210 */ /* 0x008fc60007ffe004 */ /*0ed0*/ LDS R9, [R2+UR4+0x14] ; /* 0x0000140402097984 */ /* 0x000fe80008000800 */ /*0ee0*/ LDS R22, [R2+UR4+0x18] ; /* 0x0000180402167984 */ /* 0x000ee20008000800 */ /*0ef0*/ IADD3 R4, R14, R15, R4 ; /* 0x0000000f0e047210 */ /* 0x010fc60007ffe004 */ /*0f00*/ LDS R7, [R2+UR4+0x1c] ; /* 0x00001c0402077984 */ /* 0x000fe80008000800 */ /*0f10*/ LDS R8, [R2+UR4+0x20] ; /* 0x0000200402087984 */ /* 0x000f220008000800 */ /*0f20*/ IADD3 R4, R16, R17, R4 ; /* 0x0000001110047210 */ /* 0x020fc80007ffe004 */ /*0f30*/ IADD3 R4, R18, R19, R4 ; /* 0x0000001312047210 */ /* 0x001fe40007ffe004 */ /*0f40*/ IADD3 R18, R2, UR4, RZ ; /* 0x0000000402127c10 */ /* 0x000fe4000fffe0ff */ /*0f50*/ IADD3 R4, R20, R21, R4 ; /* 0x0000001514047210 */ /* 0x002fc80007ffe004 */ /*0f60*/ IADD3 R4, R24, R23, R4 ; /* 0x0000001718047210 */ /* 0x004fc80007ffe004 */ /*0f70*/ IADD3 R4, R22, R9, R4 ; /* 0x0000000916047210 */ /* 0x008fc80007ffe004 */ /*0f80*/ IADD3 R15, R8, R7, R4 ; /* 0x00000007080f7210 */ /* 0x010fe20007ffe004 */ /*0f90*/ @P0 BRA 0xc20 ; /* 0xfffffc8000000947 */ /* 0x000fea000383ffff */ /*0fa0*/ IMAD.WIDE R2, R3, R0, c[0x0][0x168] ; /* 0x00005a0003027625 */ /* 0x000fca00078e0200 */ /*0fb0*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */ /* 0x000fe2000c101906 */ /*0fc0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0fd0*/ BRA 0xfd0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0fe0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ff0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1000*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1010*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1020*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1030*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1040*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1050*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1060*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : final_battle .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e220000002600 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R7, SR_TID.Y ; /* 0x0000000000077919 */ /* 0x000e280000002200 */ /*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e680000002500 */ /*0050*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */ /* 0x000ea20000002100 */ /*0060*/ IMAD R0, R0, 0x20, R7 ; /* 0x0000002000007824 */ /* 0x001fc800078e0207 */ /*0070*/ IMAD R0, R0, c[0x0][0xc], R3 ; /* 0x0000030000007a24 */ /* 0x002fe200078e0203 */ /*0080*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x000fc80000000f00 */ /*0090*/ LEA R0, R0, R5, 0x5 ; /* 0x0000000500007211 */ /* 0x004fca00078e28ff */ /*00a0*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fca00078e0203 */ /*00b0*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea4000c1e1900 */ /*00c0*/ ISETP.NE.AND P0, PT, R0, -0x2, PT ; /* 0xfffffffe0000780c */ /* 0x004fc80003f05270 */ /*00d0*/ SEL R5, RZ, 0xff, P0 ; /* 0x000000ffff057807 */ /* 0x000fca0000000000 */ /*00e0*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*00f0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0100*/ BRA 0x100; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : oneBfs .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R9, SR_TID.Y ; /* 0x0000000000097919 */ /* 0x000e220000002200 */ /*0020*/ ULDC UR4, c[0x0][0xc] ; /* 0x0000030000047ab9 */ /* 0x000fe20000000800 */ /*0030*/ IMAD.MOV.U32 R19, RZ, RZ, 0x4 ; /* 0x00000004ff137424 */ /* 0x000fe200078e00ff */ /*0040*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0050*/ S2R R10, SR_CTAID.Y ; /* 0x00000000000a7919 */ /* 0x000e220000002600 */ /*0060*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0070*/ IADD3 R1, R1, -0x200, RZ ; /* 0xfffffe0001017810 */ /* 0x000fe40007ffe0ff */ /*0080*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e680000002500 */ /*0090*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */ /* 0x000e620000002100 */ /*00a0*/ IMAD R10, R10, 0x20, R9 ; /* 0x000000200a0a7824 */ /* 0x001fc800078e0209 */ /*00b0*/ IMAD R13, R10, UR4, RZ ; /* 0x000000040a0d7c24 */ /* 0x000fe4000f8e02ff */ /*00c0*/ IMAD R12, R3, 0x20, R8 ; /* 0x00000020030c7824 */ /* 0x002fc800078e0208 */ /*00d0*/ IMAD.IADD R0, R12, 0x1, R13 ; /* 0x000000010c007824 */ /* 0x000fc800078e020d */ /*00e0*/ IMAD.WIDE R6, R0, R19, c[0x0][0x160] ; /* 0x0000580000067625 */ /* 0x000fca00078e0213 */ /*00f0*/ LDG.E R11, [R6.64] ; /* 0x00000006060b7981 */ /* 0x000ea2000c1e1900 */ /*0100*/ IMAD R2, R9.reuse, 0x40, R8 ; /* 0x0000004009027824 */ /* 0x040fe200078e0208 */ /*0110*/ LOP3.LUT P0, RZ, R8, R9, RZ, 0xfc, !PT ; /* 0x0000000908ff7212 */ /* 0x000fe2000780fcff */ /*0120*/ ULDC UR5, c[0x0][0x10] ; /* 0x0000040000057ab9 */ /* 0x000fe20000000800 */ /*0130*/ IADD3 R3, R12, -UR4, R13 ; /* 0x800000040c037c10 */ /* 0x000fe2000fffe00d */ /*0140*/ USHF.L.U32 UR5, UR5, 0x5, URZ ; /* 0x0000000505057899 */ /* 0x000fe2000800063f */ /*0150*/ BSSY B0, 0x280 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*0160*/ IADD3 R4, R9, 0x1, RZ ; /* 0x0000000109047810 */ /* 0x000fe40007ffe0ff */ /*0170*/ IADD3 R14, R3, -0x1, RZ ; /* 0xffffffff030e7810 */ /* 0x000fe40007ffe0ff */ /*0180*/ IADD3 R5, R8, 0x1, RZ ; /* 0x0000000108057810 */ /* 0x000fc40007ffe0ff */ /*0190*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */ /* 0x000fe20000011400 */ /*01a0*/ IMAD.WIDE R14, R14, R19, c[0x0][0x160] ; /* 0x000058000e0e7625 */ /* 0x000fe200078e0213 */ /*01b0*/ STS [R2.X4+0x104], R11 ; /* 0x0001040b02007388 */ /* 0x0041e20000004800 */ /*01c0*/ @P0 BRA 0x270 ; /* 0x000000a000000947 */ /* 0x000fea0003800000 */ /*01d0*/ ISETP.GE.AND P0, PT, R12, 0x1, PT ; /* 0x000000010c00780c */ /* 0x000fe20003f06270 */ /*01e0*/ BSSY B1, 0x260 ; /* 0x0000007000017945 */ /* 0x000fe20003800000 */ /*01f0*/ ISETP.GE.AND P1, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x000fe40003f26270 */ /*0200*/ ISETP.GT.OR P0, PT, R12, UR4, !P0 ; /* 0x000000040c007c0c */ /* 0x000fe4000c704670 */ /*0210*/ ISETP.GT.OR P1, PT, R10, UR5, !P1 ; /* 0x000000050a007c0c */ /* 0x000fc8000cf24670 */ /*0220*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0230*/ @P0 BRA 0x250 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0240*/ LDG.E R17, [R14.64] ; /* 0x000000060e117981 */ /* 0x000364000c1e1900 */ /*0250*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0260*/ STS [R2.X4], R17 ; /* 0x0000001102007388 */ /* 0x0205e40000004800 */ /*0270*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0280*/ ISETP.NE.AND P2, PT, R9, 0x1f, PT ; /* 0x0000001f0900780c */ /* 0x000fe20003f45270 */ /*0290*/ BSSY B0, 0x3c0 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*02a0*/ ISETP.NE.AND P1, PT, R8.reuse, RZ, PT ; /* 0x000000ff0800720c */ /* 0x040fe40003f25270 */ /*02b0*/ ISETP.NE.OR P0, PT, R8, RZ, P2 ; /* 0x000000ff0800720c */ /* 0x000fda0001705670 */ /*02c0*/ @P0 BRA 0x3b0 ; /* 0x000000e000000947 */ /* 0x000fea0003800000 */ /*02d0*/ IADD3 R16, R10, 0x1, RZ ; /* 0x000000010a107810 */ /* 0x000fe20007ffe0ff */ /*02e0*/ BSSY B1, 0x3a0 ; /* 0x000000b000017945 */ /* 0x000fe20003800000 */ /*02f0*/ ISETP.GE.AND P3, PT, R12, 0x1, PT ; /* 0x000000010c00780c */ /* 0x000fe40003f66270 */ /*0300*/ ISETP.GE.AND P0, PT, R16, UR5, PT ; /* 0x0000000510007c0c */ /* 0x000fe4000bf06270 */ /*0310*/ ISETP.GT.OR P3, PT, R12, UR4, !P3 ; /* 0x000000040c007c0c */ /* 0x000fe4000df64670 */ /*0320*/ ISETP.LT.OR P0, PT, R10, -0x1, P0 ; /* 0xffffffff0a00780c */ /* 0x000fc80000701670 */ /*0330*/ PLOP3.LUT P0, PT, P3, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0001f01570 */ /*0340*/ @P0 BRA 0x390 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0350*/ IADD3 R13, R12, UR4, R13 ; /* 0x000000040c0d7c10 */ /* 0x000fc8000fffe00d */ /*0360*/ IADD3 R13, R13, -0x1, RZ ; /* 0xffffffff0d0d7810 */ /* 0x000fca0007ffe0ff */ /*0370*/ IMAD.WIDE R16, R13, R19, c[0x0][0x160] ; /* 0x000058000d107625 */ /* 0x004fcc00078e0213 */ /*0380*/ LDG.E R17, [R16.64] ; /* 0x0000000610117981 */ /* 0x000564000c1e1900 */ /*0390*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*03a0*/ STS [0x2100], R17 ; /* 0x00210011ff007388 */ /* 0x0207e40000000800 */ /*03b0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*03c0*/ ISETP.NE.AND P3, PT, R8, 0x1f, PT ; /* 0x0000001f0800780c */ /* 0x000fe20003f65270 */ /*03d0*/ BSSY B0, 0x4d0 ; /* 0x000000f000007945 */ /* 0x000fe20003800000 */ /*03e0*/ ISETP.NE.AND P4, PT, R9.reuse, RZ, PT ; /* 0x000000ff0900720c */ /* 0x040fe40003f85270 */ /*03f0*/ ISETP.NE.OR P0, PT, R9, RZ, P3 ; /* 0x000000ff0900720c */ /* 0x000fda0001f05670 */ /*0400*/ @P0 BRA 0x4c0 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*0410*/ IADD3 R13, R12, 0x1, RZ ; /* 0x000000010c0d7810 */ /* 0x000fe20007ffe0ff */ /*0420*/ BSSY B1, 0x4b0 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*0430*/ ISETP.GE.AND P5, PT, R10.reuse, 0x1, PT ; /* 0x000000010a00780c */ /* 0x040fe40003fa6270 */ /*0440*/ ISETP.GE.AND P0, PT, R13, UR4, PT ; /* 0x000000040d007c0c */ /* 0x000fe4000bf06270 */ /*0450*/ ISETP.GT.OR P5, PT, R10, UR5, !P5 ; /* 0x000000050a007c0c */ /* 0x000fe4000efa4670 */ /*0460*/ ISETP.LT.OR P0, PT, R12, -0x1, P0 ; /* 0xffffffff0c00780c */ /* 0x000fc80000701670 */ /*0470*/ PLOP3.LUT P0, PT, P0, P5, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda000070b570 */ /*0480*/ @P0 BRA 0x4a0 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0490*/ LDG.E R17, [R14.64+0x8] ; /* 0x000008060e117981 */ /* 0x00c564000c1e1900 */ /*04a0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*04b0*/ STS [0x84], R17 ; /* 0x00008411ff007388 */ /* 0x0209e40000000800 */ /*04c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*04d0*/ ISETP.NE.OR P0, PT, R8, 0x1f, P2 ; /* 0x0000001f0800780c */ /* 0x000fe20001705670 */ /*04e0*/ BSSY B0, 0x5c0 ; /* 0x000000d000007945 */ /* 0x000fd80003800000 */ /*04f0*/ @P0 BRA 0x5b0 ; /* 0x000000b000000947 */ /* 0x000fea0003800000 */ /*0500*/ IADD3 R13, R12, 0x1, RZ ; /* 0x000000010c0d7810 */ /* 0x000fe20007ffe0ff */ /*0510*/ BSSY B1, 0x5a0 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*0520*/ ISETP.GE.AND P5, PT, R10.reuse, 0x1, PT ; /* 0x000000010a00780c */ /* 0x040fe40003fa6270 */ /*0530*/ ISETP.GE.AND P0, PT, R13, UR4, PT ; /* 0x000000040d007c0c */ /* 0x000fe4000bf06270 */ /*0540*/ ISETP.GT.OR P5, PT, R10, UR5, !P5 ; /* 0x000000050a007c0c */ /* 0x000fe4000efa4670 */ /*0550*/ ISETP.LT.OR P0, PT, R12, -0x1, P0 ; /* 0xffffffff0c00780c */ /* 0x000fc80000701670 */ /*0560*/ PLOP3.LUT P0, PT, P0, P5, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda000070b570 */ /*0570*/ @P0 BRA 0x590 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0580*/ LDG.E R17, [R14.64+0x8] ; /* 0x000008060e117981 */ /* 0x01c564000c1e1900 */ /*0590*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*05a0*/ STS [0x2184], R17 ; /* 0x00218411ff007388 */ /* 0x0201e40000000800 */ /*05b0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*05c0*/ BSSY B0, 0x6e0 ; /* 0x0000011000007945 */ /* 0x000fe20003800000 */ /*05d0*/ IMAD.SHL.U32 R13, R5, 0x4, RZ ; /* 0x00000004050d7824 */ /* 0x000fe200078e00ff */ /*05e0*/ @P4 BRA 0x6d0 ; /* 0x000000e000004947 */ /* 0x000fea0003800000 */ /*05f0*/ ISETP.GE.AND P0, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fe20003f06270 */ /*0600*/ BSSY B1, 0x6c0 ; /* 0x000000b000017945 */ /* 0x000fe20003800000 */ /*0610*/ ISETP.GE.AND P4, PT, R10, 0x1, PT ; /* 0x000000010a00780c */ /* 0x000fe20003f86270 */ /*0620*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */ /* 0x006fe200078e00ff */ /*0630*/ ISETP.GE.OR P0, PT, R12, UR4, !P0 ; /* 0x000000040c007c0c */ /* 0x000fe4000c706670 */ /*0640*/ ISETP.GT.OR P4, PT, R10, UR5, !P4 ; /* 0x000000050a007c0c */ /* 0x000fc8000e784670 */ /*0650*/ PLOP3.LUT P0, PT, P0, P4, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000709570 */ /*0660*/ @P0 BRA 0x6b0 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0670*/ IADD3 R15, R10, -0x1, RZ ; /* 0xffffffff0a0f7810 */ /* 0x000fca0007ffe0ff */ /*0680*/ IMAD R15, R15, UR4, R12 ; /* 0x000000040f0f7c24 */ /* 0x000fc8000f8e020c */ /*0690*/ IMAD.WIDE R14, R15, R19, c[0x0][0x160] ; /* 0x000058000f0e7625 */ /* 0x000fcc00078e0213 */ /*06a0*/ LDG.E R14, [R14.64] ; /* 0x000000060e0e7981 */ /* 0x000364000c1e1900 */ /*06b0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*06c0*/ STS [R13], R14 ; /* 0x0000000e0d007388 */ /* 0x0205e40000000800 */ /*06d0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*06e0*/ BSSY B0, 0x7f0 ; /* 0x0000010000007945 */ /* 0x000fe20003800000 */ /*06f0*/ @P2 BRA 0x7e0 ; /* 0x000000e000002947 */ /* 0x000fea0003800000 */ /*0700*/ IADD3 R15, R10, 0x1, RZ ; /* 0x000000010a0f7810 */ /* 0x006fe20007ffe0ff */ /*0710*/ BSSY B1, 0x7d0 ; /* 0x000000b000017945 */ /* 0x000fe20003800000 */ /*0720*/ ISETP.GE.AND P0, PT, R12.reuse, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x040fe20003f06270 */ /*0730*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */ /* 0x000fe200078e00ff */ /*0740*/ ISETP.GE.AND P2, PT, R15, UR5, PT ; /* 0x000000050f007c0c */ /* 0x000fe4000bf46270 */ /*0750*/ ISETP.GE.OR P0, PT, R12, UR4, !P0 ; /* 0x000000040c007c0c */ /* 0x000fe4000c706670 */ /*0760*/ ISETP.LT.OR P2, PT, R10, -0x1, P2 ; /* 0xffffffff0a00780c */ /* 0x000fc80001741670 */ /*0770*/ PLOP3.LUT P0, PT, P0, P2, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000705570 */ /*0780*/ @P0 BRA 0x7c0 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*0790*/ IMAD R14, R15, UR4, R12 ; /* 0x000000040f0e7c24 */ /* 0x000fc8000f8e020c */ /*07a0*/ IMAD.WIDE R14, R14, R19, c[0x0][0x160] ; /* 0x000058000e0e7625 */ /* 0x000fcc00078e0213 */ /*07b0*/ LDG.E R14, [R14.64] ; /* 0x000000060e0e7981 */ /* 0x000364000c1e1900 */ /*07c0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*07d0*/ STS [R13+0x2100], R14 ; /* 0x0021000e0d007388 */ /* 0x0205e40000000800 */ /*07e0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*07f0*/ BSSY B0, 0x8e0 ; /* 0x000000e000007945 */ /* 0x000fe20003800000 */ /*0800*/ IMAD.SHL.U32 R13, R4, 0x100, RZ ; /* 0x00000100040d7824 */ /* 0x004fe200078e00ff */ /*0810*/ @P1 BRA 0x8d0 ; /* 0x000000b000001947 */ /* 0x000fea0003800000 */ /*0820*/ ISETP.GE.AND P1, PT, R12, 0x1, PT ; /* 0x000000010c00780c */ /* 0x000fe20003f26270 */ /*0830*/ BSSY B1, 0x8c0 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*0840*/ ISETP.GE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fe20003f06270 */ /*0850*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */ /* 0x002fe200078e00ff */ /*0860*/ ISETP.GT.OR P1, PT, R12, UR4, !P1 ; /* 0x000000040c007c0c */ /* 0x000fe4000cf24670 */ /*0870*/ ISETP.GE.OR P0, PT, R10, UR5, !P0 ; /* 0x000000050a007c0c */ /* 0x000fc8000c706670 */ /*0880*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*0890*/ @P0 BRA 0x8b0 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*08a0*/ LDG.E R14, [R6.64+-0x4] ; /* 0xfffffc06060e7981 */ /* 0x000364000c1e1900 */ /*08b0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*08c0*/ STS [R13], R14 ; /* 0x0000000e0d007388 */ /* 0x0205e40000000800 */ /*08d0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*08e0*/ BSSY B0, 0x9d0 ; /* 0x000000e000007945 */ /* 0x000fe20003800000 */ /*08f0*/ @P3 BRA 0x9c0 ; /* 0x000000c000003947 */ /* 0x000fea0003800000 */ /*0900*/ IADD3 R14, R12, 0x1, RZ ; /* 0x000000010c0e7810 */ /* 0x006fe20007ffe0ff */ /*0910*/ BSSY B1, 0x9b0 ; /* 0x0000009000017945 */ /* 0x000fe20003800000 */ /*0920*/ ISETP.GE.AND P1, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fe40003f26270 */ /*0930*/ ISETP.GE.AND P0, PT, R14, UR4, PT ; /* 0x000000040e007c0c */ /* 0x000fe4000bf06270 */ /*0940*/ ISETP.GE.OR P1, PT, R10, UR5, !P1 ; /* 0x000000050a007c0c */ /* 0x000fe2000cf26670 */ /*0950*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e00ff */ /*0960*/ ISETP.LT.OR P0, PT, R12, -0x1, P0 ; /* 0xffffffff0c00780c */ /* 0x000fc80000701670 */ /*0970*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0980*/ @P0 BRA 0x9a0 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0990*/ LDG.E R10, [R6.64+0x4] ; /* 0x00000406060a7981 */ /* 0x000364000c1e1900 */ /*09a0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*09b0*/ STS [R13+0x84], R10 ; /* 0x0000840a0d007388 */ /* 0x0205e40000000800 */ /*09c0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*09d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*09e0*/ ISETP.NE.AND P0, PT, R11, -0x1, PT ; /* 0xffffffff0b00780c */ /* 0x000fe20003f05270 */ /*09f0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x002fc800078e00ff */ /*0a00*/ BSSY B0, 0xc30 ; /* 0x0000022000007945 */ /* 0x000ff00003800000 */ /*0a10*/ @P0 BRA 0xc20 ; /* 0x0000020000000947 */ /* 0x000fea0003800000 */ /*0a20*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fe400078e00ff */ /*0a30*/ IMAD.MOV.U32 R12, RZ, RZ, -0x1 ; /* 0xffffffffff0c7424 */ /* 0x000fc400078e00ff */ /*0a40*/ BSSY B1, 0xbf0 ; /* 0x000001a000017945 */ /* 0x000fe20003800000 */ /*0a50*/ IMAD.MOV.U32 R7, RZ, RZ, -0x1 ; /* 0xffffffffff077424 */ /* 0x001fc800078e00ff */ /*0a60*/ IMAD.IADD R10, R4, 0x1, R7 ; /* 0x00000001040a7824 */ /* 0x005fe200078e0207 */ /*0a70*/ BSSY B2, 0xbb0 ; /* 0x0000013000027945 */ /* 0x000fe20003800000 */ /*0a80*/ IMAD.IADD R11, R5, 0x1, R12 ; /* 0x00000001050b7824 */ /* 0x001fc800078e020c */ /*0a90*/ IMAD R10, R10, 0x40, R11 ; /* 0x000000400a0a7824 */ /* 0x000fcc00078e020b */ /*0aa0*/ LDS R10, [R10.X4] ; /* 0x000000000a0a7984 */ /* 0x000e240000004800 */ /*0ab0*/ ISETP.NE.AND P0, PT, R10, -0x2, PT ; /* 0xfffffffe0a00780c */ /* 0x001fda0003f05270 */ /*0ac0*/ @P0 BRA 0xba0 ; /* 0x000000d000000947 */ /* 0x000fea0003800000 */ /*0ad0*/ IMAD.MOV.U32 R17, RZ, RZ, 0x1 ; /* 0x00000001ff117424 */ /* 0x018fe200078e00ff */ /*0ae0*/ IADD3 R4, R9, 0x1, RZ ; /* 0x0000000109047810 */ /* 0x000fe20007ffe0ff */ /*0af0*/ IMAD.MOV.U32 R15, RZ, RZ, -0x2 ; /* 0xfffffffeff0f7424 */ /* 0x000fe200078e00ff */ /*0b00*/ IADD3 R5, R8, 0x1, RZ ; /* 0x0000000108057810 */ /* 0x000fe20007ffe0ff */ /*0b10*/ IMAD R13, R6.reuse, 0x4, R1 ; /* 0x00000004060d7824 */ /* 0x040fe200078e0201 */ /*0b20*/ IADD3 R6, R6, 0x2, RZ ; /* 0x0000000206067810 */ /* 0x000fe20007ffe0ff */ /*0b30*/ IMAD.MOV.U32 R10, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff0a7624 */ /* 0x000fe200078e00ff */ /*0b40*/ STS [R2.X4+0x104], R15 ; /* 0x0001040f02007388 */ /* 0x0001e20000004800 */ /*0b50*/ IMAD.MOV.U32 R11, RZ, RZ, c[0x0][0x174] ; /* 0x00005d00ff0b7624 */ /* 0x000fe400078e00ff */ /*0b60*/ IMAD.MOV.U32 R12, RZ, RZ, 0x2 ; /* 0x00000002ff0c7424 */ /* 0x000fe200078e00ff */ /*0b70*/ STL.64 [R13], R4 ; /* 0x000000040d007387 */ /* 0x0001e20000100a00 */ /*0b80*/ IMAD.MOV.U32 R7, RZ, RZ, 0x2 ; /* 0x00000002ff077424 */ /* 0x000fc600078e00ff */ /*0b90*/ STG.E [R10.64], R17 ; /* 0x000000110a007986 */ /* 0x0001e8000c101906 */ /*0ba0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*0bb0*/ ISETP.GE.AND P0, PT, R7.reuse, 0x1, PT ; /* 0x000000010700780c */ /* 0x040fe40003f06270 */ /*0bc0*/ IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107077810 */ /* 0x000fd60007ffe0ff */ /*0bd0*/ @!P0 BRA 0xa60 ; /* 0xfffffe8000008947 */ /* 0x000fea000383ffff */ /*0be0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0bf0*/ ISETP.GE.AND P0, PT, R12.reuse, 0x1, PT ; /* 0x000000010c00780c */ /* 0x040fe40003f06270 */ /*0c00*/ IADD3 R12, R12, 0x1, RZ ; /* 0x000000010c0c7810 */ /* 0x000fd60007ffe0ff */ /*0c10*/ @!P0 BRA 0xa40 ; /* 0xfffffe2000008947 */ /* 0x000fea000383ffff */ /*0c20*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0c30*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe20003f05270 */ /*0c40*/ BSSY B0, 0x1290 ; /* 0x0000064000007945 */ /* 0x000fd80003800000 */ /*0c50*/ @!P0 BRA 0x1280 ; /* 0x0000062000008947 */ /* 0x000fea0003800000 */ /*0c60*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x000fc800078e00ff */ /*0c70*/ IMAD R4, R7, 0x4, R1 ; /* 0x0000000407047824 */ /* 0x001fcc00078e0201 */ /*0c80*/ LDL.64 R4, [R4] ; /* 0x0000000004047983 */ /* 0x000f620000100a00 */ /*0c90*/ IADD3 R7, R7, 0x2, RZ ; /* 0x0000000207077810 */ /* 0x000fe20007ffe0ff */ /*0ca0*/ IMAD R14, R4.reuse, 0x40, R5.reuse ; /* 0x00000040040e7824 */ /* 0x164fe200078e0205 */ /*0cb0*/ IADD3 R18, R4, -0x2, RZ ; /* 0xfffffffe04127810 */ /* 0x000fe20007ffe0ff */ /*0cc0*/ IMAD.MOV.U32 R27, RZ, RZ, R5 ; /* 0x000000ffff1b7224 */ /* 0x000fe200078e0005 */ /*0cd0*/ IADD3 R17, R5.reuse, -0x2, RZ ; /* 0xfffffffe05117810 */ /* 0x058fe20007ffe0ff */ /*0ce0*/ IMAD.SHL.U32 R14, R14, 0x4, RZ ; /* 0x000000040e0e7824 */ /* 0x000fe200078e00ff */ /*0cf0*/ IADD3 R9, R5, -0x1, RZ ; /* 0xffffffff05097810 */ /* 0x000fe40007ffe0ff */ /*0d00*/ LOP3.LUT P2, RZ, R17.reuse, 0xffffffe0, R18, 0xc8, !PT ; /* 0xffffffe011ff7812 */ /* 0x040fe4000784c812 */ /*0d10*/ LDS R8, [R14+-0x104] ; /* 0xfffefc000e087984 */ /* 0x000e220000000800 */ /*0d20*/ LOP3.LUT P3, RZ, R17, 0xffffffe0, R4, 0xc8, !PT ; /* 0xffffffe011ff7812 */ /* 0x000fc4000786c804 */ /*0d30*/ LOP3.LUT P4, RZ, R9, 0xffffffe0, R18.reuse, 0xc8, !PT ; /* 0xffffffe009ff7812 */ /* 0x100fe2000788c812 */ /*0d40*/ LDS R10, [R14+-0x4] ; /* 0xfffffc000e0a7984 */ /* 0x000fe20000000800 */ /*0d50*/ LOP3.LUT P0, RZ, R5, 0xffffffe0, R18, 0xc8, !PT ; /* 0xffffffe005ff7812 */ /* 0x000fe4000780c812 */ /*0d60*/ LOP3.LUT P6, RZ, R9, 0xffffffe0, R4, 0xc8, !PT ; /* 0xffffffe009ff7812 */ /* 0x000fe200078cc804 */ /*0d70*/ LDS R11, [R14+0xfc] ; /* 0x0000fc000e0b7984 */ /* 0x000e680000000800 */ /*0d80*/ LDS R13, [R14] ; /* 0x000000000e0d7984 */ /* 0x000ea80000000800 */ /*0d90*/ LDS R12, [R14+-0x100] ; /* 0xffff00000e0c7984 */ /* 0x000ee80000000800 */ /*0da0*/ LDS R15, [R14+0x100] ; /* 0x000100000e0f7984 */ /* 0x000fe80000000800 */ /*0db0*/ LDS R16, [R14+-0xfc] ; /* 0xffff04000e107984 */ /* 0x000f280000000800 */ /*0dc0*/ LDS R18, [R14+0x104] ; /* 0x000104000e127984 */ /* 0x000fe20000000800 */ /*0dd0*/ ISETP.NE.OR P2, PT, R8, -0x1, P2 ; /* 0xffffffff0800780c */ /* 0x001fc40001745670 */ /*0de0*/ IADD3 R8, R4, -0x1, RZ ; /* 0xffffffff04087810 */ /* 0x000fc80007ffe0ff */ /*0df0*/ LOP3.LUT P1, RZ, R17, 0xffffffe0, R8.reuse, 0xc8, !PT ; /* 0xffffffe011ff7812 */ /* 0x100fe2000782c808 */ /*0e00*/ IMAD.MOV.U32 R26, RZ, RZ, R8.reuse ; /* 0x000000ffff1a7224 */ /* 0x100fe200078e0008 */ /*0e10*/ LDS R17, [R14+0x4] ; /* 0x000004000e117984 */ /* 0x000e220000000800 */ /*0e20*/ ISETP.NE.OR P3, PT, R11, -0x1, P3 ; /* 0xffffffff0b00780c */ /* 0x002fe20001f65670 */ /*0e30*/ IMAD.MOV.U32 R11, RZ, RZ, R9 ; /* 0x000000ffff0b7224 */ /* 0x000fe200078e0009 */ /*0e40*/ ISETP.NE.OR P1, PT, R10, -0x1, P1 ; /* 0xffffffff0a00780c */ /* 0x000fe40000f25670 */ /*0e50*/ @!P2 IMAD R19, R6.reuse, 0x4, R1 ; /* 0x000000040613a824 */ /* 0x040fe200078e0201 */ /*0e60*/ LOP3.LUT P5, RZ, R9, 0xffffffe0, R8, 0xc8, !PT ; /* 0xffffffe009ff7812 */ /* 0x000fe200078ac808 */ /*0e70*/ @!P2 IMAD.MOV.U32 R21, RZ, RZ, -0x2 ; /* 0xfffffffeff15a424 */ /* 0x000fe200078e00ff */ /*0e80*/ @!P2 IADD3 R6, R6, 0x2, RZ ; /* 0x000000020606a810 */ /* 0x000fc40007ffe0ff */ /*0e90*/ ISETP.NE.OR P5, PT, R13, -0x1, P5 ; /* 0xffffffff0d00780c */ /* 0x004fe20002fa5670 */ /*0ea0*/ @!P2 STL.64 [R19], R8 ; /* 0x000000081300a387 */ /* 0x0003e20000100a00 */ /*0eb0*/ ISETP.NE.OR P4, PT, R12, -0x1, P4 ; /* 0xffffffff0c00780c */ /* 0x008fe20002785670 */ /*0ec0*/ IMAD.MOV.U32 R13, RZ, RZ, R9 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e0009 */ /*0ed0*/ @!P3 IADD3 R10, R4, 0x1, RZ ; /* 0x00000001040ab810 */ /* 0x000fe20007ffe0ff */ /*0ee0*/ IMAD.MOV.U32 R12, RZ, RZ, R4 ; /* 0x000000ffff0c7224 */ /* 0x000fe200078e0004 */ /*0ef0*/ ISETP.NE.OR P0, PT, R16, -0x1, P0 ; /* 0xffffffff1000780c */ /* 0x010fe20000705670 */ /*0f00*/ @!P3 IMAD.MOV.U32 R23, RZ, RZ, -0x2 ; /* 0xfffffffeff17b424 */ /* 0x000fe200078e00ff */ /*0f10*/ @!P2 STS [R14+-0x104], R21 ; /* 0xfffefc150e00a388 */ /* 0x000fe20000000800 */ /*0f20*/ LOP3.LUT P2, RZ, R5, 0xffffffe0, R8, 0xc8, !PT ; /* 0xffffffe005ff7812 */ /* 0x000fc6000784c808 */ /*0f30*/ @!P3 STS [R14+0xfc], R23 ; /* 0x0000fc170e00b388 */ /* 0x000fe20000000800 */ /*0f40*/ @!P1 IMAD R9, R6.reuse, 0x4, R1.reuse ; /* 0x0000000406099824 */ /* 0x142fe200078e0201 */ /*0f50*/ @!P1 IADD3 R6, R6, 0x2, RZ ; /* 0x0000000206069810 */ /* 0x000fe20007ffe0ff */ /*0f60*/ @!P1 IMAD.MOV.U32 R19, RZ, RZ, -0x2 ; /* 0xfffffffeff139424 */ /* 0x000fe400078e00ff */ /*0f70*/ @!P4 IMAD.MOV.U32 R25, RZ, RZ, -0x2 ; /* 0xfffffffeff19c424 */ /* 0x000fe200078e00ff */ /*0f80*/ @!P1 STL.64 [R9], R12 ; /* 0x0000000c09009387 */ /* 0x0003e20000100a00 */ /*0f90*/ @!P3 IMAD R20, R6.reuse, 0x4, R1 ; /* 0x000000040614b824 */ /* 0x040fe200078e0201 */ /*0fa0*/ @!P3 IADD3 R6, R6, 0x2, RZ ; /* 0x000000020606b810 */ /* 0x000fe40007ffe0ff */ /*0fb0*/ @!P1 STS [R14+-0x4], R19 ; /* 0xfffffc130e009388 */ /* 0x0005e20000000800 */ /*0fc0*/ ISETP.NE.OR P1, PT, R15, -0x1, P6 ; /* 0xffffffff0f00780c */ /* 0x000fc40003725670 */ /*0fd0*/ @!P4 IMAD R15, R6.reuse, 0x4, R1.reuse ; /* 0x00000004060fc824 */ /* 0x140fe200078e0201 */ /*0fe0*/ @!P4 IADD3 R6, R6, 0x2, RZ ; /* 0x000000020606c810 */ /* 0x000fe20007ffe0ff */ /*0ff0*/ @!P3 STL.64 [R20], R10 ; /* 0x0000000a1400b387 */ /* 0x0007e20000100a00 */ /*1000*/ LOP3.LUT P3, RZ, R5, 0xffffffe0, R4, 0xc8, !PT ; /* 0xffffffe005ff7812 */ /* 0x000fe4000786c804 */ /*1010*/ ISETP.NE.OR P2, PT, R17, -0x1, P2 ; /* 0xffffffff1100780c */ /* 0x001fe20001745670 */ /*1020*/ @!P5 IMAD R9, R6.reuse, 0x4, R1 ; /* 0x000000040609d824 */ /* 0x042fe200078e0201 */ /*1030*/ @!P5 IADD3 R6, R6, 0x2, RZ ; /* 0x000000020606d810 */ /* 0x000fe20007ffe0ff */ /*1040*/ @!P5 IMAD.MOV.U32 R19, RZ, RZ, -0x2 ; /* 0xfffffffeff13d424 */ /* 0x004fe200078e00ff */ /*1050*/ ISETP.NE.OR P3, PT, R18, -0x1, P3 ; /* 0xffffffff1200780c */ /* 0x000fe20001f65670 */ /*1060*/ IMAD.MOV.U32 R18, RZ, RZ, R8 ; /* 0x000000ffff127224 */ /* 0x000fe200078e0008 */ /*1070*/ @!P4 STL.64 [R15], R26 ; /* 0x0000001a0f00c387 */ /* 0x0001e20000100a00 */ /*1080*/ IMAD.MOV.U32 R13, RZ, RZ, R5 ; /* 0x000000ffff0d7224 */ /* 0x000fe200078e0005 */ /*1090*/ @!P1 IADD3 R12, R4, 0x1, RZ ; /* 0x00000001040c9810 */ /* 0x000fe20007ffe0ff */ /*10a0*/ @!P1 IMAD R10, R6.reuse, 0x4, R1.reuse ; /* 0x00000004060a9824 */ /* 0x148fe200078e0201 */ /*10b0*/ @!P1 IADD3 R6, R6, 0x2, RZ ; /* 0x0000000206069810 */ /* 0x000fe20007ffe0ff */ /*10c0*/ @!P1 IMAD.MOV.U32 R11, RZ, RZ, -0x2 ; /* 0xfffffffeff0b9424 */ /* 0x000fe200078e00ff */ /*10d0*/ @!P5 STL.64 [R9], R4 ; /* 0x000000040900d387 */ /* 0x0003e20000100a00 */ /*10e0*/ IMAD.MOV.U32 R20, RZ, RZ, R4 ; /* 0x000000ffff147224 */ /* 0x000fe200078e0004 */ /*10f0*/ @!P2 IADD3 R21, R5, 0x1, RZ ; /* 0x000000010515a810 */ /* 0x000fe20007ffe0ff */ /*1100*/ @!P0 IMAD R8, R6.reuse, 0x4, R1 ; /* 0x0000000406088824 */ /* 0x040fe200078e0201 */ /*1110*/ @!P0 IADD3 R6, R6, 0x2, RZ ; /* 0x0000000206068810 */ /* 0x000fe20007ffe0ff */ /*1120*/ @!P5 STS [R14], R19 ; /* 0x000000130e00d388 */ /* 0x0005e20000000800 */ /*1130*/ @!P2 IMAD.MOV.U32 R17, RZ, RZ, -0x2 ; /* 0xfffffffeff11a424 */ /* 0x000fc400078e00ff */ /*1140*/ @!P0 IMAD.MOV.U32 R15, RZ, RZ, -0x2 ; /* 0xfffffffeff0f8424 */ /* 0x001fe200078e00ff */ /*1150*/ @!P1 STS [R14+0x100], R11 ; /* 0x0001000b0e009388 */ /* 0x0001e20000000800 */ /*1160*/ @!P2 IMAD R9, R6.reuse, 0x4, R1 ; /* 0x000000040609a824 */ /* 0x042fe200078e0201 */ /*1170*/ @!P2 IADD3 R6, R6, 0x2, RZ ; /* 0x000000020606a810 */ /* 0x000fe40007ffe0ff */ /*1180*/ @!P1 STL.64 [R10], R12 ; /* 0x0000000c0a009387 */ /* 0x0003e20000100a00 */ /*1190*/ @!P0 IADD3 R19, R5, 0x1, RZ ; /* 0x0000000105138810 */ /* 0x004fc60007ffe0ff */ /*11a0*/ @!P4 STS [R14+-0x100], R25 ; /* 0xffff00190e00c388 */ /* 0x0005e20000000800 */ /*11b0*/ @!P3 IADD3 R11, R5, 0x1, RZ ; /* 0x00000001050bb810 */ /* 0x001fe20007ffe0ff */ /*11c0*/ @!P3 IMAD.MOV.U32 R5, RZ, RZ, -0x2 ; /* 0xfffffffeff05b424 */ /* 0x000fe400078e00ff */ /*11d0*/ @!P0 STL.64 [R8], R18 ; /* 0x0000001208008387 */ /* 0x0005e20000100a00 */ /*11e0*/ @!P3 IADD3 R10, R4, 0x1, RZ ; /* 0x00000001040ab810 */ /* 0x002fe20007ffe0ff */ /*11f0*/ @!P3 IMAD R4, R6.reuse, 0x4, R1 ; /* 0x000000040604b824 */ /* 0x040fe400078e0201 */ /*1200*/ @!P2 STL.64 [R9], R20 ; /* 0x000000140900a387 */ /* 0x0005e20000100a00 */ /*1210*/ @!P3 IADD3 R6, R6, 0x2, RZ ; /* 0x000000020606b810 */ /* 0x000fc60007ffe0ff */ /*1220*/ @!P2 STS [R14+0x4], R17 ; /* 0x000004110e00a388 */ /* 0x0005e80000000800 */ /*1230*/ @!P3 STS [R14+0x104], R5 ; /* 0x000104050e00b388 */ /* 0x0005e80000000800 */ /*1240*/ @!P3 STL.64 [R4], R10 ; /* 0x0000000a0400b387 */ /* 0x0005e80000100a00 */ /*1250*/ @!P0 STS [R14+-0xfc], R15 ; /* 0xffff040f0e008388 */ /* 0x0005e20000000800 */ /*1260*/ ISETP.NE.AND P0, PT, R7, R6, PT ; /* 0x000000060700720c */ /* 0x000fda0003f05270 */ /*1270*/ @P0 BRA 0xc70 ; /* 0xfffff9f000000947 */ /* 0x004fea000383ffff */ /*1280*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1290*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*12a0*/ LEA R4, P0, R0, c[0x0][0x168], 0x2 ; /* 0x00005a0000047a11 */ /* 0x001fc800078010ff */ /*12b0*/ LEA.HI.X R5, R0, c[0x0][0x16c], R3, 0x2, P0 ; /* 0x00005b0000057a11 */ /* 0x000fe200000f1403 */ /*12c0*/ LDS R7, [R2.X4+0x104] ; /* 0x0001040002077984 */ /* 0x000e280000004800 */ /*12d0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x001fe2000c101906 */ /*12e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*12f0*/ BRA 0x12f0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1300*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1310*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1320*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1330*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1340*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1350*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1360*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1370*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : prepareBfs .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */ /* 0x000e220000002600 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */ /* 0x000e280000002200 */ /*0040*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */ /* 0x000e680000002500 */ /*0050*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000ea20000002100 */ /*0060*/ IMAD R0, R0, 0x20, R3 ; /* 0x0000002000007824 */ /* 0x001fe200078e0203 */ /*0070*/ MOV R3, 0x4 ; /* 0x0000000400037802 */ /* 0x000fc60000000f00 */ /*0080*/ IMAD R0, R0, c[0x0][0xc], R5 ; /* 0x0000030000007a24 */ /* 0x002fc800078e0205 */ /*0090*/ IMAD R0, R0, 0x20, R7 ; /* 0x0000002000007824 */ /* 0x004fc800078e0207 */ /*00a0*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fca00078e0203 */ /*00b0*/ LDG.E R0, [R2.64] ; /* 0x0000000402007981 */ /* 0x000ea4000c1e1900 */ /*00c0*/ ISETP.GE.AND P0, PT, R0, 0x9, PT ; /* 0x000000090000780c */ /* 0x004fda0003f06270 */ /*00d0*/ @!P0 BRA 0x150 ; /* 0x0000007000008947 */ /* 0x000fea0003800000 */ /*00e0*/ ISETP.GT.AND P0, PT, R0, 0x11, PT ; /* 0x000000110000780c */ /* 0x000fda0003f04270 */ /*00f0*/ @!P0 MOV R5, 0xffffffff ; /* 0xffffffff00058802 */ /* 0x000fca0000000f00 */ /*0100*/ @!P0 STG.E [R2.64], R5 ; /* 0x0000000502008986 */ /* 0x0001e2000c101904 */ /*0110*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0120*/ MOV R5, 0xfffffffe ; /* 0xfffffffe00057802 */ /* 0x001fca0000000f00 */ /*0130*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */ /* 0x000fe2000c101904 */ /*0140*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0150*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x000fe2000c101904 */ /*0160*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0170*/ BRA 0x170; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : nonMaximalSupression .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff067624 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0040*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*0050*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e220000002100 */ /*0060*/ IMAD.SHL.U32 R6, R6, 0x20, RZ ; /* 0x0000002006067824 */ /* 0x000fc600078e00ff */ /*0070*/ S2R R14, SR_TID.Y ; /* 0x00000000000e7919 */ /* 0x000e680000002200 */ /*0080*/ S2R R11, SR_CTAID.Y ; /* 0x00000000000b7919 */ /* 0x000e620000002600 */ /*0090*/ IMAD R9, R0, 0x20, R7 ; /* 0x0000002000097824 */ /* 0x001fe400078e0207 */ /*00a0*/ IMAD R11, R11, 0x20, R14 ; /* 0x000000200b0b7824 */ /* 0x002fc800078e020e */ /*00b0*/ IMAD R4, R6, R11, R9 ; /* 0x0000000b06047224 */ /* 0x000fc800078e0209 */ /*00c0*/ IMAD.WIDE R2, R4, R5, c[0x0][0x160] ; /* 0x0000580004027625 */ /* 0x000fca00078e0205 */ /*00d0*/ LDG.E R13, [R2.64] ; /* 0x00000006020d7981 */ /* 0x000ea2000c1e1900 */ /*00e0*/ IMAD.SHL.U32 R8, R14, 0x100, RZ ; /* 0x000001000e087824 */ /* 0x000fe200078e00ff */ /*00f0*/ LOP3.LUT P0, RZ, R7.reuse, R14, RZ, 0xfc, !PT ; /* 0x0000000e07ff7212 */ /* 0x040fe2000780fcff */ /*0100*/ IMAD.SHL.U32 R15, R7, 0x4, RZ ; /* 0x00000004070f7824 */ /* 0x000fe200078e00ff */ /*0110*/ BSSY B0, 0x250 ; /* 0x0000013000007945 */ /* 0x000fe60003800000 */ /*0120*/ IMAD.IADD R0, R8, 0x1, R15 ; /* 0x0000000108007824 */ /* 0x000fca00078e020f */ /*0130*/ STS [R0+0x104], R13 ; /* 0x0001040d00007388 */ /* 0x0041e60000000800 */ /*0140*/ @P0 BRA 0x240 ; /* 0x000000f000000947 */ /* 0x000fea0003800000 */ /*0150*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0160*/ ISETP.GE.AND P0, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f06270 */ /*0170*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0180*/ ISETP.GE.AND P1, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe20003f26270 */ /*0190*/ BSSY B1, 0x230 ; /* 0x0000009000017945 */ /* 0x000fe20003800000 */ /*01a0*/ ISETP.GT.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fc60004704670 */ /*01b0*/ ISETP.GT.OR P1, PT, R11, UR4, !P1 ; /* 0x000000040b007c0c */ /* 0x000fc8000cf24670 */ /*01c0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*01d0*/ @P0 BRA 0x220 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*01e0*/ IMAD R10, R6, R11, -R6 ; /* 0x0000000b060a7224 */ /* 0x000fca00078e0a06 */ /*01f0*/ IADD3 R10, R10, -0x1, R9 ; /* 0xffffffff0a0a7810 */ /* 0x000fca0007ffe009 */ /*0200*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x001fcc00078e0205 */ /*0210*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000164000c1e1900 */ /*0220*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0230*/ STS [R0], R13 ; /* 0x0000000d00007388 */ /* 0x0203e40000000800 */ /*0240*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0250*/ ISETP.NE.AND P2, PT, R14, 0x1f, PT ; /* 0x0000001f0e00780c */ /* 0x000fe20003f45270 */ /*0260*/ BSSY B0, 0x3b0 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*0270*/ ISETP.NE.AND P3, PT, R7.reuse, RZ, PT ; /* 0x000000ff0700720c */ /* 0x040fe40003f65270 */ /*0280*/ ISETP.NE.OR P0, PT, R7, RZ, P2 ; /* 0x000000ff0700720c */ /* 0x000fda0001705670 */ /*0290*/ @P0 BRA 0x3a0 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*02a0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*02b0*/ ISETP.GE.AND P1, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f26270 */ /*02c0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*02d0*/ ISETP.GE.AND P0, PT, R11.reuse, -0x1, PT ; /* 0xffffffff0b00780c */ /* 0x040fe20003f06270 */ /*02e0*/ BSSY B1, 0x390 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*02f0*/ IADD3 R10, R11, 0x1, RZ ; /* 0x000000010b0a7810 */ /* 0x000fe40007ffe0ff */ /*0300*/ ISETP.GT.OR P1, PT, R9, R6, !P1 ; /* 0x000000060900720c */ /* 0x000fe40004f24670 */ /*0310*/ ISETP.GE.OR P0, PT, R10, UR4, !P0 ; /* 0x000000040a007c0c */ /* 0x000fc8000c706670 */ /*0320*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*0330*/ @P0 BRA 0x380 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0340*/ IMAD R10, R6, R11, R6 ; /* 0x0000000b060a7224 */ /* 0x000fca00078e0206 */ /*0350*/ IADD3 R10, R10, -0x1, R9 ; /* 0xffffffff0a0a7810 */ /* 0x000fca0007ffe009 */ /*0360*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x003fcc00078e0205 */ /*0370*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000164000c1e1900 */ /*0380*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0390*/ STS [0x2100], R13 ; /* 0x0021000dff007388 */ /* 0x0205e40000000800 */ /*03a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*03b0*/ ISETP.NE.AND P4, PT, R7, 0x1f, PT ; /* 0x0000001f0700780c */ /* 0x000fe20003f85270 */ /*03c0*/ BSSY B0, 0x510 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*03d0*/ ISETP.NE.AND P5, PT, R14.reuse, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x040fe40003fa5270 */ /*03e0*/ ISETP.NE.OR P0, PT, R14, RZ, P4 ; /* 0x000000ff0e00720c */ /* 0x000fda0002705670 */ /*03f0*/ @P0 BRA 0x500 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*0400*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0410*/ ISETP.GE.AND P1, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f26270 */ /*0420*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0430*/ IADD3 R15, R9, 0x1, RZ ; /* 0x00000001090f7810 */ /* 0x000fe20007ffe0ff */ /*0440*/ BSSY B1, 0x4f0 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*0450*/ ISETP.GE.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe40003f06270 */ /*0460*/ ISETP.GE.OR P1, PT, R15, R6, !P1 ; /* 0x000000060f00720c */ /* 0x000fe40004f26670 */ /*0470*/ ISETP.GT.OR P0, PT, R11, UR4, !P0 ; /* 0x000000040b007c0c */ /* 0x000fc8000c704670 */ /*0480*/ PLOP3.LUT P1, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f21570 */ /*0490*/ @P1 BRA 0x4e0 ; /* 0x0000004000001947 */ /* 0x000fea0003800000 */ /*04a0*/ IMAD R10, R6, R11, -R6 ; /* 0x0000000b060a7224 */ /* 0x000fca00078e0a06 */ /*04b0*/ IADD3 R10, R10, -0x1, R9 ; /* 0xffffffff0a0a7810 */ /* 0x000fca0007ffe009 */ /*04c0*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x007fcc00078e0205 */ /*04d0*/ LDG.E R13, [R12.64+0x8] ; /* 0x000008060c0d7981 */ /* 0x000164000c1e1900 */ /*04e0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*04f0*/ STS [0x84], R13 ; /* 0x0000840dff007388 */ /* 0x0207e40000000800 */ /*0500*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0510*/ ISETP.NE.OR P0, PT, R7, 0x1f, P2 ; /* 0x0000001f0700780c */ /* 0x000fe20001705670 */ /*0520*/ BSSY B0, 0x650 ; /* 0x0000012000007945 */ /* 0x000fd80003800000 */ /*0530*/ @P0 BRA 0x640 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*0540*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0550*/ ISETP.GE.AND P1, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f26270 */ /*0560*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0570*/ IADD3 R15, R9, 0x1, RZ ; /* 0x00000001090f7810 */ /* 0x000fe20007ffe0ff */ /*0580*/ BSSY B1, 0x630 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*0590*/ ISETP.GE.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe40003f06270 */ /*05a0*/ ISETP.GE.OR P1, PT, R15, R6, !P1 ; /* 0x000000060f00720c */ /* 0x000fe40004f26670 */ /*05b0*/ ISETP.GT.OR P0, PT, R11, UR4, !P0 ; /* 0x000000040b007c0c */ /* 0x000fc8000c704670 */ /*05c0*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*05d0*/ @P0 BRA 0x620 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*05e0*/ IMAD R10, R6, R11, -R6 ; /* 0x0000000b060a7224 */ /* 0x000fca00078e0a06 */ /*05f0*/ IADD3 R10, R10, -0x1, R9 ; /* 0xffffffff0a0a7810 */ /* 0x000fca0007ffe009 */ /*0600*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x00ffcc00078e0205 */ /*0610*/ LDG.E R13, [R12.64+0x8] ; /* 0x000008060c0d7981 */ /* 0x000164000c1e1900 */ /*0620*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0630*/ STS [0x2184], R13 ; /* 0x0021840dff007388 */ /* 0x0209e40000000800 */ /*0640*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0650*/ BSSY B0, 0x780 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*0660*/ @P5 BRA 0x770 ; /* 0x0000010000005947 */ /* 0x000fea0003800000 */ /*0670*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0680*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f06270 */ /*0690*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*06a0*/ ISETP.GE.AND P1, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe20003f26270 */ /*06b0*/ BSSY B1, 0x760 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*06c0*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe20004706670 */ /*06d0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x001fe400078e00ff */ /*06e0*/ ISETP.GT.OR P1, PT, R11, UR4, !P1 ; /* 0x000000040b007c0c */ /* 0x000fc8000cf24670 */ /*06f0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0700*/ @P0 BRA 0x750 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0710*/ IADD3 R10, R11, -0x1, RZ ; /* 0xffffffff0b0a7810 */ /* 0x000fca0007ffe0ff */ /*0720*/ IMAD R10, R6, R10, R9 ; /* 0x0000000a060a7224 */ /* 0x000fc800078e0209 */ /*0730*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x01efcc00078e0205 */ /*0740*/ LDG.E R12, [R12.64] ; /* 0x000000060c0c7981 */ /* 0x000164000c1e1900 */ /*0750*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0760*/ STS [R7.X4+0x4], R12 ; /* 0x0000040c07007388 */ /* 0x0201e40000004800 */ /*0770*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0780*/ BSSY B0, 0x8b0 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*0790*/ @P2 BRA 0x8a0 ; /* 0x0000010000002947 */ /* 0x000fea0003800000 */ /*07a0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*07b0*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f06270 */ /*07c0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*07d0*/ ISETP.GE.AND P1, PT, R11.reuse, -0x1, PT ; /* 0xffffffff0b00780c */ /* 0x040fe20003f26270 */ /*07e0*/ BSSY B1, 0x890 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*07f0*/ IADD3 R10, R11, 0x1, RZ ; /* 0x000000010b0a7810 */ /* 0x000fe20007ffe0ff */ /*0800*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x001fe200078e00ff */ /*0810*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe40004706670 */ /*0820*/ ISETP.GE.OR P1, PT, R10, UR4, !P1 ; /* 0x000000040a007c0c */ /* 0x000fc8000cf26670 */ /*0830*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0840*/ @P0 BRA 0x880 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*0850*/ IMAD R12, R6, R10, R9 ; /* 0x0000000a060c7224 */ /* 0x000fc800078e0209 */ /*0860*/ IMAD.WIDE R12, R12, R5, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x01efcc00078e0205 */ /*0870*/ LDG.E R12, [R12.64] ; /* 0x000000060c0c7981 */ /* 0x000164000c1e1900 */ /*0880*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0890*/ STS [R7.X4+0x2104], R12 ; /* 0x0021040c07007388 */ /* 0x0201e40000004800 */ /*08a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*08b0*/ BSSY B0, 0x9b0 ; /* 0x000000f000007945 */ /* 0x000fe20003800000 */ /*08c0*/ @P3 BRA 0x9a0 ; /* 0x000000d000003947 */ /* 0x000fea0003800000 */ /*08d0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*08e0*/ ISETP.GE.AND P1, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f26270 */ /*08f0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0900*/ ISETP.GE.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe20003f06270 */ /*0910*/ BSSY B1, 0x990 ; /* 0x0000007000017945 */ /* 0x000fe20003800000 */ /*0920*/ ISETP.GT.OR P1, PT, R9, R6, !P1 ; /* 0x000000060900720c */ /* 0x000fe20004f24670 */ /*0930*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x001fe400078e00ff */ /*0940*/ ISETP.GE.OR P0, PT, R11, UR4, !P0 ; /* 0x000000040b007c0c */ /* 0x000fc8000c706670 */ /*0950*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*0960*/ @P0 BRA 0x980 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0970*/ LDG.E R7, [R2.64+-0x4] ; /* 0xfffffc0602077981 */ /* 0x000164000c1e1900 */ /*0980*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0990*/ STS [R8+0x100], R7 ; /* 0x0001000708007388 */ /* 0x0201e40000000800 */ /*09a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*09b0*/ BSSY B0, 0xac0 ; /* 0x0000010000007945 */ /* 0x000fe20003800000 */ /*09c0*/ @P4 BRA 0xab0 ; /* 0x000000e000004947 */ /* 0x000fea0003800000 */ /*09d0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*09e0*/ ISETP.GE.AND P0, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f06270 */ /*09f0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0a00*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */ /* 0x000fe20007ffe0ff */ /*0a10*/ BSSY B1, 0xaa0 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*0a20*/ ISETP.GE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe20003f26270 */ /*0a30*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x001fe200078e00ff */ /*0a40*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe40004706670 */ /*0a50*/ ISETP.GE.OR P1, PT, R11, UR4, !P1 ; /* 0x000000040b007c0c */ /* 0x000fc8000cf26670 */ /*0a60*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0a70*/ @P0 BRA 0xa90 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0a80*/ LDG.E R7, [R2.64+0x4] ; /* 0x0000040602077981 */ /* 0x000164000c1e1900 */ /*0a90*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0aa0*/ STS [R8+0x184], R7 ; /* 0x0001840708007388 */ /* 0x0201e40000000800 */ /*0ab0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0ac0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0ad0*/ IMAD.WIDE R2, R4, R5, c[0x0][0x168] ; /* 0x00005a0004027625 */ /* 0x001fca00078e0205 */ /*0ae0*/ LDG.E R6, [R2.64] ; /* 0x0000000602067981 */ /* 0x000f62000c1e1900 */ /*0af0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x000fc600078e0205 */ /*0b00*/ LDS R7, [R0+0x104] ; /* 0x0001040000077984 */ /* 0x000e280000000800 */ /*0b10*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x0011e2000c101906 */ /*0b20*/ FSETP.GEU.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720b */ /* 0x020fda0003f0e000 */ /*0b30*/ @!P0 FADD R6, R6, 360 ; /* 0x43b4000006068421 */ /* 0x000fca0000000000 */ /*0b40*/ FSETP.GEU.AND P0, PT, R6.reuse, 22.5, PT ; /* 0x41b400000600780b */ /* 0x040fe40003f0e000 */ /*0b50*/ FSETP.GEU.AND P1, PT, R6.reuse, 202.5, PT ; /* 0x434a80000600780b */ /* 0x040fe40003f2e000 */ /*0b60*/ FSETP.GE.OR P0, PT, R6.reuse, 337.5, !P0 ; /* 0x43a8c0000600780b */ /* 0x040fe40004706400 */ /*0b70*/ FSETP.GE.AND P1, PT, R6, 157.25, !P1 ; /* 0x431d40000600780b */ /* 0x000fc80004f26000 */ /*0b80*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0b90*/ @P0 BRA 0xea0 ; /* 0x0000030000000947 */ /* 0x000fea0003800000 */ /*0ba0*/ FSETP.GEU.AND P0, PT, R6.reuse, 67.5, PT ; /* 0x428700000600780b */ /* 0x041fe40003f0e000 */ /*0bb0*/ FSETP.GEU.AND P1, PT, R6.reuse, 247.5, PT ; /* 0x437780000600780b */ /* 0x040fe40003f2e000 */ /*0bc0*/ FSETP.GE.AND P0, PT, R6.reuse, 22.5, !P0 ; /* 0x41b400000600780b */ /* 0x040fe40004706000 */ /*0bd0*/ FSETP.GE.AND P1, PT, R6, 202.5, !P1 ; /* 0x434a80000600780b */ /* 0x000fc80004f26000 */ /*0be0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0bf0*/ @P0 BRA 0xe00 ; /* 0x0000020000000947 */ /* 0x000fea0003800000 */ /*0c00*/ FSETP.GEU.AND P0, PT, R6.reuse, 112.5, PT ; /* 0x42e100000600780b */ /* 0x040fe40003f0e000 */ /*0c10*/ FSETP.GEU.AND P1, PT, R6.reuse, 292.5, PT ; /* 0x439240000600780b */ /* 0x040fe40003f2e000 */ /*0c20*/ FSETP.GE.AND P0, PT, R6.reuse, 67.5, !P0 ; /* 0x428700000600780b */ /* 0x040fe40004706000 */ /*0c30*/ FSETP.GE.AND P1, PT, R6, 247.5, !P1 ; /* 0x437780000600780b */ /* 0x000fc80004f26000 */ /*0c40*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0c50*/ @P0 BRA 0xd60 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*0c60*/ FSETP.GEU.AND P0, PT, R6.reuse, 157.5, PT ; /* 0x431d80000600780b */ /* 0x040fe40003f0e000 */ /*0c70*/ FSETP.GEU.AND P1, PT, R6.reuse, 337.5, PT ; /* 0x43a8c0000600780b */ /* 0x040fe40003f2e000 */ /*0c80*/ FSETP.GE.AND P0, PT, R6.reuse, 112.5, !P0 ; /* 0x42e100000600780b */ /* 0x040fe40004706000 */ /*0c90*/ FSETP.GE.OR P1, PT, R6, 292.5, !P1 ; /* 0x439240000600780b */ /* 0x000fc80004f26400 */ /*0ca0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0cb0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0cc0*/ LDS R2, [R0] ; /* 0x0000000000027984 */ /* 0x000e220000000800 */ /*0cd0*/ BSSY B0, 0xd40 ; /* 0x0000006000007945 */ /* 0x000fe20003800000 */ /*0ce0*/ ISETP.GT.AND P0, PT, R2, R7, PT ; /* 0x000000070200720c */ /* 0x001fda0003f04270 */ /*0cf0*/ @P0 BRA 0xd30 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*0d00*/ LDS R0, [R0+0x208] ; /* 0x0002080000007984 */ /* 0x002e240000000800 */ /*0d10*/ ISETP.GT.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x001fda0003f04270 */ /*0d20*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0d30*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0d40*/ STG.E [R4.64], RZ ; /* 0x000000ff04007986 */ /* 0x000fe2000c101906 */ /*0d50*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0d60*/ LDS R2, [R0+0x204] ; /* 0x0002040000027984 */ /* 0x000e220000000800 */ /*0d70*/ BSSY B0, 0xde0 ; /* 0x0000006000007945 */ /* 0x000fe20003800000 */ /*0d80*/ ISETP.GT.AND P0, PT, R2, R7, PT ; /* 0x000000070200720c */ /* 0x001fda0003f04270 */ /*0d90*/ @P0 BRA 0xdd0 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*0da0*/ LDS R0, [R0+0x4] ; /* 0x0000040000007984 */ /* 0x002e240000000800 */ /*0db0*/ ISETP.GT.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x001fda0003f04270 */ /*0dc0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0dd0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0de0*/ STG.E [R4.64], RZ ; /* 0x000000ff04007986 */ /* 0x000fe2000c101906 */ /*0df0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0e00*/ LDS R2, [R0+0x8] ; /* 0x0000080000027984 */ /* 0x000e220000000800 */ /*0e10*/ BSSY B0, 0xe80 ; /* 0x0000006000007945 */ /* 0x000fe20003800000 */ /*0e20*/ ISETP.GT.AND P0, PT, R2, R7, PT ; /* 0x000000070200720c */ /* 0x001fda0003f04270 */ /*0e30*/ @P0 BRA 0xe70 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*0e40*/ LDS R0, [R0+0x200] ; /* 0x0002000000007984 */ /* 0x002e240000000800 */ /*0e50*/ ISETP.GT.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x001fda0003f04270 */ /*0e60*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0e70*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0e80*/ STG.E [R4.64], RZ ; /* 0x000000ff04007986 */ /* 0x000fe2000c101906 */ /*0e90*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0ea0*/ LDS R2, [R0+0x108] ; /* 0x0001080000027984 */ /* 0x001e220000000800 */ /*0eb0*/ BSSY B0, 0xf20 ; /* 0x0000006000007945 */ /* 0x000fe20003800000 */ /*0ec0*/ ISETP.GT.AND P0, PT, R2, R7, PT ; /* 0x000000070200720c */ /* 0x001fda0003f04270 */ /*0ed0*/ @P0 BRA 0xf10 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*0ee0*/ LDS R0, [R0+0x100] ; /* 0x0001000000007984 */ /* 0x002e240000000800 */ /*0ef0*/ ISETP.GT.AND P0, PT, R0, R7, PT ; /* 0x000000070000720c */ /* 0x001fda0003f04270 */ /*0f00*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0f10*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0f20*/ STG.E [R4.64], RZ ; /* 0x000000ff04007986 */ /* 0x000fe2000c101906 */ /*0f30*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0f40*/ BRA 0xf40; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0f50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fe0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ff0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : sobel .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff067624 */ /* 0x000fe200078e00ff */ /*0030*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */ /* 0x000fe20000000a00 */ /*0040*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fe200078e00ff */ /*0050*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */ /* 0x000e220000002100 */ /*0060*/ IMAD.SHL.U32 R6, R6, 0x20, RZ ; /* 0x0000002006067824 */ /* 0x000fc600078e00ff */ /*0070*/ S2R R14, SR_TID.Y ; /* 0x00000000000e7919 */ /* 0x000e680000002200 */ /*0080*/ S2R R11, SR_CTAID.Y ; /* 0x00000000000b7919 */ /* 0x000e620000002600 */ /*0090*/ IMAD R9, R0, 0x20, R7 ; /* 0x0000002000097824 */ /* 0x001fe400078e0207 */ /*00a0*/ IMAD R11, R11, 0x20, R14 ; /* 0x000000200b0b7824 */ /* 0x002fc800078e020e */ /*00b0*/ IMAD R4, R6, R11, R9 ; /* 0x0000000b06047224 */ /* 0x000fc800078e0209 */ /*00c0*/ IMAD.WIDE R2, R4, R5, c[0x0][0x160] ; /* 0x0000580004027625 */ /* 0x000fca00078e0205 */ /*00d0*/ LDG.E R13, [R2.64] ; /* 0x00000006020d7981 */ /* 0x000ea2000c1e1900 */ /*00e0*/ IMAD.SHL.U32 R8, R14, 0x100, RZ ; /* 0x000001000e087824 */ /* 0x000fe200078e00ff */ /*00f0*/ LOP3.LUT P0, RZ, R7.reuse, R14, RZ, 0xfc, !PT ; /* 0x0000000e07ff7212 */ /* 0x040fe2000780fcff */ /*0100*/ IMAD.SHL.U32 R15, R7, 0x4, RZ ; /* 0x00000004070f7824 */ /* 0x000fe200078e00ff */ /*0110*/ BSSY B0, 0x250 ; /* 0x0000013000007945 */ /* 0x000fe60003800000 */ /*0120*/ IMAD.IADD R0, R8, 0x1, R15 ; /* 0x0000000108007824 */ /* 0x000fca00078e020f */ /*0130*/ STS [R0+0x104], R13 ; /* 0x0001040d00007388 */ /* 0x0041e60000000800 */ /*0140*/ @P0 BRA 0x240 ; /* 0x000000f000000947 */ /* 0x000fea0003800000 */ /*0150*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0160*/ ISETP.GE.AND P0, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f06270 */ /*0170*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0180*/ ISETP.GE.AND P1, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe20003f26270 */ /*0190*/ BSSY B1, 0x230 ; /* 0x0000009000017945 */ /* 0x000fe20003800000 */ /*01a0*/ ISETP.GT.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fc60004704670 */ /*01b0*/ ISETP.GT.OR P1, PT, R11, UR4, !P1 ; /* 0x000000040b007c0c */ /* 0x000fc8000cf24670 */ /*01c0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*01d0*/ @P0 BRA 0x220 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*01e0*/ IMAD R10, R6, R11, -R6 ; /* 0x0000000b060a7224 */ /* 0x000fca00078e0a06 */ /*01f0*/ IADD3 R10, R10, -0x1, R9 ; /* 0xffffffff0a0a7810 */ /* 0x000fca0007ffe009 */ /*0200*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x001fcc00078e0205 */ /*0210*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000164000c1e1900 */ /*0220*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0230*/ STS [R0], R13 ; /* 0x0000000d00007388 */ /* 0x0203e40000000800 */ /*0240*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0250*/ ISETP.NE.AND P2, PT, R14, 0x1f, PT ; /* 0x0000001f0e00780c */ /* 0x000fe20003f45270 */ /*0260*/ BSSY B0, 0x3b0 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*0270*/ ISETP.NE.AND P3, PT, R7.reuse, RZ, PT ; /* 0x000000ff0700720c */ /* 0x040fe40003f65270 */ /*0280*/ ISETP.NE.OR P0, PT, R7, RZ, P2 ; /* 0x000000ff0700720c */ /* 0x000fda0001705670 */ /*0290*/ @P0 BRA 0x3a0 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*02a0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*02b0*/ ISETP.GE.AND P1, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f26270 */ /*02c0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*02d0*/ ISETP.GE.AND P0, PT, R11.reuse, -0x1, PT ; /* 0xffffffff0b00780c */ /* 0x040fe20003f06270 */ /*02e0*/ BSSY B1, 0x390 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*02f0*/ IADD3 R10, R11, 0x1, RZ ; /* 0x000000010b0a7810 */ /* 0x000fe40007ffe0ff */ /*0300*/ ISETP.GT.OR P1, PT, R9, R6, !P1 ; /* 0x000000060900720c */ /* 0x000fe40004f24670 */ /*0310*/ ISETP.GE.OR P0, PT, R10, UR4, !P0 ; /* 0x000000040a007c0c */ /* 0x000fc8000c706670 */ /*0320*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*0330*/ @P0 BRA 0x380 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0340*/ IMAD R10, R6, R11, R6 ; /* 0x0000000b060a7224 */ /* 0x000fca00078e0206 */ /*0350*/ IADD3 R10, R10, -0x1, R9 ; /* 0xffffffff0a0a7810 */ /* 0x000fca0007ffe009 */ /*0360*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x003fcc00078e0205 */ /*0370*/ LDG.E R13, [R12.64] ; /* 0x000000060c0d7981 */ /* 0x000164000c1e1900 */ /*0380*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0390*/ STS [0x2100], R13 ; /* 0x0021000dff007388 */ /* 0x0205e40000000800 */ /*03a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*03b0*/ ISETP.NE.AND P4, PT, R7, 0x1f, PT ; /* 0x0000001f0700780c */ /* 0x000fe20003f85270 */ /*03c0*/ BSSY B0, 0x510 ; /* 0x0000014000007945 */ /* 0x000fe20003800000 */ /*03d0*/ ISETP.NE.AND P5, PT, R14.reuse, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x040fe40003fa5270 */ /*03e0*/ ISETP.NE.OR P0, PT, R14, RZ, P4 ; /* 0x000000ff0e00720c */ /* 0x000fda0002705670 */ /*03f0*/ @P0 BRA 0x500 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*0400*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0410*/ ISETP.GE.AND P1, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f26270 */ /*0420*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0430*/ IADD3 R15, R9, 0x1, RZ ; /* 0x00000001090f7810 */ /* 0x000fe20007ffe0ff */ /*0440*/ BSSY B1, 0x4f0 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*0450*/ ISETP.GE.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe40003f06270 */ /*0460*/ ISETP.GE.OR P1, PT, R15, R6, !P1 ; /* 0x000000060f00720c */ /* 0x000fe40004f26670 */ /*0470*/ ISETP.GT.OR P0, PT, R11, UR4, !P0 ; /* 0x000000040b007c0c */ /* 0x000fc8000c704670 */ /*0480*/ PLOP3.LUT P1, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f21570 */ /*0490*/ @P1 BRA 0x4e0 ; /* 0x0000004000001947 */ /* 0x000fea0003800000 */ /*04a0*/ IMAD R10, R6, R11, -R6 ; /* 0x0000000b060a7224 */ /* 0x000fca00078e0a06 */ /*04b0*/ IADD3 R10, R10, -0x1, R9 ; /* 0xffffffff0a0a7810 */ /* 0x000fca0007ffe009 */ /*04c0*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x007fcc00078e0205 */ /*04d0*/ LDG.E R13, [R12.64+0x8] ; /* 0x000008060c0d7981 */ /* 0x000164000c1e1900 */ /*04e0*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*04f0*/ STS [0x84], R13 ; /* 0x0000840dff007388 */ /* 0x0207e40000000800 */ /*0500*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0510*/ ISETP.NE.OR P0, PT, R7, 0x1f, P2 ; /* 0x0000001f0700780c */ /* 0x000fe20001705670 */ /*0520*/ BSSY B0, 0x650 ; /* 0x0000012000007945 */ /* 0x000fd80003800000 */ /*0530*/ @P0 BRA 0x640 ; /* 0x0000010000000947 */ /* 0x000fea0003800000 */ /*0540*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0550*/ ISETP.GE.AND P1, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f26270 */ /*0560*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0570*/ IADD3 R15, R9, 0x1, RZ ; /* 0x00000001090f7810 */ /* 0x000fe20007ffe0ff */ /*0580*/ BSSY B1, 0x630 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*0590*/ ISETP.GE.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe40003f06270 */ /*05a0*/ ISETP.GE.OR P1, PT, R15, R6, !P1 ; /* 0x000000060f00720c */ /* 0x000fe40004f26670 */ /*05b0*/ ISETP.GT.OR P0, PT, R11, UR4, !P0 ; /* 0x000000040b007c0c */ /* 0x000fc8000c704670 */ /*05c0*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*05d0*/ @P0 BRA 0x620 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*05e0*/ IMAD R10, R6, R11, -R6 ; /* 0x0000000b060a7224 */ /* 0x000fca00078e0a06 */ /*05f0*/ IADD3 R10, R10, -0x1, R9 ; /* 0xffffffff0a0a7810 */ /* 0x000fca0007ffe009 */ /*0600*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x00ffcc00078e0205 */ /*0610*/ LDG.E R13, [R12.64+0x8] ; /* 0x000008060c0d7981 */ /* 0x000164000c1e1900 */ /*0620*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0630*/ STS [0x2184], R13 ; /* 0x0021840dff007388 */ /* 0x0209e40000000800 */ /*0640*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0650*/ BSSY B0, 0x780 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*0660*/ @P5 BRA 0x770 ; /* 0x0000010000005947 */ /* 0x000fea0003800000 */ /*0670*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*0680*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f06270 */ /*0690*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*06a0*/ ISETP.GE.AND P1, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe20003f26270 */ /*06b0*/ BSSY B1, 0x760 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*06c0*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe20004706670 */ /*06d0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x001fe400078e00ff */ /*06e0*/ ISETP.GT.OR P1, PT, R11, UR4, !P1 ; /* 0x000000040b007c0c */ /* 0x000fc8000cf24670 */ /*06f0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0700*/ @P0 BRA 0x750 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0710*/ IADD3 R10, R11, -0x1, RZ ; /* 0xffffffff0b0a7810 */ /* 0x000fca0007ffe0ff */ /*0720*/ IMAD R10, R6, R10, R9 ; /* 0x0000000a060a7224 */ /* 0x000fc800078e0209 */ /*0730*/ IMAD.WIDE R12, R10, R5, c[0x0][0x160] ; /* 0x000058000a0c7625 */ /* 0x01efcc00078e0205 */ /*0740*/ LDG.E R12, [R12.64] ; /* 0x000000060c0c7981 */ /* 0x000164000c1e1900 */ /*0750*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0760*/ STS [R7.X4+0x4], R12 ; /* 0x0000040c07007388 */ /* 0x0201e40000004800 */ /*0770*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0780*/ BSSY B0, 0x8b0 ; /* 0x0000012000007945 */ /* 0x000fe20003800000 */ /*0790*/ @P2 BRA 0x8a0 ; /* 0x0000010000002947 */ /* 0x000fea0003800000 */ /*07a0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*07b0*/ ISETP.GE.AND P0, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fe20003f06270 */ /*07c0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*07d0*/ ISETP.GE.AND P1, PT, R11.reuse, -0x1, PT ; /* 0xffffffff0b00780c */ /* 0x040fe20003f26270 */ /*07e0*/ BSSY B1, 0x890 ; /* 0x000000a000017945 */ /* 0x000fe20003800000 */ /*07f0*/ IADD3 R10, R11, 0x1, RZ ; /* 0x000000010b0a7810 */ /* 0x000fe20007ffe0ff */ /*0800*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */ /* 0x001fe200078e00ff */ /*0810*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe40004706670 */ /*0820*/ ISETP.GE.OR P1, PT, R10, UR4, !P1 ; /* 0x000000040a007c0c */ /* 0x000fc8000cf26670 */ /*0830*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0840*/ @P0 BRA 0x880 ; /* 0x0000003000000947 */ /* 0x000fea0003800000 */ /*0850*/ IMAD R12, R6, R10, R9 ; /* 0x0000000a060c7224 */ /* 0x000fc800078e0209 */ /*0860*/ IMAD.WIDE R12, R12, R5, c[0x0][0x160] ; /* 0x000058000c0c7625 */ /* 0x01efcc00078e0205 */ /*0870*/ LDG.E R12, [R12.64] ; /* 0x000000060c0c7981 */ /* 0x000164000c1e1900 */ /*0880*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0890*/ STS [R7.X4+0x2104], R12 ; /* 0x0021040c07007388 */ /* 0x0201e40000004800 */ /*08a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*08b0*/ BSSY B0, 0x9b0 ; /* 0x000000f000007945 */ /* 0x000fe20003800000 */ /*08c0*/ @P3 BRA 0x9a0 ; /* 0x000000d000003947 */ /* 0x000fea0003800000 */ /*08d0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*08e0*/ ISETP.GE.AND P1, PT, R9, 0x1, PT ; /* 0x000000010900780c */ /* 0x000fe20003f26270 */ /*08f0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0900*/ ISETP.GE.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe20003f06270 */ /*0910*/ BSSY B1, 0x990 ; /* 0x0000007000017945 */ /* 0x000fe20003800000 */ /*0920*/ ISETP.GT.OR P1, PT, R9, R6, !P1 ; /* 0x000000060900720c */ /* 0x000fe20004f24670 */ /*0930*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x001fe400078e00ff */ /*0940*/ ISETP.GE.OR P0, PT, R11, UR4, !P0 ; /* 0x000000040b007c0c */ /* 0x000fc8000c706670 */ /*0950*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f01570 */ /*0960*/ @P0 BRA 0x980 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0970*/ LDG.E R7, [R2.64+-0x4] ; /* 0xfffffc0602077981 */ /* 0x000164000c1e1900 */ /*0980*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0990*/ STS [R8+0x100], R7 ; /* 0x0001000708007388 */ /* 0x0201e40000000800 */ /*09a0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*09b0*/ BSSY B0, 0xac0 ; /* 0x0000010000007945 */ /* 0x000fe20003800000 */ /*09c0*/ @P4 BRA 0xab0 ; /* 0x000000e000004947 */ /* 0x000fea0003800000 */ /*09d0*/ ULDC UR4, c[0x0][0x10] ; /* 0x0000040000047ab9 */ /* 0x000fe20000000800 */ /*09e0*/ ISETP.GE.AND P0, PT, R9.reuse, -0x1, PT ; /* 0xffffffff0900780c */ /* 0x040fe20003f06270 */ /*09f0*/ USHF.L.U32 UR4, UR4, 0x5, URZ ; /* 0x0000000504047899 */ /* 0x000fe2000800063f */ /*0a00*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */ /* 0x000fe20007ffe0ff */ /*0a10*/ BSSY B1, 0xaa0 ; /* 0x0000008000017945 */ /* 0x000fe20003800000 */ /*0a20*/ ISETP.GE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe20003f26270 */ /*0a30*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ; /* 0x000000ffff077224 */ /* 0x001fe200078e00ff */ /*0a40*/ ISETP.GE.OR P0, PT, R9, R6, !P0 ; /* 0x000000060900720c */ /* 0x000fe40004706670 */ /*0a50*/ ISETP.GE.OR P1, PT, R11, UR4, !P1 ; /* 0x000000040b007c0c */ /* 0x000fc8000cf26670 */ /*0a60*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*0a70*/ @P0 BRA 0xa90 ; /* 0x0000001000000947 */ /* 0x000fea0003800000 */ /*0a80*/ LDG.E R7, [R2.64+0x4] ; /* 0x0000040602077981 */ /* 0x000164000c1e1900 */ /*0a90*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0aa0*/ STS [R8+0x184], R7 ; /* 0x0001840708007388 */ /* 0x0201e40000000800 */ /*0ab0*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0ac0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0ad0*/ BSSY B0, 0xfa0 ; /* 0x000004c000007945 */ /* 0x000fe20003800000 */ /*0ae0*/ LDS R2, [R0+0x108] ; /* 0x0001080000027984 */ /* 0x001fe80000000800 */ /*0af0*/ LDS R3, [R0+0x100] ; /* 0x0001000000037984 */ /* 0x000e280000000800 */ /*0b00*/ LDS R6, [R0+0x4] ; /* 0x0000040000067984 */ /* 0x000fe80000000800 */ /*0b10*/ LDS R9, [R0+0x204] ; /* 0x0002040000097984 */ /* 0x000f620000000800 */ /*0b20*/ IMAD.IADD R7, R3, 0x1, -R2 ; /* 0x0000000103077824 */ /* 0x001fc400078e0a02 */ /*0b30*/ IMAD.WIDE R2, R4, R5, c[0x0][0x168] ; /* 0x00005a0004027625 */ /* 0x000fc800078e0205 */ /*0b40*/ IMAD.IADD R9, R9, 0x1, -R6 ; /* 0x0000000109097824 */ /* 0x020fe200078e0a06 */ /*0b50*/ IABS R6, R7 ; /* 0x0000000700067213 */ /* 0x000fc80000000000 */ /*0b60*/ IABS R11, R9.reuse ; /* 0x00000009000b7213 */ /* 0x080fe40000000000 */ /*0b70*/ I2FP.F32.S32 R5, R9 ; /* 0x0000000900057245 */ /* 0x000fc60000201400 */ /*0b80*/ IMAD.IADD R11, R11, 0x1, R6 ; /* 0x000000010b0b7824 */ /* 0x000fe200078e0206 */ /*0b90*/ I2FP.F32.S32 R6, R7 ; /* 0x0000000700067245 */ /* 0x000fe40000201400 */ /*0ba0*/ FSETP.NEU.AND P0, PT, |R5|, RZ, PT ; /* 0x000000ff0500720b */ /* 0x000fe40003f0d200 */ /*0bb0*/ STG.E [R2.64], R11 ; /* 0x0000000b02007986 */ /* 0x0001e2000c101906 */ /*0bc0*/ FSETP.EQ.AND P1, PT, |R6|, RZ, PT ; /* 0x000000ff0600720b */ /* 0x000fda0003f22200 */ /*0bd0*/ @!P0 BRA P1, 0xf60 ; /* 0x0000038000008947 */ /* 0x000fea0000800000 */ /*0be0*/ FSETP.NEU.AND P0, PT, |R5|, +INF , PT ; /* 0x7f8000000500780b */ /* 0x001fe40003f0d200 */ /*0bf0*/ FSETP.EQ.AND P1, PT, |R6|, +INF , PT ; /* 0x7f8000000600780b */ /* 0x000fda0003f22200 */ /*0c00*/ @!P0 BRA P1, 0xf10 ; /* 0x0000030000008947 */ /* 0x000fea0000800000 */ /*0c10*/ FMNMX R9, |R5|.reuse, |R6|.reuse, !PT ; /* 0x4000000605097209 */ /* 0x0c0fe20007800200 */ /*0c20*/ BSSY B1, 0xd10 ; /* 0x000000e000017945 */ /* 0x000fe20003800000 */ /*0c30*/ FMNMX R0, |R5|, |R6|, PT ; /* 0x4000000605007209 */ /* 0x002fe40003800200 */ /*0c40*/ MUFU.RCP R2, R9 ; /* 0x0000000900027308 */ /* 0x000e220000001000 */ /*0c50*/ ISETP.GE.AND P3, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fce0003f66270 */ /*0c60*/ FCHK P0, R0, R9 ; /* 0x0000000900007302 */ /* 0x000e620000000000 */ /*0c70*/ FFMA R3, -R9, R2, 1 ; /* 0x3f80000009037423 */ /* 0x001fc80000000102 */ /*0c80*/ FFMA R3, R2, R3, R2 ; /* 0x0000000302037223 */ /* 0x000fc80000000002 */ /*0c90*/ FFMA R2, R0, R3, RZ ; /* 0x0000000300027223 */ /* 0x000fc800000000ff */ /*0ca0*/ FFMA R7, -R9, R2, R0 ; /* 0x0000000209077223 */ /* 0x000fc80000000100 */ /*0cb0*/ FFMA R3, R3, R7, R2 ; /* 0x0000000703037223 */ /* 0x000fe20000000002 */ /*0cc0*/ @!P0 BRA 0xd00 ; /* 0x0000003000008947 */ /* 0x002fea0003800000 */ /*0cd0*/ MOV R2, 0xcf0 ; /* 0x00000cf000027802 */ /* 0x000fe40000000f00 */ /*0ce0*/ CALL.REL.NOINC 0x19d0 ; /* 0x00000ce000007944 */ /* 0x01cfea0003c00000 */ /*0cf0*/ IMAD.MOV.U32 R3, RZ, RZ, R0 ; /* 0x000000ffff037224 */ /* 0x000fe400078e0000 */ /*0d00*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0d10*/ FMUL R0, R3, R3 ; /* 0x0000000303007220 */ /* 0x000fe20000400000 */ /*0d20*/ BSSY B1, 0xe80 ; /* 0x0000015000017945 */ /* 0x000fe60003800000 */ /*0d30*/ FADD R7, R0, 11.33538818359375 ; /* 0x41355dc000077421 */ /* 0x000fc80000000000 */ /*0d40*/ FFMA R7, R0, R7, 28.84246826171875 ; /* 0x41e6bd6000077423 */ /* 0x000fc80000000007 */ /*0d50*/ FFMA R9, R0, R7, 19.6966705322265625 ; /* 0x419d92c800097423 */ /* 0x000fe20000000007 */ /*0d60*/ IMAD.MOV.U32 R7, RZ, RZ, 0x3f52c7ea ; /* 0x3f52c7eaff077424 */ /* 0x000fc800078e00ff */ /*0d70*/ IADD3 R2, R9, 0x1800000, RZ ; /* 0x0180000009027810 */ /* 0x000fe20007ffe0ff */ /*0d80*/ FFMA R7, R0, -R7, -5.6748671531677246094 ; /* 0xc0b5988300077423 */ /* 0x000fc60000000807 */ /*0d90*/ LOP3.LUT R2, R2, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000002027812 */ /* 0x000fe200078ec0ff */ /*0da0*/ FFMA R7, R0, R7, -6.5655550956726074219 ; /* 0xc0d2190700077423 */ /* 0x000fc60000000007 */ /*0db0*/ ISETP.GT.U32.AND P0, PT, R2, 0x1ffffff, PT ; /* 0x01ffffff0200780c */ /* 0x000fe20003f04070 */ /*0dc0*/ FMUL R8, R0, R7 ; /* 0x0000000700087220 */ /* 0x000fc80000400000 */ /*0dd0*/ FMUL R8, R8, R3 ; /* 0x0000000308087220 */ /* 0x000fd00000400000 */ /*0de0*/ @P0 BRA 0xe30 ; /* 0x0000004000000947 */ /* 0x000fea0003800000 */ /*0df0*/ MOV R10, 0xe10 ; /* 0x00000e10000a7802 */ /* 0x000fe40000000f00 */ /*0e00*/ CALL.REL.NOINC 0x1680 ; /* 0x0000087000007944 */ /* 0x01cfea0003c00000 */ /*0e10*/ IMAD.MOV.U32 R2, RZ, RZ, R7 ; /* 0x000000ffff027224 */ /* 0x002fe200078e0007 */ /*0e20*/ BRA 0xe70 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*0e30*/ MUFU.RCP R2, R9 ; /* 0x0000000900027308 */ /* 0x000e240000001000 */ /*0e40*/ FFMA R0, R9, R2, -1 ; /* 0xbf80000009007423 */ /* 0x001fc80000000002 */ /*0e50*/ FADD.FTZ R7, -R0, -RZ ; /* 0x800000ff00077221 */ /* 0x000fc80000010100 */ /*0e60*/ FFMA R2, R2, R7, R2 ; /* 0x0000000702027223 */ /* 0x000fe40000000002 */ /*0e70*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*0e80*/ FSETP.GT.AND P0, PT, |R5|.reuse, |R6|, PT ; /* 0x400000060500720b */ /* 0x040fe20003f04200 */ /*0e90*/ FADD R0, |R5|.reuse, |R6| ; /* 0x4000000605007221 */ /* 0x041fe20000000200 */ /*0ea0*/ FFMA R2, R8, R2, R3 ; /* 0x0000000208027223 */ /* 0x000fe20000000003 */ /*0eb0*/ LOP3.LUT R5, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005057812 */ /* 0x000fc600078ec0ff */ /*0ec0*/ FSETP.GTU.AND P1, PT, R0, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fce0003f2c000 */ /*0ed0*/ @P0 FADD R2, -R2, 1.5707963705062866211 ; /* 0x3fc90fdb02020421 */ /* 0x000fc80000000100 */ /*0ee0*/ @!P3 FADD R2, -R2, 3.1415927410125732422 ; /* 0x40490fdb0202b421 */ /* 0x000fca0000000100 */ /*0ef0*/ @!P1 LOP3.LUT R0, R5, R2, RZ, 0xfc, !PT ; /* 0x0000000205009212 */ /* 0x000fe200078efcff */ /*0f00*/ BRA 0xf90 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*0f10*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4016cbe4 ; /* 0x4016cbe4ff007424 */ /* 0x002fe200078e00ff */ /*0f20*/ ISETP.GE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fc80003f06270 */ /*0f30*/ SEL R0, R0, 0x3f490fdb, !P0 ; /* 0x3f490fdb00007807 */ /* 0x000fc80004000000 */ /*0f40*/ LOP3.LUT R0, R0, 0x80000000, R5, 0xf8, !PT ; /* 0x8000000000007812 */ /* 0x000fe200078ef805 */ /*0f50*/ BRA 0xf90 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*0f60*/ SHF.R.S32.HI R7, RZ, 0x1f, R7 ; /* 0x0000001fff077819 */ /* 0x001fe40000011407 */ /*0f70*/ LOP3.LUT R0, R5, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000005007812 */ /* 0x002fc800078ec0ff */ /*0f80*/ LOP3.LUT R0, R0, 0x40490fdb, R7, 0xf8, !PT ; /* 0x40490fdb00007812 */ /* 0x000fe400078ef807 */ /*0f90*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0fa0*/ MUFU.RCP64H R3, 3.1415920257568359375 ; /* 0x400921fb00037908 */ /* 0x000e220000001800 */ /*0fb0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x53c8d4f1 ; /* 0x53c8d4f1ff087424 */ /* 0x000fe200078e00ff */ /*0fc0*/ FMUL R10, R0, 180 ; /* 0x43340000000a7820 */ /* 0x000fe20000400000 */ /*0fd0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x400921fb ; /* 0x400921fbff097424 */ /* 0x000fe200078e00ff */ /*0fe0*/ BSSY B0, 0x1120 ; /* 0x0000013000007945 */ /* 0x000fe20003800000 */ /*0ff0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */ /* 0x000fc600078e00ff */ /*1000*/ F2F.F64.F32 R10, R10 ; /* 0x0000000a000a7310 */ /* 0x000e660000201800 */ /*1010*/ DFMA R6, R2, -R8, 1 ; /* 0x3ff000000206742b */ /* 0x001e0c0000000808 */ /*1020*/ DFMA R6, R6, R6, R6 ; /* 0x000000060606722b */ /* 0x001e220000000006 */ /*1030*/ FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT ; /* 0x036000000b00780b */ /* 0x002fca0003f2e200 */ /*1040*/ DFMA R6, R2, R6, R2 ; /* 0x000000060206722b */ /* 0x001e0c0000000002 */ /*1050*/ DFMA R2, R6, -R8, 1 ; /* 0x3ff000000602742b */ /* 0x001e0c0000000808 */ /*1060*/ DFMA R2, R6, R2, R6 ; /* 0x000000020602722b */ /* 0x001e0c0000000006 */ /*1070*/ DMUL R6, R10, R2 ; /* 0x000000020a067228 */ /* 0x001e0c0000000000 */ /*1080*/ DFMA R8, R6, c[0x2][0x0], R10 ; /* 0x0080000006087a2b */ /* 0x001e0c000000000a */ /*1090*/ DFMA R2, R2, R8, R6 ; /* 0x000000080202722b */ /* 0x001e140000000006 */ /*10a0*/ FFMA R0, RZ, 2.1426990032196044922, R3 ; /* 0x400921fbff007823 */ /* 0x001fca0000000003 */ /*10b0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */ /* 0x000fda0003f04200 */ /*10c0*/ @P0 BRA P1, 0x1110 ; /* 0x0000004000000947 */ /* 0x000fea0000800000 */ /*10d0*/ MOV R0, 0x10f0 ; /* 0x000010f000007802 */ /* 0x000fe40000000f00 */ /*10e0*/ CALL.REL.NOINC 0x1170 ; /* 0x0000008000007944 */ /* 0x01cfea0003c00000 */ /*10f0*/ IMAD.MOV.U32 R2, RZ, RZ, R12 ; /* 0x000000ffff027224 */ /* 0x000fe400078e000c */ /*1100*/ IMAD.MOV.U32 R3, RZ, RZ, R13 ; /* 0x000000ffff037224 */ /* 0x000fe400078e000d */ /*1110*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*1120*/ F2F.F32.F64 R3, R2 ; /* 0x0000000200037310 */ /* 0x000e220000301000 */ /*1130*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */ /* 0x000fc800078e00ff */ /*1140*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x000fca00078e0205 */ /*1150*/ STG.E [R4.64], R3 ; /* 0x0000000304007986 */ /* 0x001fe2000c101906 */ /*1160*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1170*/ IMAD.MOV.U32 R3, RZ, RZ, 0x3ff921fb ; /* 0x3ff921fbff037424 */ /* 0x000fe200078e00ff */ /*1180*/ BSSY B1, 0x1650 ; /* 0x000004c000017945 */ /* 0x000fe20003800000 */ /*1190*/ IMAD.MOV.U32 R7, RZ, RZ, R11 ; /* 0x000000ffff077224 */ /* 0x000fe400078e000b */ /*11a0*/ MUFU.RCP64H R9, R3 ; /* 0x0000000300097308 */ /* 0x000e220000001800 */ /*11b0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x53c8d4f1 ; /* 0x53c8d4f1ff027424 */ /* 0x000fe400078e00ff */ /*11c0*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */ /* 0x000fe200078e00ff */ /*11d0*/ FSETP.GEU.AND P1, PT, |R7|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000700780b */ /* 0x040fe20003f2e200 */ /*11e0*/ IMAD.MOV.U32 R6, RZ, RZ, R10 ; /* 0x000000ffff067224 */ /* 0x000fe200078e000a */ /*11f0*/ LOP3.LUT R18, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000007127812 */ /* 0x000fe200078ec0ff */ /*1200*/ IMAD.MOV.U32 R5, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff057424 */ /* 0x000fc400078e00ff */ /*1210*/ IMAD.MOV.U32 R17, RZ, RZ, 0x40000000 ; /* 0x40000000ff117424 */ /* 0x000fe200078e00ff */ /*1220*/ ISETP.GE.U32.AND P0, PT, R18, 0x40000000, PT ; /* 0x400000001200780c */ /* 0x000fe20003f06070 */ /*1230*/ IMAD.MOV.U32 R16, RZ, RZ, R18 ; /* 0x000000ffff107224 */ /* 0x000fc600078e0012 */ /*1240*/ SEL R5, R5, 0x63400000, !P0 ; /* 0x6340000005057807 */ /* 0x000fe20004000000 */ /*1250*/ DFMA R10, R8, -R2, 1 ; /* 0x3ff00000080a742b */ /* 0x001e220000000802 */ /*1260*/ IADD3 R20, R17, -0x1, RZ ; /* 0xffffffff11147810 */ /* 0x000fe40007ffe0ff */ /*1270*/ @!P1 LOP3.LUT R14, R5, 0x80000000, R7, 0xf8, !PT ; /* 0x80000000050e9812 */ /* 0x000fc600078ef807 */ /*1280*/ DFMA R10, R10, R10, R10 ; /* 0x0000000a0a0a722b */ /* 0x001e0c000000000a */ /*1290*/ DFMA R12, R8, R10, R8 ; /* 0x0000000a080c722b */ /* 0x0010640000000008 */ /*12a0*/ LOP3.LUT R9, R5, 0x800fffff, R7, 0xf8, !PT ; /* 0x800fffff05097812 */ /* 0x001fe200078ef807 */ /*12b0*/ IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff087224 */ /* 0x000fe200078e0006 */ /*12c0*/ @!P1 LOP3.LUT R11, R14, 0x100000, RZ, 0xfc, !PT ; /* 0x001000000e0b9812 */ /* 0x000fe200078efcff */ /*12d0*/ @!P1 IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a9224 */ /* 0x000fe200078e00ff */ /*12e0*/ DFMA R14, R12, -R2, 1 ; /* 0x3ff000000c0e742b */ /* 0x002e0a0000000802 */ /*12f0*/ @!P1 DFMA R8, R8, 2, -R10 ; /* 0x400000000808982b */ /* 0x000e48000000080a */ /*1300*/ DFMA R14, R12, R14, R12 ; /* 0x0000000e0c0e722b */ /* 0x001e0c000000000c */ /*1310*/ @!P1 LOP3.LUT R16, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000009109812 */ /* 0x002fe200078ec0ff */ /*1320*/ DMUL R10, R14, R8 ; /* 0x000000080e0a7228 */ /* 0x001e060000000000 */ /*1330*/ IADD3 R19, R16, -0x1, RZ ; /* 0xffffffff10137810 */ /* 0x000fc60007ffe0ff */ /*1340*/ DFMA R12, R10, -R2, R8 ; /* 0x800000020a0c722b */ /* 0x001e220000000008 */ /*1350*/ ISETP.GT.U32.AND P0, PT, R19, 0x7feffffe, PT ; /* 0x7feffffe1300780c */ /* 0x000fc80003f04070 */ /*1360*/ ISETP.GT.U32.OR P0, PT, R20, 0x7feffffe, P0 ; /* 0x7feffffe1400780c */ /* 0x000fe20000704470 */ /*1370*/ DFMA R10, R14, R12, R10 ; /* 0x0000000c0e0a722b */ /* 0x001058000000000a */ /*1380*/ @P0 BRA 0x1530 ; /* 0x000001a000000947 */ /* 0x000fea0003800000 */ /*1390*/ IADD3 R6, R18, -0x40000000, RZ ; /* 0xc000000012067810 */ /* 0x003fc80007ffe0ff */ /*13a0*/ IMNMX R6, R6, -0x46a00000, !PT ; /* 0xb960000006067817 */ /* 0x000fc80007800200 */ /*13b0*/ IMNMX R6, R6, 0x46a00000, PT ; /* 0x46a0000006067817 */ /* 0x000fca0003800200 */ /*13c0*/ IMAD.IADD R14, R6, 0x1, -R5 ; /* 0x00000001060e7824 */ /* 0x000fe400078e0a05 */ /*13d0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fc600078e00ff */ /*13e0*/ IADD3 R7, R14, 0x7fe00000, RZ ; /* 0x7fe000000e077810 */ /* 0x000fcc0007ffe0ff */ /*13f0*/ DMUL R12, R10, R6 ; /* 0x000000060a0c7228 */ /* 0x000e140000000000 */ /*1400*/ FSETP.GTU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT ; /* 0x001000000d00780b */ /* 0x001fda0003f0c200 */ /*1410*/ @P0 BRA 0x1640 ; /* 0x0000022000000947 */ /* 0x000fea0003800000 */ /*1420*/ DFMA R2, R10, -R2, R8 ; /* 0x800000020a02722b */ /* 0x000e220000000008 */ /*1430*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */ /* 0x000fd200078e00ff */ /*1440*/ FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT ; /* 0x000000ff0300720b */ /* 0x041fe40003f0d000 */ /*1450*/ LOP3.LUT R2, R3, 0x400921fb, RZ, 0x3c, !PT ; /* 0x400921fb03027812 */ /* 0x000fc800078e3cff */ /*1460*/ LOP3.LUT R5, R2, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000002057812 */ /* 0x000fc800078ec0ff */ /*1470*/ LOP3.LUT R7, R5, R7, RZ, 0xfc, !PT ; /* 0x0000000705077212 */ /* 0x000fc600078efcff */ /*1480*/ @!P0 BRA 0x1640 ; /* 0x000001b000008947 */ /* 0x000fea0003800000 */ /*1490*/ IMAD.MOV R3, RZ, RZ, -R14 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0a0e */ /*14a0*/ DMUL.RP R6, R10, R6 ; /* 0x000000060a067228 */ /* 0x000e220000008000 */ /*14b0*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */ /* 0x000fcc00078e00ff */ /*14c0*/ DFMA R2, R12, -R2, R10 ; /* 0x800000020c02722b */ /* 0x000e46000000000a */ /*14d0*/ LOP3.LUT R5, R7, R5, RZ, 0x3c, !PT ; /* 0x0000000507057212 */ /* 0x001fc600078e3cff */ /*14e0*/ IADD3 R2, -R14, -0x43300000, RZ ; /* 0xbcd000000e027810 */ /* 0x002fc80007ffe1ff */ /*14f0*/ FSETP.NEU.AND P0, PT, |R3|, R2, PT ; /* 0x000000020300720b */ /* 0x000fc80003f0d200 */ /*1500*/ FSEL R12, R6, R12, !P0 ; /* 0x0000000c060c7208 */ /* 0x000fe40004000000 */ /*1510*/ FSEL R13, R5, R13, !P0 ; /* 0x0000000d050d7208 */ /* 0x000fe20004000000 */ /*1520*/ BRA 0x1640 ; /* 0x0000011000007947 */ /* 0x000fea0003800000 */ /*1530*/ DSETP.NAN.AND P0, PT, R6, R6, PT ; /* 0x000000060600722a */ /* 0x003e1c0003f08000 */ /*1540*/ @P0 BRA 0x1620 ; /* 0x000000d000000947 */ /* 0x001fea0003800000 */ /*1550*/ ISETP.NE.AND P0, PT, R16, R17, PT ; /* 0x000000111000720c */ /* 0x000fe20003f05270 */ /*1560*/ IMAD.MOV.U32 R12, RZ, RZ, 0x0 ; /* 0x00000000ff0c7424 */ /* 0x000fe400078e00ff */ /*1570*/ IMAD.MOV.U32 R13, RZ, RZ, -0x80000 ; /* 0xfff80000ff0d7424 */ /* 0x000fd400078e00ff */ /*1580*/ @!P0 BRA 0x1640 ; /* 0x000000b000008947 */ /* 0x000fea0003800000 */ /*1590*/ ISETP.NE.AND P0, PT, R16, 0x7ff00000, PT ; /* 0x7ff000001000780c */ /* 0x000fe40003f05270 */ /*15a0*/ LOP3.LUT R6, R7, 0x400921fb, RZ, 0x3c, !PT ; /* 0x400921fb07067812 */ /* 0x000fe400078e3cff */ /*15b0*/ ISETP.EQ.OR P0, PT, R17, RZ, !P0 ; /* 0x000000ff1100720c */ /* 0x000fe40004702670 */ /*15c0*/ LOP3.LUT R13, R6, 0x80000000, RZ, 0xc0, !PT ; /* 0x80000000060d7812 */ /* 0x000fd600078ec0ff */ /*15d0*/ @P0 LOP3.LUT R2, R13, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000000d020812 */ /* 0x000fe200078efcff */ /*15e0*/ @!P0 IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c8224 */ /* 0x000fe400078e00ff */ /*15f0*/ @P0 IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c0224 */ /* 0x000fe400078e00ff */ /*1600*/ @P0 IMAD.MOV.U32 R13, RZ, RZ, R2 ; /* 0x000000ffff0d0224 */ /* 0x000fe200078e0002 */ /*1610*/ BRA 0x1640 ; /* 0x0000002000007947 */ /* 0x000fea0003800000 */ /*1620*/ LOP3.LUT R13, R7, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000070d7812 */ /* 0x000fe200078efcff */ /*1630*/ IMAD.MOV.U32 R12, RZ, RZ, R6 ; /* 0x000000ffff0c7224 */ /* 0x000fe400078e0006 */ /*1640*/ BSYNC B1 ; /* 0x0000000000017941 */ /* 0x000fea0003800000 */ /*1650*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */ /* 0x000fe400078e0000 */ /*1660*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fc800078e00ff */ /*1670*/ RET.REL.NODEC R2 0x0 ; /* 0xffffe98002007950 */ /* 0x000fea0003c3ffff */ /*1680*/ IMAD.SHL.U32 R0, R9, 0x2, RZ ; /* 0x0000000209007824 */ /* 0x000fe200078e00ff */ /*1690*/ BSSY B2, 0x19b0 ; /* 0x0000031000027945 */ /* 0x000fe80003800000 */ /*16a0*/ SHF.R.U32.HI R11, RZ, 0x18, R0 ; /* 0x00000018ff0b7819 */ /* 0x000fe20000011600 */ /*16b0*/ IMAD.MOV.U32 R0, RZ, RZ, R9 ; /* 0x000000ffff007224 */ /* 0x000fc600078e0009 */ /*16c0*/ ISETP.NE.U32.AND P0, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fda0003f05070 */ /*16d0*/ @P0 BRA 0x1780 ; /* 0x000000a000000947 */ /* 0x000fea0003800000 */ /*16e0*/ IMAD.SHL.U32 R2, R0, 0x2, RZ ; /* 0x0000000200027824 */ /* 0x000fca00078e00ff */ /*16f0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fda0003f05270 */ /*1700*/ @P0 FFMA R9, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f80000000090823 */ /* 0x000fe200000000ff */ /*1710*/ @!P0 MUFU.RCP R7, R0 ; /* 0x0000000000078308 */ /* 0x000ff00000001000 */ /*1720*/ @P0 MUFU.RCP R2, R9 ; /* 0x0000000900020308 */ /* 0x000e240000001000 */ /*1730*/ @P0 FFMA R11, R9, R2, -1 ; /* 0xbf800000090b0423 */ /* 0x001fc80000000002 */ /*1740*/ @P0 FADD.FTZ R11, -R11, -RZ ; /* 0x800000ff0b0b0221 */ /* 0x000fc80000010100 */ /*1750*/ @P0 FFMA R2, R2, R11, R2 ; /* 0x0000000b02020223 */ /* 0x000fc80000000002 */ /*1760*/ @P0 FFMA R7, R2, 1.84467440737095516160e+19, RZ ; /* 0x5f80000002070823 */ /* 0x000fe200000000ff */ /*1770*/ BRA 0x19a0 ; /* 0x0000022000007947 */ /* 0x000fea0003800000 */ /*1780*/ IADD3 R13, R11, -0xfd, RZ ; /* 0xffffff030b0d7810 */ /* 0x000fc80007ffe0ff */ /*1790*/ ISETP.GT.U32.AND P0, PT, R13, 0x1, PT ; /* 0x000000010d00780c */ /* 0x000fda0003f04070 */ /*17a0*/ @P0 BRA 0x1990 ; /* 0x000001e000000947 */ /* 0x000fea0003800000 */ /*17b0*/ LOP3.LUT R2, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00027812 */ /* 0x000fe200078ec0ff */ /*17c0*/ IMAD.MOV.U32 R14, RZ, RZ, 0x3 ; /* 0x00000003ff0e7424 */ /* 0x000fc600078e00ff */ /*17d0*/ LOP3.LUT R2, R2, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000002027812 */ /* 0x000fe400078efcff */ /*17e0*/ SHF.L.U32 R14, R14, R13, RZ ; /* 0x0000000d0e0e7219 */ /* 0x000fe400000006ff */ /*17f0*/ MUFU.RCP R7, R2 ; /* 0x0000000200077308 */ /* 0x000e240000001000 */ /*1800*/ FFMA R9, R2, R7, -1 ; /* 0xbf80000002097423 */ /* 0x001fc80000000007 */ /*1810*/ FADD.FTZ R12, -R9, -RZ ; /* 0x800000ff090c7221 */ /* 0x000fc80000010100 */ /*1820*/ FFMA.RM R9, R7.reuse, R12.reuse, R7.reuse ; /* 0x0000000c07097223 */ /* 0x1c0fe20000004007 */ /*1830*/ FFMA.RP R12, R7, R12, R7 ; /* 0x0000000c070c7223 */ /* 0x000fc80000008007 */ /*1840*/ LOP3.LUT R7, R9.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff09077812 */ /* 0x040fe400078ec0ff */ /*1850*/ FSETP.NEU.FTZ.AND P0, PT, R9, R12, PT ; /* 0x0000000c0900720b */ /* 0x000fe40003f1d000 */ /*1860*/ LOP3.LUT R7, R7, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000007077812 */ /* 0x000fe400078efcff */ /*1870*/ SEL R9, RZ, 0xffffffff, !P0 ; /* 0xffffffffff097807 */ /* 0x000fe40004000000 */ /*1880*/ LOP3.LUT R14, R14, R7, RZ, 0xc0, !PT ; /* 0x000000070e0e7212 */ /* 0x000fc600078ec0ff */ /*1890*/ IMAD.MOV R2, RZ, RZ, -R9 ; /* 0x000000ffff027224 */ /* 0x000fe200078e0a09 */ /*18a0*/ SHF.R.U32.HI R14, RZ, R13, R14 ; /* 0x0000000dff0e7219 */ /* 0x000fc8000001160e */ /*18b0*/ LOP3.LUT P1, RZ, R2, R13, R7, 0xf8, !PT ; /* 0x0000000d02ff7212 */ /* 0x000fe4000782f807 */ /*18c0*/ LOP3.LUT P0, RZ, R14.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x000000010eff7812 */ /* 0x040fe4000780c0ff */ /*18d0*/ LOP3.LUT P2, RZ, R14, 0x2, RZ, 0xc0, !PT ; /* 0x000000020eff7812 */ /* 0x000fc8000784c0ff */ /*18e0*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40000703c20 */ /*18f0*/ LOP3.LUT P1, RZ, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00ff7812 */ /* 0x000fe4000782c0ff */ /*1900*/ SEL R2, RZ, 0x1, !P0 ; /* 0x00000001ff027807 */ /* 0x000fca0004000000 */ /*1910*/ IMAD.MOV R2, RZ, RZ, -R2 ; /* 0x000000ffff027224 */ /* 0x000fca00078e0a02 */ /*1920*/ ISETP.GE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */ /* 0x000fe40003f06270 */ /*1930*/ IADD3 R2, R11, -0xfc, RZ ; /* 0xffffff040b027810 */ /* 0x000fc80007ffe0ff */ /*1940*/ SHF.R.U32.HI R7, RZ, R2, R7 ; /* 0x00000002ff077219 */ /* 0x000fce0000011607 */ /*1950*/ @!P0 IADD3 R7, R7, 0x1, RZ ; /* 0x0000000107078810 */ /* 0x000fca0007ffe0ff */ /*1960*/ @!P1 IMAD.SHL.U32 R7, R7, 0x2, RZ ; /* 0x0000000207079824 */ /* 0x000fca00078e00ff */ /*1970*/ LOP3.LUT R7, R7, 0x80000000, R0, 0xf8, !PT ; /* 0x8000000007077812 */ /* 0x000fe200078ef800 */ /*1980*/ BRA 0x19a0 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1990*/ MUFU.RCP R7, R0 ; /* 0x0000000000077308 */ /* 0x0000640000001000 */ /*19a0*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*19b0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x0 ; /* 0x00000000ff0b7424 */ /* 0x000fc800078e00ff */ /*19c0*/ RET.REL.NODEC R10 0x0 ; /* 0xffffe6300a007950 */ /* 0x000fea0003c3ffff */ /*19d0*/ SHF.R.U32.HI R7, RZ, 0x17, R9 ; /* 0x00000017ff077819 */ /* 0x000fe20000011609 */ /*19e0*/ BSSY B2, 0x2030 ; /* 0x0000064000027945 */ /* 0x000fe20003800000 */ /*19f0*/ SHF.R.U32.HI R3, RZ, 0x17, R0.reuse ; /* 0x00000017ff037819 */ /* 0x100fe20000011600 */ /*1a00*/ IMAD.MOV.U32 R10, RZ, RZ, R0 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0000 */ /*1a10*/ LOP3.LUT R8, R7, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff07087812 */ /* 0x000fe400078ec0ff */ /*1a20*/ LOP3.LUT R7, R3, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff03077812 */ /* 0x000fe400078ec0ff */ /*1a30*/ IADD3 R13, R8, -0x1, RZ ; /* 0xffffffff080d7810 */ /* 0x000fe40007ffe0ff */ /*1a40*/ IADD3 R12, R7, -0x1, RZ ; /* 0xffffffff070c7810 */ /* 0x000fc40007ffe0ff */ /*1a50*/ ISETP.GT.U32.AND P0, PT, R13, 0xfd, PT ; /* 0x000000fd0d00780c */ /* 0x000fc80003f04070 */ /*1a60*/ ISETP.GT.U32.OR P0, PT, R12, 0xfd, P0 ; /* 0x000000fd0c00780c */ /* 0x000fda0000704470 */ /*1a70*/ @!P0 IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b8224 */ /* 0x000fe200078e00ff */ /*1a80*/ @!P0 BRA 0x1c10 ; /* 0x0000018000008947 */ /* 0x000fea0003800000 */ /*1a90*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fe20003f1c200 */ /*1aa0*/ IMAD.MOV.U32 R3, RZ, RZ, R9 ; /* 0x000000ffff037224 */ /* 0x000fe200078e0009 */ /*1ab0*/ FSETP.GTU.FTZ.AND P1, PT, |R9|, +INF , PT ; /* 0x7f8000000900780b */ /* 0x000fc80003f3c200 */ /*1ac0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000703570 */ /*1ad0*/ @P0 BRA 0x2010 ; /* 0x0000053000000947 */ /* 0x000fea0003800000 */ /*1ae0*/ LOP3.LUT P0, RZ, R9, 0x7fffffff, R10, 0xc8, !PT ; /* 0x7fffffff09ff7812 */ /* 0x000fda000780c80a */ /*1af0*/ @!P0 BRA 0x1ff0 ; /* 0x000004f000008947 */ /* 0x000fea0003800000 */ /*1b00*/ FSETP.NEU.FTZ.AND P2, PT, |R0|.reuse, +INF , PT ; /* 0x7f8000000000780b */ /* 0x040fe40003f5d200 */ /*1b10*/ FSETP.NEU.FTZ.AND P1, PT, |R3|, +INF , PT ; /* 0x7f8000000300780b */ /* 0x000fe40003f3d200 */ /*1b20*/ FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ; /* 0x7f8000000000780b */ /* 0x000fd60003f1d200 */ /*1b30*/ @!P1 BRA !P2, 0x1ff0 ; /* 0x000004b000009947 */ /* 0x000fea0005000000 */ /*1b40*/ LOP3.LUT P2, RZ, R10, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0aff7812 */ /* 0x000fc8000784c0ff */ /*1b50*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000f24572 */ /*1b60*/ @P1 BRA 0x1fd0 ; /* 0x0000046000001947 */ /* 0x000fea0003800000 */ /*1b70*/ LOP3.LUT P1, RZ, R9, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff09ff7812 */ /* 0x000fc8000782c0ff */ /*1b80*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */ /* 0x000fda0000702572 */ /*1b90*/ @P0 BRA 0x1fa0 ; /* 0x0000040000000947 */ /* 0x000fea0003800000 */ /*1ba0*/ ISETP.GE.AND P0, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fe40003f06270 */ /*1bb0*/ ISETP.GE.AND P1, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */ /* 0x000fd60003f26270 */ /*1bc0*/ @P0 IMAD.MOV.U32 R11, RZ, RZ, RZ ; /* 0x000000ffff0b0224 */ /* 0x000fe200078e00ff */ /*1bd0*/ @!P0 FFMA R10, R0, 1.84467440737095516160e+19, RZ ; /* 0x5f800000000a8823 */ /* 0x000fe200000000ff */ /*1be0*/ @!P0 IMAD.MOV.U32 R11, RZ, RZ, -0x40 ; /* 0xffffffc0ff0b8424 */ /* 0x000fe200078e00ff */ /*1bf0*/ @!P1 FFMA R9, R3, 1.84467440737095516160e+19, RZ ; /* 0x5f80000003099823 */ /* 0x000fc800000000ff */ /*1c00*/ @!P1 IADD3 R11, R11, 0x40, RZ ; /* 0x000000400b0b9810 */ /* 0x000fe40007ffe0ff */ /*1c10*/ LEA R0, R8, 0xc0800000, 0x17 ; /* 0xc080000008007811 */ /* 0x000fe200078eb8ff */ /*1c20*/ BSSY B3, 0x1f90 ; /* 0x0000036000037945 */ /* 0x000fe20003800000 */ /*1c30*/ IADD3 R7, R7, -0x7f, RZ ; /* 0xffffff8107077810 */ /* 0x000fc60007ffe0ff */ /*1c40*/ IMAD.IADD R9, R9, 0x1, -R0 ; /* 0x0000000109097824 */ /* 0x000fe200078e0a00 */ /*1c50*/ IADD3 R8, R7.reuse, 0x7f, -R8 ; /* 0x0000007f07087810 */ /* 0x040fe20007ffe808 */ /*1c60*/ IMAD R0, R7, -0x800000, R10 ; /* 0xff80000007007824 */ /* 0x000fe400078e020a */ /*1c70*/ MUFU.RCP R3, R9 ; /* 0x0000000900037308 */ /* 0x000e220000001000 */ /*1c80*/ FADD.FTZ R13, -R9, -RZ ; /* 0x800000ff090d7221 */ /* 0x000fe20000010100 */ /*1c90*/ IMAD.IADD R8, R8, 0x1, R11 ; /* 0x0000000108087824 */ /* 0x000fc600078e020b */ /*1ca0*/ FFMA R12, R3, R13, 1 ; /* 0x3f800000030c7423 */ /* 0x001fc8000000000d */ /*1cb0*/ FFMA R12, R3, R12, R3 ; /* 0x0000000c030c7223 */ /* 0x000fc80000000003 */ /*1cc0*/ FFMA R3, R0, R12, RZ ; /* 0x0000000c00037223 */ /* 0x000fc800000000ff */ /*1cd0*/ FFMA R10, R13, R3, R0 ; /* 0x000000030d0a7223 */ /* 0x000fc80000000000 */ /*1ce0*/ FFMA R15, R12, R10, R3 ; /* 0x0000000a0c0f7223 */ /* 0x000fc80000000003 */ /*1cf0*/ FFMA R10, R13, R15, R0 ; /* 0x0000000f0d0a7223 */ /* 0x000fc80000000000 */ /*1d00*/ FFMA R3, R12, R10, R15 ; /* 0x0000000a0c037223 */ /* 0x000fca000000000f */ /*1d10*/ SHF.R.U32.HI R0, RZ, 0x17, R3 ; /* 0x00000017ff007819 */ /* 0x000fc80000011603 */ /*1d20*/ LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff00007812 */ /* 0x000fca00078ec0ff */ /*1d30*/ IMAD.IADD R11, R0, 0x1, R8 ; /* 0x00000001000b7824 */ /* 0x000fca00078e0208 */ /*1d40*/ IADD3 R0, R11, -0x1, RZ ; /* 0xffffffff0b007810 */ /* 0x000fc80007ffe0ff */ /*1d50*/ ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ; /* 0x000000fe0000780c */ /* 0x000fda0003f06070 */ /*1d60*/ @!P0 BRA 0x1f70 ; /* 0x0000020000008947 */ /* 0x000fea0003800000 */ /*1d70*/ ISETP.GT.AND P0, PT, R11, 0xfe, PT ; /* 0x000000fe0b00780c */ /* 0x000fda0003f04270 */ /*1d80*/ @P0 BRA 0x1f40 ; /* 0x000001b000000947 */ /* 0x000fea0003800000 */ /*1d90*/ ISETP.GE.AND P0, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fda0003f06270 */ /*1da0*/ @P0 BRA 0x1f80 ; /* 0x000001d000000947 */ /* 0x000fea0003800000 */ /*1db0*/ ISETP.GE.AND P0, PT, R11, -0x18, PT ; /* 0xffffffe80b00780c */ /* 0x000fe40003f06270 */ /*1dc0*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fd600078ec0ff */ /*1dd0*/ @!P0 BRA 0x1f80 ; /* 0x000001a000008947 */ /* 0x000fea0003800000 */ /*1de0*/ FFMA.RZ R0, R12.reuse, R10.reuse, R15.reuse ; /* 0x0000000a0c007223 */ /* 0x1c0fe2000000c00f */ /*1df0*/ IADD3 R9, R11.reuse, 0x20, RZ ; /* 0x000000200b097810 */ /* 0x040fe20007ffe0ff */ /*1e00*/ FFMA.RM R7, R12, R10.reuse, R15.reuse ; /* 0x0000000a0c077223 */ /* 0x180fe2000000400f */ /*1e10*/ ISETP.NE.AND P2, PT, R11.reuse, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x040fe40003f45270 */ /*1e20*/ LOP3.LUT R8, R0, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff00087812 */ /* 0x000fe200078ec0ff */ /*1e30*/ FFMA.RP R0, R12, R10, R15 ; /* 0x0000000a0c007223 */ /* 0x000fe2000000800f */ /*1e40*/ IMAD.MOV R10, RZ, RZ, -R11 ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e0a0b */ /*1e50*/ ISETP.NE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe40003f25270 */ /*1e60*/ LOP3.LUT R8, R8, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000008087812 */ /* 0x000fc400078efcff */ /*1e70*/ FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ; /* 0x000000070000720b */ /* 0x000fe40003f1d000 */ /*1e80*/ SHF.L.U32 R9, R8, R9, RZ ; /* 0x0000000908097219 */ /* 0x000fe400000006ff */ /*1e90*/ SEL R7, R10, RZ, P2 ; /* 0x000000ff0a077207 */ /* 0x000fe40001000000 */ /*1ea0*/ ISETP.NE.AND P1, PT, R9, RZ, P1 ; /* 0x000000ff0900720c */ /* 0x000fe40000f25270 */ /*1eb0*/ SHF.R.U32.HI R7, RZ, R7, R8 ; /* 0x00000007ff077219 */ /* 0x000fe40000011608 */ /*1ec0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */ /* 0x000fc40000703570 */ /*1ed0*/ SHF.R.U32.HI R9, RZ, 0x1, R7 ; /* 0x00000001ff097819 */ /* 0x000fe40000011607 */ /*1ee0*/ SEL R0, RZ, 0x1, !P0 ; /* 0x00000001ff007807 */ /* 0x000fc80004000000 */ /*1ef0*/ LOP3.LUT R0, R0, 0x1, R9, 0xf8, !PT ; /* 0x0000000100007812 */ /* 0x000fc800078ef809 */ /*1f00*/ LOP3.LUT R0, R0, R7, RZ, 0xc0, !PT ; /* 0x0000000700007212 */ /* 0x000fca00078ec0ff */ /*1f10*/ IMAD.IADD R0, R9, 0x1, R0 ; /* 0x0000000109007824 */ /* 0x000fca00078e0200 */ /*1f20*/ LOP3.LUT R3, R0, R3, RZ, 0xfc, !PT ; /* 0x0000000300037212 */ /* 0x000fe200078efcff */ /*1f30*/ BRA 0x1f80 ; /* 0x0000004000007947 */ /* 0x000fea0003800000 */ /*1f40*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000003037812 */ /* 0x000fc800078ec0ff */ /*1f50*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*1f60*/ BRA 0x1f80 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*1f70*/ IMAD R3, R8, 0x800000, R3 ; /* 0x0080000008037824 */ /* 0x000fe400078e0203 */ /*1f80*/ BSYNC B3 ; /* 0x0000000000037941 */ /* 0x000fea0003800000 */ /*1f90*/ BRA 0x2020 ; /* 0x0000008000007947 */ /* 0x000fea0003800000 */ /*1fa0*/ LOP3.LUT R3, R9, 0x80000000, R10, 0x48, !PT ; /* 0x8000000009037812 */ /* 0x000fc800078e480a */ /*1fb0*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000003037812 */ /* 0x000fe200078efcff */ /*1fc0*/ BRA 0x2020 ; /* 0x0000005000007947 */ /* 0x000fea0003800000 */ /*1fd0*/ LOP3.LUT R3, R9, 0x80000000, R10, 0x48, !PT ; /* 0x8000000009037812 */ /* 0x000fe200078e480a */ /*1fe0*/ BRA 0x2020 ; /* 0x0000003000007947 */ /* 0x000fea0003800000 */ /*1ff0*/ MUFU.RSQ R3, -QNAN ; /* 0xffc0000000037908 */ /* 0x000e220000001400 */ /*2000*/ BRA 0x2020 ; /* 0x0000001000007947 */ /* 0x000fea0003800000 */ /*2010*/ FADD.FTZ R3, R0, R3 ; /* 0x0000000300037221 */ /* 0x000fe40000010000 */ /*2020*/ BSYNC B2 ; /* 0x0000000000027941 */ /* 0x000fea0003800000 */ /*2030*/ IMAD.MOV.U32 R0, RZ, RZ, R3 ; /* 0x000000ffff007224 */ /* 0x001fe400078e0003 */ /*2040*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */ /* 0x000fc800078e00ff */ /*2050*/ RET.REL.NODEC R2 0x0 ; /* 0xffffdfa002007950 */ /* 0x000fea0003c3ffff */ /*2060*/ BRA 0x2060; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*2070*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2080*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*2090*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*20a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*20b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*20c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*20d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*20e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*20f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include<cstdio> #define S 64 #define ZERO 0 #define PI 3.14159265 #define LOW 9 #define HIGH 18 #define QUEUE_SIZE 128 #define KERNEL_RADIUS 8 extern "C" { __device__ bool btwn(int a, int x, int y){ return (a>=x && a<y); } __device__ void load_to_shared(int* src, int cache[][S], int th_x, int th_y, int n, int m){ int val, pos, ind_x, ind_y; if(threadIdx.x==0 && threadIdx.y==0){ ind_x = th_x-1; ind_y = th_y-1; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y][threadIdx.x] = val; } if(threadIdx.x==0 && threadIdx.y==31){ ind_x = th_x-1; ind_y = th_y+1; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+2][threadIdx.x] = val; } if(threadIdx.x==31 && threadIdx.y==0){ ind_x = th_x+1; ind_y = th_y-1; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y][threadIdx.x+2] = val; } if(threadIdx.x==31 && threadIdx.y==31){ ind_x = th_x+1; ind_y = th_y-1; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+2][threadIdx.x+2] = val; } if(threadIdx.y==0){ ind_x = th_x; ind_y = th_y-1; val=ZERO; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y][threadIdx.x+1] = val; } if(threadIdx.y==31){ ind_x = th_x; ind_y = th_y+1; val=ZERO; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+2][threadIdx.x+1] = val; } if(threadIdx.x==0){ ind_x = th_x-1; ind_y = th_y; val=ZERO; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+1][threadIdx.x] = val; } if(threadIdx.x==31){ ind_x = th_x+1; ind_y = th_y; val=ZERO; if(btwn(ind_x, 0, m) && btwn(ind_y, 0, n)){ pos = ind_y*m + ind_x; val = src[pos]; } cache[threadIdx.y+1][threadIdx.x+2] = val; } } __global__ void sobel(int* src, int* dstMagni, float * arcTangensOut){ __shared__ int cache[34][S]; int m = gridDim.x*32, n = gridDim.y*32, th_x = blockIdx.x * 32 + threadIdx.x, th_y = blockIdx.y * 32 + threadIdx.y, i_src = th_y*m + th_x, ind_x, ind_y, magn_x, magn_y, magnAbs_x, magnAbs_y; /*now we load to shared with a frame of thickness eq 1*/ cache[threadIdx.y+1][threadIdx.x+1] = src[i_src]; load_to_shared(src, cache, th_x, th_y, n, m); ind_y = threadIdx.y+1; ind_x = threadIdx.x+1; __syncthreads(); magn_x = cache[ind_y][ind_x-1] - cache[ind_y][ind_x+1]; magnAbs_x = ((magn_x>0) ? magn_x : -magn_x); magn_y = cache[ind_y+1][ind_x] - cache[ind_y-1][ind_x]; magnAbs_y = ((magn_y>0) ? magn_y : -magn_y); dstMagni[i_src] = magnAbs_x + magnAbs_y; arcTangensOut[i_src] = atan2((float) magn_y,(float) magn_x) * 180 / PI; } __global__ void nonMaximalSupression(int * magn, float * arcTangens, int * dest) { __shared__ int cacheMagn[34][S]; int m = gridDim.x*32, n = gridDim.y*32, th_x = blockIdx.x * 32 + threadIdx.x, th_y = blockIdx.y * 32 + threadIdx.y, i_src = th_y*m + th_x, ind_x, ind_y; float angle; cacheMagn[threadIdx.y+1][threadIdx.x+1] = magn[i_src]; load_to_shared(magn, cacheMagn, th_x, th_y, n, m); ind_y = threadIdx.y+1; ind_x = threadIdx.x+1; __syncthreads(); angle = arcTangens[i_src]; if (angle < 0) angle = 360 + angle; //north && south int centerCell = cacheMagn[ind_y][ind_x]; dest[i_src] = centerCell; if ((337.5 <= angle || angle < 22.5) || (157.25 <= angle && angle < 202.5)) { if (cacheMagn[ind_y][ind_x+1] > centerCell || cacheMagn[ind_y][ind_x-1] > centerCell) dest[i_src] = 0; } // north-east && south-west else if ((22.5 <= angle && angle < 67.5) || (202.5 <= angle && angle < 247.5)) { if (cacheMagn[ind_y-1][ind_x+1] > centerCell || cacheMagn[ind_y+1][ind_x-1] > centerCell) dest[i_src] = 0; } // west && east else if ((67.5 <= angle && angle < 112.5) || (247.5 <= angle && angle < 292.5)) { if (cacheMagn[ind_y+1][ind_x] > centerCell || cacheMagn[ind_y-1][ind_x] > centerCell) dest[i_src] = 0; } // west-north && east-south else if ((112.5 <= angle && angle < 157.5) || (292.5 <= angle || angle < 337.5)) { if (cacheMagn[ind_y-1][ind_x-1] > centerCell || cacheMagn[ind_y+1][ind_x+1] > centerCell) dest[i_src] = 0; } } __global__ void prepareBfs(int* src){ int m = gridDim.x*32; int th_x = blockIdx.x * 32 + threadIdx.x; int th_y = blockIdx.y * 32 + threadIdx.y; int i_src = th_y*m + th_x; int val = src[i_src]; if(val < LOW){ src[i_src] = 0; } else if(val >= HIGH){ src[i_src] = -2; } else{ src[i_src] = -1; } } __global__ void oneBfs(int* src, int* dst, int* changed){ __shared__ int cache[34][S]; int m = gridDim.x*32, n = gridDim.y*32, th_x = blockIdx.x * 32 + threadIdx.x, th_y = blockIdx.y * 32 + threadIdx.y, i_src = th_y*m + th_x, ind_y = threadIdx.y+1, ind_x = threadIdx.x+1, queue[QUEUE_SIZE], beg=0, end=0, val, procInd_x, procInd_y, x_new, y_new; cache[threadIdx.y+1][threadIdx.x+1] = src[i_src]; val = cache[ind_y][ind_x]; load_to_shared(src, cache, th_x, th_y, n, m); __syncthreads(); if(val==-1){ for(int i=-1; i<2; ++i){ for(int j=-1; j<2; ++j){ procInd_x = ind_x+i; procInd_y = ind_y+j; if(cache[procInd_y][procInd_x]==-2){ queue[end++] = ind_y; queue[end++] = ind_x; cache[ind_y][ind_x]=-2; *changed=1; i=2; j=2; } } } } while(beg!=end){ procInd_y = queue[beg++]; procInd_x = queue[beg++]; for(int i=-1; i<2; ++i){ for(int j=-1; j<2; ++j){ x_new = procInd_x+i; y_new = procInd_y+j; if(cache[y_new][x_new]==-1 && btwn(y_new, 1, 33) && btwn(x_new, 1, 33)){ queue[end++] = y_new; queue[end++] = x_new; cache[y_new][x_new]=-2; } } } } __syncthreads(); dst[i_src] = cache[ind_y][ind_x]; } __global__ void final_battle(int* src){ int m = gridDim.x*32; int th_x = blockIdx.x * 32 + threadIdx.x; int th_y = blockIdx.y * 32 + threadIdx.y; int i_src = th_y*m + th_x; int val = src[i_src]; if(val==-2){ src[i_src] = 255; } else{ src[i_src] = 0; } } __global__ void gaussianFilter(int * src, int * dest) { __shared__ int cache[34][S]; int n = gridDim.y*32; int m = gridDim.x*32; int th_x = blockIdx.x * 32 + threadIdx.x; int th_y = blockIdx.y * 32 + threadIdx.y; int i_src = th_y*m + th_x; int ind_y, ind_x; cache[threadIdx.y+1][threadIdx.x+1] = src[i_src]; load_to_shared(src, cache, th_x, th_y, n, m); ind_y = threadIdx.y+1+KERNEL_RADIUS; ind_x = threadIdx.x+1+KERNEL_RADIUS; __syncthreads(); int sum = 0; for (int i = -KERNEL_RADIUS; i <= KERNEL_RADIUS; i++) { for (int j = -KERNEL_RADIUS; j <= KERNEL_RADIUS; j++) { sum += cache[ind_y+i][ind_x+j]; //d_kernel[KERNEL_RADIUS + j] } } dest[i_src] = (int) sum; } }
.text .file "cudaStaff.hip" .globl __device_stub__sobel # -- Begin function __device_stub__sobel .type __device_stub__sobel,@function __device_stub__sobel: # @__device_stub__sobel .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $sobel, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size __device_stub__sobel, .Lfunc_end0-__device_stub__sobel .cfi_endproc # -- End function .globl __device_stub__nonMaximalSupression # -- Begin function __device_stub__nonMaximalSupression .type __device_stub__nonMaximalSupression,@function __device_stub__nonMaximalSupression: # @__device_stub__nonMaximalSupression .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $nonMaximalSupression, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size __device_stub__nonMaximalSupression, .Lfunc_end1-__device_stub__nonMaximalSupression .cfi_endproc # -- End function .globl __device_stub__prepareBfs # -- Begin function __device_stub__prepareBfs .type __device_stub__prepareBfs,@function __device_stub__prepareBfs: # @__device_stub__prepareBfs .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $prepareBfs, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size __device_stub__prepareBfs, .Lfunc_end2-__device_stub__prepareBfs .cfi_endproc # -- End function .globl __device_stub__oneBfs # -- Begin function __device_stub__oneBfs .type __device_stub__oneBfs,@function __device_stub__oneBfs: # @__device_stub__oneBfs .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $oneBfs, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size __device_stub__oneBfs, .Lfunc_end3-__device_stub__oneBfs .cfi_endproc # -- End function .globl __device_stub__final_battle # -- Begin function __device_stub__final_battle .type __device_stub__final_battle,@function __device_stub__final_battle: # @__device_stub__final_battle .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $64, %rsp .cfi_def_cfa_offset 112 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) movq %rsp, %rbx movq %rax, (%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $final_battle, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $80, %rsp .cfi_adjust_cfa_offset -80 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size __device_stub__final_battle, .Lfunc_end4-__device_stub__final_battle .cfi_endproc # -- End function .globl __device_stub__gaussianFilter # -- Begin function __device_stub__gaussianFilter .type __device_stub__gaussianFilter,@function __device_stub__gaussianFilter: # @__device_stub__gaussianFilter .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $gaussianFilter, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end5: .size __device_stub__gaussianFilter, .Lfunc_end5-__device_stub__gaussianFilter .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB6_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB6_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $sobel, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $nonMaximalSupression, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $prepareBfs, %esi movl $.L__unnamed_3, %edx movl $.L__unnamed_3, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $oneBfs, %esi movl $.L__unnamed_4, %edx movl $.L__unnamed_4, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $final_battle, %esi movl $.L__unnamed_5, %edx movl $.L__unnamed_5, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $gaussianFilter, %esi movl $.L__unnamed_6, %edx movl $.L__unnamed_6, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end6: .size __hip_module_ctor, .Lfunc_end6-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB7_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB7_2: retq .Lfunc_end7: .size __hip_module_dtor, .Lfunc_end7-__hip_module_dtor .cfi_endproc # -- End function .type sobel,@object # @sobel .section .rodata,"a",@progbits .globl sobel .p2align 3, 0x0 sobel: .quad __device_stub__sobel .size sobel, 8 .type nonMaximalSupression,@object # @nonMaximalSupression .globl nonMaximalSupression .p2align 3, 0x0 nonMaximalSupression: .quad __device_stub__nonMaximalSupression .size nonMaximalSupression, 8 .type prepareBfs,@object # @prepareBfs .globl prepareBfs .p2align 3, 0x0 prepareBfs: .quad __device_stub__prepareBfs .size prepareBfs, 8 .type oneBfs,@object # @oneBfs .globl oneBfs .p2align 3, 0x0 oneBfs: .quad __device_stub__oneBfs .size oneBfs, 8 .type final_battle,@object # @final_battle .globl final_battle .p2align 3, 0x0 final_battle: .quad __device_stub__final_battle .size final_battle, 8 .type gaussianFilter,@object # @gaussianFilter .globl gaussianFilter .p2align 3, 0x0 gaussianFilter: .quad __device_stub__gaussianFilter .size gaussianFilter, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "sobel" .size .L__unnamed_1, 6 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "nonMaximalSupression" .size .L__unnamed_2, 21 .type .L__unnamed_3,@object # @2 .L__unnamed_3: .asciz "prepareBfs" .size .L__unnamed_3, 11 .type .L__unnamed_4,@object # @3 .L__unnamed_4: .asciz "oneBfs" .size .L__unnamed_4, 7 .type .L__unnamed_5,@object # @4 .L__unnamed_5: .asciz "final_battle" .size .L__unnamed_5, 13 .type .L__unnamed_6,@object # @5 .L__unnamed_6: .asciz "gaussianFilter" .size .L__unnamed_6, 15 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __device_stub__sobel .addrsig_sym __device_stub__nonMaximalSupression .addrsig_sym __device_stub__prepareBfs .addrsig_sym __device_stub__oneBfs .addrsig_sym __device_stub__final_battle .addrsig_sym __device_stub__gaussianFilter .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym sobel .addrsig_sym nonMaximalSupression .addrsig_sym prepareBfs .addrsig_sym oneBfs .addrsig_sym final_battle .addrsig_sym gaussianFilter .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .p2align 2 ; -- Begin function load_to_shared .type load_to_shared,@function load_to_shared: ; @load_to_shared ; %bb.0: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) v_and_b32_e32 v13, 0x3ff, v31 v_bfe_u32 v12, v31, 10, 10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_eq_u32_e32 vcc_lo, 0, v13 v_or_b32_e32 v8, v13, v12 v_cmp_eq_u32_e64 s1, 0, v12 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_eq_u32_e64 s0, 0, v8 ; implicit-def: $vgpr8 s_and_saveexec_b32 s3, s0 s_cbranch_execz .LBB0_6 ; %bb.1: v_cmp_lt_i32_e64 s0, 0, v4 v_cmp_le_i32_e64 s2, v4, v7 ; implicit-def: $vgpr8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s2 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB0_5 ; %bb.2: v_cmp_lt_i32_e64 s0, 0, v5 v_cmp_le_i32_e64 s2, v5, v6 ; implicit-def: $vgpr8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s2 s_and_saveexec_b32 s2, s0 s_cbranch_execz .LBB0_4 ; %bb.3: v_add_nc_u32_e32 v8, -1, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v8, v8, v7 v_add3_u32 v8, v4, v8, -1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v9, 31, v8 v_lshlrev_b64 v[8:9], 2, v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v8, s0, v0, v8 v_add_co_ci_u32_e64 v9, s0, v1, v9, s0 flat_load_b32 v8, v[8:9] .LBB0_4: ; %Flow133 s_or_b32 exec_lo, exec_lo, s2 .LBB0_5: s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 s_waitcnt vmcnt(0) lgkmcnt(0) flat_store_b32 v[2:3], v8 .LBB0_6: ; %Flow134 s_or_b32 exec_lo, exec_lo, s3 v_cmp_eq_u32_e64 s0, 31, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, vcc_lo, s0 s_and_saveexec_b32 s3, s0 s_cbranch_execz .LBB0_12 ; %bb.7: v_cmp_lt_i32_e64 s0, 0, v4 v_cmp_le_i32_e64 s2, v4, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, s0, s2 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB0_11 ; %bb.8: v_add_nc_u32_e32 v9, 1, v5 v_cmp_lt_i32_e64 s0, -2, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_i32_e64 s2, v9, v6 s_and_b32 s0, s0, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_saveexec_b32 s2, s0 s_cbranch_execz .LBB0_10 ; %bb.9: v_mul_lo_u32 v8, v9, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v8, v4, v8, -1 v_ashrrev_i32_e32 v9, 31, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], 2, v[8:9] v_add_co_u32 v8, s0, v0, v8 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v9, s0, v1, v9, s0 flat_load_b32 v8, v[8:9] .LBB0_10: ; %Flow131 s_or_b32 exec_lo, exec_lo, s2 .LBB0_11: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s4 v_add_co_u32 v9, s0, 0x2000, v2 v_add_co_ci_u32_e64 v10, s0, 0, v3, s0 s_waitcnt vmcnt(0) lgkmcnt(0) flat_store_b32 v[9:10], v8 offset:256 .LBB0_12: ; %Flow132 s_or_b32 exec_lo, exec_lo, s3 v_cmp_eq_u32_e64 s0, 31, v13 v_add_nc_u32_e32 v14, 1, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, s0, s1 s_and_saveexec_b32 s3, s1 s_cbranch_execz .LBB0_18 ; %bb.13: v_cmp_lt_i32_e64 s1, -2, v4 v_cmp_lt_i32_e64 s2, v14, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, s1, s2 s_and_saveexec_b32 s4, s1 s_cbranch_execz .LBB0_17 ; %bb.14: v_cmp_lt_i32_e64 s1, 0, v5 v_cmp_le_i32_e64 s2, v5, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, s1, s2 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB0_16 ; %bb.15: v_add_nc_u32_e32 v8, -1, v5 v_ashrrev_i32_e32 v9, 31, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v8, v8, v7 v_ashrrev_i32_e32 v10, 31, v8 v_add_co_u32 v8, s1, v8, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_ci_u32_e64 v9, s1, v10, v9, s1 v_lshlrev_b64 v[8:9], 2, v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v8, s1, v0, v8 v_add_co_ci_u32_e64 v9, s1, v1, v9, s1 flat_load_b32 v8, v[8:9] offset:4 .LBB0_16: ; %Flow129 s_or_b32 exec_lo, exec_lo, s2 .LBB0_17: s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s4 s_waitcnt vmcnt(0) lgkmcnt(0) flat_store_b32 v[2:3], v8 offset:132 .LBB0_18: ; %Flow130 s_or_b32 exec_lo, exec_lo, s3 v_cmp_eq_u32_e64 s1, 31, v12 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, s0, s1 s_and_saveexec_b32 s3, s1 s_cbranch_execz .LBB0_24 ; %bb.19: v_cmp_lt_i32_e64 s1, -2, v4 v_cmp_lt_i32_e64 s2, v14, v7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, s1, s2 s_and_saveexec_b32 s4, s1 s_cbranch_execz .LBB0_23 ; %bb.20: v_cmp_lt_i32_e64 s1, 0, v5 v_cmp_le_i32_e64 s2, v5, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, s1, s2 s_and_saveexec_b32 s2, s1 s_cbranch_execz .LBB0_22 ; %bb.21: v_add_nc_u32_e32 v8, -1, v5 v_ashrrev_i32_e32 v9, 31, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_lo_u32 v8, v8, v7 v_ashrrev_i32_e32 v10, 31, v8 v_add_co_u32 v8, s1, v8, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_ci_u32_e64 v9, s1, v10, v9, s1 v_lshlrev_b64 v[8:9], 2, v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v8, s1, v0, v8 v_add_co_ci_u32_e64 v9, s1, v1, v9, s1 flat_load_b32 v8, v[8:9] offset:4 .LBB0_22: ; %Flow127 s_or_b32 exec_lo, exec_lo, s2 .LBB0_23: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s4 v_add_co_u32 v9, s1, 0x2000, v2 v_add_co_ci_u32_e64 v10, s1, 0, v3, s1 v_mov_b32_e32 v12, 31 s_waitcnt vmcnt(0) lgkmcnt(0) flat_store_b32 v[9:10], v8 offset:388 .LBB0_24: ; %Flow128 s_or_b32 exec_lo, exec_lo, s3 s_mov_b32 s7, 0 s_mov_b32 s6, 0 s_mov_b32 s8, exec_lo ; implicit-def: $sgpr9 ; implicit-def: $sgpr4_sgpr5 ; implicit-def: $sgpr2_sgpr3 ; implicit-def: $vgpr15 v_cmpx_lt_i32_e32 30, v12 s_xor_b32 s8, exec_lo, s8 s_cbranch_execz .LBB0_30 ; %bb.25: ; %LeafBlock113 s_mov_b32 s10, 0 s_mov_b32 s6, exec_lo ; implicit-def: $sgpr9 ; implicit-def: $sgpr4_sgpr5 ; implicit-def: $sgpr2_sgpr3 ; implicit-def: $vgpr15 v_cmpx_eq_u32_e32 31, v12 s_cbranch_execz .LBB0_29 ; %bb.26: v_cmp_lt_i32_e64 s1, -1, v4 v_cmp_lt_i32_e64 s2, v4, v7 s_mov_b32 s7, -1 s_mov_b32 s9, 0 ; implicit-def: $vgpr15 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_and_b32 s4, s1, s2 s_mov_b32 s1, 0 ; implicit-def: $sgpr2_sgpr3 s_and_saveexec_b32 s5, s4 s_xor_b32 s4, exec_lo, s5 ; %bb.27: v_add_nc_u32_e32 v15, 1, v5 v_cmp_lt_i32_e64 s1, -2, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cmp_lt_i32_e64 s2, v15, v6 s_and_b32 s1, s1, s2 s_mov_b64 s[2:3], 33 s_xor_b32 s5, s1, -1 s_and_b32 s1, s1, exec_lo s_or_not1_b32 s7, s5, exec_lo ; %bb.28: ; %Flow121 s_or_b32 exec_lo, exec_lo, s4 s_mov_b64 s[4:5], 33 s_and_b32 s10, s7, exec_lo s_and_b32 s7, s1, exec_lo .LBB0_29: ; %Flow120 s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 s6, s10, exec_lo s_and_b32 s7, s7, exec_lo .LBB0_30: ; %Flow119 s_or_saveexec_b32 s8, s8 v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v9, s5 v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v11, s3 v_mov_b32_e32 v10, s2 s_xor_b32 exec_lo, exec_lo, s8 s_cbranch_execz .LBB0_38 ; %bb.31: ; %LeafBlock s_mov_b32 s10, s7 s_mov_b32 s12, s6 s_mov_b32 s9, exec_lo ; implicit-def: $sgpr11 ; implicit-def: $sgpr4_sgpr5 ; implicit-def: $sgpr2_sgpr3 ; implicit-def: $vgpr15 v_cmpx_eq_u32_e32 0, v12 s_cbranch_execz .LBB0_37 ; %bb.32: v_cmp_lt_i32_e64 s1, -1, v4 v_cmp_lt_i32_e64 s2, v4, v7 s_mov_b32 s10, -1 ; implicit-def: $vgpr15 s_delay_alu instid0(VALU_DEP_1) s_and_b32 s5, s1, s2 s_mov_b32 s1, s7 ; implicit-def: $sgpr2_sgpr3 s_and_saveexec_b32 s4, s5 s_cbranch_execz .LBB0_36 ; %bb.33: v_cmp_lt_i32_e64 s1, 0, v5 v_cmp_le_i32_e64 s2, v5, v6 s_mov_b32 s5, s7 ; implicit-def: $vgpr15 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s11, s1, s2 ; implicit-def: $sgpr2_sgpr3 s_xor_b32 s1, s11, -1 s_and_saveexec_b32 s10, s11 ; %bb.34: v_add_nc_u32_e32 v15, -1, v5 s_mov_b64 s[2:3], 0 s_or_b32 s5, s7, exec_lo ; %bb.35: ; %Flow125 s_or_b32 exec_lo, exec_lo, s10 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s11, s7, exec_lo s_and_b32 s5, s5, exec_lo s_or_not1_b32 s10, s1, exec_lo s_or_b32 s1, s11, s5 .LBB0_36: ; %Flow124 s_or_b32 exec_lo, exec_lo, s4 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s12, s6, exec_lo s_and_b32 s10, s10, exec_lo s_and_not1_b32 s13, s7, exec_lo s_and_b32 s1, s1, exec_lo s_mov_b64 s[4:5], 0 s_mov_b32 s11, 0 s_or_b32 s12, s12, s10 s_or_b32 s10, s13, s1 .LBB0_37: ; %Flow123 s_or_b32 exec_lo, exec_lo, s9 v_dual_mov_b32 v16, s11 :: v_dual_mov_b32 v9, s5 v_dual_mov_b32 v8, s4 :: v_dual_mov_b32 v11, s3 v_mov_b32_e32 v10, s2 s_and_not1_b32 s1, s6, exec_lo s_and_b32 s2, s12, exec_lo s_and_not1_b32 s3, s7, exec_lo s_and_b32 s4, s10, exec_lo s_or_b32 s6, s1, s2 s_or_b32 s7, s3, s4 .LBB0_38: ; %Flow122 s_or_b32 exec_lo, exec_lo, s8 s_and_saveexec_b32 s2, s7 s_cbranch_execz .LBB0_40 ; %bb.39: ; %.sink.split.sink.split v_mad_u64_u32 v[8:9], null, v15, v7, v[4:5] s_or_b32 s6, s6, exec_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v9, 31, v8 v_lshlrev_b64 v[8:9], 2, v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add_co_u32 v8, s1, v0, v8 v_add_co_ci_u32_e64 v9, s1, v1, v9, s1 flat_load_b32 v16, v[8:9] v_dual_mov_b32 v8, v10 :: v_dual_mov_b32 v9, v11 .LBB0_40: ; %Flow126 s_or_b32 exec_lo, exec_lo, s2 s_and_saveexec_b32 s2, s6 s_cbranch_execz .LBB0_42 ; %bb.41: ; %.sink.split s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[8:9], 8, v[8:9] v_lshlrev_b32_e32 v10, 2, v13 v_add_co_u32 v8, s1, v2, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_ci_u32_e64 v9, s1, v3, v9, s1 v_add_co_u32 v8, s1, v8, v10 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v9, s1, 0, v9, s1 s_waitcnt vmcnt(0) lgkmcnt(0) flat_store_b32 v[8:9], v16 offset:4 .LBB0_42: s_or_b32 exec_lo, exec_lo, s2 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB0_48 ; %bb.43: v_cmp_lt_i32_e32 vcc_lo, 0, v4 v_cmp_le_i32_e64 s1, v4, v7 v_mov_b32_e32 v8, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s1, vcc_lo, s1 s_and_saveexec_b32 s3, s1 s_cbranch_execz .LBB0_47 ; %bb.44: v_cmp_lt_i32_e32 vcc_lo, -1, v5 v_cmp_lt_i32_e64 s1, v5, v6 v_mov_b32_e32 v8, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s4, vcc_lo, s1 s_and_saveexec_b32 s1, s4 s_cbranch_execz .LBB0_46 ; %bb.45: v_mul_lo_u32 v8, v7, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_add3_u32 v8, v4, v8, -1 v_ashrrev_i32_e32 v9, 31, v8 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[8:9], 2, v[8:9] v_add_co_u32 v8, vcc_lo, v0, v8 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v9, vcc_lo, v1, v9, vcc_lo flat_load_b32 v8, v[8:9] .LBB0_46: ; %Flow116 s_or_b32 exec_lo, exec_lo, s1 .LBB0_47: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s3 v_lshlrev_b32_e32 v9, 8, v12 v_add_co_u32 v9, vcc_lo, v2, v9 v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo s_waitcnt vmcnt(0) lgkmcnt(0) flat_store_b32 v[9:10], v8 offset:256 .LBB0_48: ; %Flow117 s_or_b32 exec_lo, exec_lo, s2 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_54 ; %bb.49: v_cmp_lt_i32_e32 vcc_lo, -2, v4 v_cmp_lt_i32_e64 s0, v14, v7 v_mov_b32_e32 v8, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, vcc_lo, s0 s_and_saveexec_b32 s2, s0 s_cbranch_execz .LBB0_53 ; %bb.50: v_cmp_lt_i32_e32 vcc_lo, -1, v5 v_cmp_lt_i32_e64 s0, v5, v6 v_mov_b32_e32 v8, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s3, vcc_lo, s0 s_and_saveexec_b32 s0, s3 s_cbranch_execz .LBB0_52 ; %bb.51: v_mul_lo_u32 v5, v7, v5 v_ashrrev_i32_e32 v6, 31, v4 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_ashrrev_i32_e32 v7, 31, v5 v_add_co_u32 v4, vcc_lo, v5, v4 v_add_co_ci_u32_e32 v5, vcc_lo, v7, v6, vcc_lo s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[4:5], 2, v[4:5] v_add_co_u32 v0, vcc_lo, v0, v4 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, v1, v5, vcc_lo flat_load_b32 v8, v[0:1] offset:4 .LBB0_52: ; %Flow s_or_b32 exec_lo, exec_lo, s0 .LBB0_53: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) s_or_b32 exec_lo, exec_lo, s2 v_lshlrev_b32_e32 v0, 8, v12 v_add_co_u32 v0, vcc_lo, v2, v0 v_add_co_ci_u32_e32 v1, vcc_lo, 0, v3, vcc_lo s_waitcnt vmcnt(0) lgkmcnt(0) flat_store_b32 v[0:1], v8 offset:388 .LBB0_54: ; %Flow115 s_or_b32 exec_lo, exec_lo, s1 s_waitcnt vmcnt(0) lgkmcnt(0) s_setpc_b64 s[30:31] .Lfunc_end0: .size load_to_shared, .Lfunc_end0-load_to_shared ; -- End function .section .AMDGPU.csdata,"",@progbits ; Function info: ; codeLenInByte = 1788 ; NumSgprs: 34 ; NumVgprs: 32 ; ScratchSize: 0 ; MemoryBound: 0 .text .protected sobel ; -- Begin function sobel .globl sobel .p2align 8 .type sobel,@function sobel: ; @sobel ; %bb.0: s_load_b256 s[16:23], s[0:1], 0x0 v_and_b32_e32 v3, 0x3ff, v0 v_bfe_u32 v6, v0, 10, 10 s_mov_b64 s[0:1], src_shared_base v_mov_b32_e32 v31, v0 s_mov_b32 s32, 0 v_lshl_add_u32 v4, s14, 5, v3 v_lshl_add_u32 v5, s15, 5, v6 s_waitcnt lgkmcnt(0) v_mov_b32_e32 v0, s16 s_lshl_b32 s4, s22, 5 s_getpc_b64 s[2:3] s_add_u32 s2, s2, load_to_shared@rel32@lo+4 s_addc_u32 s3, s3, load_to_shared@rel32@hi+12 v_mad_u64_u32 v[1:2], null, s4, v5, v[4:5] s_lshl_b32 s0, s23, 5 v_mov_b32_e32 v7, s4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[17:18], 2, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, s16, v17 v_add_co_ci_u32_e32 v2, vcc_lo, s17, v18, vcc_lo global_load_b32 v1, v[1:2], off v_dual_mov_b32 v3, s1 :: v_dual_lshlrev_b32 v2, 2, v3 s_delay_alu instid0(VALU_DEP_1) v_lshl_add_u32 v19, v6, 8, v2 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v6, s0 s_waitcnt vmcnt(0) ds_store_b32 v19, v1 offset:260 v_mov_b32_e32 v1, s17 s_swappc_b64 s[30:31], s[2:3] s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv ds_load_2addr_b32 v[0:1], v19 offset0:1 offset1:64 ds_load_2addr_b32 v[2:3], v19 offset0:66 offset1:129 s_mov_b32 s0, 0x3b2d2a58 s_waitcnt lgkmcnt(0) v_sub_nc_u32_e32 v10, v3, v0 v_sub_nc_u32_e32 v11, v1, v2 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_cvt_f32_i32_e32 v1, v10 v_cvt_f32_i32_e32 v2, v11 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_max_f32_e64 v4, |v2|, |v1| v_min_f32_e64 v6, |v2|, |v1| v_cmp_gt_f32_e64 vcc_lo, |v1|, |v2| v_frexp_mant_f32_e32 v5, v4 v_frexp_exp_i32_f32_e32 v4, v4 s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4) v_frexp_exp_i32_f32_e32 v7, v6 v_frexp_mant_f32_e32 v6, v6 v_rcp_f32_e32 v5, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_sub_nc_u32_e32 v4, v7, v4 s_waitcnt_depctr 0xfff v_mul_f32_e32 v5, v6, v5 v_ldexp_f32 v4, v5, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v5, v4, v4 v_fmaak_f32 v6, s0, v5, 0xbc7a590c s_mov_b32 s0, 0x53c8d4f1 s_mov_b32 s1, 0x400921fb s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v6, v5, v6, 0x3d29fb3f v_fmaak_f32 v6, v5, v6, 0xbd97d4d7 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v6, v5, v6, 0x3dd931b2 v_fmaak_f32 v6, v5, v6, 0xbe1160e6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fmaak_f32 v6, v5, v6, 0x3e4cb8bf v_fmaak_f32 v6, v5, v6, 0xbeaaaa62 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v5, v5, v6 v_fmac_f32_e32 v4, v4, v5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v5, 0x3fc90fdb, v4 v_cndmask_b32_e32 v2, v4, v5, vcc_lo v_cmp_gt_i32_e32 vcc_lo, 0, v11 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_sub_f32_e32 v4, 0x40490fdb, v2 v_cndmask_b32_e32 v2, v2, v4, vcc_lo v_cndmask_b32_e64 v4, 0, 0x40490fdb, vcc_lo v_cmp_eq_u32_e32 vcc_lo, v3, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v0, v2, v4, vcc_lo v_bfi_b32 v0, 0x7fffffff, v0, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mul_f32_e32 v0, 0x43340000, v0 v_cvt_f64_f32_e32 v[0:1], v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_scale_f64 v[2:3], null, s[0:1], s[0:1], v[0:1] v_rcp_f64_e32 v[4:5], v[2:3] s_waitcnt_depctr 0xfff v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5] v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5] v_div_scale_f64 v[6:7], vcc_lo, v[0:1], s[0:1], v[0:1] v_mul_f64 v[8:9], v[6:7], v[4:5] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7] v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_div_fixup_f64 v[0:1], v[2:3], s[0:1], v[0:1] v_cvt_f32_f64_e32 v4, v[0:1] v_sub_nc_u32_e32 v0, 0, v11 v_sub_nc_u32_e32 v1, 0, v10 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_max_i32_e32 v0, v11, v0 v_max_i32_e32 v1, v10, v1 s_delay_alu instid0(VALU_DEP_1) v_add_nc_u32_e32 v5, v1, v0 v_add_co_u32 v0, vcc_lo, s18, v17 v_add_co_ci_u32_e32 v1, vcc_lo, s19, v18, vcc_lo v_add_co_u32 v2, vcc_lo, s20, v17 v_add_co_ci_u32_e32 v3, vcc_lo, s21, v18, vcc_lo global_store_b32 v[0:1], v5, off global_store_b32 v[2:3], v4, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel sobel .amdhsa_group_segment_fixed_size 8704 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 32 .amdhsa_next_free_sgpr 33 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size sobel, .Lfunc_end1-sobel ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 712 ; NumSgprs: 35 ; NumVgprs: 32 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 8704 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 3 ; NumSGPRsForWavesPerEU: 35 ; NumVGPRsForWavesPerEU: 32 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected nonMaximalSupression ; -- Begin function nonMaximalSupression .globl nonMaximalSupression .p2align 8 .type nonMaximalSupression,@function nonMaximalSupression: ; @nonMaximalSupression ; %bb.0: s_load_b256 s[16:23], s[0:1], 0x0 v_and_b32_e32 v3, 0x3ff, v0 v_bfe_u32 v6, v0, 10, 10 s_mov_b64 s[0:1], src_shared_base v_mov_b32_e32 v31, v0 s_mov_b32 s32, 0 v_lshl_add_u32 v4, s14, 5, v3 v_lshl_add_u32 v5, s15, 5, v6 s_waitcnt lgkmcnt(0) v_mov_b32_e32 v0, s16 s_lshl_b32 s4, s22, 5 s_getpc_b64 s[2:3] s_add_u32 s2, s2, load_to_shared@rel32@lo+4 s_addc_u32 s3, s3, load_to_shared@rel32@hi+12 v_mad_u64_u32 v[1:2], null, s4, v5, v[4:5] s_lshl_b32 s0, s23, 5 v_mov_b32_e32 v7, s4 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[18:19], 2, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, s16, v18 v_add_co_ci_u32_e32 v2, vcc_lo, s17, v19, vcc_lo global_load_b32 v1, v[1:2], off v_dual_mov_b32 v3, s1 :: v_dual_lshlrev_b32 v2, 2, v3 s_delay_alu instid0(VALU_DEP_1) v_lshl_add_u32 v17, v6, 8, v2 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v6, s0 s_waitcnt vmcnt(0) ds_store_b32 v17, v1 offset:260 v_mov_b32_e32 v1, s17 s_swappc_b64 s[30:31], s[2:3] v_add_co_u32 v0, vcc_lo, s18, v18 v_add_co_ci_u32_e32 v1, vcc_lo, s19, v19, vcc_lo s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv global_load_b32 v0, v[0:1], off ds_load_b32 v2, v17 offset:260 s_mov_b32 s2, -1 s_waitcnt vmcnt(0) v_add_f32_e32 v1, 0x43b40000, v0 v_cmp_gt_f32_e32 vcc_lo, 0, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_cndmask_b32_e32 v3, v0, v1, vcc_lo v_add_co_u32 v0, s1, s20, v18 v_add_co_ci_u32_e64 v1, s1, s21, v19, s1 s_delay_alu instid0(VALU_DEP_3) v_cmp_le_f32_e32 vcc_lo, 0x43a8c000, v3 v_cmp_gt_f32_e64 s0, 0x41b40000, v3 s_mov_b32 s1, 0 s_waitcnt lgkmcnt(0) global_store_b32 v[0:1], v2, off s_or_b32 s3, vcc_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_xor_b32 s0, s3, -1 s_and_saveexec_b32 s4, s0 s_cbranch_execz .LBB2_24 ; %bb.1: v_cmp_nle_f32_e32 vcc_lo, 0x431d4000, v3 v_cmp_ngt_f32_e64 s0, 0x434a8000, v3 s_delay_alu instid0(VALU_DEP_1) s_or_b32 s1, vcc_lo, s0 s_mov_b32 s0, 0 s_and_saveexec_b32 s5, s1 s_cbranch_execz .LBB2_23 ; %bb.2: v_cmp_le_f32_e32 vcc_lo, 0x41b40000, v3 v_cmp_gt_f32_e64 s0, 0x42870000, v3 s_mov_b32 s1, -1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_and_b32 s6, vcc_lo, s0 s_mov_b32 s0, 0 s_xor_b32 s2, s6, -1 s_and_saveexec_b32 s7, s2 s_cbranch_execz .LBB2_18 ; %bb.3: v_cmp_nle_f32_e32 vcc_lo, 0x434a8000, v3 v_cmp_ngt_f32_e64 s0, 0x43778000, v3 s_delay_alu instid0(VALU_DEP_1) s_or_b32 s2, vcc_lo, s0 s_mov_b32 s0, 0 s_and_saveexec_b32 s8, s2 s_cbranch_execz .LBB2_17 ; %bb.4: v_cmp_le_f32_e32 vcc_lo, 0x42870000, v3 v_cmp_gt_f32_e64 s0, 0x42e10000, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) s_and_b32 s9, vcc_lo, s0 s_mov_b32 s0, 0 s_xor_b32 s2, s9, -1 s_and_saveexec_b32 s10, s2 s_cbranch_execz .LBB2_12 ; %bb.5: v_cmp_nle_f32_e32 vcc_lo, 0x43778000, v3 v_cmp_ngt_f32_e64 s0, 0x43924000, v3 s_delay_alu instid0(VALU_DEP_1) s_or_b32 s2, vcc_lo, s0 s_mov_b32 s0, 0 s_and_saveexec_b32 s11, s2 s_cbranch_execz .LBB2_11 ; %bb.6: v_cmp_le_f32_e32 vcc_lo, 0x42e10000, v3 v_cmp_gt_f32_e64 s0, 0x431d8000, v3 v_cmp_le_f32_e64 s1, 0x43924000, v3 v_cmp_gt_f32_e64 s2, 0x43a8c000, v3 s_delay_alu instid0(VALU_DEP_3) s_and_b32 s0, vcc_lo, s0 s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1) s_or_b32 s0, s1, s0 s_mov_b32 s1, 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_or_b32 s2, s2, s0 s_and_saveexec_b32 s0, s2 s_cbranch_execz .LBB2_10 ; %bb.7: ds_load_b32 v3, v17 s_mov_b32 s1, -1 s_mov_b32 s2, exec_lo s_waitcnt lgkmcnt(0) v_cmpx_le_i32_e64 v3, v2 s_xor_b32 s2, exec_lo, s2 s_cbranch_execz .LBB2_9 ; %bb.8: ds_load_b32 v3, v17 offset:520 s_waitcnt lgkmcnt(0) v_cmp_gt_i32_e32 vcc_lo, v3, v2 s_or_not1_b32 s1, vcc_lo, exec_lo .LBB2_9: ; %Flow102 s_or_b32 exec_lo, exec_lo, s2 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 s1, s1, exec_lo .LBB2_10: ; %Flow101 s_or_b32 exec_lo, exec_lo, s0 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 s0, s1, exec_lo s_xor_b32 s1, exec_lo, -1 .LBB2_11: ; %Flow100 s_or_b32 exec_lo, exec_lo, s11 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s2, s9, exec_lo s_and_b32 s1, s1, exec_lo s_and_b32 s0, s0, exec_lo s_or_b32 s9, s2, s1 .LBB2_12: ; %Flow99 s_or_b32 exec_lo, exec_lo, s10 s_and_saveexec_b32 s1, s9 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s1, exec_lo, s1 s_cbranch_execz .LBB2_16 ; %bb.13: ds_load_b32 v3, v17 offset:516 s_mov_b32 s2, -1 s_mov_b32 s9, exec_lo s_waitcnt lgkmcnt(0) v_cmpx_le_i32_e64 v3, v2 s_xor_b32 s9, exec_lo, s9 s_cbranch_execz .LBB2_15 ; %bb.14: ds_load_b32 v3, v17 offset:4 s_waitcnt lgkmcnt(0) v_cmp_gt_i32_e32 vcc_lo, v3, v2 s_or_not1_b32 s2, vcc_lo, exec_lo .LBB2_15: ; %Flow104 s_or_b32 exec_lo, exec_lo, s9 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) s_and_not1_b32 s0, s0, exec_lo s_and_b32 s2, s2, exec_lo s_or_b32 s0, s0, s2 .LBB2_16: ; %Flow103 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 s0, s0, exec_lo s_xor_b32 s1, exec_lo, -1 .LBB2_17: ; %Flow98 s_or_b32 exec_lo, exec_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s2, s6, exec_lo s_and_b32 s1, s1, exec_lo s_and_b32 s0, s0, exec_lo s_or_b32 s6, s2, s1 .LBB2_18: ; %Flow97 s_or_b32 exec_lo, exec_lo, s7 s_and_saveexec_b32 s1, s6 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s1, exec_lo, s1 s_cbranch_execz .LBB2_22 ; %bb.19: ds_load_b32 v3, v17 offset:8 s_mov_b32 s2, -1 s_mov_b32 s6, exec_lo s_waitcnt lgkmcnt(0) v_cmpx_le_i32_e64 v3, v2 s_xor_b32 s6, exec_lo, s6 s_cbranch_execz .LBB2_21 ; %bb.20: ds_load_b32 v3, v17 offset:512 s_waitcnt lgkmcnt(0) v_cmp_gt_i32_e32 vcc_lo, v3, v2 s_or_not1_b32 s2, vcc_lo, exec_lo .LBB2_21: ; %Flow106 s_or_b32 exec_lo, exec_lo, s6 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) s_and_not1_b32 s0, s0, exec_lo s_and_b32 s2, s2, exec_lo s_or_b32 s0, s0, s2 .LBB2_22: ; %Flow105 s_or_b32 exec_lo, exec_lo, s1 s_delay_alu instid0(SALU_CYCLE_1) s_and_b32 s0, s0, exec_lo s_xor_b32 s2, exec_lo, -1 .LBB2_23: ; %Flow96 s_or_b32 exec_lo, exec_lo, s5 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 s3, s3, exec_lo s_and_b32 s2, s2, exec_lo s_and_b32 s1, s0, exec_lo s_or_b32 s3, s3, s2 .LBB2_24: ; %Flow s_or_b32 exec_lo, exec_lo, s4 s_and_saveexec_b32 s0, s3 s_delay_alu instid0(SALU_CYCLE_1) s_xor_b32 s0, exec_lo, s0 s_cbranch_execz .LBB2_28 ; %bb.25: ds_load_b32 v3, v17 offset:264 s_mov_b32 s2, -1 s_mov_b32 s3, exec_lo s_waitcnt lgkmcnt(0) v_cmpx_le_i32_e64 v3, v2 s_cbranch_execz .LBB2_27 ; %bb.26: ds_load_b32 v3, v17 offset:256 s_waitcnt lgkmcnt(0) v_cmp_gt_i32_e32 vcc_lo, v3, v2 s_or_not1_b32 s2, vcc_lo, exec_lo .LBB2_27: ; %Flow108 s_or_b32 exec_lo, exec_lo, s3 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) s_and_not1_b32 s1, s1, exec_lo s_and_b32 s2, s2, exec_lo s_or_b32 s1, s1, s2 .LBB2_28: ; %Flow107 s_or_b32 exec_lo, exec_lo, s0 s_and_saveexec_b32 s0, s1 s_cbranch_execz .LBB2_30 ; %bb.29: ; %.sink.split v_mov_b32_e32 v2, 0 global_store_b32 v[0:1], v2, off .LBB2_30: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel nonMaximalSupression .amdhsa_group_segment_fixed_size 8704 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 32 .amdhsa_next_free_sgpr 33 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end2: .size nonMaximalSupression, .Lfunc_end2-nonMaximalSupression ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 1136 ; NumSgprs: 35 ; NumVgprs: 32 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 8704 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 3 ; NumSGPRsForWavesPerEU: 35 ; NumVGPRsForWavesPerEU: 32 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected prepareBfs ; -- Begin function prepareBfs .globl prepareBfs .p2align 8 .type prepareBfs,@function prepareBfs: ; @prepareBfs ; %bb.0: s_load_b32 s2, s[0:1], 0x8 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v0, 0x3ff, v0 s_load_b64 s[0:1], s[0:1], 0x0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshl_add_u32 v3, s15, 5, v1 s_waitcnt lgkmcnt(0) v_mad_u64_u32 v[1:2], null, s2, v3, s[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshl_add_u32 v0, v1, 5, v0 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_load_b32 v2, v[0:1], off s_waitcnt vmcnt(0) v_cmp_lt_u32_e32 vcc_lo, 17, v2 v_cndmask_b32_e64 v3, -1, -2, vcc_lo v_cmp_lt_i32_e32 vcc_lo, 8, v2 s_delay_alu instid0(VALU_DEP_2) v_cndmask_b32_e32 v2, 0, v3, vcc_lo global_store_b32 v[0:1], v2, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel prepareBfs .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end3: .size prepareBfs, .Lfunc_end3-prepareBfs ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 156 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected oneBfs ; -- Begin function oneBfs .globl oneBfs .p2align 8 .type oneBfs,@function oneBfs: ; @oneBfs ; %bb.0: s_load_b256 s[16:23], s[0:1], 0x0 v_dual_mov_b32 v20, 0 :: v_dual_and_b32 v21, 0x3ff, v0 v_bfe_u32 v22, v0, 10, 10 s_mov_b64 s[0:1], src_shared_base s_movk_i32 s32, 0x210 s_delay_alu instid0(VALU_DEP_2) v_lshl_add_u32 v4, s14, 5, v21 v_mov_b32_e32 v3, s1 v_lshl_add_u32 v5, s15, 5, v22 s_waitcnt lgkmcnt(0) s_lshl_b32 s4, s22, 5 s_getpc_b64 s[2:3] s_add_u32 s2, s2, load_to_shared@rel32@lo+4 s_addc_u32 s3, s3, load_to_shared@rel32@hi+12 v_mad_u64_u32 v[1:2], null, s4, v5, v[4:5] s_lshl_b32 s0, s23, 5 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3) v_dual_mov_b32 v31, v0 :: v_dual_mov_b32 v6, s0 v_dual_mov_b32 v0, s16 :: v_dual_mov_b32 v7, s4 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[17:18], 2, v[1:2] v_add_co_u32 v1, vcc_lo, s16, v17 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_co_ci_u32_e32 v2, vcc_lo, s17, v18, vcc_lo global_load_b32 v23, v[1:2], off v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v21 v_lshl_add_u32 v19, v22, 8, v1 v_mov_b32_e32 v1, s17 s_waitcnt vmcnt(0) ds_store_b32 v19, v23 offset:260 s_swappc_b64 s[30:31], s[2:3] s_mov_b32 s0, exec_lo s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv v_cmpx_eq_u32_e32 -1, v23 s_cbranch_execz .LBB4_7 ; %bb.1: ; %.preheader71.preheader v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v0, 1, v22 v_dual_mov_b32 v6, -1 :: v_dual_add_nc_u32 v1, 1, v21 v_dual_mov_b32 v20, 0 :: v_dual_mov_b32 v5, -1 v_mov_b32_e32 v2, -2 v_mov_b32_e32 v4, 1 s_mov_b32 s1, 0 s_mov_b32 s2, 0 .LBB4_2: ; %.preheader71 ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_add_nc_u32_e32 v7, v6, v22 v_add_lshl_u32 v8, v5, v21, 2 s_mov_b32 s3, exec_lo v_lshl_add_u32 v7, v7, 8, v8 ds_load_b32 v7, v7 offset:260 s_waitcnt lgkmcnt(0) v_cmpx_eq_u32_e32 -2, v7 s_cbranch_execz .LBB4_4 ; %bb.3: ; in Loop: Header=BB4_2 Depth=1 v_lshl_add_u32 v7, v20, 2, 16 v_dual_mov_b32 v5, 2 :: v_dual_add_nc_u32 v20, 2, v20 v_mov_b32_e32 v6, 2 ds_store_b32 v19, v2 offset:260 scratch_store_b64 v7, v[0:1], off global_store_b32 v3, v4, s[20:21] .LBB4_4: ; in Loop: Header=BB4_2 Depth=1 s_or_b32 exec_lo, exec_lo, s3 v_add_nc_u32_e32 v7, 1, v6 v_cmp_lt_i32_e32 vcc_lo, 0, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_mov_b32_e32 v6, v7 s_or_b32 s2, vcc_lo, s2 s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB4_2 ; %bb.5: ; in Loop: Header=BB4_2 Depth=1 s_or_b32 exec_lo, exec_lo, s2 v_dual_mov_b32 v6, -1 :: v_dual_add_nc_u32 v7, 1, v5 v_cmp_lt_i32_e32 vcc_lo, 0, v5 s_mov_b32 s2, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_mov_b32_e32 v5, v7 s_or_b32 s1, vcc_lo, s1 s_and_not1_b32 exec_lo, exec_lo, s1 s_cbranch_execnz .LBB4_2 ; %bb.6: ; %Flow103 s_or_b32 exec_lo, exec_lo, s1 .LBB4_7: ; %Flow104 s_delay_alu instid0(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s0 s_mov_b32 s2, 0 s_mov_b32 s1, exec_lo v_cmpx_ne_u32_e32 0, v20 s_cbranch_execz .LBB4_16 ; %bb.8: ; %.lr.ph.preheader v_mov_b32_e32 v4, -2 s_mov_b32 s3, 0 .LBB4_9: ; %.lr.ph ; =>This Loop Header: Depth=1 ; Child Loop BB4_10 Depth 2 ; Child Loop BB4_11 Depth 3 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b32 s0, s3, 2 s_mov_b32 s4, -1 s_add_i32 s0, s0, 16 scratch_load_b64 v[0:1], off, s0 s_waitcnt vmcnt(0) v_lshlrev_b32_e32 v2, 8, v0 v_lshlrev_b32_e32 v3, 2, v1 v_add_nc_u32_e32 v0, -2, v0 s_delay_alu instid0(VALU_DEP_2) v_add3_u32 v5, v2, v3, 0xfffffefc .LBB4_10: ; %.preheader ; Parent Loop BB4_9 Depth=1 ; => This Loop Header: Depth=2 ; Child Loop BB4_11 Depth 3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_dual_mov_b32 v2, v0 :: v_dual_add_nc_u32 v3, s4, v1 s_mov_b32 s5, 0 v_add_nc_u32_e32 v6, -1, v3 .LBB4_11: ; Parent Loop BB4_9 Depth=1 ; Parent Loop BB4_10 Depth=2 ; => This Inner Loop Header: Depth=3 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v7, s5, v5 v_or_b32_e32 v9, v6, v2 v_add_nc_u32_e32 v2, 1, v2 ds_load_b32 v8, v7 v_cmp_gt_u32_e64 s0, 32, v9 s_waitcnt lgkmcnt(0) v_cmp_eq_u32_e32 vcc_lo, -1, v8 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s6, s0, vcc_lo s_and_saveexec_b32 s0, s6 s_cbranch_execz .LBB4_13 ; %bb.12: ; in Loop: Header=BB4_11 Depth=3 v_lshl_add_u32 v8, v20, 2, 16 v_add_nc_u32_e32 v20, 2, v20 ds_store_b32 v7, v4 scratch_store_b64 v8, v[2:3], off .LBB4_13: ; in Loop: Header=BB4_11 Depth=3 s_or_b32 exec_lo, exec_lo, s0 s_addk_i32 s5, 0x100 s_delay_alu instid0(SALU_CYCLE_1) s_cmpk_eq_i32 s5, 0x300 s_cbranch_scc0 .LBB4_11 ; %bb.14: ; in Loop: Header=BB4_10 Depth=2 v_add_nc_u32_e32 v5, 4, v5 s_add_i32 s4, s4, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s4, 2 s_cbranch_scc0 .LBB4_10 ; %bb.15: ; %.loopexit ; in Loop: Header=BB4_9 Depth=1 s_add_i32 s3, s3, 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_cmp_eq_u32_e32 vcc_lo, s3, v20 s_or_b32 s2, vcc_lo, s2 s_and_not1_b32 exec_lo, exec_lo, s2 s_cbranch_execnz .LBB4_9 .LBB4_16: ; %Flow102 s_or_b32 exec_lo, exec_lo, s1 s_waitcnt lgkmcnt(0) s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv ds_load_b32 v2, v19 offset:260 v_add_co_u32 v0, vcc_lo, s18, v17 v_add_co_ci_u32_e32 v1, vcc_lo, s19, v18, vcc_lo s_waitcnt lgkmcnt(0) global_store_b32 v[0:1], v2, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel oneBfs .amdhsa_group_segment_fixed_size 8704 .amdhsa_private_segment_fixed_size 528 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 1 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 32 .amdhsa_next_free_sgpr 33 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end4: .size oneBfs, .Lfunc_end4-oneBfs ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 756 ; NumSgprs: 35 ; NumVgprs: 32 ; ScratchSize: 528 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 8704 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 3 ; NumSGPRsForWavesPerEU: 35 ; NumVGPRsForWavesPerEU: 32 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected final_battle ; -- Begin function final_battle .globl final_battle .p2align 8 .type final_battle,@function final_battle: ; @final_battle ; %bb.0: s_load_b32 s2, s[0:1], 0x8 v_bfe_u32 v1, v0, 10, 10 v_and_b32_e32 v0, 0x3ff, v0 s_load_b64 s[0:1], s[0:1], 0x0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshl_add_u32 v3, s15, 5, v1 s_waitcnt lgkmcnt(0) v_mad_u64_u32 v[1:2], null, s2, v3, s[14:15] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshl_add_u32 v0, v1, 5, v0 v_ashrrev_i32_e32 v1, 31, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[0:1] v_add_co_u32 v0, vcc_lo, s0, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo global_load_b32 v2, v[0:1], off s_waitcnt vmcnt(0) v_cmp_eq_u32_e32 vcc_lo, -2, v2 v_cndmask_b32_e64 v2, 0, 0xff, vcc_lo global_store_b32 v[0:1], v2, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel final_battle .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 264 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end5: .size final_battle, .Lfunc_end5-final_battle ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 148 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected gaussianFilter ; -- Begin function gaussianFilter .globl gaussianFilter .p2align 8 .type gaussianFilter,@function gaussianFilter: ; @gaussianFilter ; %bb.0: s_clause 0x1 s_load_b64 s[2:3], s[0:1], 0x10 s_load_b128 s[16:19], s[0:1], 0x0 v_and_b32_e32 v3, 0x3ff, v0 v_bfe_u32 v6, v0, 10, 10 s_mov_b64 s[0:1], src_shared_base s_mov_b32 s32, 0 v_mov_b32_e32 v19, 0 v_lshl_add_u32 v4, s14, 5, v3 v_lshl_add_u32 v5, s15, 5, v6 s_waitcnt lgkmcnt(0) s_lshl_b32 s2, s2, 5 s_getpc_b64 s[4:5] s_add_u32 s4, s4, load_to_shared@rel32@lo+4 s_addc_u32 s5, s5, load_to_shared@rel32@hi+12 v_mad_u64_u32 v[1:2], null, s2, v5, v[4:5] s_lshl_b32 s0, s3, 5 v_dual_mov_b32 v31, v0 :: v_dual_mov_b32 v0, s16 v_mov_b32_e32 v7, s2 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v2, 31, v1 v_lshlrev_b64 v[17:18], 2, v[1:2] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v1, vcc_lo, s16, v17 v_add_co_ci_u32_e32 v2, vcc_lo, s17, v18, vcc_lo global_load_b32 v1, v[1:2], off v_dual_mov_b32 v3, s1 :: v_dual_lshlrev_b32 v2, 2, v3 s_delay_alu instid0(VALU_DEP_1) v_lshl_add_u32 v20, v6, 8, v2 v_mov_b32_e32 v2, 0 v_mov_b32_e32 v6, s0 s_waitcnt vmcnt(0) ds_store_b32 v20, v1 offset:260 v_mov_b32_e32 v1, s17 s_swappc_b64 s[30:31], s[4:5] v_add_nc_u32_e32 v0, 0x104, v20 s_mov_b32 s0, -8 s_waitcnt_vscnt null, 0x0 s_barrier buffer_gl0_inv .LBB6_1: ; %.preheader ; =>This Loop Header: Depth=1 ; Child Loop BB6_2 Depth 2 s_movk_i32 s1, 0xffbc .LBB6_2: ; Parent Loop BB6_1 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_nc_u32_e32 v1, s1, v0 s_add_i32 s1, s1, 4 s_cmp_eq_u32 s1, 0 ds_load_b32 v1, v1 offset:68 s_waitcnt lgkmcnt(0) v_add_nc_u32_e32 v19, v1, v19 s_cbranch_scc0 .LBB6_2 ; %bb.3: ; in Loop: Header=BB6_1 Depth=1 v_add_nc_u32_e32 v0, 0x100, v0 s_add_i32 s0, s0, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_eq_u32 s0, 9 s_cbranch_scc0 .LBB6_1 ; %bb.4: v_add_co_u32 v0, vcc_lo, s18, v17 v_add_co_ci_u32_e32 v1, vcc_lo, s19, v18, vcc_lo global_store_b32 v[0:1], v19, off s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel gaussianFilter .amdhsa_group_segment_fixed_size 8704 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 272 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 32 .amdhsa_next_free_sgpr 33 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end6: .size gaussianFilter, .Lfunc_end6-gaussianFilter ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 328 ; NumSgprs: 35 ; NumVgprs: 32 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 8704 bytes/workgroup (compile time only) ; SGPRBlocks: 4 ; VGPRBlocks: 3 ; NumSGPRsForWavesPerEU: 35 ; NumVGPRsForWavesPerEU: 32 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 8704 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: sobel .private_segment_fixed_size: 0 .sgpr_count: 35 .sgpr_spill_count: 0 .symbol: sobel.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 32 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 8704 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: nonMaximalSupression .private_segment_fixed_size: 0 .sgpr_count: 35 .sgpr_spill_count: 0 .symbol: nonMaximalSupression.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 32 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: prepareBfs .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: prepareBfs.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 8704 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: oneBfs .private_segment_fixed_size: 528 .sgpr_count: 35 .sgpr_spill_count: 0 .symbol: oneBfs.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 32 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .offset: 8 .size: 4 .value_kind: hidden_block_count_x - .offset: 12 .size: 4 .value_kind: hidden_block_count_y - .offset: 16 .size: 4 .value_kind: hidden_block_count_z - .offset: 20 .size: 2 .value_kind: hidden_group_size_x - .offset: 22 .size: 2 .value_kind: hidden_group_size_y - .offset: 24 .size: 2 .value_kind: hidden_group_size_z - .offset: 26 .size: 2 .value_kind: hidden_remainder_x - .offset: 28 .size: 2 .value_kind: hidden_remainder_y - .offset: 30 .size: 2 .value_kind: hidden_remainder_z - .offset: 48 .size: 8 .value_kind: hidden_global_offset_x - .offset: 56 .size: 8 .value_kind: hidden_global_offset_y - .offset: 64 .size: 8 .value_kind: hidden_global_offset_z - .offset: 72 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 264 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: final_battle .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: final_battle.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: hidden_block_count_x - .offset: 20 .size: 4 .value_kind: hidden_block_count_y - .offset: 24 .size: 4 .value_kind: hidden_block_count_z - .offset: 28 .size: 2 .value_kind: hidden_group_size_x - .offset: 30 .size: 2 .value_kind: hidden_group_size_y - .offset: 32 .size: 2 .value_kind: hidden_group_size_z - .offset: 34 .size: 2 .value_kind: hidden_remainder_x - .offset: 36 .size: 2 .value_kind: hidden_remainder_y - .offset: 38 .size: 2 .value_kind: hidden_remainder_z - .offset: 56 .size: 8 .value_kind: hidden_global_offset_x - .offset: 64 .size: 8 .value_kind: hidden_global_offset_y - .offset: 72 .size: 8 .value_kind: hidden_global_offset_z - .offset: 80 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 8704 .kernarg_segment_align: 8 .kernarg_segment_size: 272 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: gaussianFilter .private_segment_fixed_size: 0 .sgpr_count: 35 .sgpr_spill_count: 0 .symbol: gaussianFilter.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 32 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
9452deed8d375f169ac4d8a3cc2dde18a742ab22
#include <cstdio> #include <functional> #include <iostream> #include <random> #define BLOCKSIZE 256 void FillMatrix(float* matrix, int height, int width) { std::mt19937 gen(time(0)); std::uniform_real_distribution<float> distribution(-1.0f, 1.0f); auto generate = std::bind(distribution, gen); for (int i = 0; i < height * width; ++i) { matrix[i] = generate(); } } void PrintMatrix(float *matrix, int height, int width) { for (int i = 0; i < height; ++i) { for (int j = 0; j < width; ++j) { std::cout << matrix[i * width + j] << " "; } std::cout << std::endl; } } __global__ void kernel_mul(float *A, float *B, float *C, int mid_size) { int i = blockIdx.x * blockDim.x + threadIdx.x; int j = blockIdx.y * blockDim.y + threadIdx.y; int height = blockDim.x * gridDim.x; int width = blockDim.y * gridDim.y; C[i * width + j] = 0.0f; for (int k = 0; k < mid_size; ++k) { C[i * width + j] += A[i * mid_size + k] * B[k * width + j]; } } __global__ void kernel_my_mul(float *A, float *B, float *C, int mid_size) { int i = blockIdx.x * blockDim.x + threadIdx.x; int j = blockIdx.y * blockDim.y + threadIdx.y; int height = blockDim.x * gridDim.x; int width = blockDim.y * gridDim.y; __shared__ float block_a[BLOCKSIZE]; __shared__ float block_b[BLOCKSIZE]; block_a[threadIdx.y] = A[i * width + threadIdx.y]; block_b[threadIdx.x] = B[threadIdx.x * height + j]; __syncthreads(); C[i * width + j] = 0.0f; for (int k = 0; k < mid_size; ++k) { C[i * width + j] += block_a[k] * block_b[k]; } } void try_both_multiplications(float *h_A, float *h_B, float *h_C) { float* d_A; float* d_B; float* d_C; cudaMalloc(&d_A, sizeof(float) * 128 * 384); cudaMalloc(&d_B, sizeof(float) * 384 * 256); cudaMalloc(&d_C, sizeof(float) * 128 * 256); cudaMemcpy(d_A, h_A, sizeof(float) * 128 * 384, cudaMemcpyHostToDevice); cudaMemcpy(d_B, h_B, sizeof(float) * 384 * 256, cudaMemcpyHostToDevice); // kernel call dim3 num_blocks(8, 16); dim3 block_size(16, 16); cudaEvent_t start; cudaEvent_t stop; cudaEventCreate(&start); cudaEventCreate(&stop); cudaEventRecord(start); kernel_mul<<<num_blocks, block_size>>>(d_A, d_B, d_C, 384); cudaEventRecord(stop); cudaMemcpy(h_C, d_C, sizeof(float) * 128 * 256, cudaMemcpyDeviceToHost); cudaEventSynchronize(stop); float milliseconds = 0; cudaEventElapsedTime(&milliseconds, start, stop); std::cout << "banal elapsed in " << milliseconds << std::endl; PrintMatrix(h_C, 128, 256); cudaEvent_t start2; cudaEvent_t stop2; cudaEventCreate(&start2); cudaEventCreate(&stop2); cudaEventRecord(start2); kernel_my_mul<<<num_blocks, block_size>>>(d_A, d_B, d_C, 384); cudaEventRecord(stop2); cudaMemcpy(h_C, d_C, sizeof(float) * 128 * 256, cudaMemcpyDeviceToHost); cudaEventSynchronize(stop2); float milliseconds2 = 0; cudaEventElapsedTime(&milliseconds2, start2, stop2); std::cout << "shared memory elapsed in " << milliseconds2 << std::endl; PrintMatrix(h_C, 128, 256); cudaFree(d_A); cudaFree(d_B); cudaFree(d_C); } int main() { float *h_A; float *h_B; float *h_C; // h_A 128 * 384 // h_B 384 * 256 // h_C 128 * 256 h_A = new float[128 * 384]; h_B = new float[384 * 256]; h_C = new float[128 * 256]; FillMatrix(h_A, 128, 384); FillMatrix(h_B, 384, 256); try_both_multiplications(h_A, h_B, h_C); delete[] h_A; delete[] h_B; delete[] h_C; return 0; }
.file "tmpxft_002d4b83_00000000-6_my_calc.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB5579: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE5579: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string " " .text .globl _Z11PrintMatrixPfii .type _Z11PrintMatrixPfii, @function _Z11PrintMatrixPfii: .LFB5574: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movl %esi, %r14d pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 xorl %r13d, %r13d pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 xorl %r12d, %r12d pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movq %rdi, %rbp pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %edx, %ebx subq $24, %rsp .cfi_def_cfa_offset 80 .L3: cmpl %r14d, %r13d jge .L2 movslq %r12d, %rax xorl %r15d, %r15d leaq 0(%rbp,%rax,4), %rcx .L6: cmpl %r15d, %ebx jle .L9 leaq _ZSt4cout(%rip), %rdi cvtss2sd (%rcx,%r15,4), %xmm0 movq %rcx, 8(%rsp) incq %r15 call _ZNSo9_M_insertIdEERSoT_@PLT leaq .LC0(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq 8(%rsp), %rcx jmp .L6 .L9: leaq _ZSt4cout(%rip), %rdi incl %r13d addl %ebx, %r12d call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT jmp .L3 .L2: addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5574: .size _Z11PrintMatrixPfii, .-_Z11PrintMatrixPfii .globl _Z35__device_stub__Z10kernel_mulPfS_S_iPfS_S_i .type _Z35__device_stub__Z10kernel_mulPfS_S_iPfS_S_i, @function _Z35__device_stub__Z10kernel_mulPfS_S_iPfS_S_i: .LFB5601: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L10 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z10kernel_mulPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L10: movq 136(%rsp), %rax subq %fs:40, %rax je .L12 call __stack_chk_fail@PLT .L12: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5601: .size _Z35__device_stub__Z10kernel_mulPfS_S_iPfS_S_i, .-_Z35__device_stub__Z10kernel_mulPfS_S_iPfS_S_i .globl _Z10kernel_mulPfS_S_i .type _Z10kernel_mulPfS_S_i, @function _Z10kernel_mulPfS_S_i: .LFB5602: .cfi_startproc endbr64 jmp _Z35__device_stub__Z10kernel_mulPfS_S_iPfS_S_i .cfi_endproc .LFE5602: .size _Z10kernel_mulPfS_S_i, .-_Z10kernel_mulPfS_S_i .globl _Z38__device_stub__Z13kernel_my_mulPfS_S_iPfS_S_i .type _Z38__device_stub__Z13kernel_my_mulPfS_S_iPfS_S_i, @function _Z38__device_stub__Z13kernel_my_mulPfS_S_iPfS_S_i: .LFB5603: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L15 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z13kernel_my_mulPfS_S_i(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L15: movq 136(%rsp), %rax subq %fs:40, %rax je .L17 call __stack_chk_fail@PLT .L17: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5603: .size _Z38__device_stub__Z13kernel_my_mulPfS_S_iPfS_S_i, .-_Z38__device_stub__Z13kernel_my_mulPfS_S_iPfS_S_i .globl _Z13kernel_my_mulPfS_S_i .type _Z13kernel_my_mulPfS_S_i, @function _Z13kernel_my_mulPfS_S_i: .LFB5604: .cfi_startproc endbr64 jmp _Z38__device_stub__Z13kernel_my_mulPfS_S_iPfS_S_i .cfi_endproc .LFE5604: .size _Z13kernel_my_mulPfS_S_i, .-_Z13kernel_my_mulPfS_S_i .section .rodata.str1.1 .LC2: .string "banal elapsed in " .LC3: .string "shared memory elapsed in " .text .globl _Z24try_both_multiplicationsPfS_S_ .type _Z24try_both_multiplicationsPfS_S_, @function _Z24try_both_multiplicationsPfS_S_: .LFB5575: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movq %rdi, %r12 pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 movq %rsi, %rbp movl $196608, %esi pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movq %rdx, %rbx subq $96, %rsp .cfi_def_cfa_offset 128 movq %fs:40, %rax movq %rax, 88(%rsp) xorl %eax, %eax leaq 8(%rsp), %rdi call cudaMalloc@PLT leaq 16(%rsp), %rdi movl $393216, %esi call cudaMalloc@PLT leaq 24(%rsp), %rdi movl $131072, %esi call cudaMalloc@PLT movq 8(%rsp), %rdi movl $1, %ecx movq %r12, %rsi movl $196608, %edx call cudaMemcpy@PLT movq 16(%rsp), %rdi movl $1, %ecx movq %rbp, %rsi movl $393216, %edx call cudaMemcpy@PLT leaq 32(%rsp), %rdi movabsq $68719476744, %rax movl $1, 72(%rsp) movq %rax, 64(%rsp) addq $8, %rax movq %rax, 76(%rsp) movl $1, 84(%rsp) call cudaEventCreate@PLT leaq 40(%rsp), %rdi call cudaEventCreate@PLT movq 32(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movl 84(%rsp), %ecx movl 72(%rsp), %esi xorl %r9d, %r9d movq 76(%rsp), %rdx movq 64(%rsp), %rdi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L21 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movl $384, %ecx movq 8(%rsp), %rdi call _Z35__device_stub__Z10kernel_mulPfS_S_iPfS_S_i .L21: movq 40(%rsp), %rdi xorl %esi, %esi leaq _ZSt4cout(%rip), %rbp call cudaEventRecord@PLT movq 24(%rsp), %rsi movl $2, %ecx movq %rbx, %rdi movl $131072, %edx call cudaMemcpy@PLT movq 40(%rsp), %rdi call cudaEventSynchronize@PLT movq 40(%rsp), %rdx movq %rsp, %rdi movq 32(%rsp), %rsi movl $0x00000000, (%rsp) call cudaEventElapsedTime@PLT leaq .LC2(%rip), %rsi movq %rbp, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT cvtss2sd (%rsp), %xmm0 movq %rax, %rdi call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movl $256, %edx movl $128, %esi movq %rbx, %rdi call _Z11PrintMatrixPfii leaq 48(%rsp), %rdi call cudaEventCreate@PLT leaq 56(%rsp), %rdi call cudaEventCreate@PLT movq 48(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movl 84(%rsp), %ecx movl 72(%rsp), %esi xorl %r9d, %r9d movq 76(%rsp), %rdx movq 64(%rsp), %rdi xorl %r8d, %r8d call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L22 movq 24(%rsp), %rdx movq 16(%rsp), %rsi movl $384, %ecx movq 8(%rsp), %rdi call _Z38__device_stub__Z13kernel_my_mulPfS_S_iPfS_S_i .L22: movq 56(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movq 24(%rsp), %rsi movl $2, %ecx movq %rbx, %rdi movl $131072, %edx call cudaMemcpy@PLT movq 56(%rsp), %rdi call cudaEventSynchronize@PLT movq 56(%rsp), %rdx movq 48(%rsp), %rsi leaq 4(%rsp), %rdi movl $0x00000000, 4(%rsp) call cudaEventElapsedTime@PLT leaq .LC3(%rip), %rsi movq %rbp, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT cvtss2sd 4(%rsp), %xmm0 movq %rax, %rdi call _ZNSo9_M_insertIdEERSoT_@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movl $256, %edx movl $128, %esi movq %rbx, %rdi call _Z11PrintMatrixPfii movq 8(%rsp), %rdi call cudaFree@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call cudaFree@PLT movq 88(%rsp), %rax subq %fs:40, %rax je .L23 call __stack_chk_fail@PLT .L23: addq $96, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5575: .size _Z24try_both_multiplicationsPfS_S_, .-_Z24try_both_multiplicationsPfS_S_ .section .rodata.str1.1 .LC4: .string "_Z13kernel_my_mulPfS_S_i" .LC5: .string "_Z10kernel_mulPfS_S_i" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB5606: .cfi_startproc endbr64 pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset 3, -16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi movq %rax, %rbx pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx leaq _Z13kernel_my_mulPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT addq $32, %rsp .cfi_def_cfa_offset 16 movq %rbx, %rdi xorl %r9d, %r9d pushq $0 .cfi_def_cfa_offset 24 leaq .LC5(%rip), %rdx orl $-1, %r8d leaq _Z10kernel_mulPfS_S_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 32 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 40 pushq $0 .cfi_def_cfa_offset 48 call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rbx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE5606: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,comdat .align 2 .weak _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv .type _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, @function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv: .LFB6340: .cfi_startproc endbr64 movq %rdi, %rax xorl %edx, %edx movl $2567483615, %edi .L29: movq (%rax,%rdx,8), %rsi incq %rdx movq (%rax,%rdx,8), %rcx andq $-2147483648, %rsi andl $2147483647, %ecx orq %rsi, %rcx movq %rcx, %rsi shrq %rsi xorq 3168(%rax,%rdx,8), %rsi andl $1, %ecx je .L28 movq %rdi, %rcx .L28: xorq %rsi, %rcx movq %rcx, -8(%rax,%rdx,8) cmpq $227, %rdx jne .L29 movl $2567483615, %edi .L31: movq (%rax,%rdx,8), %rsi incq %rdx movq (%rax,%rdx,8), %rcx andq $-2147483648, %rsi andl $2147483647, %ecx orq %rsi, %rcx movq %rcx, %rsi shrq %rsi xorq -1824(%rax,%rdx,8), %rsi andl $1, %ecx je .L30 movq %rdi, %rcx .L30: xorq %rsi, %rcx movq %rcx, -8(%rax,%rdx,8) cmpq $623, %rdx jne .L31 movq 4984(%rax), %rdx movq (%rax), %rcx andq $-2147483648, %rdx andl $2147483647, %ecx orq %rcx, %rdx movq %rdx, %rcx shrq %rcx xorq 3168(%rax), %rcx andl $1, %edx je .L32 movl $2567483615, %edx .L32: xorq %rcx, %rdx movq %rdx, 4984(%rax) xorl %edx, %edx movq %rdx, 4992(%rax) ret .cfi_endproc .LFE6340: .size _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, .-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv .text .globl _Z10FillMatrixPfii .type _Z10FillMatrixPfii, @function _Z10FillMatrixPfii: .LFB5570: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 subq $4096, %rsp .cfi_def_cfa_offset 4136 orq $0, (%rsp) subq $4096, %rsp .cfi_def_cfa_offset 8232 orq $0, (%rsp) subq $1832, %rsp .cfi_def_cfa_offset 10064 movq %fs:40, %rax movq %rax, 10008(%rsp) xorl %eax, %eax movq %rdi, %rbp xorl %edi, %edi movl %edx, %r12d movl %esi, %ebx call time@PLT movl $1, %edx movl %eax, %eax movq %rax, (%rsp) .L45: movq -8(%rsp,%rdx,8), %rax movq %rsp, %rsi movq %rax, %rcx shrq $30, %rcx xorq %rcx, %rax imulq $1812433253, %rax, %rax addl %edx, %eax movq %rax, (%rsi,%rdx,8) incq %rdx cmpq $624, %rdx jne .L45 leaq 5008(%rsp), %rdi movl $1250, %ecx xorl %r13d, %r13d movq $624, 4992(%rsp) rep movsl imull %r12d, %ebx leaq 5008(%rsp), %r12 movabsq $4575657224621260800, %rax movq %rax, 5000(%rsp) .L46: cmpl %r13d, %ebx jle .L56 cmpq $623, 10000(%rsp) jbe .L47 movq %r12, %rdi call _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv .L47: movq 10000(%rsp), %rax leaq 1(%rax), %rdx movq 5008(%rsp,%rax,8), %rax movq %rdx, 10000(%rsp) movq %rax, %rdx shrq $11, %rdx movl %edx, %edx xorq %rdx, %rax movq %rax, %rdx salq $7, %rdx andl $2636928640, %edx xorq %rdx, %rax movq %rax, %rdx salq $15, %rdx andl $4022730752, %edx xorq %rdx, %rax movq %rax, %rdx shrq $18, %rdx xorq %rdx, %rax js .L48 cvtsi2ssq %rax, %xmm0 jmp .L49 .L48: movq %rax, %rdx andl $1, %eax shrq %rdx orq %rax, %rdx cvtsi2ssq %rdx, %xmm0 addss %xmm0, %xmm0 .L49: xorps %xmm1, %xmm1 addss %xmm1, %xmm0 mulss .LC7(%rip), %xmm0 movss .LC8(%rip), %xmm1 comiss %xmm1, %xmm0 jb .L50 movss .LC6(%rip), %xmm0 .L50: addss %xmm0, %xmm0 subss %xmm1, %xmm0 movss %xmm0, 0(%rbp,%r13,4) incq %r13 jmp .L46 .L56: movq 10008(%rsp), %rax subq %fs:40, %rax je .L52 call __stack_chk_fail@PLT .L52: addq $10024, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5570: .size _Z10FillMatrixPfii, .-_Z10FillMatrixPfii .section .text.startup .globl main .type main, @function main: .LFB5576: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movl $196608, %edi pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 call _Znam@PLT movl $393216, %edi movq %rax, %rbp call _Znam@PLT movl $131072, %edi movq %rax, %rbx call _Znam@PLT movq %rbp, %rdi movl $384, %edx movl $128, %esi movq %rax, %r12 call _Z10FillMatrixPfii movq %rbx, %rdi movl $256, %edx movl $384, %esi call _Z10FillMatrixPfii movq %r12, %rdx movq %rbx, %rsi movq %rbp, %rdi call _Z24try_both_multiplicationsPfS_S_ movq %rbp, %rdi call _ZdaPv@PLT movq %rbx, %rdi call _ZdaPv@PLT movq %r12, %rdi call _ZdaPv@PLT popq %rbx .cfi_def_cfa_offset 24 xorl %eax, %eax popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE5576: .size main, .-main .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC6: .long 1065353215 .align 4 .LC7: .long 796917760 .align 4 .LC8: .long 1065353216 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z13kernel_my_mulPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC UR7, c[0x0][0x10] ; /* 0x0000040000077ab9 */ /* 0x000fe20000000800 */ /*0030*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */ /* 0x000fe20000000f00 */ /*0040*/ ULDC.64 UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */ /* 0x000fe20000000a00 */ /*0050*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */ /* 0x000e220000002100 */ /*0060*/ ULDC UR6, c[0x0][0xc] ; /* 0x0000030000067ab9 */ /* 0x000fe40000000800 */ /*0070*/ UIMAD UR5, UR5, UR7, URZ ; /* 0x00000007050572a4 */ /* 0x000fe2000f8e023f */ /*0080*/ S2R R11, SR_TID.Y ; /* 0x00000000000b7919 */ /* 0x000e620000002200 */ /*0090*/ UIMAD UR4, UR4, UR6, URZ ; /* 0x00000006040472a4 */ /* 0x000fe4000f8e023f */ /*00a0*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fe20000000a00 */ /*00b0*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */ /* 0x000ea20000002600 */ /*00c0*/ IMAD R0, R0, c[0x0][0x0], R9 ; /* 0x0000000000007a24 */ /* 0x001fc800078e0209 */ /*00d0*/ IMAD R4, R0, UR5, R11.reuse ; /* 0x0000000500047c24 */ /* 0x102fe4000f8e020b */ /*00e0*/ IMAD R3, R3, c[0x0][0x4], R11 ; /* 0x0000010003037a24 */ /* 0x004fe400078e020b */ /*00f0*/ IMAD.WIDE.U32 R4, R4, R13, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fc800078e000d */ /*0100*/ IMAD R6, R9, UR4, R3 ; /* 0x0000000409067c24 */ /* 0x000fe4000f8e0203 */ /*0110*/ LDG.E R4, [R4.64] ; /* 0x0000000804047981 */ /* 0x000ea4000c1e1900 */ /*0120*/ IMAD.WIDE.U32 R6, R6, R13, c[0x0][0x168] ; /* 0x00005a0006067625 */ /* 0x000fcc00078e000d */ /*0130*/ LDG.E R6, [R6.64] ; /* 0x0000000806067981 */ /* 0x000ee2000c1e1900 */ /*0140*/ MOV R8, c[0x0][0x178] ; /* 0x00005e0000087a02 */ /* 0x000fe20000000f00 */ /*0150*/ IMAD R3, R0, UR5, R3 ; /* 0x0000000500037c24 */ /* 0x000fc6000f8e0203 */ /*0160*/ ISETP.GE.AND P0, PT, R8, 0x1, PT ; /* 0x000000010800780c */ /* 0x000fe20003f06270 */ /*0170*/ IMAD.WIDE R2, R3, R13, c[0x0][0x170] ; /* 0x00005c0003027625 */ /* 0x000fe200078e020d */ /*0180*/ STS [R11.X4], R4 ; /* 0x000000040b007388 */ /* 0x0041e80000004800 */ /*0190*/ STS [R9.X4+0x400], R6 ; /* 0x0004000609007388 */ /* 0x0081e80000004800 */ /*01a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*01b0*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e2000c101908 */ /*01c0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*01d0*/ IADD3 R0, R8, -0x1, RZ ; /* 0xffffffff08007810 */ /* 0x000fe20007ffe0ff */ /*01e0*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*01f0*/ MOV R31, RZ ; /* 0x000000ff001f7202 */ /* 0x000fc40000000f00 */ /*0200*/ ISETP.GE.U32.AND P0, PT, R0, 0x3, PT ; /* 0x000000030000780c */ /* 0x000fe40003f06070 */ /*0210*/ LOP3.LUT R0, R8, 0x3, RZ, 0xc0, !PT ; /* 0x0000000308007812 */ /* 0x000fd600078ec0ff */ /*0220*/ @!P0 BRA 0x6d0 ; /* 0x000004a000008947 */ /* 0x000fea0003800000 */ /*0230*/ IADD3 R36, -R0, c[0x0][0x178], RZ ; /* 0x00005e0000247a10 */ /* 0x000fe20007ffe1ff */ /*0240*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*0250*/ MOV R31, RZ ; /* 0x000000ff001f7202 */ /* 0x000fe20000000f00 */ /*0260*/ UMOV UR5, URZ ; /* 0x0000003f00057c82 */ /* 0x000fe20008000000 */ /*0270*/ ISETP.GT.AND P0, PT, R36, RZ, PT ; /* 0x000000ff2400720c */ /* 0x000fe20003f04270 */ /*0280*/ UMOV UR6, 0x400 ; /* 0x0000040000067882 */ /* 0x000fd80000000000 */ /*0290*/ @!P0 BRA 0x610 ; /* 0x0000037000008947 */ /* 0x000fea0003800000 */ /*02a0*/ ISETP.GT.AND P1, PT, R36, 0xc, PT ; /* 0x0000000c2400780c */ /* 0x000fe40003f24270 */ /*02b0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */ /* 0x000fd60003f0f070 */ /*02c0*/ @!P1 BRA 0x4c0 ; /* 0x000001f000009947 */ /* 0x000fea0003800000 */ /*02d0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe40003f0e170 */ /*02e0*/ LDS.128 R4, [UR6] ; /* 0x00000006ff047984 */ /* 0x001fe20008000c00 */ /*02f0*/ IADD3 R36, R36, -0x10, RZ ; /* 0xfffffff024247810 */ /* 0x000fe20007ffe0ff */ /*0300*/ UIADD3 UR4, UR4, 0x10, URZ ; /* 0x0000001004047890 */ /* 0x000fe4000fffe03f */ /*0310*/ LDS.128 R8, [UR5] ; /* 0x00000005ff087984 */ /* 0x000e220008000c00 */ /*0320*/ ISETP.GT.AND P1, PT, R36, 0xc, PT ; /* 0x0000000c2400780c */ /* 0x000fc60003f24270 */ /*0330*/ LDS.128 R12, [UR6+0x10] ; /* 0x00001006ff0c7984 */ /* 0x000fe80008000c00 */ /*0340*/ LDS.128 R16, [UR5+0x10] ; /* 0x00001005ff107984 */ /* 0x000e680008000c00 */ /*0350*/ LDS.128 R20, [UR6+0x20] ; /* 0x00002006ff147984 */ /* 0x000fe80008000c00 */ /*0360*/ LDS.128 R24, [UR5+0x20] ; /* 0x00002005ff187984 */ /* 0x000ea80008000c00 */ /*0370*/ LDS.128 R32, [UR5+0x30] ; /* 0x00003005ff207984 */ /* 0x000fe20008000c00 */ /*0380*/ UIADD3 UR5, UR5, 0x40, URZ ; /* 0x0000004005057890 */ /* 0x000fe2000fffe03f */ /*0390*/ FFMA R4, R4, R8, R31 ; /* 0x0000000804047223 */ /* 0x001fc4000000001f */ /*03a0*/ LDS.128 R28, [UR6+0x30] ; /* 0x00003006ff1c7984 */ /* 0x000e220008000c00 */ /*03b0*/ UIADD3 UR6, UR6, 0x40, URZ ; /* 0x0000004006067890 */ /* 0x000fe2000fffe03f */ /*03c0*/ FFMA R5, R5, R9, R4 ; /* 0x0000000905057223 */ /* 0x000fc80000000004 */ /*03d0*/ FFMA R6, R6, R10, R5 ; /* 0x0000000a06067223 */ /* 0x000fc80000000005 */ /*03e0*/ FFMA R7, R7, R11, R6 ; /* 0x0000000b07077223 */ /* 0x000fc80000000006 */ /*03f0*/ FFMA R12, R12, R16, R7 ; /* 0x000000100c0c7223 */ /* 0x002fc80000000007 */ /*0400*/ FFMA R13, R13, R17, R12 ; /* 0x000000110d0d7223 */ /* 0x000fc8000000000c */ /*0410*/ FFMA R14, R14, R18, R13 ; /* 0x000000120e0e7223 */ /* 0x000fc8000000000d */ /*0420*/ FFMA R15, R15, R19, R14 ; /* 0x000000130f0f7223 */ /* 0x000fc8000000000e */ /*0430*/ FFMA R20, R20, R24, R15 ; /* 0x0000001814147223 */ /* 0x004fc8000000000f */ /*0440*/ FFMA R21, R21, R25, R20 ; /* 0x0000001915157223 */ /* 0x000fc80000000014 */ /*0450*/ FFMA R22, R22, R26, R21 ; /* 0x0000001a16167223 */ /* 0x000fc80000000015 */ /*0460*/ FFMA R23, R23, R27, R22 ; /* 0x0000001b17177223 */ /* 0x000fc80000000016 */ /*0470*/ FFMA R28, R28, R32, R23 ; /* 0x000000201c1c7223 */ /* 0x001fc80000000017 */ /*0480*/ FFMA R29, R29, R33, R28 ; /* 0x000000211d1d7223 */ /* 0x000fc8000000001c */ /*0490*/ FFMA R30, R30, R34, R29 ; /* 0x000000221e1e7223 */ /* 0x000fc8000000001d */ /*04a0*/ FFMA R31, R31, R35, R30 ; /* 0x000000231f1f7223 */ /* 0x000fe2000000001e */ /*04b0*/ @P1 BRA 0x2e0 ; /* 0xfffffe2000001947 */ /* 0x000fea000383ffff */ /*04c0*/ ISETP.GT.AND P1, PT, R36, 0x4, PT ; /* 0x000000042400780c */ /* 0x000fda0003f24270 */ /*04d0*/ @!P1 BRA 0x5f0 ; /* 0x0000011000009947 */ /* 0x000fea0003800000 */ /*04e0*/ LDS.128 R12, [UR6] ; /* 0x00000006ff0c7984 */ /* 0x000fe20008000c00 */ /*04f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */ /* 0x000fe20003f0e170 */ /*0500*/ UIADD3 UR4, UR4, 0x8, URZ ; /* 0x0000000804047890 */ /* 0x000fe2000fffe03f */ /*0510*/ IADD3 R36, R36, -0x8, RZ ; /* 0xfffffff824247810 */ /* 0x000fe20007ffe0ff */ /*0520*/ LDS.128 R16, [UR5] ; /* 0x00000005ff107984 */ /* 0x000e680008000c00 */ /*0530*/ LDS.128 R4, [UR6+0x10] ; /* 0x00001006ff047984 */ /* 0x001fe20008000c00 */ /*0540*/ UIADD3 UR6, UR6, 0x20, URZ ; /* 0x0000002006067890 */ /* 0x000fc6000fffe03f */ /*0550*/ LDS.128 R8, [UR5+0x10] ; /* 0x00001005ff087984 */ /* 0x000e220008000c00 */ /*0560*/ UIADD3 UR5, UR5, 0x20, URZ ; /* 0x0000002005057890 */ /* 0x000fe2000fffe03f */ /*0570*/ FFMA R12, R12, R16, R31 ; /* 0x000000100c0c7223 */ /* 0x002fc8000000001f */ /*0580*/ FFMA R13, R13, R17, R12 ; /* 0x000000110d0d7223 */ /* 0x000fc8000000000c */ /*0590*/ FFMA R14, R14, R18, R13 ; /* 0x000000120e0e7223 */ /* 0x000fc8000000000d */ /*05a0*/ FFMA R15, R15, R19, R14 ; /* 0x000000130f0f7223 */ /* 0x000fc8000000000e */ /*05b0*/ FFMA R4, R4, R8, R15 ; /* 0x0000000804047223 */ /* 0x001fc8000000000f */ /*05c0*/ FFMA R5, R5, R9, R4 ; /* 0x0000000905057223 */ /* 0x000fc80000000004 */ /*05d0*/ FFMA R6, R6, R10, R5 ; /* 0x0000000a06067223 */ /* 0x000fc80000000005 */ /*05e0*/ FFMA R31, R7, R11, R6 ; /* 0x0000000b071f7223 */ /* 0x000fe20000000006 */ /*05f0*/ ISETP.NE.OR P0, PT, R36, RZ, P0 ; /* 0x000000ff2400720c */ /* 0x000fda0000705670 */ /*0600*/ @!P0 BRA 0x6d0 ; /* 0x000000c000008947 */ /* 0x000fea0003800000 */ /*0610*/ LDS.128 R4, [UR6] ; /* 0x00000006ff047984 */ /* 0x001fe20008000c00 */ /*0620*/ IADD3 R36, R36, -0x4, RZ ; /* 0xfffffffc24247810 */ /* 0x000fe20007ffe0ff */ /*0630*/ UIADD3 UR4, UR4, 0x4, URZ ; /* 0x0000000404047890 */ /* 0x000fe4000fffe03f */ /*0640*/ LDS.128 R8, [UR5] ; /* 0x00000005ff087984 */ /* 0x000e220008000c00 */ /*0650*/ ISETP.NE.AND P0, PT, R36, RZ, PT ; /* 0x000000ff2400720c */ /* 0x000fe20003f05270 */ /*0660*/ UIADD3 UR6, UR6, 0x10, URZ ; /* 0x0000001006067890 */ /* 0x000fe4000fffe03f */ /*0670*/ UIADD3 UR5, UR5, 0x10, URZ ; /* 0x0000001005057890 */ /* 0x000fe2000fffe03f */ /*0680*/ FFMA R4, R4, R8, R31 ; /* 0x0000000804047223 */ /* 0x001fc8000000001f */ /*0690*/ FFMA R5, R5, R9, R4 ; /* 0x0000000905057223 */ /* 0x000fc80000000004 */ /*06a0*/ FFMA R6, R6, R10, R5 ; /* 0x0000000a06067223 */ /* 0x000fc80000000005 */ /*06b0*/ FFMA R31, R7, R11, R6 ; /* 0x0000000b071f7223 */ /* 0x000fe20000000006 */ /*06c0*/ @P0 BRA 0x610 ; /* 0xffffff4000000947 */ /* 0x000fea000383ffff */ /*06d0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fda0003f05270 */ /*06e0*/ @!P0 BRA 0x790 ; /* 0x000000a000008947 */ /* 0x000fea0003800000 */ /*06f0*/ USHF.L.U32 UR4, UR4, 0x2, URZ ; /* 0x0000000204047899 */ /* 0x000fc8000800063f */ /*0700*/ UIADD3 UR5, UR4, 0x400, URZ ; /* 0x0000040004057890 */ /* 0x000fd2000fffe03f */ /*0710*/ LDS R4, [UR5] ; /* 0x00000005ff047984 */ /* 0x001fe20008000800 */ /*0720*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */ /* 0x000fe20007ffe0ff */ /*0730*/ UIADD3 UR5, UR5, 0x4, URZ ; /* 0x0000000405057890 */ /* 0x000fe4000fffe03f */ /*0740*/ LDS R5, [UR4] ; /* 0x00000004ff057984 */ /* 0x000e220008000800 */ /*0750*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fe20003f05270 */ /*0760*/ UIADD3 UR4, UR4, 0x4, URZ ; /* 0x0000000404047890 */ /* 0x000fe2000fffe03f */ /*0770*/ FFMA R31, R4, R5, R31 ; /* 0x00000005041f7223 */ /* 0x001fd6000000001f */ /*0780*/ @P0 BRA 0x710 ; /* 0xffffff8000000947 */ /* 0x000fea000383ffff */ /*0790*/ STG.E [R2.64], R31 ; /* 0x0000001f02007986 */ /* 0x000fe2000c101908 */ /*07a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*07b0*/ BRA 0x7b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*07c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*07f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0800*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0810*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0820*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0830*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0840*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0850*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0860*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0870*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ .......... Function : _Z10kernel_mulPfS_S_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R11, SR_CTAID.X ; /* 0x00000000000b7919 */ /* 0x000e220000002500 */ /*0020*/ MOV R2, c[0x0][0x4] ; /* 0x0000010000027a02 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0040*/ MOV R7, c[0x0][0x178] ; /* 0x00005e0000077a02 */ /* 0x000fe20000000f00 */ /*0050*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0060*/ MOV R6, 0x4 ; /* 0x0000000400067802 */ /* 0x000fe40000000f00 */ /*0070*/ ISETP.GE.AND P0, PT, R7, 0x1, PT ; /* 0x000000010700780c */ /* 0x000fe20003f06270 */ /*0080*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */ /* 0x000e680000002600 */ /*0090*/ S2R R8, SR_TID.Y ; /* 0x0000000000087919 */ /* 0x000e620000002200 */ /*00a0*/ IMAD R11, R11, c[0x0][0x0], R0 ; /* 0x000000000b0b7a24 */ /* 0x001fc400078e0200 */ /*00b0*/ IMAD R0, R2, c[0x0][0x10], RZ ; /* 0x0000040002007a24 */ /* 0x000fe400078e02ff */ /*00c0*/ IMAD R13, R9, c[0x0][0x4], R8 ; /* 0x00000100090d7a24 */ /* 0x002fc800078e0208 */ /*00d0*/ IMAD R3, R11, R0, R13 ; /* 0x000000000b037224 */ /* 0x000fc800078e020d */ /*00e0*/ IMAD.WIDE R2, R3, R6, c[0x0][0x170] ; /* 0x00005c0003027625 */ /* 0x000fca00078e0206 */ /*00f0*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */ /* 0x0001e2000c101904 */ /*0100*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0110*/ IADD3 R4, R7.reuse, -0x1, RZ ; /* 0xffffffff07047810 */ /* 0x040fe20007ffe0ff */ /*0120*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */ /* 0x000fe200078e00ff */ /*0130*/ LOP3.LUT R7, R7, 0x3, RZ, 0xc0, !PT ; /* 0x0000000307077812 */ /* 0x000fe400078ec0ff */ /*0140*/ ISETP.GE.U32.AND P1, PT, R4, 0x3, PT ; /* 0x000000030400780c */ /* 0x000fe40003f26070 */ /*0150*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*0160*/ MOV R17, RZ ; /* 0x000000ff00117202 */ /* 0x000fd20000000f00 */ /*0170*/ @!P1 BRA 0x380 ; /* 0x0000020000009947 */ /* 0x000fea0003800000 */ /*0180*/ IMAD R5, R11, c[0x0][0x178], RZ ; /* 0x00005e000b057a24 */ /* 0x000fe200078e02ff */ /*0190*/ IADD3 R27, R7, -c[0x0][0x178], RZ ; /* 0x80005e00071b7a10 */ /* 0x000fe40007ffe0ff */ /*01a0*/ MOV R10, RZ ; /* 0x000000ff000a7202 */ /* 0x000fe20000000f00 */ /*01b0*/ IMAD.WIDE R4, R5, R6, c[0x0][0x160] ; /* 0x0000580005047625 */ /* 0x000fe200078e0206 */ /*01c0*/ MOV R17, RZ ; /* 0x000000ff00117202 */ /* 0x000fc60000000f00 */ /*01d0*/ IMAD.WIDE R14, R13, R6, c[0x0][0x168] ; /* 0x00005a000d0e7625 */ /* 0x000fe200078e0206 */ /*01e0*/ LDG.E R16, [R4.64] ; /* 0x0000000404107981 */ /* 0x000ea8000c1e1900 */ /*01f0*/ LDG.E R12, [R14.64] ; /* 0x000000040e0c7981 */ /* 0x000ea4000c1e1900 */ /*0200*/ FFMA R21, R12, R16, R17 ; /* 0x000000100c157223 */ /* 0x006fe20000000011 */ /*0210*/ IMAD.WIDE R16, R0, 0x4, R14 ; /* 0x0000000400107825 */ /* 0x000fc800078e020e */ /*0220*/ STG.E [R2.64], R21 ; /* 0x0000001502007986 */ /* 0x0003e8000c101904 */ /*0230*/ LDG.E R12, [R16.64] ; /* 0x00000004100c7981 */ /* 0x000ea8000c1e1900 */ /*0240*/ LDG.E R18, [R4.64+0x4] ; /* 0x0000040404127981 */ /* 0x000ea4000c1e1900 */ /*0250*/ FFMA R23, R12, R18, R21 ; /* 0x000000120c177223 */ /* 0x004fe20000000015 */ /*0260*/ IMAD.WIDE R18, R0, 0x4, R16 ; /* 0x0000000400127825 */ /* 0x000fc800078e0210 */ /*0270*/ STG.E [R2.64], R23 ; /* 0x0000001702007986 */ /* 0x0003e8000c101904 */ /*0280*/ LDG.E R12, [R18.64] ; /* 0x00000004120c7981 */ /* 0x000ea8000c1e1900 */ /*0290*/ LDG.E R20, [R4.64+0x8] ; /* 0x0000080404147981 */ /* 0x000ea2000c1e1900 */ /*02a0*/ IMAD.WIDE R14, R0, 0x4, R18 ; /* 0x00000004000e7825 */ /* 0x000fe200078e0212 */ /*02b0*/ IADD3 R10, R10, 0x4, RZ ; /* 0x000000040a0a7810 */ /* 0x000fe20007ffe0ff */ /*02c0*/ FFMA R25, R12, R20, R23 ; /* 0x000000140c197223 */ /* 0x004fca0000000017 */ /*02d0*/ STG.E [R2.64], R25 ; /* 0x0000001902007986 */ /* 0x0003e8000c101904 */ /*02e0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */ /* 0x000ea8000c1e1900 */ /*02f0*/ LDG.E R17, [R4.64+0xc] ; /* 0x00000c0404117981 */ /* 0x0006a2000c1e1900 */ /*0300*/ IMAD.IADD R12, R27, 0x1, R10 ; /* 0x000000011b0c7824 */ /* 0x000fe200078e020a */ /*0310*/ LEA R13, R0, R13, 0x2 ; /* 0x0000000d000d7211 */ /* 0x000fc800078e10ff */ /*0320*/ ISETP.NE.AND P1, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fe40003f25270 */ /*0330*/ IADD3 R4, P2, R4, 0x10, RZ ; /* 0x0000001004047810 */ /* 0x008fc80007f5e0ff */ /*0340*/ IADD3.X R5, RZ, R5, RZ, P2, !PT ; /* 0x00000005ff057210 */ /* 0x000fe200017fe4ff */ /*0350*/ FFMA R17, R14, R17, R25 ; /* 0x000000110e117223 */ /* 0x004fca0000000019 */ /*0360*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */ /* 0x0003e2000c101904 */ /*0370*/ @P1 BRA 0x1d0 ; /* 0xfffffe5000001947 */ /* 0x000fea000383ffff */ /*0380*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0390*/ IMAD R5, R11, c[0x0][0x178], R10 ; /* 0x00005e000b057a24 */ /* 0x000fe400078e020a */ /*03a0*/ IMAD R9, R10, c[0x0][0x10], R9 ; /* 0x000004000a097a24 */ /* 0x000fe400078e0209 */ /*03b0*/ IMAD.WIDE R4, R5, R6, c[0x0][0x160] ; /* 0x0000580005047625 */ /* 0x000fc800078e0206 */ /*03c0*/ IMAD R11, R9, c[0x0][0x4], R8 ; /* 0x00000100090b7a24 */ /* 0x000fe200078e0208 */ /*03d0*/ MOV R10, R4 ; /* 0x00000004000a7202 */ /* 0x000fe20000000f00 */ /*03e0*/ IMAD.MOV.U32 R9, RZ, RZ, R5 ; /* 0x000000ffff097224 */ /* 0x000fe400078e0005 */ /*03f0*/ IMAD.WIDE R4, R11, R6, c[0x0][0x168] ; /* 0x00005a000b047625 */ /* 0x000fe200078e0206 */ /*0400*/ MOV R8, R10 ; /* 0x0000000a00087202 */ /* 0x000fca0000000f00 */ /*0410*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea8000c1e1900 */ /*0420*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */ /* 0x0006a2000c1e1900 */ /*0430*/ IADD3 R7, R7, -0x1, RZ ; /* 0xffffffff07077810 */ /* 0x000fe40007ffe0ff */ /*0440*/ IADD3 R10, P1, R10, 0x4, RZ ; /* 0x000000040a0a7810 */ /* 0x000fe40007f3e0ff */ /*0450*/ ISETP.NE.AND P0, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f05270 */ /*0460*/ IADD3 R11, R0, R11, RZ ; /* 0x0000000b000b7210 */ /* 0x000fc40007ffe0ff */ /*0470*/ IADD3.X R9, RZ, R9, RZ, P1, !PT ; /* 0x00000009ff097210 */ /* 0x008fe20000ffe4ff */ /*0480*/ FFMA R17, R4, R8, R17 ; /* 0x0000000804117223 */ /* 0x006fca0000000011 */ /*0490*/ STG.E [R2.64], R17 ; /* 0x0000001102007986 */ /* 0x0003e6000c101904 */ /*04a0*/ @P0 BRA 0x3f0 ; /* 0xffffff4000000947 */ /* 0x000fea000383ffff */ /*04b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*04c0*/ BRA 0x4c0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*04d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0500*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0510*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <cstdio> #include <functional> #include <iostream> #include <random> #define BLOCKSIZE 256 void FillMatrix(float* matrix, int height, int width) { std::mt19937 gen(time(0)); std::uniform_real_distribution<float> distribution(-1.0f, 1.0f); auto generate = std::bind(distribution, gen); for (int i = 0; i < height * width; ++i) { matrix[i] = generate(); } } void PrintMatrix(float *matrix, int height, int width) { for (int i = 0; i < height; ++i) { for (int j = 0; j < width; ++j) { std::cout << matrix[i * width + j] << " "; } std::cout << std::endl; } } __global__ void kernel_mul(float *A, float *B, float *C, int mid_size) { int i = blockIdx.x * blockDim.x + threadIdx.x; int j = blockIdx.y * blockDim.y + threadIdx.y; int height = blockDim.x * gridDim.x; int width = blockDim.y * gridDim.y; C[i * width + j] = 0.0f; for (int k = 0; k < mid_size; ++k) { C[i * width + j] += A[i * mid_size + k] * B[k * width + j]; } } __global__ void kernel_my_mul(float *A, float *B, float *C, int mid_size) { int i = blockIdx.x * blockDim.x + threadIdx.x; int j = blockIdx.y * blockDim.y + threadIdx.y; int height = blockDim.x * gridDim.x; int width = blockDim.y * gridDim.y; __shared__ float block_a[BLOCKSIZE]; __shared__ float block_b[BLOCKSIZE]; block_a[threadIdx.y] = A[i * width + threadIdx.y]; block_b[threadIdx.x] = B[threadIdx.x * height + j]; __syncthreads(); C[i * width + j] = 0.0f; for (int k = 0; k < mid_size; ++k) { C[i * width + j] += block_a[k] * block_b[k]; } } void try_both_multiplications(float *h_A, float *h_B, float *h_C) { float* d_A; float* d_B; float* d_C; hipMalloc(&d_A, sizeof(float) * 128 * 384); hipMalloc(&d_B, sizeof(float) * 384 * 256); hipMalloc(&d_C, sizeof(float) * 128 * 256); hipMemcpy(d_A, h_A, sizeof(float) * 128 * 384, hipMemcpyHostToDevice); hipMemcpy(d_B, h_B, sizeof(float) * 384 * 256, hipMemcpyHostToDevice); // kernel call dim3 num_blocks(8, 16); dim3 block_size(16, 16); hipEvent_t start; hipEvent_t stop; hipEventCreate(&start); hipEventCreate(&stop); hipEventRecord(start); kernel_mul<<<num_blocks, block_size>>>(d_A, d_B, d_C, 384); hipEventRecord(stop); hipMemcpy(h_C, d_C, sizeof(float) * 128 * 256, hipMemcpyDeviceToHost); hipEventSynchronize(stop); float milliseconds = 0; hipEventElapsedTime(&milliseconds, start, stop); std::cout << "banal elapsed in " << milliseconds << std::endl; PrintMatrix(h_C, 128, 256); hipEvent_t start2; hipEvent_t stop2; hipEventCreate(&start2); hipEventCreate(&stop2); hipEventRecord(start2); kernel_my_mul<<<num_blocks, block_size>>>(d_A, d_B, d_C, 384); hipEventRecord(stop2); hipMemcpy(h_C, d_C, sizeof(float) * 128 * 256, hipMemcpyDeviceToHost); hipEventSynchronize(stop2); float milliseconds2 = 0; hipEventElapsedTime(&milliseconds2, start2, stop2); std::cout << "shared memory elapsed in " << milliseconds2 << std::endl; PrintMatrix(h_C, 128, 256); hipFree(d_A); hipFree(d_B); hipFree(d_C); } int main() { float *h_A; float *h_B; float *h_C; // h_A 128 * 384 // h_B 384 * 256 // h_C 128 * 256 h_A = new float[128 * 384]; h_B = new float[384 * 256]; h_C = new float[128 * 256]; FillMatrix(h_A, 128, 384); FillMatrix(h_B, 384, 256); try_both_multiplications(h_A, h_B, h_C); delete[] h_A; delete[] h_B; delete[] h_C; return 0; }
.text .file "my_calc.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z10FillMatrixPfii # -- Begin function _Z10FillMatrixPfii .type _Z10FillMatrixPfii,@function _Z10FillMatrixPfii: # @_Z10FillMatrixPfii .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $10016, %rsp # imm = 0x2720 .cfi_def_cfa_offset 10064 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %edx, %ebp movl %esi, %r14d movq %rdi, %rbx xorl %edi, %edi callq time movl %eax, %eax movq %rax, 8(%rsp) movl $1, %ecx .LBB0_1: # =>This Inner Loop Header: Depth=1 movq %rax, %rdx shrq $30, %rdx xorl %eax, %edx imull $1812433253, %edx, %eax # imm = 0x6C078965 addl %ecx, %eax movq %rax, 8(%rsp,%rcx,8) incq %rcx cmpq $624, %rcx # imm = 0x270 jne .LBB0_1 # %bb.2: # %_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEC2Em.exit leaq 8(%rsp), %rsi movq $624, 4992(%rsi) # imm = 0x270 movabsq $4575657224621260800, %rax # imm = 0x3F800000BF800000 leaq 5016(%rsp), %r15 movq %rax, -8(%r15) movl $5000, %edx # imm = 0x1388 movq %r15, %rdi callq memcpy@PLT imull %r14d, %ebp testl %ebp, %ebp jle .LBB0_5 # %bb.3: # %.lr.ph.preheader movl %ebp, %r14d xorl %r12d, %r12d .LBB0_4: # %.lr.ph # =>This Inner Loop Header: Depth=1 movq %r15, %rdi callq _ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_ movss 5008(%rsp), %xmm1 # xmm1 = mem[0],zero,zero,zero movss 5012(%rsp), %xmm2 # xmm2 = mem[0],zero,zero,zero subss %xmm1, %xmm2 mulss %xmm0, %xmm2 addss %xmm1, %xmm2 movss %xmm2, (%rbx,%r12,4) incq %r12 cmpq %r12, %r14 jne .LBB0_4 .LBB0_5: # %._crit_edge addq $10016, %rsp # imm = 0x2720 .cfi_def_cfa_offset 48 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z10FillMatrixPfii, .Lfunc_end0-_Z10FillMatrixPfii .cfi_endproc # -- End function .globl _Z11PrintMatrixPfii # -- Begin function _Z11PrintMatrixPfii .type _Z11PrintMatrixPfii,@function _Z11PrintMatrixPfii: # @_Z11PrintMatrixPfii .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rdi, 8(%rsp) # 8-byte Spill testl %esi, %esi jle .LBB1_6 # %bb.1: # %.preheader.lr.ph movl %edx, %ebx movl %esi, %eax movq %rax, 16(%rsp) # 8-byte Spill movl %edx, %r12d xorl %r13d, %r13d xorl %ebp, %ebp .LBB1_2: # %.preheader # =>This Loop Header: Depth=1 # Child Loop BB1_4 Depth 2 testl %ebx, %ebx jle .LBB1_5 # %bb.3: # %.lr.ph # in Loop: Header=BB1_2 Depth=1 movl %r13d, %eax movq 8(%rsp), %rcx # 8-byte Reload leaq (%rcx,%rax,4), %r14 xorl %r15d, %r15d .LBB1_4: # Parent Loop BB1_2 Depth=1 # => This Inner Loop Header: Depth=2 xorps %xmm0, %xmm0 cvtss2sd (%r14,%r15,4), %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movl $.L.str, %esi movl $1, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l incq %r15 cmpq %r15, %r12 jne .LBB1_4 .LBB1_5: # %._crit_edge # in Loop: Header=BB1_2 Depth=1 movq _ZSt4cout(%rip), %rax movq -24(%rax), %rdi movl $_ZSt4cout, %eax addq %rax, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movl $_ZSt4cout, %edi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv incq %rbp addl %ebx, %r13d cmpq 16(%rsp), %rbp # 8-byte Folded Reload jne .LBB1_2 .LBB1_6: # %._crit_edge13 addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z11PrintMatrixPfii, .Lfunc_end1-_Z11PrintMatrixPfii .cfi_endproc # -- End function .globl _Z25__device_stub__kernel_mulPfS_S_i # -- Begin function _Z25__device_stub__kernel_mulPfS_S_i .type _Z25__device_stub__kernel_mulPfS_S_i,@function _Z25__device_stub__kernel_mulPfS_S_i: # @_Z25__device_stub__kernel_mulPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z10kernel_mulPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z25__device_stub__kernel_mulPfS_S_i, .Lfunc_end2-_Z25__device_stub__kernel_mulPfS_S_i .cfi_endproc # -- End function .globl _Z28__device_stub__kernel_my_mulPfS_S_i # -- Begin function _Z28__device_stub__kernel_my_mulPfS_S_i .type _Z28__device_stub__kernel_my_mulPfS_S_i,@function _Z28__device_stub__kernel_my_mulPfS_S_i: # @_Z28__device_stub__kernel_my_mulPfS_S_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rdi movq %rsi, (%rdi) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 4(%rsp), %rdx movl %ecx, (%rdx) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z13kernel_my_mulPfS_S_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end3: .size _Z28__device_stub__kernel_my_mulPfS_S_i, .Lfunc_end3-_Z28__device_stub__kernel_my_mulPfS_S_i .cfi_endproc # -- End function .globl _Z24try_both_multiplicationsPfS_S_ # -- Begin function _Z24try_both_multiplicationsPfS_S_ .type _Z24try_both_multiplicationsPfS_S_,@function _Z24try_both_multiplicationsPfS_S_: # @_Z24try_both_multiplicationsPfS_S_ .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $72, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r12 movabsq $68719476744, %r14 # imm = 0x1000000008 leaq 40(%rsp), %r13 movl $196608, %esi # imm = 0x30000 movq %r13, %rdi callq hipMalloc leaq 32(%rsp), %rbp movl $393216, %esi # imm = 0x60000 movq %rbp, %rdi callq hipMalloc leaq 8(%rsp), %rdi movl $131072, %esi # imm = 0x20000 callq hipMalloc movq (%r13), %rdi movl $196608, %edx # imm = 0x30000 movq %r12, %rsi movl $1, %ecx callq hipMemcpy movq (%rbp), %rdi movl $393216, %edx # imm = 0x60000 movq %r15, %rsi movl $1, %ecx callq hipMemcpy leaq 56(%rsp), %r15 movq %r15, %rdi callq hipEventCreate leaq 24(%rsp), %rdi callq hipEventCreate movq (%r15), %rdi xorl %esi, %esi callq hipEventRecord leaq 8(%r14), %r15 movq %r14, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB4_2 # %bb.1: movq 40(%rsp), %rdi movq 32(%rsp), %rsi movq 8(%rsp), %rdx movl $384, %ecx # imm = 0x180 callq _Z25__device_stub__kernel_mulPfS_S_i .LBB4_2: movq 24(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movq 8(%rsp), %rsi movl $131072, %edx # imm = 0x20000 movq %rbx, %rdi movl $2, %ecx callq hipMemcpy movq 24(%rsp), %rdi callq hipEventSynchronize leaq 68(%rsp), %r12 movl $0, (%r12) movq 56(%rsp), %rsi movq 24(%rsp), %rdx movq %r12, %rdi callq hipEventElapsedTime movl $_ZSt4cout, %edi movl $.L.str.1, %esi movl $17, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l cvtss2sd (%r12), %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r12 movq (%rax), %rax movq -24(%rax), %rdi addq %r12, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r12, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv movq %rbx, %rdi movl $128, %esi movl $256, %edx # imm = 0x100 callq _Z11PrintMatrixPfii leaq 48(%rsp), %r12 movq %r12, %rdi callq hipEventCreate leaq 16(%rsp), %rdi callq hipEventCreate movq (%r12), %rdi xorl %esi, %esi callq hipEventRecord movq %r14, %rdi movl $1, %esi movq %r15, %rdx movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB4_4 # %bb.3: movq 40(%rsp), %rdi movq 32(%rsp), %rsi movq 8(%rsp), %rdx movl $384, %ecx # imm = 0x180 callq _Z28__device_stub__kernel_my_mulPfS_S_i .LBB4_4: movq 16(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movq 8(%rsp), %rsi movl $131072, %edx # imm = 0x20000 movq %rbx, %rdi movl $2, %ecx callq hipMemcpy movq 16(%rsp), %rdi callq hipEventSynchronize leaq 64(%rsp), %r14 movl $0, (%r14) movq 48(%rsp), %rsi movq 16(%rsp), %rdx movq %r14, %rdi callq hipEventElapsedTime movl $_ZSt4cout, %edi movl $.L.str.2, %esi movl $25, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l xorps %xmm0, %xmm0 cvtss2sd (%r14), %xmm0 movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIdEERSoT_ movq %rax, %r14 movq (%rax), %rax movq -24(%rax), %rdi addq %r14, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %r14, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv movq %rbx, %rdi movl $128, %esi movl $256, %edx # imm = 0x100 callq _Z11PrintMatrixPfii movq 40(%rsp), %rdi callq hipFree movq 32(%rsp), %rdi callq hipFree movq 8(%rsp), %rdi callq hipFree addq $72, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end4: .size _Z24try_both_multiplicationsPfS_S_, .Lfunc_end4-_Z24try_both_multiplicationsPfS_S_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 movl $196608, %edi # imm = 0x30000 callq _Znam movq %rax, %rbx movl $393216, %edi # imm = 0x60000 callq _Znam movq %rax, %r14 movl $131072, %edi # imm = 0x20000 callq _Znam movq %rax, %r15 movq %rbx, %rdi movl $128, %esi movl $384, %edx # imm = 0x180 callq _Z10FillMatrixPfii movq %r14, %rdi movl $384, %esi # imm = 0x180 movl $256, %edx # imm = 0x100 callq _Z10FillMatrixPfii movq %rbx, %rdi movq %r14, %rsi movq %r15, %rdx callq _Z24try_both_multiplicationsPfS_S_ movq %rbx, %rdi callq _ZdaPv movq %r14, %rdi callq _ZdaPv movq %r15, %rdi callq _ZdaPv xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end5: .size main, .Lfunc_end5-main .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function _ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_ .LCPI6_0: .long 0x4f800000 # float 4.2949673E+9 .LCPI6_1: .long 0x40000000 # float 2 .LCPI6_2: .long 0x5f000000 # float 9.22337203E+18 .LCPI6_3: .long 0x3f800000 # float 1 .section .text._ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,comdat .weak _ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_ .type _ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_,@function _ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_: # @_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_ .cfi_startproc # %bb.0: pushq %r14 .cfi_def_cfa_offset 16 pushq %rbx .cfi_def_cfa_offset 24 subq $56, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -24 .cfi_offset %r14, -16 movq %rdi, %rbx flds .LCPI6_0(%rip) fstpt (%rsp) callq logl fstpt 36(%rsp) # 10-byte Folded Spill flds .LCPI6_1(%rip) fstpt (%rsp) callq logl fldt 36(%rsp) # 10-byte Folded Reload fdivp %st, %st(1) flds .LCPI6_2(%rip) xorl %ecx, %ecx fxch %st(1) fucomi %st(1), %st fldz fcmovnb %st(2), %st fstp %st(2) fsubp %st, %st(1) setae %cl fnstcw 28(%rsp) movzwl 28(%rsp), %eax orl $3072, %eax # imm = 0xC00 movw %ax, 30(%rsp) fldcw 30(%rsp) fistpll 48(%rsp) fldcw 28(%rsp) shlq $63, %rcx xorq 48(%rsp), %rcx leaq 23(%rcx), %rax xorl %edx, %edx divq %rcx movq %rax, %r14 cmpq $1, %rax adcq $0, %r14 xorps %xmm0, %xmm0 movss .LCPI6_3(%rip), %xmm2 # xmm2 = mem[0],zero,zero,zero .LBB6_1: # %select.unfold # =>This Inner Loop Header: Depth=1 movss %xmm2, 32(%rsp) # 4-byte Spill movss %xmm0, 36(%rsp) # 4-byte Spill movq %rbx, %rdi callq _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv testq %rax, %rax js .LBB6_2 # %bb.3: # %select.unfold # in Loop: Header=BB6_1 Depth=1 xorps %xmm0, %xmm0 cvtsi2ss %rax, %xmm0 jmp .LBB6_4 .LBB6_2: # in Loop: Header=BB6_1 Depth=1 movq %rax, %rcx shrq %rcx andl $1, %eax orq %rcx, %rax xorps %xmm0, %xmm0 cvtsi2ss %rax, %xmm0 addss %xmm0, %xmm0 .LBB6_4: # %select.unfold # in Loop: Header=BB6_1 Depth=1 movss 32(%rsp), %xmm2 # 4-byte Reload # xmm2 = mem[0],zero,zero,zero mulss %xmm2, %xmm0 movss 36(%rsp), %xmm1 # 4-byte Reload # xmm1 = mem[0],zero,zero,zero addss %xmm0, %xmm1 movaps %xmm1, %xmm0 mulss .LCPI6_0(%rip), %xmm2 decq %r14 jne .LBB6_1 # %bb.5: divss %xmm2, %xmm0 ucomiss .LCPI6_3(%rip), %xmm0 jae .LBB6_7 # %bb.6: addq $56, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 retq .LBB6_7: .cfi_def_cfa_offset 80 movss .LCPI6_3(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero xorps %xmm1, %xmm1 addq $56, %rsp .cfi_def_cfa_offset 24 popq %rbx .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 jmp nextafterf # TAILCALL .Lfunc_end6: .size _ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_, .Lfunc_end6-_ZSt18generate_canonicalIfLm24ESt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEET_RT1_ .cfi_endproc # -- End function .section .text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,comdat .weak _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv # -- Begin function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv .p2align 1, 0x90 .type _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv,@function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv: # @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 .cfi_offset %rbx, -16 movq %rdi, %rbx movq 4992(%rdi), %rax cmpq $624, %rax # imm = 0x270 jb .LBB7_2 # %bb.1: movq %rbx, %rdi callq _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv movq 4992(%rbx), %rax .LBB7_2: leaq 1(%rax), %rcx movq %rcx, 4992(%rbx) movq (%rbx,%rax,8), %rax movq %rax, %rcx shrq $11, %rcx movl %ecx, %ecx xorq %rax, %rcx movl %ecx, %eax shll $7, %eax andl $-1658038656, %eax # imm = 0x9D2C5680 xorq %rcx, %rax movl %eax, %ecx shll $15, %ecx andl $-272236544, %ecx # imm = 0xEFC60000 xorq %rax, %rcx movq %rcx, %rax shrq $18, %rax xorq %rcx, %rax popq %rbx .cfi_def_cfa_offset 8 retq .Lfunc_end7: .size _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv, .Lfunc_end7-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EEclEv .cfi_endproc # -- End function .section .text._ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,comdat .weak _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv # -- Begin function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv .p2align 1, 0x90 .type _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv,@function _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv: # @_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv .cfi_startproc # %bb.0: movl $2567483615, %eax # imm = 0x9908B0DF movq (%rdi), %rdx xorl %ecx, %ecx .LBB8_1: # =>This Inner Loop Header: Depth=1 andq $-2147483648, %rdx # imm = 0x80000000 movq 8(%rdi,%rcx,8), %rsi movl %esi, %r8d andl $2147483646, %r8d # imm = 0x7FFFFFFE orq %rdx, %r8 shrq %r8 xorq 3176(%rdi,%rcx,8), %r8 movq %rsi, %rdx # kill: def $esi killed $esi killed $rsi def $rsi andl $1, %esi negl %esi andl %eax, %esi xorq %r8, %rsi movq %rsi, (%rdi,%rcx,8) leaq 1(%rcx), %rsi movq %rsi, %rcx cmpq $227, %rsi jne .LBB8_1 # %bb.2: # %.preheader.preheader movq 1816(%rdi), %rdx movl $228, %ecx .LBB8_3: # %.preheader # =>This Inner Loop Header: Depth=1 andq $-2147483648, %rdx # imm = 0x80000000 movq (%rdi,%rcx,8), %rsi movl %esi, %r8d andl $2147483646, %r8d # imm = 0x7FFFFFFE orq %rdx, %r8 shrq %r8 xorq -1824(%rdi,%rcx,8), %r8 movq %rsi, %rdx # kill: def $esi killed $esi killed $rsi def $rsi andl $1, %esi negl %esi andl %eax, %esi xorq %r8, %rsi movq %rsi, -8(%rdi,%rcx,8) incq %rcx cmpq $624, %rcx # imm = 0x270 jne .LBB8_3 # %bb.4: movq $-2147483648, %rcx # imm = 0x80000000 andq 4984(%rdi), %rcx movq (%rdi), %rdx movl %edx, %esi andl $2147483646, %esi # imm = 0x7FFFFFFE orq %rcx, %rsi shrq %rsi xorq 3168(%rdi), %rsi andl $1, %edx negl %edx andl %eax, %edx xorq %rsi, %rdx movq %rdx, 4984(%rdi) movq $0, 4992(%rdi) retq .Lfunc_end8: .size _ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv, .Lfunc_end8-_ZNSt23mersenne_twister_engineImLm32ELm624ELm397ELm31ELm2567483615ELm11ELm4294967295ELm7ELm2636928640ELm15ELm4022730752ELm18ELm1812433253EE11_M_gen_randEv .cfi_endproc # -- End function .text .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $32, %rsp .cfi_def_cfa_offset 48 .cfi_offset %rbx, -16 movq __hip_gpubin_handle(%rip), %rbx testq %rbx, %rbx jne .LBB9_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rbx movq %rax, __hip_gpubin_handle(%rip) .LBB9_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z10kernel_mulPfS_S_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z13kernel_my_mulPfS_S_i, %esi movl $.L__unnamed_2, %edx movl $.L__unnamed_2, %ecx movq %rbx, %rdi movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $32, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end9: .size __hip_module_ctor, .Lfunc_end9-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB10_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB10_2: retq .Lfunc_end10: .size __hip_module_dtor, .Lfunc_end10-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz " " .size .L.str, 2 .type _Z10kernel_mulPfS_S_i,@object # @_Z10kernel_mulPfS_S_i .section .rodata,"a",@progbits .globl _Z10kernel_mulPfS_S_i .p2align 3, 0x0 _Z10kernel_mulPfS_S_i: .quad _Z25__device_stub__kernel_mulPfS_S_i .size _Z10kernel_mulPfS_S_i, 8 .type _Z13kernel_my_mulPfS_S_i,@object # @_Z13kernel_my_mulPfS_S_i .globl _Z13kernel_my_mulPfS_S_i .p2align 3, 0x0 _Z13kernel_my_mulPfS_S_i: .quad _Z28__device_stub__kernel_my_mulPfS_S_i .size _Z13kernel_my_mulPfS_S_i, 8 .type .L.str.1,@object # @.str.1 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.1: .asciz "banal elapsed in " .size .L.str.1, 18 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "shared memory elapsed in " .size .L.str.2, 26 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z10kernel_mulPfS_S_i" .size .L__unnamed_1, 22 .type .L__unnamed_2,@object # @1 .L__unnamed_2: .asciz "_Z13kernel_my_mulPfS_S_i" .size .L__unnamed_2, 25 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z25__device_stub__kernel_mulPfS_S_i .addrsig_sym _Z28__device_stub__kernel_my_mulPfS_S_i .addrsig_sym __gxx_personality_v0 .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _ZSt4cout .addrsig_sym _Z10kernel_mulPfS_S_i .addrsig_sym _Z13kernel_my_mulPfS_S_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z10kernel_mulPfS_S_i ; -- Begin function _Z10kernel_mulPfS_S_i .globl _Z10kernel_mulPfS_S_i .p2align 8 .type _Z10kernel_mulPfS_S_i,@function _Z10kernel_mulPfS_S_i: ; @_Z10kernel_mulPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s2, s[0:1], 0x2c s_load_b32 s4, s[0:1], 0x24 v_dual_mov_b32 v6, 0 :: v_dual_and_b32 v1, 0x3ff, v0 v_bfe_u32 v2, v0, 10, 10 s_load_b32 s5, s[0:1], 0x18 s_waitcnt lgkmcnt(0) s_lshr_b32 s3, s2, 16 s_and_b32 s2, s2, 0xffff s_mul_i32 s4, s4, s3 v_mad_u64_u32 v[4:5], null, s14, s2, v[1:2] v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3] s_load_b64 s[2:3], s[0:1], 0x10 s_cmp_lt_i32 s5, 1 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s4, v4, v[0:1] v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[2:3], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s2, v2 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo global_store_b32 v[2:3], v6, off s_cbranch_scc1 .LBB0_3 ; %bb.1: ; %.lr.ph s_load_b128 s[0:3], s[0:1], 0x0 v_mul_lo_u32 v4, v4, s5 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v5, 31, v4 v_lshlrev_b64 v[4:5], 2, v[4:5] s_waitcnt lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v4, vcc_lo, s0, v4 v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo .LBB0_2: ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v1, 31, v0 s_add_i32 s5, s5, -1 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) s_cmp_eq_u32 s5, 0 v_lshlrev_b64 v[7:8], 2, v[0:1] v_add_nc_u32_e32 v0, s4, v0 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_u32 v7, vcc_lo, s2, v7 v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo global_load_b32 v1, v[4:5], off global_load_b32 v7, v[7:8], off v_add_co_u32 v4, vcc_lo, v4, 4 v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo s_waitcnt vmcnt(0) v_fmac_f32_e32 v6, v1, v7 global_store_b32 v[2:3], v6, off s_cbranch_scc0 .LBB0_2 .LBB0_3: ; %._crit_edge s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z10kernel_mulPfS_S_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 9 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z10kernel_mulPfS_S_i, .Lfunc_end0-_Z10kernel_mulPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 312 ; NumSgprs: 18 ; NumVgprs: 9 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 9 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .protected _Z13kernel_my_mulPfS_S_i ; -- Begin function _Z13kernel_my_mulPfS_S_i .globl _Z13kernel_my_mulPfS_S_i .p2align 8 .type _Z13kernel_my_mulPfS_S_i,@function _Z13kernel_my_mulPfS_S_i: ; @_Z13kernel_my_mulPfS_S_i ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x2c s_load_b64 s[2:3], s[0:1], 0x20 v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v2, 0x3ff, v0 s_waitcnt lgkmcnt(0) s_and_b32 s8, s4, 0xffff s_lshr_b32 s9, s4, 16 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_mad_u64_u32 v[3:4], null, s14, s8, v[2:3] v_bfe_u32 v4, v0, 10, 10 s_mul_i32 s3, s3, s9 s_load_b128 s[4:7], s[0:1], 0x0 v_mul_lo_u32 v8, s2, v2 v_mad_u64_u32 v[5:6], null, s15, s9, v[4:5] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_mul_lo_u32 v3, s3, v3 s_clause 0x1 s_load_b64 s[2:3], s[0:1], 0x10 s_load_b32 s0, s[0:1], 0x18 s_mov_b32 s1, 0 v_mad_u64_u32 v[6:7], null, v8, s8, v[5:6] s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_dual_mov_b32 v7, v1 :: v_dual_add_nc_u32 v0, v3, v4 v_add_nc_u32_e32 v5, v3, v5 v_lshlrev_b32_e32 v4, 2, v4 v_lshlrev_b64 v[8:9], 2, v[0:1] s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[6:7], 2, v[6:7] s_waitcnt lgkmcnt(0) v_add_co_u32 v8, vcc_lo, s4, v8 s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3) v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo v_add_co_u32 v6, vcc_lo, s6, v6 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo global_load_b32 v0, v[8:9], off global_load_b32 v7, v[6:7], off v_ashrrev_i32_e32 v6, 31, v5 v_lshlrev_b32_e32 v8, 2, v2 s_cmp_lt_i32 s0, 1 s_waitcnt vmcnt(1) ds_store_b32 v4, v0 s_waitcnt vmcnt(0) ds_store_b32 v8, v7 offset:1024 v_lshlrev_b64 v[5:6], 2, v[5:6] s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_add_co_u32 v2, vcc_lo, s2, v5 v_add_co_ci_u32_e32 v3, vcc_lo, s3, v6, vcc_lo global_store_b32 v[2:3], v1, off s_cbranch_scc1 .LBB1_3 .LBB1_1: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 v_mov_b32_e32 v0, s1 s_add_i32 s0, s0, -1 s_add_i32 s1, s1, 4 s_cmp_eq_u32 s0, 0 ds_load_2addr_stride64_b32 v[4:5], v0 offset1:4 s_waitcnt lgkmcnt(0) v_fmac_f32_e32 v1, v4, v5 s_cbranch_scc0 .LBB1_1 ; %bb.2: ; %._crit_edge global_store_b32 v[2:3], v1, off .LBB1_3: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z13kernel_my_mulPfS_S_i .amdhsa_group_segment_fixed_size 2048 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 288 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 10 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end1: .size _Z13kernel_my_mulPfS_S_i, .Lfunc_end1-_Z13kernel_my_mulPfS_S_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 372 ; NumSgprs: 18 ; NumVgprs: 10 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 2048 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 10 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z10kernel_mulPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z10kernel_mulPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 9 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: hidden_block_count_x - .offset: 36 .size: 4 .value_kind: hidden_block_count_y - .offset: 40 .size: 4 .value_kind: hidden_block_count_z - .offset: 44 .size: 2 .value_kind: hidden_group_size_x - .offset: 46 .size: 2 .value_kind: hidden_group_size_y - .offset: 48 .size: 2 .value_kind: hidden_group_size_z - .offset: 50 .size: 2 .value_kind: hidden_remainder_x - .offset: 52 .size: 2 .value_kind: hidden_remainder_y - .offset: 54 .size: 2 .value_kind: hidden_remainder_z - .offset: 72 .size: 8 .value_kind: hidden_global_offset_x - .offset: 80 .size: 8 .value_kind: hidden_global_offset_y - .offset: 88 .size: 8 .value_kind: hidden_global_offset_z - .offset: 96 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 2048 .kernarg_segment_align: 8 .kernarg_segment_size: 288 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z13kernel_my_mulPfS_S_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z13kernel_my_mulPfS_S_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 10 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
ea6448f46b73cb404ea9bef456310635684b48c3
#include <stdio.h> #include <stdlib.h> #include <cuda.h> #include <cuda_runtime.h> static const int N = 10; #define CHECK_STATUS(status) \ if (status != cudaSuccess) \ fprintf(stderr, "File: %s\nLine:%d Function:%s>>>%s\n", __FILE__, __LINE__, __FUNCTION__,\ cudaGetErrorString(status)) // __global__ void VecAdd(float *A, float *B, float *C) { int i = threadIdx.x; C[i] = A[i] + B[i]; } int main(int argc, char **argv) { CHECK_STATUS(cudaSetDevice(0)); float a[N]; float b[N]; for(int i = 0;i<N;i++){ a[i] = i; b[i] = i; } float c[N]; float *d_a,*d_b,*d_c; //分配显存 CHECK_STATUS(cudaMalloc(&d_a, N*sizeof(float))); CHECK_STATUS(cudaMalloc(&d_b, N*sizeof(float))); CHECK_STATUS(cudaMalloc(&d_c, N*sizeof(float))); // 把数据从内存复制到显存 CHECK_STATUS(cudaMemcpy(d_a,a,N* sizeof(float),cudaMemcpyHostToDevice)); CHECK_STATUS(cudaMemcpy(d_b,b,N* sizeof(float),cudaMemcpyHostToDevice)); // 调用kernel VecAdd<<<1,N>>>(d_a,d_b,d_c); // 检查错误 CHECK_STATUS(cudaGetLastError()); // 从显存把数据复制到内存 CHECK_STATUS(cudaMemcpy(c,d_c,N* sizeof(float),cudaMemcpyDeviceToHost)); // 打印 for(int i=0;i<N;i++) printf("%f ",c[i]); printf("\n"); //释放显存 CHECK_STATUS(cudaFree(d_a)); CHECK_STATUS(cudaFree(d_b)); CHECK_STATUS(cudaFree(d_c)); return 0; }
.file "tmpxft_0036894f_00000000-6_sample_2.1.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2030: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2030: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z29__device_stub__Z6VecAddPfS_S_PfS_S_ .type _Z29__device_stub__Z6VecAddPfS_S_PfS_S_, @function _Z29__device_stub__Z6VecAddPfS_S_PfS_S_: .LFB2052: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z6VecAddPfS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2052: .size _Z29__device_stub__Z6VecAddPfS_S_PfS_S_, .-_Z29__device_stub__Z6VecAddPfS_S_PfS_S_ .globl _Z6VecAddPfS_S_ .type _Z6VecAddPfS_S_, @function _Z6VecAddPfS_S_: .LFB2053: .cfi_startproc endbr64 jmp _Z29__device_stub__Z6VecAddPfS_S_PfS_S_ .cfi_endproc .LFE2053: .size _Z6VecAddPfS_S_, .-_Z6VecAddPfS_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "main" .LC1: .string "/home/ubuntu/Datasets/stackv2/train-structured/Mannix1994/CUDA_Document_Samples/master/2/sample_2.1.cu" .LC2: .string "File: %s\nLine:%d Function:%s>>>%s\n" .LC3: .string "%f " .LC4: .string "\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2027: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 xorl %edi, %edi pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 subq $176, %rsp .cfi_def_cfa_offset 208 movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax call cudaSetDevice@PLT testl %eax, %eax je .L9 xorl %edi, %edi call cudaSetDevice@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $21, %r8d leaq .LC0(%rip), %r9 leaq .LC1(%rip), %rcx pushq %r11 .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi leaq .LC2(%rip), %rdx movl $2, %esi pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %rbx .cfi_def_cfa_offset 216 popq %rbp .cfi_def_cfa_offset 208 .L9: xorl %eax, %eax leaq 48(%rsp), %rbp leaq 88(%rsp), %rbx .L10: cvtsi2ssl %eax, %xmm0 movss %xmm0, 0(%rbp,%rax,4) movss %xmm0, (%rbx,%rax,4) incq %rax cmpq $10, %rax jne .L10 movq %rsp, %r12 movl $40, %esi movq %r12, %rdi call cudaMalloc@PLT testl %eax, %eax je .L11 movl $40, %esi movq %r12, %rdi call cudaMalloc@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $33, %r8d leaq .LC0(%rip), %r9 leaq .LC1(%rip), %rcx pushq %r10 .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi leaq .LC2(%rip), %rdx movl $2, %esi pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT movq %r12, %rsp .cfi_def_cfa_offset 208 .L11: leaq 8(%rsp), %r12 movl $40, %esi movq %r12, %rdi call cudaMalloc@PLT testl %eax, %eax je .L12 movl $40, %esi movq %r12, %rdi call cudaMalloc@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $34, %r8d leaq .LC0(%rip), %r9 leaq .LC1(%rip), %rcx pushq %rdi .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi leaq .LC2(%rip), %rdx movl $2, %esi pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %r8 .cfi_def_cfa_offset 216 popq %r9 .cfi_def_cfa_offset 208 .L12: leaq 16(%rsp), %r12 movl $40, %esi movq %r12, %rdi call cudaMalloc@PLT testl %eax, %eax je .L13 movl $40, %esi movq %r12, %rdi call cudaMalloc@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $2, %esi leaq .LC1(%rip), %rcx leaq .LC0(%rip), %r9 pushq %rdx .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi movl $35, %r8d leaq .LC2(%rip), %rdx pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %rcx .cfi_def_cfa_offset 216 popq %rsi .cfi_def_cfa_offset 208 .L13: movq (%rsp), %rdi movl $1, %ecx movl $40, %edx movq %rbp, %rsi call cudaMemcpy@PLT testl %eax, %eax je .L14 movq (%rsp), %rdi movq %rbp, %rsi movl $1, %ecx movl $40, %edx call cudaMemcpy@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $38, %r8d leaq .LC0(%rip), %r9 leaq .LC1(%rip), %rcx pushq %r11 .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi leaq .LC2(%rip), %rdx movl $2, %esi pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %rbp .cfi_def_cfa_offset 216 popq %r12 .cfi_def_cfa_offset 208 .L14: movq 8(%rsp), %rdi movl $1, %ecx movl $40, %edx movq %rbx, %rsi call cudaMemcpy@PLT testl %eax, %eax je .L15 movq 8(%rsp), %rdi movl $1, %ecx movl $40, %edx movq %rbx, %rsi call cudaMemcpy@PLT movl %eax, %edi call cudaGetErrorString@PLT leaq .LC0(%rip), %r9 movl $2, %esi leaq .LC1(%rip), %rcx pushq %r8 .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi movl $39, %r8d leaq .LC2(%rip), %rdx pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %r9 .cfi_def_cfa_offset 216 popq %r10 .cfi_def_cfa_offset 208 .L15: movl $2147483653, %edx xorl %r9d, %r9d xorl %r8d, %r8d movl $1, %ecx addq %rdx, %rdx movl $1, %esi movabsq $4294967297, %rdi movl $1, 44(%rsp) movq %rdx, 36(%rsp) movq %rdi, 24(%rsp) movl $1, 32(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L16 movq 16(%rsp), %rdx movq 8(%rsp), %rsi movq (%rsp), %rdi call _Z29__device_stub__Z6VecAddPfS_S_PfS_S_ .L16: call cudaGetLastError@PLT testl %eax, %eax je .L17 call cudaGetLastError@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $2, %esi leaq .LC0(%rip), %r9 movl $45, %r8d pushq %rcx .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi leaq .LC1(%rip), %rcx leaq .LC2(%rip), %rdx pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %rsi .cfi_def_cfa_offset 216 popq %rdi .cfi_def_cfa_offset 208 .L17: movq 16(%rsp), %rsi movl $2, %ecx movl $40, %edx leaq 128(%rsp), %rbp movq %rbp, %rdi call cudaMemcpy@PLT testl %eax, %eax je .L18 movq 16(%rsp), %rsi movl $2, %ecx movl $40, %edx movq %rbp, %rdi call cudaMemcpy@PLT movl %eax, %edi call cudaGetErrorString@PLT pushq %r12 .cfi_def_cfa_offset 216 movl $2, %esi movq stderr(%rip), %rdi pushq %rax .cfi_def_cfa_offset 224 leaq .LC2(%rip), %rdx xorl %eax, %eax leaq .LC0(%rip), %r9 movl $48, %r8d leaq .LC1(%rip), %rcx call __fprintf_chk@PLT popq %rax .cfi_def_cfa_offset 216 popq %rdx .cfi_def_cfa_offset 208 .L18: xorl %ebx, %ebx leaq .LC3(%rip), %r12 .L19: cvtss2sd 0(%rbp,%rbx,4), %xmm0 movq %r12, %rsi movl $2, %edi movb $1, %al call __printf_chk@PLT incq %rbx cmpq $10, %rbx jne .L19 movl $2, %edi xorl %eax, %eax leaq .LC4(%rip), %rsi call __printf_chk@PLT movq (%rsp), %rdi call cudaFree@PLT testl %eax, %eax je .L20 movq (%rsp), %rdi call cudaFree@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $56, %r8d leaq .LC0(%rip), %r9 leaq .LC1(%rip), %rcx pushq %r10 .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi leaq .LC2(%rip), %rdx movl $2, %esi pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %r11 .cfi_def_cfa_offset 216 popq %rbx .cfi_def_cfa_offset 208 .L20: movq 8(%rsp), %rdi call cudaFree@PLT testl %eax, %eax je .L21 movq 8(%rsp), %rdi call cudaFree@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $57, %r8d leaq .LC0(%rip), %r9 leaq .LC1(%rip), %rcx pushq %rdi .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi leaq .LC2(%rip), %rdx movl $2, %esi pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %r8 .cfi_def_cfa_offset 216 popq %r9 .cfi_def_cfa_offset 208 .L21: movq 16(%rsp), %rdi call cudaFree@PLT testl %eax, %eax je .L22 movq 16(%rsp), %rdi call cudaFree@PLT movl %eax, %edi call cudaGetErrorString@PLT movl $2, %esi leaq .LC1(%rip), %rcx leaq .LC0(%rip), %r9 pushq %rdx .cfi_def_cfa_offset 216 movq stderr(%rip), %rdi movl $58, %r8d leaq .LC2(%rip), %rdx pushq %rax .cfi_def_cfa_offset 224 xorl %eax, %eax call __fprintf_chk@PLT popq %rcx .cfi_def_cfa_offset 216 popq %rsi .cfi_def_cfa_offset 208 .L22: movq 168(%rsp), %rax subq %fs:40, %rax je .L23 call __stack_chk_fail@PLT .L23: addq $176, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2027: .size main, .-main .section .rodata.str1.1 .LC5: .string "_Z6VecAddPfS_S_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2055: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC5(%rip), %rdx movq %rax, %rdi leaq _Z6VecAddPfS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2055: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6VecAddPfS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */ /* 0x000e220000002100 */ /*0020*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0040*/ IMAD.WIDE R2, R6, R7, c[0x0][0x160] ; /* 0x0000580006027625 */ /* 0x001fc800078e0207 */ /*0050*/ IMAD.WIDE R4, R6.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0006047625 */ /* 0x0c0fe400078e0207 */ /*0060*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*0070*/ LDG.E R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea2000c1e1900 */ /*0080*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */ /* 0x000fe200078e0207 */ /*0090*/ FADD R9, R2, R5 ; /* 0x0000000502097221 */ /* 0x004fca0000000000 */ /*00a0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x000fe2000c101904 */ /*00b0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00c0*/ BRA 0xc0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <stdlib.h> #include <hip/hip_runtime.h> static const int N = 10; #define CHECK_STATUS(status) \ if (status != hipSuccess) \ fprintf(stderr, "File: %s\nLine:%d Function:%s>>>%s\n", __FILE__, __LINE__, __FUNCTION__,\ hipGetErrorString(status)) // __global__ void VecAdd(float *A, float *B, float *C) { int i = threadIdx.x; C[i] = A[i] + B[i]; } int main(int argc, char **argv) { CHECK_STATUS(hipSetDevice(0)); float a[N]; float b[N]; for(int i = 0;i<N;i++){ a[i] = i; b[i] = i; } float c[N]; float *d_a,*d_b,*d_c; //分配显存 CHECK_STATUS(hipMalloc(&d_a, N*sizeof(float))); CHECK_STATUS(hipMalloc(&d_b, N*sizeof(float))); CHECK_STATUS(hipMalloc(&d_c, N*sizeof(float))); // 把数据从内存复制到显存 CHECK_STATUS(hipMemcpy(d_a,a,N* sizeof(float),hipMemcpyHostToDevice)); CHECK_STATUS(hipMemcpy(d_b,b,N* sizeof(float),hipMemcpyHostToDevice)); // 调用kernel VecAdd<<<1,N>>>(d_a,d_b,d_c); // 检查错误 CHECK_STATUS(hipGetLastError()); // 从显存把数据复制到内存 CHECK_STATUS(hipMemcpy(c,d_c,N* sizeof(float),hipMemcpyDeviceToHost)); // 打印 for(int i=0;i<N;i++) printf("%f ",c[i]); printf("\n"); //释放显存 CHECK_STATUS(hipFree(d_a)); CHECK_STATUS(hipFree(d_b)); CHECK_STATUS(hipFree(d_c)); return 0; }
.text .file "sample_2.1.hip" .globl _Z21__device_stub__VecAddPfS_S_ # -- Begin function _Z21__device_stub__VecAddPfS_S_ .type _Z21__device_stub__VecAddPfS_S_,@function _Z21__device_stub__VecAddPfS_S_: # @_Z21__device_stub__VecAddPfS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6VecAddPfS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__VecAddPfS_S_, .Lfunc_end0-_Z21__device_stub__VecAddPfS_S_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbx .cfi_def_cfa_offset 16 subq $176, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -16 xorl %edi, %edi callq hipSetDevice testl %eax, %eax jne .LBB1_1 .LBB1_2: xorl %eax, %eax .LBB1_3: # =>This Inner Loop Header: Depth=1 xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 movss %xmm0, 128(%rsp,%rax,4) movss %xmm0, 80(%rsp,%rax,4) incq %rax cmpq $10, %rax jne .LBB1_3 # %bb.4: leaq 24(%rsp), %rdi movl $40, %esi callq hipMalloc testl %eax, %eax jne .LBB1_5 .LBB1_6: leaq 16(%rsp), %rdi movl $40, %esi callq hipMalloc testl %eax, %eax jne .LBB1_7 .LBB1_8: leaq 8(%rsp), %rdi movl $40, %esi callq hipMalloc testl %eax, %eax jne .LBB1_9 .LBB1_10: movq 24(%rsp), %rdi leaq 128(%rsp), %rsi movl $40, %edx movl $1, %ecx callq hipMemcpy testl %eax, %eax jne .LBB1_11 .LBB1_12: movq 16(%rsp), %rdi leaq 80(%rsp), %rsi movl $40, %edx movl $1, %ecx callq hipMemcpy testl %eax, %eax jne .LBB1_13 .LBB1_14: movabsq $4294967297, %rdi # imm = 0x100000001 leaq 9(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_16 # %bb.15: movq 24(%rsp), %rdi movq 16(%rsp), %rsi movq 8(%rsp), %rdx callq _Z21__device_stub__VecAddPfS_S_ .LBB1_16: callq hipGetLastError testl %eax, %eax jne .LBB1_17 .LBB1_18: movq 8(%rsp), %rsi leaq 32(%rsp), %rdi movl $40, %edx movl $2, %ecx callq hipMemcpy testl %eax, %eax jne .LBB1_28 .LBB1_19: # %.preheader xorl %ebx, %ebx .LBB1_20: # =>This Inner Loop Header: Depth=1 xorps %xmm0, %xmm0 cvtss2sd 32(%rsp,%rbx,4), %xmm0 movl $.L.str.2, %edi movb $1, %al callq printf incq %rbx cmpq $10, %rbx jne .LBB1_20 # %bb.21: movl $10, %edi callq putchar@PLT movq 24(%rsp), %rdi callq hipFree testl %eax, %eax jne .LBB1_22 .LBB1_23: movq 16(%rsp), %rdi callq hipFree testl %eax, %eax jne .LBB1_24 .LBB1_25: movq 8(%rsp), %rdi callq hipFree testl %eax, %eax jne .LBB1_26 .LBB1_27: xorl %eax, %eax addq $176, %rsp .cfi_def_cfa_offset 16 popq %rbx .cfi_def_cfa_offset 8 retq .LBB1_1: .cfi_def_cfa_offset 192 movq stderr(%rip), %rbx xorl %edi, %edi callq hipSetDevice movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $21, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_2 .LBB1_5: movq stderr(%rip), %rbx leaq 24(%rsp), %rdi movl $40, %esi callq hipMalloc movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $33, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_6 .LBB1_7: movq stderr(%rip), %rbx leaq 16(%rsp), %rdi movl $40, %esi callq hipMalloc movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $34, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_8 .LBB1_9: movq stderr(%rip), %rbx leaq 8(%rsp), %rdi movl $40, %esi callq hipMalloc movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $35, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_10 .LBB1_11: movq stderr(%rip), %rbx movq 24(%rsp), %rdi leaq 128(%rsp), %rsi movl $40, %edx movl $1, %ecx callq hipMemcpy movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $38, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_12 .LBB1_13: movq stderr(%rip), %rbx movq 16(%rsp), %rdi leaq 80(%rsp), %rsi movl $40, %edx movl $1, %ecx callq hipMemcpy movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $39, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_14 .LBB1_17: movq stderr(%rip), %rbx callq hipGetLastError movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $45, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_18 .LBB1_28: movq stderr(%rip), %rbx movq 8(%rsp), %rsi leaq 32(%rsp), %rdi movl $40, %edx movl $2, %ecx callq hipMemcpy movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $48, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_19 .LBB1_22: movq stderr(%rip), %rbx movq 24(%rsp), %rdi callq hipFree movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $56, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_23 .LBB1_24: movq stderr(%rip), %rbx movq 16(%rsp), %rdi callq hipFree movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $57, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_25 .LBB1_26: movq stderr(%rip), %rbx movq 8(%rsp), %rdi callq hipFree movl %eax, %edi callq hipGetErrorString movl $.L.str, %esi movl $.L.str.1, %edx movl $.L__FUNCTION__.main, %r8d movq %rbx, %rdi movl $58, %ecx movq %rax, %r9 xorl %eax, %eax callq fprintf jmp .LBB1_27 .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6VecAddPfS_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z6VecAddPfS_S_,@object # @_Z6VecAddPfS_S_ .section .rodata,"a",@progbits .globl _Z6VecAddPfS_S_ .p2align 3, 0x0 _Z6VecAddPfS_S_: .quad _Z21__device_stub__VecAddPfS_S_ .size _Z6VecAddPfS_S_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "File: %s\nLine:%d Function:%s>>>%s\n" .size .L.str, 35 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/Mannix1994/CUDA_Document_Samples/master/2/sample_2.1.hip" .size .L.str.1, 119 .type .L__FUNCTION__.main,@object # @__FUNCTION__.main .L__FUNCTION__.main: .asciz "main" .size .L__FUNCTION__.main, 5 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "%f " .size .L.str.2, 4 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6VecAddPfS_S_" .size .L__unnamed_1, 16 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__VecAddPfS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6VecAddPfS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6VecAddPfS_S_ ; -- Begin function _Z6VecAddPfS_S_ .globl _Z6VecAddPfS_S_ .p2align 8 .type _Z6VecAddPfS_S_,@function _Z6VecAddPfS_S_: ; @_Z6VecAddPfS_S_ ; %bb.0: s_load_b128 s[4:7], s[0:1], 0x0 v_lshlrev_b32_e32 v0, 2, v0 s_load_b64 s[0:1], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b32 v1, v0, s[4:5] global_load_b32 v2, v0, s[6:7] s_waitcnt vmcnt(0) v_add_f32_e32 v1, v1, v2 global_store_b32 v0, v1, s[0:1] s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6VecAddPfS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 24 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 3 .amdhsa_next_free_sgpr 8 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6VecAddPfS_S_, .Lfunc_end0-_Z6VecAddPfS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 72 ; NumSgprs: 8 ; NumVgprs: 3 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 8 ; NumVGPRsForWavesPerEU: 3 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 24 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6VecAddPfS_S_ .private_segment_fixed_size: 0 .sgpr_count: 8 .sgpr_spill_count: 0 .symbol: _Z6VecAddPfS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 3 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
97fa1de931d5e5334c842741c951153ee6b43cc4
#include "includes.h" __global__ void Ecalc2(float* out, const float* label) { int i = threadIdx.x; //4 //int j = blockDim.y*blockIdx.y + threadIdx.y; //Data.count out[i] = label[i] - out[i]; }
.file "tmpxft_0020a107_00000000-6_Ecalc2.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z28__device_stub__Z6Ecalc2PfPKfPfPKf .type _Z28__device_stub__Z6Ecalc2PfPKfPfPKf, @function _Z28__device_stub__Z6Ecalc2PfPKfPfPKf: .LFB2032: .cfi_startproc endbr64 subq $120, %rsp .cfi_def_cfa_offset 128 movq %rdi, 8(%rsp) leaq 32(%rsp), %rcx leaq 24(%rsp), %rdx movq %rsi, (%rsp) leaq 40(%rsp), %rdi leaq 52(%rsp), %rsi movq %fs:40, %rax movq %rax, 104(%rsp) xorl %eax, %eax leaq 8(%rsp), %rax movl $1, 48(%rsp) movq %rax, 88(%rsp) movq %rsp, %rax movq %rax, 96(%rsp) movabsq $4294967297, %rax movq %rax, 40(%rsp) movq %rax, 52(%rsp) movl $1, 60(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 32(%rsp) .cfi_def_cfa_offset 136 leaq _Z6Ecalc2PfPKf(%rip), %rdi pushq 32(%rsp) .cfi_def_cfa_offset 144 movq 68(%rsp), %rcx movl 76(%rsp), %r8d movq 56(%rsp), %rsi movl 64(%rsp), %edx leaq 104(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 136 popq %rdx .cfi_def_cfa_offset 128 .L2: movq 104(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $120, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z28__device_stub__Z6Ecalc2PfPKfPfPKf, .-_Z28__device_stub__Z6Ecalc2PfPKfPfPKf .globl _Z6Ecalc2PfPKf .type _Z6Ecalc2PfPKf, @function _Z6Ecalc2PfPKf: .LFB2033: .cfi_startproc endbr64 jmp _Z28__device_stub__Z6Ecalc2PfPKfPfPKf .cfi_endproc .LFE2033: .size _Z6Ecalc2PfPKf, .-_Z6Ecalc2PfPKf .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z6Ecalc2PfPKf" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z6Ecalc2PfPKf(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6Ecalc2PfPKf .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */ /* 0x000e220000002100 */ /*0020*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0040*/ IMAD.WIDE R2, R4, R5, c[0x0][0x168] ; /* 0x00005a0004027625 */ /* 0x001fc800078e0205 */ /*0050*/ IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */ /* 0x000fe400078e0205 */ /*0060*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*0070*/ LDG.E R7, [R4.64] ; /* 0x0000000404077981 */ /* 0x000ea4000c1e1900 */ /*0080*/ FADD R7, R2, -R7 ; /* 0x8000000702077221 */ /* 0x004fca0000000000 */ /*0090*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x000fe2000c101904 */ /*00a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00b0*/ BRA 0xb0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*00c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*00f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" __global__ void Ecalc2(float* out, const float* label) { int i = threadIdx.x; //4 //int j = blockDim.y*blockIdx.y + threadIdx.y; //Data.count out[i] = label[i] - out[i]; }
.text .file "Ecalc2.hip" .globl _Z21__device_stub__Ecalc2PfPKf # -- Begin function _Z21__device_stub__Ecalc2PfPKf .type _Z21__device_stub__Ecalc2PfPKf,@function _Z21__device_stub__Ecalc2PfPKf: # @_Z21__device_stub__Ecalc2PfPKf .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $80, %rsp .cfi_def_cfa_offset 128 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 24(%rsp), %rax movq %rdi, (%rax) leaq 16(%rsp), %rcx movq %rsi, (%rcx) leaq 64(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) leaq 48(%rsp), %r14 leaq 32(%rsp), %r15 leaq 8(%rsp), %r12 movq %rsp, %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6Ecalc2PfPKf, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $96, %rsp .cfi_adjust_cfa_offset -96 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__Ecalc2PfPKf, .Lfunc_end0-_Z21__device_stub__Ecalc2PfPKf .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6Ecalc2PfPKf, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z6Ecalc2PfPKf,@object # @_Z6Ecalc2PfPKf .section .rodata,"a",@progbits .globl _Z6Ecalc2PfPKf .p2align 3, 0x0 _Z6Ecalc2PfPKf: .quad _Z21__device_stub__Ecalc2PfPKf .size _Z6Ecalc2PfPKf, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z6Ecalc2PfPKf" .size .L__unnamed_1, 15 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__Ecalc2PfPKf .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6Ecalc2PfPKf .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6Ecalc2PfPKf ; -- Begin function _Z6Ecalc2PfPKf .globl _Z6Ecalc2PfPKf .p2align 8 .type _Z6Ecalc2PfPKf,@function _Z6Ecalc2PfPKf: ; @_Z6Ecalc2PfPKf ; %bb.0: s_load_b128 s[0:3], s[0:1], 0x0 v_lshlrev_b32_e32 v0, 2, v0 s_waitcnt lgkmcnt(0) s_clause 0x1 global_load_b32 v1, v0, s[2:3] global_load_b32 v2, v0, s[0:1] s_waitcnt vmcnt(0) v_sub_f32_e32 v1, v1, v2 global_store_b32 v0, v1, s[0:1] s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6Ecalc2PfPKf .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 16 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 3 .amdhsa_next_free_sgpr 4 .amdhsa_reserve_vcc 0 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6Ecalc2PfPKf, .Lfunc_end0-_Z6Ecalc2PfPKf ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 64 ; NumSgprs: 4 ; NumVgprs: 3 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 0 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 4 ; NumVGPRsForWavesPerEU: 3 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 16 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6Ecalc2PfPKf .private_segment_fixed_size: 0 .sgpr_count: 4 .sgpr_spill_count: 0 .symbol: _Z6Ecalc2PfPKf.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 3 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
f62ebbeaa0cffa410935d4695c839126d625acca
#include "stdio.h" #include <cuda.h> #include <cuda_runtime.h> #include <iostream> // Defining number of elements in Array #define N 50000 __global__ void gpuAdd(int *d_a, int *d_b, int *d_c) { int tid = threadIdx.x + blockIdx.x * blockDim.x; while (tid < N) { d_c[tid] = d_a[tid] + d_b[tid]; tid += blockDim.x * gridDim.x; } } int main(void) { int *h_a, *h_b, *h_c; int *d_a0, *d_b0, *d_c0; int *d_a1, *d_b1, *d_c1; cudaStream_t stream0, stream1; cudaStreamCreate(&stream0); cudaStreamCreate(&stream1); cudaEvent_t e_start, e_stop; cudaEventCreate(&e_start); cudaEventCreate(&e_stop); cudaEventRecord(e_start, 0); cudaHostAlloc((void **)&h_a, 2 * N * sizeof(int), cudaHostAllocDefault); cudaHostAlloc((void **)&h_b, 2 * N * sizeof(int), cudaHostAllocDefault); cudaHostAlloc((void **)&h_c, 2 * N * sizeof(int), cudaHostAllocDefault); cudaMalloc((void **)&d_a0, N * sizeof(int)); cudaMalloc((void **)&d_b0, N * sizeof(int)); cudaMalloc((void **)&d_c0, N * sizeof(int)); cudaMalloc((void **)&d_a1, N * sizeof(int)); cudaMalloc((void **)&d_b1, N * sizeof(int)); cudaMalloc((void **)&d_c1, N * sizeof(int)); for (int i = 0; i < N * 2; i++) { h_a[i] = 2 * i * i; h_b[i] = i; } cudaMemcpyAsync(d_a0, h_a, N * sizeof(int), cudaMemcpyHostToDevice, stream0); cudaMemcpyAsync(d_a1, h_a + N, N * sizeof(int), cudaMemcpyHostToDevice, stream1); cudaMemcpyAsync(d_b0, h_b, N * sizeof(int), cudaMemcpyHostToDevice, stream0); cudaMemcpyAsync(d_b1, h_b + N, N * sizeof(int), cudaMemcpyHostToDevice, stream1); gpuAdd<<<512, 512, 0, stream0>>>(d_a0, d_b0, d_c0); gpuAdd<<<512, 512, 0, stream1>>>(d_a1, d_b1, d_c1); cudaMemcpyAsync(h_c, d_c0, N * sizeof(int), cudaMemcpyDeviceToHost, stream0); cudaMemcpyAsync(h_c + N, d_c1, N * sizeof(int), cudaMemcpyDeviceToHost, stream0); cudaDeviceSynchronize(); cudaStreamSynchronize(stream0); cudaStreamSynchronize(stream1); cudaEventRecord(e_stop, 0); cudaEventSynchronize(e_stop); float elapsedTime; cudaEventElapsedTime(&elapsedTime, e_start, e_stop); printf("Time to add %d numbers: %3.1f ms\n", 2 * N, elapsedTime); int Correct = 1; printf("Vector addition on GPU \n"); // Printing result on console for (int i = 0; i < 2 * N; i++) { if ((h_a[i] + h_b[i] != h_c[i])) { Correct = 0; } } if (Correct == 1) { printf("GPU has computed Sum Correctly\n"); } else { printf("There is an Error in GPU Computation\n"); } // Free up memory cudaFree(d_a0); cudaFree(d_b0); cudaFree(d_c0); cudaFree(d_a0); cudaFree(d_b0); cudaFree(d_c0); cudaFreeHost(h_a); cudaFreeHost(h_b); cudaFreeHost(h_c); return 0; }
.file "tmpxft_00215d68_00000000-6_stream.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3638: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3638: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z29__device_stub__Z6gpuAddPiS_S_PiS_S_ .type _Z29__device_stub__Z6gpuAddPiS_S_PiS_S_, @function _Z29__device_stub__Z6gpuAddPiS_S_PiS_S_: .LFB3660: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movq %rdx, 8(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 8(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z6gpuAddPiS_S_(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L2: movq 120(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3660: .size _Z29__device_stub__Z6gpuAddPiS_S_PiS_S_, .-_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_ .globl _Z6gpuAddPiS_S_ .type _Z6gpuAddPiS_S_, @function _Z6gpuAddPiS_S_: .LFB3661: .cfi_startproc endbr64 jmp _Z29__device_stub__Z6gpuAddPiS_S_PiS_S_ .cfi_endproc .LFE3661: .size _Z6gpuAddPiS_S_, .-_Z6gpuAddPiS_S_ .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "Time to add %d numbers: %3.1f ms\n" .LC1: .string "Vector addition on GPU \n" .LC2: .string "GPU has computed Sum Correctly\n" .LC3: .string "There is an Error in GPU Computation\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB3635: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 80(%rsp), %rdi call cudaStreamCreate@PLT leaq 88(%rsp), %rdi call cudaStreamCreate@PLT leaq 96(%rsp), %rdi call cudaEventCreate@PLT leaq 104(%rsp), %rdi call cudaEventCreate@PLT movq 96(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT leaq 8(%rsp), %rdi xorl %edx, %edx movl $400000, %esi call cudaHostAlloc@PLT leaq 16(%rsp), %rdi xorl %edx, %edx movl $400000, %esi call cudaHostAlloc@PLT xorl %edx, %edx leaq 24(%rsp), %rdi movl $400000, %esi call cudaHostAlloc@PLT leaq 32(%rsp), %rdi movl $200000, %esi call cudaMalloc@PLT leaq 40(%rsp), %rdi movl $200000, %esi call cudaMalloc@PLT leaq 48(%rsp), %rdi movl $200000, %esi call cudaMalloc@PLT leaq 56(%rsp), %rdi movl $200000, %esi call cudaMalloc@PLT leaq 64(%rsp), %rdi movl $200000, %esi call cudaMalloc@PLT movl $200000, %esi leaq 72(%rsp), %rdi call cudaMalloc@PLT movq 8(%rsp), %rsi movq 16(%rsp), %rcx xorl %eax, %eax .L9: movl %eax, %edx imull %eax, %edx addl %edx, %edx movl %edx, (%rsi,%rax,4) movl %eax, (%rcx,%rax,4) incq %rax cmpq $100000, %rax jne .L9 movq 80(%rsp), %r8 movq 32(%rsp), %rdi movl $1, %ecx movl $200000, %edx call cudaMemcpyAsync@PLT movq 8(%rsp), %rax movq 88(%rsp), %r8 movl $1, %ecx movq 56(%rsp), %rdi movl $200000, %edx leaq 200000(%rax), %rsi call cudaMemcpyAsync@PLT movq 80(%rsp), %r8 movq 16(%rsp), %rsi movl $1, %ecx movq 40(%rsp), %rdi movl $200000, %edx call cudaMemcpyAsync@PLT movq 16(%rsp), %rax movq 88(%rsp), %r8 movl $1, %ecx movq 64(%rsp), %rdi movl $200000, %edx leaq 200000(%rax), %rsi call cudaMemcpyAsync@PLT movl $8388609, %edi movq 80(%rsp), %r9 xorl %r8d, %r8d salq $9, %rdi movl $1, %ecx movl $1, %esi movl $1, 132(%rsp) movq %rdi, %rdx movq %rdi, 124(%rsp) movq %rdi, 112(%rsp) movl $1, 120(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L10 movq 48(%rsp), %rdx movq 40(%rsp), %rsi movq 32(%rsp), %rdi call _Z29__device_stub__Z6gpuAddPiS_S_PiS_S_ .L10: movl $8388609, %edi movq 88(%rsp), %r9 xorl %r8d, %r8d movl $1, %ecx salq $9, %rdi movl $1, %esi movl $1, 132(%rsp) movq %rdi, %rdx movq %rdi, 124(%rsp) movq %rdi, 112(%rsp) movl $1, 120(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L11 movq 72(%rsp), %rdx movq 64(%rsp), %rsi movq 56(%rsp), %rdi call _Z29__device_stub__Z6gpuAddPiS_S_PiS_S_ .L11: movq 80(%rsp), %r8 movq 48(%rsp), %rsi movl $2, %ecx movl $200000, %edx movq 24(%rsp), %rdi call cudaMemcpyAsync@PLT movq 24(%rsp), %rax movq 80(%rsp), %r8 movl $2, %ecx movq 72(%rsp), %rsi movl $200000, %edx leaq 200000(%rax), %rdi call cudaMemcpyAsync@PLT call cudaDeviceSynchronize@PLT movq 80(%rsp), %rdi call cudaStreamSynchronize@PLT movq 88(%rsp), %rdi call cudaStreamSynchronize@PLT movq 104(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movq 104(%rsp), %rdi call cudaEventSynchronize@PLT movq 104(%rsp), %rdx movq 96(%rsp), %rsi leaq 124(%rsp), %rdi call cudaEventElapsedTime@PLT movl $100000, %edx leaq .LC0(%rip), %rsi movb $1, %al movl $2, %edi cvtss2sd 124(%rsp), %xmm0 call __printf_chk@PLT leaq .LC1(%rip), %rsi movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq 8(%rsp), %r8 xorl %eax, %eax xorl %esi, %esi movq 16(%rsp), %r9 movq 24(%rsp), %rdi movl $1, %edx .L13: movl (%r9,%rax), %ecx addl (%r8,%rax), %ecx cmpl (%rdi,%rax), %ecx cmovne %esi, %edx addq $4, %rax cmpq $400000, %rax jne .L13 decl %edx leaq .LC2(%rip), %rsi je .L21 leaq .LC3(%rip), %rsi .L21: movl $2, %edi xorl %eax, %eax call __printf_chk@PLT movq 32(%rsp), %rdi call cudaFree@PLT movq 40(%rsp), %rdi call cudaFree@PLT movq 48(%rsp), %rdi call cudaFree@PLT movq 32(%rsp), %rdi call cudaFree@PLT movq 40(%rsp), %rdi call cudaFree@PLT movq 48(%rsp), %rdi call cudaFree@PLT movq 8(%rsp), %rdi call cudaFreeHost@PLT movq 16(%rsp), %rdi call cudaFreeHost@PLT movq 24(%rsp), %rdi call cudaFreeHost@PLT movq 136(%rsp), %rax subq %fs:40, %rax je .L16 call __stack_chk_fail@PLT .L16: xorl %eax, %eax addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3635: .size main, .-main .section .rodata.str1.1 .LC4: .string "_Z6gpuAddPiS_S_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3663: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi leaq _Z6gpuAddPiS_S_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3663: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z6gpuAddPiS_S_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GT.AND P0, PT, R0, 0xc34f, PT ; /* 0x0000c34f0000780c */ /* 0x000fda0003f04270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe40000000a00 */ /*0070*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x001fca0000000f00 */ /*0080*/ IMAD.WIDE R2, R0, R7, c[0x0][0x160] ; /* 0x0000580000027625 */ /* 0x000fc800078e0207 */ /*0090*/ IMAD.WIDE R4, R0.reuse, R7.reuse, c[0x0][0x168] ; /* 0x00005a0000047625 */ /* 0x0c0fe400078e0207 */ /*00a0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea2000c1e1900 */ /*00c0*/ IMAD.WIDE R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */ /* 0x000fe200078e0207 */ /*00d0*/ MOV R11, c[0x0][0x0] ; /* 0x00000000000b7a02 */ /* 0x000fca0000000f00 */ /*00e0*/ IMAD R0, R11, c[0x0][0xc], R0 ; /* 0x000003000b007a24 */ /* 0x000fca00078e0200 */ /*00f0*/ ISETP.GE.AND P0, PT, R0, 0xc350, PT ; /* 0x0000c3500000780c */ /* 0x000fe40003f06270 */ /*0100*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */ /* 0x004fca0007ffe0ff */ /*0110*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x0001ec000c101904 */ /*0120*/ @!P0 BRA 0x70 ; /* 0xffffff4000008947 */ /* 0x000fea000383ffff */ /*0130*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0140*/ BRA 0x140; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*01f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include "stdio.h" #include <hip/hip_runtime.h> #include <iostream> // Defining number of elements in Array #define N 50000 __global__ void gpuAdd(int *d_a, int *d_b, int *d_c) { int tid = threadIdx.x + blockIdx.x * blockDim.x; while (tid < N) { d_c[tid] = d_a[tid] + d_b[tid]; tid += blockDim.x * gridDim.x; } } int main(void) { int *h_a, *h_b, *h_c; int *d_a0, *d_b0, *d_c0; int *d_a1, *d_b1, *d_c1; hipStream_t stream0, stream1; hipStreamCreate(&stream0); hipStreamCreate(&stream1); hipEvent_t e_start, e_stop; hipEventCreate(&e_start); hipEventCreate(&e_stop); hipEventRecord(e_start, 0); hipHostAlloc((void **)&h_a, 2 * N * sizeof(int), hipHostMallocDefault); hipHostAlloc((void **)&h_b, 2 * N * sizeof(int), hipHostMallocDefault); hipHostAlloc((void **)&h_c, 2 * N * sizeof(int), hipHostMallocDefault); hipMalloc((void **)&d_a0, N * sizeof(int)); hipMalloc((void **)&d_b0, N * sizeof(int)); hipMalloc((void **)&d_c0, N * sizeof(int)); hipMalloc((void **)&d_a1, N * sizeof(int)); hipMalloc((void **)&d_b1, N * sizeof(int)); hipMalloc((void **)&d_c1, N * sizeof(int)); for (int i = 0; i < N * 2; i++) { h_a[i] = 2 * i * i; h_b[i] = i; } hipMemcpyAsync(d_a0, h_a, N * sizeof(int), hipMemcpyHostToDevice, stream0); hipMemcpyAsync(d_a1, h_a + N, N * sizeof(int), hipMemcpyHostToDevice, stream1); hipMemcpyAsync(d_b0, h_b, N * sizeof(int), hipMemcpyHostToDevice, stream0); hipMemcpyAsync(d_b1, h_b + N, N * sizeof(int), hipMemcpyHostToDevice, stream1); gpuAdd<<<512, 512, 0, stream0>>>(d_a0, d_b0, d_c0); gpuAdd<<<512, 512, 0, stream1>>>(d_a1, d_b1, d_c1); hipMemcpyAsync(h_c, d_c0, N * sizeof(int), hipMemcpyDeviceToHost, stream0); hipMemcpyAsync(h_c + N, d_c1, N * sizeof(int), hipMemcpyDeviceToHost, stream0); hipDeviceSynchronize(); hipStreamSynchronize(stream0); hipStreamSynchronize(stream1); hipEventRecord(e_stop, 0); hipEventSynchronize(e_stop); float elapsedTime; hipEventElapsedTime(&elapsedTime, e_start, e_stop); printf("Time to add %d numbers: %3.1f ms\n", 2 * N, elapsedTime); int Correct = 1; printf("Vector addition on GPU \n"); // Printing result on console for (int i = 0; i < 2 * N; i++) { if ((h_a[i] + h_b[i] != h_c[i])) { Correct = 0; } } if (Correct == 1) { printf("GPU has computed Sum Correctly\n"); } else { printf("There is an Error in GPU Computation\n"); } // Free up memory hipFree(d_a0); hipFree(d_b0); hipFree(d_c0); hipFree(d_a0); hipFree(d_b0); hipFree(d_c0); hipHostFree(h_a); hipHostFree(h_b); hipHostFree(h_c); return 0; }
.text .file "stream.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z21__device_stub__gpuAddPiS_S_ # -- Begin function _Z21__device_stub__gpuAddPiS_S_ .type _Z21__device_stub__gpuAddPiS_S_,@function _Z21__device_stub__gpuAddPiS_S_: # @_Z21__device_stub__gpuAddPiS_S_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 24(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 16(%rsp), %r12 leaq 8(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z6gpuAddPiS_S_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z21__device_stub__gpuAddPiS_S_, .Lfunc_end0-_Z21__device_stub__gpuAddPiS_S_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %rbx .cfi_def_cfa_offset 40 subq $120, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 leaq 8(%rsp), %rdi callq hipStreamCreate leaq 16(%rsp), %rdi callq hipStreamCreate leaq 104(%rsp), %rbx movq %rbx, %rdi callq hipEventCreate leaq 64(%rsp), %rdi callq hipEventCreate movq (%rbx), %rdi xorl %r15d, %r15d xorl %esi, %esi callq hipEventRecord leaq 72(%rsp), %rbx movl $400000, %esi # imm = 0x61A80 movq %rbx, %rdi xorl %edx, %edx callq hipHostAlloc leaq 56(%rsp), %r14 movl $400000, %esi # imm = 0x61A80 movq %r14, %rdi xorl %edx, %edx callq hipHostAlloc leaq 48(%rsp), %rdi movl $400000, %esi # imm = 0x61A80 xorl %edx, %edx callq hipHostAlloc leaq 40(%rsp), %rdi movl $200000, %esi # imm = 0x30D40 callq hipMalloc leaq 32(%rsp), %rdi movl $200000, %esi # imm = 0x30D40 callq hipMalloc leaq 24(%rsp), %rdi movl $200000, %esi # imm = 0x30D40 callq hipMalloc leaq 96(%rsp), %rdi movl $200000, %esi # imm = 0x30D40 callq hipMalloc leaq 88(%rsp), %rdi movl $200000, %esi # imm = 0x30D40 callq hipMalloc leaq 80(%rsp), %rdi movl $200000, %esi # imm = 0x30D40 callq hipMalloc movq (%rbx), %rsi movq (%r14), %rax .LBB1_1: # =>This Inner Loop Header: Depth=1 movl %r15d, %ecx imull %r15d, %ecx addl %ecx, %ecx movl %ecx, (%rsi,%r15,4) movl %r15d, (%rax,%r15,4) incq %r15 cmpq $100000, %r15 # imm = 0x186A0 jne .LBB1_1 # %bb.2: movabsq $4294967808, %rbx # imm = 0x100000200 movq 40(%rsp), %rdi movq 8(%rsp), %r8 movl $200000, %r14d # imm = 0x30D40 movl $200000, %edx # imm = 0x30D40 movl $1, %ecx callq hipMemcpyAsync movq 96(%rsp), %rdi movq 72(%rsp), %rsi addq %r14, %rsi movq 16(%rsp), %r8 movl $200000, %edx # imm = 0x30D40 movl $1, %ecx callq hipMemcpyAsync movq 32(%rsp), %rdi movq 56(%rsp), %rsi movq 8(%rsp), %r8 movl $200000, %edx # imm = 0x30D40 movl $1, %ecx callq hipMemcpyAsync movq 88(%rsp), %rdi movq 56(%rsp), %rsi addq %r14, %rsi movq 16(%rsp), %r8 movl $200000, %edx # imm = 0x30D40 movl $1, %ecx callq hipMemcpyAsync movq 8(%rsp), %r9 movq %rbx, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_4 # %bb.3: movq 40(%rsp), %rdi movq 32(%rsp), %rsi movq 24(%rsp), %rdx callq _Z21__device_stub__gpuAddPiS_S_ .LBB1_4: movq 16(%rsp), %r9 xorl %r14d, %r14d movl $1, %ebp movq %rbx, %rdi movl $1, %esi movq %rbx, %rdx movl $1, %ecx xorl %r8d, %r8d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_6 # %bb.5: movq 96(%rsp), %rdi movq 88(%rsp), %rsi movq 80(%rsp), %rdx callq _Z21__device_stub__gpuAddPiS_S_ .LBB1_6: movq 48(%rsp), %rdi movq 24(%rsp), %rsi movq 8(%rsp), %r8 movl $200000, %ebx # imm = 0x30D40 movl $200000, %edx # imm = 0x30D40 movl $2, %ecx callq hipMemcpyAsync movq 48(%rsp), %rdi addq %rbx, %rdi movq 80(%rsp), %rsi movq 8(%rsp), %r8 movl $200000, %edx # imm = 0x30D40 movl $2, %ecx callq hipMemcpyAsync callq hipDeviceSynchronize movq 8(%rsp), %rdi callq hipStreamSynchronize movq 16(%rsp), %rdi callq hipStreamSynchronize movq 64(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movq 64(%rsp), %rdi callq hipEventSynchronize movq 104(%rsp), %rsi movq 64(%rsp), %rdx leaq 116(%rsp), %rbx movq %rbx, %rdi callq hipEventElapsedTime cvtss2sd (%rbx), %xmm0 movl $.L.str, %edi movl $100000, %esi # imm = 0x186A0 movb $1, %al callq printf movl $.Lstr, %edi callq puts@PLT movq 72(%rsp), %rax movq 56(%rsp), %rcx movq 48(%rsp), %rdx xorl %esi, %esi .LBB1_7: # =>This Inner Loop Header: Depth=1 movl (%rcx,%rsi,4), %edi addl (%rax,%rsi,4), %edi cmpl (%rdx,%rsi,4), %edi cmovnel %r14d, %ebp incq %rsi cmpq $100000, %rsi # imm = 0x186A0 jne .LBB1_7 # %bb.8: cmpl $1, %ebp movl $.Lstr.2, %eax movl $.Lstr.1, %edi cmoveq %rax, %rdi callq puts@PLT movq 40(%rsp), %rdi callq hipFree movq 32(%rsp), %rdi callq hipFree movq 24(%rsp), %rdi callq hipFree movq 40(%rsp), %rdi callq hipFree movq 32(%rsp), %rdi callq hipFree movq 24(%rsp), %rdi callq hipFree movq 72(%rsp), %rdi callq hipHostFree movq 56(%rsp), %rdi callq hipHostFree movq 48(%rsp), %rdi callq hipHostFree xorl %eax, %eax addq $120, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB2_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB2_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z6gpuAddPiS_S_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end2: .size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB3_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB3_2: retq .Lfunc_end3: .size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor .cfi_endproc # -- End function .type _Z6gpuAddPiS_S_,@object # @_Z6gpuAddPiS_S_ .section .rodata,"a",@progbits .globl _Z6gpuAddPiS_S_ .p2align 3, 0x0 _Z6gpuAddPiS_S_: .quad _Z21__device_stub__gpuAddPiS_S_ .size _Z6gpuAddPiS_S_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "Time to add %d numbers: %3.1f ms\n" .size .L.str, 34 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z6gpuAddPiS_S_" .size .L__unnamed_1, 16 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .type .Lstr,@object # @str .section .rodata.str1.1,"aMS",@progbits,1 .Lstr: .asciz "Vector addition on GPU " .size .Lstr, 24 .type .Lstr.1,@object # @str.1 .Lstr.1: .asciz "There is an Error in GPU Computation" .size .Lstr.1, 37 .type .Lstr.2,@object # @str.2 .Lstr.2: .asciz "GPU has computed Sum Correctly" .size .Lstr.2, 31 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z21__device_stub__gpuAddPiS_S_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z6gpuAddPiS_S_ .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z6gpuAddPiS_S_ ; -- Begin function _Z6gpuAddPiS_S_ .globl _Z6gpuAddPiS_S_ .p2align 8 .type _Z6gpuAddPiS_S_,@function _Z6gpuAddPiS_S_: ; @_Z6gpuAddPiS_S_ ; %bb.0: s_load_b32 s4, s[0:1], 0x24 s_add_u32 s2, s0, 24 s_addc_u32 s3, s1, 0 s_waitcnt lgkmcnt(0) s_and_b32 s8, s4, 0xffff s_mov_b32 s4, exec_lo v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1] s_delay_alu instid0(VALU_DEP_1) v_cmpx_gt_i32_e32 0xc350, v1 s_cbranch_execz .LBB0_3 ; %bb.1: ; %.lr.ph s_load_b32 s9, s[2:3], 0x0 s_clause 0x1 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[2:3], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_mul_i32 s1, s9, s8 s_mov_b32 s8, 0 .LBB0_2: ; =>This Inner Loop Header: Depth=1 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[2:3], 2, v[1:2] v_add_nc_u32_e32 v1, s1, v1 v_add_co_u32 v4, vcc_lo, s4, v2 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo v_add_co_u32 v6, vcc_lo, s6, v2 v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo v_cmp_lt_i32_e32 vcc_lo, 0xc34f, v1 global_load_b32 v0, v[4:5], off global_load_b32 v4, v[6:7], off v_add_co_u32 v2, s0, s2, v2 s_delay_alu instid0(VALU_DEP_1) v_add_co_ci_u32_e64 v3, s0, s3, v3, s0 s_or_b32 s8, vcc_lo, s8 s_waitcnt vmcnt(0) v_add_nc_u32_e32 v0, v4, v0 global_store_b32 v[2:3], v0, off s_and_not1_b32 exec_lo, exec_lo, s8 s_cbranch_execnz .LBB0_2 .LBB0_3: ; %._crit_edge s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z6gpuAddPiS_S_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 8 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z6gpuAddPiS_S_, .Lfunc_end0-_Z6gpuAddPiS_S_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 228 ; NumSgprs: 18 ; NumVgprs: 8 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 8 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z6gpuAddPiS_S_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z6gpuAddPiS_S_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 8 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
7bcf8624f60b33814946ea105aa3c3ac9cda91c5
#include <stdio.h> __global__ void kadd(float *a, float *b, float *c, const unsigned int el_per_thread) { int i = blockIdx.x * blockDim.x + threadIdx.x; unsigned int offset = i * el_per_thread; for(unsigned int idx = 0; idx < el_per_thread; idx++) { c[offset+idx] = a[offset+idx] + b[offset+idx]; } }
.file "tmpxft_002eaf48_00000000-6_kernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2029: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2029: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z28__device_stub__Z4kaddPfS_S_jPfS_S_j .type _Z28__device_stub__Z4kaddPfS_S_jPfS_S_j, @function _Z28__device_stub__Z4kaddPfS_S_jPfS_S_j: .LFB2051: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movq %rdi, 24(%rsp) leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movl %ecx, 4(%rsp) leaq 48(%rsp), %rcx movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 16(%rsp), %rax movq %rax, 112(%rsp) leaq 8(%rsp), %rax movq %rax, 120(%rsp) leaq 4(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z4kaddPfS_S_j(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2051: .size _Z28__device_stub__Z4kaddPfS_S_jPfS_S_j, .-_Z28__device_stub__Z4kaddPfS_S_jPfS_S_j .globl _Z4kaddPfS_S_j .type _Z4kaddPfS_S_j, @function _Z4kaddPfS_S_j: .LFB2052: .cfi_startproc endbr64 jmp _Z28__device_stub__Z4kaddPfS_S_jPfS_S_j .cfi_endproc .LFE2052: .size _Z4kaddPfS_S_j, .-_Z4kaddPfS_S_j .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z4kaddPfS_S_j" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2054: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z4kaddPfS_S_j(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2054: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z4kaddPfS_S_j .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */ /* 0x000e220000002500 */ /*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x178], PT ; /* 0x00005e00ff007a0c */ /* 0x000fc60003f05270 */ /*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e740000002100 */ /*0040*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0050*/ MOV R7, c[0x0][0x178] ; /* 0x00005e0000077a02 */ /* 0x000fe20000000f00 */ /*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fe20000000a00 */ /*0070*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */ /* 0x003fe200078e0203 */ /*0080*/ MOV R5, RZ ; /* 0x000000ff00057202 */ /* 0x000fc40000000f00 */ /*0090*/ IADD3 R4, R7.reuse, -0x1, RZ ; /* 0xffffffff07047810 */ /* 0x040fe40007ffe0ff */ /*00a0*/ LOP3.LUT R0, R7, 0x3, RZ, 0xc0, !PT ; /* 0x0000000307007812 */ /* 0x000fe400078ec0ff */ /*00b0*/ ISETP.GE.U32.AND P1, PT, R4, 0x3, PT ; /* 0x000000030400780c */ /* 0x000fe40003f26070 */ /*00c0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fd60003f05270 */ /*00d0*/ @!P1 BRA 0x360 ; /* 0x0000028000009947 */ /* 0x000fea0003800000 */ /*00e0*/ IMAD R3, R2, R7, 0x3 ; /* 0x0000000302037424 */ /* 0x000fe200078e0207 */ /*00f0*/ IADD3 R4, R0, -c[0x0][0x178], RZ ; /* 0x80005e0000047a10 */ /* 0x000fe40007ffe0ff */ /*0100*/ MOV R5, RZ ; /* 0x000000ff00057202 */ /* 0x000fe40000000f00 */ /*0110*/ IADD3 R13, R3, -0x3, RZ ; /* 0xfffffffd030d7810 */ /* 0x001fe40007ffe0ff */ /*0120*/ MOV R6, 0x4 ; /* 0x0000000400067802 */ /* 0x000fca0000000f00 */ /*0130*/ IMAD.WIDE.U32 R10, R13, R6, c[0x0][0x168] ; /* 0x00005a000d0a7625 */ /* 0x000fc800078e0006 */ /*0140*/ IMAD.WIDE.U32 R8, R13, R6.reuse, c[0x0][0x160] ; /* 0x000058000d087625 */ /* 0x080fe400078e0006 */ /*0150*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */ /* 0x000ea8000c1e1900 */ /*0160*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */ /* 0x000ea2000c1e1900 */ /*0170*/ IADD3 R19, R3, -0x2, RZ ; /* 0xfffffffe03137810 */ /* 0x000fe20007ffe0ff */ /*0180*/ IMAD.WIDE.U32 R12, R13, R6, c[0x0][0x170] ; /* 0x00005c000d0c7625 */ /* 0x000fc800078e0006 */ /*0190*/ IMAD.WIDE.U32 R16, R19, R6, c[0x0][0x168] ; /* 0x00005a0013107625 */ /* 0x000fc800078e0006 */ /*01a0*/ IMAD.WIDE.U32 R14, R19, R6, c[0x0][0x160] ; /* 0x00005800130e7625 */ /* 0x000fe200078e0006 */ /*01b0*/ FADD R7, R10, R9 ; /* 0x000000090a077221 */ /* 0x004fca0000000000 */ /*01c0*/ STG.E [R12.64], R7 ; /* 0x000000070c007986 */ /* 0x0001e8000c101904 */ /*01d0*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */ /* 0x000ea8000c1e1900 */ /*01e0*/ LDG.E R15, [R14.64] ; /* 0x000000040e0f7981 */ /* 0x000ea2000c1e1900 */ /*01f0*/ IADD3 R23, R3, -0x1, RZ ; /* 0xffffffff03177810 */ /* 0x000fe20007ffe0ff */ /*0200*/ IMAD.WIDE.U32 R10, R19, R6, c[0x0][0x170] ; /* 0x00005c00130a7625 */ /* 0x000fc800078e0006 */ /*0210*/ IMAD.WIDE.U32 R18, R23, R6, c[0x0][0x168] ; /* 0x00005a0017127625 */ /* 0x000fc800078e0006 */ /*0220*/ IMAD.WIDE.U32 R8, R23, R6, c[0x0][0x160] ; /* 0x0000580017087625 */ /* 0x000fe200078e0006 */ /*0230*/ FADD R21, R16, R15 ; /* 0x0000000f10157221 */ /* 0x004fca0000000000 */ /*0240*/ STG.E [R10.64], R21 ; /* 0x000000150a007986 */ /* 0x0003e8000c101904 */ /*0250*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */ /* 0x000ea8000c1e1900 */ /*0260*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */ /* 0x000ea2000c1e1900 */ /*0270*/ IMAD.WIDE.U32 R12, R23, R6, c[0x0][0x170] ; /* 0x00005c00170c7625 */ /* 0x001fc800078e0006 */ /*0280*/ IMAD.WIDE.U32 R14, R3, R6, c[0x0][0x160] ; /* 0x00005800030e7625 */ /* 0x000fc800078e0006 */ /*0290*/ IMAD.WIDE.U32 R16, R3, R6, c[0x0][0x168] ; /* 0x00005a0003107625 */ /* 0x000fe200078e0006 */ /*02a0*/ FADD R23, R18, R9 ; /* 0x0000000912177221 */ /* 0x004fca0000000000 */ /*02b0*/ STG.E [R12.64], R23 ; /* 0x000000170c007986 */ /* 0x0001e8000c101904 */ /*02c0*/ LDG.E R15, [R14.64] ; /* 0x000000040e0f7981 */ /* 0x000e68000c1e1900 */ /*02d0*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */ /* 0x000e62000c1e1900 */ /*02e0*/ IADD3 R5, R5, 0x4, RZ ; /* 0x0000000405057810 */ /* 0x000fe20007ffe0ff */ /*02f0*/ IMAD.WIDE.U32 R6, R3.reuse, R6, c[0x0][0x170] ; /* 0x00005c0003067625 */ /* 0x040fe200078e0006 */ /*0300*/ IADD3 R3, R3, 0x4, RZ ; /* 0x0000000403037810 */ /* 0x000fc40007ffe0ff */ /*0310*/ IADD3 R8, R4, R5, RZ ; /* 0x0000000504087210 */ /* 0x000fc80007ffe0ff */ /*0320*/ ISETP.NE.AND P1, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe20003f25270 */ /*0330*/ FADD R11, R16, R15 ; /* 0x0000000f100b7221 */ /* 0x002fca0000000000 */ /*0340*/ STG.E [R6.64], R11 ; /* 0x0000000b06007986 */ /* 0x0001ee000c101904 */ /*0350*/ @P1 BRA 0x110 ; /* 0xfffffdb000001947 */ /* 0x000fea000383ffff */ /*0360*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0370*/ IMAD R8, R2, c[0x0][0x178], R5 ; /* 0x00005e0002087a24 */ /* 0x000fe400078e0205 */ /*0380*/ MOV R7, 0x4 ; /* 0x0000000400077802 */ /* 0x001fca0000000f00 */ /*0390*/ IMAD.WIDE.U32 R2, R8, R7, c[0x0][0x160] ; /* 0x0000580008027625 */ /* 0x000fc800078e0007 */ /*03a0*/ IMAD.WIDE.U32 R4, R8, R7.reuse, c[0x0][0x168] ; /* 0x00005a0008047625 */ /* 0x080fe400078e0007 */ /*03b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */ /* 0x000ea8000c1e1900 */ /*03c0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */ /* 0x000ea2000c1e1900 */ /*03d0*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */ /* 0x000fe20007ffe0ff */ /*03e0*/ IMAD.WIDE.U32 R6, R8.reuse, R7, c[0x0][0x170] ; /* 0x00005c0008067625 */ /* 0x040fe200078e0007 */ /*03f0*/ IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108087810 */ /* 0x000fe40007ffe0ff */ /*0400*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */ /* 0x000fe20003f05270 */ /*0410*/ FADD R9, R4, R3 ; /* 0x0000000304097221 */ /* 0x004fca0000000000 */ /*0420*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */ /* 0x0001ee000c101904 */ /*0430*/ @P0 BRA 0x380 ; /* 0xffffff4000000947 */ /* 0x000fea000383ffff */ /*0440*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0450*/ BRA 0x450; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0460*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0470*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0480*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0490*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#ifndef KERNEL_CUH__ #define KERNEL_CUH__ __global__ void kadd(float *a, float *b, float *c, const unsigned int); #endif /* KERNEL_CUH__ */
.text .file "kernel.hip" .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_
.text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .amdgpu_metadata --- amdhsa.kernels: [] amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
99407503768a106c03ae036e061adb7e4969c6df
#include <stdio.h> #include <stdlib.h> #include <sys/time.h> #define N 1000000 #define B 1024 __global__ void prescan( float *g_idata, float *INCR, int n); void scanCPU(float *f_out, float *f_in, int i_n); double myDiffTime(struct timeval &start, struct timeval &end) { double d_start, d_end; d_start = (double)(start.tv_sec + start.tv_usec/1000000.0); d_end = (double)(end.tv_sec + end.tv_usec/1000000.0); return (d_end - d_start); } int main(int argc, char **argv) { float a[N], c[N], g[N]; timeval start, end; float *dev_a, *dev_g, INCRR[B]; float size = N*sizeof(float); // cudaMallocManaged(&a, N*sizeof(float)); double d_gpuTime, d_cpuTime; cudaHostAlloc(&dev_a, size, cudaHostAllocDefault); cudaHostAlloc(&dev_g, size, cudaHostAllocDefault); dev_a = (float *)malloc(size); dev_g = (float *)malloc(size); cudaMalloc((void **)&dev_a, size); cudaMalloc((void **)&dev_g, size); for (int i = 0; i < N; i++) { // a[i] = (float)(rand() % 1000000)/1000.0; a[i] = i+1; } int BATCH = (N/B); gettimeofday(&start,NULL); cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice); prescan <<< BATCH, B>>> ( dev_a ,INCRR , N); cudaDeviceSynchronize(); cudaMemcpy(g, dev_g, size, cudaMemcpyDeviceToHost); gettimeofday(&end, NULL); d_gpuTime = myDiffTime(start, end); gettimeofday(&start, NULL); scanCPU(c, a, N); gettimeofday(&end, NULL); d_cpuTime = myDiffTime(start, end); cudaFree(dev_a); cudaFree(dev_g); // for (int i = 0; i < N; i++) // { // printf("c[%i] = %0.3f, g[%i] = %0.3f\n", i, c[i], i, g[i]); // } printf("GPU Time for scan size %i: %f\n", N, d_gpuTime); printf("CPU Time for scan size %i: %f\n", N, d_cpuTime); } __global__ void prescan( float *g_idata, float *INCR, int n) { extern __shared__ float temp[], g_odata[], SUMS[]; // allocated on invocation int thid = threadIdx.x + (blockIdx.x * blockDim.x); int offset = 1; temp[2*thid] = g_idata[2*thid]; // load input into shared memory temp[2*thid+1] = g_idata[2*thid+1]; for (int d = B>>1; d > 0; d >>= 1) // build sum in place up the tree { __syncthreads(); if (thid < d) { int ai = offset*(2*thid+1)-1; int bi = offset*(2*thid+2)-1; temp[bi] += temp[ai]; } offset *= 2; for(int d =B>>1; d>0; d>>=1){ //build up sums __syncthreads(); if (thid < d) { int ai = offset*(2*thid+1)-1; int bi = offset*(2*thid+2)-1; } } if (SUMS && thid == 0) { SUMS[B] = temp[2*B-1]; temp[n - 1] = 0; } // clear the last element for (int d = 1; d < n; d *= 2) // traverse down tree & build scan { offset >>= 1; __syncthreads(); if (thid < d) { int ai = offset*(2*thid+1)-1; int bi = offset*(2*thid+2)-1; float t = SUMS[ai]; SUMS[ai] = SUMS[bi]; SUMS[bi] += INCR[bi]; } } __syncthreads(); temp[2*thid] = INCR[2*thid]; // write results to device memory // g_odata[2*thid+1] = temp[2*thid+1] // g_odata[2*thid+1] = INCR[thid]; } } void scanCPU(float *f_out, float *f_in, int i_n) { f_out[0] = 0; for (int i = 1; i < i_n; i++) f_out[i] = f_out[i-1] + f_in[i-1]; }
.file "tmpxft_0028d549_00000000-6_NaiveScan.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2032: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2032: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z10myDiffTimeR7timevalS0_ .type _Z10myDiffTimeR7timevalS0_, @function _Z10myDiffTimeR7timevalS0_: .LFB2027: .cfi_startproc endbr64 cvtsi2sdq 8(%rsi), %xmm0 movsd .LC0(%rip), %xmm2 cvtsi2sdq (%rsi), %xmm1 divsd %xmm2, %xmm0 addsd %xmm1, %xmm0 cvtsi2sdq 8(%rdi), %xmm1 divsd %xmm2, %xmm1 cvtsi2sdq (%rdi), %xmm2 addsd %xmm2, %xmm1 subsd %xmm1, %xmm0 ret .cfi_endproc .LFE2027: .size _Z10myDiffTimeR7timevalS0_, .-_Z10myDiffTimeR7timevalS0_ .globl _Z7scanCPUPfS_i .type _Z7scanCPUPfS_i, @function _Z7scanCPUPfS_i: .LFB2029: .cfi_startproc endbr64 movl $0x00000000, (%rdi) xorl %eax, %eax .L4: incq %rax cmpl %eax, %edx jle .L7 movss -4(%rdi,%rax,4), %xmm0 addss -4(%rsi,%rax,4), %xmm0 movss %xmm0, (%rdi,%rax,4) jmp .L4 .L7: ret .cfi_endproc .LFE2029: .size _Z7scanCPUPfS_i, .-_Z7scanCPUPfS_i .globl _Z29__device_stub__Z7prescanPfS_iPfS_i .type _Z29__device_stub__Z7prescanPfS_iPfS_i, @function _Z29__device_stub__Z7prescanPfS_iPfS_i: .LFB2054: .cfi_startproc endbr64 subq $136, %rsp .cfi_def_cfa_offset 144 movq %rdi, 24(%rsp) leaq 40(%rsp), %rcx leaq 48(%rsp), %rdi movq %rsi, 16(%rsp) leaq 60(%rsp), %rsi movl %edx, 12(%rsp) leaq 32(%rsp), %rdx movq %fs:40, %rax movq %rax, 120(%rsp) xorl %eax, %eax leaq 24(%rsp), %rax movl $1, 56(%rsp) movq %rax, 96(%rsp) leaq 16(%rsp), %rax movq %rax, 104(%rsp) leaq 12(%rsp), %rax movq %rax, 112(%rsp) movabsq $4294967297, %rax movq %rax, 48(%rsp) movq %rax, 60(%rsp) movl $1, 68(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L8 pushq 40(%rsp) .cfi_def_cfa_offset 152 leaq _Z7prescanPfS_i(%rip), %rdi pushq 40(%rsp) .cfi_def_cfa_offset 160 movq 76(%rsp), %rcx movl 84(%rsp), %r8d movq 64(%rsp), %rsi movl 72(%rsp), %edx leaq 112(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 152 popq %rdx .cfi_def_cfa_offset 144 .L8: movq 120(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $136, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2054: .size _Z29__device_stub__Z7prescanPfS_iPfS_i, .-_Z29__device_stub__Z7prescanPfS_iPfS_i .globl _Z7prescanPfS_i .type _Z7prescanPfS_i, @function _Z7prescanPfS_i: .LFB2055: .cfi_startproc endbr64 jmp _Z29__device_stub__Z7prescanPfS_iPfS_i .cfi_endproc .LFE2055: .size _Z7prescanPfS_i, .-_Z7prescanPfS_i .section .rodata.str1.1,"aMS",@progbits,1 .LC2: .string "GPU Time for scan size %i: %f\n" .LC3: .string "CPU Time for scan size %i: %f\n" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2028: .cfi_startproc endbr64 pushq %r14 .cfi_def_cfa_offset 16 .cfi_offset 14, -16 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 leaq -12001280(%rsp), %r11 .cfi_def_cfa 11, 12001320 .LPSRL0: subq $4096, %rsp orq $0, (%rsp) cmpq %r11, %rsp jne .LPSRL0 .cfi_def_cfa_register 7 subq $2904, %rsp .cfi_def_cfa_offset 12004224 xorl %edx, %edx movl $4000000, %esi movq %fs:40, %rax movq %rax, 12004168(%rsp) xorl %eax, %eax leaq 8(%rsp), %rbp leaq 16(%rsp), %rbx movq %rbp, %rdi leaq 4168(%rsp), %r12 call cudaHostAlloc@PLT xorl %edx, %edx movl $4000000, %esi movq %rbx, %rdi call cudaHostAlloc@PLT movl $4000000, %edi call malloc@PLT movl $4000000, %edi movq %rax, 8(%rsp) call malloc@PLT movl $4000000, %esi movq %rbp, %rdi movq %rax, 16(%rsp) call cudaMalloc@PLT movl $4000000, %esi movq %rbx, %rdi call cudaMalloc@PLT movl $1, %eax .L14: cvtsi2ssl %eax, %xmm0 movss %xmm0, -4(%r12,%rax,4) incq %rax cmpq $1000001, %rax jne .L14 leaq 40(%rsp), %rbx xorl %esi, %esi movq %rbx, %rdi call gettimeofday@PLT movq 8(%rsp), %rdi movl $1, %ecx movq %r12, %rsi movl $4000000, %edx call cudaMemcpy@PLT movl $4194305, %edx xorl %r9d, %r9d xorl %r8d, %r8d movl $268435517, %edi salq $10, %rdx movl $1, %ecx movl $1, %esi salq $4, %rdi movq %rdx, 56(%rsp) movl $1, 64(%rsp) movq %rdi, 28(%rsp) movl $1, 36(%rsp) call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L15 movq 8(%rsp), %rdi leaq 72(%rsp), %rsi movl $1000000, %edx call _Z29__device_stub__Z7prescanPfS_iPfS_i .L15: call cudaDeviceSynchronize@PLT movq 16(%rsp), %rsi movl $2, %ecx movl $4000000, %edx leaq 56(%rsp), %rbp leaq 8004168(%rsp), %rdi call cudaMemcpy@PLT xorl %esi, %esi movq %rbp, %rdi call gettimeofday@PLT movq %rbx, %rdi movq %rbp, %rsi call _Z10myDiffTimeR7timevalS0_ xorl %esi, %esi movq %xmm0, %r14 call gettimeofday@PLT movl $1000000, %edx leaq 4004168(%rsp), %rdi movq %r12, %rsi call _Z7scanCPUPfS_i xorl %esi, %esi movq %rbp, %rdi call gettimeofday@PLT movq %rbp, %rsi movq %rbx, %rdi call _Z10myDiffTimeR7timevalS0_ movq 8(%rsp), %rdi movq %xmm0, %rbx call cudaFree@PLT movq 16(%rsp), %rdi call cudaFree@PLT movq %r14, %xmm0 movl $1000000, %edx movb $1, %al leaq .LC2(%rip), %rsi movl $2, %edi call __printf_chk@PLT movq %rbx, %xmm0 movl $1000000, %edx movb $1, %al leaq .LC3(%rip), %rsi movl $2, %edi call __printf_chk@PLT movq 12004168(%rsp), %rax subq %fs:40, %rax je .L16 call __stack_chk_fail@PLT .L16: addq $12004184, %rsp .cfi_def_cfa_offset 40 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r14 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2028: .size main, .-main .section .rodata.str1.1 .LC4: .string "_Z7prescanPfS_i" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2057: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC4(%rip), %rdx movq %rax, %rdi leaq _Z7prescanPfS_i(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2057: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst8,"aM",@progbits,8 .align 8 .LC0: .long 0 .long 1093567616 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z7prescanPfS_i .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */ /* 0x000e220000002500 */ /*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc60000000a00 */ /*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0040*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */ /* 0x001fe400078e0203 */ /*0050*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */ /* 0x000fc600078e00ff */ /*0060*/ SHF.L.U32 R2, R0, 0x1, RZ ; /* 0x0000000100027819 */ /* 0x000fca00000006ff */ /*0070*/ IMAD.WIDE R4, R2, R3, c[0x0][0x160] ; /* 0x0000580002047625 */ /* 0x000fca00078e0203 */ /*0080*/ LDG.E.CONSTANT R9, [R4.64+0x4] ; /* 0x0000040404097981 */ /* 0x000ea8000c1e9900 */ /*0090*/ LDG.E.CONSTANT R8, [R4.64] ; /* 0x0000000404087981 */ /* 0x000ea2000c1e9900 */ /*00a0*/ ISETP.NE.U32.AND P0, PT, RZ, c[0x0][0x18], PT ; /* 0x00000600ff007a0c */ /* 0x000fe20003f05070 */ /*00b0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x1 ; /* 0x00000001ff077424 */ /* 0x000fe200078e00ff */ /*00c0*/ IADD3 R6, R2.reuse, 0x1, RZ ; /* 0x0000000102067810 */ /* 0x040fe20007ffe0ff */ /*00d0*/ IMAD.WIDE R2, R2, R3, c[0x0][0x168] ; /* 0x00005a0002027625 */ /* 0x000fe200078e0203 */ /*00e0*/ ISETP.NE.AND.EX P0, PT, RZ, c[0x0][0x1c], PT, P0 ; /* 0x00000700ff007a0c */ /* 0x000fe40003f05300 */ /*00f0*/ MOV R11, 0x200 ; /* 0x00000200000b7802 */ /* 0x000fc40000000f00 */ /*0100*/ ISETP.EQ.AND P0, PT, R0, RZ, P0 ; /* 0x000000ff0000720c */ /* 0x000fe20000702270 */ /*0110*/ STS.64 [R0.X8], R8 ; /* 0x0000000800007388 */ /* 0x0041e80000008a00 */ /*0120*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0130*/ ISETP.GE.AND P1, PT, R0, R11, PT ; /* 0x0000000b0000720c */ /* 0x000fda0003f26270 */ /*0140*/ @!P1 IMAD R4, R6, R7, RZ ; /* 0x0000000706049224 */ /* 0x000fc800078e02ff */ /*0150*/ @!P1 IMAD.SHL.U32 R8, R4, 0x4, RZ ; /* 0x0000000404089824 */ /* 0x001fca00078e00ff */ /*0160*/ @!P1 LEA R8, R7.reuse, R8, 0x2 ; /* 0x0000000807089211 */ /* 0x040fe200078e10ff */ /*0170*/ @!P1 LDS R4, [R4.X4+-0x4] ; /* 0xfffffc0004049984 */ /* 0x000fe20000004800 */ /*0180*/ SHF.L.U32 R7, R7, 0x1, RZ ; /* 0x0000000107077819 */ /* 0x000fc600000006ff */ /*0190*/ @!P1 LDS R5, [R8+-0x4] ; /* 0xfffffc0008059984 */ /* 0x000e240000000800 */ /*01a0*/ @!P1 FADD R5, R5, R4 ; /* 0x0000000405059221 */ /* 0x001fca0000000000 */ /*01b0*/ @!P1 STS [R8+-0x4], R5 ; /* 0xfffffc0508009388 */ /* 0x0001e40000000800 */ /*01c0*/ @P0 MOV R5, 0x4 ; /* 0x0000000400050802 */ /* 0x001fe20000000f00 */ /*01d0*/ @P0 IMAD.MOV.U32 R8, RZ, RZ, 0x4 ; /* 0x00000004ff080424 */ /* 0x000fc800078e00ff */ /*01e0*/ @P0 IMAD R5, R8, c[0x0][0x170], -R5 ; /* 0x00005c0008050a24 */ /* 0x000fe400078e0a05 */ /*01f0*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff087624 */ /* 0x000fe200078e00ff */ /*0200*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0210*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0220*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0230*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0240*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0250*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0270*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0290*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*02a0*/ ISETP.GE.AND P1, PT, R8, 0x2, PT ; /* 0x000000020800780c */ /* 0x000fca0003f26270 */ /*02b0*/ @P0 LDS R4, [0x1ffc] ; /* 0x001ffc00ff040984 */ /* 0x000e280000000800 */ /*02c0*/ @P0 STS [0x1000], R4 ; /* 0x00100004ff000388 */ /* 0x0011e80000000800 */ /*02d0*/ @P0 STS [R5], RZ ; /* 0x000000ff05000388 */ /* 0x0001e20000000800 */ /*02e0*/ @!P1 BRA 0x440 ; /* 0x0000015000009947 */ /* 0x000fea0003800000 */ /*02f0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x1 ; /* 0x00000001ff097424 */ /* 0x000fc800078e00ff */ /*0300*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0310*/ ISETP.GE.AND P1, PT, R0, R9, PT ; /* 0x000000090000720c */ /* 0x000fc40003f26270 */ /*0320*/ SHF.L.U32 R9, R9, 0x1, RZ ; /* 0x0000000109097819 */ /* 0x000fe400000006ff */ /*0330*/ SHF.R.S32.HI R7, RZ, 0x1, R7 ; /* 0x00000001ff077819 */ /* 0x000fe20000011407 */ /*0340*/ BSSY B0, 0x430 ; /* 0x000000e000007945 */ /* 0x000fe20003800000 */ /*0350*/ ISETP.GE.AND P2, PT, R9, c[0x0][0x170], PT ; /* 0x00005c0009007a0c */ /* 0x000fce0003f46270 */ /*0360*/ @P1 BRA 0x420 ; /* 0x000000b000001947 */ /* 0x001fea0003800000 */ /*0370*/ IMAD R8, R6, R7, RZ ; /* 0x0000000706087224 */ /* 0x000fe200078e02ff */ /*0380*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x001fc60000000f00 */ /*0390*/ IMAD.IADD R10, R7, 0x1, R8 ; /* 0x00000001070a7824 */ /* 0x000fca00078e0208 */ /*03a0*/ IADD3 R4, R10, -0x1, RZ ; /* 0xffffffff0a047810 */ /* 0x000fe20007ffe0ff */ /*03b0*/ LDS R13, [R10.X4+-0x4] ; /* 0xfffffc000a0d7984 */ /* 0x000e280000004800 */ /*03c0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ; /* 0x00005a0004047625 */ /* 0x000fcc00078e0205 */ /*03d0*/ LDG.E.CONSTANT R5, [R4.64] ; /* 0x0000000404057981 */ /* 0x000ea8000c1e9900 */ /*03e0*/ STS [R8.X4+-0x4], R13 ; /* 0xfffffc0d08007388 */ /* 0x001fe80000004800 */ /*03f0*/ LDS R12, [R10.X4+-0x4] ; /* 0xfffffc000a0c7984 */ /* 0x000ea40000004800 */ /*0400*/ FADD R15, R12, R5 ; /* 0x000000050c0f7221 */ /* 0x004fca0000000000 */ /*0410*/ STS [R10.X4+-0x4], R15 ; /* 0xfffffc0f0a007388 */ /* 0x0001e40000004800 */ /*0420*/ BSYNC B0 ; /* 0x0000000000007941 */ /* 0x000fea0003800000 */ /*0430*/ @!P2 BRA 0x300 ; /* 0xfffffec00000a947 */ /* 0x000fea000383ffff */ /*0440*/ LDG.E.CONSTANT R5, [R2.64] ; /* 0x0000000402057981 */ /* 0x001ea8000c1e9900 */ /*0450*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fe20000010000 */ /*0460*/ ISETP.GT.AND P1, PT, R11, 0x1, PT ; /* 0x000000010b00780c */ /* 0x000fe40003f24270 */ /*0470*/ SHF.R.S32.HI R11, RZ, 0x1, R11 ; /* 0x00000001ff0b7819 */ /* 0x000fc6000001140b */ /*0480*/ STS [R0.X8], R5 ; /* 0x0000000500007388 */ /* 0x0041f00000008800 */ /*0490*/ @P1 BRA 0x120 ; /* 0xfffffc8000001947 */ /* 0x000fea000383ffff */ /*04a0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*04b0*/ BRA 0x4b0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*04c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*04f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0500*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0510*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0520*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0530*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0540*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0550*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0560*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0570*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <stdio.h> #include <stdlib.h> #include <sys/time.h> #define N 1000000 #define B 1024 __global__ void prescan( float *g_idata, float *INCR, int n); void scanCPU(float *f_out, float *f_in, int i_n); double myDiffTime(struct timeval &start, struct timeval &end) { double d_start, d_end; d_start = (double)(start.tv_sec + start.tv_usec/1000000.0); d_end = (double)(end.tv_sec + end.tv_usec/1000000.0); return (d_end - d_start); } int main(int argc, char **argv) { float a[N], c[N], g[N]; timeval start, end; float *dev_a, *dev_g, INCRR[B]; float size = N*sizeof(float); // cudaMallocManaged(&a, N*sizeof(float)); double d_gpuTime, d_cpuTime; hipHostAlloc(&dev_a, size, hipHostMallocDefault); hipHostAlloc(&dev_g, size, hipHostMallocDefault); dev_a = (float *)malloc(size); dev_g = (float *)malloc(size); hipMalloc((void **)&dev_a, size); hipMalloc((void **)&dev_g, size); for (int i = 0; i < N; i++) { // a[i] = (float)(rand() % 1000000)/1000.0; a[i] = i+1; } int BATCH = (N/B); gettimeofday(&start,NULL); hipMemcpy(dev_a, a, size, hipMemcpyHostToDevice); prescan <<< BATCH, B>>> ( dev_a ,INCRR , N); hipDeviceSynchronize(); hipMemcpy(g, dev_g, size, hipMemcpyDeviceToHost); gettimeofday(&end, NULL); d_gpuTime = myDiffTime(start, end); gettimeofday(&start, NULL); scanCPU(c, a, N); gettimeofday(&end, NULL); d_cpuTime = myDiffTime(start, end); hipFree(dev_a); hipFree(dev_g); // for (int i = 0; i < N; i++) // { // printf("c[%i] = %0.3f, g[%i] = %0.3f\n", i, c[i], i, g[i]); // } printf("GPU Time for scan size %i: %f\n", N, d_gpuTime); printf("CPU Time for scan size %i: %f\n", N, d_cpuTime); } __global__ void prescan( float *g_idata, float *INCR, int n) { extern __shared__ float temp[], g_odata[], SUMS[]; // allocated on invocation int thid = threadIdx.x + (blockIdx.x * blockDim.x); int offset = 1; temp[2*thid] = g_idata[2*thid]; // load input into shared memory temp[2*thid+1] = g_idata[2*thid+1]; for (int d = B>>1; d > 0; d >>= 1) // build sum in place up the tree { __syncthreads(); if (thid < d) { int ai = offset*(2*thid+1)-1; int bi = offset*(2*thid+2)-1; temp[bi] += temp[ai]; } offset *= 2; for(int d =B>>1; d>0; d>>=1){ //build up sums __syncthreads(); if (thid < d) { int ai = offset*(2*thid+1)-1; int bi = offset*(2*thid+2)-1; } } if (SUMS && thid == 0) { SUMS[B] = temp[2*B-1]; temp[n - 1] = 0; } // clear the last element for (int d = 1; d < n; d *= 2) // traverse down tree & build scan { offset >>= 1; __syncthreads(); if (thid < d) { int ai = offset*(2*thid+1)-1; int bi = offset*(2*thid+2)-1; float t = SUMS[ai]; SUMS[ai] = SUMS[bi]; SUMS[bi] += INCR[bi]; } } __syncthreads(); temp[2*thid] = INCR[2*thid]; // write results to device memory // g_odata[2*thid+1] = temp[2*thid+1] // g_odata[2*thid+1] = INCR[thid]; } } void scanCPU(float *f_out, float *f_in, int i_n) { f_out[0] = 0; for (int i = 1; i < i_n; i++) f_out[i] = f_out[i-1] + f_in[i-1]; }
.text .file "NaiveScan.hip" .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function _Z10myDiffTimeR7timevalS0_ .LCPI0_0: .quad 0x412e848000000000 # double 1.0E+6 .text .globl _Z10myDiffTimeR7timevalS0_ .type _Z10myDiffTimeR7timevalS0_,@function _Z10myDiffTimeR7timevalS0_: # @_Z10myDiffTimeR7timevalS0_ .cfi_startproc # %bb.0: cvtsi2sdq (%rdi), %xmm0 cvtsi2sdq 8(%rdi), %xmm1 movsd .LCPI0_0(%rip), %xmm2 # xmm2 = mem[0],zero divsd %xmm2, %xmm1 addsd %xmm0, %xmm1 cvtsi2sdq (%rsi), %xmm3 xorps %xmm0, %xmm0 cvtsi2sdq 8(%rsi), %xmm0 divsd %xmm2, %xmm0 addsd %xmm3, %xmm0 subsd %xmm1, %xmm0 retq .Lfunc_end0: .size _Z10myDiffTimeR7timevalS0_, .Lfunc_end0-_Z10myDiffTimeR7timevalS0_ .cfi_endproc # -- End function .section .rodata.cst8,"aM",@progbits,8 .p2align 3, 0x0 # -- Begin function main .LCPI1_0: .quad 0x412e848000000000 # double 1.0E+6 .text .globl main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $8004176, %rsp # imm = 0x7A2250 .cfi_def_cfa_offset 8004208 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 16(%rsp), %rbx xorl %r15d, %r15d movl $4000000, %esi # imm = 0x3D0900 movq %rbx, %rdi xorl %edx, %edx callq hipHostAlloc leaq 24(%rsp), %r14 movl $4000000, %esi # imm = 0x3D0900 movq %r14, %rdi xorl %edx, %edx callq hipHostAlloc movl $4000000, %edi # imm = 0x3D0900 callq malloc movq %rax, (%rbx) movl $4000000, %edi # imm = 0x3D0900 callq malloc movq %rax, (%r14) movl $4000000, %esi # imm = 0x3D0900 movq %rbx, %rdi callq hipMalloc movl $4000000, %esi # imm = 0x3D0900 movq %r14, %rdi callq hipMalloc .LBB1_1: # =>This Inner Loop Header: Depth=1 leaq 1(%r15), %rax xorps %xmm0, %xmm0 cvtsi2ss %eax, %xmm0 movss %xmm0, 4176(%rsp,%r15,4) movq %rax, %r15 cmpq $1000000, %rax # imm = 0xF4240 jne .LBB1_1 # %bb.2: leaq 48(%rsp), %rdi xorl %esi, %esi callq gettimeofday movq 16(%rsp), %rdi leaq 4176(%rsp), %rsi movl $4000000, %edx # imm = 0x3D0900 movl $1, %ecx callq hipMemcpy movabsq $4294968272, %rdi # imm = 0x1000003D0 leaq 48(%rdi), %rdx movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_4 # %bb.3: movq 16(%rsp), %rdi leaq 80(%rsp), %rsi movl $1000000, %edx # imm = 0xF4240 callq _Z22__device_stub__prescanPfS_i .LBB1_4: # %_Z7scanCPUPfS_i.exit callq hipDeviceSynchronize movq 24(%rsp), %rsi leaq 4004176(%rsp), %rdi movl $4000000, %edx # imm = 0x3D0900 movl $2, %ecx callq hipMemcpy leaq 64(%rsp), %rbx movq %rbx, %rdi xorl %esi, %esi callq gettimeofday xorps %xmm0, %xmm0 cvtsi2sdq 8(%rbx), %xmm0 movsd %xmm0, 8(%rsp) # 8-byte Spill xorps %xmm0, %xmm0 cvtsi2sdq (%rbx), %xmm0 movsd %xmm0, 40(%rsp) # 8-byte Spill leaq 48(%rsp), %r14 xorps %xmm0, %xmm0 cvtsi2sdq 8(%r14), %xmm0 movsd %xmm0, 32(%rsp) # 8-byte Spill xorps %xmm0, %xmm0 cvtsi2sdq (%r14), %xmm0 movsd %xmm0, (%rsp) # 8-byte Spill movq %r14, %rdi xorl %esi, %esi callq gettimeofday movsd .LCPI1_0(%rip), %xmm1 # xmm1 = mem[0],zero movsd 8(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero divsd %xmm1, %xmm0 addsd 40(%rsp), %xmm0 # 8-byte Folded Reload movsd 32(%rsp), %xmm2 # 8-byte Reload # xmm2 = mem[0],zero divsd %xmm1, %xmm2 addsd (%rsp), %xmm2 # 8-byte Folded Reload subsd %xmm2, %xmm0 movsd %xmm0, 8(%rsp) # 8-byte Spill movq %rbx, %rdi xorl %esi, %esi callq gettimeofday xorps %xmm0, %xmm0 cvtsi2sdq (%r14), %xmm0 xorps %xmm1, %xmm1 cvtsi2sdq 8(%r14), %xmm1 movsd .LCPI1_0(%rip), %xmm3 # xmm3 = mem[0],zero divsd %xmm3, %xmm1 addsd %xmm0, %xmm1 xorps %xmm0, %xmm0 cvtsi2sdq (%rbx), %xmm0 xorps %xmm2, %xmm2 cvtsi2sdq 8(%rbx), %xmm2 divsd %xmm3, %xmm2 addsd %xmm0, %xmm2 subsd %xmm1, %xmm2 movsd %xmm2, (%rsp) # 8-byte Spill movq 16(%rsp), %rdi callq hipFree movq 24(%rsp), %rdi callq hipFree movl $.L.str, %edi movl $1000000, %esi # imm = 0xF4240 movsd 8(%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero movb $1, %al callq printf movl $.L.str.1, %edi movl $1000000, %esi # imm = 0xF4240 movsd (%rsp), %xmm0 # 8-byte Reload # xmm0 = mem[0],zero movb $1, %al callq printf xorl %eax, %eax addq $8004176, %rsp # imm = 0x7A2250 .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size main, .Lfunc_end1-main .cfi_endproc # -- End function .globl _Z22__device_stub__prescanPfS_i # -- Begin function _Z22__device_stub__prescanPfS_i .type _Z22__device_stub__prescanPfS_i,@function _Z22__device_stub__prescanPfS_i: # @_Z22__device_stub__prescanPfS_i .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 40(%rsp), %rax movq %rdi, (%rax) leaq 32(%rsp), %rcx movq %rsi, (%rcx) leaq 12(%rsp), %rsi movl %edx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rsi, 16(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z7prescanPfS_i, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z22__device_stub__prescanPfS_i, .Lfunc_end2-_Z22__device_stub__prescanPfS_i .cfi_endproc # -- End function .globl _Z7scanCPUPfS_i # -- Begin function _Z7scanCPUPfS_i .type _Z7scanCPUPfS_i,@function _Z7scanCPUPfS_i: # @_Z7scanCPUPfS_i .cfi_startproc # %bb.0: movl $0, (%rdi) cmpl $2, %edx jl .LBB3_3 # %bb.1: # %.lr.ph.preheader movl %edx, %eax decq %rax xorps %xmm0, %xmm0 xorl %ecx, %ecx .LBB3_2: # %.lr.ph # =>This Inner Loop Header: Depth=1 addss (%rsi,%rcx,4), %xmm0 movss %xmm0, 4(%rdi,%rcx,4) incq %rcx cmpq %rcx, %rax jne .LBB3_2 .LBB3_3: # %._crit_edge retq .Lfunc_end3: .size _Z7scanCPUPfS_i, .Lfunc_end3-_Z7scanCPUPfS_i .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB4_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB4_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z7prescanPfS_i, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end4: .size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB5_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB5_2: retq .Lfunc_end5: .size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor .cfi_endproc # -- End function .type _Z7prescanPfS_i,@object # @_Z7prescanPfS_i .section .rodata,"a",@progbits .globl _Z7prescanPfS_i .p2align 3, 0x0 _Z7prescanPfS_i: .quad _Z22__device_stub__prescanPfS_i .size _Z7prescanPfS_i, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "GPU Time for scan size %i: %f\n" .size .L.str, 31 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "CPU Time for scan size %i: %f\n" .size .L.str.1, 31 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z7prescanPfS_i" .size .L__unnamed_1, 16 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z22__device_stub__prescanPfS_i .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z7prescanPfS_i .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z7prescanPfS_i ; -- Begin function _Z7prescanPfS_i .globl _Z7prescanPfS_i .p2align 8 .type _Z7prescanPfS_i,@function _Z7prescanPfS_i: ; @_Z7prescanPfS_i ; %bb.0: s_clause 0x2 s_load_b32 s2, s[0:1], 0x24 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b32 s1, s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_and_b32 s2, s2, 0xffff s_cmp_gt_i32 s1, 1 v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1] s_cselect_b32 s3, -1, 0 s_mov_b32 s2, 1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3) v_lshlrev_b32_e32 v2, 1, v1 v_lshl_add_u32 v0, v1, 3, 0 v_cmp_eq_u32_e64 s0, 0, v1 v_ashrrev_i32_e32 v3, 31, v2 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[5:6], 2, v[2:3] v_add_co_u32 v3, vcc_lo, s4, v5 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_add_co_ci_u32_e32 v4, vcc_lo, s5, v6, vcc_lo s_lshl_b32 s4, s1, 2 s_add_i32 s4, s4, 0 global_load_b64 v[7:8], v[3:4], off v_or_b32_e32 v4, 1, v2 v_add_co_u32 v2, vcc_lo, s6, v5 v_mov_b32_e32 v5, 0 v_add_co_ci_u32_e32 v3, vcc_lo, s7, v6, vcc_lo s_add_i32 s4, s4, -4 s_add_u32 s5, s6, -4 s_addc_u32 s6, s7, -1 s_movk_i32 s7, 0x200 s_waitcnt vmcnt(0) ds_store_2addr_b32 v0, v7, v8 offset1:1 .LBB0_1: ; =>This Loop Header: Depth=1 ; Child Loop BB0_4 Depth 2 ; Child Loop BB0_9 Depth 2 s_mov_b32 s8, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_i32_e64 s7, v1 s_cbranch_execz .LBB0_3 ; %bb.2: ; in Loop: Header=BB0_1 Depth=1 v_mul_lo_u32 v6, s2, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b32_e32 v6, 2, v6 v_add3_u32 v6, v6, 0, -4 s_delay_alu instid0(VALU_DEP_1) v_lshl_add_u32 v7, s2, 2, v6 ds_load_b32 v6, v6 ds_load_b32 v8, v7 s_waitcnt lgkmcnt(0) v_add_f32_e32 v6, v6, v8 ds_store_b32 v7, v6 .LBB0_3: ; %.preheader ; in Loop: Header=BB0_1 Depth=1 s_or_b32 exec_lo, exec_lo, s8 s_movk_i32 s8, 0x200 .LBB0_4: ; Parent Loop BB0_1 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(SALU_CYCLE_1) s_lshr_b32 s9, s8, 1 s_cmp_lt_u32 s8, 2 s_mov_b32 s8, s9 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv s_cbranch_scc0 .LBB0_4 ; %bb.5: ; in Loop: Header=BB0_1 Depth=1 s_and_saveexec_b32 s8, s0 s_cbranch_execz .LBB0_7 ; %bb.6: ; in Loop: Header=BB0_1 Depth=1 ds_load_b32 v6, v5 offset:8188 v_mov_b32_e32 v7, s4 s_waitcnt lgkmcnt(0) ds_store_b32 v5, v6 offset:4096 ds_store_b32 v7, v5 .LBB0_7: ; in Loop: Header=BB0_1 Depth=1 s_or_b32 exec_lo, exec_lo, s8 s_delay_alu instid0(SALU_CYCLE_1) s_and_not1_b32 vcc_lo, exec_lo, s3 s_lshl_b32 s2, s2, 1 s_cbranch_vccnz .LBB0_12 ; %bb.8: ; %.lr.ph.preheader ; in Loop: Header=BB0_1 Depth=1 s_mov_b32 s8, 1 .LBB0_9: ; %.lr.ph ; Parent Loop BB0_1 Depth=1 ; => This Inner Loop Header: Depth=2 s_ashr_i32 s2, s2, 1 s_mov_b32 s9, exec_lo s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv v_cmpx_gt_i32_e64 s8, v1 s_cbranch_execz .LBB0_11 ; %bb.10: ; in Loop: Header=BB0_9 Depth=2 v_mul_lo_u32 v9, s2, v4 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_add_nc_u32_e32 v6, s2, v9 v_lshlrev_b32_e32 v9, 2, v9 v_ashrrev_i32_e32 v7, 31, v6 s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) v_add3_u32 v9, v9, 0, -4 v_lshlrev_b64 v[7:8], 2, v[6:7] v_lshlrev_b32_e32 v6, 2, v6 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) v_add3_u32 v6, v6, 0, -4 v_add_co_u32 v7, vcc_lo, s5, v7 s_delay_alu instid0(VALU_DEP_4) v_add_co_ci_u32_e32 v8, vcc_lo, s6, v8, vcc_lo global_load_b32 v7, v[7:8], off ds_load_b32 v8, v6 s_waitcnt vmcnt(0) lgkmcnt(0) v_add_f32_e32 v7, v7, v8 ds_store_b32 v9, v8 ds_store_b32 v6, v7 .LBB0_11: ; in Loop: Header=BB0_9 Depth=2 s_or_b32 exec_lo, exec_lo, s9 s_lshl_b32 s8, s8, 1 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_ge_i32 s8, s1 s_cbranch_scc0 .LBB0_9 .LBB0_12: ; %._crit_edge ; in Loop: Header=BB0_1 Depth=1 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv global_load_b32 v6, v[2:3], off s_lshr_b32 s8, s7, 1 s_cmp_lt_u32 s7, 2 s_mov_b32 s7, s8 s_waitcnt vmcnt(0) ds_store_b32 v0, v6 s_cbranch_scc0 .LBB0_1 ; %bb.13: s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z7prescanPfS_i .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 10 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z7prescanPfS_i, .Lfunc_end0-_Z7prescanPfS_i ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 616 ; NumSgprs: 18 ; NumVgprs: 10 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 1 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 10 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .offset: 16 .size: 4 .value_kind: by_value - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims - .offset: 144 .size: 4 .value_kind: hidden_dynamic_lds_size .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z7prescanPfS_i .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z7prescanPfS_i.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 10 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
f0d74576080354fc2da8c659b9b05363f7e2af3f
#include "includes.h" using namespace std; // this amazingly nice error checking function is stolen from: //https://stackoverflow.com/questions/14038589/what-is-the-canonical-way-to-check-for-errors-using-the-cuda-runtime-api __global__ void MatrixMulKernel(double *OutMat, double *Mat1, double *Mat2, int Arows, int Acols, int Bcols) { // row and column within submatrix int blockrow = blockIdx.y;//* int row = threadIdx.y; int blockcol = blockIdx.x; int col = threadIdx.x ; // allocate these arrays only once we can change the values in them later __shared__ double subAshared[BLOCKSIZE*BLOCKSIZE]; __shared__ double subBshared[BLOCKSIZE*BLOCKSIZE]; double Cvalue=0; for (int B = 0; B < ceil((double)(Acols / BLOCKSIZE)) + 1; B++) { // fetch from global memory // yes, these took a LONG time to figure out. Pencil and Paper FTW! /* notice: 1) how these indexes are actually offset a multiple of B, *not 1*. 2) threads are offset by col which will be 1 apart for each thread 3) which means that means all threads in the warp are hitting successive global memory cells */ int Mat1index = (row + blockrow*BLOCKSIZE)*Acols + col + B*BLOCKSIZE; int Mat2index = (B*BLOCKSIZE + row)*Bcols + BLOCKSIZE*blockcol + col; if (Mat1index < Arows*Acols) subAshared[row*BLOCKSIZE + col] = Mat1[Mat1index]; else subAshared[row*BLOCKSIZE + col] = 0; if (Mat2index < Acols*Bcols) subBshared[row*BLOCKSIZE + col] = Mat2[Mat2index]; else subBshared[row*BLOCKSIZE + col] = 0; __syncthreads(); // this computation is all using shared memory (fast) for (int j = 0; j < BLOCKSIZE; j++) if ((row*BLOCKSIZE + j < BLOCKSIZE*BLOCKSIZE) && (j*BLOCKSIZE + col < BLOCKSIZE*BLOCKSIZE)) Cvalue += subAshared[row*BLOCKSIZE + j]*subBshared[j*BLOCKSIZE + col]; __syncthreads(); } if ((row < Arows) && (col < Bcols)) { int finalmatrow = blockrow*BLOCKSIZE + row; int finalmatcol = blockcol*BLOCKSIZE + col; OutMat[finalmatrow*Bcols + finalmatcol] = Cvalue; } }
.file "tmpxft_0030fa58_00000000-6_MatrixMulKernel.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2010: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2010: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z42__device_stub__Z15MatrixMulKernelPdS_S_iiiPdS_S_iii .type _Z42__device_stub__Z15MatrixMulKernelPdS_S_iiiPdS_S_iii, @function _Z42__device_stub__Z15MatrixMulKernelPdS_S_iiiPdS_S_iii: .LFB2032: .cfi_startproc endbr64 subq $184, %rsp .cfi_def_cfa_offset 192 movq %rdi, 40(%rsp) leaq 72(%rsp), %rdi movq %rsi, 32(%rsp) leaq 84(%rsp), %rsi movq %rdx, 24(%rsp) leaq 56(%rsp), %rdx movl %ecx, 20(%rsp) leaq 64(%rsp), %rcx movl %r8d, 16(%rsp) movl %r9d, 12(%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 80(%rsp) movq %rax, 120(%rsp) leaq 32(%rsp), %rax movq %rax, 128(%rsp) leaq 24(%rsp), %rax movq %rax, 136(%rsp) leaq 20(%rsp), %rax movq %rax, 144(%rsp) leaq 16(%rsp), %rax movq %rax, 152(%rsp) leaq 12(%rsp), %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 64(%rsp) .cfi_def_cfa_offset 200 leaq _Z15MatrixMulKernelPdS_S_iii(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 208 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 136(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L2: movq 168(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2032: .size _Z42__device_stub__Z15MatrixMulKernelPdS_S_iiiPdS_S_iii, .-_Z42__device_stub__Z15MatrixMulKernelPdS_S_iiiPdS_S_iii .globl _Z15MatrixMulKernelPdS_S_iii .type _Z15MatrixMulKernelPdS_S_iii, @function _Z15MatrixMulKernelPdS_S_iii: .LFB2033: .cfi_startproc endbr64 jmp _Z42__device_stub__Z15MatrixMulKernelPdS_S_iiiPdS_S_iii .cfi_endproc .LFE2033: .size _Z15MatrixMulKernelPdS_S_iii, .-_Z15MatrixMulKernelPdS_S_iii .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "_Z15MatrixMulKernelPdS_S_iii" .section .text.startup,"ax",@progbits .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2035: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC0(%rip), %rdx movq %rax, %rdi leaq _Z15MatrixMulKernelPdS_S_iii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2035: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z15MatrixMulKernelPdS_S_iii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ ULDC UR5, c[0x0][0x17c] ; /* 0x00005f0000057ab9 */ /* 0x000fe20000000800 */ /*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e220000002100 */ /*0030*/ USHF.R.S32.HI UR4, URZ, 0x1f, UR5 ; /* 0x0000001f3f047899 */ /* 0x000fe20008011405 */ /*0040*/ CS2R R24, SRZ ; /* 0x0000000000187805 */ /* 0x000fe2000001ff00 */ /*0050*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fe20000000a00 */ /*0060*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */ /* 0x000e620000002200 */ /*0070*/ ULEA.HI UR4, UR4, UR5, URZ, 0x5 ; /* 0x0000000504047291 */ /* 0x000fc8000f8f283f */ /*0080*/ USHF.R.S32.HI UR4, URZ, 0x5, UR4 ; /* 0x000000053f047899 */ /* 0x000fd20008011404 */ /*0090*/ I2F.F64 R4, UR4 ; /* 0x0000000400047d12 */ /* 0x000eb00008201c00 */ /*00a0*/ FRND.F64.CEIL R4, R4 ; /* 0x0000000400047313 */ /* 0x004ea40000309800 */ /*00b0*/ DADD R26, R4, 1 ; /* 0x3ff00000041a7429 */ /* 0x004e8c0000000000 */ /*00c0*/ DSETP.GT.AND P0, PT, R26, RZ, PT ; /* 0x000000ff1a00722a */ /* 0x004e9c0003f04000 */ /*00d0*/ @!P0 BRA 0x1080 ; /* 0x00000fa000008947 */ /* 0x004fea0003800000 */ /*00e0*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x003e220000002100 */ /*00f0*/ ISETP.GE.AND P5, PT, R2.reuse, 0x20, PT ; /* 0x000000200200780c */ /* 0x040fe20003fa6270 */ /*0100*/ ULDC UR4, c[0x0][0x178] ; /* 0x00005e0000047ab9 */ /* 0x000fe20000000800 */ /*0110*/ IMAD.SHL.U32 R4, R2.reuse, 0x100, RZ ; /* 0x0000010002047824 */ /* 0x040fe200078e00ff */ /*0120*/ S2R R25, SR_CTAID.Y ; /* 0x0000000000197919 */ /* 0x000e620000002600 */ /*0130*/ IMAD.MOV.U32 R58, RZ, RZ, RZ ; /* 0x000000ffff3a7224 */ /* 0x000fe200078e00ff */ /*0140*/ ULDC UR6, c[0x0][0x180] ; /* 0x0000600000067ab9 */ /* 0x000fe40000000800 */ /*0150*/ S2R R30, SR_CTAID.X ; /* 0x00000000001e7919 */ /* 0x000ea20000002500 */ /*0160*/ UIMAD UR4, UR5, UR4, URZ ; /* 0x00000004050472a4 */ /* 0x000fe4000f8e023f */ /*0170*/ UIMAD UR5, UR5, UR6, URZ ; /* 0x00000006050572a4 */ /* 0x000fe2000f8e023f */ /*0180*/ ISETP.LT.AND P1, PT, R3.reuse, 0x400, !P5 ; /* 0x000004000300780c */ /* 0x041fe20006f21270 */ /*0190*/ IMAD R56, R2, 0x20, R3 ; /* 0x0000002002387824 */ /* 0x000fe200078e0203 */ /*01a0*/ ISETP.LT.AND P2, PT, R3, 0x3e0, !P5 ; /* 0x000003e00300780c */ /* 0x000fc40006f41270 */ /*01b0*/ P2R R5, PR, RZ, 0x2 ; /* 0x00000002ff057803 */ /* 0x000fe20000000000 */ /*01c0*/ IMAD R28, R25, 0x20, R2 ; /* 0x00000020191c7824 */ /* 0x002fe200078e0202 */ /*01d0*/ P2R R6, PR, RZ, 0x4 ; /* 0x00000004ff067803 */ /* 0x000fe20000000000 */ /*01e0*/ CS2R R24, SRZ ; /* 0x0000000000187805 */ /* 0x000fe2000001ff00 */ /*01f0*/ ISETP.LT.AND P0, PT, R3.reuse, 0x3c0, !P5 ; /* 0x000003c00300780c */ /* 0x040fe20006f01270 */ /*0200*/ IMAD R55, R30, 0x20, R3.reuse ; /* 0x000000201e377824 */ /* 0x104fe200078e0203 */ /*0210*/ ISETP.LT.AND P1, PT, R3.reuse, 0x3a0, !P5 ; /* 0x000003a00300780c */ /* 0x040fe20006f21270 */ /*0220*/ IMAD R57, R28, c[0x0][0x17c], R3 ; /* 0x00005f001c397a24 */ /* 0x000fe200078e0203 */ /*0230*/ ISETP.LT.AND P2, PT, R3, 0x380, !P5 ; /* 0x000003800300780c */ /* 0x000fe40006f41270 */ /*0240*/ P2R R7, PR, RZ, 0x1 ; /* 0x00000001ff077803 */ /* 0x000fc40000000000 */ /*0250*/ P2R R8, PR, RZ, 0x2 ; /* 0x00000002ff087803 */ /* 0x000fe40000000000 */ /*0260*/ P2R R9, PR, RZ, 0x4 ; /* 0x00000004ff097803 */ /* 0x000fe40000000000 */ /*0270*/ ISETP.LT.AND P0, PT, R3.reuse, 0x360, !P5 ; /* 0x000003600300780c */ /* 0x040fe40006f01270 */ /*0280*/ ISETP.LT.AND P1, PT, R3.reuse, 0x340, !P5 ; /* 0x000003400300780c */ /* 0x040fe40006f21270 */ /*0290*/ ISETP.LT.AND P2, PT, R3, 0x320, !P5 ; /* 0x000003200300780c */ /* 0x000fe40006f41270 */ /*02a0*/ P2R R10, PR, RZ, 0x1 ; /* 0x00000001ff0a7803 */ /* 0x000fc40000000000 */ /*02b0*/ P2R R11, PR, RZ, 0x2 ; /* 0x00000002ff0b7803 */ /* 0x000fe40000000000 */ /*02c0*/ P2R R12, PR, RZ, 0x4 ; /* 0x00000004ff0c7803 */ /* 0x000fe40000000000 */ /*02d0*/ ISETP.LT.AND P0, PT, R3.reuse, 0x300, !P5 ; /* 0x000003000300780c */ /* 0x040fe40006f01270 */ /*02e0*/ ISETP.LT.AND P1, PT, R3.reuse, 0x2e0, !P5 ; /* 0x000002e00300780c */ /* 0x040fe40006f21270 */ /*02f0*/ ISETP.LT.AND P2, PT, R3, 0x2c0, !P5 ; /* 0x000002c00300780c */ /* 0x000fe40006f41270 */ /*0300*/ P2R R13, PR, RZ, 0x1 ; /* 0x00000001ff0d7803 */ /* 0x000fc40000000000 */ /*0310*/ P2R R14, PR, RZ, 0x2 ; /* 0x00000002ff0e7803 */ /* 0x000fe40000000000 */ /*0320*/ P2R R15, PR, RZ, 0x4 ; /* 0x00000004ff0f7803 */ /* 0x000fe40000000000 */ /*0330*/ ISETP.LT.AND P0, PT, R3.reuse, 0x2a0, !P5 ; /* 0x000002a00300780c */ /* 0x040fe40006f01270 */ /*0340*/ ISETP.LT.AND P1, PT, R3.reuse, 0x280, !P5 ; /* 0x000002800300780c */ /* 0x040fe40006f21270 */ /*0350*/ ISETP.LT.AND P2, PT, R3, 0x260, !P5 ; /* 0x000002600300780c */ /* 0x000fe40006f41270 */ /*0360*/ P2R R16, PR, RZ, 0x1 ; /* 0x00000001ff107803 */ /* 0x000fc40000000000 */ /*0370*/ P2R R17, PR, RZ, 0x2 ; /* 0x00000002ff117803 */ /* 0x000fe40000000000 */ /*0380*/ P2R R18, PR, RZ, 0x4 ; /* 0x00000004ff127803 */ /* 0x000fe40000000000 */ /*0390*/ ISETP.LT.AND P0, PT, R3.reuse, 0x240, !P5 ; /* 0x000002400300780c */ /* 0x040fe40006f01270 */ /*03a0*/ ISETP.LT.AND P1, PT, R3.reuse, 0x220, !P5 ; /* 0x000002200300780c */ /* 0x040fe40006f21270 */ /*03b0*/ ISETP.LT.AND P2, PT, R3, 0x200, !P5 ; /* 0x000002000300780c */ /* 0x000fe40006f41270 */ /*03c0*/ P2R R19, PR, RZ, 0x1 ; /* 0x00000001ff137803 */ /* 0x000fc40000000000 */ /*03d0*/ P2R R20, PR, RZ, 0x2 ; /* 0x00000002ff147803 */ /* 0x000fe40000000000 */ /*03e0*/ P2R R21, PR, RZ, 0x4 ; /* 0x00000004ff157803 */ /* 0x000fe40000000000 */ /*03f0*/ ISETP.LT.AND P0, PT, R3.reuse, 0x1e0, !P5 ; /* 0x000001e00300780c */ /* 0x040fe40006f01270 */ /*0400*/ ISETP.LT.AND P1, PT, R3.reuse, 0x1c0, !P5 ; /* 0x000001c00300780c */ /* 0x040fe40006f21270 */ /*0410*/ ISETP.LT.AND P2, PT, R3, 0x1a0, !P5 ; /* 0x000001a00300780c */ /* 0x000fe40006f41270 */ /*0420*/ P2R R22, PR, RZ, 0x1 ; /* 0x00000001ff167803 */ /* 0x000fc40000000000 */ /*0430*/ P2R R23, PR, RZ, 0x2 ; /* 0x00000002ff177803 */ /* 0x000fe40000000000 */ /*0440*/ P2R R48, PR, RZ, 0x4 ; /* 0x00000004ff307803 */ /* 0x000fe40000000000 */ /*0450*/ ISETP.LT.AND P0, PT, R3.reuse, 0x180, !P5 ; /* 0x000001800300780c */ /* 0x040fe40006f01270 */ /*0460*/ ISETP.LT.AND P1, PT, R3.reuse, 0x160, !P5 ; /* 0x000001600300780c */ /* 0x040fe40006f21270 */ /*0470*/ ISETP.LT.AND P2, PT, R3, 0x140, !P5 ; /* 0x000001400300780c */ /* 0x000fe40006f41270 */ /*0480*/ P2R R49, PR, RZ, 0x1 ; /* 0x00000001ff317803 */ /* 0x000fc40000000000 */ /*0490*/ P2R R50, PR, RZ, 0x2 ; /* 0x00000002ff327803 */ /* 0x000fe40000000000 */ /*04a0*/ P2R R51, PR, RZ, 0x4 ; /* 0x00000004ff337803 */ /* 0x000fe40000000000 */ /*04b0*/ ISETP.LT.AND P0, PT, R3.reuse, 0x120, !P5 ; /* 0x000001200300780c */ /* 0x040fe40006f01270 */ /*04c0*/ ISETP.LT.AND P1, PT, R3.reuse, 0x100, !P5 ; /* 0x000001000300780c */ /* 0x040fe40006f21270 */ /*04d0*/ ISETP.LT.AND P2, PT, R3, 0xe0, !P5 ; /* 0x000000e00300780c */ /* 0x000fe40006f41270 */ /*04e0*/ P2R R52, PR, RZ, 0x1 ; /* 0x00000001ff347803 */ /* 0x000fc40000000000 */ /*04f0*/ P2R R53, PR, RZ, 0x2 ; /* 0x00000002ff357803 */ /* 0x000fe40000000000 */ /*0500*/ P2R R54, PR, RZ, 0x4 ; /* 0x00000004ff367803 */ /* 0x000fe40000000000 */ /*0510*/ ISETP.LT.AND P0, PT, R3.reuse, 0xc0, !P5 ; /* 0x000000c00300780c */ /* 0x040fe40006f01270 */ /*0520*/ ISETP.LT.AND P1, PT, R3.reuse, 0xa0, !P5 ; /* 0x000000a00300780c */ /* 0x040fe40006f21270 */ /*0530*/ ISETP.LT.AND P2, PT, R3.reuse, 0x80, !P5 ; /* 0x000000800300780c */ /* 0x040fe40006f41270 */ /*0540*/ ISETP.LT.AND P3, PT, R3, 0x60, !P5 ; /* 0x000000600300780c */ /* 0x000fc40006f61270 */ /*0550*/ ISETP.LT.AND P4, PT, R3.reuse, 0x40, !P5 ; /* 0x000000400300780c */ /* 0x040fe40006f81270 */ /*0560*/ ISETP.LT.AND P5, PT, R3, 0x20, !P5 ; /* 0x000000200300780c */ /* 0x000fe40006fa1270 */ /*0570*/ IMAD R29, R58.reuse, 0x20, R57 ; /* 0x000000203a1d7824 */ /* 0x041fe200078e0239 */ /*0580*/ CS2R R42, SRZ ; /* 0x00000000002a7805 */ /* 0x000fe2000001ff00 */ /*0590*/ P2R R61, PR, RZ, 0x8 ; /* 0x00000008ff3d7803 */ /* 0x000fe20000000000 */ /*05a0*/ IMAD R30, R58, 0x20, R2 ; /* 0x000000203a1e7824 */ /* 0x000fe200078e0202 */ /*05b0*/ CS2R R40, SRZ ; /* 0x0000000000287805 */ /* 0x000fe2000001ff00 */ /*05c0*/ ISETP.GE.AND P6, PT, R29, UR4, PT ; /* 0x000000041d007c0c */ /* 0x000fe4000bfc6270 */ /*05d0*/ IMAD R30, R30, c[0x0][0x180], R55 ; /* 0x000060001e1e7a24 */ /* 0x000fe200078e0237 */ /*05e0*/ ISETP.NE.AND P3, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fc40003f65270 */ /*05f0*/ P2R R64, PR, RZ, 0x1 ; /* 0x00000001ff407803 */ /* 0x000fe40000000000 */ /*0600*/ P2R R65, PR, RZ, 0x8 ; /* 0x00000008ff417803 */ /* 0x000fe40000000000 */ /*0610*/ ISETP.NE.AND P3, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe40003f65270 */ /*0620*/ ISETP.NE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */ /* 0x000fe40003f05270 */ /*0630*/ @!P6 IMAD.MOV.U32 R28, RZ, RZ, 0x8 ; /* 0x00000008ff1ce424 */ /* 0x000fe200078e00ff */ /*0640*/ P2R R66, PR, RZ, 0x8 ; /* 0x00000008ff427803 */ /* 0x000fe40000000000 */ /*0650*/ ISETP.NE.AND P3, PT, R5, RZ, PT ; /* 0x000000ff0500720c */ /* 0x000fe20003f65270 */ /*0660*/ @!P6 IMAD.WIDE R28, R29, R28, c[0x0][0x168] ; /* 0x00005a001d1ce625 */ /* 0x000fe200078e021c */ /*0670*/ P2R R63, PR, RZ, 0x2 ; /* 0x00000002ff3f7803 */ /* 0x000fc40000000000 */ /*0680*/ ISETP.NE.AND P1, PT, R7, RZ, PT ; /* 0x000000ff0700720c */ /* 0x000fe40003f25270 */ /*0690*/ @!P6 LDG.E.64 R42, [R28.64] ; /* 0x000000081c2ae981 */ /* 0x000ea2000c1e1b00 */ /*06a0*/ ISETP.GE.AND P6, PT, R30, UR5, PT ; /* 0x000000051e007c0c */ /* 0x000fe4000bfc6270 */ /*06b0*/ P2R R62, PR, RZ, 0x4 ; /* 0x00000004ff3e7803 */ /* 0x000fe40000000000 */ /*06c0*/ ISETP.NE.AND P2, PT, R8, RZ, PT ; /* 0x000000ff0800720c */ /* 0x000fe40003f45270 */ /*06d0*/ P2R R59, PR, RZ, 0x20 ; /* 0x00000020ff3b7803 */ /* 0x000fe40000000000 */ /*06e0*/ ISETP.NE.AND P5, PT, R9, RZ, PT ; /* 0x000000ff0900720c */ /* 0x000fc40003fa5270 */ /*06f0*/ P2R R60, PR, RZ, 0x10 ; /* 0x00000010ff3c7803 */ /* 0x000fe40000000000 */ /*0700*/ ISETP.NE.AND P4, PT, R13, RZ, PT ; /* 0x000000ff0d00720c */ /* 0x000fe20003f85270 */ /*0710*/ @!P6 IMAD.MOV.U32 R37, RZ, RZ, 0x8 ; /* 0x00000008ff25e424 */ /* 0x000fc800078e00ff */ /*0720*/ @!P6 IMAD.WIDE R36, R30, R37, c[0x0][0x170] ; /* 0x00005c001e24e625 */ /* 0x000fca00078e0225 */ /*0730*/ @!P6 LDG.E.64 R40, [R36.64] ; /* 0x000000082428e981 */ /* 0x000ee2000c1e1b00 */ /*0740*/ ISETP.NE.AND P6, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */ /* 0x000fc60003fc5270 */ /*0750*/ STS.64 [R56.X8], R42 ; /* 0x0000002a38007388 */ /* 0x004fe80000008a00 */ /*0760*/ STS.64 [R56.X8+0x2000], R40 ; /* 0x0020002838007388 */ /* 0x008fe80000008a00 */ /*0770*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0780*/ @P3 LDS.64 R46, [R4] ; /* 0x00000000042e3984 */ /* 0x000fe80000000a00 */ /*0790*/ @P3 LDS.64 R44, [R3.X8+0x2000] ; /* 0x00200000032c3984 */ /* 0x000e280000008a00 */ /*07a0*/ @P0 LDS.64 R30, [R3.X8+0x2100] ; /* 0x00210000031e0984 */ /* 0x000fe80000008a00 */ /*07b0*/ @P0 LDS.64 R28, [R4+0x8] ; /* 0x00000800041c0984 */ /* 0x002e680000000a00 */ /*07c0*/ @P1 LDS.64 R34, [R3.X8+0x2200] ; /* 0x0022000003221984 */ /* 0x000fe80000008a00 */ /*07d0*/ @P1 LDS.64 R32, [R4+0x10] ; /* 0x0000100004201984 */ /* 0x000ea80000000a00 */ /*07e0*/ @P2 LDS.64 R38, [R3.X8+0x2300] ; /* 0x0023000003262984 */ /* 0x000fe80000008a00 */ /*07f0*/ @P2 LDS.64 R36, [R4+0x18] ; /* 0x0000180004242984 */ /* 0x000ee80000000a00 */ /*0800*/ @P5 LDS.64 R42, [R3.X8+0x2400] ; /* 0x00240000032a5984 */ /* 0x000fe80000008a00 */ /*0810*/ @P5 LDS.64 R40, [R4+0x20] ; /* 0x0000200004285984 */ /* 0x000f220000000a00 */ /*0820*/ @P3 DFMA R24, R46, R44, R24 ; /* 0x0000002c2e18322b */ /* 0x0010620000000018 */ /*0830*/ ISETP.NE.AND P3, PT, R66, RZ, PT ; /* 0x000000ff4200720c */ /* 0x000fc40003f65270 */ /*0840*/ @P6 LDS.64 R46, [R3.X8+0x2500] ; /* 0x00250000032e6984 */ /* 0x001fe80000008a00 */ /*0850*/ @P6 LDS.64 R44, [R4+0x28] ; /* 0x00002800042c6984 */ /* 0x000e220000000a00 */ /*0860*/ @P0 DFMA R24, R30, R28, R24 ; /* 0x0000001c1e18022b */ /* 0x00228c0000000018 */ /*0870*/ @P3 LDS.64 R30, [R3.X8+0x2600] ; /* 0x00260000031e3984 */ /* 0x002fe80000008a00 */ /*0880*/ @P3 LDS.64 R28, [R4+0x30] ; /* 0x00003000041c3984 */ /* 0x000e620000000a00 */ /*0890*/ ISETP.NE.AND P3, PT, R65, RZ, PT ; /* 0x000000ff4100720c */ /* 0x000fe20003f65270 */ /*08a0*/ @P1 DFMA R24, R34, R32, R24 ; /* 0x000000202218122b */ /* 0x004ecc0000000018 */ /*08b0*/ @P2 DFMA R24, R38, R36, R24 ; /* 0x000000242618222b */ /* 0x008f0c0000000018 */ /*08c0*/ @P3 LDS.64 R34, [R3.X8+0x2700] ; /* 0x0027000003223984 */ /* 0x000fe80000008a00 */ /*08d0*/ @P3 LDS.64 R32, [R4+0x38] ; /* 0x0000380004203984 */ /* 0x000ea20000000a00 */ /*08e0*/ ISETP.NE.AND P1, PT, R16, RZ, PT ; /* 0x000000ff1000720c */ /* 0x000fe20003f25270 */ /*08f0*/ @P5 DFMA R24, R42, R40, R24 ; /* 0x000000282a18522b */ /* 0x010e220000000018 */ /*0900*/ ISETP.NE.AND P5, PT, R19, RZ, PT ; /* 0x000000ff1300720c */ /* 0x000fe20003fa5270 */ /*0910*/ @P4 LDS.64 R38, [R3.X8+0x2800] ; /* 0x0028000003264984 */ /* 0x000fe20000008a00 */ /*0920*/ P2R R67, PR, RZ, 0x2 ; /* 0x00000002ff437803 */ /* 0x000fe40000000000 */ /*0930*/ ISETP.NE.AND P1, PT, R11, RZ, PT ; /* 0x000000ff0b00720c */ /* 0x000fe20003f25270 */ /*0940*/ @P4 LDS.64 R36, [R4+0x40] ; /* 0x0000400004244984 */ /* 0x000ee20000000a00 */ /*0950*/ P2R R66, PR, RZ, 0x20 ; /* 0x00000020ff427803 */ /* 0x000fc40000000000 */ /*0960*/ ISETP.NE.AND P5, PT, R14, RZ, PT ; /* 0x000000ff0e00720c */ /* 0x000fe20003fa5270 */ /*0970*/ @P6 DFMA R24, R46, R44, R24 ; /* 0x0000002c2e18622b */ /* 0x001e620000000018 */ /*0980*/ ISETP.NE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */ /* 0x000fe40003f05270 */ /*0990*/ ISETP.NE.AND P2, PT, R17, RZ, PT ; /* 0x000000ff1100720c */ /* 0x000fc80003f45270 */ /*09a0*/ P2R R65, PR, RZ, 0x4 ; /* 0x00000004ff417803 */ /* 0x000fe20000000000 */ /*09b0*/ @P1 DFMA R24, R30, R28, R24 ; /* 0x0000001c1e18122b */ /* 0x0020a20000000018 */ /*09c0*/ ISETP.NE.AND P1, PT, R67, RZ, PT ; /* 0x000000ff4300720c */ /* 0x000fc60003f25270 */ /*09d0*/ @P5 LDS.64 R42, [R3.X8+0x2900] ; /* 0x00290000032a5984 */ /* 0x000fe20000008a00 */ /*09e0*/ ISETP.NE.AND P2, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */ /* 0x000fc60003f45270 */ /*09f0*/ @P5 LDS.64 R40, [R4+0x48] ; /* 0x0000480004285984 */ /* 0x000e680000000a00 */ /*0a00*/ @P0 LDS.64 R46, [R3.X8+0x2a00] ; /* 0x002a0000032e0984 */ /* 0x000fe80000008a00 */ /*0a10*/ @P0 LDS.64 R44, [R4+0x50] ; /* 0x00005000042c0984 */ /* 0x000f280000000a00 */ /*0a20*/ @P1 LDS.64 R30, [R3.X8+0x2b00] ; /* 0x002b0000031e1984 */ /* 0x001fe20000008a00 */ /*0a30*/ @P2 DFMA R24, R34, R32, R24 ; /* 0x000000202218222b */ /* 0x004ee20000000018 */ /*0a40*/ ISETP.NE.AND P2, PT, R65, RZ, PT ; /* 0x000000ff4100720c */ /* 0x000fc40003f45270 */ /*0a50*/ @P1 LDS.64 R28, [R4+0x58] ; /* 0x00005800041c1984 */ /* 0x000e220000000a00 */ /*0a60*/ ISETP.NE.AND P3, PT, R18, RZ, PT ; /* 0x000000ff1200720c */ /* 0x000fe40003f65270 */ /*0a70*/ @P4 DFMA R24, R38, R36, R24 ; /* 0x000000242618422b */ /* 0x0084500000000018 */ /*0a80*/ @P2 LDS.64 R34, [R3.X8+0x2c00] ; /* 0x002c000003222984 */ /* 0x000fe80000008a00 */ /*0a90*/ @P2 LDS.64 R32, [R4+0x60] ; /* 0x0000600004202984 */ /* 0x000ee20000000a00 */ /*0aa0*/ P2R R65, PR, RZ, 0x4 ; /* 0x00000004ff417803 */ /* 0x000fe40000000000 */ /*0ab0*/ ISETP.NE.AND P2, PT, R21, RZ, PT ; /* 0x000000ff1500720c */ /* 0x000fe20003f45270 */ /*0ac0*/ @P3 LDS.64 R38, [R3.X8+0x2d00] ; /* 0x002d000003263984 */ /* 0x004fe20000008a00 */ /*0ad0*/ ISETP.NE.AND P6, PT, R20, RZ, PT ; /* 0x000000ff1400720c */ /* 0x000fc60003fc5270 */ /*0ae0*/ @P3 LDS.64 R36, [R4+0x68] ; /* 0x0000680004243984 */ /* 0x000ea20000000a00 */ /*0af0*/ @P5 DFMA R24, R42, R40, R24 ; /* 0x000000282a18522b */ /* 0x002f220000000018 */ /*0b00*/ ISETP.NE.AND P5, PT, R66, RZ, PT ; /* 0x000000ff4200720c */ /* 0x000fca0003fa5270 */ /*0b10*/ @P0 DFMA R24, R46, R44, R24 ; /* 0x0000002c2e18022b */ /* 0x0102220000000018 */ /*0b20*/ ISETP.NE.AND P4, PT, R22, RZ, PT ; /* 0x000000ff1600720c */ /* 0x000fe40003f85270 */ /*0b30*/ @P6 LDS.64 R46, [R3.X8+0x2f00] ; /* 0x002f0000032e6984 */ /* 0x002fea0000008a00 */ /*0b40*/ @P5 LDS.64 R42, [R3.X8+0x2e00] ; /* 0x002e0000032a5984 */ /* 0x000fe20000008a00 */ /*0b50*/ @P1 DFMA R24, R30, R28, R24 ; /* 0x0000001c1e18122b */ /* 0x0010c60000000018 */ /*0b60*/ @P5 LDS.64 R40, [R4+0x70] ; /* 0x0000700004285984 */ /* 0x000e680000000a00 */ /*0b70*/ @P2 LDS.64 R28, [R3.X8+0x3000] ; /* 0x00300000031c2984 */ /* 0x001fe80000008a00 */ /*0b80*/ @P2 LDS.64 R30, [R4+0x80] ; /* 0x00008000041e2984 */ /* 0x000fe20000000a00 */ /*0b90*/ ISETP.NE.AND P2, PT, R65, RZ, PT ; /* 0x000000ff4100720c */ /* 0x000fc60003f45270 */ /*0ba0*/ @P6 LDS.64 R44, [R4+0x78] ; /* 0x00007800042c6984 */ /* 0x000e340000000a00 */ /*0bb0*/ @P2 DFMA R24, R34, R32, R24 ; /* 0x000000202218222b */ /* 0x0086840000000018 */ /*0bc0*/ @P4 LDS.64 R32, [R3.X8+0x3100] ; /* 0x0031000003204984 */ /* 0x008fe80000008a00 */ /*0bd0*/ @P4 LDS.64 R34, [R4+0x88] ; /* 0x0000880004224984 */ /* 0x000ee20000000a00 */ /*0be0*/ ISETP.NE.AND P4, PT, R52, RZ, PT ; /* 0x000000ff3400720c */ /* 0x000fc80003f85270 */ /*0bf0*/ P2R R67, PR, RZ, 0x10 ; /* 0x00000010ff437803 */ /* 0x000fe40000000000 */ /*0c00*/ ISETP.NE.AND P4, PT, R23, RZ, PT ; /* 0x000000ff1700720c */ /* 0x000fe20003f85270 */ /*0c10*/ @P3 DFMA R24, R38, R36, R24 ; /* 0x000000242618322b */ /* 0x004e620000000018 */ /*0c20*/ ISETP.NE.AND P2, PT, R50, RZ, PT ; /* 0x000000ff3200720c */ /* 0x000fe40003f45270 */ /*0c30*/ ISETP.NE.AND P0, PT, R48, RZ, PT ; /* 0x000000ff3000720c */ /* 0x000fe40003f05270 */ /*0c40*/ P2R R65, PR, RZ, 0x4 ; /* 0x00000004ff417803 */ /* 0x000fe20000000000 */ /*0c50*/ @P5 DFMA R24, R42, R40, R24 ; /* 0x000000282a18522b */ /* 0x002e220000000018 */ /*0c60*/ ISETP.NE.AND P2, PT, R21, RZ, PT ; /* 0x000000ff1500720c */ /* 0x000fca0003f45270 */ /*0c70*/ @P4 LDS.64 R36, [R3.X8+0x3200] ; /* 0x0032000003244984 */ /* 0x000fe80000008a00 */ /*0c80*/ @P4 LDS.64 R38, [R4+0x90] ; /* 0x0000900004264984 */ /* 0x000e620000000a00 */ /*0c90*/ ISETP.NE.AND P3, PT, R51, RZ, PT ; /* 0x000000ff3300720c */ /* 0x000fe20003f65270 */ /*0ca0*/ @P6 DFMA R24, R46, R44, R24 ; /* 0x0000002c2e18622b */ /* 0x001e220000000018 */ /*0cb0*/ ISETP.NE.AND P1, PT, R49, RZ, PT ; /* 0x000000ff3100720c */ /* 0x000fe20003f25270 */ /*0cc0*/ @P0 LDS.64 R40, [R3.X8+0x3300] ; /* 0x0033000003280984 */ /* 0x000fe20000008a00 */ /*0cd0*/ P2R R66, PR, RZ, 0x8 ; /* 0x00000008ff427803 */ /* 0x000fe40000000000 */ /*0ce0*/ ISETP.NE.AND P3, PT, R22, RZ, PT ; /* 0x000000ff1600720c */ /* 0x000fe20003f65270 */ /*0cf0*/ @P2 DFMA R24, R28, R30, R24 ; /* 0x0000001e1c18222b */ /* 0x001ee20000000018 */ /*0d00*/ @P0 LDS.64 R42, [R4+0x98] ; /* 0x00009800042a0984 */ /* 0x000e220000000a00 */ /*0d10*/ ISETP.NE.AND P2, PT, R65, RZ, PT ; /* 0x000000ff4100720c */ /* 0x000fcc0003f45270 */ /*0d20*/ @P1 LDS.64 R44, [R3.X8+0x3400] ; /* 0x00340000032c1984 */ /* 0x000fe80000008a00 */ /*0d30*/ @P1 LDS.64 R46, [R4+0xa0] ; /* 0x0000a000042e1984 */ /* 0x000ea20000000a00 */ /*0d40*/ @P3 DFMA R24, R32, R34, R24 ; /* 0x000000222018322b */ /* 0x0086620000000018 */ /*0d50*/ ISETP.NE.AND P3, PT, R66, RZ, PT ; /* 0x000000ff4200720c */ /* 0x000fe40003f65270 */ /*0d60*/ @P2 LDS.64 R30, [R3.X8+0x3500] ; /* 0x00350000031e2984 */ /* 0x000fe80000008a00 */ /*0d70*/ @P2 LDS.64 R28, [R4+0xa8] ; /* 0x0000a800041c2984 */ /* 0x000f220000000a00 */ /*0d80*/ ISETP.NE.AND P5, PT, R53, RZ, PT ; /* 0x000000ff3500720c */ /* 0x000fcc0003fa5270 */ /*0d90*/ @P3 LDS.64 R34, [R3.X8+0x3600] ; /* 0x0036000003223984 */ /* 0x008fe80000008a00 */ /*0da0*/ @P3 LDS.64 R32, [R4+0xb0] ; /* 0x0000b00004203984 */ /* 0x000ee20000000a00 */ /*0db0*/ @P4 DFMA R24, R36, R38, R24 ; /* 0x000000262418422b */ /* 0x002e220000000018 */ /*0dc0*/ ISETP.NE.AND P4, PT, R67, RZ, PT ; /* 0x000000ff4300720c */ /* 0x000fe40003f85270 */ /*0dd0*/ ISETP.NE.AND P6, PT, R54, RZ, PT ; /* 0x000000ff3600720c */ /* 0x000fc60003fc5270 */ /*0de0*/ @P0 DFMA R24, R40, R42, R24 ; /* 0x0000002a2818022b */ /* 0x0010900000000018 */ /*0df0*/ @P4 LDS.64 R38, [R3.X8+0x3700] ; /* 0x0037000003264984 */ /* 0x000fe80000008a00 */ /*0e00*/ @P4 LDS.64 R36, [R4+0xb8] ; /* 0x0000b80004244984 */ /* 0x000e620000000a00 */ /*0e10*/ ISETP.NE.AND P0, PT, R64, RZ, PT ; /* 0x000000ff4000720c */ /* 0x000fc60003f05270 */ /*0e20*/ @P5 LDS.64 R42, [R3.X8+0x3800] ; /* 0x00380000032a5984 */ /* 0x001fe80000008a00 */ /*0e30*/ @P5 LDS.64 R40, [R4+0xc0] ; /* 0x0000c00004285984 */ /* 0x000e220000000a00 */ /*0e40*/ @P1 DFMA R24, R44, R46, R24 ; /* 0x0000002e2c18122b */ /* 0x0045060000000018 */ /*0e50*/ @P6 LDS.64 R46, [R3.X8+0x3900] ; /* 0x00390000032e6984 */ /* 0x004fe20000008a00 */ /*0e60*/ ISETP.NE.AND P1, PT, R63, RZ, PT ; /* 0x000000ff3f00720c */ /* 0x000fc60003f25270 */ /*0e70*/ @P6 LDS.64 R44, [R4+0xc8] ; /* 0x0000c800042c6984 */ /* 0x000ea20000000a00 */ /*0e80*/ @P2 DFMA R24, R30, R28, R24 ; /* 0x0000001c1e18222b */ /* 0x0108c60000000018 */ /*0e90*/ @P0 LDS.64 R30, [R3.X8+0x3a00] ; /* 0x003a0000031e0984 */ /* 0x010fe80000008a00 */ /*0ea0*/ @P0 LDS.64 R28, [R4+0xd0] ; /* 0x0000d000041c0984 */ /* 0x000f220000000a00 */ /*0eb0*/ @P3 DFMA R24, R34, R32, R24 ; /* 0x000000202218322b */ /* 0x0086620000000018 */ /*0ec0*/ ISETP.NE.AND P2, PT, R62, RZ, PT ; /* 0x000000ff3e00720c */ /* 0x000fe40003f45270 */ /*0ed0*/ @P1 LDS.64 R34, [R3.X8+0x3b00] ; /* 0x003b000003221984 */ /* 0x008fe80000008a00 */ /*0ee0*/ @P1 LDS.64 R32, [R4+0xd8] ; /* 0x0000d80004201984 */ /* 0x000ee20000000a00 */ /*0ef0*/ ISETP.NE.AND P3, PT, R61, RZ, PT ; /* 0x000000ff3d00720c */ /* 0x000fe20003f65270 */ /*0f00*/ @P4 DFMA R24, R38, R36, R24 ; /* 0x000000242618422b */ /* 0x0022220000000018 */ /*0f10*/ ISETP.NE.AND P4, PT, R60, RZ, PT ; /* 0x000000ff3c00720c */ /* 0x000fc80003f85270 */ /*0f20*/ @P2 LDS.64 R38, [R3.X8+0x3c00] ; /* 0x003c000003262984 */ /* 0x002fe80000008a00 */ /*0f30*/ @P2 LDS.64 R36, [R4+0xe0] ; /* 0x0000e00004242984 */ /* 0x000e620000000a00 */ /*0f40*/ @P5 DFMA R24, R42, R40, R24 ; /* 0x000000282a18522b */ /* 0x0010a20000000018 */ /*0f50*/ ISETP.NE.AND P5, PT, R59, RZ, PT ; /* 0x000000ff3b00720c */ /* 0x000fe40003fa5270 */ /*0f60*/ @P3 LDS.64 R42, [R3.X8+0x3d00] ; /* 0x003d0000032a3984 */ /* 0x001fe80000008a00 */ /*0f70*/ @P3 LDS.64 R40, [R4+0xe8] ; /* 0x0000e80004283984 */ /* 0x000e220000000a00 */ /*0f80*/ @P6 DFMA R24, R46, R44, R24 ; /* 0x0000002c2e18622b */ /* 0x0045060000000018 */ /*0f90*/ @P4 LDS.64 R46, [R3.X8+0x3e00] ; /* 0x003e0000032e4984 */ /* 0x004fe80000008a00 */ /*0fa0*/ @P4 LDS.64 R44, [R4+0xf0] ; /* 0x0000f000042c4984 */ /* 0x000ea20000000a00 */ /*0fb0*/ @P0 DFMA R24, R30, R28, R24 ; /* 0x0000001c1e18022b */ /* 0x0108c60000000018 */ /*0fc0*/ @P5 LDS.64 R30, [R3.X8+0x3f00] ; /* 0x003f0000031e5984 */ /* 0x010fe80000008a00 */ /*0fd0*/ @P5 LDS.64 R28, [R4+0xf8] ; /* 0x0000f800041c5984 */ /* 0x000f220000000a00 */ /*0fe0*/ IADD3 R58, R58, 0x1, RZ ; /* 0x000000013a3a7810 */ /* 0x000fe20007ffe0ff */ /*0ff0*/ @P1 DFMA R24, R34, R32, R24 ; /* 0x000000202218122b */ /* 0x0086460000000018 */ /*1000*/ I2F.F64 R32, R58 ; /* 0x0000003a00207312 */ /* 0x008ee60000201c00 */ /*1010*/ @P2 DFMA R24, R38, R36, R24 ; /* 0x000000242618222b */ /* 0x002e220000000018 */ /*1020*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*1030*/ DSETP.GT.AND P6, PT, R26, R32, PT ; /* 0x000000201a00722a */ /* 0x008fc80003fc4000 */ /*1040*/ @P3 DFMA R24, R42, R40, R24 ; /* 0x000000282a18322b */ /* 0x001e8c0000000018 */ /*1050*/ @P4 DFMA R24, R46, R44, R24 ; /* 0x0000002c2e18422b */ /* 0x004f0c0000000018 */ /*1060*/ @P5 DFMA R24, R30, R28, R24 ; /* 0x0000001c1e18522b */ /* 0x0100620000000018 */ /*1070*/ @P6 BRA 0x570 ; /* 0xfffff4f000006947 */ /* 0x000fea000383ffff */ /*1080*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x180], PT ; /* 0x0000600000007a0c */ /* 0x003fc80003f06270 */ /*1090*/ ISETP.GE.OR P0, PT, R2, c[0x0][0x178], P0 ; /* 0x00005e0002007a0c */ /* 0x000fda0000706670 */ /*10a0*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*10b0*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e280000002500 */ /*10c0*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */ /* 0x000e620000002600 */ /*10d0*/ IMAD R3, R3, 0x20, R0 ; /* 0x0000002003037824 */ /* 0x001fe400078e0200 */ /*10e0*/ IMAD R2, R5, 0x20, R2 ; /* 0x0000002005027824 */ /* 0x002fe400078e0202 */ /*10f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x8 ; /* 0x00000008ff057424 */ /* 0x000fe400078e00ff */ /*1100*/ IMAD R2, R2, c[0x0][0x180], R3 ; /* 0x0000600002027a24 */ /* 0x000fc800078e0203 */ /*1110*/ IMAD.WIDE R2, R2, R5, c[0x0][0x160] ; /* 0x0000580002027625 */ /* 0x000fca00078e0205 */ /*1120*/ STG.E.64 [R2.64], R24 ; /* 0x0000001802007986 */ /* 0x000fe2000c101b08 */ /*1130*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*1140*/ BRA 0x1140; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*1150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1180*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*1190*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11a0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11b0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11c0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11d0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11e0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*11f0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include "includes.h" using namespace std; // this amazingly nice error checking function is stolen from: //https://stackoverflow.com/questions/14038589/what-is-the-canonical-way-to-check-for-errors-using-the-cuda-runtime-api __global__ void MatrixMulKernel(double *OutMat, double *Mat1, double *Mat2, int Arows, int Acols, int Bcols) { // row and column within submatrix int blockrow = blockIdx.y;//* int row = threadIdx.y; int blockcol = blockIdx.x; int col = threadIdx.x ; // allocate these arrays only once we can change the values in them later __shared__ double subAshared[BLOCKSIZE*BLOCKSIZE]; __shared__ double subBshared[BLOCKSIZE*BLOCKSIZE]; double Cvalue=0; for (int B = 0; B < ceil((double)(Acols / BLOCKSIZE)) + 1; B++) { // fetch from global memory // yes, these took a LONG time to figure out. Pencil and Paper FTW! /* notice: 1) how these indexes are actually offset a multiple of B, *not 1*. 2) threads are offset by col which will be 1 apart for each thread 3) which means that means all threads in the warp are hitting successive global memory cells */ int Mat1index = (row + blockrow*BLOCKSIZE)*Acols + col + B*BLOCKSIZE; int Mat2index = (B*BLOCKSIZE + row)*Bcols + BLOCKSIZE*blockcol + col; if (Mat1index < Arows*Acols) subAshared[row*BLOCKSIZE + col] = Mat1[Mat1index]; else subAshared[row*BLOCKSIZE + col] = 0; if (Mat2index < Acols*Bcols) subBshared[row*BLOCKSIZE + col] = Mat2[Mat2index]; else subBshared[row*BLOCKSIZE + col] = 0; __syncthreads(); // this computation is all using shared memory (fast) for (int j = 0; j < BLOCKSIZE; j++) if ((row*BLOCKSIZE + j < BLOCKSIZE*BLOCKSIZE) && (j*BLOCKSIZE + col < BLOCKSIZE*BLOCKSIZE)) Cvalue += subAshared[row*BLOCKSIZE + j]*subBshared[j*BLOCKSIZE + col]; __syncthreads(); } if ((row < Arows) && (col < Bcols)) { int finalmatrow = blockrow*BLOCKSIZE + row; int finalmatcol = blockcol*BLOCKSIZE + col; OutMat[finalmatrow*Bcols + finalmatcol] = Cvalue; } }
.text .file "MatrixMulKernel.hip" .globl _Z30__device_stub__MatrixMulKernelPdS_S_iii # -- Begin function _Z30__device_stub__MatrixMulKernelPdS_S_iii .type _Z30__device_stub__MatrixMulKernelPdS_S_iii,@function _Z30__device_stub__MatrixMulKernelPdS_S_iii: # @_Z30__device_stub__MatrixMulKernelPdS_S_iii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $144, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 20(%rsp), %rdx movl %ecx, (%rdx) leaq 16(%rsp), %rcx movl %r8d, (%rcx) leaq 12(%rsp), %r8 movl %r9d, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z15MatrixMulKernelPdS_S_iii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $160, %rsp .cfi_adjust_cfa_offset -160 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z30__device_stub__MatrixMulKernelPdS_S_iii, .Lfunc_end0-_Z30__device_stub__MatrixMulKernelPdS_S_iii .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB1_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB1_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z15MatrixMulKernelPdS_S_iii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end1: .size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB2_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB2_2: retq .Lfunc_end2: .size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor .cfi_endproc # -- End function .type _Z15MatrixMulKernelPdS_S_iii,@object # @_Z15MatrixMulKernelPdS_S_iii .section .rodata,"a",@progbits .globl _Z15MatrixMulKernelPdS_S_iii .p2align 3, 0x0 _Z15MatrixMulKernelPdS_S_iii: .quad _Z30__device_stub__MatrixMulKernelPdS_S_iii .size _Z15MatrixMulKernelPdS_S_iii, 8 .type .L__unnamed_1,@object # @0 .section .rodata.str1.1,"aMS",@progbits,1 .L__unnamed_1: .asciz "_Z15MatrixMulKernelPdS_S_iii" .size .L__unnamed_1, 29 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z30__device_stub__MatrixMulKernelPdS_S_iii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z15MatrixMulKernelPdS_S_iii .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z15MatrixMulKernelPdS_S_iii ; -- Begin function _Z15MatrixMulKernelPdS_S_iii .globl _Z15MatrixMulKernelPdS_S_iii .p2align 8 .type _Z15MatrixMulKernelPdS_S_iii,@function _Z15MatrixMulKernelPdS_S_iii: ; @_Z15MatrixMulKernelPdS_S_iii ; %bb.0: s_clause 0x2 s_load_b128 s[8:11], s[0:1], 0x18 s_load_b128 s[4:7], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 v_bfe_u32 v13, v0, 10, 10 v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0 v_mov_b32_e32 v2, 0 s_delay_alu instid0(VALU_DEP_3) v_lshl_add_u32 v12, s15, 5, v13 s_waitcnt lgkmcnt(0) s_cmpk_lt_i32 s9, 0xffe1 s_cbranch_scc1 .LBB0_14 ; %bb.1: ; %.lr.ph v_lshlrev_b32_e32 v14, 5, v13 v_mad_u64_u32 v[3:4], null, v12, s9, v[0:1] v_mov_b32_e32 v4, 0 v_mov_b32_e32 v5, 0 s_delay_alu instid0(VALU_DEP_4) v_add_lshl_u32 v15, v14, v0, 3 s_ashr_i32 s2, s9, 31 v_lshl_add_u32 v6, s14, 5, v0 s_lshr_b32 s2, s2, 27 v_lshl_or_b32 v17, v0, 3, 0x2000 v_dual_mov_b32 v1, v4 :: v_dual_add_nc_u32 v16, 0x2000, v15 v_lshlrev_b32_e32 v18, 8, v13 v_mov_b32_e32 v2, v5 s_add_i32 s2, s9, s2 s_mul_i32 s3, s9, s8 s_ashr_i32 s2, s2, 5 s_mul_i32 s9, s10, s9 s_mov_b32 s11, 0 .LBB0_2: ; =>This Loop Header: Depth=1 ; Child Loop BB0_7 Depth 2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2) s_lshl_b32 s12, s11, 5 s_mov_b32 s13, exec_lo v_dual_mov_b32 v8, v5 :: v_dual_add_nc_u32 v9, s12, v3 v_mov_b32_e32 v7, v4 v_cmpx_gt_i32_e64 s3, v9 s_cbranch_execz .LBB0_4 ; %bb.3: ; in Loop: Header=BB0_2 Depth=1 v_ashrrev_i32_e32 v10, 31, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], 3, v[9:10] v_add_co_u32 v7, vcc_lo, s6, v7 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo global_load_b64 v[7:8], v[7:8], off .LBB0_4: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s13 v_add_nc_u32_e32 v11, s12, v13 s_mov_b32 s12, exec_lo s_waitcnt vmcnt(0) ds_store_b64 v15, v[7:8] v_mad_u64_u32 v[9:10], null, v11, s10, v[6:7] v_mov_b32_e32 v10, 0 v_mov_b32_e32 v11, 0 s_delay_alu instid0(VALU_DEP_3) v_cmpx_gt_i32_e64 s9, v9 s_cbranch_execz .LBB0_6 ; %bb.5: ; in Loop: Header=BB0_2 Depth=1 v_ashrrev_i32_e32 v10, 31, v9 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_lshlrev_b64 v[7:8], 3, v[9:10] v_add_co_u32 v7, vcc_lo, s0, v7 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo global_load_b64 v[10:11], v[7:8], off .LBB0_6: ; in Loop: Header=BB0_2 Depth=1 s_or_b32 exec_lo, exec_lo, s12 v_dual_mov_b32 v7, v14 :: v_dual_mov_b32 v8, v0 v_mov_b32_e32 v9, v17 s_mov_b32 s12, 0 s_waitcnt vmcnt(0) ds_store_b64 v16, v[10:11] s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv .LBB0_7: ; Parent Loop BB0_2 Depth=1 ; => This Inner Loop Header: Depth=2 s_mov_b32 s13, exec_lo v_cmpx_gt_u32_e32 0x400, v7 s_cbranch_execz .LBB0_11 ; %bb.8: ; in Loop: Header=BB0_7 Depth=2 s_mov_b32 s15, exec_lo v_cmpx_gt_u32_e32 0x400, v8 s_cbranch_execz .LBB0_10 ; %bb.9: ; in Loop: Header=BB0_7 Depth=2 v_add_nc_u32_e32 v10, s12, v18 ds_load_b64 v[10:11], v10 ds_load_b64 v[19:20], v9 s_waitcnt lgkmcnt(0) v_fma_f64 v[1:2], v[10:11], v[19:20], v[1:2] .LBB0_10: ; %Flow ; in Loop: Header=BB0_7 Depth=2 s_or_b32 exec_lo, exec_lo, s15 .LBB0_11: ; in Loop: Header=BB0_7 Depth=2 s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1) s_or_b32 exec_lo, exec_lo, s13 v_add_nc_u32_e32 v9, 0x100, v9 v_add_nc_u32_e32 v8, 32, v8 v_add_nc_u32_e32 v7, 1, v7 s_add_i32 s12, s12, 8 s_cmpk_eq_i32 s12, 0x100 s_cbranch_scc0 .LBB0_7 ; %bb.12: ; in Loop: Header=BB0_2 Depth=1 s_add_i32 s12, s11, 1 s_cmp_le_i32 s2, s11 s_barrier buffer_gl0_inv s_cbranch_scc1 .LBB0_14 ; %bb.13: ; in Loop: Header=BB0_2 Depth=1 s_mov_b32 s11, s12 s_branch .LBB0_2 .LBB0_14: ; %Flow97 v_cmp_gt_i32_e32 vcc_lo, s8, v13 v_cmp_gt_i32_e64 s0, s10, v0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) s_and_b32 s0, vcc_lo, s0 s_and_saveexec_b32 s1, s0 s_cbranch_execz .LBB0_16 ; %bb.15: v_mul_lo_u32 v3, v12, s10 s_lshl_b32 s0, s14, 5 s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) v_add3_u32 v3, s0, v0, v3 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v4, 31, v3 v_lshlrev_b64 v[3:4], 3, v[3:4] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v3, vcc_lo, s4, v3 v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo global_store_b64 v[3:4], v[1:2], off .LBB0_16: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z15MatrixMulKernelPdS_S_iii .amdhsa_group_segment_fixed_size 16384 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 36 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 21 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z15MatrixMulKernelPdS_S_iii, .Lfunc_end0-_Z15MatrixMulKernelPdS_S_iii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 636 ; NumSgprs: 18 ; NumVgprs: 21 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 16384 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 2 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 21 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: by_value .group_segment_fixed_size: 16384 .kernarg_segment_align: 8 .kernarg_segment_size: 36 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z15MatrixMulKernelPdS_S_iii .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z15MatrixMulKernelPdS_S_iii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 21 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
4837f8cb4c38d3016e44e3a82879bc9b7364a7b6
#include <stdio.h> #include <stdlib.h> #include <time.h> #include <sys/time.h> #include <cuda.h> //void Algorithm1(); void Algorithm4(int m, int n, int l); //for gemm 4 algorithm #define BLOCK_SIZE_x 16 #define BLOCK_SIZE_y 4 template<int block_size_x, int block_size_y> __global__ void device_Matrix_multi(const double* const device_matrix_A,const double* const device_matrix_B,double* device_matrix_C,const int m,const int n,const int l) { const int threadid_x = threadIdx.x; const int threadid_y = threadIdx.y; const int blockid_x = blockIdx.x; const int blockid_y = blockIdx.y; __shared__ double matrix_B_shared[block_size_x][block_size_x+1]; double c[block_size_x]; for (int i = 0; i< block_size_x; i++) { c[i] = 0.0; } int idx_A = blockid_x*block_size_x*block_size_y + threadid_x + threadid_y*block_size_x; int idx_B = threadid_x + (blockid_y*block_size_x + threadid_y)*n; int idx_B_last = idx_B + n; int col_A = 0; do { for(int i = 0; i < block_size_x; i += block_size_y) matrix_B_shared[threadid_x][threadid_y + i] = device_matrix_B[idx_B + i*n]; idx_B += block_size_x; __syncthreads(); int i_bound = min(block_size_x, n - col_A); for (int i = 0; i < i_bound; i++, idx_A+=m) { for (int j = 0; j < block_size_x; j++) { c[j] += device_matrix_A[idx_A]*matrix_B_shared[i][j]; } } col_A += block_size_x; __syncthreads(); }while (idx_B < idx_B_last); if (blockid_x*block_size_x*block_size_y + threadid_x + threadid_y*block_size_x < m) { int idx_D = blockid_x*block_size_x*block_size_y + (threadid_x + threadid_y*block_size_x) + blockid_y*block_size_x*m; int i_bound = min(block_size_x, l - blockid_y*block_size_x); for (int i = 0; i < i_bound; i++, idx_D += m) { device_matrix_C[idx_D] = c[i]; } } } int main() { Algorithm4(32, 32, 32); Algorithm4(64, 64, 64); Algorithm4(128,128, 128); Algorithm4(256, 256, 256); Algorithm4(512, 512, 512); Algorithm4(1024, 1024, 1024); Algorithm4(2048, 2048, 2048); Algorithm4(4096, 4096, 4096); } void Algorithm4(int m, int n, int l) { printf("inside function"); double* matrix_A; double* matrix_B; double* matrix_C; double *device_matrix_A; double *device_matrix_B; double *device_matrix_C; cudaEvent_t start, stop; cudaEventCreate(&start); cudaEventCreate(&stop); float milliseconds = 0; // Allocate the device memory matrix_A = (double*)malloc( m*n* sizeof(double)); matrix_B = (double*)malloc( m*l* sizeof(double)); matrix_C = (double*)malloc( m*l*sizeof(double)); cudaMalloc(&device_matrix_A, m*n*sizeof(double)); cudaMalloc(&device_matrix_B, n*l*sizeof(double)); cudaMalloc(&device_matrix_C, m*l*sizeof(double)); for(int i = 0; i < m; i++) { for(int j = 0; j <n; j++){ matrix_A[i *n + j] = rand()%10; matrix_B[i *n + j] = rand()%10; matrix_C[i *n + j] = 0; } } // Copy data from the host memory to the device memory cudaMemcpy(device_matrix_A, matrix_A, m*n*sizeof(double), cudaMemcpyHostToDevice); cudaMemcpy(device_matrix_B, matrix_B, n*l*sizeof(double), cudaMemcpyHostToDevice); dim3 nthreads(0, 0); dim3 nblocks(0, 0); // Launch the kernel nthreads.x = BLOCK_SIZE_x; nthreads.y = BLOCK_SIZE_y; nblocks.x = (m + nthreads.x*nthreads.y - 1)/(nthreads.x*nthreads.y); nblocks.y = (l + nthreads.x - 1)/nthreads.x; cudaEventRecord(start); printf("nuumber of blocks in x = %d\n", nblocks.x); printf("nuumber of blocks in y = %d\n", nblocks.y); printf("number of threads in x = %d\n", nthreads.x); printf("number of threads in y =%d\n", nthreads.y); printf("total threads = %d", nblocks.x*nblocks.y*nthreads.x*nthreads.y); device_Matrix_multi<BLOCK_SIZE_x, BLOCK_SIZE_y> <<<nblocks, nthreads>>> ( device_matrix_A,device_matrix_B, device_matrix_C,m,n,l ); // Copy data from the device memory to the host memory cudaMemcpy(matrix_C, device_matrix_C, m*l*sizeof(double), cudaMemcpyDeviceToHost); cudaEventRecord(stop); for(int i=0; i<m;i++){ for(int j =0; j<n; j++){ } } cudaEventElapsedTime(&milliseconds, start, stop); printf("elaspsed = %f ms\n\n\n", milliseconds); // Free the device memory cudaFree(device_matrix_A); cudaFree(device_matrix_B); cudaFree(device_matrix_C); free(matrix_A); free(matrix_B); free(matrix_C); }
.file "tmpxft_00333790_00000000-6_algorithm4.cudafe1.cpp" .text #APP #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB2033: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE2033: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .type _ZL60__device_stub__Z19device_Matrix_multiILi16ELi4EEvPKdS1_PdiiiPKdS0_Pdiii, @function _ZL60__device_stub__Z19device_Matrix_multiILi16ELi4EEvPKdS1_PdiiiPKdS0_Pdiii: .LFB2055: .cfi_startproc subq $184, %rsp .cfi_def_cfa_offset 192 movq %rdi, 40(%rsp) leaq 72(%rsp), %rdi movq %rsi, 32(%rsp) leaq 84(%rsp), %rsi movq %rdx, 24(%rsp) leaq 56(%rsp), %rdx movl %ecx, 20(%rsp) leaq 64(%rsp), %rcx movl %r8d, 16(%rsp) movl %r9d, 12(%rsp) movq %fs:40, %rax movq %rax, 168(%rsp) xorl %eax, %eax leaq 40(%rsp), %rax movl $1, 80(%rsp) movq %rax, 120(%rsp) leaq 32(%rsp), %rax movq %rax, 128(%rsp) leaq 24(%rsp), %rax movq %rax, 136(%rsp) leaq 20(%rsp), %rax movq %rax, 144(%rsp) leaq 16(%rsp), %rax movq %rax, 152(%rsp) leaq 12(%rsp), %rax movq %rax, 160(%rsp) movabsq $4294967297, %rax movq %rax, 72(%rsp) movq %rax, 84(%rsp) movl $1, 92(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 64(%rsp) .cfi_def_cfa_offset 200 leaq _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii(%rip), %rdi pushq 64(%rsp) .cfi_def_cfa_offset 208 movq 100(%rsp), %rcx movl 108(%rsp), %r8d movq 88(%rsp), %rsi movl 96(%rsp), %edx leaq 136(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 200 popq %rdx .cfi_def_cfa_offset 192 .L2: movq 168(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $184, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2055: .size _ZL60__device_stub__Z19device_Matrix_multiILi16ELi4EEvPKdS1_PdiiiPKdS0_Pdiii, .-_ZL60__device_stub__Z19device_Matrix_multiILi16ELi4EEvPKdS1_PdiiiPKdS0_Pdiii .section .text._Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,"axG",@progbits,_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,comdat .weak _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .type _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii, @function _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii: .LFB2105: .cfi_startproc endbr64 jmp _ZL60__device_stub__Z19device_Matrix_multiILi16ELi4EEvPKdS1_PdiiiPKdS0_Pdiii .cfi_endproc .LFE2105: .size _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii, .-_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .section .rodata.str1.1,"aMS",@progbits,1 .LC0: .string "inside function" .LC3: .string "nuumber of blocks in x = %d\n" .LC4: .string "nuumber of blocks in y = %d\n" .LC5: .string "number of threads in x = %d\n" .LC6: .string "number of threads in y =%d\n" .LC7: .string "total threads = %d" .LC8: .string "elaspsed = %f ms\n\n\n" .text .globl _Z10Algorithm4iii .type _Z10Algorithm4iii, @function _Z10Algorithm4iii: .LFB2030: .cfi_startproc endbr64 pushq %r15 .cfi_def_cfa_offset 16 .cfi_offset 15, -16 pushq %r14 .cfi_def_cfa_offset 24 .cfi_offset 14, -24 movl $10, %r14d pushq %r13 .cfi_def_cfa_offset 32 .cfi_offset 13, -32 pushq %r12 .cfi_def_cfa_offset 40 .cfi_offset 12, -40 movl %edx, %r12d pushq %rbp .cfi_def_cfa_offset 48 .cfi_offset 6, -48 movl %esi, %ebp leaq .LC0(%rip), %rsi pushq %rbx .cfi_def_cfa_offset 56 .cfi_offset 3, -56 movl %edi, %ebx movl $2, %edi subq $152, %rsp .cfi_def_cfa_offset 208 movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax call __printf_chk@PLT leaq 96(%rsp), %rdi call cudaEventCreate@PLT leaq 104(%rsp), %rdi call cudaEventCreate@PLT movl %ebx, %eax movl $0x00000000, 68(%rsp) imull %ebp, %eax cltq salq $3, %rax movq %rax, %rdi movq %rax, 16(%rsp) call malloc@PLT movq %rax, 24(%rsp) movl %ebx, %eax imull %r12d, %eax cltq salq $3, %rax movq %rax, %rdi movq %rax, 8(%rsp) call malloc@PLT movq 8(%rsp), %rdi movq %rax, 32(%rsp) call malloc@PLT movq 16(%rsp), %rsi leaq 72(%rsp), %rdi movq %rax, 40(%rsp) call cudaMalloc@PLT movl %ebp, %eax leaq 80(%rsp), %rdi imull %r12d, %eax cltq salq $3, %rax movq %rax, %rsi movq %rax, 48(%rsp) call cudaMalloc@PLT movq 8(%rsp), %rsi leaq 88(%rsp), %rdi call cudaMalloc@PLT xorl %edi, %edi xorl %r8d, %r8d .L9: cmpl %ebx, %r8d jge .L11 movslq %edi, %rcx xorl %r15d, %r15d leaq 0(,%rcx,8), %r13 .L12: cmpl %ebp, %r15d jge .L17 movl %edi, 60(%rsp) incl %r15d movl %r8d, 56(%rsp) call rand@PLT cltd idivl %r14d movq 24(%rsp), %rax cvtsi2sdl %edx, %xmm0 movsd %xmm0, (%rax,%r13) call rand@PLT movl 60(%rsp), %edi movl 56(%rsp), %r8d cltd idivl %r14d movq 32(%rsp), %rax cvtsi2sdl %edx, %xmm0 movsd %xmm0, (%rax,%r13) movq 40(%rsp), %rax movq $0x000000000, (%rax,%r13) addq $8, %r13 jmp .L12 .L17: incl %r8d addl %ebp, %edi jmp .L9 .L11: movq 16(%rsp), %rdx movq 24(%rsp), %rsi movl $1, %ecx leal 63(%rbx), %r15d movq 72(%rsp), %rdi shrl $6, %r15d leal 15(%r12), %r14d shrl $4, %r14d call cudaMemcpy@PLT movq 48(%rsp), %rdx movq 32(%rsp), %rsi movl $1, %ecx movq 80(%rsp), %rdi call cudaMemcpy@PLT movq 96(%rsp), %rdi xorl %esi, %esi movl $1, 132(%rsp) call cudaEventRecord@PLT movl %r15d, %edx movl $2, %edi xorl %eax, %eax leaq .LC3(%rip), %rsi call __printf_chk@PLT movl %r14d, %edx movl $2, %edi xorl %eax, %eax leaq .LC4(%rip), %rsi call __printf_chk@PLT movl $16, %edx leaq .LC5(%rip), %rsi xorl %eax, %eax movl $2, %edi call __printf_chk@PLT movl $4, %edx leaq .LC6(%rip), %rsi xorl %eax, %eax movl $2, %edi call __printf_chk@PLT movl %r15d, %edx movl $2, %edi xorl %eax, %eax imull %r14d, %edx leaq .LC7(%rip), %rsi sall $6, %edx call __printf_chk@PLT movl %r15d, 124(%rsp) xorl %r9d, %r9d xorl %r8d, %r8d movl %r14d, 128(%rsp) movl $1073741825, %edx movq 124(%rsp), %rdi movl $1, %ecx movl 132(%rsp), %esi salq $4, %rdx call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L13 movq 88(%rsp), %rdx movq 80(%rsp), %rsi movl %r12d, %r9d movl %ebp, %r8d movq 72(%rsp), %rdi movl %ebx, %ecx call _ZL60__device_stub__Z19device_Matrix_multiILi16ELi4EEvPKdS1_PdiiiPKdS0_Pdiii .L13: movq 8(%rsp), %rdx movq 88(%rsp), %rsi movl $2, %ecx movq 40(%rsp), %rdi call cudaMemcpy@PLT movq 104(%rsp), %rdi xorl %esi, %esi call cudaEventRecord@PLT movq 104(%rsp), %rdx movq 96(%rsp), %rsi leaq 68(%rsp), %rdi call cudaEventElapsedTime@PLT leaq .LC8(%rip), %rsi movl $2, %edi movb $1, %al cvtss2sd 68(%rsp), %xmm0 call __printf_chk@PLT movq 72(%rsp), %rdi call cudaFree@PLT movq 80(%rsp), %rdi call cudaFree@PLT movq 88(%rsp), %rdi call cudaFree@PLT movq 24(%rsp), %rdi call free@PLT movq 32(%rsp), %rdi call free@PLT movq 136(%rsp), %rax subq %fs:40, %rax je .L14 call __stack_chk_fail@PLT .L14: movq 40(%rsp), %rdi addq $152, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %rbp .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 jmp free@PLT .cfi_endproc .LFE2030: .size _Z10Algorithm4iii, .-_Z10Algorithm4iii .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB2029: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 movl $32, %edx movl $32, %esi movl $32, %edi call _Z10Algorithm4iii movl $64, %edx movl $64, %esi movl $64, %edi call _Z10Algorithm4iii movl $128, %edx movl $128, %esi movl $128, %edi call _Z10Algorithm4iii movl $256, %edx movl $256, %esi movl $256, %edi call _Z10Algorithm4iii movl $512, %edx movl $512, %esi movl $512, %edi call _Z10Algorithm4iii movl $1024, %edx movl $1024, %esi movl $1024, %edi call _Z10Algorithm4iii movl $2048, %edx movl $2048, %esi movl $2048, %edi call _Z10Algorithm4iii movl $4096, %edx movl $4096, %esi movl $4096, %edi call _Z10Algorithm4iii xorl %eax, %eax popq %rdx .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE2029: .size main, .-main .section .rodata.str1.1 .LC9: .string "_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB2058: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC9(%rip), %rdx movq %rax, %rdi leaq _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE2058: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */ /* 0x000fe400078e00ff */ /*0010*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */ /* 0x000e220000002200 */ /*0020*/ CS2R R46, SRZ ; /* 0x00000000002e7805 */ /* 0x000fe2000001ff00 */ /*0030*/ CS2R R54, SRZ ; /* 0x0000000000367805 */ /* 0x000fe2000001ff00 */ /*0040*/ CS2R R52, SRZ ; /* 0x0000000000347805 */ /* 0x000fe2000001ff00 */ /*0050*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e220000002600 */ /*0060*/ CS2R R34, SRZ ; /* 0x0000000000227805 */ /* 0x000fe2000001ff00 */ /*0070*/ CS2R R32, SRZ ; /* 0x0000000000207805 */ /* 0x000fe2000001ff00 */ /*0080*/ CS2R R14, SRZ ; /* 0x00000000000e7805 */ /* 0x000fe2000001ff00 */ /*0090*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */ /* 0x000e620000002500 */ /*00a0*/ CS2R R8, SRZ ; /* 0x0000000000087805 */ /* 0x000fe2000001ff00 */ /*00b0*/ CS2R R42, SRZ ; /* 0x00000000002a7805 */ /* 0x000fe2000001ff00 */ /*00c0*/ CS2R R50, SRZ ; /* 0x0000000000327805 */ /* 0x000fe2000001ff00 */ /*00d0*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */ /* 0x000e620000002100 */ /*00e0*/ CS2R R40, SRZ ; /* 0x0000000000287805 */ /* 0x000fe2000001ff00 */ /*00f0*/ CS2R R38, SRZ ; /* 0x0000000000267805 */ /* 0x000fe2000001ff00 */ /*0100*/ CS2R R10, SRZ ; /* 0x00000000000a7805 */ /* 0x000fe2000001ff00 */ /*0110*/ CS2R R12, SRZ ; /* 0x00000000000c7805 */ /* 0x000fe2000001ff00 */ /*0120*/ CS2R R44, SRZ ; /* 0x00000000002c7805 */ /* 0x000fe2000001ff00 */ /*0130*/ CS2R R48, SRZ ; /* 0x0000000000307805 */ /* 0x000fe2000001ff00 */ /*0140*/ CS2R R58, SRZ ; /* 0x00000000003a7805 */ /* 0x000fe2000001ff00 */ /*0150*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */ /* 0x000fc40000000a00 */ /*0160*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */ /* 0x000fe20008000000 */ /*0170*/ IMAD R2, R2, 0x10, R5 ; /* 0x0000001002027824 */ /* 0x001fe400078e0205 */ /*0180*/ IMAD R3, R3, 0x40, R0.reuse ; /* 0x0000004003037824 */ /* 0x102fe400078e0200 */ /*0190*/ IMAD R2, R2, c[0x0][0x17c], R0 ; /* 0x00005f0002027a24 */ /* 0x000fe400078e0200 */ /*01a0*/ IMAD R3, R5, 0x10, R3 ; /* 0x0000001005037824 */ /* 0x000fe400078e0203 */ /*01b0*/ IMAD R4, R0, 0x11, R5 ; /* 0x0000001100047824 */ /* 0x000fe200078e0205 */ /*01c0*/ MOV R0, RZ ; /* 0x000000ff00007202 */ /* 0x000fe20000000f00 */ /*01d0*/ IMAD.MOV.U32 R6, RZ, RZ, R3 ; /* 0x000000ffff067224 */ /* 0x000fe200078e0003 */ /*01e0*/ IADD3 R5, R2, c[0x0][0x17c], RZ ; /* 0x00005f0002057a10 */ /* 0x000fc40007ffe0ff */ /*01f0*/ IMAD.MOV.U32 R16, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff107624 */ /* 0x005fe400078e00ff */ /*0200*/ IMAD.MOV.U32 R7, RZ, RZ, 0x8 ; /* 0x00000008ff077424 */ /* 0x000fc600078e00ff */ /*0210*/ SHF.L.U32 R19, R16, 0x2, RZ ; /* 0x0000000210137819 */ /* 0x000fe200000006ff */ /*0220*/ IMAD.WIDE R16, R2, R7, c[0x0][0x168] ; /* 0x00005a0002107625 */ /* 0x000fc600078e0207 */ /*0230*/ IADD3 R20, R19, R19, R2 ; /* 0x0000001313147210 */ /* 0x000fca0007ffe002 */ /*0240*/ IMAD.IADD R22, R19.reuse, 0x1, R20 ; /* 0x0000000113167824 */ /* 0x040fe400078e0214 */ /*0250*/ IMAD.WIDE R18, R19, 0x8, R16 ; /* 0x0000000813127825 */ /* 0x000fe400078e0210 */ /*0260*/ LDG.E.64 R16, [R16.64] ; /* 0x0000000810107981 */ /* 0x000ea4000c1e1b00 */ /*0270*/ IMAD.WIDE R20, R20, R7.reuse, c[0x0][0x168] ; /* 0x00005a0014147625 */ /* 0x080fe400078e0207 */ /*0280*/ LDG.E.64 R18, [R18.64] ; /* 0x0000000812127981 */ /* 0x000ee4000c1e1b00 */ /*0290*/ IMAD.WIDE R22, R22, R7, c[0x0][0x168] ; /* 0x00005a0016167625 */ /* 0x000fc400078e0207 */ /*02a0*/ LDG.E.64 R20, [R20.64] ; /* 0x0000000814147981 */ /* 0x000f28000c1e1b00 */ /*02b0*/ LDG.E.64 R22, [R22.64] ; /* 0x0000000816167981 */ /* 0x000f62000c1e1b00 */ /*02c0*/ ISETP.GE.AND P1, PT, R0, c[0x0][0x17c], PT ; /* 0x00005f0000007a0c */ /* 0x000fe20003f26270 */ /*02d0*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */ /* 0x000fe20003800000 */ /*02e0*/ IADD3 R2, R2, 0x10, RZ ; /* 0x0000001002027810 */ /* 0x000fc80007ffe0ff */ /*02f0*/ ISETP.GE.AND P0, PT, R2, R5, PT ; /* 0x000000050200720c */ /* 0x000fe20003f06270 */ /*0300*/ STS.64 [R4.X8], R16 ; /* 0x0000001004007388 */ /* 0x0041e80000008a00 */ /*0310*/ STS.64 [R4.X8+0x20], R18 ; /* 0x0000201204007388 */ /* 0x0081e80000008a00 */ /*0320*/ STS.64 [R4.X8+0x40], R20 ; /* 0x0000401404007388 */ /* 0x0101e80000008a00 */ /*0330*/ STS.64 [R4.X8+0x60], R22 ; /* 0x0000601604007388 */ /* 0x0201e80000008a00 */ /*0340*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x000fec0000010000 */ /*0350*/ @P1 BRA 0xa40 ; /* 0x000006e000001947 */ /* 0x000fea0003800000 */ /*0360*/ ULDC UR5, c[0x0][0x17c] ; /* 0x00005f0000057ab9 */ /* 0x000fe20000000800 */ /*0370*/ LOP3.LUT R16, RZ, c[0x0][0x17c], RZ, 0x33, !PT ; /* 0x00005f00ff107a12 */ /* 0x001fe200078e33ff */ /*0380*/ ULOP3.LUT UR5, URZ, UR5, URZ, 0x33, !UPT ; /* 0x000000053f057292 */ /* 0x000fc6000f8e333f */ /*0390*/ IADD3 R16, R16, UR4, RZ ; /* 0x0000000410107c10 */ /* 0x000fe2000fffe0ff */ /*03a0*/ UIADD3 UR5, UR5, UR4, URZ ; /* 0x0000000405057290 */ /* 0x000fc6000fffe03f */ /*03b0*/ IMNMX R16, R16, -0x11, !PT ; /* 0xffffffef10107817 */ /* 0x000fe20007800200 */ /*03c0*/ UISETP.LT.AND UP0, UPT, UR5, -0x11, UPT ; /* 0xffffffef0500788c */ /* 0x000fc6000bf01270 */ /*03d0*/ ISETP.GT.AND P2, PT, R16, -0x3, PT ; /* 0xfffffffd1000780c */ /* 0x000fe20003f44270 */ /*03e0*/ USEL UR5, UR5, 0xffffffef, !UP0 ; /* 0xffffffef05057887 */ /* 0x000fe2000c000000 */ /*03f0*/ LOP3.LUT R16, RZ, R16, RZ, 0x33, !PT ; /* 0x00000010ff107212 */ /* 0x000fc600078e33ff */ /*0400*/ ULOP3.LUT UR5, URZ, UR5, URZ, 0x33, !UPT ; /* 0x000000053f057292 */ /* 0x000fe2000f8e333f */ /*0410*/ IMNMX R16, R16, 0x1, !PT ; /* 0x0000000110107817 */ /* 0x000fc60007800200 */ /*0420*/ UISETP.LT.AND UP0, UPT, UR5, 0x1, UPT ; /* 0x000000010500788c */ /* 0x000fe2000bf01270 */ /*0430*/ LOP3.LUT R17, R16, 0x1, RZ, 0xc0, !PT ; /* 0x0000000110117812 */ /* 0x000fc600078ec0ff */ /*0440*/ USEL UR5, UR5, 0x1, !UP0 ; /* 0x0000000105057887 */ /* 0x000fc8000c000000 */ /*0450*/ ULOP3.LUT UR5, UR5, 0x1, URZ, 0xc0, !UPT ; /* 0x0000000105057892 */ /* 0x000fcc000f8ec03f */ /*0460*/ ISETP.NE.AND P1, PT, RZ, UR5, PT ; /* 0x00000005ff007c0c */ /* 0x000fe2000bf25270 */ /*0470*/ UMOV UR5, URZ ; /* 0x0000003f00057c82 */ /* 0x000fe20008000000 */ /*0480*/ @P2 BRA 0x870 ; /* 0x000003e000002947 */ /* 0x000ff60003800000 */ /*0490*/ IMAD.IADD R36, R16, 0x1, -R17 ; /* 0x0000000110247824 */ /* 0x000fe200078e0a11 */ /*04a0*/ UMOV UR5, URZ ; /* 0x0000003f00057c82 */ /* 0x000fe40008000000 */ /*04b0*/ IMAD.WIDE R28, R6, R7, c[0x0][0x160] ; /* 0x00005800061c7625 */ /* 0x008fca00078e0207 */ /*04c0*/ LDG.E.64 R60, [R28.64] ; /* 0x000000081c3c7981 */ /* 0x0010a2000c1e1b00 */ /*04d0*/ IMAD.WIDE R56, R7, c[0x0][0x178], R28 ; /* 0x00005e0007387a25 */ /* 0x000fcc00078e021c */ /*04e0*/ LDG.E.64 R56, [R56.64] ; /* 0x0000000838387981 */ /* 0x000ee2000c1e1b00 */ /*04f0*/ UIMAD UR6, UR5, 0x88, URZ ; /* 0x00000088050678a4 */ /* 0x000fe2000f8e023f */ /*0500*/ IADD3 R36, R36, -0x2, RZ ; /* 0xfffffffe24247810 */ /* 0x000fe20007ffe0ff */ /*0510*/ UIADD3 UR5, UR5, 0x2, URZ ; /* 0x0000000205057890 */ /* 0x000fc6000fffe03f */ /*0520*/ ISETP.NE.AND P2, PT, R36, RZ, PT ; /* 0x000000ff2400720c */ /* 0x000fc80003f45270 */ /*0530*/ LDS.128 R20, [UR6] ; /* 0x00000006ff147984 */ /* 0x000ea80008000c00 */ /*0540*/ LDS.128 R16, [UR6+0x10] ; /* 0x00001006ff107984 */ /* 0x000e680008000c00 */ /*0550*/ LDS.128 R28, [UR6+0x40] ; /* 0x00004006ff1c7984 */ /* 0x001e280008000c00 */ /*0560*/ LDS.128 R24, [UR6+0x30] ; /* 0x00003006ff187984 */ /* 0x000f220008000c00 */ /*0570*/ DFMA R58, R20, R60, R58 ; /* 0x0000003c143a722b */ /* 0x004fc8000000003a */ /*0580*/ DFMA R48, R60.reuse, R22, R48 ; /* 0x000000163c30722b */ /* 0x0405e40000000030 */ /*0590*/ LDS.128 R20, [UR6+0x20] ; /* 0x00002006ff147984 */ /* 0x004ea40008000c00 */ /*05a0*/ DFMA R44, R60, R16, R44 ; /* 0x000000103c2c722b */ /* 0x002fc8000000002c */ /*05b0*/ DFMA R62, R60.reuse, R18, R12 ; /* 0x000000123c3e722b */ /* 0x0403e4000000000c */ /*05c0*/ LDS.128 R16, [UR6+0x50] ; /* 0x00005006ff107984 */ /* 0x002e640008000c00 */ /*05d0*/ DFMA R42, R60, R28, R42 ; /* 0x0000001c3c2a722b */ /* 0x001fc8000000002a */ /*05e0*/ DFMA R40, R60, R24, R40 ; /* 0x000000183c28722b */ /* 0x010fc80000000028 */ /*05f0*/ DFMA R50, R60.reuse, R26, R50 ; /* 0x0000001a3c32722b */ /* 0x0401e40000000032 */ /*0600*/ LDS.128 R24, [UR6+0x70] ; /* 0x00007006ff187984 */ /* 0x001e240008000c00 */ /*0610*/ DFMA R30, R60, R30, R8 ; /* 0x0000001e3c1e722b */ /* 0x000fc80000000008 */ /*0620*/ DFMA R64, R60.reuse, R20, R10 ; /* 0x000000143c40722b */ /* 0x0444e4000000000a */ /*0630*/ LDS.128 R8, [UR6+0xa0] ; /* 0x0000a006ff087984 */ /* 0x004ee40008000c00 */ /*0640*/ DFMA R38, R60.reuse, R22, R38 ; /* 0x000000163c26722b */ /* 0x0405e40000000026 */ /*0650*/ LDS.128 R20, [UR6+0x60] ; /* 0x00006006ff147984 */ /* 0x004ea40008000c00 */ /*0660*/ DFMA R28, R60.reuse, R16, R14 ; /* 0x000000103c1c722b */ /* 0x0423e4000000000e */ /*0670*/ LDS.128 R12, [UR6+0x90] ; /* 0x00009006ff0c7984 */ /* 0x002fe40008000c00 */ /*0680*/ DFMA R66, R60, R18, R32 ; /* 0x000000123c42722b */ /* 0x0003c40000000020 */ /*0690*/ LDS.128 R16, [UR6+0xc0] ; /* 0x0000c006ff107984 */ /* 0x002e640008000c00 */ /*06a0*/ DFMA R24, R60, R24, R54 ; /* 0x000000183c18722b */ /* 0x001fc80000000036 */ /*06b0*/ DFMA R26, R60, R26, R46 ; /* 0x0000001a3c1a722b */ /* 0x000124000000002e */ /*06c0*/ LDS.64 R46, [UR6+0x100] ; /* 0x00010006ff2e7984 */ /* 0x001f240008000a00 */ /*06d0*/ DFMA R10, R56, R10, R64 ; /* 0x0000000a380a722b */ /* 0x008fc80000000040 */ /*06e0*/ DFMA R68, R60.reuse, R20, R34 ; /* 0x000000143c44722b */ /* 0x0441e40000000022 */ /*06f0*/ LDS.128 R32, [UR6+0xe0] ; /* 0x0000e006ff207984 */ /* 0x001e240008000c00 */ /*0700*/ DFMA R52, R60, R22, R52 ; /* 0x000000163c34722b */ /* 0x0004e40000000034 */ /*0710*/ LDS.128 R20, [UR6+0xb0] ; /* 0x0000b006ff147984 */ /* 0x004ea40008000c00 */ /*0720*/ DFMA R50, R56.reuse, R16, R50 ; /* 0x000000103832722b */ /* 0x042e640000000032 */ /*0730*/ LDS.64 R60, [UR6+0x88] ; /* 0x00008806ff3c7984 */ /* 0x000fe40008000a00 */ /*0740*/ DFMA R42, R56, R18, R42 ; /* 0x00000012382a722b */ /* 0x000a04000000002a */ /*0750*/ LDS.128 R16, [UR6+0xf0] ; /* 0x0000f006ff107984 */ /* 0x020ee40008000c00 */ /*0760*/ DFMA R48, R56, R12, R48 ; /* 0x0000000c3830722b */ /* 0x000e080000000030 */ /*0770*/ DFMA R44, R56, R14, R44 ; /* 0x0000000e382c722b */ /* 0x000e08000000002c */ /*0780*/ DFMA R12, R56, R8, R62 ; /* 0x00000008380c722b */ /* 0x000e08000000003e */ /*0790*/ DFMA R46, R56, R46, R26 ; /* 0x0000002e382e722b */ /* 0x010f08000000001a */ /*07a0*/ DFMA R32, R56, R32, R66 ; /* 0x000000203820722b */ /* 0x001e080000000042 */ /*07b0*/ DFMA R38, R56, R20, R38 ; /* 0x000000143826722b */ /* 0x004e880000000026 */ /*07c0*/ DFMA R40, R56.reuse, R22, R40 ; /* 0x000000163828722b */ /* 0x040a240000000028 */ /*07d0*/ LDS.128 R20, [UR6+0xd0] ; /* 0x0000d006ff147984 */ /* 0x020f640008000c00 */ /*07e0*/ DFMA R52, R56.reuse, R16, R52 ; /* 0x000000103834722b */ /* 0x0486240000000034 */ /*07f0*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff117624 */ /* 0x008fe400078e00ff */ /*0800*/ DFMA R34, R56, R34, R68 ; /* 0x000000223822722b */ /* 0x0006060000000044 */ /*0810*/ LEA R6, R17, R6, 0x1 ; /* 0x0000000611067211 */ /* 0x000fe200078e08ff */ /*0820*/ DFMA R54, R56, R18, R24 ; /* 0x000000123836722b */ /* 0x0006080000000018 */ /*0830*/ DFMA R58, R60, R56, R58 ; /* 0x000000383c3a722b */ /* 0x000608000000003a */ /*0840*/ DFMA R8, R56, R20, R30 ; /* 0x000000143808722b */ /* 0x020608000000001e */ /*0850*/ DFMA R14, R56, R22, R28 ; /* 0x00000016380e722b */ /* 0x000622000000001c */ /*0860*/ @P2 BRA 0x4b0 ; /* 0xfffffc4000002947 */ /* 0x016fea000383ffff */ /*0870*/ @!P1 BRA 0xa40 ; /* 0x000001c000009947 */ /* 0x000fea0003800000 */ /*0880*/ IMAD.WIDE R36, R6, R7, c[0x0][0x160] ; /* 0x0000580006247625 */ /* 0x000fcc00078e0207 */ /*0890*/ LDG.E.64 R36, [R36.64] ; /* 0x0000000824247981 */ /* 0x000ea2000c1e1b00 */ /*08a0*/ UIMAD UR5, UR5, 0x88, URZ ; /* 0x00000088050578a4 */ /* 0x000fe2000f8e023f */ /*08b0*/ IADD3 R6, R6, c[0x0][0x178], RZ ; /* 0x00005e0006067a10 */ /* 0x000fd00007ffe0ff */ /*08c0*/ LDS.128 R20, [UR5] ; /* 0x00000005ff147984 */ /* 0x008ea80008000c00 */ /*08d0*/ LDS.128 R24, [UR5+0x10] ; /* 0x00001005ff187984 */ /* 0x000e680008000c00 */ /*08e0*/ LDS.128 R28, [UR5+0x20] ; /* 0x00002005ff1c7984 */ /* 0x000ee80008000c00 */ /*08f0*/ LDS.128 R16, [UR5+0x30] ; /* 0x00003005ff107984 */ /* 0x000f220008000c00 */ /*0900*/ DFMA R58, R20, R36, R58 ; /* 0x00000024143a722b */ /* 0x005e08000000003a */ /*0910*/ DFMA R48, R36.reuse, R22, R48 ; /* 0x000000162430722b */ /* 0x0404240000000030 */ /*0920*/ LDS.128 R20, [UR5+0x50] ; /* 0x00005005ff147984 */ /* 0x004ea40008000c00 */ /*0930*/ DFMA R44, R36, R24, R44 ; /* 0x00000018242c722b */ /* 0x002e48000000002c */ /*0940*/ DFMA R12, R36.reuse, R26, R12 ; /* 0x0000001a240c722b */ /* 0x040a24000000000c */ /*0950*/ LDS.128 R24, [UR5+0x40] ; /* 0x00004005ff187984 */ /* 0x020f640008000c00 */ /*0960*/ DFMA R10, R36, R28, R10 ; /* 0x0000001c240a722b */ /* 0x008ec8000000000a */ /*0970*/ DFMA R38, R36.reuse, R30, R38 ; /* 0x0000001e2426722b */ /* 0x0400240000000026 */ /*0980*/ LDS.128 R28, [UR5+0x70] ; /* 0x00007005ff1c7984 */ /* 0x001e240008000c00 */ /*0990*/ DFMA R40, R36, R16, R40 ; /* 0x000000102428722b */ /* 0x010f080000000028 */ /*09a0*/ DFMA R50, R36.reuse, R18, R50 ; /* 0x000000122432722b */ /* 0x0402240000000032 */ /*09b0*/ LDS.128 R16, [UR5+0x60] ; /* 0x00006005ff107984 */ /* 0x002e640008000c00 */ /*09c0*/ DFMA R14, R36, R20, R14 ; /* 0x00000014240e722b */ /* 0x004408000000000e */ /*09d0*/ DFMA R32, R36, R22, R32 ; /* 0x000000162420722b */ /* 0x0004080000000020 */ /*09e0*/ DFMA R42, R36, R24, R42 ; /* 0x00000018242a722b */ /* 0x020408000000002a */ /*09f0*/ DFMA R8, R36, R26, R8 ; /* 0x0000001a2408722b */ /* 0x0004080000000008 */ /*0a00*/ DFMA R54, R36, R28, R54 ; /* 0x0000001c2436722b */ /* 0x0014080000000036 */ /*0a10*/ DFMA R46, R36, R30, R46 ; /* 0x0000001e242e722b */ /* 0x000408000000002e */ /*0a20*/ DFMA R34, R36, R16, R34 ; /* 0x000000102422722b */ /* 0x0024480000000022 */ /*0a30*/ DFMA R52, R36, R18, R52 ; /* 0x000000122434722b */ /* 0x0004080000000034 */ /*0a40*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */ /* 0x01afe20000010000 */ /*0a50*/ UIADD3 UR4, UR4, 0x10, URZ ; /* 0x0000001004047890 */ /* 0x000fe2000fffe03f */ /*0a60*/ IADD3 R0, R0, 0x10, RZ ; /* 0x0000001000007810 */ /* 0x000fc80007ffe0ff */ /*0a70*/ @!P0 BRA 0x1f0 ; /* 0xfffff77000008947 */ /* 0x000fea000383ffff */ /*0a80*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x178], PT ; /* 0x00005e0003007a0c */ /* 0x000fda0003f06270 */ /*0a90*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0aa0*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */ /* 0x000e640000002600 */ /*0ab0*/ IMAD.SHL.U32 R2, R2, 0x10, RZ ; /* 0x0000001002027824 */ /* 0x002fca00078e00ff */ /*0ac0*/ IADD3 R0, -R2, c[0x0][0x180], RZ ; /* 0x0000600002007a10 */ /* 0x000fc80007ffe1ff */ /*0ad0*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */ /* 0x000fda0003f06270 */ /*0ae0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0af0*/ IMNMX R0, R0, 0x10, PT ; /* 0x0000001000007817 */ /* 0x000fe20003800200 */ /*0b00*/ IMAD R2, R2, c[0x0][0x178], R3 ; /* 0x00005e0002027a24 */ /* 0x000fc600078e0203 */ /*0b10*/ ISETP.GE.AND P0, PT, R0, 0x2, PT ; /* 0x000000020000780c */ /* 0x000fe20003f06270 */ /*0b20*/ IMAD.WIDE R2, R2, R7, c[0x0][0x170] ; /* 0x00005c0002027625 */ /* 0x000fca00078e0207 */ /*0b30*/ STG.E.64 [R2.64], R58 ; /* 0x0000003a02007986 */ /* 0x0011ee000c101b08 */ /*0b40*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0b50*/ ISETP.NE.AND P0, PT, R0, 0x2, PT ; /* 0x000000020000780c */ /* 0x000fe20003f05270 */ /*0b60*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0b70*/ STG.E.64 [R2.64], R48 ; /* 0x0000003002007986 */ /* 0x0001ee000c101b08 */ /*0b80*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0b90*/ ISETP.GE.AND P0, PT, R0, 0x4, PT ; /* 0x000000040000780c */ /* 0x000fe20003f06270 */ /*0ba0*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0bb0*/ STG.E.64 [R2.64], R44 ; /* 0x0000002c02007986 */ /* 0x0001ee000c101b08 */ /*0bc0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0bd0*/ ISETP.NE.AND P0, PT, R0, 0x4, PT ; /* 0x000000040000780c */ /* 0x000fe20003f05270 */ /*0be0*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0bf0*/ STG.E.64 [R2.64], R12 ; /* 0x0000000c02007986 */ /* 0x0001ee000c101b08 */ /*0c00*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0c10*/ ISETP.GE.AND P0, PT, R0, 0x6, PT ; /* 0x000000060000780c */ /* 0x000fe20003f06270 */ /*0c20*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0c30*/ STG.E.64 [R2.64], R10 ; /* 0x0000000a02007986 */ /* 0x0001ee000c101b08 */ /*0c40*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0c50*/ ISETP.NE.AND P0, PT, R0, 0x6, PT ; /* 0x000000060000780c */ /* 0x000fe20003f05270 */ /*0c60*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0c70*/ STG.E.64 [R2.64], R38 ; /* 0x0000002602007986 */ /* 0x0001ee000c101b08 */ /*0c80*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0c90*/ ISETP.GE.AND P0, PT, R0, 0x8, PT ; /* 0x000000080000780c */ /* 0x000fe20003f06270 */ /*0ca0*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0cb0*/ STG.E.64 [R2.64], R40 ; /* 0x0000002802007986 */ /* 0x0001ee000c101b08 */ /*0cc0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0cd0*/ ISETP.NE.AND P0, PT, R0, 0x8, PT ; /* 0x000000080000780c */ /* 0x000fe20003f05270 */ /*0ce0*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0cf0*/ STG.E.64 [R2.64], R50 ; /* 0x0000003202007986 */ /* 0x0001ee000c101b08 */ /*0d00*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0d10*/ ISETP.GE.AND P0, PT, R0, 0xa, PT ; /* 0x0000000a0000780c */ /* 0x000fe20003f06270 */ /*0d20*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0d30*/ STG.E.64 [R2.64], R42 ; /* 0x0000002a02007986 */ /* 0x0001ee000c101b08 */ /*0d40*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0d50*/ ISETP.NE.AND P0, PT, R0, 0xa, PT ; /* 0x0000000a0000780c */ /* 0x000fe20003f05270 */ /*0d60*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0d70*/ STG.E.64 [R2.64], R8 ; /* 0x0000000802007986 */ /* 0x0001ee000c101b08 */ /*0d80*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0d90*/ ISETP.GE.AND P0, PT, R0, 0xc, PT ; /* 0x0000000c0000780c */ /* 0x000fe20003f06270 */ /*0da0*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0db0*/ STG.E.64 [R2.64], R14 ; /* 0x0000000e02007986 */ /* 0x0001ee000c101b08 */ /*0dc0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0dd0*/ ISETP.NE.AND P0, PT, R0, 0xc, PT ; /* 0x0000000c0000780c */ /* 0x000fe20003f05270 */ /*0de0*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0df0*/ STG.E.64 [R2.64], R32 ; /* 0x0000002002007986 */ /* 0x0001ee000c101b08 */ /*0e00*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0e10*/ ISETP.GE.AND P0, PT, R0, 0xe, PT ; /* 0x0000000e0000780c */ /* 0x000fe20003f06270 */ /*0e20*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0e30*/ STG.E.64 [R2.64], R34 ; /* 0x0000002202007986 */ /* 0x0001ee000c101b08 */ /*0e40*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0e50*/ ISETP.NE.AND P0, PT, R0, 0xe, PT ; /* 0x0000000e0000780c */ /* 0x000fe20003f05270 */ /*0e60*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0e70*/ STG.E.64 [R2.64], R52 ; /* 0x0000003402007986 */ /* 0x0001ee000c101b08 */ /*0e80*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0e90*/ ISETP.GE.AND P0, PT, R0, 0x10, PT ; /* 0x000000100000780c */ /* 0x000fe20003f06270 */ /*0ea0*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0eb0*/ STG.E.64 [R2.64], R54 ; /* 0x0000003602007986 */ /* 0x0001ee000c101b08 */ /*0ec0*/ @!P0 EXIT ; /* 0x000000000000894d */ /* 0x000fea0003800000 */ /*0ed0*/ IMAD.WIDE R2, R7, c[0x0][0x178], R2 ; /* 0x00005e0007027a25 */ /* 0x001fca00078e0202 */ /*0ee0*/ STG.E.64 [R2.64], R46 ; /* 0x0000002e02007986 */ /* 0x000fe2000c101b08 */ /*0ef0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*0f00*/ BRA 0xf00; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0f10*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f20*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f30*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f40*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f50*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f60*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f70*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f80*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0f90*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fa0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fb0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fc0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fd0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0fe0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0ff0*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <stdio.h> #include <stdlib.h> #include <time.h> #include <sys/time.h> #include <hip/hip_runtime.h> //void Algorithm1(); void Algorithm4(int m, int n, int l); //for gemm 4 algorithm #define BLOCK_SIZE_x 16 #define BLOCK_SIZE_y 4 template<int block_size_x, int block_size_y> __global__ void device_Matrix_multi(const double* const device_matrix_A,const double* const device_matrix_B,double* device_matrix_C,const int m,const int n,const int l) { const int threadid_x = threadIdx.x; const int threadid_y = threadIdx.y; const int blockid_x = blockIdx.x; const int blockid_y = blockIdx.y; __shared__ double matrix_B_shared[block_size_x][block_size_x+1]; double c[block_size_x]; for (int i = 0; i< block_size_x; i++) { c[i] = 0.0; } int idx_A = blockid_x*block_size_x*block_size_y + threadid_x + threadid_y*block_size_x; int idx_B = threadid_x + (blockid_y*block_size_x + threadid_y)*n; int idx_B_last = idx_B + n; int col_A = 0; do { for(int i = 0; i < block_size_x; i += block_size_y) matrix_B_shared[threadid_x][threadid_y + i] = device_matrix_B[idx_B + i*n]; idx_B += block_size_x; __syncthreads(); int i_bound = min(block_size_x, n - col_A); for (int i = 0; i < i_bound; i++, idx_A+=m) { for (int j = 0; j < block_size_x; j++) { c[j] += device_matrix_A[idx_A]*matrix_B_shared[i][j]; } } col_A += block_size_x; __syncthreads(); }while (idx_B < idx_B_last); if (blockid_x*block_size_x*block_size_y + threadid_x + threadid_y*block_size_x < m) { int idx_D = blockid_x*block_size_x*block_size_y + (threadid_x + threadid_y*block_size_x) + blockid_y*block_size_x*m; int i_bound = min(block_size_x, l - blockid_y*block_size_x); for (int i = 0; i < i_bound; i++, idx_D += m) { device_matrix_C[idx_D] = c[i]; } } } int main() { Algorithm4(32, 32, 32); Algorithm4(64, 64, 64); Algorithm4(128,128, 128); Algorithm4(256, 256, 256); Algorithm4(512, 512, 512); Algorithm4(1024, 1024, 1024); Algorithm4(2048, 2048, 2048); Algorithm4(4096, 4096, 4096); } void Algorithm4(int m, int n, int l) { printf("inside function"); double* matrix_A; double* matrix_B; double* matrix_C; double *device_matrix_A; double *device_matrix_B; double *device_matrix_C; hipEvent_t start, stop; hipEventCreate(&start); hipEventCreate(&stop); float milliseconds = 0; // Allocate the device memory matrix_A = (double*)malloc( m*n* sizeof(double)); matrix_B = (double*)malloc( m*l* sizeof(double)); matrix_C = (double*)malloc( m*l*sizeof(double)); hipMalloc(&device_matrix_A, m*n*sizeof(double)); hipMalloc(&device_matrix_B, n*l*sizeof(double)); hipMalloc(&device_matrix_C, m*l*sizeof(double)); for(int i = 0; i < m; i++) { for(int j = 0; j <n; j++){ matrix_A[i *n + j] = rand()%10; matrix_B[i *n + j] = rand()%10; matrix_C[i *n + j] = 0; } } // Copy data from the host memory to the device memory hipMemcpy(device_matrix_A, matrix_A, m*n*sizeof(double), hipMemcpyHostToDevice); hipMemcpy(device_matrix_B, matrix_B, n*l*sizeof(double), hipMemcpyHostToDevice); dim3 nthreads(0, 0); dim3 nblocks(0, 0); // Launch the kernel nthreads.x = BLOCK_SIZE_x; nthreads.y = BLOCK_SIZE_y; nblocks.x = (m + nthreads.x*nthreads.y - 1)/(nthreads.x*nthreads.y); nblocks.y = (l + nthreads.x - 1)/nthreads.x; hipEventRecord(start); printf("nuumber of blocks in x = %d\n", nblocks.x); printf("nuumber of blocks in y = %d\n", nblocks.y); printf("number of threads in x = %d\n", nthreads.x); printf("number of threads in y =%d\n", nthreads.y); printf("total threads = %d", nblocks.x*nblocks.y*nthreads.x*nthreads.y); device_Matrix_multi<BLOCK_SIZE_x, BLOCK_SIZE_y> <<<nblocks, nthreads>>> ( device_matrix_A,device_matrix_B, device_matrix_C,m,n,l ); // Copy data from the device memory to the host memory hipMemcpy(matrix_C, device_matrix_C, m*l*sizeof(double), hipMemcpyDeviceToHost); hipEventRecord(stop); for(int i=0; i<m;i++){ for(int j =0; j<n; j++){ } } hipEventElapsedTime(&milliseconds, start, stop); printf("elaspsed = %f ms\n\n\n", milliseconds); // Free the device memory hipFree(device_matrix_A); hipFree(device_matrix_B); hipFree(device_matrix_C); free(matrix_A); free(matrix_B); free(matrix_C); }
.text .file "algorithm4.hip" .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rax .cfi_def_cfa_offset 16 movl $32, %edi movl $32, %esi movl $32, %edx callq _Z10Algorithm4iii movl $64, %edi movl $64, %esi movl $64, %edx callq _Z10Algorithm4iii movl $128, %edi movl $128, %esi movl $128, %edx callq _Z10Algorithm4iii movl $256, %edi # imm = 0x100 movl $256, %esi # imm = 0x100 movl $256, %edx # imm = 0x100 callq _Z10Algorithm4iii movl $512, %edi # imm = 0x200 movl $512, %esi # imm = 0x200 movl $512, %edx # imm = 0x200 callq _Z10Algorithm4iii movl $1024, %edi # imm = 0x400 movl $1024, %esi # imm = 0x400 movl $1024, %edx # imm = 0x400 callq _Z10Algorithm4iii movl $2048, %edi # imm = 0x800 movl $2048, %esi # imm = 0x800 movl $2048, %edx # imm = 0x800 callq _Z10Algorithm4iii movl $4096, %edi # imm = 0x1000 movl $4096, %esi # imm = 0x1000 movl $4096, %edx # imm = 0x1000 callq _Z10Algorithm4iii xorl %eax, %eax popq %rcx .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size main, .Lfunc_end0-main .cfi_endproc # -- End function .globl _Z10Algorithm4iii # -- Begin function _Z10Algorithm4iii .type _Z10Algorithm4iii,@function _Z10Algorithm4iii: # @_Z10Algorithm4iii .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $136, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movl %edx, %ebx movl %esi, %ebp movl %edi, %r14d xorl %eax, %eax movq %rax, 24(%rsp) # 8-byte Spill movl $.L.str, %edi xorl %eax, %eax callq printf leaq 88(%rsp), %rdi callq hipEventCreate leaq 80(%rsp), %rdi callq hipEventCreate movl $0, 60(%rsp) movl %ebp, %eax imull %r14d, %eax movslq %eax, %r12 shlq $3, %r12 movq %r12, %rdi callq malloc movq %rax, 16(%rsp) # 8-byte Spill movl %ebx, %eax imull %r14d, %eax movslq %eax, %r15 shlq $3, %r15 movq %r15, %rdi callq malloc movq %rax, 8(%rsp) # 8-byte Spill movq %r15, %rdi callq malloc movq %rax, 72(%rsp) # 8-byte Spill leaq 48(%rsp), %rdi movq %r12, 104(%rsp) # 8-byte Spill movq %r12, %rsi callq hipMalloc movq %rbx, 120(%rsp) # 8-byte Spill movl %ebx, %eax imull %ebp, %eax movslq %eax, %rsi shlq $3, %rsi leaq 40(%rsp), %rdi movq %rsi, 96(%rsp) # 8-byte Spill callq hipMalloc leaq 32(%rsp), %rdi movq %r15, 112(%rsp) # 8-byte Spill movq %r15, %rsi callq hipMalloc movq %r14, 64(%rsp) # 8-byte Spill testl %r14d, %r14d movl %ebp, 4(%rsp) # 4-byte Spill jle .LBB1_6 # %bb.1: # %.preheader89.lr.ph movl 64(%rsp), %eax # 4-byte Reload movq %rax, 128(%rsp) # 8-byte Spill movl %ebp, %r12d xorl %r13d, %r13d .LBB1_2: # %.preheader89 # =>This Loop Header: Depth=1 # Child Loop BB1_4 Depth 2 testl %ebp, %ebp jle .LBB1_5 # %bb.3: # %.lr.ph # in Loop: Header=BB1_2 Depth=1 movl 24(%rsp), %eax # 4-byte Reload movq 72(%rsp), %rcx # 8-byte Reload leaq (%rcx,%rax,8), %r15 movq 8(%rsp), %rcx # 8-byte Reload leaq (%rcx,%rax,8), %rbp movq 16(%rsp), %rcx # 8-byte Reload leaq (%rcx,%rax,8), %r14 xorl %ebx, %ebx .LBB1_4: # Parent Loop BB1_2 Depth=1 # => This Inner Loop Header: Depth=2 callq rand cltq imulq $1717986919, %rax, %rcx # imm = 0x66666667 movq %rcx, %rdx shrq $63, %rdx sarq $34, %rcx addl %edx, %ecx addl %ecx, %ecx leal (%rcx,%rcx,4), %ecx subl %ecx, %eax xorps %xmm0, %xmm0 cvtsi2sd %eax, %xmm0 movsd %xmm0, (%r14,%rbx,8) callq rand cltq imulq $1717986919, %rax, %rcx # imm = 0x66666667 movq %rcx, %rdx shrq $63, %rdx sarq $34, %rcx addl %edx, %ecx addl %ecx, %ecx leal (%rcx,%rcx,4), %ecx subl %ecx, %eax xorps %xmm0, %xmm0 cvtsi2sd %eax, %xmm0 movsd %xmm0, (%rbp,%rbx,8) movq $0, (%r15,%rbx,8) incq %rbx cmpq %rbx, %r12 jne .LBB1_4 .LBB1_5: # %._crit_edge # in Loop: Header=BB1_2 Depth=1 incq %r13 movl 4(%rsp), %ebp # 4-byte Reload movq 24(%rsp), %rax # 8-byte Reload addl %ebp, %eax movq %rax, 24(%rsp) # 8-byte Spill cmpq 128(%rsp), %r13 # 8-byte Folded Reload jne .LBB1_2 .LBB1_6: # %._crit_edge92 movq 48(%rsp), %rdi movq 16(%rsp), %rsi # 8-byte Reload movq 104(%rsp), %rdx # 8-byte Reload movl $1, %ecx callq hipMemcpy movq 40(%rsp), %rdi movq 8(%rsp), %rsi # 8-byte Reload movq 96(%rsp), %rdx # 8-byte Reload movl $1, %ecx callq hipMemcpy movq 64(%rsp), %rbp # 8-byte Reload leal 63(%rbp), %r12d movl %r12d, %r14d shrl $6, %r14d movq 120(%rsp), %r15 # 8-byte Reload leal 15(%r15), %r13d shrl $4, %r13d movq %r13, %rbx shlq $32, %rbx orq %r14, %rbx movq 88(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movl $.L.str.1, %edi movl %r14d, %esi xorl %eax, %eax callq printf movl $.L.str.2, %edi movl %r13d, %esi xorl %eax, %eax callq printf movl $.L.str.3, %edi movl $16, %esi xorl %eax, %eax callq printf movl $.L.str.4, %edi movl $4, %esi xorl %eax, %eax callq printf andl $-64, %r12d imull %r13d, %r12d movl $.L.str.5, %edi movl %r12d, %esi xorl %eax, %eax callq printf movabsq $17179869200, %rdx # imm = 0x400000010 movq %rbx, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_8 # %bb.7: movq 48(%rsp), %rdi movq 40(%rsp), %rsi movq 32(%rsp), %rdx movl %ebp, %ecx movl 4(%rsp), %r8d # 4-byte Reload movl %r15d, %r9d callq _Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .LBB1_8: # %._crit_edge94 movq 32(%rsp), %rsi movq 72(%rsp), %r14 # 8-byte Reload movq %r14, %rdi movq 112(%rsp), %rdx # 8-byte Reload movl $2, %ecx callq hipMemcpy movq 80(%rsp), %rdi xorl %esi, %esi callq hipEventRecord movq 88(%rsp), %rsi movq 80(%rsp), %rdx leaq 60(%rsp), %rbx movq %rbx, %rdi callq hipEventElapsedTime cvtss2sd (%rbx), %xmm0 movl $.L.str.6, %edi movb $1, %al callq printf movq 48(%rsp), %rdi callq hipFree movq 40(%rsp), %rdi callq hipFree movq 32(%rsp), %rdi callq hipFree movq 16(%rsp), %rdi # 8-byte Reload callq free movq 8(%rsp), %rdi # 8-byte Reload callq free movq %r14, %rdi callq free addq $136, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z10Algorithm4iii, .Lfunc_end1-_Z10Algorithm4iii .cfi_endproc # -- End function .section .text._Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,"axG",@progbits,_Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,comdat .weak _Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii # -- Begin function _Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .type _Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,@function _Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii: # @_Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $144, %rsp .cfi_def_cfa_offset 192 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 56(%rsp), %rax movq %rdi, (%rax) leaq 48(%rsp), %rdi movq %rsi, (%rdi) leaq 40(%rsp), %rsi movq %rdx, (%rsi) leaq 20(%rsp), %rdx movl %ecx, (%rdx) leaq 16(%rsp), %rcx movl %r8d, (%rcx) leaq 12(%rsp), %r8 movl %r9d, (%r8) leaq 96(%rsp), %rbx movq %rax, (%rbx) movq %rdi, 8(%rbx) movq %rsi, 16(%rbx) movq %rdx, 24(%rbx) movq %rcx, 32(%rbx) movq %r8, 40(%rbx) leaq 80(%rsp), %r14 leaq 64(%rsp), %r15 leaq 32(%rsp), %r12 leaq 24(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $160, %rsp .cfi_adjust_cfa_offset -160 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size _Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii, .Lfunc_end2-_Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .cfi_endproc # -- End function .text .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "inside function" .size .L.str, 16 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "nuumber of blocks in x = %d\n" .size .L.str.1, 29 .type .L.str.2,@object # @.str.2 .L.str.2: .asciz "nuumber of blocks in y = %d\n" .size .L.str.2, 29 .type .L.str.3,@object # @.str.3 .L.str.3: .asciz "number of threads in x = %d\n" .size .L.str.3, 29 .type .L.str.4,@object # @.str.4 .L.str.4: .asciz "number of threads in y =%d\n" .size .L.str.4, 28 .type .L.str.5,@object # @.str.5 .L.str.5: .asciz "total threads = %d" .size .L.str.5, 19 .type _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,@object # @_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .section .rodata._Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,"aG",@progbits,_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,comdat .weak _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .p2align 3, 0x0 _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii: .quad _Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .size _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii, 8 .type .L.str.6,@object # @.str.6 .section .rodata.str1.1,"aMS",@progbits,1 .L.str.6: .asciz "elaspsed = %f ms\n\n\n" .size .L.str.6, 20 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii" .size .L__unnamed_1, 47 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z34__device_stub__device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .section .text._Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,"axG",@progbits,_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,comdat .protected _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii ; -- Begin function _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .globl _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .p2align 8 .type _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,@function _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii: ; @_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii ; %bb.0: s_mov_b64 s[2:3], 0 ; implicit-def: $vgpr1_vgpr2 .LBB0_1: ; =>This Inner Loop Header: Depth=1 s_delay_alu instid0(SALU_CYCLE_1) s_lshl_b32 s4, s2, 1 s_add_u32 s2, s2, 1 s_mov_b32 m0, s4 s_addc_u32 s3, s3, 0 s_cmp_eq_u32 s2, 16 v_movreld_b32_e32 v1, 0 v_movreld_b32_e32 v2, 0 s_cbranch_scc0 .LBB0_1 ; %bb.2: s_load_b128 s[4:7], s[0:1], 0x18 v_bfe_u32 v36, v0, 10, 10 s_clause 0x1 s_load_b128 s[8:11], s[0:1], 0x0 s_load_b64 s[0:1], s[0:1], 0x10 s_waitcnt lgkmcnt(0) s_lshl_b32 s7, s15, 4 v_and_b32_e32 v35, 0x3ff, v0 s_lshl_b32 s2, s14, 6 v_add_nc_u32_e32 v0, s7, v36 v_lshlrev_b32_e32 v37, 4, v36 s_mov_b32 s13, 0 s_mov_b32 s15, 0 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2) v_mad_u64_u32 v[33:34], null, v0, s5, v[35:36] v_lshlrev_b32_e32 v34, 3, v36 v_add3_u32 v0, s2, v35, v37 s_lshl_b32 s12, s5, 2 s_mov_b32 s14, s5 v_mad_u32_u24 v37, 0x88, v35, v34 s_delay_alu instid0(VALU_DEP_2) v_mov_b32_e32 v34, v0 v_add_nc_u32_e32 v38, s5, v33 .LBB0_3: ; =>This Loop Header: Depth=1 ; Child Loop BB0_4 Depth 2 ; Child Loop BB0_7 Depth 2 ; Child Loop BB0_8 Depth 3 v_mov_b32_e32 v35, v33 s_delay_alu instid0(VALU_DEP_4) v_mov_b32_e32 v39, v37 s_mov_b32 s2, -4 .LBB0_4: ; Parent Loop BB0_3 Depth=1 ; => This Inner Loop Header: Depth=2 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1) v_ashrrev_i32_e32 v36, 31, v35 s_add_i32 s2, s2, 4 s_cmp_gt_u32 s2, 11 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2) v_lshlrev_b64 v[40:41], 3, v[35:36] v_add_nc_u32_e32 v35, s12, v35 v_add_co_u32 v40, vcc_lo, s10, v40 s_delay_alu instid0(VALU_DEP_3) v_add_co_ci_u32_e32 v41, vcc_lo, s11, v41, vcc_lo global_load_b64 v[40:41], v[40:41], off s_waitcnt vmcnt(0) ds_store_b64 v39, v[40:41] v_add_nc_u32_e32 v39, 32, v39 s_cbranch_scc0 .LBB0_4 ; %bb.5: ; in Loop: Header=BB0_3 Depth=1 s_cmp_ge_i32 s15, s5 s_waitcnt lgkmcnt(0) s_barrier buffer_gl0_inv s_cbranch_scc1 .LBB0_10 ; %bb.6: ; %.preheader.preheader ; in Loop: Header=BB0_3 Depth=1 v_med3_i32 v39, s14, 1, 16 s_mov_b32 s16, 0 s_mov_b32 s17, 0 .LBB0_7: ; %.preheader ; Parent Loop BB0_3 Depth=1 ; => This Loop Header: Depth=2 ; Child Loop BB0_8 Depth 3 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) v_ashrrev_i32_e32 v35, 31, v34 s_mov_b64 s[2:3], 0 s_mov_b32 s18, s16 v_lshlrev_b64 v[35:36], 3, v[34:35] s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v35, vcc_lo, s8, v35 v_add_co_ci_u32_e32 v36, vcc_lo, s9, v36, vcc_lo global_load_b64 v[35:36], v[35:36], off .LBB0_8: ; Parent Loop BB0_3 Depth=1 ; Parent Loop BB0_7 Depth=2 ; => This Inner Loop Header: Depth=3 v_mov_b32_e32 v40, s18 s_lshl_b32 s19, s2, 1 s_add_u32 s2, s2, 1 s_mov_b32 m0, s19 s_addc_u32 s3, s3, 0 ds_load_b64 v[40:41], v40 v_movrels_b32_e32 v43, v2 v_movrels_b32_e32 v42, v1 s_add_i32 s18, s18, 8 s_cmp_eq_u32 s2, 16 s_waitcnt vmcnt(0) lgkmcnt(0) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_fma_f64 v[40:41], v[35:36], v[40:41], v[42:43] v_movreld_b32_e32 v1, v40 s_delay_alu instid0(VALU_DEP_2) v_movreld_b32_e32 v2, v41 s_cbranch_scc0 .LBB0_8 ; %bb.9: ; in Loop: Header=BB0_7 Depth=2 s_add_i32 s17, s17, 1 v_add_nc_u32_e32 v34, s4, v34 v_cmp_eq_u32_e32 vcc_lo, s17, v39 s_addk_i32 s16, 0x88 s_cbranch_vccz .LBB0_7 .LBB0_10: ; %._crit_edge ; in Loop: Header=BB0_3 Depth=1 v_add_nc_u32_e32 v33, 16, v33 s_add_i32 s15, s15, 16 s_add_i32 s14, s14, -16 s_barrier s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1) v_cmp_ge_i32_e32 vcc_lo, v33, v38 buffer_gl0_inv s_or_b32 s13, vcc_lo, s13 s_and_not1_b32 exec_lo, exec_lo, s13 s_cbranch_execnz .LBB0_3 ; %bb.11: s_or_b32 exec_lo, exec_lo, s13 s_delay_alu instid0(SALU_CYCLE_1) s_mov_b32 s2, exec_lo v_cmpx_gt_i32_e64 s4, v0 s_cbranch_execz .LBB0_15 ; %bb.12: s_sub_i32 s2, s6, s7 s_delay_alu instid0(SALU_CYCLE_1) s_cmp_lt_i32 s2, 1 s_cbranch_scc1 .LBB0_15 ; %bb.13: ; %.lr.ph.preheader v_mad_u64_u32 v[33:34], null, s7, s4, v[0:1] s_ashr_i32 s3, s2, 31 s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_cmp_lt_i64_e64 s3, s[2:3], 16 v_ashrrev_i32_e32 v34, 31, v33 s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) s_and_b32 s3, s3, exec_lo s_cselect_b32 s6, s2, 16 s_ashr_i32 s5, s4, 31 v_lshlrev_b64 v[33:34], 3, v[33:34] s_mov_b64 s[2:3], 0 s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) v_add_co_u32 v33, vcc_lo, s0, v33 v_add_co_ci_u32_e32 v34, vcc_lo, s1, v34, vcc_lo s_lshl_b64 s[0:1], s[4:5], 3 .LBB0_14: ; %.lr.ph ; =>This Inner Loop Header: Depth=1 s_lshl_b32 s4, s2, 1 s_add_u32 s2, s2, 1 s_mov_b32 m0, s4 s_addc_u32 s3, s3, 0 v_movrels_b32_e32 v36, v2 v_movrels_b32_e32 v35, v1 s_cmp_lg_u32 s6, s2 global_store_b64 v[33:34], v[35:36], off v_add_co_u32 v33, vcc_lo, v33, s0 v_add_co_ci_u32_e32 v34, vcc_lo, s1, v34, vcc_lo s_cbranch_scc1 .LBB0_14 .LBB0_15: ; %.loopexit s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .amdhsa_group_segment_fixed_size 2176 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 36 .amdhsa_user_sgpr_count 14 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 1 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 1 .amdhsa_next_free_vgpr 44 .amdhsa_next_free_sgpr 20 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .section .text._Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,"axG",@progbits,_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii,comdat .Lfunc_end0: .size _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii, .Lfunc_end0-_Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 668 ; NumSgprs: 22 ; NumVgprs: 44 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 2176 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 5 ; NumSGPRsForWavesPerEU: 22 ; NumVGPRsForWavesPerEU: 44 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 14 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .address_space: global .offset: 0 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: by_value - .offset: 28 .size: 4 .value_kind: by_value - .offset: 32 .size: 4 .value_kind: by_value .group_segment_fixed_size: 2176 .kernarg_segment_align: 8 .kernarg_segment_size: 36 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii .private_segment_fixed_size: 0 .sgpr_count: 22 .sgpr_spill_count: 0 .symbol: _Z19device_Matrix_multiILi16ELi4EEvPKdS1_Pdiii.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 44 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata
4f549f53b53797eb79c2d93403f6616bd3248b85
#include <iostream> #include <sys/time.h> __global__ void saxpyDevice(int n, float a, float *x, float *y){ int i = blockIdx.x*blockDim.x + threadIdx.x; if (i < n) y[i] = a*x[i] + y[i]; } void saxpy(int n, float a, float *x, float *y){ float *d_x, *d_y; // allocate GPU memory, and upload data cudaMalloc(&d_x, n*sizeof(float)); cudaMalloc(&d_y, n*sizeof(float)); cudaMemcpy(d_x, x, n*sizeof(float), cudaMemcpyHostToDevice); cudaMemcpy(d_y, y, n*sizeof(float), cudaMemcpyHostToDevice); // send instructions to GPU saxpyDevice<<<(n+255)/256, 256>>>(n, 2.0f, d_x, d_y); // download data, and free GPU memory cudaMemcpy(y, d_y, n*sizeof(float), cudaMemcpyDeviceToHost); cudaFree(d_x); cudaFree(d_y); } int main(void){ int N = 1<<20; float *x, *y; x = (float*)malloc(N*sizeof(float)); y = (float*)malloc(N*sizeof(float)); struct timeval t0, t1; gettimeofday(&t0, NULL); for (int i=0; i<100; i++) saxpy(N, 2.0f, x, y); gettimeofday(&t1, NULL); std::cout<<"CUDA = "<<(t1.tv_sec - t0.tv_sec)*1000 + (t1.tv_usec-t0.tv_usec)/1000<<"ms"<<std::endl; return 0; }
.file "tmpxft_003a90bf_00000000-6_cuda.cudafe1.cpp" .text #APP .globl _ZSt21ios_base_library_initv #NO_APP .type _ZL26__cudaUnregisterBinaryUtilv, @function _ZL26__cudaUnregisterBinaryUtilv: .LFB3639: .cfi_startproc endbr64 movq _ZL20__cudaFatCubinHandle(%rip), %rdi jmp __cudaUnregisterFatBinary@PLT .cfi_endproc .LFE3639: .size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv .globl _Z35__device_stub__Z11saxpyDeviceifPfS_ifPfS_ .type _Z35__device_stub__Z11saxpyDeviceifPfS_ifPfS_, @function _Z35__device_stub__Z11saxpyDeviceifPfS_ifPfS_: .LFB3661: .cfi_startproc endbr64 subq $152, %rsp .cfi_def_cfa_offset 160 movl %edi, 28(%rsp) leaq 48(%rsp), %rcx leaq 56(%rsp), %rdi movq %rsi, 16(%rsp) leaq 68(%rsp), %rsi movq %rdx, 8(%rsp) leaq 40(%rsp), %rdx movss %xmm0, 24(%rsp) movq %fs:40, %rax movq %rax, 136(%rsp) xorl %eax, %eax leaq 28(%rsp), %rax movl $1, 64(%rsp) movq %rax, 104(%rsp) leaq 24(%rsp), %rax movq %rax, 112(%rsp) leaq 16(%rsp), %rax movq %rax, 120(%rsp) leaq 8(%rsp), %rax movq %rax, 128(%rsp) movabsq $4294967297, %rax movq %rax, 56(%rsp) movq %rax, 68(%rsp) movl $1, 76(%rsp) call __cudaPopCallConfiguration@PLT testl %eax, %eax jne .L2 pushq 48(%rsp) .cfi_def_cfa_offset 168 leaq _Z11saxpyDeviceifPfS_(%rip), %rdi pushq 48(%rsp) .cfi_def_cfa_offset 176 movq 84(%rsp), %rcx movl 92(%rsp), %r8d movq 72(%rsp), %rsi movl 80(%rsp), %edx leaq 120(%rsp), %r9 call cudaLaunchKernel@PLT popq %rax .cfi_def_cfa_offset 168 popq %rdx .cfi_def_cfa_offset 160 .L2: movq 136(%rsp), %rax subq %fs:40, %rax je .L4 call __stack_chk_fail@PLT .L4: addq $152, %rsp .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3661: .size _Z35__device_stub__Z11saxpyDeviceifPfS_ifPfS_, .-_Z35__device_stub__Z11saxpyDeviceifPfS_ifPfS_ .globl _Z11saxpyDeviceifPfS_ .type _Z11saxpyDeviceifPfS_, @function _Z11saxpyDeviceifPfS_: .LFB3662: .cfi_startproc endbr64 jmp _Z35__device_stub__Z11saxpyDeviceifPfS_ifPfS_ .cfi_endproc .LFE3662: .size _Z11saxpyDeviceifPfS_, .-_Z11saxpyDeviceifPfS_ .globl _Z5saxpyifPfS_ .type _Z5saxpyifPfS_, @function _Z5saxpyifPfS_: .LFB3635: .cfi_startproc endbr64 pushq %r13 .cfi_def_cfa_offset 16 .cfi_offset 13, -16 movq %rsi, %r13 pushq %r12 .cfi_def_cfa_offset 24 .cfi_offset 12, -24 movq %rdx, %r12 pushq %rbp .cfi_def_cfa_offset 32 .cfi_offset 6, -32 pushq %rbx .cfi_def_cfa_offset 40 .cfi_offset 3, -40 movslq %edi, %rbx movq %rbx, %rbp salq $2, %rbx movq %rbx, %rsi subq $56, %rsp .cfi_def_cfa_offset 96 movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax movq %rsp, %rdi call cudaMalloc@PLT leaq 8(%rsp), %rdi movq %rbx, %rsi call cudaMalloc@PLT movq (%rsp), %rdi movq %rbx, %rdx movq %r13, %rsi movl $1, %ecx call cudaMemcpy@PLT movq 8(%rsp), %rdi movq %rbx, %rdx movq %r12, %rsi movl $1, %ecx call cudaMemcpy@PLT movl $256, %ecx xorl %r9d, %r9d xorl %r8d, %r8d leal 255(%rbp), %eax cltd idivl %ecx movl $16777217, %edx movl $1, %ecx salq $8, %rdx movl %eax, 16(%rsp) movabsq $4294967297, %rax movq %rax, 20(%rsp) movq 16(%rsp), %rdi movl 24(%rsp), %esi call __cudaPushCallConfiguration@PLT testl %eax, %eax jne .L9 movq 8(%rsp), %rdx movq (%rsp), %rsi movl %ebp, %edi movss .LC0(%rip), %xmm0 call _Z35__device_stub__Z11saxpyDeviceifPfS_ifPfS_ .L9: movq 8(%rsp), %rsi movl $2, %ecx movq %rbx, %rdx movq %r12, %rdi call cudaMemcpy@PLT movq (%rsp), %rdi call cudaFree@PLT movq 8(%rsp), %rdi call cudaFree@PLT movq 40(%rsp), %rax subq %fs:40, %rax je .L10 call __stack_chk_fail@PLT .L10: addq $56, %rsp .cfi_def_cfa_offset 40 popq %rbx .cfi_def_cfa_offset 32 popq %rbp .cfi_def_cfa_offset 24 popq %r12 .cfi_def_cfa_offset 16 popq %r13 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3635: .size _Z5saxpyifPfS_, .-_Z5saxpyifPfS_ .section .rodata.str1.1,"aMS",@progbits,1 .LC1: .string "CUDA = " .LC2: .string "ms" .section .text.startup,"ax",@progbits .globl main .type main, @function main: .LFB3636: .cfi_startproc endbr64 pushq %r12 .cfi_def_cfa_offset 16 .cfi_offset 12, -16 movl $4194304, %edi pushq %rbp .cfi_def_cfa_offset 24 .cfi_offset 6, -24 pushq %rbx .cfi_def_cfa_offset 32 .cfi_offset 3, -32 movl $100, %ebx subq $48, %rsp .cfi_def_cfa_offset 80 movq %fs:40, %rax movq %rax, 40(%rsp) xorl %eax, %eax call malloc@PLT movl $4194304, %edi movq %rax, %rbp call malloc@PLT leaq 8(%rsp), %rdi xorl %esi, %esi movq %rax, %r12 call gettimeofday@PLT .L13: movss .LC0(%rip), %xmm0 movq %r12, %rdx movq %rbp, %rsi movl $1048576, %edi call _Z5saxpyifPfS_ decl %ebx jne .L13 xorl %esi, %esi leaq 24(%rsp), %rdi call gettimeofday@PLT leaq .LC1(%rip), %rsi leaq _ZSt4cout(%rip), %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movl $1000, %ecx movq 24(%rsp), %rsi subq 8(%rsp), %rsi movq %rax, %rdi movq 32(%rsp), %rax subq 16(%rsp), %rax cqto imulq $1000, %rsi, %rsi idivq %rcx addq %rax, %rsi call _ZNSo9_M_insertIlEERSoT_@PLT leaq .LC2(%rip), %rsi movq %rax, %rdi call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT movq %rax, %rdi call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT movq 40(%rsp), %rax subq %fs:40, %rax je .L14 call __stack_chk_fail@PLT .L14: addq $48, %rsp .cfi_def_cfa_offset 32 xorl %eax, %eax popq %rbx .cfi_def_cfa_offset 24 popq %rbp .cfi_def_cfa_offset 16 popq %r12 .cfi_def_cfa_offset 8 ret .cfi_endproc .LFE3636: .size main, .-main .section .rodata.str1.1 .LC3: .string "_Z11saxpyDeviceifPfS_" .section .text.startup .type _ZL24__sti____cudaRegisterAllv, @function _ZL24__sti____cudaRegisterAllv: .LFB3664: .cfi_startproc endbr64 pushq %rax .cfi_def_cfa_offset 16 leaq _ZL15__fatDeviceText(%rip), %rdi call __cudaRegisterFatBinary@PLT pushq $0 .cfi_def_cfa_offset 24 xorl %r9d, %r9d orl $-1, %r8d pushq $0 .cfi_def_cfa_offset 32 leaq .LC3(%rip), %rdx movq %rax, %rdi leaq _Z11saxpyDeviceifPfS_(%rip), %rsi pushq $0 .cfi_def_cfa_offset 40 movq %rdx, %rcx pushq $0 .cfi_def_cfa_offset 48 movq %rax, _ZL20__cudaFatCubinHandle(%rip) call __cudaRegisterFunction@PLT movq _ZL20__cudaFatCubinHandle(%rip), %rdi addq $32, %rsp .cfi_def_cfa_offset 16 call __cudaRegisterFatBinaryEnd@PLT leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi popq %rdx .cfi_def_cfa_offset 8 jmp atexit@PLT .cfi_endproc .LFE3664: .size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv .section .init_array,"aw" .align 8 .quad _ZL24__sti____cudaRegisterAllv .section .nvFatBinSegment,"aw" .align 8 .type _ZL15__fatDeviceText, @object .size _ZL15__fatDeviceText, 24 _ZL15__fatDeviceText: .long 1180844977 .long 1 .quad fatbinData .quad 0 .local _ZL20__cudaFatCubinHandle .comm _ZL20__cudaFatCubinHandle,8,8 .section .rodata.cst4,"aM",@progbits,4 .align 4 .LC0: .long 1073741824 .ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0" .section .note.GNU-stack,"",@progbits .section .note.gnu.property,"a" .align 8 .long 1f - 0f .long 4f - 1f .long 5 0: .string "GNU" 1: .align 8 .long 0xc0000002 .long 3f - 2f 2: .long 0x3 3: .align 8 4:
code for sm_89 Function : _Z11saxpyDeviceifPfS_ .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)" /*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */ /* 0x000fe40000000f00 */ /*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */ /* 0x000e280000002500 */ /*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */ /* 0x000e240000002100 */ /*0030*/ IMAD R4, R4, c[0x0][0x0], R3 ; /* 0x0000000004047a24 */ /* 0x001fca00078e0203 */ /*0040*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x160], PT ; /* 0x0000580004007a0c */ /* 0x000fda0003f06270 */ /*0050*/ @P0 EXIT ; /* 0x000000000000094d */ /* 0x000fea0003800000 */ /*0060*/ MOV R5, 0x4 ; /* 0x0000000400057802 */ /* 0x000fe20000000f00 */ /*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */ /* 0x000fc80000000a00 */ /*0080*/ IMAD.WIDE R2, R4, R5, c[0x0][0x168] ; /* 0x00005a0004027625 */ /* 0x000fc800078e0205 */ /*0090*/ IMAD.WIDE R4, R4, R5, c[0x0][0x170] ; /* 0x00005c0004047625 */ /* 0x000fe400078e0205 */ /*00a0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */ /* 0x000ea8000c1e1900 */ /*00b0*/ LDG.E R7, [R4.64] ; /* 0x0000000404077981 */ /* 0x000ea4000c1e1900 */ /*00c0*/ FFMA R7, R2, c[0x0][0x164], R7 ; /* 0x0000590002077a23 */ /* 0x004fca0000000007 */ /*00d0*/ STG.E [R4.64], R7 ; /* 0x0000000704007986 */ /* 0x000fe2000c101904 */ /*00e0*/ EXIT ; /* 0x000000000000794d */ /* 0x000fea0003800000 */ /*00f0*/ BRA 0xf0; /* 0xfffffff000007947 */ /* 0x000fc0000383ffff */ /*0100*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0110*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0120*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0130*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0140*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0150*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0160*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ /*0170*/ NOP; /* 0x0000000000007918 */ /* 0x000fc00000000000 */ ..........
#include <hip/hip_runtime.h> #include <iostream> #include <sys/time.h> __global__ void saxpyDevice(int n, float a, float *x, float *y){ int i = blockIdx.x*blockDim.x + threadIdx.x; if (i < n) y[i] = a*x[i] + y[i]; } void saxpy(int n, float a, float *x, float *y){ float *d_x, *d_y; // allocate GPU memory, and upload data hipMalloc(&d_x, n*sizeof(float)); hipMalloc(&d_y, n*sizeof(float)); hipMemcpy(d_x, x, n*sizeof(float), hipMemcpyHostToDevice); hipMemcpy(d_y, y, n*sizeof(float), hipMemcpyHostToDevice); // send instructions to GPU saxpyDevice<<<(n+255)/256, 256>>>(n, 2.0f, d_x, d_y); // download data, and free GPU memory hipMemcpy(y, d_y, n*sizeof(float), hipMemcpyDeviceToHost); hipFree(d_x); hipFree(d_y); } int main(void){ int N = 1<<20; float *x, *y; x = (float*)malloc(N*sizeof(float)); y = (float*)malloc(N*sizeof(float)); struct timeval t0, t1; gettimeofday(&t0, NULL); for (int i=0; i<100; i++) saxpy(N, 2.0f, x, y); gettimeofday(&t1, NULL); std::cout<<"CUDA = "<<(t1.tv_sec - t0.tv_sec)*1000 + (t1.tv_usec-t0.tv_usec)/1000<<"ms"<<std::endl; return 0; }
.text .file "cuda.hip" # Start of file scope inline assembly .globl _ZSt21ios_base_library_initv # End of file scope inline assembly .globl _Z26__device_stub__saxpyDeviceifPfS_ # -- Begin function _Z26__device_stub__saxpyDeviceifPfS_ .type _Z26__device_stub__saxpyDeviceifPfS_,@function _Z26__device_stub__saxpyDeviceifPfS_: # @_Z26__device_stub__saxpyDeviceifPfS_ .cfi_startproc # %bb.0: pushq %r15 .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %r13 .cfi_def_cfa_offset 32 pushq %r12 .cfi_def_cfa_offset 40 pushq %rbx .cfi_def_cfa_offset 48 subq $112, %rsp .cfi_def_cfa_offset 160 .cfi_offset %rbx, -48 .cfi_offset %r12, -40 .cfi_offset %r13, -32 .cfi_offset %r14, -24 .cfi_offset %r15, -16 leaq 12(%rsp), %rax movl %edi, (%rax) leaq 8(%rsp), %rcx movss %xmm0, (%rcx) leaq 40(%rsp), %rdi movq %rsi, (%rdi) leaq 32(%rsp), %rsi movq %rdx, (%rsi) leaq 80(%rsp), %rbx movq %rax, (%rbx) movq %rcx, 8(%rbx) movq %rdi, 16(%rbx) movq %rsi, 24(%rbx) leaq 64(%rsp), %r14 leaq 48(%rsp), %r15 leaq 24(%rsp), %r12 leaq 16(%rsp), %r13 movq %r14, %rdi movq %r15, %rsi movq %r12, %rdx movq %r13, %rcx callq __hipPopCallConfiguration movq (%r14), %rsi movl 8(%r14), %edx movq (%r15), %rcx movl 8(%r15), %r8d movl $_Z11saxpyDeviceifPfS_, %edi movq %rbx, %r9 pushq (%r13) .cfi_adjust_cfa_offset 8 pushq (%r12) .cfi_adjust_cfa_offset 8 callq hipLaunchKernel addq $128, %rsp .cfi_adjust_cfa_offset -128 popq %rbx .cfi_def_cfa_offset 40 popq %r12 .cfi_def_cfa_offset 32 popq %r13 .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %r15 .cfi_def_cfa_offset 8 retq .Lfunc_end0: .size _Z26__device_stub__saxpyDeviceifPfS_, .Lfunc_end0-_Z26__device_stub__saxpyDeviceifPfS_ .cfi_endproc # -- End function .section .rodata.cst4,"aM",@progbits,4 .p2align 2, 0x0 # -- Begin function _Z5saxpyifPfS_ .LCPI1_0: .long 0x40000000 # float 2 .text .globl _Z5saxpyifPfS_ .type _Z5saxpyifPfS_,@function _Z5saxpyifPfS_: # @_Z5saxpyifPfS_ .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r15 .cfi_def_cfa_offset 24 pushq %r14 .cfi_def_cfa_offset 32 pushq %r13 .cfi_def_cfa_offset 40 pushq %r12 .cfi_def_cfa_offset 48 pushq %rbx .cfi_def_cfa_offset 56 subq $24, %rsp .cfi_def_cfa_offset 80 .cfi_offset %rbx, -56 .cfi_offset %r12, -48 .cfi_offset %r13, -40 .cfi_offset %r14, -32 .cfi_offset %r15, -24 .cfi_offset %rbp, -16 movq %rdx, %rbx movq %rsi, %r12 movl %edi, 12(%rsp) # 4-byte Spill movslq %edi, %r15 leaq (,%r15,4), %r14 leaq 16(%rsp), %r13 movq %r13, %rdi movq %r14, %rsi callq hipMalloc movq %rsp, %rbp movq %rbp, %rdi movq %r14, %rsi callq hipMalloc movq (%r13), %rdi movq %r12, %rsi movq %r14, %rdx movl $1, %ecx callq hipMemcpy movq (%rbp), %rdi movq %rbx, %rsi movq %r14, %rdx movl $1, %ecx callq hipMemcpy leal 255(%r15), %eax addl $510, %r15d # imm = 0x1FE testl %eax, %eax cmovnsl %eax, %r15d sarl $8, %r15d btsq $32, %r15 movabsq $4294967296, %rdx # imm = 0x100000000 orq $256, %rdx # imm = 0x100 movq %r15, %rdi movl $1, %esi movl $1, %ecx xorl %r8d, %r8d xorl %r9d, %r9d callq __hipPushCallConfiguration testl %eax, %eax jne .LBB1_2 # %bb.1: movq 16(%rsp), %rsi movq (%rsp), %rdx movss .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero movl 12(%rsp), %edi # 4-byte Reload callq _Z26__device_stub__saxpyDeviceifPfS_ .LBB1_2: movq (%rsp), %rsi movq %rbx, %rdi movq %r14, %rdx movl $2, %ecx callq hipMemcpy movq 16(%rsp), %rdi callq hipFree movq (%rsp), %rdi callq hipFree addq $24, %rsp .cfi_def_cfa_offset 56 popq %rbx .cfi_def_cfa_offset 48 popq %r12 .cfi_def_cfa_offset 40 popq %r13 .cfi_def_cfa_offset 32 popq %r14 .cfi_def_cfa_offset 24 popq %r15 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end1: .size _Z5saxpyifPfS_, .Lfunc_end1-_Z5saxpyifPfS_ .cfi_endproc # -- End function .globl main # -- Begin function main .type main,@function main: # @main .cfi_startproc # %bb.0: pushq %rbp .cfi_def_cfa_offset 16 pushq %r14 .cfi_def_cfa_offset 24 pushq %rbx .cfi_def_cfa_offset 32 subq $32, %rsp .cfi_def_cfa_offset 64 .cfi_offset %rbx, -32 .cfi_offset %r14, -24 .cfi_offset %rbp, -16 movl $4194304, %edi # imm = 0x400000 callq malloc movq %rax, %rbx movl $4194304, %edi # imm = 0x400000 callq malloc movq %rax, %r14 movq %rsp, %rdi xorl %esi, %esi callq gettimeofday movl $100, %ebp .LBB2_1: # =>This Inner Loop Header: Depth=1 movl $1048576, %edi # imm = 0x100000 movq %rbx, %rsi movq %r14, %rdx callq _Z5saxpyifPfS_ decl %ebp jne .LBB2_1 # %bb.2: leaq 16(%rsp), %rbx movq %rbx, %rdi xorl %esi, %esi callq gettimeofday movl $_ZSt4cout, %edi movl $.L.str, %esi movl $7, %edx callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq (%rbx), %rcx movq 8(%rbx), %rax subq (%rsp), %rcx imulq $1000, %rcx, %rcx # imm = 0x3E8 subq 8(%rsp), %rax movabsq $2361183241434822607, %rdx # imm = 0x20C49BA5E353F7CF imulq %rdx movq %rdx, %rsi shrq $63, %rsi sarq $7, %rdx addq %rdx, %rsi addq %rcx, %rsi movl $_ZSt4cout, %edi callq _ZNSo9_M_insertIlEERSoT_ movq %rax, %rbx movl $.L.str.1, %esi movl $2, %edx movq %rax, %rdi callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l movq (%rbx), %rax movq -24(%rax), %rdi addq %rbx, %rdi movl $10, %esi callq _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc movsbl %al, %esi movq %rbx, %rdi callq _ZNSo3putEc movq %rax, %rdi callq _ZNSo5flushEv xorl %eax, %eax addq $32, %rsp .cfi_def_cfa_offset 32 popq %rbx .cfi_def_cfa_offset 24 popq %r14 .cfi_def_cfa_offset 16 popq %rbp .cfi_def_cfa_offset 8 retq .Lfunc_end2: .size main, .Lfunc_end2-main .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_ctor .type __hip_module_ctor,@function __hip_module_ctor: # @__hip_module_ctor .cfi_startproc # %bb.0: subq $40, %rsp .cfi_def_cfa_offset 48 movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi jne .LBB3_2 # %bb.1: movl $__hip_fatbin_wrapper, %edi callq __hipRegisterFatBinary movq %rax, %rdi movq %rax, __hip_gpubin_handle(%rip) .LBB3_2: xorps %xmm0, %xmm0 movups %xmm0, 16(%rsp) movups %xmm0, (%rsp) movl $_Z11saxpyDeviceifPfS_, %esi movl $.L__unnamed_1, %edx movl $.L__unnamed_1, %ecx movl $-1, %r8d xorl %r9d, %r9d callq __hipRegisterFunction movl $__hip_module_dtor, %edi addq $40, %rsp .cfi_def_cfa_offset 8 jmp atexit # TAILCALL .Lfunc_end3: .size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor .cfi_endproc # -- End function .p2align 4, 0x90 # -- Begin function __hip_module_dtor .type __hip_module_dtor,@function __hip_module_dtor: # @__hip_module_dtor .cfi_startproc # %bb.0: movq __hip_gpubin_handle(%rip), %rdi testq %rdi, %rdi je .LBB4_2 # %bb.1: pushq %rax .cfi_def_cfa_offset 16 callq __hipUnregisterFatBinary movq $0, __hip_gpubin_handle(%rip) addq $8, %rsp .cfi_def_cfa_offset 8 .LBB4_2: retq .Lfunc_end4: .size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor .cfi_endproc # -- End function .type _Z11saxpyDeviceifPfS_,@object # @_Z11saxpyDeviceifPfS_ .section .rodata,"a",@progbits .globl _Z11saxpyDeviceifPfS_ .p2align 3, 0x0 _Z11saxpyDeviceifPfS_: .quad _Z26__device_stub__saxpyDeviceifPfS_ .size _Z11saxpyDeviceifPfS_, 8 .type .L.str,@object # @.str .section .rodata.str1.1,"aMS",@progbits,1 .L.str: .asciz "CUDA = " .size .L.str, 8 .type .L.str.1,@object # @.str.1 .L.str.1: .asciz "ms" .size .L.str.1, 3 .type .L__unnamed_1,@object # @0 .L__unnamed_1: .asciz "_Z11saxpyDeviceifPfS_" .size .L__unnamed_1, 22 .type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper .section .hipFatBinSegment,"a",@progbits .p2align 3, 0x0 __hip_fatbin_wrapper: .long 1212764230 # 0x48495046 .long 1 # 0x1 .quad __hip_fatbin .quad 0 .size __hip_fatbin_wrapper, 24 .type __hip_gpubin_handle,@object # @__hip_gpubin_handle .local __hip_gpubin_handle .comm __hip_gpubin_handle,8,8 .section .init_array,"aw",@init_array .p2align 3, 0x0 .quad __hip_module_ctor .type __hip_cuid_,@object # @__hip_cuid_ .bss .globl __hip_cuid_ __hip_cuid_: .byte 0 # 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym _Z26__device_stub__saxpyDeviceifPfS_ .addrsig_sym __hip_module_ctor .addrsig_sym __hip_module_dtor .addrsig_sym _Z11saxpyDeviceifPfS_ .addrsig_sym _ZSt4cout .addrsig_sym __hip_fatbin .addrsig_sym __hip_fatbin_wrapper .addrsig_sym __hip_cuid_
.text .amdgcn_target "amdgcn-amd-amdhsa--gfx1100" .protected _Z11saxpyDeviceifPfS_ ; -- Begin function _Z11saxpyDeviceifPfS_ .globl _Z11saxpyDeviceifPfS_ .p2align 8 .type _Z11saxpyDeviceifPfS_,@function _Z11saxpyDeviceifPfS_: ; @_Z11saxpyDeviceifPfS_ ; %bb.0: s_clause 0x1 s_load_b32 s4, s[0:1], 0x24 s_load_b64 s[2:3], s[0:1], 0x0 s_waitcnt lgkmcnt(0) s_and_b32 s4, s4, 0xffff s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1] v_cmp_gt_i32_e32 vcc_lo, s2, v1 s_and_saveexec_b32 s2, vcc_lo s_cbranch_execz .LBB0_2 ; %bb.1: s_load_b128 s[4:7], s[0:1], 0x8 v_ashrrev_i32_e32 v2, 31, v1 s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) v_lshlrev_b64 v[0:1], 2, v[1:2] s_waitcnt lgkmcnt(0) v_add_co_u32 v2, vcc_lo, s4, v0 s_delay_alu instid0(VALU_DEP_2) v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo v_add_co_u32 v0, vcc_lo, s6, v0 v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo global_load_b32 v2, v[2:3], off global_load_b32 v3, v[0:1], off s_waitcnt vmcnt(0) v_fmac_f32_e32 v3, s3, v2 global_store_b32 v[0:1], v3, off .LBB0_2: s_nop 0 s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) s_endpgm .section .rodata,"a",@progbits .p2align 6, 0x0 .amdhsa_kernel _Z11saxpyDeviceifPfS_ .amdhsa_group_segment_fixed_size 0 .amdhsa_private_segment_fixed_size 0 .amdhsa_kernarg_size 280 .amdhsa_user_sgpr_count 15 .amdhsa_user_sgpr_dispatch_ptr 0 .amdhsa_user_sgpr_queue_ptr 0 .amdhsa_user_sgpr_kernarg_segment_ptr 1 .amdhsa_user_sgpr_dispatch_id 0 .amdhsa_user_sgpr_private_segment_size 0 .amdhsa_wavefront_size32 1 .amdhsa_uses_dynamic_stack 0 .amdhsa_enable_private_segment 0 .amdhsa_system_sgpr_workgroup_id_x 1 .amdhsa_system_sgpr_workgroup_id_y 0 .amdhsa_system_sgpr_workgroup_id_z 0 .amdhsa_system_sgpr_workgroup_info 0 .amdhsa_system_vgpr_workitem_id 0 .amdhsa_next_free_vgpr 4 .amdhsa_next_free_sgpr 16 .amdhsa_float_round_mode_32 0 .amdhsa_float_round_mode_16_64 0 .amdhsa_float_denorm_mode_32 3 .amdhsa_float_denorm_mode_16_64 3 .amdhsa_dx10_clamp 1 .amdhsa_ieee_mode 1 .amdhsa_fp16_overflow 0 .amdhsa_workgroup_processor_mode 1 .amdhsa_memory_ordered 1 .amdhsa_forward_progress 0 .amdhsa_shared_vgpr_count 0 .amdhsa_exception_fp_ieee_invalid_op 0 .amdhsa_exception_fp_denorm_src 0 .amdhsa_exception_fp_ieee_div_zero 0 .amdhsa_exception_fp_ieee_overflow 0 .amdhsa_exception_fp_ieee_underflow 0 .amdhsa_exception_fp_ieee_inexact 0 .amdhsa_exception_int_div_zero 0 .end_amdhsa_kernel .text .Lfunc_end0: .size _Z11saxpyDeviceifPfS_, .Lfunc_end0-_Z11saxpyDeviceifPfS_ ; -- End function .section .AMDGPU.csdata,"",@progbits ; Kernel info: ; codeLenInByte = 156 ; NumSgprs: 18 ; NumVgprs: 4 ; ScratchSize: 0 ; MemoryBound: 0 ; FloatMode: 240 ; IeeeMode: 1 ; LDSByteSize: 0 bytes/workgroup (compile time only) ; SGPRBlocks: 2 ; VGPRBlocks: 0 ; NumSGPRsForWavesPerEU: 18 ; NumVGPRsForWavesPerEU: 4 ; Occupancy: 16 ; WaveLimiterHint : 0 ; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0 ; COMPUTE_PGM_RSRC2:USER_SGPR: 15 ; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 ; COMPUTE_PGM_RSRC2:TGID_X_EN: 1 ; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 ; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 ; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 .text .p2alignl 7, 3214868480 .fill 96, 4, 3214868480 .type __hip_cuid_,@object ; @__hip_cuid_ .section .bss,"aw",@nobits .globl __hip_cuid_ __hip_cuid_: .byte 0 ; 0x0 .size __hip_cuid_, 1 .ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)" .section ".note.GNU-stack","",@progbits .addrsig .addrsig_sym __hip_cuid_ .amdgpu_metadata --- amdhsa.kernels: - .args: - .offset: 0 .size: 4 .value_kind: by_value - .offset: 4 .size: 4 .value_kind: by_value - .address_space: global .offset: 8 .size: 8 .value_kind: global_buffer - .address_space: global .offset: 16 .size: 8 .value_kind: global_buffer - .offset: 24 .size: 4 .value_kind: hidden_block_count_x - .offset: 28 .size: 4 .value_kind: hidden_block_count_y - .offset: 32 .size: 4 .value_kind: hidden_block_count_z - .offset: 36 .size: 2 .value_kind: hidden_group_size_x - .offset: 38 .size: 2 .value_kind: hidden_group_size_y - .offset: 40 .size: 2 .value_kind: hidden_group_size_z - .offset: 42 .size: 2 .value_kind: hidden_remainder_x - .offset: 44 .size: 2 .value_kind: hidden_remainder_y - .offset: 46 .size: 2 .value_kind: hidden_remainder_z - .offset: 64 .size: 8 .value_kind: hidden_global_offset_x - .offset: 72 .size: 8 .value_kind: hidden_global_offset_y - .offset: 80 .size: 8 .value_kind: hidden_global_offset_z - .offset: 88 .size: 2 .value_kind: hidden_grid_dims .group_segment_fixed_size: 0 .kernarg_segment_align: 8 .kernarg_segment_size: 280 .language: OpenCL C .language_version: - 2 - 0 .max_flat_workgroup_size: 1024 .name: _Z11saxpyDeviceifPfS_ .private_segment_fixed_size: 0 .sgpr_count: 18 .sgpr_spill_count: 0 .symbol: _Z11saxpyDeviceifPfS_.kd .uniform_work_group_size: 1 .uses_dynamic_stack: false .vgpr_count: 4 .vgpr_spill_count: 0 .wavefront_size: 32 .workgroup_processor_mode: 1 amdhsa.target: amdgcn-amd-amdhsa--gfx1100 amdhsa.version: - 1 - 2 ... .end_amdgpu_metadata